1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
44 #include "stringpool.h"
45 #include "insn-config.h"
49 #include "diagnostic-core.h"
51 #include "fold-const.h"
60 #include "stor-layout.h"
64 struct target_rtl default_target_rtl
;
66 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 scalar_int_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
74 scalar_int_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
75 scalar_int_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
77 /* Datastructures maintained for currently processed function in RTL form. */
79 struct rtl_data x_rtl
;
81 /* Indexed by pseudo register number, gives the rtx for that pseudo.
82 Allocated in parallel with regno_pointer_align.
83 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
84 with length attribute nested in top level structures. */
88 /* This is *not* reset after each function. It gives each CODE_LABEL
89 in the entire compilation a unique label number. */
91 static GTY(()) int label_num
= 1;
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
96 is set only for MODE_INT and MODE_VECTOR_INT modes. */
98 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
102 REAL_VALUE_TYPE dconst0
;
103 REAL_VALUE_TYPE dconst1
;
104 REAL_VALUE_TYPE dconst2
;
105 REAL_VALUE_TYPE dconstm1
;
106 REAL_VALUE_TYPE dconsthalf
;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
110 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
119 /* Standard pieces of rtx, to be substituted directly into things. */
122 rtx simple_return_rtx
;
125 /* Marker used for denoting an INSN, which should never be accessed (i.e.,
126 this pointer should normally never be dereferenced), but is required to be
127 distinct from NULL_RTX. Currently used by peephole2 pass. */
128 rtx_insn
*invalid_insn_rtx
;
130 /* A hash table storing CONST_INTs whose absolute value is greater
131 than MAX_SAVED_CONST_INT. */
133 struct const_int_hasher
: ggc_cache_ptr_hash
<rtx_def
>
135 typedef HOST_WIDE_INT compare_type
;
137 static hashval_t
hash (rtx i
);
138 static bool equal (rtx i
, HOST_WIDE_INT h
);
141 static GTY ((cache
)) hash_table
<const_int_hasher
> *const_int_htab
;
143 struct const_wide_int_hasher
: ggc_cache_ptr_hash
<rtx_def
>
145 static hashval_t
hash (rtx x
);
146 static bool equal (rtx x
, rtx y
);
149 static GTY ((cache
)) hash_table
<const_wide_int_hasher
> *const_wide_int_htab
;
151 /* A hash table storing register attribute structures. */
152 struct reg_attr_hasher
: ggc_cache_ptr_hash
<reg_attrs
>
154 static hashval_t
hash (reg_attrs
*x
);
155 static bool equal (reg_attrs
*a
, reg_attrs
*b
);
158 static GTY ((cache
)) hash_table
<reg_attr_hasher
> *reg_attrs_htab
;
160 /* A hash table storing all CONST_DOUBLEs. */
161 struct const_double_hasher
: ggc_cache_ptr_hash
<rtx_def
>
163 static hashval_t
hash (rtx x
);
164 static bool equal (rtx x
, rtx y
);
167 static GTY ((cache
)) hash_table
<const_double_hasher
> *const_double_htab
;
169 /* A hash table storing all CONST_FIXEDs. */
170 struct const_fixed_hasher
: ggc_cache_ptr_hash
<rtx_def
>
172 static hashval_t
hash (rtx x
);
173 static bool equal (rtx x
, rtx y
);
176 static GTY ((cache
)) hash_table
<const_fixed_hasher
> *const_fixed_htab
;
178 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
179 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
180 #define first_label_num (crtl->emit.x_first_label_num)
182 static void set_used_decls (tree
);
183 static void mark_label_nuses (rtx
);
184 #if TARGET_SUPPORTS_WIDE_INT
185 static rtx
lookup_const_wide_int (rtx
);
187 static rtx
lookup_const_double (rtx
);
188 static rtx
lookup_const_fixed (rtx
);
189 static reg_attrs
*get_reg_attrs (tree
, int);
190 static rtx
gen_const_vector (machine_mode
, int);
191 static void copy_rtx_if_shared_1 (rtx
*orig
);
193 /* Probability of the conditional branch currently proceeded by try_split. */
194 profile_probability split_branch_probability
;
196 /* Returns a hash code for X (which is a really a CONST_INT). */
199 const_int_hasher::hash (rtx x
)
201 return (hashval_t
) INTVAL (x
);
204 /* Returns nonzero if the value represented by X (which is really a
205 CONST_INT) is the same as that given by Y (which is really a
209 const_int_hasher::equal (rtx x
, HOST_WIDE_INT y
)
211 return (INTVAL (x
) == y
);
214 #if TARGET_SUPPORTS_WIDE_INT
215 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
218 const_wide_int_hasher::hash (rtx x
)
221 unsigned HOST_WIDE_INT hash
= 0;
224 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
225 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
227 return (hashval_t
) hash
;
230 /* Returns nonzero if the value represented by X (which is really a
231 CONST_WIDE_INT) is the same as that given by Y (which is really a
235 const_wide_int_hasher::equal (rtx x
, rtx y
)
240 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
243 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
244 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
251 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
253 const_double_hasher::hash (rtx x
)
255 const_rtx
const value
= x
;
258 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
259 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
262 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
263 /* MODE is used in the comparison, so it should be in the hash. */
264 h
^= GET_MODE (value
);
269 /* Returns nonzero if the value represented by X (really a ...)
270 is the same as that represented by Y (really a ...) */
272 const_double_hasher::equal (rtx x
, rtx y
)
274 const_rtx
const a
= x
, b
= y
;
276 if (GET_MODE (a
) != GET_MODE (b
))
278 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
279 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
280 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
282 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
283 CONST_DOUBLE_REAL_VALUE (b
));
286 /* Returns a hash code for X (which is really a CONST_FIXED). */
289 const_fixed_hasher::hash (rtx x
)
291 const_rtx
const value
= x
;
294 h
= fixed_hash (CONST_FIXED_VALUE (value
));
295 /* MODE is used in the comparison, so it should be in the hash. */
296 h
^= GET_MODE (value
);
300 /* Returns nonzero if the value represented by X is the same as that
304 const_fixed_hasher::equal (rtx x
, rtx y
)
306 const_rtx
const a
= x
, b
= y
;
308 if (GET_MODE (a
) != GET_MODE (b
))
310 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
313 /* Return true if the given memory attributes are equal. */
316 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
322 return (p
->alias
== q
->alias
323 && p
->offset_known_p
== q
->offset_known_p
324 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
325 && p
->size_known_p
== q
->size_known_p
326 && (!p
->size_known_p
|| p
->size
== q
->size
)
327 && p
->align
== q
->align
328 && p
->addrspace
== q
->addrspace
329 && (p
->expr
== q
->expr
330 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
331 && operand_equal_p (p
->expr
, q
->expr
, 0))));
334 /* Set MEM's memory attributes so that they are the same as ATTRS. */
337 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
339 /* If everything is the default, we can just clear the attributes. */
340 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
347 || !mem_attrs_eq_p (attrs
, MEM_ATTRS (mem
)))
349 MEM_ATTRS (mem
) = ggc_alloc
<mem_attrs
> ();
350 memcpy (MEM_ATTRS (mem
), attrs
, sizeof (mem_attrs
));
354 /* Returns a hash code for X (which is a really a reg_attrs *). */
357 reg_attr_hasher::hash (reg_attrs
*x
)
359 const reg_attrs
*const p
= x
;
361 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
364 /* Returns nonzero if the value represented by X is the same as that given by
368 reg_attr_hasher::equal (reg_attrs
*x
, reg_attrs
*y
)
370 const reg_attrs
*const p
= x
;
371 const reg_attrs
*const q
= y
;
373 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
375 /* Allocate a new reg_attrs structure and insert it into the hash table if
376 one identical to it is not already in the table. We are doing this for
380 get_reg_attrs (tree decl
, int offset
)
384 /* If everything is the default, we can just return zero. */
385 if (decl
== 0 && offset
== 0)
389 attrs
.offset
= offset
;
391 reg_attrs
**slot
= reg_attrs_htab
->find_slot (&attrs
, INSERT
);
394 *slot
= ggc_alloc
<reg_attrs
> ();
395 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
403 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
404 and to block register equivalences to be seen across this insn. */
409 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
410 MEM_VOLATILE_P (x
) = true;
416 /* Set the mode and register number of X to MODE and REGNO. */
419 set_mode_and_regno (rtx x
, machine_mode mode
, unsigned int regno
)
421 unsigned int nregs
= (HARD_REGISTER_NUM_P (regno
)
422 ? hard_regno_nregs (regno
, mode
)
424 PUT_MODE_RAW (x
, mode
);
425 set_regno_raw (x
, regno
, nregs
);
428 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
429 don't attempt to share with the various global pieces of rtl (such as
430 frame_pointer_rtx). */
433 gen_raw_REG (machine_mode mode
, unsigned int regno
)
435 rtx x
= rtx_alloc (REG MEM_STAT_INFO
);
436 set_mode_and_regno (x
, mode
, regno
);
437 REG_ATTRS (x
) = NULL
;
438 ORIGINAL_REGNO (x
) = regno
;
442 /* There are some RTL codes that require special attention; the generation
443 functions do the raw handling. If you add to this list, modify
444 special_rtx in gengenrtl.c as well. */
447 gen_rtx_EXPR_LIST (machine_mode mode
, rtx expr
, rtx expr_list
)
449 return as_a
<rtx_expr_list
*> (gen_rtx_fmt_ee (EXPR_LIST
, mode
, expr
,
454 gen_rtx_INSN_LIST (machine_mode mode
, rtx insn
, rtx insn_list
)
456 return as_a
<rtx_insn_list
*> (gen_rtx_fmt_ue (INSN_LIST
, mode
, insn
,
461 gen_rtx_INSN (machine_mode mode
, rtx_insn
*prev_insn
, rtx_insn
*next_insn
,
462 basic_block bb
, rtx pattern
, int location
, int code
,
465 return as_a
<rtx_insn
*> (gen_rtx_fmt_uuBeiie (INSN
, mode
,
466 prev_insn
, next_insn
,
467 bb
, pattern
, location
, code
,
472 gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
474 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
475 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
477 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
478 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
479 return const_true_rtx
;
482 /* Look up the CONST_INT in the hash table. */
483 rtx
*slot
= const_int_htab
->find_slot_with_hash (arg
, (hashval_t
) arg
,
486 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
492 gen_int_mode (HOST_WIDE_INT c
, machine_mode mode
)
494 return GEN_INT (trunc_int_for_mode (c
, mode
));
497 /* CONST_DOUBLEs might be created from pairs of integers, or from
498 REAL_VALUE_TYPEs. Also, their length is known only at run time,
499 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
501 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
502 hash table. If so, return its counterpart; otherwise add it
503 to the hash table and return it. */
505 lookup_const_double (rtx real
)
507 rtx
*slot
= const_double_htab
->find_slot (real
, INSERT
);
514 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
515 VALUE in mode MODE. */
517 const_double_from_real_value (REAL_VALUE_TYPE value
, machine_mode mode
)
519 rtx real
= rtx_alloc (CONST_DOUBLE
);
520 PUT_MODE (real
, mode
);
524 return lookup_const_double (real
);
527 /* Determine whether FIXED, a CONST_FIXED, already exists in the
528 hash table. If so, return its counterpart; otherwise add it
529 to the hash table and return it. */
532 lookup_const_fixed (rtx fixed
)
534 rtx
*slot
= const_fixed_htab
->find_slot (fixed
, INSERT
);
541 /* Return a CONST_FIXED rtx for a fixed-point value specified by
542 VALUE in mode MODE. */
545 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, machine_mode mode
)
547 rtx fixed
= rtx_alloc (CONST_FIXED
);
548 PUT_MODE (fixed
, mode
);
552 return lookup_const_fixed (fixed
);
555 #if TARGET_SUPPORTS_WIDE_INT == 0
556 /* Constructs double_int from rtx CST. */
559 rtx_to_double_int (const_rtx cst
)
563 if (CONST_INT_P (cst
))
564 r
= double_int::from_shwi (INTVAL (cst
));
565 else if (CONST_DOUBLE_AS_INT_P (cst
))
567 r
.low
= CONST_DOUBLE_LOW (cst
);
568 r
.high
= CONST_DOUBLE_HIGH (cst
);
577 #if TARGET_SUPPORTS_WIDE_INT
578 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
579 If so, return its counterpart; otherwise add it to the hash table and
583 lookup_const_wide_int (rtx wint
)
585 rtx
*slot
= const_wide_int_htab
->find_slot (wint
, INSERT
);
593 /* Return an rtx constant for V, given that the constant has mode MODE.
594 The returned rtx will be a CONST_INT if V fits, otherwise it will be
595 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
596 (if TARGET_SUPPORTS_WIDE_INT). */
599 immed_wide_int_const (const wide_int_ref
&v
, machine_mode mode
)
601 unsigned int len
= v
.get_len ();
602 /* Not scalar_int_mode because we also allow pointer bound modes. */
603 unsigned int prec
= GET_MODE_PRECISION (as_a
<scalar_mode
> (mode
));
605 /* Allow truncation but not extension since we do not know if the
606 number is signed or unsigned. */
607 gcc_assert (prec
<= v
.get_precision ());
609 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
610 return gen_int_mode (v
.elt (0), mode
);
612 #if TARGET_SUPPORTS_WIDE_INT
616 unsigned int blocks_needed
617 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
619 if (len
> blocks_needed
)
622 value
= const_wide_int_alloc (len
);
624 /* It is so tempting to just put the mode in here. Must control
626 PUT_MODE (value
, VOIDmode
);
627 CWI_PUT_NUM_ELEM (value
, len
);
629 for (i
= 0; i
< len
; i
++)
630 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
632 return lookup_const_wide_int (value
);
635 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
639 #if TARGET_SUPPORTS_WIDE_INT == 0
640 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
641 of ints: I0 is the low-order word and I1 is the high-order word.
642 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
643 implied upper bits are copies of the high bit of i1. The value
644 itself is neither signed nor unsigned. Do not use this routine for
645 non-integer modes; convert to REAL_VALUE_TYPE and use
646 const_double_from_real_value. */
649 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, machine_mode mode
)
654 /* There are the following cases (note that there are no modes with
655 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
657 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
659 2) If the value of the integer fits into HOST_WIDE_INT anyway
660 (i.e., i1 consists only from copies of the sign bit, and sign
661 of i0 and i1 are the same), then we return a CONST_INT for i0.
662 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
664 if (is_a
<scalar_mode
> (mode
, &smode
)
665 && GET_MODE_BITSIZE (smode
) <= HOST_BITS_PER_WIDE_INT
)
666 return gen_int_mode (i0
, mode
);
668 /* If this integer fits in one word, return a CONST_INT. */
669 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
672 /* We use VOIDmode for integers. */
673 value
= rtx_alloc (CONST_DOUBLE
);
674 PUT_MODE (value
, VOIDmode
);
676 CONST_DOUBLE_LOW (value
) = i0
;
677 CONST_DOUBLE_HIGH (value
) = i1
;
679 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
680 XWINT (value
, i
) = 0;
682 return lookup_const_double (value
);
687 gen_rtx_REG (machine_mode mode
, unsigned int regno
)
689 /* In case the MD file explicitly references the frame pointer, have
690 all such references point to the same frame pointer. This is
691 used during frame pointer elimination to distinguish the explicit
692 references to these registers from pseudos that happened to be
695 If we have eliminated the frame pointer or arg pointer, we will
696 be using it as a normal register, for example as a spill
697 register. In such cases, we might be accessing it in a mode that
698 is not Pmode and therefore cannot use the pre-allocated rtx.
700 Also don't do this when we are making new REGs in reload, since
701 we don't want to get confused with the real pointers. */
703 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
705 if (regno
== FRAME_POINTER_REGNUM
706 && (!reload_completed
|| frame_pointer_needed
))
707 return frame_pointer_rtx
;
709 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
710 && regno
== HARD_FRAME_POINTER_REGNUM
711 && (!reload_completed
|| frame_pointer_needed
))
712 return hard_frame_pointer_rtx
;
713 #if !HARD_FRAME_POINTER_IS_ARG_POINTER
714 if (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
715 && regno
== ARG_POINTER_REGNUM
)
716 return arg_pointer_rtx
;
718 #ifdef RETURN_ADDRESS_POINTER_REGNUM
719 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
720 return return_address_pointer_rtx
;
722 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
723 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
724 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
725 return pic_offset_table_rtx
;
726 if (regno
== STACK_POINTER_REGNUM
)
727 return stack_pointer_rtx
;
731 /* If the per-function register table has been set up, try to re-use
732 an existing entry in that table to avoid useless generation of RTL.
734 This code is disabled for now until we can fix the various backends
735 which depend on having non-shared hard registers in some cases. Long
736 term we want to re-enable this code as it can significantly cut down
737 on the amount of useless RTL that gets generated.
739 We'll also need to fix some code that runs after reload that wants to
740 set ORIGINAL_REGNO. */
745 && regno
< FIRST_PSEUDO_REGISTER
746 && reg_raw_mode
[regno
] == mode
)
747 return regno_reg_rtx
[regno
];
750 return gen_raw_REG (mode
, regno
);
754 gen_rtx_MEM (machine_mode mode
, rtx addr
)
756 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
758 /* This field is not cleared by the mere allocation of the rtx, so
765 /* Generate a memory referring to non-trapping constant memory. */
768 gen_const_mem (machine_mode mode
, rtx addr
)
770 rtx mem
= gen_rtx_MEM (mode
, addr
);
771 MEM_READONLY_P (mem
) = 1;
772 MEM_NOTRAP_P (mem
) = 1;
776 /* Generate a MEM referring to fixed portions of the frame, e.g., register
780 gen_frame_mem (machine_mode mode
, rtx addr
)
782 rtx mem
= gen_rtx_MEM (mode
, addr
);
783 MEM_NOTRAP_P (mem
) = 1;
784 set_mem_alias_set (mem
, get_frame_alias_set ());
788 /* Generate a MEM referring to a temporary use of the stack, not part
789 of the fixed stack frame. For example, something which is pushed
790 by a target splitter. */
792 gen_tmp_stack_mem (machine_mode mode
, rtx addr
)
794 rtx mem
= gen_rtx_MEM (mode
, addr
);
795 MEM_NOTRAP_P (mem
) = 1;
796 if (!cfun
->calls_alloca
)
797 set_mem_alias_set (mem
, get_frame_alias_set ());
801 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
802 this construct would be valid, and false otherwise. */
805 validate_subreg (machine_mode omode
, machine_mode imode
,
806 const_rtx reg
, unsigned int offset
)
808 unsigned int isize
= GET_MODE_SIZE (imode
);
809 unsigned int osize
= GET_MODE_SIZE (omode
);
811 /* All subregs must be aligned. */
812 if (offset
% osize
!= 0)
815 /* The subreg offset cannot be outside the inner object. */
819 /* ??? This should not be here. Temporarily continue to allow word_mode
820 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
821 Generally, backends are doing something sketchy but it'll take time to
823 if (omode
== word_mode
)
825 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
826 is the culprit here, and not the backends. */
827 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
829 /* Allow component subregs of complex and vector. Though given the below
830 extraction rules, it's not always clear what that means. */
831 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
832 && GET_MODE_INNER (imode
) == omode
)
834 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
835 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
836 represent this. It's questionable if this ought to be represented at
837 all -- why can't this all be hidden in post-reload splitters that make
838 arbitrarily mode changes to the registers themselves. */
839 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
841 /* Subregs involving floating point modes are not allowed to
842 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
843 (subreg:SI (reg:DF) 0) isn't. */
844 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
846 if (! (isize
== osize
847 /* LRA can use subreg to store a floating point value in
848 an integer mode. Although the floating point and the
849 integer modes need the same number of hard registers,
850 the size of floating point mode can be less than the
851 integer mode. LRA also uses subregs for a register
852 should be used in different mode in on insn. */
857 /* Paradoxical subregs must have offset zero. */
861 /* This is a normal subreg. Verify that the offset is representable. */
863 /* For hard registers, we already have most of these rules collected in
864 subreg_offset_representable_p. */
865 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
867 unsigned int regno
= REGNO (reg
);
869 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
870 && GET_MODE_INNER (imode
) == omode
)
872 else if (!REG_CAN_CHANGE_MODE_P (regno
, imode
, omode
))
875 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
878 /* For pseudo registers, we want most of the same checks. Namely:
879 If the register no larger than a word, the subreg must be lowpart.
880 If the register is larger than a word, the subreg must be the lowpart
881 of a subword. A subreg does *not* perform arbitrary bit extraction.
882 Given that we've already checked mode/offset alignment, we only have
883 to check subword subregs here. */
884 if (osize
< UNITS_PER_WORD
885 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
887 machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
888 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
889 if (offset
% UNITS_PER_WORD
!= low_off
)
896 gen_rtx_SUBREG (machine_mode mode
, rtx reg
, int offset
)
898 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
899 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
902 /* Generate a SUBREG representing the least-significant part of REG if MODE
903 is smaller than mode of REG, otherwise paradoxical SUBREG. */
906 gen_lowpart_SUBREG (machine_mode mode
, rtx reg
)
910 inmode
= GET_MODE (reg
);
911 if (inmode
== VOIDmode
)
913 return gen_rtx_SUBREG (mode
, reg
,
914 subreg_lowpart_offset (mode
, inmode
));
918 gen_rtx_VAR_LOCATION (machine_mode mode
, tree decl
, rtx loc
,
919 enum var_init_status status
)
921 rtx x
= gen_rtx_fmt_te (VAR_LOCATION
, mode
, decl
, loc
);
922 PAT_VAR_LOCATION_STATUS (x
) = status
;
927 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
930 gen_rtvec (int n
, ...)
938 /* Don't allocate an empty rtvec... */
945 rt_val
= rtvec_alloc (n
);
947 for (i
= 0; i
< n
; i
++)
948 rt_val
->elem
[i
] = va_arg (p
, rtx
);
955 gen_rtvec_v (int n
, rtx
*argp
)
960 /* Don't allocate an empty rtvec... */
964 rt_val
= rtvec_alloc (n
);
966 for (i
= 0; i
< n
; i
++)
967 rt_val
->elem
[i
] = *argp
++;
973 gen_rtvec_v (int n
, rtx_insn
**argp
)
978 /* Don't allocate an empty rtvec... */
982 rt_val
= rtvec_alloc (n
);
984 for (i
= 0; i
< n
; i
++)
985 rt_val
->elem
[i
] = *argp
++;
991 /* Return the number of bytes between the start of an OUTER_MODE
992 in-memory value and the start of an INNER_MODE in-memory value,
993 given that the former is a lowpart of the latter. It may be a
994 paradoxical lowpart, in which case the offset will be negative
995 on big-endian targets. */
998 byte_lowpart_offset (machine_mode outer_mode
,
999 machine_mode inner_mode
)
1001 if (paradoxical_subreg_p (outer_mode
, inner_mode
))
1002 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
1004 return subreg_lowpart_offset (outer_mode
, inner_mode
);
1007 /* Return the offset of (subreg:OUTER_MODE (mem:INNER_MODE X) OFFSET)
1008 from address X. For paradoxical big-endian subregs this is a
1009 negative value, otherwise it's the same as OFFSET. */
1012 subreg_memory_offset (machine_mode outer_mode
, machine_mode inner_mode
,
1013 unsigned int offset
)
1015 if (paradoxical_subreg_p (outer_mode
, inner_mode
))
1017 gcc_assert (offset
== 0);
1018 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
1023 /* As above, but return the offset that existing subreg X would have
1024 if SUBREG_REG (X) were stored in memory. The only significant thing
1025 about the current SUBREG_REG is its mode. */
1028 subreg_memory_offset (const_rtx x
)
1030 return subreg_memory_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)),
1034 /* Generate a REG rtx for a new pseudo register of mode MODE.
1035 This pseudo is assigned the next sequential register number. */
1038 gen_reg_rtx (machine_mode mode
)
1041 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
1043 gcc_assert (can_create_pseudo_p ());
1045 /* If a virtual register with bigger mode alignment is generated,
1046 increase stack alignment estimation because it might be spilled
1048 if (SUPPORTS_STACK_ALIGNMENT
1049 && crtl
->stack_alignment_estimated
< align
1050 && !crtl
->stack_realign_processed
)
1052 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
1053 if (crtl
->stack_alignment_estimated
< min_align
)
1054 crtl
->stack_alignment_estimated
= min_align
;
1057 if (generating_concat_p
1058 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
1059 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
1061 /* For complex modes, don't make a single pseudo.
1062 Instead, make a CONCAT of two pseudos.
1063 This allows noncontiguous allocation of the real and imaginary parts,
1064 which makes much better code. Besides, allocating DCmode
1065 pseudos overstrains reload on some machines like the 386. */
1066 rtx realpart
, imagpart
;
1067 machine_mode partmode
= GET_MODE_INNER (mode
);
1069 realpart
= gen_reg_rtx (partmode
);
1070 imagpart
= gen_reg_rtx (partmode
);
1071 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
1074 /* Do not call gen_reg_rtx with uninitialized crtl. */
1075 gcc_assert (crtl
->emit
.regno_pointer_align_length
);
1077 crtl
->emit
.ensure_regno_capacity ();
1078 gcc_assert (reg_rtx_no
< crtl
->emit
.regno_pointer_align_length
);
1080 val
= gen_raw_REG (mode
, reg_rtx_no
);
1081 regno_reg_rtx
[reg_rtx_no
++] = val
;
1085 /* Make sure m_regno_pointer_align, and regno_reg_rtx are large
1086 enough to have elements in the range 0 <= idx <= reg_rtx_no. */
1089 emit_status::ensure_regno_capacity ()
1091 int old_size
= regno_pointer_align_length
;
1093 if (reg_rtx_no
< old_size
)
1096 int new_size
= old_size
* 2;
1097 while (reg_rtx_no
>= new_size
)
1100 char *tmp
= XRESIZEVEC (char, regno_pointer_align
, new_size
);
1101 memset (tmp
+ old_size
, 0, new_size
- old_size
);
1102 regno_pointer_align
= (unsigned char *) tmp
;
1104 rtx
*new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, new_size
);
1105 memset (new1
+ old_size
, 0, (new_size
- old_size
) * sizeof (rtx
));
1106 regno_reg_rtx
= new1
;
1108 crtl
->emit
.regno_pointer_align_length
= new_size
;
1111 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1114 reg_is_parm_p (rtx reg
)
1118 gcc_assert (REG_P (reg
));
1119 decl
= REG_EXPR (reg
);
1120 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1123 /* Update NEW with the same attributes as REG, but with OFFSET added
1124 to the REG_OFFSET. */
1127 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1129 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1130 REG_OFFSET (reg
) + offset
);
1133 /* Generate a register with same attributes as REG, but with OFFSET
1134 added to the REG_OFFSET. */
1137 gen_rtx_REG_offset (rtx reg
, machine_mode mode
, unsigned int regno
,
1140 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1142 update_reg_offset (new_rtx
, reg
, offset
);
1146 /* Generate a new pseudo-register with the same attributes as REG, but
1147 with OFFSET added to the REG_OFFSET. */
1150 gen_reg_rtx_offset (rtx reg
, machine_mode mode
, int offset
)
1152 rtx new_rtx
= gen_reg_rtx (mode
);
1154 update_reg_offset (new_rtx
, reg
, offset
);
1158 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1159 new register is a (possibly paradoxical) lowpart of the old one. */
1162 adjust_reg_mode (rtx reg
, machine_mode mode
)
1164 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1165 PUT_MODE (reg
, mode
);
1168 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1169 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1172 set_reg_attrs_from_value (rtx reg
, rtx x
)
1175 bool can_be_reg_pointer
= true;
1177 /* Don't call mark_reg_pointer for incompatible pointer sign
1179 while (GET_CODE (x
) == SIGN_EXTEND
1180 || GET_CODE (x
) == ZERO_EXTEND
1181 || GET_CODE (x
) == TRUNCATE
1182 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1184 #if defined(POINTERS_EXTEND_UNSIGNED)
1185 if (((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1186 || (GET_CODE (x
) == ZERO_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
)
1187 || (paradoxical_subreg_p (x
)
1188 && ! (SUBREG_PROMOTED_VAR_P (x
)
1189 && SUBREG_CHECK_PROMOTED_SIGN (x
,
1190 POINTERS_EXTEND_UNSIGNED
))))
1191 && !targetm
.have_ptr_extend ())
1192 can_be_reg_pointer
= false;
1197 /* Hard registers can be reused for multiple purposes within the same
1198 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1199 on them is wrong. */
1200 if (HARD_REGISTER_P (reg
))
1203 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1206 if (MEM_OFFSET_KNOWN_P (x
))
1207 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1208 MEM_OFFSET (x
) + offset
);
1209 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1210 mark_reg_pointer (reg
, 0);
1215 update_reg_offset (reg
, x
, offset
);
1216 if (can_be_reg_pointer
&& REG_POINTER (x
))
1217 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1221 /* Generate a REG rtx for a new pseudo register, copying the mode
1222 and attributes from X. */
1225 gen_reg_rtx_and_attrs (rtx x
)
1227 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1228 set_reg_attrs_from_value (reg
, x
);
1232 /* Set the register attributes for registers contained in PARM_RTX.
1233 Use needed values from memory attributes of MEM. */
1236 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1238 if (REG_P (parm_rtx
))
1239 set_reg_attrs_from_value (parm_rtx
, mem
);
1240 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1242 /* Check for a NULL entry in the first slot, used to indicate that the
1243 parameter goes both on the stack and in registers. */
1244 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1245 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1247 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1248 if (REG_P (XEXP (x
, 0)))
1249 REG_ATTRS (XEXP (x
, 0))
1250 = get_reg_attrs (MEM_EXPR (mem
),
1251 INTVAL (XEXP (x
, 1)));
1256 /* Set the REG_ATTRS for registers in value X, given that X represents
1260 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1265 if (GET_CODE (x
) == SUBREG
)
1267 gcc_assert (subreg_lowpart_p (x
));
1272 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1275 : TYPE_MODE (TREE_TYPE (tdecl
))));
1276 if (GET_CODE (x
) == CONCAT
)
1278 if (REG_P (XEXP (x
, 0)))
1279 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1280 if (REG_P (XEXP (x
, 1)))
1281 REG_ATTRS (XEXP (x
, 1))
1282 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1284 if (GET_CODE (x
) == PARALLEL
)
1288 /* Check for a NULL entry, used to indicate that the parameter goes
1289 both on the stack and in registers. */
1290 if (XEXP (XVECEXP (x
, 0, 0), 0))
1295 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1297 rtx y
= XVECEXP (x
, 0, i
);
1298 if (REG_P (XEXP (y
, 0)))
1299 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1304 /* Assign the RTX X to declaration T. */
1307 set_decl_rtl (tree t
, rtx x
)
1309 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1311 set_reg_attrs_for_decl_rtl (t
, x
);
1314 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1315 if the ABI requires the parameter to be passed by reference. */
1318 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1320 DECL_INCOMING_RTL (t
) = x
;
1321 if (x
&& !by_reference_p
)
1322 set_reg_attrs_for_decl_rtl (t
, x
);
1325 /* Identify REG (which may be a CONCAT) as a user register. */
1328 mark_user_reg (rtx reg
)
1330 if (GET_CODE (reg
) == CONCAT
)
1332 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1333 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1337 gcc_assert (REG_P (reg
));
1338 REG_USERVAR_P (reg
) = 1;
1342 /* Identify REG as a probable pointer register and show its alignment
1343 as ALIGN, if nonzero. */
1346 mark_reg_pointer (rtx reg
, int align
)
1348 if (! REG_POINTER (reg
))
1350 REG_POINTER (reg
) = 1;
1353 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1355 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1356 /* We can no-longer be sure just how aligned this pointer is. */
1357 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1360 /* Return 1 plus largest pseudo reg number used in the current function. */
1368 /* Return 1 + the largest label number used so far in the current function. */
1371 max_label_num (void)
1376 /* Return first label number used in this function (if any were used). */
1379 get_first_label_num (void)
1381 return first_label_num
;
1384 /* If the rtx for label was created during the expansion of a nested
1385 function, then first_label_num won't include this label number.
1386 Fix this now so that array indices work later. */
1389 maybe_set_first_label_num (rtx_code_label
*x
)
1391 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1392 first_label_num
= CODE_LABEL_NUMBER (x
);
1395 /* For use by the RTL function loader, when mingling with normal
1397 Ensure that label_num is greater than the label num of X, to avoid
1398 duplicate labels in the generated assembler. */
1401 maybe_set_max_label_num (rtx_code_label
*x
)
1403 if (CODE_LABEL_NUMBER (x
) >= label_num
)
1404 label_num
= CODE_LABEL_NUMBER (x
) + 1;
1408 /* Return a value representing some low-order bits of X, where the number
1409 of low-order bits is given by MODE. Note that no conversion is done
1410 between floating-point and fixed-point values, rather, the bit
1411 representation is returned.
1413 This function handles the cases in common between gen_lowpart, below,
1414 and two variants in cse.c and combine.c. These are the cases that can
1415 be safely handled at all points in the compilation.
1417 If this is not a case we can handle, return 0. */
1420 gen_lowpart_common (machine_mode mode
, rtx x
)
1422 int msize
= GET_MODE_SIZE (mode
);
1424 machine_mode innermode
;
1426 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1427 so we have to make one up. Yuk. */
1428 innermode
= GET_MODE (x
);
1430 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1431 innermode
= int_mode_for_size (HOST_BITS_PER_WIDE_INT
, 0).require ();
1432 else if (innermode
== VOIDmode
)
1433 innermode
= int_mode_for_size (HOST_BITS_PER_DOUBLE_INT
, 0).require ();
1435 xsize
= GET_MODE_SIZE (innermode
);
1437 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1439 if (innermode
== mode
)
1442 /* MODE must occupy no more words than the mode of X. */
1443 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1444 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1447 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1448 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1451 scalar_int_mode int_mode
, int_innermode
, from_mode
;
1452 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1453 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
1454 && is_a
<scalar_int_mode
> (innermode
, &int_innermode
)
1455 && is_a
<scalar_int_mode
> (GET_MODE (XEXP (x
, 0)), &from_mode
))
1457 /* If we are getting the low-order part of something that has been
1458 sign- or zero-extended, we can either just use the object being
1459 extended or make a narrower extension. If we want an even smaller
1460 piece than the size of the object being extended, call ourselves
1463 This case is used mostly by combine and cse. */
1465 if (from_mode
== int_mode
)
1467 else if (GET_MODE_SIZE (int_mode
) < GET_MODE_SIZE (from_mode
))
1468 return gen_lowpart_common (int_mode
, XEXP (x
, 0));
1469 else if (GET_MODE_SIZE (int_mode
) < GET_MODE_SIZE (int_innermode
))
1470 return gen_rtx_fmt_e (GET_CODE (x
), int_mode
, XEXP (x
, 0));
1472 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1473 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1474 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1475 return lowpart_subreg (mode
, x
, innermode
);
1477 /* Otherwise, we can't do this. */
1482 gen_highpart (machine_mode mode
, rtx x
)
1484 unsigned int msize
= GET_MODE_SIZE (mode
);
1487 /* This case loses if X is a subreg. To catch bugs early,
1488 complain if an invalid MODE is used even in other cases. */
1489 gcc_assert (msize
<= UNITS_PER_WORD
1490 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1492 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1493 subreg_highpart_offset (mode
, GET_MODE (x
)));
1494 gcc_assert (result
);
1496 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1497 the target if we have a MEM. gen_highpart must return a valid operand,
1498 emitting code if necessary to do so. */
1501 result
= validize_mem (result
);
1502 gcc_assert (result
);
1508 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1509 be VOIDmode constant. */
1511 gen_highpart_mode (machine_mode outermode
, machine_mode innermode
, rtx exp
)
1513 if (GET_MODE (exp
) != VOIDmode
)
1515 gcc_assert (GET_MODE (exp
) == innermode
);
1516 return gen_highpart (outermode
, exp
);
1518 return simplify_gen_subreg (outermode
, exp
, innermode
,
1519 subreg_highpart_offset (outermode
, innermode
));
1522 /* Return the SUBREG_BYTE for a lowpart subreg whose outer mode has
1523 OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1526 subreg_size_lowpart_offset (unsigned int outer_bytes
, unsigned int inner_bytes
)
1528 if (outer_bytes
> inner_bytes
)
1529 /* Paradoxical subregs always have a SUBREG_BYTE of 0. */
1532 if (BYTES_BIG_ENDIAN
&& WORDS_BIG_ENDIAN
)
1533 return inner_bytes
- outer_bytes
;
1534 else if (!BYTES_BIG_ENDIAN
&& !WORDS_BIG_ENDIAN
)
1537 return subreg_size_offset_from_lsb (outer_bytes
, inner_bytes
, 0);
1540 /* Return the SUBREG_BYTE for a highpart subreg whose outer mode has
1541 OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1544 subreg_size_highpart_offset (unsigned int outer_bytes
,
1545 unsigned int inner_bytes
)
1547 gcc_assert (inner_bytes
>= outer_bytes
);
1549 if (BYTES_BIG_ENDIAN
&& WORDS_BIG_ENDIAN
)
1551 else if (!BYTES_BIG_ENDIAN
&& !WORDS_BIG_ENDIAN
)
1552 return inner_bytes
- outer_bytes
;
1554 return subreg_size_offset_from_lsb (outer_bytes
, inner_bytes
,
1555 (inner_bytes
- outer_bytes
)
1559 /* Return 1 iff X, assumed to be a SUBREG,
1560 refers to the least significant part of its containing reg.
1561 If X is not a SUBREG, always return 1 (it is its own low part!). */
1564 subreg_lowpart_p (const_rtx x
)
1566 if (GET_CODE (x
) != SUBREG
)
1568 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1571 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1572 == SUBREG_BYTE (x
));
1575 /* Return subword OFFSET of operand OP.
1576 The word number, OFFSET, is interpreted as the word number starting
1577 at the low-order address. OFFSET 0 is the low-order word if not
1578 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1580 If we cannot extract the required word, we return zero. Otherwise,
1581 an rtx corresponding to the requested word will be returned.
1583 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1584 reload has completed, a valid address will always be returned. After
1585 reload, if a valid address cannot be returned, we return zero.
1587 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1588 it is the responsibility of the caller.
1590 MODE is the mode of OP in case it is a CONST_INT.
1592 ??? This is still rather broken for some cases. The problem for the
1593 moment is that all callers of this thing provide no 'goal mode' to
1594 tell us to work with. This exists because all callers were written
1595 in a word based SUBREG world.
1596 Now use of this function can be deprecated by simplify_subreg in most
1601 operand_subword (rtx op
, unsigned int offset
, int validate_address
, machine_mode mode
)
1603 if (mode
== VOIDmode
)
1604 mode
= GET_MODE (op
);
1606 gcc_assert (mode
!= VOIDmode
);
1608 /* If OP is narrower than a word, fail. */
1610 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1613 /* If we want a word outside OP, return zero. */
1615 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1618 /* Form a new MEM at the requested address. */
1621 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1623 if (! validate_address
)
1626 else if (reload_completed
)
1628 if (! strict_memory_address_addr_space_p (word_mode
,
1630 MEM_ADDR_SPACE (op
)))
1634 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1637 /* Rest can be handled by simplify_subreg. */
1638 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1641 /* Similar to `operand_subword', but never return 0. If we can't
1642 extract the required subword, put OP into a register and try again.
1643 The second attempt must succeed. We always validate the address in
1646 MODE is the mode of OP, in case it is CONST_INT. */
1649 operand_subword_force (rtx op
, unsigned int offset
, machine_mode mode
)
1651 rtx result
= operand_subword (op
, offset
, 1, mode
);
1656 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1658 /* If this is a register which can not be accessed by words, copy it
1659 to a pseudo register. */
1661 op
= copy_to_reg (op
);
1663 op
= force_reg (mode
, op
);
1666 result
= operand_subword (op
, offset
, 1, mode
);
1667 gcc_assert (result
);
1672 /* Returns 1 if both MEM_EXPR can be considered equal
1676 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1681 if (! expr1
|| ! expr2
)
1684 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1687 return operand_equal_p (expr1
, expr2
, 0);
1690 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1691 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1695 get_mem_align_offset (rtx mem
, unsigned int align
)
1698 unsigned HOST_WIDE_INT offset
;
1700 /* This function can't use
1701 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1702 || (MAX (MEM_ALIGN (mem),
1703 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1707 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1709 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1710 for <variable>. get_inner_reference doesn't handle it and
1711 even if it did, the alignment in that case needs to be determined
1712 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1713 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1714 isn't sufficiently aligned, the object it is in might be. */
1715 gcc_assert (MEM_P (mem
));
1716 expr
= MEM_EXPR (mem
);
1717 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1720 offset
= MEM_OFFSET (mem
);
1723 if (DECL_ALIGN (expr
) < align
)
1726 else if (INDIRECT_REF_P (expr
))
1728 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1731 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1735 tree inner
= TREE_OPERAND (expr
, 0);
1736 tree field
= TREE_OPERAND (expr
, 1);
1737 tree byte_offset
= component_ref_field_offset (expr
);
1738 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1741 || !tree_fits_uhwi_p (byte_offset
)
1742 || !tree_fits_uhwi_p (bit_offset
))
1745 offset
+= tree_to_uhwi (byte_offset
);
1746 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1748 if (inner
== NULL_TREE
)
1750 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1751 < (unsigned int) align
)
1755 else if (DECL_P (inner
))
1757 if (DECL_ALIGN (inner
) < align
)
1761 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1769 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1772 /* Given REF (a MEM) and T, either the type of X or the expression
1773 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1774 if we are making a new object of this type. BITPOS is nonzero if
1775 there is an offset outstanding on T that will be applied later. */
1778 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1779 HOST_WIDE_INT bitpos
)
1781 HOST_WIDE_INT apply_bitpos
= 0;
1783 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1786 /* It can happen that type_for_mode was given a mode for which there
1787 is no language-level type. In which case it returns NULL, which
1792 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1793 if (type
== error_mark_node
)
1796 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1797 wrong answer, as it assumes that DECL_RTL already has the right alias
1798 info. Callers should not set DECL_RTL until after the call to
1799 set_mem_attributes. */
1800 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1802 memset (&attrs
, 0, sizeof (attrs
));
1804 /* Get the alias set from the expression or type (perhaps using a
1805 front-end routine) and use it. */
1806 attrs
.alias
= get_alias_set (t
);
1808 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1809 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1811 /* Default values from pre-existing memory attributes if present. */
1812 refattrs
= MEM_ATTRS (ref
);
1815 /* ??? Can this ever happen? Calling this routine on a MEM that
1816 already carries memory attributes should probably be invalid. */
1817 attrs
.expr
= refattrs
->expr
;
1818 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1819 attrs
.offset
= refattrs
->offset
;
1820 attrs
.size_known_p
= refattrs
->size_known_p
;
1821 attrs
.size
= refattrs
->size
;
1822 attrs
.align
= refattrs
->align
;
1825 /* Otherwise, default values from the mode of the MEM reference. */
1828 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1829 gcc_assert (!defattrs
->expr
);
1830 gcc_assert (!defattrs
->offset_known_p
);
1832 /* Respect mode size. */
1833 attrs
.size_known_p
= defattrs
->size_known_p
;
1834 attrs
.size
= defattrs
->size
;
1835 /* ??? Is this really necessary? We probably should always get
1836 the size from the type below. */
1838 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1839 if T is an object, always compute the object alignment below. */
1841 attrs
.align
= defattrs
->align
;
1843 attrs
.align
= BITS_PER_UNIT
;
1844 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1845 e.g. if the type carries an alignment attribute. Should we be
1846 able to simply always use TYPE_ALIGN? */
1849 /* We can set the alignment from the type if we are making an object or if
1850 this is an INDIRECT_REF. */
1851 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
)
1852 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1854 /* If the size is known, we can set that. */
1855 tree new_size
= TYPE_SIZE_UNIT (type
);
1857 /* The address-space is that of the type. */
1858 as
= TYPE_ADDR_SPACE (type
);
1860 /* If T is not a type, we may be able to deduce some more information about
1866 if (TREE_THIS_VOLATILE (t
))
1867 MEM_VOLATILE_P (ref
) = 1;
1869 /* Now remove any conversions: they don't change what the underlying
1870 object is. Likewise for SAVE_EXPR. */
1871 while (CONVERT_EXPR_P (t
)
1872 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1873 || TREE_CODE (t
) == SAVE_EXPR
)
1874 t
= TREE_OPERAND (t
, 0);
1876 /* Note whether this expression can trap. */
1877 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1879 base
= get_base_address (t
);
1883 && TREE_READONLY (base
)
1884 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1885 && !TREE_THIS_VOLATILE (base
))
1886 MEM_READONLY_P (ref
) = 1;
1888 /* Mark static const strings readonly as well. */
1889 if (TREE_CODE (base
) == STRING_CST
1890 && TREE_READONLY (base
)
1891 && TREE_STATIC (base
))
1892 MEM_READONLY_P (ref
) = 1;
1894 /* Address-space information is on the base object. */
1895 if (TREE_CODE (base
) == MEM_REF
1896 || TREE_CODE (base
) == TARGET_MEM_REF
)
1897 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1900 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1903 /* If this expression uses it's parent's alias set, mark it such
1904 that we won't change it. */
1905 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1906 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1908 /* If this is a decl, set the attributes of the MEM from it. */
1912 attrs
.offset_known_p
= true;
1914 apply_bitpos
= bitpos
;
1915 new_size
= DECL_SIZE_UNIT (t
);
1918 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1919 else if (CONSTANT_CLASS_P (t
))
1922 /* If this is a field reference, record it. */
1923 else if (TREE_CODE (t
) == COMPONENT_REF
)
1926 attrs
.offset_known_p
= true;
1928 apply_bitpos
= bitpos
;
1929 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1930 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1933 /* If this is an array reference, look for an outer field reference. */
1934 else if (TREE_CODE (t
) == ARRAY_REF
)
1936 tree off_tree
= size_zero_node
;
1937 /* We can't modify t, because we use it at the end of the
1943 tree index
= TREE_OPERAND (t2
, 1);
1944 tree low_bound
= array_ref_low_bound (t2
);
1945 tree unit_size
= array_ref_element_size (t2
);
1947 /* We assume all arrays have sizes that are a multiple of a byte.
1948 First subtract the lower bound, if any, in the type of the
1949 index, then convert to sizetype and multiply by the size of
1950 the array element. */
1951 if (! integer_zerop (low_bound
))
1952 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1955 off_tree
= size_binop (PLUS_EXPR
,
1956 size_binop (MULT_EXPR
,
1957 fold_convert (sizetype
,
1961 t2
= TREE_OPERAND (t2
, 0);
1963 while (TREE_CODE (t2
) == ARRAY_REF
);
1966 || (TREE_CODE (t2
) == COMPONENT_REF
1967 /* For trailing arrays t2 doesn't have a size that
1968 covers all valid accesses. */
1969 && ! array_at_struct_end_p (t
)))
1972 attrs
.offset_known_p
= false;
1973 if (tree_fits_uhwi_p (off_tree
))
1975 attrs
.offset_known_p
= true;
1976 attrs
.offset
= tree_to_uhwi (off_tree
);
1977 apply_bitpos
= bitpos
;
1980 /* Else do not record a MEM_EXPR. */
1983 /* If this is an indirect reference, record it. */
1984 else if (TREE_CODE (t
) == MEM_REF
1985 || TREE_CODE (t
) == TARGET_MEM_REF
)
1988 attrs
.offset_known_p
= true;
1990 apply_bitpos
= bitpos
;
1993 /* Compute the alignment. */
1994 unsigned int obj_align
;
1995 unsigned HOST_WIDE_INT obj_bitpos
;
1996 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1997 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1998 if (obj_bitpos
!= 0)
1999 obj_align
= least_bit_hwi (obj_bitpos
);
2000 attrs
.align
= MAX (attrs
.align
, obj_align
);
2003 if (tree_fits_uhwi_p (new_size
))
2005 attrs
.size_known_p
= true;
2006 attrs
.size
= tree_to_uhwi (new_size
);
2009 /* If we modified OFFSET based on T, then subtract the outstanding
2010 bit position offset. Similarly, increase the size of the accessed
2011 object to contain the negative offset. */
2014 gcc_assert (attrs
.offset_known_p
);
2015 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
2016 if (attrs
.size_known_p
)
2017 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
2020 /* Now set the attributes we computed above. */
2021 attrs
.addrspace
= as
;
2022 set_mem_attrs (ref
, &attrs
);
2026 set_mem_attributes (rtx ref
, tree t
, int objectp
)
2028 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
2031 /* Set the alias set of MEM to SET. */
2034 set_mem_alias_set (rtx mem
, alias_set_type set
)
2036 struct mem_attrs attrs
;
2038 /* If the new and old alias sets don't conflict, something is wrong. */
2039 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
2040 attrs
= *get_mem_attrs (mem
);
2042 set_mem_attrs (mem
, &attrs
);
2045 /* Set the address space of MEM to ADDRSPACE (target-defined). */
2048 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
2050 struct mem_attrs attrs
;
2052 attrs
= *get_mem_attrs (mem
);
2053 attrs
.addrspace
= addrspace
;
2054 set_mem_attrs (mem
, &attrs
);
2057 /* Set the alignment of MEM to ALIGN bits. */
2060 set_mem_align (rtx mem
, unsigned int align
)
2062 struct mem_attrs attrs
;
2064 attrs
= *get_mem_attrs (mem
);
2065 attrs
.align
= align
;
2066 set_mem_attrs (mem
, &attrs
);
2069 /* Set the expr for MEM to EXPR. */
2072 set_mem_expr (rtx mem
, tree expr
)
2074 struct mem_attrs attrs
;
2076 attrs
= *get_mem_attrs (mem
);
2078 set_mem_attrs (mem
, &attrs
);
2081 /* Set the offset of MEM to OFFSET. */
2084 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
2086 struct mem_attrs attrs
;
2088 attrs
= *get_mem_attrs (mem
);
2089 attrs
.offset_known_p
= true;
2090 attrs
.offset
= offset
;
2091 set_mem_attrs (mem
, &attrs
);
2094 /* Clear the offset of MEM. */
2097 clear_mem_offset (rtx mem
)
2099 struct mem_attrs attrs
;
2101 attrs
= *get_mem_attrs (mem
);
2102 attrs
.offset_known_p
= false;
2103 set_mem_attrs (mem
, &attrs
);
2106 /* Set the size of MEM to SIZE. */
2109 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2111 struct mem_attrs attrs
;
2113 attrs
= *get_mem_attrs (mem
);
2114 attrs
.size_known_p
= true;
2116 set_mem_attrs (mem
, &attrs
);
2119 /* Clear the size of MEM. */
2122 clear_mem_size (rtx mem
)
2124 struct mem_attrs attrs
;
2126 attrs
= *get_mem_attrs (mem
);
2127 attrs
.size_known_p
= false;
2128 set_mem_attrs (mem
, &attrs
);
2131 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2132 and its address changed to ADDR. (VOIDmode means don't change the mode.
2133 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2134 returned memory location is required to be valid. INPLACE is true if any
2135 changes can be made directly to MEMREF or false if MEMREF must be treated
2138 The memory attributes are not changed. */
2141 change_address_1 (rtx memref
, machine_mode mode
, rtx addr
, int validate
,
2147 gcc_assert (MEM_P (memref
));
2148 as
= MEM_ADDR_SPACE (memref
);
2149 if (mode
== VOIDmode
)
2150 mode
= GET_MODE (memref
);
2152 addr
= XEXP (memref
, 0);
2153 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2154 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2157 /* Don't validate address for LRA. LRA can make the address valid
2158 by itself in most efficient way. */
2159 if (validate
&& !lra_in_progress
)
2161 if (reload_in_progress
|| reload_completed
)
2162 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2164 addr
= memory_address_addr_space (mode
, addr
, as
);
2167 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2172 XEXP (memref
, 0) = addr
;
2176 new_rtx
= gen_rtx_MEM (mode
, addr
);
2177 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2181 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2182 way we are changing MEMREF, so we only preserve the alias set. */
2185 change_address (rtx memref
, machine_mode mode
, rtx addr
)
2187 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1, false);
2188 machine_mode mmode
= GET_MODE (new_rtx
);
2189 struct mem_attrs attrs
, *defattrs
;
2191 attrs
= *get_mem_attrs (memref
);
2192 defattrs
= mode_mem_attrs
[(int) mmode
];
2193 attrs
.expr
= NULL_TREE
;
2194 attrs
.offset_known_p
= false;
2195 attrs
.size_known_p
= defattrs
->size_known_p
;
2196 attrs
.size
= defattrs
->size
;
2197 attrs
.align
= defattrs
->align
;
2199 /* If there are no changes, just return the original memory reference. */
2200 if (new_rtx
== memref
)
2202 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2205 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2206 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2209 set_mem_attrs (new_rtx
, &attrs
);
2213 /* Return a memory reference like MEMREF, but with its mode changed
2214 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2215 nonzero, the memory address is forced to be valid.
2216 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2217 and the caller is responsible for adjusting MEMREF base register.
2218 If ADJUST_OBJECT is zero, the underlying object associated with the
2219 memory reference is left unchanged and the caller is responsible for
2220 dealing with it. Otherwise, if the new memory reference is outside
2221 the underlying object, even partially, then the object is dropped.
2222 SIZE, if nonzero, is the size of an access in cases where MODE
2223 has no inherent size. */
2226 adjust_address_1 (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
,
2227 int validate
, int adjust_address
, int adjust_object
,
2230 rtx addr
= XEXP (memref
, 0);
2232 scalar_int_mode address_mode
;
2234 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2235 unsigned HOST_WIDE_INT max_align
;
2236 #ifdef POINTERS_EXTEND_UNSIGNED
2237 scalar_int_mode pointer_mode
2238 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2241 /* VOIDmode means no mode change for change_address_1. */
2242 if (mode
== VOIDmode
)
2243 mode
= GET_MODE (memref
);
2245 /* Take the size of non-BLKmode accesses from the mode. */
2246 defattrs
= mode_mem_attrs
[(int) mode
];
2247 if (defattrs
->size_known_p
)
2248 size
= defattrs
->size
;
2250 /* If there are no changes, just return the original memory reference. */
2251 if (mode
== GET_MODE (memref
) && !offset
2252 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2253 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2257 /* ??? Prefer to create garbage instead of creating shared rtl.
2258 This may happen even if offset is nonzero -- consider
2259 (plus (plus reg reg) const_int) -- so do this always. */
2260 addr
= copy_rtx (addr
);
2262 /* Convert a possibly large offset to a signed value within the
2263 range of the target address space. */
2264 address_mode
= get_address_mode (memref
);
2265 pbits
= GET_MODE_BITSIZE (address_mode
);
2266 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2268 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2269 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2275 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2276 object, we can merge it into the LO_SUM. */
2277 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2279 && (unsigned HOST_WIDE_INT
) offset
2280 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2281 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2282 plus_constant (address_mode
,
2283 XEXP (addr
, 1), offset
));
2284 #ifdef POINTERS_EXTEND_UNSIGNED
2285 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2286 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2287 the fact that pointers are not allowed to overflow. */
2288 else if (POINTERS_EXTEND_UNSIGNED
> 0
2289 && GET_CODE (addr
) == ZERO_EXTEND
2290 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2291 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2292 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2293 plus_constant (pointer_mode
,
2294 XEXP (addr
, 0), offset
));
2297 addr
= plus_constant (address_mode
, addr
, offset
);
2300 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
, false);
2302 /* If the address is a REG, change_address_1 rightfully returns memref,
2303 but this would destroy memref's MEM_ATTRS. */
2304 if (new_rtx
== memref
&& offset
!= 0)
2305 new_rtx
= copy_rtx (new_rtx
);
2307 /* Conservatively drop the object if we don't know where we start from. */
2308 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2310 attrs
.expr
= NULL_TREE
;
2314 /* Compute the new values of the memory attributes due to this adjustment.
2315 We add the offsets and update the alignment. */
2316 if (attrs
.offset_known_p
)
2318 attrs
.offset
+= offset
;
2320 /* Drop the object if the new left end is not within its bounds. */
2321 if (adjust_object
&& attrs
.offset
< 0)
2323 attrs
.expr
= NULL_TREE
;
2328 /* Compute the new alignment by taking the MIN of the alignment and the
2329 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2333 max_align
= least_bit_hwi (offset
) * BITS_PER_UNIT
;
2334 attrs
.align
= MIN (attrs
.align
, max_align
);
2339 /* Drop the object if the new right end is not within its bounds. */
2340 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2342 attrs
.expr
= NULL_TREE
;
2345 attrs
.size_known_p
= true;
2348 else if (attrs
.size_known_p
)
2350 gcc_assert (!adjust_object
);
2351 attrs
.size
-= offset
;
2352 /* ??? The store_by_pieces machinery generates negative sizes,
2353 so don't assert for that here. */
2356 set_mem_attrs (new_rtx
, &attrs
);
2361 /* Return a memory reference like MEMREF, but with its mode changed
2362 to MODE and its address changed to ADDR, which is assumed to be
2363 MEMREF offset by OFFSET bytes. If VALIDATE is
2364 nonzero, the memory address is forced to be valid. */
2367 adjust_automodify_address_1 (rtx memref
, machine_mode mode
, rtx addr
,
2368 HOST_WIDE_INT offset
, int validate
)
2370 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
, false);
2371 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2374 /* Return a memory reference like MEMREF, but whose address is changed by
2375 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2376 known to be in OFFSET (possibly 1). */
2379 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2381 rtx new_rtx
, addr
= XEXP (memref
, 0);
2382 machine_mode address_mode
;
2383 struct mem_attrs attrs
, *defattrs
;
2385 attrs
= *get_mem_attrs (memref
);
2386 address_mode
= get_address_mode (memref
);
2387 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2389 /* At this point we don't know _why_ the address is invalid. It
2390 could have secondary memory references, multiplies or anything.
2392 However, if we did go and rearrange things, we can wind up not
2393 being able to recognize the magic around pic_offset_table_rtx.
2394 This stuff is fragile, and is yet another example of why it is
2395 bad to expose PIC machinery too early. */
2396 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2398 && GET_CODE (addr
) == PLUS
2399 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2401 addr
= force_reg (GET_MODE (addr
), addr
);
2402 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2405 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2406 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1, false);
2408 /* If there are no changes, just return the original memory reference. */
2409 if (new_rtx
== memref
)
2412 /* Update the alignment to reflect the offset. Reset the offset, which
2414 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2415 attrs
.offset_known_p
= false;
2416 attrs
.size_known_p
= defattrs
->size_known_p
;
2417 attrs
.size
= defattrs
->size
;
2418 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2419 set_mem_attrs (new_rtx
, &attrs
);
2423 /* Return a memory reference like MEMREF, but with its address changed to
2424 ADDR. The caller is asserting that the actual piece of memory pointed
2425 to is the same, just the form of the address is being changed, such as
2426 by putting something into a register. INPLACE is true if any changes
2427 can be made directly to MEMREF or false if MEMREF must be treated as
2431 replace_equiv_address (rtx memref
, rtx addr
, bool inplace
)
2433 /* change_address_1 copies the memory attribute structure without change
2434 and that's exactly what we want here. */
2435 update_temp_slot_address (XEXP (memref
, 0), addr
);
2436 return change_address_1 (memref
, VOIDmode
, addr
, 1, inplace
);
2439 /* Likewise, but the reference is not required to be valid. */
2442 replace_equiv_address_nv (rtx memref
, rtx addr
, bool inplace
)
2444 return change_address_1 (memref
, VOIDmode
, addr
, 0, inplace
);
2447 /* Return a memory reference like MEMREF, but with its mode widened to
2448 MODE and offset by OFFSET. This would be used by targets that e.g.
2449 cannot issue QImode memory operations and have to use SImode memory
2450 operations plus masking logic. */
2453 widen_memory_access (rtx memref
, machine_mode mode
, HOST_WIDE_INT offset
)
2455 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2456 struct mem_attrs attrs
;
2457 unsigned int size
= GET_MODE_SIZE (mode
);
2459 /* If there are no changes, just return the original memory reference. */
2460 if (new_rtx
== memref
)
2463 attrs
= *get_mem_attrs (new_rtx
);
2465 /* If we don't know what offset we were at within the expression, then
2466 we can't know if we've overstepped the bounds. */
2467 if (! attrs
.offset_known_p
)
2468 attrs
.expr
= NULL_TREE
;
2472 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2474 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2475 tree offset
= component_ref_field_offset (attrs
.expr
);
2477 if (! DECL_SIZE_UNIT (field
))
2479 attrs
.expr
= NULL_TREE
;
2483 /* Is the field at least as large as the access? If so, ok,
2484 otherwise strip back to the containing structure. */
2485 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2486 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2487 && attrs
.offset
>= 0)
2490 if (! tree_fits_uhwi_p (offset
))
2492 attrs
.expr
= NULL_TREE
;
2496 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2497 attrs
.offset
+= tree_to_uhwi (offset
);
2498 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2501 /* Similarly for the decl. */
2502 else if (DECL_P (attrs
.expr
)
2503 && DECL_SIZE_UNIT (attrs
.expr
)
2504 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2505 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2506 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2510 /* The widened memory access overflows the expression, which means
2511 that it could alias another expression. Zap it. */
2512 attrs
.expr
= NULL_TREE
;
2518 attrs
.offset_known_p
= false;
2520 /* The widened memory may alias other stuff, so zap the alias set. */
2521 /* ??? Maybe use get_alias_set on any remaining expression. */
2523 attrs
.size_known_p
= true;
2525 set_mem_attrs (new_rtx
, &attrs
);
2529 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2530 static GTY(()) tree spill_slot_decl
;
2533 get_spill_slot_decl (bool force_build_p
)
2535 tree d
= spill_slot_decl
;
2537 struct mem_attrs attrs
;
2539 if (d
|| !force_build_p
)
2542 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2543 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2544 DECL_ARTIFICIAL (d
) = 1;
2545 DECL_IGNORED_P (d
) = 1;
2547 spill_slot_decl
= d
;
2549 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2550 MEM_NOTRAP_P (rd
) = 1;
2551 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2552 attrs
.alias
= new_alias_set ();
2554 set_mem_attrs (rd
, &attrs
);
2555 SET_DECL_RTL (d
, rd
);
2560 /* Given MEM, a result from assign_stack_local, fill in the memory
2561 attributes as appropriate for a register allocator spill slot.
2562 These slots are not aliasable by other memory. We arrange for
2563 them all to use a single MEM_EXPR, so that the aliasing code can
2564 work properly in the case of shared spill slots. */
2567 set_mem_attrs_for_spill (rtx mem
)
2569 struct mem_attrs attrs
;
2572 attrs
= *get_mem_attrs (mem
);
2573 attrs
.expr
= get_spill_slot_decl (true);
2574 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2575 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2577 /* We expect the incoming memory to be of the form:
2578 (mem:MODE (plus (reg sfp) (const_int offset)))
2579 with perhaps the plus missing for offset = 0. */
2580 addr
= XEXP (mem
, 0);
2581 attrs
.offset_known_p
= true;
2583 if (GET_CODE (addr
) == PLUS
2584 && CONST_INT_P (XEXP (addr
, 1)))
2585 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2587 set_mem_attrs (mem
, &attrs
);
2588 MEM_NOTRAP_P (mem
) = 1;
2591 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2594 gen_label_rtx (void)
2596 return as_a
<rtx_code_label
*> (
2597 gen_rtx_CODE_LABEL (VOIDmode
, NULL_RTX
, NULL_RTX
,
2598 NULL
, label_num
++, NULL
));
2601 /* For procedure integration. */
2603 /* Install new pointers to the first and last insns in the chain.
2604 Also, set cur_insn_uid to one higher than the last in use.
2605 Used for an inline-procedure after copying the insn chain. */
2608 set_new_first_and_last_insn (rtx_insn
*first
, rtx_insn
*last
)
2612 set_first_insn (first
);
2613 set_last_insn (last
);
2616 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2618 int debug_count
= 0;
2620 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2621 cur_debug_insn_uid
= 0;
2623 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2624 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2625 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2628 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2629 if (DEBUG_INSN_P (insn
))
2634 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2636 cur_debug_insn_uid
++;
2639 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2640 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2645 /* Go through all the RTL insn bodies and copy any invalid shared
2646 structure. This routine should only be called once. */
2649 unshare_all_rtl_1 (rtx_insn
*insn
)
2651 /* Unshare just about everything else. */
2652 unshare_all_rtl_in_chain (insn
);
2654 /* Make sure the addresses of stack slots found outside the insn chain
2655 (such as, in DECL_RTL of a variable) are not shared
2656 with the insn chain.
2658 This special care is necessary when the stack slot MEM does not
2659 actually appear in the insn chain. If it does appear, its address
2660 is unshared from all else at that point. */
2663 FOR_EACH_VEC_SAFE_ELT (stack_slot_list
, i
, temp
)
2664 (*stack_slot_list
)[i
] = copy_rtx_if_shared (temp
);
2667 /* Go through all the RTL insn bodies and copy any invalid shared
2668 structure, again. This is a fairly expensive thing to do so it
2669 should be done sparingly. */
2672 unshare_all_rtl_again (rtx_insn
*insn
)
2677 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2680 reset_used_flags (PATTERN (p
));
2681 reset_used_flags (REG_NOTES (p
));
2683 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2686 /* Make sure that virtual stack slots are not shared. */
2687 set_used_decls (DECL_INITIAL (cfun
->decl
));
2689 /* Make sure that virtual parameters are not shared. */
2690 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2691 set_used_flags (DECL_RTL (decl
));
2695 FOR_EACH_VEC_SAFE_ELT (stack_slot_list
, i
, temp
)
2696 reset_used_flags (temp
);
2698 unshare_all_rtl_1 (insn
);
2702 unshare_all_rtl (void)
2704 unshare_all_rtl_1 (get_insns ());
2706 for (tree decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2708 if (DECL_RTL_SET_P (decl
))
2709 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2710 DECL_INCOMING_RTL (decl
) = copy_rtx_if_shared (DECL_INCOMING_RTL (decl
));
2717 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2718 Recursively does the same for subexpressions. */
2721 verify_rtx_sharing (rtx orig
, rtx insn
)
2726 const char *format_ptr
;
2731 code
= GET_CODE (x
);
2733 /* These types may be freely shared. */
2749 /* SCRATCH must be shared because they represent distinct values. */
2752 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2753 clobbers or clobbers of hard registers that originated as pseudos.
2754 This is needed to allow safe register renaming. */
2755 if (REG_P (XEXP (x
, 0))
2756 && HARD_REGISTER_NUM_P (REGNO (XEXP (x
, 0)))
2757 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x
, 0))))
2762 if (shared_const_p (orig
))
2767 /* A MEM is allowed to be shared if its address is constant. */
2768 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2769 || reload_completed
|| reload_in_progress
)
2778 /* This rtx may not be shared. If it has already been seen,
2779 replace it with a copy of itself. */
2780 if (flag_checking
&& RTX_FLAG (x
, used
))
2782 error ("invalid rtl sharing found in the insn");
2784 error ("shared rtx");
2786 internal_error ("internal consistency failure");
2788 gcc_assert (!RTX_FLAG (x
, used
));
2790 RTX_FLAG (x
, used
) = 1;
2792 /* Now scan the subexpressions recursively. */
2794 format_ptr
= GET_RTX_FORMAT (code
);
2796 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2798 switch (*format_ptr
++)
2801 verify_rtx_sharing (XEXP (x
, i
), insn
);
2805 if (XVEC (x
, i
) != NULL
)
2808 int len
= XVECLEN (x
, i
);
2810 for (j
= 0; j
< len
; j
++)
2812 /* We allow sharing of ASM_OPERANDS inside single
2814 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2815 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2817 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2819 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2828 /* Reset used-flags for INSN. */
2831 reset_insn_used_flags (rtx insn
)
2833 gcc_assert (INSN_P (insn
));
2834 reset_used_flags (PATTERN (insn
));
2835 reset_used_flags (REG_NOTES (insn
));
2837 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2840 /* Go through all the RTL insn bodies and clear all the USED bits. */
2843 reset_all_used_flags (void)
2847 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2850 rtx pat
= PATTERN (p
);
2851 if (GET_CODE (pat
) != SEQUENCE
)
2852 reset_insn_used_flags (p
);
2855 gcc_assert (REG_NOTES (p
) == NULL
);
2856 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2858 rtx insn
= XVECEXP (pat
, 0, i
);
2860 reset_insn_used_flags (insn
);
2866 /* Verify sharing in INSN. */
2869 verify_insn_sharing (rtx insn
)
2871 gcc_assert (INSN_P (insn
));
2872 verify_rtx_sharing (PATTERN (insn
), insn
);
2873 verify_rtx_sharing (REG_NOTES (insn
), insn
);
2875 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (insn
), insn
);
2878 /* Go through all the RTL insn bodies and check that there is no unexpected
2879 sharing in between the subexpressions. */
2882 verify_rtl_sharing (void)
2886 timevar_push (TV_VERIFY_RTL_SHARING
);
2888 reset_all_used_flags ();
2890 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2893 rtx pat
= PATTERN (p
);
2894 if (GET_CODE (pat
) != SEQUENCE
)
2895 verify_insn_sharing (p
);
2897 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2899 rtx insn
= XVECEXP (pat
, 0, i
);
2901 verify_insn_sharing (insn
);
2905 reset_all_used_flags ();
2907 timevar_pop (TV_VERIFY_RTL_SHARING
);
2910 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2911 Assumes the mark bits are cleared at entry. */
2914 unshare_all_rtl_in_chain (rtx_insn
*insn
)
2916 for (; insn
; insn
= NEXT_INSN (insn
))
2919 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2920 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2922 CALL_INSN_FUNCTION_USAGE (insn
)
2923 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2927 /* Go through all virtual stack slots of a function and mark them as
2928 shared. We never replace the DECL_RTLs themselves with a copy,
2929 but expressions mentioned into a DECL_RTL cannot be shared with
2930 expressions in the instruction stream.
2932 Note that reload may convert pseudo registers into memories in-place.
2933 Pseudo registers are always shared, but MEMs never are. Thus if we
2934 reset the used flags on MEMs in the instruction stream, we must set
2935 them again on MEMs that appear in DECL_RTLs. */
2938 set_used_decls (tree blk
)
2943 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2944 if (DECL_RTL_SET_P (t
))
2945 set_used_flags (DECL_RTL (t
));
2947 /* Now process sub-blocks. */
2948 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2952 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2953 Recursively does the same for subexpressions. Uses
2954 copy_rtx_if_shared_1 to reduce stack space. */
2957 copy_rtx_if_shared (rtx orig
)
2959 copy_rtx_if_shared_1 (&orig
);
2963 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2964 use. Recursively does the same for subexpressions. */
2967 copy_rtx_if_shared_1 (rtx
*orig1
)
2973 const char *format_ptr
;
2977 /* Repeat is used to turn tail-recursion into iteration. */
2984 code
= GET_CODE (x
);
2986 /* These types may be freely shared. */
3002 /* SCRATCH must be shared because they represent distinct values. */
3005 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
3006 clobbers or clobbers of hard registers that originated as pseudos.
3007 This is needed to allow safe register renaming. */
3008 if (REG_P (XEXP (x
, 0))
3009 && HARD_REGISTER_NUM_P (REGNO (XEXP (x
, 0)))
3010 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x
, 0))))
3015 if (shared_const_p (x
))
3025 /* The chain of insns is not being copied. */
3032 /* This rtx may not be shared. If it has already been seen,
3033 replace it with a copy of itself. */
3035 if (RTX_FLAG (x
, used
))
3037 x
= shallow_copy_rtx (x
);
3040 RTX_FLAG (x
, used
) = 1;
3042 /* Now scan the subexpressions recursively.
3043 We can store any replaced subexpressions directly into X
3044 since we know X is not shared! Any vectors in X
3045 must be copied if X was copied. */
3047 format_ptr
= GET_RTX_FORMAT (code
);
3048 length
= GET_RTX_LENGTH (code
);
3051 for (i
= 0; i
< length
; i
++)
3053 switch (*format_ptr
++)
3057 copy_rtx_if_shared_1 (last_ptr
);
3058 last_ptr
= &XEXP (x
, i
);
3062 if (XVEC (x
, i
) != NULL
)
3065 int len
= XVECLEN (x
, i
);
3067 /* Copy the vector iff I copied the rtx and the length
3069 if (copied
&& len
> 0)
3070 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
3072 /* Call recursively on all inside the vector. */
3073 for (j
= 0; j
< len
; j
++)
3076 copy_rtx_if_shared_1 (last_ptr
);
3077 last_ptr
= &XVECEXP (x
, i
, j
);
3092 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3095 mark_used_flags (rtx x
, int flag
)
3099 const char *format_ptr
;
3102 /* Repeat is used to turn tail-recursion into iteration. */
3107 code
= GET_CODE (x
);
3109 /* These types may be freely shared so we needn't do any resetting
3133 /* The chain of insns is not being copied. */
3140 RTX_FLAG (x
, used
) = flag
;
3142 format_ptr
= GET_RTX_FORMAT (code
);
3143 length
= GET_RTX_LENGTH (code
);
3145 for (i
= 0; i
< length
; i
++)
3147 switch (*format_ptr
++)
3155 mark_used_flags (XEXP (x
, i
), flag
);
3159 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3160 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3166 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3167 to look for shared sub-parts. */
3170 reset_used_flags (rtx x
)
3172 mark_used_flags (x
, 0);
3175 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3176 to look for shared sub-parts. */
3179 set_used_flags (rtx x
)
3181 mark_used_flags (x
, 1);
3184 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3185 Return X or the rtx for the pseudo reg the value of X was copied into.
3186 OTHER must be valid as a SET_DEST. */
3189 make_safe_from (rtx x
, rtx other
)
3192 switch (GET_CODE (other
))
3195 other
= SUBREG_REG (other
);
3197 case STRICT_LOW_PART
:
3200 other
= XEXP (other
, 0);
3209 && GET_CODE (x
) != SUBREG
)
3211 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3212 || reg_mentioned_p (other
, x
))))
3214 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3215 emit_move_insn (temp
, x
);
3221 /* Emission of insns (adding them to the doubly-linked list). */
3223 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3226 get_last_insn_anywhere (void)
3228 struct sequence_stack
*seq
;
3229 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
3235 /* Return the first nonnote insn emitted in current sequence or current
3236 function. This routine looks inside SEQUENCEs. */
3239 get_first_nonnote_insn (void)
3241 rtx_insn
*insn
= get_insns ();
3246 for (insn
= next_insn (insn
);
3247 insn
&& NOTE_P (insn
);
3248 insn
= next_insn (insn
))
3252 if (NONJUMP_INSN_P (insn
)
3253 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3254 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3261 /* Return the last nonnote insn emitted in current sequence or current
3262 function. This routine looks inside SEQUENCEs. */
3265 get_last_nonnote_insn (void)
3267 rtx_insn
*insn
= get_last_insn ();
3272 for (insn
= previous_insn (insn
);
3273 insn
&& NOTE_P (insn
);
3274 insn
= previous_insn (insn
))
3278 if (NONJUMP_INSN_P (insn
))
3279 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3280 insn
= seq
->insn (seq
->len () - 1);
3287 /* Return the number of actual (non-debug) insns emitted in this
3291 get_max_insn_count (void)
3293 int n
= cur_insn_uid
;
3295 /* The table size must be stable across -g, to avoid codegen
3296 differences due to debug insns, and not be affected by
3297 -fmin-insn-uid, to avoid excessive table size and to simplify
3298 debugging of -fcompare-debug failures. */
3299 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3300 n
-= cur_debug_insn_uid
;
3302 n
-= MIN_NONDEBUG_INSN_UID
;
3308 /* Return the next insn. If it is a SEQUENCE, return the first insn
3312 next_insn (rtx_insn
*insn
)
3316 insn
= NEXT_INSN (insn
);
3317 if (insn
&& NONJUMP_INSN_P (insn
)
3318 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3319 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3325 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3329 previous_insn (rtx_insn
*insn
)
3333 insn
= PREV_INSN (insn
);
3334 if (insn
&& NONJUMP_INSN_P (insn
))
3335 if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
3336 insn
= seq
->insn (seq
->len () - 1);
3342 /* Return the next insn after INSN that is not a NOTE. This routine does not
3343 look inside SEQUENCEs. */
3346 next_nonnote_insn (rtx_insn
*insn
)
3350 insn
= NEXT_INSN (insn
);
3351 if (insn
== 0 || !NOTE_P (insn
))
3358 /* Return the next insn after INSN that is not a NOTE, but stop the
3359 search before we enter another basic block. This routine does not
3360 look inside SEQUENCEs. */
3363 next_nonnote_insn_bb (rtx_insn
*insn
)
3367 insn
= NEXT_INSN (insn
);
3368 if (insn
== 0 || !NOTE_P (insn
))
3370 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3377 /* Return the previous insn before INSN that is not a NOTE. This routine does
3378 not look inside SEQUENCEs. */
3381 prev_nonnote_insn (rtx_insn
*insn
)
3385 insn
= PREV_INSN (insn
);
3386 if (insn
== 0 || !NOTE_P (insn
))
3393 /* Return the previous insn before INSN that is not a NOTE, but stop
3394 the search before we enter another basic block. This routine does
3395 not look inside SEQUENCEs. */
3398 prev_nonnote_insn_bb (rtx_insn
*insn
)
3403 insn
= PREV_INSN (insn
);
3404 if (insn
== 0 || !NOTE_P (insn
))
3406 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3413 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3414 routine does not look inside SEQUENCEs. */
3417 next_nondebug_insn (rtx_insn
*insn
)
3421 insn
= NEXT_INSN (insn
);
3422 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3429 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3430 This routine does not look inside SEQUENCEs. */
3433 prev_nondebug_insn (rtx_insn
*insn
)
3437 insn
= PREV_INSN (insn
);
3438 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3445 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3446 This routine does not look inside SEQUENCEs. */
3449 next_nonnote_nondebug_insn (rtx_insn
*insn
)
3453 insn
= NEXT_INSN (insn
);
3454 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3461 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3462 This routine does not look inside SEQUENCEs. */
3465 prev_nonnote_nondebug_insn (rtx_insn
*insn
)
3469 insn
= PREV_INSN (insn
);
3470 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3477 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3478 or 0, if there is none. This routine does not look inside
3482 next_real_insn (rtx uncast_insn
)
3484 rtx_insn
*insn
= safe_as_a
<rtx_insn
*> (uncast_insn
);
3488 insn
= NEXT_INSN (insn
);
3489 if (insn
== 0 || INSN_P (insn
))
3496 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3497 or 0, if there is none. This routine does not look inside
3501 prev_real_insn (rtx_insn
*insn
)
3505 insn
= PREV_INSN (insn
);
3506 if (insn
== 0 || INSN_P (insn
))
3513 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3514 This routine does not look inside SEQUENCEs. */
3517 last_call_insn (void)
3521 for (insn
= get_last_insn ();
3522 insn
&& !CALL_P (insn
);
3523 insn
= PREV_INSN (insn
))
3526 return safe_as_a
<rtx_call_insn
*> (insn
);
3529 /* Find the next insn after INSN that really does something. This routine
3530 does not look inside SEQUENCEs. After reload this also skips over
3531 standalone USE and CLOBBER insn. */
3534 active_insn_p (const rtx_insn
*insn
)
3536 return (CALL_P (insn
) || JUMP_P (insn
)
3537 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3538 || (NONJUMP_INSN_P (insn
)
3539 && (! reload_completed
3540 || (GET_CODE (PATTERN (insn
)) != USE
3541 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3545 next_active_insn (rtx_insn
*insn
)
3549 insn
= NEXT_INSN (insn
);
3550 if (insn
== 0 || active_insn_p (insn
))
3557 /* Find the last insn before INSN that really does something. This routine
3558 does not look inside SEQUENCEs. After reload this also skips over
3559 standalone USE and CLOBBER insn. */
3562 prev_active_insn (rtx_insn
*insn
)
3566 insn
= PREV_INSN (insn
);
3567 if (insn
== 0 || active_insn_p (insn
))
3574 /* Return the next insn that uses CC0 after INSN, which is assumed to
3575 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3576 applied to the result of this function should yield INSN).
3578 Normally, this is simply the next insn. However, if a REG_CC_USER note
3579 is present, it contains the insn that uses CC0.
3581 Return 0 if we can't find the insn. */
3584 next_cc0_user (rtx_insn
*insn
)
3586 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3589 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3591 insn
= next_nonnote_insn (insn
);
3592 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3593 insn
= as_a
<rtx_sequence
*> (PATTERN (insn
))->insn (0);
3595 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3601 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3602 note, it is the previous insn. */
3605 prev_cc0_setter (rtx_insn
*insn
)
3607 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3610 return safe_as_a
<rtx_insn
*> (XEXP (note
, 0));
3612 insn
= prev_nonnote_insn (insn
);
3613 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3618 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3621 find_auto_inc (const_rtx x
, const_rtx reg
)
3623 subrtx_iterator::array_type array
;
3624 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
3626 const_rtx x
= *iter
;
3627 if (GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
3628 && rtx_equal_p (reg
, XEXP (x
, 0)))
3634 /* Increment the label uses for all labels present in rtx. */
3637 mark_label_nuses (rtx x
)
3643 code
= GET_CODE (x
);
3644 if (code
== LABEL_REF
&& LABEL_P (label_ref_label (x
)))
3645 LABEL_NUSES (label_ref_label (x
))++;
3647 fmt
= GET_RTX_FORMAT (code
);
3648 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3651 mark_label_nuses (XEXP (x
, i
));
3652 else if (fmt
[i
] == 'E')
3653 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3654 mark_label_nuses (XVECEXP (x
, i
, j
));
3659 /* Try splitting insns that can be split for better scheduling.
3660 PAT is the pattern which might split.
3661 TRIAL is the insn providing PAT.
3662 LAST is nonzero if we should return the last insn of the sequence produced.
3664 If this routine succeeds in splitting, it returns the first or last
3665 replacement insn depending on the value of LAST. Otherwise, it
3666 returns TRIAL. If the insn to be returned can be split, it will be. */
3669 try_split (rtx pat
, rtx_insn
*trial
, int last
)
3671 rtx_insn
*before
, *after
;
3673 rtx_insn
*seq
, *tem
;
3674 profile_probability probability
;
3675 rtx_insn
*insn_last
, *insn
;
3677 rtx_insn
*call_insn
= NULL
;
3679 /* We're not good at redistributing frame information. */
3680 if (RTX_FRAME_RELATED_P (trial
))
3683 if (any_condjump_p (trial
)
3684 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3685 split_branch_probability
3686 = profile_probability::from_reg_br_prob_note (XINT (note
, 0));
3688 split_branch_probability
= profile_probability::uninitialized ();
3690 probability
= split_branch_probability
;
3692 seq
= split_insns (pat
, trial
);
3694 split_branch_probability
= profile_probability::uninitialized ();
3699 /* Avoid infinite loop if any insn of the result matches
3700 the original pattern. */
3704 if (INSN_P (insn_last
)
3705 && rtx_equal_p (PATTERN (insn_last
), pat
))
3707 if (!NEXT_INSN (insn_last
))
3709 insn_last
= NEXT_INSN (insn_last
);
3712 /* We will be adding the new sequence to the function. The splitters
3713 may have introduced invalid RTL sharing, so unshare the sequence now. */
3714 unshare_all_rtl_in_chain (seq
);
3716 /* Mark labels and copy flags. */
3717 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3722 CROSSING_JUMP_P (insn
) = CROSSING_JUMP_P (trial
);
3723 mark_jump_label (PATTERN (insn
), insn
, 0);
3725 if (probability
.initialized_p ()
3726 && any_condjump_p (insn
)
3727 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3729 /* We can preserve the REG_BR_PROB notes only if exactly
3730 one jump is created, otherwise the machine description
3731 is responsible for this step using
3732 split_branch_probability variable. */
3733 gcc_assert (njumps
== 1);
3734 add_reg_br_prob_note (insn
, probability
);
3739 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3740 in SEQ and copy any additional information across. */
3743 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3749 gcc_assert (call_insn
== NULL_RTX
);
3752 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3753 target may have explicitly specified. */
3754 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3757 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3759 /* If the old call was a sibling call, the new one must
3761 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3763 /* If the new call is the last instruction in the sequence,
3764 it will effectively replace the old call in-situ. Otherwise
3765 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3766 so that it comes immediately after the new call. */
3767 if (NEXT_INSN (insn
))
3768 for (next
= NEXT_INSN (trial
);
3769 next
&& NOTE_P (next
);
3770 next
= NEXT_INSN (next
))
3771 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3774 add_insn_after (next
, insn
, NULL
);
3780 /* Copy notes, particularly those related to the CFG. */
3781 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3783 switch (REG_NOTE_KIND (note
))
3786 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3792 case REG_CALL_NOCF_CHECK
:
3793 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3796 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3800 case REG_NON_LOCAL_GOTO
:
3801 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3804 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3812 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3814 rtx reg
= XEXP (note
, 0);
3815 if (!FIND_REG_INC_NOTE (insn
, reg
)
3816 && find_auto_inc (PATTERN (insn
), reg
))
3817 add_reg_note (insn
, REG_INC
, reg
);
3822 fixup_args_size_notes (NULL
, insn_last
, INTVAL (XEXP (note
, 0)));
3826 gcc_assert (call_insn
!= NULL_RTX
);
3827 add_reg_note (call_insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3835 /* If there are LABELS inside the split insns increment the
3836 usage count so we don't delete the label. */
3840 while (insn
!= NULL_RTX
)
3842 /* JUMP_P insns have already been "marked" above. */
3843 if (NONJUMP_INSN_P (insn
))
3844 mark_label_nuses (PATTERN (insn
));
3846 insn
= PREV_INSN (insn
);
3850 before
= PREV_INSN (trial
);
3851 after
= NEXT_INSN (trial
);
3853 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3855 delete_insn (trial
);
3857 /* Recursively call try_split for each new insn created; by the
3858 time control returns here that insn will be fully split, so
3859 set LAST and continue from the insn after the one returned.
3860 We can't use next_active_insn here since AFTER may be a note.
3861 Ignore deleted insns, which can be occur if not optimizing. */
3862 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3863 if (! tem
->deleted () && INSN_P (tem
))
3864 tem
= try_split (PATTERN (tem
), tem
, 1);
3866 /* Return either the first or the last insn, depending on which was
3869 ? (after
? PREV_INSN (after
) : get_last_insn ())
3870 : NEXT_INSN (before
);
3873 /* Make and return an INSN rtx, initializing all its slots.
3874 Store PATTERN in the pattern slots. */
3877 make_insn_raw (rtx pattern
)
3881 insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
3883 INSN_UID (insn
) = cur_insn_uid
++;
3884 PATTERN (insn
) = pattern
;
3885 INSN_CODE (insn
) = -1;
3886 REG_NOTES (insn
) = NULL
;
3887 INSN_LOCATION (insn
) = curr_insn_location ();
3888 BLOCK_FOR_INSN (insn
) = NULL
;
3890 #ifdef ENABLE_RTL_CHECKING
3893 && (returnjump_p (insn
)
3894 || (GET_CODE (insn
) == SET
3895 && SET_DEST (insn
) == pc_rtx
)))
3897 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3905 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3908 make_debug_insn_raw (rtx pattern
)
3910 rtx_debug_insn
*insn
;
3912 insn
= as_a
<rtx_debug_insn
*> (rtx_alloc (DEBUG_INSN
));
3913 INSN_UID (insn
) = cur_debug_insn_uid
++;
3914 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3915 INSN_UID (insn
) = cur_insn_uid
++;
3917 PATTERN (insn
) = pattern
;
3918 INSN_CODE (insn
) = -1;
3919 REG_NOTES (insn
) = NULL
;
3920 INSN_LOCATION (insn
) = curr_insn_location ();
3921 BLOCK_FOR_INSN (insn
) = NULL
;
3926 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3929 make_jump_insn_raw (rtx pattern
)
3931 rtx_jump_insn
*insn
;
3933 insn
= as_a
<rtx_jump_insn
*> (rtx_alloc (JUMP_INSN
));
3934 INSN_UID (insn
) = cur_insn_uid
++;
3936 PATTERN (insn
) = pattern
;
3937 INSN_CODE (insn
) = -1;
3938 REG_NOTES (insn
) = NULL
;
3939 JUMP_LABEL (insn
) = NULL
;
3940 INSN_LOCATION (insn
) = curr_insn_location ();
3941 BLOCK_FOR_INSN (insn
) = NULL
;
3946 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3949 make_call_insn_raw (rtx pattern
)
3951 rtx_call_insn
*insn
;
3953 insn
= as_a
<rtx_call_insn
*> (rtx_alloc (CALL_INSN
));
3954 INSN_UID (insn
) = cur_insn_uid
++;
3956 PATTERN (insn
) = pattern
;
3957 INSN_CODE (insn
) = -1;
3958 REG_NOTES (insn
) = NULL
;
3959 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3960 INSN_LOCATION (insn
) = curr_insn_location ();
3961 BLOCK_FOR_INSN (insn
) = NULL
;
3966 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3969 make_note_raw (enum insn_note subtype
)
3971 /* Some notes are never created this way at all. These notes are
3972 only created by patching out insns. */
3973 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3974 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3976 rtx_note
*note
= as_a
<rtx_note
*> (rtx_alloc (NOTE
));
3977 INSN_UID (note
) = cur_insn_uid
++;
3978 NOTE_KIND (note
) = subtype
;
3979 BLOCK_FOR_INSN (note
) = NULL
;
3980 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3984 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3985 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3986 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3989 link_insn_into_chain (rtx_insn
*insn
, rtx_insn
*prev
, rtx_insn
*next
)
3991 SET_PREV_INSN (insn
) = prev
;
3992 SET_NEXT_INSN (insn
) = next
;
3995 SET_NEXT_INSN (prev
) = insn
;
3996 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3998 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
3999 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = insn
;
4004 SET_PREV_INSN (next
) = insn
;
4005 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4007 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
4008 SET_PREV_INSN (sequence
->insn (0)) = insn
;
4012 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
4014 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (insn
));
4015 SET_PREV_INSN (sequence
->insn (0)) = prev
;
4016 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
4020 /* Add INSN to the end of the doubly-linked list.
4021 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4024 add_insn (rtx_insn
*insn
)
4026 rtx_insn
*prev
= get_last_insn ();
4027 link_insn_into_chain (insn
, prev
, NULL
);
4028 if (NULL
== get_insns ())
4029 set_first_insn (insn
);
4030 set_last_insn (insn
);
4033 /* Add INSN into the doubly-linked list after insn AFTER. */
4036 add_insn_after_nobb (rtx_insn
*insn
, rtx_insn
*after
)
4038 rtx_insn
*next
= NEXT_INSN (after
);
4040 gcc_assert (!optimize
|| !after
->deleted ());
4042 link_insn_into_chain (insn
, after
, next
);
4046 struct sequence_stack
*seq
;
4048 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4049 if (after
== seq
->last
)
4057 /* Add INSN into the doubly-linked list before insn BEFORE. */
4060 add_insn_before_nobb (rtx_insn
*insn
, rtx_insn
*before
)
4062 rtx_insn
*prev
= PREV_INSN (before
);
4064 gcc_assert (!optimize
|| !before
->deleted ());
4066 link_insn_into_chain (insn
, prev
, before
);
4070 struct sequence_stack
*seq
;
4072 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4073 if (before
== seq
->first
)
4083 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4084 If BB is NULL, an attempt is made to infer the bb from before.
4086 This and the next function should be the only functions called
4087 to insert an insn once delay slots have been filled since only
4088 they know how to update a SEQUENCE. */
4091 add_insn_after (rtx uncast_insn
, rtx uncast_after
, basic_block bb
)
4093 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4094 rtx_insn
*after
= as_a
<rtx_insn
*> (uncast_after
);
4095 add_insn_after_nobb (insn
, after
);
4096 if (!BARRIER_P (after
)
4097 && !BARRIER_P (insn
)
4098 && (bb
= BLOCK_FOR_INSN (after
)))
4100 set_block_for_insn (insn
, bb
);
4102 df_insn_rescan (insn
);
4103 /* Should not happen as first in the BB is always
4104 either NOTE or LABEL. */
4105 if (BB_END (bb
) == after
4106 /* Avoid clobbering of structure when creating new BB. */
4107 && !BARRIER_P (insn
)
4108 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
4113 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4114 If BB is NULL, an attempt is made to infer the bb from before.
4116 This and the previous function should be the only functions called
4117 to insert an insn once delay slots have been filled since only
4118 they know how to update a SEQUENCE. */
4121 add_insn_before (rtx uncast_insn
, rtx uncast_before
, basic_block bb
)
4123 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4124 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4125 add_insn_before_nobb (insn
, before
);
4128 && !BARRIER_P (before
)
4129 && !BARRIER_P (insn
))
4130 bb
= BLOCK_FOR_INSN (before
);
4134 set_block_for_insn (insn
, bb
);
4136 df_insn_rescan (insn
);
4137 /* Should not happen as first in the BB is always either NOTE or
4139 gcc_assert (BB_HEAD (bb
) != insn
4140 /* Avoid clobbering of structure when creating new BB. */
4142 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4146 /* Replace insn with an deleted instruction note. */
4149 set_insn_deleted (rtx insn
)
4152 df_insn_delete (as_a
<rtx_insn
*> (insn
));
4153 PUT_CODE (insn
, NOTE
);
4154 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4158 /* Unlink INSN from the insn chain.
4160 This function knows how to handle sequences.
4162 This function does not invalidate data flow information associated with
4163 INSN (i.e. does not call df_insn_delete). That makes this function
4164 usable for only disconnecting an insn from the chain, and re-emit it
4167 To later insert INSN elsewhere in the insn chain via add_insn and
4168 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4169 the caller. Nullifying them here breaks many insn chain walks.
4171 To really delete an insn and related DF information, use delete_insn. */
4174 remove_insn (rtx uncast_insn
)
4176 rtx_insn
*insn
= as_a
<rtx_insn
*> (uncast_insn
);
4177 rtx_insn
*next
= NEXT_INSN (insn
);
4178 rtx_insn
*prev
= PREV_INSN (insn
);
4183 SET_NEXT_INSN (prev
) = next
;
4184 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4186 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (prev
));
4187 SET_NEXT_INSN (sequence
->insn (sequence
->len () - 1)) = next
;
4192 struct sequence_stack
*seq
;
4194 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4195 if (insn
== seq
->first
)
4206 SET_PREV_INSN (next
) = prev
;
4207 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4209 rtx_sequence
*sequence
= as_a
<rtx_sequence
*> (PATTERN (next
));
4210 SET_PREV_INSN (sequence
->insn (0)) = prev
;
4215 struct sequence_stack
*seq
;
4217 for (seq
= get_current_sequence (); seq
; seq
= seq
->next
)
4218 if (insn
== seq
->last
)
4227 /* Fix up basic block boundaries, if necessary. */
4228 if (!BARRIER_P (insn
)
4229 && (bb
= BLOCK_FOR_INSN (insn
)))
4231 if (BB_HEAD (bb
) == insn
)
4233 /* Never ever delete the basic block note without deleting whole
4235 gcc_assert (!NOTE_P (insn
));
4236 BB_HEAD (bb
) = next
;
4238 if (BB_END (bb
) == insn
)
4243 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4246 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4248 gcc_assert (call_insn
&& CALL_P (call_insn
));
4250 /* Put the register usage information on the CALL. If there is already
4251 some usage information, put ours at the end. */
4252 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4256 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4257 link
= XEXP (link
, 1))
4260 XEXP (link
, 1) = call_fusage
;
4263 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4266 /* Delete all insns made since FROM.
4267 FROM becomes the new last instruction. */
4270 delete_insns_since (rtx_insn
*from
)
4275 SET_NEXT_INSN (from
) = 0;
4276 set_last_insn (from
);
4279 /* This function is deprecated, please use sequences instead.
4281 Move a consecutive bunch of insns to a different place in the chain.
4282 The insns to be moved are those between FROM and TO.
4283 They are moved to a new position after the insn AFTER.
4284 AFTER must not be FROM or TO or any insn in between.
4286 This function does not know about SEQUENCEs and hence should not be
4287 called after delay-slot filling has been done. */
4290 reorder_insns_nobb (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4294 for (rtx_insn
*x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4295 gcc_assert (after
!= x
);
4296 gcc_assert (after
!= to
);
4299 /* Splice this bunch out of where it is now. */
4300 if (PREV_INSN (from
))
4301 SET_NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4303 SET_PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4304 if (get_last_insn () == to
)
4305 set_last_insn (PREV_INSN (from
));
4306 if (get_insns () == from
)
4307 set_first_insn (NEXT_INSN (to
));
4309 /* Make the new neighbors point to it and it to them. */
4310 if (NEXT_INSN (after
))
4311 SET_PREV_INSN (NEXT_INSN (after
)) = to
;
4313 SET_NEXT_INSN (to
) = NEXT_INSN (after
);
4314 SET_PREV_INSN (from
) = after
;
4315 SET_NEXT_INSN (after
) = from
;
4316 if (after
== get_last_insn ())
4320 /* Same as function above, but take care to update BB boundaries. */
4322 reorder_insns (rtx_insn
*from
, rtx_insn
*to
, rtx_insn
*after
)
4324 rtx_insn
*prev
= PREV_INSN (from
);
4325 basic_block bb
, bb2
;
4327 reorder_insns_nobb (from
, to
, after
);
4329 if (!BARRIER_P (after
)
4330 && (bb
= BLOCK_FOR_INSN (after
)))
4333 df_set_bb_dirty (bb
);
4335 if (!BARRIER_P (from
)
4336 && (bb2
= BLOCK_FOR_INSN (from
)))
4338 if (BB_END (bb2
) == to
)
4339 BB_END (bb2
) = prev
;
4340 df_set_bb_dirty (bb2
);
4343 if (BB_END (bb
) == after
)
4346 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4348 df_insn_change_bb (x
, bb
);
4353 /* Emit insn(s) of given code and pattern
4354 at a specified place within the doubly-linked list.
4356 All of the emit_foo global entry points accept an object
4357 X which is either an insn list or a PATTERN of a single
4360 There are thus a few canonical ways to generate code and
4361 emit it at a specific place in the instruction stream. For
4362 example, consider the instruction named SPOT and the fact that
4363 we would like to emit some instructions before SPOT. We might
4367 ... emit the new instructions ...
4368 insns_head = get_insns ();
4371 emit_insn_before (insns_head, SPOT);
4373 It used to be common to generate SEQUENCE rtl instead, but that
4374 is a relic of the past which no longer occurs. The reason is that
4375 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4376 generated would almost certainly die right after it was created. */
4379 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4380 rtx_insn
*(*make_raw
) (rtx
))
4384 gcc_assert (before
);
4387 return safe_as_a
<rtx_insn
*> (last
);
4389 switch (GET_CODE (x
))
4398 insn
= as_a
<rtx_insn
*> (x
);
4401 rtx_insn
*next
= NEXT_INSN (insn
);
4402 add_insn_before (insn
, before
, bb
);
4408 #ifdef ENABLE_RTL_CHECKING
4415 last
= (*make_raw
) (x
);
4416 add_insn_before (last
, before
, bb
);
4420 return safe_as_a
<rtx_insn
*> (last
);
4423 /* Make X be output before the instruction BEFORE. */
4426 emit_insn_before_noloc (rtx x
, rtx_insn
*before
, basic_block bb
)
4428 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4431 /* Make an instruction with body X and code JUMP_INSN
4432 and output it before the instruction BEFORE. */
4435 emit_jump_insn_before_noloc (rtx x
, rtx_insn
*before
)
4437 return as_a
<rtx_jump_insn
*> (
4438 emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4439 make_jump_insn_raw
));
4442 /* Make an instruction with body X and code CALL_INSN
4443 and output it before the instruction BEFORE. */
4446 emit_call_insn_before_noloc (rtx x
, rtx_insn
*before
)
4448 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4449 make_call_insn_raw
);
4452 /* Make an instruction with body X and code DEBUG_INSN
4453 and output it before the instruction BEFORE. */
4456 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4458 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4459 make_debug_insn_raw
);
4462 /* Make an insn of code BARRIER
4463 and output it before the insn BEFORE. */
4466 emit_barrier_before (rtx before
)
4468 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4470 INSN_UID (insn
) = cur_insn_uid
++;
4472 add_insn_before (insn
, before
, NULL
);
4476 /* Emit the label LABEL before the insn BEFORE. */
4479 emit_label_before (rtx label
, rtx_insn
*before
)
4481 gcc_checking_assert (INSN_UID (label
) == 0);
4482 INSN_UID (label
) = cur_insn_uid
++;
4483 add_insn_before (label
, before
, NULL
);
4484 return as_a
<rtx_code_label
*> (label
);
4487 /* Helper for emit_insn_after, handles lists of instructions
4491 emit_insn_after_1 (rtx_insn
*first
, rtx uncast_after
, basic_block bb
)
4493 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4495 rtx_insn
*after_after
;
4496 if (!bb
&& !BARRIER_P (after
))
4497 bb
= BLOCK_FOR_INSN (after
);
4501 df_set_bb_dirty (bb
);
4502 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4503 if (!BARRIER_P (last
))
4505 set_block_for_insn (last
, bb
);
4506 df_insn_rescan (last
);
4508 if (!BARRIER_P (last
))
4510 set_block_for_insn (last
, bb
);
4511 df_insn_rescan (last
);
4513 if (BB_END (bb
) == after
)
4517 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4520 after_after
= NEXT_INSN (after
);
4522 SET_NEXT_INSN (after
) = first
;
4523 SET_PREV_INSN (first
) = after
;
4524 SET_NEXT_INSN (last
) = after_after
;
4526 SET_PREV_INSN (after_after
) = last
;
4528 if (after
== get_last_insn ())
4529 set_last_insn (last
);
4535 emit_pattern_after_noloc (rtx x
, rtx uncast_after
, basic_block bb
,
4536 rtx_insn
*(*make_raw
)(rtx
))
4538 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4539 rtx_insn
*last
= after
;
4546 switch (GET_CODE (x
))
4555 last
= emit_insn_after_1 (as_a
<rtx_insn
*> (x
), after
, bb
);
4558 #ifdef ENABLE_RTL_CHECKING
4565 last
= (*make_raw
) (x
);
4566 add_insn_after (last
, after
, bb
);
4573 /* Make X be output after the insn AFTER and set the BB of insn. If
4574 BB is NULL, an attempt is made to infer the BB from AFTER. */
4577 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4579 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4583 /* Make an insn of code JUMP_INSN with body X
4584 and output it after the insn AFTER. */
4587 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4589 return as_a
<rtx_jump_insn
*> (
4590 emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
));
4593 /* Make an instruction with body X and code CALL_INSN
4594 and output it after the instruction AFTER. */
4597 emit_call_insn_after_noloc (rtx x
, rtx after
)
4599 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4602 /* Make an instruction with body X and code CALL_INSN
4603 and output it after the instruction AFTER. */
4606 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4608 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4611 /* Make an insn of code BARRIER
4612 and output it after the insn AFTER. */
4615 emit_barrier_after (rtx after
)
4617 rtx_barrier
*insn
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
4619 INSN_UID (insn
) = cur_insn_uid
++;
4621 add_insn_after (insn
, after
, NULL
);
4625 /* Emit the label LABEL after the insn AFTER. */
4628 emit_label_after (rtx label
, rtx_insn
*after
)
4630 gcc_checking_assert (INSN_UID (label
) == 0);
4631 INSN_UID (label
) = cur_insn_uid
++;
4632 add_insn_after (label
, after
, NULL
);
4633 return as_a
<rtx_insn
*> (label
);
4636 /* Notes require a bit of special handling: Some notes need to have their
4637 BLOCK_FOR_INSN set, others should never have it set, and some should
4638 have it set or clear depending on the context. */
4640 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4641 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4642 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4645 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4649 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4650 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4653 /* Notes for var tracking and EH region markers can appear between or
4654 inside basic blocks. If the caller is emitting on the basic block
4655 boundary, do not set BLOCK_FOR_INSN on the new note. */
4656 case NOTE_INSN_VAR_LOCATION
:
4657 case NOTE_INSN_CALL_ARG_LOCATION
:
4658 case NOTE_INSN_EH_REGION_BEG
:
4659 case NOTE_INSN_EH_REGION_END
:
4660 return on_bb_boundary_p
;
4662 /* Otherwise, BLOCK_FOR_INSN must be set. */
4668 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4671 emit_note_after (enum insn_note subtype
, rtx_insn
*after
)
4673 rtx_note
*note
= make_note_raw (subtype
);
4674 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4675 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4677 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4678 add_insn_after_nobb (note
, after
);
4680 add_insn_after (note
, after
, bb
);
4684 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4687 emit_note_before (enum insn_note subtype
, rtx_insn
*before
)
4689 rtx_note
*note
= make_note_raw (subtype
);
4690 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4691 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4693 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4694 add_insn_before_nobb (note
, before
);
4696 add_insn_before (note
, before
, bb
);
4700 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4701 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4704 emit_pattern_after_setloc (rtx pattern
, rtx uncast_after
, int loc
,
4705 rtx_insn
*(*make_raw
) (rtx
))
4707 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4708 rtx_insn
*last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4710 if (pattern
== NULL_RTX
|| !loc
)
4713 after
= NEXT_INSN (after
);
4716 if (active_insn_p (after
)
4717 && !JUMP_TABLE_DATA_P (after
) /* FIXME */
4718 && !INSN_LOCATION (after
))
4719 INSN_LOCATION (after
) = loc
;
4722 after
= NEXT_INSN (after
);
4727 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4728 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4732 emit_pattern_after (rtx pattern
, rtx uncast_after
, bool skip_debug_insns
,
4733 rtx_insn
*(*make_raw
) (rtx
))
4735 rtx_insn
*after
= safe_as_a
<rtx_insn
*> (uncast_after
);
4736 rtx_insn
*prev
= after
;
4738 if (skip_debug_insns
)
4739 while (DEBUG_INSN_P (prev
))
4740 prev
= PREV_INSN (prev
);
4743 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4746 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4749 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4751 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4753 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4756 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4758 emit_insn_after (rtx pattern
, rtx after
)
4760 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4763 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4765 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4767 return as_a
<rtx_jump_insn
*> (
4768 emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
));
4771 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4773 emit_jump_insn_after (rtx pattern
, rtx after
)
4775 return as_a
<rtx_jump_insn
*> (
4776 emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
));
4779 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4781 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4783 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4786 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4788 emit_call_insn_after (rtx pattern
, rtx after
)
4790 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4793 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4795 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4797 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4800 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4802 emit_debug_insn_after (rtx pattern
, rtx after
)
4804 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4807 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4808 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4809 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4813 emit_pattern_before_setloc (rtx pattern
, rtx uncast_before
, int loc
, bool insnp
,
4814 rtx_insn
*(*make_raw
) (rtx
))
4816 rtx_insn
*before
= as_a
<rtx_insn
*> (uncast_before
);
4817 rtx_insn
*first
= PREV_INSN (before
);
4818 rtx_insn
*last
= emit_pattern_before_noloc (pattern
, before
,
4819 insnp
? before
: NULL_RTX
,
4822 if (pattern
== NULL_RTX
|| !loc
)
4826 first
= get_insns ();
4828 first
= NEXT_INSN (first
);
4831 if (active_insn_p (first
)
4832 && !JUMP_TABLE_DATA_P (first
) /* FIXME */
4833 && !INSN_LOCATION (first
))
4834 INSN_LOCATION (first
) = loc
;
4837 first
= NEXT_INSN (first
);
4842 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4843 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4844 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4845 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4848 emit_pattern_before (rtx pattern
, rtx uncast_before
, bool skip_debug_insns
,
4849 bool insnp
, rtx_insn
*(*make_raw
) (rtx
))
4851 rtx_insn
*before
= safe_as_a
<rtx_insn
*> (uncast_before
);
4852 rtx_insn
*next
= before
;
4854 if (skip_debug_insns
)
4855 while (DEBUG_INSN_P (next
))
4856 next
= PREV_INSN (next
);
4859 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4862 return emit_pattern_before_noloc (pattern
, before
,
4863 insnp
? before
: NULL_RTX
,
4867 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4869 emit_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4871 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4875 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4877 emit_insn_before (rtx pattern
, rtx before
)
4879 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4882 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4884 emit_jump_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4886 return as_a
<rtx_jump_insn
*> (
4887 emit_pattern_before_setloc (pattern
, before
, loc
, false,
4888 make_jump_insn_raw
));
4891 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4893 emit_jump_insn_before (rtx pattern
, rtx before
)
4895 return as_a
<rtx_jump_insn
*> (
4896 emit_pattern_before (pattern
, before
, true, false,
4897 make_jump_insn_raw
));
4900 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4902 emit_call_insn_before_setloc (rtx pattern
, rtx_insn
*before
, int loc
)
4904 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4905 make_call_insn_raw
);
4908 /* Like emit_call_insn_before_noloc,
4909 but set insn_location according to BEFORE. */
4911 emit_call_insn_before (rtx pattern
, rtx_insn
*before
)
4913 return emit_pattern_before (pattern
, before
, true, false,
4914 make_call_insn_raw
);
4917 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4919 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4921 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4922 make_debug_insn_raw
);
4925 /* Like emit_debug_insn_before_noloc,
4926 but set insn_location according to BEFORE. */
4928 emit_debug_insn_before (rtx pattern
, rtx_insn
*before
)
4930 return emit_pattern_before (pattern
, before
, false, false,
4931 make_debug_insn_raw
);
4934 /* Take X and emit it at the end of the doubly-linked
4937 Returns the last insn emitted. */
4942 rtx_insn
*last
= get_last_insn ();
4948 switch (GET_CODE (x
))
4957 insn
= as_a
<rtx_insn
*> (x
);
4960 rtx_insn
*next
= NEXT_INSN (insn
);
4967 #ifdef ENABLE_RTL_CHECKING
4968 case JUMP_TABLE_DATA
:
4975 last
= make_insn_raw (x
);
4983 /* Make an insn of code DEBUG_INSN with pattern X
4984 and add it to the end of the doubly-linked list. */
4987 emit_debug_insn (rtx x
)
4989 rtx_insn
*last
= get_last_insn ();
4995 switch (GET_CODE (x
))
5004 insn
= as_a
<rtx_insn
*> (x
);
5007 rtx_insn
*next
= NEXT_INSN (insn
);
5014 #ifdef ENABLE_RTL_CHECKING
5015 case JUMP_TABLE_DATA
:
5022 last
= make_debug_insn_raw (x
);
5030 /* Make an insn of code JUMP_INSN with pattern X
5031 and add it to the end of the doubly-linked list. */
5034 emit_jump_insn (rtx x
)
5036 rtx_insn
*last
= NULL
;
5039 switch (GET_CODE (x
))
5048 insn
= as_a
<rtx_insn
*> (x
);
5051 rtx_insn
*next
= NEXT_INSN (insn
);
5058 #ifdef ENABLE_RTL_CHECKING
5059 case JUMP_TABLE_DATA
:
5066 last
= make_jump_insn_raw (x
);
5074 /* Make an insn of code CALL_INSN with pattern X
5075 and add it to the end of the doubly-linked list. */
5078 emit_call_insn (rtx x
)
5082 switch (GET_CODE (x
))
5091 insn
= emit_insn (x
);
5094 #ifdef ENABLE_RTL_CHECKING
5096 case JUMP_TABLE_DATA
:
5102 insn
= make_call_insn_raw (x
);
5110 /* Add the label LABEL to the end of the doubly-linked list. */
5113 emit_label (rtx uncast_label
)
5115 rtx_code_label
*label
= as_a
<rtx_code_label
*> (uncast_label
);
5117 gcc_checking_assert (INSN_UID (label
) == 0);
5118 INSN_UID (label
) = cur_insn_uid
++;
5123 /* Make an insn of code JUMP_TABLE_DATA
5124 and add it to the end of the doubly-linked list. */
5126 rtx_jump_table_data
*
5127 emit_jump_table_data (rtx table
)
5129 rtx_jump_table_data
*jump_table_data
=
5130 as_a
<rtx_jump_table_data
*> (rtx_alloc (JUMP_TABLE_DATA
));
5131 INSN_UID (jump_table_data
) = cur_insn_uid
++;
5132 PATTERN (jump_table_data
) = table
;
5133 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
5134 add_insn (jump_table_data
);
5135 return jump_table_data
;
5138 /* Make an insn of code BARRIER
5139 and add it to the end of the doubly-linked list. */
5144 rtx_barrier
*barrier
= as_a
<rtx_barrier
*> (rtx_alloc (BARRIER
));
5145 INSN_UID (barrier
) = cur_insn_uid
++;
5150 /* Emit a copy of note ORIG. */
5153 emit_note_copy (rtx_note
*orig
)
5155 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5156 rtx_note
*note
= make_note_raw (kind
);
5157 NOTE_DATA (note
) = NOTE_DATA (orig
);
5162 /* Make an insn of code NOTE or type NOTE_NO
5163 and add it to the end of the doubly-linked list. */
5166 emit_note (enum insn_note kind
)
5168 rtx_note
*note
= make_note_raw (kind
);
5173 /* Emit a clobber of lvalue X. */
5176 emit_clobber (rtx x
)
5178 /* CONCATs should not appear in the insn stream. */
5179 if (GET_CODE (x
) == CONCAT
)
5181 emit_clobber (XEXP (x
, 0));
5182 return emit_clobber (XEXP (x
, 1));
5184 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5187 /* Return a sequence of insns to clobber lvalue X. */
5201 /* Emit a use of rvalue X. */
5206 /* CONCATs should not appear in the insn stream. */
5207 if (GET_CODE (x
) == CONCAT
)
5209 emit_use (XEXP (x
, 0));
5210 return emit_use (XEXP (x
, 1));
5212 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5215 /* Return a sequence of insns to use rvalue X. */
5229 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5230 Return the set in INSN that such notes describe, or NULL if the notes
5231 have no meaning for INSN. */
5234 set_for_reg_notes (rtx insn
)
5241 pat
= PATTERN (insn
);
5242 if (GET_CODE (pat
) == PARALLEL
)
5244 /* We do not use single_set because that ignores SETs of unused
5245 registers. REG_EQUAL and REG_EQUIV notes really do require the
5246 PARALLEL to have a single SET. */
5247 if (multiple_sets (insn
))
5249 pat
= XVECEXP (pat
, 0, 0);
5252 if (GET_CODE (pat
) != SET
)
5255 reg
= SET_DEST (pat
);
5257 /* Notes apply to the contents of a STRICT_LOW_PART. */
5258 if (GET_CODE (reg
) == STRICT_LOW_PART
5259 || GET_CODE (reg
) == ZERO_EXTRACT
)
5260 reg
= XEXP (reg
, 0);
5262 /* Check that we have a register. */
5263 if (!(REG_P (reg
) || GET_CODE (reg
) == SUBREG
))
5269 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5270 note of this type already exists, remove it first. */
5273 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5275 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5281 /* We need to support the REG_EQUAL on USE trick of find_reloads. */
5282 if (!set_for_reg_notes (insn
) && GET_CODE (PATTERN (insn
)) != USE
)
5285 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5286 It serves no useful purpose and breaks eliminate_regs. */
5287 if (GET_CODE (datum
) == ASM_OPERANDS
)
5290 /* Notes with side effects are dangerous. Even if the side-effect
5291 initially mirrors one in PATTERN (INSN), later optimizations
5292 might alter the way that the final register value is calculated
5293 and so move or alter the side-effect in some way. The note would
5294 then no longer be a valid substitution for SET_SRC. */
5295 if (side_effects_p (datum
))
5304 XEXP (note
, 0) = datum
;
5307 add_reg_note (insn
, kind
, datum
);
5308 note
= REG_NOTES (insn
);
5315 df_notes_rescan (as_a
<rtx_insn
*> (insn
));
5324 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5326 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5328 rtx set
= set_for_reg_notes (insn
);
5330 if (set
&& SET_DEST (set
) == dst
)
5331 return set_unique_reg_note (insn
, kind
, datum
);
5335 /* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
5336 following barrier if the instruction needs one and if ALLOW_BARRIER_P
5339 If X is a label, it is simply added into the insn chain. */
5342 emit (rtx x
, bool allow_barrier_p
)
5344 enum rtx_code code
= classify_insn (x
);
5349 return emit_label (x
);
5351 return emit_insn (x
);
5354 rtx_insn
*insn
= emit_jump_insn (x
);
5356 && (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
))
5357 return emit_barrier ();
5361 return emit_call_insn (x
);
5363 return emit_debug_insn (x
);
5369 /* Space for free sequence stack entries. */
5370 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5372 /* Begin emitting insns to a sequence. If this sequence will contain
5373 something that might cause the compiler to pop arguments to function
5374 calls (because those pops have previously been deferred; see
5375 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5376 before calling this function. That will ensure that the deferred
5377 pops are not accidentally emitted in the middle of this sequence. */
5380 start_sequence (void)
5382 struct sequence_stack
*tem
;
5384 if (free_sequence_stack
!= NULL
)
5386 tem
= free_sequence_stack
;
5387 free_sequence_stack
= tem
->next
;
5390 tem
= ggc_alloc
<sequence_stack
> ();
5392 tem
->next
= get_current_sequence ()->next
;
5393 tem
->first
= get_insns ();
5394 tem
->last
= get_last_insn ();
5395 get_current_sequence ()->next
= tem
;
5401 /* Set up the insn chain starting with FIRST as the current sequence,
5402 saving the previously current one. See the documentation for
5403 start_sequence for more information about how to use this function. */
5406 push_to_sequence (rtx_insn
*first
)
5412 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5415 set_first_insn (first
);
5416 set_last_insn (last
);
5419 /* Like push_to_sequence, but take the last insn as an argument to avoid
5420 looping through the list. */
5423 push_to_sequence2 (rtx_insn
*first
, rtx_insn
*last
)
5427 set_first_insn (first
);
5428 set_last_insn (last
);
5431 /* Set up the outer-level insn chain
5432 as the current sequence, saving the previously current one. */
5435 push_topmost_sequence (void)
5437 struct sequence_stack
*top
;
5441 top
= get_topmost_sequence ();
5442 set_first_insn (top
->first
);
5443 set_last_insn (top
->last
);
5446 /* After emitting to the outer-level insn chain, update the outer-level
5447 insn chain, and restore the previous saved state. */
5450 pop_topmost_sequence (void)
5452 struct sequence_stack
*top
;
5454 top
= get_topmost_sequence ();
5455 top
->first
= get_insns ();
5456 top
->last
= get_last_insn ();
5461 /* After emitting to a sequence, restore previous saved state.
5463 To get the contents of the sequence just made, you must call
5464 `get_insns' *before* calling here.
5466 If the compiler might have deferred popping arguments while
5467 generating this sequence, and this sequence will not be immediately
5468 inserted into the instruction stream, use do_pending_stack_adjust
5469 before calling get_insns. That will ensure that the deferred
5470 pops are inserted into this sequence, and not into some random
5471 location in the instruction stream. See INHIBIT_DEFER_POP for more
5472 information about deferred popping of arguments. */
5477 struct sequence_stack
*tem
= get_current_sequence ()->next
;
5479 set_first_insn (tem
->first
);
5480 set_last_insn (tem
->last
);
5481 get_current_sequence ()->next
= tem
->next
;
5483 memset (tem
, 0, sizeof (*tem
));
5484 tem
->next
= free_sequence_stack
;
5485 free_sequence_stack
= tem
;
5488 /* Return 1 if currently emitting into a sequence. */
5491 in_sequence_p (void)
5493 return get_current_sequence ()->next
!= 0;
5496 /* Put the various virtual registers into REGNO_REG_RTX. */
5499 init_virtual_regs (void)
5501 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5502 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5503 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5504 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5505 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5506 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5507 = virtual_preferred_stack_boundary_rtx
;
5511 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5512 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5513 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5514 static int copy_insn_n_scratches
;
5516 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5517 copied an ASM_OPERANDS.
5518 In that case, it is the original input-operand vector. */
5519 static rtvec orig_asm_operands_vector
;
5521 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5522 copied an ASM_OPERANDS.
5523 In that case, it is the copied input-operand vector. */
5524 static rtvec copy_asm_operands_vector
;
5526 /* Likewise for the constraints vector. */
5527 static rtvec orig_asm_constraints_vector
;
5528 static rtvec copy_asm_constraints_vector
;
5530 /* Recursively create a new copy of an rtx for copy_insn.
5531 This function differs from copy_rtx in that it handles SCRATCHes and
5532 ASM_OPERANDs properly.
5533 Normally, this function is not used directly; use copy_insn as front end.
5534 However, you could first copy an insn pattern with copy_insn and then use
5535 this function afterwards to properly copy any REG_NOTEs containing
5539 copy_insn_1 (rtx orig
)
5544 const char *format_ptr
;
5549 code
= GET_CODE (orig
);
5564 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5565 clobbers or clobbers of hard registers that originated as pseudos.
5566 This is needed to allow safe register renaming. */
5567 if (REG_P (XEXP (orig
, 0))
5568 && HARD_REGISTER_NUM_P (REGNO (XEXP (orig
, 0)))
5569 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (orig
, 0))))
5574 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5575 if (copy_insn_scratch_in
[i
] == orig
)
5576 return copy_insn_scratch_out
[i
];
5580 if (shared_const_p (orig
))
5584 /* A MEM with a constant address is not sharable. The problem is that
5585 the constant address may need to be reloaded. If the mem is shared,
5586 then reloading one copy of this mem will cause all copies to appear
5587 to have been reloaded. */
5593 /* Copy the various flags, fields, and other information. We assume
5594 that all fields need copying, and then clear the fields that should
5595 not be copied. That is the sensible default behavior, and forces
5596 us to explicitly document why we are *not* copying a flag. */
5597 copy
= shallow_copy_rtx (orig
);
5599 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5602 RTX_FLAG (copy
, jump
) = 0;
5603 RTX_FLAG (copy
, call
) = 0;
5604 RTX_FLAG (copy
, frame_related
) = 0;
5607 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5609 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5610 switch (*format_ptr
++)
5613 if (XEXP (orig
, i
) != NULL
)
5614 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5619 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5620 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5621 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5622 XVEC (copy
, i
) = copy_asm_operands_vector
;
5623 else if (XVEC (orig
, i
) != NULL
)
5625 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5626 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5627 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5638 /* These are left unchanged. */
5645 if (code
== SCRATCH
)
5647 i
= copy_insn_n_scratches
++;
5648 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5649 copy_insn_scratch_in
[i
] = orig
;
5650 copy_insn_scratch_out
[i
] = copy
;
5652 else if (code
== ASM_OPERANDS
)
5654 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5655 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5656 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5657 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5663 /* Create a new copy of an rtx.
5664 This function differs from copy_rtx in that it handles SCRATCHes and
5665 ASM_OPERANDs properly.
5666 INSN doesn't really have to be a full INSN; it could be just the
5669 copy_insn (rtx insn
)
5671 copy_insn_n_scratches
= 0;
5672 orig_asm_operands_vector
= 0;
5673 orig_asm_constraints_vector
= 0;
5674 copy_asm_operands_vector
= 0;
5675 copy_asm_constraints_vector
= 0;
5676 return copy_insn_1 (insn
);
5679 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5680 on that assumption that INSN itself remains in its original place. */
5683 copy_delay_slot_insn (rtx_insn
*insn
)
5685 /* Copy INSN with its rtx_code, all its notes, location etc. */
5686 insn
= as_a
<rtx_insn
*> (copy_rtx (insn
));
5687 INSN_UID (insn
) = cur_insn_uid
++;
5691 /* Initialize data structures and variables in this file
5692 before generating rtl for each function. */
5697 set_first_insn (NULL
);
5698 set_last_insn (NULL
);
5699 if (MIN_NONDEBUG_INSN_UID
)
5700 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5703 cur_debug_insn_uid
= 1;
5704 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5705 first_label_num
= label_num
;
5706 get_current_sequence ()->next
= NULL
;
5708 /* Init the tables that describe all the pseudo regs. */
5710 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5712 crtl
->emit
.regno_pointer_align
5713 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5716 = ggc_cleared_vec_alloc
<rtx
> (crtl
->emit
.regno_pointer_align_length
);
5718 /* Put copies of all the hard registers into regno_reg_rtx. */
5719 memcpy (regno_reg_rtx
,
5720 initial_regno_reg_rtx
,
5721 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5723 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5724 init_virtual_regs ();
5726 /* Indicate that the virtual registers and stack locations are
5728 REG_POINTER (stack_pointer_rtx
) = 1;
5729 REG_POINTER (frame_pointer_rtx
) = 1;
5730 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5731 REG_POINTER (arg_pointer_rtx
) = 1;
5733 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5734 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5735 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5736 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5737 REG_POINTER (virtual_cfa_rtx
) = 1;
5739 #ifdef STACK_BOUNDARY
5740 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5741 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5742 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5743 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5745 /* ??? These are problematic (for example, 3 out of 4 are wrong on
5746 32-bit SPARC and cannot be all fixed because of the ABI). */
5747 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5748 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5749 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5750 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5752 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5755 #ifdef INIT_EXPANDERS
5760 /* Like gen_const_vec_duplicate, but ignore const_tiny_rtx. */
5763 gen_const_vec_duplicate_1 (machine_mode mode
, rtx el
)
5765 int nunits
= GET_MODE_NUNITS (mode
);
5766 rtvec v
= rtvec_alloc (nunits
);
5767 for (int i
= 0; i
< nunits
; ++i
)
5768 RTVEC_ELT (v
, i
) = el
;
5769 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5772 /* Generate a vector constant of mode MODE in which every element has
5776 gen_const_vec_duplicate (machine_mode mode
, rtx elt
)
5778 scalar_mode inner_mode
= GET_MODE_INNER (mode
);
5779 if (elt
== CONST0_RTX (inner_mode
))
5780 return CONST0_RTX (mode
);
5781 else if (elt
== CONST1_RTX (inner_mode
))
5782 return CONST1_RTX (mode
);
5783 else if (elt
== CONSTM1_RTX (inner_mode
))
5784 return CONSTM1_RTX (mode
);
5786 return gen_const_vec_duplicate_1 (mode
, elt
);
5789 /* Return a vector rtx of mode MODE in which every element has value X.
5790 The result will be a constant if X is constant. */
5793 gen_vec_duplicate (machine_mode mode
, rtx x
)
5796 return gen_const_vec_duplicate (mode
, x
);
5797 return gen_rtx_VEC_DUPLICATE (mode
, x
);
5800 /* Generate a new vector constant for mode MODE and constant value
5804 gen_const_vector (machine_mode mode
, int constant
)
5806 machine_mode inner
= GET_MODE_INNER (mode
);
5808 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5810 rtx el
= const_tiny_rtx
[constant
][(int) inner
];
5813 return gen_const_vec_duplicate_1 (mode
, el
);
5816 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5817 all elements are zero, and the one vector when all elements are one. */
5819 gen_rtx_CONST_VECTOR (machine_mode mode
, rtvec v
)
5821 gcc_assert (GET_MODE_NUNITS (mode
) == GET_NUM_ELEM (v
));
5823 /* If the values are all the same, check to see if we can use one of the
5824 standard constant vectors. */
5825 if (rtvec_all_equal_p (v
))
5826 return gen_const_vec_duplicate (mode
, RTVEC_ELT (v
, 0));
5828 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5831 /* Initialise global register information required by all functions. */
5834 init_emit_regs (void)
5840 /* Reset register attributes */
5841 reg_attrs_htab
->empty ();
5843 /* We need reg_raw_mode, so initialize the modes now. */
5844 init_reg_modes_target ();
5846 /* Assign register numbers to the globally defined register rtx. */
5847 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5848 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5849 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5850 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5851 virtual_incoming_args_rtx
=
5852 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5853 virtual_stack_vars_rtx
=
5854 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5855 virtual_stack_dynamic_rtx
=
5856 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5857 virtual_outgoing_args_rtx
=
5858 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5859 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5860 virtual_preferred_stack_boundary_rtx
=
5861 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5863 /* Initialize RTL for commonly used hard registers. These are
5864 copied into regno_reg_rtx as we begin to compile each function. */
5865 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5866 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5868 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5869 return_address_pointer_rtx
5870 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5873 pic_offset_table_rtx
= NULL_RTX
;
5874 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5875 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5877 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5879 mode
= (machine_mode
) i
;
5880 attrs
= ggc_cleared_alloc
<mem_attrs
> ();
5881 attrs
->align
= BITS_PER_UNIT
;
5882 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5883 if (mode
!= BLKmode
)
5885 attrs
->size_known_p
= true;
5886 attrs
->size
= GET_MODE_SIZE (mode
);
5887 if (STRICT_ALIGNMENT
)
5888 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5890 mode_mem_attrs
[i
] = attrs
;
5894 /* Initialize global machine_mode variables. */
5897 init_derived_machine_modes (void)
5899 opt_scalar_int_mode mode_iter
, opt_byte_mode
, opt_word_mode
;
5900 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
5902 scalar_int_mode mode
= mode_iter
.require ();
5904 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5905 && !opt_byte_mode
.exists ())
5906 opt_byte_mode
= mode
;
5908 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5909 && !opt_word_mode
.exists ())
5910 opt_word_mode
= mode
;
5913 byte_mode
= opt_byte_mode
.require ();
5914 word_mode
= opt_word_mode
.require ();
5915 ptr_mode
= int_mode_for_size (POINTER_SIZE
, 0).require ();
5918 /* Create some permanent unique rtl objects shared between all functions. */
5921 init_emit_once (void)
5925 scalar_float_mode double_mode
;
5926 opt_scalar_mode smode_iter
;
5928 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5929 CONST_FIXED, and memory attribute hash tables. */
5930 const_int_htab
= hash_table
<const_int_hasher
>::create_ggc (37);
5932 #if TARGET_SUPPORTS_WIDE_INT
5933 const_wide_int_htab
= hash_table
<const_wide_int_hasher
>::create_ggc (37);
5935 const_double_htab
= hash_table
<const_double_hasher
>::create_ggc (37);
5937 const_fixed_htab
= hash_table
<const_fixed_hasher
>::create_ggc (37);
5939 reg_attrs_htab
= hash_table
<reg_attr_hasher
>::create_ggc (37);
5941 #ifdef INIT_EXPANDERS
5942 /* This is to initialize {init|mark|free}_machine_status before the first
5943 call to push_function_context_to. This is needed by the Chill front
5944 end which calls push_function_context_to before the first call to
5945 init_function_start. */
5949 /* Create the unique rtx's for certain rtx codes and operand values. */
5951 /* Process stack-limiting command-line options. */
5952 if (opt_fstack_limit_symbol_arg
!= NULL
)
5954 = gen_rtx_SYMBOL_REF (Pmode
, ggc_strdup (opt_fstack_limit_symbol_arg
));
5955 if (opt_fstack_limit_register_no
>= 0)
5956 stack_limit_rtx
= gen_rtx_REG (Pmode
, opt_fstack_limit_register_no
);
5958 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5959 tries to use these variables. */
5960 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5961 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5962 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5964 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5965 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5966 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5968 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5970 double_mode
= float_mode_for_size (DOUBLE_TYPE_SIZE
).require ();
5972 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5973 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5974 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5979 dconsthalf
= dconst1
;
5980 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5982 for (i
= 0; i
< 3; i
++)
5984 const REAL_VALUE_TYPE
*const r
=
5985 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5987 FOR_EACH_MODE_IN_CLASS (mode
, MODE_FLOAT
)
5988 const_tiny_rtx
[i
][(int) mode
] =
5989 const_double_from_real_value (*r
, mode
);
5991 FOR_EACH_MODE_IN_CLASS (mode
, MODE_DECIMAL_FLOAT
)
5992 const_tiny_rtx
[i
][(int) mode
] =
5993 const_double_from_real_value (*r
, mode
);
5995 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5997 FOR_EACH_MODE_IN_CLASS (mode
, MODE_INT
)
5998 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
6000 for (mode
= MIN_MODE_PARTIAL_INT
;
6001 mode
<= MAX_MODE_PARTIAL_INT
;
6002 mode
= (machine_mode
)((int)(mode
) + 1))
6003 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
6006 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
6008 FOR_EACH_MODE_IN_CLASS (mode
, MODE_INT
)
6009 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
6011 for (mode
= MIN_MODE_PARTIAL_INT
;
6012 mode
<= MAX_MODE_PARTIAL_INT
;
6013 mode
= (machine_mode
)((int)(mode
) + 1))
6014 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
6016 FOR_EACH_MODE_IN_CLASS (mode
, MODE_COMPLEX_INT
)
6018 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6019 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6022 FOR_EACH_MODE_IN_CLASS (mode
, MODE_COMPLEX_FLOAT
)
6024 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
6025 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
6028 FOR_EACH_MODE_IN_CLASS (mode
, MODE_VECTOR_INT
)
6030 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6031 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6032 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
6035 FOR_EACH_MODE_IN_CLASS (mode
, MODE_VECTOR_FLOAT
)
6037 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6038 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6041 FOR_EACH_MODE_IN_CLASS (smode_iter
, MODE_FRACT
)
6043 scalar_mode smode
= smode_iter
.require ();
6044 FCONST0 (smode
).data
.high
= 0;
6045 FCONST0 (smode
).data
.low
= 0;
6046 FCONST0 (smode
).mode
= smode
;
6047 const_tiny_rtx
[0][(int) smode
]
6048 = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode
), smode
);
6051 FOR_EACH_MODE_IN_CLASS (smode_iter
, MODE_UFRACT
)
6053 scalar_mode smode
= smode_iter
.require ();
6054 FCONST0 (smode
).data
.high
= 0;
6055 FCONST0 (smode
).data
.low
= 0;
6056 FCONST0 (smode
).mode
= smode
;
6057 const_tiny_rtx
[0][(int) smode
]
6058 = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode
), smode
);
6061 FOR_EACH_MODE_IN_CLASS (smode_iter
, MODE_ACCUM
)
6063 scalar_mode smode
= smode_iter
.require ();
6064 FCONST0 (smode
).data
.high
= 0;
6065 FCONST0 (smode
).data
.low
= 0;
6066 FCONST0 (smode
).mode
= smode
;
6067 const_tiny_rtx
[0][(int) smode
]
6068 = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode
), smode
);
6070 /* We store the value 1. */
6071 FCONST1 (smode
).data
.high
= 0;
6072 FCONST1 (smode
).data
.low
= 0;
6073 FCONST1 (smode
).mode
= smode
;
6074 FCONST1 (smode
).data
6075 = double_int_one
.lshift (GET_MODE_FBIT (smode
),
6076 HOST_BITS_PER_DOUBLE_INT
,
6077 SIGNED_FIXED_POINT_MODE_P (smode
));
6078 const_tiny_rtx
[1][(int) smode
]
6079 = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode
), smode
);
6082 FOR_EACH_MODE_IN_CLASS (smode_iter
, MODE_UACCUM
)
6084 scalar_mode smode
= smode_iter
.require ();
6085 FCONST0 (smode
).data
.high
= 0;
6086 FCONST0 (smode
).data
.low
= 0;
6087 FCONST0 (smode
).mode
= smode
;
6088 const_tiny_rtx
[0][(int) smode
]
6089 = CONST_FIXED_FROM_FIXED_VALUE (FCONST0 (smode
), smode
);
6091 /* We store the value 1. */
6092 FCONST1 (smode
).data
.high
= 0;
6093 FCONST1 (smode
).data
.low
= 0;
6094 FCONST1 (smode
).mode
= smode
;
6095 FCONST1 (smode
).data
6096 = double_int_one
.lshift (GET_MODE_FBIT (smode
),
6097 HOST_BITS_PER_DOUBLE_INT
,
6098 SIGNED_FIXED_POINT_MODE_P (smode
));
6099 const_tiny_rtx
[1][(int) smode
]
6100 = CONST_FIXED_FROM_FIXED_VALUE (FCONST1 (smode
), smode
);
6103 FOR_EACH_MODE_IN_CLASS (mode
, MODE_VECTOR_FRACT
)
6105 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6108 FOR_EACH_MODE_IN_CLASS (mode
, MODE_VECTOR_UFRACT
)
6110 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6113 FOR_EACH_MODE_IN_CLASS (mode
, MODE_VECTOR_ACCUM
)
6115 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6116 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6119 FOR_EACH_MODE_IN_CLASS (mode
, MODE_VECTOR_UACCUM
)
6121 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6122 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6125 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6126 if (GET_MODE_CLASS ((machine_mode
) i
) == MODE_CC
)
6127 const_tiny_rtx
[0][i
] = const0_rtx
;
6129 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6130 if (STORE_FLAG_VALUE
== 1)
6131 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6133 FOR_EACH_MODE_IN_CLASS (smode_iter
, MODE_POINTER_BOUNDS
)
6135 scalar_mode smode
= smode_iter
.require ();
6136 wide_int wi_zero
= wi::zero (GET_MODE_PRECISION (smode
));
6137 const_tiny_rtx
[0][smode
] = immed_wide_int_const (wi_zero
, smode
);
6140 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6141 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6142 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6143 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6144 invalid_insn_rtx
= gen_rtx_INSN (VOIDmode
,
6148 /*pattern=*/NULL_RTX
,
6151 /*reg_notes=*/NULL_RTX
);
6154 /* Produce exact duplicate of insn INSN after AFTER.
6155 Care updating of libcall regions if present. */
6158 emit_copy_of_insn_after (rtx_insn
*insn
, rtx_insn
*after
)
6163 switch (GET_CODE (insn
))
6166 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6170 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6171 CROSSING_JUMP_P (new_rtx
) = CROSSING_JUMP_P (insn
);
6175 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6179 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6180 if (CALL_INSN_FUNCTION_USAGE (insn
))
6181 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6182 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6183 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6184 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6185 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6186 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6187 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6194 /* Update LABEL_NUSES. */
6195 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6197 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6199 /* If the old insn is frame related, then so is the new one. This is
6200 primarily needed for IA-64 unwind info which marks epilogue insns,
6201 which may be duplicated by the basic block reordering code. */
6202 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6204 /* Locate the end of existing REG_NOTES in NEW_RTX. */
6205 rtx
*ptail
= ®_NOTES (new_rtx
);
6206 while (*ptail
!= NULL_RTX
)
6207 ptail
= &XEXP (*ptail
, 1);
6209 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6210 will make them. REG_LABEL_TARGETs are created there too, but are
6211 supposed to be sticky, so we copy them. */
6212 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6213 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6215 *ptail
= duplicate_reg_note (link
);
6216 ptail
= &XEXP (*ptail
, 1);
6219 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6223 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6225 gen_hard_reg_clobber (machine_mode mode
, unsigned int regno
)
6227 if (hard_reg_clobbers
[mode
][regno
])
6228 return hard_reg_clobbers
[mode
][regno
];
6230 return (hard_reg_clobbers
[mode
][regno
] =
6231 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6234 location_t prologue_location
;
6235 location_t epilogue_location
;
6237 /* Hold current location information and last location information, so the
6238 datastructures are built lazily only when some instructions in given
6239 place are needed. */
6240 static location_t curr_location
;
6242 /* Allocate insn location datastructure. */
6244 insn_locations_init (void)
6246 prologue_location
= epilogue_location
= 0;
6247 curr_location
= UNKNOWN_LOCATION
;
6250 /* At the end of emit stage, clear current location. */
6252 insn_locations_finalize (void)
6254 epilogue_location
= curr_location
;
6255 curr_location
= UNKNOWN_LOCATION
;
6258 /* Set current location. */
6260 set_curr_insn_location (location_t location
)
6262 curr_location
= location
;
6265 /* Get current location. */
6267 curr_insn_location (void)
6269 return curr_location
;
6272 /* Return lexical scope block insn belongs to. */
6274 insn_scope (const rtx_insn
*insn
)
6276 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6279 /* Return line number of the statement that produced this insn. */
6281 insn_line (const rtx_insn
*insn
)
6283 return LOCATION_LINE (INSN_LOCATION (insn
));
6286 /* Return source file of the statement that produced this insn. */
6288 insn_file (const rtx_insn
*insn
)
6290 return LOCATION_FILE (INSN_LOCATION (insn
));
6293 /* Return expanded location of the statement that produced this insn. */
6295 insn_location (const rtx_insn
*insn
)
6297 return expand_location (INSN_LOCATION (insn
));
6300 /* Return true if memory model MODEL requires a pre-operation (release-style)
6301 barrier or a post-operation (acquire-style) barrier. While not universal,
6302 this function matches behavior of several targets. */
6305 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6307 switch (model
& MEMMODEL_BASE_MASK
)
6309 case MEMMODEL_RELAXED
:
6310 case MEMMODEL_CONSUME
:
6312 case MEMMODEL_RELEASE
:
6314 case MEMMODEL_ACQUIRE
:
6316 case MEMMODEL_ACQ_REL
:
6317 case MEMMODEL_SEQ_CST
:
6324 /* Initialize fields of rtl_data related to stack alignment. */
6327 rtl_data::init_stack_alignment ()
6329 stack_alignment_needed
= STACK_BOUNDARY
;
6330 max_used_stack_slot_alignment
= STACK_BOUNDARY
;
6331 stack_alignment_estimated
= 0;
6332 preferred_stack_boundary
= STACK_BOUNDARY
;
6336 #include "gt-emit-rtl.h"