1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
36 #include "coretypes.h"
38 #include "diagnostic-core.h"
42 #include "basic-block.h"
47 #include "stringpool.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "langhooks.h"
61 struct target_rtl default_target_rtl
;
63 struct target_rtl
*this_target_rtl
= &default_target_rtl
;
66 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
68 /* Commonly used modes. */
70 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
71 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
72 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
73 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
75 /* Datastructures maintained for currently processed function in RTL form. */
77 struct rtl_data x_rtl
;
79 /* Indexed by pseudo register number, gives the rtx for that pseudo.
80 Allocated in parallel with regno_pointer_align.
81 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
82 with length attribute nested in top level structures. */
86 /* This is *not* reset after each function. It gives each CODE_LABEL
87 in the entire compilation a unique label number. */
89 static GTY(()) int label_num
= 1;
91 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
92 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
93 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
94 is set only for MODE_INT and MODE_VECTOR_INT modes. */
96 rtx const_tiny_rtx
[4][(int) MAX_MACHINE_MODE
];
100 REAL_VALUE_TYPE dconst0
;
101 REAL_VALUE_TYPE dconst1
;
102 REAL_VALUE_TYPE dconst2
;
103 REAL_VALUE_TYPE dconstm1
;
104 REAL_VALUE_TYPE dconsthalf
;
106 /* Record fixed-point constant 0 and 1. */
107 FIXED_VALUE_TYPE fconst0
[MAX_FCONST0
];
108 FIXED_VALUE_TYPE fconst1
[MAX_FCONST1
];
110 /* We make one copy of (const_int C) where C is in
111 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
112 to save space during the compilation and simplify comparisons of
115 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
117 /* Standard pieces of rtx, to be substituted directly into things. */
120 rtx simple_return_rtx
;
123 /* A hash table storing CONST_INTs whose absolute value is greater
124 than MAX_SAVED_CONST_INT. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
127 htab_t const_int_htab
;
129 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
130 htab_t const_wide_int_htab
;
132 /* A hash table storing memory attribute structures. */
133 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
134 htab_t mem_attrs_htab
;
136 /* A hash table storing register attribute structures. */
137 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
138 htab_t reg_attrs_htab
;
140 /* A hash table storing all CONST_DOUBLEs. */
141 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
142 htab_t const_double_htab
;
144 /* A hash table storing all CONST_FIXEDs. */
145 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
146 htab_t const_fixed_htab
;
148 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
149 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
150 #define first_label_num (crtl->emit.x_first_label_num)
152 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
153 static void set_used_decls (tree
);
154 static void mark_label_nuses (rtx
);
155 static hashval_t
const_int_htab_hash (const void *);
156 static int const_int_htab_eq (const void *, const void *);
157 #if TARGET_SUPPORTS_WIDE_INT
158 static hashval_t
const_wide_int_htab_hash (const void *);
159 static int const_wide_int_htab_eq (const void *, const void *);
160 static rtx
lookup_const_wide_int (rtx
);
162 static hashval_t
const_double_htab_hash (const void *);
163 static int const_double_htab_eq (const void *, const void *);
164 static rtx
lookup_const_double (rtx
);
165 static hashval_t
const_fixed_htab_hash (const void *);
166 static int const_fixed_htab_eq (const void *, const void *);
167 static rtx
lookup_const_fixed (rtx
);
168 static hashval_t
mem_attrs_htab_hash (const void *);
169 static int mem_attrs_htab_eq (const void *, const void *);
170 static hashval_t
reg_attrs_htab_hash (const void *);
171 static int reg_attrs_htab_eq (const void *, const void *);
172 static reg_attrs
*get_reg_attrs (tree
, int);
173 static rtx
gen_const_vector (enum machine_mode
, int);
174 static void copy_rtx_if_shared_1 (rtx
*orig
);
176 /* Probability of the conditional branch currently proceeded by try_split.
177 Set to -1 otherwise. */
178 int split_branch_probability
= -1;
180 /* Returns a hash code for X (which is a really a CONST_INT). */
183 const_int_htab_hash (const void *x
)
185 return (hashval_t
) INTVAL ((const_rtx
) x
);
188 /* Returns nonzero if the value represented by X (which is really a
189 CONST_INT) is the same as that given by Y (which is really a
193 const_int_htab_eq (const void *x
, const void *y
)
195 return (INTVAL ((const_rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
198 #if TARGET_SUPPORTS_WIDE_INT
199 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
202 const_wide_int_htab_hash (const void *x
)
205 HOST_WIDE_INT hash
= 0;
206 const_rtx xr
= (const_rtx
) x
;
208 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
209 hash
+= CONST_WIDE_INT_ELT (xr
, i
);
211 return (hashval_t
) hash
;
214 /* Returns nonzero if the value represented by X (which is really a
215 CONST_WIDE_INT) is the same as that given by Y (which is really a
219 const_wide_int_htab_eq (const void *x
, const void *y
)
222 const_rtx xr
= (const_rtx
)x
;
223 const_rtx yr
= (const_rtx
)y
;
224 if (CONST_WIDE_INT_NUNITS (xr
) != CONST_WIDE_INT_NUNITS (yr
))
227 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (xr
); i
++)
228 if (CONST_WIDE_INT_ELT (xr
, i
) != CONST_WIDE_INT_ELT (yr
, i
))
235 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
237 const_double_htab_hash (const void *x
)
239 const_rtx
const value
= (const_rtx
) x
;
242 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (value
) == VOIDmode
)
243 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
246 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
247 /* MODE is used in the comparison, so it should be in the hash. */
248 h
^= GET_MODE (value
);
253 /* Returns nonzero if the value represented by X (really a ...)
254 is the same as that represented by Y (really a ...) */
256 const_double_htab_eq (const void *x
, const void *y
)
258 const_rtx
const a
= (const_rtx
)x
, b
= (const_rtx
)y
;
260 if (GET_MODE (a
) != GET_MODE (b
))
262 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (a
) == VOIDmode
)
263 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
264 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
266 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
267 CONST_DOUBLE_REAL_VALUE (b
));
270 /* Returns a hash code for X (which is really a CONST_FIXED). */
273 const_fixed_htab_hash (const void *x
)
275 const_rtx
const value
= (const_rtx
) x
;
278 h
= fixed_hash (CONST_FIXED_VALUE (value
));
279 /* MODE is used in the comparison, so it should be in the hash. */
280 h
^= GET_MODE (value
);
284 /* Returns nonzero if the value represented by X (really a ...)
285 is the same as that represented by Y (really a ...). */
288 const_fixed_htab_eq (const void *x
, const void *y
)
290 const_rtx
const a
= (const_rtx
) x
, b
= (const_rtx
) y
;
292 if (GET_MODE (a
) != GET_MODE (b
))
294 return fixed_identical (CONST_FIXED_VALUE (a
), CONST_FIXED_VALUE (b
));
297 /* Returns a hash code for X (which is a really a mem_attrs *). */
300 mem_attrs_htab_hash (const void *x
)
302 const mem_attrs
*const p
= (const mem_attrs
*) x
;
304 return (p
->alias
^ (p
->align
* 1000)
305 ^ (p
->addrspace
* 4000)
306 ^ ((p
->offset_known_p
? p
->offset
: 0) * 50000)
307 ^ ((p
->size_known_p
? p
->size
: 0) * 2500000)
308 ^ (size_t) iterative_hash_expr (p
->expr
, 0));
311 /* Return true if the given memory attributes are equal. */
314 mem_attrs_eq_p (const struct mem_attrs
*p
, const struct mem_attrs
*q
)
316 return (p
->alias
== q
->alias
317 && p
->offset_known_p
== q
->offset_known_p
318 && (!p
->offset_known_p
|| p
->offset
== q
->offset
)
319 && p
->size_known_p
== q
->size_known_p
320 && (!p
->size_known_p
|| p
->size
== q
->size
)
321 && p
->align
== q
->align
322 && p
->addrspace
== q
->addrspace
323 && (p
->expr
== q
->expr
324 || (p
->expr
!= NULL_TREE
&& q
->expr
!= NULL_TREE
325 && operand_equal_p (p
->expr
, q
->expr
, 0))));
328 /* Returns nonzero if the value represented by X (which is really a
329 mem_attrs *) is the same as that given by Y (which is also really a
333 mem_attrs_htab_eq (const void *x
, const void *y
)
335 return mem_attrs_eq_p ((const mem_attrs
*) x
, (const mem_attrs
*) y
);
338 /* Set MEM's memory attributes so that they are the same as ATTRS. */
341 set_mem_attrs (rtx mem
, mem_attrs
*attrs
)
345 /* If everything is the default, we can just clear the attributes. */
346 if (mem_attrs_eq_p (attrs
, mode_mem_attrs
[(int) GET_MODE (mem
)]))
352 slot
= htab_find_slot (mem_attrs_htab
, attrs
, INSERT
);
355 *slot
= ggc_alloc_mem_attrs ();
356 memcpy (*slot
, attrs
, sizeof (mem_attrs
));
359 MEM_ATTRS (mem
) = (mem_attrs
*) *slot
;
362 /* Returns a hash code for X (which is a really a reg_attrs *). */
365 reg_attrs_htab_hash (const void *x
)
367 const reg_attrs
*const p
= (const reg_attrs
*) x
;
369 return ((p
->offset
* 1000) ^ (intptr_t) p
->decl
);
372 /* Returns nonzero if the value represented by X (which is really a
373 reg_attrs *) is the same as that given by Y (which is also really a
377 reg_attrs_htab_eq (const void *x
, const void *y
)
379 const reg_attrs
*const p
= (const reg_attrs
*) x
;
380 const reg_attrs
*const q
= (const reg_attrs
*) y
;
382 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
384 /* Allocate a new reg_attrs structure and insert it into the hash table if
385 one identical to it is not already in the table. We are doing this for
389 get_reg_attrs (tree decl
, int offset
)
394 /* If everything is the default, we can just return zero. */
395 if (decl
== 0 && offset
== 0)
399 attrs
.offset
= offset
;
401 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
404 *slot
= ggc_alloc_reg_attrs ();
405 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
408 return (reg_attrs
*) *slot
;
413 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
414 and to block register equivalences to be seen across this insn. */
419 rtx x
= gen_rtx_ASM_INPUT (VOIDmode
, "");
420 MEM_VOLATILE_P (x
) = true;
426 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
427 don't attempt to share with the various global pieces of rtl (such as
428 frame_pointer_rtx). */
431 gen_raw_REG (enum machine_mode mode
, int regno
)
433 rtx x
= gen_rtx_raw_REG (mode
, regno
);
434 ORIGINAL_REGNO (x
) = regno
;
438 /* There are some RTL codes that require special attention; the generation
439 functions do the raw handling. If you add to this list, modify
440 special_rtx in gengenrtl.c as well. */
443 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
447 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
448 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
450 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
451 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
452 return const_true_rtx
;
455 /* Look up the CONST_INT in the hash table. */
456 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
457 (hashval_t
) arg
, INSERT
);
459 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
465 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
467 return GEN_INT (trunc_int_for_mode (c
, mode
));
470 /* CONST_DOUBLEs might be created from pairs of integers, or from
471 REAL_VALUE_TYPEs. Also, their length is known only at run time,
472 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
474 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
475 hash table. If so, return its counterpart; otherwise add it
476 to the hash table and return it. */
478 lookup_const_double (rtx real
)
480 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
487 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
488 VALUE in mode MODE. */
490 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
492 rtx real
= rtx_alloc (CONST_DOUBLE
);
493 PUT_MODE (real
, mode
);
497 return lookup_const_double (real
);
500 /* Determine whether FIXED, a CONST_FIXED, already exists in the
501 hash table. If so, return its counterpart; otherwise add it
502 to the hash table and return it. */
505 lookup_const_fixed (rtx fixed
)
507 void **slot
= htab_find_slot (const_fixed_htab
, fixed
, INSERT
);
514 /* Return a CONST_FIXED rtx for a fixed-point value specified by
515 VALUE in mode MODE. */
518 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value
, enum machine_mode mode
)
520 rtx fixed
= rtx_alloc (CONST_FIXED
);
521 PUT_MODE (fixed
, mode
);
525 return lookup_const_fixed (fixed
);
528 #if TARGET_SUPPORTS_WIDE_INT == 0
529 /* Constructs double_int from rtx CST. */
532 rtx_to_double_int (const_rtx cst
)
536 if (CONST_INT_P (cst
))
537 r
= double_int::from_shwi (INTVAL (cst
));
538 else if (CONST_DOUBLE_AS_INT_P (cst
))
540 r
.low
= CONST_DOUBLE_LOW (cst
);
541 r
.high
= CONST_DOUBLE_HIGH (cst
);
550 #if TARGET_SUPPORTS_WIDE_INT
551 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
552 If so, return its counterpart; otherwise add it to the hash table and
556 lookup_const_wide_int (rtx wint
)
558 void **slot
= htab_find_slot (const_wide_int_htab
, wint
, INSERT
);
566 /* Return an rtx constant for V, given that the constant has mode MODE.
567 The returned rtx will be a CONST_INT if V fits, otherwise it will be
568 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
569 (if TARGET_SUPPORTS_WIDE_INT). */
572 immed_wide_int_const (const wide_int
&v
, enum machine_mode mode
)
574 unsigned int len
= v
.get_len ();
575 unsigned int prec
= GET_MODE_PRECISION (mode
);
577 /* Allow truncation but not extension since we do not know if the
578 number is signed or unsigned. */
579 gcc_assert (prec
<= v
.get_precision ());
581 if (len
< 2 || prec
<= HOST_BITS_PER_WIDE_INT
)
582 return gen_int_mode (v
.elt (0), mode
);
584 #if TARGET_SUPPORTS_WIDE_INT
588 unsigned int blocks_needed
589 = (prec
+ HOST_BITS_PER_WIDE_INT
- 1) / HOST_BITS_PER_WIDE_INT
;
591 if (len
> blocks_needed
)
594 value
= const_wide_int_alloc (len
);
596 /* It is so tempting to just put the mode in here. Must control
598 PUT_MODE (value
, VOIDmode
);
599 CWI_PUT_NUM_ELEM (value
, len
);
601 for (i
= 0; i
< len
; i
++)
602 CONST_WIDE_INT_ELT (value
, i
) = v
.elt (i
);
604 return lookup_const_wide_int (value
);
607 return immed_double_const (v
.elt (0), v
.elt (1), mode
);
611 #if TARGET_SUPPORTS_WIDE_INT == 0
612 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
613 of ints: I0 is the low-order word and I1 is the high-order word.
614 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
615 implied upper bits are copies of the high bit of i1. The value
616 itself is neither signed nor unsigned. Do not use this routine for
617 non-integer modes; convert to REAL_VALUE_TYPE and use
618 CONST_DOUBLE_FROM_REAL_VALUE. */
621 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
626 /* There are the following cases (note that there are no modes with
627 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
629 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
631 2) If the value of the integer fits into HOST_WIDE_INT anyway
632 (i.e., i1 consists only from copies of the sign bit, and sign
633 of i0 and i1 are the same), then we return a CONST_INT for i0.
634 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
635 if (mode
!= VOIDmode
)
637 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
638 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
639 /* We can get a 0 for an error mark. */
640 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
641 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
643 if (GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
644 return gen_int_mode (i0
, mode
);
647 /* If this integer fits in one word, return a CONST_INT. */
648 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
651 /* We use VOIDmode for integers. */
652 value
= rtx_alloc (CONST_DOUBLE
);
653 PUT_MODE (value
, VOIDmode
);
655 CONST_DOUBLE_LOW (value
) = i0
;
656 CONST_DOUBLE_HIGH (value
) = i1
;
658 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
659 XWINT (value
, i
) = 0;
661 return lookup_const_double (value
);
666 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
668 /* In case the MD file explicitly references the frame pointer, have
669 all such references point to the same frame pointer. This is
670 used during frame pointer elimination to distinguish the explicit
671 references to these registers from pseudos that happened to be
674 If we have eliminated the frame pointer or arg pointer, we will
675 be using it as a normal register, for example as a spill
676 register. In such cases, we might be accessing it in a mode that
677 is not Pmode and therefore cannot use the pre-allocated rtx.
679 Also don't do this when we are making new REGs in reload, since
680 we don't want to get confused with the real pointers. */
682 if (mode
== Pmode
&& !reload_in_progress
&& !lra_in_progress
)
684 if (regno
== FRAME_POINTER_REGNUM
685 && (!reload_completed
|| frame_pointer_needed
))
686 return frame_pointer_rtx
;
687 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
688 if (regno
== HARD_FRAME_POINTER_REGNUM
689 && (!reload_completed
|| frame_pointer_needed
))
690 return hard_frame_pointer_rtx
;
692 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
693 if (regno
== ARG_POINTER_REGNUM
)
694 return arg_pointer_rtx
;
696 #ifdef RETURN_ADDRESS_POINTER_REGNUM
697 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
698 return return_address_pointer_rtx
;
700 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
701 && PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
702 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
703 return pic_offset_table_rtx
;
704 if (regno
== STACK_POINTER_REGNUM
)
705 return stack_pointer_rtx
;
709 /* If the per-function register table has been set up, try to re-use
710 an existing entry in that table to avoid useless generation of RTL.
712 This code is disabled for now until we can fix the various backends
713 which depend on having non-shared hard registers in some cases. Long
714 term we want to re-enable this code as it can significantly cut down
715 on the amount of useless RTL that gets generated.
717 We'll also need to fix some code that runs after reload that wants to
718 set ORIGINAL_REGNO. */
723 && regno
< FIRST_PSEUDO_REGISTER
724 && reg_raw_mode
[regno
] == mode
)
725 return regno_reg_rtx
[regno
];
728 return gen_raw_REG (mode
, regno
);
732 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
734 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
736 /* This field is not cleared by the mere allocation of the rtx, so
743 /* Generate a memory referring to non-trapping constant memory. */
746 gen_const_mem (enum machine_mode mode
, rtx addr
)
748 rtx mem
= gen_rtx_MEM (mode
, addr
);
749 MEM_READONLY_P (mem
) = 1;
750 MEM_NOTRAP_P (mem
) = 1;
754 /* Generate a MEM referring to fixed portions of the frame, e.g., register
758 gen_frame_mem (enum machine_mode mode
, rtx addr
)
760 rtx mem
= gen_rtx_MEM (mode
, addr
);
761 MEM_NOTRAP_P (mem
) = 1;
762 set_mem_alias_set (mem
, get_frame_alias_set ());
766 /* Generate a MEM referring to a temporary use of the stack, not part
767 of the fixed stack frame. For example, something which is pushed
768 by a target splitter. */
770 gen_tmp_stack_mem (enum machine_mode mode
, rtx addr
)
772 rtx mem
= gen_rtx_MEM (mode
, addr
);
773 MEM_NOTRAP_P (mem
) = 1;
774 if (!cfun
->calls_alloca
)
775 set_mem_alias_set (mem
, get_frame_alias_set ());
779 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
780 this construct would be valid, and false otherwise. */
783 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
784 const_rtx reg
, unsigned int offset
)
786 unsigned int isize
= GET_MODE_SIZE (imode
);
787 unsigned int osize
= GET_MODE_SIZE (omode
);
789 /* All subregs must be aligned. */
790 if (offset
% osize
!= 0)
793 /* The subreg offset cannot be outside the inner object. */
797 /* ??? This should not be here. Temporarily continue to allow word_mode
798 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
799 Generally, backends are doing something sketchy but it'll take time to
801 if (omode
== word_mode
)
803 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
804 is the culprit here, and not the backends. */
805 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
807 /* Allow component subregs of complex and vector. Though given the below
808 extraction rules, it's not always clear what that means. */
809 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
810 && GET_MODE_INNER (imode
) == omode
)
812 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
813 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
814 represent this. It's questionable if this ought to be represented at
815 all -- why can't this all be hidden in post-reload splitters that make
816 arbitrarily mode changes to the registers themselves. */
817 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
819 /* Subregs involving floating point modes are not allowed to
820 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
821 (subreg:SI (reg:DF) 0) isn't. */
822 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
824 if (! (isize
== osize
825 /* LRA can use subreg to store a floating point value in
826 an integer mode. Although the floating point and the
827 integer modes need the same number of hard registers,
828 the size of floating point mode can be less than the
829 integer mode. LRA also uses subregs for a register
830 should be used in different mode in on insn. */
835 /* Paradoxical subregs must have offset zero. */
839 /* This is a normal subreg. Verify that the offset is representable. */
841 /* For hard registers, we already have most of these rules collected in
842 subreg_offset_representable_p. */
843 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
845 unsigned int regno
= REGNO (reg
);
847 #ifdef CANNOT_CHANGE_MODE_CLASS
848 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
849 && GET_MODE_INNER (imode
) == omode
)
851 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
855 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
858 /* For pseudo registers, we want most of the same checks. Namely:
859 If the register no larger than a word, the subreg must be lowpart.
860 If the register is larger than a word, the subreg must be the lowpart
861 of a subword. A subreg does *not* perform arbitrary bit extraction.
862 Given that we've already checked mode/offset alignment, we only have
863 to check subword subregs here. */
864 if (osize
< UNITS_PER_WORD
865 && ! (lra_in_progress
&& (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))))
867 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
868 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
869 if (offset
% UNITS_PER_WORD
!= low_off
)
876 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
878 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
879 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
882 /* Generate a SUBREG representing the least-significant part of REG if MODE
883 is smaller than mode of REG, otherwise paradoxical SUBREG. */
886 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
888 enum machine_mode inmode
;
890 inmode
= GET_MODE (reg
);
891 if (inmode
== VOIDmode
)
893 return gen_rtx_SUBREG (mode
, reg
,
894 subreg_lowpart_offset (mode
, inmode
));
898 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
901 gen_rtvec (int n
, ...)
909 /* Don't allocate an empty rtvec... */
916 rt_val
= rtvec_alloc (n
);
918 for (i
= 0; i
< n
; i
++)
919 rt_val
->elem
[i
] = va_arg (p
, rtx
);
926 gen_rtvec_v (int n
, rtx
*argp
)
931 /* Don't allocate an empty rtvec... */
935 rt_val
= rtvec_alloc (n
);
937 for (i
= 0; i
< n
; i
++)
938 rt_val
->elem
[i
] = *argp
++;
943 /* Return the number of bytes between the start of an OUTER_MODE
944 in-memory value and the start of an INNER_MODE in-memory value,
945 given that the former is a lowpart of the latter. It may be a
946 paradoxical lowpart, in which case the offset will be negative
947 on big-endian targets. */
950 byte_lowpart_offset (enum machine_mode outer_mode
,
951 enum machine_mode inner_mode
)
953 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
))
954 return subreg_lowpart_offset (outer_mode
, inner_mode
);
956 return -subreg_lowpart_offset (inner_mode
, outer_mode
);
959 /* Generate a REG rtx for a new pseudo register of mode MODE.
960 This pseudo is assigned the next sequential register number. */
963 gen_reg_rtx (enum machine_mode mode
)
966 unsigned int align
= GET_MODE_ALIGNMENT (mode
);
968 gcc_assert (can_create_pseudo_p ());
970 /* If a virtual register with bigger mode alignment is generated,
971 increase stack alignment estimation because it might be spilled
973 if (SUPPORTS_STACK_ALIGNMENT
974 && crtl
->stack_alignment_estimated
< align
975 && !crtl
->stack_realign_processed
)
977 unsigned int min_align
= MINIMUM_ALIGNMENT (NULL
, mode
, align
);
978 if (crtl
->stack_alignment_estimated
< min_align
)
979 crtl
->stack_alignment_estimated
= min_align
;
982 if (generating_concat_p
983 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
984 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
986 /* For complex modes, don't make a single pseudo.
987 Instead, make a CONCAT of two pseudos.
988 This allows noncontiguous allocation of the real and imaginary parts,
989 which makes much better code. Besides, allocating DCmode
990 pseudos overstrains reload on some machines like the 386. */
991 rtx realpart
, imagpart
;
992 enum machine_mode partmode
= GET_MODE_INNER (mode
);
994 realpart
= gen_reg_rtx (partmode
);
995 imagpart
= gen_reg_rtx (partmode
);
996 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
999 /* Make sure regno_pointer_align, and regno_reg_rtx are large
1000 enough to have an element for this pseudo reg number. */
1002 if (reg_rtx_no
== crtl
->emit
.regno_pointer_align_length
)
1004 int old_size
= crtl
->emit
.regno_pointer_align_length
;
1008 tmp
= XRESIZEVEC (char, crtl
->emit
.regno_pointer_align
, old_size
* 2);
1009 memset (tmp
+ old_size
, 0, old_size
);
1010 crtl
->emit
.regno_pointer_align
= (unsigned char *) tmp
;
1012 new1
= GGC_RESIZEVEC (rtx
, regno_reg_rtx
, old_size
* 2);
1013 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
1014 regno_reg_rtx
= new1
;
1016 crtl
->emit
.regno_pointer_align_length
= old_size
* 2;
1019 val
= gen_raw_REG (mode
, reg_rtx_no
);
1020 regno_reg_rtx
[reg_rtx_no
++] = val
;
1024 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1027 reg_is_parm_p (rtx reg
)
1031 gcc_assert (REG_P (reg
));
1032 decl
= REG_EXPR (reg
);
1033 return (decl
&& TREE_CODE (decl
) == PARM_DECL
);
1036 /* Update NEW with the same attributes as REG, but with OFFSET added
1037 to the REG_OFFSET. */
1040 update_reg_offset (rtx new_rtx
, rtx reg
, int offset
)
1042 REG_ATTRS (new_rtx
) = get_reg_attrs (REG_EXPR (reg
),
1043 REG_OFFSET (reg
) + offset
);
1046 /* Generate a register with same attributes as REG, but with OFFSET
1047 added to the REG_OFFSET. */
1050 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
,
1053 rtx new_rtx
= gen_rtx_REG (mode
, regno
);
1055 update_reg_offset (new_rtx
, reg
, offset
);
1059 /* Generate a new pseudo-register with the same attributes as REG, but
1060 with OFFSET added to the REG_OFFSET. */
1063 gen_reg_rtx_offset (rtx reg
, enum machine_mode mode
, int offset
)
1065 rtx new_rtx
= gen_reg_rtx (mode
);
1067 update_reg_offset (new_rtx
, reg
, offset
);
1071 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1072 new register is a (possibly paradoxical) lowpart of the old one. */
1075 adjust_reg_mode (rtx reg
, enum machine_mode mode
)
1077 update_reg_offset (reg
, reg
, byte_lowpart_offset (mode
, GET_MODE (reg
)));
1078 PUT_MODE (reg
, mode
);
1081 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1082 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1085 set_reg_attrs_from_value (rtx reg
, rtx x
)
1088 bool can_be_reg_pointer
= true;
1090 /* Don't call mark_reg_pointer for incompatible pointer sign
1092 while (GET_CODE (x
) == SIGN_EXTEND
1093 || GET_CODE (x
) == ZERO_EXTEND
1094 || GET_CODE (x
) == TRUNCATE
1095 || (GET_CODE (x
) == SUBREG
&& subreg_lowpart_p (x
)))
1097 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
1098 if ((GET_CODE (x
) == SIGN_EXTEND
&& POINTERS_EXTEND_UNSIGNED
)
1099 || (GET_CODE (x
) != SIGN_EXTEND
&& ! POINTERS_EXTEND_UNSIGNED
))
1100 can_be_reg_pointer
= false;
1105 /* Hard registers can be reused for multiple purposes within the same
1106 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1107 on them is wrong. */
1108 if (HARD_REGISTER_P (reg
))
1111 offset
= byte_lowpart_offset (GET_MODE (reg
), GET_MODE (x
));
1114 if (MEM_OFFSET_KNOWN_P (x
))
1115 REG_ATTRS (reg
) = get_reg_attrs (MEM_EXPR (x
),
1116 MEM_OFFSET (x
) + offset
);
1117 if (can_be_reg_pointer
&& MEM_POINTER (x
))
1118 mark_reg_pointer (reg
, 0);
1123 update_reg_offset (reg
, x
, offset
);
1124 if (can_be_reg_pointer
&& REG_POINTER (x
))
1125 mark_reg_pointer (reg
, REGNO_POINTER_ALIGN (REGNO (x
)));
1129 /* Generate a REG rtx for a new pseudo register, copying the mode
1130 and attributes from X. */
1133 gen_reg_rtx_and_attrs (rtx x
)
1135 rtx reg
= gen_reg_rtx (GET_MODE (x
));
1136 set_reg_attrs_from_value (reg
, x
);
1140 /* Set the register attributes for registers contained in PARM_RTX.
1141 Use needed values from memory attributes of MEM. */
1144 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
1146 if (REG_P (parm_rtx
))
1147 set_reg_attrs_from_value (parm_rtx
, mem
);
1148 else if (GET_CODE (parm_rtx
) == PARALLEL
)
1150 /* Check for a NULL entry in the first slot, used to indicate that the
1151 parameter goes both on the stack and in registers. */
1152 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
1153 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
1155 rtx x
= XVECEXP (parm_rtx
, 0, i
);
1156 if (REG_P (XEXP (x
, 0)))
1157 REG_ATTRS (XEXP (x
, 0))
1158 = get_reg_attrs (MEM_EXPR (mem
),
1159 INTVAL (XEXP (x
, 1)));
1164 /* Set the REG_ATTRS for registers in value X, given that X represents
1168 set_reg_attrs_for_decl_rtl (tree t
, rtx x
)
1170 if (GET_CODE (x
) == SUBREG
)
1172 gcc_assert (subreg_lowpart_p (x
));
1177 = get_reg_attrs (t
, byte_lowpart_offset (GET_MODE (x
),
1179 if (GET_CODE (x
) == CONCAT
)
1181 if (REG_P (XEXP (x
, 0)))
1182 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1183 if (REG_P (XEXP (x
, 1)))
1184 REG_ATTRS (XEXP (x
, 1))
1185 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1187 if (GET_CODE (x
) == PARALLEL
)
1191 /* Check for a NULL entry, used to indicate that the parameter goes
1192 both on the stack and in registers. */
1193 if (XEXP (XVECEXP (x
, 0, 0), 0))
1198 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1200 rtx y
= XVECEXP (x
, 0, i
);
1201 if (REG_P (XEXP (y
, 0)))
1202 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1207 /* Assign the RTX X to declaration T. */
1210 set_decl_rtl (tree t
, rtx x
)
1212 DECL_WRTL_CHECK (t
)->decl_with_rtl
.rtl
= x
;
1214 set_reg_attrs_for_decl_rtl (t
, x
);
1217 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1218 if the ABI requires the parameter to be passed by reference. */
1221 set_decl_incoming_rtl (tree t
, rtx x
, bool by_reference_p
)
1223 DECL_INCOMING_RTL (t
) = x
;
1224 if (x
&& !by_reference_p
)
1225 set_reg_attrs_for_decl_rtl (t
, x
);
1228 /* Identify REG (which may be a CONCAT) as a user register. */
1231 mark_user_reg (rtx reg
)
1233 if (GET_CODE (reg
) == CONCAT
)
1235 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1236 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1240 gcc_assert (REG_P (reg
));
1241 REG_USERVAR_P (reg
) = 1;
1245 /* Identify REG as a probable pointer register and show its alignment
1246 as ALIGN, if nonzero. */
1249 mark_reg_pointer (rtx reg
, int align
)
1251 if (! REG_POINTER (reg
))
1253 REG_POINTER (reg
) = 1;
1256 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1258 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1259 /* We can no-longer be sure just how aligned this pointer is. */
1260 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1263 /* Return 1 plus largest pseudo reg number used in the current function. */
1271 /* Return 1 + the largest label number used so far in the current function. */
1274 max_label_num (void)
1279 /* Return first label number used in this function (if any were used). */
1282 get_first_label_num (void)
1284 return first_label_num
;
1287 /* If the rtx for label was created during the expansion of a nested
1288 function, then first_label_num won't include this label number.
1289 Fix this now so that array indices work later. */
1292 maybe_set_first_label_num (rtx x
)
1294 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1295 first_label_num
= CODE_LABEL_NUMBER (x
);
1298 /* Return a value representing some low-order bits of X, where the number
1299 of low-order bits is given by MODE. Note that no conversion is done
1300 between floating-point and fixed-point values, rather, the bit
1301 representation is returned.
1303 This function handles the cases in common between gen_lowpart, below,
1304 and two variants in cse.c and combine.c. These are the cases that can
1305 be safely handled at all points in the compilation.
1307 If this is not a case we can handle, return 0. */
1310 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1312 int msize
= GET_MODE_SIZE (mode
);
1315 enum machine_mode innermode
;
1317 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1318 so we have to make one up. Yuk. */
1319 innermode
= GET_MODE (x
);
1321 && msize
* BITS_PER_UNIT
<= HOST_BITS_PER_WIDE_INT
)
1322 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1323 else if (innermode
== VOIDmode
)
1324 innermode
= mode_for_size (HOST_BITS_PER_DOUBLE_INT
, MODE_INT
, 0);
1326 xsize
= GET_MODE_SIZE (innermode
);
1328 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1330 if (innermode
== mode
)
1333 /* MODE must occupy no more words than the mode of X. */
1334 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1335 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1338 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1339 if (SCALAR_FLOAT_MODE_P (mode
) && msize
> xsize
)
1342 offset
= subreg_lowpart_offset (mode
, innermode
);
1344 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1345 && (GET_MODE_CLASS (mode
) == MODE_INT
1346 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1348 /* If we are getting the low-order part of something that has been
1349 sign- or zero-extended, we can either just use the object being
1350 extended or make a narrower extension. If we want an even smaller
1351 piece than the size of the object being extended, call ourselves
1354 This case is used mostly by combine and cse. */
1356 if (GET_MODE (XEXP (x
, 0)) == mode
)
1358 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1359 return gen_lowpart_common (mode
, XEXP (x
, 0));
1360 else if (msize
< xsize
)
1361 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1363 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1364 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1365 || CONST_DOUBLE_AS_FLOAT_P (x
) || CONST_SCALAR_INT_P (x
))
1366 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1368 /* Otherwise, we can't do this. */
1373 gen_highpart (enum machine_mode mode
, rtx x
)
1375 unsigned int msize
= GET_MODE_SIZE (mode
);
1378 /* This case loses if X is a subreg. To catch bugs early,
1379 complain if an invalid MODE is used even in other cases. */
1380 gcc_assert (msize
<= UNITS_PER_WORD
1381 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1383 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1384 subreg_highpart_offset (mode
, GET_MODE (x
)));
1385 gcc_assert (result
);
1387 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1388 the target if we have a MEM. gen_highpart must return a valid operand,
1389 emitting code if necessary to do so. */
1392 result
= validize_mem (result
);
1393 gcc_assert (result
);
1399 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1400 be VOIDmode constant. */
1402 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1404 if (GET_MODE (exp
) != VOIDmode
)
1406 gcc_assert (GET_MODE (exp
) == innermode
);
1407 return gen_highpart (outermode
, exp
);
1409 return simplify_gen_subreg (outermode
, exp
, innermode
,
1410 subreg_highpart_offset (outermode
, innermode
));
1413 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1416 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1418 unsigned int offset
= 0;
1419 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1423 if (WORDS_BIG_ENDIAN
)
1424 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1425 if (BYTES_BIG_ENDIAN
)
1426 offset
+= difference
% UNITS_PER_WORD
;
1432 /* Return offset in bytes to get OUTERMODE high part
1433 of the value in mode INNERMODE stored in memory in target format. */
1435 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1437 unsigned int offset
= 0;
1438 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1440 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1444 if (! WORDS_BIG_ENDIAN
)
1445 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1446 if (! BYTES_BIG_ENDIAN
)
1447 offset
+= difference
% UNITS_PER_WORD
;
1453 /* Return 1 iff X, assumed to be a SUBREG,
1454 refers to the least significant part of its containing reg.
1455 If X is not a SUBREG, always return 1 (it is its own low part!). */
1458 subreg_lowpart_p (const_rtx x
)
1460 if (GET_CODE (x
) != SUBREG
)
1462 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1465 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1466 == SUBREG_BYTE (x
));
1469 /* Return true if X is a paradoxical subreg, false otherwise. */
1471 paradoxical_subreg_p (const_rtx x
)
1473 if (GET_CODE (x
) != SUBREG
)
1475 return (GET_MODE_PRECISION (GET_MODE (x
))
1476 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))));
1479 /* Return subword OFFSET of operand OP.
1480 The word number, OFFSET, is interpreted as the word number starting
1481 at the low-order address. OFFSET 0 is the low-order word if not
1482 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1484 If we cannot extract the required word, we return zero. Otherwise,
1485 an rtx corresponding to the requested word will be returned.
1487 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1488 reload has completed, a valid address will always be returned. After
1489 reload, if a valid address cannot be returned, we return zero.
1491 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1492 it is the responsibility of the caller.
1494 MODE is the mode of OP in case it is a CONST_INT.
1496 ??? This is still rather broken for some cases. The problem for the
1497 moment is that all callers of this thing provide no 'goal mode' to
1498 tell us to work with. This exists because all callers were written
1499 in a word based SUBREG world.
1500 Now use of this function can be deprecated by simplify_subreg in most
1505 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1507 if (mode
== VOIDmode
)
1508 mode
= GET_MODE (op
);
1510 gcc_assert (mode
!= VOIDmode
);
1512 /* If OP is narrower than a word, fail. */
1514 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1517 /* If we want a word outside OP, return zero. */
1519 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1522 /* Form a new MEM at the requested address. */
1525 rtx new_rtx
= adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1527 if (! validate_address
)
1530 else if (reload_completed
)
1532 if (! strict_memory_address_addr_space_p (word_mode
,
1534 MEM_ADDR_SPACE (op
)))
1538 return replace_equiv_address (new_rtx
, XEXP (new_rtx
, 0));
1541 /* Rest can be handled by simplify_subreg. */
1542 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1545 /* Similar to `operand_subword', but never return 0. If we can't
1546 extract the required subword, put OP into a register and try again.
1547 The second attempt must succeed. We always validate the address in
1550 MODE is the mode of OP, in case it is CONST_INT. */
1553 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1555 rtx result
= operand_subword (op
, offset
, 1, mode
);
1560 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1562 /* If this is a register which can not be accessed by words, copy it
1563 to a pseudo register. */
1565 op
= copy_to_reg (op
);
1567 op
= force_reg (mode
, op
);
1570 result
= operand_subword (op
, offset
, 1, mode
);
1571 gcc_assert (result
);
1576 /* Returns 1 if both MEM_EXPR can be considered equal
1580 mem_expr_equal_p (const_tree expr1
, const_tree expr2
)
1585 if (! expr1
|| ! expr2
)
1588 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1591 return operand_equal_p (expr1
, expr2
, 0);
1594 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1595 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1599 get_mem_align_offset (rtx mem
, unsigned int align
)
1602 unsigned HOST_WIDE_INT offset
;
1604 /* This function can't use
1605 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1606 || (MAX (MEM_ALIGN (mem),
1607 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1611 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1613 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1614 for <variable>. get_inner_reference doesn't handle it and
1615 even if it did, the alignment in that case needs to be determined
1616 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1617 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1618 isn't sufficiently aligned, the object it is in might be. */
1619 gcc_assert (MEM_P (mem
));
1620 expr
= MEM_EXPR (mem
);
1621 if (expr
== NULL_TREE
|| !MEM_OFFSET_KNOWN_P (mem
))
1624 offset
= MEM_OFFSET (mem
);
1627 if (DECL_ALIGN (expr
) < align
)
1630 else if (INDIRECT_REF_P (expr
))
1632 if (TYPE_ALIGN (TREE_TYPE (expr
)) < (unsigned int) align
)
1635 else if (TREE_CODE (expr
) == COMPONENT_REF
)
1639 tree inner
= TREE_OPERAND (expr
, 0);
1640 tree field
= TREE_OPERAND (expr
, 1);
1641 tree byte_offset
= component_ref_field_offset (expr
);
1642 tree bit_offset
= DECL_FIELD_BIT_OFFSET (field
);
1645 || !tree_fits_uhwi_p (byte_offset
)
1646 || !tree_fits_uhwi_p (bit_offset
))
1649 offset
+= tree_to_uhwi (byte_offset
);
1650 offset
+= tree_to_uhwi (bit_offset
) / BITS_PER_UNIT
;
1652 if (inner
== NULL_TREE
)
1654 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field
))
1655 < (unsigned int) align
)
1659 else if (DECL_P (inner
))
1661 if (DECL_ALIGN (inner
) < align
)
1665 else if (TREE_CODE (inner
) != COMPONENT_REF
)
1673 return offset
& ((align
/ BITS_PER_UNIT
) - 1);
1676 /* Given REF (a MEM) and T, either the type of X or the expression
1677 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1678 if we are making a new object of this type. BITPOS is nonzero if
1679 there is an offset outstanding on T that will be applied later. */
1682 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1683 HOST_WIDE_INT bitpos
)
1685 HOST_WIDE_INT apply_bitpos
= 0;
1687 struct mem_attrs attrs
, *defattrs
, *refattrs
;
1690 /* It can happen that type_for_mode was given a mode for which there
1691 is no language-level type. In which case it returns NULL, which
1696 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1697 if (type
== error_mark_node
)
1700 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1701 wrong answer, as it assumes that DECL_RTL already has the right alias
1702 info. Callers should not set DECL_RTL until after the call to
1703 set_mem_attributes. */
1704 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1706 memset (&attrs
, 0, sizeof (attrs
));
1708 /* Get the alias set from the expression or type (perhaps using a
1709 front-end routine) and use it. */
1710 attrs
.alias
= get_alias_set (t
);
1712 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1713 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1715 /* Default values from pre-existing memory attributes if present. */
1716 refattrs
= MEM_ATTRS (ref
);
1719 /* ??? Can this ever happen? Calling this routine on a MEM that
1720 already carries memory attributes should probably be invalid. */
1721 attrs
.expr
= refattrs
->expr
;
1722 attrs
.offset_known_p
= refattrs
->offset_known_p
;
1723 attrs
.offset
= refattrs
->offset
;
1724 attrs
.size_known_p
= refattrs
->size_known_p
;
1725 attrs
.size
= refattrs
->size
;
1726 attrs
.align
= refattrs
->align
;
1729 /* Otherwise, default values from the mode of the MEM reference. */
1732 defattrs
= mode_mem_attrs
[(int) GET_MODE (ref
)];
1733 gcc_assert (!defattrs
->expr
);
1734 gcc_assert (!defattrs
->offset_known_p
);
1736 /* Respect mode size. */
1737 attrs
.size_known_p
= defattrs
->size_known_p
;
1738 attrs
.size
= defattrs
->size
;
1739 /* ??? Is this really necessary? We probably should always get
1740 the size from the type below. */
1742 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1743 if T is an object, always compute the object alignment below. */
1745 attrs
.align
= defattrs
->align
;
1747 attrs
.align
= BITS_PER_UNIT
;
1748 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1749 e.g. if the type carries an alignment attribute. Should we be
1750 able to simply always use TYPE_ALIGN? */
1753 /* We can set the alignment from the type if we are making an object,
1754 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1755 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1756 attrs
.align
= MAX (attrs
.align
, TYPE_ALIGN (type
));
1758 /* If the size is known, we can set that. */
1759 tree new_size
= TYPE_SIZE_UNIT (type
);
1761 /* The address-space is that of the type. */
1762 as
= TYPE_ADDR_SPACE (type
);
1764 /* If T is not a type, we may be able to deduce some more information about
1770 if (TREE_THIS_VOLATILE (t
))
1771 MEM_VOLATILE_P (ref
) = 1;
1773 /* Now remove any conversions: they don't change what the underlying
1774 object is. Likewise for SAVE_EXPR. */
1775 while (CONVERT_EXPR_P (t
)
1776 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1777 || TREE_CODE (t
) == SAVE_EXPR
)
1778 t
= TREE_OPERAND (t
, 0);
1780 /* Note whether this expression can trap. */
1781 MEM_NOTRAP_P (ref
) = !tree_could_trap_p (t
);
1783 base
= get_base_address (t
);
1787 && TREE_READONLY (base
)
1788 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
))
1789 && !TREE_THIS_VOLATILE (base
))
1790 MEM_READONLY_P (ref
) = 1;
1792 /* Mark static const strings readonly as well. */
1793 if (TREE_CODE (base
) == STRING_CST
1794 && TREE_READONLY (base
)
1795 && TREE_STATIC (base
))
1796 MEM_READONLY_P (ref
) = 1;
1798 /* Address-space information is on the base object. */
1799 if (TREE_CODE (base
) == MEM_REF
1800 || TREE_CODE (base
) == TARGET_MEM_REF
)
1801 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base
,
1804 as
= TYPE_ADDR_SPACE (TREE_TYPE (base
));
1807 /* If this expression uses it's parent's alias set, mark it such
1808 that we won't change it. */
1809 if (component_uses_parent_alias_set_from (t
) != NULL_TREE
)
1810 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1812 /* If this is a decl, set the attributes of the MEM from it. */
1816 attrs
.offset_known_p
= true;
1818 apply_bitpos
= bitpos
;
1819 new_size
= DECL_SIZE_UNIT (t
);
1822 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1823 else if (CONSTANT_CLASS_P (t
))
1826 /* If this is a field reference, record it. */
1827 else if (TREE_CODE (t
) == COMPONENT_REF
)
1830 attrs
.offset_known_p
= true;
1832 apply_bitpos
= bitpos
;
1833 if (DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1834 new_size
= DECL_SIZE_UNIT (TREE_OPERAND (t
, 1));
1837 /* If this is an array reference, look for an outer field reference. */
1838 else if (TREE_CODE (t
) == ARRAY_REF
)
1840 tree off_tree
= size_zero_node
;
1841 /* We can't modify t, because we use it at the end of the
1847 tree index
= TREE_OPERAND (t2
, 1);
1848 tree low_bound
= array_ref_low_bound (t2
);
1849 tree unit_size
= array_ref_element_size (t2
);
1851 /* We assume all arrays have sizes that are a multiple of a byte.
1852 First subtract the lower bound, if any, in the type of the
1853 index, then convert to sizetype and multiply by the size of
1854 the array element. */
1855 if (! integer_zerop (low_bound
))
1856 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1859 off_tree
= size_binop (PLUS_EXPR
,
1860 size_binop (MULT_EXPR
,
1861 fold_convert (sizetype
,
1865 t2
= TREE_OPERAND (t2
, 0);
1867 while (TREE_CODE (t2
) == ARRAY_REF
);
1870 || TREE_CODE (t2
) == COMPONENT_REF
)
1873 attrs
.offset_known_p
= false;
1874 if (tree_fits_uhwi_p (off_tree
))
1876 attrs
.offset_known_p
= true;
1877 attrs
.offset
= tree_to_uhwi (off_tree
);
1878 apply_bitpos
= bitpos
;
1881 /* Else do not record a MEM_EXPR. */
1884 /* If this is an indirect reference, record it. */
1885 else if (TREE_CODE (t
) == MEM_REF
1886 || TREE_CODE (t
) == TARGET_MEM_REF
)
1889 attrs
.offset_known_p
= true;
1891 apply_bitpos
= bitpos
;
1894 /* Compute the alignment. */
1895 unsigned int obj_align
;
1896 unsigned HOST_WIDE_INT obj_bitpos
;
1897 get_object_alignment_1 (t
, &obj_align
, &obj_bitpos
);
1898 obj_bitpos
= (obj_bitpos
- bitpos
) & (obj_align
- 1);
1899 if (obj_bitpos
!= 0)
1900 obj_align
= (obj_bitpos
& -obj_bitpos
);
1901 attrs
.align
= MAX (attrs
.align
, obj_align
);
1904 if (tree_fits_uhwi_p (new_size
))
1906 attrs
.size_known_p
= true;
1907 attrs
.size
= tree_to_uhwi (new_size
);
1910 /* If we modified OFFSET based on T, then subtract the outstanding
1911 bit position offset. Similarly, increase the size of the accessed
1912 object to contain the negative offset. */
1915 gcc_assert (attrs
.offset_known_p
);
1916 attrs
.offset
-= apply_bitpos
/ BITS_PER_UNIT
;
1917 if (attrs
.size_known_p
)
1918 attrs
.size
+= apply_bitpos
/ BITS_PER_UNIT
;
1921 /* Now set the attributes we computed above. */
1922 attrs
.addrspace
= as
;
1923 set_mem_attrs (ref
, &attrs
);
1927 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1929 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1932 /* Set the alias set of MEM to SET. */
1935 set_mem_alias_set (rtx mem
, alias_set_type set
)
1937 struct mem_attrs attrs
;
1939 /* If the new and old alias sets don't conflict, something is wrong. */
1940 gcc_checking_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1941 attrs
= *get_mem_attrs (mem
);
1943 set_mem_attrs (mem
, &attrs
);
1946 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1949 set_mem_addr_space (rtx mem
, addr_space_t addrspace
)
1951 struct mem_attrs attrs
;
1953 attrs
= *get_mem_attrs (mem
);
1954 attrs
.addrspace
= addrspace
;
1955 set_mem_attrs (mem
, &attrs
);
1958 /* Set the alignment of MEM to ALIGN bits. */
1961 set_mem_align (rtx mem
, unsigned int align
)
1963 struct mem_attrs attrs
;
1965 attrs
= *get_mem_attrs (mem
);
1966 attrs
.align
= align
;
1967 set_mem_attrs (mem
, &attrs
);
1970 /* Set the expr for MEM to EXPR. */
1973 set_mem_expr (rtx mem
, tree expr
)
1975 struct mem_attrs attrs
;
1977 attrs
= *get_mem_attrs (mem
);
1979 set_mem_attrs (mem
, &attrs
);
1982 /* Set the offset of MEM to OFFSET. */
1985 set_mem_offset (rtx mem
, HOST_WIDE_INT offset
)
1987 struct mem_attrs attrs
;
1989 attrs
= *get_mem_attrs (mem
);
1990 attrs
.offset_known_p
= true;
1991 attrs
.offset
= offset
;
1992 set_mem_attrs (mem
, &attrs
);
1995 /* Clear the offset of MEM. */
1998 clear_mem_offset (rtx mem
)
2000 struct mem_attrs attrs
;
2002 attrs
= *get_mem_attrs (mem
);
2003 attrs
.offset_known_p
= false;
2004 set_mem_attrs (mem
, &attrs
);
2007 /* Set the size of MEM to SIZE. */
2010 set_mem_size (rtx mem
, HOST_WIDE_INT size
)
2012 struct mem_attrs attrs
;
2014 attrs
= *get_mem_attrs (mem
);
2015 attrs
.size_known_p
= true;
2017 set_mem_attrs (mem
, &attrs
);
2020 /* Clear the size of MEM. */
2023 clear_mem_size (rtx mem
)
2025 struct mem_attrs attrs
;
2027 attrs
= *get_mem_attrs (mem
);
2028 attrs
.size_known_p
= false;
2029 set_mem_attrs (mem
, &attrs
);
2032 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2033 and its address changed to ADDR. (VOIDmode means don't change the mode.
2034 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2035 returned memory location is required to be valid. The memory
2036 attributes are not changed. */
2039 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
2044 gcc_assert (MEM_P (memref
));
2045 as
= MEM_ADDR_SPACE (memref
);
2046 if (mode
== VOIDmode
)
2047 mode
= GET_MODE (memref
);
2049 addr
= XEXP (memref
, 0);
2050 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
2051 && (!validate
|| memory_address_addr_space_p (mode
, addr
, as
)))
2056 if (reload_in_progress
|| reload_completed
)
2057 gcc_assert (memory_address_addr_space_p (mode
, addr
, as
));
2059 addr
= memory_address_addr_space (mode
, addr
, as
);
2062 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
2065 new_rtx
= gen_rtx_MEM (mode
, addr
);
2066 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2070 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2071 way we are changing MEMREF, so we only preserve the alias set. */
2074 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
2076 rtx new_rtx
= change_address_1 (memref
, mode
, addr
, 1);
2077 enum machine_mode mmode
= GET_MODE (new_rtx
);
2078 struct mem_attrs attrs
, *defattrs
;
2080 attrs
= *get_mem_attrs (memref
);
2081 defattrs
= mode_mem_attrs
[(int) mmode
];
2082 attrs
.expr
= NULL_TREE
;
2083 attrs
.offset_known_p
= false;
2084 attrs
.size_known_p
= defattrs
->size_known_p
;
2085 attrs
.size
= defattrs
->size
;
2086 attrs
.align
= defattrs
->align
;
2088 /* If there are no changes, just return the original memory reference. */
2089 if (new_rtx
== memref
)
2091 if (mem_attrs_eq_p (get_mem_attrs (memref
), &attrs
))
2094 new_rtx
= gen_rtx_MEM (mmode
, XEXP (memref
, 0));
2095 MEM_COPY_ATTRIBUTES (new_rtx
, memref
);
2098 set_mem_attrs (new_rtx
, &attrs
);
2102 /* Return a memory reference like MEMREF, but with its mode changed
2103 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2104 nonzero, the memory address is forced to be valid.
2105 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2106 and the caller is responsible for adjusting MEMREF base register.
2107 If ADJUST_OBJECT is zero, the underlying object associated with the
2108 memory reference is left unchanged and the caller is responsible for
2109 dealing with it. Otherwise, if the new memory reference is outside
2110 the underlying object, even partially, then the object is dropped.
2111 SIZE, if nonzero, is the size of an access in cases where MODE
2112 has no inherent size. */
2115 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
2116 int validate
, int adjust_address
, int adjust_object
,
2119 rtx addr
= XEXP (memref
, 0);
2121 enum machine_mode address_mode
;
2123 struct mem_attrs attrs
= *get_mem_attrs (memref
), *defattrs
;
2124 unsigned HOST_WIDE_INT max_align
;
2125 #ifdef POINTERS_EXTEND_UNSIGNED
2126 enum machine_mode pointer_mode
2127 = targetm
.addr_space
.pointer_mode (attrs
.addrspace
);
2130 /* VOIDmode means no mode change for change_address_1. */
2131 if (mode
== VOIDmode
)
2132 mode
= GET_MODE (memref
);
2134 /* Take the size of non-BLKmode accesses from the mode. */
2135 defattrs
= mode_mem_attrs
[(int) mode
];
2136 if (defattrs
->size_known_p
)
2137 size
= defattrs
->size
;
2139 /* If there are no changes, just return the original memory reference. */
2140 if (mode
== GET_MODE (memref
) && !offset
2141 && (size
== 0 || (attrs
.size_known_p
&& attrs
.size
== size
))
2142 && (!validate
|| memory_address_addr_space_p (mode
, addr
,
2146 /* ??? Prefer to create garbage instead of creating shared rtl.
2147 This may happen even if offset is nonzero -- consider
2148 (plus (plus reg reg) const_int) -- so do this always. */
2149 addr
= copy_rtx (addr
);
2151 /* Convert a possibly large offset to a signed value within the
2152 range of the target address space. */
2153 address_mode
= get_address_mode (memref
);
2154 pbits
= GET_MODE_BITSIZE (address_mode
);
2155 if (HOST_BITS_PER_WIDE_INT
> pbits
)
2157 int shift
= HOST_BITS_PER_WIDE_INT
- pbits
;
2158 offset
= (((HOST_WIDE_INT
) ((unsigned HOST_WIDE_INT
) offset
<< shift
))
2164 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2165 object, we can merge it into the LO_SUM. */
2166 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
2168 && (unsigned HOST_WIDE_INT
) offset
2169 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
2170 addr
= gen_rtx_LO_SUM (address_mode
, XEXP (addr
, 0),
2171 plus_constant (address_mode
,
2172 XEXP (addr
, 1), offset
));
2173 #ifdef POINTERS_EXTEND_UNSIGNED
2174 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2175 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2176 the fact that pointers are not allowed to overflow. */
2177 else if (POINTERS_EXTEND_UNSIGNED
> 0
2178 && GET_CODE (addr
) == ZERO_EXTEND
2179 && GET_MODE (XEXP (addr
, 0)) == pointer_mode
2180 && trunc_int_for_mode (offset
, pointer_mode
) == offset
)
2181 addr
= gen_rtx_ZERO_EXTEND (address_mode
,
2182 plus_constant (pointer_mode
,
2183 XEXP (addr
, 0), offset
));
2186 addr
= plus_constant (address_mode
, addr
, offset
);
2189 new_rtx
= change_address_1 (memref
, mode
, addr
, validate
);
2191 /* If the address is a REG, change_address_1 rightfully returns memref,
2192 but this would destroy memref's MEM_ATTRS. */
2193 if (new_rtx
== memref
&& offset
!= 0)
2194 new_rtx
= copy_rtx (new_rtx
);
2196 /* Conservatively drop the object if we don't know where we start from. */
2197 if (adjust_object
&& (!attrs
.offset_known_p
|| !attrs
.size_known_p
))
2199 attrs
.expr
= NULL_TREE
;
2203 /* Compute the new values of the memory attributes due to this adjustment.
2204 We add the offsets and update the alignment. */
2205 if (attrs
.offset_known_p
)
2207 attrs
.offset
+= offset
;
2209 /* Drop the object if the new left end is not within its bounds. */
2210 if (adjust_object
&& attrs
.offset
< 0)
2212 attrs
.expr
= NULL_TREE
;
2217 /* Compute the new alignment by taking the MIN of the alignment and the
2218 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2222 max_align
= (offset
& -offset
) * BITS_PER_UNIT
;
2223 attrs
.align
= MIN (attrs
.align
, max_align
);
2228 /* Drop the object if the new right end is not within its bounds. */
2229 if (adjust_object
&& (offset
+ size
) > attrs
.size
)
2231 attrs
.expr
= NULL_TREE
;
2234 attrs
.size_known_p
= true;
2237 else if (attrs
.size_known_p
)
2239 gcc_assert (!adjust_object
);
2240 attrs
.size
-= offset
;
2241 /* ??? The store_by_pieces machinery generates negative sizes,
2242 so don't assert for that here. */
2245 set_mem_attrs (new_rtx
, &attrs
);
2250 /* Return a memory reference like MEMREF, but with its mode changed
2251 to MODE and its address changed to ADDR, which is assumed to be
2252 MEMREF offset by OFFSET bytes. If VALIDATE is
2253 nonzero, the memory address is forced to be valid. */
2256 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
2257 HOST_WIDE_INT offset
, int validate
)
2259 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2260 return adjust_address_1 (memref
, mode
, offset
, validate
, 0, 0, 0);
2263 /* Return a memory reference like MEMREF, but whose address is changed by
2264 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2265 known to be in OFFSET (possibly 1). */
2268 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
2270 rtx new_rtx
, addr
= XEXP (memref
, 0);
2271 enum machine_mode address_mode
;
2272 struct mem_attrs attrs
, *defattrs
;
2274 attrs
= *get_mem_attrs (memref
);
2275 address_mode
= get_address_mode (memref
);
2276 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2278 /* At this point we don't know _why_ the address is invalid. It
2279 could have secondary memory references, multiplies or anything.
2281 However, if we did go and rearrange things, we can wind up not
2282 being able to recognize the magic around pic_offset_table_rtx.
2283 This stuff is fragile, and is yet another example of why it is
2284 bad to expose PIC machinery too early. */
2285 if (! memory_address_addr_space_p (GET_MODE (memref
), new_rtx
,
2287 && GET_CODE (addr
) == PLUS
2288 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2290 addr
= force_reg (GET_MODE (addr
), addr
);
2291 new_rtx
= simplify_gen_binary (PLUS
, address_mode
, addr
, offset
);
2294 update_temp_slot_address (XEXP (memref
, 0), new_rtx
);
2295 new_rtx
= change_address_1 (memref
, VOIDmode
, new_rtx
, 1);
2297 /* If there are no changes, just return the original memory reference. */
2298 if (new_rtx
== memref
)
2301 /* Update the alignment to reflect the offset. Reset the offset, which
2303 defattrs
= mode_mem_attrs
[(int) GET_MODE (new_rtx
)];
2304 attrs
.offset_known_p
= false;
2305 attrs
.size_known_p
= defattrs
->size_known_p
;
2306 attrs
.size
= defattrs
->size
;
2307 attrs
.align
= MIN (attrs
.align
, pow2
* BITS_PER_UNIT
);
2308 set_mem_attrs (new_rtx
, &attrs
);
2312 /* Return a memory reference like MEMREF, but with its address changed to
2313 ADDR. The caller is asserting that the actual piece of memory pointed
2314 to is the same, just the form of the address is being changed, such as
2315 by putting something into a register. */
2318 replace_equiv_address (rtx memref
, rtx addr
)
2320 /* change_address_1 copies the memory attribute structure without change
2321 and that's exactly what we want here. */
2322 update_temp_slot_address (XEXP (memref
, 0), addr
);
2323 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2326 /* Likewise, but the reference is not required to be valid. */
2329 replace_equiv_address_nv (rtx memref
, rtx addr
)
2331 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2334 /* Return a memory reference like MEMREF, but with its mode widened to
2335 MODE and offset by OFFSET. This would be used by targets that e.g.
2336 cannot issue QImode memory operations and have to use SImode memory
2337 operations plus masking logic. */
2340 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2342 rtx new_rtx
= adjust_address_1 (memref
, mode
, offset
, 1, 1, 0, 0);
2343 struct mem_attrs attrs
;
2344 unsigned int size
= GET_MODE_SIZE (mode
);
2346 /* If there are no changes, just return the original memory reference. */
2347 if (new_rtx
== memref
)
2350 attrs
= *get_mem_attrs (new_rtx
);
2352 /* If we don't know what offset we were at within the expression, then
2353 we can't know if we've overstepped the bounds. */
2354 if (! attrs
.offset_known_p
)
2355 attrs
.expr
= NULL_TREE
;
2359 if (TREE_CODE (attrs
.expr
) == COMPONENT_REF
)
2361 tree field
= TREE_OPERAND (attrs
.expr
, 1);
2362 tree offset
= component_ref_field_offset (attrs
.expr
);
2364 if (! DECL_SIZE_UNIT (field
))
2366 attrs
.expr
= NULL_TREE
;
2370 /* Is the field at least as large as the access? If so, ok,
2371 otherwise strip back to the containing structure. */
2372 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2373 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2374 && attrs
.offset
>= 0)
2377 if (! tree_fits_uhwi_p (offset
))
2379 attrs
.expr
= NULL_TREE
;
2383 attrs
.expr
= TREE_OPERAND (attrs
.expr
, 0);
2384 attrs
.offset
+= tree_to_uhwi (offset
);
2385 attrs
.offset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
2388 /* Similarly for the decl. */
2389 else if (DECL_P (attrs
.expr
)
2390 && DECL_SIZE_UNIT (attrs
.expr
)
2391 && TREE_CODE (DECL_SIZE_UNIT (attrs
.expr
)) == INTEGER_CST
2392 && compare_tree_int (DECL_SIZE_UNIT (attrs
.expr
), size
) >= 0
2393 && (! attrs
.offset_known_p
|| attrs
.offset
>= 0))
2397 /* The widened memory access overflows the expression, which means
2398 that it could alias another expression. Zap it. */
2399 attrs
.expr
= NULL_TREE
;
2405 attrs
.offset_known_p
= false;
2407 /* The widened memory may alias other stuff, so zap the alias set. */
2408 /* ??? Maybe use get_alias_set on any remaining expression. */
2410 attrs
.size_known_p
= true;
2412 set_mem_attrs (new_rtx
, &attrs
);
2416 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2417 static GTY(()) tree spill_slot_decl
;
2420 get_spill_slot_decl (bool force_build_p
)
2422 tree d
= spill_slot_decl
;
2424 struct mem_attrs attrs
;
2426 if (d
|| !force_build_p
)
2429 d
= build_decl (DECL_SOURCE_LOCATION (current_function_decl
),
2430 VAR_DECL
, get_identifier ("%sfp"), void_type_node
);
2431 DECL_ARTIFICIAL (d
) = 1;
2432 DECL_IGNORED_P (d
) = 1;
2434 spill_slot_decl
= d
;
2436 rd
= gen_rtx_MEM (BLKmode
, frame_pointer_rtx
);
2437 MEM_NOTRAP_P (rd
) = 1;
2438 attrs
= *mode_mem_attrs
[(int) BLKmode
];
2439 attrs
.alias
= new_alias_set ();
2441 set_mem_attrs (rd
, &attrs
);
2442 SET_DECL_RTL (d
, rd
);
2447 /* Given MEM, a result from assign_stack_local, fill in the memory
2448 attributes as appropriate for a register allocator spill slot.
2449 These slots are not aliasable by other memory. We arrange for
2450 them all to use a single MEM_EXPR, so that the aliasing code can
2451 work properly in the case of shared spill slots. */
2454 set_mem_attrs_for_spill (rtx mem
)
2456 struct mem_attrs attrs
;
2459 attrs
= *get_mem_attrs (mem
);
2460 attrs
.expr
= get_spill_slot_decl (true);
2461 attrs
.alias
= MEM_ALIAS_SET (DECL_RTL (attrs
.expr
));
2462 attrs
.addrspace
= ADDR_SPACE_GENERIC
;
2464 /* We expect the incoming memory to be of the form:
2465 (mem:MODE (plus (reg sfp) (const_int offset)))
2466 with perhaps the plus missing for offset = 0. */
2467 addr
= XEXP (mem
, 0);
2468 attrs
.offset_known_p
= true;
2470 if (GET_CODE (addr
) == PLUS
2471 && CONST_INT_P (XEXP (addr
, 1)))
2472 attrs
.offset
= INTVAL (XEXP (addr
, 1));
2474 set_mem_attrs (mem
, &attrs
);
2475 MEM_NOTRAP_P (mem
) = 1;
2478 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2481 gen_label_rtx (void)
2483 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2484 NULL
, label_num
++, NULL
);
2487 /* For procedure integration. */
2489 /* Install new pointers to the first and last insns in the chain.
2490 Also, set cur_insn_uid to one higher than the last in use.
2491 Used for an inline-procedure after copying the insn chain. */
2494 set_new_first_and_last_insn (rtx first
, rtx last
)
2498 set_first_insn (first
);
2499 set_last_insn (last
);
2502 if (MIN_NONDEBUG_INSN_UID
|| MAY_HAVE_DEBUG_INSNS
)
2504 int debug_count
= 0;
2506 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
- 1;
2507 cur_debug_insn_uid
= 0;
2509 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2510 if (INSN_UID (insn
) < MIN_NONDEBUG_INSN_UID
)
2511 cur_debug_insn_uid
= MAX (cur_debug_insn_uid
, INSN_UID (insn
));
2514 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2515 if (DEBUG_INSN_P (insn
))
2520 cur_debug_insn_uid
= MIN_NONDEBUG_INSN_UID
+ debug_count
;
2522 cur_debug_insn_uid
++;
2525 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2526 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2531 /* Go through all the RTL insn bodies and copy any invalid shared
2532 structure. This routine should only be called once. */
2535 unshare_all_rtl_1 (rtx insn
)
2537 /* Unshare just about everything else. */
2538 unshare_all_rtl_in_chain (insn
);
2540 /* Make sure the addresses of stack slots found outside the insn chain
2541 (such as, in DECL_RTL of a variable) are not shared
2542 with the insn chain.
2544 This special care is necessary when the stack slot MEM does not
2545 actually appear in the insn chain. If it does appear, its address
2546 is unshared from all else at that point. */
2547 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2550 /* Go through all the RTL insn bodies and copy any invalid shared
2551 structure, again. This is a fairly expensive thing to do so it
2552 should be done sparingly. */
2555 unshare_all_rtl_again (rtx insn
)
2560 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2563 reset_used_flags (PATTERN (p
));
2564 reset_used_flags (REG_NOTES (p
));
2566 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p
));
2569 /* Make sure that virtual stack slots are not shared. */
2570 set_used_decls (DECL_INITIAL (cfun
->decl
));
2572 /* Make sure that virtual parameters are not shared. */
2573 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= DECL_CHAIN (decl
))
2574 set_used_flags (DECL_RTL (decl
));
2576 reset_used_flags (stack_slot_list
);
2578 unshare_all_rtl_1 (insn
);
2582 unshare_all_rtl (void)
2584 unshare_all_rtl_1 (get_insns ());
2589 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2590 Recursively does the same for subexpressions. */
2593 verify_rtx_sharing (rtx orig
, rtx insn
)
2598 const char *format_ptr
;
2603 code
= GET_CODE (x
);
2605 /* These types may be freely shared. */
2621 /* SCRATCH must be shared because they represent distinct values. */
2624 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2625 clobbers or clobbers of hard registers that originated as pseudos.
2626 This is needed to allow safe register renaming. */
2627 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2628 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2633 if (shared_const_p (orig
))
2638 /* A MEM is allowed to be shared if its address is constant. */
2639 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2640 || reload_completed
|| reload_in_progress
)
2649 /* This rtx may not be shared. If it has already been seen,
2650 replace it with a copy of itself. */
2651 #ifdef ENABLE_CHECKING
2652 if (RTX_FLAG (x
, used
))
2654 error ("invalid rtl sharing found in the insn");
2656 error ("shared rtx");
2658 internal_error ("internal consistency failure");
2661 gcc_assert (!RTX_FLAG (x
, used
));
2663 RTX_FLAG (x
, used
) = 1;
2665 /* Now scan the subexpressions recursively. */
2667 format_ptr
= GET_RTX_FORMAT (code
);
2669 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2671 switch (*format_ptr
++)
2674 verify_rtx_sharing (XEXP (x
, i
), insn
);
2678 if (XVEC (x
, i
) != NULL
)
2681 int len
= XVECLEN (x
, i
);
2683 for (j
= 0; j
< len
; j
++)
2685 /* We allow sharing of ASM_OPERANDS inside single
2687 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2688 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2690 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2692 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2701 /* Reset used-flags for INSN. */
2704 reset_insn_used_flags (rtx insn
)
2706 gcc_assert (INSN_P (insn
));
2707 reset_used_flags (PATTERN (insn
));
2708 reset_used_flags (REG_NOTES (insn
));
2710 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2713 /* Go through all the RTL insn bodies and clear all the USED bits. */
2716 reset_all_used_flags (void)
2720 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2723 rtx pat
= PATTERN (p
);
2724 if (GET_CODE (pat
) != SEQUENCE
)
2725 reset_insn_used_flags (p
);
2728 gcc_assert (REG_NOTES (p
) == NULL
);
2729 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2730 reset_insn_used_flags (XVECEXP (pat
, 0, i
));
2735 /* Verify sharing in INSN. */
2738 verify_insn_sharing (rtx insn
)
2740 gcc_assert (INSN_P (insn
));
2741 reset_used_flags (PATTERN (insn
));
2742 reset_used_flags (REG_NOTES (insn
));
2744 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn
));
2747 /* Go through all the RTL insn bodies and check that there is no unexpected
2748 sharing in between the subexpressions. */
2751 verify_rtl_sharing (void)
2755 timevar_push (TV_VERIFY_RTL_SHARING
);
2757 reset_all_used_flags ();
2759 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2762 rtx pat
= PATTERN (p
);
2763 if (GET_CODE (pat
) != SEQUENCE
)
2764 verify_insn_sharing (p
);
2766 for (int i
= 0; i
< XVECLEN (pat
, 0); i
++)
2767 verify_insn_sharing (XVECEXP (pat
, 0, i
));
2770 reset_all_used_flags ();
2772 timevar_pop (TV_VERIFY_RTL_SHARING
);
2775 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2776 Assumes the mark bits are cleared at entry. */
2779 unshare_all_rtl_in_chain (rtx insn
)
2781 for (; insn
; insn
= NEXT_INSN (insn
))
2784 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2785 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2787 CALL_INSN_FUNCTION_USAGE (insn
)
2788 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn
));
2792 /* Go through all virtual stack slots of a function and mark them as
2793 shared. We never replace the DECL_RTLs themselves with a copy,
2794 but expressions mentioned into a DECL_RTL cannot be shared with
2795 expressions in the instruction stream.
2797 Note that reload may convert pseudo registers into memories in-place.
2798 Pseudo registers are always shared, but MEMs never are. Thus if we
2799 reset the used flags on MEMs in the instruction stream, we must set
2800 them again on MEMs that appear in DECL_RTLs. */
2803 set_used_decls (tree blk
)
2808 for (t
= BLOCK_VARS (blk
); t
; t
= DECL_CHAIN (t
))
2809 if (DECL_RTL_SET_P (t
))
2810 set_used_flags (DECL_RTL (t
));
2812 /* Now process sub-blocks. */
2813 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= BLOCK_CHAIN (t
))
2817 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2818 Recursively does the same for subexpressions. Uses
2819 copy_rtx_if_shared_1 to reduce stack space. */
2822 copy_rtx_if_shared (rtx orig
)
2824 copy_rtx_if_shared_1 (&orig
);
2828 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2829 use. Recursively does the same for subexpressions. */
2832 copy_rtx_if_shared_1 (rtx
*orig1
)
2838 const char *format_ptr
;
2842 /* Repeat is used to turn tail-recursion into iteration. */
2849 code
= GET_CODE (x
);
2851 /* These types may be freely shared. */
2867 /* SCRATCH must be shared because they represent distinct values. */
2870 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2871 clobbers or clobbers of hard registers that originated as pseudos.
2872 This is needed to allow safe register renaming. */
2873 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
2874 && ORIGINAL_REGNO (XEXP (x
, 0)) == REGNO (XEXP (x
, 0)))
2879 if (shared_const_p (x
))
2889 /* The chain of insns is not being copied. */
2896 /* This rtx may not be shared. If it has already been seen,
2897 replace it with a copy of itself. */
2899 if (RTX_FLAG (x
, used
))
2901 x
= shallow_copy_rtx (x
);
2904 RTX_FLAG (x
, used
) = 1;
2906 /* Now scan the subexpressions recursively.
2907 We can store any replaced subexpressions directly into X
2908 since we know X is not shared! Any vectors in X
2909 must be copied if X was copied. */
2911 format_ptr
= GET_RTX_FORMAT (code
);
2912 length
= GET_RTX_LENGTH (code
);
2915 for (i
= 0; i
< length
; i
++)
2917 switch (*format_ptr
++)
2921 copy_rtx_if_shared_1 (last_ptr
);
2922 last_ptr
= &XEXP (x
, i
);
2926 if (XVEC (x
, i
) != NULL
)
2929 int len
= XVECLEN (x
, i
);
2931 /* Copy the vector iff I copied the rtx and the length
2933 if (copied
&& len
> 0)
2934 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2936 /* Call recursively on all inside the vector. */
2937 for (j
= 0; j
< len
; j
++)
2940 copy_rtx_if_shared_1 (last_ptr
);
2941 last_ptr
= &XVECEXP (x
, i
, j
);
2956 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2959 mark_used_flags (rtx x
, int flag
)
2963 const char *format_ptr
;
2966 /* Repeat is used to turn tail-recursion into iteration. */
2971 code
= GET_CODE (x
);
2973 /* These types may be freely shared so we needn't do any resetting
2997 /* The chain of insns is not being copied. */
3004 RTX_FLAG (x
, used
) = flag
;
3006 format_ptr
= GET_RTX_FORMAT (code
);
3007 length
= GET_RTX_LENGTH (code
);
3009 for (i
= 0; i
< length
; i
++)
3011 switch (*format_ptr
++)
3019 mark_used_flags (XEXP (x
, i
), flag
);
3023 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3024 mark_used_flags (XVECEXP (x
, i
, j
), flag
);
3030 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3031 to look for shared sub-parts. */
3034 reset_used_flags (rtx x
)
3036 mark_used_flags (x
, 0);
3039 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3040 to look for shared sub-parts. */
3043 set_used_flags (rtx x
)
3045 mark_used_flags (x
, 1);
3048 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3049 Return X or the rtx for the pseudo reg the value of X was copied into.
3050 OTHER must be valid as a SET_DEST. */
3053 make_safe_from (rtx x
, rtx other
)
3056 switch (GET_CODE (other
))
3059 other
= SUBREG_REG (other
);
3061 case STRICT_LOW_PART
:
3064 other
= XEXP (other
, 0);
3073 && GET_CODE (x
) != SUBREG
)
3075 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
3076 || reg_mentioned_p (other
, x
))))
3078 rtx temp
= gen_reg_rtx (GET_MODE (x
));
3079 emit_move_insn (temp
, x
);
3085 /* Emission of insns (adding them to the doubly-linked list). */
3087 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3090 get_last_insn_anywhere (void)
3092 struct sequence_stack
*stack
;
3093 if (get_last_insn ())
3094 return get_last_insn ();
3095 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3096 if (stack
->last
!= 0)
3101 /* Return the first nonnote insn emitted in current sequence or current
3102 function. This routine looks inside SEQUENCEs. */
3105 get_first_nonnote_insn (void)
3107 rtx insn
= get_insns ();
3112 for (insn
= next_insn (insn
);
3113 insn
&& NOTE_P (insn
);
3114 insn
= next_insn (insn
))
3118 if (NONJUMP_INSN_P (insn
)
3119 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3120 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3127 /* Return the last nonnote insn emitted in current sequence or current
3128 function. This routine looks inside SEQUENCEs. */
3131 get_last_nonnote_insn (void)
3133 rtx insn
= get_last_insn ();
3138 for (insn
= previous_insn (insn
);
3139 insn
&& NOTE_P (insn
);
3140 insn
= previous_insn (insn
))
3144 if (NONJUMP_INSN_P (insn
)
3145 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3146 insn
= XVECEXP (PATTERN (insn
), 0,
3147 XVECLEN (PATTERN (insn
), 0) - 1);
3154 /* Return the number of actual (non-debug) insns emitted in this
3158 get_max_insn_count (void)
3160 int n
= cur_insn_uid
;
3162 /* The table size must be stable across -g, to avoid codegen
3163 differences due to debug insns, and not be affected by
3164 -fmin-insn-uid, to avoid excessive table size and to simplify
3165 debugging of -fcompare-debug failures. */
3166 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3167 n
-= cur_debug_insn_uid
;
3169 n
-= MIN_NONDEBUG_INSN_UID
;
3175 /* Return the next insn. If it is a SEQUENCE, return the first insn
3179 next_insn (rtx insn
)
3183 insn
= NEXT_INSN (insn
);
3184 if (insn
&& NONJUMP_INSN_P (insn
)
3185 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3186 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3192 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3196 previous_insn (rtx insn
)
3200 insn
= PREV_INSN (insn
);
3201 if (insn
&& NONJUMP_INSN_P (insn
)
3202 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3203 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
3209 /* Return the next insn after INSN that is not a NOTE. This routine does not
3210 look inside SEQUENCEs. */
3213 next_nonnote_insn (rtx insn
)
3217 insn
= NEXT_INSN (insn
);
3218 if (insn
== 0 || !NOTE_P (insn
))
3225 /* Return the next insn after INSN that is not a NOTE, but stop the
3226 search before we enter another basic block. This routine does not
3227 look inside SEQUENCEs. */
3230 next_nonnote_insn_bb (rtx insn
)
3234 insn
= NEXT_INSN (insn
);
3235 if (insn
== 0 || !NOTE_P (insn
))
3237 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3244 /* Return the previous insn before INSN that is not a NOTE. This routine does
3245 not look inside SEQUENCEs. */
3248 prev_nonnote_insn (rtx insn
)
3252 insn
= PREV_INSN (insn
);
3253 if (insn
== 0 || !NOTE_P (insn
))
3260 /* Return the previous insn before INSN that is not a NOTE, but stop
3261 the search before we enter another basic block. This routine does
3262 not look inside SEQUENCEs. */
3265 prev_nonnote_insn_bb (rtx insn
)
3269 insn
= PREV_INSN (insn
);
3270 if (insn
== 0 || !NOTE_P (insn
))
3272 if (NOTE_INSN_BASIC_BLOCK_P (insn
))
3279 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3280 routine does not look inside SEQUENCEs. */
3283 next_nondebug_insn (rtx insn
)
3287 insn
= NEXT_INSN (insn
);
3288 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3295 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3296 This routine does not look inside SEQUENCEs. */
3299 prev_nondebug_insn (rtx insn
)
3303 insn
= PREV_INSN (insn
);
3304 if (insn
== 0 || !DEBUG_INSN_P (insn
))
3311 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3312 This routine does not look inside SEQUENCEs. */
3315 next_nonnote_nondebug_insn (rtx insn
)
3319 insn
= NEXT_INSN (insn
);
3320 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3327 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3328 This routine does not look inside SEQUENCEs. */
3331 prev_nonnote_nondebug_insn (rtx insn
)
3335 insn
= PREV_INSN (insn
);
3336 if (insn
== 0 || (!NOTE_P (insn
) && !DEBUG_INSN_P (insn
)))
3343 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3344 or 0, if there is none. This routine does not look inside
3348 next_real_insn (rtx insn
)
3352 insn
= NEXT_INSN (insn
);
3353 if (insn
== 0 || INSN_P (insn
))
3360 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3361 or 0, if there is none. This routine does not look inside
3365 prev_real_insn (rtx insn
)
3369 insn
= PREV_INSN (insn
);
3370 if (insn
== 0 || INSN_P (insn
))
3377 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3378 This routine does not look inside SEQUENCEs. */
3381 last_call_insn (void)
3385 for (insn
= get_last_insn ();
3386 insn
&& !CALL_P (insn
);
3387 insn
= PREV_INSN (insn
))
3393 /* Find the next insn after INSN that really does something. This routine
3394 does not look inside SEQUENCEs. After reload this also skips over
3395 standalone USE and CLOBBER insn. */
3398 active_insn_p (const_rtx insn
)
3400 return (CALL_P (insn
) || JUMP_P (insn
)
3401 || JUMP_TABLE_DATA_P (insn
) /* FIXME */
3402 || (NONJUMP_INSN_P (insn
)
3403 && (! reload_completed
3404 || (GET_CODE (PATTERN (insn
)) != USE
3405 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3409 next_active_insn (rtx insn
)
3413 insn
= NEXT_INSN (insn
);
3414 if (insn
== 0 || active_insn_p (insn
))
3421 /* Find the last insn before INSN that really does something. This routine
3422 does not look inside SEQUENCEs. After reload this also skips over
3423 standalone USE and CLOBBER insn. */
3426 prev_active_insn (rtx insn
)
3430 insn
= PREV_INSN (insn
);
3431 if (insn
== 0 || active_insn_p (insn
))
3439 /* Return the next insn that uses CC0 after INSN, which is assumed to
3440 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3441 applied to the result of this function should yield INSN).
3443 Normally, this is simply the next insn. However, if a REG_CC_USER note
3444 is present, it contains the insn that uses CC0.
3446 Return 0 if we can't find the insn. */
3449 next_cc0_user (rtx insn
)
3451 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3454 return XEXP (note
, 0);
3456 insn
= next_nonnote_insn (insn
);
3457 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3458 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3460 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3466 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3467 note, it is the previous insn. */
3470 prev_cc0_setter (rtx insn
)
3472 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3475 return XEXP (note
, 0);
3477 insn
= prev_nonnote_insn (insn
);
3478 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3485 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3488 find_auto_inc (rtx
*xp
, void *data
)
3491 rtx reg
= (rtx
) data
;
3493 if (GET_RTX_CLASS (GET_CODE (x
)) != RTX_AUTOINC
)
3496 switch (GET_CODE (x
))
3504 if (rtx_equal_p (reg
, XEXP (x
, 0)))
3515 /* Increment the label uses for all labels present in rtx. */
3518 mark_label_nuses (rtx x
)
3524 code
= GET_CODE (x
);
3525 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3526 LABEL_NUSES (XEXP (x
, 0))++;
3528 fmt
= GET_RTX_FORMAT (code
);
3529 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3532 mark_label_nuses (XEXP (x
, i
));
3533 else if (fmt
[i
] == 'E')
3534 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3535 mark_label_nuses (XVECEXP (x
, i
, j
));
3540 /* Try splitting insns that can be split for better scheduling.
3541 PAT is the pattern which might split.
3542 TRIAL is the insn providing PAT.
3543 LAST is nonzero if we should return the last insn of the sequence produced.
3545 If this routine succeeds in splitting, it returns the first or last
3546 replacement insn depending on the value of LAST. Otherwise, it
3547 returns TRIAL. If the insn to be returned can be split, it will be. */
3550 try_split (rtx pat
, rtx trial
, int last
)
3552 rtx before
= PREV_INSN (trial
);
3553 rtx after
= NEXT_INSN (trial
);
3554 int has_barrier
= 0;
3557 rtx insn_last
, insn
;
3560 /* We're not good at redistributing frame information. */
3561 if (RTX_FRAME_RELATED_P (trial
))
3564 if (any_condjump_p (trial
)
3565 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3566 split_branch_probability
= XINT (note
, 0);
3567 probability
= split_branch_probability
;
3569 seq
= split_insns (pat
, trial
);
3571 split_branch_probability
= -1;
3573 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3574 We may need to handle this specially. */
3575 if (after
&& BARRIER_P (after
))
3578 after
= NEXT_INSN (after
);
3584 /* Avoid infinite loop if any insn of the result matches
3585 the original pattern. */
3589 if (INSN_P (insn_last
)
3590 && rtx_equal_p (PATTERN (insn_last
), pat
))
3592 if (!NEXT_INSN (insn_last
))
3594 insn_last
= NEXT_INSN (insn_last
);
3597 /* We will be adding the new sequence to the function. The splitters
3598 may have introduced invalid RTL sharing, so unshare the sequence now. */
3599 unshare_all_rtl_in_chain (seq
);
3602 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3606 mark_jump_label (PATTERN (insn
), insn
, 0);
3608 if (probability
!= -1
3609 && any_condjump_p (insn
)
3610 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3612 /* We can preserve the REG_BR_PROB notes only if exactly
3613 one jump is created, otherwise the machine description
3614 is responsible for this step using
3615 split_branch_probability variable. */
3616 gcc_assert (njumps
== 1);
3617 add_int_reg_note (insn
, REG_BR_PROB
, probability
);
3622 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3623 in SEQ and copy any additional information across. */
3626 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3631 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3632 target may have explicitly specified. */
3633 p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3636 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3638 /* If the old call was a sibling call, the new one must
3640 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3642 /* If the new call is the last instruction in the sequence,
3643 it will effectively replace the old call in-situ. Otherwise
3644 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3645 so that it comes immediately after the new call. */
3646 if (NEXT_INSN (insn
))
3647 for (next
= NEXT_INSN (trial
);
3648 next
&& NOTE_P (next
);
3649 next
= NEXT_INSN (next
))
3650 if (NOTE_KIND (next
) == NOTE_INSN_CALL_ARG_LOCATION
)
3653 add_insn_after (next
, insn
, NULL
);
3659 /* Copy notes, particularly those related to the CFG. */
3660 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3662 switch (REG_NOTE_KIND (note
))
3665 copy_reg_eh_region_note_backward (note
, insn_last
, NULL
);
3671 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3674 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3678 case REG_NON_LOCAL_GOTO
:
3679 case REG_CROSSING_JUMP
:
3680 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3683 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
3689 for (insn
= insn_last
; insn
!= NULL_RTX
; insn
= PREV_INSN (insn
))
3691 rtx reg
= XEXP (note
, 0);
3692 if (!FIND_REG_INC_NOTE (insn
, reg
)
3693 && for_each_rtx (&PATTERN (insn
), find_auto_inc
, reg
) > 0)
3694 add_reg_note (insn
, REG_INC
, reg
);
3700 fixup_args_size_notes (NULL_RTX
, insn_last
, INTVAL (XEXP (note
, 0)));
3708 /* If there are LABELS inside the split insns increment the
3709 usage count so we don't delete the label. */
3713 while (insn
!= NULL_RTX
)
3715 /* JUMP_P insns have already been "marked" above. */
3716 if (NONJUMP_INSN_P (insn
))
3717 mark_label_nuses (PATTERN (insn
));
3719 insn
= PREV_INSN (insn
);
3723 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATION (trial
));
3725 delete_insn (trial
);
3727 emit_barrier_after (tem
);
3729 /* Recursively call try_split for each new insn created; by the
3730 time control returns here that insn will be fully split, so
3731 set LAST and continue from the insn after the one returned.
3732 We can't use next_active_insn here since AFTER may be a note.
3733 Ignore deleted insns, which can be occur if not optimizing. */
3734 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3735 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3736 tem
= try_split (PATTERN (tem
), tem
, 1);
3738 /* Return either the first or the last insn, depending on which was
3741 ? (after
? PREV_INSN (after
) : get_last_insn ())
3742 : NEXT_INSN (before
);
3745 /* Make and return an INSN rtx, initializing all its slots.
3746 Store PATTERN in the pattern slots. */
3749 make_insn_raw (rtx pattern
)
3753 insn
= rtx_alloc (INSN
);
3755 INSN_UID (insn
) = cur_insn_uid
++;
3756 PATTERN (insn
) = pattern
;
3757 INSN_CODE (insn
) = -1;
3758 REG_NOTES (insn
) = NULL
;
3759 INSN_LOCATION (insn
) = curr_insn_location ();
3760 BLOCK_FOR_INSN (insn
) = NULL
;
3762 #ifdef ENABLE_RTL_CHECKING
3765 && (returnjump_p (insn
)
3766 || (GET_CODE (insn
) == SET
3767 && SET_DEST (insn
) == pc_rtx
)))
3769 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3777 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3780 make_debug_insn_raw (rtx pattern
)
3784 insn
= rtx_alloc (DEBUG_INSN
);
3785 INSN_UID (insn
) = cur_debug_insn_uid
++;
3786 if (cur_debug_insn_uid
> MIN_NONDEBUG_INSN_UID
)
3787 INSN_UID (insn
) = cur_insn_uid
++;
3789 PATTERN (insn
) = pattern
;
3790 INSN_CODE (insn
) = -1;
3791 REG_NOTES (insn
) = NULL
;
3792 INSN_LOCATION (insn
) = curr_insn_location ();
3793 BLOCK_FOR_INSN (insn
) = NULL
;
3798 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3801 make_jump_insn_raw (rtx pattern
)
3805 insn
= rtx_alloc (JUMP_INSN
);
3806 INSN_UID (insn
) = cur_insn_uid
++;
3808 PATTERN (insn
) = pattern
;
3809 INSN_CODE (insn
) = -1;
3810 REG_NOTES (insn
) = NULL
;
3811 JUMP_LABEL (insn
) = NULL
;
3812 INSN_LOCATION (insn
) = curr_insn_location ();
3813 BLOCK_FOR_INSN (insn
) = NULL
;
3818 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3821 make_call_insn_raw (rtx pattern
)
3825 insn
= rtx_alloc (CALL_INSN
);
3826 INSN_UID (insn
) = cur_insn_uid
++;
3828 PATTERN (insn
) = pattern
;
3829 INSN_CODE (insn
) = -1;
3830 REG_NOTES (insn
) = NULL
;
3831 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3832 INSN_LOCATION (insn
) = curr_insn_location ();
3833 BLOCK_FOR_INSN (insn
) = NULL
;
3838 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3841 make_note_raw (enum insn_note subtype
)
3843 /* Some notes are never created this way at all. These notes are
3844 only created by patching out insns. */
3845 gcc_assert (subtype
!= NOTE_INSN_DELETED_LABEL
3846 && subtype
!= NOTE_INSN_DELETED_DEBUG_LABEL
);
3848 rtx note
= rtx_alloc (NOTE
);
3849 INSN_UID (note
) = cur_insn_uid
++;
3850 NOTE_KIND (note
) = subtype
;
3851 BLOCK_FOR_INSN (note
) = NULL
;
3852 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
3856 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3857 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3858 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3861 link_insn_into_chain (rtx insn
, rtx prev
, rtx next
)
3863 PREV_INSN (insn
) = prev
;
3864 NEXT_INSN (insn
) = next
;
3867 NEXT_INSN (prev
) = insn
;
3868 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3870 rtx sequence
= PATTERN (prev
);
3871 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3876 PREV_INSN (next
) = insn
;
3877 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3878 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3881 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3883 rtx sequence
= PATTERN (insn
);
3884 PREV_INSN (XVECEXP (sequence
, 0, 0)) = prev
;
3885 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3889 /* Add INSN to the end of the doubly-linked list.
3890 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3895 rtx prev
= get_last_insn ();
3896 link_insn_into_chain (insn
, prev
, NULL
);
3897 if (NULL
== get_insns ())
3898 set_first_insn (insn
);
3899 set_last_insn (insn
);
3902 /* Add INSN into the doubly-linked list after insn AFTER. */
3905 add_insn_after_nobb (rtx insn
, rtx after
)
3907 rtx next
= NEXT_INSN (after
);
3909 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3911 link_insn_into_chain (insn
, after
, next
);
3915 if (get_last_insn () == after
)
3916 set_last_insn (insn
);
3919 struct sequence_stack
*stack
= seq_stack
;
3920 /* Scan all pending sequences too. */
3921 for (; stack
; stack
= stack
->next
)
3922 if (after
== stack
->last
)
3931 /* Add INSN into the doubly-linked list before insn BEFORE. */
3934 add_insn_before_nobb (rtx insn
, rtx before
)
3936 rtx prev
= PREV_INSN (before
);
3938 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3940 link_insn_into_chain (insn
, prev
, before
);
3944 if (get_insns () == before
)
3945 set_first_insn (insn
);
3948 struct sequence_stack
*stack
= seq_stack
;
3949 /* Scan all pending sequences too. */
3950 for (; stack
; stack
= stack
->next
)
3951 if (before
== stack
->first
)
3953 stack
->first
= insn
;
3962 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
3963 If BB is NULL, an attempt is made to infer the bb from before.
3965 This and the next function should be the only functions called
3966 to insert an insn once delay slots have been filled since only
3967 they know how to update a SEQUENCE. */
3970 add_insn_after (rtx insn
, rtx after
, basic_block bb
)
3972 add_insn_after_nobb (insn
, after
);
3973 if (!BARRIER_P (after
)
3974 && !BARRIER_P (insn
)
3975 && (bb
= BLOCK_FOR_INSN (after
)))
3977 set_block_for_insn (insn
, bb
);
3979 df_insn_rescan (insn
);
3980 /* Should not happen as first in the BB is always
3981 either NOTE or LABEL. */
3982 if (BB_END (bb
) == after
3983 /* Avoid clobbering of structure when creating new BB. */
3984 && !BARRIER_P (insn
)
3985 && !NOTE_INSN_BASIC_BLOCK_P (insn
))
3990 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
3991 If BB is NULL, an attempt is made to infer the bb from before.
3993 This and the previous function should be the only functions called
3994 to insert an insn once delay slots have been filled since only
3995 they know how to update a SEQUENCE. */
3998 add_insn_before (rtx insn
, rtx before
, basic_block bb
)
4000 add_insn_before_nobb (insn
, before
);
4003 && !BARRIER_P (before
)
4004 && !BARRIER_P (insn
))
4005 bb
= BLOCK_FOR_INSN (before
);
4009 set_block_for_insn (insn
, bb
);
4011 df_insn_rescan (insn
);
4012 /* Should not happen as first in the BB is always either NOTE or
4014 gcc_assert (BB_HEAD (bb
) != insn
4015 /* Avoid clobbering of structure when creating new BB. */
4017 || NOTE_INSN_BASIC_BLOCK_P (insn
));
4021 /* Replace insn with an deleted instruction note. */
4024 set_insn_deleted (rtx insn
)
4027 df_insn_delete (insn
);
4028 PUT_CODE (insn
, NOTE
);
4029 NOTE_KIND (insn
) = NOTE_INSN_DELETED
;
4033 /* Unlink INSN from the insn chain.
4035 This function knows how to handle sequences.
4037 This function does not invalidate data flow information associated with
4038 INSN (i.e. does not call df_insn_delete). That makes this function
4039 usable for only disconnecting an insn from the chain, and re-emit it
4042 To later insert INSN elsewhere in the insn chain via add_insn and
4043 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4044 the caller. Nullifying them here breaks many insn chain walks.
4046 To really delete an insn and related DF information, use delete_insn. */
4049 remove_insn (rtx insn
)
4051 rtx next
= NEXT_INSN (insn
);
4052 rtx prev
= PREV_INSN (insn
);
4057 NEXT_INSN (prev
) = next
;
4058 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
4060 rtx sequence
= PATTERN (prev
);
4061 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
4064 else if (get_insns () == insn
)
4067 PREV_INSN (next
) = NULL
;
4068 set_first_insn (next
);
4072 struct sequence_stack
*stack
= seq_stack
;
4073 /* Scan all pending sequences too. */
4074 for (; stack
; stack
= stack
->next
)
4075 if (insn
== stack
->first
)
4077 stack
->first
= next
;
4086 PREV_INSN (next
) = prev
;
4087 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
4088 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
4090 else if (get_last_insn () == insn
)
4091 set_last_insn (prev
);
4094 struct sequence_stack
*stack
= seq_stack
;
4095 /* Scan all pending sequences too. */
4096 for (; stack
; stack
= stack
->next
)
4097 if (insn
== stack
->last
)
4106 /* Fix up basic block boundaries, if necessary. */
4107 if (!BARRIER_P (insn
)
4108 && (bb
= BLOCK_FOR_INSN (insn
)))
4110 if (BB_HEAD (bb
) == insn
)
4112 /* Never ever delete the basic block note without deleting whole
4114 gcc_assert (!NOTE_P (insn
));
4115 BB_HEAD (bb
) = next
;
4117 if (BB_END (bb
) == insn
)
4122 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4125 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
4127 gcc_assert (call_insn
&& CALL_P (call_insn
));
4129 /* Put the register usage information on the CALL. If there is already
4130 some usage information, put ours at the end. */
4131 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
4135 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
4136 link
= XEXP (link
, 1))
4139 XEXP (link
, 1) = call_fusage
;
4142 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
4145 /* Delete all insns made since FROM.
4146 FROM becomes the new last instruction. */
4149 delete_insns_since (rtx from
)
4154 NEXT_INSN (from
) = 0;
4155 set_last_insn (from
);
4158 /* This function is deprecated, please use sequences instead.
4160 Move a consecutive bunch of insns to a different place in the chain.
4161 The insns to be moved are those between FROM and TO.
4162 They are moved to a new position after the insn AFTER.
4163 AFTER must not be FROM or TO or any insn in between.
4165 This function does not know about SEQUENCEs and hence should not be
4166 called after delay-slot filling has been done. */
4169 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
4171 #ifdef ENABLE_CHECKING
4173 for (x
= from
; x
!= to
; x
= NEXT_INSN (x
))
4174 gcc_assert (after
!= x
);
4175 gcc_assert (after
!= to
);
4178 /* Splice this bunch out of where it is now. */
4179 if (PREV_INSN (from
))
4180 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
4182 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
4183 if (get_last_insn () == to
)
4184 set_last_insn (PREV_INSN (from
));
4185 if (get_insns () == from
)
4186 set_first_insn (NEXT_INSN (to
));
4188 /* Make the new neighbors point to it and it to them. */
4189 if (NEXT_INSN (after
))
4190 PREV_INSN (NEXT_INSN (after
)) = to
;
4192 NEXT_INSN (to
) = NEXT_INSN (after
);
4193 PREV_INSN (from
) = after
;
4194 NEXT_INSN (after
) = from
;
4195 if (after
== get_last_insn ())
4199 /* Same as function above, but take care to update BB boundaries. */
4201 reorder_insns (rtx from
, rtx to
, rtx after
)
4203 rtx prev
= PREV_INSN (from
);
4204 basic_block bb
, bb2
;
4206 reorder_insns_nobb (from
, to
, after
);
4208 if (!BARRIER_P (after
)
4209 && (bb
= BLOCK_FOR_INSN (after
)))
4212 df_set_bb_dirty (bb
);
4214 if (!BARRIER_P (from
)
4215 && (bb2
= BLOCK_FOR_INSN (from
)))
4217 if (BB_END (bb2
) == to
)
4218 BB_END (bb2
) = prev
;
4219 df_set_bb_dirty (bb2
);
4222 if (BB_END (bb
) == after
)
4225 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
4227 df_insn_change_bb (x
, bb
);
4232 /* Emit insn(s) of given code and pattern
4233 at a specified place within the doubly-linked list.
4235 All of the emit_foo global entry points accept an object
4236 X which is either an insn list or a PATTERN of a single
4239 There are thus a few canonical ways to generate code and
4240 emit it at a specific place in the instruction stream. For
4241 example, consider the instruction named SPOT and the fact that
4242 we would like to emit some instructions before SPOT. We might
4246 ... emit the new instructions ...
4247 insns_head = get_insns ();
4250 emit_insn_before (insns_head, SPOT);
4252 It used to be common to generate SEQUENCE rtl instead, but that
4253 is a relic of the past which no longer occurs. The reason is that
4254 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4255 generated would almost certainly die right after it was created. */
4258 emit_pattern_before_noloc (rtx x
, rtx before
, rtx last
, basic_block bb
,
4259 rtx (*make_raw
) (rtx
))
4263 gcc_assert (before
);
4268 switch (GET_CODE (x
))
4280 rtx next
= NEXT_INSN (insn
);
4281 add_insn_before (insn
, before
, bb
);
4287 #ifdef ENABLE_RTL_CHECKING
4294 last
= (*make_raw
) (x
);
4295 add_insn_before (last
, before
, bb
);
4302 /* Make X be output before the instruction BEFORE. */
4305 emit_insn_before_noloc (rtx x
, rtx before
, basic_block bb
)
4307 return emit_pattern_before_noloc (x
, before
, before
, bb
, make_insn_raw
);
4310 /* Make an instruction with body X and code JUMP_INSN
4311 and output it before the instruction BEFORE. */
4314 emit_jump_insn_before_noloc (rtx x
, rtx before
)
4316 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4317 make_jump_insn_raw
);
4320 /* Make an instruction with body X and code CALL_INSN
4321 and output it before the instruction BEFORE. */
4324 emit_call_insn_before_noloc (rtx x
, rtx before
)
4326 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4327 make_call_insn_raw
);
4330 /* Make an instruction with body X and code DEBUG_INSN
4331 and output it before the instruction BEFORE. */
4334 emit_debug_insn_before_noloc (rtx x
, rtx before
)
4336 return emit_pattern_before_noloc (x
, before
, NULL_RTX
, NULL
,
4337 make_debug_insn_raw
);
4340 /* Make an insn of code BARRIER
4341 and output it before the insn BEFORE. */
4344 emit_barrier_before (rtx before
)
4346 rtx insn
= rtx_alloc (BARRIER
);
4348 INSN_UID (insn
) = cur_insn_uid
++;
4350 add_insn_before (insn
, before
, NULL
);
4354 /* Emit the label LABEL before the insn BEFORE. */
4357 emit_label_before (rtx label
, rtx before
)
4359 gcc_checking_assert (INSN_UID (label
) == 0);
4360 INSN_UID (label
) = cur_insn_uid
++;
4361 add_insn_before (label
, before
, NULL
);
4365 /* Helper for emit_insn_after, handles lists of instructions
4369 emit_insn_after_1 (rtx first
, rtx after
, basic_block bb
)
4373 if (!bb
&& !BARRIER_P (after
))
4374 bb
= BLOCK_FOR_INSN (after
);
4378 df_set_bb_dirty (bb
);
4379 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4380 if (!BARRIER_P (last
))
4382 set_block_for_insn (last
, bb
);
4383 df_insn_rescan (last
);
4385 if (!BARRIER_P (last
))
4387 set_block_for_insn (last
, bb
);
4388 df_insn_rescan (last
);
4390 if (BB_END (bb
) == after
)
4394 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4397 after_after
= NEXT_INSN (after
);
4399 NEXT_INSN (after
) = first
;
4400 PREV_INSN (first
) = after
;
4401 NEXT_INSN (last
) = after_after
;
4403 PREV_INSN (after_after
) = last
;
4405 if (after
== get_last_insn ())
4406 set_last_insn (last
);
4412 emit_pattern_after_noloc (rtx x
, rtx after
, basic_block bb
,
4413 rtx (*make_raw
)(rtx
))
4422 switch (GET_CODE (x
))
4431 last
= emit_insn_after_1 (x
, after
, bb
);
4434 #ifdef ENABLE_RTL_CHECKING
4441 last
= (*make_raw
) (x
);
4442 add_insn_after (last
, after
, bb
);
4449 /* Make X be output after the insn AFTER and set the BB of insn. If
4450 BB is NULL, an attempt is made to infer the BB from AFTER. */
4453 emit_insn_after_noloc (rtx x
, rtx after
, basic_block bb
)
4455 return emit_pattern_after_noloc (x
, after
, bb
, make_insn_raw
);
4459 /* Make an insn of code JUMP_INSN with body X
4460 and output it after the insn AFTER. */
4463 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4465 return emit_pattern_after_noloc (x
, after
, NULL
, make_jump_insn_raw
);
4468 /* Make an instruction with body X and code CALL_INSN
4469 and output it after the instruction AFTER. */
4472 emit_call_insn_after_noloc (rtx x
, rtx after
)
4474 return emit_pattern_after_noloc (x
, after
, NULL
, make_call_insn_raw
);
4477 /* Make an instruction with body X and code CALL_INSN
4478 and output it after the instruction AFTER. */
4481 emit_debug_insn_after_noloc (rtx x
, rtx after
)
4483 return emit_pattern_after_noloc (x
, after
, NULL
, make_debug_insn_raw
);
4486 /* Make an insn of code BARRIER
4487 and output it after the insn AFTER. */
4490 emit_barrier_after (rtx after
)
4492 rtx insn
= rtx_alloc (BARRIER
);
4494 INSN_UID (insn
) = cur_insn_uid
++;
4496 add_insn_after (insn
, after
, NULL
);
4500 /* Emit the label LABEL after the insn AFTER. */
4503 emit_label_after (rtx label
, rtx after
)
4505 gcc_checking_assert (INSN_UID (label
) == 0);
4506 INSN_UID (label
) = cur_insn_uid
++;
4507 add_insn_after (label
, after
, NULL
);
4511 /* Notes require a bit of special handling: Some notes need to have their
4512 BLOCK_FOR_INSN set, others should never have it set, and some should
4513 have it set or clear depending on the context. */
4515 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4516 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4517 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4520 note_outside_basic_block_p (enum insn_note subtype
, bool on_bb_boundary_p
)
4524 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4525 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
4528 /* Notes for var tracking and EH region markers can appear between or
4529 inside basic blocks. If the caller is emitting on the basic block
4530 boundary, do not set BLOCK_FOR_INSN on the new note. */
4531 case NOTE_INSN_VAR_LOCATION
:
4532 case NOTE_INSN_CALL_ARG_LOCATION
:
4533 case NOTE_INSN_EH_REGION_BEG
:
4534 case NOTE_INSN_EH_REGION_END
:
4535 return on_bb_boundary_p
;
4537 /* Otherwise, BLOCK_FOR_INSN must be set. */
4543 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4546 emit_note_after (enum insn_note subtype
, rtx after
)
4548 rtx note
= make_note_raw (subtype
);
4549 basic_block bb
= BARRIER_P (after
) ? NULL
: BLOCK_FOR_INSN (after
);
4550 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_END (bb
) == after
);
4552 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4553 add_insn_after_nobb (note
, after
);
4555 add_insn_after (note
, after
, bb
);
4559 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4562 emit_note_before (enum insn_note subtype
, rtx before
)
4564 rtx note
= make_note_raw (subtype
);
4565 basic_block bb
= BARRIER_P (before
) ? NULL
: BLOCK_FOR_INSN (before
);
4566 bool on_bb_boundary_p
= (bb
!= NULL
&& BB_HEAD (bb
) == before
);
4568 if (note_outside_basic_block_p (subtype
, on_bb_boundary_p
))
4569 add_insn_before_nobb (note
, before
);
4571 add_insn_before (note
, before
, bb
);
4575 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4576 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4579 emit_pattern_after_setloc (rtx pattern
, rtx after
, int loc
,
4580 rtx (*make_raw
) (rtx
))
4582 rtx last
= emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4584 if (pattern
== NULL_RTX
|| !loc
)
4587 after
= NEXT_INSN (after
);
4590 if (active_insn_p (after
) && !INSN_LOCATION (after
))
4591 INSN_LOCATION (after
) = loc
;
4594 after
= NEXT_INSN (after
);
4599 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4600 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4604 emit_pattern_after (rtx pattern
, rtx after
, bool skip_debug_insns
,
4605 rtx (*make_raw
) (rtx
))
4609 if (skip_debug_insns
)
4610 while (DEBUG_INSN_P (prev
))
4611 prev
= PREV_INSN (prev
);
4614 return emit_pattern_after_setloc (pattern
, after
, INSN_LOCATION (prev
),
4617 return emit_pattern_after_noloc (pattern
, after
, NULL
, make_raw
);
4620 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4622 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4624 return emit_pattern_after_setloc (pattern
, after
, loc
, make_insn_raw
);
4627 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4629 emit_insn_after (rtx pattern
, rtx after
)
4631 return emit_pattern_after (pattern
, after
, true, make_insn_raw
);
4634 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4636 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4638 return emit_pattern_after_setloc (pattern
, after
, loc
, make_jump_insn_raw
);
4641 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4643 emit_jump_insn_after (rtx pattern
, rtx after
)
4645 return emit_pattern_after (pattern
, after
, true, make_jump_insn_raw
);
4648 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4650 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4652 return emit_pattern_after_setloc (pattern
, after
, loc
, make_call_insn_raw
);
4655 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4657 emit_call_insn_after (rtx pattern
, rtx after
)
4659 return emit_pattern_after (pattern
, after
, true, make_call_insn_raw
);
4662 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4664 emit_debug_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4666 return emit_pattern_after_setloc (pattern
, after
, loc
, make_debug_insn_raw
);
4669 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4671 emit_debug_insn_after (rtx pattern
, rtx after
)
4673 return emit_pattern_after (pattern
, after
, false, make_debug_insn_raw
);
4676 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4677 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4678 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4682 emit_pattern_before_setloc (rtx pattern
, rtx before
, int loc
, bool insnp
,
4683 rtx (*make_raw
) (rtx
))
4685 rtx first
= PREV_INSN (before
);
4686 rtx last
= emit_pattern_before_noloc (pattern
, before
,
4687 insnp
? before
: NULL_RTX
,
4690 if (pattern
== NULL_RTX
|| !loc
)
4694 first
= get_insns ();
4696 first
= NEXT_INSN (first
);
4699 if (active_insn_p (first
) && !INSN_LOCATION (first
))
4700 INSN_LOCATION (first
) = loc
;
4703 first
= NEXT_INSN (first
);
4708 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4709 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4710 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4711 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4714 emit_pattern_before (rtx pattern
, rtx before
, bool skip_debug_insns
,
4715 bool insnp
, rtx (*make_raw
) (rtx
))
4719 if (skip_debug_insns
)
4720 while (DEBUG_INSN_P (next
))
4721 next
= PREV_INSN (next
);
4724 return emit_pattern_before_setloc (pattern
, before
, INSN_LOCATION (next
),
4727 return emit_pattern_before_noloc (pattern
, before
,
4728 insnp
? before
: NULL_RTX
,
4732 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4734 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4736 return emit_pattern_before_setloc (pattern
, before
, loc
, true,
4740 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4742 emit_insn_before (rtx pattern
, rtx before
)
4744 return emit_pattern_before (pattern
, before
, true, true, make_insn_raw
);
4747 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4749 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4751 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4752 make_jump_insn_raw
);
4755 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4757 emit_jump_insn_before (rtx pattern
, rtx before
)
4759 return emit_pattern_before (pattern
, before
, true, false,
4760 make_jump_insn_raw
);
4763 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4765 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4767 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4768 make_call_insn_raw
);
4771 /* Like emit_call_insn_before_noloc,
4772 but set insn_location according to BEFORE. */
4774 emit_call_insn_before (rtx pattern
, rtx before
)
4776 return emit_pattern_before (pattern
, before
, true, false,
4777 make_call_insn_raw
);
4780 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4782 emit_debug_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4784 return emit_pattern_before_setloc (pattern
, before
, loc
, false,
4785 make_debug_insn_raw
);
4788 /* Like emit_debug_insn_before_noloc,
4789 but set insn_location according to BEFORE. */
4791 emit_debug_insn_before (rtx pattern
, rtx before
)
4793 return emit_pattern_before (pattern
, before
, false, false,
4794 make_debug_insn_raw
);
4797 /* Take X and emit it at the end of the doubly-linked
4800 Returns the last insn emitted. */
4805 rtx last
= get_last_insn ();
4811 switch (GET_CODE (x
))
4823 rtx next
= NEXT_INSN (insn
);
4830 #ifdef ENABLE_RTL_CHECKING
4831 case JUMP_TABLE_DATA
:
4838 last
= make_insn_raw (x
);
4846 /* Make an insn of code DEBUG_INSN with pattern X
4847 and add it to the end of the doubly-linked list. */
4850 emit_debug_insn (rtx x
)
4852 rtx last
= get_last_insn ();
4858 switch (GET_CODE (x
))
4870 rtx next
= NEXT_INSN (insn
);
4877 #ifdef ENABLE_RTL_CHECKING
4878 case JUMP_TABLE_DATA
:
4885 last
= make_debug_insn_raw (x
);
4893 /* Make an insn of code JUMP_INSN with pattern X
4894 and add it to the end of the doubly-linked list. */
4897 emit_jump_insn (rtx x
)
4899 rtx last
= NULL_RTX
, insn
;
4901 switch (GET_CODE (x
))
4913 rtx next
= NEXT_INSN (insn
);
4920 #ifdef ENABLE_RTL_CHECKING
4921 case JUMP_TABLE_DATA
:
4928 last
= make_jump_insn_raw (x
);
4936 /* Make an insn of code CALL_INSN with pattern X
4937 and add it to the end of the doubly-linked list. */
4940 emit_call_insn (rtx x
)
4944 switch (GET_CODE (x
))
4953 insn
= emit_insn (x
);
4956 #ifdef ENABLE_RTL_CHECKING
4958 case JUMP_TABLE_DATA
:
4964 insn
= make_call_insn_raw (x
);
4972 /* Add the label LABEL to the end of the doubly-linked list. */
4975 emit_label (rtx label
)
4977 gcc_checking_assert (INSN_UID (label
) == 0);
4978 INSN_UID (label
) = cur_insn_uid
++;
4983 /* Make an insn of code JUMP_TABLE_DATA
4984 and add it to the end of the doubly-linked list. */
4987 emit_jump_table_data (rtx table
)
4989 rtx jump_table_data
= rtx_alloc (JUMP_TABLE_DATA
);
4990 INSN_UID (jump_table_data
) = cur_insn_uid
++;
4991 PATTERN (jump_table_data
) = table
;
4992 BLOCK_FOR_INSN (jump_table_data
) = NULL
;
4993 add_insn (jump_table_data
);
4994 return jump_table_data
;
4997 /* Make an insn of code BARRIER
4998 and add it to the end of the doubly-linked list. */
5003 rtx barrier
= rtx_alloc (BARRIER
);
5004 INSN_UID (barrier
) = cur_insn_uid
++;
5009 /* Emit a copy of note ORIG. */
5012 emit_note_copy (rtx orig
)
5014 enum insn_note kind
= (enum insn_note
) NOTE_KIND (orig
);
5015 rtx note
= make_note_raw (kind
);
5016 NOTE_DATA (note
) = NOTE_DATA (orig
);
5021 /* Make an insn of code NOTE or type NOTE_NO
5022 and add it to the end of the doubly-linked list. */
5025 emit_note (enum insn_note kind
)
5027 rtx note
= make_note_raw (kind
);
5032 /* Emit a clobber of lvalue X. */
5035 emit_clobber (rtx x
)
5037 /* CONCATs should not appear in the insn stream. */
5038 if (GET_CODE (x
) == CONCAT
)
5040 emit_clobber (XEXP (x
, 0));
5041 return emit_clobber (XEXP (x
, 1));
5043 return emit_insn (gen_rtx_CLOBBER (VOIDmode
, x
));
5046 /* Return a sequence of insns to clobber lvalue X. */
5060 /* Emit a use of rvalue X. */
5065 /* CONCATs should not appear in the insn stream. */
5066 if (GET_CODE (x
) == CONCAT
)
5068 emit_use (XEXP (x
, 0));
5069 return emit_use (XEXP (x
, 1));
5071 return emit_insn (gen_rtx_USE (VOIDmode
, x
));
5074 /* Return a sequence of insns to use rvalue X. */
5088 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5089 note of this type already exists, remove it first. */
5092 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
5094 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
5100 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5101 has multiple sets (some callers assume single_set
5102 means the insn only has one set, when in fact it
5103 means the insn only has one * useful * set). */
5104 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
5110 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5111 It serves no useful purpose and breaks eliminate_regs. */
5112 if (GET_CODE (datum
) == ASM_OPERANDS
)
5117 XEXP (note
, 0) = datum
;
5118 df_notes_rescan (insn
);
5126 XEXP (note
, 0) = datum
;
5132 add_reg_note (insn
, kind
, datum
);
5138 df_notes_rescan (insn
);
5144 return REG_NOTES (insn
);
5147 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5149 set_dst_reg_note (rtx insn
, enum reg_note kind
, rtx datum
, rtx dst
)
5151 rtx set
= single_set (insn
);
5153 if (set
&& SET_DEST (set
) == dst
)
5154 return set_unique_reg_note (insn
, kind
, datum
);
5158 /* Return an indication of which type of insn should have X as a body.
5159 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5161 static enum rtx_code
5162 classify_insn (rtx x
)
5166 if (GET_CODE (x
) == CALL
)
5168 if (ANY_RETURN_P (x
))
5170 if (GET_CODE (x
) == SET
)
5172 if (SET_DEST (x
) == pc_rtx
)
5174 else if (GET_CODE (SET_SRC (x
)) == CALL
)
5179 if (GET_CODE (x
) == PARALLEL
)
5182 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
5183 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
5185 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5186 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
5188 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
5189 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
5195 /* Emit the rtl pattern X as an appropriate kind of insn.
5196 If X is a label, it is simply added into the insn chain. */
5201 enum rtx_code code
= classify_insn (x
);
5206 return emit_label (x
);
5208 return emit_insn (x
);
5211 rtx insn
= emit_jump_insn (x
);
5212 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
5213 return emit_barrier ();
5217 return emit_call_insn (x
);
5219 return emit_debug_insn (x
);
5225 /* Space for free sequence stack entries. */
5226 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
5228 /* Begin emitting insns to a sequence. If this sequence will contain
5229 something that might cause the compiler to pop arguments to function
5230 calls (because those pops have previously been deferred; see
5231 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5232 before calling this function. That will ensure that the deferred
5233 pops are not accidentally emitted in the middle of this sequence. */
5236 start_sequence (void)
5238 struct sequence_stack
*tem
;
5240 if (free_sequence_stack
!= NULL
)
5242 tem
= free_sequence_stack
;
5243 free_sequence_stack
= tem
->next
;
5246 tem
= ggc_alloc_sequence_stack ();
5248 tem
->next
= seq_stack
;
5249 tem
->first
= get_insns ();
5250 tem
->last
= get_last_insn ();
5258 /* Set up the insn chain starting with FIRST as the current sequence,
5259 saving the previously current one. See the documentation for
5260 start_sequence for more information about how to use this function. */
5263 push_to_sequence (rtx first
)
5269 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
))
5272 set_first_insn (first
);
5273 set_last_insn (last
);
5276 /* Like push_to_sequence, but take the last insn as an argument to avoid
5277 looping through the list. */
5280 push_to_sequence2 (rtx first
, rtx last
)
5284 set_first_insn (first
);
5285 set_last_insn (last
);
5288 /* Set up the outer-level insn chain
5289 as the current sequence, saving the previously current one. */
5292 push_topmost_sequence (void)
5294 struct sequence_stack
*stack
, *top
= NULL
;
5298 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5301 set_first_insn (top
->first
);
5302 set_last_insn (top
->last
);
5305 /* After emitting to the outer-level insn chain, update the outer-level
5306 insn chain, and restore the previous saved state. */
5309 pop_topmost_sequence (void)
5311 struct sequence_stack
*stack
, *top
= NULL
;
5313 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
5316 top
->first
= get_insns ();
5317 top
->last
= get_last_insn ();
5322 /* After emitting to a sequence, restore previous saved state.
5324 To get the contents of the sequence just made, you must call
5325 `get_insns' *before* calling here.
5327 If the compiler might have deferred popping arguments while
5328 generating this sequence, and this sequence will not be immediately
5329 inserted into the instruction stream, use do_pending_stack_adjust
5330 before calling get_insns. That will ensure that the deferred
5331 pops are inserted into this sequence, and not into some random
5332 location in the instruction stream. See INHIBIT_DEFER_POP for more
5333 information about deferred popping of arguments. */
5338 struct sequence_stack
*tem
= seq_stack
;
5340 set_first_insn (tem
->first
);
5341 set_last_insn (tem
->last
);
5342 seq_stack
= tem
->next
;
5344 memset (tem
, 0, sizeof (*tem
));
5345 tem
->next
= free_sequence_stack
;
5346 free_sequence_stack
= tem
;
5349 /* Return 1 if currently emitting into a sequence. */
5352 in_sequence_p (void)
5354 return seq_stack
!= 0;
5357 /* Put the various virtual registers into REGNO_REG_RTX. */
5360 init_virtual_regs (void)
5362 regno_reg_rtx
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
5363 regno_reg_rtx
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
5364 regno_reg_rtx
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
5365 regno_reg_rtx
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
5366 regno_reg_rtx
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5367 regno_reg_rtx
[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
]
5368 = virtual_preferred_stack_boundary_rtx
;
5372 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5373 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5374 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5375 static int copy_insn_n_scratches
;
5377 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5378 copied an ASM_OPERANDS.
5379 In that case, it is the original input-operand vector. */
5380 static rtvec orig_asm_operands_vector
;
5382 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5383 copied an ASM_OPERANDS.
5384 In that case, it is the copied input-operand vector. */
5385 static rtvec copy_asm_operands_vector
;
5387 /* Likewise for the constraints vector. */
5388 static rtvec orig_asm_constraints_vector
;
5389 static rtvec copy_asm_constraints_vector
;
5391 /* Recursively create a new copy of an rtx for copy_insn.
5392 This function differs from copy_rtx in that it handles SCRATCHes and
5393 ASM_OPERANDs properly.
5394 Normally, this function is not used directly; use copy_insn as front end.
5395 However, you could first copy an insn pattern with copy_insn and then use
5396 this function afterwards to properly copy any REG_NOTEs containing
5400 copy_insn_1 (rtx orig
)
5405 const char *format_ptr
;
5410 code
= GET_CODE (orig
);
5425 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5426 clobbers or clobbers of hard registers that originated as pseudos.
5427 This is needed to allow safe register renaming. */
5428 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
5429 && ORIGINAL_REGNO (XEXP (orig
, 0)) == REGNO (XEXP (orig
, 0)))
5434 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5435 if (copy_insn_scratch_in
[i
] == orig
)
5436 return copy_insn_scratch_out
[i
];
5440 if (shared_const_p (orig
))
5444 /* A MEM with a constant address is not sharable. The problem is that
5445 the constant address may need to be reloaded. If the mem is shared,
5446 then reloading one copy of this mem will cause all copies to appear
5447 to have been reloaded. */
5453 /* Copy the various flags, fields, and other information. We assume
5454 that all fields need copying, and then clear the fields that should
5455 not be copied. That is the sensible default behavior, and forces
5456 us to explicitly document why we are *not* copying a flag. */
5457 copy
= shallow_copy_rtx (orig
);
5459 /* We do not copy the USED flag, which is used as a mark bit during
5460 walks over the RTL. */
5461 RTX_FLAG (copy
, used
) = 0;
5463 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5466 RTX_FLAG (copy
, jump
) = 0;
5467 RTX_FLAG (copy
, call
) = 0;
5468 RTX_FLAG (copy
, frame_related
) = 0;
5471 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5473 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5474 switch (*format_ptr
++)
5477 if (XEXP (orig
, i
) != NULL
)
5478 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5483 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5484 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5485 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5486 XVEC (copy
, i
) = copy_asm_operands_vector
;
5487 else if (XVEC (orig
, i
) != NULL
)
5489 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5490 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5491 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5502 /* These are left unchanged. */
5509 if (code
== SCRATCH
)
5511 i
= copy_insn_n_scratches
++;
5512 gcc_assert (i
< MAX_RECOG_OPERANDS
);
5513 copy_insn_scratch_in
[i
] = orig
;
5514 copy_insn_scratch_out
[i
] = copy
;
5516 else if (code
== ASM_OPERANDS
)
5518 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5519 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5520 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5521 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5527 /* Create a new copy of an rtx.
5528 This function differs from copy_rtx in that it handles SCRATCHes and
5529 ASM_OPERANDs properly.
5530 INSN doesn't really have to be a full INSN; it could be just the
5533 copy_insn (rtx insn
)
5535 copy_insn_n_scratches
= 0;
5536 orig_asm_operands_vector
= 0;
5537 orig_asm_constraints_vector
= 0;
5538 copy_asm_operands_vector
= 0;
5539 copy_asm_constraints_vector
= 0;
5540 return copy_insn_1 (insn
);
5543 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5544 on that assumption that INSN itself remains in its original place. */
5547 copy_delay_slot_insn (rtx insn
)
5549 /* Copy INSN with its rtx_code, all its notes, location etc. */
5550 insn
= copy_rtx (insn
);
5551 INSN_UID (insn
) = cur_insn_uid
++;
5555 /* Initialize data structures and variables in this file
5556 before generating rtl for each function. */
5561 set_first_insn (NULL
);
5562 set_last_insn (NULL
);
5563 if (MIN_NONDEBUG_INSN_UID
)
5564 cur_insn_uid
= MIN_NONDEBUG_INSN_UID
;
5567 cur_debug_insn_uid
= 1;
5568 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5569 first_label_num
= label_num
;
5572 /* Init the tables that describe all the pseudo regs. */
5574 crtl
->emit
.regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5576 crtl
->emit
.regno_pointer_align
5577 = XCNEWVEC (unsigned char, crtl
->emit
.regno_pointer_align_length
);
5579 regno_reg_rtx
= ggc_alloc_vec_rtx (crtl
->emit
.regno_pointer_align_length
);
5581 /* Put copies of all the hard registers into regno_reg_rtx. */
5582 memcpy (regno_reg_rtx
,
5583 initial_regno_reg_rtx
,
5584 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5586 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5587 init_virtual_regs ();
5589 /* Indicate that the virtual registers and stack locations are
5591 REG_POINTER (stack_pointer_rtx
) = 1;
5592 REG_POINTER (frame_pointer_rtx
) = 1;
5593 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5594 REG_POINTER (arg_pointer_rtx
) = 1;
5596 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5597 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5598 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5599 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5600 REG_POINTER (virtual_cfa_rtx
) = 1;
5602 #ifdef STACK_BOUNDARY
5603 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5604 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5605 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5606 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5608 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5609 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5610 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5611 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5612 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5615 #ifdef INIT_EXPANDERS
5620 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5623 gen_const_vector (enum machine_mode mode
, int constant
)
5628 enum machine_mode inner
;
5630 units
= GET_MODE_NUNITS (mode
);
5631 inner
= GET_MODE_INNER (mode
);
5633 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner
));
5635 v
= rtvec_alloc (units
);
5637 /* We need to call this function after we set the scalar const_tiny_rtx
5639 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5641 for (i
= 0; i
< units
; ++i
)
5642 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5644 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5648 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5649 all elements are zero, and the one vector when all elements are one. */
5651 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5653 enum machine_mode inner
= GET_MODE_INNER (mode
);
5654 int nunits
= GET_MODE_NUNITS (mode
);
5658 /* Check to see if all of the elements have the same value. */
5659 x
= RTVEC_ELT (v
, nunits
- 1);
5660 for (i
= nunits
- 2; i
>= 0; i
--)
5661 if (RTVEC_ELT (v
, i
) != x
)
5664 /* If the values are all the same, check to see if we can use one of the
5665 standard constant vectors. */
5668 if (x
== CONST0_RTX (inner
))
5669 return CONST0_RTX (mode
);
5670 else if (x
== CONST1_RTX (inner
))
5671 return CONST1_RTX (mode
);
5672 else if (x
== CONSTM1_RTX (inner
))
5673 return CONSTM1_RTX (mode
);
5676 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5679 /* Initialise global register information required by all functions. */
5682 init_emit_regs (void)
5685 enum machine_mode mode
;
5688 /* Reset register attributes */
5689 htab_empty (reg_attrs_htab
);
5691 /* We need reg_raw_mode, so initialize the modes now. */
5692 init_reg_modes_target ();
5694 /* Assign register numbers to the globally defined register rtx. */
5695 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5696 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5697 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
, HARD_FRAME_POINTER_REGNUM
);
5698 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5699 virtual_incoming_args_rtx
=
5700 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5701 virtual_stack_vars_rtx
=
5702 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5703 virtual_stack_dynamic_rtx
=
5704 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5705 virtual_outgoing_args_rtx
=
5706 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5707 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5708 virtual_preferred_stack_boundary_rtx
=
5709 gen_raw_REG (Pmode
, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM
);
5711 /* Initialize RTL for commonly used hard registers. These are
5712 copied into regno_reg_rtx as we begin to compile each function. */
5713 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5714 initial_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5716 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5717 return_address_pointer_rtx
5718 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5721 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5722 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5724 pic_offset_table_rtx
= NULL_RTX
;
5726 for (i
= 0; i
< (int) MAX_MACHINE_MODE
; i
++)
5728 mode
= (enum machine_mode
) i
;
5729 attrs
= ggc_alloc_cleared_mem_attrs ();
5730 attrs
->align
= BITS_PER_UNIT
;
5731 attrs
->addrspace
= ADDR_SPACE_GENERIC
;
5732 if (mode
!= BLKmode
)
5734 attrs
->size_known_p
= true;
5735 attrs
->size
= GET_MODE_SIZE (mode
);
5736 if (STRICT_ALIGNMENT
)
5737 attrs
->align
= GET_MODE_ALIGNMENT (mode
);
5739 mode_mem_attrs
[i
] = attrs
;
5743 /* Create some permanent unique rtl objects shared between all functions. */
5746 init_emit_once (void)
5749 enum machine_mode mode
;
5750 enum machine_mode double_mode
;
5752 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5753 CONST_FIXED, and memory attribute hash tables. */
5754 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5755 const_int_htab_eq
, NULL
);
5757 #if TARGET_SUPPORTS_WIDE_INT
5758 const_wide_int_htab
= htab_create_ggc (37, const_wide_int_htab_hash
,
5759 const_wide_int_htab_eq
, NULL
);
5761 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5762 const_double_htab_eq
, NULL
);
5764 const_fixed_htab
= htab_create_ggc (37, const_fixed_htab_hash
,
5765 const_fixed_htab_eq
, NULL
);
5767 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5768 mem_attrs_htab_eq
, NULL
);
5769 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5770 reg_attrs_htab_eq
, NULL
);
5772 /* Compute the word and byte modes. */
5774 byte_mode
= VOIDmode
;
5775 word_mode
= VOIDmode
;
5776 double_mode
= VOIDmode
;
5778 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5780 mode
= GET_MODE_WIDER_MODE (mode
))
5782 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5783 && byte_mode
== VOIDmode
)
5786 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5787 && word_mode
== VOIDmode
)
5791 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5793 mode
= GET_MODE_WIDER_MODE (mode
))
5795 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5796 && double_mode
== VOIDmode
)
5800 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5802 #ifdef INIT_EXPANDERS
5803 /* This is to initialize {init|mark|free}_machine_status before the first
5804 call to push_function_context_to. This is needed by the Chill front
5805 end which calls push_function_context_to before the first call to
5806 init_function_start. */
5810 /* Create the unique rtx's for certain rtx codes and operand values. */
5812 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5813 tries to use these variables. */
5814 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5815 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5816 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5818 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5819 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5820 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5822 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5824 real_from_integer (&dconst0
, double_mode
, 0, SIGNED
);
5825 real_from_integer (&dconst1
, double_mode
, 1, SIGNED
);
5826 real_from_integer (&dconst2
, double_mode
, 2, SIGNED
);
5831 dconsthalf
= dconst1
;
5832 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5834 for (i
= 0; i
< 3; i
++)
5836 const REAL_VALUE_TYPE
*const r
=
5837 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5839 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
5841 mode
= GET_MODE_WIDER_MODE (mode
))
5842 const_tiny_rtx
[i
][(int) mode
] =
5843 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5845 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT
);
5847 mode
= GET_MODE_WIDER_MODE (mode
))
5848 const_tiny_rtx
[i
][(int) mode
] =
5849 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5851 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5853 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5855 mode
= GET_MODE_WIDER_MODE (mode
))
5856 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5858 for (mode
= MIN_MODE_PARTIAL_INT
;
5859 mode
<= MAX_MODE_PARTIAL_INT
;
5860 mode
= (enum machine_mode
)((int)(mode
) + 1))
5861 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5864 const_tiny_rtx
[3][(int) VOIDmode
] = constm1_rtx
;
5866 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
5868 mode
= GET_MODE_WIDER_MODE (mode
))
5869 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5871 for (mode
= MIN_MODE_PARTIAL_INT
;
5872 mode
<= MAX_MODE_PARTIAL_INT
;
5873 mode
= (enum machine_mode
)((int)(mode
) + 1))
5874 const_tiny_rtx
[3][(int) mode
] = constm1_rtx
;
5876 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT
);
5878 mode
= GET_MODE_WIDER_MODE (mode
))
5880 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5881 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5884 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
5886 mode
= GET_MODE_WIDER_MODE (mode
))
5888 rtx inner
= const_tiny_rtx
[0][(int)GET_MODE_INNER (mode
)];
5889 const_tiny_rtx
[0][(int) mode
] = gen_rtx_CONCAT (mode
, inner
, inner
);
5892 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5894 mode
= GET_MODE_WIDER_MODE (mode
))
5896 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5897 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5898 const_tiny_rtx
[3][(int) mode
] = gen_const_vector (mode
, 3);
5901 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5903 mode
= GET_MODE_WIDER_MODE (mode
))
5905 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5906 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5909 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FRACT
);
5911 mode
= GET_MODE_WIDER_MODE (mode
))
5913 FCONST0 (mode
).data
.high
= 0;
5914 FCONST0 (mode
).data
.low
= 0;
5915 FCONST0 (mode
).mode
= mode
;
5916 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5917 FCONST0 (mode
), mode
);
5920 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UFRACT
);
5922 mode
= GET_MODE_WIDER_MODE (mode
))
5924 FCONST0 (mode
).data
.high
= 0;
5925 FCONST0 (mode
).data
.low
= 0;
5926 FCONST0 (mode
).mode
= mode
;
5927 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5928 FCONST0 (mode
), mode
);
5931 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_ACCUM
);
5933 mode
= GET_MODE_WIDER_MODE (mode
))
5935 FCONST0 (mode
).data
.high
= 0;
5936 FCONST0 (mode
).data
.low
= 0;
5937 FCONST0 (mode
).mode
= mode
;
5938 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5939 FCONST0 (mode
), mode
);
5941 /* We store the value 1. */
5942 FCONST1 (mode
).data
.high
= 0;
5943 FCONST1 (mode
).data
.low
= 0;
5944 FCONST1 (mode
).mode
= mode
;
5946 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5947 HOST_BITS_PER_DOUBLE_INT
,
5948 SIGNED_FIXED_POINT_MODE_P (mode
));
5949 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5950 FCONST1 (mode
), mode
);
5953 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_UACCUM
);
5955 mode
= GET_MODE_WIDER_MODE (mode
))
5957 FCONST0 (mode
).data
.high
= 0;
5958 FCONST0 (mode
).data
.low
= 0;
5959 FCONST0 (mode
).mode
= mode
;
5960 const_tiny_rtx
[0][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5961 FCONST0 (mode
), mode
);
5963 /* We store the value 1. */
5964 FCONST1 (mode
).data
.high
= 0;
5965 FCONST1 (mode
).data
.low
= 0;
5966 FCONST1 (mode
).mode
= mode
;
5968 = double_int_one
.lshift (GET_MODE_FBIT (mode
),
5969 HOST_BITS_PER_DOUBLE_INT
,
5970 SIGNED_FIXED_POINT_MODE_P (mode
));
5971 const_tiny_rtx
[1][(int) mode
] = CONST_FIXED_FROM_FIXED_VALUE (
5972 FCONST1 (mode
), mode
);
5975 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT
);
5977 mode
= GET_MODE_WIDER_MODE (mode
))
5979 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5982 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT
);
5984 mode
= GET_MODE_WIDER_MODE (mode
))
5986 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5989 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM
);
5991 mode
= GET_MODE_WIDER_MODE (mode
))
5993 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5994 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5997 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM
);
5999 mode
= GET_MODE_WIDER_MODE (mode
))
6001 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
6002 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
6005 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
6006 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
6007 const_tiny_rtx
[0][i
] = const0_rtx
;
6009 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
6010 if (STORE_FLAG_VALUE
== 1)
6011 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
6013 pc_rtx
= gen_rtx_fmt_ (PC
, VOIDmode
);
6014 ret_rtx
= gen_rtx_fmt_ (RETURN
, VOIDmode
);
6015 simple_return_rtx
= gen_rtx_fmt_ (SIMPLE_RETURN
, VOIDmode
);
6016 cc0_rtx
= gen_rtx_fmt_ (CC0
, VOIDmode
);
6019 /* Produce exact duplicate of insn INSN after AFTER.
6020 Care updating of libcall regions if present. */
6023 emit_copy_of_insn_after (rtx insn
, rtx after
)
6027 switch (GET_CODE (insn
))
6030 new_rtx
= emit_insn_after (copy_insn (PATTERN (insn
)), after
);
6034 new_rtx
= emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
6038 new_rtx
= emit_debug_insn_after (copy_insn (PATTERN (insn
)), after
);
6042 new_rtx
= emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
6043 if (CALL_INSN_FUNCTION_USAGE (insn
))
6044 CALL_INSN_FUNCTION_USAGE (new_rtx
)
6045 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
6046 SIBLING_CALL_P (new_rtx
) = SIBLING_CALL_P (insn
);
6047 RTL_CONST_CALL_P (new_rtx
) = RTL_CONST_CALL_P (insn
);
6048 RTL_PURE_CALL_P (new_rtx
) = RTL_PURE_CALL_P (insn
);
6049 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx
)
6050 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn
);
6057 /* Update LABEL_NUSES. */
6058 mark_jump_label (PATTERN (new_rtx
), new_rtx
, 0);
6060 INSN_LOCATION (new_rtx
) = INSN_LOCATION (insn
);
6062 /* If the old insn is frame related, then so is the new one. This is
6063 primarily needed for IA-64 unwind info which marks epilogue insns,
6064 which may be duplicated by the basic block reordering code. */
6065 RTX_FRAME_RELATED_P (new_rtx
) = RTX_FRAME_RELATED_P (insn
);
6067 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6068 will make them. REG_LABEL_TARGETs are created there too, but are
6069 supposed to be sticky, so we copy them. */
6070 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
6071 if (REG_NOTE_KIND (link
) != REG_LABEL_OPERAND
)
6073 if (GET_CODE (link
) == EXPR_LIST
)
6074 add_reg_note (new_rtx
, REG_NOTE_KIND (link
),
6075 copy_insn_1 (XEXP (link
, 0)));
6077 add_shallow_copy_of_reg_note (new_rtx
, link
);
6080 INSN_CODE (new_rtx
) = INSN_CODE (insn
);
6084 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
6086 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
6088 if (hard_reg_clobbers
[mode
][regno
])
6089 return hard_reg_clobbers
[mode
][regno
];
6091 return (hard_reg_clobbers
[mode
][regno
] =
6092 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
6095 location_t prologue_location
;
6096 location_t epilogue_location
;
6098 /* Hold current location information and last location information, so the
6099 datastructures are built lazily only when some instructions in given
6100 place are needed. */
6101 static location_t curr_location
;
6103 /* Allocate insn location datastructure. */
6105 insn_locations_init (void)
6107 prologue_location
= epilogue_location
= 0;
6108 curr_location
= UNKNOWN_LOCATION
;
6111 /* At the end of emit stage, clear current location. */
6113 insn_locations_finalize (void)
6115 epilogue_location
= curr_location
;
6116 curr_location
= UNKNOWN_LOCATION
;
6119 /* Set current location. */
6121 set_curr_insn_location (location_t location
)
6123 curr_location
= location
;
6126 /* Get current location. */
6128 curr_insn_location (void)
6130 return curr_location
;
6133 /* Return lexical scope block insn belongs to. */
6135 insn_scope (const_rtx insn
)
6137 return LOCATION_BLOCK (INSN_LOCATION (insn
));
6140 /* Return line number of the statement that produced this insn. */
6142 insn_line (const_rtx insn
)
6144 return LOCATION_LINE (INSN_LOCATION (insn
));
6147 /* Return source file of the statement that produced this insn. */
6149 insn_file (const_rtx insn
)
6151 return LOCATION_FILE (INSN_LOCATION (insn
));
6154 /* Return true if memory model MODEL requires a pre-operation (release-style)
6155 barrier or a post-operation (acquire-style) barrier. While not universal,
6156 this function matches behavior of several targets. */
6159 need_atomic_barrier_p (enum memmodel model
, bool pre
)
6161 switch (model
& MEMMODEL_MASK
)
6163 case MEMMODEL_RELAXED
:
6164 case MEMMODEL_CONSUME
:
6166 case MEMMODEL_RELEASE
:
6168 case MEMMODEL_ACQUIRE
:
6170 case MEMMODEL_ACQ_REL
:
6171 case MEMMODEL_SEQ_CST
:
6178 #include "gt-emit-rtl.h"