1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num
= 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num
;
80 /* Value label_num had when set_new_last_label_num was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num
;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers
;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl
[GR_MAX
];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
110 REAL_VALUE_TYPE dconst0
;
111 REAL_VALUE_TYPE dconst1
;
112 REAL_VALUE_TYPE dconst2
;
113 REAL_VALUE_TYPE dconst3
;
114 REAL_VALUE_TYPE dconst10
;
115 REAL_VALUE_TYPE dconstm1
;
116 REAL_VALUE_TYPE dconstm2
;
117 REAL_VALUE_TYPE dconsthalf
;
118 REAL_VALUE_TYPE dconstthird
;
119 REAL_VALUE_TYPE dconstpi
;
120 REAL_VALUE_TYPE dconste
;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
159 htab_t const_int_htab
;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
163 htab_t mem_attrs_htab
;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
167 htab_t reg_attrs_htab
;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
171 htab_t const_double_htab
;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx
make_jump_insn_raw (rtx
);
180 static rtx
make_call_insn_raw (rtx
);
181 static rtx
find_line_note (rtx
);
182 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
183 static void unshare_all_decls (tree
);
184 static void reset_used_decls (tree
);
185 static void mark_label_nuses (rtx
);
186 static hashval_t
const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t
const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx
lookup_const_double (rtx
);
191 static hashval_t
mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
195 static hashval_t
reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs
*get_reg_attrs (tree
, int);
198 static tree
component_ref_for_mem_expr (tree
);
199 static rtx
gen_const_vector_0 (enum machine_mode
);
200 static rtx
gen_complex_constant_part (enum machine_mode
, rtx
, int);
201 static void copy_rtx_if_shared_1 (rtx
*orig
);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability
= -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x
)
212 return (hashval_t
) INTVAL ((rtx
) x
);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x
, const void *y
)
222 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x
)
232 if (GET_MODE (value
) == VOIDmode
)
233 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
236 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h
^= GET_MODE (value
);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x
, const void *y
)
248 rtx a
= (rtx
)x
, b
= (rtx
)y
;
250 if (GET_MODE (a
) != GET_MODE (b
))
252 if (GET_MODE (a
) == VOIDmode
)
253 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
254 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
257 CONST_DOUBLE_REAL_VALUE (b
));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x
)
265 mem_attrs
*p
= (mem_attrs
*) x
;
267 return (p
->alias
^ (p
->align
* 1000)
268 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
269 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x
, const void *y
)
280 mem_attrs
*p
= (mem_attrs
*) x
;
281 mem_attrs
*q
= (mem_attrs
*) y
;
283 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
284 && p
->size
== q
->size
&& p
->align
== q
->align
);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
293 unsigned int align
, enum machine_mode mode
)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias
== 0 && expr
== 0 && offset
== 0
303 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
304 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
305 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
310 attrs
.offset
= offset
;
314 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
317 *slot
= ggc_alloc (sizeof (mem_attrs
));
318 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x
)
329 reg_attrs
*p
= (reg_attrs
*) x
;
331 return ((p
->offset
* 1000) ^ (long) p
->decl
);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x
, const void *y
)
341 reg_attrs
*p
= (reg_attrs
*) x
;
342 reg_attrs
*q
= (reg_attrs
*) y
;
344 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl
, int offset
)
356 /* If everything is the default, we can just return zero. */
357 if (decl
== 0 && offset
== 0)
361 attrs
.offset
= offset
;
363 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
366 *slot
= ggc_alloc (sizeof (reg_attrs
));
367 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode
, int regno
)
380 rtx x
= gen_rtx_raw_REG (mode
, regno
);
381 ORIGINAL_REGNO (x
) = regno
;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
394 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
395 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
399 return const_true_rtx
;
402 /* Look up the CONST_INT in the hash table. */
403 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
404 (hashval_t
) arg
, INSERT
);
406 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
412 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
414 return GEN_INT (trunc_int_for_mode (c
, mode
));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real
)
427 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
439 rtx real
= rtx_alloc (CONST_DOUBLE
);
440 PUT_MODE (real
, mode
);
442 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
444 return lookup_const_double (real
);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
458 if (mode
!= VOIDmode
)
461 if (GET_MODE_CLASS (mode
) != MODE_INT
462 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width
= GET_MODE_BITSIZE (mode
);
472 if (width
< HOST_BITS_PER_WIDE_INT
473 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
474 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
475 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
476 else if (width
== HOST_BITS_PER_WIDE_INT
477 && ! (i1
== ~0 && i0
< 0))
479 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width
< HOST_BITS_PER_WIDE_INT
493 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
494 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width
<= HOST_BITS_PER_WIDE_INT
)
515 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
522 /* We use VOIDmode for integers. */
523 value
= rtx_alloc (CONST_DOUBLE
);
524 PUT_MODE (value
, VOIDmode
);
526 CONST_DOUBLE_LOW (value
) = i0
;
527 CONST_DOUBLE_HIGH (value
) = i1
;
529 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
530 XWINT (value
, i
) = 0;
532 return lookup_const_double (value
);
536 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode
== Pmode
&& !reload_in_progress
)
554 if (regno
== FRAME_POINTER_REGNUM
555 && (!reload_completed
|| frame_pointer_needed
))
556 return frame_pointer_rtx
;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno
== HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed
|| frame_pointer_needed
))
560 return hard_frame_pointer_rtx
;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno
== ARG_POINTER_REGNUM
)
564 return arg_pointer_rtx
;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
568 return return_address_pointer_rtx
;
570 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
572 return pic_offset_table_rtx
;
573 if (regno
== STACK_POINTER_REGNUM
)
574 return stack_pointer_rtx
;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno
< FIRST_PSEUDO_REGISTER
593 && reg_raw_mode
[regno
] == mode
)
594 return regno_reg_rtx
[regno
];
597 return gen_raw_REG (mode
, regno
);
601 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
603 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
628 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
637 enum machine_mode inmode
;
639 inmode
= GET_MODE (reg
);
640 if (inmode
== VOIDmode
)
642 return gen_rtx_SUBREG (mode
, reg
,
643 subreg_lowpart_offset (mode
, inmode
));
646 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
648 ** This routine generates an RTX of the size specified by
649 ** <code>, which is an RTX code. The RTX structure is initialized
650 ** from the arguments <element1> through <elementn>, which are
651 ** interpreted according to the specific RTX type's format. The
652 ** special machine mode associated with the rtx (if any) is specified
655 ** gen_rtx can be invoked in a way which resembles the lisp-like
656 ** rtx it will generate. For example, the following rtx structure:
658 ** (plus:QI (mem:QI (reg:SI 1))
659 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
661 ** ...would be generated by the following C code:
663 ** gen_rtx (PLUS, QImode,
664 ** gen_rtx (MEM, QImode,
665 ** gen_rtx (REG, SImode, 1)),
666 ** gen_rtx (MEM, QImode,
667 ** gen_rtx (PLUS, SImode,
668 ** gen_rtx (REG, SImode, 2),
669 ** gen_rtx (REG, SImode, 3)))),
674 gen_rtx (enum rtx_code code
, enum machine_mode mode
, ...)
676 int i
; /* Array indices... */
677 const char *fmt
; /* Current rtx's format... */
678 rtx rt_val
; /* RTX to return to caller... */
686 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
691 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
692 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
694 rt_val
= immed_double_const (arg0
, arg1
, mode
);
699 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
703 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
707 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
708 rt_val
->mode
= mode
; /* Store the machine mode... */
710 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
711 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
715 case '0': /* Field with unknown use. Zero it. */
716 X0EXP (rt_val
, i
) = NULL_RTX
;
719 case 'i': /* An integer? */
720 XINT (rt_val
, i
) = va_arg (p
, int);
723 case 'w': /* A wide integer? */
724 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
727 case 's': /* A string? */
728 XSTR (rt_val
, i
) = va_arg (p
, char *);
731 case 'e': /* An expression? */
732 case 'u': /* An insn? Same except when printing. */
733 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
736 case 'E': /* An RTX vector? */
737 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
740 case 'b': /* A bitmap? */
741 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
744 case 't': /* A tree? */
745 XTREE (rt_val
, i
) = va_arg (p
, tree
);
759 /* gen_rtvec (n, [rt1, ..., rtn])
761 ** This routine creates an rtvec and stores within it the
762 ** pointers to rtx's which are its arguments.
767 gen_rtvec (int n
, ...)
776 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
778 vector
= alloca (n
* sizeof (rtx
));
780 for (i
= 0; i
< n
; i
++)
781 vector
[i
] = va_arg (p
, rtx
);
783 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
787 return gen_rtvec_v (save_n
, vector
);
791 gen_rtvec_v (int n
, rtx
*argp
)
797 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
799 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
801 for (i
= 0; i
< n
; i
++)
802 rt_val
->elem
[i
] = *argp
++;
807 /* Generate a REG rtx for a new pseudo register of mode MODE.
808 This pseudo is assigned the next sequential register number. */
811 gen_reg_rtx (enum machine_mode mode
)
813 struct function
*f
= cfun
;
816 /* Don't let anything called after initial flow analysis create new
821 if (generating_concat_p
822 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
823 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
825 /* For complex modes, don't make a single pseudo.
826 Instead, make a CONCAT of two pseudos.
827 This allows noncontiguous allocation of the real and imaginary parts,
828 which makes much better code. Besides, allocating DCmode
829 pseudos overstrains reload on some machines like the 386. */
830 rtx realpart
, imagpart
;
831 enum machine_mode partmode
= GET_MODE_INNER (mode
);
833 realpart
= gen_reg_rtx (partmode
);
834 imagpart
= gen_reg_rtx (partmode
);
835 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
838 /* Make sure regno_pointer_align, and regno_reg_rtx are large
839 enough to have an element for this pseudo reg number. */
841 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
843 int old_size
= f
->emit
->regno_pointer_align_length
;
847 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
848 memset (new + old_size
, 0, old_size
);
849 f
->emit
->regno_pointer_align
= (unsigned char *) new;
851 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
852 old_size
* 2 * sizeof (rtx
));
853 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
854 regno_reg_rtx
= new1
;
856 f
->emit
->regno_pointer_align_length
= old_size
* 2;
859 val
= gen_raw_REG (mode
, reg_rtx_no
);
860 regno_reg_rtx
[reg_rtx_no
++] = val
;
864 /* Generate a register with same attributes as REG,
865 but offsetted by OFFSET. */
868 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
, int offset
)
870 rtx
new = gen_rtx_REG (mode
, regno
);
871 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
872 REG_OFFSET (reg
) + offset
);
876 /* Set the decl for MEM to DECL. */
879 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
881 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
883 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
886 /* Set the register attributes for registers contained in PARM_RTX.
887 Use needed values from memory attributes of MEM. */
890 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
892 if (GET_CODE (parm_rtx
) == REG
)
893 set_reg_attrs_from_mem (parm_rtx
, mem
);
894 else if (GET_CODE (parm_rtx
) == PARALLEL
)
896 /* Check for a NULL entry in the first slot, used to indicate that the
897 parameter goes both on the stack and in registers. */
898 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
899 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
901 rtx x
= XVECEXP (parm_rtx
, 0, i
);
902 if (GET_CODE (XEXP (x
, 0)) == REG
)
903 REG_ATTRS (XEXP (x
, 0))
904 = get_reg_attrs (MEM_EXPR (mem
),
905 INTVAL (XEXP (x
, 1)));
910 /* Assign the RTX X to declaration T. */
912 set_decl_rtl (tree t
, rtx x
)
914 DECL_CHECK (t
)->decl
.rtl
= x
;
918 /* For register, we maintain the reverse information too. */
919 if (GET_CODE (x
) == REG
)
920 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
921 else if (GET_CODE (x
) == SUBREG
)
922 REG_ATTRS (SUBREG_REG (x
))
923 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
924 if (GET_CODE (x
) == CONCAT
)
926 if (REG_P (XEXP (x
, 0)))
927 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
928 if (REG_P (XEXP (x
, 1)))
929 REG_ATTRS (XEXP (x
, 1))
930 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
932 if (GET_CODE (x
) == PARALLEL
)
935 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
937 rtx y
= XVECEXP (x
, 0, i
);
938 if (REG_P (XEXP (y
, 0)))
939 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
944 /* Identify REG (which may be a CONCAT) as a user register. */
947 mark_user_reg (rtx reg
)
949 if (GET_CODE (reg
) == CONCAT
)
951 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
952 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
954 else if (GET_CODE (reg
) == REG
)
955 REG_USERVAR_P (reg
) = 1;
960 /* Identify REG as a probable pointer register and show its alignment
961 as ALIGN, if nonzero. */
964 mark_reg_pointer (rtx reg
, int align
)
966 if (! REG_POINTER (reg
))
968 REG_POINTER (reg
) = 1;
971 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
973 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
974 /* We can no-longer be sure just how aligned this pointer is. */
975 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
978 /* Return 1 plus largest pseudo reg number used in the current function. */
986 /* Return 1 + the largest label number used so far in the current function. */
991 if (last_label_num
&& label_num
== base_label_num
)
992 return last_label_num
;
996 /* Return first label number used in this function (if any were used). */
999 get_first_label_num (void)
1001 return first_label_num
;
1004 /* Return the final regno of X, which is a SUBREG of a hard
1007 subreg_hard_regno (rtx x
, int check_mode
)
1009 enum machine_mode mode
= GET_MODE (x
);
1010 unsigned int byte_offset
, base_regno
, final_regno
;
1011 rtx reg
= SUBREG_REG (x
);
1013 /* This is where we attempt to catch illegal subregs
1014 created by the compiler. */
1015 if (GET_CODE (x
) != SUBREG
1016 || GET_CODE (reg
) != REG
)
1018 base_regno
= REGNO (reg
);
1019 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
1021 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
1023 #ifdef ENABLE_CHECKING
1024 if (!subreg_offset_representable_p (REGNO (reg
), GET_MODE (reg
),
1025 SUBREG_BYTE (x
), mode
))
1028 /* Catch non-congruent offsets too. */
1029 byte_offset
= SUBREG_BYTE (x
);
1030 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
1033 final_regno
= subreg_regno (x
);
1038 /* Return a value representing some low-order bits of X, where the number
1039 of low-order bits is given by MODE. Note that no conversion is done
1040 between floating-point and fixed-point values, rather, the bit
1041 representation is returned.
1043 This function handles the cases in common between gen_lowpart, below,
1044 and two variants in cse.c and combine.c. These are the cases that can
1045 be safely handled at all points in the compilation.
1047 If this is not a case we can handle, return 0. */
1050 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1052 int msize
= GET_MODE_SIZE (mode
);
1055 enum machine_mode innermode
;
1057 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1058 so we have to make one up. Yuk. */
1059 innermode
= GET_MODE (x
);
1060 if (GET_CODE (x
) == CONST_INT
&& msize
<= HOST_BITS_PER_WIDE_INT
)
1061 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1062 else if (innermode
== VOIDmode
)
1063 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1065 xsize
= GET_MODE_SIZE (innermode
);
1067 if (innermode
== VOIDmode
|| innermode
== BLKmode
)
1070 if (innermode
== mode
)
1073 /* MODE must occupy no more words than the mode of X. */
1074 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1075 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1078 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1079 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& msize
> xsize
)
1082 offset
= subreg_lowpart_offset (mode
, innermode
);
1084 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1085 && (GET_MODE_CLASS (mode
) == MODE_INT
1086 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1088 /* If we are getting the low-order part of something that has been
1089 sign- or zero-extended, we can either just use the object being
1090 extended or make a narrower extension. If we want an even smaller
1091 piece than the size of the object being extended, call ourselves
1094 This case is used mostly by combine and cse. */
1096 if (GET_MODE (XEXP (x
, 0)) == mode
)
1098 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1099 return gen_lowpart_common (mode
, XEXP (x
, 0));
1100 else if (msize
< xsize
)
1101 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1103 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
1104 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1105 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1106 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1108 /* Otherwise, we can't do this. */
1112 /* Return the constant real or imaginary part (which has mode MODE)
1113 of a complex value X. The IMAGPART_P argument determines whether
1114 the real or complex component should be returned. This function
1115 returns NULL_RTX if the component isn't a constant. */
1118 gen_complex_constant_part (enum machine_mode mode
, rtx x
, int imagpart_p
)
1122 if (GET_CODE (x
) == MEM
1123 && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
1125 decl
= SYMBOL_REF_DECL (XEXP (x
, 0));
1126 if (decl
!= NULL_TREE
&& TREE_CODE (decl
) == COMPLEX_CST
)
1128 part
= imagpart_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
1129 if (TREE_CODE (part
) == REAL_CST
1130 || TREE_CODE (part
) == INTEGER_CST
)
1131 return expand_expr (part
, NULL_RTX
, mode
, 0);
1137 /* Return the real part (which has mode MODE) of a complex value X.
1138 This always comes at the low address in memory. */
1141 gen_realpart (enum machine_mode mode
, rtx x
)
1145 /* Handle complex constants. */
1146 part
= gen_complex_constant_part (mode
, x
, 0);
1147 if (part
!= NULL_RTX
)
1150 if (WORDS_BIG_ENDIAN
1151 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1153 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1155 ("can't access real part of complex value in hard register");
1156 else if (WORDS_BIG_ENDIAN
)
1157 return gen_highpart (mode
, x
);
1159 return gen_lowpart (mode
, x
);
1162 /* Return the imaginary part (which has mode MODE) of a complex value X.
1163 This always comes at the high address in memory. */
1166 gen_imagpart (enum machine_mode mode
, rtx x
)
1170 /* Handle complex constants. */
1171 part
= gen_complex_constant_part (mode
, x
, 1);
1172 if (part
!= NULL_RTX
)
1175 if (WORDS_BIG_ENDIAN
)
1176 return gen_lowpart (mode
, x
);
1177 else if (! WORDS_BIG_ENDIAN
1178 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1180 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1182 ("can't access imaginary part of complex value in hard register");
1184 return gen_highpart (mode
, x
);
1187 /* Return 1 iff X, assumed to be a SUBREG,
1188 refers to the real part of the complex value in its containing reg.
1189 Complex values are always stored with the real part in the first word,
1190 regardless of WORDS_BIG_ENDIAN. */
1193 subreg_realpart_p (rtx x
)
1195 if (GET_CODE (x
) != SUBREG
)
1198 return ((unsigned int) SUBREG_BYTE (x
)
1199 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1202 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1203 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1204 least-significant part of X.
1205 MODE specifies how big a part of X to return;
1206 it usually should not be larger than a word.
1207 If X is a MEM whose address is a QUEUED, the value may be so also. */
1210 gen_lowpart (enum machine_mode mode
, rtx x
)
1212 rtx result
= gen_lowpart_common (mode
, x
);
1216 else if (GET_CODE (x
) == REG
)
1218 /* Must be a hard reg that's not valid in MODE. */
1219 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1224 else if (GET_CODE (x
) == MEM
)
1226 /* The only additional case we can do is MEM. */
1229 /* The following exposes the use of "x" to CSE. */
1230 if (GET_MODE_SIZE (GET_MODE (x
)) <= UNITS_PER_WORD
1231 && SCALAR_INT_MODE_P (GET_MODE (x
))
1232 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1233 GET_MODE_BITSIZE (GET_MODE (x
)))
1234 && ! no_new_pseudos
)
1235 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1237 if (WORDS_BIG_ENDIAN
)
1238 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1239 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1241 if (BYTES_BIG_ENDIAN
)
1242 /* Adjust the address so that the address-after-the-data
1244 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1245 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1247 return adjust_address (x
, mode
, offset
);
1249 else if (GET_CODE (x
) == ADDRESSOF
)
1250 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1255 /* Like `gen_lowpart', but refer to the most significant part.
1256 This is used to access the imaginary part of a complex number. */
1259 gen_highpart (enum machine_mode mode
, rtx x
)
1261 unsigned int msize
= GET_MODE_SIZE (mode
);
1264 /* This case loses if X is a subreg. To catch bugs early,
1265 complain if an invalid MODE is used even in other cases. */
1266 if (msize
> UNITS_PER_WORD
1267 && msize
!= (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1270 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1271 subreg_highpart_offset (mode
, GET_MODE (x
)));
1273 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1274 the target if we have a MEM. gen_highpart must return a valid operand,
1275 emitting code if necessary to do so. */
1276 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1277 result
= validize_mem (result
);
1284 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1285 be VOIDmode constant. */
1287 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1289 if (GET_MODE (exp
) != VOIDmode
)
1291 if (GET_MODE (exp
) != innermode
)
1293 return gen_highpart (outermode
, exp
);
1295 return simplify_gen_subreg (outermode
, exp
, innermode
,
1296 subreg_highpart_offset (outermode
, innermode
));
1299 /* Return offset in bytes to get OUTERMODE low part
1300 of the value in mode INNERMODE stored in memory in target format. */
1303 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1305 unsigned int offset
= 0;
1306 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1310 if (WORDS_BIG_ENDIAN
)
1311 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1312 if (BYTES_BIG_ENDIAN
)
1313 offset
+= difference
% UNITS_PER_WORD
;
1319 /* Return offset in bytes to get OUTERMODE high part
1320 of the value in mode INNERMODE stored in memory in target format. */
1322 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1324 unsigned int offset
= 0;
1325 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1327 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1332 if (! WORDS_BIG_ENDIAN
)
1333 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1334 if (! BYTES_BIG_ENDIAN
)
1335 offset
+= difference
% UNITS_PER_WORD
;
1341 /* Return 1 iff X, assumed to be a SUBREG,
1342 refers to the least significant part of its containing reg.
1343 If X is not a SUBREG, always return 1 (it is its own low part!). */
1346 subreg_lowpart_p (rtx x
)
1348 if (GET_CODE (x
) != SUBREG
)
1350 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1353 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1354 == SUBREG_BYTE (x
));
1357 /* Return subword OFFSET of operand OP.
1358 The word number, OFFSET, is interpreted as the word number starting
1359 at the low-order address. OFFSET 0 is the low-order word if not
1360 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1362 If we cannot extract the required word, we return zero. Otherwise,
1363 an rtx corresponding to the requested word will be returned.
1365 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1366 reload has completed, a valid address will always be returned. After
1367 reload, if a valid address cannot be returned, we return zero.
1369 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1370 it is the responsibility of the caller.
1372 MODE is the mode of OP in case it is a CONST_INT.
1374 ??? This is still rather broken for some cases. The problem for the
1375 moment is that all callers of this thing provide no 'goal mode' to
1376 tell us to work with. This exists because all callers were written
1377 in a word based SUBREG world.
1378 Now use of this function can be deprecated by simplify_subreg in most
1383 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1385 if (mode
== VOIDmode
)
1386 mode
= GET_MODE (op
);
1388 if (mode
== VOIDmode
)
1391 /* If OP is narrower than a word, fail. */
1393 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1396 /* If we want a word outside OP, return zero. */
1398 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1401 /* Form a new MEM at the requested address. */
1402 if (GET_CODE (op
) == MEM
)
1404 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1406 if (! validate_address
)
1409 else if (reload_completed
)
1411 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1415 return replace_equiv_address (new, XEXP (new, 0));
1418 /* Rest can be handled by simplify_subreg. */
1419 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1422 /* Similar to `operand_subword', but never return 0. If we can't extract
1423 the required subword, put OP into a register and try again. If that fails,
1424 abort. We always validate the address in this case.
1426 MODE is the mode of OP, in case it is CONST_INT. */
1429 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1431 rtx result
= operand_subword (op
, offset
, 1, mode
);
1436 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1438 /* If this is a register which can not be accessed by words, copy it
1439 to a pseudo register. */
1440 if (GET_CODE (op
) == REG
)
1441 op
= copy_to_reg (op
);
1443 op
= force_reg (mode
, op
);
1446 result
= operand_subword (op
, offset
, 1, mode
);
1453 /* Given a compare instruction, swap the operands.
1454 A test instruction is changed into a compare of 0 against the operand. */
1457 reverse_comparison (rtx insn
)
1459 rtx body
= PATTERN (insn
);
1462 if (GET_CODE (body
) == SET
)
1463 comp
= SET_SRC (body
);
1465 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1467 if (GET_CODE (comp
) == COMPARE
)
1469 rtx op0
= XEXP (comp
, 0);
1470 rtx op1
= XEXP (comp
, 1);
1471 XEXP (comp
, 0) = op1
;
1472 XEXP (comp
, 1) = op0
;
1476 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1477 CONST0_RTX (GET_MODE (comp
)), comp
);
1478 if (GET_CODE (body
) == SET
)
1479 SET_SRC (body
) = new;
1481 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1485 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1486 or (2) a component ref of something variable. Represent the later with
1487 a NULL expression. */
1490 component_ref_for_mem_expr (tree ref
)
1492 tree inner
= TREE_OPERAND (ref
, 0);
1494 if (TREE_CODE (inner
) == COMPONENT_REF
)
1495 inner
= component_ref_for_mem_expr (inner
);
1498 tree placeholder_ptr
= 0;
1500 /* Now remove any conversions: they don't change what the underlying
1501 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1502 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1503 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1504 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1505 || TREE_CODE (inner
) == SAVE_EXPR
1506 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1507 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1508 inner
= find_placeholder (inner
, &placeholder_ptr
);
1510 inner
= TREE_OPERAND (inner
, 0);
1512 if (! DECL_P (inner
))
1516 if (inner
== TREE_OPERAND (ref
, 0))
1519 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1520 TREE_OPERAND (ref
, 1));
1523 /* Given REF, a MEM, and T, either the type of X or the expression
1524 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1525 if we are making a new object of this type. BITPOS is nonzero if
1526 there is an offset outstanding on T that will be applied later. */
1529 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1530 HOST_WIDE_INT bitpos
)
1532 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1533 tree expr
= MEM_EXPR (ref
);
1534 rtx offset
= MEM_OFFSET (ref
);
1535 rtx size
= MEM_SIZE (ref
);
1536 unsigned int align
= MEM_ALIGN (ref
);
1537 HOST_WIDE_INT apply_bitpos
= 0;
1540 /* It can happen that type_for_mode was given a mode for which there
1541 is no language-level type. In which case it returns NULL, which
1546 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1547 if (type
== error_mark_node
)
1550 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1551 wrong answer, as it assumes that DECL_RTL already has the right alias
1552 info. Callers should not set DECL_RTL until after the call to
1553 set_mem_attributes. */
1554 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1557 /* Get the alias set from the expression or type (perhaps using a
1558 front-end routine) and use it. */
1559 alias
= get_alias_set (t
);
1561 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1562 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1563 RTX_UNCHANGING_P (ref
)
1564 |= ((lang_hooks
.honor_readonly
1565 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1566 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1568 /* If we are making an object of this type, or if this is a DECL, we know
1569 that it is a scalar if the type is not an aggregate. */
1570 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1571 MEM_SCALAR_P (ref
) = 1;
1573 /* We can set the alignment from the type if we are making an object,
1574 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1575 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1576 align
= MAX (align
, TYPE_ALIGN (type
));
1578 /* If the size is known, we can set that. */
1579 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1580 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1582 /* If T is not a type, we may be able to deduce some more information about
1586 maybe_set_unchanging (ref
, t
);
1587 if (TREE_THIS_VOLATILE (t
))
1588 MEM_VOLATILE_P (ref
) = 1;
1590 /* Now remove any conversions: they don't change what the underlying
1591 object is. Likewise for SAVE_EXPR. */
1592 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1593 || TREE_CODE (t
) == NON_LVALUE_EXPR
1594 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1595 || TREE_CODE (t
) == SAVE_EXPR
)
1596 t
= TREE_OPERAND (t
, 0);
1598 /* If this expression can't be addressed (e.g., it contains a reference
1599 to a non-addressable field), show we don't change its alias set. */
1600 if (! can_address_p (t
))
1601 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1603 /* If this is a decl, set the attributes of the MEM from it. */
1607 offset
= const0_rtx
;
1608 apply_bitpos
= bitpos
;
1609 size
= (DECL_SIZE_UNIT (t
)
1610 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1611 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1612 align
= DECL_ALIGN (t
);
1615 /* If this is a constant, we know the alignment. */
1616 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1618 align
= TYPE_ALIGN (type
);
1619 #ifdef CONSTANT_ALIGNMENT
1620 align
= CONSTANT_ALIGNMENT (t
, align
);
1624 /* If this is a field reference and not a bit-field, record it. */
1625 /* ??? There is some information that can be gleened from bit-fields,
1626 such as the word offset in the structure that might be modified.
1627 But skip it for now. */
1628 else if (TREE_CODE (t
) == COMPONENT_REF
1629 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1631 expr
= component_ref_for_mem_expr (t
);
1632 offset
= const0_rtx
;
1633 apply_bitpos
= bitpos
;
1634 /* ??? Any reason the field size would be different than
1635 the size we got from the type? */
1638 /* If this is an array reference, look for an outer field reference. */
1639 else if (TREE_CODE (t
) == ARRAY_REF
)
1641 tree off_tree
= size_zero_node
;
1642 /* We can't modify t, because we use it at the end of the
1648 tree index
= TREE_OPERAND (t2
, 1);
1649 tree array
= TREE_OPERAND (t2
, 0);
1650 tree domain
= TYPE_DOMAIN (TREE_TYPE (array
));
1651 tree low_bound
= (domain
? TYPE_MIN_VALUE (domain
) : 0);
1652 tree unit_size
= TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array
)));
1654 /* We assume all arrays have sizes that are a multiple of a byte.
1655 First subtract the lower bound, if any, in the type of the
1656 index, then convert to sizetype and multiply by the size of the
1658 if (low_bound
!= 0 && ! integer_zerop (low_bound
))
1659 index
= fold (build (MINUS_EXPR
, TREE_TYPE (index
),
1662 /* If the index has a self-referential type, pass it to a
1663 WITH_RECORD_EXPR; if the component size is, pass our
1664 component to one. */
1665 if (CONTAINS_PLACEHOLDER_P (index
))
1666 index
= build (WITH_RECORD_EXPR
, TREE_TYPE (index
), index
, t2
);
1667 if (CONTAINS_PLACEHOLDER_P (unit_size
))
1668 unit_size
= build (WITH_RECORD_EXPR
, sizetype
,
1672 = fold (build (PLUS_EXPR
, sizetype
,
1673 fold (build (MULT_EXPR
, sizetype
,
1677 t2
= TREE_OPERAND (t2
, 0);
1679 while (TREE_CODE (t2
) == ARRAY_REF
);
1685 if (host_integerp (off_tree
, 1))
1687 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1688 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1689 align
= DECL_ALIGN (t2
);
1690 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1692 offset
= GEN_INT (ioff
);
1693 apply_bitpos
= bitpos
;
1696 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1698 expr
= component_ref_for_mem_expr (t2
);
1699 if (host_integerp (off_tree
, 1))
1701 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1702 apply_bitpos
= bitpos
;
1704 /* ??? Any reason the field size would be different than
1705 the size we got from the type? */
1707 else if (flag_argument_noalias
> 1
1708 && TREE_CODE (t2
) == INDIRECT_REF
1709 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1716 /* If this is a Fortran indirect argument reference, record the
1718 else if (flag_argument_noalias
> 1
1719 && TREE_CODE (t
) == INDIRECT_REF
1720 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1727 /* If we modified OFFSET based on T, then subtract the outstanding
1728 bit position offset. Similarly, increase the size of the accessed
1729 object to contain the negative offset. */
1732 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1734 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1737 /* Now set the attributes we computed above. */
1739 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1741 /* If this is already known to be a scalar or aggregate, we are done. */
1742 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1745 /* If it is a reference into an aggregate, this is part of an aggregate.
1746 Otherwise we don't know. */
1747 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1748 || TREE_CODE (t
) == ARRAY_RANGE_REF
1749 || TREE_CODE (t
) == BIT_FIELD_REF
)
1750 MEM_IN_STRUCT_P (ref
) = 1;
1754 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1756 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1759 /* Set the decl for MEM to DECL. */
1762 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1765 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1766 GEN_INT (REG_OFFSET (reg
)),
1767 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1770 /* Set the alias set of MEM to SET. */
1773 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1775 #ifdef ENABLE_CHECKING
1776 /* If the new and old alias sets don't conflict, something is wrong. */
1777 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1781 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1782 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1786 /* Set the alignment of MEM to ALIGN bits. */
1789 set_mem_align (rtx mem
, unsigned int align
)
1791 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1792 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1796 /* Set the expr for MEM to EXPR. */
1799 set_mem_expr (rtx mem
, tree expr
)
1802 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1803 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1806 /* Set the offset of MEM to OFFSET. */
1809 set_mem_offset (rtx mem
, rtx offset
)
1811 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1812 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1816 /* Set the size of MEM to SIZE. */
1819 set_mem_size (rtx mem
, rtx size
)
1821 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1822 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1826 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1827 and its address changed to ADDR. (VOIDmode means don't change the mode.
1828 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1829 returned memory location is required to be valid. The memory
1830 attributes are not changed. */
1833 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1837 if (GET_CODE (memref
) != MEM
)
1839 if (mode
== VOIDmode
)
1840 mode
= GET_MODE (memref
);
1842 addr
= XEXP (memref
, 0);
1843 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1844 && (!validate
|| memory_address_p (mode
, addr
)))
1849 if (reload_in_progress
|| reload_completed
)
1851 if (! memory_address_p (mode
, addr
))
1855 addr
= memory_address (mode
, addr
);
1858 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1861 new = gen_rtx_MEM (mode
, addr
);
1862 MEM_COPY_ATTRIBUTES (new, memref
);
1866 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1867 way we are changing MEMREF, so we only preserve the alias set. */
1870 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1872 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
1873 enum machine_mode mmode
= GET_MODE (new);
1875 /* If there are no changes, just return the original memory reference. */
1880 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
1881 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
1882 (mmode
== BLKmode
? BITS_PER_UNIT
1883 : GET_MODE_ALIGNMENT (mmode
)),
1889 /* Return a memory reference like MEMREF, but with its mode changed
1890 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1891 nonzero, the memory address is forced to be valid.
1892 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1893 and caller is responsible for adjusting MEMREF base register. */
1896 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1897 int validate
, int adjust
)
1899 rtx addr
= XEXP (memref
, 0);
1901 rtx memoffset
= MEM_OFFSET (memref
);
1903 unsigned int memalign
= MEM_ALIGN (memref
);
1905 /* If there are no changes, just return the original memory reference. */
1906 if (mode
== GET_MODE (memref
) && !offset
1907 && (!validate
|| memory_address_p (mode
, addr
)))
1910 /* ??? Prefer to create garbage instead of creating shared rtl.
1911 This may happen even if offset is nonzero -- consider
1912 (plus (plus reg reg) const_int) -- so do this always. */
1913 addr
= copy_rtx (addr
);
1917 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1918 object, we can merge it into the LO_SUM. */
1919 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1921 && (unsigned HOST_WIDE_INT
) offset
1922 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1923 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1924 plus_constant (XEXP (addr
, 1), offset
));
1926 addr
= plus_constant (addr
, offset
);
1929 new = change_address_1 (memref
, mode
, addr
, validate
);
1931 /* Compute the new values of the memory attributes due to this adjustment.
1932 We add the offsets and update the alignment. */
1934 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1936 /* Compute the new alignment by taking the MIN of the alignment and the
1937 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1942 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1944 /* We can compute the size in a number of ways. */
1945 if (GET_MODE (new) != BLKmode
)
1946 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1947 else if (MEM_SIZE (memref
))
1948 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1950 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1951 memoffset
, size
, memalign
, GET_MODE (new));
1953 /* At some point, we should validate that this offset is within the object,
1954 if all the appropriate values are known. */
1958 /* Return a memory reference like MEMREF, but with its mode changed
1959 to MODE and its address changed to ADDR, which is assumed to be
1960 MEMREF offseted by OFFSET bytes. If VALIDATE is
1961 nonzero, the memory address is forced to be valid. */
1964 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1965 HOST_WIDE_INT offset
, int validate
)
1967 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1968 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1971 /* Return a memory reference like MEMREF, but whose address is changed by
1972 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1973 known to be in OFFSET (possibly 1). */
1976 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1978 rtx
new, addr
= XEXP (memref
, 0);
1980 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1982 /* At this point we don't know _why_ the address is invalid. It
1983 could have secondary memory references, multiplies or anything.
1985 However, if we did go and rearrange things, we can wind up not
1986 being able to recognize the magic around pic_offset_table_rtx.
1987 This stuff is fragile, and is yet another example of why it is
1988 bad to expose PIC machinery too early. */
1989 if (! memory_address_p (GET_MODE (memref
), new)
1990 && GET_CODE (addr
) == PLUS
1991 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1993 addr
= force_reg (GET_MODE (addr
), addr
);
1994 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1997 update_temp_slot_address (XEXP (memref
, 0), new);
1998 new = change_address_1 (memref
, VOIDmode
, new, 1);
2000 /* If there are no changes, just return the original memory reference. */
2004 /* Update the alignment to reflect the offset. Reset the offset, which
2007 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2008 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
2013 /* Return a memory reference like MEMREF, but with its address changed to
2014 ADDR. The caller is asserting that the actual piece of memory pointed
2015 to is the same, just the form of the address is being changed, such as
2016 by putting something into a register. */
2019 replace_equiv_address (rtx memref
, rtx addr
)
2021 /* change_address_1 copies the memory attribute structure without change
2022 and that's exactly what we want here. */
2023 update_temp_slot_address (XEXP (memref
, 0), addr
);
2024 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2027 /* Likewise, but the reference is not required to be valid. */
2030 replace_equiv_address_nv (rtx memref
, rtx addr
)
2032 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2035 /* Return a memory reference like MEMREF, but with its mode widened to
2036 MODE and offset by OFFSET. This would be used by targets that e.g.
2037 cannot issue QImode memory operations and have to use SImode memory
2038 operations plus masking logic. */
2041 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
2043 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2044 tree expr
= MEM_EXPR (new);
2045 rtx memoffset
= MEM_OFFSET (new);
2046 unsigned int size
= GET_MODE_SIZE (mode
);
2048 /* If there are no changes, just return the original memory reference. */
2052 /* If we don't know what offset we were at within the expression, then
2053 we can't know if we've overstepped the bounds. */
2059 if (TREE_CODE (expr
) == COMPONENT_REF
)
2061 tree field
= TREE_OPERAND (expr
, 1);
2063 if (! DECL_SIZE_UNIT (field
))
2069 /* Is the field at least as large as the access? If so, ok,
2070 otherwise strip back to the containing structure. */
2071 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2072 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2073 && INTVAL (memoffset
) >= 0)
2076 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2082 expr
= TREE_OPERAND (expr
, 0);
2083 memoffset
= (GEN_INT (INTVAL (memoffset
)
2084 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2085 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2088 /* Similarly for the decl. */
2089 else if (DECL_P (expr
)
2090 && DECL_SIZE_UNIT (expr
)
2091 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2092 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2093 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2097 /* The widened memory access overflows the expression, which means
2098 that it could alias another expression. Zap it. */
2105 memoffset
= NULL_RTX
;
2107 /* The widened memory may alias other stuff, so zap the alias set. */
2108 /* ??? Maybe use get_alias_set on any remaining expression. */
2110 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2111 MEM_ALIGN (new), mode
);
2116 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2119 gen_label_rtx (void)
2121 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2122 NULL
, label_num
++, NULL
);
2125 /* For procedure integration. */
2127 /* Install new pointers to the first and last insns in the chain.
2128 Also, set cur_insn_uid to one higher than the last in use.
2129 Used for an inline-procedure after copying the insn chain. */
2132 set_new_first_and_last_insn (rtx first
, rtx last
)
2140 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2141 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2146 /* Set the last label number found in the current function.
2147 This is used when belatedly compiling an inline function. */
2150 set_new_last_label_num (int last
)
2152 base_label_num
= label_num
;
2153 last_label_num
= last
;
2156 /* Restore all variables describing the current status from the structure *P.
2157 This is used after a nested function. */
2160 restore_emit_status (struct function
*p ATTRIBUTE_UNUSED
)
2165 /* Go through all the RTL insn bodies and copy any invalid shared
2166 structure. This routine should only be called once. */
2169 unshare_all_rtl (tree fndecl
, rtx insn
)
2173 /* Make sure that virtual parameters are not shared. */
2174 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2175 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2177 /* Make sure that virtual stack slots are not shared. */
2178 unshare_all_decls (DECL_INITIAL (fndecl
));
2180 /* Unshare just about everything else. */
2181 unshare_all_rtl_in_chain (insn
);
2183 /* Make sure the addresses of stack slots found outside the insn chain
2184 (such as, in DECL_RTL of a variable) are not shared
2185 with the insn chain.
2187 This special care is necessary when the stack slot MEM does not
2188 actually appear in the insn chain. If it does appear, its address
2189 is unshared from all else at that point. */
2190 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2193 /* Go through all the RTL insn bodies and copy any invalid shared
2194 structure, again. This is a fairly expensive thing to do so it
2195 should be done sparingly. */
2198 unshare_all_rtl_again (rtx insn
)
2203 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2206 reset_used_flags (PATTERN (p
));
2207 reset_used_flags (REG_NOTES (p
));
2208 reset_used_flags (LOG_LINKS (p
));
2211 /* Make sure that virtual stack slots are not shared. */
2212 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2214 /* Make sure that virtual parameters are not shared. */
2215 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2216 reset_used_flags (DECL_RTL (decl
));
2218 reset_used_flags (stack_slot_list
);
2220 unshare_all_rtl (cfun
->decl
, insn
);
2223 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2224 Recursively does the same for subexpressions. */
2227 verify_rtx_sharing (rtx orig
, rtx insn
)
2232 const char *format_ptr
;
2237 code
= GET_CODE (x
);
2239 /* These types may be freely shared. */
2255 /* SCRATCH must be shared because they represent distinct values. */
2257 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2262 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2263 a LABEL_REF, it isn't sharable. */
2264 if (GET_CODE (XEXP (x
, 0)) == PLUS
2265 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2266 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2271 /* A MEM is allowed to be shared if its address is constant. */
2272 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2273 || reload_completed
|| reload_in_progress
)
2282 /* This rtx may not be shared. If it has already been seen,
2283 replace it with a copy of itself. */
2285 if (RTX_FLAG (x
, used
))
2287 error ("Invalid rtl sharing found in the insn");
2289 error ("Shared rtx");
2293 RTX_FLAG (x
, used
) = 1;
2295 /* Now scan the subexpressions recursively. */
2297 format_ptr
= GET_RTX_FORMAT (code
);
2299 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2301 switch (*format_ptr
++)
2304 verify_rtx_sharing (XEXP (x
, i
), insn
);
2308 if (XVEC (x
, i
) != NULL
)
2311 int len
= XVECLEN (x
, i
);
2313 for (j
= 0; j
< len
; j
++)
2315 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2316 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2317 && GET_CODE (SET_SRC (XVECEXP (x
, i
, j
))) == ASM_OPERANDS
)
2318 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2320 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2329 /* Go through all the RTL insn bodies and check that there is no unexpected
2330 sharing in between the subexpressions. */
2333 verify_rtl_sharing (void)
2337 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2340 reset_used_flags (PATTERN (p
));
2341 reset_used_flags (REG_NOTES (p
));
2342 reset_used_flags (LOG_LINKS (p
));
2345 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2348 verify_rtx_sharing (PATTERN (p
), p
);
2349 verify_rtx_sharing (REG_NOTES (p
), p
);
2350 verify_rtx_sharing (LOG_LINKS (p
), p
);
2354 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2355 Assumes the mark bits are cleared at entry. */
2358 unshare_all_rtl_in_chain (rtx insn
)
2360 for (; insn
; insn
= NEXT_INSN (insn
))
2363 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2364 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2365 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2369 /* Go through all virtual stack slots of a function and copy any
2370 shared structure. */
2372 unshare_all_decls (tree blk
)
2376 /* Copy shared decls. */
2377 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2378 if (DECL_RTL_SET_P (t
))
2379 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2381 /* Now process sub-blocks. */
2382 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2383 unshare_all_decls (t
);
2386 /* Go through all virtual stack slots of a function and mark them as
2389 reset_used_decls (tree blk
)
2394 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2395 if (DECL_RTL_SET_P (t
))
2396 reset_used_flags (DECL_RTL (t
));
2398 /* Now process sub-blocks. */
2399 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2400 reset_used_decls (t
);
2403 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2404 placed in the result directly, rather than being copied. MAY_SHARE is
2405 either a MEM of an EXPR_LIST of MEMs. */
2408 copy_most_rtx (rtx orig
, rtx may_share
)
2413 const char *format_ptr
;
2415 if (orig
== may_share
2416 || (GET_CODE (may_share
) == EXPR_LIST
2417 && in_expr_list_p (may_share
, orig
)))
2420 code
= GET_CODE (orig
);
2438 copy
= rtx_alloc (code
);
2439 PUT_MODE (copy
, GET_MODE (orig
));
2440 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2441 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2442 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2443 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2444 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2446 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2448 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2450 switch (*format_ptr
++)
2453 XEXP (copy
, i
) = XEXP (orig
, i
);
2454 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2455 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2459 XEXP (copy
, i
) = XEXP (orig
, i
);
2464 XVEC (copy
, i
) = XVEC (orig
, i
);
2465 if (XVEC (orig
, i
) != NULL
)
2467 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2468 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2469 XVECEXP (copy
, i
, j
)
2470 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2475 XWINT (copy
, i
) = XWINT (orig
, i
);
2480 XINT (copy
, i
) = XINT (orig
, i
);
2484 XTREE (copy
, i
) = XTREE (orig
, i
);
2489 XSTR (copy
, i
) = XSTR (orig
, i
);
2493 X0ANY (copy
, i
) = X0ANY (orig
, i
);
2503 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2504 Recursively does the same for subexpressions. Uses
2505 copy_rtx_if_shared_1 to reduce stack space. */
2508 copy_rtx_if_shared (rtx orig
)
2510 copy_rtx_if_shared_1 (&orig
);
2514 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2515 use. Recursively does the same for subexpressions. */
2518 copy_rtx_if_shared_1 (rtx
*orig1
)
2524 const char *format_ptr
;
2528 /* Repeat is used to turn tail-recursion into iteration. */
2535 code
= GET_CODE (x
);
2537 /* These types may be freely shared. */
2552 /* SCRATCH must be shared because they represent distinct values. */
2555 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2560 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2561 a LABEL_REF, it isn't sharable. */
2562 if (GET_CODE (XEXP (x
, 0)) == PLUS
2563 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2564 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2573 /* The chain of insns is not being copied. */
2580 /* This rtx may not be shared. If it has already been seen,
2581 replace it with a copy of itself. */
2583 if (RTX_FLAG (x
, used
))
2587 copy
= rtx_alloc (code
);
2588 memcpy (copy
, x
, RTX_SIZE (code
));
2592 RTX_FLAG (x
, used
) = 1;
2594 /* Now scan the subexpressions recursively.
2595 We can store any replaced subexpressions directly into X
2596 since we know X is not shared! Any vectors in X
2597 must be copied if X was copied. */
2599 format_ptr
= GET_RTX_FORMAT (code
);
2600 length
= GET_RTX_LENGTH (code
);
2603 for (i
= 0; i
< length
; i
++)
2605 switch (*format_ptr
++)
2609 copy_rtx_if_shared_1 (last_ptr
);
2610 last_ptr
= &XEXP (x
, i
);
2614 if (XVEC (x
, i
) != NULL
)
2617 int len
= XVECLEN (x
, i
);
2619 /* Copy the vector iff I copied the rtx and the length
2621 if (copied
&& len
> 0)
2622 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2624 /* Call recursively on all inside the vector. */
2625 for (j
= 0; j
< len
; j
++)
2628 copy_rtx_if_shared_1 (last_ptr
);
2629 last_ptr
= &XVECEXP (x
, i
, j
);
2644 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2645 to look for shared sub-parts. */
2648 reset_used_flags (rtx x
)
2652 const char *format_ptr
;
2655 /* Repeat is used to turn tail-recursion into iteration. */
2660 code
= GET_CODE (x
);
2662 /* These types may be freely shared so we needn't do any resetting
2684 /* The chain of insns is not being copied. */
2691 RTX_FLAG (x
, used
) = 0;
2693 format_ptr
= GET_RTX_FORMAT (code
);
2694 length
= GET_RTX_LENGTH (code
);
2696 for (i
= 0; i
< length
; i
++)
2698 switch (*format_ptr
++)
2706 reset_used_flags (XEXP (x
, i
));
2710 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2711 reset_used_flags (XVECEXP (x
, i
, j
));
2717 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2718 to look for shared sub-parts. */
2721 set_used_flags (rtx x
)
2725 const char *format_ptr
;
2730 code
= GET_CODE (x
);
2732 /* These types may be freely shared so we needn't do any resetting
2754 /* The chain of insns is not being copied. */
2761 RTX_FLAG (x
, used
) = 1;
2763 format_ptr
= GET_RTX_FORMAT (code
);
2764 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2766 switch (*format_ptr
++)
2769 set_used_flags (XEXP (x
, i
));
2773 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2774 set_used_flags (XVECEXP (x
, i
, j
));
2780 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2781 Return X or the rtx for the pseudo reg the value of X was copied into.
2782 OTHER must be valid as a SET_DEST. */
2785 make_safe_from (rtx x
, rtx other
)
2788 switch (GET_CODE (other
))
2791 other
= SUBREG_REG (other
);
2793 case STRICT_LOW_PART
:
2796 other
= XEXP (other
, 0);
2802 if ((GET_CODE (other
) == MEM
2804 && GET_CODE (x
) != REG
2805 && GET_CODE (x
) != SUBREG
)
2806 || (GET_CODE (other
) == REG
2807 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2808 || reg_mentioned_p (other
, x
))))
2810 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2811 emit_move_insn (temp
, x
);
2817 /* Emission of insns (adding them to the doubly-linked list). */
2819 /* Return the first insn of the current sequence or current function. */
2827 /* Specify a new insn as the first in the chain. */
2830 set_first_insn (rtx insn
)
2832 if (PREV_INSN (insn
) != 0)
2837 /* Return the last insn emitted in current sequence or current function. */
2840 get_last_insn (void)
2845 /* Specify a new insn as the last in the chain. */
2848 set_last_insn (rtx insn
)
2850 if (NEXT_INSN (insn
) != 0)
2855 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2858 get_last_insn_anywhere (void)
2860 struct sequence_stack
*stack
;
2863 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2864 if (stack
->last
!= 0)
2869 /* Return the first nonnote insn emitted in current sequence or current
2870 function. This routine looks inside SEQUENCEs. */
2873 get_first_nonnote_insn (void)
2875 rtx insn
= first_insn
;
2879 insn
= next_insn (insn
);
2880 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2887 /* Return the last nonnote insn emitted in current sequence or current
2888 function. This routine looks inside SEQUENCEs. */
2891 get_last_nonnote_insn (void)
2893 rtx insn
= last_insn
;
2897 insn
= previous_insn (insn
);
2898 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2905 /* Return a number larger than any instruction's uid in this function. */
2910 return cur_insn_uid
;
2913 /* Renumber instructions so that no instruction UIDs are wasted. */
2916 renumber_insns (FILE *stream
)
2920 /* If we're not supposed to renumber instructions, don't. */
2921 if (!flag_renumber_insns
)
2924 /* If there aren't that many instructions, then it's not really
2925 worth renumbering them. */
2926 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2931 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2934 fprintf (stream
, "Renumbering insn %d to %d\n",
2935 INSN_UID (insn
), cur_insn_uid
);
2936 INSN_UID (insn
) = cur_insn_uid
++;
2940 /* Return the next insn. If it is a SEQUENCE, return the first insn
2944 next_insn (rtx insn
)
2948 insn
= NEXT_INSN (insn
);
2949 if (insn
&& GET_CODE (insn
) == INSN
2950 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2951 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2957 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2961 previous_insn (rtx insn
)
2965 insn
= PREV_INSN (insn
);
2966 if (insn
&& GET_CODE (insn
) == INSN
2967 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2968 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2974 /* Return the next insn after INSN that is not a NOTE. This routine does not
2975 look inside SEQUENCEs. */
2978 next_nonnote_insn (rtx insn
)
2982 insn
= NEXT_INSN (insn
);
2983 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2990 /* Return the previous insn before INSN that is not a NOTE. This routine does
2991 not look inside SEQUENCEs. */
2994 prev_nonnote_insn (rtx insn
)
2998 insn
= PREV_INSN (insn
);
2999 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
3006 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3007 or 0, if there is none. This routine does not look inside
3011 next_real_insn (rtx insn
)
3015 insn
= NEXT_INSN (insn
);
3016 if (insn
== 0 || GET_CODE (insn
) == INSN
3017 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
3024 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3025 or 0, if there is none. This routine does not look inside
3029 prev_real_insn (rtx insn
)
3033 insn
= PREV_INSN (insn
);
3034 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
3035 || GET_CODE (insn
) == JUMP_INSN
)
3042 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3043 This routine does not look inside SEQUENCEs. */
3046 last_call_insn (void)
3050 for (insn
= get_last_insn ();
3051 insn
&& GET_CODE (insn
) != CALL_INSN
;
3052 insn
= PREV_INSN (insn
))
3058 /* Find the next insn after INSN that really does something. This routine
3059 does not look inside SEQUENCEs. Until reload has completed, this is the
3060 same as next_real_insn. */
3063 active_insn_p (rtx insn
)
3065 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
3066 || (GET_CODE (insn
) == INSN
3067 && (! reload_completed
3068 || (GET_CODE (PATTERN (insn
)) != USE
3069 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
3073 next_active_insn (rtx insn
)
3077 insn
= NEXT_INSN (insn
);
3078 if (insn
== 0 || active_insn_p (insn
))
3085 /* Find the last insn before INSN that really does something. This routine
3086 does not look inside SEQUENCEs. Until reload has completed, this is the
3087 same as prev_real_insn. */
3090 prev_active_insn (rtx insn
)
3094 insn
= PREV_INSN (insn
);
3095 if (insn
== 0 || active_insn_p (insn
))
3102 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3105 next_label (rtx insn
)
3109 insn
= NEXT_INSN (insn
);
3110 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3117 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3120 prev_label (rtx insn
)
3124 insn
= PREV_INSN (insn
);
3125 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3133 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3134 and REG_CC_USER notes so we can find it. */
3137 link_cc0_insns (rtx insn
)
3139 rtx user
= next_nonnote_insn (insn
);
3141 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3142 user
= XVECEXP (PATTERN (user
), 0, 0);
3144 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3146 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3149 /* Return the next insn that uses CC0 after INSN, which is assumed to
3150 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3151 applied to the result of this function should yield INSN).
3153 Normally, this is simply the next insn. However, if a REG_CC_USER note
3154 is present, it contains the insn that uses CC0.
3156 Return 0 if we can't find the insn. */
3159 next_cc0_user (rtx insn
)
3161 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3164 return XEXP (note
, 0);
3166 insn
= next_nonnote_insn (insn
);
3167 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3168 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3170 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3176 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3177 note, it is the previous insn. */
3180 prev_cc0_setter (rtx insn
)
3182 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3185 return XEXP (note
, 0);
3187 insn
= prev_nonnote_insn (insn
);
3188 if (! sets_cc0_p (PATTERN (insn
)))
3195 /* Increment the label uses for all labels present in rtx. */
3198 mark_label_nuses (rtx x
)
3204 code
= GET_CODE (x
);
3205 if (code
== LABEL_REF
)
3206 LABEL_NUSES (XEXP (x
, 0))++;
3208 fmt
= GET_RTX_FORMAT (code
);
3209 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3212 mark_label_nuses (XEXP (x
, i
));
3213 else if (fmt
[i
] == 'E')
3214 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3215 mark_label_nuses (XVECEXP (x
, i
, j
));
3220 /* Try splitting insns that can be split for better scheduling.
3221 PAT is the pattern which might split.
3222 TRIAL is the insn providing PAT.
3223 LAST is nonzero if we should return the last insn of the sequence produced.
3225 If this routine succeeds in splitting, it returns the first or last
3226 replacement insn depending on the value of LAST. Otherwise, it
3227 returns TRIAL. If the insn to be returned can be split, it will be. */
3230 try_split (rtx pat
, rtx trial
, int last
)
3232 rtx before
= PREV_INSN (trial
);
3233 rtx after
= NEXT_INSN (trial
);
3234 int has_barrier
= 0;
3238 rtx insn_last
, insn
;
3241 if (any_condjump_p (trial
)
3242 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3243 split_branch_probability
= INTVAL (XEXP (note
, 0));
3244 probability
= split_branch_probability
;
3246 seq
= split_insns (pat
, trial
);
3248 split_branch_probability
= -1;
3250 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3251 We may need to handle this specially. */
3252 if (after
&& GET_CODE (after
) == BARRIER
)
3255 after
= NEXT_INSN (after
);
3261 /* Avoid infinite loop if any insn of the result matches
3262 the original pattern. */
3266 if (INSN_P (insn_last
)
3267 && rtx_equal_p (PATTERN (insn_last
), pat
))
3269 if (!NEXT_INSN (insn_last
))
3271 insn_last
= NEXT_INSN (insn_last
);
3275 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3277 if (GET_CODE (insn
) == JUMP_INSN
)
3279 mark_jump_label (PATTERN (insn
), insn
, 0);
3281 if (probability
!= -1
3282 && any_condjump_p (insn
)
3283 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3285 /* We can preserve the REG_BR_PROB notes only if exactly
3286 one jump is created, otherwise the machine description
3287 is responsible for this step using
3288 split_branch_probability variable. */
3292 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3293 GEN_INT (probability
),
3299 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3300 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3301 if (GET_CODE (trial
) == CALL_INSN
)
3303 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3304 if (GET_CODE (insn
) == CALL_INSN
)
3306 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3309 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3310 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3314 /* Copy notes, particularly those related to the CFG. */
3315 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3317 switch (REG_NOTE_KIND (note
))
3321 while (insn
!= NULL_RTX
)
3323 if (GET_CODE (insn
) == CALL_INSN
3324 || (flag_non_call_exceptions
3325 && may_trap_p (PATTERN (insn
))))
3327 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3330 insn
= PREV_INSN (insn
);
3336 case REG_ALWAYS_RETURN
:
3338 while (insn
!= NULL_RTX
)
3340 if (GET_CODE (insn
) == CALL_INSN
)
3342 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3345 insn
= PREV_INSN (insn
);
3349 case REG_NON_LOCAL_GOTO
:
3351 while (insn
!= NULL_RTX
)
3353 if (GET_CODE (insn
) == JUMP_INSN
)
3355 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3358 insn
= PREV_INSN (insn
);
3367 /* If there are LABELS inside the split insns increment the
3368 usage count so we don't delete the label. */
3369 if (GET_CODE (trial
) == INSN
)
3372 while (insn
!= NULL_RTX
)
3374 if (GET_CODE (insn
) == INSN
)
3375 mark_label_nuses (PATTERN (insn
));
3377 insn
= PREV_INSN (insn
);
3381 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3383 delete_insn (trial
);
3385 emit_barrier_after (tem
);
3387 /* Recursively call try_split for each new insn created; by the
3388 time control returns here that insn will be fully split, so
3389 set LAST and continue from the insn after the one returned.
3390 We can't use next_active_insn here since AFTER may be a note.
3391 Ignore deleted insns, which can be occur if not optimizing. */
3392 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3393 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3394 tem
= try_split (PATTERN (tem
), tem
, 1);
3396 /* Return either the first or the last insn, depending on which was
3399 ? (after
? PREV_INSN (after
) : last_insn
)
3400 : NEXT_INSN (before
);
3403 /* Make and return an INSN rtx, initializing all its slots.
3404 Store PATTERN in the pattern slots. */
3407 make_insn_raw (rtx pattern
)
3411 insn
= rtx_alloc (INSN
);
3413 INSN_UID (insn
) = cur_insn_uid
++;
3414 PATTERN (insn
) = pattern
;
3415 INSN_CODE (insn
) = -1;
3416 LOG_LINKS (insn
) = NULL
;
3417 REG_NOTES (insn
) = NULL
;
3418 INSN_LOCATOR (insn
) = 0;
3419 BLOCK_FOR_INSN (insn
) = NULL
;
3421 #ifdef ENABLE_RTL_CHECKING
3424 && (returnjump_p (insn
)
3425 || (GET_CODE (insn
) == SET
3426 && SET_DEST (insn
) == pc_rtx
)))
3428 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3436 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3439 make_jump_insn_raw (rtx pattern
)
3443 insn
= rtx_alloc (JUMP_INSN
);
3444 INSN_UID (insn
) = cur_insn_uid
++;
3446 PATTERN (insn
) = pattern
;
3447 INSN_CODE (insn
) = -1;
3448 LOG_LINKS (insn
) = NULL
;
3449 REG_NOTES (insn
) = NULL
;
3450 JUMP_LABEL (insn
) = NULL
;
3451 INSN_LOCATOR (insn
) = 0;
3452 BLOCK_FOR_INSN (insn
) = NULL
;
3457 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3460 make_call_insn_raw (rtx pattern
)
3464 insn
= rtx_alloc (CALL_INSN
);
3465 INSN_UID (insn
) = cur_insn_uid
++;
3467 PATTERN (insn
) = pattern
;
3468 INSN_CODE (insn
) = -1;
3469 LOG_LINKS (insn
) = NULL
;
3470 REG_NOTES (insn
) = NULL
;
3471 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3472 INSN_LOCATOR (insn
) = 0;
3473 BLOCK_FOR_INSN (insn
) = NULL
;
3478 /* Add INSN to the end of the doubly-linked list.
3479 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3484 PREV_INSN (insn
) = last_insn
;
3485 NEXT_INSN (insn
) = 0;
3487 if (NULL
!= last_insn
)
3488 NEXT_INSN (last_insn
) = insn
;
3490 if (NULL
== first_insn
)
3496 /* Add INSN into the doubly-linked list after insn AFTER. This and
3497 the next should be the only functions called to insert an insn once
3498 delay slots have been filled since only they know how to update a
3502 add_insn_after (rtx insn
, rtx after
)
3504 rtx next
= NEXT_INSN (after
);
3507 if (optimize
&& INSN_DELETED_P (after
))
3510 NEXT_INSN (insn
) = next
;
3511 PREV_INSN (insn
) = after
;
3515 PREV_INSN (next
) = insn
;
3516 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3517 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3519 else if (last_insn
== after
)
3523 struct sequence_stack
*stack
= seq_stack
;
3524 /* Scan all pending sequences too. */
3525 for (; stack
; stack
= stack
->next
)
3526 if (after
== stack
->last
)
3536 if (GET_CODE (after
) != BARRIER
3537 && GET_CODE (insn
) != BARRIER
3538 && (bb
= BLOCK_FOR_INSN (after
)))
3540 set_block_for_insn (insn
, bb
);
3542 bb
->flags
|= BB_DIRTY
;
3543 /* Should not happen as first in the BB is always
3544 either NOTE or LABEL. */
3545 if (BB_END (bb
) == after
3546 /* Avoid clobbering of structure when creating new BB. */
3547 && GET_CODE (insn
) != BARRIER
3548 && (GET_CODE (insn
) != NOTE
3549 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3553 NEXT_INSN (after
) = insn
;
3554 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3556 rtx sequence
= PATTERN (after
);
3557 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3561 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3562 the previous should be the only functions called to insert an insn once
3563 delay slots have been filled since only they know how to update a
3567 add_insn_before (rtx insn
, rtx before
)
3569 rtx prev
= PREV_INSN (before
);
3572 if (optimize
&& INSN_DELETED_P (before
))
3575 PREV_INSN (insn
) = prev
;
3576 NEXT_INSN (insn
) = before
;
3580 NEXT_INSN (prev
) = insn
;
3581 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3583 rtx sequence
= PATTERN (prev
);
3584 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3587 else if (first_insn
== before
)
3591 struct sequence_stack
*stack
= seq_stack
;
3592 /* Scan all pending sequences too. */
3593 for (; stack
; stack
= stack
->next
)
3594 if (before
== stack
->first
)
3596 stack
->first
= insn
;
3604 if (GET_CODE (before
) != BARRIER
3605 && GET_CODE (insn
) != BARRIER
3606 && (bb
= BLOCK_FOR_INSN (before
)))
3608 set_block_for_insn (insn
, bb
);
3610 bb
->flags
|= BB_DIRTY
;
3611 /* Should not happen as first in the BB is always
3612 either NOTE or LABEl. */
3613 if (BB_HEAD (bb
) == insn
3614 /* Avoid clobbering of structure when creating new BB. */
3615 && GET_CODE (insn
) != BARRIER
3616 && (GET_CODE (insn
) != NOTE
3617 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3621 PREV_INSN (before
) = insn
;
3622 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3623 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3626 /* Remove an insn from its doubly-linked list. This function knows how
3627 to handle sequences. */
3629 remove_insn (rtx insn
)
3631 rtx next
= NEXT_INSN (insn
);
3632 rtx prev
= PREV_INSN (insn
);
3637 NEXT_INSN (prev
) = next
;
3638 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3640 rtx sequence
= PATTERN (prev
);
3641 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3644 else if (first_insn
== insn
)
3648 struct sequence_stack
*stack
= seq_stack
;
3649 /* Scan all pending sequences too. */
3650 for (; stack
; stack
= stack
->next
)
3651 if (insn
== stack
->first
)
3653 stack
->first
= next
;
3663 PREV_INSN (next
) = prev
;
3664 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3665 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3667 else if (last_insn
== insn
)
3671 struct sequence_stack
*stack
= seq_stack
;
3672 /* Scan all pending sequences too. */
3673 for (; stack
; stack
= stack
->next
)
3674 if (insn
== stack
->last
)
3683 if (GET_CODE (insn
) != BARRIER
3684 && (bb
= BLOCK_FOR_INSN (insn
)))
3687 bb
->flags
|= BB_DIRTY
;
3688 if (BB_HEAD (bb
) == insn
)
3690 /* Never ever delete the basic block note without deleting whole
3692 if (GET_CODE (insn
) == NOTE
)
3694 BB_HEAD (bb
) = next
;
3696 if (BB_END (bb
) == insn
)
3701 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3704 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3706 if (! call_insn
|| GET_CODE (call_insn
) != CALL_INSN
)
3709 /* Put the register usage information on the CALL. If there is already
3710 some usage information, put ours at the end. */
3711 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3715 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3716 link
= XEXP (link
, 1))
3719 XEXP (link
, 1) = call_fusage
;
3722 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3725 /* Delete all insns made since FROM.
3726 FROM becomes the new last instruction. */
3729 delete_insns_since (rtx from
)
3734 NEXT_INSN (from
) = 0;
3738 /* This function is deprecated, please use sequences instead.
3740 Move a consecutive bunch of insns to a different place in the chain.
3741 The insns to be moved are those between FROM and TO.
3742 They are moved to a new position after the insn AFTER.
3743 AFTER must not be FROM or TO or any insn in between.
3745 This function does not know about SEQUENCEs and hence should not be
3746 called after delay-slot filling has been done. */
3749 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3751 /* Splice this bunch out of where it is now. */
3752 if (PREV_INSN (from
))
3753 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3755 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3756 if (last_insn
== to
)
3757 last_insn
= PREV_INSN (from
);
3758 if (first_insn
== from
)
3759 first_insn
= NEXT_INSN (to
);
3761 /* Make the new neighbors point to it and it to them. */
3762 if (NEXT_INSN (after
))
3763 PREV_INSN (NEXT_INSN (after
)) = to
;
3765 NEXT_INSN (to
) = NEXT_INSN (after
);
3766 PREV_INSN (from
) = after
;
3767 NEXT_INSN (after
) = from
;
3768 if (after
== last_insn
)
3772 /* Same as function above, but take care to update BB boundaries. */
3774 reorder_insns (rtx from
, rtx to
, rtx after
)
3776 rtx prev
= PREV_INSN (from
);
3777 basic_block bb
, bb2
;
3779 reorder_insns_nobb (from
, to
, after
);
3781 if (GET_CODE (after
) != BARRIER
3782 && (bb
= BLOCK_FOR_INSN (after
)))
3785 bb
->flags
|= BB_DIRTY
;
3787 if (GET_CODE (from
) != BARRIER
3788 && (bb2
= BLOCK_FOR_INSN (from
)))
3790 if (BB_END (bb2
) == to
)
3791 BB_END (bb2
) = prev
;
3792 bb2
->flags
|= BB_DIRTY
;
3795 if (BB_END (bb
) == after
)
3798 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3799 set_block_for_insn (x
, bb
);
3803 /* Return the line note insn preceding INSN. */
3806 find_line_note (rtx insn
)
3808 if (no_line_numbers
)
3811 for (; insn
; insn
= PREV_INSN (insn
))
3812 if (GET_CODE (insn
) == NOTE
3813 && NOTE_LINE_NUMBER (insn
) >= 0)
3819 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3820 of the moved insns when debugging. This may insert a note between AFTER
3821 and FROM, and another one after TO. */
3824 reorder_insns_with_line_notes (rtx from
, rtx to
, rtx after
)
3826 rtx from_line
= find_line_note (from
);
3827 rtx after_line
= find_line_note (after
);
3829 reorder_insns (from
, to
, after
);
3831 if (from_line
== after_line
)
3835 emit_note_copy_after (from_line
, after
);
3837 emit_note_copy_after (after_line
, to
);
3840 /* Remove unnecessary notes from the instruction stream. */
3843 remove_unnecessary_notes (void)
3845 rtx block_stack
= NULL_RTX
;
3846 rtx eh_stack
= NULL_RTX
;
3851 /* We must not remove the first instruction in the function because
3852 the compiler depends on the first instruction being a note. */
3853 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3855 /* Remember what's next. */
3856 next
= NEXT_INSN (insn
);
3858 /* We're only interested in notes. */
3859 if (GET_CODE (insn
) != NOTE
)
3862 switch (NOTE_LINE_NUMBER (insn
))
3864 case NOTE_INSN_DELETED
:
3865 case NOTE_INSN_LOOP_END_TOP_COND
:
3869 case NOTE_INSN_EH_REGION_BEG
:
3870 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3873 case NOTE_INSN_EH_REGION_END
:
3874 /* Too many end notes. */
3875 if (eh_stack
== NULL_RTX
)
3877 /* Mismatched nesting. */
3878 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3881 eh_stack
= XEXP (eh_stack
, 1);
3882 free_INSN_LIST_node (tmp
);
3885 case NOTE_INSN_BLOCK_BEG
:
3886 /* By now, all notes indicating lexical blocks should have
3887 NOTE_BLOCK filled in. */
3888 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3890 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3893 case NOTE_INSN_BLOCK_END
:
3894 /* Too many end notes. */
3895 if (block_stack
== NULL_RTX
)
3897 /* Mismatched nesting. */
3898 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3901 block_stack
= XEXP (block_stack
, 1);
3902 free_INSN_LIST_node (tmp
);
3904 /* Scan back to see if there are any non-note instructions
3905 between INSN and the beginning of this block. If not,
3906 then there is no PC range in the generated code that will
3907 actually be in this block, so there's no point in
3908 remembering the existence of the block. */
3909 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3911 /* This block contains a real instruction. Note that we
3912 don't include labels; if the only thing in the block
3913 is a label, then there are still no PC values that
3914 lie within the block. */
3918 /* We're only interested in NOTEs. */
3919 if (GET_CODE (tmp
) != NOTE
)
3922 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3924 /* We just verified that this BLOCK matches us with
3925 the block_stack check above. Never delete the
3926 BLOCK for the outermost scope of the function; we
3927 can refer to names from that scope even if the
3928 block notes are messed up. */
3929 if (! is_body_block (NOTE_BLOCK (insn
))
3930 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3937 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3938 /* There's a nested block. We need to leave the
3939 current block in place since otherwise the debugger
3940 wouldn't be able to show symbols from our block in
3941 the nested block. */
3947 /* Too many begin notes. */
3948 if (block_stack
|| eh_stack
)
3953 /* Emit insn(s) of given code and pattern
3954 at a specified place within the doubly-linked list.
3956 All of the emit_foo global entry points accept an object
3957 X which is either an insn list or a PATTERN of a single
3960 There are thus a few canonical ways to generate code and
3961 emit it at a specific place in the instruction stream. For
3962 example, consider the instruction named SPOT and the fact that
3963 we would like to emit some instructions before SPOT. We might
3967 ... emit the new instructions ...
3968 insns_head = get_insns ();
3971 emit_insn_before (insns_head, SPOT);
3973 It used to be common to generate SEQUENCE rtl instead, but that
3974 is a relic of the past which no longer occurs. The reason is that
3975 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3976 generated would almost certainly die right after it was created. */
3978 /* Make X be output before the instruction BEFORE. */
3981 emit_insn_before (rtx x
, rtx before
)
3986 #ifdef ENABLE_RTL_CHECKING
3987 if (before
== NULL_RTX
)
3994 switch (GET_CODE (x
))
4005 rtx next
= NEXT_INSN (insn
);
4006 add_insn_before (insn
, before
);
4012 #ifdef ENABLE_RTL_CHECKING
4019 last
= make_insn_raw (x
);
4020 add_insn_before (last
, before
);
4027 /* Make an instruction with body X and code JUMP_INSN
4028 and output it before the instruction BEFORE. */
4031 emit_jump_insn_before (rtx x
, rtx before
)
4033 rtx insn
, last
= NULL_RTX
;
4035 #ifdef ENABLE_RTL_CHECKING
4036 if (before
== NULL_RTX
)
4040 switch (GET_CODE (x
))
4051 rtx next
= NEXT_INSN (insn
);
4052 add_insn_before (insn
, before
);
4058 #ifdef ENABLE_RTL_CHECKING
4065 last
= make_jump_insn_raw (x
);
4066 add_insn_before (last
, before
);
4073 /* Make an instruction with body X and code CALL_INSN
4074 and output it before the instruction BEFORE. */
4077 emit_call_insn_before (rtx x
, rtx before
)
4079 rtx last
= NULL_RTX
, insn
;
4081 #ifdef ENABLE_RTL_CHECKING
4082 if (before
== NULL_RTX
)
4086 switch (GET_CODE (x
))
4097 rtx next
= NEXT_INSN (insn
);
4098 add_insn_before (insn
, before
);
4104 #ifdef ENABLE_RTL_CHECKING
4111 last
= make_call_insn_raw (x
);
4112 add_insn_before (last
, before
);
4119 /* Make an insn of code BARRIER
4120 and output it before the insn BEFORE. */
4123 emit_barrier_before (rtx before
)
4125 rtx insn
= rtx_alloc (BARRIER
);
4127 INSN_UID (insn
) = cur_insn_uid
++;
4129 add_insn_before (insn
, before
);
4133 /* Emit the label LABEL before the insn BEFORE. */
4136 emit_label_before (rtx label
, rtx before
)
4138 /* This can be called twice for the same label as a result of the
4139 confusion that follows a syntax error! So make it harmless. */
4140 if (INSN_UID (label
) == 0)
4142 INSN_UID (label
) = cur_insn_uid
++;
4143 add_insn_before (label
, before
);
4149 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4152 emit_note_before (int subtype
, rtx before
)
4154 rtx note
= rtx_alloc (NOTE
);
4155 INSN_UID (note
) = cur_insn_uid
++;
4156 NOTE_SOURCE_FILE (note
) = 0;
4157 NOTE_LINE_NUMBER (note
) = subtype
;
4158 BLOCK_FOR_INSN (note
) = NULL
;
4160 add_insn_before (note
, before
);
4164 /* Helper for emit_insn_after, handles lists of instructions
4167 static rtx
emit_insn_after_1 (rtx
, rtx
);
4170 emit_insn_after_1 (rtx first
, rtx after
)
4176 if (GET_CODE (after
) != BARRIER
4177 && (bb
= BLOCK_FOR_INSN (after
)))
4179 bb
->flags
|= BB_DIRTY
;
4180 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4181 if (GET_CODE (last
) != BARRIER
)
4182 set_block_for_insn (last
, bb
);
4183 if (GET_CODE (last
) != BARRIER
)
4184 set_block_for_insn (last
, bb
);
4185 if (BB_END (bb
) == after
)
4189 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4192 after_after
= NEXT_INSN (after
);
4194 NEXT_INSN (after
) = first
;
4195 PREV_INSN (first
) = after
;
4196 NEXT_INSN (last
) = after_after
;
4198 PREV_INSN (after_after
) = last
;
4200 if (after
== last_insn
)
4205 /* Make X be output after the insn AFTER. */
4208 emit_insn_after (rtx x
, rtx after
)
4212 #ifdef ENABLE_RTL_CHECKING
4213 if (after
== NULL_RTX
)
4220 switch (GET_CODE (x
))
4228 last
= emit_insn_after_1 (x
, after
);
4231 #ifdef ENABLE_RTL_CHECKING
4238 last
= make_insn_raw (x
);
4239 add_insn_after (last
, after
);
4246 /* Similar to emit_insn_after, except that line notes are to be inserted so
4247 as to act as if this insn were at FROM. */
4250 emit_insn_after_with_line_notes (rtx x
, rtx after
, rtx from
)
4252 rtx from_line
= find_line_note (from
);
4253 rtx after_line
= find_line_note (after
);
4254 rtx insn
= emit_insn_after (x
, after
);
4257 emit_note_copy_after (from_line
, after
);
4260 emit_note_copy_after (after_line
, insn
);
4263 /* Make an insn of code JUMP_INSN with body X
4264 and output it after the insn AFTER. */
4267 emit_jump_insn_after (rtx x
, rtx after
)
4271 #ifdef ENABLE_RTL_CHECKING
4272 if (after
== NULL_RTX
)
4276 switch (GET_CODE (x
))
4284 last
= emit_insn_after_1 (x
, after
);
4287 #ifdef ENABLE_RTL_CHECKING
4294 last
= make_jump_insn_raw (x
);
4295 add_insn_after (last
, after
);
4302 /* Make an instruction with body X and code CALL_INSN
4303 and output it after the instruction AFTER. */
4306 emit_call_insn_after (rtx x
, rtx after
)
4310 #ifdef ENABLE_RTL_CHECKING
4311 if (after
== NULL_RTX
)
4315 switch (GET_CODE (x
))
4323 last
= emit_insn_after_1 (x
, after
);
4326 #ifdef ENABLE_RTL_CHECKING
4333 last
= make_call_insn_raw (x
);
4334 add_insn_after (last
, after
);
4341 /* Make an insn of code BARRIER
4342 and output it after the insn AFTER. */
4345 emit_barrier_after (rtx after
)
4347 rtx insn
= rtx_alloc (BARRIER
);
4349 INSN_UID (insn
) = cur_insn_uid
++;
4351 add_insn_after (insn
, after
);
4355 /* Emit the label LABEL after the insn AFTER. */
4358 emit_label_after (rtx label
, rtx after
)
4360 /* This can be called twice for the same label
4361 as a result of the confusion that follows a syntax error!
4362 So make it harmless. */
4363 if (INSN_UID (label
) == 0)
4365 INSN_UID (label
) = cur_insn_uid
++;
4366 add_insn_after (label
, after
);
4372 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4375 emit_note_after (int subtype
, rtx after
)
4377 rtx note
= rtx_alloc (NOTE
);
4378 INSN_UID (note
) = cur_insn_uid
++;
4379 NOTE_SOURCE_FILE (note
) = 0;
4380 NOTE_LINE_NUMBER (note
) = subtype
;
4381 BLOCK_FOR_INSN (note
) = NULL
;
4382 add_insn_after (note
, after
);
4386 /* Emit a copy of note ORIG after the insn AFTER. */
4389 emit_note_copy_after (rtx orig
, rtx after
)
4393 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4399 note
= rtx_alloc (NOTE
);
4400 INSN_UID (note
) = cur_insn_uid
++;
4401 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4402 NOTE_DATA (note
) = NOTE_DATA (orig
);
4403 BLOCK_FOR_INSN (note
) = NULL
;
4404 add_insn_after (note
, after
);
4408 /* Like emit_insn_after, but set INSN_LOCATOR according to SCOPE. */
4410 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4412 rtx last
= emit_insn_after (pattern
, after
);
4414 if (pattern
== NULL_RTX
)
4417 after
= NEXT_INSN (after
);
4420 if (active_insn_p (after
))
4421 INSN_LOCATOR (after
) = loc
;
4424 after
= NEXT_INSN (after
);
4429 /* Like emit_jump_insn_after, but set INSN_LOCATOR according to SCOPE. */
4431 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4433 rtx last
= emit_jump_insn_after (pattern
, after
);
4435 if (pattern
== NULL_RTX
)
4438 after
= NEXT_INSN (after
);
4441 if (active_insn_p (after
))
4442 INSN_LOCATOR (after
) = loc
;
4445 after
= NEXT_INSN (after
);
4450 /* Like emit_call_insn_after, but set INSN_LOCATOR according to SCOPE. */
4452 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4454 rtx last
= emit_call_insn_after (pattern
, after
);
4456 if (pattern
== NULL_RTX
)
4459 after
= NEXT_INSN (after
);
4462 if (active_insn_p (after
))
4463 INSN_LOCATOR (after
) = loc
;
4466 after
= NEXT_INSN (after
);
4471 /* Like emit_insn_before, but set INSN_LOCATOR according to SCOPE. */
4473 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4475 rtx first
= PREV_INSN (before
);
4476 rtx last
= emit_insn_before (pattern
, before
);
4478 if (pattern
== NULL_RTX
)
4481 first
= NEXT_INSN (first
);
4484 if (active_insn_p (first
))
4485 INSN_LOCATOR (first
) = loc
;
4488 first
= NEXT_INSN (first
);
4493 /* Take X and emit it at the end of the doubly-linked
4496 Returns the last insn emitted. */
4501 rtx last
= last_insn
;
4507 switch (GET_CODE (x
))
4518 rtx next
= NEXT_INSN (insn
);
4525 #ifdef ENABLE_RTL_CHECKING
4532 last
= make_insn_raw (x
);
4540 /* Make an insn of code JUMP_INSN with pattern X
4541 and add it to the end of the doubly-linked list. */
4544 emit_jump_insn (rtx x
)
4546 rtx last
= NULL_RTX
, insn
;
4548 switch (GET_CODE (x
))
4559 rtx next
= NEXT_INSN (insn
);
4566 #ifdef ENABLE_RTL_CHECKING
4573 last
= make_jump_insn_raw (x
);
4581 /* Make an insn of code CALL_INSN with pattern X
4582 and add it to the end of the doubly-linked list. */
4585 emit_call_insn (rtx x
)
4589 switch (GET_CODE (x
))
4597 insn
= emit_insn (x
);
4600 #ifdef ENABLE_RTL_CHECKING
4607 insn
= make_call_insn_raw (x
);
4615 /* Add the label LABEL to the end of the doubly-linked list. */
4618 emit_label (rtx label
)
4620 /* This can be called twice for the same label
4621 as a result of the confusion that follows a syntax error!
4622 So make it harmless. */
4623 if (INSN_UID (label
) == 0)
4625 INSN_UID (label
) = cur_insn_uid
++;
4631 /* Make an insn of code BARRIER
4632 and add it to the end of the doubly-linked list. */
4637 rtx barrier
= rtx_alloc (BARRIER
);
4638 INSN_UID (barrier
) = cur_insn_uid
++;
4643 /* Make line numbering NOTE insn for LOCATION add it to the end
4644 of the doubly-linked list, but only if line-numbers are desired for
4645 debugging info and it doesn't match the previous one. */
4648 emit_line_note (location_t location
)
4652 set_file_and_line_for_stmt (location
);
4654 if (location
.file
&& last_location
.file
4655 && !strcmp (location
.file
, last_location
.file
)
4656 && location
.line
== last_location
.line
)
4658 last_location
= location
;
4660 if (no_line_numbers
)
4666 note
= emit_note (location
.line
);
4667 NOTE_SOURCE_FILE (note
) = location
.file
;
4672 /* Emit a copy of note ORIG. */
4675 emit_note_copy (rtx orig
)
4679 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4685 note
= rtx_alloc (NOTE
);
4687 INSN_UID (note
) = cur_insn_uid
++;
4688 NOTE_DATA (note
) = NOTE_DATA (orig
);
4689 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4690 BLOCK_FOR_INSN (note
) = NULL
;
4696 /* Make an insn of code NOTE or type NOTE_NO
4697 and add it to the end of the doubly-linked list. */
4700 emit_note (int note_no
)
4704 note
= rtx_alloc (NOTE
);
4705 INSN_UID (note
) = cur_insn_uid
++;
4706 NOTE_LINE_NUMBER (note
) = note_no
;
4707 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4708 BLOCK_FOR_INSN (note
) = NULL
;
4713 /* Cause next statement to emit a line note even if the line number
4717 force_next_line_note (void)
4719 last_location
.line
= -1;
4722 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4723 note of this type already exists, remove it first. */
4726 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4728 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4734 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4735 has multiple sets (some callers assume single_set
4736 means the insn only has one set, when in fact it
4737 means the insn only has one * useful * set). */
4738 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4745 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4746 It serves no useful purpose and breaks eliminate_regs. */
4747 if (GET_CODE (datum
) == ASM_OPERANDS
)
4757 XEXP (note
, 0) = datum
;
4761 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4762 return REG_NOTES (insn
);
4765 /* Return an indication of which type of insn should have X as a body.
4766 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4769 classify_insn (rtx x
)
4771 if (GET_CODE (x
) == CODE_LABEL
)
4773 if (GET_CODE (x
) == CALL
)
4775 if (GET_CODE (x
) == RETURN
)
4777 if (GET_CODE (x
) == SET
)
4779 if (SET_DEST (x
) == pc_rtx
)
4781 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4786 if (GET_CODE (x
) == PARALLEL
)
4789 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4790 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4792 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4793 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4795 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4796 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4802 /* Emit the rtl pattern X as an appropriate kind of insn.
4803 If X is a label, it is simply added into the insn chain. */
4808 enum rtx_code code
= classify_insn (x
);
4810 if (code
== CODE_LABEL
)
4811 return emit_label (x
);
4812 else if (code
== INSN
)
4813 return emit_insn (x
);
4814 else if (code
== JUMP_INSN
)
4816 rtx insn
= emit_jump_insn (x
);
4817 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4818 return emit_barrier ();
4821 else if (code
== CALL_INSN
)
4822 return emit_call_insn (x
);
4827 /* Space for free sequence stack entries. */
4828 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4830 /* Begin emitting insns to a sequence which can be packaged in an
4831 RTL_EXPR. If this sequence will contain something that might cause
4832 the compiler to pop arguments to function calls (because those
4833 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4834 details), use do_pending_stack_adjust before calling this function.
4835 That will ensure that the deferred pops are not accidentally
4836 emitted in the middle of this sequence. */
4839 start_sequence (void)
4841 struct sequence_stack
*tem
;
4843 if (free_sequence_stack
!= NULL
)
4845 tem
= free_sequence_stack
;
4846 free_sequence_stack
= tem
->next
;
4849 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4851 tem
->next
= seq_stack
;
4852 tem
->first
= first_insn
;
4853 tem
->last
= last_insn
;
4854 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4862 /* Similarly, but indicate that this sequence will be placed in T, an
4863 RTL_EXPR. See the documentation for start_sequence for more
4864 information about how to use this function. */
4867 start_sequence_for_rtl_expr (tree t
)
4874 /* Set up the insn chain starting with FIRST as the current sequence,
4875 saving the previously current one. See the documentation for
4876 start_sequence for more information about how to use this function. */
4879 push_to_sequence (rtx first
)
4885 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4891 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4894 push_to_full_sequence (rtx first
, rtx last
)
4899 /* We really should have the end of the insn chain here. */
4900 if (last
&& NEXT_INSN (last
))
4904 /* Set up the outer-level insn chain
4905 as the current sequence, saving the previously current one. */
4908 push_topmost_sequence (void)
4910 struct sequence_stack
*stack
, *top
= NULL
;
4914 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4917 first_insn
= top
->first
;
4918 last_insn
= top
->last
;
4919 seq_rtl_expr
= top
->sequence_rtl_expr
;
4922 /* After emitting to the outer-level insn chain, update the outer-level
4923 insn chain, and restore the previous saved state. */
4926 pop_topmost_sequence (void)
4928 struct sequence_stack
*stack
, *top
= NULL
;
4930 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4933 top
->first
= first_insn
;
4934 top
->last
= last_insn
;
4935 /* ??? Why don't we save seq_rtl_expr here? */
4940 /* After emitting to a sequence, restore previous saved state.
4942 To get the contents of the sequence just made, you must call
4943 `get_insns' *before* calling here.
4945 If the compiler might have deferred popping arguments while
4946 generating this sequence, and this sequence will not be immediately
4947 inserted into the instruction stream, use do_pending_stack_adjust
4948 before calling get_insns. That will ensure that the deferred
4949 pops are inserted into this sequence, and not into some random
4950 location in the instruction stream. See INHIBIT_DEFER_POP for more
4951 information about deferred popping of arguments. */
4956 struct sequence_stack
*tem
= seq_stack
;
4958 first_insn
= tem
->first
;
4959 last_insn
= tem
->last
;
4960 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4961 seq_stack
= tem
->next
;
4963 memset (tem
, 0, sizeof (*tem
));
4964 tem
->next
= free_sequence_stack
;
4965 free_sequence_stack
= tem
;
4968 /* This works like end_sequence, but records the old sequence in FIRST
4972 end_full_sequence (rtx
*first
, rtx
*last
)
4974 *first
= first_insn
;
4979 /* Return 1 if currently emitting into a sequence. */
4982 in_sequence_p (void)
4984 return seq_stack
!= 0;
4987 /* Put the various virtual registers into REGNO_REG_RTX. */
4990 init_virtual_regs (struct emit_status
*es
)
4992 rtx
*ptr
= es
->x_regno_reg_rtx
;
4993 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4994 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4995 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4996 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4997 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
5001 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5002 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
5003 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
5004 static int copy_insn_n_scratches
;
5006 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5007 copied an ASM_OPERANDS.
5008 In that case, it is the original input-operand vector. */
5009 static rtvec orig_asm_operands_vector
;
5011 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5012 copied an ASM_OPERANDS.
5013 In that case, it is the copied input-operand vector. */
5014 static rtvec copy_asm_operands_vector
;
5016 /* Likewise for the constraints vector. */
5017 static rtvec orig_asm_constraints_vector
;
5018 static rtvec copy_asm_constraints_vector
;
5020 /* Recursively create a new copy of an rtx for copy_insn.
5021 This function differs from copy_rtx in that it handles SCRATCHes and
5022 ASM_OPERANDs properly.
5023 Normally, this function is not used directly; use copy_insn as front end.
5024 However, you could first copy an insn pattern with copy_insn and then use
5025 this function afterwards to properly copy any REG_NOTEs containing
5029 copy_insn_1 (rtx orig
)
5034 const char *format_ptr
;
5036 code
= GET_CODE (orig
);
5052 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
5057 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
5058 if (copy_insn_scratch_in
[i
] == orig
)
5059 return copy_insn_scratch_out
[i
];
5063 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5064 a LABEL_REF, it isn't sharable. */
5065 if (GET_CODE (XEXP (orig
, 0)) == PLUS
5066 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
5067 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
5071 /* A MEM with a constant address is not sharable. The problem is that
5072 the constant address may need to be reloaded. If the mem is shared,
5073 then reloading one copy of this mem will cause all copies to appear
5074 to have been reloaded. */
5080 copy
= rtx_alloc (code
);
5082 /* Copy the various flags, and other information. We assume that
5083 all fields need copying, and then clear the fields that should
5084 not be copied. That is the sensible default behavior, and forces
5085 us to explicitly document why we are *not* copying a flag. */
5086 memcpy (copy
, orig
, RTX_HDR_SIZE
);
5088 /* We do not copy the USED flag, which is used as a mark bit during
5089 walks over the RTL. */
5090 RTX_FLAG (copy
, used
) = 0;
5092 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5093 if (GET_RTX_CLASS (code
) == 'i')
5095 RTX_FLAG (copy
, jump
) = 0;
5096 RTX_FLAG (copy
, call
) = 0;
5097 RTX_FLAG (copy
, frame_related
) = 0;
5100 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5102 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5104 copy
->u
.fld
[i
] = orig
->u
.fld
[i
];
5105 switch (*format_ptr
++)
5108 if (XEXP (orig
, i
) != NULL
)
5109 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5114 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5115 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5116 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5117 XVEC (copy
, i
) = copy_asm_operands_vector
;
5118 else if (XVEC (orig
, i
) != NULL
)
5120 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5121 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5122 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5133 /* These are left unchanged. */
5141 if (code
== SCRATCH
)
5143 i
= copy_insn_n_scratches
++;
5144 if (i
>= MAX_RECOG_OPERANDS
)
5146 copy_insn_scratch_in
[i
] = orig
;
5147 copy_insn_scratch_out
[i
] = copy
;
5149 else if (code
== ASM_OPERANDS
)
5151 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5152 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5153 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5154 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5160 /* Create a new copy of an rtx.
5161 This function differs from copy_rtx in that it handles SCRATCHes and
5162 ASM_OPERANDs properly.
5163 INSN doesn't really have to be a full INSN; it could be just the
5166 copy_insn (rtx insn
)
5168 copy_insn_n_scratches
= 0;
5169 orig_asm_operands_vector
= 0;
5170 orig_asm_constraints_vector
= 0;
5171 copy_asm_operands_vector
= 0;
5172 copy_asm_constraints_vector
= 0;
5173 return copy_insn_1 (insn
);
5176 /* Initialize data structures and variables in this file
5177 before generating rtl for each function. */
5182 struct function
*f
= cfun
;
5184 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5187 seq_rtl_expr
= NULL
;
5189 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5190 last_location
.line
= 0;
5191 last_location
.file
= 0;
5192 first_label_num
= label_num
;
5196 /* Init the tables that describe all the pseudo regs. */
5198 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5200 f
->emit
->regno_pointer_align
5201 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5202 * sizeof (unsigned char));
5205 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5207 /* Put copies of all the hard registers into regno_reg_rtx. */
5208 memcpy (regno_reg_rtx
,
5209 static_regno_reg_rtx
,
5210 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5212 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5213 init_virtual_regs (f
->emit
);
5215 /* Indicate that the virtual registers and stack locations are
5217 REG_POINTER (stack_pointer_rtx
) = 1;
5218 REG_POINTER (frame_pointer_rtx
) = 1;
5219 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5220 REG_POINTER (arg_pointer_rtx
) = 1;
5222 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5223 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5224 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5225 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5226 REG_POINTER (virtual_cfa_rtx
) = 1;
5228 #ifdef STACK_BOUNDARY
5229 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5230 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5231 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5232 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5234 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5235 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5236 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5237 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5238 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5241 #ifdef INIT_EXPANDERS
5246 /* Generate the constant 0. */
5249 gen_const_vector_0 (enum machine_mode mode
)
5254 enum machine_mode inner
;
5256 units
= GET_MODE_NUNITS (mode
);
5257 inner
= GET_MODE_INNER (mode
);
5259 v
= rtvec_alloc (units
);
5261 /* We need to call this function after we to set CONST0_RTX first. */
5262 if (!CONST0_RTX (inner
))
5265 for (i
= 0; i
< units
; ++i
)
5266 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5268 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5272 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5273 all elements are zero. */
5275 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5277 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5280 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5281 if (RTVEC_ELT (v
, i
) != inner_zero
)
5282 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5283 return CONST0_RTX (mode
);
5286 /* Create some permanent unique rtl objects shared between all functions.
5287 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5290 init_emit_once (int line_numbers
)
5293 enum machine_mode mode
;
5294 enum machine_mode double_mode
;
5296 /* We need reg_raw_mode, so initialize the modes now. */
5297 init_reg_modes_once ();
5299 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5301 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5302 const_int_htab_eq
, NULL
);
5304 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5305 const_double_htab_eq
, NULL
);
5307 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5308 mem_attrs_htab_eq
, NULL
);
5309 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5310 reg_attrs_htab_eq
, NULL
);
5312 no_line_numbers
= ! line_numbers
;
5314 /* Compute the word and byte modes. */
5316 byte_mode
= VOIDmode
;
5317 word_mode
= VOIDmode
;
5318 double_mode
= VOIDmode
;
5320 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5321 mode
= GET_MODE_WIDER_MODE (mode
))
5323 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5324 && byte_mode
== VOIDmode
)
5327 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5328 && word_mode
== VOIDmode
)
5332 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5333 mode
= GET_MODE_WIDER_MODE (mode
))
5335 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5336 && double_mode
== VOIDmode
)
5340 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5342 /* Assign register numbers to the globally defined register rtx.
5343 This must be done at runtime because the register number field
5344 is in a union and some compilers can't initialize unions. */
5346 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5347 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5348 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5349 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5350 if (hard_frame_pointer_rtx
== 0)
5351 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5352 HARD_FRAME_POINTER_REGNUM
);
5353 if (arg_pointer_rtx
== 0)
5354 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5355 virtual_incoming_args_rtx
=
5356 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5357 virtual_stack_vars_rtx
=
5358 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5359 virtual_stack_dynamic_rtx
=
5360 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5361 virtual_outgoing_args_rtx
=
5362 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5363 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5365 /* Initialize RTL for commonly used hard registers. These are
5366 copied into regno_reg_rtx as we begin to compile each function. */
5367 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5368 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5370 #ifdef INIT_EXPANDERS
5371 /* This is to initialize {init|mark|free}_machine_status before the first
5372 call to push_function_context_to. This is needed by the Chill front
5373 end which calls push_function_context_to before the first call to
5374 init_function_start. */
5378 /* Create the unique rtx's for certain rtx codes and operand values. */
5380 /* Don't use gen_rtx here since gen_rtx in this case
5381 tries to use these variables. */
5382 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5383 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5384 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5386 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5387 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5388 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5390 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5392 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5393 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5394 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5395 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5396 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5397 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5398 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5400 dconsthalf
= dconst1
;
5403 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5405 /* Initialize mathematical constants for constant folding builtins.
5406 These constants need to be given to at least 160 bits precision. */
5407 real_from_string (&dconstpi
,
5408 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5409 real_from_string (&dconste
,
5410 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5412 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5414 REAL_VALUE_TYPE
*r
=
5415 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5417 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5418 mode
= GET_MODE_WIDER_MODE (mode
))
5419 const_tiny_rtx
[i
][(int) mode
] =
5420 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5422 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5424 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5425 mode
= GET_MODE_WIDER_MODE (mode
))
5426 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5428 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5430 mode
= GET_MODE_WIDER_MODE (mode
))
5431 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5434 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5436 mode
= GET_MODE_WIDER_MODE (mode
))
5437 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5439 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5441 mode
= GET_MODE_WIDER_MODE (mode
))
5442 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5444 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5445 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5446 const_tiny_rtx
[0][i
] = const0_rtx
;
5448 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5449 if (STORE_FLAG_VALUE
== 1)
5450 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5452 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5453 return_address_pointer_rtx
5454 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5457 #ifdef STATIC_CHAIN_REGNUM
5458 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5460 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5461 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5462 static_chain_incoming_rtx
5463 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5466 static_chain_incoming_rtx
= static_chain_rtx
;
5470 static_chain_rtx
= STATIC_CHAIN
;
5472 #ifdef STATIC_CHAIN_INCOMING
5473 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5475 static_chain_incoming_rtx
= static_chain_rtx
;
5479 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5480 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5483 /* Query and clear/ restore no_line_numbers. This is used by the
5484 switch / case handling in stmt.c to give proper line numbers in
5485 warnings about unreachable code. */
5488 force_line_numbers (void)
5490 int old
= no_line_numbers
;
5492 no_line_numbers
= 0;
5494 force_next_line_note ();
5499 restore_line_number_status (int old_value
)
5501 no_line_numbers
= old_value
;
5504 /* Produce exact duplicate of insn INSN after AFTER.
5505 Care updating of libcall regions if present. */
5508 emit_copy_of_insn_after (rtx insn
, rtx after
)
5511 rtx note1
, note2
, link
;
5513 switch (GET_CODE (insn
))
5516 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5520 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5524 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5525 if (CALL_INSN_FUNCTION_USAGE (insn
))
5526 CALL_INSN_FUNCTION_USAGE (new)
5527 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5528 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5529 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5536 /* Update LABEL_NUSES. */
5537 mark_jump_label (PATTERN (new), new, 0);
5539 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5541 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5543 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5544 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5546 if (GET_CODE (link
) == EXPR_LIST
)
5548 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5553 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5558 /* Fix the libcall sequences. */
5559 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5562 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5564 XEXP (note1
, 0) = p
;
5565 XEXP (note2
, 0) = new;
5567 INSN_CODE (new) = INSN_CODE (insn
);
5571 static GTY((deletable(""))) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5573 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5575 if (hard_reg_clobbers
[mode
][regno
])
5576 return hard_reg_clobbers
[mode
][regno
];
5578 return (hard_reg_clobbers
[mode
][regno
] =
5579 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5582 #include "gt-emit-rtl.h"