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1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "real.h"
28 #include "rtl.h"
29 #include "tree.h"
30 #include "flags.h"
31 #include "regs.h"
32 #include "hard-reg-set.h"
33 #include "except.h"
34 #include "function.h"
35 #include "insn-config.h"
36 #include "insn-attr.h"
37 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
38 #include "expr.h"
39 #include "optabs.h"
40 #include "libfuncs.h"
41 #include "recog.h"
42 #include "reload.h"
43 #include "output.h"
44 #include "typeclass.h"
45 #include "toplev.h"
46 #include "ggc.h"
47 #include "langhooks.h"
48 #include "intl.h"
49 #include "tm_p.h"
50 #include "tree-iterator.h"
51 #include "tree-pass.h"
52 #include "tree-flow.h"
53 #include "target.h"
54 #include "timevar.h"
55 #include "df.h"
56 #include "diagnostic.h"
57
58 /* Decide whether a function's arguments should be processed
59 from first to last or from last to first.
60
61 They should if the stack and args grow in opposite directions, but
62 only if we have push insns. */
63
64 #ifdef PUSH_ROUNDING
65
66 #ifndef PUSH_ARGS_REVERSED
67 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
68 #define PUSH_ARGS_REVERSED /* If it's last to first. */
69 #endif
70 #endif
71
72 #endif
73
74 #ifndef STACK_PUSH_CODE
75 #ifdef STACK_GROWS_DOWNWARD
76 #define STACK_PUSH_CODE PRE_DEC
77 #else
78 #define STACK_PUSH_CODE PRE_INC
79 #endif
80 #endif
81
82
83 /* If this is nonzero, we do not bother generating VOLATILE
84 around volatile memory references, and we are willing to
85 output indirect addresses. If cse is to follow, we reject
86 indirect addresses so a useful potential cse is generated;
87 if it is used only once, instruction combination will produce
88 the same indirect address eventually. */
89 int cse_not_expected;
90
91 /* This structure is used by move_by_pieces to describe the move to
92 be performed. */
93 struct move_by_pieces
94 {
95 rtx to;
96 rtx to_addr;
97 int autinc_to;
98 int explicit_inc_to;
99 rtx from;
100 rtx from_addr;
101 int autinc_from;
102 int explicit_inc_from;
103 unsigned HOST_WIDE_INT len;
104 HOST_WIDE_INT offset;
105 int reverse;
106 };
107
108 /* This structure is used by store_by_pieces to describe the clear to
109 be performed. */
110
111 struct store_by_pieces
112 {
113 rtx to;
114 rtx to_addr;
115 int autinc_to;
116 int explicit_inc_to;
117 unsigned HOST_WIDE_INT len;
118 HOST_WIDE_INT offset;
119 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
120 void *constfundata;
121 int reverse;
122 };
123
124 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
125 unsigned int,
126 unsigned int);
127 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
128 struct move_by_pieces *);
129 static bool block_move_libcall_safe_for_call_parm (void);
130 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
131 static tree emit_block_move_libcall_fn (int);
132 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
133 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
134 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
135 static void store_by_pieces_1 (struct store_by_pieces *, unsigned int);
136 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
137 struct store_by_pieces *);
138 static tree clear_storage_libcall_fn (int);
139 static rtx compress_float_constant (rtx, rtx);
140 static rtx get_subtarget (rtx);
141 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
142 HOST_WIDE_INT, enum machine_mode,
143 tree, tree, int, alias_set_type);
144 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
145 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode,
146 tree, tree, alias_set_type, bool);
147
148 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
149
150 static int is_aligning_offset (const_tree, const_tree);
151 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
152 enum expand_modifier);
153 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
154 static rtx do_store_flag (tree, rtx, enum machine_mode, int);
155 #ifdef PUSH_ROUNDING
156 static void emit_single_push_insn (enum machine_mode, rtx, tree);
157 #endif
158 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
159 static rtx const_vector_from_tree (tree);
160 static void write_complex_part (rtx, rtx, bool);
161
162 /* Record for each mode whether we can move a register directly to or
163 from an object of that mode in memory. If we can't, we won't try
164 to use that mode directly when accessing a field of that mode. */
165
166 static char direct_load[NUM_MACHINE_MODES];
167 static char direct_store[NUM_MACHINE_MODES];
168
169 /* Record for each mode whether we can float-extend from memory. */
170
171 static bool float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
172
173 /* This macro is used to determine whether move_by_pieces should be called
174 to perform a structure copy. */
175 #ifndef MOVE_BY_PIECES_P
176 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
177 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
178 < (unsigned int) MOVE_RATIO)
179 #endif
180
181 /* This macro is used to determine whether clear_by_pieces should be
182 called to clear storage. */
183 #ifndef CLEAR_BY_PIECES_P
184 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
185 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
186 < (unsigned int) CLEAR_RATIO)
187 #endif
188
189 /* This macro is used to determine whether store_by_pieces should be
190 called to "memset" storage with byte values other than zero. */
191 #ifndef SET_BY_PIECES_P
192 #define SET_BY_PIECES_P(SIZE, ALIGN) \
193 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
194 < (unsigned int) SET_RATIO)
195 #endif
196
197 /* This macro is used to determine whether store_by_pieces should be
198 called to "memcpy" storage when the source is a constant string. */
199 #ifndef STORE_BY_PIECES_P
200 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
201 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
202 < (unsigned int) MOVE_RATIO)
203 #endif
204
205 /* This array records the insn_code of insns to perform block moves. */
206 enum insn_code movmem_optab[NUM_MACHINE_MODES];
207
208 /* This array records the insn_code of insns to perform block sets. */
209 enum insn_code setmem_optab[NUM_MACHINE_MODES];
210
211 /* These arrays record the insn_code of three different kinds of insns
212 to perform block compares. */
213 enum insn_code cmpstr_optab[NUM_MACHINE_MODES];
214 enum insn_code cmpstrn_optab[NUM_MACHINE_MODES];
215 enum insn_code cmpmem_optab[NUM_MACHINE_MODES];
216
217 /* Synchronization primitives. */
218 enum insn_code sync_add_optab[NUM_MACHINE_MODES];
219 enum insn_code sync_sub_optab[NUM_MACHINE_MODES];
220 enum insn_code sync_ior_optab[NUM_MACHINE_MODES];
221 enum insn_code sync_and_optab[NUM_MACHINE_MODES];
222 enum insn_code sync_xor_optab[NUM_MACHINE_MODES];
223 enum insn_code sync_nand_optab[NUM_MACHINE_MODES];
224 enum insn_code sync_old_add_optab[NUM_MACHINE_MODES];
225 enum insn_code sync_old_sub_optab[NUM_MACHINE_MODES];
226 enum insn_code sync_old_ior_optab[NUM_MACHINE_MODES];
227 enum insn_code sync_old_and_optab[NUM_MACHINE_MODES];
228 enum insn_code sync_old_xor_optab[NUM_MACHINE_MODES];
229 enum insn_code sync_old_nand_optab[NUM_MACHINE_MODES];
230 enum insn_code sync_new_add_optab[NUM_MACHINE_MODES];
231 enum insn_code sync_new_sub_optab[NUM_MACHINE_MODES];
232 enum insn_code sync_new_ior_optab[NUM_MACHINE_MODES];
233 enum insn_code sync_new_and_optab[NUM_MACHINE_MODES];
234 enum insn_code sync_new_xor_optab[NUM_MACHINE_MODES];
235 enum insn_code sync_new_nand_optab[NUM_MACHINE_MODES];
236 enum insn_code sync_compare_and_swap[NUM_MACHINE_MODES];
237 enum insn_code sync_compare_and_swap_cc[NUM_MACHINE_MODES];
238 enum insn_code sync_lock_test_and_set[NUM_MACHINE_MODES];
239 enum insn_code sync_lock_release[NUM_MACHINE_MODES];
240
241 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
242
243 #ifndef SLOW_UNALIGNED_ACCESS
244 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
245 #endif
246 \f
247 /* This is run to set up which modes can be used
248 directly in memory and to initialize the block move optab. It is run
249 at the beginning of compilation and when the target is reinitialized. */
250
251 void
252 init_expr_target (void)
253 {
254 rtx insn, pat;
255 enum machine_mode mode;
256 int num_clobbers;
257 rtx mem, mem1;
258 rtx reg;
259
260 /* Try indexing by frame ptr and try by stack ptr.
261 It is known that on the Convex the stack ptr isn't a valid index.
262 With luck, one or the other is valid on any machine. */
263 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
264 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
265
266 /* A scratch register we can modify in-place below to avoid
267 useless RTL allocations. */
268 reg = gen_rtx_REG (VOIDmode, -1);
269
270 insn = rtx_alloc (INSN);
271 pat = gen_rtx_SET (0, NULL_RTX, NULL_RTX);
272 PATTERN (insn) = pat;
273
274 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
275 mode = (enum machine_mode) ((int) mode + 1))
276 {
277 int regno;
278
279 direct_load[(int) mode] = direct_store[(int) mode] = 0;
280 PUT_MODE (mem, mode);
281 PUT_MODE (mem1, mode);
282 PUT_MODE (reg, mode);
283
284 /* See if there is some register that can be used in this mode and
285 directly loaded or stored from memory. */
286
287 if (mode != VOIDmode && mode != BLKmode)
288 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
289 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
290 regno++)
291 {
292 if (! HARD_REGNO_MODE_OK (regno, mode))
293 continue;
294
295 SET_REGNO (reg, regno);
296
297 SET_SRC (pat) = mem;
298 SET_DEST (pat) = reg;
299 if (recog (pat, insn, &num_clobbers) >= 0)
300 direct_load[(int) mode] = 1;
301
302 SET_SRC (pat) = mem1;
303 SET_DEST (pat) = reg;
304 if (recog (pat, insn, &num_clobbers) >= 0)
305 direct_load[(int) mode] = 1;
306
307 SET_SRC (pat) = reg;
308 SET_DEST (pat) = mem;
309 if (recog (pat, insn, &num_clobbers) >= 0)
310 direct_store[(int) mode] = 1;
311
312 SET_SRC (pat) = reg;
313 SET_DEST (pat) = mem1;
314 if (recog (pat, insn, &num_clobbers) >= 0)
315 direct_store[(int) mode] = 1;
316 }
317 }
318
319 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
320
321 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
322 mode = GET_MODE_WIDER_MODE (mode))
323 {
324 enum machine_mode srcmode;
325 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
326 srcmode = GET_MODE_WIDER_MODE (srcmode))
327 {
328 enum insn_code ic;
329
330 ic = can_extend_p (mode, srcmode, 0);
331 if (ic == CODE_FOR_nothing)
332 continue;
333
334 PUT_MODE (mem, srcmode);
335
336 if ((*insn_data[ic].operand[1].predicate) (mem, srcmode))
337 float_extend_from_mem[mode][srcmode] = true;
338 }
339 }
340 }
341
342 /* This is run at the start of compiling a function. */
343
344 void
345 init_expr (void)
346 {
347 memset (&crtl->expr, 0, sizeof (crtl->expr));
348 }
349 \f
350 /* Copy data from FROM to TO, where the machine modes are not the same.
351 Both modes may be integer, or both may be floating, or both may be
352 fixed-point.
353 UNSIGNEDP should be nonzero if FROM is an unsigned type.
354 This causes zero-extension instead of sign-extension. */
355
356 void
357 convert_move (rtx to, rtx from, int unsignedp)
358 {
359 enum machine_mode to_mode = GET_MODE (to);
360 enum machine_mode from_mode = GET_MODE (from);
361 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
362 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
363 enum insn_code code;
364 rtx libcall;
365
366 /* rtx code for making an equivalent value. */
367 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
368 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
369
370
371 gcc_assert (to_real == from_real);
372 gcc_assert (to_mode != BLKmode);
373 gcc_assert (from_mode != BLKmode);
374
375 /* If the source and destination are already the same, then there's
376 nothing to do. */
377 if (to == from)
378 return;
379
380 /* If FROM is a SUBREG that indicates that we have already done at least
381 the required extension, strip it. We don't handle such SUBREGs as
382 TO here. */
383
384 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
385 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (from)))
386 >= GET_MODE_SIZE (to_mode))
387 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
388 from = gen_lowpart (to_mode, from), from_mode = to_mode;
389
390 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
391
392 if (to_mode == from_mode
393 || (from_mode == VOIDmode && CONSTANT_P (from)))
394 {
395 emit_move_insn (to, from);
396 return;
397 }
398
399 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
400 {
401 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
402
403 if (VECTOR_MODE_P (to_mode))
404 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
405 else
406 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
407
408 emit_move_insn (to, from);
409 return;
410 }
411
412 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
413 {
414 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
415 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
416 return;
417 }
418
419 if (to_real)
420 {
421 rtx value, insns;
422 convert_optab tab;
423
424 gcc_assert ((GET_MODE_PRECISION (from_mode)
425 != GET_MODE_PRECISION (to_mode))
426 || (DECIMAL_FLOAT_MODE_P (from_mode)
427 != DECIMAL_FLOAT_MODE_P (to_mode)));
428
429 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
430 /* Conversion between decimal float and binary float, same size. */
431 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
432 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
433 tab = sext_optab;
434 else
435 tab = trunc_optab;
436
437 /* Try converting directly if the insn is supported. */
438
439 code = convert_optab_handler (tab, to_mode, from_mode)->insn_code;
440 if (code != CODE_FOR_nothing)
441 {
442 emit_unop_insn (code, to, from,
443 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
444 return;
445 }
446
447 /* Otherwise use a libcall. */
448 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
449
450 /* Is this conversion implemented yet? */
451 gcc_assert (libcall);
452
453 start_sequence ();
454 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
455 1, from, from_mode);
456 insns = get_insns ();
457 end_sequence ();
458 emit_libcall_block (insns, to, value,
459 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
460 from)
461 : gen_rtx_FLOAT_EXTEND (to_mode, from));
462 return;
463 }
464
465 /* Handle pointer conversion. */ /* SPEE 900220. */
466 /* Targets are expected to provide conversion insns between PxImode and
467 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
468 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
469 {
470 enum machine_mode full_mode
471 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
472
473 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)->insn_code
474 != CODE_FOR_nothing);
475
476 if (full_mode != from_mode)
477 from = convert_to_mode (full_mode, from, unsignedp);
478 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode)->insn_code,
479 to, from, UNKNOWN);
480 return;
481 }
482 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
483 {
484 rtx new_from;
485 enum machine_mode full_mode
486 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
487
488 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)->insn_code
489 != CODE_FOR_nothing);
490
491 if (to_mode == full_mode)
492 {
493 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode)->insn_code,
494 to, from, UNKNOWN);
495 return;
496 }
497
498 new_from = gen_reg_rtx (full_mode);
499 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode)->insn_code,
500 new_from, from, UNKNOWN);
501
502 /* else proceed to integer conversions below. */
503 from_mode = full_mode;
504 from = new_from;
505 }
506
507 /* Make sure both are fixed-point modes or both are not. */
508 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
509 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
510 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
511 {
512 /* If we widen from_mode to to_mode and they are in the same class,
513 we won't saturate the result.
514 Otherwise, always saturate the result to play safe. */
515 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
516 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
517 expand_fixed_convert (to, from, 0, 0);
518 else
519 expand_fixed_convert (to, from, 0, 1);
520 return;
521 }
522
523 /* Now both modes are integers. */
524
525 /* Handle expanding beyond a word. */
526 if (GET_MODE_BITSIZE (from_mode) < GET_MODE_BITSIZE (to_mode)
527 && GET_MODE_BITSIZE (to_mode) > BITS_PER_WORD)
528 {
529 rtx insns;
530 rtx lowpart;
531 rtx fill_value;
532 rtx lowfrom;
533 int i;
534 enum machine_mode lowpart_mode;
535 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
536
537 /* Try converting directly if the insn is supported. */
538 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
539 != CODE_FOR_nothing)
540 {
541 /* If FROM is a SUBREG, put it into a register. Do this
542 so that we always generate the same set of insns for
543 better cse'ing; if an intermediate assignment occurred,
544 we won't be doing the operation directly on the SUBREG. */
545 if (optimize > 0 && GET_CODE (from) == SUBREG)
546 from = force_reg (from_mode, from);
547 emit_unop_insn (code, to, from, equiv_code);
548 return;
549 }
550 /* Next, try converting via full word. */
551 else if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD
552 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
553 != CODE_FOR_nothing))
554 {
555 rtx word_to = gen_reg_rtx (word_mode);
556 if (REG_P (to))
557 {
558 if (reg_overlap_mentioned_p (to, from))
559 from = force_reg (from_mode, from);
560 emit_clobber (to);
561 }
562 convert_move (word_to, from, unsignedp);
563 emit_unop_insn (code, to, word_to, equiv_code);
564 return;
565 }
566
567 /* No special multiword conversion insn; do it by hand. */
568 start_sequence ();
569
570 /* Since we will turn this into a no conflict block, we must ensure
571 that the source does not overlap the target. */
572
573 if (reg_overlap_mentioned_p (to, from))
574 from = force_reg (from_mode, from);
575
576 /* Get a copy of FROM widened to a word, if necessary. */
577 if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD)
578 lowpart_mode = word_mode;
579 else
580 lowpart_mode = from_mode;
581
582 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
583
584 lowpart = gen_lowpart (lowpart_mode, to);
585 emit_move_insn (lowpart, lowfrom);
586
587 /* Compute the value to put in each remaining word. */
588 if (unsignedp)
589 fill_value = const0_rtx;
590 else
591 {
592 #ifdef HAVE_slt
593 if (HAVE_slt
594 && insn_data[(int) CODE_FOR_slt].operand[0].mode == word_mode
595 && STORE_FLAG_VALUE == -1)
596 {
597 emit_cmp_insn (lowfrom, const0_rtx, NE, NULL_RTX,
598 lowpart_mode, 0);
599 fill_value = gen_reg_rtx (word_mode);
600 emit_insn (gen_slt (fill_value));
601 }
602 else
603 #endif
604 {
605 fill_value
606 = expand_shift (RSHIFT_EXPR, lowpart_mode, lowfrom,
607 size_int (GET_MODE_BITSIZE (lowpart_mode) - 1),
608 NULL_RTX, 0);
609 fill_value = convert_to_mode (word_mode, fill_value, 1);
610 }
611 }
612
613 /* Fill the remaining words. */
614 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
615 {
616 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
617 rtx subword = operand_subword (to, index, 1, to_mode);
618
619 gcc_assert (subword);
620
621 if (fill_value != subword)
622 emit_move_insn (subword, fill_value);
623 }
624
625 insns = get_insns ();
626 end_sequence ();
627
628 emit_insn (insns);
629 return;
630 }
631
632 /* Truncating multi-word to a word or less. */
633 if (GET_MODE_BITSIZE (from_mode) > BITS_PER_WORD
634 && GET_MODE_BITSIZE (to_mode) <= BITS_PER_WORD)
635 {
636 if (!((MEM_P (from)
637 && ! MEM_VOLATILE_P (from)
638 && direct_load[(int) to_mode]
639 && ! mode_dependent_address_p (XEXP (from, 0)))
640 || REG_P (from)
641 || GET_CODE (from) == SUBREG))
642 from = force_reg (from_mode, from);
643 convert_move (to, gen_lowpart (word_mode, from), 0);
644 return;
645 }
646
647 /* Now follow all the conversions between integers
648 no more than a word long. */
649
650 /* For truncation, usually we can just refer to FROM in a narrower mode. */
651 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
652 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
653 GET_MODE_BITSIZE (from_mode)))
654 {
655 if (!((MEM_P (from)
656 && ! MEM_VOLATILE_P (from)
657 && direct_load[(int) to_mode]
658 && ! mode_dependent_address_p (XEXP (from, 0)))
659 || REG_P (from)
660 || GET_CODE (from) == SUBREG))
661 from = force_reg (from_mode, from);
662 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
663 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
664 from = copy_to_reg (from);
665 emit_move_insn (to, gen_lowpart (to_mode, from));
666 return;
667 }
668
669 /* Handle extension. */
670 if (GET_MODE_BITSIZE (to_mode) > GET_MODE_BITSIZE (from_mode))
671 {
672 /* Convert directly if that works. */
673 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
674 != CODE_FOR_nothing)
675 {
676 emit_unop_insn (code, to, from, equiv_code);
677 return;
678 }
679 else
680 {
681 enum machine_mode intermediate;
682 rtx tmp;
683 tree shift_amount;
684
685 /* Search for a mode to convert via. */
686 for (intermediate = from_mode; intermediate != VOIDmode;
687 intermediate = GET_MODE_WIDER_MODE (intermediate))
688 if (((can_extend_p (to_mode, intermediate, unsignedp)
689 != CODE_FOR_nothing)
690 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
691 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
692 GET_MODE_BITSIZE (intermediate))))
693 && (can_extend_p (intermediate, from_mode, unsignedp)
694 != CODE_FOR_nothing))
695 {
696 convert_move (to, convert_to_mode (intermediate, from,
697 unsignedp), unsignedp);
698 return;
699 }
700
701 /* No suitable intermediate mode.
702 Generate what we need with shifts. */
703 shift_amount = build_int_cst (NULL_TREE,
704 GET_MODE_BITSIZE (to_mode)
705 - GET_MODE_BITSIZE (from_mode));
706 from = gen_lowpart (to_mode, force_reg (from_mode, from));
707 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
708 to, unsignedp);
709 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
710 to, unsignedp);
711 if (tmp != to)
712 emit_move_insn (to, tmp);
713 return;
714 }
715 }
716
717 /* Support special truncate insns for certain modes. */
718 if (convert_optab_handler (trunc_optab, to_mode, from_mode)->insn_code != CODE_FOR_nothing)
719 {
720 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode)->insn_code,
721 to, from, UNKNOWN);
722 return;
723 }
724
725 /* Handle truncation of volatile memrefs, and so on;
726 the things that couldn't be truncated directly,
727 and for which there was no special instruction.
728
729 ??? Code above formerly short-circuited this, for most integer
730 mode pairs, with a force_reg in from_mode followed by a recursive
731 call to this routine. Appears always to have been wrong. */
732 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode))
733 {
734 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
735 emit_move_insn (to, temp);
736 return;
737 }
738
739 /* Mode combination is not recognized. */
740 gcc_unreachable ();
741 }
742
743 /* Return an rtx for a value that would result
744 from converting X to mode MODE.
745 Both X and MODE may be floating, or both integer.
746 UNSIGNEDP is nonzero if X is an unsigned value.
747 This can be done by referring to a part of X in place
748 or by copying to a new temporary with conversion. */
749
750 rtx
751 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
752 {
753 return convert_modes (mode, VOIDmode, x, unsignedp);
754 }
755
756 /* Return an rtx for a value that would result
757 from converting X from mode OLDMODE to mode MODE.
758 Both modes may be floating, or both integer.
759 UNSIGNEDP is nonzero if X is an unsigned value.
760
761 This can be done by referring to a part of X in place
762 or by copying to a new temporary with conversion.
763
764 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
765
766 rtx
767 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
768 {
769 rtx temp;
770
771 /* If FROM is a SUBREG that indicates that we have already done at least
772 the required extension, strip it. */
773
774 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
775 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
776 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
777 x = gen_lowpart (mode, x);
778
779 if (GET_MODE (x) != VOIDmode)
780 oldmode = GET_MODE (x);
781
782 if (mode == oldmode)
783 return x;
784
785 /* There is one case that we must handle specially: If we are converting
786 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
787 we are to interpret the constant as unsigned, gen_lowpart will do
788 the wrong if the constant appears negative. What we want to do is
789 make the high-order word of the constant zero, not all ones. */
790
791 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
792 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
793 && GET_CODE (x) == CONST_INT && INTVAL (x) < 0)
794 {
795 HOST_WIDE_INT val = INTVAL (x);
796
797 if (oldmode != VOIDmode
798 && HOST_BITS_PER_WIDE_INT > GET_MODE_BITSIZE (oldmode))
799 {
800 int width = GET_MODE_BITSIZE (oldmode);
801
802 /* We need to zero extend VAL. */
803 val &= ((HOST_WIDE_INT) 1 << width) - 1;
804 }
805
806 return immed_double_const (val, (HOST_WIDE_INT) 0, mode);
807 }
808
809 /* We can do this with a gen_lowpart if both desired and current modes
810 are integer, and this is either a constant integer, a register, or a
811 non-volatile MEM. Except for the constant case where MODE is no
812 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
813
814 if ((GET_CODE (x) == CONST_INT
815 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
816 || (GET_MODE_CLASS (mode) == MODE_INT
817 && GET_MODE_CLASS (oldmode) == MODE_INT
818 && (GET_CODE (x) == CONST_DOUBLE
819 || (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (oldmode)
820 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
821 && direct_load[(int) mode])
822 || (REG_P (x)
823 && (! HARD_REGISTER_P (x)
824 || HARD_REGNO_MODE_OK (REGNO (x), mode))
825 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
826 GET_MODE_BITSIZE (GET_MODE (x)))))))))
827 {
828 /* ?? If we don't know OLDMODE, we have to assume here that
829 X does not need sign- or zero-extension. This may not be
830 the case, but it's the best we can do. */
831 if (GET_CODE (x) == CONST_INT && oldmode != VOIDmode
832 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (oldmode))
833 {
834 HOST_WIDE_INT val = INTVAL (x);
835 int width = GET_MODE_BITSIZE (oldmode);
836
837 /* We must sign or zero-extend in this case. Start by
838 zero-extending, then sign extend if we need to. */
839 val &= ((HOST_WIDE_INT) 1 << width) - 1;
840 if (! unsignedp
841 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
842 val |= (HOST_WIDE_INT) (-1) << width;
843
844 return gen_int_mode (val, mode);
845 }
846
847 return gen_lowpart (mode, x);
848 }
849
850 /* Converting from integer constant into mode is always equivalent to an
851 subreg operation. */
852 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
853 {
854 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
855 return simplify_gen_subreg (mode, x, oldmode, 0);
856 }
857
858 temp = gen_reg_rtx (mode);
859 convert_move (temp, x, unsignedp);
860 return temp;
861 }
862 \f
863 /* STORE_MAX_PIECES is the number of bytes at a time that we can
864 store efficiently. Due to internal GCC limitations, this is
865 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
866 for an immediate constant. */
867
868 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
869
870 /* Determine whether the LEN bytes can be moved by using several move
871 instructions. Return nonzero if a call to move_by_pieces should
872 succeed. */
873
874 int
875 can_move_by_pieces (unsigned HOST_WIDE_INT len,
876 unsigned int align ATTRIBUTE_UNUSED)
877 {
878 return MOVE_BY_PIECES_P (len, align);
879 }
880
881 /* Generate several move instructions to copy LEN bytes from block FROM to
882 block TO. (These are MEM rtx's with BLKmode).
883
884 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
885 used to push FROM to the stack.
886
887 ALIGN is maximum stack alignment we can assume.
888
889 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
890 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
891 stpcpy. */
892
893 rtx
894 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
895 unsigned int align, int endp)
896 {
897 struct move_by_pieces data;
898 rtx to_addr, from_addr = XEXP (from, 0);
899 unsigned int max_size = MOVE_MAX_PIECES + 1;
900 enum machine_mode mode = VOIDmode, tmode;
901 enum insn_code icode;
902
903 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
904
905 data.offset = 0;
906 data.from_addr = from_addr;
907 if (to)
908 {
909 to_addr = XEXP (to, 0);
910 data.to = to;
911 data.autinc_to
912 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
913 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
914 data.reverse
915 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
916 }
917 else
918 {
919 to_addr = NULL_RTX;
920 data.to = NULL_RTX;
921 data.autinc_to = 1;
922 #ifdef STACK_GROWS_DOWNWARD
923 data.reverse = 1;
924 #else
925 data.reverse = 0;
926 #endif
927 }
928 data.to_addr = to_addr;
929 data.from = from;
930 data.autinc_from
931 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
932 || GET_CODE (from_addr) == POST_INC
933 || GET_CODE (from_addr) == POST_DEC);
934
935 data.explicit_inc_from = 0;
936 data.explicit_inc_to = 0;
937 if (data.reverse) data.offset = len;
938 data.len = len;
939
940 /* If copying requires more than two move insns,
941 copy addresses to registers (to make displacements shorter)
942 and use post-increment if available. */
943 if (!(data.autinc_from && data.autinc_to)
944 && move_by_pieces_ninsns (len, align, max_size) > 2)
945 {
946 /* Find the mode of the largest move... */
947 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
948 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
949 if (GET_MODE_SIZE (tmode) < max_size)
950 mode = tmode;
951
952 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
953 {
954 data.from_addr = copy_addr_to_reg (plus_constant (from_addr, len));
955 data.autinc_from = 1;
956 data.explicit_inc_from = -1;
957 }
958 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
959 {
960 data.from_addr = copy_addr_to_reg (from_addr);
961 data.autinc_from = 1;
962 data.explicit_inc_from = 1;
963 }
964 if (!data.autinc_from && CONSTANT_P (from_addr))
965 data.from_addr = copy_addr_to_reg (from_addr);
966 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
967 {
968 data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
969 data.autinc_to = 1;
970 data.explicit_inc_to = -1;
971 }
972 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
973 {
974 data.to_addr = copy_addr_to_reg (to_addr);
975 data.autinc_to = 1;
976 data.explicit_inc_to = 1;
977 }
978 if (!data.autinc_to && CONSTANT_P (to_addr))
979 data.to_addr = copy_addr_to_reg (to_addr);
980 }
981
982 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
983 if (align >= GET_MODE_ALIGNMENT (tmode))
984 align = GET_MODE_ALIGNMENT (tmode);
985 else
986 {
987 enum machine_mode xmode;
988
989 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
990 tmode != VOIDmode;
991 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
992 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
993 || SLOW_UNALIGNED_ACCESS (tmode, align))
994 break;
995
996 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
997 }
998
999 /* First move what we can in the largest integer mode, then go to
1000 successively smaller modes. */
1001
1002 while (max_size > 1)
1003 {
1004 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
1005 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
1006 if (GET_MODE_SIZE (tmode) < max_size)
1007 mode = tmode;
1008
1009 if (mode == VOIDmode)
1010 break;
1011
1012 icode = optab_handler (mov_optab, mode)->insn_code;
1013 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1014 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
1015
1016 max_size = GET_MODE_SIZE (mode);
1017 }
1018
1019 /* The code above should have handled everything. */
1020 gcc_assert (!data.len);
1021
1022 if (endp)
1023 {
1024 rtx to1;
1025
1026 gcc_assert (!data.reverse);
1027 if (data.autinc_to)
1028 {
1029 if (endp == 2)
1030 {
1031 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
1032 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
1033 else
1034 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
1035 -1));
1036 }
1037 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1038 data.offset);
1039 }
1040 else
1041 {
1042 if (endp == 2)
1043 --data.offset;
1044 to1 = adjust_address (data.to, QImode, data.offset);
1045 }
1046 return to1;
1047 }
1048 else
1049 return data.to;
1050 }
1051
1052 /* Return number of insns required to move L bytes by pieces.
1053 ALIGN (in bits) is maximum alignment we can assume. */
1054
1055 static unsigned HOST_WIDE_INT
1056 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1057 unsigned int max_size)
1058 {
1059 unsigned HOST_WIDE_INT n_insns = 0;
1060 enum machine_mode tmode;
1061
1062 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
1063 if (align >= GET_MODE_ALIGNMENT (tmode))
1064 align = GET_MODE_ALIGNMENT (tmode);
1065 else
1066 {
1067 enum machine_mode tmode, xmode;
1068
1069 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
1070 tmode != VOIDmode;
1071 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
1072 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
1073 || SLOW_UNALIGNED_ACCESS (tmode, align))
1074 break;
1075
1076 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
1077 }
1078
1079 while (max_size > 1)
1080 {
1081 enum machine_mode mode = VOIDmode;
1082 enum insn_code icode;
1083
1084 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
1085 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
1086 if (GET_MODE_SIZE (tmode) < max_size)
1087 mode = tmode;
1088
1089 if (mode == VOIDmode)
1090 break;
1091
1092 icode = optab_handler (mov_optab, mode)->insn_code;
1093 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1094 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1095
1096 max_size = GET_MODE_SIZE (mode);
1097 }
1098
1099 gcc_assert (!l);
1100 return n_insns;
1101 }
1102
1103 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1104 with move instructions for mode MODE. GENFUN is the gen_... function
1105 to make a move insn for that mode. DATA has all the other info. */
1106
1107 static void
1108 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1109 struct move_by_pieces *data)
1110 {
1111 unsigned int size = GET_MODE_SIZE (mode);
1112 rtx to1 = NULL_RTX, from1;
1113
1114 while (data->len >= size)
1115 {
1116 if (data->reverse)
1117 data->offset -= size;
1118
1119 if (data->to)
1120 {
1121 if (data->autinc_to)
1122 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1123 data->offset);
1124 else
1125 to1 = adjust_address (data->to, mode, data->offset);
1126 }
1127
1128 if (data->autinc_from)
1129 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1130 data->offset);
1131 else
1132 from1 = adjust_address (data->from, mode, data->offset);
1133
1134 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1135 emit_insn (gen_add2_insn (data->to_addr,
1136 GEN_INT (-(HOST_WIDE_INT)size)));
1137 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1138 emit_insn (gen_add2_insn (data->from_addr,
1139 GEN_INT (-(HOST_WIDE_INT)size)));
1140
1141 if (data->to)
1142 emit_insn ((*genfun) (to1, from1));
1143 else
1144 {
1145 #ifdef PUSH_ROUNDING
1146 emit_single_push_insn (mode, from1, NULL);
1147 #else
1148 gcc_unreachable ();
1149 #endif
1150 }
1151
1152 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1153 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1154 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1155 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1156
1157 if (! data->reverse)
1158 data->offset += size;
1159
1160 data->len -= size;
1161 }
1162 }
1163 \f
1164 /* Emit code to move a block Y to a block X. This may be done with
1165 string-move instructions, with multiple scalar move instructions,
1166 or with a library call.
1167
1168 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1169 SIZE is an rtx that says how long they are.
1170 ALIGN is the maximum alignment we can assume they have.
1171 METHOD describes what kind of copy this is, and what mechanisms may be used.
1172
1173 Return the address of the new block, if memcpy is called and returns it,
1174 0 otherwise. */
1175
1176 rtx
1177 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1178 unsigned int expected_align, HOST_WIDE_INT expected_size)
1179 {
1180 bool may_use_call;
1181 rtx retval = 0;
1182 unsigned int align;
1183
1184 switch (method)
1185 {
1186 case BLOCK_OP_NORMAL:
1187 case BLOCK_OP_TAILCALL:
1188 may_use_call = true;
1189 break;
1190
1191 case BLOCK_OP_CALL_PARM:
1192 may_use_call = block_move_libcall_safe_for_call_parm ();
1193
1194 /* Make inhibit_defer_pop nonzero around the library call
1195 to force it to pop the arguments right away. */
1196 NO_DEFER_POP;
1197 break;
1198
1199 case BLOCK_OP_NO_LIBCALL:
1200 may_use_call = false;
1201 break;
1202
1203 default:
1204 gcc_unreachable ();
1205 }
1206
1207 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1208
1209 gcc_assert (MEM_P (x));
1210 gcc_assert (MEM_P (y));
1211 gcc_assert (size);
1212
1213 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1214 block copy is more efficient for other large modes, e.g. DCmode. */
1215 x = adjust_address (x, BLKmode, 0);
1216 y = adjust_address (y, BLKmode, 0);
1217
1218 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1219 can be incorrect is coming from __builtin_memcpy. */
1220 if (GET_CODE (size) == CONST_INT)
1221 {
1222 if (INTVAL (size) == 0)
1223 return 0;
1224
1225 x = shallow_copy_rtx (x);
1226 y = shallow_copy_rtx (y);
1227 set_mem_size (x, size);
1228 set_mem_size (y, size);
1229 }
1230
1231 if (GET_CODE (size) == CONST_INT && MOVE_BY_PIECES_P (INTVAL (size), align))
1232 move_by_pieces (x, y, INTVAL (size), align, 0);
1233 else if (emit_block_move_via_movmem (x, y, size, align,
1234 expected_align, expected_size))
1235 ;
1236 else if (may_use_call)
1237 retval = emit_block_move_via_libcall (x, y, size,
1238 method == BLOCK_OP_TAILCALL);
1239 else
1240 emit_block_move_via_loop (x, y, size, align);
1241
1242 if (method == BLOCK_OP_CALL_PARM)
1243 OK_DEFER_POP;
1244
1245 return retval;
1246 }
1247
1248 rtx
1249 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1250 {
1251 return emit_block_move_hints (x, y, size, method, 0, -1);
1252 }
1253
1254 /* A subroutine of emit_block_move. Returns true if calling the
1255 block move libcall will not clobber any parameters which may have
1256 already been placed on the stack. */
1257
1258 static bool
1259 block_move_libcall_safe_for_call_parm (void)
1260 {
1261 #if defined (REG_PARM_STACK_SPACE)
1262 tree fn;
1263 #endif
1264
1265 /* If arguments are pushed on the stack, then they're safe. */
1266 if (PUSH_ARGS)
1267 return true;
1268
1269 /* If registers go on the stack anyway, any argument is sure to clobber
1270 an outgoing argument. */
1271 #if defined (REG_PARM_STACK_SPACE)
1272 fn = emit_block_move_libcall_fn (false);
1273 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1274 && REG_PARM_STACK_SPACE (fn) != 0)
1275 return false;
1276 #endif
1277
1278 /* If any argument goes in memory, then it might clobber an outgoing
1279 argument. */
1280 {
1281 CUMULATIVE_ARGS args_so_far;
1282 tree fn, arg;
1283
1284 fn = emit_block_move_libcall_fn (false);
1285 INIT_CUMULATIVE_ARGS (args_so_far, TREE_TYPE (fn), NULL_RTX, 0, 3);
1286
1287 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1288 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1289 {
1290 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1291 rtx tmp = FUNCTION_ARG (args_so_far, mode, NULL_TREE, 1);
1292 if (!tmp || !REG_P (tmp))
1293 return false;
1294 if (targetm.calls.arg_partial_bytes (&args_so_far, mode, NULL, 1))
1295 return false;
1296 FUNCTION_ARG_ADVANCE (args_so_far, mode, NULL_TREE, 1);
1297 }
1298 }
1299 return true;
1300 }
1301
1302 /* A subroutine of emit_block_move. Expand a movmem pattern;
1303 return true if successful. */
1304
1305 static bool
1306 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1307 unsigned int expected_align, HOST_WIDE_INT expected_size)
1308 {
1309 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
1310 int save_volatile_ok = volatile_ok;
1311 enum machine_mode mode;
1312
1313 if (expected_align < align)
1314 expected_align = align;
1315
1316 /* Since this is a move insn, we don't care about volatility. */
1317 volatile_ok = 1;
1318
1319 /* Try the most limited insn first, because there's no point
1320 including more than one in the machine description unless
1321 the more limited one has some advantage. */
1322
1323 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1324 mode = GET_MODE_WIDER_MODE (mode))
1325 {
1326 enum insn_code code = movmem_optab[(int) mode];
1327 insn_operand_predicate_fn pred;
1328
1329 if (code != CODE_FOR_nothing
1330 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1331 here because if SIZE is less than the mode mask, as it is
1332 returned by the macro, it will definitely be less than the
1333 actual mode mask. */
1334 && ((GET_CODE (size) == CONST_INT
1335 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1336 <= (GET_MODE_MASK (mode) >> 1)))
1337 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
1338 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
1339 || (*pred) (x, BLKmode))
1340 && ((pred = insn_data[(int) code].operand[1].predicate) == 0
1341 || (*pred) (y, BLKmode))
1342 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
1343 || (*pred) (opalign, VOIDmode)))
1344 {
1345 rtx op2;
1346 rtx last = get_last_insn ();
1347 rtx pat;
1348
1349 op2 = convert_to_mode (mode, size, 1);
1350 pred = insn_data[(int) code].operand[2].predicate;
1351 if (pred != 0 && ! (*pred) (op2, mode))
1352 op2 = copy_to_mode_reg (mode, op2);
1353
1354 /* ??? When called via emit_block_move_for_call, it'd be
1355 nice if there were some way to inform the backend, so
1356 that it doesn't fail the expansion because it thinks
1357 emitting the libcall would be more efficient. */
1358
1359 if (insn_data[(int) code].n_operands == 4)
1360 pat = GEN_FCN ((int) code) (x, y, op2, opalign);
1361 else
1362 pat = GEN_FCN ((int) code) (x, y, op2, opalign,
1363 GEN_INT (expected_align
1364 / BITS_PER_UNIT),
1365 GEN_INT (expected_size));
1366 if (pat)
1367 {
1368 emit_insn (pat);
1369 volatile_ok = save_volatile_ok;
1370 return true;
1371 }
1372 else
1373 delete_insns_since (last);
1374 }
1375 }
1376
1377 volatile_ok = save_volatile_ok;
1378 return false;
1379 }
1380
1381 /* A subroutine of emit_block_move. Expand a call to memcpy.
1382 Return the return value from memcpy, 0 otherwise. */
1383
1384 rtx
1385 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1386 {
1387 rtx dst_addr, src_addr;
1388 tree call_expr, fn, src_tree, dst_tree, size_tree;
1389 enum machine_mode size_mode;
1390 rtx retval;
1391
1392 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1393 pseudos. We can then place those new pseudos into a VAR_DECL and
1394 use them later. */
1395
1396 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1397 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1398
1399 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1400 src_addr = convert_memory_address (ptr_mode, src_addr);
1401
1402 dst_tree = make_tree (ptr_type_node, dst_addr);
1403 src_tree = make_tree (ptr_type_node, src_addr);
1404
1405 size_mode = TYPE_MODE (sizetype);
1406
1407 size = convert_to_mode (size_mode, size, 1);
1408 size = copy_to_mode_reg (size_mode, size);
1409
1410 /* It is incorrect to use the libcall calling conventions to call
1411 memcpy in this context. This could be a user call to memcpy and
1412 the user may wish to examine the return value from memcpy. For
1413 targets where libcalls and normal calls have different conventions
1414 for returning pointers, we could end up generating incorrect code. */
1415
1416 size_tree = make_tree (sizetype, size);
1417
1418 fn = emit_block_move_libcall_fn (true);
1419 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1420 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1421
1422 retval = expand_normal (call_expr);
1423
1424 return retval;
1425 }
1426
1427 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1428 for the function we use for block copies. The first time FOR_CALL
1429 is true, we call assemble_external. */
1430
1431 static GTY(()) tree block_move_fn;
1432
1433 void
1434 init_block_move_fn (const char *asmspec)
1435 {
1436 if (!block_move_fn)
1437 {
1438 tree args, fn;
1439
1440 fn = get_identifier ("memcpy");
1441 args = build_function_type_list (ptr_type_node, ptr_type_node,
1442 const_ptr_type_node, sizetype,
1443 NULL_TREE);
1444
1445 fn = build_decl (FUNCTION_DECL, fn, args);
1446 DECL_EXTERNAL (fn) = 1;
1447 TREE_PUBLIC (fn) = 1;
1448 DECL_ARTIFICIAL (fn) = 1;
1449 TREE_NOTHROW (fn) = 1;
1450 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1451 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1452
1453 block_move_fn = fn;
1454 }
1455
1456 if (asmspec)
1457 set_user_assembler_name (block_move_fn, asmspec);
1458 }
1459
1460 static tree
1461 emit_block_move_libcall_fn (int for_call)
1462 {
1463 static bool emitted_extern;
1464
1465 if (!block_move_fn)
1466 init_block_move_fn (NULL);
1467
1468 if (for_call && !emitted_extern)
1469 {
1470 emitted_extern = true;
1471 make_decl_rtl (block_move_fn);
1472 assemble_external (block_move_fn);
1473 }
1474
1475 return block_move_fn;
1476 }
1477
1478 /* A subroutine of emit_block_move. Copy the data via an explicit
1479 loop. This is used only when libcalls are forbidden. */
1480 /* ??? It'd be nice to copy in hunks larger than QImode. */
1481
1482 static void
1483 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1484 unsigned int align ATTRIBUTE_UNUSED)
1485 {
1486 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1487 enum machine_mode iter_mode;
1488
1489 iter_mode = GET_MODE (size);
1490 if (iter_mode == VOIDmode)
1491 iter_mode = word_mode;
1492
1493 top_label = gen_label_rtx ();
1494 cmp_label = gen_label_rtx ();
1495 iter = gen_reg_rtx (iter_mode);
1496
1497 emit_move_insn (iter, const0_rtx);
1498
1499 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1500 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1501 do_pending_stack_adjust ();
1502
1503 emit_jump (cmp_label);
1504 emit_label (top_label);
1505
1506 tmp = convert_modes (Pmode, iter_mode, iter, true);
1507 x_addr = gen_rtx_PLUS (Pmode, x_addr, tmp);
1508 y_addr = gen_rtx_PLUS (Pmode, y_addr, tmp);
1509 x = change_address (x, QImode, x_addr);
1510 y = change_address (y, QImode, y_addr);
1511
1512 emit_move_insn (x, y);
1513
1514 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1515 true, OPTAB_LIB_WIDEN);
1516 if (tmp != iter)
1517 emit_move_insn (iter, tmp);
1518
1519 emit_label (cmp_label);
1520
1521 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1522 true, top_label);
1523 }
1524 \f
1525 /* Copy all or part of a value X into registers starting at REGNO.
1526 The number of registers to be filled is NREGS. */
1527
1528 void
1529 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1530 {
1531 int i;
1532 #ifdef HAVE_load_multiple
1533 rtx pat;
1534 rtx last;
1535 #endif
1536
1537 if (nregs == 0)
1538 return;
1539
1540 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
1541 x = validize_mem (force_const_mem (mode, x));
1542
1543 /* See if the machine can do this with a load multiple insn. */
1544 #ifdef HAVE_load_multiple
1545 if (HAVE_load_multiple)
1546 {
1547 last = get_last_insn ();
1548 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1549 GEN_INT (nregs));
1550 if (pat)
1551 {
1552 emit_insn (pat);
1553 return;
1554 }
1555 else
1556 delete_insns_since (last);
1557 }
1558 #endif
1559
1560 for (i = 0; i < nregs; i++)
1561 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1562 operand_subword_force (x, i, mode));
1563 }
1564
1565 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1566 The number of registers to be filled is NREGS. */
1567
1568 void
1569 move_block_from_reg (int regno, rtx x, int nregs)
1570 {
1571 int i;
1572
1573 if (nregs == 0)
1574 return;
1575
1576 /* See if the machine can do this with a store multiple insn. */
1577 #ifdef HAVE_store_multiple
1578 if (HAVE_store_multiple)
1579 {
1580 rtx last = get_last_insn ();
1581 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1582 GEN_INT (nregs));
1583 if (pat)
1584 {
1585 emit_insn (pat);
1586 return;
1587 }
1588 else
1589 delete_insns_since (last);
1590 }
1591 #endif
1592
1593 for (i = 0; i < nregs; i++)
1594 {
1595 rtx tem = operand_subword (x, i, 1, BLKmode);
1596
1597 gcc_assert (tem);
1598
1599 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1600 }
1601 }
1602
1603 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1604 ORIG, where ORIG is a non-consecutive group of registers represented by
1605 a PARALLEL. The clone is identical to the original except in that the
1606 original set of registers is replaced by a new set of pseudo registers.
1607 The new set has the same modes as the original set. */
1608
1609 rtx
1610 gen_group_rtx (rtx orig)
1611 {
1612 int i, length;
1613 rtx *tmps;
1614
1615 gcc_assert (GET_CODE (orig) == PARALLEL);
1616
1617 length = XVECLEN (orig, 0);
1618 tmps = XALLOCAVEC (rtx, length);
1619
1620 /* Skip a NULL entry in first slot. */
1621 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1622
1623 if (i)
1624 tmps[0] = 0;
1625
1626 for (; i < length; i++)
1627 {
1628 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1629 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1630
1631 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1632 }
1633
1634 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1635 }
1636
1637 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1638 except that values are placed in TMPS[i], and must later be moved
1639 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1640
1641 static void
1642 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1643 {
1644 rtx src;
1645 int start, i;
1646 enum machine_mode m = GET_MODE (orig_src);
1647
1648 gcc_assert (GET_CODE (dst) == PARALLEL);
1649
1650 if (m != VOIDmode
1651 && !SCALAR_INT_MODE_P (m)
1652 && !MEM_P (orig_src)
1653 && GET_CODE (orig_src) != CONCAT)
1654 {
1655 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1656 if (imode == BLKmode)
1657 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1658 else
1659 src = gen_reg_rtx (imode);
1660 if (imode != BLKmode)
1661 src = gen_lowpart (GET_MODE (orig_src), src);
1662 emit_move_insn (src, orig_src);
1663 /* ...and back again. */
1664 if (imode != BLKmode)
1665 src = gen_lowpart (imode, src);
1666 emit_group_load_1 (tmps, dst, src, type, ssize);
1667 return;
1668 }
1669
1670 /* Check for a NULL entry, used to indicate that the parameter goes
1671 both on the stack and in registers. */
1672 if (XEXP (XVECEXP (dst, 0, 0), 0))
1673 start = 0;
1674 else
1675 start = 1;
1676
1677 /* Process the pieces. */
1678 for (i = start; i < XVECLEN (dst, 0); i++)
1679 {
1680 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1681 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1682 unsigned int bytelen = GET_MODE_SIZE (mode);
1683 int shift = 0;
1684
1685 /* Handle trailing fragments that run over the size of the struct. */
1686 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1687 {
1688 /* Arrange to shift the fragment to where it belongs.
1689 extract_bit_field loads to the lsb of the reg. */
1690 if (
1691 #ifdef BLOCK_REG_PADDING
1692 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1693 == (BYTES_BIG_ENDIAN ? upward : downward)
1694 #else
1695 BYTES_BIG_ENDIAN
1696 #endif
1697 )
1698 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1699 bytelen = ssize - bytepos;
1700 gcc_assert (bytelen > 0);
1701 }
1702
1703 /* If we won't be loading directly from memory, protect the real source
1704 from strange tricks we might play; but make sure that the source can
1705 be loaded directly into the destination. */
1706 src = orig_src;
1707 if (!MEM_P (orig_src)
1708 && (!CONSTANT_P (orig_src)
1709 || (GET_MODE (orig_src) != mode
1710 && GET_MODE (orig_src) != VOIDmode)))
1711 {
1712 if (GET_MODE (orig_src) == VOIDmode)
1713 src = gen_reg_rtx (mode);
1714 else
1715 src = gen_reg_rtx (GET_MODE (orig_src));
1716
1717 emit_move_insn (src, orig_src);
1718 }
1719
1720 /* Optimize the access just a bit. */
1721 if (MEM_P (src)
1722 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1723 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1724 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1725 && bytelen == GET_MODE_SIZE (mode))
1726 {
1727 tmps[i] = gen_reg_rtx (mode);
1728 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1729 }
1730 else if (COMPLEX_MODE_P (mode)
1731 && GET_MODE (src) == mode
1732 && bytelen == GET_MODE_SIZE (mode))
1733 /* Let emit_move_complex do the bulk of the work. */
1734 tmps[i] = src;
1735 else if (GET_CODE (src) == CONCAT)
1736 {
1737 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1738 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1739
1740 if ((bytepos == 0 && bytelen == slen0)
1741 || (bytepos != 0 && bytepos + bytelen <= slen))
1742 {
1743 /* The following assumes that the concatenated objects all
1744 have the same size. In this case, a simple calculation
1745 can be used to determine the object and the bit field
1746 to be extracted. */
1747 tmps[i] = XEXP (src, bytepos / slen0);
1748 if (! CONSTANT_P (tmps[i])
1749 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1750 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1751 (bytepos % slen0) * BITS_PER_UNIT,
1752 1, NULL_RTX, mode, mode);
1753 }
1754 else
1755 {
1756 rtx mem;
1757
1758 gcc_assert (!bytepos);
1759 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1760 emit_move_insn (mem, src);
1761 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1762 0, 1, NULL_RTX, mode, mode);
1763 }
1764 }
1765 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1766 SIMD register, which is currently broken. While we get GCC
1767 to emit proper RTL for these cases, let's dump to memory. */
1768 else if (VECTOR_MODE_P (GET_MODE (dst))
1769 && REG_P (src))
1770 {
1771 int slen = GET_MODE_SIZE (GET_MODE (src));
1772 rtx mem;
1773
1774 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1775 emit_move_insn (mem, src);
1776 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1777 }
1778 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1779 && XVECLEN (dst, 0) > 1)
1780 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1781 else if (CONSTANT_P (src))
1782 {
1783 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1784
1785 if (len == ssize)
1786 tmps[i] = src;
1787 else
1788 {
1789 rtx first, second;
1790
1791 gcc_assert (2 * len == ssize);
1792 split_double (src, &first, &second);
1793 if (i)
1794 tmps[i] = second;
1795 else
1796 tmps[i] = first;
1797 }
1798 }
1799 else if (REG_P (src) && GET_MODE (src) == mode)
1800 tmps[i] = src;
1801 else
1802 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1803 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1804 mode, mode);
1805
1806 if (shift)
1807 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1808 build_int_cst (NULL_TREE, shift), tmps[i], 0);
1809 }
1810 }
1811
1812 /* Emit code to move a block SRC of type TYPE to a block DST,
1813 where DST is non-consecutive registers represented by a PARALLEL.
1814 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1815 if not known. */
1816
1817 void
1818 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1819 {
1820 rtx *tmps;
1821 int i;
1822
1823 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1824 emit_group_load_1 (tmps, dst, src, type, ssize);
1825
1826 /* Copy the extracted pieces into the proper (probable) hard regs. */
1827 for (i = 0; i < XVECLEN (dst, 0); i++)
1828 {
1829 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1830 if (d == NULL)
1831 continue;
1832 emit_move_insn (d, tmps[i]);
1833 }
1834 }
1835
1836 /* Similar, but load SRC into new pseudos in a format that looks like
1837 PARALLEL. This can later be fed to emit_group_move to get things
1838 in the right place. */
1839
1840 rtx
1841 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1842 {
1843 rtvec vec;
1844 int i;
1845
1846 vec = rtvec_alloc (XVECLEN (parallel, 0));
1847 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1848
1849 /* Convert the vector to look just like the original PARALLEL, except
1850 with the computed values. */
1851 for (i = 0; i < XVECLEN (parallel, 0); i++)
1852 {
1853 rtx e = XVECEXP (parallel, 0, i);
1854 rtx d = XEXP (e, 0);
1855
1856 if (d)
1857 {
1858 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1859 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1860 }
1861 RTVEC_ELT (vec, i) = e;
1862 }
1863
1864 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1865 }
1866
1867 /* Emit code to move a block SRC to block DST, where SRC and DST are
1868 non-consecutive groups of registers, each represented by a PARALLEL. */
1869
1870 void
1871 emit_group_move (rtx dst, rtx src)
1872 {
1873 int i;
1874
1875 gcc_assert (GET_CODE (src) == PARALLEL
1876 && GET_CODE (dst) == PARALLEL
1877 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1878
1879 /* Skip first entry if NULL. */
1880 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1881 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1882 XEXP (XVECEXP (src, 0, i), 0));
1883 }
1884
1885 /* Move a group of registers represented by a PARALLEL into pseudos. */
1886
1887 rtx
1888 emit_group_move_into_temps (rtx src)
1889 {
1890 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1891 int i;
1892
1893 for (i = 0; i < XVECLEN (src, 0); i++)
1894 {
1895 rtx e = XVECEXP (src, 0, i);
1896 rtx d = XEXP (e, 0);
1897
1898 if (d)
1899 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1900 RTVEC_ELT (vec, i) = e;
1901 }
1902
1903 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1904 }
1905
1906 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1907 where SRC is non-consecutive registers represented by a PARALLEL.
1908 SSIZE represents the total size of block ORIG_DST, or -1 if not
1909 known. */
1910
1911 void
1912 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1913 {
1914 rtx *tmps, dst;
1915 int start, finish, i;
1916 enum machine_mode m = GET_MODE (orig_dst);
1917
1918 gcc_assert (GET_CODE (src) == PARALLEL);
1919
1920 if (!SCALAR_INT_MODE_P (m)
1921 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1922 {
1923 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1924 if (imode == BLKmode)
1925 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1926 else
1927 dst = gen_reg_rtx (imode);
1928 emit_group_store (dst, src, type, ssize);
1929 if (imode != BLKmode)
1930 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1931 emit_move_insn (orig_dst, dst);
1932 return;
1933 }
1934
1935 /* Check for a NULL entry, used to indicate that the parameter goes
1936 both on the stack and in registers. */
1937 if (XEXP (XVECEXP (src, 0, 0), 0))
1938 start = 0;
1939 else
1940 start = 1;
1941 finish = XVECLEN (src, 0);
1942
1943 tmps = XALLOCAVEC (rtx, finish);
1944
1945 /* Copy the (probable) hard regs into pseudos. */
1946 for (i = start; i < finish; i++)
1947 {
1948 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1949 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1950 {
1951 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1952 emit_move_insn (tmps[i], reg);
1953 }
1954 else
1955 tmps[i] = reg;
1956 }
1957
1958 /* If we won't be storing directly into memory, protect the real destination
1959 from strange tricks we might play. */
1960 dst = orig_dst;
1961 if (GET_CODE (dst) == PARALLEL)
1962 {
1963 rtx temp;
1964
1965 /* We can get a PARALLEL dst if there is a conditional expression in
1966 a return statement. In that case, the dst and src are the same,
1967 so no action is necessary. */
1968 if (rtx_equal_p (dst, src))
1969 return;
1970
1971 /* It is unclear if we can ever reach here, but we may as well handle
1972 it. Allocate a temporary, and split this into a store/load to/from
1973 the temporary. */
1974
1975 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1976 emit_group_store (temp, src, type, ssize);
1977 emit_group_load (dst, temp, type, ssize);
1978 return;
1979 }
1980 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1981 {
1982 enum machine_mode outer = GET_MODE (dst);
1983 enum machine_mode inner;
1984 HOST_WIDE_INT bytepos;
1985 bool done = false;
1986 rtx temp;
1987
1988 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1989 dst = gen_reg_rtx (outer);
1990
1991 /* Make life a bit easier for combine. */
1992 /* If the first element of the vector is the low part
1993 of the destination mode, use a paradoxical subreg to
1994 initialize the destination. */
1995 if (start < finish)
1996 {
1997 inner = GET_MODE (tmps[start]);
1998 bytepos = subreg_lowpart_offset (inner, outer);
1999 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
2000 {
2001 temp = simplify_gen_subreg (outer, tmps[start],
2002 inner, 0);
2003 if (temp)
2004 {
2005 emit_move_insn (dst, temp);
2006 done = true;
2007 start++;
2008 }
2009 }
2010 }
2011
2012 /* If the first element wasn't the low part, try the last. */
2013 if (!done
2014 && start < finish - 1)
2015 {
2016 inner = GET_MODE (tmps[finish - 1]);
2017 bytepos = subreg_lowpart_offset (inner, outer);
2018 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
2019 {
2020 temp = simplify_gen_subreg (outer, tmps[finish - 1],
2021 inner, 0);
2022 if (temp)
2023 {
2024 emit_move_insn (dst, temp);
2025 done = true;
2026 finish--;
2027 }
2028 }
2029 }
2030
2031 /* Otherwise, simply initialize the result to zero. */
2032 if (!done)
2033 emit_move_insn (dst, CONST0_RTX (outer));
2034 }
2035
2036 /* Process the pieces. */
2037 for (i = start; i < finish; i++)
2038 {
2039 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2040 enum machine_mode mode = GET_MODE (tmps[i]);
2041 unsigned int bytelen = GET_MODE_SIZE (mode);
2042 rtx dest = dst;
2043
2044 /* Handle trailing fragments that run over the size of the struct. */
2045 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2046 {
2047 /* store_bit_field always takes its value from the lsb.
2048 Move the fragment to the lsb if it's not already there. */
2049 if (
2050 #ifdef BLOCK_REG_PADDING
2051 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2052 == (BYTES_BIG_ENDIAN ? upward : downward)
2053 #else
2054 BYTES_BIG_ENDIAN
2055 #endif
2056 )
2057 {
2058 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2059 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2060 build_int_cst (NULL_TREE, shift),
2061 tmps[i], 0);
2062 }
2063 bytelen = ssize - bytepos;
2064 }
2065
2066 if (GET_CODE (dst) == CONCAT)
2067 {
2068 if (bytepos + bytelen <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2069 dest = XEXP (dst, 0);
2070 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2071 {
2072 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2073 dest = XEXP (dst, 1);
2074 }
2075 else
2076 {
2077 enum machine_mode dest_mode = GET_MODE (dest);
2078 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2079 int dest_size = GET_MODE_SIZE (dest_mode);
2080 int tmp_size = GET_MODE_SIZE (tmp_mode);
2081
2082 gcc_assert (bytepos == 0
2083 && XVECLEN (src, 0)
2084 && dest_size == tmp_size);
2085
2086 if (GET_MODE_ALIGNMENT (dest_mode)
2087 >= GET_MODE_ALIGNMENT (tmp_mode))
2088 {
2089 dest = assign_stack_temp (dest_mode, dest_size, 0);
2090 emit_move_insn (adjust_address (dest,
2091 tmp_mode,
2092 bytepos),
2093 tmps[i]);
2094 dst = dest;
2095 }
2096 else
2097 {
2098 dest = assign_stack_temp (tmp_mode, tmp_size, 0);
2099 emit_move_insn (dest, tmps[i]);
2100 dst = adjust_address (dest, dest_mode, bytepos);
2101 }
2102 break;
2103 }
2104 }
2105
2106 /* Optimize the access just a bit. */
2107 if (MEM_P (dest)
2108 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2109 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2110 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2111 && bytelen == GET_MODE_SIZE (mode))
2112 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2113 else
2114 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2115 mode, tmps[i]);
2116 }
2117
2118 /* Copy from the pseudo into the (probable) hard reg. */
2119 if (orig_dst != dst)
2120 emit_move_insn (orig_dst, dst);
2121 }
2122
2123 /* Generate code to copy a BLKmode object of TYPE out of a
2124 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2125 is null, a stack temporary is created. TGTBLK is returned.
2126
2127 The purpose of this routine is to handle functions that return
2128 BLKmode structures in registers. Some machines (the PA for example)
2129 want to return all small structures in registers regardless of the
2130 structure's alignment. */
2131
2132 rtx
2133 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2134 {
2135 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2136 rtx src = NULL, dst = NULL;
2137 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2138 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2139 enum machine_mode copy_mode;
2140
2141 if (tgtblk == 0)
2142 {
2143 tgtblk = assign_temp (build_qualified_type (type,
2144 (TYPE_QUALS (type)
2145 | TYPE_QUAL_CONST)),
2146 0, 1, 1);
2147 preserve_temp_slots (tgtblk);
2148 }
2149
2150 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2151 into a new pseudo which is a full word. */
2152
2153 if (GET_MODE (srcreg) != BLKmode
2154 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2155 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2156
2157 /* If the structure doesn't take up a whole number of words, see whether
2158 SRCREG is padded on the left or on the right. If it's on the left,
2159 set PADDING_CORRECTION to the number of bits to skip.
2160
2161 In most ABIs, the structure will be returned at the least end of
2162 the register, which translates to right padding on little-endian
2163 targets and left padding on big-endian targets. The opposite
2164 holds if the structure is returned at the most significant
2165 end of the register. */
2166 if (bytes % UNITS_PER_WORD != 0
2167 && (targetm.calls.return_in_msb (type)
2168 ? !BYTES_BIG_ENDIAN
2169 : BYTES_BIG_ENDIAN))
2170 padding_correction
2171 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2172
2173 /* Copy the structure BITSIZE bits at a time. If the target lives in
2174 memory, take care of not reading/writing past its end by selecting
2175 a copy mode suited to BITSIZE. This should always be possible given
2176 how it is computed.
2177
2178 We could probably emit more efficient code for machines which do not use
2179 strict alignment, but it doesn't seem worth the effort at the current
2180 time. */
2181
2182 copy_mode = word_mode;
2183 if (MEM_P (tgtblk))
2184 {
2185 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2186 if (mem_mode != BLKmode)
2187 copy_mode = mem_mode;
2188 }
2189
2190 for (bitpos = 0, xbitpos = padding_correction;
2191 bitpos < bytes * BITS_PER_UNIT;
2192 bitpos += bitsize, xbitpos += bitsize)
2193 {
2194 /* We need a new source operand each time xbitpos is on a
2195 word boundary and when xbitpos == padding_correction
2196 (the first time through). */
2197 if (xbitpos % BITS_PER_WORD == 0
2198 || xbitpos == padding_correction)
2199 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2200 GET_MODE (srcreg));
2201
2202 /* We need a new destination operand each time bitpos is on
2203 a word boundary. */
2204 if (bitpos % BITS_PER_WORD == 0)
2205 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2206
2207 /* Use xbitpos for the source extraction (right justified) and
2208 bitpos for the destination store (left justified). */
2209 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, copy_mode,
2210 extract_bit_field (src, bitsize,
2211 xbitpos % BITS_PER_WORD, 1,
2212 NULL_RTX, copy_mode, copy_mode));
2213 }
2214
2215 return tgtblk;
2216 }
2217
2218 /* Add a USE expression for REG to the (possibly empty) list pointed
2219 to by CALL_FUSAGE. REG must denote a hard register. */
2220
2221 void
2222 use_reg (rtx *call_fusage, rtx reg)
2223 {
2224 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2225
2226 *call_fusage
2227 = gen_rtx_EXPR_LIST (VOIDmode,
2228 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2229 }
2230
2231 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2232 starting at REGNO. All of these registers must be hard registers. */
2233
2234 void
2235 use_regs (rtx *call_fusage, int regno, int nregs)
2236 {
2237 int i;
2238
2239 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2240
2241 for (i = 0; i < nregs; i++)
2242 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2243 }
2244
2245 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2246 PARALLEL REGS. This is for calls that pass values in multiple
2247 non-contiguous locations. The Irix 6 ABI has examples of this. */
2248
2249 void
2250 use_group_regs (rtx *call_fusage, rtx regs)
2251 {
2252 int i;
2253
2254 for (i = 0; i < XVECLEN (regs, 0); i++)
2255 {
2256 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2257
2258 /* A NULL entry means the parameter goes both on the stack and in
2259 registers. This can also be a MEM for targets that pass values
2260 partially on the stack and partially in registers. */
2261 if (reg != 0 && REG_P (reg))
2262 use_reg (call_fusage, reg);
2263 }
2264 }
2265 \f
2266
2267 /* Determine whether the LEN bytes generated by CONSTFUN can be
2268 stored to memory using several move instructions. CONSTFUNDATA is
2269 a pointer which will be passed as argument in every CONSTFUN call.
2270 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2271 a memset operation and false if it's a copy of a constant string.
2272 Return nonzero if a call to store_by_pieces should succeed. */
2273
2274 int
2275 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2276 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2277 void *constfundata, unsigned int align, bool memsetp)
2278 {
2279 unsigned HOST_WIDE_INT l;
2280 unsigned int max_size;
2281 HOST_WIDE_INT offset = 0;
2282 enum machine_mode mode, tmode;
2283 enum insn_code icode;
2284 int reverse;
2285 rtx cst;
2286
2287 if (len == 0)
2288 return 1;
2289
2290 if (! (memsetp
2291 ? SET_BY_PIECES_P (len, align)
2292 : STORE_BY_PIECES_P (len, align)))
2293 return 0;
2294
2295 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2296 if (align >= GET_MODE_ALIGNMENT (tmode))
2297 align = GET_MODE_ALIGNMENT (tmode);
2298 else
2299 {
2300 enum machine_mode xmode;
2301
2302 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2303 tmode != VOIDmode;
2304 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2305 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2306 || SLOW_UNALIGNED_ACCESS (tmode, align))
2307 break;
2308
2309 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2310 }
2311
2312 /* We would first store what we can in the largest integer mode, then go to
2313 successively smaller modes. */
2314
2315 for (reverse = 0;
2316 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2317 reverse++)
2318 {
2319 l = len;
2320 mode = VOIDmode;
2321 max_size = STORE_MAX_PIECES + 1;
2322 while (max_size > 1)
2323 {
2324 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2325 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2326 if (GET_MODE_SIZE (tmode) < max_size)
2327 mode = tmode;
2328
2329 if (mode == VOIDmode)
2330 break;
2331
2332 icode = optab_handler (mov_optab, mode)->insn_code;
2333 if (icode != CODE_FOR_nothing
2334 && align >= GET_MODE_ALIGNMENT (mode))
2335 {
2336 unsigned int size = GET_MODE_SIZE (mode);
2337
2338 while (l >= size)
2339 {
2340 if (reverse)
2341 offset -= size;
2342
2343 cst = (*constfun) (constfundata, offset, mode);
2344 if (!LEGITIMATE_CONSTANT_P (cst))
2345 return 0;
2346
2347 if (!reverse)
2348 offset += size;
2349
2350 l -= size;
2351 }
2352 }
2353
2354 max_size = GET_MODE_SIZE (mode);
2355 }
2356
2357 /* The code above should have handled everything. */
2358 gcc_assert (!l);
2359 }
2360
2361 return 1;
2362 }
2363
2364 /* Generate several move instructions to store LEN bytes generated by
2365 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2366 pointer which will be passed as argument in every CONSTFUN call.
2367 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2368 a memset operation and false if it's a copy of a constant string.
2369 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2370 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2371 stpcpy. */
2372
2373 rtx
2374 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2375 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2376 void *constfundata, unsigned int align, bool memsetp, int endp)
2377 {
2378 struct store_by_pieces data;
2379
2380 if (len == 0)
2381 {
2382 gcc_assert (endp != 2);
2383 return to;
2384 }
2385
2386 gcc_assert (memsetp
2387 ? SET_BY_PIECES_P (len, align)
2388 : STORE_BY_PIECES_P (len, align));
2389 data.constfun = constfun;
2390 data.constfundata = constfundata;
2391 data.len = len;
2392 data.to = to;
2393 store_by_pieces_1 (&data, align);
2394 if (endp)
2395 {
2396 rtx to1;
2397
2398 gcc_assert (!data.reverse);
2399 if (data.autinc_to)
2400 {
2401 if (endp == 2)
2402 {
2403 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2404 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2405 else
2406 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
2407 -1));
2408 }
2409 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2410 data.offset);
2411 }
2412 else
2413 {
2414 if (endp == 2)
2415 --data.offset;
2416 to1 = adjust_address (data.to, QImode, data.offset);
2417 }
2418 return to1;
2419 }
2420 else
2421 return data.to;
2422 }
2423
2424 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2425 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2426
2427 static void
2428 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2429 {
2430 struct store_by_pieces data;
2431
2432 if (len == 0)
2433 return;
2434
2435 data.constfun = clear_by_pieces_1;
2436 data.constfundata = NULL;
2437 data.len = len;
2438 data.to = to;
2439 store_by_pieces_1 (&data, align);
2440 }
2441
2442 /* Callback routine for clear_by_pieces.
2443 Return const0_rtx unconditionally. */
2444
2445 static rtx
2446 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2447 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2448 enum machine_mode mode ATTRIBUTE_UNUSED)
2449 {
2450 return const0_rtx;
2451 }
2452
2453 /* Subroutine of clear_by_pieces and store_by_pieces.
2454 Generate several move instructions to store LEN bytes of block TO. (A MEM
2455 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2456
2457 static void
2458 store_by_pieces_1 (struct store_by_pieces *data ATTRIBUTE_UNUSED,
2459 unsigned int align ATTRIBUTE_UNUSED)
2460 {
2461 rtx to_addr = XEXP (data->to, 0);
2462 unsigned int max_size = STORE_MAX_PIECES + 1;
2463 enum machine_mode mode = VOIDmode, tmode;
2464 enum insn_code icode;
2465
2466 data->offset = 0;
2467 data->to_addr = to_addr;
2468 data->autinc_to
2469 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2470 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2471
2472 data->explicit_inc_to = 0;
2473 data->reverse
2474 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2475 if (data->reverse)
2476 data->offset = data->len;
2477
2478 /* If storing requires more than two move insns,
2479 copy addresses to registers (to make displacements shorter)
2480 and use post-increment if available. */
2481 if (!data->autinc_to
2482 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2483 {
2484 /* Determine the main mode we'll be using. */
2485 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2486 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2487 if (GET_MODE_SIZE (tmode) < max_size)
2488 mode = tmode;
2489
2490 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2491 {
2492 data->to_addr = copy_addr_to_reg (plus_constant (to_addr, data->len));
2493 data->autinc_to = 1;
2494 data->explicit_inc_to = -1;
2495 }
2496
2497 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2498 && ! data->autinc_to)
2499 {
2500 data->to_addr = copy_addr_to_reg (to_addr);
2501 data->autinc_to = 1;
2502 data->explicit_inc_to = 1;
2503 }
2504
2505 if ( !data->autinc_to && CONSTANT_P (to_addr))
2506 data->to_addr = copy_addr_to_reg (to_addr);
2507 }
2508
2509 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2510 if (align >= GET_MODE_ALIGNMENT (tmode))
2511 align = GET_MODE_ALIGNMENT (tmode);
2512 else
2513 {
2514 enum machine_mode xmode;
2515
2516 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2517 tmode != VOIDmode;
2518 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2519 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2520 || SLOW_UNALIGNED_ACCESS (tmode, align))
2521 break;
2522
2523 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2524 }
2525
2526 /* First store what we can in the largest integer mode, then go to
2527 successively smaller modes. */
2528
2529 while (max_size > 1)
2530 {
2531 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2532 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2533 if (GET_MODE_SIZE (tmode) < max_size)
2534 mode = tmode;
2535
2536 if (mode == VOIDmode)
2537 break;
2538
2539 icode = optab_handler (mov_optab, mode)->insn_code;
2540 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2541 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2542
2543 max_size = GET_MODE_SIZE (mode);
2544 }
2545
2546 /* The code above should have handled everything. */
2547 gcc_assert (!data->len);
2548 }
2549
2550 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2551 with move instructions for mode MODE. GENFUN is the gen_... function
2552 to make a move insn for that mode. DATA has all the other info. */
2553
2554 static void
2555 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2556 struct store_by_pieces *data)
2557 {
2558 unsigned int size = GET_MODE_SIZE (mode);
2559 rtx to1, cst;
2560
2561 while (data->len >= size)
2562 {
2563 if (data->reverse)
2564 data->offset -= size;
2565
2566 if (data->autinc_to)
2567 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2568 data->offset);
2569 else
2570 to1 = adjust_address (data->to, mode, data->offset);
2571
2572 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2573 emit_insn (gen_add2_insn (data->to_addr,
2574 GEN_INT (-(HOST_WIDE_INT) size)));
2575
2576 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2577 emit_insn ((*genfun) (to1, cst));
2578
2579 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2580 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2581
2582 if (! data->reverse)
2583 data->offset += size;
2584
2585 data->len -= size;
2586 }
2587 }
2588 \f
2589 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2590 its length in bytes. */
2591
2592 rtx
2593 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2594 unsigned int expected_align, HOST_WIDE_INT expected_size)
2595 {
2596 enum machine_mode mode = GET_MODE (object);
2597 unsigned int align;
2598
2599 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2600
2601 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2602 just move a zero. Otherwise, do this a piece at a time. */
2603 if (mode != BLKmode
2604 && GET_CODE (size) == CONST_INT
2605 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2606 {
2607 rtx zero = CONST0_RTX (mode);
2608 if (zero != NULL)
2609 {
2610 emit_move_insn (object, zero);
2611 return NULL;
2612 }
2613
2614 if (COMPLEX_MODE_P (mode))
2615 {
2616 zero = CONST0_RTX (GET_MODE_INNER (mode));
2617 if (zero != NULL)
2618 {
2619 write_complex_part (object, zero, 0);
2620 write_complex_part (object, zero, 1);
2621 return NULL;
2622 }
2623 }
2624 }
2625
2626 if (size == const0_rtx)
2627 return NULL;
2628
2629 align = MEM_ALIGN (object);
2630
2631 if (GET_CODE (size) == CONST_INT
2632 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2633 clear_by_pieces (object, INTVAL (size), align);
2634 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2635 expected_align, expected_size))
2636 ;
2637 else
2638 return set_storage_via_libcall (object, size, const0_rtx,
2639 method == BLOCK_OP_TAILCALL);
2640
2641 return NULL;
2642 }
2643
2644 rtx
2645 clear_storage (rtx object, rtx size, enum block_op_methods method)
2646 {
2647 return clear_storage_hints (object, size, method, 0, -1);
2648 }
2649
2650
2651 /* A subroutine of clear_storage. Expand a call to memset.
2652 Return the return value of memset, 0 otherwise. */
2653
2654 rtx
2655 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2656 {
2657 tree call_expr, fn, object_tree, size_tree, val_tree;
2658 enum machine_mode size_mode;
2659 rtx retval;
2660
2661 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2662 place those into new pseudos into a VAR_DECL and use them later. */
2663
2664 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2665
2666 size_mode = TYPE_MODE (sizetype);
2667 size = convert_to_mode (size_mode, size, 1);
2668 size = copy_to_mode_reg (size_mode, size);
2669
2670 /* It is incorrect to use the libcall calling conventions to call
2671 memset in this context. This could be a user call to memset and
2672 the user may wish to examine the return value from memset. For
2673 targets where libcalls and normal calls have different conventions
2674 for returning pointers, we could end up generating incorrect code. */
2675
2676 object_tree = make_tree (ptr_type_node, object);
2677 if (GET_CODE (val) != CONST_INT)
2678 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2679 size_tree = make_tree (sizetype, size);
2680 val_tree = make_tree (integer_type_node, val);
2681
2682 fn = clear_storage_libcall_fn (true);
2683 call_expr = build_call_expr (fn, 3,
2684 object_tree, integer_zero_node, size_tree);
2685 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2686
2687 retval = expand_normal (call_expr);
2688
2689 return retval;
2690 }
2691
2692 /* A subroutine of set_storage_via_libcall. Create the tree node
2693 for the function we use for block clears. The first time FOR_CALL
2694 is true, we call assemble_external. */
2695
2696 static GTY(()) tree block_clear_fn;
2697
2698 void
2699 init_block_clear_fn (const char *asmspec)
2700 {
2701 if (!block_clear_fn)
2702 {
2703 tree fn, args;
2704
2705 fn = get_identifier ("memset");
2706 args = build_function_type_list (ptr_type_node, ptr_type_node,
2707 integer_type_node, sizetype,
2708 NULL_TREE);
2709
2710 fn = build_decl (FUNCTION_DECL, fn, args);
2711 DECL_EXTERNAL (fn) = 1;
2712 TREE_PUBLIC (fn) = 1;
2713 DECL_ARTIFICIAL (fn) = 1;
2714 TREE_NOTHROW (fn) = 1;
2715 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2716 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2717
2718 block_clear_fn = fn;
2719 }
2720
2721 if (asmspec)
2722 set_user_assembler_name (block_clear_fn, asmspec);
2723 }
2724
2725 static tree
2726 clear_storage_libcall_fn (int for_call)
2727 {
2728 static bool emitted_extern;
2729
2730 if (!block_clear_fn)
2731 init_block_clear_fn (NULL);
2732
2733 if (for_call && !emitted_extern)
2734 {
2735 emitted_extern = true;
2736 make_decl_rtl (block_clear_fn);
2737 assemble_external (block_clear_fn);
2738 }
2739
2740 return block_clear_fn;
2741 }
2742 \f
2743 /* Expand a setmem pattern; return true if successful. */
2744
2745 bool
2746 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2747 unsigned int expected_align, HOST_WIDE_INT expected_size)
2748 {
2749 /* Try the most limited insn first, because there's no point
2750 including more than one in the machine description unless
2751 the more limited one has some advantage. */
2752
2753 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
2754 enum machine_mode mode;
2755
2756 if (expected_align < align)
2757 expected_align = align;
2758
2759 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2760 mode = GET_MODE_WIDER_MODE (mode))
2761 {
2762 enum insn_code code = setmem_optab[(int) mode];
2763 insn_operand_predicate_fn pred;
2764
2765 if (code != CODE_FOR_nothing
2766 /* We don't need MODE to be narrower than
2767 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2768 the mode mask, as it is returned by the macro, it will
2769 definitely be less than the actual mode mask. */
2770 && ((GET_CODE (size) == CONST_INT
2771 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2772 <= (GET_MODE_MASK (mode) >> 1)))
2773 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
2774 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
2775 || (*pred) (object, BLKmode))
2776 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
2777 || (*pred) (opalign, VOIDmode)))
2778 {
2779 rtx opsize, opchar;
2780 enum machine_mode char_mode;
2781 rtx last = get_last_insn ();
2782 rtx pat;
2783
2784 opsize = convert_to_mode (mode, size, 1);
2785 pred = insn_data[(int) code].operand[1].predicate;
2786 if (pred != 0 && ! (*pred) (opsize, mode))
2787 opsize = copy_to_mode_reg (mode, opsize);
2788
2789 opchar = val;
2790 char_mode = insn_data[(int) code].operand[2].mode;
2791 if (char_mode != VOIDmode)
2792 {
2793 opchar = convert_to_mode (char_mode, opchar, 1);
2794 pred = insn_data[(int) code].operand[2].predicate;
2795 if (pred != 0 && ! (*pred) (opchar, char_mode))
2796 opchar = copy_to_mode_reg (char_mode, opchar);
2797 }
2798
2799 if (insn_data[(int) code].n_operands == 4)
2800 pat = GEN_FCN ((int) code) (object, opsize, opchar, opalign);
2801 else
2802 pat = GEN_FCN ((int) code) (object, opsize, opchar, opalign,
2803 GEN_INT (expected_align
2804 / BITS_PER_UNIT),
2805 GEN_INT (expected_size));
2806 if (pat)
2807 {
2808 emit_insn (pat);
2809 return true;
2810 }
2811 else
2812 delete_insns_since (last);
2813 }
2814 }
2815
2816 return false;
2817 }
2818
2819 \f
2820 /* Write to one of the components of the complex value CPLX. Write VAL to
2821 the real part if IMAG_P is false, and the imaginary part if its true. */
2822
2823 static void
2824 write_complex_part (rtx cplx, rtx val, bool imag_p)
2825 {
2826 enum machine_mode cmode;
2827 enum machine_mode imode;
2828 unsigned ibitsize;
2829
2830 if (GET_CODE (cplx) == CONCAT)
2831 {
2832 emit_move_insn (XEXP (cplx, imag_p), val);
2833 return;
2834 }
2835
2836 cmode = GET_MODE (cplx);
2837 imode = GET_MODE_INNER (cmode);
2838 ibitsize = GET_MODE_BITSIZE (imode);
2839
2840 /* For MEMs simplify_gen_subreg may generate an invalid new address
2841 because, e.g., the original address is considered mode-dependent
2842 by the target, which restricts simplify_subreg from invoking
2843 adjust_address_nv. Instead of preparing fallback support for an
2844 invalid address, we call adjust_address_nv directly. */
2845 if (MEM_P (cplx))
2846 {
2847 emit_move_insn (adjust_address_nv (cplx, imode,
2848 imag_p ? GET_MODE_SIZE (imode) : 0),
2849 val);
2850 return;
2851 }
2852
2853 /* If the sub-object is at least word sized, then we know that subregging
2854 will work. This special case is important, since store_bit_field
2855 wants to operate on integer modes, and there's rarely an OImode to
2856 correspond to TCmode. */
2857 if (ibitsize >= BITS_PER_WORD
2858 /* For hard regs we have exact predicates. Assume we can split
2859 the original object if it spans an even number of hard regs.
2860 This special case is important for SCmode on 64-bit platforms
2861 where the natural size of floating-point regs is 32-bit. */
2862 || (REG_P (cplx)
2863 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2864 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2865 {
2866 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2867 imag_p ? GET_MODE_SIZE (imode) : 0);
2868 if (part)
2869 {
2870 emit_move_insn (part, val);
2871 return;
2872 }
2873 else
2874 /* simplify_gen_subreg may fail for sub-word MEMs. */
2875 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2876 }
2877
2878 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, imode, val);
2879 }
2880
2881 /* Extract one of the components of the complex value CPLX. Extract the
2882 real part if IMAG_P is false, and the imaginary part if it's true. */
2883
2884 static rtx
2885 read_complex_part (rtx cplx, bool imag_p)
2886 {
2887 enum machine_mode cmode, imode;
2888 unsigned ibitsize;
2889
2890 if (GET_CODE (cplx) == CONCAT)
2891 return XEXP (cplx, imag_p);
2892
2893 cmode = GET_MODE (cplx);
2894 imode = GET_MODE_INNER (cmode);
2895 ibitsize = GET_MODE_BITSIZE (imode);
2896
2897 /* Special case reads from complex constants that got spilled to memory. */
2898 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2899 {
2900 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2901 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2902 {
2903 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2904 if (CONSTANT_CLASS_P (part))
2905 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2906 }
2907 }
2908
2909 /* For MEMs simplify_gen_subreg may generate an invalid new address
2910 because, e.g., the original address is considered mode-dependent
2911 by the target, which restricts simplify_subreg from invoking
2912 adjust_address_nv. Instead of preparing fallback support for an
2913 invalid address, we call adjust_address_nv directly. */
2914 if (MEM_P (cplx))
2915 return adjust_address_nv (cplx, imode,
2916 imag_p ? GET_MODE_SIZE (imode) : 0);
2917
2918 /* If the sub-object is at least word sized, then we know that subregging
2919 will work. This special case is important, since extract_bit_field
2920 wants to operate on integer modes, and there's rarely an OImode to
2921 correspond to TCmode. */
2922 if (ibitsize >= BITS_PER_WORD
2923 /* For hard regs we have exact predicates. Assume we can split
2924 the original object if it spans an even number of hard regs.
2925 This special case is important for SCmode on 64-bit platforms
2926 where the natural size of floating-point regs is 32-bit. */
2927 || (REG_P (cplx)
2928 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2929 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2930 {
2931 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2932 imag_p ? GET_MODE_SIZE (imode) : 0);
2933 if (ret)
2934 return ret;
2935 else
2936 /* simplify_gen_subreg may fail for sub-word MEMs. */
2937 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2938 }
2939
2940 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2941 true, NULL_RTX, imode, imode);
2942 }
2943 \f
2944 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2945 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2946 represented in NEW_MODE. If FORCE is true, this will never happen, as
2947 we'll force-create a SUBREG if needed. */
2948
2949 static rtx
2950 emit_move_change_mode (enum machine_mode new_mode,
2951 enum machine_mode old_mode, rtx x, bool force)
2952 {
2953 rtx ret;
2954
2955 if (push_operand (x, GET_MODE (x)))
2956 {
2957 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2958 MEM_COPY_ATTRIBUTES (ret, x);
2959 }
2960 else if (MEM_P (x))
2961 {
2962 /* We don't have to worry about changing the address since the
2963 size in bytes is supposed to be the same. */
2964 if (reload_in_progress)
2965 {
2966 /* Copy the MEM to change the mode and move any
2967 substitutions from the old MEM to the new one. */
2968 ret = adjust_address_nv (x, new_mode, 0);
2969 copy_replacements (x, ret);
2970 }
2971 else
2972 ret = adjust_address (x, new_mode, 0);
2973 }
2974 else
2975 {
2976 /* Note that we do want simplify_subreg's behavior of validating
2977 that the new mode is ok for a hard register. If we were to use
2978 simplify_gen_subreg, we would create the subreg, but would
2979 probably run into the target not being able to implement it. */
2980 /* Except, of course, when FORCE is true, when this is exactly what
2981 we want. Which is needed for CCmodes on some targets. */
2982 if (force)
2983 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2984 else
2985 ret = simplify_subreg (new_mode, x, old_mode, 0);
2986 }
2987
2988 return ret;
2989 }
2990
2991 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2992 an integer mode of the same size as MODE. Returns the instruction
2993 emitted, or NULL if such a move could not be generated. */
2994
2995 static rtx
2996 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
2997 {
2998 enum machine_mode imode;
2999 enum insn_code code;
3000
3001 /* There must exist a mode of the exact size we require. */
3002 imode = int_mode_for_mode (mode);
3003 if (imode == BLKmode)
3004 return NULL_RTX;
3005
3006 /* The target must support moves in this mode. */
3007 code = optab_handler (mov_optab, imode)->insn_code;
3008 if (code == CODE_FOR_nothing)
3009 return NULL_RTX;
3010
3011 x = emit_move_change_mode (imode, mode, x, force);
3012 if (x == NULL_RTX)
3013 return NULL_RTX;
3014 y = emit_move_change_mode (imode, mode, y, force);
3015 if (y == NULL_RTX)
3016 return NULL_RTX;
3017 return emit_insn (GEN_FCN (code) (x, y));
3018 }
3019
3020 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3021 Return an equivalent MEM that does not use an auto-increment. */
3022
3023 static rtx
3024 emit_move_resolve_push (enum machine_mode mode, rtx x)
3025 {
3026 enum rtx_code code = GET_CODE (XEXP (x, 0));
3027 HOST_WIDE_INT adjust;
3028 rtx temp;
3029
3030 adjust = GET_MODE_SIZE (mode);
3031 #ifdef PUSH_ROUNDING
3032 adjust = PUSH_ROUNDING (adjust);
3033 #endif
3034 if (code == PRE_DEC || code == POST_DEC)
3035 adjust = -adjust;
3036 else if (code == PRE_MODIFY || code == POST_MODIFY)
3037 {
3038 rtx expr = XEXP (XEXP (x, 0), 1);
3039 HOST_WIDE_INT val;
3040
3041 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3042 gcc_assert (GET_CODE (XEXP (expr, 1)) == CONST_INT);
3043 val = INTVAL (XEXP (expr, 1));
3044 if (GET_CODE (expr) == MINUS)
3045 val = -val;
3046 gcc_assert (adjust == val || adjust == -val);
3047 adjust = val;
3048 }
3049
3050 /* Do not use anti_adjust_stack, since we don't want to update
3051 stack_pointer_delta. */
3052 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3053 GEN_INT (adjust), stack_pointer_rtx,
3054 0, OPTAB_LIB_WIDEN);
3055 if (temp != stack_pointer_rtx)
3056 emit_move_insn (stack_pointer_rtx, temp);
3057
3058 switch (code)
3059 {
3060 case PRE_INC:
3061 case PRE_DEC:
3062 case PRE_MODIFY:
3063 temp = stack_pointer_rtx;
3064 break;
3065 case POST_INC:
3066 case POST_DEC:
3067 case POST_MODIFY:
3068 temp = plus_constant (stack_pointer_rtx, -adjust);
3069 break;
3070 default:
3071 gcc_unreachable ();
3072 }
3073
3074 return replace_equiv_address (x, temp);
3075 }
3076
3077 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3078 X is known to satisfy push_operand, and MODE is known to be complex.
3079 Returns the last instruction emitted. */
3080
3081 rtx
3082 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3083 {
3084 enum machine_mode submode = GET_MODE_INNER (mode);
3085 bool imag_first;
3086
3087 #ifdef PUSH_ROUNDING
3088 unsigned int submodesize = GET_MODE_SIZE (submode);
3089
3090 /* In case we output to the stack, but the size is smaller than the
3091 machine can push exactly, we need to use move instructions. */
3092 if (PUSH_ROUNDING (submodesize) != submodesize)
3093 {
3094 x = emit_move_resolve_push (mode, x);
3095 return emit_move_insn (x, y);
3096 }
3097 #endif
3098
3099 /* Note that the real part always precedes the imag part in memory
3100 regardless of machine's endianness. */
3101 switch (GET_CODE (XEXP (x, 0)))
3102 {
3103 case PRE_DEC:
3104 case POST_DEC:
3105 imag_first = true;
3106 break;
3107 case PRE_INC:
3108 case POST_INC:
3109 imag_first = false;
3110 break;
3111 default:
3112 gcc_unreachable ();
3113 }
3114
3115 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3116 read_complex_part (y, imag_first));
3117 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3118 read_complex_part (y, !imag_first));
3119 }
3120
3121 /* A subroutine of emit_move_complex. Perform the move from Y to X
3122 via two moves of the parts. Returns the last instruction emitted. */
3123
3124 rtx
3125 emit_move_complex_parts (rtx x, rtx y)
3126 {
3127 /* Show the output dies here. This is necessary for SUBREGs
3128 of pseudos since we cannot track their lifetimes correctly;
3129 hard regs shouldn't appear here except as return values. */
3130 if (!reload_completed && !reload_in_progress
3131 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3132 emit_clobber (x);
3133
3134 write_complex_part (x, read_complex_part (y, false), false);
3135 write_complex_part (x, read_complex_part (y, true), true);
3136
3137 return get_last_insn ();
3138 }
3139
3140 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3141 MODE is known to be complex. Returns the last instruction emitted. */
3142
3143 static rtx
3144 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3145 {
3146 bool try_int;
3147
3148 /* Need to take special care for pushes, to maintain proper ordering
3149 of the data, and possibly extra padding. */
3150 if (push_operand (x, mode))
3151 return emit_move_complex_push (mode, x, y);
3152
3153 /* See if we can coerce the target into moving both values at once. */
3154
3155 /* Move floating point as parts. */
3156 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3157 && optab_handler (mov_optab, GET_MODE_INNER (mode))->insn_code != CODE_FOR_nothing)
3158 try_int = false;
3159 /* Not possible if the values are inherently not adjacent. */
3160 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3161 try_int = false;
3162 /* Is possible if both are registers (or subregs of registers). */
3163 else if (register_operand (x, mode) && register_operand (y, mode))
3164 try_int = true;
3165 /* If one of the operands is a memory, and alignment constraints
3166 are friendly enough, we may be able to do combined memory operations.
3167 We do not attempt this if Y is a constant because that combination is
3168 usually better with the by-parts thing below. */
3169 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3170 && (!STRICT_ALIGNMENT
3171 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3172 try_int = true;
3173 else
3174 try_int = false;
3175
3176 if (try_int)
3177 {
3178 rtx ret;
3179
3180 /* For memory to memory moves, optimal behavior can be had with the
3181 existing block move logic. */
3182 if (MEM_P (x) && MEM_P (y))
3183 {
3184 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3185 BLOCK_OP_NO_LIBCALL);
3186 return get_last_insn ();
3187 }
3188
3189 ret = emit_move_via_integer (mode, x, y, true);
3190 if (ret)
3191 return ret;
3192 }
3193
3194 return emit_move_complex_parts (x, y);
3195 }
3196
3197 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3198 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3199
3200 static rtx
3201 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3202 {
3203 rtx ret;
3204
3205 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3206 if (mode != CCmode)
3207 {
3208 enum insn_code code = optab_handler (mov_optab, CCmode)->insn_code;
3209 if (code != CODE_FOR_nothing)
3210 {
3211 x = emit_move_change_mode (CCmode, mode, x, true);
3212 y = emit_move_change_mode (CCmode, mode, y, true);
3213 return emit_insn (GEN_FCN (code) (x, y));
3214 }
3215 }
3216
3217 /* Otherwise, find the MODE_INT mode of the same width. */
3218 ret = emit_move_via_integer (mode, x, y, false);
3219 gcc_assert (ret != NULL);
3220 return ret;
3221 }
3222
3223 /* Return true if word I of OP lies entirely in the
3224 undefined bits of a paradoxical subreg. */
3225
3226 static bool
3227 undefined_operand_subword_p (const_rtx op, int i)
3228 {
3229 enum machine_mode innermode, innermostmode;
3230 int offset;
3231 if (GET_CODE (op) != SUBREG)
3232 return false;
3233 innermode = GET_MODE (op);
3234 innermostmode = GET_MODE (SUBREG_REG (op));
3235 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3236 /* The SUBREG_BYTE represents offset, as if the value were stored in
3237 memory, except for a paradoxical subreg where we define
3238 SUBREG_BYTE to be 0; undo this exception as in
3239 simplify_subreg. */
3240 if (SUBREG_BYTE (op) == 0
3241 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3242 {
3243 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3244 if (WORDS_BIG_ENDIAN)
3245 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3246 if (BYTES_BIG_ENDIAN)
3247 offset += difference % UNITS_PER_WORD;
3248 }
3249 if (offset >= GET_MODE_SIZE (innermostmode)
3250 || offset <= -GET_MODE_SIZE (word_mode))
3251 return true;
3252 return false;
3253 }
3254
3255 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3256 MODE is any multi-word or full-word mode that lacks a move_insn
3257 pattern. Note that you will get better code if you define such
3258 patterns, even if they must turn into multiple assembler instructions. */
3259
3260 static rtx
3261 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3262 {
3263 rtx last_insn = 0;
3264 rtx seq, inner;
3265 bool need_clobber;
3266 int i;
3267
3268 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3269
3270 /* If X is a push on the stack, do the push now and replace
3271 X with a reference to the stack pointer. */
3272 if (push_operand (x, mode))
3273 x = emit_move_resolve_push (mode, x);
3274
3275 /* If we are in reload, see if either operand is a MEM whose address
3276 is scheduled for replacement. */
3277 if (reload_in_progress && MEM_P (x)
3278 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3279 x = replace_equiv_address_nv (x, inner);
3280 if (reload_in_progress && MEM_P (y)
3281 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3282 y = replace_equiv_address_nv (y, inner);
3283
3284 start_sequence ();
3285
3286 need_clobber = false;
3287 for (i = 0;
3288 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3289 i++)
3290 {
3291 rtx xpart = operand_subword (x, i, 1, mode);
3292 rtx ypart;
3293
3294 /* Do not generate code for a move if it would come entirely
3295 from the undefined bits of a paradoxical subreg. */
3296 if (undefined_operand_subword_p (y, i))
3297 continue;
3298
3299 ypart = operand_subword (y, i, 1, mode);
3300
3301 /* If we can't get a part of Y, put Y into memory if it is a
3302 constant. Otherwise, force it into a register. Then we must
3303 be able to get a part of Y. */
3304 if (ypart == 0 && CONSTANT_P (y))
3305 {
3306 y = use_anchored_address (force_const_mem (mode, y));
3307 ypart = operand_subword (y, i, 1, mode);
3308 }
3309 else if (ypart == 0)
3310 ypart = operand_subword_force (y, i, mode);
3311
3312 gcc_assert (xpart && ypart);
3313
3314 need_clobber |= (GET_CODE (xpart) == SUBREG);
3315
3316 last_insn = emit_move_insn (xpart, ypart);
3317 }
3318
3319 seq = get_insns ();
3320 end_sequence ();
3321
3322 /* Show the output dies here. This is necessary for SUBREGs
3323 of pseudos since we cannot track their lifetimes correctly;
3324 hard regs shouldn't appear here except as return values.
3325 We never want to emit such a clobber after reload. */
3326 if (x != y
3327 && ! (reload_in_progress || reload_completed)
3328 && need_clobber != 0)
3329 emit_clobber (x);
3330
3331 emit_insn (seq);
3332
3333 return last_insn;
3334 }
3335
3336 /* Low level part of emit_move_insn.
3337 Called just like emit_move_insn, but assumes X and Y
3338 are basically valid. */
3339
3340 rtx
3341 emit_move_insn_1 (rtx x, rtx y)
3342 {
3343 enum machine_mode mode = GET_MODE (x);
3344 enum insn_code code;
3345
3346 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3347
3348 code = optab_handler (mov_optab, mode)->insn_code;
3349 if (code != CODE_FOR_nothing)
3350 return emit_insn (GEN_FCN (code) (x, y));
3351
3352 /* Expand complex moves by moving real part and imag part. */
3353 if (COMPLEX_MODE_P (mode))
3354 return emit_move_complex (mode, x, y);
3355
3356 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3357 || ALL_FIXED_POINT_MODE_P (mode))
3358 {
3359 rtx result = emit_move_via_integer (mode, x, y, true);
3360
3361 /* If we can't find an integer mode, use multi words. */
3362 if (result)
3363 return result;
3364 else
3365 return emit_move_multi_word (mode, x, y);
3366 }
3367
3368 if (GET_MODE_CLASS (mode) == MODE_CC)
3369 return emit_move_ccmode (mode, x, y);
3370
3371 /* Try using a move pattern for the corresponding integer mode. This is
3372 only safe when simplify_subreg can convert MODE constants into integer
3373 constants. At present, it can only do this reliably if the value
3374 fits within a HOST_WIDE_INT. */
3375 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3376 {
3377 rtx ret = emit_move_via_integer (mode, x, y, false);
3378 if (ret)
3379 return ret;
3380 }
3381
3382 return emit_move_multi_word (mode, x, y);
3383 }
3384
3385 /* Generate code to copy Y into X.
3386 Both Y and X must have the same mode, except that
3387 Y can be a constant with VOIDmode.
3388 This mode cannot be BLKmode; use emit_block_move for that.
3389
3390 Return the last instruction emitted. */
3391
3392 rtx
3393 emit_move_insn (rtx x, rtx y)
3394 {
3395 enum machine_mode mode = GET_MODE (x);
3396 rtx y_cst = NULL_RTX;
3397 rtx last_insn, set;
3398
3399 gcc_assert (mode != BLKmode
3400 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3401
3402 if (CONSTANT_P (y))
3403 {
3404 if (optimize
3405 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3406 && (last_insn = compress_float_constant (x, y)))
3407 return last_insn;
3408
3409 y_cst = y;
3410
3411 if (!LEGITIMATE_CONSTANT_P (y))
3412 {
3413 y = force_const_mem (mode, y);
3414
3415 /* If the target's cannot_force_const_mem prevented the spill,
3416 assume that the target's move expanders will also take care
3417 of the non-legitimate constant. */
3418 if (!y)
3419 y = y_cst;
3420 else
3421 y = use_anchored_address (y);
3422 }
3423 }
3424
3425 /* If X or Y are memory references, verify that their addresses are valid
3426 for the machine. */
3427 if (MEM_P (x)
3428 && (! memory_address_p (GET_MODE (x), XEXP (x, 0))
3429 && ! push_operand (x, GET_MODE (x))))
3430 x = validize_mem (x);
3431
3432 if (MEM_P (y)
3433 && ! memory_address_p (GET_MODE (y), XEXP (y, 0)))
3434 y = validize_mem (y);
3435
3436 gcc_assert (mode != BLKmode);
3437
3438 last_insn = emit_move_insn_1 (x, y);
3439
3440 if (y_cst && REG_P (x)
3441 && (set = single_set (last_insn)) != NULL_RTX
3442 && SET_DEST (set) == x
3443 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3444 set_unique_reg_note (last_insn, REG_EQUAL, y_cst);
3445
3446 return last_insn;
3447 }
3448
3449 /* If Y is representable exactly in a narrower mode, and the target can
3450 perform the extension directly from constant or memory, then emit the
3451 move as an extension. */
3452
3453 static rtx
3454 compress_float_constant (rtx x, rtx y)
3455 {
3456 enum machine_mode dstmode = GET_MODE (x);
3457 enum machine_mode orig_srcmode = GET_MODE (y);
3458 enum machine_mode srcmode;
3459 REAL_VALUE_TYPE r;
3460 int oldcost, newcost;
3461 bool speed = optimize_insn_for_speed_p ();
3462
3463 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3464
3465 if (LEGITIMATE_CONSTANT_P (y))
3466 oldcost = rtx_cost (y, SET, speed);
3467 else
3468 oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed);
3469
3470 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3471 srcmode != orig_srcmode;
3472 srcmode = GET_MODE_WIDER_MODE (srcmode))
3473 {
3474 enum insn_code ic;
3475 rtx trunc_y, last_insn;
3476
3477 /* Skip if the target can't extend this way. */
3478 ic = can_extend_p (dstmode, srcmode, 0);
3479 if (ic == CODE_FOR_nothing)
3480 continue;
3481
3482 /* Skip if the narrowed value isn't exact. */
3483 if (! exact_real_truncate (srcmode, &r))
3484 continue;
3485
3486 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3487
3488 if (LEGITIMATE_CONSTANT_P (trunc_y))
3489 {
3490 /* Skip if the target needs extra instructions to perform
3491 the extension. */
3492 if (! (*insn_data[ic].operand[1].predicate) (trunc_y, srcmode))
3493 continue;
3494 /* This is valid, but may not be cheaper than the original. */
3495 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3496 if (oldcost < newcost)
3497 continue;
3498 }
3499 else if (float_extend_from_mem[dstmode][srcmode])
3500 {
3501 trunc_y = force_const_mem (srcmode, trunc_y);
3502 /* This is valid, but may not be cheaper than the original. */
3503 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3504 if (oldcost < newcost)
3505 continue;
3506 trunc_y = validize_mem (trunc_y);
3507 }
3508 else
3509 continue;
3510
3511 /* For CSE's benefit, force the compressed constant pool entry
3512 into a new pseudo. This constant may be used in different modes,
3513 and if not, combine will put things back together for us. */
3514 trunc_y = force_reg (srcmode, trunc_y);
3515 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3516 last_insn = get_last_insn ();
3517
3518 if (REG_P (x))
3519 set_unique_reg_note (last_insn, REG_EQUAL, y);
3520
3521 return last_insn;
3522 }
3523
3524 return NULL_RTX;
3525 }
3526 \f
3527 /* Pushing data onto the stack. */
3528
3529 /* Push a block of length SIZE (perhaps variable)
3530 and return an rtx to address the beginning of the block.
3531 The value may be virtual_outgoing_args_rtx.
3532
3533 EXTRA is the number of bytes of padding to push in addition to SIZE.
3534 BELOW nonzero means this padding comes at low addresses;
3535 otherwise, the padding comes at high addresses. */
3536
3537 rtx
3538 push_block (rtx size, int extra, int below)
3539 {
3540 rtx temp;
3541
3542 size = convert_modes (Pmode, ptr_mode, size, 1);
3543 if (CONSTANT_P (size))
3544 anti_adjust_stack (plus_constant (size, extra));
3545 else if (REG_P (size) && extra == 0)
3546 anti_adjust_stack (size);
3547 else
3548 {
3549 temp = copy_to_mode_reg (Pmode, size);
3550 if (extra != 0)
3551 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3552 temp, 0, OPTAB_LIB_WIDEN);
3553 anti_adjust_stack (temp);
3554 }
3555
3556 #ifndef STACK_GROWS_DOWNWARD
3557 if (0)
3558 #else
3559 if (1)
3560 #endif
3561 {
3562 temp = virtual_outgoing_args_rtx;
3563 if (extra != 0 && below)
3564 temp = plus_constant (temp, extra);
3565 }
3566 else
3567 {
3568 if (GET_CODE (size) == CONST_INT)
3569 temp = plus_constant (virtual_outgoing_args_rtx,
3570 -INTVAL (size) - (below ? 0 : extra));
3571 else if (extra != 0 && !below)
3572 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3573 negate_rtx (Pmode, plus_constant (size, extra)));
3574 else
3575 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3576 negate_rtx (Pmode, size));
3577 }
3578
3579 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3580 }
3581
3582 #ifdef PUSH_ROUNDING
3583
3584 /* Emit single push insn. */
3585
3586 static void
3587 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3588 {
3589 rtx dest_addr;
3590 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3591 rtx dest;
3592 enum insn_code icode;
3593 insn_operand_predicate_fn pred;
3594
3595 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3596 /* If there is push pattern, use it. Otherwise try old way of throwing
3597 MEM representing push operation to move expander. */
3598 icode = optab_handler (push_optab, mode)->insn_code;
3599 if (icode != CODE_FOR_nothing)
3600 {
3601 if (((pred = insn_data[(int) icode].operand[0].predicate)
3602 && !((*pred) (x, mode))))
3603 x = force_reg (mode, x);
3604 emit_insn (GEN_FCN (icode) (x));
3605 return;
3606 }
3607 if (GET_MODE_SIZE (mode) == rounded_size)
3608 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3609 /* If we are to pad downward, adjust the stack pointer first and
3610 then store X into the stack location using an offset. This is
3611 because emit_move_insn does not know how to pad; it does not have
3612 access to type. */
3613 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3614 {
3615 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3616 HOST_WIDE_INT offset;
3617
3618 emit_move_insn (stack_pointer_rtx,
3619 expand_binop (Pmode,
3620 #ifdef STACK_GROWS_DOWNWARD
3621 sub_optab,
3622 #else
3623 add_optab,
3624 #endif
3625 stack_pointer_rtx,
3626 GEN_INT (rounded_size),
3627 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3628
3629 offset = (HOST_WIDE_INT) padding_size;
3630 #ifdef STACK_GROWS_DOWNWARD
3631 if (STACK_PUSH_CODE == POST_DEC)
3632 /* We have already decremented the stack pointer, so get the
3633 previous value. */
3634 offset += (HOST_WIDE_INT) rounded_size;
3635 #else
3636 if (STACK_PUSH_CODE == POST_INC)
3637 /* We have already incremented the stack pointer, so get the
3638 previous value. */
3639 offset -= (HOST_WIDE_INT) rounded_size;
3640 #endif
3641 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3642 }
3643 else
3644 {
3645 #ifdef STACK_GROWS_DOWNWARD
3646 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3647 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3648 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3649 #else
3650 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3651 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3652 GEN_INT (rounded_size));
3653 #endif
3654 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3655 }
3656
3657 dest = gen_rtx_MEM (mode, dest_addr);
3658
3659 if (type != 0)
3660 {
3661 set_mem_attributes (dest, type, 1);
3662
3663 if (flag_optimize_sibling_calls)
3664 /* Function incoming arguments may overlap with sibling call
3665 outgoing arguments and we cannot allow reordering of reads
3666 from function arguments with stores to outgoing arguments
3667 of sibling calls. */
3668 set_mem_alias_set (dest, 0);
3669 }
3670 emit_move_insn (dest, x);
3671 }
3672 #endif
3673
3674 /* Generate code to push X onto the stack, assuming it has mode MODE and
3675 type TYPE.
3676 MODE is redundant except when X is a CONST_INT (since they don't
3677 carry mode info).
3678 SIZE is an rtx for the size of data to be copied (in bytes),
3679 needed only if X is BLKmode.
3680
3681 ALIGN (in bits) is maximum alignment we can assume.
3682
3683 If PARTIAL and REG are both nonzero, then copy that many of the first
3684 bytes of X into registers starting with REG, and push the rest of X.
3685 The amount of space pushed is decreased by PARTIAL bytes.
3686 REG must be a hard register in this case.
3687 If REG is zero but PARTIAL is not, take any all others actions for an
3688 argument partially in registers, but do not actually load any
3689 registers.
3690
3691 EXTRA is the amount in bytes of extra space to leave next to this arg.
3692 This is ignored if an argument block has already been allocated.
3693
3694 On a machine that lacks real push insns, ARGS_ADDR is the address of
3695 the bottom of the argument block for this call. We use indexing off there
3696 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3697 argument block has not been preallocated.
3698
3699 ARGS_SO_FAR is the size of args previously pushed for this call.
3700
3701 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3702 for arguments passed in registers. If nonzero, it will be the number
3703 of bytes required. */
3704
3705 void
3706 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3707 unsigned int align, int partial, rtx reg, int extra,
3708 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3709 rtx alignment_pad)
3710 {
3711 rtx xinner;
3712 enum direction stack_direction
3713 #ifdef STACK_GROWS_DOWNWARD
3714 = downward;
3715 #else
3716 = upward;
3717 #endif
3718
3719 /* Decide where to pad the argument: `downward' for below,
3720 `upward' for above, or `none' for don't pad it.
3721 Default is below for small data on big-endian machines; else above. */
3722 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3723
3724 /* Invert direction if stack is post-decrement.
3725 FIXME: why? */
3726 if (STACK_PUSH_CODE == POST_DEC)
3727 if (where_pad != none)
3728 where_pad = (where_pad == downward ? upward : downward);
3729
3730 xinner = x;
3731
3732 if (mode == BLKmode
3733 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3734 {
3735 /* Copy a block into the stack, entirely or partially. */
3736
3737 rtx temp;
3738 int used;
3739 int offset;
3740 int skip;
3741
3742 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3743 used = partial - offset;
3744
3745 if (mode != BLKmode)
3746 {
3747 /* A value is to be stored in an insufficiently aligned
3748 stack slot; copy via a suitably aligned slot if
3749 necessary. */
3750 size = GEN_INT (GET_MODE_SIZE (mode));
3751 if (!MEM_P (xinner))
3752 {
3753 temp = assign_temp (type, 0, 1, 1);
3754 emit_move_insn (temp, xinner);
3755 xinner = temp;
3756 }
3757 }
3758
3759 gcc_assert (size);
3760
3761 /* USED is now the # of bytes we need not copy to the stack
3762 because registers will take care of them. */
3763
3764 if (partial != 0)
3765 xinner = adjust_address (xinner, BLKmode, used);
3766
3767 /* If the partial register-part of the arg counts in its stack size,
3768 skip the part of stack space corresponding to the registers.
3769 Otherwise, start copying to the beginning of the stack space,
3770 by setting SKIP to 0. */
3771 skip = (reg_parm_stack_space == 0) ? 0 : used;
3772
3773 #ifdef PUSH_ROUNDING
3774 /* Do it with several push insns if that doesn't take lots of insns
3775 and if there is no difficulty with push insns that skip bytes
3776 on the stack for alignment purposes. */
3777 if (args_addr == 0
3778 && PUSH_ARGS
3779 && GET_CODE (size) == CONST_INT
3780 && skip == 0
3781 && MEM_ALIGN (xinner) >= align
3782 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3783 /* Here we avoid the case of a structure whose weak alignment
3784 forces many pushes of a small amount of data,
3785 and such small pushes do rounding that causes trouble. */
3786 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3787 || align >= BIGGEST_ALIGNMENT
3788 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3789 == (align / BITS_PER_UNIT)))
3790 && PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3791 {
3792 /* Push padding now if padding above and stack grows down,
3793 or if padding below and stack grows up.
3794 But if space already allocated, this has already been done. */
3795 if (extra && args_addr == 0
3796 && where_pad != none && where_pad != stack_direction)
3797 anti_adjust_stack (GEN_INT (extra));
3798
3799 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3800 }
3801 else
3802 #endif /* PUSH_ROUNDING */
3803 {
3804 rtx target;
3805
3806 /* Otherwise make space on the stack and copy the data
3807 to the address of that space. */
3808
3809 /* Deduct words put into registers from the size we must copy. */
3810 if (partial != 0)
3811 {
3812 if (GET_CODE (size) == CONST_INT)
3813 size = GEN_INT (INTVAL (size) - used);
3814 else
3815 size = expand_binop (GET_MODE (size), sub_optab, size,
3816 GEN_INT (used), NULL_RTX, 0,
3817 OPTAB_LIB_WIDEN);
3818 }
3819
3820 /* Get the address of the stack space.
3821 In this case, we do not deal with EXTRA separately.
3822 A single stack adjust will do. */
3823 if (! args_addr)
3824 {
3825 temp = push_block (size, extra, where_pad == downward);
3826 extra = 0;
3827 }
3828 else if (GET_CODE (args_so_far) == CONST_INT)
3829 temp = memory_address (BLKmode,
3830 plus_constant (args_addr,
3831 skip + INTVAL (args_so_far)));
3832 else
3833 temp = memory_address (BLKmode,
3834 plus_constant (gen_rtx_PLUS (Pmode,
3835 args_addr,
3836 args_so_far),
3837 skip));
3838
3839 if (!ACCUMULATE_OUTGOING_ARGS)
3840 {
3841 /* If the source is referenced relative to the stack pointer,
3842 copy it to another register to stabilize it. We do not need
3843 to do this if we know that we won't be changing sp. */
3844
3845 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3846 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3847 temp = copy_to_reg (temp);
3848 }
3849
3850 target = gen_rtx_MEM (BLKmode, temp);
3851
3852 /* We do *not* set_mem_attributes here, because incoming arguments
3853 may overlap with sibling call outgoing arguments and we cannot
3854 allow reordering of reads from function arguments with stores
3855 to outgoing arguments of sibling calls. We do, however, want
3856 to record the alignment of the stack slot. */
3857 /* ALIGN may well be better aligned than TYPE, e.g. due to
3858 PARM_BOUNDARY. Assume the caller isn't lying. */
3859 set_mem_align (target, align);
3860
3861 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3862 }
3863 }
3864 else if (partial > 0)
3865 {
3866 /* Scalar partly in registers. */
3867
3868 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3869 int i;
3870 int not_stack;
3871 /* # bytes of start of argument
3872 that we must make space for but need not store. */
3873 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3874 int args_offset = INTVAL (args_so_far);
3875 int skip;
3876
3877 /* Push padding now if padding above and stack grows down,
3878 or if padding below and stack grows up.
3879 But if space already allocated, this has already been done. */
3880 if (extra && args_addr == 0
3881 && where_pad != none && where_pad != stack_direction)
3882 anti_adjust_stack (GEN_INT (extra));
3883
3884 /* If we make space by pushing it, we might as well push
3885 the real data. Otherwise, we can leave OFFSET nonzero
3886 and leave the space uninitialized. */
3887 if (args_addr == 0)
3888 offset = 0;
3889
3890 /* Now NOT_STACK gets the number of words that we don't need to
3891 allocate on the stack. Convert OFFSET to words too. */
3892 not_stack = (partial - offset) / UNITS_PER_WORD;
3893 offset /= UNITS_PER_WORD;
3894
3895 /* If the partial register-part of the arg counts in its stack size,
3896 skip the part of stack space corresponding to the registers.
3897 Otherwise, start copying to the beginning of the stack space,
3898 by setting SKIP to 0. */
3899 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
3900
3901 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
3902 x = validize_mem (force_const_mem (mode, x));
3903
3904 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
3905 SUBREGs of such registers are not allowed. */
3906 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3907 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
3908 x = copy_to_reg (x);
3909
3910 /* Loop over all the words allocated on the stack for this arg. */
3911 /* We can do it by words, because any scalar bigger than a word
3912 has a size a multiple of a word. */
3913 #ifndef PUSH_ARGS_REVERSED
3914 for (i = not_stack; i < size; i++)
3915 #else
3916 for (i = size - 1; i >= not_stack; i--)
3917 #endif
3918 if (i >= not_stack + offset)
3919 emit_push_insn (operand_subword_force (x, i, mode),
3920 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
3921 0, args_addr,
3922 GEN_INT (args_offset + ((i - not_stack + skip)
3923 * UNITS_PER_WORD)),
3924 reg_parm_stack_space, alignment_pad);
3925 }
3926 else
3927 {
3928 rtx addr;
3929 rtx dest;
3930
3931 /* Push padding now if padding above and stack grows down,
3932 or if padding below and stack grows up.
3933 But if space already allocated, this has already been done. */
3934 if (extra && args_addr == 0
3935 && where_pad != none && where_pad != stack_direction)
3936 anti_adjust_stack (GEN_INT (extra));
3937
3938 #ifdef PUSH_ROUNDING
3939 if (args_addr == 0 && PUSH_ARGS)
3940 emit_single_push_insn (mode, x, type);
3941 else
3942 #endif
3943 {
3944 if (GET_CODE (args_so_far) == CONST_INT)
3945 addr
3946 = memory_address (mode,
3947 plus_constant (args_addr,
3948 INTVAL (args_so_far)));
3949 else
3950 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
3951 args_so_far));
3952 dest = gen_rtx_MEM (mode, addr);
3953
3954 /* We do *not* set_mem_attributes here, because incoming arguments
3955 may overlap with sibling call outgoing arguments and we cannot
3956 allow reordering of reads from function arguments with stores
3957 to outgoing arguments of sibling calls. We do, however, want
3958 to record the alignment of the stack slot. */
3959 /* ALIGN may well be better aligned than TYPE, e.g. due to
3960 PARM_BOUNDARY. Assume the caller isn't lying. */
3961 set_mem_align (dest, align);
3962
3963 emit_move_insn (dest, x);
3964 }
3965 }
3966
3967 /* If part should go in registers, copy that part
3968 into the appropriate registers. Do this now, at the end,
3969 since mem-to-mem copies above may do function calls. */
3970 if (partial > 0 && reg != 0)
3971 {
3972 /* Handle calls that pass values in multiple non-contiguous locations.
3973 The Irix 6 ABI has examples of this. */
3974 if (GET_CODE (reg) == PARALLEL)
3975 emit_group_load (reg, x, type, -1);
3976 else
3977 {
3978 gcc_assert (partial % UNITS_PER_WORD == 0);
3979 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
3980 }
3981 }
3982
3983 if (extra && args_addr == 0 && where_pad == stack_direction)
3984 anti_adjust_stack (GEN_INT (extra));
3985
3986 if (alignment_pad && args_addr == 0)
3987 anti_adjust_stack (alignment_pad);
3988 }
3989 \f
3990 /* Return X if X can be used as a subtarget in a sequence of arithmetic
3991 operations. */
3992
3993 static rtx
3994 get_subtarget (rtx x)
3995 {
3996 return (optimize
3997 || x == 0
3998 /* Only registers can be subtargets. */
3999 || !REG_P (x)
4000 /* Don't use hard regs to avoid extending their life. */
4001 || REGNO (x) < FIRST_PSEUDO_REGISTER
4002 ? 0 : x);
4003 }
4004
4005 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4006 FIELD is a bitfield. Returns true if the optimization was successful,
4007 and there's nothing else to do. */
4008
4009 static bool
4010 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4011 unsigned HOST_WIDE_INT bitpos,
4012 enum machine_mode mode1, rtx str_rtx,
4013 tree to, tree src)
4014 {
4015 enum machine_mode str_mode = GET_MODE (str_rtx);
4016 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4017 tree op0, op1;
4018 rtx value, result;
4019 optab binop;
4020
4021 if (mode1 != VOIDmode
4022 || bitsize >= BITS_PER_WORD
4023 || str_bitsize > BITS_PER_WORD
4024 || TREE_SIDE_EFFECTS (to)
4025 || TREE_THIS_VOLATILE (to))
4026 return false;
4027
4028 STRIP_NOPS (src);
4029 if (!BINARY_CLASS_P (src)
4030 || TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4031 return false;
4032
4033 op0 = TREE_OPERAND (src, 0);
4034 op1 = TREE_OPERAND (src, 1);
4035 STRIP_NOPS (op0);
4036
4037 if (!operand_equal_p (to, op0, 0))
4038 return false;
4039
4040 if (MEM_P (str_rtx))
4041 {
4042 unsigned HOST_WIDE_INT offset1;
4043
4044 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4045 str_mode = word_mode;
4046 str_mode = get_best_mode (bitsize, bitpos,
4047 MEM_ALIGN (str_rtx), str_mode, 0);
4048 if (str_mode == VOIDmode)
4049 return false;
4050 str_bitsize = GET_MODE_BITSIZE (str_mode);
4051
4052 offset1 = bitpos;
4053 bitpos %= str_bitsize;
4054 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4055 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4056 }
4057 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4058 return false;
4059
4060 /* If the bit field covers the whole REG/MEM, store_field
4061 will likely generate better code. */
4062 if (bitsize >= str_bitsize)
4063 return false;
4064
4065 /* We can't handle fields split across multiple entities. */
4066 if (bitpos + bitsize > str_bitsize)
4067 return false;
4068
4069 if (BYTES_BIG_ENDIAN)
4070 bitpos = str_bitsize - bitpos - bitsize;
4071
4072 switch (TREE_CODE (src))
4073 {
4074 case PLUS_EXPR:
4075 case MINUS_EXPR:
4076 /* For now, just optimize the case of the topmost bitfield
4077 where we don't need to do any masking and also
4078 1 bit bitfields where xor can be used.
4079 We might win by one instruction for the other bitfields
4080 too if insv/extv instructions aren't used, so that
4081 can be added later. */
4082 if (bitpos + bitsize != str_bitsize
4083 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4084 break;
4085
4086 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4087 value = convert_modes (str_mode,
4088 TYPE_MODE (TREE_TYPE (op1)), value,
4089 TYPE_UNSIGNED (TREE_TYPE (op1)));
4090
4091 /* We may be accessing data outside the field, which means
4092 we can alias adjacent data. */
4093 if (MEM_P (str_rtx))
4094 {
4095 str_rtx = shallow_copy_rtx (str_rtx);
4096 set_mem_alias_set (str_rtx, 0);
4097 set_mem_expr (str_rtx, 0);
4098 }
4099
4100 binop = TREE_CODE (src) == PLUS_EXPR ? add_optab : sub_optab;
4101 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4102 {
4103 value = expand_and (str_mode, value, const1_rtx, NULL);
4104 binop = xor_optab;
4105 }
4106 value = expand_shift (LSHIFT_EXPR, str_mode, value,
4107 build_int_cst (NULL_TREE, bitpos),
4108 NULL_RTX, 1);
4109 result = expand_binop (str_mode, binop, str_rtx,
4110 value, str_rtx, 1, OPTAB_WIDEN);
4111 if (result != str_rtx)
4112 emit_move_insn (str_rtx, result);
4113 return true;
4114
4115 case BIT_IOR_EXPR:
4116 case BIT_XOR_EXPR:
4117 if (TREE_CODE (op1) != INTEGER_CST)
4118 break;
4119 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), EXPAND_NORMAL);
4120 value = convert_modes (GET_MODE (str_rtx),
4121 TYPE_MODE (TREE_TYPE (op1)), value,
4122 TYPE_UNSIGNED (TREE_TYPE (op1)));
4123
4124 /* We may be accessing data outside the field, which means
4125 we can alias adjacent data. */
4126 if (MEM_P (str_rtx))
4127 {
4128 str_rtx = shallow_copy_rtx (str_rtx);
4129 set_mem_alias_set (str_rtx, 0);
4130 set_mem_expr (str_rtx, 0);
4131 }
4132
4133 binop = TREE_CODE (src) == BIT_IOR_EXPR ? ior_optab : xor_optab;
4134 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
4135 {
4136 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
4137 - 1);
4138 value = expand_and (GET_MODE (str_rtx), value, mask,
4139 NULL_RTX);
4140 }
4141 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
4142 build_int_cst (NULL_TREE, bitpos),
4143 NULL_RTX, 1);
4144 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
4145 value, str_rtx, 1, OPTAB_WIDEN);
4146 if (result != str_rtx)
4147 emit_move_insn (str_rtx, result);
4148 return true;
4149
4150 default:
4151 break;
4152 }
4153
4154 return false;
4155 }
4156
4157
4158 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4159 is true, try generating a nontemporal store. */
4160
4161 void
4162 expand_assignment (tree to, tree from, bool nontemporal)
4163 {
4164 rtx to_rtx = 0;
4165 rtx result;
4166
4167 /* Don't crash if the lhs of the assignment was erroneous. */
4168 if (TREE_CODE (to) == ERROR_MARK)
4169 {
4170 result = expand_normal (from);
4171 return;
4172 }
4173
4174 /* Optimize away no-op moves without side-effects. */
4175 if (operand_equal_p (to, from, 0))
4176 return;
4177
4178 /* Assignment of a structure component needs special treatment
4179 if the structure component's rtx is not simply a MEM.
4180 Assignment of an array element at a constant index, and assignment of
4181 an array element in an unaligned packed structure field, has the same
4182 problem. */
4183 if (handled_component_p (to)
4184 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4185 {
4186 enum machine_mode mode1;
4187 HOST_WIDE_INT bitsize, bitpos;
4188 tree offset;
4189 int unsignedp;
4190 int volatilep = 0;
4191 tree tem;
4192
4193 push_temp_slots ();
4194 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4195 &unsignedp, &volatilep, true);
4196
4197 /* If we are going to use store_bit_field and extract_bit_field,
4198 make sure to_rtx will be safe for multiple use. */
4199
4200 to_rtx = expand_normal (tem);
4201
4202 if (offset != 0)
4203 {
4204 rtx offset_rtx;
4205
4206 if (!MEM_P (to_rtx))
4207 {
4208 /* We can get constant negative offsets into arrays with broken
4209 user code. Translate this to a trap instead of ICEing. */
4210 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4211 expand_builtin_trap ();
4212 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4213 }
4214
4215 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4216 #ifdef POINTERS_EXTEND_UNSIGNED
4217 if (GET_MODE (offset_rtx) != Pmode)
4218 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
4219 #else
4220 if (GET_MODE (offset_rtx) != ptr_mode)
4221 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
4222 #endif
4223
4224 /* A constant address in TO_RTX can have VOIDmode, we must not try
4225 to call force_reg for that case. Avoid that case. */
4226 if (MEM_P (to_rtx)
4227 && GET_MODE (to_rtx) == BLKmode
4228 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4229 && bitsize > 0
4230 && (bitpos % bitsize) == 0
4231 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4232 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4233 {
4234 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4235 bitpos = 0;
4236 }
4237
4238 to_rtx = offset_address (to_rtx, offset_rtx,
4239 highest_pow2_factor_for_target (to,
4240 offset));
4241 }
4242
4243 /* Handle expand_expr of a complex value returning a CONCAT. */
4244 if (GET_CODE (to_rtx) == CONCAT)
4245 {
4246 if (TREE_CODE (TREE_TYPE (from)) == COMPLEX_TYPE)
4247 {
4248 gcc_assert (bitpos == 0);
4249 result = store_expr (from, to_rtx, false, nontemporal);
4250 }
4251 else
4252 {
4253 gcc_assert (bitpos == 0 || bitpos == GET_MODE_BITSIZE (mode1));
4254 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4255 nontemporal);
4256 }
4257 }
4258 else
4259 {
4260 if (MEM_P (to_rtx))
4261 {
4262 /* If the field is at offset zero, we could have been given the
4263 DECL_RTX of the parent struct. Don't munge it. */
4264 to_rtx = shallow_copy_rtx (to_rtx);
4265
4266 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4267
4268 /* Deal with volatile and readonly fields. The former is only
4269 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4270 if (volatilep)
4271 MEM_VOLATILE_P (to_rtx) = 1;
4272 if (component_uses_parent_alias_set (to))
4273 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4274 }
4275
4276 if (optimize_bitfield_assignment_op (bitsize, bitpos, mode1,
4277 to_rtx, to, from))
4278 result = NULL;
4279 else
4280 result = store_field (to_rtx, bitsize, bitpos, mode1, from,
4281 TREE_TYPE (tem), get_alias_set (to),
4282 nontemporal);
4283 }
4284
4285 if (result)
4286 preserve_temp_slots (result);
4287 free_temp_slots ();
4288 pop_temp_slots ();
4289 return;
4290 }
4291
4292 /* If the rhs is a function call and its value is not an aggregate,
4293 call the function before we start to compute the lhs.
4294 This is needed for correct code for cases such as
4295 val = setjmp (buf) on machines where reference to val
4296 requires loading up part of an address in a separate insn.
4297
4298 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4299 since it might be a promoted variable where the zero- or sign- extension
4300 needs to be done. Handling this in the normal way is safe because no
4301 computation is done before the call. */
4302 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4303 && COMPLETE_TYPE_P (TREE_TYPE (from))
4304 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4305 && ! ((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
4306 && REG_P (DECL_RTL (to))))
4307 {
4308 rtx value;
4309
4310 push_temp_slots ();
4311 value = expand_normal (from);
4312 if (to_rtx == 0)
4313 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4314
4315 /* Handle calls that return values in multiple non-contiguous locations.
4316 The Irix 6 ABI has examples of this. */
4317 if (GET_CODE (to_rtx) == PARALLEL)
4318 emit_group_load (to_rtx, value, TREE_TYPE (from),
4319 int_size_in_bytes (TREE_TYPE (from)));
4320 else if (GET_MODE (to_rtx) == BLKmode)
4321 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4322 else
4323 {
4324 if (POINTER_TYPE_P (TREE_TYPE (to)))
4325 value = convert_memory_address (GET_MODE (to_rtx), value);
4326 emit_move_insn (to_rtx, value);
4327 }
4328 preserve_temp_slots (to_rtx);
4329 free_temp_slots ();
4330 pop_temp_slots ();
4331 return;
4332 }
4333
4334 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
4335 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
4336
4337 if (to_rtx == 0)
4338 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4339
4340 /* Don't move directly into a return register. */
4341 if (TREE_CODE (to) == RESULT_DECL
4342 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4343 {
4344 rtx temp;
4345
4346 push_temp_slots ();
4347 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4348
4349 if (GET_CODE (to_rtx) == PARALLEL)
4350 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4351 int_size_in_bytes (TREE_TYPE (from)));
4352 else
4353 emit_move_insn (to_rtx, temp);
4354
4355 preserve_temp_slots (to_rtx);
4356 free_temp_slots ();
4357 pop_temp_slots ();
4358 return;
4359 }
4360
4361 /* In case we are returning the contents of an object which overlaps
4362 the place the value is being stored, use a safe function when copying
4363 a value through a pointer into a structure value return block. */
4364 if (TREE_CODE (to) == RESULT_DECL && TREE_CODE (from) == INDIRECT_REF
4365 && cfun->returns_struct
4366 && !cfun->returns_pcc_struct)
4367 {
4368 rtx from_rtx, size;
4369
4370 push_temp_slots ();
4371 size = expr_size (from);
4372 from_rtx = expand_normal (from);
4373
4374 emit_library_call (memmove_libfunc, LCT_NORMAL,
4375 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4376 XEXP (from_rtx, 0), Pmode,
4377 convert_to_mode (TYPE_MODE (sizetype),
4378 size, TYPE_UNSIGNED (sizetype)),
4379 TYPE_MODE (sizetype));
4380
4381 preserve_temp_slots (to_rtx);
4382 free_temp_slots ();
4383 pop_temp_slots ();
4384 return;
4385 }
4386
4387 /* Compute FROM and store the value in the rtx we got. */
4388
4389 push_temp_slots ();
4390 result = store_expr (from, to_rtx, 0, nontemporal);
4391 preserve_temp_slots (result);
4392 free_temp_slots ();
4393 pop_temp_slots ();
4394 return;
4395 }
4396
4397 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
4398 succeeded, false otherwise. */
4399
4400 static bool
4401 emit_storent_insn (rtx to, rtx from)
4402 {
4403 enum machine_mode mode = GET_MODE (to), imode;
4404 enum insn_code code = optab_handler (storent_optab, mode)->insn_code;
4405 rtx pattern;
4406
4407 if (code == CODE_FOR_nothing)
4408 return false;
4409
4410 imode = insn_data[code].operand[0].mode;
4411 if (!insn_data[code].operand[0].predicate (to, imode))
4412 return false;
4413
4414 imode = insn_data[code].operand[1].mode;
4415 if (!insn_data[code].operand[1].predicate (from, imode))
4416 {
4417 from = copy_to_mode_reg (imode, from);
4418 if (!insn_data[code].operand[1].predicate (from, imode))
4419 return false;
4420 }
4421
4422 pattern = GEN_FCN (code) (to, from);
4423 if (pattern == NULL_RTX)
4424 return false;
4425
4426 emit_insn (pattern);
4427 return true;
4428 }
4429
4430 /* Generate code for computing expression EXP,
4431 and storing the value into TARGET.
4432
4433 If the mode is BLKmode then we may return TARGET itself.
4434 It turns out that in BLKmode it doesn't cause a problem.
4435 because C has no operators that could combine two different
4436 assignments into the same BLKmode object with different values
4437 with no sequence point. Will other languages need this to
4438 be more thorough?
4439
4440 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4441 stack, and block moves may need to be treated specially.
4442
4443 If NONTEMPORAL is true, try using a nontemporal store instruction. */
4444
4445 rtx
4446 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
4447 {
4448 rtx temp;
4449 rtx alt_rtl = NULL_RTX;
4450 int dont_return_target = 0;
4451
4452 if (VOID_TYPE_P (TREE_TYPE (exp)))
4453 {
4454 /* C++ can generate ?: expressions with a throw expression in one
4455 branch and an rvalue in the other. Here, we resolve attempts to
4456 store the throw expression's nonexistent result. */
4457 gcc_assert (!call_param_p);
4458 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
4459 return NULL_RTX;
4460 }
4461 if (TREE_CODE (exp) == COMPOUND_EXPR)
4462 {
4463 /* Perform first part of compound expression, then assign from second
4464 part. */
4465 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4466 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4467 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4468 nontemporal);
4469 }
4470 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4471 {
4472 /* For conditional expression, get safe form of the target. Then
4473 test the condition, doing the appropriate assignment on either
4474 side. This avoids the creation of unnecessary temporaries.
4475 For non-BLKmode, it is more efficient not to do this. */
4476
4477 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4478
4479 do_pending_stack_adjust ();
4480 NO_DEFER_POP;
4481 jumpifnot (TREE_OPERAND (exp, 0), lab1);
4482 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
4483 nontemporal);
4484 emit_jump_insn (gen_jump (lab2));
4485 emit_barrier ();
4486 emit_label (lab1);
4487 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
4488 nontemporal);
4489 emit_label (lab2);
4490 OK_DEFER_POP;
4491
4492 return NULL_RTX;
4493 }
4494 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4495 /* If this is a scalar in a register that is stored in a wider mode
4496 than the declared mode, compute the result into its declared mode
4497 and then convert to the wider mode. Our value is the computed
4498 expression. */
4499 {
4500 rtx inner_target = 0;
4501
4502 /* We can do the conversion inside EXP, which will often result
4503 in some optimizations. Do the conversion in two steps: first
4504 change the signedness, if needed, then the extend. But don't
4505 do this if the type of EXP is a subtype of something else
4506 since then the conversion might involve more than just
4507 converting modes. */
4508 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4509 && TREE_TYPE (TREE_TYPE (exp)) == 0
4510 && GET_MODE_PRECISION (GET_MODE (target))
4511 == TYPE_PRECISION (TREE_TYPE (exp)))
4512 {
4513 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4514 != SUBREG_PROMOTED_UNSIGNED_P (target))
4515 {
4516 /* Some types, e.g. Fortran's logical*4, won't have a signed
4517 version, so use the mode instead. */
4518 tree ntype
4519 = (signed_or_unsigned_type_for
4520 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
4521 if (ntype == NULL)
4522 ntype = lang_hooks.types.type_for_mode
4523 (TYPE_MODE (TREE_TYPE (exp)),
4524 SUBREG_PROMOTED_UNSIGNED_P (target));
4525
4526 exp = fold_convert (ntype, exp);
4527 }
4528
4529 exp = fold_convert (lang_hooks.types.type_for_mode
4530 (GET_MODE (SUBREG_REG (target)),
4531 SUBREG_PROMOTED_UNSIGNED_P (target)),
4532 exp);
4533
4534 inner_target = SUBREG_REG (target);
4535 }
4536
4537 temp = expand_expr (exp, inner_target, VOIDmode,
4538 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4539
4540 /* If TEMP is a VOIDmode constant, use convert_modes to make
4541 sure that we properly convert it. */
4542 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4543 {
4544 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4545 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4546 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4547 GET_MODE (target), temp,
4548 SUBREG_PROMOTED_UNSIGNED_P (target));
4549 }
4550
4551 convert_move (SUBREG_REG (target), temp,
4552 SUBREG_PROMOTED_UNSIGNED_P (target));
4553
4554 return NULL_RTX;
4555 }
4556 else if (TREE_CODE (exp) == STRING_CST
4557 && !nontemporal && !call_param_p
4558 && TREE_STRING_LENGTH (exp) > 0
4559 && TYPE_MODE (TREE_TYPE (exp)) == BLKmode)
4560 {
4561 /* Optimize initialization of an array with a STRING_CST. */
4562 HOST_WIDE_INT exp_len, str_copy_len;
4563 rtx dest_mem;
4564
4565 exp_len = int_expr_size (exp);
4566 if (exp_len <= 0)
4567 goto normal_expr;
4568
4569 str_copy_len = strlen (TREE_STRING_POINTER (exp));
4570 if (str_copy_len < TREE_STRING_LENGTH (exp) - 1)
4571 goto normal_expr;
4572
4573 str_copy_len = TREE_STRING_LENGTH (exp);
4574 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0)
4575 {
4576 str_copy_len += STORE_MAX_PIECES - 1;
4577 str_copy_len &= ~(STORE_MAX_PIECES - 1);
4578 }
4579 str_copy_len = MIN (str_copy_len, exp_len);
4580 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
4581 CONST_CAST(char *, TREE_STRING_POINTER (exp)),
4582 MEM_ALIGN (target), false))
4583 goto normal_expr;
4584
4585 dest_mem = target;
4586
4587 dest_mem = store_by_pieces (dest_mem,
4588 str_copy_len, builtin_strncpy_read_str,
4589 CONST_CAST(char *, TREE_STRING_POINTER (exp)),
4590 MEM_ALIGN (target), false,
4591 exp_len > str_copy_len ? 1 : 0);
4592 if (exp_len > str_copy_len)
4593 clear_storage (adjust_address (dest_mem, BLKmode, 0),
4594 GEN_INT (exp_len - str_copy_len),
4595 BLOCK_OP_NORMAL);
4596 return NULL_RTX;
4597 }
4598 else
4599 {
4600 rtx tmp_target;
4601
4602 normal_expr:
4603 /* If we want to use a nontemporal store, force the value to
4604 register first. */
4605 tmp_target = nontemporal ? NULL_RTX : target;
4606 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
4607 (call_param_p
4608 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
4609 &alt_rtl);
4610 /* Return TARGET if it's a specified hardware register.
4611 If TARGET is a volatile mem ref, either return TARGET
4612 or return a reg copied *from* TARGET; ANSI requires this.
4613
4614 Otherwise, if TEMP is not TARGET, return TEMP
4615 if it is constant (for efficiency),
4616 or if we really want the correct value. */
4617 if (!(target && REG_P (target)
4618 && REGNO (target) < FIRST_PSEUDO_REGISTER)
4619 && !(MEM_P (target) && MEM_VOLATILE_P (target))
4620 && ! rtx_equal_p (temp, target)
4621 && CONSTANT_P (temp))
4622 dont_return_target = 1;
4623 }
4624
4625 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
4626 the same as that of TARGET, adjust the constant. This is needed, for
4627 example, in case it is a CONST_DOUBLE and we want only a word-sized
4628 value. */
4629 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
4630 && TREE_CODE (exp) != ERROR_MARK
4631 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
4632 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4633 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
4634
4635 /* If value was not generated in the target, store it there.
4636 Convert the value to TARGET's type first if necessary and emit the
4637 pending incrementations that have been queued when expanding EXP.
4638 Note that we cannot emit the whole queue blindly because this will
4639 effectively disable the POST_INC optimization later.
4640
4641 If TEMP and TARGET compare equal according to rtx_equal_p, but
4642 one or both of them are volatile memory refs, we have to distinguish
4643 two cases:
4644 - expand_expr has used TARGET. In this case, we must not generate
4645 another copy. This can be detected by TARGET being equal according
4646 to == .
4647 - expand_expr has not used TARGET - that means that the source just
4648 happens to have the same RTX form. Since temp will have been created
4649 by expand_expr, it will compare unequal according to == .
4650 We must generate a copy in this case, to reach the correct number
4651 of volatile memory references. */
4652
4653 if ((! rtx_equal_p (temp, target)
4654 || (temp != target && (side_effects_p (temp)
4655 || side_effects_p (target))))
4656 && TREE_CODE (exp) != ERROR_MARK
4657 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
4658 but TARGET is not valid memory reference, TEMP will differ
4659 from TARGET although it is really the same location. */
4660 && !(alt_rtl && rtx_equal_p (alt_rtl, target))
4661 /* If there's nothing to copy, don't bother. Don't call
4662 expr_size unless necessary, because some front-ends (C++)
4663 expr_size-hook must not be given objects that are not
4664 supposed to be bit-copied or bit-initialized. */
4665 && expr_size (exp) != const0_rtx)
4666 {
4667 if (GET_MODE (temp) != GET_MODE (target)
4668 && GET_MODE (temp) != VOIDmode)
4669 {
4670 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
4671 if (dont_return_target)
4672 {
4673 /* In this case, we will return TEMP,
4674 so make sure it has the proper mode.
4675 But don't forget to store the value into TARGET. */
4676 temp = convert_to_mode (GET_MODE (target), temp, unsignedp);
4677 emit_move_insn (target, temp);
4678 }
4679 else if (GET_MODE (target) == BLKmode
4680 || GET_MODE (temp) == BLKmode)
4681 emit_block_move (target, temp, expr_size (exp),
4682 (call_param_p
4683 ? BLOCK_OP_CALL_PARM
4684 : BLOCK_OP_NORMAL));
4685 else
4686 convert_move (target, temp, unsignedp);
4687 }
4688
4689 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
4690 {
4691 /* Handle copying a string constant into an array. The string
4692 constant may be shorter than the array. So copy just the string's
4693 actual length, and clear the rest. First get the size of the data
4694 type of the string, which is actually the size of the target. */
4695 rtx size = expr_size (exp);
4696
4697 if (GET_CODE (size) == CONST_INT
4698 && INTVAL (size) < TREE_STRING_LENGTH (exp))
4699 emit_block_move (target, temp, size,
4700 (call_param_p
4701 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4702 else
4703 {
4704 /* Compute the size of the data to copy from the string. */
4705 tree copy_size
4706 = size_binop (MIN_EXPR,
4707 make_tree (sizetype, size),
4708 size_int (TREE_STRING_LENGTH (exp)));
4709 rtx copy_size_rtx
4710 = expand_expr (copy_size, NULL_RTX, VOIDmode,
4711 (call_param_p
4712 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
4713 rtx label = 0;
4714
4715 /* Copy that much. */
4716 copy_size_rtx = convert_to_mode (ptr_mode, copy_size_rtx,
4717 TYPE_UNSIGNED (sizetype));
4718 emit_block_move (target, temp, copy_size_rtx,
4719 (call_param_p
4720 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4721
4722 /* Figure out how much is left in TARGET that we have to clear.
4723 Do all calculations in ptr_mode. */
4724 if (GET_CODE (copy_size_rtx) == CONST_INT)
4725 {
4726 size = plus_constant (size, -INTVAL (copy_size_rtx));
4727 target = adjust_address (target, BLKmode,
4728 INTVAL (copy_size_rtx));
4729 }
4730 else
4731 {
4732 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
4733 copy_size_rtx, NULL_RTX, 0,
4734 OPTAB_LIB_WIDEN);
4735
4736 #ifdef POINTERS_EXTEND_UNSIGNED
4737 if (GET_MODE (copy_size_rtx) != Pmode)
4738 copy_size_rtx = convert_to_mode (Pmode, copy_size_rtx,
4739 TYPE_UNSIGNED (sizetype));
4740 #endif
4741
4742 target = offset_address (target, copy_size_rtx,
4743 highest_pow2_factor (copy_size));
4744 label = gen_label_rtx ();
4745 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
4746 GET_MODE (size), 0, label);
4747 }
4748
4749 if (size != const0_rtx)
4750 clear_storage (target, size, BLOCK_OP_NORMAL);
4751
4752 if (label)
4753 emit_label (label);
4754 }
4755 }
4756 /* Handle calls that return values in multiple non-contiguous locations.
4757 The Irix 6 ABI has examples of this. */
4758 else if (GET_CODE (target) == PARALLEL)
4759 emit_group_load (target, temp, TREE_TYPE (exp),
4760 int_size_in_bytes (TREE_TYPE (exp)));
4761 else if (GET_MODE (temp) == BLKmode)
4762 emit_block_move (target, temp, expr_size (exp),
4763 (call_param_p
4764 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4765 else if (nontemporal
4766 && emit_storent_insn (target, temp))
4767 /* If we managed to emit a nontemporal store, there is nothing else to
4768 do. */
4769 ;
4770 else
4771 {
4772 temp = force_operand (temp, target);
4773 if (temp != target)
4774 emit_move_insn (target, temp);
4775 }
4776 }
4777
4778 return NULL_RTX;
4779 }
4780 \f
4781 /* Helper for categorize_ctor_elements. Identical interface. */
4782
4783 static bool
4784 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
4785 HOST_WIDE_INT *p_elt_count,
4786 bool *p_must_clear)
4787 {
4788 unsigned HOST_WIDE_INT idx;
4789 HOST_WIDE_INT nz_elts, elt_count;
4790 tree value, purpose;
4791
4792 /* Whether CTOR is a valid constant initializer, in accordance with what
4793 initializer_constant_valid_p does. If inferred from the constructor
4794 elements, true until proven otherwise. */
4795 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
4796 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
4797
4798 nz_elts = 0;
4799 elt_count = 0;
4800
4801 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
4802 {
4803 HOST_WIDE_INT mult;
4804
4805 mult = 1;
4806 if (TREE_CODE (purpose) == RANGE_EXPR)
4807 {
4808 tree lo_index = TREE_OPERAND (purpose, 0);
4809 tree hi_index = TREE_OPERAND (purpose, 1);
4810
4811 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
4812 mult = (tree_low_cst (hi_index, 1)
4813 - tree_low_cst (lo_index, 1) + 1);
4814 }
4815
4816 switch (TREE_CODE (value))
4817 {
4818 case CONSTRUCTOR:
4819 {
4820 HOST_WIDE_INT nz = 0, ic = 0;
4821
4822 bool const_elt_p
4823 = categorize_ctor_elements_1 (value, &nz, &ic, p_must_clear);
4824
4825 nz_elts += mult * nz;
4826 elt_count += mult * ic;
4827
4828 if (const_from_elts_p && const_p)
4829 const_p = const_elt_p;
4830 }
4831 break;
4832
4833 case INTEGER_CST:
4834 case REAL_CST:
4835 case FIXED_CST:
4836 if (!initializer_zerop (value))
4837 nz_elts += mult;
4838 elt_count += mult;
4839 break;
4840
4841 case STRING_CST:
4842 nz_elts += mult * TREE_STRING_LENGTH (value);
4843 elt_count += mult * TREE_STRING_LENGTH (value);
4844 break;
4845
4846 case COMPLEX_CST:
4847 if (!initializer_zerop (TREE_REALPART (value)))
4848 nz_elts += mult;
4849 if (!initializer_zerop (TREE_IMAGPART (value)))
4850 nz_elts += mult;
4851 elt_count += mult;
4852 break;
4853
4854 case VECTOR_CST:
4855 {
4856 tree v;
4857 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
4858 {
4859 if (!initializer_zerop (TREE_VALUE (v)))
4860 nz_elts += mult;
4861 elt_count += mult;
4862 }
4863 }
4864 break;
4865
4866 default:
4867 nz_elts += mult;
4868 elt_count += mult;
4869
4870 if (const_from_elts_p && const_p)
4871 const_p = initializer_constant_valid_p (value, TREE_TYPE (value))
4872 != NULL_TREE;
4873 break;
4874 }
4875 }
4876
4877 if (!*p_must_clear
4878 && (TREE_CODE (TREE_TYPE (ctor)) == UNION_TYPE
4879 || TREE_CODE (TREE_TYPE (ctor)) == QUAL_UNION_TYPE))
4880 {
4881 tree init_sub_type;
4882 bool clear_this = true;
4883
4884 if (!VEC_empty (constructor_elt, CONSTRUCTOR_ELTS (ctor)))
4885 {
4886 /* We don't expect more than one element of the union to be
4887 initialized. Not sure what we should do otherwise... */
4888 gcc_assert (VEC_length (constructor_elt, CONSTRUCTOR_ELTS (ctor))
4889 == 1);
4890
4891 init_sub_type = TREE_TYPE (VEC_index (constructor_elt,
4892 CONSTRUCTOR_ELTS (ctor),
4893 0)->value);
4894
4895 /* ??? We could look at each element of the union, and find the
4896 largest element. Which would avoid comparing the size of the
4897 initialized element against any tail padding in the union.
4898 Doesn't seem worth the effort... */
4899 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (ctor)),
4900 TYPE_SIZE (init_sub_type)) == 1)
4901 {
4902 /* And now we have to find out if the element itself is fully
4903 constructed. E.g. for union { struct { int a, b; } s; } u
4904 = { .s = { .a = 1 } }. */
4905 if (elt_count == count_type_elements (init_sub_type, false))
4906 clear_this = false;
4907 }
4908 }
4909
4910 *p_must_clear = clear_this;
4911 }
4912
4913 *p_nz_elts += nz_elts;
4914 *p_elt_count += elt_count;
4915
4916 return const_p;
4917 }
4918
4919 /* Examine CTOR to discover:
4920 * how many scalar fields are set to nonzero values,
4921 and place it in *P_NZ_ELTS;
4922 * how many scalar fields in total are in CTOR,
4923 and place it in *P_ELT_COUNT.
4924 * if a type is a union, and the initializer from the constructor
4925 is not the largest element in the union, then set *p_must_clear.
4926
4927 Return whether or not CTOR is a valid static constant initializer, the same
4928 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
4929
4930 bool
4931 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
4932 HOST_WIDE_INT *p_elt_count,
4933 bool *p_must_clear)
4934 {
4935 *p_nz_elts = 0;
4936 *p_elt_count = 0;
4937 *p_must_clear = false;
4938
4939 return
4940 categorize_ctor_elements_1 (ctor, p_nz_elts, p_elt_count, p_must_clear);
4941 }
4942
4943 /* Count the number of scalars in TYPE. Return -1 on overflow or
4944 variable-sized. If ALLOW_FLEXARR is true, don't count flexible
4945 array member at the end of the structure. */
4946
4947 HOST_WIDE_INT
4948 count_type_elements (const_tree type, bool allow_flexarr)
4949 {
4950 const HOST_WIDE_INT max = ~((HOST_WIDE_INT)1 << (HOST_BITS_PER_WIDE_INT-1));
4951 switch (TREE_CODE (type))
4952 {
4953 case ARRAY_TYPE:
4954 {
4955 tree telts = array_type_nelts (type);
4956 if (telts && host_integerp (telts, 1))
4957 {
4958 HOST_WIDE_INT n = tree_low_cst (telts, 1) + 1;
4959 HOST_WIDE_INT m = count_type_elements (TREE_TYPE (type), false);
4960 if (n == 0)
4961 return 0;
4962 else if (max / n > m)
4963 return n * m;
4964 }
4965 return -1;
4966 }
4967
4968 case RECORD_TYPE:
4969 {
4970 HOST_WIDE_INT n = 0, t;
4971 tree f;
4972
4973 for (f = TYPE_FIELDS (type); f ; f = TREE_CHAIN (f))
4974 if (TREE_CODE (f) == FIELD_DECL)
4975 {
4976 t = count_type_elements (TREE_TYPE (f), false);
4977 if (t < 0)
4978 {
4979 /* Check for structures with flexible array member. */
4980 tree tf = TREE_TYPE (f);
4981 if (allow_flexarr
4982 && TREE_CHAIN (f) == NULL
4983 && TREE_CODE (tf) == ARRAY_TYPE
4984 && TYPE_DOMAIN (tf)
4985 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
4986 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
4987 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
4988 && int_size_in_bytes (type) >= 0)
4989 break;
4990
4991 return -1;
4992 }
4993 n += t;
4994 }
4995
4996 return n;
4997 }
4998
4999 case UNION_TYPE:
5000 case QUAL_UNION_TYPE:
5001 return -1;
5002
5003 case COMPLEX_TYPE:
5004 return 2;
5005
5006 case VECTOR_TYPE:
5007 return TYPE_VECTOR_SUBPARTS (type);
5008
5009 case INTEGER_TYPE:
5010 case REAL_TYPE:
5011 case FIXED_POINT_TYPE:
5012 case ENUMERAL_TYPE:
5013 case BOOLEAN_TYPE:
5014 case POINTER_TYPE:
5015 case OFFSET_TYPE:
5016 case REFERENCE_TYPE:
5017 return 1;
5018
5019 case VOID_TYPE:
5020 case METHOD_TYPE:
5021 case FUNCTION_TYPE:
5022 case LANG_TYPE:
5023 default:
5024 gcc_unreachable ();
5025 }
5026 }
5027
5028 /* Return 1 if EXP contains mostly (3/4) zeros. */
5029
5030 static int
5031 mostly_zeros_p (const_tree exp)
5032 {
5033 if (TREE_CODE (exp) == CONSTRUCTOR)
5034
5035 {
5036 HOST_WIDE_INT nz_elts, count, elts;
5037 bool must_clear;
5038
5039 categorize_ctor_elements (exp, &nz_elts, &count, &must_clear);
5040 if (must_clear)
5041 return 1;
5042
5043 elts = count_type_elements (TREE_TYPE (exp), false);
5044
5045 return nz_elts < elts / 4;
5046 }
5047
5048 return initializer_zerop (exp);
5049 }
5050
5051 /* Return 1 if EXP contains all zeros. */
5052
5053 static int
5054 all_zeros_p (const_tree exp)
5055 {
5056 if (TREE_CODE (exp) == CONSTRUCTOR)
5057
5058 {
5059 HOST_WIDE_INT nz_elts, count;
5060 bool must_clear;
5061
5062 categorize_ctor_elements (exp, &nz_elts, &count, &must_clear);
5063 return nz_elts == 0;
5064 }
5065
5066 return initializer_zerop (exp);
5067 }
5068 \f
5069 /* Helper function for store_constructor.
5070 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5071 TYPE is the type of the CONSTRUCTOR, not the element type.
5072 CLEARED is as for store_constructor.
5073 ALIAS_SET is the alias set to use for any stores.
5074
5075 This provides a recursive shortcut back to store_constructor when it isn't
5076 necessary to go through store_field. This is so that we can pass through
5077 the cleared field to let store_constructor know that we may not have to
5078 clear a substructure if the outer structure has already been cleared. */
5079
5080 static void
5081 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5082 HOST_WIDE_INT bitpos, enum machine_mode mode,
5083 tree exp, tree type, int cleared,
5084 alias_set_type alias_set)
5085 {
5086 if (TREE_CODE (exp) == CONSTRUCTOR
5087 /* We can only call store_constructor recursively if the size and
5088 bit position are on a byte boundary. */
5089 && bitpos % BITS_PER_UNIT == 0
5090 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5091 /* If we have a nonzero bitpos for a register target, then we just
5092 let store_field do the bitfield handling. This is unlikely to
5093 generate unnecessary clear instructions anyways. */
5094 && (bitpos == 0 || MEM_P (target)))
5095 {
5096 if (MEM_P (target))
5097 target
5098 = adjust_address (target,
5099 GET_MODE (target) == BLKmode
5100 || 0 != (bitpos
5101 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5102 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5103
5104
5105 /* Update the alias set, if required. */
5106 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5107 && MEM_ALIAS_SET (target) != 0)
5108 {
5109 target = copy_rtx (target);
5110 set_mem_alias_set (target, alias_set);
5111 }
5112
5113 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5114 }
5115 else
5116 store_field (target, bitsize, bitpos, mode, exp, type, alias_set, false);
5117 }
5118
5119 /* Store the value of constructor EXP into the rtx TARGET.
5120 TARGET is either a REG or a MEM; we know it cannot conflict, since
5121 safe_from_p has been called.
5122 CLEARED is true if TARGET is known to have been zero'd.
5123 SIZE is the number of bytes of TARGET we are allowed to modify: this
5124 may not be the same as the size of EXP if we are assigning to a field
5125 which has been packed to exclude padding bits. */
5126
5127 static void
5128 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5129 {
5130 tree type = TREE_TYPE (exp);
5131 #ifdef WORD_REGISTER_OPERATIONS
5132 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5133 #endif
5134
5135 switch (TREE_CODE (type))
5136 {
5137 case RECORD_TYPE:
5138 case UNION_TYPE:
5139 case QUAL_UNION_TYPE:
5140 {
5141 unsigned HOST_WIDE_INT idx;
5142 tree field, value;
5143
5144 /* If size is zero or the target is already cleared, do nothing. */
5145 if (size == 0 || cleared)
5146 cleared = 1;
5147 /* We either clear the aggregate or indicate the value is dead. */
5148 else if ((TREE_CODE (type) == UNION_TYPE
5149 || TREE_CODE (type) == QUAL_UNION_TYPE)
5150 && ! CONSTRUCTOR_ELTS (exp))
5151 /* If the constructor is empty, clear the union. */
5152 {
5153 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5154 cleared = 1;
5155 }
5156
5157 /* If we are building a static constructor into a register,
5158 set the initial value as zero so we can fold the value into
5159 a constant. But if more than one register is involved,
5160 this probably loses. */
5161 else if (REG_P (target) && TREE_STATIC (exp)
5162 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5163 {
5164 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5165 cleared = 1;
5166 }
5167
5168 /* If the constructor has fewer fields than the structure or
5169 if we are initializing the structure to mostly zeros, clear
5170 the whole structure first. Don't do this if TARGET is a
5171 register whose mode size isn't equal to SIZE since
5172 clear_storage can't handle this case. */
5173 else if (size > 0
5174 && (((int)VEC_length (constructor_elt, CONSTRUCTOR_ELTS (exp))
5175 != fields_length (type))
5176 || mostly_zeros_p (exp))
5177 && (!REG_P (target)
5178 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5179 == size)))
5180 {
5181 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5182 cleared = 1;
5183 }
5184
5185 if (REG_P (target) && !cleared)
5186 emit_clobber (target);
5187
5188 /* Store each element of the constructor into the
5189 corresponding field of TARGET. */
5190 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5191 {
5192 enum machine_mode mode;
5193 HOST_WIDE_INT bitsize;
5194 HOST_WIDE_INT bitpos = 0;
5195 tree offset;
5196 rtx to_rtx = target;
5197
5198 /* Just ignore missing fields. We cleared the whole
5199 structure, above, if any fields are missing. */
5200 if (field == 0)
5201 continue;
5202
5203 if (cleared && initializer_zerop (value))
5204 continue;
5205
5206 if (host_integerp (DECL_SIZE (field), 1))
5207 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5208 else
5209 bitsize = -1;
5210
5211 mode = DECL_MODE (field);
5212 if (DECL_BIT_FIELD (field))
5213 mode = VOIDmode;
5214
5215 offset = DECL_FIELD_OFFSET (field);
5216 if (host_integerp (offset, 0)
5217 && host_integerp (bit_position (field), 0))
5218 {
5219 bitpos = int_bit_position (field);
5220 offset = 0;
5221 }
5222 else
5223 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5224
5225 if (offset)
5226 {
5227 rtx offset_rtx;
5228
5229 offset
5230 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5231 make_tree (TREE_TYPE (exp),
5232 target));
5233
5234 offset_rtx = expand_normal (offset);
5235 gcc_assert (MEM_P (to_rtx));
5236
5237 #ifdef POINTERS_EXTEND_UNSIGNED
5238 if (GET_MODE (offset_rtx) != Pmode)
5239 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
5240 #else
5241 if (GET_MODE (offset_rtx) != ptr_mode)
5242 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
5243 #endif
5244
5245 to_rtx = offset_address (to_rtx, offset_rtx,
5246 highest_pow2_factor (offset));
5247 }
5248
5249 #ifdef WORD_REGISTER_OPERATIONS
5250 /* If this initializes a field that is smaller than a
5251 word, at the start of a word, try to widen it to a full
5252 word. This special case allows us to output C++ member
5253 function initializations in a form that the optimizers
5254 can understand. */
5255 if (REG_P (target)
5256 && bitsize < BITS_PER_WORD
5257 && bitpos % BITS_PER_WORD == 0
5258 && GET_MODE_CLASS (mode) == MODE_INT
5259 && TREE_CODE (value) == INTEGER_CST
5260 && exp_size >= 0
5261 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5262 {
5263 tree type = TREE_TYPE (value);
5264
5265 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5266 {
5267 type = lang_hooks.types.type_for_size
5268 (BITS_PER_WORD, TYPE_UNSIGNED (type));
5269 value = fold_convert (type, value);
5270 }
5271
5272 if (BYTES_BIG_ENDIAN)
5273 value
5274 = fold_build2 (LSHIFT_EXPR, type, value,
5275 build_int_cst (type,
5276 BITS_PER_WORD - bitsize));
5277 bitsize = BITS_PER_WORD;
5278 mode = word_mode;
5279 }
5280 #endif
5281
5282 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5283 && DECL_NONADDRESSABLE_P (field))
5284 {
5285 to_rtx = copy_rtx (to_rtx);
5286 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5287 }
5288
5289 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5290 value, type, cleared,
5291 get_alias_set (TREE_TYPE (field)));
5292 }
5293 break;
5294 }
5295 case ARRAY_TYPE:
5296 {
5297 tree value, index;
5298 unsigned HOST_WIDE_INT i;
5299 int need_to_clear;
5300 tree domain;
5301 tree elttype = TREE_TYPE (type);
5302 int const_bounds_p;
5303 HOST_WIDE_INT minelt = 0;
5304 HOST_WIDE_INT maxelt = 0;
5305
5306 domain = TYPE_DOMAIN (type);
5307 const_bounds_p = (TYPE_MIN_VALUE (domain)
5308 && TYPE_MAX_VALUE (domain)
5309 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5310 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5311
5312 /* If we have constant bounds for the range of the type, get them. */
5313 if (const_bounds_p)
5314 {
5315 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5316 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5317 }
5318
5319 /* If the constructor has fewer elements than the array, clear
5320 the whole array first. Similarly if this is static
5321 constructor of a non-BLKmode object. */
5322 if (cleared)
5323 need_to_clear = 0;
5324 else if (REG_P (target) && TREE_STATIC (exp))
5325 need_to_clear = 1;
5326 else
5327 {
5328 unsigned HOST_WIDE_INT idx;
5329 tree index, value;
5330 HOST_WIDE_INT count = 0, zero_count = 0;
5331 need_to_clear = ! const_bounds_p;
5332
5333 /* This loop is a more accurate version of the loop in
5334 mostly_zeros_p (it handles RANGE_EXPR in an index). It
5335 is also needed to check for missing elements. */
5336 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
5337 {
5338 HOST_WIDE_INT this_node_count;
5339
5340 if (need_to_clear)
5341 break;
5342
5343 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5344 {
5345 tree lo_index = TREE_OPERAND (index, 0);
5346 tree hi_index = TREE_OPERAND (index, 1);
5347
5348 if (! host_integerp (lo_index, 1)
5349 || ! host_integerp (hi_index, 1))
5350 {
5351 need_to_clear = 1;
5352 break;
5353 }
5354
5355 this_node_count = (tree_low_cst (hi_index, 1)
5356 - tree_low_cst (lo_index, 1) + 1);
5357 }
5358 else
5359 this_node_count = 1;
5360
5361 count += this_node_count;
5362 if (mostly_zeros_p (value))
5363 zero_count += this_node_count;
5364 }
5365
5366 /* Clear the entire array first if there are any missing
5367 elements, or if the incidence of zero elements is >=
5368 75%. */
5369 if (! need_to_clear
5370 && (count < maxelt - minelt + 1
5371 || 4 * zero_count >= 3 * count))
5372 need_to_clear = 1;
5373 }
5374
5375 if (need_to_clear && size > 0)
5376 {
5377 if (REG_P (target))
5378 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5379 else
5380 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5381 cleared = 1;
5382 }
5383
5384 if (!cleared && REG_P (target))
5385 /* Inform later passes that the old value is dead. */
5386 emit_clobber (target);
5387
5388 /* Store each element of the constructor into the
5389 corresponding element of TARGET, determined by counting the
5390 elements. */
5391 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
5392 {
5393 enum machine_mode mode;
5394 HOST_WIDE_INT bitsize;
5395 HOST_WIDE_INT bitpos;
5396 int unsignedp;
5397 rtx xtarget = target;
5398
5399 if (cleared && initializer_zerop (value))
5400 continue;
5401
5402 unsignedp = TYPE_UNSIGNED (elttype);
5403 mode = TYPE_MODE (elttype);
5404 if (mode == BLKmode)
5405 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
5406 ? tree_low_cst (TYPE_SIZE (elttype), 1)
5407 : -1);
5408 else
5409 bitsize = GET_MODE_BITSIZE (mode);
5410
5411 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
5412 {
5413 tree lo_index = TREE_OPERAND (index, 0);
5414 tree hi_index = TREE_OPERAND (index, 1);
5415 rtx index_r, pos_rtx;
5416 HOST_WIDE_INT lo, hi, count;
5417 tree position;
5418
5419 /* If the range is constant and "small", unroll the loop. */
5420 if (const_bounds_p
5421 && host_integerp (lo_index, 0)
5422 && host_integerp (hi_index, 0)
5423 && (lo = tree_low_cst (lo_index, 0),
5424 hi = tree_low_cst (hi_index, 0),
5425 count = hi - lo + 1,
5426 (!MEM_P (target)
5427 || count <= 2
5428 || (host_integerp (TYPE_SIZE (elttype), 1)
5429 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
5430 <= 40 * 8)))))
5431 {
5432 lo -= minelt; hi -= minelt;
5433 for (; lo <= hi; lo++)
5434 {
5435 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
5436
5437 if (MEM_P (target)
5438 && !MEM_KEEP_ALIAS_SET_P (target)
5439 && TREE_CODE (type) == ARRAY_TYPE
5440 && TYPE_NONALIASED_COMPONENT (type))
5441 {
5442 target = copy_rtx (target);
5443 MEM_KEEP_ALIAS_SET_P (target) = 1;
5444 }
5445
5446 store_constructor_field
5447 (target, bitsize, bitpos, mode, value, type, cleared,
5448 get_alias_set (elttype));
5449 }
5450 }
5451 else
5452 {
5453 rtx loop_start = gen_label_rtx ();
5454 rtx loop_end = gen_label_rtx ();
5455 tree exit_cond;
5456
5457 expand_normal (hi_index);
5458 unsignedp = TYPE_UNSIGNED (domain);
5459
5460 index = build_decl (VAR_DECL, NULL_TREE, domain);
5461
5462 index_r
5463 = gen_reg_rtx (promote_mode (domain, DECL_MODE (index),
5464 &unsignedp, 0));
5465 SET_DECL_RTL (index, index_r);
5466 store_expr (lo_index, index_r, 0, false);
5467
5468 /* Build the head of the loop. */
5469 do_pending_stack_adjust ();
5470 emit_label (loop_start);
5471
5472 /* Assign value to element index. */
5473 position =
5474 fold_convert (ssizetype,
5475 fold_build2 (MINUS_EXPR,
5476 TREE_TYPE (index),
5477 index,
5478 TYPE_MIN_VALUE (domain)));
5479
5480 position =
5481 size_binop (MULT_EXPR, position,
5482 fold_convert (ssizetype,
5483 TYPE_SIZE_UNIT (elttype)));
5484
5485 pos_rtx = expand_normal (position);
5486 xtarget = offset_address (target, pos_rtx,
5487 highest_pow2_factor (position));
5488 xtarget = adjust_address (xtarget, mode, 0);
5489 if (TREE_CODE (value) == CONSTRUCTOR)
5490 store_constructor (value, xtarget, cleared,
5491 bitsize / BITS_PER_UNIT);
5492 else
5493 store_expr (value, xtarget, 0, false);
5494
5495 /* Generate a conditional jump to exit the loop. */
5496 exit_cond = build2 (LT_EXPR, integer_type_node,
5497 index, hi_index);
5498 jumpif (exit_cond, loop_end);
5499
5500 /* Update the loop counter, and jump to the head of
5501 the loop. */
5502 expand_assignment (index,
5503 build2 (PLUS_EXPR, TREE_TYPE (index),
5504 index, integer_one_node),
5505 false);
5506
5507 emit_jump (loop_start);
5508
5509 /* Build the end of the loop. */
5510 emit_label (loop_end);
5511 }
5512 }
5513 else if ((index != 0 && ! host_integerp (index, 0))
5514 || ! host_integerp (TYPE_SIZE (elttype), 1))
5515 {
5516 tree position;
5517
5518 if (index == 0)
5519 index = ssize_int (1);
5520
5521 if (minelt)
5522 index = fold_convert (ssizetype,
5523 fold_build2 (MINUS_EXPR,
5524 TREE_TYPE (index),
5525 index,
5526 TYPE_MIN_VALUE (domain)));
5527
5528 position =
5529 size_binop (MULT_EXPR, index,
5530 fold_convert (ssizetype,
5531 TYPE_SIZE_UNIT (elttype)));
5532 xtarget = offset_address (target,
5533 expand_normal (position),
5534 highest_pow2_factor (position));
5535 xtarget = adjust_address (xtarget, mode, 0);
5536 store_expr (value, xtarget, 0, false);
5537 }
5538 else
5539 {
5540 if (index != 0)
5541 bitpos = ((tree_low_cst (index, 0) - minelt)
5542 * tree_low_cst (TYPE_SIZE (elttype), 1));
5543 else
5544 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5545
5546 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5547 && TREE_CODE (type) == ARRAY_TYPE
5548 && TYPE_NONALIASED_COMPONENT (type))
5549 {
5550 target = copy_rtx (target);
5551 MEM_KEEP_ALIAS_SET_P (target) = 1;
5552 }
5553 store_constructor_field (target, bitsize, bitpos, mode, value,
5554 type, cleared, get_alias_set (elttype));
5555 }
5556 }
5557 break;
5558 }
5559
5560 case VECTOR_TYPE:
5561 {
5562 unsigned HOST_WIDE_INT idx;
5563 constructor_elt *ce;
5564 int i;
5565 int need_to_clear;
5566 int icode = 0;
5567 tree elttype = TREE_TYPE (type);
5568 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5569 enum machine_mode eltmode = TYPE_MODE (elttype);
5570 HOST_WIDE_INT bitsize;
5571 HOST_WIDE_INT bitpos;
5572 rtvec vector = NULL;
5573 unsigned n_elts;
5574
5575 gcc_assert (eltmode != BLKmode);
5576
5577 n_elts = TYPE_VECTOR_SUBPARTS (type);
5578 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5579 {
5580 enum machine_mode mode = GET_MODE (target);
5581
5582 icode = (int) optab_handler (vec_init_optab, mode)->insn_code;
5583 if (icode != CODE_FOR_nothing)
5584 {
5585 unsigned int i;
5586
5587 vector = rtvec_alloc (n_elts);
5588 for (i = 0; i < n_elts; i++)
5589 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
5590 }
5591 }
5592
5593 /* If the constructor has fewer elements than the vector,
5594 clear the whole array first. Similarly if this is static
5595 constructor of a non-BLKmode object. */
5596 if (cleared)
5597 need_to_clear = 0;
5598 else if (REG_P (target) && TREE_STATIC (exp))
5599 need_to_clear = 1;
5600 else
5601 {
5602 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
5603 tree value;
5604
5605 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
5606 {
5607 int n_elts_here = tree_low_cst
5608 (int_const_binop (TRUNC_DIV_EXPR,
5609 TYPE_SIZE (TREE_TYPE (value)),
5610 TYPE_SIZE (elttype), 0), 1);
5611
5612 count += n_elts_here;
5613 if (mostly_zeros_p (value))
5614 zero_count += n_elts_here;
5615 }
5616
5617 /* Clear the entire vector first if there are any missing elements,
5618 or if the incidence of zero elements is >= 75%. */
5619 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
5620 }
5621
5622 if (need_to_clear && size > 0 && !vector)
5623 {
5624 if (REG_P (target))
5625 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5626 else
5627 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5628 cleared = 1;
5629 }
5630
5631 /* Inform later passes that the old value is dead. */
5632 if (!cleared && !vector && REG_P (target))
5633 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5634
5635 /* Store each element of the constructor into the corresponding
5636 element of TARGET, determined by counting the elements. */
5637 for (idx = 0, i = 0;
5638 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
5639 idx++, i += bitsize / elt_size)
5640 {
5641 HOST_WIDE_INT eltpos;
5642 tree value = ce->value;
5643
5644 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
5645 if (cleared && initializer_zerop (value))
5646 continue;
5647
5648 if (ce->index)
5649 eltpos = tree_low_cst (ce->index, 1);
5650 else
5651 eltpos = i;
5652
5653 if (vector)
5654 {
5655 /* Vector CONSTRUCTORs should only be built from smaller
5656 vectors in the case of BLKmode vectors. */
5657 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
5658 RTVEC_ELT (vector, eltpos)
5659 = expand_normal (value);
5660 }
5661 else
5662 {
5663 enum machine_mode value_mode =
5664 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
5665 ? TYPE_MODE (TREE_TYPE (value))
5666 : eltmode;
5667 bitpos = eltpos * elt_size;
5668 store_constructor_field (target, bitsize, bitpos,
5669 value_mode, value, type,
5670 cleared, get_alias_set (elttype));
5671 }
5672 }
5673
5674 if (vector)
5675 emit_insn (GEN_FCN (icode)
5676 (target,
5677 gen_rtx_PARALLEL (GET_MODE (target), vector)));
5678 break;
5679 }
5680
5681 default:
5682 gcc_unreachable ();
5683 }
5684 }
5685
5686 /* Store the value of EXP (an expression tree)
5687 into a subfield of TARGET which has mode MODE and occupies
5688 BITSIZE bits, starting BITPOS bits from the start of TARGET.
5689 If MODE is VOIDmode, it means that we are storing into a bit-field.
5690
5691 Always return const0_rtx unless we have something particular to
5692 return.
5693
5694 TYPE is the type of the underlying object,
5695
5696 ALIAS_SET is the alias set for the destination. This value will
5697 (in general) be different from that for TARGET, since TARGET is a
5698 reference to the containing structure.
5699
5700 If NONTEMPORAL is true, try generating a nontemporal store. */
5701
5702 static rtx
5703 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
5704 enum machine_mode mode, tree exp, tree type,
5705 alias_set_type alias_set, bool nontemporal)
5706 {
5707 HOST_WIDE_INT width_mask = 0;
5708
5709 if (TREE_CODE (exp) == ERROR_MARK)
5710 return const0_rtx;
5711
5712 /* If we have nothing to store, do nothing unless the expression has
5713 side-effects. */
5714 if (bitsize == 0)
5715 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5716 else if (bitsize >= 0 && bitsize < HOST_BITS_PER_WIDE_INT)
5717 width_mask = ((HOST_WIDE_INT) 1 << bitsize) - 1;
5718
5719 /* If we are storing into an unaligned field of an aligned union that is
5720 in a register, we may have the mode of TARGET being an integer mode but
5721 MODE == BLKmode. In that case, get an aligned object whose size and
5722 alignment are the same as TARGET and store TARGET into it (we can avoid
5723 the store if the field being stored is the entire width of TARGET). Then
5724 call ourselves recursively to store the field into a BLKmode version of
5725 that object. Finally, load from the object into TARGET. This is not
5726 very efficient in general, but should only be slightly more expensive
5727 than the otherwise-required unaligned accesses. Perhaps this can be
5728 cleaned up later. It's tempting to make OBJECT readonly, but it's set
5729 twice, once with emit_move_insn and once via store_field. */
5730
5731 if (mode == BLKmode
5732 && (REG_P (target) || GET_CODE (target) == SUBREG))
5733 {
5734 rtx object = assign_temp (type, 0, 1, 1);
5735 rtx blk_object = adjust_address (object, BLKmode, 0);
5736
5737 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
5738 emit_move_insn (object, target);
5739
5740 store_field (blk_object, bitsize, bitpos, mode, exp, type, alias_set,
5741 nontemporal);
5742
5743 emit_move_insn (target, object);
5744
5745 /* We want to return the BLKmode version of the data. */
5746 return blk_object;
5747 }
5748
5749 if (GET_CODE (target) == CONCAT)
5750 {
5751 /* We're storing into a struct containing a single __complex. */
5752
5753 gcc_assert (!bitpos);
5754 return store_expr (exp, target, 0, nontemporal);
5755 }
5756
5757 /* If the structure is in a register or if the component
5758 is a bit field, we cannot use addressing to access it.
5759 Use bit-field techniques or SUBREG to store in it. */
5760
5761 if (mode == VOIDmode
5762 || (mode != BLKmode && ! direct_store[(int) mode]
5763 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
5764 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
5765 || REG_P (target)
5766 || GET_CODE (target) == SUBREG
5767 /* If the field isn't aligned enough to store as an ordinary memref,
5768 store it as a bit field. */
5769 || (mode != BLKmode
5770 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
5771 || bitpos % GET_MODE_ALIGNMENT (mode))
5772 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
5773 || (bitpos % BITS_PER_UNIT != 0)))
5774 /* If the RHS and field are a constant size and the size of the
5775 RHS isn't the same size as the bitfield, we must use bitfield
5776 operations. */
5777 || (bitsize >= 0
5778 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
5779 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0))
5780 {
5781 rtx temp;
5782
5783 /* If EXP is a NOP_EXPR of precision less than its mode, then that
5784 implies a mask operation. If the precision is the same size as
5785 the field we're storing into, that mask is redundant. This is
5786 particularly common with bit field assignments generated by the
5787 C front end. */
5788 if (TREE_CODE (exp) == NOP_EXPR)
5789 {
5790 tree type = TREE_TYPE (exp);
5791 if (INTEGRAL_TYPE_P (type)
5792 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
5793 && bitsize == TYPE_PRECISION (type))
5794 {
5795 type = TREE_TYPE (TREE_OPERAND (exp, 0));
5796 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
5797 exp = TREE_OPERAND (exp, 0);
5798 }
5799 }
5800
5801 temp = expand_normal (exp);
5802
5803 /* If BITSIZE is narrower than the size of the type of EXP
5804 we will be narrowing TEMP. Normally, what's wanted are the
5805 low-order bits. However, if EXP's type is a record and this is
5806 big-endian machine, we want the upper BITSIZE bits. */
5807 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
5808 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
5809 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
5810 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
5811 size_int (GET_MODE_BITSIZE (GET_MODE (temp))
5812 - bitsize),
5813 NULL_RTX, 1);
5814
5815 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
5816 MODE. */
5817 if (mode != VOIDmode && mode != BLKmode
5818 && mode != TYPE_MODE (TREE_TYPE (exp)))
5819 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
5820
5821 /* If the modes of TEMP and TARGET are both BLKmode, both
5822 must be in memory and BITPOS must be aligned on a byte
5823 boundary. If so, we simply do a block copy. Likewise
5824 for a BLKmode-like TARGET. */
5825 if (GET_MODE (temp) == BLKmode
5826 && (GET_MODE (target) == BLKmode
5827 || (MEM_P (target)
5828 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
5829 && (bitpos % BITS_PER_UNIT) == 0
5830 && (bitsize % BITS_PER_UNIT) == 0)))
5831 {
5832 gcc_assert (MEM_P (target) && MEM_P (temp)
5833 && (bitpos % BITS_PER_UNIT) == 0);
5834
5835 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
5836 emit_block_move (target, temp,
5837 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
5838 / BITS_PER_UNIT),
5839 BLOCK_OP_NORMAL);
5840
5841 return const0_rtx;
5842 }
5843
5844 /* Store the value in the bitfield. */
5845 store_bit_field (target, bitsize, bitpos, mode, temp);
5846
5847 return const0_rtx;
5848 }
5849 else
5850 {
5851 /* Now build a reference to just the desired component. */
5852 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
5853
5854 if (to_rtx == target)
5855 to_rtx = copy_rtx (to_rtx);
5856
5857 MEM_SET_IN_STRUCT_P (to_rtx, 1);
5858 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
5859 set_mem_alias_set (to_rtx, alias_set);
5860
5861 return store_expr (exp, to_rtx, 0, nontemporal);
5862 }
5863 }
5864 \f
5865 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
5866 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
5867 codes and find the ultimate containing object, which we return.
5868
5869 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
5870 bit position, and *PUNSIGNEDP to the signedness of the field.
5871 If the position of the field is variable, we store a tree
5872 giving the variable offset (in units) in *POFFSET.
5873 This offset is in addition to the bit position.
5874 If the position is not variable, we store 0 in *POFFSET.
5875
5876 If any of the extraction expressions is volatile,
5877 we store 1 in *PVOLATILEP. Otherwise we don't change that.
5878
5879 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
5880 Otherwise, it is a mode that can be used to access the field.
5881
5882 If the field describes a variable-sized object, *PMODE is set to
5883 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
5884 this case, but the address of the object can be found.
5885
5886 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
5887 look through nodes that serve as markers of a greater alignment than
5888 the one that can be deduced from the expression. These nodes make it
5889 possible for front-ends to prevent temporaries from being created by
5890 the middle-end on alignment considerations. For that purpose, the
5891 normal operating mode at high-level is to always pass FALSE so that
5892 the ultimate containing object is really returned; moreover, the
5893 associated predicate handled_component_p will always return TRUE
5894 on these nodes, thus indicating that they are essentially handled
5895 by get_inner_reference. TRUE should only be passed when the caller
5896 is scanning the expression in order to build another representation
5897 and specifically knows how to handle these nodes; as such, this is
5898 the normal operating mode in the RTL expanders. */
5899
5900 tree
5901 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
5902 HOST_WIDE_INT *pbitpos, tree *poffset,
5903 enum machine_mode *pmode, int *punsignedp,
5904 int *pvolatilep, bool keep_aligning)
5905 {
5906 tree size_tree = 0;
5907 enum machine_mode mode = VOIDmode;
5908 bool blkmode_bitfield = false;
5909 tree offset = size_zero_node;
5910 tree bit_offset = bitsize_zero_node;
5911
5912 /* First get the mode, signedness, and size. We do this from just the
5913 outermost expression. */
5914 if (TREE_CODE (exp) == COMPONENT_REF)
5915 {
5916 tree field = TREE_OPERAND (exp, 1);
5917 size_tree = DECL_SIZE (field);
5918 if (!DECL_BIT_FIELD (field))
5919 mode = DECL_MODE (field);
5920 else if (DECL_MODE (field) == BLKmode)
5921 blkmode_bitfield = true;
5922
5923 *punsignedp = DECL_UNSIGNED (field);
5924 }
5925 else if (TREE_CODE (exp) == BIT_FIELD_REF)
5926 {
5927 size_tree = TREE_OPERAND (exp, 1);
5928 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
5929 || TYPE_UNSIGNED (TREE_TYPE (exp)));
5930
5931 /* For vector types, with the correct size of access, use the mode of
5932 inner type. */
5933 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
5934 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
5935 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
5936 mode = TYPE_MODE (TREE_TYPE (exp));
5937 }
5938 else
5939 {
5940 mode = TYPE_MODE (TREE_TYPE (exp));
5941 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5942
5943 if (mode == BLKmode)
5944 size_tree = TYPE_SIZE (TREE_TYPE (exp));
5945 else
5946 *pbitsize = GET_MODE_BITSIZE (mode);
5947 }
5948
5949 if (size_tree != 0)
5950 {
5951 if (! host_integerp (size_tree, 1))
5952 mode = BLKmode, *pbitsize = -1;
5953 else
5954 *pbitsize = tree_low_cst (size_tree, 1);
5955 }
5956
5957 /* Compute cumulative bit-offset for nested component-refs and array-refs,
5958 and find the ultimate containing object. */
5959 while (1)
5960 {
5961 switch (TREE_CODE (exp))
5962 {
5963 case BIT_FIELD_REF:
5964 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5965 TREE_OPERAND (exp, 2));
5966 break;
5967
5968 case COMPONENT_REF:
5969 {
5970 tree field = TREE_OPERAND (exp, 1);
5971 tree this_offset = component_ref_field_offset (exp);
5972
5973 /* If this field hasn't been filled in yet, don't go past it.
5974 This should only happen when folding expressions made during
5975 type construction. */
5976 if (this_offset == 0)
5977 break;
5978
5979 offset = size_binop (PLUS_EXPR, offset, this_offset);
5980 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5981 DECL_FIELD_BIT_OFFSET (field));
5982
5983 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
5984 }
5985 break;
5986
5987 case ARRAY_REF:
5988 case ARRAY_RANGE_REF:
5989 {
5990 tree index = TREE_OPERAND (exp, 1);
5991 tree low_bound = array_ref_low_bound (exp);
5992 tree unit_size = array_ref_element_size (exp);
5993
5994 /* We assume all arrays have sizes that are a multiple of a byte.
5995 First subtract the lower bound, if any, in the type of the
5996 index, then convert to sizetype and multiply by the size of
5997 the array element. */
5998 if (! integer_zerop (low_bound))
5999 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6000 index, low_bound);
6001
6002 offset = size_binop (PLUS_EXPR, offset,
6003 size_binop (MULT_EXPR,
6004 fold_convert (sizetype, index),
6005 unit_size));
6006 }
6007 break;
6008
6009 case REALPART_EXPR:
6010 break;
6011
6012 case IMAGPART_EXPR:
6013 bit_offset = size_binop (PLUS_EXPR, bit_offset,
6014 bitsize_int (*pbitsize));
6015 break;
6016
6017 case VIEW_CONVERT_EXPR:
6018 if (keep_aligning && STRICT_ALIGNMENT
6019 && (TYPE_ALIGN (TREE_TYPE (exp))
6020 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6021 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6022 < BIGGEST_ALIGNMENT)
6023 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6024 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6025 goto done;
6026 break;
6027
6028 default:
6029 goto done;
6030 }
6031
6032 /* If any reference in the chain is volatile, the effect is volatile. */
6033 if (TREE_THIS_VOLATILE (exp))
6034 *pvolatilep = 1;
6035
6036 exp = TREE_OPERAND (exp, 0);
6037 }
6038 done:
6039
6040 /* If OFFSET is constant, see if we can return the whole thing as a
6041 constant bit position. Make sure to handle overflow during
6042 this conversion. */
6043 if (host_integerp (offset, 0))
6044 {
6045 double_int tem = double_int_mul (tree_to_double_int (offset),
6046 uhwi_to_double_int (BITS_PER_UNIT));
6047 tem = double_int_add (tem, tree_to_double_int (bit_offset));
6048 if (double_int_fits_in_shwi_p (tem))
6049 {
6050 *pbitpos = double_int_to_shwi (tem);
6051 *poffset = offset = NULL_TREE;
6052 }
6053 }
6054
6055 /* Otherwise, split it up. */
6056 if (offset)
6057 {
6058 *pbitpos = tree_low_cst (bit_offset, 0);
6059 *poffset = offset;
6060 }
6061
6062 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6063 if (mode == VOIDmode
6064 && blkmode_bitfield
6065 && (*pbitpos % BITS_PER_UNIT) == 0
6066 && (*pbitsize % BITS_PER_UNIT) == 0)
6067 *pmode = BLKmode;
6068 else
6069 *pmode = mode;
6070
6071 return exp;
6072 }
6073
6074 /* Given an expression EXP that may be a COMPONENT_REF or an ARRAY_REF,
6075 look for whether EXP or any nested component-refs within EXP is marked
6076 as PACKED. */
6077
6078 bool
6079 contains_packed_reference (const_tree exp)
6080 {
6081 bool packed_p = false;
6082
6083 while (1)
6084 {
6085 switch (TREE_CODE (exp))
6086 {
6087 case COMPONENT_REF:
6088 {
6089 tree field = TREE_OPERAND (exp, 1);
6090 packed_p = DECL_PACKED (field)
6091 || TYPE_PACKED (TREE_TYPE (field))
6092 || TYPE_PACKED (TREE_TYPE (exp));
6093 if (packed_p)
6094 goto done;
6095 }
6096 break;
6097
6098 case BIT_FIELD_REF:
6099 case ARRAY_REF:
6100 case ARRAY_RANGE_REF:
6101 case REALPART_EXPR:
6102 case IMAGPART_EXPR:
6103 case VIEW_CONVERT_EXPR:
6104 break;
6105
6106 default:
6107 goto done;
6108 }
6109 exp = TREE_OPERAND (exp, 0);
6110 }
6111 done:
6112 return packed_p;
6113 }
6114
6115 /* Return a tree of sizetype representing the size, in bytes, of the element
6116 of EXP, an ARRAY_REF. */
6117
6118 tree
6119 array_ref_element_size (tree exp)
6120 {
6121 tree aligned_size = TREE_OPERAND (exp, 3);
6122 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6123
6124 /* If a size was specified in the ARRAY_REF, it's the size measured
6125 in alignment units of the element type. So multiply by that value. */
6126 if (aligned_size)
6127 {
6128 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6129 sizetype from another type of the same width and signedness. */
6130 if (TREE_TYPE (aligned_size) != sizetype)
6131 aligned_size = fold_convert (sizetype, aligned_size);
6132 return size_binop (MULT_EXPR, aligned_size,
6133 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6134 }
6135
6136 /* Otherwise, take the size from that of the element type. Substitute
6137 any PLACEHOLDER_EXPR that we have. */
6138 else
6139 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6140 }
6141
6142 /* Return a tree representing the lower bound of the array mentioned in
6143 EXP, an ARRAY_REF. */
6144
6145 tree
6146 array_ref_low_bound (tree exp)
6147 {
6148 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6149
6150 /* If a lower bound is specified in EXP, use it. */
6151 if (TREE_OPERAND (exp, 2))
6152 return TREE_OPERAND (exp, 2);
6153
6154 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6155 substituting for a PLACEHOLDER_EXPR as needed. */
6156 if (domain_type && TYPE_MIN_VALUE (domain_type))
6157 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6158
6159 /* Otherwise, return a zero of the appropriate type. */
6160 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6161 }
6162
6163 /* Return a tree representing the upper bound of the array mentioned in
6164 EXP, an ARRAY_REF. */
6165
6166 tree
6167 array_ref_up_bound (tree exp)
6168 {
6169 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6170
6171 /* If there is a domain type and it has an upper bound, use it, substituting
6172 for a PLACEHOLDER_EXPR as needed. */
6173 if (domain_type && TYPE_MAX_VALUE (domain_type))
6174 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6175
6176 /* Otherwise fail. */
6177 return NULL_TREE;
6178 }
6179
6180 /* Return a tree representing the offset, in bytes, of the field referenced
6181 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6182
6183 tree
6184 component_ref_field_offset (tree exp)
6185 {
6186 tree aligned_offset = TREE_OPERAND (exp, 2);
6187 tree field = TREE_OPERAND (exp, 1);
6188
6189 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6190 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6191 value. */
6192 if (aligned_offset)
6193 {
6194 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6195 sizetype from another type of the same width and signedness. */
6196 if (TREE_TYPE (aligned_offset) != sizetype)
6197 aligned_offset = fold_convert (sizetype, aligned_offset);
6198 return size_binop (MULT_EXPR, aligned_offset,
6199 size_int (DECL_OFFSET_ALIGN (field) / BITS_PER_UNIT));
6200 }
6201
6202 /* Otherwise, take the offset from that of the field. Substitute
6203 any PLACEHOLDER_EXPR that we have. */
6204 else
6205 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6206 }
6207
6208 /* Return 1 if T is an expression that get_inner_reference handles. */
6209
6210 int
6211 handled_component_p (const_tree t)
6212 {
6213 switch (TREE_CODE (t))
6214 {
6215 case BIT_FIELD_REF:
6216 case COMPONENT_REF:
6217 case ARRAY_REF:
6218 case ARRAY_RANGE_REF:
6219 case VIEW_CONVERT_EXPR:
6220 case REALPART_EXPR:
6221 case IMAGPART_EXPR:
6222 return 1;
6223
6224 default:
6225 return 0;
6226 }
6227 }
6228 \f
6229 /* Given an rtx VALUE that may contain additions and multiplications, return
6230 an equivalent value that just refers to a register, memory, or constant.
6231 This is done by generating instructions to perform the arithmetic and
6232 returning a pseudo-register containing the value.
6233
6234 The returned value may be a REG, SUBREG, MEM or constant. */
6235
6236 rtx
6237 force_operand (rtx value, rtx target)
6238 {
6239 rtx op1, op2;
6240 /* Use subtarget as the target for operand 0 of a binary operation. */
6241 rtx subtarget = get_subtarget (target);
6242 enum rtx_code code = GET_CODE (value);
6243
6244 /* Check for subreg applied to an expression produced by loop optimizer. */
6245 if (code == SUBREG
6246 && !REG_P (SUBREG_REG (value))
6247 && !MEM_P (SUBREG_REG (value)))
6248 {
6249 value
6250 = simplify_gen_subreg (GET_MODE (value),
6251 force_reg (GET_MODE (SUBREG_REG (value)),
6252 force_operand (SUBREG_REG (value),
6253 NULL_RTX)),
6254 GET_MODE (SUBREG_REG (value)),
6255 SUBREG_BYTE (value));
6256 code = GET_CODE (value);
6257 }
6258
6259 /* Check for a PIC address load. */
6260 if ((code == PLUS || code == MINUS)
6261 && XEXP (value, 0) == pic_offset_table_rtx
6262 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
6263 || GET_CODE (XEXP (value, 1)) == LABEL_REF
6264 || GET_CODE (XEXP (value, 1)) == CONST))
6265 {
6266 if (!subtarget)
6267 subtarget = gen_reg_rtx (GET_MODE (value));
6268 emit_move_insn (subtarget, value);
6269 return subtarget;
6270 }
6271
6272 if (ARITHMETIC_P (value))
6273 {
6274 op2 = XEXP (value, 1);
6275 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
6276 subtarget = 0;
6277 if (code == MINUS && GET_CODE (op2) == CONST_INT)
6278 {
6279 code = PLUS;
6280 op2 = negate_rtx (GET_MODE (value), op2);
6281 }
6282
6283 /* Check for an addition with OP2 a constant integer and our first
6284 operand a PLUS of a virtual register and something else. In that
6285 case, we want to emit the sum of the virtual register and the
6286 constant first and then add the other value. This allows virtual
6287 register instantiation to simply modify the constant rather than
6288 creating another one around this addition. */
6289 if (code == PLUS && GET_CODE (op2) == CONST_INT
6290 && GET_CODE (XEXP (value, 0)) == PLUS
6291 && REG_P (XEXP (XEXP (value, 0), 0))
6292 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
6293 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
6294 {
6295 rtx temp = expand_simple_binop (GET_MODE (value), code,
6296 XEXP (XEXP (value, 0), 0), op2,
6297 subtarget, 0, OPTAB_LIB_WIDEN);
6298 return expand_simple_binop (GET_MODE (value), code, temp,
6299 force_operand (XEXP (XEXP (value,
6300 0), 1), 0),
6301 target, 0, OPTAB_LIB_WIDEN);
6302 }
6303
6304 op1 = force_operand (XEXP (value, 0), subtarget);
6305 op2 = force_operand (op2, NULL_RTX);
6306 switch (code)
6307 {
6308 case MULT:
6309 return expand_mult (GET_MODE (value), op1, op2, target, 1);
6310 case DIV:
6311 if (!INTEGRAL_MODE_P (GET_MODE (value)))
6312 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6313 target, 1, OPTAB_LIB_WIDEN);
6314 else
6315 return expand_divmod (0,
6316 FLOAT_MODE_P (GET_MODE (value))
6317 ? RDIV_EXPR : TRUNC_DIV_EXPR,
6318 GET_MODE (value), op1, op2, target, 0);
6319 case MOD:
6320 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6321 target, 0);
6322 case UDIV:
6323 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
6324 target, 1);
6325 case UMOD:
6326 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
6327 target, 1);
6328 case ASHIFTRT:
6329 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6330 target, 0, OPTAB_LIB_WIDEN);
6331 default:
6332 return expand_simple_binop (GET_MODE (value), code, op1, op2,
6333 target, 1, OPTAB_LIB_WIDEN);
6334 }
6335 }
6336 if (UNARY_P (value))
6337 {
6338 if (!target)
6339 target = gen_reg_rtx (GET_MODE (value));
6340 op1 = force_operand (XEXP (value, 0), NULL_RTX);
6341 switch (code)
6342 {
6343 case ZERO_EXTEND:
6344 case SIGN_EXTEND:
6345 case TRUNCATE:
6346 case FLOAT_EXTEND:
6347 case FLOAT_TRUNCATE:
6348 convert_move (target, op1, code == ZERO_EXTEND);
6349 return target;
6350
6351 case FIX:
6352 case UNSIGNED_FIX:
6353 expand_fix (target, op1, code == UNSIGNED_FIX);
6354 return target;
6355
6356 case FLOAT:
6357 case UNSIGNED_FLOAT:
6358 expand_float (target, op1, code == UNSIGNED_FLOAT);
6359 return target;
6360
6361 default:
6362 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
6363 }
6364 }
6365
6366 #ifdef INSN_SCHEDULING
6367 /* On machines that have insn scheduling, we want all memory reference to be
6368 explicit, so we need to deal with such paradoxical SUBREGs. */
6369 if (GET_CODE (value) == SUBREG && MEM_P (SUBREG_REG (value))
6370 && (GET_MODE_SIZE (GET_MODE (value))
6371 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (value)))))
6372 value
6373 = simplify_gen_subreg (GET_MODE (value),
6374 force_reg (GET_MODE (SUBREG_REG (value)),
6375 force_operand (SUBREG_REG (value),
6376 NULL_RTX)),
6377 GET_MODE (SUBREG_REG (value)),
6378 SUBREG_BYTE (value));
6379 #endif
6380
6381 return value;
6382 }
6383 \f
6384 /* Subroutine of expand_expr: return nonzero iff there is no way that
6385 EXP can reference X, which is being modified. TOP_P is nonzero if this
6386 call is going to be used to determine whether we need a temporary
6387 for EXP, as opposed to a recursive call to this function.
6388
6389 It is always safe for this routine to return zero since it merely
6390 searches for optimization opportunities. */
6391
6392 int
6393 safe_from_p (const_rtx x, tree exp, int top_p)
6394 {
6395 rtx exp_rtl = 0;
6396 int i, nops;
6397
6398 if (x == 0
6399 /* If EXP has varying size, we MUST use a target since we currently
6400 have no way of allocating temporaries of variable size
6401 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
6402 So we assume here that something at a higher level has prevented a
6403 clash. This is somewhat bogus, but the best we can do. Only
6404 do this when X is BLKmode and when we are at the top level. */
6405 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
6406 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
6407 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
6408 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
6409 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
6410 != INTEGER_CST)
6411 && GET_MODE (x) == BLKmode)
6412 /* If X is in the outgoing argument area, it is always safe. */
6413 || (MEM_P (x)
6414 && (XEXP (x, 0) == virtual_outgoing_args_rtx
6415 || (GET_CODE (XEXP (x, 0)) == PLUS
6416 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
6417 return 1;
6418
6419 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
6420 find the underlying pseudo. */
6421 if (GET_CODE (x) == SUBREG)
6422 {
6423 x = SUBREG_REG (x);
6424 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6425 return 0;
6426 }
6427
6428 /* Now look at our tree code and possibly recurse. */
6429 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
6430 {
6431 case tcc_declaration:
6432 exp_rtl = DECL_RTL_IF_SET (exp);
6433 break;
6434
6435 case tcc_constant:
6436 return 1;
6437
6438 case tcc_exceptional:
6439 if (TREE_CODE (exp) == TREE_LIST)
6440 {
6441 while (1)
6442 {
6443 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
6444 return 0;
6445 exp = TREE_CHAIN (exp);
6446 if (!exp)
6447 return 1;
6448 if (TREE_CODE (exp) != TREE_LIST)
6449 return safe_from_p (x, exp, 0);
6450 }
6451 }
6452 else if (TREE_CODE (exp) == CONSTRUCTOR)
6453 {
6454 constructor_elt *ce;
6455 unsigned HOST_WIDE_INT idx;
6456
6457 for (idx = 0;
6458 VEC_iterate (constructor_elt, CONSTRUCTOR_ELTS (exp), idx, ce);
6459 idx++)
6460 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
6461 || !safe_from_p (x, ce->value, 0))
6462 return 0;
6463 return 1;
6464 }
6465 else if (TREE_CODE (exp) == ERROR_MARK)
6466 return 1; /* An already-visited SAVE_EXPR? */
6467 else
6468 return 0;
6469
6470 case tcc_statement:
6471 /* The only case we look at here is the DECL_INITIAL inside a
6472 DECL_EXPR. */
6473 return (TREE_CODE (exp) != DECL_EXPR
6474 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
6475 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
6476 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
6477
6478 case tcc_binary:
6479 case tcc_comparison:
6480 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
6481 return 0;
6482 /* Fall through. */
6483
6484 case tcc_unary:
6485 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6486
6487 case tcc_expression:
6488 case tcc_reference:
6489 case tcc_vl_exp:
6490 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
6491 the expression. If it is set, we conflict iff we are that rtx or
6492 both are in memory. Otherwise, we check all operands of the
6493 expression recursively. */
6494
6495 switch (TREE_CODE (exp))
6496 {
6497 case ADDR_EXPR:
6498 /* If the operand is static or we are static, we can't conflict.
6499 Likewise if we don't conflict with the operand at all. */
6500 if (staticp (TREE_OPERAND (exp, 0))
6501 || TREE_STATIC (exp)
6502 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
6503 return 1;
6504
6505 /* Otherwise, the only way this can conflict is if we are taking
6506 the address of a DECL a that address if part of X, which is
6507 very rare. */
6508 exp = TREE_OPERAND (exp, 0);
6509 if (DECL_P (exp))
6510 {
6511 if (!DECL_RTL_SET_P (exp)
6512 || !MEM_P (DECL_RTL (exp)))
6513 return 0;
6514 else
6515 exp_rtl = XEXP (DECL_RTL (exp), 0);
6516 }
6517 break;
6518
6519 case MISALIGNED_INDIRECT_REF:
6520 case ALIGN_INDIRECT_REF:
6521 case INDIRECT_REF:
6522 if (MEM_P (x)
6523 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
6524 get_alias_set (exp)))
6525 return 0;
6526 break;
6527
6528 case CALL_EXPR:
6529 /* Assume that the call will clobber all hard registers and
6530 all of memory. */
6531 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
6532 || MEM_P (x))
6533 return 0;
6534 break;
6535
6536 case WITH_CLEANUP_EXPR:
6537 case CLEANUP_POINT_EXPR:
6538 /* Lowered by gimplify.c. */
6539 gcc_unreachable ();
6540
6541 case SAVE_EXPR:
6542 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
6543
6544 default:
6545 break;
6546 }
6547
6548 /* If we have an rtx, we do not need to scan our operands. */
6549 if (exp_rtl)
6550 break;
6551
6552 nops = TREE_OPERAND_LENGTH (exp);
6553 for (i = 0; i < nops; i++)
6554 if (TREE_OPERAND (exp, i) != 0
6555 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
6556 return 0;
6557
6558 break;
6559
6560 case tcc_type:
6561 /* Should never get a type here. */
6562 gcc_unreachable ();
6563 }
6564
6565 /* If we have an rtl, find any enclosed object. Then see if we conflict
6566 with it. */
6567 if (exp_rtl)
6568 {
6569 if (GET_CODE (exp_rtl) == SUBREG)
6570 {
6571 exp_rtl = SUBREG_REG (exp_rtl);
6572 if (REG_P (exp_rtl)
6573 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
6574 return 0;
6575 }
6576
6577 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
6578 are memory and they conflict. */
6579 return ! (rtx_equal_p (x, exp_rtl)
6580 || (MEM_P (x) && MEM_P (exp_rtl)
6581 && true_dependence (exp_rtl, VOIDmode, x,
6582 rtx_addr_varies_p)));
6583 }
6584
6585 /* If we reach here, it is safe. */
6586 return 1;
6587 }
6588
6589 \f
6590 /* Return the highest power of two that EXP is known to be a multiple of.
6591 This is used in updating alignment of MEMs in array references. */
6592
6593 unsigned HOST_WIDE_INT
6594 highest_pow2_factor (const_tree exp)
6595 {
6596 unsigned HOST_WIDE_INT c0, c1;
6597
6598 switch (TREE_CODE (exp))
6599 {
6600 case INTEGER_CST:
6601 /* We can find the lowest bit that's a one. If the low
6602 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
6603 We need to handle this case since we can find it in a COND_EXPR,
6604 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
6605 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
6606 later ICE. */
6607 if (TREE_OVERFLOW (exp))
6608 return BIGGEST_ALIGNMENT;
6609 else
6610 {
6611 /* Note: tree_low_cst is intentionally not used here,
6612 we don't care about the upper bits. */
6613 c0 = TREE_INT_CST_LOW (exp);
6614 c0 &= -c0;
6615 return c0 ? c0 : BIGGEST_ALIGNMENT;
6616 }
6617 break;
6618
6619 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
6620 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6621 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6622 return MIN (c0, c1);
6623
6624 case MULT_EXPR:
6625 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6626 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6627 return c0 * c1;
6628
6629 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
6630 case CEIL_DIV_EXPR:
6631 if (integer_pow2p (TREE_OPERAND (exp, 1))
6632 && host_integerp (TREE_OPERAND (exp, 1), 1))
6633 {
6634 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6635 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
6636 return MAX (1, c0 / c1);
6637 }
6638 break;
6639
6640 case BIT_AND_EXPR:
6641 /* The highest power of two of a bit-and expression is the maximum of
6642 that of its operands. We typically get here for a complex LHS and
6643 a constant negative power of two on the RHS to force an explicit
6644 alignment, so don't bother looking at the LHS. */
6645 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6646
6647 CASE_CONVERT:
6648 case SAVE_EXPR:
6649 return highest_pow2_factor (TREE_OPERAND (exp, 0));
6650
6651 case COMPOUND_EXPR:
6652 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6653
6654 case COND_EXPR:
6655 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6656 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
6657 return MIN (c0, c1);
6658
6659 default:
6660 break;
6661 }
6662
6663 return 1;
6664 }
6665
6666 /* Similar, except that the alignment requirements of TARGET are
6667 taken into account. Assume it is at least as aligned as its
6668 type, unless it is a COMPONENT_REF in which case the layout of
6669 the structure gives the alignment. */
6670
6671 static unsigned HOST_WIDE_INT
6672 highest_pow2_factor_for_target (const_tree target, const_tree exp)
6673 {
6674 unsigned HOST_WIDE_INT target_align, factor;
6675
6676 factor = highest_pow2_factor (exp);
6677 if (TREE_CODE (target) == COMPONENT_REF)
6678 target_align = DECL_ALIGN_UNIT (TREE_OPERAND (target, 1));
6679 else
6680 target_align = TYPE_ALIGN_UNIT (TREE_TYPE (target));
6681 return MAX (factor, target_align);
6682 }
6683 \f
6684 /* Return &VAR expression for emulated thread local VAR. */
6685
6686 static tree
6687 emutls_var_address (tree var)
6688 {
6689 tree emuvar = emutls_decl (var);
6690 tree fn = built_in_decls [BUILT_IN_EMUTLS_GET_ADDRESS];
6691 tree arg = build_fold_addr_expr_with_type (emuvar, ptr_type_node);
6692 tree arglist = build_tree_list (NULL_TREE, arg);
6693 tree call = build_function_call_expr (fn, arglist);
6694 return fold_convert (build_pointer_type (TREE_TYPE (var)), call);
6695 }
6696 \f
6697
6698 /* Subroutine of expand_expr. Expand the two operands of a binary
6699 expression EXP0 and EXP1 placing the results in OP0 and OP1.
6700 The value may be stored in TARGET if TARGET is nonzero. The
6701 MODIFIER argument is as documented by expand_expr. */
6702
6703 static void
6704 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
6705 enum expand_modifier modifier)
6706 {
6707 if (! safe_from_p (target, exp1, 1))
6708 target = 0;
6709 if (operand_equal_p (exp0, exp1, 0))
6710 {
6711 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6712 *op1 = copy_rtx (*op0);
6713 }
6714 else
6715 {
6716 /* If we need to preserve evaluation order, copy exp0 into its own
6717 temporary variable so that it can't be clobbered by exp1. */
6718 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
6719 exp0 = save_expr (exp0);
6720 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6721 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
6722 }
6723 }
6724
6725 \f
6726 /* Return a MEM that contains constant EXP. DEFER is as for
6727 output_constant_def and MODIFIER is as for expand_expr. */
6728
6729 static rtx
6730 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
6731 {
6732 rtx mem;
6733
6734 mem = output_constant_def (exp, defer);
6735 if (modifier != EXPAND_INITIALIZER)
6736 mem = use_anchored_address (mem);
6737 return mem;
6738 }
6739
6740 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
6741 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6742
6743 static rtx
6744 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
6745 enum expand_modifier modifier)
6746 {
6747 rtx result, subtarget;
6748 tree inner, offset;
6749 HOST_WIDE_INT bitsize, bitpos;
6750 int volatilep, unsignedp;
6751 enum machine_mode mode1;
6752
6753 /* If we are taking the address of a constant and are at the top level,
6754 we have to use output_constant_def since we can't call force_const_mem
6755 at top level. */
6756 /* ??? This should be considered a front-end bug. We should not be
6757 generating ADDR_EXPR of something that isn't an LVALUE. The only
6758 exception here is STRING_CST. */
6759 if (CONSTANT_CLASS_P (exp))
6760 return XEXP (expand_expr_constant (exp, 0, modifier), 0);
6761
6762 /* Everything must be something allowed by is_gimple_addressable. */
6763 switch (TREE_CODE (exp))
6764 {
6765 case INDIRECT_REF:
6766 /* This case will happen via recursion for &a->b. */
6767 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
6768
6769 case CONST_DECL:
6770 /* Recurse and make the output_constant_def clause above handle this. */
6771 return expand_expr_addr_expr_1 (DECL_INITIAL (exp), target,
6772 tmode, modifier);
6773
6774 case REALPART_EXPR:
6775 /* The real part of the complex number is always first, therefore
6776 the address is the same as the address of the parent object. */
6777 offset = 0;
6778 bitpos = 0;
6779 inner = TREE_OPERAND (exp, 0);
6780 break;
6781
6782 case IMAGPART_EXPR:
6783 /* The imaginary part of the complex number is always second.
6784 The expression is therefore always offset by the size of the
6785 scalar type. */
6786 offset = 0;
6787 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
6788 inner = TREE_OPERAND (exp, 0);
6789 break;
6790
6791 case VAR_DECL:
6792 /* TLS emulation hook - replace __thread VAR's &VAR with
6793 __emutls_get_address (&_emutls.VAR). */
6794 if (! targetm.have_tls
6795 && TREE_CODE (exp) == VAR_DECL
6796 && DECL_THREAD_LOCAL_P (exp))
6797 {
6798 exp = emutls_var_address (exp);
6799 return expand_expr (exp, target, tmode, modifier);
6800 }
6801 /* Fall through. */
6802
6803 default:
6804 /* If the object is a DECL, then expand it for its rtl. Don't bypass
6805 expand_expr, as that can have various side effects; LABEL_DECLs for
6806 example, may not have their DECL_RTL set yet. Expand the rtl of
6807 CONSTRUCTORs too, which should yield a memory reference for the
6808 constructor's contents. Assume language specific tree nodes can
6809 be expanded in some interesting way. */
6810 if (DECL_P (exp)
6811 || TREE_CODE (exp) == CONSTRUCTOR
6812 || TREE_CODE (exp) >= LAST_AND_UNUSED_TREE_CODE)
6813 {
6814 result = expand_expr (exp, target, tmode,
6815 modifier == EXPAND_INITIALIZER
6816 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
6817
6818 /* If the DECL isn't in memory, then the DECL wasn't properly
6819 marked TREE_ADDRESSABLE, which will be either a front-end
6820 or a tree optimizer bug. */
6821 gcc_assert (MEM_P (result));
6822 result = XEXP (result, 0);
6823
6824 /* ??? Is this needed anymore? */
6825 if (DECL_P (exp) && !TREE_USED (exp) == 0)
6826 {
6827 assemble_external (exp);
6828 TREE_USED (exp) = 1;
6829 }
6830
6831 if (modifier != EXPAND_INITIALIZER
6832 && modifier != EXPAND_CONST_ADDRESS)
6833 result = force_operand (result, target);
6834 return result;
6835 }
6836
6837 /* Pass FALSE as the last argument to get_inner_reference although
6838 we are expanding to RTL. The rationale is that we know how to
6839 handle "aligning nodes" here: we can just bypass them because
6840 they won't change the final object whose address will be returned
6841 (they actually exist only for that purpose). */
6842 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
6843 &mode1, &unsignedp, &volatilep, false);
6844 break;
6845 }
6846
6847 /* We must have made progress. */
6848 gcc_assert (inner != exp);
6849
6850 subtarget = offset || bitpos ? NULL_RTX : target;
6851 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier);
6852
6853 if (offset)
6854 {
6855 rtx tmp;
6856
6857 if (modifier != EXPAND_NORMAL)
6858 result = force_operand (result, NULL);
6859 tmp = expand_expr (offset, NULL_RTX, tmode,
6860 modifier == EXPAND_INITIALIZER
6861 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
6862
6863 result = convert_memory_address (tmode, result);
6864 tmp = convert_memory_address (tmode, tmp);
6865
6866 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
6867 result = gen_rtx_PLUS (tmode, result, tmp);
6868 else
6869 {
6870 subtarget = bitpos ? NULL_RTX : target;
6871 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
6872 1, OPTAB_LIB_WIDEN);
6873 }
6874 }
6875
6876 if (bitpos)
6877 {
6878 /* Someone beforehand should have rejected taking the address
6879 of such an object. */
6880 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
6881
6882 result = plus_constant (result, bitpos / BITS_PER_UNIT);
6883 if (modifier < EXPAND_SUM)
6884 result = force_operand (result, target);
6885 }
6886
6887 return result;
6888 }
6889
6890 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
6891 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6892
6893 static rtx
6894 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
6895 enum expand_modifier modifier)
6896 {
6897 enum machine_mode rmode;
6898 rtx result;
6899
6900 /* Target mode of VOIDmode says "whatever's natural". */
6901 if (tmode == VOIDmode)
6902 tmode = TYPE_MODE (TREE_TYPE (exp));
6903
6904 /* We can get called with some Weird Things if the user does silliness
6905 like "(short) &a". In that case, convert_memory_address won't do
6906 the right thing, so ignore the given target mode. */
6907 if (tmode != Pmode && tmode != ptr_mode)
6908 tmode = Pmode;
6909
6910 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
6911 tmode, modifier);
6912
6913 /* Despite expand_expr claims concerning ignoring TMODE when not
6914 strictly convenient, stuff breaks if we don't honor it. Note
6915 that combined with the above, we only do this for pointer modes. */
6916 rmode = GET_MODE (result);
6917 if (rmode == VOIDmode)
6918 rmode = tmode;
6919 if (rmode != tmode)
6920 result = convert_memory_address (tmode, result);
6921
6922 return result;
6923 }
6924
6925 /* Generate code for computing CONSTRUCTOR EXP.
6926 An rtx for the computed value is returned. If AVOID_TEMP_MEM
6927 is TRUE, instead of creating a temporary variable in memory
6928 NULL is returned and the caller needs to handle it differently. */
6929
6930 static rtx
6931 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
6932 bool avoid_temp_mem)
6933 {
6934 tree type = TREE_TYPE (exp);
6935 enum machine_mode mode = TYPE_MODE (type);
6936
6937 /* Try to avoid creating a temporary at all. This is possible
6938 if all of the initializer is zero.
6939 FIXME: try to handle all [0..255] initializers we can handle
6940 with memset. */
6941 if (TREE_STATIC (exp)
6942 && !TREE_ADDRESSABLE (exp)
6943 && target != 0 && mode == BLKmode
6944 && all_zeros_p (exp))
6945 {
6946 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
6947 return target;
6948 }
6949
6950 /* All elts simple constants => refer to a constant in memory. But
6951 if this is a non-BLKmode mode, let it store a field at a time
6952 since that should make a CONST_INT or CONST_DOUBLE when we
6953 fold. Likewise, if we have a target we can use, it is best to
6954 store directly into the target unless the type is large enough
6955 that memcpy will be used. If we are making an initializer and
6956 all operands are constant, put it in memory as well.
6957
6958 FIXME: Avoid trying to fill vector constructors piece-meal.
6959 Output them with output_constant_def below unless we're sure
6960 they're zeros. This should go away when vector initializers
6961 are treated like VECTOR_CST instead of arrays. */
6962 if ((TREE_STATIC (exp)
6963 && ((mode == BLKmode
6964 && ! (target != 0 && safe_from_p (target, exp, 1)))
6965 || TREE_ADDRESSABLE (exp)
6966 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
6967 && (! MOVE_BY_PIECES_P
6968 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
6969 TYPE_ALIGN (type)))
6970 && ! mostly_zeros_p (exp))))
6971 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
6972 && TREE_CONSTANT (exp)))
6973 {
6974 rtx constructor;
6975
6976 if (avoid_temp_mem)
6977 return NULL_RTX;
6978
6979 constructor = expand_expr_constant (exp, 1, modifier);
6980
6981 if (modifier != EXPAND_CONST_ADDRESS
6982 && modifier != EXPAND_INITIALIZER
6983 && modifier != EXPAND_SUM)
6984 constructor = validize_mem (constructor);
6985
6986 return constructor;
6987 }
6988
6989 /* Handle calls that pass values in multiple non-contiguous
6990 locations. The Irix 6 ABI has examples of this. */
6991 if (target == 0 || ! safe_from_p (target, exp, 1)
6992 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
6993 {
6994 if (avoid_temp_mem)
6995 return NULL_RTX;
6996
6997 target
6998 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
6999 | (TREE_READONLY (exp)
7000 * TYPE_QUAL_CONST))),
7001 0, TREE_ADDRESSABLE (exp), 1);
7002 }
7003
7004 store_constructor (exp, target, 0, int_expr_size (exp));
7005 return target;
7006 }
7007
7008
7009 /* expand_expr: generate code for computing expression EXP.
7010 An rtx for the computed value is returned. The value is never null.
7011 In the case of a void EXP, const0_rtx is returned.
7012
7013 The value may be stored in TARGET if TARGET is nonzero.
7014 TARGET is just a suggestion; callers must assume that
7015 the rtx returned may not be the same as TARGET.
7016
7017 If TARGET is CONST0_RTX, it means that the value will be ignored.
7018
7019 If TMODE is not VOIDmode, it suggests generating the
7020 result in mode TMODE. But this is done only when convenient.
7021 Otherwise, TMODE is ignored and the value generated in its natural mode.
7022 TMODE is just a suggestion; callers must assume that
7023 the rtx returned may not have mode TMODE.
7024
7025 Note that TARGET may have neither TMODE nor MODE. In that case, it
7026 probably will not be used.
7027
7028 If MODIFIER is EXPAND_SUM then when EXP is an addition
7029 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7030 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7031 products as above, or REG or MEM, or constant.
7032 Ordinarily in such cases we would output mul or add instructions
7033 and then return a pseudo reg containing the sum.
7034
7035 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7036 it also marks a label as absolutely required (it can't be dead).
7037 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7038 This is used for outputting expressions used in initializers.
7039
7040 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7041 with a constant address even if that address is not normally legitimate.
7042 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7043
7044 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7045 a call parameter. Such targets require special care as we haven't yet
7046 marked TARGET so that it's safe from being trashed by libcalls. We
7047 don't want to use TARGET for anything but the final result;
7048 Intermediate values must go elsewhere. Additionally, calls to
7049 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7050
7051 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7052 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7053 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7054 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7055 recursively. */
7056
7057 static rtx expand_expr_real_1 (tree, rtx, enum machine_mode,
7058 enum expand_modifier, rtx *);
7059
7060 rtx
7061 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7062 enum expand_modifier modifier, rtx *alt_rtl)
7063 {
7064 int rn = -1;
7065 rtx ret, last = NULL;
7066
7067 /* Handle ERROR_MARK before anybody tries to access its type. */
7068 if (TREE_CODE (exp) == ERROR_MARK
7069 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7070 {
7071 ret = CONST0_RTX (tmode);
7072 return ret ? ret : const0_rtx;
7073 }
7074
7075 if (flag_non_call_exceptions)
7076 {
7077 rn = lookup_expr_eh_region (exp);
7078
7079 /* If rn < 0, then either (1) tree-ssa not used or (2) doesn't throw. */
7080 if (rn >= 0)
7081 last = get_last_insn ();
7082 }
7083
7084 /* If this is an expression of some kind and it has an associated line
7085 number, then emit the line number before expanding the expression.
7086
7087 We need to save and restore the file and line information so that
7088 errors discovered during expansion are emitted with the right
7089 information. It would be better of the diagnostic routines
7090 used the file/line information embedded in the tree nodes rather
7091 than globals. */
7092 if (cfun && EXPR_HAS_LOCATION (exp))
7093 {
7094 location_t saved_location = input_location;
7095 input_location = EXPR_LOCATION (exp);
7096 set_curr_insn_source_location (input_location);
7097
7098 /* Record where the insns produced belong. */
7099 set_curr_insn_block (TREE_BLOCK (exp));
7100
7101 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7102
7103 input_location = saved_location;
7104 }
7105 else
7106 {
7107 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7108 }
7109
7110 /* If using non-call exceptions, mark all insns that may trap.
7111 expand_call() will mark CALL_INSNs before we get to this code,
7112 but it doesn't handle libcalls, and these may trap. */
7113 if (rn >= 0)
7114 {
7115 rtx insn;
7116 for (insn = next_real_insn (last); insn;
7117 insn = next_real_insn (insn))
7118 {
7119 if (! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
7120 /* If we want exceptions for non-call insns, any
7121 may_trap_p instruction may throw. */
7122 && GET_CODE (PATTERN (insn)) != CLOBBER
7123 && GET_CODE (PATTERN (insn)) != USE
7124 && (CALL_P (insn) || may_trap_p (PATTERN (insn))))
7125 add_reg_note (insn, REG_EH_REGION, GEN_INT (rn));
7126 }
7127 }
7128
7129 return ret;
7130 }
7131
7132 static rtx
7133 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
7134 enum expand_modifier modifier, rtx *alt_rtl)
7135 {
7136 rtx op0, op1, op2, temp, decl_rtl;
7137 tree type;
7138 int unsignedp;
7139 enum machine_mode mode;
7140 enum tree_code code = TREE_CODE (exp);
7141 optab this_optab;
7142 rtx subtarget, original_target;
7143 int ignore;
7144 tree context, subexp0, subexp1;
7145 bool reduce_bit_field;
7146 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
7147 ? reduce_to_bit_field_precision ((expr), \
7148 target, \
7149 type) \
7150 : (expr))
7151
7152 type = TREE_TYPE (exp);
7153 mode = TYPE_MODE (type);
7154 unsignedp = TYPE_UNSIGNED (type);
7155
7156 ignore = (target == const0_rtx
7157 || ((CONVERT_EXPR_CODE_P (code)
7158 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
7159 && TREE_CODE (type) == VOID_TYPE));
7160
7161 /* An operation in what may be a bit-field type needs the
7162 result to be reduced to the precision of the bit-field type,
7163 which is narrower than that of the type's mode. */
7164 reduce_bit_field = (!ignore
7165 && TREE_CODE (type) == INTEGER_TYPE
7166 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
7167
7168 /* If we are going to ignore this result, we need only do something
7169 if there is a side-effect somewhere in the expression. If there
7170 is, short-circuit the most common cases here. Note that we must
7171 not call expand_expr with anything but const0_rtx in case this
7172 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
7173
7174 if (ignore)
7175 {
7176 if (! TREE_SIDE_EFFECTS (exp))
7177 return const0_rtx;
7178
7179 /* Ensure we reference a volatile object even if value is ignored, but
7180 don't do this if all we are doing is taking its address. */
7181 if (TREE_THIS_VOLATILE (exp)
7182 && TREE_CODE (exp) != FUNCTION_DECL
7183 && mode != VOIDmode && mode != BLKmode
7184 && modifier != EXPAND_CONST_ADDRESS)
7185 {
7186 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
7187 if (MEM_P (temp))
7188 temp = copy_to_reg (temp);
7189 return const0_rtx;
7190 }
7191
7192 if (TREE_CODE_CLASS (code) == tcc_unary
7193 || code == COMPONENT_REF || code == INDIRECT_REF)
7194 return expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
7195 modifier);
7196
7197 else if (TREE_CODE_CLASS (code) == tcc_binary
7198 || TREE_CODE_CLASS (code) == tcc_comparison
7199 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
7200 {
7201 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, modifier);
7202 expand_expr (TREE_OPERAND (exp, 1), const0_rtx, VOIDmode, modifier);
7203 return const0_rtx;
7204 }
7205 else if (code == BIT_FIELD_REF)
7206 {
7207 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, modifier);
7208 expand_expr (TREE_OPERAND (exp, 1), const0_rtx, VOIDmode, modifier);
7209 expand_expr (TREE_OPERAND (exp, 2), const0_rtx, VOIDmode, modifier);
7210 return const0_rtx;
7211 }
7212
7213 target = 0;
7214 }
7215
7216 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
7217 target = 0;
7218
7219 /* Use subtarget as the target for operand 0 of a binary operation. */
7220 subtarget = get_subtarget (target);
7221 original_target = target;
7222
7223 switch (code)
7224 {
7225 case LABEL_DECL:
7226 {
7227 tree function = decl_function_context (exp);
7228
7229 temp = label_rtx (exp);
7230 temp = gen_rtx_LABEL_REF (Pmode, temp);
7231
7232 if (function != current_function_decl
7233 && function != 0)
7234 LABEL_REF_NONLOCAL_P (temp) = 1;
7235
7236 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
7237 return temp;
7238 }
7239
7240 case SSA_NAME:
7241 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
7242 NULL);
7243
7244 case PARM_DECL:
7245 case VAR_DECL:
7246 /* If a static var's type was incomplete when the decl was written,
7247 but the type is complete now, lay out the decl now. */
7248 if (DECL_SIZE (exp) == 0
7249 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
7250 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
7251 layout_decl (exp, 0);
7252
7253 /* TLS emulation hook - replace __thread vars with
7254 *__emutls_get_address (&_emutls.var). */
7255 if (! targetm.have_tls
7256 && TREE_CODE (exp) == VAR_DECL
7257 && DECL_THREAD_LOCAL_P (exp))
7258 {
7259 exp = build_fold_indirect_ref (emutls_var_address (exp));
7260 return expand_expr_real_1 (exp, target, tmode, modifier, NULL);
7261 }
7262
7263 /* ... fall through ... */
7264
7265 case FUNCTION_DECL:
7266 case RESULT_DECL:
7267 decl_rtl = DECL_RTL (exp);
7268 gcc_assert (decl_rtl);
7269 decl_rtl = copy_rtx (decl_rtl);
7270
7271 /* Ensure variable marked as used even if it doesn't go through
7272 a parser. If it hasn't be used yet, write out an external
7273 definition. */
7274 if (! TREE_USED (exp))
7275 {
7276 assemble_external (exp);
7277 TREE_USED (exp) = 1;
7278 }
7279
7280 /* Show we haven't gotten RTL for this yet. */
7281 temp = 0;
7282
7283 /* Variables inherited from containing functions should have
7284 been lowered by this point. */
7285 context = decl_function_context (exp);
7286 gcc_assert (!context
7287 || context == current_function_decl
7288 || TREE_STATIC (exp)
7289 /* ??? C++ creates functions that are not TREE_STATIC. */
7290 || TREE_CODE (exp) == FUNCTION_DECL);
7291
7292 /* This is the case of an array whose size is to be determined
7293 from its initializer, while the initializer is still being parsed.
7294 See expand_decl. */
7295
7296 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
7297 temp = validize_mem (decl_rtl);
7298
7299 /* If DECL_RTL is memory, we are in the normal case and the
7300 address is not valid, get the address into a register. */
7301
7302 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
7303 {
7304 if (alt_rtl)
7305 *alt_rtl = decl_rtl;
7306 decl_rtl = use_anchored_address (decl_rtl);
7307 if (modifier != EXPAND_CONST_ADDRESS
7308 && modifier != EXPAND_SUM
7309 && !memory_address_p (DECL_MODE (exp), XEXP (decl_rtl, 0)))
7310 temp = replace_equiv_address (decl_rtl,
7311 copy_rtx (XEXP (decl_rtl, 0)));
7312 }
7313
7314 /* If we got something, return it. But first, set the alignment
7315 if the address is a register. */
7316 if (temp != 0)
7317 {
7318 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
7319 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
7320
7321 return temp;
7322 }
7323
7324 /* If the mode of DECL_RTL does not match that of the decl, it
7325 must be a promoted value. We return a SUBREG of the wanted mode,
7326 but mark it so that we know that it was already extended. */
7327
7328 if (REG_P (decl_rtl)
7329 && GET_MODE (decl_rtl) != DECL_MODE (exp))
7330 {
7331 enum machine_mode pmode;
7332
7333 /* Get the signedness used for this variable. Ensure we get the
7334 same mode we got when the variable was declared. */
7335 pmode = promote_mode (type, DECL_MODE (exp), &unsignedp,
7336 (TREE_CODE (exp) == RESULT_DECL
7337 || TREE_CODE (exp) == PARM_DECL) ? 1 : 0);
7338 gcc_assert (GET_MODE (decl_rtl) == pmode);
7339
7340 temp = gen_lowpart_SUBREG (mode, decl_rtl);
7341 SUBREG_PROMOTED_VAR_P (temp) = 1;
7342 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
7343 return temp;
7344 }
7345
7346 return decl_rtl;
7347
7348 case INTEGER_CST:
7349 temp = immed_double_const (TREE_INT_CST_LOW (exp),
7350 TREE_INT_CST_HIGH (exp), mode);
7351
7352 return temp;
7353
7354 case VECTOR_CST:
7355 {
7356 tree tmp = NULL_TREE;
7357 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
7358 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
7359 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
7360 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
7361 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
7362 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
7363 return const_vector_from_tree (exp);
7364 if (GET_MODE_CLASS (mode) == MODE_INT)
7365 {
7366 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
7367 if (type_for_mode)
7368 tmp = fold_unary (VIEW_CONVERT_EXPR, type_for_mode, exp);
7369 }
7370 if (!tmp)
7371 tmp = build_constructor_from_list (type,
7372 TREE_VECTOR_CST_ELTS (exp));
7373 return expand_expr (tmp, ignore ? const0_rtx : target,
7374 tmode, modifier);
7375 }
7376
7377 case CONST_DECL:
7378 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
7379
7380 case REAL_CST:
7381 /* If optimized, generate immediate CONST_DOUBLE
7382 which will be turned into memory by reload if necessary.
7383
7384 We used to force a register so that loop.c could see it. But
7385 this does not allow gen_* patterns to perform optimizations with
7386 the constants. It also produces two insns in cases like "x = 1.0;".
7387 On most machines, floating-point constants are not permitted in
7388 many insns, so we'd end up copying it to a register in any case.
7389
7390 Now, we do the copying in expand_binop, if appropriate. */
7391 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
7392 TYPE_MODE (TREE_TYPE (exp)));
7393
7394 case FIXED_CST:
7395 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
7396 TYPE_MODE (TREE_TYPE (exp)));
7397
7398 case COMPLEX_CST:
7399 /* Handle evaluating a complex constant in a CONCAT target. */
7400 if (original_target && GET_CODE (original_target) == CONCAT)
7401 {
7402 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
7403 rtx rtarg, itarg;
7404
7405 rtarg = XEXP (original_target, 0);
7406 itarg = XEXP (original_target, 1);
7407
7408 /* Move the real and imaginary parts separately. */
7409 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
7410 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
7411
7412 if (op0 != rtarg)
7413 emit_move_insn (rtarg, op0);
7414 if (op1 != itarg)
7415 emit_move_insn (itarg, op1);
7416
7417 return original_target;
7418 }
7419
7420 /* ... fall through ... */
7421
7422 case STRING_CST:
7423 temp = expand_expr_constant (exp, 1, modifier);
7424
7425 /* temp contains a constant address.
7426 On RISC machines where a constant address isn't valid,
7427 make some insns to get that address into a register. */
7428 if (modifier != EXPAND_CONST_ADDRESS
7429 && modifier != EXPAND_INITIALIZER
7430 && modifier != EXPAND_SUM
7431 && ! memory_address_p (mode, XEXP (temp, 0)))
7432 return replace_equiv_address (temp,
7433 copy_rtx (XEXP (temp, 0)));
7434 return temp;
7435
7436 case SAVE_EXPR:
7437 {
7438 tree val = TREE_OPERAND (exp, 0);
7439 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
7440
7441 if (!SAVE_EXPR_RESOLVED_P (exp))
7442 {
7443 /* We can indeed still hit this case, typically via builtin
7444 expanders calling save_expr immediately before expanding
7445 something. Assume this means that we only have to deal
7446 with non-BLKmode values. */
7447 gcc_assert (GET_MODE (ret) != BLKmode);
7448
7449 val = build_decl (VAR_DECL, NULL, TREE_TYPE (exp));
7450 DECL_ARTIFICIAL (val) = 1;
7451 DECL_IGNORED_P (val) = 1;
7452 TREE_OPERAND (exp, 0) = val;
7453 SAVE_EXPR_RESOLVED_P (exp) = 1;
7454
7455 if (!CONSTANT_P (ret))
7456 ret = copy_to_reg (ret);
7457 SET_DECL_RTL (val, ret);
7458 }
7459
7460 return ret;
7461 }
7462
7463 case GOTO_EXPR:
7464 if (TREE_CODE (TREE_OPERAND (exp, 0)) == LABEL_DECL)
7465 expand_goto (TREE_OPERAND (exp, 0));
7466 else
7467 expand_computed_goto (TREE_OPERAND (exp, 0));
7468 return const0_rtx;
7469
7470 case CONSTRUCTOR:
7471 /* If we don't need the result, just ensure we evaluate any
7472 subexpressions. */
7473 if (ignore)
7474 {
7475 unsigned HOST_WIDE_INT idx;
7476 tree value;
7477
7478 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
7479 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
7480
7481 return const0_rtx;
7482 }
7483
7484 return expand_constructor (exp, target, modifier, false);
7485
7486 case MISALIGNED_INDIRECT_REF:
7487 case ALIGN_INDIRECT_REF:
7488 case INDIRECT_REF:
7489 {
7490 tree exp1 = TREE_OPERAND (exp, 0);
7491
7492 if (modifier != EXPAND_WRITE)
7493 {
7494 tree t;
7495
7496 t = fold_read_from_constant_string (exp);
7497 if (t)
7498 return expand_expr (t, target, tmode, modifier);
7499 }
7500
7501 op0 = expand_expr (exp1, NULL_RTX, VOIDmode, EXPAND_SUM);
7502 op0 = memory_address (mode, op0);
7503
7504 if (code == ALIGN_INDIRECT_REF)
7505 {
7506 int align = TYPE_ALIGN_UNIT (type);
7507 op0 = gen_rtx_AND (Pmode, op0, GEN_INT (-align));
7508 op0 = memory_address (mode, op0);
7509 }
7510
7511 temp = gen_rtx_MEM (mode, op0);
7512
7513 set_mem_attributes (temp, exp, 0);
7514
7515 /* Resolve the misalignment now, so that we don't have to remember
7516 to resolve it later. Of course, this only works for reads. */
7517 /* ??? When we get around to supporting writes, we'll have to handle
7518 this in store_expr directly. The vectorizer isn't generating
7519 those yet, however. */
7520 if (code == MISALIGNED_INDIRECT_REF)
7521 {
7522 int icode;
7523 rtx reg, insn;
7524
7525 gcc_assert (modifier == EXPAND_NORMAL
7526 || modifier == EXPAND_STACK_PARM);
7527
7528 /* The vectorizer should have already checked the mode. */
7529 icode = optab_handler (movmisalign_optab, mode)->insn_code;
7530 gcc_assert (icode != CODE_FOR_nothing);
7531
7532 /* We've already validated the memory, and we're creating a
7533 new pseudo destination. The predicates really can't fail. */
7534 reg = gen_reg_rtx (mode);
7535
7536 /* Nor can the insn generator. */
7537 insn = GEN_FCN (icode) (reg, temp);
7538 emit_insn (insn);
7539
7540 return reg;
7541 }
7542
7543 return temp;
7544 }
7545
7546 case TARGET_MEM_REF:
7547 {
7548 struct mem_address addr;
7549
7550 get_address_description (exp, &addr);
7551 op0 = addr_for_mem_ref (&addr, true);
7552 op0 = memory_address (mode, op0);
7553 temp = gen_rtx_MEM (mode, op0);
7554 set_mem_attributes (temp, TMR_ORIGINAL (exp), 0);
7555 }
7556 return temp;
7557
7558 case ARRAY_REF:
7559
7560 {
7561 tree array = TREE_OPERAND (exp, 0);
7562 tree index = TREE_OPERAND (exp, 1);
7563
7564 /* Fold an expression like: "foo"[2].
7565 This is not done in fold so it won't happen inside &.
7566 Don't fold if this is for wide characters since it's too
7567 difficult to do correctly and this is a very rare case. */
7568
7569 if (modifier != EXPAND_CONST_ADDRESS
7570 && modifier != EXPAND_INITIALIZER
7571 && modifier != EXPAND_MEMORY)
7572 {
7573 tree t = fold_read_from_constant_string (exp);
7574
7575 if (t)
7576 return expand_expr (t, target, tmode, modifier);
7577 }
7578
7579 /* If this is a constant index into a constant array,
7580 just get the value from the array. Handle both the cases when
7581 we have an explicit constructor and when our operand is a variable
7582 that was declared const. */
7583
7584 if (modifier != EXPAND_CONST_ADDRESS
7585 && modifier != EXPAND_INITIALIZER
7586 && modifier != EXPAND_MEMORY
7587 && TREE_CODE (array) == CONSTRUCTOR
7588 && ! TREE_SIDE_EFFECTS (array)
7589 && TREE_CODE (index) == INTEGER_CST)
7590 {
7591 unsigned HOST_WIDE_INT ix;
7592 tree field, value;
7593
7594 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
7595 field, value)
7596 if (tree_int_cst_equal (field, index))
7597 {
7598 if (!TREE_SIDE_EFFECTS (value))
7599 return expand_expr (fold (value), target, tmode, modifier);
7600 break;
7601 }
7602 }
7603
7604 else if (optimize >= 1
7605 && modifier != EXPAND_CONST_ADDRESS
7606 && modifier != EXPAND_INITIALIZER
7607 && modifier != EXPAND_MEMORY
7608 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
7609 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
7610 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
7611 && targetm.binds_local_p (array))
7612 {
7613 if (TREE_CODE (index) == INTEGER_CST)
7614 {
7615 tree init = DECL_INITIAL (array);
7616
7617 if (TREE_CODE (init) == CONSTRUCTOR)
7618 {
7619 unsigned HOST_WIDE_INT ix;
7620 tree field, value;
7621
7622 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
7623 field, value)
7624 if (tree_int_cst_equal (field, index))
7625 {
7626 if (TREE_SIDE_EFFECTS (value))
7627 break;
7628
7629 if (TREE_CODE (value) == CONSTRUCTOR)
7630 {
7631 /* If VALUE is a CONSTRUCTOR, this
7632 optimization is only useful if
7633 this doesn't store the CONSTRUCTOR
7634 into memory. If it does, it is more
7635 efficient to just load the data from
7636 the array directly. */
7637 rtx ret = expand_constructor (value, target,
7638 modifier, true);
7639 if (ret == NULL_RTX)
7640 break;
7641 }
7642
7643 return expand_expr (fold (value), target, tmode,
7644 modifier);
7645 }
7646 }
7647 else if(TREE_CODE (init) == STRING_CST)
7648 {
7649 tree index1 = index;
7650 tree low_bound = array_ref_low_bound (exp);
7651 index1 = fold_convert (sizetype, TREE_OPERAND (exp, 1));
7652
7653 /* Optimize the special-case of a zero lower bound.
7654
7655 We convert the low_bound to sizetype to avoid some problems
7656 with constant folding. (E.g. suppose the lower bound is 1,
7657 and its mode is QI. Without the conversion,l (ARRAY
7658 +(INDEX-(unsigned char)1)) becomes ((ARRAY+(-(unsigned char)1))
7659 +INDEX), which becomes (ARRAY+255+INDEX). Opps!) */
7660
7661 if (! integer_zerop (low_bound))
7662 index1 = size_diffop (index1, fold_convert (sizetype,
7663 low_bound));
7664
7665 if (0 > compare_tree_int (index1,
7666 TREE_STRING_LENGTH (init)))
7667 {
7668 tree type = TREE_TYPE (TREE_TYPE (init));
7669 enum machine_mode mode = TYPE_MODE (type);
7670
7671 if (GET_MODE_CLASS (mode) == MODE_INT
7672 && GET_MODE_SIZE (mode) == 1)
7673 return gen_int_mode (TREE_STRING_POINTER (init)
7674 [TREE_INT_CST_LOW (index1)],
7675 mode);
7676 }
7677 }
7678 }
7679 }
7680 }
7681 goto normal_inner_ref;
7682
7683 case COMPONENT_REF:
7684 /* If the operand is a CONSTRUCTOR, we can just extract the
7685 appropriate field if it is present. */
7686 if (TREE_CODE (TREE_OPERAND (exp, 0)) == CONSTRUCTOR)
7687 {
7688 unsigned HOST_WIDE_INT idx;
7689 tree field, value;
7690
7691 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (TREE_OPERAND (exp, 0)),
7692 idx, field, value)
7693 if (field == TREE_OPERAND (exp, 1)
7694 /* We can normally use the value of the field in the
7695 CONSTRUCTOR. However, if this is a bitfield in
7696 an integral mode that we can fit in a HOST_WIDE_INT,
7697 we must mask only the number of bits in the bitfield,
7698 since this is done implicitly by the constructor. If
7699 the bitfield does not meet either of those conditions,
7700 we can't do this optimization. */
7701 && (! DECL_BIT_FIELD (field)
7702 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
7703 && (GET_MODE_BITSIZE (DECL_MODE (field))
7704 <= HOST_BITS_PER_WIDE_INT))))
7705 {
7706 if (DECL_BIT_FIELD (field)
7707 && modifier == EXPAND_STACK_PARM)
7708 target = 0;
7709 op0 = expand_expr (value, target, tmode, modifier);
7710 if (DECL_BIT_FIELD (field))
7711 {
7712 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
7713 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
7714
7715 if (TYPE_UNSIGNED (TREE_TYPE (field)))
7716 {
7717 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
7718 op0 = expand_and (imode, op0, op1, target);
7719 }
7720 else
7721 {
7722 tree count
7723 = build_int_cst (NULL_TREE,
7724 GET_MODE_BITSIZE (imode) - bitsize);
7725
7726 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
7727 target, 0);
7728 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
7729 target, 0);
7730 }
7731 }
7732
7733 return op0;
7734 }
7735 }
7736 goto normal_inner_ref;
7737
7738 case BIT_FIELD_REF:
7739 case ARRAY_RANGE_REF:
7740 normal_inner_ref:
7741 {
7742 enum machine_mode mode1;
7743 HOST_WIDE_INT bitsize, bitpos;
7744 tree offset;
7745 int volatilep = 0;
7746 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7747 &mode1, &unsignedp, &volatilep, true);
7748 rtx orig_op0;
7749
7750 /* If we got back the original object, something is wrong. Perhaps
7751 we are evaluating an expression too early. In any event, don't
7752 infinitely recurse. */
7753 gcc_assert (tem != exp);
7754
7755 /* If TEM's type is a union of variable size, pass TARGET to the inner
7756 computation, since it will need a temporary and TARGET is known
7757 to have to do. This occurs in unchecked conversion in Ada. */
7758
7759 orig_op0 = op0
7760 = expand_expr (tem,
7761 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
7762 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
7763 != INTEGER_CST)
7764 && modifier != EXPAND_STACK_PARM
7765 ? target : NULL_RTX),
7766 VOIDmode,
7767 (modifier == EXPAND_INITIALIZER
7768 || modifier == EXPAND_CONST_ADDRESS
7769 || modifier == EXPAND_STACK_PARM)
7770 ? modifier : EXPAND_NORMAL);
7771
7772 /* If this is a constant, put it into a register if it is a legitimate
7773 constant, OFFSET is 0, and we won't try to extract outside the
7774 register (in case we were passed a partially uninitialized object
7775 or a view_conversion to a larger size) or a BLKmode piece of it
7776 (e.g. if it is unchecked-converted to a record type in Ada). Force
7777 the constant to memory otherwise. */
7778 if (CONSTANT_P (op0))
7779 {
7780 enum machine_mode mode = TYPE_MODE (TREE_TYPE (tem));
7781 if (mode != BLKmode && LEGITIMATE_CONSTANT_P (op0)
7782 && offset == 0
7783 && mode1 != BLKmode
7784 && bitpos + bitsize <= GET_MODE_BITSIZE (mode))
7785 op0 = force_reg (mode, op0);
7786 else
7787 op0 = validize_mem (force_const_mem (mode, op0));
7788 }
7789
7790 /* Otherwise, if this object not in memory and we either have an
7791 offset, a BLKmode result, or a reference outside the object, put it
7792 there. Such cases can occur in Ada if we have unchecked conversion
7793 of an expression from a scalar type to an array or record type or
7794 for an ARRAY_RANGE_REF whose type is BLKmode. */
7795 else if (!MEM_P (op0)
7796 && (offset != 0
7797 || mode1 == BLKmode
7798 || (bitpos + bitsize
7799 > GET_MODE_BITSIZE (GET_MODE (op0)))))
7800 {
7801 tree nt = build_qualified_type (TREE_TYPE (tem),
7802 (TYPE_QUALS (TREE_TYPE (tem))
7803 | TYPE_QUAL_CONST));
7804 rtx memloc = assign_temp (nt, 1, 1, 1);
7805
7806 emit_move_insn (memloc, op0);
7807 op0 = memloc;
7808 }
7809
7810 if (offset != 0)
7811 {
7812 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
7813 EXPAND_SUM);
7814
7815 gcc_assert (MEM_P (op0));
7816
7817 #ifdef POINTERS_EXTEND_UNSIGNED
7818 if (GET_MODE (offset_rtx) != Pmode)
7819 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
7820 #else
7821 if (GET_MODE (offset_rtx) != ptr_mode)
7822 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
7823 #endif
7824
7825 if (GET_MODE (op0) == BLKmode
7826 /* A constant address in OP0 can have VOIDmode, we must
7827 not try to call force_reg in that case. */
7828 && GET_MODE (XEXP (op0, 0)) != VOIDmode
7829 && bitsize != 0
7830 && (bitpos % bitsize) == 0
7831 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
7832 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
7833 {
7834 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
7835 bitpos = 0;
7836 }
7837
7838 op0 = offset_address (op0, offset_rtx,
7839 highest_pow2_factor (offset));
7840 }
7841
7842 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
7843 record its alignment as BIGGEST_ALIGNMENT. */
7844 if (MEM_P (op0) && bitpos == 0 && offset != 0
7845 && is_aligning_offset (offset, tem))
7846 set_mem_align (op0, BIGGEST_ALIGNMENT);
7847
7848 /* Don't forget about volatility even if this is a bitfield. */
7849 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
7850 {
7851 if (op0 == orig_op0)
7852 op0 = copy_rtx (op0);
7853
7854 MEM_VOLATILE_P (op0) = 1;
7855 }
7856
7857 /* The following code doesn't handle CONCAT.
7858 Assume only bitpos == 0 can be used for CONCAT, due to
7859 one element arrays having the same mode as its element. */
7860 if (GET_CODE (op0) == CONCAT)
7861 {
7862 gcc_assert (bitpos == 0
7863 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)));
7864 return op0;
7865 }
7866
7867 /* In cases where an aligned union has an unaligned object
7868 as a field, we might be extracting a BLKmode value from
7869 an integer-mode (e.g., SImode) object. Handle this case
7870 by doing the extract into an object as wide as the field
7871 (which we know to be the width of a basic mode), then
7872 storing into memory, and changing the mode to BLKmode. */
7873 if (mode1 == VOIDmode
7874 || REG_P (op0) || GET_CODE (op0) == SUBREG
7875 || (mode1 != BLKmode && ! direct_load[(int) mode1]
7876 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7877 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
7878 && modifier != EXPAND_CONST_ADDRESS
7879 && modifier != EXPAND_INITIALIZER)
7880 /* If the field isn't aligned enough to fetch as a memref,
7881 fetch it as a bit field. */
7882 || (mode1 != BLKmode
7883 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
7884 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
7885 || (MEM_P (op0)
7886 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
7887 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
7888 && ((modifier == EXPAND_CONST_ADDRESS
7889 || modifier == EXPAND_INITIALIZER)
7890 ? STRICT_ALIGNMENT
7891 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
7892 || (bitpos % BITS_PER_UNIT != 0)))
7893 /* If the type and the field are a constant size and the
7894 size of the type isn't the same size as the bitfield,
7895 we must use bitfield operations. */
7896 || (bitsize >= 0
7897 && TYPE_SIZE (TREE_TYPE (exp))
7898 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
7899 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
7900 bitsize)))
7901 {
7902 enum machine_mode ext_mode = mode;
7903
7904 if (ext_mode == BLKmode
7905 && ! (target != 0 && MEM_P (op0)
7906 && MEM_P (target)
7907 && bitpos % BITS_PER_UNIT == 0))
7908 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
7909
7910 if (ext_mode == BLKmode)
7911 {
7912 if (target == 0)
7913 target = assign_temp (type, 0, 1, 1);
7914
7915 if (bitsize == 0)
7916 return target;
7917
7918 /* In this case, BITPOS must start at a byte boundary and
7919 TARGET, if specified, must be a MEM. */
7920 gcc_assert (MEM_P (op0)
7921 && (!target || MEM_P (target))
7922 && !(bitpos % BITS_PER_UNIT));
7923
7924 emit_block_move (target,
7925 adjust_address (op0, VOIDmode,
7926 bitpos / BITS_PER_UNIT),
7927 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
7928 / BITS_PER_UNIT),
7929 (modifier == EXPAND_STACK_PARM
7930 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
7931
7932 return target;
7933 }
7934
7935 op0 = validize_mem (op0);
7936
7937 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
7938 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
7939
7940 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
7941 (modifier == EXPAND_STACK_PARM
7942 ? NULL_RTX : target),
7943 ext_mode, ext_mode);
7944
7945 /* If the result is a record type and BITSIZE is narrower than
7946 the mode of OP0, an integral mode, and this is a big endian
7947 machine, we must put the field into the high-order bits. */
7948 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
7949 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
7950 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
7951 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
7952 size_int (GET_MODE_BITSIZE (GET_MODE (op0))
7953 - bitsize),
7954 op0, 1);
7955
7956 /* If the result type is BLKmode, store the data into a temporary
7957 of the appropriate type, but with the mode corresponding to the
7958 mode for the data we have (op0's mode). It's tempting to make
7959 this a constant type, since we know it's only being stored once,
7960 but that can cause problems if we are taking the address of this
7961 COMPONENT_REF because the MEM of any reference via that address
7962 will have flags corresponding to the type, which will not
7963 necessarily be constant. */
7964 if (mode == BLKmode)
7965 {
7966 HOST_WIDE_INT size = GET_MODE_BITSIZE (ext_mode);
7967 rtx new_rtx;
7968
7969 /* If the reference doesn't use the alias set of its type,
7970 we cannot create the temporary using that type. */
7971 if (component_uses_parent_alias_set (exp))
7972 {
7973 new_rtx = assign_stack_local (ext_mode, size, 0);
7974 set_mem_alias_set (new_rtx, get_alias_set (exp));
7975 }
7976 else
7977 new_rtx = assign_stack_temp_for_type (ext_mode, size, 0, type);
7978
7979 emit_move_insn (new_rtx, op0);
7980 op0 = copy_rtx (new_rtx);
7981 PUT_MODE (op0, BLKmode);
7982 set_mem_attributes (op0, exp, 1);
7983 }
7984
7985 return op0;
7986 }
7987
7988 /* If the result is BLKmode, use that to access the object
7989 now as well. */
7990 if (mode == BLKmode)
7991 mode1 = BLKmode;
7992
7993 /* Get a reference to just this component. */
7994 if (modifier == EXPAND_CONST_ADDRESS
7995 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7996 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
7997 else
7998 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
7999
8000 if (op0 == orig_op0)
8001 op0 = copy_rtx (op0);
8002
8003 set_mem_attributes (op0, exp, 0);
8004 if (REG_P (XEXP (op0, 0)))
8005 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
8006
8007 MEM_VOLATILE_P (op0) |= volatilep;
8008 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
8009 || modifier == EXPAND_CONST_ADDRESS
8010 || modifier == EXPAND_INITIALIZER)
8011 return op0;
8012 else if (target == 0)
8013 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8014
8015 convert_move (target, op0, unsignedp);
8016 return target;
8017 }
8018
8019 case OBJ_TYPE_REF:
8020 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
8021
8022 case CALL_EXPR:
8023 /* All valid uses of __builtin_va_arg_pack () are removed during
8024 inlining. */
8025 if (CALL_EXPR_VA_ARG_PACK (exp))
8026 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
8027 {
8028 tree fndecl = get_callee_fndecl (exp), attr;
8029
8030 if (fndecl
8031 && (attr = lookup_attribute ("error",
8032 DECL_ATTRIBUTES (fndecl))) != NULL)
8033 error ("%Kcall to %qs declared with attribute error: %s",
8034 exp, lang_hooks.decl_printable_name (fndecl, 1),
8035 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
8036 if (fndecl
8037 && (attr = lookup_attribute ("warning",
8038 DECL_ATTRIBUTES (fndecl))) != NULL)
8039 warning (0, "%Kcall to %qs declared with attribute warning: %s",
8040 exp, lang_hooks.decl_printable_name (fndecl, 1),
8041 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
8042
8043 /* Check for a built-in function. */
8044 if (fndecl && DECL_BUILT_IN (fndecl))
8045 {
8046 if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_FRONTEND)
8047 return lang_hooks.expand_expr (exp, original_target,
8048 tmode, modifier, alt_rtl);
8049 else
8050 return expand_builtin (exp, target, subtarget, tmode, ignore);
8051 }
8052 }
8053 return expand_call (exp, target, ignore);
8054
8055 case PAREN_EXPR:
8056 CASE_CONVERT:
8057 if (TREE_OPERAND (exp, 0) == error_mark_node)
8058 return const0_rtx;
8059
8060 if (TREE_CODE (type) == UNION_TYPE)
8061 {
8062 tree valtype = TREE_TYPE (TREE_OPERAND (exp, 0));
8063
8064 /* If both input and output are BLKmode, this conversion isn't doing
8065 anything except possibly changing memory attribute. */
8066 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8067 {
8068 rtx result = expand_expr (TREE_OPERAND (exp, 0), target, tmode,
8069 modifier);
8070
8071 result = copy_rtx (result);
8072 set_mem_attributes (result, exp, 0);
8073 return result;
8074 }
8075
8076 if (target == 0)
8077 {
8078 if (TYPE_MODE (type) != BLKmode)
8079 target = gen_reg_rtx (TYPE_MODE (type));
8080 else
8081 target = assign_temp (type, 0, 1, 1);
8082 }
8083
8084 if (MEM_P (target))
8085 /* Store data into beginning of memory target. */
8086 store_expr (TREE_OPERAND (exp, 0),
8087 adjust_address (target, TYPE_MODE (valtype), 0),
8088 modifier == EXPAND_STACK_PARM,
8089 false);
8090
8091 else
8092 {
8093 gcc_assert (REG_P (target));
8094
8095 /* Store this field into a union of the proper type. */
8096 store_field (target,
8097 MIN ((int_size_in_bytes (TREE_TYPE
8098 (TREE_OPERAND (exp, 0)))
8099 * BITS_PER_UNIT),
8100 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8101 0, TYPE_MODE (valtype), TREE_OPERAND (exp, 0),
8102 type, 0, false);
8103 }
8104
8105 /* Return the entire union. */
8106 return target;
8107 }
8108
8109 if (mode == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))))
8110 {
8111 op0 = expand_expr (TREE_OPERAND (exp, 0), target, VOIDmode,
8112 modifier);
8113
8114 /* If the signedness of the conversion differs and OP0 is
8115 a promoted SUBREG, clear that indication since we now
8116 have to do the proper extension. */
8117 if (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))) != unsignedp
8118 && GET_CODE (op0) == SUBREG)
8119 SUBREG_PROMOTED_VAR_P (op0) = 0;
8120
8121 return REDUCE_BIT_FIELD (op0);
8122 }
8123
8124 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, mode,
8125 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8126 if (GET_MODE (op0) == mode)
8127 ;
8128
8129 /* If OP0 is a constant, just convert it into the proper mode. */
8130 else if (CONSTANT_P (op0))
8131 {
8132 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
8133 enum machine_mode inner_mode = TYPE_MODE (inner_type);
8134
8135 if (modifier == EXPAND_INITIALIZER)
8136 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8137 subreg_lowpart_offset (mode,
8138 inner_mode));
8139 else
8140 op0= convert_modes (mode, inner_mode, op0,
8141 TYPE_UNSIGNED (inner_type));
8142 }
8143
8144 else if (modifier == EXPAND_INITIALIZER)
8145 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8146
8147 else if (target == 0)
8148 op0 = convert_to_mode (mode, op0,
8149 TYPE_UNSIGNED (TREE_TYPE
8150 (TREE_OPERAND (exp, 0))));
8151 else
8152 {
8153 convert_move (target, op0,
8154 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
8155 op0 = target;
8156 }
8157
8158 return REDUCE_BIT_FIELD (op0);
8159
8160 case VIEW_CONVERT_EXPR:
8161 op0 = NULL_RTX;
8162
8163 /* If we are converting to BLKmode, try to avoid an intermediate
8164 temporary by fetching an inner memory reference. */
8165 if (mode == BLKmode
8166 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
8167 && TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))) != BLKmode
8168 && handled_component_p (TREE_OPERAND (exp, 0)))
8169 {
8170 enum machine_mode mode1;
8171 HOST_WIDE_INT bitsize, bitpos;
8172 tree offset;
8173 int unsignedp;
8174 int volatilep = 0;
8175 tree tem
8176 = get_inner_reference (TREE_OPERAND (exp, 0), &bitsize, &bitpos,
8177 &offset, &mode1, &unsignedp, &volatilep,
8178 true);
8179 rtx orig_op0;
8180
8181 /* ??? We should work harder and deal with non-zero offsets. */
8182 if (!offset
8183 && (bitpos % BITS_PER_UNIT) == 0
8184 && bitsize >= 0
8185 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) == 0)
8186 {
8187 /* See the normal_inner_ref case for the rationale. */
8188 orig_op0
8189 = expand_expr (tem,
8190 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
8191 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
8192 != INTEGER_CST)
8193 && modifier != EXPAND_STACK_PARM
8194 ? target : NULL_RTX),
8195 VOIDmode,
8196 (modifier == EXPAND_INITIALIZER
8197 || modifier == EXPAND_CONST_ADDRESS
8198 || modifier == EXPAND_STACK_PARM)
8199 ? modifier : EXPAND_NORMAL);
8200
8201 if (MEM_P (orig_op0))
8202 {
8203 op0 = orig_op0;
8204
8205 /* Get a reference to just this component. */
8206 if (modifier == EXPAND_CONST_ADDRESS
8207 || modifier == EXPAND_SUM
8208 || modifier == EXPAND_INITIALIZER)
8209 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
8210 else
8211 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
8212
8213 if (op0 == orig_op0)
8214 op0 = copy_rtx (op0);
8215
8216 set_mem_attributes (op0, TREE_OPERAND (exp, 0), 0);
8217 if (REG_P (XEXP (op0, 0)))
8218 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
8219
8220 MEM_VOLATILE_P (op0) |= volatilep;
8221 }
8222 }
8223 }
8224
8225 if (!op0)
8226 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, mode, modifier);
8227
8228 /* If the input and output modes are both the same, we are done. */
8229 if (mode == GET_MODE (op0))
8230 ;
8231 /* If neither mode is BLKmode, and both modes are the same size
8232 then we can use gen_lowpart. */
8233 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
8234 && GET_MODE_SIZE (mode) == GET_MODE_SIZE (GET_MODE (op0)))
8235 {
8236 if (GET_CODE (op0) == SUBREG)
8237 op0 = force_reg (GET_MODE (op0), op0);
8238 op0 = gen_lowpart (mode, op0);
8239 }
8240 /* If both modes are integral, then we can convert from one to the
8241 other. */
8242 else if (SCALAR_INT_MODE_P (GET_MODE (op0)) && SCALAR_INT_MODE_P (mode))
8243 op0 = convert_modes (mode, GET_MODE (op0), op0,
8244 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
8245 /* As a last resort, spill op0 to memory, and reload it in a
8246 different mode. */
8247 else if (!MEM_P (op0))
8248 {
8249 /* If the operand is not a MEM, force it into memory. Since we
8250 are going to be changing the mode of the MEM, don't call
8251 force_const_mem for constants because we don't allow pool
8252 constants to change mode. */
8253 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
8254
8255 gcc_assert (!TREE_ADDRESSABLE (exp));
8256
8257 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
8258 target
8259 = assign_stack_temp_for_type
8260 (TYPE_MODE (inner_type),
8261 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
8262
8263 emit_move_insn (target, op0);
8264 op0 = target;
8265 }
8266
8267 /* At this point, OP0 is in the correct mode. If the output type is
8268 such that the operand is known to be aligned, indicate that it is.
8269 Otherwise, we need only be concerned about alignment for non-BLKmode
8270 results. */
8271 if (MEM_P (op0))
8272 {
8273 op0 = copy_rtx (op0);
8274
8275 if (TYPE_ALIGN_OK (type))
8276 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
8277 else if (STRICT_ALIGNMENT
8278 && mode != BLKmode
8279 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
8280 {
8281 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
8282 HOST_WIDE_INT temp_size
8283 = MAX (int_size_in_bytes (inner_type),
8284 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
8285 rtx new_rtx
8286 = assign_stack_temp_for_type (mode, temp_size, 0, type);
8287 rtx new_with_op0_mode
8288 = adjust_address (new_rtx, GET_MODE (op0), 0);
8289
8290 gcc_assert (!TREE_ADDRESSABLE (exp));
8291
8292 if (GET_MODE (op0) == BLKmode)
8293 emit_block_move (new_with_op0_mode, op0,
8294 GEN_INT (GET_MODE_SIZE (mode)),
8295 (modifier == EXPAND_STACK_PARM
8296 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
8297 else
8298 emit_move_insn (new_with_op0_mode, op0);
8299
8300 op0 = new_rtx;
8301 }
8302
8303 op0 = adjust_address (op0, mode, 0);
8304 }
8305
8306 return op0;
8307
8308 case POINTER_PLUS_EXPR:
8309 /* Even though the sizetype mode and the pointer's mode can be different
8310 expand is able to handle this correctly and get the correct result out
8311 of the PLUS_EXPR code. */
8312 case PLUS_EXPR:
8313
8314 /* Check if this is a case for multiplication and addition. */
8315 if ((TREE_CODE (type) == INTEGER_TYPE
8316 || TREE_CODE (type) == FIXED_POINT_TYPE)
8317 && TREE_CODE (TREE_OPERAND (exp, 0)) == MULT_EXPR)
8318 {
8319 tree subsubexp0, subsubexp1;
8320 enum tree_code code0, code1, this_code;
8321
8322 subexp0 = TREE_OPERAND (exp, 0);
8323 subsubexp0 = TREE_OPERAND (subexp0, 0);
8324 subsubexp1 = TREE_OPERAND (subexp0, 1);
8325 code0 = TREE_CODE (subsubexp0);
8326 code1 = TREE_CODE (subsubexp1);
8327 this_code = TREE_CODE (type) == INTEGER_TYPE ? NOP_EXPR
8328 : FIXED_CONVERT_EXPR;
8329 if (code0 == this_code && code1 == this_code
8330 && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (subsubexp0, 0)))
8331 < TYPE_PRECISION (TREE_TYPE (subsubexp0)))
8332 && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (subsubexp0, 0)))
8333 == TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (subsubexp1, 0))))
8334 && (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (subsubexp0, 0)))
8335 == TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (subsubexp1, 0)))))
8336 {
8337 tree op0type = TREE_TYPE (TREE_OPERAND (subsubexp0, 0));
8338 enum machine_mode innermode = TYPE_MODE (op0type);
8339 bool zextend_p = TYPE_UNSIGNED (op0type);
8340 bool sat_p = TYPE_SATURATING (TREE_TYPE (subsubexp0));
8341 if (sat_p == 0)
8342 this_optab = zextend_p ? umadd_widen_optab : smadd_widen_optab;
8343 else
8344 this_optab = zextend_p ? usmadd_widen_optab
8345 : ssmadd_widen_optab;
8346 if (mode == GET_MODE_2XWIDER_MODE (innermode)
8347 && (optab_handler (this_optab, mode)->insn_code
8348 != CODE_FOR_nothing))
8349 {
8350 expand_operands (TREE_OPERAND (subsubexp0, 0),
8351 TREE_OPERAND (subsubexp1, 0),
8352 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8353 op2 = expand_expr (TREE_OPERAND (exp, 1), subtarget,
8354 VOIDmode, EXPAND_NORMAL);
8355 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8356 target, unsignedp);
8357 gcc_assert (temp);
8358 return REDUCE_BIT_FIELD (temp);
8359 }
8360 }
8361 }
8362
8363 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8364 something else, make sure we add the register to the constant and
8365 then to the other thing. This case can occur during strength
8366 reduction and doing it this way will produce better code if the
8367 frame pointer or argument pointer is eliminated.
8368
8369 fold-const.c will ensure that the constant is always in the inner
8370 PLUS_EXPR, so the only case we need to do anything about is if
8371 sp, ap, or fp is our second argument, in which case we must swap
8372 the innermost first argument and our second argument. */
8373
8374 if (TREE_CODE (TREE_OPERAND (exp, 0)) == PLUS_EXPR
8375 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 1)) == INTEGER_CST
8376 && TREE_CODE (TREE_OPERAND (exp, 1)) == VAR_DECL
8377 && (DECL_RTL (TREE_OPERAND (exp, 1)) == frame_pointer_rtx
8378 || DECL_RTL (TREE_OPERAND (exp, 1)) == stack_pointer_rtx
8379 || DECL_RTL (TREE_OPERAND (exp, 1)) == arg_pointer_rtx))
8380 {
8381 tree t = TREE_OPERAND (exp, 1);
8382
8383 TREE_OPERAND (exp, 1) = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
8384 TREE_OPERAND (TREE_OPERAND (exp, 0), 0) = t;
8385 }
8386
8387 /* If the result is to be ptr_mode and we are adding an integer to
8388 something, we might be forming a constant. So try to use
8389 plus_constant. If it produces a sum and we can't accept it,
8390 use force_operand. This allows P = &ARR[const] to generate
8391 efficient code on machines where a SYMBOL_REF is not a valid
8392 address.
8393
8394 If this is an EXPAND_SUM call, always return the sum. */
8395 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8396 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8397 {
8398 if (modifier == EXPAND_STACK_PARM)
8399 target = 0;
8400 if (TREE_CODE (TREE_OPERAND (exp, 0)) == INTEGER_CST
8401 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
8402 && TREE_CONSTANT (TREE_OPERAND (exp, 1)))
8403 {
8404 rtx constant_part;
8405
8406 op1 = expand_expr (TREE_OPERAND (exp, 1), subtarget, VOIDmode,
8407 EXPAND_SUM);
8408 /* Use immed_double_const to ensure that the constant is
8409 truncated according to the mode of OP1, then sign extended
8410 to a HOST_WIDE_INT. Using the constant directly can result
8411 in non-canonical RTL in a 64x32 cross compile. */
8412 constant_part
8413 = immed_double_const (TREE_INT_CST_LOW (TREE_OPERAND (exp, 0)),
8414 (HOST_WIDE_INT) 0,
8415 TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 1))));
8416 op1 = plus_constant (op1, INTVAL (constant_part));
8417 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8418 op1 = force_operand (op1, target);
8419 return REDUCE_BIT_FIELD (op1);
8420 }
8421
8422 else if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST
8423 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
8424 && TREE_CONSTANT (TREE_OPERAND (exp, 0)))
8425 {
8426 rtx constant_part;
8427
8428 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode,
8429 (modifier == EXPAND_INITIALIZER
8430 ? EXPAND_INITIALIZER : EXPAND_SUM));
8431 if (! CONSTANT_P (op0))
8432 {
8433 op1 = expand_expr (TREE_OPERAND (exp, 1), NULL_RTX,
8434 VOIDmode, modifier);
8435 /* Return a PLUS if modifier says it's OK. */
8436 if (modifier == EXPAND_SUM
8437 || modifier == EXPAND_INITIALIZER)
8438 return simplify_gen_binary (PLUS, mode, op0, op1);
8439 goto binop2;
8440 }
8441 /* Use immed_double_const to ensure that the constant is
8442 truncated according to the mode of OP1, then sign extended
8443 to a HOST_WIDE_INT. Using the constant directly can result
8444 in non-canonical RTL in a 64x32 cross compile. */
8445 constant_part
8446 = immed_double_const (TREE_INT_CST_LOW (TREE_OPERAND (exp, 1)),
8447 (HOST_WIDE_INT) 0,
8448 TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))));
8449 op0 = plus_constant (op0, INTVAL (constant_part));
8450 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8451 op0 = force_operand (op0, target);
8452 return REDUCE_BIT_FIELD (op0);
8453 }
8454 }
8455
8456 /* No sense saving up arithmetic to be done
8457 if it's all in the wrong mode to form part of an address.
8458 And force_operand won't know whether to sign-extend or
8459 zero-extend. */
8460 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8461 || mode != ptr_mode)
8462 {
8463 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8464 subtarget, &op0, &op1, 0);
8465 if (op0 == const0_rtx)
8466 return op1;
8467 if (op1 == const0_rtx)
8468 return op0;
8469 goto binop2;
8470 }
8471
8472 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8473 subtarget, &op0, &op1, modifier);
8474 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8475
8476 case MINUS_EXPR:
8477 /* Check if this is a case for multiplication and subtraction. */
8478 if ((TREE_CODE (type) == INTEGER_TYPE
8479 || TREE_CODE (type) == FIXED_POINT_TYPE)
8480 && TREE_CODE (TREE_OPERAND (exp, 1)) == MULT_EXPR)
8481 {
8482 tree subsubexp0, subsubexp1;
8483 enum tree_code code0, code1, this_code;
8484
8485 subexp1 = TREE_OPERAND (exp, 1);
8486 subsubexp0 = TREE_OPERAND (subexp1, 0);
8487 subsubexp1 = TREE_OPERAND (subexp1, 1);
8488 code0 = TREE_CODE (subsubexp0);
8489 code1 = TREE_CODE (subsubexp1);
8490 this_code = TREE_CODE (type) == INTEGER_TYPE ? NOP_EXPR
8491 : FIXED_CONVERT_EXPR;
8492 if (code0 == this_code && code1 == this_code
8493 && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (subsubexp0, 0)))
8494 < TYPE_PRECISION (TREE_TYPE (subsubexp0)))
8495 && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (subsubexp0, 0)))
8496 == TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (subsubexp1, 0))))
8497 && (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (subsubexp0, 0)))
8498 == TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (subsubexp1, 0)))))
8499 {
8500 tree op0type = TREE_TYPE (TREE_OPERAND (subsubexp0, 0));
8501 enum machine_mode innermode = TYPE_MODE (op0type);
8502 bool zextend_p = TYPE_UNSIGNED (op0type);
8503 bool sat_p = TYPE_SATURATING (TREE_TYPE (subsubexp0));
8504 if (sat_p == 0)
8505 this_optab = zextend_p ? umsub_widen_optab : smsub_widen_optab;
8506 else
8507 this_optab = zextend_p ? usmsub_widen_optab
8508 : ssmsub_widen_optab;
8509 if (mode == GET_MODE_2XWIDER_MODE (innermode)
8510 && (optab_handler (this_optab, mode)->insn_code
8511 != CODE_FOR_nothing))
8512 {
8513 expand_operands (TREE_OPERAND (subsubexp0, 0),
8514 TREE_OPERAND (subsubexp1, 0),
8515 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8516 op2 = expand_expr (TREE_OPERAND (exp, 0), subtarget,
8517 VOIDmode, EXPAND_NORMAL);
8518 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8519 target, unsignedp);
8520 gcc_assert (temp);
8521 return REDUCE_BIT_FIELD (temp);
8522 }
8523 }
8524 }
8525
8526 /* For initializers, we are allowed to return a MINUS of two
8527 symbolic constants. Here we handle all cases when both operands
8528 are constant. */
8529 /* Handle difference of two symbolic constants,
8530 for the sake of an initializer. */
8531 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8532 && really_constant_p (TREE_OPERAND (exp, 0))
8533 && really_constant_p (TREE_OPERAND (exp, 1)))
8534 {
8535 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8536 NULL_RTX, &op0, &op1, modifier);
8537
8538 /* If the last operand is a CONST_INT, use plus_constant of
8539 the negated constant. Else make the MINUS. */
8540 if (GET_CODE (op1) == CONST_INT)
8541 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
8542 else
8543 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8544 }
8545
8546 /* No sense saving up arithmetic to be done
8547 if it's all in the wrong mode to form part of an address.
8548 And force_operand won't know whether to sign-extend or
8549 zero-extend. */
8550 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8551 || mode != ptr_mode)
8552 goto binop;
8553
8554 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8555 subtarget, &op0, &op1, modifier);
8556
8557 /* Convert A - const to A + (-const). */
8558 if (GET_CODE (op1) == CONST_INT)
8559 {
8560 op1 = negate_rtx (mode, op1);
8561 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8562 }
8563
8564 goto binop2;
8565
8566 case MULT_EXPR:
8567 /* If this is a fixed-point operation, then we cannot use the code
8568 below because "expand_mult" doesn't support sat/no-sat fixed-point
8569 multiplications. */
8570 if (ALL_FIXED_POINT_MODE_P (mode))
8571 goto binop;
8572
8573 /* If first operand is constant, swap them.
8574 Thus the following special case checks need only
8575 check the second operand. */
8576 if (TREE_CODE (TREE_OPERAND (exp, 0)) == INTEGER_CST)
8577 {
8578 tree t1 = TREE_OPERAND (exp, 0);
8579 TREE_OPERAND (exp, 0) = TREE_OPERAND (exp, 1);
8580 TREE_OPERAND (exp, 1) = t1;
8581 }
8582
8583 /* Attempt to return something suitable for generating an
8584 indexed address, for machines that support that. */
8585
8586 if (modifier == EXPAND_SUM && mode == ptr_mode
8587 && host_integerp (TREE_OPERAND (exp, 1), 0))
8588 {
8589 tree exp1 = TREE_OPERAND (exp, 1);
8590
8591 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode,
8592 EXPAND_SUM);
8593
8594 if (!REG_P (op0))
8595 op0 = force_operand (op0, NULL_RTX);
8596 if (!REG_P (op0))
8597 op0 = copy_to_mode_reg (mode, op0);
8598
8599 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8600 gen_int_mode (tree_low_cst (exp1, 0),
8601 TYPE_MODE (TREE_TYPE (exp1)))));
8602 }
8603
8604 if (modifier == EXPAND_STACK_PARM)
8605 target = 0;
8606
8607 /* Check for multiplying things that have been extended
8608 from a narrower type. If this machine supports multiplying
8609 in that narrower type with a result in the desired type,
8610 do it that way, and avoid the explicit type-conversion. */
8611
8612 subexp0 = TREE_OPERAND (exp, 0);
8613 subexp1 = TREE_OPERAND (exp, 1);
8614 /* First, check if we have a multiplication of one signed and one
8615 unsigned operand. */
8616 if (TREE_CODE (subexp0) == NOP_EXPR
8617 && TREE_CODE (subexp1) == NOP_EXPR
8618 && TREE_CODE (type) == INTEGER_TYPE
8619 && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (subexp0, 0)))
8620 < TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (exp, 0))))
8621 && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (subexp0, 0)))
8622 == TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (subexp1, 0))))
8623 && (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (subexp0, 0)))
8624 != TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (subexp1, 0)))))
8625 {
8626 enum machine_mode innermode
8627 = TYPE_MODE (TREE_TYPE (TREE_OPERAND (subexp0, 0)));
8628 this_optab = usmul_widen_optab;
8629 if (mode == GET_MODE_WIDER_MODE (innermode))
8630 {
8631 if (optab_handler (this_optab, mode)->insn_code != CODE_FOR_nothing)
8632 {
8633 if (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (subexp0, 0))))
8634 expand_operands (TREE_OPERAND (subexp0, 0),
8635 TREE_OPERAND (subexp1, 0),
8636 NULL_RTX, &op0, &op1, 0);
8637 else
8638 expand_operands (TREE_OPERAND (subexp0, 0),
8639 TREE_OPERAND (subexp1, 0),
8640 NULL_RTX, &op1, &op0, 0);
8641
8642 goto binop3;
8643 }
8644 }
8645 }
8646 /* Check for a multiplication with matching signedness. */
8647 else if (TREE_CODE (TREE_OPERAND (exp, 0)) == NOP_EXPR
8648 && TREE_CODE (type) == INTEGER_TYPE
8649 && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
8650 < TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (exp, 0))))
8651 && ((TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST
8652 && int_fits_type_p (TREE_OPERAND (exp, 1),
8653 TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
8654 /* Don't use a widening multiply if a shift will do. */
8655 && ((GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 1))))
8656 > HOST_BITS_PER_WIDE_INT)
8657 || exact_log2 (TREE_INT_CST_LOW (TREE_OPERAND (exp, 1))) < 0))
8658 ||
8659 (TREE_CODE (TREE_OPERAND (exp, 1)) == NOP_EXPR
8660 && (TYPE_PRECISION (TREE_TYPE
8661 (TREE_OPERAND (TREE_OPERAND (exp, 1), 0)))
8662 == TYPE_PRECISION (TREE_TYPE
8663 (TREE_OPERAND
8664 (TREE_OPERAND (exp, 0), 0))))
8665 /* If both operands are extended, they must either both
8666 be zero-extended or both be sign-extended. */
8667 && (TYPE_UNSIGNED (TREE_TYPE
8668 (TREE_OPERAND (TREE_OPERAND (exp, 1), 0)))
8669 == TYPE_UNSIGNED (TREE_TYPE
8670 (TREE_OPERAND
8671 (TREE_OPERAND (exp, 0), 0)))))))
8672 {
8673 tree op0type = TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0));
8674 enum machine_mode innermode = TYPE_MODE (op0type);
8675 bool zextend_p = TYPE_UNSIGNED (op0type);
8676 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8677 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8678
8679 if (mode == GET_MODE_2XWIDER_MODE (innermode))
8680 {
8681 if (optab_handler (this_optab, mode)->insn_code != CODE_FOR_nothing)
8682 {
8683 if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST)
8684 expand_operands (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
8685 TREE_OPERAND (exp, 1),
8686 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8687 else
8688 expand_operands (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
8689 TREE_OPERAND (TREE_OPERAND (exp, 1), 0),
8690 NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8691 goto binop3;
8692 }
8693 else if (optab_handler (other_optab, mode)->insn_code != CODE_FOR_nothing
8694 && innermode == word_mode)
8695 {
8696 rtx htem, hipart;
8697 op0 = expand_normal (TREE_OPERAND (TREE_OPERAND (exp, 0), 0));
8698 if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST)
8699 op1 = convert_modes (innermode, mode,
8700 expand_normal (TREE_OPERAND (exp, 1)),
8701 unsignedp);
8702 else
8703 op1 = expand_normal (TREE_OPERAND (TREE_OPERAND (exp, 1), 0));
8704 temp = expand_binop (mode, other_optab, op0, op1, target,
8705 unsignedp, OPTAB_LIB_WIDEN);
8706 hipart = gen_highpart (innermode, temp);
8707 htem = expand_mult_highpart_adjust (innermode, hipart,
8708 op0, op1, hipart,
8709 zextend_p);
8710 if (htem != hipart)
8711 emit_move_insn (hipart, htem);
8712 return REDUCE_BIT_FIELD (temp);
8713 }
8714 }
8715 }
8716 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8717 subtarget, &op0, &op1, 0);
8718 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8719
8720 case TRUNC_DIV_EXPR:
8721 case FLOOR_DIV_EXPR:
8722 case CEIL_DIV_EXPR:
8723 case ROUND_DIV_EXPR:
8724 case EXACT_DIV_EXPR:
8725 /* If this is a fixed-point operation, then we cannot use the code
8726 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8727 divisions. */
8728 if (ALL_FIXED_POINT_MODE_P (mode))
8729 goto binop;
8730
8731 if (modifier == EXPAND_STACK_PARM)
8732 target = 0;
8733 /* Possible optimization: compute the dividend with EXPAND_SUM
8734 then if the divisor is constant can optimize the case
8735 where some terms of the dividend have coeffs divisible by it. */
8736 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8737 subtarget, &op0, &op1, 0);
8738 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8739
8740 case RDIV_EXPR:
8741 goto binop;
8742
8743 case TRUNC_MOD_EXPR:
8744 case FLOOR_MOD_EXPR:
8745 case CEIL_MOD_EXPR:
8746 case ROUND_MOD_EXPR:
8747 if (modifier == EXPAND_STACK_PARM)
8748 target = 0;
8749 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8750 subtarget, &op0, &op1, 0);
8751 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8752
8753 case FIXED_CONVERT_EXPR:
8754 op0 = expand_normal (TREE_OPERAND (exp, 0));
8755 if (target == 0 || modifier == EXPAND_STACK_PARM)
8756 target = gen_reg_rtx (mode);
8757
8758 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == INTEGER_TYPE
8759 && TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))))
8760 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8761 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8762 else
8763 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8764 return target;
8765
8766 case FIX_TRUNC_EXPR:
8767 op0 = expand_normal (TREE_OPERAND (exp, 0));
8768 if (target == 0 || modifier == EXPAND_STACK_PARM)
8769 target = gen_reg_rtx (mode);
8770 expand_fix (target, op0, unsignedp);
8771 return target;
8772
8773 case FLOAT_EXPR:
8774 op0 = expand_normal (TREE_OPERAND (exp, 0));
8775 if (target == 0 || modifier == EXPAND_STACK_PARM)
8776 target = gen_reg_rtx (mode);
8777 /* expand_float can't figure out what to do if FROM has VOIDmode.
8778 So give it the correct mode. With -O, cse will optimize this. */
8779 if (GET_MODE (op0) == VOIDmode)
8780 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))),
8781 op0);
8782 expand_float (target, op0,
8783 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
8784 return target;
8785
8786 case NEGATE_EXPR:
8787 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget,
8788 VOIDmode, EXPAND_NORMAL);
8789 if (modifier == EXPAND_STACK_PARM)
8790 target = 0;
8791 temp = expand_unop (mode,
8792 optab_for_tree_code (NEGATE_EXPR, type,
8793 optab_default),
8794 op0, target, 0);
8795 gcc_assert (temp);
8796 return REDUCE_BIT_FIELD (temp);
8797
8798 case ABS_EXPR:
8799 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget,
8800 VOIDmode, EXPAND_NORMAL);
8801 if (modifier == EXPAND_STACK_PARM)
8802 target = 0;
8803
8804 /* ABS_EXPR is not valid for complex arguments. */
8805 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8806 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8807
8808 /* Unsigned abs is simply the operand. Testing here means we don't
8809 risk generating incorrect code below. */
8810 if (TYPE_UNSIGNED (type))
8811 return op0;
8812
8813 return expand_abs (mode, op0, target, unsignedp,
8814 safe_from_p (target, TREE_OPERAND (exp, 0), 1));
8815
8816 case MAX_EXPR:
8817 case MIN_EXPR:
8818 target = original_target;
8819 if (target == 0
8820 || modifier == EXPAND_STACK_PARM
8821 || (MEM_P (target) && MEM_VOLATILE_P (target))
8822 || GET_MODE (target) != mode
8823 || (REG_P (target)
8824 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8825 target = gen_reg_rtx (mode);
8826 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8827 target, &op0, &op1, 0);
8828
8829 /* First try to do it with a special MIN or MAX instruction.
8830 If that does not win, use a conditional jump to select the proper
8831 value. */
8832 this_optab = optab_for_tree_code (code, type, optab_default);
8833 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8834 OPTAB_WIDEN);
8835 if (temp != 0)
8836 return temp;
8837
8838 /* At this point, a MEM target is no longer useful; we will get better
8839 code without it. */
8840
8841 if (! REG_P (target))
8842 target = gen_reg_rtx (mode);
8843
8844 /* If op1 was placed in target, swap op0 and op1. */
8845 if (target != op0 && target == op1)
8846 {
8847 temp = op0;
8848 op0 = op1;
8849 op1 = temp;
8850 }
8851
8852 /* We generate better code and avoid problems with op1 mentioning
8853 target by forcing op1 into a pseudo if it isn't a constant. */
8854 if (! CONSTANT_P (op1))
8855 op1 = force_reg (mode, op1);
8856
8857 {
8858 enum rtx_code comparison_code;
8859 rtx cmpop1 = op1;
8860
8861 if (code == MAX_EXPR)
8862 comparison_code = unsignedp ? GEU : GE;
8863 else
8864 comparison_code = unsignedp ? LEU : LE;
8865
8866 /* Canonicalize to comparisons against 0. */
8867 if (op1 == const1_rtx)
8868 {
8869 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8870 or (a != 0 ? a : 1) for unsigned.
8871 For MIN we are safe converting (a <= 1 ? a : 1)
8872 into (a <= 0 ? a : 1) */
8873 cmpop1 = const0_rtx;
8874 if (code == MAX_EXPR)
8875 comparison_code = unsignedp ? NE : GT;
8876 }
8877 if (op1 == constm1_rtx && !unsignedp)
8878 {
8879 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8880 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8881 cmpop1 = const0_rtx;
8882 if (code == MIN_EXPR)
8883 comparison_code = LT;
8884 }
8885 #ifdef HAVE_conditional_move
8886 /* Use a conditional move if possible. */
8887 if (can_conditionally_move_p (mode))
8888 {
8889 rtx insn;
8890
8891 /* ??? Same problem as in expmed.c: emit_conditional_move
8892 forces a stack adjustment via compare_from_rtx, and we
8893 lose the stack adjustment if the sequence we are about
8894 to create is discarded. */
8895 do_pending_stack_adjust ();
8896
8897 start_sequence ();
8898
8899 /* Try to emit the conditional move. */
8900 insn = emit_conditional_move (target, comparison_code,
8901 op0, cmpop1, mode,
8902 op0, op1, mode,
8903 unsignedp);
8904
8905 /* If we could do the conditional move, emit the sequence,
8906 and return. */
8907 if (insn)
8908 {
8909 rtx seq = get_insns ();
8910 end_sequence ();
8911 emit_insn (seq);
8912 return target;
8913 }
8914
8915 /* Otherwise discard the sequence and fall back to code with
8916 branches. */
8917 end_sequence ();
8918 }
8919 #endif
8920 if (target != op0)
8921 emit_move_insn (target, op0);
8922
8923 temp = gen_label_rtx ();
8924 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8925 unsignedp, mode, NULL_RTX, NULL_RTX, temp);
8926 }
8927 emit_move_insn (target, op1);
8928 emit_label (temp);
8929 return target;
8930
8931 case BIT_NOT_EXPR:
8932 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget,
8933 VOIDmode, EXPAND_NORMAL);
8934 if (modifier == EXPAND_STACK_PARM)
8935 target = 0;
8936 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8937 gcc_assert (temp);
8938 return temp;
8939
8940 /* ??? Can optimize bitwise operations with one arg constant.
8941 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8942 and (a bitwise1 b) bitwise2 b (etc)
8943 but that is probably not worth while. */
8944
8945 /* BIT_AND_EXPR is for bitwise anding. TRUTH_AND_EXPR is for anding two
8946 boolean values when we want in all cases to compute both of them. In
8947 general it is fastest to do TRUTH_AND_EXPR by computing both operands
8948 as actual zero-or-1 values and then bitwise anding. In cases where
8949 there cannot be any side effects, better code would be made by
8950 treating TRUTH_AND_EXPR like TRUTH_ANDIF_EXPR; but the question is
8951 how to recognize those cases. */
8952
8953 case TRUTH_AND_EXPR:
8954 code = BIT_AND_EXPR;
8955 case BIT_AND_EXPR:
8956 goto binop;
8957
8958 case TRUTH_OR_EXPR:
8959 code = BIT_IOR_EXPR;
8960 case BIT_IOR_EXPR:
8961 goto binop;
8962
8963 case TRUTH_XOR_EXPR:
8964 code = BIT_XOR_EXPR;
8965 case BIT_XOR_EXPR:
8966 goto binop;
8967
8968 case LROTATE_EXPR:
8969 case RROTATE_EXPR:
8970 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8971 || (GET_MODE_PRECISION (TYPE_MODE (type))
8972 == TYPE_PRECISION (type)));
8973 /* fall through */
8974
8975 case LSHIFT_EXPR:
8976 case RSHIFT_EXPR:
8977 /* If this is a fixed-point operation, then we cannot use the code
8978 below because "expand_shift" doesn't support sat/no-sat fixed-point
8979 shifts. */
8980 if (ALL_FIXED_POINT_MODE_P (mode))
8981 goto binop;
8982
8983 if (! safe_from_p (subtarget, TREE_OPERAND (exp, 1), 1))
8984 subtarget = 0;
8985 if (modifier == EXPAND_STACK_PARM)
8986 target = 0;
8987 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget,
8988 VOIDmode, EXPAND_NORMAL);
8989 temp = expand_shift (code, mode, op0, TREE_OPERAND (exp, 1), target,
8990 unsignedp);
8991 if (code == LSHIFT_EXPR)
8992 temp = REDUCE_BIT_FIELD (temp);
8993 return temp;
8994
8995 /* Could determine the answer when only additive constants differ. Also,
8996 the addition of one can be handled by changing the condition. */
8997 case LT_EXPR:
8998 case LE_EXPR:
8999 case GT_EXPR:
9000 case GE_EXPR:
9001 case EQ_EXPR:
9002 case NE_EXPR:
9003 case UNORDERED_EXPR:
9004 case ORDERED_EXPR:
9005 case UNLT_EXPR:
9006 case UNLE_EXPR:
9007 case UNGT_EXPR:
9008 case UNGE_EXPR:
9009 case UNEQ_EXPR:
9010 case LTGT_EXPR:
9011 temp = do_store_flag (exp,
9012 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
9013 tmode != VOIDmode ? tmode : mode, 0);
9014 if (temp != 0)
9015 return temp;
9016
9017 /* For foo != 0, load foo, and if it is nonzero load 1 instead. */
9018 if (code == NE_EXPR && integer_zerop (TREE_OPERAND (exp, 1))
9019 && original_target
9020 && REG_P (original_target)
9021 && (GET_MODE (original_target)
9022 == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))))
9023 {
9024 temp = expand_expr (TREE_OPERAND (exp, 0), original_target,
9025 VOIDmode, EXPAND_NORMAL);
9026
9027 /* If temp is constant, we can just compute the result. */
9028 if (GET_CODE (temp) == CONST_INT)
9029 {
9030 if (INTVAL (temp) != 0)
9031 emit_move_insn (target, const1_rtx);
9032 else
9033 emit_move_insn (target, const0_rtx);
9034
9035 return target;
9036 }
9037
9038 if (temp != original_target)
9039 {
9040 enum machine_mode mode1 = GET_MODE (temp);
9041 if (mode1 == VOIDmode)
9042 mode1 = tmode != VOIDmode ? tmode : mode;
9043
9044 temp = copy_to_mode_reg (mode1, temp);
9045 }
9046
9047 op1 = gen_label_rtx ();
9048 emit_cmp_and_jump_insns (temp, const0_rtx, EQ, NULL_RTX,
9049 GET_MODE (temp), unsignedp, op1);
9050 emit_move_insn (temp, const1_rtx);
9051 emit_label (op1);
9052 return temp;
9053 }
9054
9055 /* If no set-flag instruction, must generate a conditional store
9056 into a temporary variable. Drop through and handle this
9057 like && and ||. */
9058 /* Although TRUTH_{AND,OR}IF_EXPR aren't present in GIMPLE, they
9059 are occassionally created by folding during expansion. */
9060 case TRUTH_ANDIF_EXPR:
9061 case TRUTH_ORIF_EXPR:
9062 if (! ignore
9063 && (target == 0
9064 || modifier == EXPAND_STACK_PARM
9065 || ! safe_from_p (target, exp, 1)
9066 /* Make sure we don't have a hard reg (such as function's return
9067 value) live across basic blocks, if not optimizing. */
9068 || (!optimize && REG_P (target)
9069 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9070 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9071
9072 if (target)
9073 emit_move_insn (target, const0_rtx);
9074
9075 op1 = gen_label_rtx ();
9076 jumpifnot (exp, op1);
9077
9078 if (target)
9079 emit_move_insn (target, const1_rtx);
9080
9081 emit_label (op1);
9082 return ignore ? const0_rtx : target;
9083
9084 case TRUTH_NOT_EXPR:
9085 if (modifier == EXPAND_STACK_PARM)
9086 target = 0;
9087 op0 = expand_expr (TREE_OPERAND (exp, 0), target,
9088 VOIDmode, EXPAND_NORMAL);
9089 /* The parser is careful to generate TRUTH_NOT_EXPR
9090 only with operands that are always zero or one. */
9091 temp = expand_binop (mode, xor_optab, op0, const1_rtx,
9092 target, 1, OPTAB_LIB_WIDEN);
9093 gcc_assert (temp);
9094 return temp;
9095
9096 case STATEMENT_LIST:
9097 {
9098 tree_stmt_iterator iter;
9099
9100 gcc_assert (ignore);
9101
9102 for (iter = tsi_start (exp); !tsi_end_p (iter); tsi_next (&iter))
9103 expand_expr (tsi_stmt (iter), const0_rtx, VOIDmode, modifier);
9104 }
9105 return const0_rtx;
9106
9107 case COND_EXPR:
9108 /* A COND_EXPR with its type being VOID_TYPE represents a
9109 conditional jump and is handled in
9110 expand_gimple_cond_expr. */
9111 gcc_assert (!VOID_TYPE_P (TREE_TYPE (exp)));
9112
9113 /* Note that COND_EXPRs whose type is a structure or union
9114 are required to be constructed to contain assignments of
9115 a temporary variable, so that we can evaluate them here
9116 for side effect only. If type is void, we must do likewise. */
9117
9118 gcc_assert (!TREE_ADDRESSABLE (type)
9119 && !ignore
9120 && TREE_TYPE (TREE_OPERAND (exp, 1)) != void_type_node
9121 && TREE_TYPE (TREE_OPERAND (exp, 2)) != void_type_node);
9122
9123 /* If we are not to produce a result, we have no target. Otherwise,
9124 if a target was specified use it; it will not be used as an
9125 intermediate target unless it is safe. If no target, use a
9126 temporary. */
9127
9128 if (modifier != EXPAND_STACK_PARM
9129 && original_target
9130 && safe_from_p (original_target, TREE_OPERAND (exp, 0), 1)
9131 && GET_MODE (original_target) == mode
9132 #ifdef HAVE_conditional_move
9133 && (! can_conditionally_move_p (mode)
9134 || REG_P (original_target))
9135 #endif
9136 && !MEM_P (original_target))
9137 temp = original_target;
9138 else
9139 temp = assign_temp (type, 0, 0, 1);
9140
9141 do_pending_stack_adjust ();
9142 NO_DEFER_POP;
9143 op0 = gen_label_rtx ();
9144 op1 = gen_label_rtx ();
9145 jumpifnot (TREE_OPERAND (exp, 0), op0);
9146 store_expr (TREE_OPERAND (exp, 1), temp,
9147 modifier == EXPAND_STACK_PARM,
9148 false);
9149
9150 emit_jump_insn (gen_jump (op1));
9151 emit_barrier ();
9152 emit_label (op0);
9153 store_expr (TREE_OPERAND (exp, 2), temp,
9154 modifier == EXPAND_STACK_PARM,
9155 false);
9156
9157 emit_label (op1);
9158 OK_DEFER_POP;
9159 return temp;
9160
9161 case VEC_COND_EXPR:
9162 target = expand_vec_cond_expr (exp, target);
9163 return target;
9164
9165 case MODIFY_EXPR:
9166 {
9167 tree lhs = TREE_OPERAND (exp, 0);
9168 tree rhs = TREE_OPERAND (exp, 1);
9169 gcc_assert (ignore);
9170
9171 /* Check for |= or &= of a bitfield of size one into another bitfield
9172 of size 1. In this case, (unless we need the result of the
9173 assignment) we can do this more efficiently with a
9174 test followed by an assignment, if necessary.
9175
9176 ??? At this point, we can't get a BIT_FIELD_REF here. But if
9177 things change so we do, this code should be enhanced to
9178 support it. */
9179 if (TREE_CODE (lhs) == COMPONENT_REF
9180 && (TREE_CODE (rhs) == BIT_IOR_EXPR
9181 || TREE_CODE (rhs) == BIT_AND_EXPR)
9182 && TREE_OPERAND (rhs, 0) == lhs
9183 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
9184 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
9185 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
9186 {
9187 rtx label = gen_label_rtx ();
9188 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
9189 do_jump (TREE_OPERAND (rhs, 1),
9190 value ? label : 0,
9191 value ? 0 : label);
9192 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
9193 MOVE_NONTEMPORAL (exp));
9194 do_pending_stack_adjust ();
9195 emit_label (label);
9196 return const0_rtx;
9197 }
9198
9199 expand_assignment (lhs, rhs, MOVE_NONTEMPORAL (exp));
9200 return const0_rtx;
9201 }
9202
9203 case RETURN_EXPR:
9204 if (!TREE_OPERAND (exp, 0))
9205 expand_null_return ();
9206 else
9207 expand_return (TREE_OPERAND (exp, 0));
9208 return const0_rtx;
9209
9210 case ADDR_EXPR:
9211 return expand_expr_addr_expr (exp, target, tmode, modifier);
9212
9213 case COMPLEX_EXPR:
9214 /* Get the rtx code of the operands. */
9215 op0 = expand_normal (TREE_OPERAND (exp, 0));
9216 op1 = expand_normal (TREE_OPERAND (exp, 1));
9217
9218 if (!target)
9219 target = gen_reg_rtx (TYPE_MODE (TREE_TYPE (exp)));
9220
9221 /* Move the real (op0) and imaginary (op1) parts to their location. */
9222 write_complex_part (target, op0, false);
9223 write_complex_part (target, op1, true);
9224
9225 return target;
9226
9227 case REALPART_EXPR:
9228 op0 = expand_normal (TREE_OPERAND (exp, 0));
9229 return read_complex_part (op0, false);
9230
9231 case IMAGPART_EXPR:
9232 op0 = expand_normal (TREE_OPERAND (exp, 0));
9233 return read_complex_part (op0, true);
9234
9235 case RESX_EXPR:
9236 expand_resx_expr (exp);
9237 return const0_rtx;
9238
9239 case TRY_CATCH_EXPR:
9240 case CATCH_EXPR:
9241 case EH_FILTER_EXPR:
9242 case TRY_FINALLY_EXPR:
9243 /* Lowered by tree-eh.c. */
9244 gcc_unreachable ();
9245
9246 case WITH_CLEANUP_EXPR:
9247 case CLEANUP_POINT_EXPR:
9248 case TARGET_EXPR:
9249 case CASE_LABEL_EXPR:
9250 case VA_ARG_EXPR:
9251 case BIND_EXPR:
9252 case INIT_EXPR:
9253 case CONJ_EXPR:
9254 case COMPOUND_EXPR:
9255 case PREINCREMENT_EXPR:
9256 case PREDECREMENT_EXPR:
9257 case POSTINCREMENT_EXPR:
9258 case POSTDECREMENT_EXPR:
9259 case LOOP_EXPR:
9260 case EXIT_EXPR:
9261 /* Lowered by gimplify.c. */
9262 gcc_unreachable ();
9263
9264 case CHANGE_DYNAMIC_TYPE_EXPR:
9265 /* This is ignored at the RTL level. The tree level set
9266 DECL_POINTER_ALIAS_SET of any variable to be 0, which is
9267 overkill for the RTL layer but is all that we can
9268 represent. */
9269 return const0_rtx;
9270
9271 case EXC_PTR_EXPR:
9272 return get_exception_pointer ();
9273
9274 case FILTER_EXPR:
9275 return get_exception_filter ();
9276
9277 case FDESC_EXPR:
9278 /* Function descriptors are not valid except for as
9279 initialization constants, and should not be expanded. */
9280 gcc_unreachable ();
9281
9282 case SWITCH_EXPR:
9283 expand_case (exp);
9284 return const0_rtx;
9285
9286 case LABEL_EXPR:
9287 expand_label (TREE_OPERAND (exp, 0));
9288 return const0_rtx;
9289
9290 case ASM_EXPR:
9291 expand_asm_expr (exp);
9292 return const0_rtx;
9293
9294 case WITH_SIZE_EXPR:
9295 /* WITH_SIZE_EXPR expands to its first argument. The caller should
9296 have pulled out the size to use in whatever context it needed. */
9297 return expand_expr_real (TREE_OPERAND (exp, 0), original_target, tmode,
9298 modifier, alt_rtl);
9299
9300 case REALIGN_LOAD_EXPR:
9301 {
9302 tree oprnd0 = TREE_OPERAND (exp, 0);
9303 tree oprnd1 = TREE_OPERAND (exp, 1);
9304 tree oprnd2 = TREE_OPERAND (exp, 2);
9305 rtx op2;
9306
9307 this_optab = optab_for_tree_code (code, type, optab_default);
9308 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9309 op2 = expand_normal (oprnd2);
9310 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9311 target, unsignedp);
9312 gcc_assert (temp);
9313 return temp;
9314 }
9315
9316 case DOT_PROD_EXPR:
9317 {
9318 tree oprnd0 = TREE_OPERAND (exp, 0);
9319 tree oprnd1 = TREE_OPERAND (exp, 1);
9320 tree oprnd2 = TREE_OPERAND (exp, 2);
9321 rtx op2;
9322
9323 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9324 op2 = expand_normal (oprnd2);
9325 target = expand_widen_pattern_expr (exp, op0, op1, op2,
9326 target, unsignedp);
9327 return target;
9328 }
9329
9330 case WIDEN_SUM_EXPR:
9331 {
9332 tree oprnd0 = TREE_OPERAND (exp, 0);
9333 tree oprnd1 = TREE_OPERAND (exp, 1);
9334
9335 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, 0);
9336 target = expand_widen_pattern_expr (exp, op0, NULL_RTX, op1,
9337 target, unsignedp);
9338 return target;
9339 }
9340
9341 case REDUC_MAX_EXPR:
9342 case REDUC_MIN_EXPR:
9343 case REDUC_PLUS_EXPR:
9344 {
9345 op0 = expand_normal (TREE_OPERAND (exp, 0));
9346 this_optab = optab_for_tree_code (code, type, optab_default);
9347 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
9348 gcc_assert (temp);
9349 return temp;
9350 }
9351
9352 case VEC_EXTRACT_EVEN_EXPR:
9353 case VEC_EXTRACT_ODD_EXPR:
9354 {
9355 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
9356 NULL_RTX, &op0, &op1, 0);
9357 this_optab = optab_for_tree_code (code, type, optab_default);
9358 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
9359 OPTAB_WIDEN);
9360 gcc_assert (temp);
9361 return temp;
9362 }
9363
9364 case VEC_INTERLEAVE_HIGH_EXPR:
9365 case VEC_INTERLEAVE_LOW_EXPR:
9366 {
9367 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
9368 NULL_RTX, &op0, &op1, 0);
9369 this_optab = optab_for_tree_code (code, type, optab_default);
9370 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
9371 OPTAB_WIDEN);
9372 gcc_assert (temp);
9373 return temp;
9374 }
9375
9376 case VEC_LSHIFT_EXPR:
9377 case VEC_RSHIFT_EXPR:
9378 {
9379 target = expand_vec_shift_expr (exp, target);
9380 return target;
9381 }
9382
9383 case VEC_UNPACK_HI_EXPR:
9384 case VEC_UNPACK_LO_EXPR:
9385 {
9386 op0 = expand_normal (TREE_OPERAND (exp, 0));
9387 this_optab = optab_for_tree_code (code, type, optab_default);
9388 temp = expand_widen_pattern_expr (exp, op0, NULL_RTX, NULL_RTX,
9389 target, unsignedp);
9390 gcc_assert (temp);
9391 return temp;
9392 }
9393
9394 case VEC_UNPACK_FLOAT_HI_EXPR:
9395 case VEC_UNPACK_FLOAT_LO_EXPR:
9396 {
9397 op0 = expand_normal (TREE_OPERAND (exp, 0));
9398 /* The signedness is determined from input operand. */
9399 this_optab = optab_for_tree_code (code,
9400 TREE_TYPE (TREE_OPERAND (exp, 0)),
9401 optab_default);
9402 temp = expand_widen_pattern_expr
9403 (exp, op0, NULL_RTX, NULL_RTX,
9404 target, TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
9405
9406 gcc_assert (temp);
9407 return temp;
9408 }
9409
9410 case VEC_WIDEN_MULT_HI_EXPR:
9411 case VEC_WIDEN_MULT_LO_EXPR:
9412 {
9413 tree oprnd0 = TREE_OPERAND (exp, 0);
9414 tree oprnd1 = TREE_OPERAND (exp, 1);
9415
9416 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, 0);
9417 target = expand_widen_pattern_expr (exp, op0, op1, NULL_RTX,
9418 target, unsignedp);
9419 gcc_assert (target);
9420 return target;
9421 }
9422
9423 case VEC_PACK_TRUNC_EXPR:
9424 case VEC_PACK_SAT_EXPR:
9425 case VEC_PACK_FIX_TRUNC_EXPR:
9426 mode = TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)));
9427 goto binop;
9428
9429 default:
9430 return lang_hooks.expand_expr (exp, original_target, tmode,
9431 modifier, alt_rtl);
9432 }
9433
9434 /* Here to do an ordinary binary operator. */
9435 binop:
9436 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
9437 subtarget, &op0, &op1, 0);
9438 binop2:
9439 this_optab = optab_for_tree_code (code, type, optab_default);
9440 binop3:
9441 if (modifier == EXPAND_STACK_PARM)
9442 target = 0;
9443 temp = expand_binop (mode, this_optab, op0, op1, target,
9444 unsignedp, OPTAB_LIB_WIDEN);
9445 gcc_assert (temp);
9446 return REDUCE_BIT_FIELD (temp);
9447 }
9448 #undef REDUCE_BIT_FIELD
9449 \f
9450 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
9451 signedness of TYPE), possibly returning the result in TARGET. */
9452 static rtx
9453 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
9454 {
9455 HOST_WIDE_INT prec = TYPE_PRECISION (type);
9456 if (target && GET_MODE (target) != GET_MODE (exp))
9457 target = 0;
9458 /* For constant values, reduce using build_int_cst_type. */
9459 if (GET_CODE (exp) == CONST_INT)
9460 {
9461 HOST_WIDE_INT value = INTVAL (exp);
9462 tree t = build_int_cst_type (type, value);
9463 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
9464 }
9465 else if (TYPE_UNSIGNED (type))
9466 {
9467 rtx mask;
9468 if (prec < HOST_BITS_PER_WIDE_INT)
9469 mask = immed_double_const (((unsigned HOST_WIDE_INT) 1 << prec) - 1, 0,
9470 GET_MODE (exp));
9471 else
9472 mask = immed_double_const ((unsigned HOST_WIDE_INT) -1,
9473 ((unsigned HOST_WIDE_INT) 1
9474 << (prec - HOST_BITS_PER_WIDE_INT)) - 1,
9475 GET_MODE (exp));
9476 return expand_and (GET_MODE (exp), exp, mask, target);
9477 }
9478 else
9479 {
9480 tree count = build_int_cst (NULL_TREE,
9481 GET_MODE_BITSIZE (GET_MODE (exp)) - prec);
9482 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
9483 return expand_shift (RSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
9484 }
9485 }
9486 \f
9487 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
9488 when applied to the address of EXP produces an address known to be
9489 aligned more than BIGGEST_ALIGNMENT. */
9490
9491 static int
9492 is_aligning_offset (const_tree offset, const_tree exp)
9493 {
9494 /* Strip off any conversions. */
9495 while (CONVERT_EXPR_P (offset))
9496 offset = TREE_OPERAND (offset, 0);
9497
9498 /* We must now have a BIT_AND_EXPR with a constant that is one less than
9499 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
9500 if (TREE_CODE (offset) != BIT_AND_EXPR
9501 || !host_integerp (TREE_OPERAND (offset, 1), 1)
9502 || compare_tree_int (TREE_OPERAND (offset, 1),
9503 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
9504 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
9505 return 0;
9506
9507 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
9508 It must be NEGATE_EXPR. Then strip any more conversions. */
9509 offset = TREE_OPERAND (offset, 0);
9510 while (CONVERT_EXPR_P (offset))
9511 offset = TREE_OPERAND (offset, 0);
9512
9513 if (TREE_CODE (offset) != NEGATE_EXPR)
9514 return 0;
9515
9516 offset = TREE_OPERAND (offset, 0);
9517 while (CONVERT_EXPR_P (offset))
9518 offset = TREE_OPERAND (offset, 0);
9519
9520 /* This must now be the address of EXP. */
9521 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
9522 }
9523 \f
9524 /* Return the tree node if an ARG corresponds to a string constant or zero
9525 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
9526 in bytes within the string that ARG is accessing. The type of the
9527 offset will be `sizetype'. */
9528
9529 tree
9530 string_constant (tree arg, tree *ptr_offset)
9531 {
9532 tree array, offset, lower_bound;
9533 STRIP_NOPS (arg);
9534
9535 if (TREE_CODE (arg) == ADDR_EXPR)
9536 {
9537 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
9538 {
9539 *ptr_offset = size_zero_node;
9540 return TREE_OPERAND (arg, 0);
9541 }
9542 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
9543 {
9544 array = TREE_OPERAND (arg, 0);
9545 offset = size_zero_node;
9546 }
9547 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
9548 {
9549 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
9550 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
9551 if (TREE_CODE (array) != STRING_CST
9552 && TREE_CODE (array) != VAR_DECL)
9553 return 0;
9554
9555 /* Check if the array has a nonzero lower bound. */
9556 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
9557 if (!integer_zerop (lower_bound))
9558 {
9559 /* If the offset and base aren't both constants, return 0. */
9560 if (TREE_CODE (lower_bound) != INTEGER_CST)
9561 return 0;
9562 if (TREE_CODE (offset) != INTEGER_CST)
9563 return 0;
9564 /* Adjust offset by the lower bound. */
9565 offset = size_diffop (fold_convert (sizetype, offset),
9566 fold_convert (sizetype, lower_bound));
9567 }
9568 }
9569 else
9570 return 0;
9571 }
9572 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
9573 {
9574 tree arg0 = TREE_OPERAND (arg, 0);
9575 tree arg1 = TREE_OPERAND (arg, 1);
9576
9577 STRIP_NOPS (arg0);
9578 STRIP_NOPS (arg1);
9579
9580 if (TREE_CODE (arg0) == ADDR_EXPR
9581 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
9582 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
9583 {
9584 array = TREE_OPERAND (arg0, 0);
9585 offset = arg1;
9586 }
9587 else if (TREE_CODE (arg1) == ADDR_EXPR
9588 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
9589 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
9590 {
9591 array = TREE_OPERAND (arg1, 0);
9592 offset = arg0;
9593 }
9594 else
9595 return 0;
9596 }
9597 else
9598 return 0;
9599
9600 if (TREE_CODE (array) == STRING_CST)
9601 {
9602 *ptr_offset = fold_convert (sizetype, offset);
9603 return array;
9604 }
9605 else if (TREE_CODE (array) == VAR_DECL)
9606 {
9607 int length;
9608
9609 /* Variables initialized to string literals can be handled too. */
9610 if (DECL_INITIAL (array) == NULL_TREE
9611 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
9612 return 0;
9613
9614 /* If they are read-only, non-volatile and bind locally. */
9615 if (! TREE_READONLY (array)
9616 || TREE_SIDE_EFFECTS (array)
9617 || ! targetm.binds_local_p (array))
9618 return 0;
9619
9620 /* Avoid const char foo[4] = "abcde"; */
9621 if (DECL_SIZE_UNIT (array) == NULL_TREE
9622 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
9623 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
9624 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
9625 return 0;
9626
9627 /* If variable is bigger than the string literal, OFFSET must be constant
9628 and inside of the bounds of the string literal. */
9629 offset = fold_convert (sizetype, offset);
9630 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
9631 && (! host_integerp (offset, 1)
9632 || compare_tree_int (offset, length) >= 0))
9633 return 0;
9634
9635 *ptr_offset = offset;
9636 return DECL_INITIAL (array);
9637 }
9638
9639 return 0;
9640 }
9641 \f
9642 /* Generate code to calculate EXP using a store-flag instruction
9643 and return an rtx for the result. EXP is either a comparison
9644 or a TRUTH_NOT_EXPR whose operand is a comparison.
9645
9646 If TARGET is nonzero, store the result there if convenient.
9647
9648 If ONLY_CHEAP is nonzero, only do this if it is likely to be very
9649 cheap.
9650
9651 Return zero if there is no suitable set-flag instruction
9652 available on this machine.
9653
9654 Once expand_expr has been called on the arguments of the comparison,
9655 we are committed to doing the store flag, since it is not safe to
9656 re-evaluate the expression. We emit the store-flag insn by calling
9657 emit_store_flag, but only expand the arguments if we have a reason
9658 to believe that emit_store_flag will be successful. If we think that
9659 it will, but it isn't, we have to simulate the store-flag with a
9660 set/jump/set sequence. */
9661
9662 static rtx
9663 do_store_flag (tree exp, rtx target, enum machine_mode mode, int only_cheap)
9664 {
9665 enum rtx_code code;
9666 tree arg0, arg1, type;
9667 tree tem;
9668 enum machine_mode operand_mode;
9669 int invert = 0;
9670 int unsignedp;
9671 rtx op0, op1;
9672 enum insn_code icode;
9673 rtx subtarget = target;
9674 rtx result, label;
9675
9676 /* If this is a TRUTH_NOT_EXPR, set a flag indicating we must invert the
9677 result at the end. We can't simply invert the test since it would
9678 have already been inverted if it were valid. This case occurs for
9679 some floating-point comparisons. */
9680
9681 if (TREE_CODE (exp) == TRUTH_NOT_EXPR)
9682 invert = 1, exp = TREE_OPERAND (exp, 0);
9683
9684 arg0 = TREE_OPERAND (exp, 0);
9685 arg1 = TREE_OPERAND (exp, 1);
9686
9687 /* Don't crash if the comparison was erroneous. */
9688 if (arg0 == error_mark_node || arg1 == error_mark_node)
9689 return const0_rtx;
9690
9691 type = TREE_TYPE (arg0);
9692 operand_mode = TYPE_MODE (type);
9693 unsignedp = TYPE_UNSIGNED (type);
9694
9695 /* We won't bother with BLKmode store-flag operations because it would mean
9696 passing a lot of information to emit_store_flag. */
9697 if (operand_mode == BLKmode)
9698 return 0;
9699
9700 /* We won't bother with store-flag operations involving function pointers
9701 when function pointers must be canonicalized before comparisons. */
9702 #ifdef HAVE_canonicalize_funcptr_for_compare
9703 if (HAVE_canonicalize_funcptr_for_compare
9704 && ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == POINTER_TYPE
9705 && (TREE_CODE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))))
9706 == FUNCTION_TYPE))
9707 || (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 1))) == POINTER_TYPE
9708 && (TREE_CODE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))))
9709 == FUNCTION_TYPE))))
9710 return 0;
9711 #endif
9712
9713 STRIP_NOPS (arg0);
9714 STRIP_NOPS (arg1);
9715
9716 /* Get the rtx comparison code to use. We know that EXP is a comparison
9717 operation of some type. Some comparisons against 1 and -1 can be
9718 converted to comparisons with zero. Do so here so that the tests
9719 below will be aware that we have a comparison with zero. These
9720 tests will not catch constants in the first operand, but constants
9721 are rarely passed as the first operand. */
9722
9723 switch (TREE_CODE (exp))
9724 {
9725 case EQ_EXPR:
9726 code = EQ;
9727 break;
9728 case NE_EXPR:
9729 code = NE;
9730 break;
9731 case LT_EXPR:
9732 if (integer_onep (arg1))
9733 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
9734 else
9735 code = unsignedp ? LTU : LT;
9736 break;
9737 case LE_EXPR:
9738 if (! unsignedp && integer_all_onesp (arg1))
9739 arg1 = integer_zero_node, code = LT;
9740 else
9741 code = unsignedp ? LEU : LE;
9742 break;
9743 case GT_EXPR:
9744 if (! unsignedp && integer_all_onesp (arg1))
9745 arg1 = integer_zero_node, code = GE;
9746 else
9747 code = unsignedp ? GTU : GT;
9748 break;
9749 case GE_EXPR:
9750 if (integer_onep (arg1))
9751 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
9752 else
9753 code = unsignedp ? GEU : GE;
9754 break;
9755
9756 case UNORDERED_EXPR:
9757 code = UNORDERED;
9758 break;
9759 case ORDERED_EXPR:
9760 code = ORDERED;
9761 break;
9762 case UNLT_EXPR:
9763 code = UNLT;
9764 break;
9765 case UNLE_EXPR:
9766 code = UNLE;
9767 break;
9768 case UNGT_EXPR:
9769 code = UNGT;
9770 break;
9771 case UNGE_EXPR:
9772 code = UNGE;
9773 break;
9774 case UNEQ_EXPR:
9775 code = UNEQ;
9776 break;
9777 case LTGT_EXPR:
9778 code = LTGT;
9779 break;
9780
9781 default:
9782 gcc_unreachable ();
9783 }
9784
9785 /* Put a constant second. */
9786 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
9787 || TREE_CODE (arg0) == FIXED_CST)
9788 {
9789 tem = arg0; arg0 = arg1; arg1 = tem;
9790 code = swap_condition (code);
9791 }
9792
9793 /* If this is an equality or inequality test of a single bit, we can
9794 do this by shifting the bit being tested to the low-order bit and
9795 masking the result with the constant 1. If the condition was EQ,
9796 we xor it with 1. This does not require an scc insn and is faster
9797 than an scc insn even if we have it.
9798
9799 The code to make this transformation was moved into fold_single_bit_test,
9800 so we just call into the folder and expand its result. */
9801
9802 if ((code == NE || code == EQ)
9803 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
9804 && integer_pow2p (TREE_OPERAND (arg0, 1)))
9805 {
9806 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
9807 return expand_expr (fold_single_bit_test (code == NE ? NE_EXPR : EQ_EXPR,
9808 arg0, arg1, type),
9809 target, VOIDmode, EXPAND_NORMAL);
9810 }
9811
9812 /* Now see if we are likely to be able to do this. Return if not. */
9813 if (! can_compare_p (code, operand_mode, ccp_store_flag))
9814 return 0;
9815
9816 icode = setcc_gen_code[(int) code];
9817
9818 if (icode == CODE_FOR_nothing)
9819 {
9820 enum machine_mode wmode;
9821
9822 for (wmode = operand_mode;
9823 icode == CODE_FOR_nothing && wmode != VOIDmode;
9824 wmode = GET_MODE_WIDER_MODE (wmode))
9825 icode = optab_handler (cstore_optab, wmode)->insn_code;
9826 }
9827
9828 if (icode == CODE_FOR_nothing
9829 || (only_cheap && insn_data[(int) icode].operand[0].mode != mode))
9830 {
9831 /* We can only do this if it is one of the special cases that
9832 can be handled without an scc insn. */
9833 if ((code == LT && integer_zerop (arg1))
9834 || (! only_cheap && code == GE && integer_zerop (arg1)))
9835 ;
9836 else if (! only_cheap && (code == NE || code == EQ)
9837 && TREE_CODE (type) != REAL_TYPE
9838 && ((optab_handler (abs_optab, operand_mode)->insn_code
9839 != CODE_FOR_nothing)
9840 || (optab_handler (ffs_optab, operand_mode)->insn_code
9841 != CODE_FOR_nothing)))
9842 ;
9843 else
9844 return 0;
9845 }
9846
9847 if (! get_subtarget (target)
9848 || GET_MODE (subtarget) != operand_mode)
9849 subtarget = 0;
9850
9851 expand_operands (arg0, arg1, subtarget, &op0, &op1, 0);
9852
9853 if (target == 0)
9854 target = gen_reg_rtx (mode);
9855
9856 result = emit_store_flag (target, code, op0, op1,
9857 operand_mode, unsignedp, 1);
9858
9859 if (result)
9860 {
9861 if (invert)
9862 result = expand_binop (mode, xor_optab, result, const1_rtx,
9863 result, 0, OPTAB_LIB_WIDEN);
9864 return result;
9865 }
9866
9867 /* If this failed, we have to do this with set/compare/jump/set code. */
9868 if (!REG_P (target)
9869 || reg_mentioned_p (target, op0) || reg_mentioned_p (target, op1))
9870 target = gen_reg_rtx (GET_MODE (target));
9871
9872 emit_move_insn (target, invert ? const0_rtx : const1_rtx);
9873 label = gen_label_rtx ();
9874 do_compare_rtx_and_jump (op0, op1, code, unsignedp, operand_mode, NULL_RTX,
9875 NULL_RTX, label);
9876
9877 emit_move_insn (target, invert ? const1_rtx : const0_rtx);
9878 emit_label (label);
9879
9880 return target;
9881 }
9882 \f
9883
9884 /* Stubs in case we haven't got a casesi insn. */
9885 #ifndef HAVE_casesi
9886 # define HAVE_casesi 0
9887 # define gen_casesi(a, b, c, d, e) (0)
9888 # define CODE_FOR_casesi CODE_FOR_nothing
9889 #endif
9890
9891 /* If the machine does not have a case insn that compares the bounds,
9892 this means extra overhead for dispatch tables, which raises the
9893 threshold for using them. */
9894 #ifndef CASE_VALUES_THRESHOLD
9895 #define CASE_VALUES_THRESHOLD (HAVE_casesi ? 4 : 5)
9896 #endif /* CASE_VALUES_THRESHOLD */
9897
9898 unsigned int
9899 case_values_threshold (void)
9900 {
9901 return CASE_VALUES_THRESHOLD;
9902 }
9903
9904 /* Attempt to generate a casesi instruction. Returns 1 if successful,
9905 0 otherwise (i.e. if there is no casesi instruction). */
9906 int
9907 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
9908 rtx table_label ATTRIBUTE_UNUSED, rtx default_label,
9909 rtx fallback_label ATTRIBUTE_UNUSED)
9910 {
9911 enum machine_mode index_mode = SImode;
9912 int index_bits = GET_MODE_BITSIZE (index_mode);
9913 rtx op1, op2, index;
9914 enum machine_mode op_mode;
9915
9916 if (! HAVE_casesi)
9917 return 0;
9918
9919 /* Convert the index to SImode. */
9920 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
9921 {
9922 enum machine_mode omode = TYPE_MODE (index_type);
9923 rtx rangertx = expand_normal (range);
9924
9925 /* We must handle the endpoints in the original mode. */
9926 index_expr = build2 (MINUS_EXPR, index_type,
9927 index_expr, minval);
9928 minval = integer_zero_node;
9929 index = expand_normal (index_expr);
9930 if (default_label)
9931 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
9932 omode, 1, default_label);
9933 /* Now we can safely truncate. */
9934 index = convert_to_mode (index_mode, index, 0);
9935 }
9936 else
9937 {
9938 if (TYPE_MODE (index_type) != index_mode)
9939 {
9940 index_type = lang_hooks.types.type_for_size (index_bits, 0);
9941 index_expr = fold_convert (index_type, index_expr);
9942 }
9943
9944 index = expand_normal (index_expr);
9945 }
9946
9947 do_pending_stack_adjust ();
9948
9949 op_mode = insn_data[(int) CODE_FOR_casesi].operand[0].mode;
9950 if (! (*insn_data[(int) CODE_FOR_casesi].operand[0].predicate)
9951 (index, op_mode))
9952 index = copy_to_mode_reg (op_mode, index);
9953
9954 op1 = expand_normal (minval);
9955
9956 op_mode = insn_data[(int) CODE_FOR_casesi].operand[1].mode;
9957 op1 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (minval)),
9958 op1, TYPE_UNSIGNED (TREE_TYPE (minval)));
9959 if (! (*insn_data[(int) CODE_FOR_casesi].operand[1].predicate)
9960 (op1, op_mode))
9961 op1 = copy_to_mode_reg (op_mode, op1);
9962
9963 op2 = expand_normal (range);
9964
9965 op_mode = insn_data[(int) CODE_FOR_casesi].operand[2].mode;
9966 op2 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (range)),
9967 op2, TYPE_UNSIGNED (TREE_TYPE (range)));
9968 if (! (*insn_data[(int) CODE_FOR_casesi].operand[2].predicate)
9969 (op2, op_mode))
9970 op2 = copy_to_mode_reg (op_mode, op2);
9971
9972 emit_jump_insn (gen_casesi (index, op1, op2,
9973 table_label, !default_label
9974 ? fallback_label : default_label));
9975 return 1;
9976 }
9977
9978 /* Attempt to generate a tablejump instruction; same concept. */
9979 #ifndef HAVE_tablejump
9980 #define HAVE_tablejump 0
9981 #define gen_tablejump(x, y) (0)
9982 #endif
9983
9984 /* Subroutine of the next function.
9985
9986 INDEX is the value being switched on, with the lowest value
9987 in the table already subtracted.
9988 MODE is its expected mode (needed if INDEX is constant).
9989 RANGE is the length of the jump table.
9990 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
9991
9992 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
9993 index value is out of range. */
9994
9995 static void
9996 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
9997 rtx default_label)
9998 {
9999 rtx temp, vector;
10000
10001 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
10002 cfun->cfg->max_jumptable_ents = INTVAL (range);
10003
10004 /* Do an unsigned comparison (in the proper mode) between the index
10005 expression and the value which represents the length of the range.
10006 Since we just finished subtracting the lower bound of the range
10007 from the index expression, this comparison allows us to simultaneously
10008 check that the original index expression value is both greater than
10009 or equal to the minimum value of the range and less than or equal to
10010 the maximum value of the range. */
10011
10012 if (default_label)
10013 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
10014 default_label);
10015
10016 /* If index is in range, it must fit in Pmode.
10017 Convert to Pmode so we can index with it. */
10018 if (mode != Pmode)
10019 index = convert_to_mode (Pmode, index, 1);
10020
10021 /* Don't let a MEM slip through, because then INDEX that comes
10022 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
10023 and break_out_memory_refs will go to work on it and mess it up. */
10024 #ifdef PIC_CASE_VECTOR_ADDRESS
10025 if (flag_pic && !REG_P (index))
10026 index = copy_to_mode_reg (Pmode, index);
10027 #endif
10028
10029 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
10030 GET_MODE_SIZE, because this indicates how large insns are. The other
10031 uses should all be Pmode, because they are addresses. This code
10032 could fail if addresses and insns are not the same size. */
10033 index = gen_rtx_PLUS (Pmode,
10034 gen_rtx_MULT (Pmode, index,
10035 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
10036 gen_rtx_LABEL_REF (Pmode, table_label));
10037 #ifdef PIC_CASE_VECTOR_ADDRESS
10038 if (flag_pic)
10039 index = PIC_CASE_VECTOR_ADDRESS (index);
10040 else
10041 #endif
10042 index = memory_address (CASE_VECTOR_MODE, index);
10043 temp = gen_reg_rtx (CASE_VECTOR_MODE);
10044 vector = gen_const_mem (CASE_VECTOR_MODE, index);
10045 convert_move (temp, vector, 0);
10046
10047 emit_jump_insn (gen_tablejump (temp, table_label));
10048
10049 /* If we are generating PIC code or if the table is PC-relative, the
10050 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
10051 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
10052 emit_barrier ();
10053 }
10054
10055 int
10056 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
10057 rtx table_label, rtx default_label)
10058 {
10059 rtx index;
10060
10061 if (! HAVE_tablejump)
10062 return 0;
10063
10064 index_expr = fold_build2 (MINUS_EXPR, index_type,
10065 fold_convert (index_type, index_expr),
10066 fold_convert (index_type, minval));
10067 index = expand_normal (index_expr);
10068 do_pending_stack_adjust ();
10069
10070 do_tablejump (index, TYPE_MODE (index_type),
10071 convert_modes (TYPE_MODE (index_type),
10072 TYPE_MODE (TREE_TYPE (range)),
10073 expand_normal (range),
10074 TYPE_UNSIGNED (TREE_TYPE (range))),
10075 table_label, default_label);
10076 return 1;
10077 }
10078
10079 /* Nonzero if the mode is a valid vector mode for this architecture.
10080 This returns nonzero even if there is no hardware support for the
10081 vector mode, but we can emulate with narrower modes. */
10082
10083 int
10084 vector_mode_valid_p (enum machine_mode mode)
10085 {
10086 enum mode_class mclass = GET_MODE_CLASS (mode);
10087 enum machine_mode innermode;
10088
10089 /* Doh! What's going on? */
10090 if (mclass != MODE_VECTOR_INT
10091 && mclass != MODE_VECTOR_FLOAT
10092 && mclass != MODE_VECTOR_FRACT
10093 && mclass != MODE_VECTOR_UFRACT
10094 && mclass != MODE_VECTOR_ACCUM
10095 && mclass != MODE_VECTOR_UACCUM)
10096 return 0;
10097
10098 /* Hardware support. Woo hoo! */
10099 if (targetm.vector_mode_supported_p (mode))
10100 return 1;
10101
10102 innermode = GET_MODE_INNER (mode);
10103
10104 /* We should probably return 1 if requesting V4DI and we have no DI,
10105 but we have V2DI, but this is probably very unlikely. */
10106
10107 /* If we have support for the inner mode, we can safely emulate it.
10108 We may not have V2DI, but me can emulate with a pair of DIs. */
10109 return targetm.scalar_mode_supported_p (innermode);
10110 }
10111
10112 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
10113 static rtx
10114 const_vector_from_tree (tree exp)
10115 {
10116 rtvec v;
10117 int units, i;
10118 tree link, elt;
10119 enum machine_mode inner, mode;
10120
10121 mode = TYPE_MODE (TREE_TYPE (exp));
10122
10123 if (initializer_zerop (exp))
10124 return CONST0_RTX (mode);
10125
10126 units = GET_MODE_NUNITS (mode);
10127 inner = GET_MODE_INNER (mode);
10128
10129 v = rtvec_alloc (units);
10130
10131 link = TREE_VECTOR_CST_ELTS (exp);
10132 for (i = 0; link; link = TREE_CHAIN (link), ++i)
10133 {
10134 elt = TREE_VALUE (link);
10135
10136 if (TREE_CODE (elt) == REAL_CST)
10137 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
10138 inner);
10139 else if (TREE_CODE (elt) == FIXED_CST)
10140 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
10141 inner);
10142 else
10143 RTVEC_ELT (v, i) = immed_double_const (TREE_INT_CST_LOW (elt),
10144 TREE_INT_CST_HIGH (elt),
10145 inner);
10146 }
10147
10148 /* Initialize remaining elements to 0. */
10149 for (; i < units; ++i)
10150 RTVEC_ELT (v, i) = CONST0_RTX (inner);
10151
10152 return gen_rtx_CONST_VECTOR (mode, v);
10153 }
10154 #include "gt-expr.h"