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1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2013 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "machmode.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "flags.h"
28 #include "regs.h"
29 #include "hard-reg-set.h"
30 #include "except.h"
31 #include "function.h"
32 #include "insn-config.h"
33 #include "insn-attr.h"
34 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
35 #include "expr.h"
36 #include "optabs.h"
37 #include "libfuncs.h"
38 #include "recog.h"
39 #include "reload.h"
40 #include "typeclass.h"
41 #include "toplev.h"
42 #include "langhooks.h"
43 #include "intl.h"
44 #include "tm_p.h"
45 #include "tree-iterator.h"
46 #include "tree-ssa.h"
47 #include "target.h"
48 #include "common/common-target.h"
49 #include "timevar.h"
50 #include "df.h"
51 #include "diagnostic.h"
52 #include "ssaexpand.h"
53 #include "target-globals.h"
54 #include "params.h"
55
56 /* Decide whether a function's arguments should be processed
57 from first to last or from last to first.
58
59 They should if the stack and args grow in opposite directions, but
60 only if we have push insns. */
61
62 #ifdef PUSH_ROUNDING
63
64 #ifndef PUSH_ARGS_REVERSED
65 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
66 #define PUSH_ARGS_REVERSED /* If it's last to first. */
67 #endif
68 #endif
69
70 #endif
71
72 #ifndef STACK_PUSH_CODE
73 #ifdef STACK_GROWS_DOWNWARD
74 #define STACK_PUSH_CODE PRE_DEC
75 #else
76 #define STACK_PUSH_CODE PRE_INC
77 #endif
78 #endif
79
80
81 /* If this is nonzero, we do not bother generating VOLATILE
82 around volatile memory references, and we are willing to
83 output indirect addresses. If cse is to follow, we reject
84 indirect addresses so a useful potential cse is generated;
85 if it is used only once, instruction combination will produce
86 the same indirect address eventually. */
87 int cse_not_expected;
88
89 /* This structure is used by move_by_pieces to describe the move to
90 be performed. */
91 struct move_by_pieces_d
92 {
93 rtx to;
94 rtx to_addr;
95 int autinc_to;
96 int explicit_inc_to;
97 rtx from;
98 rtx from_addr;
99 int autinc_from;
100 int explicit_inc_from;
101 unsigned HOST_WIDE_INT len;
102 HOST_WIDE_INT offset;
103 int reverse;
104 };
105
106 /* This structure is used by store_by_pieces to describe the clear to
107 be performed. */
108
109 struct store_by_pieces_d
110 {
111 rtx to;
112 rtx to_addr;
113 int autinc_to;
114 int explicit_inc_to;
115 unsigned HOST_WIDE_INT len;
116 HOST_WIDE_INT offset;
117 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
118 void *constfundata;
119 int reverse;
120 };
121
122 static void move_by_pieces_1 (insn_gen_fn, machine_mode,
123 struct move_by_pieces_d *);
124 static bool block_move_libcall_safe_for_call_parm (void);
125 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
126 static tree emit_block_move_libcall_fn (int);
127 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
128 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
129 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
130 static void store_by_pieces_1 (struct store_by_pieces_d *, unsigned int);
131 static void store_by_pieces_2 (insn_gen_fn, machine_mode,
132 struct store_by_pieces_d *);
133 static tree clear_storage_libcall_fn (int);
134 static rtx compress_float_constant (rtx, rtx);
135 static rtx get_subtarget (rtx);
136 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
137 HOST_WIDE_INT, enum machine_mode,
138 tree, int, alias_set_type);
139 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
140 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT,
141 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
142 enum machine_mode, tree, alias_set_type, bool);
143
144 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
145
146 static int is_aligning_offset (const_tree, const_tree);
147 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
148 enum expand_modifier);
149 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
150 static rtx do_store_flag (sepops, rtx, enum machine_mode);
151 #ifdef PUSH_ROUNDING
152 static void emit_single_push_insn (enum machine_mode, rtx, tree);
153 #endif
154 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx, int);
155 static rtx const_vector_from_tree (tree);
156 static void write_complex_part (rtx, rtx, bool);
157
158 /* This macro is used to determine whether move_by_pieces should be called
159 to perform a structure copy. */
160 #ifndef MOVE_BY_PIECES_P
161 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
162 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
163 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
164 #endif
165
166 /* This macro is used to determine whether clear_by_pieces should be
167 called to clear storage. */
168 #ifndef CLEAR_BY_PIECES_P
169 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
170 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
171 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
172 #endif
173
174 /* This macro is used to determine whether store_by_pieces should be
175 called to "memset" storage with byte values other than zero. */
176 #ifndef SET_BY_PIECES_P
177 #define SET_BY_PIECES_P(SIZE, ALIGN) \
178 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
179 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
180 #endif
181
182 /* This macro is used to determine whether store_by_pieces should be
183 called to "memcpy" storage when the source is a constant string. */
184 #ifndef STORE_BY_PIECES_P
185 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
186 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
187 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
188 #endif
189 \f
190 /* This is run to set up which modes can be used
191 directly in memory and to initialize the block move optab. It is run
192 at the beginning of compilation and when the target is reinitialized. */
193
194 void
195 init_expr_target (void)
196 {
197 rtx insn, pat;
198 enum machine_mode mode;
199 int num_clobbers;
200 rtx mem, mem1;
201 rtx reg;
202
203 /* Try indexing by frame ptr and try by stack ptr.
204 It is known that on the Convex the stack ptr isn't a valid index.
205 With luck, one or the other is valid on any machine. */
206 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
207 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
208
209 /* A scratch register we can modify in-place below to avoid
210 useless RTL allocations. */
211 reg = gen_rtx_REG (VOIDmode, -1);
212
213 insn = rtx_alloc (INSN);
214 pat = gen_rtx_SET (VOIDmode, NULL_RTX, NULL_RTX);
215 PATTERN (insn) = pat;
216
217 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
218 mode = (enum machine_mode) ((int) mode + 1))
219 {
220 int regno;
221
222 direct_load[(int) mode] = direct_store[(int) mode] = 0;
223 PUT_MODE (mem, mode);
224 PUT_MODE (mem1, mode);
225 PUT_MODE (reg, mode);
226
227 /* See if there is some register that can be used in this mode and
228 directly loaded or stored from memory. */
229
230 if (mode != VOIDmode && mode != BLKmode)
231 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
232 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
233 regno++)
234 {
235 if (! HARD_REGNO_MODE_OK (regno, mode))
236 continue;
237
238 SET_REGNO (reg, regno);
239
240 SET_SRC (pat) = mem;
241 SET_DEST (pat) = reg;
242 if (recog (pat, insn, &num_clobbers) >= 0)
243 direct_load[(int) mode] = 1;
244
245 SET_SRC (pat) = mem1;
246 SET_DEST (pat) = reg;
247 if (recog (pat, insn, &num_clobbers) >= 0)
248 direct_load[(int) mode] = 1;
249
250 SET_SRC (pat) = reg;
251 SET_DEST (pat) = mem;
252 if (recog (pat, insn, &num_clobbers) >= 0)
253 direct_store[(int) mode] = 1;
254
255 SET_SRC (pat) = reg;
256 SET_DEST (pat) = mem1;
257 if (recog (pat, insn, &num_clobbers) >= 0)
258 direct_store[(int) mode] = 1;
259 }
260 }
261
262 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
263
264 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
265 mode = GET_MODE_WIDER_MODE (mode))
266 {
267 enum machine_mode srcmode;
268 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
269 srcmode = GET_MODE_WIDER_MODE (srcmode))
270 {
271 enum insn_code ic;
272
273 ic = can_extend_p (mode, srcmode, 0);
274 if (ic == CODE_FOR_nothing)
275 continue;
276
277 PUT_MODE (mem, srcmode);
278
279 if (insn_operand_matches (ic, 1, mem))
280 float_extend_from_mem[mode][srcmode] = true;
281 }
282 }
283 }
284
285 /* This is run at the start of compiling a function. */
286
287 void
288 init_expr (void)
289 {
290 memset (&crtl->expr, 0, sizeof (crtl->expr));
291 }
292 \f
293 /* Copy data from FROM to TO, where the machine modes are not the same.
294 Both modes may be integer, or both may be floating, or both may be
295 fixed-point.
296 UNSIGNEDP should be nonzero if FROM is an unsigned type.
297 This causes zero-extension instead of sign-extension. */
298
299 void
300 convert_move (rtx to, rtx from, int unsignedp)
301 {
302 enum machine_mode to_mode = GET_MODE (to);
303 enum machine_mode from_mode = GET_MODE (from);
304 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
305 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
306 enum insn_code code;
307 rtx libcall;
308
309 /* rtx code for making an equivalent value. */
310 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
311 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
312
313
314 gcc_assert (to_real == from_real);
315 gcc_assert (to_mode != BLKmode);
316 gcc_assert (from_mode != BLKmode);
317
318 /* If the source and destination are already the same, then there's
319 nothing to do. */
320 if (to == from)
321 return;
322
323 /* If FROM is a SUBREG that indicates that we have already done at least
324 the required extension, strip it. We don't handle such SUBREGs as
325 TO here. */
326
327 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
328 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from)))
329 >= GET_MODE_PRECISION (to_mode))
330 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
331 from = gen_lowpart (to_mode, from), from_mode = to_mode;
332
333 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
334
335 if (to_mode == from_mode
336 || (from_mode == VOIDmode && CONSTANT_P (from)))
337 {
338 emit_move_insn (to, from);
339 return;
340 }
341
342 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
343 {
344 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
345
346 if (VECTOR_MODE_P (to_mode))
347 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
348 else
349 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
350
351 emit_move_insn (to, from);
352 return;
353 }
354
355 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
356 {
357 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
358 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
359 return;
360 }
361
362 if (to_real)
363 {
364 rtx value, insns;
365 convert_optab tab;
366
367 gcc_assert ((GET_MODE_PRECISION (from_mode)
368 != GET_MODE_PRECISION (to_mode))
369 || (DECIMAL_FLOAT_MODE_P (from_mode)
370 != DECIMAL_FLOAT_MODE_P (to_mode)));
371
372 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
373 /* Conversion between decimal float and binary float, same size. */
374 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
375 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
376 tab = sext_optab;
377 else
378 tab = trunc_optab;
379
380 /* Try converting directly if the insn is supported. */
381
382 code = convert_optab_handler (tab, to_mode, from_mode);
383 if (code != CODE_FOR_nothing)
384 {
385 emit_unop_insn (code, to, from,
386 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
387 return;
388 }
389
390 /* Otherwise use a libcall. */
391 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
392
393 /* Is this conversion implemented yet? */
394 gcc_assert (libcall);
395
396 start_sequence ();
397 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
398 1, from, from_mode);
399 insns = get_insns ();
400 end_sequence ();
401 emit_libcall_block (insns, to, value,
402 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
403 from)
404 : gen_rtx_FLOAT_EXTEND (to_mode, from));
405 return;
406 }
407
408 /* Handle pointer conversion. */ /* SPEE 900220. */
409 /* Targets are expected to provide conversion insns between PxImode and
410 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
411 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
412 {
413 enum machine_mode full_mode
414 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
415
416 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
417 != CODE_FOR_nothing);
418
419 if (full_mode != from_mode)
420 from = convert_to_mode (full_mode, from, unsignedp);
421 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
422 to, from, UNKNOWN);
423 return;
424 }
425 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
426 {
427 rtx new_from;
428 enum machine_mode full_mode
429 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
430 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
431 enum insn_code icode;
432
433 icode = convert_optab_handler (ctab, full_mode, from_mode);
434 gcc_assert (icode != CODE_FOR_nothing);
435
436 if (to_mode == full_mode)
437 {
438 emit_unop_insn (icode, to, from, UNKNOWN);
439 return;
440 }
441
442 new_from = gen_reg_rtx (full_mode);
443 emit_unop_insn (icode, new_from, from, UNKNOWN);
444
445 /* else proceed to integer conversions below. */
446 from_mode = full_mode;
447 from = new_from;
448 }
449
450 /* Make sure both are fixed-point modes or both are not. */
451 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
452 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
453 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
454 {
455 /* If we widen from_mode to to_mode and they are in the same class,
456 we won't saturate the result.
457 Otherwise, always saturate the result to play safe. */
458 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
459 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
460 expand_fixed_convert (to, from, 0, 0);
461 else
462 expand_fixed_convert (to, from, 0, 1);
463 return;
464 }
465
466 /* Now both modes are integers. */
467
468 /* Handle expanding beyond a word. */
469 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
470 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
471 {
472 rtx insns;
473 rtx lowpart;
474 rtx fill_value;
475 rtx lowfrom;
476 int i;
477 enum machine_mode lowpart_mode;
478 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
479
480 /* Try converting directly if the insn is supported. */
481 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
482 != CODE_FOR_nothing)
483 {
484 /* If FROM is a SUBREG, put it into a register. Do this
485 so that we always generate the same set of insns for
486 better cse'ing; if an intermediate assignment occurred,
487 we won't be doing the operation directly on the SUBREG. */
488 if (optimize > 0 && GET_CODE (from) == SUBREG)
489 from = force_reg (from_mode, from);
490 emit_unop_insn (code, to, from, equiv_code);
491 return;
492 }
493 /* Next, try converting via full word. */
494 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
495 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
496 != CODE_FOR_nothing))
497 {
498 rtx word_to = gen_reg_rtx (word_mode);
499 if (REG_P (to))
500 {
501 if (reg_overlap_mentioned_p (to, from))
502 from = force_reg (from_mode, from);
503 emit_clobber (to);
504 }
505 convert_move (word_to, from, unsignedp);
506 emit_unop_insn (code, to, word_to, equiv_code);
507 return;
508 }
509
510 /* No special multiword conversion insn; do it by hand. */
511 start_sequence ();
512
513 /* Since we will turn this into a no conflict block, we must ensure the
514 the source does not overlap the target so force it into an isolated
515 register when maybe so. Likewise for any MEM input, since the
516 conversion sequence might require several references to it and we
517 must ensure we're getting the same value every time. */
518
519 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
520 from = force_reg (from_mode, from);
521
522 /* Get a copy of FROM widened to a word, if necessary. */
523 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
524 lowpart_mode = word_mode;
525 else
526 lowpart_mode = from_mode;
527
528 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
529
530 lowpart = gen_lowpart (lowpart_mode, to);
531 emit_move_insn (lowpart, lowfrom);
532
533 /* Compute the value to put in each remaining word. */
534 if (unsignedp)
535 fill_value = const0_rtx;
536 else
537 fill_value = emit_store_flag (gen_reg_rtx (word_mode),
538 LT, lowfrom, const0_rtx,
539 VOIDmode, 0, -1);
540
541 /* Fill the remaining words. */
542 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
543 {
544 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
545 rtx subword = operand_subword (to, index, 1, to_mode);
546
547 gcc_assert (subword);
548
549 if (fill_value != subword)
550 emit_move_insn (subword, fill_value);
551 }
552
553 insns = get_insns ();
554 end_sequence ();
555
556 emit_insn (insns);
557 return;
558 }
559
560 /* Truncating multi-word to a word or less. */
561 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
562 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
563 {
564 if (!((MEM_P (from)
565 && ! MEM_VOLATILE_P (from)
566 && direct_load[(int) to_mode]
567 && ! mode_dependent_address_p (XEXP (from, 0),
568 MEM_ADDR_SPACE (from)))
569 || REG_P (from)
570 || GET_CODE (from) == SUBREG))
571 from = force_reg (from_mode, from);
572 convert_move (to, gen_lowpart (word_mode, from), 0);
573 return;
574 }
575
576 /* Now follow all the conversions between integers
577 no more than a word long. */
578
579 /* For truncation, usually we can just refer to FROM in a narrower mode. */
580 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
581 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
582 {
583 if (!((MEM_P (from)
584 && ! MEM_VOLATILE_P (from)
585 && direct_load[(int) to_mode]
586 && ! mode_dependent_address_p (XEXP (from, 0),
587 MEM_ADDR_SPACE (from)))
588 || REG_P (from)
589 || GET_CODE (from) == SUBREG))
590 from = force_reg (from_mode, from);
591 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
592 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
593 from = copy_to_reg (from);
594 emit_move_insn (to, gen_lowpart (to_mode, from));
595 return;
596 }
597
598 /* Handle extension. */
599 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
600 {
601 /* Convert directly if that works. */
602 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
603 != CODE_FOR_nothing)
604 {
605 emit_unop_insn (code, to, from, equiv_code);
606 return;
607 }
608 else
609 {
610 enum machine_mode intermediate;
611 rtx tmp;
612 int shift_amount;
613
614 /* Search for a mode to convert via. */
615 for (intermediate = from_mode; intermediate != VOIDmode;
616 intermediate = GET_MODE_WIDER_MODE (intermediate))
617 if (((can_extend_p (to_mode, intermediate, unsignedp)
618 != CODE_FOR_nothing)
619 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
620 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, intermediate)))
621 && (can_extend_p (intermediate, from_mode, unsignedp)
622 != CODE_FOR_nothing))
623 {
624 convert_move (to, convert_to_mode (intermediate, from,
625 unsignedp), unsignedp);
626 return;
627 }
628
629 /* No suitable intermediate mode.
630 Generate what we need with shifts. */
631 shift_amount = (GET_MODE_PRECISION (to_mode)
632 - GET_MODE_PRECISION (from_mode));
633 from = gen_lowpart (to_mode, force_reg (from_mode, from));
634 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
635 to, unsignedp);
636 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
637 to, unsignedp);
638 if (tmp != to)
639 emit_move_insn (to, tmp);
640 return;
641 }
642 }
643
644 /* Support special truncate insns for certain modes. */
645 if (convert_optab_handler (trunc_optab, to_mode,
646 from_mode) != CODE_FOR_nothing)
647 {
648 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
649 to, from, UNKNOWN);
650 return;
651 }
652
653 /* Handle truncation of volatile memrefs, and so on;
654 the things that couldn't be truncated directly,
655 and for which there was no special instruction.
656
657 ??? Code above formerly short-circuited this, for most integer
658 mode pairs, with a force_reg in from_mode followed by a recursive
659 call to this routine. Appears always to have been wrong. */
660 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
661 {
662 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
663 emit_move_insn (to, temp);
664 return;
665 }
666
667 /* Mode combination is not recognized. */
668 gcc_unreachable ();
669 }
670
671 /* Return an rtx for a value that would result
672 from converting X to mode MODE.
673 Both X and MODE may be floating, or both integer.
674 UNSIGNEDP is nonzero if X is an unsigned value.
675 This can be done by referring to a part of X in place
676 or by copying to a new temporary with conversion. */
677
678 rtx
679 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
680 {
681 return convert_modes (mode, VOIDmode, x, unsignedp);
682 }
683
684 /* Return an rtx for a value that would result
685 from converting X from mode OLDMODE to mode MODE.
686 Both modes may be floating, or both integer.
687 UNSIGNEDP is nonzero if X is an unsigned value.
688
689 This can be done by referring to a part of X in place
690 or by copying to a new temporary with conversion.
691
692 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
693
694 rtx
695 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
696 {
697 rtx temp;
698
699 /* If FROM is a SUBREG that indicates that we have already done at least
700 the required extension, strip it. */
701
702 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
703 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
704 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
705 x = gen_lowpart (mode, x);
706
707 if (GET_MODE (x) != VOIDmode)
708 oldmode = GET_MODE (x);
709
710 if (mode == oldmode)
711 return x;
712
713 /* There is one case that we must handle specially: If we are converting
714 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
715 we are to interpret the constant as unsigned, gen_lowpart will do
716 the wrong if the constant appears negative. What we want to do is
717 make the high-order word of the constant zero, not all ones. */
718
719 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
720 && GET_MODE_BITSIZE (mode) == HOST_BITS_PER_DOUBLE_INT
721 && CONST_INT_P (x) && INTVAL (x) < 0)
722 {
723 double_int val = double_int::from_uhwi (INTVAL (x));
724
725 /* We need to zero extend VAL. */
726 if (oldmode != VOIDmode)
727 val = val.zext (GET_MODE_BITSIZE (oldmode));
728
729 return immed_double_int_const (val, mode);
730 }
731
732 /* We can do this with a gen_lowpart if both desired and current modes
733 are integer, and this is either a constant integer, a register, or a
734 non-volatile MEM. Except for the constant case where MODE is no
735 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
736
737 if ((CONST_INT_P (x)
738 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT)
739 || (GET_MODE_CLASS (mode) == MODE_INT
740 && GET_MODE_CLASS (oldmode) == MODE_INT
741 && (CONST_DOUBLE_AS_INT_P (x)
742 || (GET_MODE_PRECISION (mode) <= GET_MODE_PRECISION (oldmode)
743 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
744 && direct_load[(int) mode])
745 || (REG_P (x)
746 && (! HARD_REGISTER_P (x)
747 || HARD_REGNO_MODE_OK (REGNO (x), mode))
748 && TRULY_NOOP_TRUNCATION_MODES_P (mode,
749 GET_MODE (x))))))))
750 {
751 /* ?? If we don't know OLDMODE, we have to assume here that
752 X does not need sign- or zero-extension. This may not be
753 the case, but it's the best we can do. */
754 if (CONST_INT_P (x) && oldmode != VOIDmode
755 && GET_MODE_PRECISION (mode) > GET_MODE_PRECISION (oldmode))
756 {
757 HOST_WIDE_INT val = INTVAL (x);
758
759 /* We must sign or zero-extend in this case. Start by
760 zero-extending, then sign extend if we need to. */
761 val &= GET_MODE_MASK (oldmode);
762 if (! unsignedp
763 && val_signbit_known_set_p (oldmode, val))
764 val |= ~GET_MODE_MASK (oldmode);
765
766 return gen_int_mode (val, mode);
767 }
768
769 return gen_lowpart (mode, x);
770 }
771
772 /* Converting from integer constant into mode is always equivalent to an
773 subreg operation. */
774 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
775 {
776 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
777 return simplify_gen_subreg (mode, x, oldmode, 0);
778 }
779
780 temp = gen_reg_rtx (mode);
781 convert_move (temp, x, unsignedp);
782 return temp;
783 }
784 \f
785 /* Return the largest alignment we can use for doing a move (or store)
786 of MAX_PIECES. ALIGN is the largest alignment we could use. */
787
788 static unsigned int
789 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
790 {
791 enum machine_mode tmode;
792
793 tmode = mode_for_size (max_pieces * BITS_PER_UNIT, MODE_INT, 1);
794 if (align >= GET_MODE_ALIGNMENT (tmode))
795 align = GET_MODE_ALIGNMENT (tmode);
796 else
797 {
798 enum machine_mode tmode, xmode;
799
800 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
801 tmode != VOIDmode;
802 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
803 if (GET_MODE_SIZE (tmode) > max_pieces
804 || SLOW_UNALIGNED_ACCESS (tmode, align))
805 break;
806
807 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
808 }
809
810 return align;
811 }
812
813 /* Return the widest integer mode no wider than SIZE. If no such mode
814 can be found, return VOIDmode. */
815
816 static enum machine_mode
817 widest_int_mode_for_size (unsigned int size)
818 {
819 enum machine_mode tmode, mode = VOIDmode;
820
821 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
822 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
823 if (GET_MODE_SIZE (tmode) < size)
824 mode = tmode;
825
826 return mode;
827 }
828
829 /* STORE_MAX_PIECES is the number of bytes at a time that we can
830 store efficiently. Due to internal GCC limitations, this is
831 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
832 for an immediate constant. */
833
834 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
835
836 /* Determine whether the LEN bytes can be moved by using several move
837 instructions. Return nonzero if a call to move_by_pieces should
838 succeed. */
839
840 int
841 can_move_by_pieces (unsigned HOST_WIDE_INT len ATTRIBUTE_UNUSED,
842 unsigned int align ATTRIBUTE_UNUSED)
843 {
844 return MOVE_BY_PIECES_P (len, align);
845 }
846
847 /* Generate several move instructions to copy LEN bytes from block FROM to
848 block TO. (These are MEM rtx's with BLKmode).
849
850 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
851 used to push FROM to the stack.
852
853 ALIGN is maximum stack alignment we can assume.
854
855 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
856 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
857 stpcpy. */
858
859 rtx
860 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
861 unsigned int align, int endp)
862 {
863 struct move_by_pieces_d data;
864 enum machine_mode to_addr_mode;
865 enum machine_mode from_addr_mode = get_address_mode (from);
866 rtx to_addr, from_addr = XEXP (from, 0);
867 unsigned int max_size = MOVE_MAX_PIECES + 1;
868 enum insn_code icode;
869
870 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
871
872 data.offset = 0;
873 data.from_addr = from_addr;
874 if (to)
875 {
876 to_addr_mode = get_address_mode (to);
877 to_addr = XEXP (to, 0);
878 data.to = to;
879 data.autinc_to
880 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
881 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
882 data.reverse
883 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
884 }
885 else
886 {
887 to_addr_mode = VOIDmode;
888 to_addr = NULL_RTX;
889 data.to = NULL_RTX;
890 data.autinc_to = 1;
891 #ifdef STACK_GROWS_DOWNWARD
892 data.reverse = 1;
893 #else
894 data.reverse = 0;
895 #endif
896 }
897 data.to_addr = to_addr;
898 data.from = from;
899 data.autinc_from
900 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
901 || GET_CODE (from_addr) == POST_INC
902 || GET_CODE (from_addr) == POST_DEC);
903
904 data.explicit_inc_from = 0;
905 data.explicit_inc_to = 0;
906 if (data.reverse) data.offset = len;
907 data.len = len;
908
909 /* If copying requires more than two move insns,
910 copy addresses to registers (to make displacements shorter)
911 and use post-increment if available. */
912 if (!(data.autinc_from && data.autinc_to)
913 && move_by_pieces_ninsns (len, align, max_size) > 2)
914 {
915 /* Find the mode of the largest move...
916 MODE might not be used depending on the definitions of the
917 USE_* macros below. */
918 enum machine_mode mode ATTRIBUTE_UNUSED
919 = widest_int_mode_for_size (max_size);
920
921 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
922 {
923 data.from_addr = copy_to_mode_reg (from_addr_mode,
924 plus_constant (from_addr_mode,
925 from_addr, len));
926 data.autinc_from = 1;
927 data.explicit_inc_from = -1;
928 }
929 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
930 {
931 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
932 data.autinc_from = 1;
933 data.explicit_inc_from = 1;
934 }
935 if (!data.autinc_from && CONSTANT_P (from_addr))
936 data.from_addr = copy_to_mode_reg (from_addr_mode, from_addr);
937 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
938 {
939 data.to_addr = copy_to_mode_reg (to_addr_mode,
940 plus_constant (to_addr_mode,
941 to_addr, len));
942 data.autinc_to = 1;
943 data.explicit_inc_to = -1;
944 }
945 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
946 {
947 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
948 data.autinc_to = 1;
949 data.explicit_inc_to = 1;
950 }
951 if (!data.autinc_to && CONSTANT_P (to_addr))
952 data.to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
953 }
954
955 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
956
957 /* First move what we can in the largest integer mode, then go to
958 successively smaller modes. */
959
960 while (max_size > 1 && data.len > 0)
961 {
962 enum machine_mode mode = widest_int_mode_for_size (max_size);
963
964 if (mode == VOIDmode)
965 break;
966
967 icode = optab_handler (mov_optab, mode);
968 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
969 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
970
971 max_size = GET_MODE_SIZE (mode);
972 }
973
974 /* The code above should have handled everything. */
975 gcc_assert (!data.len);
976
977 if (endp)
978 {
979 rtx to1;
980
981 gcc_assert (!data.reverse);
982 if (data.autinc_to)
983 {
984 if (endp == 2)
985 {
986 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
987 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
988 else
989 data.to_addr = copy_to_mode_reg (to_addr_mode,
990 plus_constant (to_addr_mode,
991 data.to_addr,
992 -1));
993 }
994 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
995 data.offset);
996 }
997 else
998 {
999 if (endp == 2)
1000 --data.offset;
1001 to1 = adjust_address (data.to, QImode, data.offset);
1002 }
1003 return to1;
1004 }
1005 else
1006 return data.to;
1007 }
1008
1009 /* Return number of insns required to move L bytes by pieces.
1010 ALIGN (in bits) is maximum alignment we can assume. */
1011
1012 unsigned HOST_WIDE_INT
1013 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1014 unsigned int max_size)
1015 {
1016 unsigned HOST_WIDE_INT n_insns = 0;
1017
1018 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1019
1020 while (max_size > 1 && l > 0)
1021 {
1022 enum machine_mode mode;
1023 enum insn_code icode;
1024
1025 mode = widest_int_mode_for_size (max_size);
1026
1027 if (mode == VOIDmode)
1028 break;
1029
1030 icode = optab_handler (mov_optab, mode);
1031 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1032 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1033
1034 max_size = GET_MODE_SIZE (mode);
1035 }
1036
1037 gcc_assert (!l);
1038 return n_insns;
1039 }
1040
1041 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1042 with move instructions for mode MODE. GENFUN is the gen_... function
1043 to make a move insn for that mode. DATA has all the other info. */
1044
1045 static void
1046 move_by_pieces_1 (insn_gen_fn genfun, machine_mode mode,
1047 struct move_by_pieces_d *data)
1048 {
1049 unsigned int size = GET_MODE_SIZE (mode);
1050 rtx to1 = NULL_RTX, from1;
1051
1052 while (data->len >= size)
1053 {
1054 if (data->reverse)
1055 data->offset -= size;
1056
1057 if (data->to)
1058 {
1059 if (data->autinc_to)
1060 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1061 data->offset);
1062 else
1063 to1 = adjust_address (data->to, mode, data->offset);
1064 }
1065
1066 if (data->autinc_from)
1067 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1068 data->offset);
1069 else
1070 from1 = adjust_address (data->from, mode, data->offset);
1071
1072 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1073 emit_insn (gen_add2_insn (data->to_addr,
1074 gen_int_mode (-(HOST_WIDE_INT) size,
1075 GET_MODE (data->to_addr))));
1076 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1077 emit_insn (gen_add2_insn (data->from_addr,
1078 gen_int_mode (-(HOST_WIDE_INT) size,
1079 GET_MODE (data->from_addr))));
1080
1081 if (data->to)
1082 emit_insn ((*genfun) (to1, from1));
1083 else
1084 {
1085 #ifdef PUSH_ROUNDING
1086 emit_single_push_insn (mode, from1, NULL);
1087 #else
1088 gcc_unreachable ();
1089 #endif
1090 }
1091
1092 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1093 emit_insn (gen_add2_insn (data->to_addr,
1094 gen_int_mode (size,
1095 GET_MODE (data->to_addr))));
1096 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1097 emit_insn (gen_add2_insn (data->from_addr,
1098 gen_int_mode (size,
1099 GET_MODE (data->from_addr))));
1100
1101 if (! data->reverse)
1102 data->offset += size;
1103
1104 data->len -= size;
1105 }
1106 }
1107 \f
1108 /* Emit code to move a block Y to a block X. This may be done with
1109 string-move instructions, with multiple scalar move instructions,
1110 or with a library call.
1111
1112 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1113 SIZE is an rtx that says how long they are.
1114 ALIGN is the maximum alignment we can assume they have.
1115 METHOD describes what kind of copy this is, and what mechanisms may be used.
1116
1117 Return the address of the new block, if memcpy is called and returns it,
1118 0 otherwise. */
1119
1120 rtx
1121 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1122 unsigned int expected_align, HOST_WIDE_INT expected_size)
1123 {
1124 bool may_use_call;
1125 rtx retval = 0;
1126 unsigned int align;
1127
1128 gcc_assert (size);
1129 if (CONST_INT_P (size)
1130 && INTVAL (size) == 0)
1131 return 0;
1132
1133 switch (method)
1134 {
1135 case BLOCK_OP_NORMAL:
1136 case BLOCK_OP_TAILCALL:
1137 may_use_call = true;
1138 break;
1139
1140 case BLOCK_OP_CALL_PARM:
1141 may_use_call = block_move_libcall_safe_for_call_parm ();
1142
1143 /* Make inhibit_defer_pop nonzero around the library call
1144 to force it to pop the arguments right away. */
1145 NO_DEFER_POP;
1146 break;
1147
1148 case BLOCK_OP_NO_LIBCALL:
1149 may_use_call = false;
1150 break;
1151
1152 default:
1153 gcc_unreachable ();
1154 }
1155
1156 gcc_assert (MEM_P (x) && MEM_P (y));
1157 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1158 gcc_assert (align >= BITS_PER_UNIT);
1159
1160 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1161 block copy is more efficient for other large modes, e.g. DCmode. */
1162 x = adjust_address (x, BLKmode, 0);
1163 y = adjust_address (y, BLKmode, 0);
1164
1165 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1166 can be incorrect is coming from __builtin_memcpy. */
1167 if (CONST_INT_P (size))
1168 {
1169 x = shallow_copy_rtx (x);
1170 y = shallow_copy_rtx (y);
1171 set_mem_size (x, INTVAL (size));
1172 set_mem_size (y, INTVAL (size));
1173 }
1174
1175 if (CONST_INT_P (size) && MOVE_BY_PIECES_P (INTVAL (size), align))
1176 move_by_pieces (x, y, INTVAL (size), align, 0);
1177 else if (emit_block_move_via_movmem (x, y, size, align,
1178 expected_align, expected_size))
1179 ;
1180 else if (may_use_call
1181 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1182 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1183 {
1184 /* Since x and y are passed to a libcall, mark the corresponding
1185 tree EXPR as addressable. */
1186 tree y_expr = MEM_EXPR (y);
1187 tree x_expr = MEM_EXPR (x);
1188 if (y_expr)
1189 mark_addressable (y_expr);
1190 if (x_expr)
1191 mark_addressable (x_expr);
1192 retval = emit_block_move_via_libcall (x, y, size,
1193 method == BLOCK_OP_TAILCALL);
1194 }
1195
1196 else
1197 emit_block_move_via_loop (x, y, size, align);
1198
1199 if (method == BLOCK_OP_CALL_PARM)
1200 OK_DEFER_POP;
1201
1202 return retval;
1203 }
1204
1205 rtx
1206 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1207 {
1208 return emit_block_move_hints (x, y, size, method, 0, -1);
1209 }
1210
1211 /* A subroutine of emit_block_move. Returns true if calling the
1212 block move libcall will not clobber any parameters which may have
1213 already been placed on the stack. */
1214
1215 static bool
1216 block_move_libcall_safe_for_call_parm (void)
1217 {
1218 #if defined (REG_PARM_STACK_SPACE)
1219 tree fn;
1220 #endif
1221
1222 /* If arguments are pushed on the stack, then they're safe. */
1223 if (PUSH_ARGS)
1224 return true;
1225
1226 /* If registers go on the stack anyway, any argument is sure to clobber
1227 an outgoing argument. */
1228 #if defined (REG_PARM_STACK_SPACE)
1229 fn = emit_block_move_libcall_fn (false);
1230 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1231 depend on its argument. */
1232 (void) fn;
1233 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1234 && REG_PARM_STACK_SPACE (fn) != 0)
1235 return false;
1236 #endif
1237
1238 /* If any argument goes in memory, then it might clobber an outgoing
1239 argument. */
1240 {
1241 CUMULATIVE_ARGS args_so_far_v;
1242 cumulative_args_t args_so_far;
1243 tree fn, arg;
1244
1245 fn = emit_block_move_libcall_fn (false);
1246 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1247 args_so_far = pack_cumulative_args (&args_so_far_v);
1248
1249 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1250 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1251 {
1252 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1253 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1254 NULL_TREE, true);
1255 if (!tmp || !REG_P (tmp))
1256 return false;
1257 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1258 return false;
1259 targetm.calls.function_arg_advance (args_so_far, mode,
1260 NULL_TREE, true);
1261 }
1262 }
1263 return true;
1264 }
1265
1266 /* A subroutine of emit_block_move. Expand a movmem pattern;
1267 return true if successful. */
1268
1269 static bool
1270 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1271 unsigned int expected_align, HOST_WIDE_INT expected_size)
1272 {
1273 int save_volatile_ok = volatile_ok;
1274 enum machine_mode mode;
1275
1276 if (expected_align < align)
1277 expected_align = align;
1278
1279 /* Since this is a move insn, we don't care about volatility. */
1280 volatile_ok = 1;
1281
1282 /* Try the most limited insn first, because there's no point
1283 including more than one in the machine description unless
1284 the more limited one has some advantage. */
1285
1286 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1287 mode = GET_MODE_WIDER_MODE (mode))
1288 {
1289 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1290
1291 if (code != CODE_FOR_nothing
1292 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1293 here because if SIZE is less than the mode mask, as it is
1294 returned by the macro, it will definitely be less than the
1295 actual mode mask. */
1296 && ((CONST_INT_P (size)
1297 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1298 <= (GET_MODE_MASK (mode) >> 1)))
1299 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
1300 {
1301 struct expand_operand ops[6];
1302 unsigned int nops;
1303
1304 /* ??? When called via emit_block_move_for_call, it'd be
1305 nice if there were some way to inform the backend, so
1306 that it doesn't fail the expansion because it thinks
1307 emitting the libcall would be more efficient. */
1308 nops = insn_data[(int) code].n_generator_args;
1309 gcc_assert (nops == 4 || nops == 6);
1310
1311 create_fixed_operand (&ops[0], x);
1312 create_fixed_operand (&ops[1], y);
1313 /* The check above guarantees that this size conversion is valid. */
1314 create_convert_operand_to (&ops[2], size, mode, true);
1315 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1316 if (nops == 6)
1317 {
1318 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1319 create_integer_operand (&ops[5], expected_size);
1320 }
1321 if (maybe_expand_insn (code, nops, ops))
1322 {
1323 volatile_ok = save_volatile_ok;
1324 return true;
1325 }
1326 }
1327 }
1328
1329 volatile_ok = save_volatile_ok;
1330 return false;
1331 }
1332
1333 /* A subroutine of emit_block_move. Expand a call to memcpy.
1334 Return the return value from memcpy, 0 otherwise. */
1335
1336 rtx
1337 emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1338 {
1339 rtx dst_addr, src_addr;
1340 tree call_expr, fn, src_tree, dst_tree, size_tree;
1341 enum machine_mode size_mode;
1342 rtx retval;
1343
1344 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1345 pseudos. We can then place those new pseudos into a VAR_DECL and
1346 use them later. */
1347
1348 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1349 src_addr = copy_addr_to_reg (XEXP (src, 0));
1350
1351 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1352 src_addr = convert_memory_address (ptr_mode, src_addr);
1353
1354 dst_tree = make_tree (ptr_type_node, dst_addr);
1355 src_tree = make_tree (ptr_type_node, src_addr);
1356
1357 size_mode = TYPE_MODE (sizetype);
1358
1359 size = convert_to_mode (size_mode, size, 1);
1360 size = copy_to_mode_reg (size_mode, size);
1361
1362 /* It is incorrect to use the libcall calling conventions to call
1363 memcpy in this context. This could be a user call to memcpy and
1364 the user may wish to examine the return value from memcpy. For
1365 targets where libcalls and normal calls have different conventions
1366 for returning pointers, we could end up generating incorrect code. */
1367
1368 size_tree = make_tree (sizetype, size);
1369
1370 fn = emit_block_move_libcall_fn (true);
1371 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1372 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1373
1374 retval = expand_normal (call_expr);
1375
1376 return retval;
1377 }
1378
1379 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1380 for the function we use for block copies. */
1381
1382 static GTY(()) tree block_move_fn;
1383
1384 void
1385 init_block_move_fn (const char *asmspec)
1386 {
1387 if (!block_move_fn)
1388 {
1389 tree args, fn, attrs, attr_args;
1390
1391 fn = get_identifier ("memcpy");
1392 args = build_function_type_list (ptr_type_node, ptr_type_node,
1393 const_ptr_type_node, sizetype,
1394 NULL_TREE);
1395
1396 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
1397 DECL_EXTERNAL (fn) = 1;
1398 TREE_PUBLIC (fn) = 1;
1399 DECL_ARTIFICIAL (fn) = 1;
1400 TREE_NOTHROW (fn) = 1;
1401 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1402 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1403
1404 attr_args = build_tree_list (NULL_TREE, build_string (1, "1"));
1405 attrs = tree_cons (get_identifier ("fn spec"), attr_args, NULL);
1406
1407 decl_attributes (&fn, attrs, ATTR_FLAG_BUILT_IN);
1408
1409 block_move_fn = fn;
1410 }
1411
1412 if (asmspec)
1413 set_user_assembler_name (block_move_fn, asmspec);
1414 }
1415
1416 static tree
1417 emit_block_move_libcall_fn (int for_call)
1418 {
1419 static bool emitted_extern;
1420
1421 if (!block_move_fn)
1422 init_block_move_fn (NULL);
1423
1424 if (for_call && !emitted_extern)
1425 {
1426 emitted_extern = true;
1427 make_decl_rtl (block_move_fn);
1428 }
1429
1430 return block_move_fn;
1431 }
1432
1433 /* A subroutine of emit_block_move. Copy the data via an explicit
1434 loop. This is used only when libcalls are forbidden. */
1435 /* ??? It'd be nice to copy in hunks larger than QImode. */
1436
1437 static void
1438 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1439 unsigned int align ATTRIBUTE_UNUSED)
1440 {
1441 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1442 enum machine_mode x_addr_mode = get_address_mode (x);
1443 enum machine_mode y_addr_mode = get_address_mode (y);
1444 enum machine_mode iter_mode;
1445
1446 iter_mode = GET_MODE (size);
1447 if (iter_mode == VOIDmode)
1448 iter_mode = word_mode;
1449
1450 top_label = gen_label_rtx ();
1451 cmp_label = gen_label_rtx ();
1452 iter = gen_reg_rtx (iter_mode);
1453
1454 emit_move_insn (iter, const0_rtx);
1455
1456 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1457 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1458 do_pending_stack_adjust ();
1459
1460 emit_jump (cmp_label);
1461 emit_label (top_label);
1462
1463 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1464 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1465
1466 if (x_addr_mode != y_addr_mode)
1467 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1468 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1469
1470 x = change_address (x, QImode, x_addr);
1471 y = change_address (y, QImode, y_addr);
1472
1473 emit_move_insn (x, y);
1474
1475 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1476 true, OPTAB_LIB_WIDEN);
1477 if (tmp != iter)
1478 emit_move_insn (iter, tmp);
1479
1480 emit_label (cmp_label);
1481
1482 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1483 true, top_label, REG_BR_PROB_BASE * 90 / 100);
1484 }
1485 \f
1486 /* Copy all or part of a value X into registers starting at REGNO.
1487 The number of registers to be filled is NREGS. */
1488
1489 void
1490 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1491 {
1492 int i;
1493 #ifdef HAVE_load_multiple
1494 rtx pat;
1495 rtx last;
1496 #endif
1497
1498 if (nregs == 0)
1499 return;
1500
1501 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
1502 x = validize_mem (force_const_mem (mode, x));
1503
1504 /* See if the machine can do this with a load multiple insn. */
1505 #ifdef HAVE_load_multiple
1506 if (HAVE_load_multiple)
1507 {
1508 last = get_last_insn ();
1509 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1510 GEN_INT (nregs));
1511 if (pat)
1512 {
1513 emit_insn (pat);
1514 return;
1515 }
1516 else
1517 delete_insns_since (last);
1518 }
1519 #endif
1520
1521 for (i = 0; i < nregs; i++)
1522 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1523 operand_subword_force (x, i, mode));
1524 }
1525
1526 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1527 The number of registers to be filled is NREGS. */
1528
1529 void
1530 move_block_from_reg (int regno, rtx x, int nregs)
1531 {
1532 int i;
1533
1534 if (nregs == 0)
1535 return;
1536
1537 /* See if the machine can do this with a store multiple insn. */
1538 #ifdef HAVE_store_multiple
1539 if (HAVE_store_multiple)
1540 {
1541 rtx last = get_last_insn ();
1542 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1543 GEN_INT (nregs));
1544 if (pat)
1545 {
1546 emit_insn (pat);
1547 return;
1548 }
1549 else
1550 delete_insns_since (last);
1551 }
1552 #endif
1553
1554 for (i = 0; i < nregs; i++)
1555 {
1556 rtx tem = operand_subword (x, i, 1, BLKmode);
1557
1558 gcc_assert (tem);
1559
1560 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1561 }
1562 }
1563
1564 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1565 ORIG, where ORIG is a non-consecutive group of registers represented by
1566 a PARALLEL. The clone is identical to the original except in that the
1567 original set of registers is replaced by a new set of pseudo registers.
1568 The new set has the same modes as the original set. */
1569
1570 rtx
1571 gen_group_rtx (rtx orig)
1572 {
1573 int i, length;
1574 rtx *tmps;
1575
1576 gcc_assert (GET_CODE (orig) == PARALLEL);
1577
1578 length = XVECLEN (orig, 0);
1579 tmps = XALLOCAVEC (rtx, length);
1580
1581 /* Skip a NULL entry in first slot. */
1582 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1583
1584 if (i)
1585 tmps[0] = 0;
1586
1587 for (; i < length; i++)
1588 {
1589 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1590 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1591
1592 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1593 }
1594
1595 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1596 }
1597
1598 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1599 except that values are placed in TMPS[i], and must later be moved
1600 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1601
1602 static void
1603 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1604 {
1605 rtx src;
1606 int start, i;
1607 enum machine_mode m = GET_MODE (orig_src);
1608
1609 gcc_assert (GET_CODE (dst) == PARALLEL);
1610
1611 if (m != VOIDmode
1612 && !SCALAR_INT_MODE_P (m)
1613 && !MEM_P (orig_src)
1614 && GET_CODE (orig_src) != CONCAT)
1615 {
1616 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1617 if (imode == BLKmode)
1618 src = assign_stack_temp (GET_MODE (orig_src), ssize);
1619 else
1620 src = gen_reg_rtx (imode);
1621 if (imode != BLKmode)
1622 src = gen_lowpart (GET_MODE (orig_src), src);
1623 emit_move_insn (src, orig_src);
1624 /* ...and back again. */
1625 if (imode != BLKmode)
1626 src = gen_lowpart (imode, src);
1627 emit_group_load_1 (tmps, dst, src, type, ssize);
1628 return;
1629 }
1630
1631 /* Check for a NULL entry, used to indicate that the parameter goes
1632 both on the stack and in registers. */
1633 if (XEXP (XVECEXP (dst, 0, 0), 0))
1634 start = 0;
1635 else
1636 start = 1;
1637
1638 /* Process the pieces. */
1639 for (i = start; i < XVECLEN (dst, 0); i++)
1640 {
1641 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1642 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1643 unsigned int bytelen = GET_MODE_SIZE (mode);
1644 int shift = 0;
1645
1646 /* Handle trailing fragments that run over the size of the struct. */
1647 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1648 {
1649 /* Arrange to shift the fragment to where it belongs.
1650 extract_bit_field loads to the lsb of the reg. */
1651 if (
1652 #ifdef BLOCK_REG_PADDING
1653 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1654 == (BYTES_BIG_ENDIAN ? upward : downward)
1655 #else
1656 BYTES_BIG_ENDIAN
1657 #endif
1658 )
1659 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1660 bytelen = ssize - bytepos;
1661 gcc_assert (bytelen > 0);
1662 }
1663
1664 /* If we won't be loading directly from memory, protect the real source
1665 from strange tricks we might play; but make sure that the source can
1666 be loaded directly into the destination. */
1667 src = orig_src;
1668 if (!MEM_P (orig_src)
1669 && (!CONSTANT_P (orig_src)
1670 || (GET_MODE (orig_src) != mode
1671 && GET_MODE (orig_src) != VOIDmode)))
1672 {
1673 if (GET_MODE (orig_src) == VOIDmode)
1674 src = gen_reg_rtx (mode);
1675 else
1676 src = gen_reg_rtx (GET_MODE (orig_src));
1677
1678 emit_move_insn (src, orig_src);
1679 }
1680
1681 /* Optimize the access just a bit. */
1682 if (MEM_P (src)
1683 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1684 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1685 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1686 && bytelen == GET_MODE_SIZE (mode))
1687 {
1688 tmps[i] = gen_reg_rtx (mode);
1689 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1690 }
1691 else if (COMPLEX_MODE_P (mode)
1692 && GET_MODE (src) == mode
1693 && bytelen == GET_MODE_SIZE (mode))
1694 /* Let emit_move_complex do the bulk of the work. */
1695 tmps[i] = src;
1696 else if (GET_CODE (src) == CONCAT)
1697 {
1698 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1699 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1700
1701 if ((bytepos == 0 && bytelen == slen0)
1702 || (bytepos != 0 && bytepos + bytelen <= slen))
1703 {
1704 /* The following assumes that the concatenated objects all
1705 have the same size. In this case, a simple calculation
1706 can be used to determine the object and the bit field
1707 to be extracted. */
1708 tmps[i] = XEXP (src, bytepos / slen0);
1709 if (! CONSTANT_P (tmps[i])
1710 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1711 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1712 (bytepos % slen0) * BITS_PER_UNIT,
1713 1, false, NULL_RTX, mode, mode);
1714 }
1715 else
1716 {
1717 rtx mem;
1718
1719 gcc_assert (!bytepos);
1720 mem = assign_stack_temp (GET_MODE (src), slen);
1721 emit_move_insn (mem, src);
1722 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1723 0, 1, false, NULL_RTX, mode, mode);
1724 }
1725 }
1726 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1727 SIMD register, which is currently broken. While we get GCC
1728 to emit proper RTL for these cases, let's dump to memory. */
1729 else if (VECTOR_MODE_P (GET_MODE (dst))
1730 && REG_P (src))
1731 {
1732 int slen = GET_MODE_SIZE (GET_MODE (src));
1733 rtx mem;
1734
1735 mem = assign_stack_temp (GET_MODE (src), slen);
1736 emit_move_insn (mem, src);
1737 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1738 }
1739 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1740 && XVECLEN (dst, 0) > 1)
1741 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1742 else if (CONSTANT_P (src))
1743 {
1744 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1745
1746 if (len == ssize)
1747 tmps[i] = src;
1748 else
1749 {
1750 rtx first, second;
1751
1752 gcc_assert (2 * len == ssize);
1753 split_double (src, &first, &second);
1754 if (i)
1755 tmps[i] = second;
1756 else
1757 tmps[i] = first;
1758 }
1759 }
1760 else if (REG_P (src) && GET_MODE (src) == mode)
1761 tmps[i] = src;
1762 else
1763 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1764 bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
1765 mode, mode);
1766
1767 if (shift)
1768 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1769 shift, tmps[i], 0);
1770 }
1771 }
1772
1773 /* Emit code to move a block SRC of type TYPE to a block DST,
1774 where DST is non-consecutive registers represented by a PARALLEL.
1775 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1776 if not known. */
1777
1778 void
1779 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1780 {
1781 rtx *tmps;
1782 int i;
1783
1784 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1785 emit_group_load_1 (tmps, dst, src, type, ssize);
1786
1787 /* Copy the extracted pieces into the proper (probable) hard regs. */
1788 for (i = 0; i < XVECLEN (dst, 0); i++)
1789 {
1790 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1791 if (d == NULL)
1792 continue;
1793 emit_move_insn (d, tmps[i]);
1794 }
1795 }
1796
1797 /* Similar, but load SRC into new pseudos in a format that looks like
1798 PARALLEL. This can later be fed to emit_group_move to get things
1799 in the right place. */
1800
1801 rtx
1802 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1803 {
1804 rtvec vec;
1805 int i;
1806
1807 vec = rtvec_alloc (XVECLEN (parallel, 0));
1808 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1809
1810 /* Convert the vector to look just like the original PARALLEL, except
1811 with the computed values. */
1812 for (i = 0; i < XVECLEN (parallel, 0); i++)
1813 {
1814 rtx e = XVECEXP (parallel, 0, i);
1815 rtx d = XEXP (e, 0);
1816
1817 if (d)
1818 {
1819 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1820 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1821 }
1822 RTVEC_ELT (vec, i) = e;
1823 }
1824
1825 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1826 }
1827
1828 /* Emit code to move a block SRC to block DST, where SRC and DST are
1829 non-consecutive groups of registers, each represented by a PARALLEL. */
1830
1831 void
1832 emit_group_move (rtx dst, rtx src)
1833 {
1834 int i;
1835
1836 gcc_assert (GET_CODE (src) == PARALLEL
1837 && GET_CODE (dst) == PARALLEL
1838 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1839
1840 /* Skip first entry if NULL. */
1841 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1842 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1843 XEXP (XVECEXP (src, 0, i), 0));
1844 }
1845
1846 /* Move a group of registers represented by a PARALLEL into pseudos. */
1847
1848 rtx
1849 emit_group_move_into_temps (rtx src)
1850 {
1851 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1852 int i;
1853
1854 for (i = 0; i < XVECLEN (src, 0); i++)
1855 {
1856 rtx e = XVECEXP (src, 0, i);
1857 rtx d = XEXP (e, 0);
1858
1859 if (d)
1860 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1861 RTVEC_ELT (vec, i) = e;
1862 }
1863
1864 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1865 }
1866
1867 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1868 where SRC is non-consecutive registers represented by a PARALLEL.
1869 SSIZE represents the total size of block ORIG_DST, or -1 if not
1870 known. */
1871
1872 void
1873 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1874 {
1875 rtx *tmps, dst;
1876 int start, finish, i;
1877 enum machine_mode m = GET_MODE (orig_dst);
1878
1879 gcc_assert (GET_CODE (src) == PARALLEL);
1880
1881 if (!SCALAR_INT_MODE_P (m)
1882 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1883 {
1884 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1885 if (imode == BLKmode)
1886 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
1887 else
1888 dst = gen_reg_rtx (imode);
1889 emit_group_store (dst, src, type, ssize);
1890 if (imode != BLKmode)
1891 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1892 emit_move_insn (orig_dst, dst);
1893 return;
1894 }
1895
1896 /* Check for a NULL entry, used to indicate that the parameter goes
1897 both on the stack and in registers. */
1898 if (XEXP (XVECEXP (src, 0, 0), 0))
1899 start = 0;
1900 else
1901 start = 1;
1902 finish = XVECLEN (src, 0);
1903
1904 tmps = XALLOCAVEC (rtx, finish);
1905
1906 /* Copy the (probable) hard regs into pseudos. */
1907 for (i = start; i < finish; i++)
1908 {
1909 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1910 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1911 {
1912 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1913 emit_move_insn (tmps[i], reg);
1914 }
1915 else
1916 tmps[i] = reg;
1917 }
1918
1919 /* If we won't be storing directly into memory, protect the real destination
1920 from strange tricks we might play. */
1921 dst = orig_dst;
1922 if (GET_CODE (dst) == PARALLEL)
1923 {
1924 rtx temp;
1925
1926 /* We can get a PARALLEL dst if there is a conditional expression in
1927 a return statement. In that case, the dst and src are the same,
1928 so no action is necessary. */
1929 if (rtx_equal_p (dst, src))
1930 return;
1931
1932 /* It is unclear if we can ever reach here, but we may as well handle
1933 it. Allocate a temporary, and split this into a store/load to/from
1934 the temporary. */
1935
1936 temp = assign_stack_temp (GET_MODE (dst), ssize);
1937 emit_group_store (temp, src, type, ssize);
1938 emit_group_load (dst, temp, type, ssize);
1939 return;
1940 }
1941 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1942 {
1943 enum machine_mode outer = GET_MODE (dst);
1944 enum machine_mode inner;
1945 HOST_WIDE_INT bytepos;
1946 bool done = false;
1947 rtx temp;
1948
1949 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1950 dst = gen_reg_rtx (outer);
1951
1952 /* Make life a bit easier for combine. */
1953 /* If the first element of the vector is the low part
1954 of the destination mode, use a paradoxical subreg to
1955 initialize the destination. */
1956 if (start < finish)
1957 {
1958 inner = GET_MODE (tmps[start]);
1959 bytepos = subreg_lowpart_offset (inner, outer);
1960 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
1961 {
1962 temp = simplify_gen_subreg (outer, tmps[start],
1963 inner, 0);
1964 if (temp)
1965 {
1966 emit_move_insn (dst, temp);
1967 done = true;
1968 start++;
1969 }
1970 }
1971 }
1972
1973 /* If the first element wasn't the low part, try the last. */
1974 if (!done
1975 && start < finish - 1)
1976 {
1977 inner = GET_MODE (tmps[finish - 1]);
1978 bytepos = subreg_lowpart_offset (inner, outer);
1979 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
1980 {
1981 temp = simplify_gen_subreg (outer, tmps[finish - 1],
1982 inner, 0);
1983 if (temp)
1984 {
1985 emit_move_insn (dst, temp);
1986 done = true;
1987 finish--;
1988 }
1989 }
1990 }
1991
1992 /* Otherwise, simply initialize the result to zero. */
1993 if (!done)
1994 emit_move_insn (dst, CONST0_RTX (outer));
1995 }
1996
1997 /* Process the pieces. */
1998 for (i = start; i < finish; i++)
1999 {
2000 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2001 enum machine_mode mode = GET_MODE (tmps[i]);
2002 unsigned int bytelen = GET_MODE_SIZE (mode);
2003 unsigned int adj_bytelen = bytelen;
2004 rtx dest = dst;
2005
2006 /* Handle trailing fragments that run over the size of the struct. */
2007 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2008 adj_bytelen = ssize - bytepos;
2009
2010 if (GET_CODE (dst) == CONCAT)
2011 {
2012 if (bytepos + adj_bytelen
2013 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2014 dest = XEXP (dst, 0);
2015 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2016 {
2017 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2018 dest = XEXP (dst, 1);
2019 }
2020 else
2021 {
2022 enum machine_mode dest_mode = GET_MODE (dest);
2023 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2024
2025 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2026
2027 if (GET_MODE_ALIGNMENT (dest_mode)
2028 >= GET_MODE_ALIGNMENT (tmp_mode))
2029 {
2030 dest = assign_stack_temp (dest_mode,
2031 GET_MODE_SIZE (dest_mode));
2032 emit_move_insn (adjust_address (dest,
2033 tmp_mode,
2034 bytepos),
2035 tmps[i]);
2036 dst = dest;
2037 }
2038 else
2039 {
2040 dest = assign_stack_temp (tmp_mode,
2041 GET_MODE_SIZE (tmp_mode));
2042 emit_move_insn (dest, tmps[i]);
2043 dst = adjust_address (dest, dest_mode, bytepos);
2044 }
2045 break;
2046 }
2047 }
2048
2049 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2050 {
2051 /* store_bit_field always takes its value from the lsb.
2052 Move the fragment to the lsb if it's not already there. */
2053 if (
2054 #ifdef BLOCK_REG_PADDING
2055 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2056 == (BYTES_BIG_ENDIAN ? upward : downward)
2057 #else
2058 BYTES_BIG_ENDIAN
2059 #endif
2060 )
2061 {
2062 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2063 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2064 shift, tmps[i], 0);
2065 }
2066 bytelen = adj_bytelen;
2067 }
2068
2069 /* Optimize the access just a bit. */
2070 if (MEM_P (dest)
2071 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2072 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2073 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2074 && bytelen == GET_MODE_SIZE (mode))
2075 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2076 else
2077 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2078 0, 0, mode, tmps[i]);
2079 }
2080
2081 /* Copy from the pseudo into the (probable) hard reg. */
2082 if (orig_dst != dst)
2083 emit_move_insn (orig_dst, dst);
2084 }
2085
2086 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2087 of the value stored in X. */
2088
2089 rtx
2090 maybe_emit_group_store (rtx x, tree type)
2091 {
2092 enum machine_mode mode = TYPE_MODE (type);
2093 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2094 if (GET_CODE (x) == PARALLEL)
2095 {
2096 rtx result = gen_reg_rtx (mode);
2097 emit_group_store (result, x, type, int_size_in_bytes (type));
2098 return result;
2099 }
2100 return x;
2101 }
2102
2103 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2104
2105 This is used on targets that return BLKmode values in registers. */
2106
2107 void
2108 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2109 {
2110 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2111 rtx src = NULL, dst = NULL;
2112 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2113 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2114 enum machine_mode mode = GET_MODE (srcreg);
2115 enum machine_mode tmode = GET_MODE (target);
2116 enum machine_mode copy_mode;
2117
2118 /* BLKmode registers created in the back-end shouldn't have survived. */
2119 gcc_assert (mode != BLKmode);
2120
2121 /* If the structure doesn't take up a whole number of words, see whether
2122 SRCREG is padded on the left or on the right. If it's on the left,
2123 set PADDING_CORRECTION to the number of bits to skip.
2124
2125 In most ABIs, the structure will be returned at the least end of
2126 the register, which translates to right padding on little-endian
2127 targets and left padding on big-endian targets. The opposite
2128 holds if the structure is returned at the most significant
2129 end of the register. */
2130 if (bytes % UNITS_PER_WORD != 0
2131 && (targetm.calls.return_in_msb (type)
2132 ? !BYTES_BIG_ENDIAN
2133 : BYTES_BIG_ENDIAN))
2134 padding_correction
2135 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2136
2137 /* We can use a single move if we have an exact mode for the size. */
2138 else if (MEM_P (target)
2139 && (!SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))
2140 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2141 && bytes == GET_MODE_SIZE (mode))
2142 {
2143 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2144 return;
2145 }
2146
2147 /* And if we additionally have the same mode for a register. */
2148 else if (REG_P (target)
2149 && GET_MODE (target) == mode
2150 && bytes == GET_MODE_SIZE (mode))
2151 {
2152 emit_move_insn (target, srcreg);
2153 return;
2154 }
2155
2156 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2157 into a new pseudo which is a full word. */
2158 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2159 {
2160 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2161 mode = word_mode;
2162 }
2163
2164 /* Copy the structure BITSIZE bits at a time. If the target lives in
2165 memory, take care of not reading/writing past its end by selecting
2166 a copy mode suited to BITSIZE. This should always be possible given
2167 how it is computed.
2168
2169 If the target lives in register, make sure not to select a copy mode
2170 larger than the mode of the register.
2171
2172 We could probably emit more efficient code for machines which do not use
2173 strict alignment, but it doesn't seem worth the effort at the current
2174 time. */
2175
2176 copy_mode = word_mode;
2177 if (MEM_P (target))
2178 {
2179 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2180 if (mem_mode != BLKmode)
2181 copy_mode = mem_mode;
2182 }
2183 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2184 copy_mode = tmode;
2185
2186 for (bitpos = 0, xbitpos = padding_correction;
2187 bitpos < bytes * BITS_PER_UNIT;
2188 bitpos += bitsize, xbitpos += bitsize)
2189 {
2190 /* We need a new source operand each time xbitpos is on a
2191 word boundary and when xbitpos == padding_correction
2192 (the first time through). */
2193 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2194 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2195
2196 /* We need a new destination operand each time bitpos is on
2197 a word boundary. */
2198 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2199 dst = target;
2200 else if (bitpos % BITS_PER_WORD == 0)
2201 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2202
2203 /* Use xbitpos for the source extraction (right justified) and
2204 bitpos for the destination store (left justified). */
2205 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2206 extract_bit_field (src, bitsize,
2207 xbitpos % BITS_PER_WORD, 1, false,
2208 NULL_RTX, copy_mode, copy_mode));
2209 }
2210 }
2211
2212 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2213 register if it contains any data, otherwise return null.
2214
2215 This is used on targets that return BLKmode values in registers. */
2216
2217 rtx
2218 copy_blkmode_to_reg (enum machine_mode mode, tree src)
2219 {
2220 int i, n_regs;
2221 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2222 unsigned int bitsize;
2223 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2224 enum machine_mode dst_mode;
2225
2226 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2227
2228 x = expand_normal (src);
2229
2230 bytes = int_size_in_bytes (TREE_TYPE (src));
2231 if (bytes == 0)
2232 return NULL_RTX;
2233
2234 /* If the structure doesn't take up a whole number of words, see
2235 whether the register value should be padded on the left or on
2236 the right. Set PADDING_CORRECTION to the number of padding
2237 bits needed on the left side.
2238
2239 In most ABIs, the structure will be returned at the least end of
2240 the register, which translates to right padding on little-endian
2241 targets and left padding on big-endian targets. The opposite
2242 holds if the structure is returned at the most significant
2243 end of the register. */
2244 if (bytes % UNITS_PER_WORD != 0
2245 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2246 ? !BYTES_BIG_ENDIAN
2247 : BYTES_BIG_ENDIAN))
2248 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2249 * BITS_PER_UNIT));
2250
2251 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2252 dst_words = XALLOCAVEC (rtx, n_regs);
2253 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2254
2255 /* Copy the structure BITSIZE bits at a time. */
2256 for (bitpos = 0, xbitpos = padding_correction;
2257 bitpos < bytes * BITS_PER_UNIT;
2258 bitpos += bitsize, xbitpos += bitsize)
2259 {
2260 /* We need a new destination pseudo each time xbitpos is
2261 on a word boundary and when xbitpos == padding_correction
2262 (the first time through). */
2263 if (xbitpos % BITS_PER_WORD == 0
2264 || xbitpos == padding_correction)
2265 {
2266 /* Generate an appropriate register. */
2267 dst_word = gen_reg_rtx (word_mode);
2268 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2269
2270 /* Clear the destination before we move anything into it. */
2271 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2272 }
2273
2274 /* We need a new source operand each time bitpos is on a word
2275 boundary. */
2276 if (bitpos % BITS_PER_WORD == 0)
2277 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2278
2279 /* Use bitpos for the source extraction (left justified) and
2280 xbitpos for the destination store (right justified). */
2281 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2282 0, 0, word_mode,
2283 extract_bit_field (src_word, bitsize,
2284 bitpos % BITS_PER_WORD, 1, false,
2285 NULL_RTX, word_mode, word_mode));
2286 }
2287
2288 if (mode == BLKmode)
2289 {
2290 /* Find the smallest integer mode large enough to hold the
2291 entire structure. */
2292 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2293 mode != VOIDmode;
2294 mode = GET_MODE_WIDER_MODE (mode))
2295 /* Have we found a large enough mode? */
2296 if (GET_MODE_SIZE (mode) >= bytes)
2297 break;
2298
2299 /* A suitable mode should have been found. */
2300 gcc_assert (mode != VOIDmode);
2301 }
2302
2303 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2304 dst_mode = word_mode;
2305 else
2306 dst_mode = mode;
2307 dst = gen_reg_rtx (dst_mode);
2308
2309 for (i = 0; i < n_regs; i++)
2310 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2311
2312 if (mode != dst_mode)
2313 dst = gen_lowpart (mode, dst);
2314
2315 return dst;
2316 }
2317
2318 /* Add a USE expression for REG to the (possibly empty) list pointed
2319 to by CALL_FUSAGE. REG must denote a hard register. */
2320
2321 void
2322 use_reg_mode (rtx *call_fusage, rtx reg, enum machine_mode mode)
2323 {
2324 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2325
2326 *call_fusage
2327 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2328 }
2329
2330 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2331 starting at REGNO. All of these registers must be hard registers. */
2332
2333 void
2334 use_regs (rtx *call_fusage, int regno, int nregs)
2335 {
2336 int i;
2337
2338 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2339
2340 for (i = 0; i < nregs; i++)
2341 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2342 }
2343
2344 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2345 PARALLEL REGS. This is for calls that pass values in multiple
2346 non-contiguous locations. The Irix 6 ABI has examples of this. */
2347
2348 void
2349 use_group_regs (rtx *call_fusage, rtx regs)
2350 {
2351 int i;
2352
2353 for (i = 0; i < XVECLEN (regs, 0); i++)
2354 {
2355 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2356
2357 /* A NULL entry means the parameter goes both on the stack and in
2358 registers. This can also be a MEM for targets that pass values
2359 partially on the stack and partially in registers. */
2360 if (reg != 0 && REG_P (reg))
2361 use_reg (call_fusage, reg);
2362 }
2363 }
2364
2365 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2366 assigment and the code of the expresion on the RHS is CODE. Return
2367 NULL otherwise. */
2368
2369 static gimple
2370 get_def_for_expr (tree name, enum tree_code code)
2371 {
2372 gimple def_stmt;
2373
2374 if (TREE_CODE (name) != SSA_NAME)
2375 return NULL;
2376
2377 def_stmt = get_gimple_for_ssa_name (name);
2378 if (!def_stmt
2379 || gimple_assign_rhs_code (def_stmt) != code)
2380 return NULL;
2381
2382 return def_stmt;
2383 }
2384
2385 #ifdef HAVE_conditional_move
2386 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2387 assigment and the class of the expresion on the RHS is CLASS. Return
2388 NULL otherwise. */
2389
2390 static gimple
2391 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2392 {
2393 gimple def_stmt;
2394
2395 if (TREE_CODE (name) != SSA_NAME)
2396 return NULL;
2397
2398 def_stmt = get_gimple_for_ssa_name (name);
2399 if (!def_stmt
2400 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2401 return NULL;
2402
2403 return def_stmt;
2404 }
2405 #endif
2406 \f
2407
2408 /* Determine whether the LEN bytes generated by CONSTFUN can be
2409 stored to memory using several move instructions. CONSTFUNDATA is
2410 a pointer which will be passed as argument in every CONSTFUN call.
2411 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2412 a memset operation and false if it's a copy of a constant string.
2413 Return nonzero if a call to store_by_pieces should succeed. */
2414
2415 int
2416 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2417 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2418 void *constfundata, unsigned int align, bool memsetp)
2419 {
2420 unsigned HOST_WIDE_INT l;
2421 unsigned int max_size;
2422 HOST_WIDE_INT offset = 0;
2423 enum machine_mode mode;
2424 enum insn_code icode;
2425 int reverse;
2426 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2427 rtx cst ATTRIBUTE_UNUSED;
2428
2429 if (len == 0)
2430 return 1;
2431
2432 if (! (memsetp
2433 ? SET_BY_PIECES_P (len, align)
2434 : STORE_BY_PIECES_P (len, align)))
2435 return 0;
2436
2437 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2438
2439 /* We would first store what we can in the largest integer mode, then go to
2440 successively smaller modes. */
2441
2442 for (reverse = 0;
2443 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2444 reverse++)
2445 {
2446 l = len;
2447 max_size = STORE_MAX_PIECES + 1;
2448 while (max_size > 1 && l > 0)
2449 {
2450 mode = widest_int_mode_for_size (max_size);
2451
2452 if (mode == VOIDmode)
2453 break;
2454
2455 icode = optab_handler (mov_optab, mode);
2456 if (icode != CODE_FOR_nothing
2457 && align >= GET_MODE_ALIGNMENT (mode))
2458 {
2459 unsigned int size = GET_MODE_SIZE (mode);
2460
2461 while (l >= size)
2462 {
2463 if (reverse)
2464 offset -= size;
2465
2466 cst = (*constfun) (constfundata, offset, mode);
2467 if (!targetm.legitimate_constant_p (mode, cst))
2468 return 0;
2469
2470 if (!reverse)
2471 offset += size;
2472
2473 l -= size;
2474 }
2475 }
2476
2477 max_size = GET_MODE_SIZE (mode);
2478 }
2479
2480 /* The code above should have handled everything. */
2481 gcc_assert (!l);
2482 }
2483
2484 return 1;
2485 }
2486
2487 /* Generate several move instructions to store LEN bytes generated by
2488 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2489 pointer which will be passed as argument in every CONSTFUN call.
2490 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2491 a memset operation and false if it's a copy of a constant string.
2492 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2493 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2494 stpcpy. */
2495
2496 rtx
2497 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2498 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2499 void *constfundata, unsigned int align, bool memsetp, int endp)
2500 {
2501 enum machine_mode to_addr_mode = get_address_mode (to);
2502 struct store_by_pieces_d data;
2503
2504 if (len == 0)
2505 {
2506 gcc_assert (endp != 2);
2507 return to;
2508 }
2509
2510 gcc_assert (memsetp
2511 ? SET_BY_PIECES_P (len, align)
2512 : STORE_BY_PIECES_P (len, align));
2513 data.constfun = constfun;
2514 data.constfundata = constfundata;
2515 data.len = len;
2516 data.to = to;
2517 store_by_pieces_1 (&data, align);
2518 if (endp)
2519 {
2520 rtx to1;
2521
2522 gcc_assert (!data.reverse);
2523 if (data.autinc_to)
2524 {
2525 if (endp == 2)
2526 {
2527 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2528 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2529 else
2530 data.to_addr = copy_to_mode_reg (to_addr_mode,
2531 plus_constant (to_addr_mode,
2532 data.to_addr,
2533 -1));
2534 }
2535 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2536 data.offset);
2537 }
2538 else
2539 {
2540 if (endp == 2)
2541 --data.offset;
2542 to1 = adjust_address (data.to, QImode, data.offset);
2543 }
2544 return to1;
2545 }
2546 else
2547 return data.to;
2548 }
2549
2550 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2551 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2552
2553 static void
2554 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2555 {
2556 struct store_by_pieces_d data;
2557
2558 if (len == 0)
2559 return;
2560
2561 data.constfun = clear_by_pieces_1;
2562 data.constfundata = NULL;
2563 data.len = len;
2564 data.to = to;
2565 store_by_pieces_1 (&data, align);
2566 }
2567
2568 /* Callback routine for clear_by_pieces.
2569 Return const0_rtx unconditionally. */
2570
2571 static rtx
2572 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2573 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2574 enum machine_mode mode ATTRIBUTE_UNUSED)
2575 {
2576 return const0_rtx;
2577 }
2578
2579 /* Subroutine of clear_by_pieces and store_by_pieces.
2580 Generate several move instructions to store LEN bytes of block TO. (A MEM
2581 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2582
2583 static void
2584 store_by_pieces_1 (struct store_by_pieces_d *data ATTRIBUTE_UNUSED,
2585 unsigned int align ATTRIBUTE_UNUSED)
2586 {
2587 enum machine_mode to_addr_mode = get_address_mode (data->to);
2588 rtx to_addr = XEXP (data->to, 0);
2589 unsigned int max_size = STORE_MAX_PIECES + 1;
2590 enum insn_code icode;
2591
2592 data->offset = 0;
2593 data->to_addr = to_addr;
2594 data->autinc_to
2595 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2596 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2597
2598 data->explicit_inc_to = 0;
2599 data->reverse
2600 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2601 if (data->reverse)
2602 data->offset = data->len;
2603
2604 /* If storing requires more than two move insns,
2605 copy addresses to registers (to make displacements shorter)
2606 and use post-increment if available. */
2607 if (!data->autinc_to
2608 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2609 {
2610 /* Determine the main mode we'll be using.
2611 MODE might not be used depending on the definitions of the
2612 USE_* macros below. */
2613 enum machine_mode mode ATTRIBUTE_UNUSED
2614 = widest_int_mode_for_size (max_size);
2615
2616 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2617 {
2618 data->to_addr = copy_to_mode_reg (to_addr_mode,
2619 plus_constant (to_addr_mode,
2620 to_addr,
2621 data->len));
2622 data->autinc_to = 1;
2623 data->explicit_inc_to = -1;
2624 }
2625
2626 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2627 && ! data->autinc_to)
2628 {
2629 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2630 data->autinc_to = 1;
2631 data->explicit_inc_to = 1;
2632 }
2633
2634 if ( !data->autinc_to && CONSTANT_P (to_addr))
2635 data->to_addr = copy_to_mode_reg (to_addr_mode, to_addr);
2636 }
2637
2638 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
2639
2640 /* First store what we can in the largest integer mode, then go to
2641 successively smaller modes. */
2642
2643 while (max_size > 1 && data->len > 0)
2644 {
2645 enum machine_mode mode = widest_int_mode_for_size (max_size);
2646
2647 if (mode == VOIDmode)
2648 break;
2649
2650 icode = optab_handler (mov_optab, mode);
2651 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2652 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2653
2654 max_size = GET_MODE_SIZE (mode);
2655 }
2656
2657 /* The code above should have handled everything. */
2658 gcc_assert (!data->len);
2659 }
2660
2661 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2662 with move instructions for mode MODE. GENFUN is the gen_... function
2663 to make a move insn for that mode. DATA has all the other info. */
2664
2665 static void
2666 store_by_pieces_2 (insn_gen_fn genfun, machine_mode mode,
2667 struct store_by_pieces_d *data)
2668 {
2669 unsigned int size = GET_MODE_SIZE (mode);
2670 rtx to1, cst;
2671
2672 while (data->len >= size)
2673 {
2674 if (data->reverse)
2675 data->offset -= size;
2676
2677 if (data->autinc_to)
2678 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2679 data->offset);
2680 else
2681 to1 = adjust_address (data->to, mode, data->offset);
2682
2683 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2684 emit_insn (gen_add2_insn (data->to_addr,
2685 gen_int_mode (-(HOST_WIDE_INT) size,
2686 GET_MODE (data->to_addr))));
2687
2688 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2689 emit_insn ((*genfun) (to1, cst));
2690
2691 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2692 emit_insn (gen_add2_insn (data->to_addr,
2693 gen_int_mode (size,
2694 GET_MODE (data->to_addr))));
2695
2696 if (! data->reverse)
2697 data->offset += size;
2698
2699 data->len -= size;
2700 }
2701 }
2702 \f
2703 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2704 its length in bytes. */
2705
2706 rtx
2707 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2708 unsigned int expected_align, HOST_WIDE_INT expected_size)
2709 {
2710 enum machine_mode mode = GET_MODE (object);
2711 unsigned int align;
2712
2713 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2714
2715 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2716 just move a zero. Otherwise, do this a piece at a time. */
2717 if (mode != BLKmode
2718 && CONST_INT_P (size)
2719 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2720 {
2721 rtx zero = CONST0_RTX (mode);
2722 if (zero != NULL)
2723 {
2724 emit_move_insn (object, zero);
2725 return NULL;
2726 }
2727
2728 if (COMPLEX_MODE_P (mode))
2729 {
2730 zero = CONST0_RTX (GET_MODE_INNER (mode));
2731 if (zero != NULL)
2732 {
2733 write_complex_part (object, zero, 0);
2734 write_complex_part (object, zero, 1);
2735 return NULL;
2736 }
2737 }
2738 }
2739
2740 if (size == const0_rtx)
2741 return NULL;
2742
2743 align = MEM_ALIGN (object);
2744
2745 if (CONST_INT_P (size)
2746 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2747 clear_by_pieces (object, INTVAL (size), align);
2748 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2749 expected_align, expected_size))
2750 ;
2751 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
2752 return set_storage_via_libcall (object, size, const0_rtx,
2753 method == BLOCK_OP_TAILCALL);
2754 else
2755 gcc_unreachable ();
2756
2757 return NULL;
2758 }
2759
2760 rtx
2761 clear_storage (rtx object, rtx size, enum block_op_methods method)
2762 {
2763 return clear_storage_hints (object, size, method, 0, -1);
2764 }
2765
2766
2767 /* A subroutine of clear_storage. Expand a call to memset.
2768 Return the return value of memset, 0 otherwise. */
2769
2770 rtx
2771 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2772 {
2773 tree call_expr, fn, object_tree, size_tree, val_tree;
2774 enum machine_mode size_mode;
2775 rtx retval;
2776
2777 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2778 place those into new pseudos into a VAR_DECL and use them later. */
2779
2780 object = copy_addr_to_reg (XEXP (object, 0));
2781
2782 size_mode = TYPE_MODE (sizetype);
2783 size = convert_to_mode (size_mode, size, 1);
2784 size = copy_to_mode_reg (size_mode, size);
2785
2786 /* It is incorrect to use the libcall calling conventions to call
2787 memset in this context. This could be a user call to memset and
2788 the user may wish to examine the return value from memset. For
2789 targets where libcalls and normal calls have different conventions
2790 for returning pointers, we could end up generating incorrect code. */
2791
2792 object_tree = make_tree (ptr_type_node, object);
2793 if (!CONST_INT_P (val))
2794 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2795 size_tree = make_tree (sizetype, size);
2796 val_tree = make_tree (integer_type_node, val);
2797
2798 fn = clear_storage_libcall_fn (true);
2799 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
2800 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2801
2802 retval = expand_normal (call_expr);
2803
2804 return retval;
2805 }
2806
2807 /* A subroutine of set_storage_via_libcall. Create the tree node
2808 for the function we use for block clears. */
2809
2810 tree block_clear_fn;
2811
2812 void
2813 init_block_clear_fn (const char *asmspec)
2814 {
2815 if (!block_clear_fn)
2816 {
2817 tree fn, args;
2818
2819 fn = get_identifier ("memset");
2820 args = build_function_type_list (ptr_type_node, ptr_type_node,
2821 integer_type_node, sizetype,
2822 NULL_TREE);
2823
2824 fn = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, fn, args);
2825 DECL_EXTERNAL (fn) = 1;
2826 TREE_PUBLIC (fn) = 1;
2827 DECL_ARTIFICIAL (fn) = 1;
2828 TREE_NOTHROW (fn) = 1;
2829 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2830 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2831
2832 block_clear_fn = fn;
2833 }
2834
2835 if (asmspec)
2836 set_user_assembler_name (block_clear_fn, asmspec);
2837 }
2838
2839 static tree
2840 clear_storage_libcall_fn (int for_call)
2841 {
2842 static bool emitted_extern;
2843
2844 if (!block_clear_fn)
2845 init_block_clear_fn (NULL);
2846
2847 if (for_call && !emitted_extern)
2848 {
2849 emitted_extern = true;
2850 make_decl_rtl (block_clear_fn);
2851 }
2852
2853 return block_clear_fn;
2854 }
2855 \f
2856 /* Expand a setmem pattern; return true if successful. */
2857
2858 bool
2859 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2860 unsigned int expected_align, HOST_WIDE_INT expected_size)
2861 {
2862 /* Try the most limited insn first, because there's no point
2863 including more than one in the machine description unless
2864 the more limited one has some advantage. */
2865
2866 enum machine_mode mode;
2867
2868 if (expected_align < align)
2869 expected_align = align;
2870
2871 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2872 mode = GET_MODE_WIDER_MODE (mode))
2873 {
2874 enum insn_code code = direct_optab_handler (setmem_optab, mode);
2875
2876 if (code != CODE_FOR_nothing
2877 /* We don't need MODE to be narrower than
2878 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2879 the mode mask, as it is returned by the macro, it will
2880 definitely be less than the actual mode mask. */
2881 && ((CONST_INT_P (size)
2882 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2883 <= (GET_MODE_MASK (mode) >> 1)))
2884 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD))
2885 {
2886 struct expand_operand ops[6];
2887 unsigned int nops;
2888
2889 nops = insn_data[(int) code].n_generator_args;
2890 gcc_assert (nops == 4 || nops == 6);
2891
2892 create_fixed_operand (&ops[0], object);
2893 /* The check above guarantees that this size conversion is valid. */
2894 create_convert_operand_to (&ops[1], size, mode, true);
2895 create_convert_operand_from (&ops[2], val, byte_mode, true);
2896 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
2897 if (nops == 6)
2898 {
2899 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
2900 create_integer_operand (&ops[5], expected_size);
2901 }
2902 if (maybe_expand_insn (code, nops, ops))
2903 return true;
2904 }
2905 }
2906
2907 return false;
2908 }
2909
2910 \f
2911 /* Write to one of the components of the complex value CPLX. Write VAL to
2912 the real part if IMAG_P is false, and the imaginary part if its true. */
2913
2914 static void
2915 write_complex_part (rtx cplx, rtx val, bool imag_p)
2916 {
2917 enum machine_mode cmode;
2918 enum machine_mode imode;
2919 unsigned ibitsize;
2920
2921 if (GET_CODE (cplx) == CONCAT)
2922 {
2923 emit_move_insn (XEXP (cplx, imag_p), val);
2924 return;
2925 }
2926
2927 cmode = GET_MODE (cplx);
2928 imode = GET_MODE_INNER (cmode);
2929 ibitsize = GET_MODE_BITSIZE (imode);
2930
2931 /* For MEMs simplify_gen_subreg may generate an invalid new address
2932 because, e.g., the original address is considered mode-dependent
2933 by the target, which restricts simplify_subreg from invoking
2934 adjust_address_nv. Instead of preparing fallback support for an
2935 invalid address, we call adjust_address_nv directly. */
2936 if (MEM_P (cplx))
2937 {
2938 emit_move_insn (adjust_address_nv (cplx, imode,
2939 imag_p ? GET_MODE_SIZE (imode) : 0),
2940 val);
2941 return;
2942 }
2943
2944 /* If the sub-object is at least word sized, then we know that subregging
2945 will work. This special case is important, since store_bit_field
2946 wants to operate on integer modes, and there's rarely an OImode to
2947 correspond to TCmode. */
2948 if (ibitsize >= BITS_PER_WORD
2949 /* For hard regs we have exact predicates. Assume we can split
2950 the original object if it spans an even number of hard regs.
2951 This special case is important for SCmode on 64-bit platforms
2952 where the natural size of floating-point regs is 32-bit. */
2953 || (REG_P (cplx)
2954 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2955 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2956 {
2957 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2958 imag_p ? GET_MODE_SIZE (imode) : 0);
2959 if (part)
2960 {
2961 emit_move_insn (part, val);
2962 return;
2963 }
2964 else
2965 /* simplify_gen_subreg may fail for sub-word MEMs. */
2966 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2967 }
2968
2969 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val);
2970 }
2971
2972 /* Extract one of the components of the complex value CPLX. Extract the
2973 real part if IMAG_P is false, and the imaginary part if it's true. */
2974
2975 static rtx
2976 read_complex_part (rtx cplx, bool imag_p)
2977 {
2978 enum machine_mode cmode, imode;
2979 unsigned ibitsize;
2980
2981 if (GET_CODE (cplx) == CONCAT)
2982 return XEXP (cplx, imag_p);
2983
2984 cmode = GET_MODE (cplx);
2985 imode = GET_MODE_INNER (cmode);
2986 ibitsize = GET_MODE_BITSIZE (imode);
2987
2988 /* Special case reads from complex constants that got spilled to memory. */
2989 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2990 {
2991 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2992 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2993 {
2994 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2995 if (CONSTANT_CLASS_P (part))
2996 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2997 }
2998 }
2999
3000 /* For MEMs simplify_gen_subreg may generate an invalid new address
3001 because, e.g., the original address is considered mode-dependent
3002 by the target, which restricts simplify_subreg from invoking
3003 adjust_address_nv. Instead of preparing fallback support for an
3004 invalid address, we call adjust_address_nv directly. */
3005 if (MEM_P (cplx))
3006 return adjust_address_nv (cplx, imode,
3007 imag_p ? GET_MODE_SIZE (imode) : 0);
3008
3009 /* If the sub-object is at least word sized, then we know that subregging
3010 will work. This special case is important, since extract_bit_field
3011 wants to operate on integer modes, and there's rarely an OImode to
3012 correspond to TCmode. */
3013 if (ibitsize >= BITS_PER_WORD
3014 /* For hard regs we have exact predicates. Assume we can split
3015 the original object if it spans an even number of hard regs.
3016 This special case is important for SCmode on 64-bit platforms
3017 where the natural size of floating-point regs is 32-bit. */
3018 || (REG_P (cplx)
3019 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3020 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
3021 {
3022 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3023 imag_p ? GET_MODE_SIZE (imode) : 0);
3024 if (ret)
3025 return ret;
3026 else
3027 /* simplify_gen_subreg may fail for sub-word MEMs. */
3028 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3029 }
3030
3031 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3032 true, false, NULL_RTX, imode, imode);
3033 }
3034 \f
3035 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3036 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3037 represented in NEW_MODE. If FORCE is true, this will never happen, as
3038 we'll force-create a SUBREG if needed. */
3039
3040 static rtx
3041 emit_move_change_mode (enum machine_mode new_mode,
3042 enum machine_mode old_mode, rtx x, bool force)
3043 {
3044 rtx ret;
3045
3046 if (push_operand (x, GET_MODE (x)))
3047 {
3048 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3049 MEM_COPY_ATTRIBUTES (ret, x);
3050 }
3051 else if (MEM_P (x))
3052 {
3053 /* We don't have to worry about changing the address since the
3054 size in bytes is supposed to be the same. */
3055 if (reload_in_progress)
3056 {
3057 /* Copy the MEM to change the mode and move any
3058 substitutions from the old MEM to the new one. */
3059 ret = adjust_address_nv (x, new_mode, 0);
3060 copy_replacements (x, ret);
3061 }
3062 else
3063 ret = adjust_address (x, new_mode, 0);
3064 }
3065 else
3066 {
3067 /* Note that we do want simplify_subreg's behavior of validating
3068 that the new mode is ok for a hard register. If we were to use
3069 simplify_gen_subreg, we would create the subreg, but would
3070 probably run into the target not being able to implement it. */
3071 /* Except, of course, when FORCE is true, when this is exactly what
3072 we want. Which is needed for CCmodes on some targets. */
3073 if (force)
3074 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3075 else
3076 ret = simplify_subreg (new_mode, x, old_mode, 0);
3077 }
3078
3079 return ret;
3080 }
3081
3082 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3083 an integer mode of the same size as MODE. Returns the instruction
3084 emitted, or NULL if such a move could not be generated. */
3085
3086 static rtx
3087 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3088 {
3089 enum machine_mode imode;
3090 enum insn_code code;
3091
3092 /* There must exist a mode of the exact size we require. */
3093 imode = int_mode_for_mode (mode);
3094 if (imode == BLKmode)
3095 return NULL_RTX;
3096
3097 /* The target must support moves in this mode. */
3098 code = optab_handler (mov_optab, imode);
3099 if (code == CODE_FOR_nothing)
3100 return NULL_RTX;
3101
3102 x = emit_move_change_mode (imode, mode, x, force);
3103 if (x == NULL_RTX)
3104 return NULL_RTX;
3105 y = emit_move_change_mode (imode, mode, y, force);
3106 if (y == NULL_RTX)
3107 return NULL_RTX;
3108 return emit_insn (GEN_FCN (code) (x, y));
3109 }
3110
3111 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3112 Return an equivalent MEM that does not use an auto-increment. */
3113
3114 static rtx
3115 emit_move_resolve_push (enum machine_mode mode, rtx x)
3116 {
3117 enum rtx_code code = GET_CODE (XEXP (x, 0));
3118 HOST_WIDE_INT adjust;
3119 rtx temp;
3120
3121 adjust = GET_MODE_SIZE (mode);
3122 #ifdef PUSH_ROUNDING
3123 adjust = PUSH_ROUNDING (adjust);
3124 #endif
3125 if (code == PRE_DEC || code == POST_DEC)
3126 adjust = -adjust;
3127 else if (code == PRE_MODIFY || code == POST_MODIFY)
3128 {
3129 rtx expr = XEXP (XEXP (x, 0), 1);
3130 HOST_WIDE_INT val;
3131
3132 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3133 gcc_assert (CONST_INT_P (XEXP (expr, 1)));
3134 val = INTVAL (XEXP (expr, 1));
3135 if (GET_CODE (expr) == MINUS)
3136 val = -val;
3137 gcc_assert (adjust == val || adjust == -val);
3138 adjust = val;
3139 }
3140
3141 /* Do not use anti_adjust_stack, since we don't want to update
3142 stack_pointer_delta. */
3143 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3144 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3145 0, OPTAB_LIB_WIDEN);
3146 if (temp != stack_pointer_rtx)
3147 emit_move_insn (stack_pointer_rtx, temp);
3148
3149 switch (code)
3150 {
3151 case PRE_INC:
3152 case PRE_DEC:
3153 case PRE_MODIFY:
3154 temp = stack_pointer_rtx;
3155 break;
3156 case POST_INC:
3157 case POST_DEC:
3158 case POST_MODIFY:
3159 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3160 break;
3161 default:
3162 gcc_unreachable ();
3163 }
3164
3165 return replace_equiv_address (x, temp);
3166 }
3167
3168 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3169 X is known to satisfy push_operand, and MODE is known to be complex.
3170 Returns the last instruction emitted. */
3171
3172 rtx
3173 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3174 {
3175 enum machine_mode submode = GET_MODE_INNER (mode);
3176 bool imag_first;
3177
3178 #ifdef PUSH_ROUNDING
3179 unsigned int submodesize = GET_MODE_SIZE (submode);
3180
3181 /* In case we output to the stack, but the size is smaller than the
3182 machine can push exactly, we need to use move instructions. */
3183 if (PUSH_ROUNDING (submodesize) != submodesize)
3184 {
3185 x = emit_move_resolve_push (mode, x);
3186 return emit_move_insn (x, y);
3187 }
3188 #endif
3189
3190 /* Note that the real part always precedes the imag part in memory
3191 regardless of machine's endianness. */
3192 switch (GET_CODE (XEXP (x, 0)))
3193 {
3194 case PRE_DEC:
3195 case POST_DEC:
3196 imag_first = true;
3197 break;
3198 case PRE_INC:
3199 case POST_INC:
3200 imag_first = false;
3201 break;
3202 default:
3203 gcc_unreachable ();
3204 }
3205
3206 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3207 read_complex_part (y, imag_first));
3208 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3209 read_complex_part (y, !imag_first));
3210 }
3211
3212 /* A subroutine of emit_move_complex. Perform the move from Y to X
3213 via two moves of the parts. Returns the last instruction emitted. */
3214
3215 rtx
3216 emit_move_complex_parts (rtx x, rtx y)
3217 {
3218 /* Show the output dies here. This is necessary for SUBREGs
3219 of pseudos since we cannot track their lifetimes correctly;
3220 hard regs shouldn't appear here except as return values. */
3221 if (!reload_completed && !reload_in_progress
3222 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3223 emit_clobber (x);
3224
3225 write_complex_part (x, read_complex_part (y, false), false);
3226 write_complex_part (x, read_complex_part (y, true), true);
3227
3228 return get_last_insn ();
3229 }
3230
3231 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3232 MODE is known to be complex. Returns the last instruction emitted. */
3233
3234 static rtx
3235 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3236 {
3237 bool try_int;
3238
3239 /* Need to take special care for pushes, to maintain proper ordering
3240 of the data, and possibly extra padding. */
3241 if (push_operand (x, mode))
3242 return emit_move_complex_push (mode, x, y);
3243
3244 /* See if we can coerce the target into moving both values at once, except
3245 for floating point where we favor moving as parts if this is easy. */
3246 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3247 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3248 && !(REG_P (x)
3249 && HARD_REGISTER_P (x)
3250 && hard_regno_nregs[REGNO(x)][mode] == 1)
3251 && !(REG_P (y)
3252 && HARD_REGISTER_P (y)
3253 && hard_regno_nregs[REGNO(y)][mode] == 1))
3254 try_int = false;
3255 /* Not possible if the values are inherently not adjacent. */
3256 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3257 try_int = false;
3258 /* Is possible if both are registers (or subregs of registers). */
3259 else if (register_operand (x, mode) && register_operand (y, mode))
3260 try_int = true;
3261 /* If one of the operands is a memory, and alignment constraints
3262 are friendly enough, we may be able to do combined memory operations.
3263 We do not attempt this if Y is a constant because that combination is
3264 usually better with the by-parts thing below. */
3265 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3266 && (!STRICT_ALIGNMENT
3267 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3268 try_int = true;
3269 else
3270 try_int = false;
3271
3272 if (try_int)
3273 {
3274 rtx ret;
3275
3276 /* For memory to memory moves, optimal behavior can be had with the
3277 existing block move logic. */
3278 if (MEM_P (x) && MEM_P (y))
3279 {
3280 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3281 BLOCK_OP_NO_LIBCALL);
3282 return get_last_insn ();
3283 }
3284
3285 ret = emit_move_via_integer (mode, x, y, true);
3286 if (ret)
3287 return ret;
3288 }
3289
3290 return emit_move_complex_parts (x, y);
3291 }
3292
3293 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3294 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3295
3296 static rtx
3297 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3298 {
3299 rtx ret;
3300
3301 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3302 if (mode != CCmode)
3303 {
3304 enum insn_code code = optab_handler (mov_optab, CCmode);
3305 if (code != CODE_FOR_nothing)
3306 {
3307 x = emit_move_change_mode (CCmode, mode, x, true);
3308 y = emit_move_change_mode (CCmode, mode, y, true);
3309 return emit_insn (GEN_FCN (code) (x, y));
3310 }
3311 }
3312
3313 /* Otherwise, find the MODE_INT mode of the same width. */
3314 ret = emit_move_via_integer (mode, x, y, false);
3315 gcc_assert (ret != NULL);
3316 return ret;
3317 }
3318
3319 /* Return true if word I of OP lies entirely in the
3320 undefined bits of a paradoxical subreg. */
3321
3322 static bool
3323 undefined_operand_subword_p (const_rtx op, int i)
3324 {
3325 enum machine_mode innermode, innermostmode;
3326 int offset;
3327 if (GET_CODE (op) != SUBREG)
3328 return false;
3329 innermode = GET_MODE (op);
3330 innermostmode = GET_MODE (SUBREG_REG (op));
3331 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3332 /* The SUBREG_BYTE represents offset, as if the value were stored in
3333 memory, except for a paradoxical subreg where we define
3334 SUBREG_BYTE to be 0; undo this exception as in
3335 simplify_subreg. */
3336 if (SUBREG_BYTE (op) == 0
3337 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3338 {
3339 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3340 if (WORDS_BIG_ENDIAN)
3341 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3342 if (BYTES_BIG_ENDIAN)
3343 offset += difference % UNITS_PER_WORD;
3344 }
3345 if (offset >= GET_MODE_SIZE (innermostmode)
3346 || offset <= -GET_MODE_SIZE (word_mode))
3347 return true;
3348 return false;
3349 }
3350
3351 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3352 MODE is any multi-word or full-word mode that lacks a move_insn
3353 pattern. Note that you will get better code if you define such
3354 patterns, even if they must turn into multiple assembler instructions. */
3355
3356 static rtx
3357 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3358 {
3359 rtx last_insn = 0;
3360 rtx seq, inner;
3361 bool need_clobber;
3362 int i;
3363
3364 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3365
3366 /* If X is a push on the stack, do the push now and replace
3367 X with a reference to the stack pointer. */
3368 if (push_operand (x, mode))
3369 x = emit_move_resolve_push (mode, x);
3370
3371 /* If we are in reload, see if either operand is a MEM whose address
3372 is scheduled for replacement. */
3373 if (reload_in_progress && MEM_P (x)
3374 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3375 x = replace_equiv_address_nv (x, inner);
3376 if (reload_in_progress && MEM_P (y)
3377 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3378 y = replace_equiv_address_nv (y, inner);
3379
3380 start_sequence ();
3381
3382 need_clobber = false;
3383 for (i = 0;
3384 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3385 i++)
3386 {
3387 rtx xpart = operand_subword (x, i, 1, mode);
3388 rtx ypart;
3389
3390 /* Do not generate code for a move if it would come entirely
3391 from the undefined bits of a paradoxical subreg. */
3392 if (undefined_operand_subword_p (y, i))
3393 continue;
3394
3395 ypart = operand_subword (y, i, 1, mode);
3396
3397 /* If we can't get a part of Y, put Y into memory if it is a
3398 constant. Otherwise, force it into a register. Then we must
3399 be able to get a part of Y. */
3400 if (ypart == 0 && CONSTANT_P (y))
3401 {
3402 y = use_anchored_address (force_const_mem (mode, y));
3403 ypart = operand_subword (y, i, 1, mode);
3404 }
3405 else if (ypart == 0)
3406 ypart = operand_subword_force (y, i, mode);
3407
3408 gcc_assert (xpart && ypart);
3409
3410 need_clobber |= (GET_CODE (xpart) == SUBREG);
3411
3412 last_insn = emit_move_insn (xpart, ypart);
3413 }
3414
3415 seq = get_insns ();
3416 end_sequence ();
3417
3418 /* Show the output dies here. This is necessary for SUBREGs
3419 of pseudos since we cannot track their lifetimes correctly;
3420 hard regs shouldn't appear here except as return values.
3421 We never want to emit such a clobber after reload. */
3422 if (x != y
3423 && ! (reload_in_progress || reload_completed)
3424 && need_clobber != 0)
3425 emit_clobber (x);
3426
3427 emit_insn (seq);
3428
3429 return last_insn;
3430 }
3431
3432 /* Low level part of emit_move_insn.
3433 Called just like emit_move_insn, but assumes X and Y
3434 are basically valid. */
3435
3436 rtx
3437 emit_move_insn_1 (rtx x, rtx y)
3438 {
3439 enum machine_mode mode = GET_MODE (x);
3440 enum insn_code code;
3441
3442 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3443
3444 code = optab_handler (mov_optab, mode);
3445 if (code != CODE_FOR_nothing)
3446 return emit_insn (GEN_FCN (code) (x, y));
3447
3448 /* Expand complex moves by moving real part and imag part. */
3449 if (COMPLEX_MODE_P (mode))
3450 return emit_move_complex (mode, x, y);
3451
3452 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3453 || ALL_FIXED_POINT_MODE_P (mode))
3454 {
3455 rtx result = emit_move_via_integer (mode, x, y, true);
3456
3457 /* If we can't find an integer mode, use multi words. */
3458 if (result)
3459 return result;
3460 else
3461 return emit_move_multi_word (mode, x, y);
3462 }
3463
3464 if (GET_MODE_CLASS (mode) == MODE_CC)
3465 return emit_move_ccmode (mode, x, y);
3466
3467 /* Try using a move pattern for the corresponding integer mode. This is
3468 only safe when simplify_subreg can convert MODE constants into integer
3469 constants. At present, it can only do this reliably if the value
3470 fits within a HOST_WIDE_INT. */
3471 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3472 {
3473 rtx ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3474
3475 if (ret)
3476 {
3477 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3478 return ret;
3479 }
3480 }
3481
3482 return emit_move_multi_word (mode, x, y);
3483 }
3484
3485 /* Generate code to copy Y into X.
3486 Both Y and X must have the same mode, except that
3487 Y can be a constant with VOIDmode.
3488 This mode cannot be BLKmode; use emit_block_move for that.
3489
3490 Return the last instruction emitted. */
3491
3492 rtx
3493 emit_move_insn (rtx x, rtx y)
3494 {
3495 enum machine_mode mode = GET_MODE (x);
3496 rtx y_cst = NULL_RTX;
3497 rtx last_insn, set;
3498
3499 gcc_assert (mode != BLKmode
3500 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3501
3502 if (CONSTANT_P (y))
3503 {
3504 if (optimize
3505 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3506 && (last_insn = compress_float_constant (x, y)))
3507 return last_insn;
3508
3509 y_cst = y;
3510
3511 if (!targetm.legitimate_constant_p (mode, y))
3512 {
3513 y = force_const_mem (mode, y);
3514
3515 /* If the target's cannot_force_const_mem prevented the spill,
3516 assume that the target's move expanders will also take care
3517 of the non-legitimate constant. */
3518 if (!y)
3519 y = y_cst;
3520 else
3521 y = use_anchored_address (y);
3522 }
3523 }
3524
3525 /* If X or Y are memory references, verify that their addresses are valid
3526 for the machine. */
3527 if (MEM_P (x)
3528 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3529 MEM_ADDR_SPACE (x))
3530 && ! push_operand (x, GET_MODE (x))))
3531 x = validize_mem (x);
3532
3533 if (MEM_P (y)
3534 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3535 MEM_ADDR_SPACE (y)))
3536 y = validize_mem (y);
3537
3538 gcc_assert (mode != BLKmode);
3539
3540 last_insn = emit_move_insn_1 (x, y);
3541
3542 if (y_cst && REG_P (x)
3543 && (set = single_set (last_insn)) != NULL_RTX
3544 && SET_DEST (set) == x
3545 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3546 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3547
3548 return last_insn;
3549 }
3550
3551 /* If Y is representable exactly in a narrower mode, and the target can
3552 perform the extension directly from constant or memory, then emit the
3553 move as an extension. */
3554
3555 static rtx
3556 compress_float_constant (rtx x, rtx y)
3557 {
3558 enum machine_mode dstmode = GET_MODE (x);
3559 enum machine_mode orig_srcmode = GET_MODE (y);
3560 enum machine_mode srcmode;
3561 REAL_VALUE_TYPE r;
3562 int oldcost, newcost;
3563 bool speed = optimize_insn_for_speed_p ();
3564
3565 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3566
3567 if (targetm.legitimate_constant_p (dstmode, y))
3568 oldcost = set_src_cost (y, speed);
3569 else
3570 oldcost = set_src_cost (force_const_mem (dstmode, y), speed);
3571
3572 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3573 srcmode != orig_srcmode;
3574 srcmode = GET_MODE_WIDER_MODE (srcmode))
3575 {
3576 enum insn_code ic;
3577 rtx trunc_y, last_insn;
3578
3579 /* Skip if the target can't extend this way. */
3580 ic = can_extend_p (dstmode, srcmode, 0);
3581 if (ic == CODE_FOR_nothing)
3582 continue;
3583
3584 /* Skip if the narrowed value isn't exact. */
3585 if (! exact_real_truncate (srcmode, &r))
3586 continue;
3587
3588 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3589
3590 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3591 {
3592 /* Skip if the target needs extra instructions to perform
3593 the extension. */
3594 if (!insn_operand_matches (ic, 1, trunc_y))
3595 continue;
3596 /* This is valid, but may not be cheaper than the original. */
3597 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3598 speed);
3599 if (oldcost < newcost)
3600 continue;
3601 }
3602 else if (float_extend_from_mem[dstmode][srcmode])
3603 {
3604 trunc_y = force_const_mem (srcmode, trunc_y);
3605 /* This is valid, but may not be cheaper than the original. */
3606 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3607 speed);
3608 if (oldcost < newcost)
3609 continue;
3610 trunc_y = validize_mem (trunc_y);
3611 }
3612 else
3613 continue;
3614
3615 /* For CSE's benefit, force the compressed constant pool entry
3616 into a new pseudo. This constant may be used in different modes,
3617 and if not, combine will put things back together for us. */
3618 trunc_y = force_reg (srcmode, trunc_y);
3619 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3620 last_insn = get_last_insn ();
3621
3622 if (REG_P (x))
3623 set_unique_reg_note (last_insn, REG_EQUAL, y);
3624
3625 return last_insn;
3626 }
3627
3628 return NULL_RTX;
3629 }
3630 \f
3631 /* Pushing data onto the stack. */
3632
3633 /* Push a block of length SIZE (perhaps variable)
3634 and return an rtx to address the beginning of the block.
3635 The value may be virtual_outgoing_args_rtx.
3636
3637 EXTRA is the number of bytes of padding to push in addition to SIZE.
3638 BELOW nonzero means this padding comes at low addresses;
3639 otherwise, the padding comes at high addresses. */
3640
3641 rtx
3642 push_block (rtx size, int extra, int below)
3643 {
3644 rtx temp;
3645
3646 size = convert_modes (Pmode, ptr_mode, size, 1);
3647 if (CONSTANT_P (size))
3648 anti_adjust_stack (plus_constant (Pmode, size, extra));
3649 else if (REG_P (size) && extra == 0)
3650 anti_adjust_stack (size);
3651 else
3652 {
3653 temp = copy_to_mode_reg (Pmode, size);
3654 if (extra != 0)
3655 temp = expand_binop (Pmode, add_optab, temp,
3656 gen_int_mode (extra, Pmode),
3657 temp, 0, OPTAB_LIB_WIDEN);
3658 anti_adjust_stack (temp);
3659 }
3660
3661 #ifndef STACK_GROWS_DOWNWARD
3662 if (0)
3663 #else
3664 if (1)
3665 #endif
3666 {
3667 temp = virtual_outgoing_args_rtx;
3668 if (extra != 0 && below)
3669 temp = plus_constant (Pmode, temp, extra);
3670 }
3671 else
3672 {
3673 if (CONST_INT_P (size))
3674 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3675 -INTVAL (size) - (below ? 0 : extra));
3676 else if (extra != 0 && !below)
3677 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3678 negate_rtx (Pmode, plus_constant (Pmode, size,
3679 extra)));
3680 else
3681 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3682 negate_rtx (Pmode, size));
3683 }
3684
3685 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3686 }
3687
3688 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3689
3690 static rtx
3691 mem_autoinc_base (rtx mem)
3692 {
3693 if (MEM_P (mem))
3694 {
3695 rtx addr = XEXP (mem, 0);
3696 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3697 return XEXP (addr, 0);
3698 }
3699 return NULL;
3700 }
3701
3702 /* A utility routine used here, in reload, and in try_split. The insns
3703 after PREV up to and including LAST are known to adjust the stack,
3704 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3705 placing notes as appropriate. PREV may be NULL, indicating the
3706 entire insn sequence prior to LAST should be scanned.
3707
3708 The set of allowed stack pointer modifications is small:
3709 (1) One or more auto-inc style memory references (aka pushes),
3710 (2) One or more addition/subtraction with the SP as destination,
3711 (3) A single move insn with the SP as destination,
3712 (4) A call_pop insn,
3713 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3714
3715 Insns in the sequence that do not modify the SP are ignored,
3716 except for noreturn calls.
3717
3718 The return value is the amount of adjustment that can be trivially
3719 verified, via immediate operand or auto-inc. If the adjustment
3720 cannot be trivially extracted, the return value is INT_MIN. */
3721
3722 HOST_WIDE_INT
3723 find_args_size_adjust (rtx insn)
3724 {
3725 rtx dest, set, pat;
3726 int i;
3727
3728 pat = PATTERN (insn);
3729 set = NULL;
3730
3731 /* Look for a call_pop pattern. */
3732 if (CALL_P (insn))
3733 {
3734 /* We have to allow non-call_pop patterns for the case
3735 of emit_single_push_insn of a TLS address. */
3736 if (GET_CODE (pat) != PARALLEL)
3737 return 0;
3738
3739 /* All call_pop have a stack pointer adjust in the parallel.
3740 The call itself is always first, and the stack adjust is
3741 usually last, so search from the end. */
3742 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3743 {
3744 set = XVECEXP (pat, 0, i);
3745 if (GET_CODE (set) != SET)
3746 continue;
3747 dest = SET_DEST (set);
3748 if (dest == stack_pointer_rtx)
3749 break;
3750 }
3751 /* We'd better have found the stack pointer adjust. */
3752 if (i == 0)
3753 return 0;
3754 /* Fall through to process the extracted SET and DEST
3755 as if it was a standalone insn. */
3756 }
3757 else if (GET_CODE (pat) == SET)
3758 set = pat;
3759 else if ((set = single_set (insn)) != NULL)
3760 ;
3761 else if (GET_CODE (pat) == PARALLEL)
3762 {
3763 /* ??? Some older ports use a parallel with a stack adjust
3764 and a store for a PUSH_ROUNDING pattern, rather than a
3765 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3766 /* ??? See h8300 and m68k, pushqi1. */
3767 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
3768 {
3769 set = XVECEXP (pat, 0, i);
3770 if (GET_CODE (set) != SET)
3771 continue;
3772 dest = SET_DEST (set);
3773 if (dest == stack_pointer_rtx)
3774 break;
3775
3776 /* We do not expect an auto-inc of the sp in the parallel. */
3777 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
3778 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3779 != stack_pointer_rtx);
3780 }
3781 if (i < 0)
3782 return 0;
3783 }
3784 else
3785 return 0;
3786
3787 dest = SET_DEST (set);
3788
3789 /* Look for direct modifications of the stack pointer. */
3790 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
3791 {
3792 /* Look for a trivial adjustment, otherwise assume nothing. */
3793 /* Note that the SPU restore_stack_block pattern refers to
3794 the stack pointer in V4SImode. Consider that non-trivial. */
3795 if (SCALAR_INT_MODE_P (GET_MODE (dest))
3796 && GET_CODE (SET_SRC (set)) == PLUS
3797 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
3798 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
3799 return INTVAL (XEXP (SET_SRC (set), 1));
3800 /* ??? Reload can generate no-op moves, which will be cleaned
3801 up later. Recognize it and continue searching. */
3802 else if (rtx_equal_p (dest, SET_SRC (set)))
3803 return 0;
3804 else
3805 return HOST_WIDE_INT_MIN;
3806 }
3807 else
3808 {
3809 rtx mem, addr;
3810
3811 /* Otherwise only think about autoinc patterns. */
3812 if (mem_autoinc_base (dest) == stack_pointer_rtx)
3813 {
3814 mem = dest;
3815 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
3816 != stack_pointer_rtx);
3817 }
3818 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
3819 mem = SET_SRC (set);
3820 else
3821 return 0;
3822
3823 addr = XEXP (mem, 0);
3824 switch (GET_CODE (addr))
3825 {
3826 case PRE_INC:
3827 case POST_INC:
3828 return GET_MODE_SIZE (GET_MODE (mem));
3829 case PRE_DEC:
3830 case POST_DEC:
3831 return -GET_MODE_SIZE (GET_MODE (mem));
3832 case PRE_MODIFY:
3833 case POST_MODIFY:
3834 addr = XEXP (addr, 1);
3835 gcc_assert (GET_CODE (addr) == PLUS);
3836 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
3837 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
3838 return INTVAL (XEXP (addr, 1));
3839 default:
3840 gcc_unreachable ();
3841 }
3842 }
3843 }
3844
3845 int
3846 fixup_args_size_notes (rtx prev, rtx last, int end_args_size)
3847 {
3848 int args_size = end_args_size;
3849 bool saw_unknown = false;
3850 rtx insn;
3851
3852 for (insn = last; insn != prev; insn = PREV_INSN (insn))
3853 {
3854 HOST_WIDE_INT this_delta;
3855
3856 if (!NONDEBUG_INSN_P (insn))
3857 continue;
3858
3859 this_delta = find_args_size_adjust (insn);
3860 if (this_delta == 0)
3861 {
3862 if (!CALL_P (insn)
3863 || ACCUMULATE_OUTGOING_ARGS
3864 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
3865 continue;
3866 }
3867
3868 gcc_assert (!saw_unknown);
3869 if (this_delta == HOST_WIDE_INT_MIN)
3870 saw_unknown = true;
3871
3872 add_reg_note (insn, REG_ARGS_SIZE, GEN_INT (args_size));
3873 #ifdef STACK_GROWS_DOWNWARD
3874 this_delta = -(unsigned HOST_WIDE_INT) this_delta;
3875 #endif
3876 args_size -= this_delta;
3877 }
3878
3879 return saw_unknown ? INT_MIN : args_size;
3880 }
3881
3882 #ifdef PUSH_ROUNDING
3883 /* Emit single push insn. */
3884
3885 static void
3886 emit_single_push_insn_1 (enum machine_mode mode, rtx x, tree type)
3887 {
3888 rtx dest_addr;
3889 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3890 rtx dest;
3891 enum insn_code icode;
3892
3893 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3894 /* If there is push pattern, use it. Otherwise try old way of throwing
3895 MEM representing push operation to move expander. */
3896 icode = optab_handler (push_optab, mode);
3897 if (icode != CODE_FOR_nothing)
3898 {
3899 struct expand_operand ops[1];
3900
3901 create_input_operand (&ops[0], x, mode);
3902 if (maybe_expand_insn (icode, 1, ops))
3903 return;
3904 }
3905 if (GET_MODE_SIZE (mode) == rounded_size)
3906 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3907 /* If we are to pad downward, adjust the stack pointer first and
3908 then store X into the stack location using an offset. This is
3909 because emit_move_insn does not know how to pad; it does not have
3910 access to type. */
3911 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3912 {
3913 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3914 HOST_WIDE_INT offset;
3915
3916 emit_move_insn (stack_pointer_rtx,
3917 expand_binop (Pmode,
3918 #ifdef STACK_GROWS_DOWNWARD
3919 sub_optab,
3920 #else
3921 add_optab,
3922 #endif
3923 stack_pointer_rtx,
3924 gen_int_mode (rounded_size, Pmode),
3925 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3926
3927 offset = (HOST_WIDE_INT) padding_size;
3928 #ifdef STACK_GROWS_DOWNWARD
3929 if (STACK_PUSH_CODE == POST_DEC)
3930 /* We have already decremented the stack pointer, so get the
3931 previous value. */
3932 offset += (HOST_WIDE_INT) rounded_size;
3933 #else
3934 if (STACK_PUSH_CODE == POST_INC)
3935 /* We have already incremented the stack pointer, so get the
3936 previous value. */
3937 offset -= (HOST_WIDE_INT) rounded_size;
3938 #endif
3939 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3940 gen_int_mode (offset, Pmode));
3941 }
3942 else
3943 {
3944 #ifdef STACK_GROWS_DOWNWARD
3945 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3946 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3947 gen_int_mode (-(HOST_WIDE_INT) rounded_size,
3948 Pmode));
3949 #else
3950 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3951 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3952 gen_int_mode (rounded_size, Pmode));
3953 #endif
3954 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3955 }
3956
3957 dest = gen_rtx_MEM (mode, dest_addr);
3958
3959 if (type != 0)
3960 {
3961 set_mem_attributes (dest, type, 1);
3962
3963 if (flag_optimize_sibling_calls)
3964 /* Function incoming arguments may overlap with sibling call
3965 outgoing arguments and we cannot allow reordering of reads
3966 from function arguments with stores to outgoing arguments
3967 of sibling calls. */
3968 set_mem_alias_set (dest, 0);
3969 }
3970 emit_move_insn (dest, x);
3971 }
3972
3973 /* Emit and annotate a single push insn. */
3974
3975 static void
3976 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3977 {
3978 int delta, old_delta = stack_pointer_delta;
3979 rtx prev = get_last_insn ();
3980 rtx last;
3981
3982 emit_single_push_insn_1 (mode, x, type);
3983
3984 last = get_last_insn ();
3985
3986 /* Notice the common case where we emitted exactly one insn. */
3987 if (PREV_INSN (last) == prev)
3988 {
3989 add_reg_note (last, REG_ARGS_SIZE, GEN_INT (stack_pointer_delta));
3990 return;
3991 }
3992
3993 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
3994 gcc_assert (delta == INT_MIN || delta == old_delta);
3995 }
3996 #endif
3997
3998 /* Generate code to push X onto the stack, assuming it has mode MODE and
3999 type TYPE.
4000 MODE is redundant except when X is a CONST_INT (since they don't
4001 carry mode info).
4002 SIZE is an rtx for the size of data to be copied (in bytes),
4003 needed only if X is BLKmode.
4004
4005 ALIGN (in bits) is maximum alignment we can assume.
4006
4007 If PARTIAL and REG are both nonzero, then copy that many of the first
4008 bytes of X into registers starting with REG, and push the rest of X.
4009 The amount of space pushed is decreased by PARTIAL bytes.
4010 REG must be a hard register in this case.
4011 If REG is zero but PARTIAL is not, take any all others actions for an
4012 argument partially in registers, but do not actually load any
4013 registers.
4014
4015 EXTRA is the amount in bytes of extra space to leave next to this arg.
4016 This is ignored if an argument block has already been allocated.
4017
4018 On a machine that lacks real push insns, ARGS_ADDR is the address of
4019 the bottom of the argument block for this call. We use indexing off there
4020 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4021 argument block has not been preallocated.
4022
4023 ARGS_SO_FAR is the size of args previously pushed for this call.
4024
4025 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4026 for arguments passed in registers. If nonzero, it will be the number
4027 of bytes required. */
4028
4029 void
4030 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
4031 unsigned int align, int partial, rtx reg, int extra,
4032 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4033 rtx alignment_pad)
4034 {
4035 rtx xinner;
4036 enum direction stack_direction
4037 #ifdef STACK_GROWS_DOWNWARD
4038 = downward;
4039 #else
4040 = upward;
4041 #endif
4042
4043 /* Decide where to pad the argument: `downward' for below,
4044 `upward' for above, or `none' for don't pad it.
4045 Default is below for small data on big-endian machines; else above. */
4046 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
4047
4048 /* Invert direction if stack is post-decrement.
4049 FIXME: why? */
4050 if (STACK_PUSH_CODE == POST_DEC)
4051 if (where_pad != none)
4052 where_pad = (where_pad == downward ? upward : downward);
4053
4054 xinner = x;
4055
4056 if (mode == BLKmode
4057 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4058 {
4059 /* Copy a block into the stack, entirely or partially. */
4060
4061 rtx temp;
4062 int used;
4063 int offset;
4064 int skip;
4065
4066 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4067 used = partial - offset;
4068
4069 if (mode != BLKmode)
4070 {
4071 /* A value is to be stored in an insufficiently aligned
4072 stack slot; copy via a suitably aligned slot if
4073 necessary. */
4074 size = GEN_INT (GET_MODE_SIZE (mode));
4075 if (!MEM_P (xinner))
4076 {
4077 temp = assign_temp (type, 1, 1);
4078 emit_move_insn (temp, xinner);
4079 xinner = temp;
4080 }
4081 }
4082
4083 gcc_assert (size);
4084
4085 /* USED is now the # of bytes we need not copy to the stack
4086 because registers will take care of them. */
4087
4088 if (partial != 0)
4089 xinner = adjust_address (xinner, BLKmode, used);
4090
4091 /* If the partial register-part of the arg counts in its stack size,
4092 skip the part of stack space corresponding to the registers.
4093 Otherwise, start copying to the beginning of the stack space,
4094 by setting SKIP to 0. */
4095 skip = (reg_parm_stack_space == 0) ? 0 : used;
4096
4097 #ifdef PUSH_ROUNDING
4098 /* Do it with several push insns if that doesn't take lots of insns
4099 and if there is no difficulty with push insns that skip bytes
4100 on the stack for alignment purposes. */
4101 if (args_addr == 0
4102 && PUSH_ARGS
4103 && CONST_INT_P (size)
4104 && skip == 0
4105 && MEM_ALIGN (xinner) >= align
4106 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
4107 /* Here we avoid the case of a structure whose weak alignment
4108 forces many pushes of a small amount of data,
4109 and such small pushes do rounding that causes trouble. */
4110 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
4111 || align >= BIGGEST_ALIGNMENT
4112 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
4113 == (align / BITS_PER_UNIT)))
4114 && (HOST_WIDE_INT) PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
4115 {
4116 /* Push padding now if padding above and stack grows down,
4117 or if padding below and stack grows up.
4118 But if space already allocated, this has already been done. */
4119 if (extra && args_addr == 0
4120 && where_pad != none && where_pad != stack_direction)
4121 anti_adjust_stack (GEN_INT (extra));
4122
4123 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4124 }
4125 else
4126 #endif /* PUSH_ROUNDING */
4127 {
4128 rtx target;
4129
4130 /* Otherwise make space on the stack and copy the data
4131 to the address of that space. */
4132
4133 /* Deduct words put into registers from the size we must copy. */
4134 if (partial != 0)
4135 {
4136 if (CONST_INT_P (size))
4137 size = GEN_INT (INTVAL (size) - used);
4138 else
4139 size = expand_binop (GET_MODE (size), sub_optab, size,
4140 gen_int_mode (used, GET_MODE (size)),
4141 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4142 }
4143
4144 /* Get the address of the stack space.
4145 In this case, we do not deal with EXTRA separately.
4146 A single stack adjust will do. */
4147 if (! args_addr)
4148 {
4149 temp = push_block (size, extra, where_pad == downward);
4150 extra = 0;
4151 }
4152 else if (CONST_INT_P (args_so_far))
4153 temp = memory_address (BLKmode,
4154 plus_constant (Pmode, args_addr,
4155 skip + INTVAL (args_so_far)));
4156 else
4157 temp = memory_address (BLKmode,
4158 plus_constant (Pmode,
4159 gen_rtx_PLUS (Pmode,
4160 args_addr,
4161 args_so_far),
4162 skip));
4163
4164 if (!ACCUMULATE_OUTGOING_ARGS)
4165 {
4166 /* If the source is referenced relative to the stack pointer,
4167 copy it to another register to stabilize it. We do not need
4168 to do this if we know that we won't be changing sp. */
4169
4170 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4171 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4172 temp = copy_to_reg (temp);
4173 }
4174
4175 target = gen_rtx_MEM (BLKmode, temp);
4176
4177 /* We do *not* set_mem_attributes here, because incoming arguments
4178 may overlap with sibling call outgoing arguments and we cannot
4179 allow reordering of reads from function arguments with stores
4180 to outgoing arguments of sibling calls. We do, however, want
4181 to record the alignment of the stack slot. */
4182 /* ALIGN may well be better aligned than TYPE, e.g. due to
4183 PARM_BOUNDARY. Assume the caller isn't lying. */
4184 set_mem_align (target, align);
4185
4186 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4187 }
4188 }
4189 else if (partial > 0)
4190 {
4191 /* Scalar partly in registers. */
4192
4193 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
4194 int i;
4195 int not_stack;
4196 /* # bytes of start of argument
4197 that we must make space for but need not store. */
4198 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4199 int args_offset = INTVAL (args_so_far);
4200 int skip;
4201
4202 /* Push padding now if padding above and stack grows down,
4203 or if padding below and stack grows up.
4204 But if space already allocated, this has already been done. */
4205 if (extra && args_addr == 0
4206 && where_pad != none && where_pad != stack_direction)
4207 anti_adjust_stack (GEN_INT (extra));
4208
4209 /* If we make space by pushing it, we might as well push
4210 the real data. Otherwise, we can leave OFFSET nonzero
4211 and leave the space uninitialized. */
4212 if (args_addr == 0)
4213 offset = 0;
4214
4215 /* Now NOT_STACK gets the number of words that we don't need to
4216 allocate on the stack. Convert OFFSET to words too. */
4217 not_stack = (partial - offset) / UNITS_PER_WORD;
4218 offset /= UNITS_PER_WORD;
4219
4220 /* If the partial register-part of the arg counts in its stack size,
4221 skip the part of stack space corresponding to the registers.
4222 Otherwise, start copying to the beginning of the stack space,
4223 by setting SKIP to 0. */
4224 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4225
4226 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4227 x = validize_mem (force_const_mem (mode, x));
4228
4229 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4230 SUBREGs of such registers are not allowed. */
4231 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4232 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4233 x = copy_to_reg (x);
4234
4235 /* Loop over all the words allocated on the stack for this arg. */
4236 /* We can do it by words, because any scalar bigger than a word
4237 has a size a multiple of a word. */
4238 #ifndef PUSH_ARGS_REVERSED
4239 for (i = not_stack; i < size; i++)
4240 #else
4241 for (i = size - 1; i >= not_stack; i--)
4242 #endif
4243 if (i >= not_stack + offset)
4244 emit_push_insn (operand_subword_force (x, i, mode),
4245 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4246 0, args_addr,
4247 GEN_INT (args_offset + ((i - not_stack + skip)
4248 * UNITS_PER_WORD)),
4249 reg_parm_stack_space, alignment_pad);
4250 }
4251 else
4252 {
4253 rtx addr;
4254 rtx dest;
4255
4256 /* Push padding now if padding above and stack grows down,
4257 or if padding below and stack grows up.
4258 But if space already allocated, this has already been done. */
4259 if (extra && args_addr == 0
4260 && where_pad != none && where_pad != stack_direction)
4261 anti_adjust_stack (GEN_INT (extra));
4262
4263 #ifdef PUSH_ROUNDING
4264 if (args_addr == 0 && PUSH_ARGS)
4265 emit_single_push_insn (mode, x, type);
4266 else
4267 #endif
4268 {
4269 if (CONST_INT_P (args_so_far))
4270 addr
4271 = memory_address (mode,
4272 plus_constant (Pmode, args_addr,
4273 INTVAL (args_so_far)));
4274 else
4275 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
4276 args_so_far));
4277 dest = gen_rtx_MEM (mode, addr);
4278
4279 /* We do *not* set_mem_attributes here, because incoming arguments
4280 may overlap with sibling call outgoing arguments and we cannot
4281 allow reordering of reads from function arguments with stores
4282 to outgoing arguments of sibling calls. We do, however, want
4283 to record the alignment of the stack slot. */
4284 /* ALIGN may well be better aligned than TYPE, e.g. due to
4285 PARM_BOUNDARY. Assume the caller isn't lying. */
4286 set_mem_align (dest, align);
4287
4288 emit_move_insn (dest, x);
4289 }
4290 }
4291
4292 /* If part should go in registers, copy that part
4293 into the appropriate registers. Do this now, at the end,
4294 since mem-to-mem copies above may do function calls. */
4295 if (partial > 0 && reg != 0)
4296 {
4297 /* Handle calls that pass values in multiple non-contiguous locations.
4298 The Irix 6 ABI has examples of this. */
4299 if (GET_CODE (reg) == PARALLEL)
4300 emit_group_load (reg, x, type, -1);
4301 else
4302 {
4303 gcc_assert (partial % UNITS_PER_WORD == 0);
4304 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
4305 }
4306 }
4307
4308 if (extra && args_addr == 0 && where_pad == stack_direction)
4309 anti_adjust_stack (GEN_INT (extra));
4310
4311 if (alignment_pad && args_addr == 0)
4312 anti_adjust_stack (alignment_pad);
4313 }
4314 \f
4315 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4316 operations. */
4317
4318 static rtx
4319 get_subtarget (rtx x)
4320 {
4321 return (optimize
4322 || x == 0
4323 /* Only registers can be subtargets. */
4324 || !REG_P (x)
4325 /* Don't use hard regs to avoid extending their life. */
4326 || REGNO (x) < FIRST_PSEUDO_REGISTER
4327 ? 0 : x);
4328 }
4329
4330 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4331 FIELD is a bitfield. Returns true if the optimization was successful,
4332 and there's nothing else to do. */
4333
4334 static bool
4335 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
4336 unsigned HOST_WIDE_INT bitpos,
4337 unsigned HOST_WIDE_INT bitregion_start,
4338 unsigned HOST_WIDE_INT bitregion_end,
4339 enum machine_mode mode1, rtx str_rtx,
4340 tree to, tree src)
4341 {
4342 enum machine_mode str_mode = GET_MODE (str_rtx);
4343 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
4344 tree op0, op1;
4345 rtx value, result;
4346 optab binop;
4347 gimple srcstmt;
4348 enum tree_code code;
4349
4350 if (mode1 != VOIDmode
4351 || bitsize >= BITS_PER_WORD
4352 || str_bitsize > BITS_PER_WORD
4353 || TREE_SIDE_EFFECTS (to)
4354 || TREE_THIS_VOLATILE (to))
4355 return false;
4356
4357 STRIP_NOPS (src);
4358 if (TREE_CODE (src) != SSA_NAME)
4359 return false;
4360 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4361 return false;
4362
4363 srcstmt = get_gimple_for_ssa_name (src);
4364 if (!srcstmt
4365 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4366 return false;
4367
4368 code = gimple_assign_rhs_code (srcstmt);
4369
4370 op0 = gimple_assign_rhs1 (srcstmt);
4371
4372 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4373 to find its initialization. Hopefully the initialization will
4374 be from a bitfield load. */
4375 if (TREE_CODE (op0) == SSA_NAME)
4376 {
4377 gimple op0stmt = get_gimple_for_ssa_name (op0);
4378
4379 /* We want to eventually have OP0 be the same as TO, which
4380 should be a bitfield. */
4381 if (!op0stmt
4382 || !is_gimple_assign (op0stmt)
4383 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4384 return false;
4385 op0 = gimple_assign_rhs1 (op0stmt);
4386 }
4387
4388 op1 = gimple_assign_rhs2 (srcstmt);
4389
4390 if (!operand_equal_p (to, op0, 0))
4391 return false;
4392
4393 if (MEM_P (str_rtx))
4394 {
4395 unsigned HOST_WIDE_INT offset1;
4396
4397 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4398 str_mode = word_mode;
4399 str_mode = get_best_mode (bitsize, bitpos,
4400 bitregion_start, bitregion_end,
4401 MEM_ALIGN (str_rtx), str_mode, 0);
4402 if (str_mode == VOIDmode)
4403 return false;
4404 str_bitsize = GET_MODE_BITSIZE (str_mode);
4405
4406 offset1 = bitpos;
4407 bitpos %= str_bitsize;
4408 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4409 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4410 }
4411 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4412 return false;
4413
4414 /* If the bit field covers the whole REG/MEM, store_field
4415 will likely generate better code. */
4416 if (bitsize >= str_bitsize)
4417 return false;
4418
4419 /* We can't handle fields split across multiple entities. */
4420 if (bitpos + bitsize > str_bitsize)
4421 return false;
4422
4423 if (BYTES_BIG_ENDIAN)
4424 bitpos = str_bitsize - bitpos - bitsize;
4425
4426 switch (code)
4427 {
4428 case PLUS_EXPR:
4429 case MINUS_EXPR:
4430 /* For now, just optimize the case of the topmost bitfield
4431 where we don't need to do any masking and also
4432 1 bit bitfields where xor can be used.
4433 We might win by one instruction for the other bitfields
4434 too if insv/extv instructions aren't used, so that
4435 can be added later. */
4436 if (bitpos + bitsize != str_bitsize
4437 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4438 break;
4439
4440 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4441 value = convert_modes (str_mode,
4442 TYPE_MODE (TREE_TYPE (op1)), value,
4443 TYPE_UNSIGNED (TREE_TYPE (op1)));
4444
4445 /* We may be accessing data outside the field, which means
4446 we can alias adjacent data. */
4447 if (MEM_P (str_rtx))
4448 {
4449 str_rtx = shallow_copy_rtx (str_rtx);
4450 set_mem_alias_set (str_rtx, 0);
4451 set_mem_expr (str_rtx, 0);
4452 }
4453
4454 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4455 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
4456 {
4457 value = expand_and (str_mode, value, const1_rtx, NULL);
4458 binop = xor_optab;
4459 }
4460 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4461 result = expand_binop (str_mode, binop, str_rtx,
4462 value, str_rtx, 1, OPTAB_WIDEN);
4463 if (result != str_rtx)
4464 emit_move_insn (str_rtx, result);
4465 return true;
4466
4467 case BIT_IOR_EXPR:
4468 case BIT_XOR_EXPR:
4469 if (TREE_CODE (op1) != INTEGER_CST)
4470 break;
4471 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4472 value = convert_modes (str_mode,
4473 TYPE_MODE (TREE_TYPE (op1)), value,
4474 TYPE_UNSIGNED (TREE_TYPE (op1)));
4475
4476 /* We may be accessing data outside the field, which means
4477 we can alias adjacent data. */
4478 if (MEM_P (str_rtx))
4479 {
4480 str_rtx = shallow_copy_rtx (str_rtx);
4481 set_mem_alias_set (str_rtx, 0);
4482 set_mem_expr (str_rtx, 0);
4483 }
4484
4485 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4486 if (bitpos + bitsize != str_bitsize)
4487 {
4488 rtx mask = gen_int_mode (((unsigned HOST_WIDE_INT) 1 << bitsize) - 1,
4489 str_mode);
4490 value = expand_and (str_mode, value, mask, NULL_RTX);
4491 }
4492 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4493 result = expand_binop (str_mode, binop, str_rtx,
4494 value, str_rtx, 1, OPTAB_WIDEN);
4495 if (result != str_rtx)
4496 emit_move_insn (str_rtx, result);
4497 return true;
4498
4499 default:
4500 break;
4501 }
4502
4503 return false;
4504 }
4505
4506 /* In the C++ memory model, consecutive bit fields in a structure are
4507 considered one memory location.
4508
4509 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4510 returns the bit range of consecutive bits in which this COMPONENT_REF
4511 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4512 and *OFFSET may be adjusted in the process.
4513
4514 If the access does not need to be restricted, 0 is returned in both
4515 *BITSTART and *BITEND. */
4516
4517 static void
4518 get_bit_range (unsigned HOST_WIDE_INT *bitstart,
4519 unsigned HOST_WIDE_INT *bitend,
4520 tree exp,
4521 HOST_WIDE_INT *bitpos,
4522 tree *offset)
4523 {
4524 HOST_WIDE_INT bitoffset;
4525 tree field, repr;
4526
4527 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4528
4529 field = TREE_OPERAND (exp, 1);
4530 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4531 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4532 need to limit the range we can access. */
4533 if (!repr)
4534 {
4535 *bitstart = *bitend = 0;
4536 return;
4537 }
4538
4539 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4540 part of a larger bit field, then the representative does not serve any
4541 useful purpose. This can occur in Ada. */
4542 if (handled_component_p (TREE_OPERAND (exp, 0)))
4543 {
4544 enum machine_mode rmode;
4545 HOST_WIDE_INT rbitsize, rbitpos;
4546 tree roffset;
4547 int unsignedp;
4548 int volatilep = 0;
4549 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4550 &roffset, &rmode, &unsignedp, &volatilep, false);
4551 if ((rbitpos % BITS_PER_UNIT) != 0)
4552 {
4553 *bitstart = *bitend = 0;
4554 return;
4555 }
4556 }
4557
4558 /* Compute the adjustment to bitpos from the offset of the field
4559 relative to the representative. DECL_FIELD_OFFSET of field and
4560 repr are the same by construction if they are not constants,
4561 see finish_bitfield_layout. */
4562 if (host_integerp (DECL_FIELD_OFFSET (field), 1)
4563 && host_integerp (DECL_FIELD_OFFSET (repr), 1))
4564 bitoffset = (tree_low_cst (DECL_FIELD_OFFSET (field), 1)
4565 - tree_low_cst (DECL_FIELD_OFFSET (repr), 1)) * BITS_PER_UNIT;
4566 else
4567 bitoffset = 0;
4568 bitoffset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
4569 - tree_low_cst (DECL_FIELD_BIT_OFFSET (repr), 1));
4570
4571 /* If the adjustment is larger than bitpos, we would have a negative bit
4572 position for the lower bound and this may wreak havoc later. This can
4573 occur only if we have a non-null offset, so adjust offset and bitpos
4574 to make the lower bound non-negative. */
4575 if (bitoffset > *bitpos)
4576 {
4577 HOST_WIDE_INT adjust = bitoffset - *bitpos;
4578
4579 gcc_assert ((adjust % BITS_PER_UNIT) == 0);
4580 gcc_assert (*offset != NULL_TREE);
4581
4582 *bitpos += adjust;
4583 *offset
4584 = size_binop (MINUS_EXPR, *offset, size_int (adjust / BITS_PER_UNIT));
4585 *bitstart = 0;
4586 }
4587 else
4588 *bitstart = *bitpos - bitoffset;
4589
4590 *bitend = *bitstart + tree_low_cst (DECL_SIZE (repr), 1) - 1;
4591 }
4592
4593 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4594 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4595 DECL_RTL was not set yet, return NORTL. */
4596
4597 static inline bool
4598 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4599 {
4600 if (TREE_CODE (addr) != ADDR_EXPR)
4601 return false;
4602
4603 tree base = TREE_OPERAND (addr, 0);
4604
4605 if (!DECL_P (base)
4606 || TREE_ADDRESSABLE (base)
4607 || DECL_MODE (base) == BLKmode)
4608 return false;
4609
4610 if (!DECL_RTL_SET_P (base))
4611 return nortl;
4612
4613 return (!MEM_P (DECL_RTL (base)));
4614 }
4615
4616 /* Returns true if the MEM_REF REF refers to an object that does not
4617 reside in memory and has non-BLKmode. */
4618
4619 static inline bool
4620 mem_ref_refers_to_non_mem_p (tree ref)
4621 {
4622 tree base = TREE_OPERAND (ref, 0);
4623 return addr_expr_of_non_mem_decl_p_1 (base, false);
4624 }
4625
4626 /* Return TRUE iff OP is an ADDR_EXPR of a DECL that's not
4627 addressable. This is very much like mem_ref_refers_to_non_mem_p,
4628 but instead of the MEM_REF, it takes its base, and it doesn't
4629 assume a DECL is in memory just because its RTL is not set yet. */
4630
4631 bool
4632 addr_expr_of_non_mem_decl_p (tree op)
4633 {
4634 return addr_expr_of_non_mem_decl_p_1 (op, true);
4635 }
4636
4637 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4638 is true, try generating a nontemporal store. */
4639
4640 void
4641 expand_assignment (tree to, tree from, bool nontemporal)
4642 {
4643 rtx to_rtx = 0;
4644 rtx result;
4645 enum machine_mode mode;
4646 unsigned int align;
4647 enum insn_code icode;
4648
4649 /* Don't crash if the lhs of the assignment was erroneous. */
4650 if (TREE_CODE (to) == ERROR_MARK)
4651 {
4652 expand_normal (from);
4653 return;
4654 }
4655
4656 /* Optimize away no-op moves without side-effects. */
4657 if (operand_equal_p (to, from, 0))
4658 return;
4659
4660 /* Handle misaligned stores. */
4661 mode = TYPE_MODE (TREE_TYPE (to));
4662 if ((TREE_CODE (to) == MEM_REF
4663 || TREE_CODE (to) == TARGET_MEM_REF)
4664 && mode != BLKmode
4665 && !mem_ref_refers_to_non_mem_p (to)
4666 && ((align = get_object_alignment (to))
4667 < GET_MODE_ALIGNMENT (mode))
4668 && (((icode = optab_handler (movmisalign_optab, mode))
4669 != CODE_FOR_nothing)
4670 || SLOW_UNALIGNED_ACCESS (mode, align)))
4671 {
4672 rtx reg, mem;
4673
4674 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4675 reg = force_not_mem (reg);
4676 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4677
4678 if (icode != CODE_FOR_nothing)
4679 {
4680 struct expand_operand ops[2];
4681
4682 create_fixed_operand (&ops[0], mem);
4683 create_input_operand (&ops[1], reg, mode);
4684 /* The movmisalign<mode> pattern cannot fail, else the assignment
4685 would silently be omitted. */
4686 expand_insn (icode, 2, ops);
4687 }
4688 else
4689 store_bit_field (mem, GET_MODE_BITSIZE (mode),
4690 0, 0, 0, mode, reg);
4691 return;
4692 }
4693
4694 /* Assignment of a structure component needs special treatment
4695 if the structure component's rtx is not simply a MEM.
4696 Assignment of an array element at a constant index, and assignment of
4697 an array element in an unaligned packed structure field, has the same
4698 problem. Same for (partially) storing into a non-memory object. */
4699 if (handled_component_p (to)
4700 || (TREE_CODE (to) == MEM_REF
4701 && mem_ref_refers_to_non_mem_p (to))
4702 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
4703 {
4704 enum machine_mode mode1;
4705 HOST_WIDE_INT bitsize, bitpos;
4706 unsigned HOST_WIDE_INT bitregion_start = 0;
4707 unsigned HOST_WIDE_INT bitregion_end = 0;
4708 tree offset;
4709 int unsignedp;
4710 int volatilep = 0;
4711 tree tem;
4712 bool misalignp;
4713 rtx mem = NULL_RTX;
4714
4715 push_temp_slots ();
4716 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
4717 &unsignedp, &volatilep, true);
4718
4719 if (TREE_CODE (to) == COMPONENT_REF
4720 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
4721 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
4722
4723 /* If we are going to use store_bit_field and extract_bit_field,
4724 make sure to_rtx will be safe for multiple use. */
4725 mode = TYPE_MODE (TREE_TYPE (tem));
4726 if (TREE_CODE (tem) == MEM_REF
4727 && mode != BLKmode
4728 && ((align = get_object_alignment (tem))
4729 < GET_MODE_ALIGNMENT (mode))
4730 && ((icode = optab_handler (movmisalign_optab, mode))
4731 != CODE_FOR_nothing))
4732 {
4733 struct expand_operand ops[2];
4734
4735 misalignp = true;
4736 to_rtx = gen_reg_rtx (mode);
4737 mem = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4738
4739 /* If the misaligned store doesn't overwrite all bits, perform
4740 rmw cycle on MEM. */
4741 if (bitsize != GET_MODE_BITSIZE (mode))
4742 {
4743 create_input_operand (&ops[0], to_rtx, mode);
4744 create_fixed_operand (&ops[1], mem);
4745 /* The movmisalign<mode> pattern cannot fail, else the assignment
4746 would silently be omitted. */
4747 expand_insn (icode, 2, ops);
4748
4749 mem = copy_rtx (mem);
4750 }
4751 }
4752 else
4753 {
4754 misalignp = false;
4755 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
4756 }
4757
4758 /* If the bitfield is volatile, we want to access it in the
4759 field's mode, not the computed mode.
4760 If a MEM has VOIDmode (external with incomplete type),
4761 use BLKmode for it instead. */
4762 if (MEM_P (to_rtx))
4763 {
4764 if (volatilep && flag_strict_volatile_bitfields > 0)
4765 to_rtx = adjust_address (to_rtx, mode1, 0);
4766 else if (GET_MODE (to_rtx) == VOIDmode)
4767 to_rtx = adjust_address (to_rtx, BLKmode, 0);
4768 }
4769
4770 if (offset != 0)
4771 {
4772 enum machine_mode address_mode;
4773 rtx offset_rtx;
4774
4775 if (!MEM_P (to_rtx))
4776 {
4777 /* We can get constant negative offsets into arrays with broken
4778 user code. Translate this to a trap instead of ICEing. */
4779 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
4780 expand_builtin_trap ();
4781 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
4782 }
4783
4784 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
4785 address_mode = get_address_mode (to_rtx);
4786 if (GET_MODE (offset_rtx) != address_mode)
4787 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
4788
4789 /* A constant address in TO_RTX can have VOIDmode, we must not try
4790 to call force_reg for that case. Avoid that case. */
4791 if (MEM_P (to_rtx)
4792 && GET_MODE (to_rtx) == BLKmode
4793 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
4794 && bitsize > 0
4795 && (bitpos % bitsize) == 0
4796 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
4797 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
4798 {
4799 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
4800 bitpos = 0;
4801 }
4802
4803 to_rtx = offset_address (to_rtx, offset_rtx,
4804 highest_pow2_factor_for_target (to,
4805 offset));
4806 }
4807
4808 /* No action is needed if the target is not a memory and the field
4809 lies completely outside that target. This can occur if the source
4810 code contains an out-of-bounds access to a small array. */
4811 if (!MEM_P (to_rtx)
4812 && GET_MODE (to_rtx) != BLKmode
4813 && (unsigned HOST_WIDE_INT) bitpos
4814 >= GET_MODE_PRECISION (GET_MODE (to_rtx)))
4815 {
4816 expand_normal (from);
4817 result = NULL;
4818 }
4819 /* Handle expand_expr of a complex value returning a CONCAT. */
4820 else if (GET_CODE (to_rtx) == CONCAT)
4821 {
4822 unsigned short mode_bitsize = GET_MODE_BITSIZE (GET_MODE (to_rtx));
4823 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from)))
4824 && bitpos == 0
4825 && bitsize == mode_bitsize)
4826 result = store_expr (from, to_rtx, false, nontemporal);
4827 else if (bitsize == mode_bitsize / 2
4828 && (bitpos == 0 || bitpos == mode_bitsize / 2))
4829 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false,
4830 nontemporal);
4831 else if (bitpos + bitsize <= mode_bitsize / 2)
4832 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
4833 bitregion_start, bitregion_end,
4834 mode1, from,
4835 get_alias_set (to), nontemporal);
4836 else if (bitpos >= mode_bitsize / 2)
4837 result = store_field (XEXP (to_rtx, 1), bitsize,
4838 bitpos - mode_bitsize / 2,
4839 bitregion_start, bitregion_end,
4840 mode1, from,
4841 get_alias_set (to), nontemporal);
4842 else if (bitpos == 0 && bitsize == mode_bitsize)
4843 {
4844 rtx from_rtx;
4845 result = expand_normal (from);
4846 from_rtx = simplify_gen_subreg (GET_MODE (to_rtx), result,
4847 TYPE_MODE (TREE_TYPE (from)), 0);
4848 emit_move_insn (XEXP (to_rtx, 0),
4849 read_complex_part (from_rtx, false));
4850 emit_move_insn (XEXP (to_rtx, 1),
4851 read_complex_part (from_rtx, true));
4852 }
4853 else
4854 {
4855 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
4856 GET_MODE_SIZE (GET_MODE (to_rtx)));
4857 write_complex_part (temp, XEXP (to_rtx, 0), false);
4858 write_complex_part (temp, XEXP (to_rtx, 1), true);
4859 result = store_field (temp, bitsize, bitpos,
4860 bitregion_start, bitregion_end,
4861 mode1, from,
4862 get_alias_set (to), nontemporal);
4863 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
4864 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
4865 }
4866 }
4867 else
4868 {
4869 if (MEM_P (to_rtx))
4870 {
4871 /* If the field is at offset zero, we could have been given the
4872 DECL_RTX of the parent struct. Don't munge it. */
4873 to_rtx = shallow_copy_rtx (to_rtx);
4874
4875 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
4876
4877 /* Deal with volatile and readonly fields. The former is only
4878 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
4879 if (volatilep)
4880 MEM_VOLATILE_P (to_rtx) = 1;
4881 }
4882
4883 if (optimize_bitfield_assignment_op (bitsize, bitpos,
4884 bitregion_start, bitregion_end,
4885 mode1,
4886 to_rtx, to, from))
4887 result = NULL;
4888 else
4889 result = store_field (to_rtx, bitsize, bitpos,
4890 bitregion_start, bitregion_end,
4891 mode1, from,
4892 get_alias_set (to), nontemporal);
4893 }
4894
4895 if (misalignp)
4896 {
4897 struct expand_operand ops[2];
4898
4899 create_fixed_operand (&ops[0], mem);
4900 create_input_operand (&ops[1], to_rtx, mode);
4901 /* The movmisalign<mode> pattern cannot fail, else the assignment
4902 would silently be omitted. */
4903 expand_insn (icode, 2, ops);
4904 }
4905
4906 if (result)
4907 preserve_temp_slots (result);
4908 pop_temp_slots ();
4909 return;
4910 }
4911
4912 /* If the rhs is a function call and its value is not an aggregate,
4913 call the function before we start to compute the lhs.
4914 This is needed for correct code for cases such as
4915 val = setjmp (buf) on machines where reference to val
4916 requires loading up part of an address in a separate insn.
4917
4918 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
4919 since it might be a promoted variable where the zero- or sign- extension
4920 needs to be done. Handling this in the normal way is safe because no
4921 computation is done before the call. The same is true for SSA names. */
4922 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
4923 && COMPLETE_TYPE_P (TREE_TYPE (from))
4924 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
4925 && ! (((TREE_CODE (to) == VAR_DECL
4926 || TREE_CODE (to) == PARM_DECL
4927 || TREE_CODE (to) == RESULT_DECL)
4928 && REG_P (DECL_RTL (to)))
4929 || TREE_CODE (to) == SSA_NAME))
4930 {
4931 rtx value;
4932
4933 push_temp_slots ();
4934 value = expand_normal (from);
4935 if (to_rtx == 0)
4936 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4937
4938 /* Handle calls that return values in multiple non-contiguous locations.
4939 The Irix 6 ABI has examples of this. */
4940 if (GET_CODE (to_rtx) == PARALLEL)
4941 {
4942 if (GET_CODE (value) == PARALLEL)
4943 emit_group_move (to_rtx, value);
4944 else
4945 emit_group_load (to_rtx, value, TREE_TYPE (from),
4946 int_size_in_bytes (TREE_TYPE (from)));
4947 }
4948 else if (GET_CODE (value) == PARALLEL)
4949 emit_group_store (to_rtx, value, TREE_TYPE (from),
4950 int_size_in_bytes (TREE_TYPE (from)));
4951 else if (GET_MODE (to_rtx) == BLKmode)
4952 {
4953 /* Handle calls that return BLKmode values in registers. */
4954 if (REG_P (value))
4955 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
4956 else
4957 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
4958 }
4959 else
4960 {
4961 if (POINTER_TYPE_P (TREE_TYPE (to)))
4962 value = convert_memory_address_addr_space
4963 (GET_MODE (to_rtx), value,
4964 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
4965
4966 emit_move_insn (to_rtx, value);
4967 }
4968 preserve_temp_slots (to_rtx);
4969 pop_temp_slots ();
4970 return;
4971 }
4972
4973 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
4974 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4975
4976 /* Don't move directly into a return register. */
4977 if (TREE_CODE (to) == RESULT_DECL
4978 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4979 {
4980 rtx temp;
4981
4982 push_temp_slots ();
4983
4984 /* If the source is itself a return value, it still is in a pseudo at
4985 this point so we can move it back to the return register directly. */
4986 if (REG_P (to_rtx)
4987 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
4988 && TREE_CODE (from) != CALL_EXPR)
4989 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
4990 else
4991 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
4992
4993 /* Handle calls that return values in multiple non-contiguous locations.
4994 The Irix 6 ABI has examples of this. */
4995 if (GET_CODE (to_rtx) == PARALLEL)
4996 {
4997 if (GET_CODE (temp) == PARALLEL)
4998 emit_group_move (to_rtx, temp);
4999 else
5000 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5001 int_size_in_bytes (TREE_TYPE (from)));
5002 }
5003 else if (temp)
5004 emit_move_insn (to_rtx, temp);
5005
5006 preserve_temp_slots (to_rtx);
5007 pop_temp_slots ();
5008 return;
5009 }
5010
5011 /* In case we are returning the contents of an object which overlaps
5012 the place the value is being stored, use a safe function when copying
5013 a value through a pointer into a structure value return block. */
5014 if (TREE_CODE (to) == RESULT_DECL
5015 && TREE_CODE (from) == INDIRECT_REF
5016 && ADDR_SPACE_GENERIC_P
5017 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5018 && refs_may_alias_p (to, from)
5019 && cfun->returns_struct
5020 && !cfun->returns_pcc_struct)
5021 {
5022 rtx from_rtx, size;
5023
5024 push_temp_slots ();
5025 size = expr_size (from);
5026 from_rtx = expand_normal (from);
5027
5028 emit_library_call (memmove_libfunc, LCT_NORMAL,
5029 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
5030 XEXP (from_rtx, 0), Pmode,
5031 convert_to_mode (TYPE_MODE (sizetype),
5032 size, TYPE_UNSIGNED (sizetype)),
5033 TYPE_MODE (sizetype));
5034
5035 preserve_temp_slots (to_rtx);
5036 pop_temp_slots ();
5037 return;
5038 }
5039
5040 /* Compute FROM and store the value in the rtx we got. */
5041
5042 push_temp_slots ();
5043 result = store_expr (from, to_rtx, 0, nontemporal);
5044 preserve_temp_slots (result);
5045 pop_temp_slots ();
5046 return;
5047 }
5048
5049 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5050 succeeded, false otherwise. */
5051
5052 bool
5053 emit_storent_insn (rtx to, rtx from)
5054 {
5055 struct expand_operand ops[2];
5056 enum machine_mode mode = GET_MODE (to);
5057 enum insn_code code = optab_handler (storent_optab, mode);
5058
5059 if (code == CODE_FOR_nothing)
5060 return false;
5061
5062 create_fixed_operand (&ops[0], to);
5063 create_input_operand (&ops[1], from, mode);
5064 return maybe_expand_insn (code, 2, ops);
5065 }
5066
5067 /* Generate code for computing expression EXP,
5068 and storing the value into TARGET.
5069
5070 If the mode is BLKmode then we may return TARGET itself.
5071 It turns out that in BLKmode it doesn't cause a problem.
5072 because C has no operators that could combine two different
5073 assignments into the same BLKmode object with different values
5074 with no sequence point. Will other languages need this to
5075 be more thorough?
5076
5077 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5078 stack, and block moves may need to be treated specially.
5079
5080 If NONTEMPORAL is true, try using a nontemporal store instruction. */
5081
5082 rtx
5083 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal)
5084 {
5085 rtx temp;
5086 rtx alt_rtl = NULL_RTX;
5087 location_t loc = curr_insn_location ();
5088
5089 if (VOID_TYPE_P (TREE_TYPE (exp)))
5090 {
5091 /* C++ can generate ?: expressions with a throw expression in one
5092 branch and an rvalue in the other. Here, we resolve attempts to
5093 store the throw expression's nonexistent result. */
5094 gcc_assert (!call_param_p);
5095 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5096 return NULL_RTX;
5097 }
5098 if (TREE_CODE (exp) == COMPOUND_EXPR)
5099 {
5100 /* Perform first part of compound expression, then assign from second
5101 part. */
5102 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5103 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5104 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5105 nontemporal);
5106 }
5107 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5108 {
5109 /* For conditional expression, get safe form of the target. Then
5110 test the condition, doing the appropriate assignment on either
5111 side. This avoids the creation of unnecessary temporaries.
5112 For non-BLKmode, it is more efficient not to do this. */
5113
5114 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
5115
5116 do_pending_stack_adjust ();
5117 NO_DEFER_POP;
5118 jumpifnot (TREE_OPERAND (exp, 0), lab1, -1);
5119 store_expr (TREE_OPERAND (exp, 1), target, call_param_p,
5120 nontemporal);
5121 emit_jump_insn (gen_jump (lab2));
5122 emit_barrier ();
5123 emit_label (lab1);
5124 store_expr (TREE_OPERAND (exp, 2), target, call_param_p,
5125 nontemporal);
5126 emit_label (lab2);
5127 OK_DEFER_POP;
5128
5129 return NULL_RTX;
5130 }
5131 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5132 /* If this is a scalar in a register that is stored in a wider mode
5133 than the declared mode, compute the result into its declared mode
5134 and then convert to the wider mode. Our value is the computed
5135 expression. */
5136 {
5137 rtx inner_target = 0;
5138
5139 /* We can do the conversion inside EXP, which will often result
5140 in some optimizations. Do the conversion in two steps: first
5141 change the signedness, if needed, then the extend. But don't
5142 do this if the type of EXP is a subtype of something else
5143 since then the conversion might involve more than just
5144 converting modes. */
5145 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5146 && TREE_TYPE (TREE_TYPE (exp)) == 0
5147 && GET_MODE_PRECISION (GET_MODE (target))
5148 == TYPE_PRECISION (TREE_TYPE (exp)))
5149 {
5150 if (TYPE_UNSIGNED (TREE_TYPE (exp))
5151 != SUBREG_PROMOTED_UNSIGNED_P (target))
5152 {
5153 /* Some types, e.g. Fortran's logical*4, won't have a signed
5154 version, so use the mode instead. */
5155 tree ntype
5156 = (signed_or_unsigned_type_for
5157 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)));
5158 if (ntype == NULL)
5159 ntype = lang_hooks.types.type_for_mode
5160 (TYPE_MODE (TREE_TYPE (exp)),
5161 SUBREG_PROMOTED_UNSIGNED_P (target));
5162
5163 exp = fold_convert_loc (loc, ntype, exp);
5164 }
5165
5166 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5167 (GET_MODE (SUBREG_REG (target)),
5168 SUBREG_PROMOTED_UNSIGNED_P (target)),
5169 exp);
5170
5171 inner_target = SUBREG_REG (target);
5172 }
5173
5174 temp = expand_expr (exp, inner_target, VOIDmode,
5175 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5176
5177 /* If TEMP is a VOIDmode constant, use convert_modes to make
5178 sure that we properly convert it. */
5179 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5180 {
5181 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5182 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
5183 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
5184 GET_MODE (target), temp,
5185 SUBREG_PROMOTED_UNSIGNED_P (target));
5186 }
5187
5188 convert_move (SUBREG_REG (target), temp,
5189 SUBREG_PROMOTED_UNSIGNED_P (target));
5190
5191 return NULL_RTX;
5192 }
5193 else if ((TREE_CODE (exp) == STRING_CST
5194 || (TREE_CODE (exp) == MEM_REF
5195 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5196 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5197 == STRING_CST
5198 && integer_zerop (TREE_OPERAND (exp, 1))))
5199 && !nontemporal && !call_param_p
5200 && MEM_P (target))
5201 {
5202 /* Optimize initialization of an array with a STRING_CST. */
5203 HOST_WIDE_INT exp_len, str_copy_len;
5204 rtx dest_mem;
5205 tree str = TREE_CODE (exp) == STRING_CST
5206 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5207
5208 exp_len = int_expr_size (exp);
5209 if (exp_len <= 0)
5210 goto normal_expr;
5211
5212 if (TREE_STRING_LENGTH (str) <= 0)
5213 goto normal_expr;
5214
5215 str_copy_len = strlen (TREE_STRING_POINTER (str));
5216 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5217 goto normal_expr;
5218
5219 str_copy_len = TREE_STRING_LENGTH (str);
5220 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5221 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5222 {
5223 str_copy_len += STORE_MAX_PIECES - 1;
5224 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5225 }
5226 str_copy_len = MIN (str_copy_len, exp_len);
5227 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5228 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5229 MEM_ALIGN (target), false))
5230 goto normal_expr;
5231
5232 dest_mem = target;
5233
5234 dest_mem = store_by_pieces (dest_mem,
5235 str_copy_len, builtin_strncpy_read_str,
5236 CONST_CAST (char *,
5237 TREE_STRING_POINTER (str)),
5238 MEM_ALIGN (target), false,
5239 exp_len > str_copy_len ? 1 : 0);
5240 if (exp_len > str_copy_len)
5241 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5242 GEN_INT (exp_len - str_copy_len),
5243 BLOCK_OP_NORMAL);
5244 return NULL_RTX;
5245 }
5246 else
5247 {
5248 rtx tmp_target;
5249
5250 normal_expr:
5251 /* If we want to use a nontemporal store, force the value to
5252 register first. */
5253 tmp_target = nontemporal ? NULL_RTX : target;
5254 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5255 (call_param_p
5256 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5257 &alt_rtl);
5258 }
5259
5260 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5261 the same as that of TARGET, adjust the constant. This is needed, for
5262 example, in case it is a CONST_DOUBLE and we want only a word-sized
5263 value. */
5264 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5265 && TREE_CODE (exp) != ERROR_MARK
5266 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5267 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5268 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5269
5270 /* If value was not generated in the target, store it there.
5271 Convert the value to TARGET's type first if necessary and emit the
5272 pending incrementations that have been queued when expanding EXP.
5273 Note that we cannot emit the whole queue blindly because this will
5274 effectively disable the POST_INC optimization later.
5275
5276 If TEMP and TARGET compare equal according to rtx_equal_p, but
5277 one or both of them are volatile memory refs, we have to distinguish
5278 two cases:
5279 - expand_expr has used TARGET. In this case, we must not generate
5280 another copy. This can be detected by TARGET being equal according
5281 to == .
5282 - expand_expr has not used TARGET - that means that the source just
5283 happens to have the same RTX form. Since temp will have been created
5284 by expand_expr, it will compare unequal according to == .
5285 We must generate a copy in this case, to reach the correct number
5286 of volatile memory references. */
5287
5288 if ((! rtx_equal_p (temp, target)
5289 || (temp != target && (side_effects_p (temp)
5290 || side_effects_p (target))))
5291 && TREE_CODE (exp) != ERROR_MARK
5292 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5293 but TARGET is not valid memory reference, TEMP will differ
5294 from TARGET although it is really the same location. */
5295 && !(alt_rtl
5296 && rtx_equal_p (alt_rtl, target)
5297 && !side_effects_p (alt_rtl)
5298 && !side_effects_p (target))
5299 /* If there's nothing to copy, don't bother. Don't call
5300 expr_size unless necessary, because some front-ends (C++)
5301 expr_size-hook must not be given objects that are not
5302 supposed to be bit-copied or bit-initialized. */
5303 && expr_size (exp) != const0_rtx)
5304 {
5305 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5306 {
5307 if (GET_MODE (target) == BLKmode)
5308 {
5309 /* Handle calls that return BLKmode values in registers. */
5310 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5311 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5312 else
5313 store_bit_field (target,
5314 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5315 0, 0, 0, GET_MODE (temp), temp);
5316 }
5317 else
5318 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5319 }
5320
5321 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5322 {
5323 /* Handle copying a string constant into an array. The string
5324 constant may be shorter than the array. So copy just the string's
5325 actual length, and clear the rest. First get the size of the data
5326 type of the string, which is actually the size of the target. */
5327 rtx size = expr_size (exp);
5328
5329 if (CONST_INT_P (size)
5330 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5331 emit_block_move (target, temp, size,
5332 (call_param_p
5333 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5334 else
5335 {
5336 enum machine_mode pointer_mode
5337 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5338 enum machine_mode address_mode = get_address_mode (target);
5339
5340 /* Compute the size of the data to copy from the string. */
5341 tree copy_size
5342 = size_binop_loc (loc, MIN_EXPR,
5343 make_tree (sizetype, size),
5344 size_int (TREE_STRING_LENGTH (exp)));
5345 rtx copy_size_rtx
5346 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5347 (call_param_p
5348 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5349 rtx label = 0;
5350
5351 /* Copy that much. */
5352 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5353 TYPE_UNSIGNED (sizetype));
5354 emit_block_move (target, temp, copy_size_rtx,
5355 (call_param_p
5356 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5357
5358 /* Figure out how much is left in TARGET that we have to clear.
5359 Do all calculations in pointer_mode. */
5360 if (CONST_INT_P (copy_size_rtx))
5361 {
5362 size = plus_constant (address_mode, size,
5363 -INTVAL (copy_size_rtx));
5364 target = adjust_address (target, BLKmode,
5365 INTVAL (copy_size_rtx));
5366 }
5367 else
5368 {
5369 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5370 copy_size_rtx, NULL_RTX, 0,
5371 OPTAB_LIB_WIDEN);
5372
5373 if (GET_MODE (copy_size_rtx) != address_mode)
5374 copy_size_rtx = convert_to_mode (address_mode,
5375 copy_size_rtx,
5376 TYPE_UNSIGNED (sizetype));
5377
5378 target = offset_address (target, copy_size_rtx,
5379 highest_pow2_factor (copy_size));
5380 label = gen_label_rtx ();
5381 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5382 GET_MODE (size), 0, label);
5383 }
5384
5385 if (size != const0_rtx)
5386 clear_storage (target, size, BLOCK_OP_NORMAL);
5387
5388 if (label)
5389 emit_label (label);
5390 }
5391 }
5392 /* Handle calls that return values in multiple non-contiguous locations.
5393 The Irix 6 ABI has examples of this. */
5394 else if (GET_CODE (target) == PARALLEL)
5395 {
5396 if (GET_CODE (temp) == PARALLEL)
5397 emit_group_move (target, temp);
5398 else
5399 emit_group_load (target, temp, TREE_TYPE (exp),
5400 int_size_in_bytes (TREE_TYPE (exp)));
5401 }
5402 else if (GET_CODE (temp) == PARALLEL)
5403 emit_group_store (target, temp, TREE_TYPE (exp),
5404 int_size_in_bytes (TREE_TYPE (exp)));
5405 else if (GET_MODE (temp) == BLKmode)
5406 emit_block_move (target, temp, expr_size (exp),
5407 (call_param_p
5408 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5409 /* If we emit a nontemporal store, there is nothing else to do. */
5410 else if (nontemporal && emit_storent_insn (target, temp))
5411 ;
5412 else
5413 {
5414 temp = force_operand (temp, target);
5415 if (temp != target)
5416 emit_move_insn (target, temp);
5417 }
5418 }
5419
5420 return NULL_RTX;
5421 }
5422 \f
5423 /* Return true if field F of structure TYPE is a flexible array. */
5424
5425 static bool
5426 flexible_array_member_p (const_tree f, const_tree type)
5427 {
5428 const_tree tf;
5429
5430 tf = TREE_TYPE (f);
5431 return (DECL_CHAIN (f) == NULL
5432 && TREE_CODE (tf) == ARRAY_TYPE
5433 && TYPE_DOMAIN (tf)
5434 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5435 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5436 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5437 && int_size_in_bytes (type) >= 0);
5438 }
5439
5440 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5441 must have in order for it to completely initialize a value of type TYPE.
5442 Return -1 if the number isn't known.
5443
5444 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5445
5446 static HOST_WIDE_INT
5447 count_type_elements (const_tree type, bool for_ctor_p)
5448 {
5449 switch (TREE_CODE (type))
5450 {
5451 case ARRAY_TYPE:
5452 {
5453 tree nelts;
5454
5455 nelts = array_type_nelts (type);
5456 if (nelts && host_integerp (nelts, 1))
5457 {
5458 unsigned HOST_WIDE_INT n;
5459
5460 n = tree_low_cst (nelts, 1) + 1;
5461 if (n == 0 || for_ctor_p)
5462 return n;
5463 else
5464 return n * count_type_elements (TREE_TYPE (type), false);
5465 }
5466 return for_ctor_p ? -1 : 1;
5467 }
5468
5469 case RECORD_TYPE:
5470 {
5471 unsigned HOST_WIDE_INT n;
5472 tree f;
5473
5474 n = 0;
5475 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5476 if (TREE_CODE (f) == FIELD_DECL)
5477 {
5478 if (!for_ctor_p)
5479 n += count_type_elements (TREE_TYPE (f), false);
5480 else if (!flexible_array_member_p (f, type))
5481 /* Don't count flexible arrays, which are not supposed
5482 to be initialized. */
5483 n += 1;
5484 }
5485
5486 return n;
5487 }
5488
5489 case UNION_TYPE:
5490 case QUAL_UNION_TYPE:
5491 {
5492 tree f;
5493 HOST_WIDE_INT n, m;
5494
5495 gcc_assert (!for_ctor_p);
5496 /* Estimate the number of scalars in each field and pick the
5497 maximum. Other estimates would do instead; the idea is simply
5498 to make sure that the estimate is not sensitive to the ordering
5499 of the fields. */
5500 n = 1;
5501 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5502 if (TREE_CODE (f) == FIELD_DECL)
5503 {
5504 m = count_type_elements (TREE_TYPE (f), false);
5505 /* If the field doesn't span the whole union, add an extra
5506 scalar for the rest. */
5507 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5508 TYPE_SIZE (type)) != 1)
5509 m++;
5510 if (n < m)
5511 n = m;
5512 }
5513 return n;
5514 }
5515
5516 case COMPLEX_TYPE:
5517 return 2;
5518
5519 case VECTOR_TYPE:
5520 return TYPE_VECTOR_SUBPARTS (type);
5521
5522 case INTEGER_TYPE:
5523 case REAL_TYPE:
5524 case FIXED_POINT_TYPE:
5525 case ENUMERAL_TYPE:
5526 case BOOLEAN_TYPE:
5527 case POINTER_TYPE:
5528 case OFFSET_TYPE:
5529 case REFERENCE_TYPE:
5530 case NULLPTR_TYPE:
5531 return 1;
5532
5533 case ERROR_MARK:
5534 return 0;
5535
5536 case VOID_TYPE:
5537 case METHOD_TYPE:
5538 case FUNCTION_TYPE:
5539 case LANG_TYPE:
5540 default:
5541 gcc_unreachable ();
5542 }
5543 }
5544
5545 /* Helper for categorize_ctor_elements. Identical interface. */
5546
5547 static bool
5548 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5549 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5550 {
5551 unsigned HOST_WIDE_INT idx;
5552 HOST_WIDE_INT nz_elts, init_elts, num_fields;
5553 tree value, purpose, elt_type;
5554
5555 /* Whether CTOR is a valid constant initializer, in accordance with what
5556 initializer_constant_valid_p does. If inferred from the constructor
5557 elements, true until proven otherwise. */
5558 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
5559 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
5560
5561 nz_elts = 0;
5562 init_elts = 0;
5563 num_fields = 0;
5564 elt_type = NULL_TREE;
5565
5566 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
5567 {
5568 HOST_WIDE_INT mult = 1;
5569
5570 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
5571 {
5572 tree lo_index = TREE_OPERAND (purpose, 0);
5573 tree hi_index = TREE_OPERAND (purpose, 1);
5574
5575 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
5576 mult = (tree_low_cst (hi_index, 1)
5577 - tree_low_cst (lo_index, 1) + 1);
5578 }
5579 num_fields += mult;
5580 elt_type = TREE_TYPE (value);
5581
5582 switch (TREE_CODE (value))
5583 {
5584 case CONSTRUCTOR:
5585 {
5586 HOST_WIDE_INT nz = 0, ic = 0;
5587
5588 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &ic,
5589 p_complete);
5590
5591 nz_elts += mult * nz;
5592 init_elts += mult * ic;
5593
5594 if (const_from_elts_p && const_p)
5595 const_p = const_elt_p;
5596 }
5597 break;
5598
5599 case INTEGER_CST:
5600 case REAL_CST:
5601 case FIXED_CST:
5602 if (!initializer_zerop (value))
5603 nz_elts += mult;
5604 init_elts += mult;
5605 break;
5606
5607 case STRING_CST:
5608 nz_elts += mult * TREE_STRING_LENGTH (value);
5609 init_elts += mult * TREE_STRING_LENGTH (value);
5610 break;
5611
5612 case COMPLEX_CST:
5613 if (!initializer_zerop (TREE_REALPART (value)))
5614 nz_elts += mult;
5615 if (!initializer_zerop (TREE_IMAGPART (value)))
5616 nz_elts += mult;
5617 init_elts += mult;
5618 break;
5619
5620 case VECTOR_CST:
5621 {
5622 unsigned i;
5623 for (i = 0; i < VECTOR_CST_NELTS (value); ++i)
5624 {
5625 tree v = VECTOR_CST_ELT (value, i);
5626 if (!initializer_zerop (v))
5627 nz_elts += mult;
5628 init_elts += mult;
5629 }
5630 }
5631 break;
5632
5633 default:
5634 {
5635 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
5636 nz_elts += mult * tc;
5637 init_elts += mult * tc;
5638
5639 if (const_from_elts_p && const_p)
5640 const_p = initializer_constant_valid_p (value, elt_type)
5641 != NULL_TREE;
5642 }
5643 break;
5644 }
5645 }
5646
5647 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
5648 num_fields, elt_type))
5649 *p_complete = false;
5650
5651 *p_nz_elts += nz_elts;
5652 *p_init_elts += init_elts;
5653
5654 return const_p;
5655 }
5656
5657 /* Examine CTOR to discover:
5658 * how many scalar fields are set to nonzero values,
5659 and place it in *P_NZ_ELTS;
5660 * how many scalar fields in total are in CTOR,
5661 and place it in *P_ELT_COUNT.
5662 * whether the constructor is complete -- in the sense that every
5663 meaningful byte is explicitly given a value --
5664 and place it in *P_COMPLETE.
5665
5666 Return whether or not CTOR is a valid static constant initializer, the same
5667 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5668
5669 bool
5670 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5671 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5672 {
5673 *p_nz_elts = 0;
5674 *p_init_elts = 0;
5675 *p_complete = true;
5676
5677 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_init_elts, p_complete);
5678 }
5679
5680 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5681 of which had type LAST_TYPE. Each element was itself a complete
5682 initializer, in the sense that every meaningful byte was explicitly
5683 given a value. Return true if the same is true for the constructor
5684 as a whole. */
5685
5686 bool
5687 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
5688 const_tree last_type)
5689 {
5690 if (TREE_CODE (type) == UNION_TYPE
5691 || TREE_CODE (type) == QUAL_UNION_TYPE)
5692 {
5693 if (num_elts == 0)
5694 return false;
5695
5696 gcc_assert (num_elts == 1 && last_type);
5697
5698 /* ??? We could look at each element of the union, and find the
5699 largest element. Which would avoid comparing the size of the
5700 initialized element against any tail padding in the union.
5701 Doesn't seem worth the effort... */
5702 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
5703 }
5704
5705 return count_type_elements (type, true) == num_elts;
5706 }
5707
5708 /* Return 1 if EXP contains mostly (3/4) zeros. */
5709
5710 static int
5711 mostly_zeros_p (const_tree exp)
5712 {
5713 if (TREE_CODE (exp) == CONSTRUCTOR)
5714 {
5715 HOST_WIDE_INT nz_elts, init_elts;
5716 bool complete_p;
5717
5718 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5719 return !complete_p || nz_elts < init_elts / 4;
5720 }
5721
5722 return initializer_zerop (exp);
5723 }
5724
5725 /* Return 1 if EXP contains all zeros. */
5726
5727 static int
5728 all_zeros_p (const_tree exp)
5729 {
5730 if (TREE_CODE (exp) == CONSTRUCTOR)
5731 {
5732 HOST_WIDE_INT nz_elts, init_elts;
5733 bool complete_p;
5734
5735 categorize_ctor_elements (exp, &nz_elts, &init_elts, &complete_p);
5736 return nz_elts == 0;
5737 }
5738
5739 return initializer_zerop (exp);
5740 }
5741 \f
5742 /* Helper function for store_constructor.
5743 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5744 CLEARED is as for store_constructor.
5745 ALIAS_SET is the alias set to use for any stores.
5746
5747 This provides a recursive shortcut back to store_constructor when it isn't
5748 necessary to go through store_field. This is so that we can pass through
5749 the cleared field to let store_constructor know that we may not have to
5750 clear a substructure if the outer structure has already been cleared. */
5751
5752 static void
5753 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
5754 HOST_WIDE_INT bitpos, enum machine_mode mode,
5755 tree exp, int cleared, alias_set_type alias_set)
5756 {
5757 if (TREE_CODE (exp) == CONSTRUCTOR
5758 /* We can only call store_constructor recursively if the size and
5759 bit position are on a byte boundary. */
5760 && bitpos % BITS_PER_UNIT == 0
5761 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
5762 /* If we have a nonzero bitpos for a register target, then we just
5763 let store_field do the bitfield handling. This is unlikely to
5764 generate unnecessary clear instructions anyways. */
5765 && (bitpos == 0 || MEM_P (target)))
5766 {
5767 if (MEM_P (target))
5768 target
5769 = adjust_address (target,
5770 GET_MODE (target) == BLKmode
5771 || 0 != (bitpos
5772 % GET_MODE_ALIGNMENT (GET_MODE (target)))
5773 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
5774
5775
5776 /* Update the alias set, if required. */
5777 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
5778 && MEM_ALIAS_SET (target) != 0)
5779 {
5780 target = copy_rtx (target);
5781 set_mem_alias_set (target, alias_set);
5782 }
5783
5784 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
5785 }
5786 else
5787 store_field (target, bitsize, bitpos, 0, 0, mode, exp, alias_set, false);
5788 }
5789
5790 /* Store the value of constructor EXP into the rtx TARGET.
5791 TARGET is either a REG or a MEM; we know it cannot conflict, since
5792 safe_from_p has been called.
5793 CLEARED is true if TARGET is known to have been zero'd.
5794 SIZE is the number of bytes of TARGET we are allowed to modify: this
5795 may not be the same as the size of EXP if we are assigning to a field
5796 which has been packed to exclude padding bits. */
5797
5798 static void
5799 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
5800 {
5801 tree type = TREE_TYPE (exp);
5802 #ifdef WORD_REGISTER_OPERATIONS
5803 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
5804 #endif
5805
5806 switch (TREE_CODE (type))
5807 {
5808 case RECORD_TYPE:
5809 case UNION_TYPE:
5810 case QUAL_UNION_TYPE:
5811 {
5812 unsigned HOST_WIDE_INT idx;
5813 tree field, value;
5814
5815 /* If size is zero or the target is already cleared, do nothing. */
5816 if (size == 0 || cleared)
5817 cleared = 1;
5818 /* We either clear the aggregate or indicate the value is dead. */
5819 else if ((TREE_CODE (type) == UNION_TYPE
5820 || TREE_CODE (type) == QUAL_UNION_TYPE)
5821 && ! CONSTRUCTOR_ELTS (exp))
5822 /* If the constructor is empty, clear the union. */
5823 {
5824 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
5825 cleared = 1;
5826 }
5827
5828 /* If we are building a static constructor into a register,
5829 set the initial value as zero so we can fold the value into
5830 a constant. But if more than one register is involved,
5831 this probably loses. */
5832 else if (REG_P (target) && TREE_STATIC (exp)
5833 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
5834 {
5835 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5836 cleared = 1;
5837 }
5838
5839 /* If the constructor has fewer fields than the structure or
5840 if we are initializing the structure to mostly zeros, clear
5841 the whole structure first. Don't do this if TARGET is a
5842 register whose mode size isn't equal to SIZE since
5843 clear_storage can't handle this case. */
5844 else if (size > 0
5845 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp))
5846 != fields_length (type))
5847 || mostly_zeros_p (exp))
5848 && (!REG_P (target)
5849 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
5850 == size)))
5851 {
5852 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
5853 cleared = 1;
5854 }
5855
5856 if (REG_P (target) && !cleared)
5857 emit_clobber (target);
5858
5859 /* Store each element of the constructor into the
5860 corresponding field of TARGET. */
5861 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
5862 {
5863 enum machine_mode mode;
5864 HOST_WIDE_INT bitsize;
5865 HOST_WIDE_INT bitpos = 0;
5866 tree offset;
5867 rtx to_rtx = target;
5868
5869 /* Just ignore missing fields. We cleared the whole
5870 structure, above, if any fields are missing. */
5871 if (field == 0)
5872 continue;
5873
5874 if (cleared && initializer_zerop (value))
5875 continue;
5876
5877 if (host_integerp (DECL_SIZE (field), 1))
5878 bitsize = tree_low_cst (DECL_SIZE (field), 1);
5879 else
5880 bitsize = -1;
5881
5882 mode = DECL_MODE (field);
5883 if (DECL_BIT_FIELD (field))
5884 mode = VOIDmode;
5885
5886 offset = DECL_FIELD_OFFSET (field);
5887 if (host_integerp (offset, 0)
5888 && host_integerp (bit_position (field), 0))
5889 {
5890 bitpos = int_bit_position (field);
5891 offset = 0;
5892 }
5893 else
5894 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
5895
5896 if (offset)
5897 {
5898 enum machine_mode address_mode;
5899 rtx offset_rtx;
5900
5901 offset
5902 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
5903 make_tree (TREE_TYPE (exp),
5904 target));
5905
5906 offset_rtx = expand_normal (offset);
5907 gcc_assert (MEM_P (to_rtx));
5908
5909 address_mode = get_address_mode (to_rtx);
5910 if (GET_MODE (offset_rtx) != address_mode)
5911 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5912
5913 to_rtx = offset_address (to_rtx, offset_rtx,
5914 highest_pow2_factor (offset));
5915 }
5916
5917 #ifdef WORD_REGISTER_OPERATIONS
5918 /* If this initializes a field that is smaller than a
5919 word, at the start of a word, try to widen it to a full
5920 word. This special case allows us to output C++ member
5921 function initializations in a form that the optimizers
5922 can understand. */
5923 if (REG_P (target)
5924 && bitsize < BITS_PER_WORD
5925 && bitpos % BITS_PER_WORD == 0
5926 && GET_MODE_CLASS (mode) == MODE_INT
5927 && TREE_CODE (value) == INTEGER_CST
5928 && exp_size >= 0
5929 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
5930 {
5931 tree type = TREE_TYPE (value);
5932
5933 if (TYPE_PRECISION (type) < BITS_PER_WORD)
5934 {
5935 type = lang_hooks.types.type_for_mode
5936 (word_mode, TYPE_UNSIGNED (type));
5937 value = fold_convert (type, value);
5938 }
5939
5940 if (BYTES_BIG_ENDIAN)
5941 value
5942 = fold_build2 (LSHIFT_EXPR, type, value,
5943 build_int_cst (type,
5944 BITS_PER_WORD - bitsize));
5945 bitsize = BITS_PER_WORD;
5946 mode = word_mode;
5947 }
5948 #endif
5949
5950 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
5951 && DECL_NONADDRESSABLE_P (field))
5952 {
5953 to_rtx = copy_rtx (to_rtx);
5954 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
5955 }
5956
5957 store_constructor_field (to_rtx, bitsize, bitpos, mode,
5958 value, cleared,
5959 get_alias_set (TREE_TYPE (field)));
5960 }
5961 break;
5962 }
5963 case ARRAY_TYPE:
5964 {
5965 tree value, index;
5966 unsigned HOST_WIDE_INT i;
5967 int need_to_clear;
5968 tree domain;
5969 tree elttype = TREE_TYPE (type);
5970 int const_bounds_p;
5971 HOST_WIDE_INT minelt = 0;
5972 HOST_WIDE_INT maxelt = 0;
5973
5974 domain = TYPE_DOMAIN (type);
5975 const_bounds_p = (TYPE_MIN_VALUE (domain)
5976 && TYPE_MAX_VALUE (domain)
5977 && host_integerp (TYPE_MIN_VALUE (domain), 0)
5978 && host_integerp (TYPE_MAX_VALUE (domain), 0));
5979
5980 /* If we have constant bounds for the range of the type, get them. */
5981 if (const_bounds_p)
5982 {
5983 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
5984 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
5985 }
5986
5987 /* If the constructor has fewer elements than the array, clear
5988 the whole array first. Similarly if this is static
5989 constructor of a non-BLKmode object. */
5990 if (cleared)
5991 need_to_clear = 0;
5992 else if (REG_P (target) && TREE_STATIC (exp))
5993 need_to_clear = 1;
5994 else
5995 {
5996 unsigned HOST_WIDE_INT idx;
5997 tree index, value;
5998 HOST_WIDE_INT count = 0, zero_count = 0;
5999 need_to_clear = ! const_bounds_p;
6000
6001 /* This loop is a more accurate version of the loop in
6002 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6003 is also needed to check for missing elements. */
6004 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6005 {
6006 HOST_WIDE_INT this_node_count;
6007
6008 if (need_to_clear)
6009 break;
6010
6011 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6012 {
6013 tree lo_index = TREE_OPERAND (index, 0);
6014 tree hi_index = TREE_OPERAND (index, 1);
6015
6016 if (! host_integerp (lo_index, 1)
6017 || ! host_integerp (hi_index, 1))
6018 {
6019 need_to_clear = 1;
6020 break;
6021 }
6022
6023 this_node_count = (tree_low_cst (hi_index, 1)
6024 - tree_low_cst (lo_index, 1) + 1);
6025 }
6026 else
6027 this_node_count = 1;
6028
6029 count += this_node_count;
6030 if (mostly_zeros_p (value))
6031 zero_count += this_node_count;
6032 }
6033
6034 /* Clear the entire array first if there are any missing
6035 elements, or if the incidence of zero elements is >=
6036 75%. */
6037 if (! need_to_clear
6038 && (count < maxelt - minelt + 1
6039 || 4 * zero_count >= 3 * count))
6040 need_to_clear = 1;
6041 }
6042
6043 if (need_to_clear && size > 0)
6044 {
6045 if (REG_P (target))
6046 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6047 else
6048 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6049 cleared = 1;
6050 }
6051
6052 if (!cleared && REG_P (target))
6053 /* Inform later passes that the old value is dead. */
6054 emit_clobber (target);
6055
6056 /* Store each element of the constructor into the
6057 corresponding element of TARGET, determined by counting the
6058 elements. */
6059 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6060 {
6061 enum machine_mode mode;
6062 HOST_WIDE_INT bitsize;
6063 HOST_WIDE_INT bitpos;
6064 rtx xtarget = target;
6065
6066 if (cleared && initializer_zerop (value))
6067 continue;
6068
6069 mode = TYPE_MODE (elttype);
6070 if (mode == BLKmode)
6071 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
6072 ? tree_low_cst (TYPE_SIZE (elttype), 1)
6073 : -1);
6074 else
6075 bitsize = GET_MODE_BITSIZE (mode);
6076
6077 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6078 {
6079 tree lo_index = TREE_OPERAND (index, 0);
6080 tree hi_index = TREE_OPERAND (index, 1);
6081 rtx index_r, pos_rtx;
6082 HOST_WIDE_INT lo, hi, count;
6083 tree position;
6084
6085 /* If the range is constant and "small", unroll the loop. */
6086 if (const_bounds_p
6087 && host_integerp (lo_index, 0)
6088 && host_integerp (hi_index, 0)
6089 && (lo = tree_low_cst (lo_index, 0),
6090 hi = tree_low_cst (hi_index, 0),
6091 count = hi - lo + 1,
6092 (!MEM_P (target)
6093 || count <= 2
6094 || (host_integerp (TYPE_SIZE (elttype), 1)
6095 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
6096 <= 40 * 8)))))
6097 {
6098 lo -= minelt; hi -= minelt;
6099 for (; lo <= hi; lo++)
6100 {
6101 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
6102
6103 if (MEM_P (target)
6104 && !MEM_KEEP_ALIAS_SET_P (target)
6105 && TREE_CODE (type) == ARRAY_TYPE
6106 && TYPE_NONALIASED_COMPONENT (type))
6107 {
6108 target = copy_rtx (target);
6109 MEM_KEEP_ALIAS_SET_P (target) = 1;
6110 }
6111
6112 store_constructor_field
6113 (target, bitsize, bitpos, mode, value, cleared,
6114 get_alias_set (elttype));
6115 }
6116 }
6117 else
6118 {
6119 rtx loop_start = gen_label_rtx ();
6120 rtx loop_end = gen_label_rtx ();
6121 tree exit_cond;
6122
6123 expand_normal (hi_index);
6124
6125 index = build_decl (EXPR_LOCATION (exp),
6126 VAR_DECL, NULL_TREE, domain);
6127 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6128 SET_DECL_RTL (index, index_r);
6129 store_expr (lo_index, index_r, 0, false);
6130
6131 /* Build the head of the loop. */
6132 do_pending_stack_adjust ();
6133 emit_label (loop_start);
6134
6135 /* Assign value to element index. */
6136 position =
6137 fold_convert (ssizetype,
6138 fold_build2 (MINUS_EXPR,
6139 TREE_TYPE (index),
6140 index,
6141 TYPE_MIN_VALUE (domain)));
6142
6143 position =
6144 size_binop (MULT_EXPR, position,
6145 fold_convert (ssizetype,
6146 TYPE_SIZE_UNIT (elttype)));
6147
6148 pos_rtx = expand_normal (position);
6149 xtarget = offset_address (target, pos_rtx,
6150 highest_pow2_factor (position));
6151 xtarget = adjust_address (xtarget, mode, 0);
6152 if (TREE_CODE (value) == CONSTRUCTOR)
6153 store_constructor (value, xtarget, cleared,
6154 bitsize / BITS_PER_UNIT);
6155 else
6156 store_expr (value, xtarget, 0, false);
6157
6158 /* Generate a conditional jump to exit the loop. */
6159 exit_cond = build2 (LT_EXPR, integer_type_node,
6160 index, hi_index);
6161 jumpif (exit_cond, loop_end, -1);
6162
6163 /* Update the loop counter, and jump to the head of
6164 the loop. */
6165 expand_assignment (index,
6166 build2 (PLUS_EXPR, TREE_TYPE (index),
6167 index, integer_one_node),
6168 false);
6169
6170 emit_jump (loop_start);
6171
6172 /* Build the end of the loop. */
6173 emit_label (loop_end);
6174 }
6175 }
6176 else if ((index != 0 && ! host_integerp (index, 0))
6177 || ! host_integerp (TYPE_SIZE (elttype), 1))
6178 {
6179 tree position;
6180
6181 if (index == 0)
6182 index = ssize_int (1);
6183
6184 if (minelt)
6185 index = fold_convert (ssizetype,
6186 fold_build2 (MINUS_EXPR,
6187 TREE_TYPE (index),
6188 index,
6189 TYPE_MIN_VALUE (domain)));
6190
6191 position =
6192 size_binop (MULT_EXPR, index,
6193 fold_convert (ssizetype,
6194 TYPE_SIZE_UNIT (elttype)));
6195 xtarget = offset_address (target,
6196 expand_normal (position),
6197 highest_pow2_factor (position));
6198 xtarget = adjust_address (xtarget, mode, 0);
6199 store_expr (value, xtarget, 0, false);
6200 }
6201 else
6202 {
6203 if (index != 0)
6204 bitpos = ((tree_low_cst (index, 0) - minelt)
6205 * tree_low_cst (TYPE_SIZE (elttype), 1));
6206 else
6207 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
6208
6209 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6210 && TREE_CODE (type) == ARRAY_TYPE
6211 && TYPE_NONALIASED_COMPONENT (type))
6212 {
6213 target = copy_rtx (target);
6214 MEM_KEEP_ALIAS_SET_P (target) = 1;
6215 }
6216 store_constructor_field (target, bitsize, bitpos, mode, value,
6217 cleared, get_alias_set (elttype));
6218 }
6219 }
6220 break;
6221 }
6222
6223 case VECTOR_TYPE:
6224 {
6225 unsigned HOST_WIDE_INT idx;
6226 constructor_elt *ce;
6227 int i;
6228 int need_to_clear;
6229 int icode = CODE_FOR_nothing;
6230 tree elttype = TREE_TYPE (type);
6231 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
6232 enum machine_mode eltmode = TYPE_MODE (elttype);
6233 HOST_WIDE_INT bitsize;
6234 HOST_WIDE_INT bitpos;
6235 rtvec vector = NULL;
6236 unsigned n_elts;
6237 alias_set_type alias;
6238
6239 gcc_assert (eltmode != BLKmode);
6240
6241 n_elts = TYPE_VECTOR_SUBPARTS (type);
6242 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
6243 {
6244 enum machine_mode mode = GET_MODE (target);
6245
6246 icode = (int) optab_handler (vec_init_optab, mode);
6247 if (icode != CODE_FOR_nothing)
6248 {
6249 unsigned int i;
6250
6251 vector = rtvec_alloc (n_elts);
6252 for (i = 0; i < n_elts; i++)
6253 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
6254 }
6255 }
6256
6257 /* If the constructor has fewer elements than the vector,
6258 clear the whole array first. Similarly if this is static
6259 constructor of a non-BLKmode object. */
6260 if (cleared)
6261 need_to_clear = 0;
6262 else if (REG_P (target) && TREE_STATIC (exp))
6263 need_to_clear = 1;
6264 else
6265 {
6266 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6267 tree value;
6268
6269 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6270 {
6271 int n_elts_here = tree_low_cst
6272 (int_const_binop (TRUNC_DIV_EXPR,
6273 TYPE_SIZE (TREE_TYPE (value)),
6274 TYPE_SIZE (elttype)), 1);
6275
6276 count += n_elts_here;
6277 if (mostly_zeros_p (value))
6278 zero_count += n_elts_here;
6279 }
6280
6281 /* Clear the entire vector first if there are any missing elements,
6282 or if the incidence of zero elements is >= 75%. */
6283 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
6284 }
6285
6286 if (need_to_clear && size > 0 && !vector)
6287 {
6288 if (REG_P (target))
6289 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6290 else
6291 clear_storage (target, GEN_INT (size), BLOCK_OP_NORMAL);
6292 cleared = 1;
6293 }
6294
6295 /* Inform later passes that the old value is dead. */
6296 if (!cleared && !vector && REG_P (target))
6297 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6298
6299 if (MEM_P (target))
6300 alias = MEM_ALIAS_SET (target);
6301 else
6302 alias = get_alias_set (elttype);
6303
6304 /* Store each element of the constructor into the corresponding
6305 element of TARGET, determined by counting the elements. */
6306 for (idx = 0, i = 0;
6307 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6308 idx++, i += bitsize / elt_size)
6309 {
6310 HOST_WIDE_INT eltpos;
6311 tree value = ce->value;
6312
6313 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
6314 if (cleared && initializer_zerop (value))
6315 continue;
6316
6317 if (ce->index)
6318 eltpos = tree_low_cst (ce->index, 1);
6319 else
6320 eltpos = i;
6321
6322 if (vector)
6323 {
6324 /* Vector CONSTRUCTORs should only be built from smaller
6325 vectors in the case of BLKmode vectors. */
6326 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6327 RTVEC_ELT (vector, eltpos)
6328 = expand_normal (value);
6329 }
6330 else
6331 {
6332 enum machine_mode value_mode =
6333 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6334 ? TYPE_MODE (TREE_TYPE (value))
6335 : eltmode;
6336 bitpos = eltpos * elt_size;
6337 store_constructor_field (target, bitsize, bitpos, value_mode,
6338 value, cleared, alias);
6339 }
6340 }
6341
6342 if (vector)
6343 emit_insn (GEN_FCN (icode)
6344 (target,
6345 gen_rtx_PARALLEL (GET_MODE (target), vector)));
6346 break;
6347 }
6348
6349 default:
6350 gcc_unreachable ();
6351 }
6352 }
6353
6354 /* Store the value of EXP (an expression tree)
6355 into a subfield of TARGET which has mode MODE and occupies
6356 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6357 If MODE is VOIDmode, it means that we are storing into a bit-field.
6358
6359 BITREGION_START is bitpos of the first bitfield in this region.
6360 BITREGION_END is the bitpos of the ending bitfield in this region.
6361 These two fields are 0, if the C++ memory model does not apply,
6362 or we are not interested in keeping track of bitfield regions.
6363
6364 Always return const0_rtx unless we have something particular to
6365 return.
6366
6367 ALIAS_SET is the alias set for the destination. This value will
6368 (in general) be different from that for TARGET, since TARGET is a
6369 reference to the containing structure.
6370
6371 If NONTEMPORAL is true, try generating a nontemporal store. */
6372
6373 static rtx
6374 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
6375 unsigned HOST_WIDE_INT bitregion_start,
6376 unsigned HOST_WIDE_INT bitregion_end,
6377 enum machine_mode mode, tree exp,
6378 alias_set_type alias_set, bool nontemporal)
6379 {
6380 if (TREE_CODE (exp) == ERROR_MARK)
6381 return const0_rtx;
6382
6383 /* If we have nothing to store, do nothing unless the expression has
6384 side-effects. */
6385 if (bitsize == 0)
6386 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6387
6388 if (GET_CODE (target) == CONCAT)
6389 {
6390 /* We're storing into a struct containing a single __complex. */
6391
6392 gcc_assert (!bitpos);
6393 return store_expr (exp, target, 0, nontemporal);
6394 }
6395
6396 /* If the structure is in a register or if the component
6397 is a bit field, we cannot use addressing to access it.
6398 Use bit-field techniques or SUBREG to store in it. */
6399
6400 if (mode == VOIDmode
6401 || (mode != BLKmode && ! direct_store[(int) mode]
6402 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6403 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6404 || REG_P (target)
6405 || GET_CODE (target) == SUBREG
6406 /* If the field isn't aligned enough to store as an ordinary memref,
6407 store it as a bit field. */
6408 || (mode != BLKmode
6409 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6410 || bitpos % GET_MODE_ALIGNMENT (mode))
6411 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
6412 || (bitpos % BITS_PER_UNIT != 0)))
6413 || (bitsize >= 0 && mode != BLKmode
6414 && GET_MODE_BITSIZE (mode) > bitsize)
6415 /* If the RHS and field are a constant size and the size of the
6416 RHS isn't the same size as the bitfield, we must use bitfield
6417 operations. */
6418 || (bitsize >= 0
6419 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
6420 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0)
6421 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6422 decl we must use bitfield operations. */
6423 || (bitsize >= 0
6424 && TREE_CODE (exp) == MEM_REF
6425 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
6426 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
6427 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0),0 ))
6428 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
6429 {
6430 rtx temp;
6431 gimple nop_def;
6432
6433 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6434 implies a mask operation. If the precision is the same size as
6435 the field we're storing into, that mask is redundant. This is
6436 particularly common with bit field assignments generated by the
6437 C front end. */
6438 nop_def = get_def_for_expr (exp, NOP_EXPR);
6439 if (nop_def)
6440 {
6441 tree type = TREE_TYPE (exp);
6442 if (INTEGRAL_TYPE_P (type)
6443 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
6444 && bitsize == TYPE_PRECISION (type))
6445 {
6446 tree op = gimple_assign_rhs1 (nop_def);
6447 type = TREE_TYPE (op);
6448 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
6449 exp = op;
6450 }
6451 }
6452
6453 temp = expand_normal (exp);
6454
6455 /* If BITSIZE is narrower than the size of the type of EXP
6456 we will be narrowing TEMP. Normally, what's wanted are the
6457 low-order bits. However, if EXP's type is a record and this is
6458 big-endian machine, we want the upper BITSIZE bits. */
6459 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
6460 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
6461 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
6462 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
6463 GET_MODE_BITSIZE (GET_MODE (temp)) - bitsize,
6464 NULL_RTX, 1);
6465
6466 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6467 if (mode != VOIDmode && mode != BLKmode
6468 && mode != TYPE_MODE (TREE_TYPE (exp)))
6469 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
6470
6471 /* If the modes of TEMP and TARGET are both BLKmode, both
6472 must be in memory and BITPOS must be aligned on a byte
6473 boundary. If so, we simply do a block copy. Likewise
6474 for a BLKmode-like TARGET. */
6475 if (GET_MODE (temp) == BLKmode
6476 && (GET_MODE (target) == BLKmode
6477 || (MEM_P (target)
6478 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
6479 && (bitpos % BITS_PER_UNIT) == 0
6480 && (bitsize % BITS_PER_UNIT) == 0)))
6481 {
6482 gcc_assert (MEM_P (target) && MEM_P (temp)
6483 && (bitpos % BITS_PER_UNIT) == 0);
6484
6485 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
6486 emit_block_move (target, temp,
6487 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
6488 / BITS_PER_UNIT),
6489 BLOCK_OP_NORMAL);
6490
6491 return const0_rtx;
6492 }
6493
6494 /* Handle calls that return values in multiple non-contiguous locations.
6495 The Irix 6 ABI has examples of this. */
6496 if (GET_CODE (temp) == PARALLEL)
6497 {
6498 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6499 rtx temp_target;
6500 if (mode == BLKmode)
6501 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6502 temp_target = gen_reg_rtx (mode);
6503 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
6504 temp = temp_target;
6505 }
6506 else if (mode == BLKmode)
6507 {
6508 /* Handle calls that return BLKmode values in registers. */
6509 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
6510 {
6511 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
6512 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
6513 temp = temp_target;
6514 }
6515 else
6516 {
6517 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
6518 rtx temp_target;
6519 mode = smallest_mode_for_size (size * BITS_PER_UNIT, MODE_INT);
6520 temp_target = gen_reg_rtx (mode);
6521 temp_target
6522 = extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
6523 false, temp_target, mode, mode);
6524 temp = temp_target;
6525 }
6526 }
6527
6528 /* Store the value in the bitfield. */
6529 store_bit_field (target, bitsize, bitpos,
6530 bitregion_start, bitregion_end,
6531 mode, temp);
6532
6533 return const0_rtx;
6534 }
6535 else
6536 {
6537 /* Now build a reference to just the desired component. */
6538 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
6539
6540 if (to_rtx == target)
6541 to_rtx = copy_rtx (to_rtx);
6542
6543 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
6544 set_mem_alias_set (to_rtx, alias_set);
6545
6546 return store_expr (exp, to_rtx, 0, nontemporal);
6547 }
6548 }
6549 \f
6550 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6551 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6552 codes and find the ultimate containing object, which we return.
6553
6554 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6555 bit position, and *PUNSIGNEDP to the signedness of the field.
6556 If the position of the field is variable, we store a tree
6557 giving the variable offset (in units) in *POFFSET.
6558 This offset is in addition to the bit position.
6559 If the position is not variable, we store 0 in *POFFSET.
6560
6561 If any of the extraction expressions is volatile,
6562 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6563
6564 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6565 Otherwise, it is a mode that can be used to access the field.
6566
6567 If the field describes a variable-sized object, *PMODE is set to
6568 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6569 this case, but the address of the object can be found.
6570
6571 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6572 look through nodes that serve as markers of a greater alignment than
6573 the one that can be deduced from the expression. These nodes make it
6574 possible for front-ends to prevent temporaries from being created by
6575 the middle-end on alignment considerations. For that purpose, the
6576 normal operating mode at high-level is to always pass FALSE so that
6577 the ultimate containing object is really returned; moreover, the
6578 associated predicate handled_component_p will always return TRUE
6579 on these nodes, thus indicating that they are essentially handled
6580 by get_inner_reference. TRUE should only be passed when the caller
6581 is scanning the expression in order to build another representation
6582 and specifically knows how to handle these nodes; as such, this is
6583 the normal operating mode in the RTL expanders. */
6584
6585 tree
6586 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
6587 HOST_WIDE_INT *pbitpos, tree *poffset,
6588 enum machine_mode *pmode, int *punsignedp,
6589 int *pvolatilep, bool keep_aligning)
6590 {
6591 tree size_tree = 0;
6592 enum machine_mode mode = VOIDmode;
6593 bool blkmode_bitfield = false;
6594 tree offset = size_zero_node;
6595 double_int bit_offset = double_int_zero;
6596
6597 /* First get the mode, signedness, and size. We do this from just the
6598 outermost expression. */
6599 *pbitsize = -1;
6600 if (TREE_CODE (exp) == COMPONENT_REF)
6601 {
6602 tree field = TREE_OPERAND (exp, 1);
6603 size_tree = DECL_SIZE (field);
6604 if (!DECL_BIT_FIELD (field))
6605 mode = DECL_MODE (field);
6606 else if (DECL_MODE (field) == BLKmode)
6607 blkmode_bitfield = true;
6608 else if (TREE_THIS_VOLATILE (exp)
6609 && flag_strict_volatile_bitfields > 0)
6610 /* Volatile bitfields should be accessed in the mode of the
6611 field's type, not the mode computed based on the bit
6612 size. */
6613 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
6614
6615 *punsignedp = DECL_UNSIGNED (field);
6616 }
6617 else if (TREE_CODE (exp) == BIT_FIELD_REF)
6618 {
6619 size_tree = TREE_OPERAND (exp, 1);
6620 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
6621 || TYPE_UNSIGNED (TREE_TYPE (exp)));
6622
6623 /* For vector types, with the correct size of access, use the mode of
6624 inner type. */
6625 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
6626 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
6627 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
6628 mode = TYPE_MODE (TREE_TYPE (exp));
6629 }
6630 else
6631 {
6632 mode = TYPE_MODE (TREE_TYPE (exp));
6633 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
6634
6635 if (mode == BLKmode)
6636 size_tree = TYPE_SIZE (TREE_TYPE (exp));
6637 else
6638 *pbitsize = GET_MODE_BITSIZE (mode);
6639 }
6640
6641 if (size_tree != 0)
6642 {
6643 if (! host_integerp (size_tree, 1))
6644 mode = BLKmode, *pbitsize = -1;
6645 else
6646 *pbitsize = tree_low_cst (size_tree, 1);
6647 }
6648
6649 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6650 and find the ultimate containing object. */
6651 while (1)
6652 {
6653 switch (TREE_CODE (exp))
6654 {
6655 case BIT_FIELD_REF:
6656 bit_offset += tree_to_double_int (TREE_OPERAND (exp, 2));
6657 break;
6658
6659 case COMPONENT_REF:
6660 {
6661 tree field = TREE_OPERAND (exp, 1);
6662 tree this_offset = component_ref_field_offset (exp);
6663
6664 /* If this field hasn't been filled in yet, don't go past it.
6665 This should only happen when folding expressions made during
6666 type construction. */
6667 if (this_offset == 0)
6668 break;
6669
6670 offset = size_binop (PLUS_EXPR, offset, this_offset);
6671 bit_offset += tree_to_double_int (DECL_FIELD_BIT_OFFSET (field));
6672
6673 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6674 }
6675 break;
6676
6677 case ARRAY_REF:
6678 case ARRAY_RANGE_REF:
6679 {
6680 tree index = TREE_OPERAND (exp, 1);
6681 tree low_bound = array_ref_low_bound (exp);
6682 tree unit_size = array_ref_element_size (exp);
6683
6684 /* We assume all arrays have sizes that are a multiple of a byte.
6685 First subtract the lower bound, if any, in the type of the
6686 index, then convert to sizetype and multiply by the size of
6687 the array element. */
6688 if (! integer_zerop (low_bound))
6689 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
6690 index, low_bound);
6691
6692 offset = size_binop (PLUS_EXPR, offset,
6693 size_binop (MULT_EXPR,
6694 fold_convert (sizetype, index),
6695 unit_size));
6696 }
6697 break;
6698
6699 case REALPART_EXPR:
6700 break;
6701
6702 case IMAGPART_EXPR:
6703 bit_offset += double_int::from_uhwi (*pbitsize);
6704 break;
6705
6706 case VIEW_CONVERT_EXPR:
6707 if (keep_aligning && STRICT_ALIGNMENT
6708 && (TYPE_ALIGN (TREE_TYPE (exp))
6709 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
6710 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
6711 < BIGGEST_ALIGNMENT)
6712 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
6713 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
6714 goto done;
6715 break;
6716
6717 case MEM_REF:
6718 /* Hand back the decl for MEM[&decl, off]. */
6719 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
6720 {
6721 tree off = TREE_OPERAND (exp, 1);
6722 if (!integer_zerop (off))
6723 {
6724 double_int boff, coff = mem_ref_offset (exp);
6725 boff = coff.lshift (BITS_PER_UNIT == 8
6726 ? 3 : exact_log2 (BITS_PER_UNIT));
6727 bit_offset += boff;
6728 }
6729 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6730 }
6731 goto done;
6732
6733 default:
6734 goto done;
6735 }
6736
6737 /* If any reference in the chain is volatile, the effect is volatile. */
6738 if (TREE_THIS_VOLATILE (exp))
6739 *pvolatilep = 1;
6740
6741 exp = TREE_OPERAND (exp, 0);
6742 }
6743 done:
6744
6745 /* If OFFSET is constant, see if we can return the whole thing as a
6746 constant bit position. Make sure to handle overflow during
6747 this conversion. */
6748 if (TREE_CODE (offset) == INTEGER_CST)
6749 {
6750 double_int tem = tree_to_double_int (offset);
6751 tem = tem.sext (TYPE_PRECISION (sizetype));
6752 tem = tem.lshift (BITS_PER_UNIT == 8 ? 3 : exact_log2 (BITS_PER_UNIT));
6753 tem += bit_offset;
6754 if (tem.fits_shwi ())
6755 {
6756 *pbitpos = tem.to_shwi ();
6757 *poffset = offset = NULL_TREE;
6758 }
6759 }
6760
6761 /* Otherwise, split it up. */
6762 if (offset)
6763 {
6764 /* Avoid returning a negative bitpos as this may wreak havoc later. */
6765 if (bit_offset.is_negative ())
6766 {
6767 double_int mask
6768 = double_int::mask (BITS_PER_UNIT == 8
6769 ? 3 : exact_log2 (BITS_PER_UNIT));
6770 double_int tem = bit_offset.and_not (mask);
6771 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
6772 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
6773 bit_offset -= tem;
6774 tem = tem.arshift (BITS_PER_UNIT == 8
6775 ? 3 : exact_log2 (BITS_PER_UNIT),
6776 HOST_BITS_PER_DOUBLE_INT);
6777 offset = size_binop (PLUS_EXPR, offset,
6778 double_int_to_tree (sizetype, tem));
6779 }
6780
6781 *pbitpos = bit_offset.to_shwi ();
6782 *poffset = offset;
6783 }
6784
6785 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
6786 if (mode == VOIDmode
6787 && blkmode_bitfield
6788 && (*pbitpos % BITS_PER_UNIT) == 0
6789 && (*pbitsize % BITS_PER_UNIT) == 0)
6790 *pmode = BLKmode;
6791 else
6792 *pmode = mode;
6793
6794 return exp;
6795 }
6796
6797 /* Return a tree of sizetype representing the size, in bytes, of the element
6798 of EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6799
6800 tree
6801 array_ref_element_size (tree exp)
6802 {
6803 tree aligned_size = TREE_OPERAND (exp, 3);
6804 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
6805 location_t loc = EXPR_LOCATION (exp);
6806
6807 /* If a size was specified in the ARRAY_REF, it's the size measured
6808 in alignment units of the element type. So multiply by that value. */
6809 if (aligned_size)
6810 {
6811 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6812 sizetype from another type of the same width and signedness. */
6813 if (TREE_TYPE (aligned_size) != sizetype)
6814 aligned_size = fold_convert_loc (loc, sizetype, aligned_size);
6815 return size_binop_loc (loc, MULT_EXPR, aligned_size,
6816 size_int (TYPE_ALIGN_UNIT (elmt_type)));
6817 }
6818
6819 /* Otherwise, take the size from that of the element type. Substitute
6820 any PLACEHOLDER_EXPR that we have. */
6821 else
6822 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
6823 }
6824
6825 /* Return a tree representing the lower bound of the array mentioned in
6826 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6827
6828 tree
6829 array_ref_low_bound (tree exp)
6830 {
6831 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6832
6833 /* If a lower bound is specified in EXP, use it. */
6834 if (TREE_OPERAND (exp, 2))
6835 return TREE_OPERAND (exp, 2);
6836
6837 /* Otherwise, if there is a domain type and it has a lower bound, use it,
6838 substituting for a PLACEHOLDER_EXPR as needed. */
6839 if (domain_type && TYPE_MIN_VALUE (domain_type))
6840 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
6841
6842 /* Otherwise, return a zero of the appropriate type. */
6843 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
6844 }
6845
6846 /* Returns true if REF is an array reference to an array at the end of
6847 a structure. If this is the case, the array may be allocated larger
6848 than its upper bound implies. */
6849
6850 bool
6851 array_at_struct_end_p (tree ref)
6852 {
6853 if (TREE_CODE (ref) != ARRAY_REF
6854 && TREE_CODE (ref) != ARRAY_RANGE_REF)
6855 return false;
6856
6857 while (handled_component_p (ref))
6858 {
6859 /* If the reference chain contains a component reference to a
6860 non-union type and there follows another field the reference
6861 is not at the end of a structure. */
6862 if (TREE_CODE (ref) == COMPONENT_REF
6863 && TREE_CODE (TREE_TYPE (TREE_OPERAND (ref, 0))) == RECORD_TYPE)
6864 {
6865 tree nextf = DECL_CHAIN (TREE_OPERAND (ref, 1));
6866 while (nextf && TREE_CODE (nextf) != FIELD_DECL)
6867 nextf = DECL_CHAIN (nextf);
6868 if (nextf)
6869 return false;
6870 }
6871
6872 ref = TREE_OPERAND (ref, 0);
6873 }
6874
6875 /* If the reference is based on a declared entity, the size of the array
6876 is constrained by its given domain. */
6877 if (DECL_P (ref))
6878 return false;
6879
6880 return true;
6881 }
6882
6883 /* Return a tree representing the upper bound of the array mentioned in
6884 EXP, an ARRAY_REF or an ARRAY_RANGE_REF. */
6885
6886 tree
6887 array_ref_up_bound (tree exp)
6888 {
6889 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
6890
6891 /* If there is a domain type and it has an upper bound, use it, substituting
6892 for a PLACEHOLDER_EXPR as needed. */
6893 if (domain_type && TYPE_MAX_VALUE (domain_type))
6894 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
6895
6896 /* Otherwise fail. */
6897 return NULL_TREE;
6898 }
6899
6900 /* Return a tree representing the offset, in bytes, of the field referenced
6901 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
6902
6903 tree
6904 component_ref_field_offset (tree exp)
6905 {
6906 tree aligned_offset = TREE_OPERAND (exp, 2);
6907 tree field = TREE_OPERAND (exp, 1);
6908 location_t loc = EXPR_LOCATION (exp);
6909
6910 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
6911 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
6912 value. */
6913 if (aligned_offset)
6914 {
6915 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
6916 sizetype from another type of the same width and signedness. */
6917 if (TREE_TYPE (aligned_offset) != sizetype)
6918 aligned_offset = fold_convert_loc (loc, sizetype, aligned_offset);
6919 return size_binop_loc (loc, MULT_EXPR, aligned_offset,
6920 size_int (DECL_OFFSET_ALIGN (field)
6921 / BITS_PER_UNIT));
6922 }
6923
6924 /* Otherwise, take the offset from that of the field. Substitute
6925 any PLACEHOLDER_EXPR that we have. */
6926 else
6927 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
6928 }
6929
6930 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
6931
6932 static unsigned HOST_WIDE_INT
6933 target_align (const_tree target)
6934 {
6935 /* We might have a chain of nested references with intermediate misaligning
6936 bitfields components, so need to recurse to find out. */
6937
6938 unsigned HOST_WIDE_INT this_align, outer_align;
6939
6940 switch (TREE_CODE (target))
6941 {
6942 case BIT_FIELD_REF:
6943 return 1;
6944
6945 case COMPONENT_REF:
6946 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
6947 outer_align = target_align (TREE_OPERAND (target, 0));
6948 return MIN (this_align, outer_align);
6949
6950 case ARRAY_REF:
6951 case ARRAY_RANGE_REF:
6952 this_align = TYPE_ALIGN (TREE_TYPE (target));
6953 outer_align = target_align (TREE_OPERAND (target, 0));
6954 return MIN (this_align, outer_align);
6955
6956 CASE_CONVERT:
6957 case NON_LVALUE_EXPR:
6958 case VIEW_CONVERT_EXPR:
6959 this_align = TYPE_ALIGN (TREE_TYPE (target));
6960 outer_align = target_align (TREE_OPERAND (target, 0));
6961 return MAX (this_align, outer_align);
6962
6963 default:
6964 return TYPE_ALIGN (TREE_TYPE (target));
6965 }
6966 }
6967
6968 \f
6969 /* Given an rtx VALUE that may contain additions and multiplications, return
6970 an equivalent value that just refers to a register, memory, or constant.
6971 This is done by generating instructions to perform the arithmetic and
6972 returning a pseudo-register containing the value.
6973
6974 The returned value may be a REG, SUBREG, MEM or constant. */
6975
6976 rtx
6977 force_operand (rtx value, rtx target)
6978 {
6979 rtx op1, op2;
6980 /* Use subtarget as the target for operand 0 of a binary operation. */
6981 rtx subtarget = get_subtarget (target);
6982 enum rtx_code code = GET_CODE (value);
6983
6984 /* Check for subreg applied to an expression produced by loop optimizer. */
6985 if (code == SUBREG
6986 && !REG_P (SUBREG_REG (value))
6987 && !MEM_P (SUBREG_REG (value)))
6988 {
6989 value
6990 = simplify_gen_subreg (GET_MODE (value),
6991 force_reg (GET_MODE (SUBREG_REG (value)),
6992 force_operand (SUBREG_REG (value),
6993 NULL_RTX)),
6994 GET_MODE (SUBREG_REG (value)),
6995 SUBREG_BYTE (value));
6996 code = GET_CODE (value);
6997 }
6998
6999 /* Check for a PIC address load. */
7000 if ((code == PLUS || code == MINUS)
7001 && XEXP (value, 0) == pic_offset_table_rtx
7002 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7003 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7004 || GET_CODE (XEXP (value, 1)) == CONST))
7005 {
7006 if (!subtarget)
7007 subtarget = gen_reg_rtx (GET_MODE (value));
7008 emit_move_insn (subtarget, value);
7009 return subtarget;
7010 }
7011
7012 if (ARITHMETIC_P (value))
7013 {
7014 op2 = XEXP (value, 1);
7015 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7016 subtarget = 0;
7017 if (code == MINUS && CONST_INT_P (op2))
7018 {
7019 code = PLUS;
7020 op2 = negate_rtx (GET_MODE (value), op2);
7021 }
7022
7023 /* Check for an addition with OP2 a constant integer and our first
7024 operand a PLUS of a virtual register and something else. In that
7025 case, we want to emit the sum of the virtual register and the
7026 constant first and then add the other value. This allows virtual
7027 register instantiation to simply modify the constant rather than
7028 creating another one around this addition. */
7029 if (code == PLUS && CONST_INT_P (op2)
7030 && GET_CODE (XEXP (value, 0)) == PLUS
7031 && REG_P (XEXP (XEXP (value, 0), 0))
7032 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7033 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7034 {
7035 rtx temp = expand_simple_binop (GET_MODE (value), code,
7036 XEXP (XEXP (value, 0), 0), op2,
7037 subtarget, 0, OPTAB_LIB_WIDEN);
7038 return expand_simple_binop (GET_MODE (value), code, temp,
7039 force_operand (XEXP (XEXP (value,
7040 0), 1), 0),
7041 target, 0, OPTAB_LIB_WIDEN);
7042 }
7043
7044 op1 = force_operand (XEXP (value, 0), subtarget);
7045 op2 = force_operand (op2, NULL_RTX);
7046 switch (code)
7047 {
7048 case MULT:
7049 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7050 case DIV:
7051 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7052 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7053 target, 1, OPTAB_LIB_WIDEN);
7054 else
7055 return expand_divmod (0,
7056 FLOAT_MODE_P (GET_MODE (value))
7057 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7058 GET_MODE (value), op1, op2, target, 0);
7059 case MOD:
7060 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7061 target, 0);
7062 case UDIV:
7063 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7064 target, 1);
7065 case UMOD:
7066 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7067 target, 1);
7068 case ASHIFTRT:
7069 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7070 target, 0, OPTAB_LIB_WIDEN);
7071 default:
7072 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7073 target, 1, OPTAB_LIB_WIDEN);
7074 }
7075 }
7076 if (UNARY_P (value))
7077 {
7078 if (!target)
7079 target = gen_reg_rtx (GET_MODE (value));
7080 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7081 switch (code)
7082 {
7083 case ZERO_EXTEND:
7084 case SIGN_EXTEND:
7085 case TRUNCATE:
7086 case FLOAT_EXTEND:
7087 case FLOAT_TRUNCATE:
7088 convert_move (target, op1, code == ZERO_EXTEND);
7089 return target;
7090
7091 case FIX:
7092 case UNSIGNED_FIX:
7093 expand_fix (target, op1, code == UNSIGNED_FIX);
7094 return target;
7095
7096 case FLOAT:
7097 case UNSIGNED_FLOAT:
7098 expand_float (target, op1, code == UNSIGNED_FLOAT);
7099 return target;
7100
7101 default:
7102 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7103 }
7104 }
7105
7106 #ifdef INSN_SCHEDULING
7107 /* On machines that have insn scheduling, we want all memory reference to be
7108 explicit, so we need to deal with such paradoxical SUBREGs. */
7109 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7110 value
7111 = simplify_gen_subreg (GET_MODE (value),
7112 force_reg (GET_MODE (SUBREG_REG (value)),
7113 force_operand (SUBREG_REG (value),
7114 NULL_RTX)),
7115 GET_MODE (SUBREG_REG (value)),
7116 SUBREG_BYTE (value));
7117 #endif
7118
7119 return value;
7120 }
7121 \f
7122 /* Subroutine of expand_expr: return nonzero iff there is no way that
7123 EXP can reference X, which is being modified. TOP_P is nonzero if this
7124 call is going to be used to determine whether we need a temporary
7125 for EXP, as opposed to a recursive call to this function.
7126
7127 It is always safe for this routine to return zero since it merely
7128 searches for optimization opportunities. */
7129
7130 int
7131 safe_from_p (const_rtx x, tree exp, int top_p)
7132 {
7133 rtx exp_rtl = 0;
7134 int i, nops;
7135
7136 if (x == 0
7137 /* If EXP has varying size, we MUST use a target since we currently
7138 have no way of allocating temporaries of variable size
7139 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7140 So we assume here that something at a higher level has prevented a
7141 clash. This is somewhat bogus, but the best we can do. Only
7142 do this when X is BLKmode and when we are at the top level. */
7143 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7144 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7145 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7146 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7147 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7148 != INTEGER_CST)
7149 && GET_MODE (x) == BLKmode)
7150 /* If X is in the outgoing argument area, it is always safe. */
7151 || (MEM_P (x)
7152 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7153 || (GET_CODE (XEXP (x, 0)) == PLUS
7154 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7155 return 1;
7156
7157 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7158 find the underlying pseudo. */
7159 if (GET_CODE (x) == SUBREG)
7160 {
7161 x = SUBREG_REG (x);
7162 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7163 return 0;
7164 }
7165
7166 /* Now look at our tree code and possibly recurse. */
7167 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7168 {
7169 case tcc_declaration:
7170 exp_rtl = DECL_RTL_IF_SET (exp);
7171 break;
7172
7173 case tcc_constant:
7174 return 1;
7175
7176 case tcc_exceptional:
7177 if (TREE_CODE (exp) == TREE_LIST)
7178 {
7179 while (1)
7180 {
7181 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7182 return 0;
7183 exp = TREE_CHAIN (exp);
7184 if (!exp)
7185 return 1;
7186 if (TREE_CODE (exp) != TREE_LIST)
7187 return safe_from_p (x, exp, 0);
7188 }
7189 }
7190 else if (TREE_CODE (exp) == CONSTRUCTOR)
7191 {
7192 constructor_elt *ce;
7193 unsigned HOST_WIDE_INT idx;
7194
7195 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7196 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7197 || !safe_from_p (x, ce->value, 0))
7198 return 0;
7199 return 1;
7200 }
7201 else if (TREE_CODE (exp) == ERROR_MARK)
7202 return 1; /* An already-visited SAVE_EXPR? */
7203 else
7204 return 0;
7205
7206 case tcc_statement:
7207 /* The only case we look at here is the DECL_INITIAL inside a
7208 DECL_EXPR. */
7209 return (TREE_CODE (exp) != DECL_EXPR
7210 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7211 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7212 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7213
7214 case tcc_binary:
7215 case tcc_comparison:
7216 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7217 return 0;
7218 /* Fall through. */
7219
7220 case tcc_unary:
7221 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7222
7223 case tcc_expression:
7224 case tcc_reference:
7225 case tcc_vl_exp:
7226 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7227 the expression. If it is set, we conflict iff we are that rtx or
7228 both are in memory. Otherwise, we check all operands of the
7229 expression recursively. */
7230
7231 switch (TREE_CODE (exp))
7232 {
7233 case ADDR_EXPR:
7234 /* If the operand is static or we are static, we can't conflict.
7235 Likewise if we don't conflict with the operand at all. */
7236 if (staticp (TREE_OPERAND (exp, 0))
7237 || TREE_STATIC (exp)
7238 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7239 return 1;
7240
7241 /* Otherwise, the only way this can conflict is if we are taking
7242 the address of a DECL a that address if part of X, which is
7243 very rare. */
7244 exp = TREE_OPERAND (exp, 0);
7245 if (DECL_P (exp))
7246 {
7247 if (!DECL_RTL_SET_P (exp)
7248 || !MEM_P (DECL_RTL (exp)))
7249 return 0;
7250 else
7251 exp_rtl = XEXP (DECL_RTL (exp), 0);
7252 }
7253 break;
7254
7255 case MEM_REF:
7256 if (MEM_P (x)
7257 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7258 get_alias_set (exp)))
7259 return 0;
7260 break;
7261
7262 case CALL_EXPR:
7263 /* Assume that the call will clobber all hard registers and
7264 all of memory. */
7265 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7266 || MEM_P (x))
7267 return 0;
7268 break;
7269
7270 case WITH_CLEANUP_EXPR:
7271 case CLEANUP_POINT_EXPR:
7272 /* Lowered by gimplify.c. */
7273 gcc_unreachable ();
7274
7275 case SAVE_EXPR:
7276 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7277
7278 default:
7279 break;
7280 }
7281
7282 /* If we have an rtx, we do not need to scan our operands. */
7283 if (exp_rtl)
7284 break;
7285
7286 nops = TREE_OPERAND_LENGTH (exp);
7287 for (i = 0; i < nops; i++)
7288 if (TREE_OPERAND (exp, i) != 0
7289 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7290 return 0;
7291
7292 break;
7293
7294 case tcc_type:
7295 /* Should never get a type here. */
7296 gcc_unreachable ();
7297 }
7298
7299 /* If we have an rtl, find any enclosed object. Then see if we conflict
7300 with it. */
7301 if (exp_rtl)
7302 {
7303 if (GET_CODE (exp_rtl) == SUBREG)
7304 {
7305 exp_rtl = SUBREG_REG (exp_rtl);
7306 if (REG_P (exp_rtl)
7307 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7308 return 0;
7309 }
7310
7311 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7312 are memory and they conflict. */
7313 return ! (rtx_equal_p (x, exp_rtl)
7314 || (MEM_P (x) && MEM_P (exp_rtl)
7315 && true_dependence (exp_rtl, VOIDmode, x)));
7316 }
7317
7318 /* If we reach here, it is safe. */
7319 return 1;
7320 }
7321
7322 \f
7323 /* Return the highest power of two that EXP is known to be a multiple of.
7324 This is used in updating alignment of MEMs in array references. */
7325
7326 unsigned HOST_WIDE_INT
7327 highest_pow2_factor (const_tree exp)
7328 {
7329 unsigned HOST_WIDE_INT c0, c1;
7330
7331 switch (TREE_CODE (exp))
7332 {
7333 case INTEGER_CST:
7334 /* We can find the lowest bit that's a one. If the low
7335 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
7336 We need to handle this case since we can find it in a COND_EXPR,
7337 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
7338 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
7339 later ICE. */
7340 if (TREE_OVERFLOW (exp))
7341 return BIGGEST_ALIGNMENT;
7342 else
7343 {
7344 /* Note: tree_low_cst is intentionally not used here,
7345 we don't care about the upper bits. */
7346 c0 = TREE_INT_CST_LOW (exp);
7347 c0 &= -c0;
7348 return c0 ? c0 : BIGGEST_ALIGNMENT;
7349 }
7350 break;
7351
7352 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
7353 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7354 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7355 return MIN (c0, c1);
7356
7357 case MULT_EXPR:
7358 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7359 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7360 return c0 * c1;
7361
7362 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
7363 case CEIL_DIV_EXPR:
7364 if (integer_pow2p (TREE_OPERAND (exp, 1))
7365 && host_integerp (TREE_OPERAND (exp, 1), 1))
7366 {
7367 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
7368 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
7369 return MAX (1, c0 / c1);
7370 }
7371 break;
7372
7373 case BIT_AND_EXPR:
7374 /* The highest power of two of a bit-and expression is the maximum of
7375 that of its operands. We typically get here for a complex LHS and
7376 a constant negative power of two on the RHS to force an explicit
7377 alignment, so don't bother looking at the LHS. */
7378 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7379
7380 CASE_CONVERT:
7381 case SAVE_EXPR:
7382 return highest_pow2_factor (TREE_OPERAND (exp, 0));
7383
7384 case COMPOUND_EXPR:
7385 return highest_pow2_factor (TREE_OPERAND (exp, 1));
7386
7387 case COND_EXPR:
7388 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
7389 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
7390 return MIN (c0, c1);
7391
7392 default:
7393 break;
7394 }
7395
7396 return 1;
7397 }
7398
7399 /* Similar, except that the alignment requirements of TARGET are
7400 taken into account. Assume it is at least as aligned as its
7401 type, unless it is a COMPONENT_REF in which case the layout of
7402 the structure gives the alignment. */
7403
7404 static unsigned HOST_WIDE_INT
7405 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7406 {
7407 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7408 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7409
7410 return MAX (factor, talign);
7411 }
7412 \f
7413 #ifdef HAVE_conditional_move
7414 /* Convert the tree comparison code TCODE to the rtl one where the
7415 signedness is UNSIGNEDP. */
7416
7417 static enum rtx_code
7418 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7419 {
7420 enum rtx_code code;
7421 switch (tcode)
7422 {
7423 case EQ_EXPR:
7424 code = EQ;
7425 break;
7426 case NE_EXPR:
7427 code = NE;
7428 break;
7429 case LT_EXPR:
7430 code = unsignedp ? LTU : LT;
7431 break;
7432 case LE_EXPR:
7433 code = unsignedp ? LEU : LE;
7434 break;
7435 case GT_EXPR:
7436 code = unsignedp ? GTU : GT;
7437 break;
7438 case GE_EXPR:
7439 code = unsignedp ? GEU : GE;
7440 break;
7441 case UNORDERED_EXPR:
7442 code = UNORDERED;
7443 break;
7444 case ORDERED_EXPR:
7445 code = ORDERED;
7446 break;
7447 case UNLT_EXPR:
7448 code = UNLT;
7449 break;
7450 case UNLE_EXPR:
7451 code = UNLE;
7452 break;
7453 case UNGT_EXPR:
7454 code = UNGT;
7455 break;
7456 case UNGE_EXPR:
7457 code = UNGE;
7458 break;
7459 case UNEQ_EXPR:
7460 code = UNEQ;
7461 break;
7462 case LTGT_EXPR:
7463 code = LTGT;
7464 break;
7465
7466 default:
7467 gcc_unreachable ();
7468 }
7469 return code;
7470 }
7471 #endif
7472
7473 /* Subroutine of expand_expr. Expand the two operands of a binary
7474 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7475 The value may be stored in TARGET if TARGET is nonzero. The
7476 MODIFIER argument is as documented by expand_expr. */
7477
7478 static void
7479 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7480 enum expand_modifier modifier)
7481 {
7482 if (! safe_from_p (target, exp1, 1))
7483 target = 0;
7484 if (operand_equal_p (exp0, exp1, 0))
7485 {
7486 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7487 *op1 = copy_rtx (*op0);
7488 }
7489 else
7490 {
7491 /* If we need to preserve evaluation order, copy exp0 into its own
7492 temporary variable so that it can't be clobbered by exp1. */
7493 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
7494 exp0 = save_expr (exp0);
7495 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7496 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7497 }
7498 }
7499
7500 \f
7501 /* Return a MEM that contains constant EXP. DEFER is as for
7502 output_constant_def and MODIFIER is as for expand_expr. */
7503
7504 static rtx
7505 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7506 {
7507 rtx mem;
7508
7509 mem = output_constant_def (exp, defer);
7510 if (modifier != EXPAND_INITIALIZER)
7511 mem = use_anchored_address (mem);
7512 return mem;
7513 }
7514
7515 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7516 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7517
7518 static rtx
7519 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
7520 enum expand_modifier modifier, addr_space_t as)
7521 {
7522 rtx result, subtarget;
7523 tree inner, offset;
7524 HOST_WIDE_INT bitsize, bitpos;
7525 int volatilep, unsignedp;
7526 enum machine_mode mode1;
7527
7528 /* If we are taking the address of a constant and are at the top level,
7529 we have to use output_constant_def since we can't call force_const_mem
7530 at top level. */
7531 /* ??? This should be considered a front-end bug. We should not be
7532 generating ADDR_EXPR of something that isn't an LVALUE. The only
7533 exception here is STRING_CST. */
7534 if (CONSTANT_CLASS_P (exp))
7535 {
7536 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7537 if (modifier < EXPAND_SUM)
7538 result = force_operand (result, target);
7539 return result;
7540 }
7541
7542 /* Everything must be something allowed by is_gimple_addressable. */
7543 switch (TREE_CODE (exp))
7544 {
7545 case INDIRECT_REF:
7546 /* This case will happen via recursion for &a->b. */
7547 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7548
7549 case MEM_REF:
7550 {
7551 tree tem = TREE_OPERAND (exp, 0);
7552 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7553 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7554 return expand_expr (tem, target, tmode, modifier);
7555 }
7556
7557 case CONST_DECL:
7558 /* Expand the initializer like constants above. */
7559 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7560 0, modifier), 0);
7561 if (modifier < EXPAND_SUM)
7562 result = force_operand (result, target);
7563 return result;
7564
7565 case REALPART_EXPR:
7566 /* The real part of the complex number is always first, therefore
7567 the address is the same as the address of the parent object. */
7568 offset = 0;
7569 bitpos = 0;
7570 inner = TREE_OPERAND (exp, 0);
7571 break;
7572
7573 case IMAGPART_EXPR:
7574 /* The imaginary part of the complex number is always second.
7575 The expression is therefore always offset by the size of the
7576 scalar type. */
7577 offset = 0;
7578 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
7579 inner = TREE_OPERAND (exp, 0);
7580 break;
7581
7582 case COMPOUND_LITERAL_EXPR:
7583 /* Allow COMPOUND_LITERAL_EXPR in initializers, if e.g.
7584 rtl_for_decl_init is called on DECL_INITIAL with
7585 COMPOUNT_LITERAL_EXPRs in it, they aren't gimplified. */
7586 if (modifier == EXPAND_INITIALIZER
7587 && COMPOUND_LITERAL_EXPR_DECL (exp))
7588 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7589 target, tmode, modifier, as);
7590 /* FALLTHRU */
7591 default:
7592 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7593 expand_expr, as that can have various side effects; LABEL_DECLs for
7594 example, may not have their DECL_RTL set yet. Expand the rtl of
7595 CONSTRUCTORs too, which should yield a memory reference for the
7596 constructor's contents. Assume language specific tree nodes can
7597 be expanded in some interesting way. */
7598 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7599 if (DECL_P (exp)
7600 || TREE_CODE (exp) == CONSTRUCTOR
7601 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7602 {
7603 result = expand_expr (exp, target, tmode,
7604 modifier == EXPAND_INITIALIZER
7605 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7606
7607 /* If the DECL isn't in memory, then the DECL wasn't properly
7608 marked TREE_ADDRESSABLE, which will be either a front-end
7609 or a tree optimizer bug. */
7610
7611 if (TREE_ADDRESSABLE (exp)
7612 && ! MEM_P (result)
7613 && ! targetm.calls.allocate_stack_slots_for_args())
7614 {
7615 error ("local frame unavailable (naked function?)");
7616 return result;
7617 }
7618 else
7619 gcc_assert (MEM_P (result));
7620 result = XEXP (result, 0);
7621
7622 /* ??? Is this needed anymore? */
7623 if (DECL_P (exp))
7624 TREE_USED (exp) = 1;
7625
7626 if (modifier != EXPAND_INITIALIZER
7627 && modifier != EXPAND_CONST_ADDRESS
7628 && modifier != EXPAND_SUM)
7629 result = force_operand (result, target);
7630 return result;
7631 }
7632
7633 /* Pass FALSE as the last argument to get_inner_reference although
7634 we are expanding to RTL. The rationale is that we know how to
7635 handle "aligning nodes" here: we can just bypass them because
7636 they won't change the final object whose address will be returned
7637 (they actually exist only for that purpose). */
7638 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7639 &mode1, &unsignedp, &volatilep, false);
7640 break;
7641 }
7642
7643 /* We must have made progress. */
7644 gcc_assert (inner != exp);
7645
7646 subtarget = offset || bitpos ? NULL_RTX : target;
7647 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7648 inner alignment, force the inner to be sufficiently aligned. */
7649 if (CONSTANT_CLASS_P (inner)
7650 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
7651 {
7652 inner = copy_node (inner);
7653 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
7654 TYPE_ALIGN (TREE_TYPE (inner)) = TYPE_ALIGN (TREE_TYPE (exp));
7655 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
7656 }
7657 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
7658
7659 if (offset)
7660 {
7661 rtx tmp;
7662
7663 if (modifier != EXPAND_NORMAL)
7664 result = force_operand (result, NULL);
7665 tmp = expand_expr (offset, NULL_RTX, tmode,
7666 modifier == EXPAND_INITIALIZER
7667 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
7668
7669 result = convert_memory_address_addr_space (tmode, result, as);
7670 tmp = convert_memory_address_addr_space (tmode, tmp, as);
7671
7672 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7673 result = simplify_gen_binary (PLUS, tmode, result, tmp);
7674 else
7675 {
7676 subtarget = bitpos ? NULL_RTX : target;
7677 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
7678 1, OPTAB_LIB_WIDEN);
7679 }
7680 }
7681
7682 if (bitpos)
7683 {
7684 /* Someone beforehand should have rejected taking the address
7685 of such an object. */
7686 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
7687
7688 result = convert_memory_address_addr_space (tmode, result, as);
7689 result = plus_constant (tmode, result, bitpos / BITS_PER_UNIT);
7690 if (modifier < EXPAND_SUM)
7691 result = force_operand (result, target);
7692 }
7693
7694 return result;
7695 }
7696
7697 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7698 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7699
7700 static rtx
7701 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
7702 enum expand_modifier modifier)
7703 {
7704 addr_space_t as = ADDR_SPACE_GENERIC;
7705 enum machine_mode address_mode = Pmode;
7706 enum machine_mode pointer_mode = ptr_mode;
7707 enum machine_mode rmode;
7708 rtx result;
7709
7710 /* Target mode of VOIDmode says "whatever's natural". */
7711 if (tmode == VOIDmode)
7712 tmode = TYPE_MODE (TREE_TYPE (exp));
7713
7714 if (POINTER_TYPE_P (TREE_TYPE (exp)))
7715 {
7716 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
7717 address_mode = targetm.addr_space.address_mode (as);
7718 pointer_mode = targetm.addr_space.pointer_mode (as);
7719 }
7720
7721 /* We can get called with some Weird Things if the user does silliness
7722 like "(short) &a". In that case, convert_memory_address won't do
7723 the right thing, so ignore the given target mode. */
7724 if (tmode != address_mode && tmode != pointer_mode)
7725 tmode = address_mode;
7726
7727 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
7728 tmode, modifier, as);
7729
7730 /* Despite expand_expr claims concerning ignoring TMODE when not
7731 strictly convenient, stuff breaks if we don't honor it. Note
7732 that combined with the above, we only do this for pointer modes. */
7733 rmode = GET_MODE (result);
7734 if (rmode == VOIDmode)
7735 rmode = tmode;
7736 if (rmode != tmode)
7737 result = convert_memory_address_addr_space (tmode, result, as);
7738
7739 return result;
7740 }
7741
7742 /* Generate code for computing CONSTRUCTOR EXP.
7743 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7744 is TRUE, instead of creating a temporary variable in memory
7745 NULL is returned and the caller needs to handle it differently. */
7746
7747 static rtx
7748 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
7749 bool avoid_temp_mem)
7750 {
7751 tree type = TREE_TYPE (exp);
7752 enum machine_mode mode = TYPE_MODE (type);
7753
7754 /* Try to avoid creating a temporary at all. This is possible
7755 if all of the initializer is zero.
7756 FIXME: try to handle all [0..255] initializers we can handle
7757 with memset. */
7758 if (TREE_STATIC (exp)
7759 && !TREE_ADDRESSABLE (exp)
7760 && target != 0 && mode == BLKmode
7761 && all_zeros_p (exp))
7762 {
7763 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
7764 return target;
7765 }
7766
7767 /* All elts simple constants => refer to a constant in memory. But
7768 if this is a non-BLKmode mode, let it store a field at a time
7769 since that should make a CONST_INT or CONST_DOUBLE when we
7770 fold. Likewise, if we have a target we can use, it is best to
7771 store directly into the target unless the type is large enough
7772 that memcpy will be used. If we are making an initializer and
7773 all operands are constant, put it in memory as well.
7774
7775 FIXME: Avoid trying to fill vector constructors piece-meal.
7776 Output them with output_constant_def below unless we're sure
7777 they're zeros. This should go away when vector initializers
7778 are treated like VECTOR_CST instead of arrays. */
7779 if ((TREE_STATIC (exp)
7780 && ((mode == BLKmode
7781 && ! (target != 0 && safe_from_p (target, exp, 1)))
7782 || TREE_ADDRESSABLE (exp)
7783 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
7784 && (! MOVE_BY_PIECES_P
7785 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
7786 TYPE_ALIGN (type)))
7787 && ! mostly_zeros_p (exp))))
7788 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
7789 && TREE_CONSTANT (exp)))
7790 {
7791 rtx constructor;
7792
7793 if (avoid_temp_mem)
7794 return NULL_RTX;
7795
7796 constructor = expand_expr_constant (exp, 1, modifier);
7797
7798 if (modifier != EXPAND_CONST_ADDRESS
7799 && modifier != EXPAND_INITIALIZER
7800 && modifier != EXPAND_SUM)
7801 constructor = validize_mem (constructor);
7802
7803 return constructor;
7804 }
7805
7806 /* Handle calls that pass values in multiple non-contiguous
7807 locations. The Irix 6 ABI has examples of this. */
7808 if (target == 0 || ! safe_from_p (target, exp, 1)
7809 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
7810 {
7811 if (avoid_temp_mem)
7812 return NULL_RTX;
7813
7814 target
7815 = assign_temp (build_qualified_type (type, (TYPE_QUALS (type)
7816 | (TREE_READONLY (exp)
7817 * TYPE_QUAL_CONST))),
7818 TREE_ADDRESSABLE (exp), 1);
7819 }
7820
7821 store_constructor (exp, target, 0, int_expr_size (exp));
7822 return target;
7823 }
7824
7825
7826 /* expand_expr: generate code for computing expression EXP.
7827 An rtx for the computed value is returned. The value is never null.
7828 In the case of a void EXP, const0_rtx is returned.
7829
7830 The value may be stored in TARGET if TARGET is nonzero.
7831 TARGET is just a suggestion; callers must assume that
7832 the rtx returned may not be the same as TARGET.
7833
7834 If TARGET is CONST0_RTX, it means that the value will be ignored.
7835
7836 If TMODE is not VOIDmode, it suggests generating the
7837 result in mode TMODE. But this is done only when convenient.
7838 Otherwise, TMODE is ignored and the value generated in its natural mode.
7839 TMODE is just a suggestion; callers must assume that
7840 the rtx returned may not have mode TMODE.
7841
7842 Note that TARGET may have neither TMODE nor MODE. In that case, it
7843 probably will not be used.
7844
7845 If MODIFIER is EXPAND_SUM then when EXP is an addition
7846 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7847 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7848 products as above, or REG or MEM, or constant.
7849 Ordinarily in such cases we would output mul or add instructions
7850 and then return a pseudo reg containing the sum.
7851
7852 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7853 it also marks a label as absolutely required (it can't be dead).
7854 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7855 This is used for outputting expressions used in initializers.
7856
7857 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7858 with a constant address even if that address is not normally legitimate.
7859 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7860
7861 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7862 a call parameter. Such targets require special care as we haven't yet
7863 marked TARGET so that it's safe from being trashed by libcalls. We
7864 don't want to use TARGET for anything but the final result;
7865 Intermediate values must go elsewhere. Additionally, calls to
7866 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7867
7868 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7869 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7870 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7871 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7872 recursively. */
7873
7874 rtx
7875 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
7876 enum expand_modifier modifier, rtx *alt_rtl)
7877 {
7878 rtx ret;
7879
7880 /* Handle ERROR_MARK before anybody tries to access its type. */
7881 if (TREE_CODE (exp) == ERROR_MARK
7882 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
7883 {
7884 ret = CONST0_RTX (tmode);
7885 return ret ? ret : const0_rtx;
7886 }
7887
7888 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
7889 return ret;
7890 }
7891
7892 /* Try to expand the conditional expression which is represented by
7893 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If succeseds
7894 return the rtl reg which repsents the result. Otherwise return
7895 NULL_RTL. */
7896
7897 static rtx
7898 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
7899 tree treeop1 ATTRIBUTE_UNUSED,
7900 tree treeop2 ATTRIBUTE_UNUSED)
7901 {
7902 #ifdef HAVE_conditional_move
7903 rtx insn;
7904 rtx op00, op01, op1, op2;
7905 enum rtx_code comparison_code;
7906 enum machine_mode comparison_mode;
7907 gimple srcstmt;
7908 rtx temp;
7909 tree type = TREE_TYPE (treeop1);
7910 int unsignedp = TYPE_UNSIGNED (type);
7911 enum machine_mode mode = TYPE_MODE (type);
7912 enum machine_mode orig_mode = mode;
7913
7914 /* If we cannot do a conditional move on the mode, try doing it
7915 with the promoted mode. */
7916 if (!can_conditionally_move_p (mode))
7917 {
7918 mode = promote_mode (type, mode, &unsignedp);
7919 if (!can_conditionally_move_p (mode))
7920 return NULL_RTX;
7921 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
7922 }
7923 else
7924 temp = assign_temp (type, 0, 1);
7925
7926 start_sequence ();
7927 expand_operands (treeop1, treeop2,
7928 temp, &op1, &op2, EXPAND_NORMAL);
7929
7930 if (TREE_CODE (treeop0) == SSA_NAME
7931 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
7932 {
7933 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
7934 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
7935 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
7936 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
7937 comparison_mode = TYPE_MODE (type);
7938 unsignedp = TYPE_UNSIGNED (type);
7939 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7940 }
7941 else if (TREE_CODE_CLASS (TREE_CODE (treeop0)) == tcc_comparison)
7942 {
7943 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
7944 enum tree_code cmpcode = TREE_CODE (treeop0);
7945 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
7946 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
7947 unsignedp = TYPE_UNSIGNED (type);
7948 comparison_mode = TYPE_MODE (type);
7949 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
7950 }
7951 else
7952 {
7953 op00 = expand_normal (treeop0);
7954 op01 = const0_rtx;
7955 comparison_code = NE;
7956 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
7957 }
7958
7959 if (GET_MODE (op1) != mode)
7960 op1 = gen_lowpart (mode, op1);
7961
7962 if (GET_MODE (op2) != mode)
7963 op2 = gen_lowpart (mode, op2);
7964
7965 /* Try to emit the conditional move. */
7966 insn = emit_conditional_move (temp, comparison_code,
7967 op00, op01, comparison_mode,
7968 op1, op2, mode,
7969 unsignedp);
7970
7971 /* If we could do the conditional move, emit the sequence,
7972 and return. */
7973 if (insn)
7974 {
7975 rtx seq = get_insns ();
7976 end_sequence ();
7977 emit_insn (seq);
7978 return convert_modes (orig_mode, mode, temp, 0);
7979 }
7980
7981 /* Otherwise discard the sequence and fall back to code with
7982 branches. */
7983 end_sequence ();
7984 #endif
7985 return NULL_RTX;
7986 }
7987
7988 rtx
7989 expand_expr_real_2 (sepops ops, rtx target, enum machine_mode tmode,
7990 enum expand_modifier modifier)
7991 {
7992 rtx op0, op1, op2, temp;
7993 tree type;
7994 int unsignedp;
7995 enum machine_mode mode;
7996 enum tree_code code = ops->code;
7997 optab this_optab;
7998 rtx subtarget, original_target;
7999 int ignore;
8000 bool reduce_bit_field;
8001 location_t loc = ops->location;
8002 tree treeop0, treeop1, treeop2;
8003 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8004 ? reduce_to_bit_field_precision ((expr), \
8005 target, \
8006 type) \
8007 : (expr))
8008
8009 type = ops->type;
8010 mode = TYPE_MODE (type);
8011 unsignedp = TYPE_UNSIGNED (type);
8012
8013 treeop0 = ops->op0;
8014 treeop1 = ops->op1;
8015 treeop2 = ops->op2;
8016
8017 /* We should be called only on simple (binary or unary) expressions,
8018 exactly those that are valid in gimple expressions that aren't
8019 GIMPLE_SINGLE_RHS (or invalid). */
8020 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8021 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8022 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8023
8024 ignore = (target == const0_rtx
8025 || ((CONVERT_EXPR_CODE_P (code)
8026 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8027 && TREE_CODE (type) == VOID_TYPE));
8028
8029 /* We should be called only if we need the result. */
8030 gcc_assert (!ignore);
8031
8032 /* An operation in what may be a bit-field type needs the
8033 result to be reduced to the precision of the bit-field type,
8034 which is narrower than that of the type's mode. */
8035 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8036 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
8037
8038 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8039 target = 0;
8040
8041 /* Use subtarget as the target for operand 0 of a binary operation. */
8042 subtarget = get_subtarget (target);
8043 original_target = target;
8044
8045 switch (code)
8046 {
8047 case NON_LVALUE_EXPR:
8048 case PAREN_EXPR:
8049 CASE_CONVERT:
8050 if (treeop0 == error_mark_node)
8051 return const0_rtx;
8052
8053 if (TREE_CODE (type) == UNION_TYPE)
8054 {
8055 tree valtype = TREE_TYPE (treeop0);
8056
8057 /* If both input and output are BLKmode, this conversion isn't doing
8058 anything except possibly changing memory attribute. */
8059 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8060 {
8061 rtx result = expand_expr (treeop0, target, tmode,
8062 modifier);
8063
8064 result = copy_rtx (result);
8065 set_mem_attributes (result, type, 0);
8066 return result;
8067 }
8068
8069 if (target == 0)
8070 {
8071 if (TYPE_MODE (type) != BLKmode)
8072 target = gen_reg_rtx (TYPE_MODE (type));
8073 else
8074 target = assign_temp (type, 1, 1);
8075 }
8076
8077 if (MEM_P (target))
8078 /* Store data into beginning of memory target. */
8079 store_expr (treeop0,
8080 adjust_address (target, TYPE_MODE (valtype), 0),
8081 modifier == EXPAND_STACK_PARM,
8082 false);
8083
8084 else
8085 {
8086 gcc_assert (REG_P (target));
8087
8088 /* Store this field into a union of the proper type. */
8089 store_field (target,
8090 MIN ((int_size_in_bytes (TREE_TYPE
8091 (treeop0))
8092 * BITS_PER_UNIT),
8093 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
8094 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, false);
8095 }
8096
8097 /* Return the entire union. */
8098 return target;
8099 }
8100
8101 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8102 {
8103 op0 = expand_expr (treeop0, target, VOIDmode,
8104 modifier);
8105
8106 /* If the signedness of the conversion differs and OP0 is
8107 a promoted SUBREG, clear that indication since we now
8108 have to do the proper extension. */
8109 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8110 && GET_CODE (op0) == SUBREG)
8111 SUBREG_PROMOTED_VAR_P (op0) = 0;
8112
8113 return REDUCE_BIT_FIELD (op0);
8114 }
8115
8116 op0 = expand_expr (treeop0, NULL_RTX, mode,
8117 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8118 if (GET_MODE (op0) == mode)
8119 ;
8120
8121 /* If OP0 is a constant, just convert it into the proper mode. */
8122 else if (CONSTANT_P (op0))
8123 {
8124 tree inner_type = TREE_TYPE (treeop0);
8125 enum machine_mode inner_mode = GET_MODE (op0);
8126
8127 if (inner_mode == VOIDmode)
8128 inner_mode = TYPE_MODE (inner_type);
8129
8130 if (modifier == EXPAND_INITIALIZER)
8131 op0 = simplify_gen_subreg (mode, op0, inner_mode,
8132 subreg_lowpart_offset (mode,
8133 inner_mode));
8134 else
8135 op0= convert_modes (mode, inner_mode, op0,
8136 TYPE_UNSIGNED (inner_type));
8137 }
8138
8139 else if (modifier == EXPAND_INITIALIZER)
8140 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8141
8142 else if (target == 0)
8143 op0 = convert_to_mode (mode, op0,
8144 TYPE_UNSIGNED (TREE_TYPE
8145 (treeop0)));
8146 else
8147 {
8148 convert_move (target, op0,
8149 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8150 op0 = target;
8151 }
8152
8153 return REDUCE_BIT_FIELD (op0);
8154
8155 case ADDR_SPACE_CONVERT_EXPR:
8156 {
8157 tree treeop0_type = TREE_TYPE (treeop0);
8158 addr_space_t as_to;
8159 addr_space_t as_from;
8160
8161 gcc_assert (POINTER_TYPE_P (type));
8162 gcc_assert (POINTER_TYPE_P (treeop0_type));
8163
8164 as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8165 as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8166
8167 /* Conversions between pointers to the same address space should
8168 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8169 gcc_assert (as_to != as_from);
8170
8171 /* Ask target code to handle conversion between pointers
8172 to overlapping address spaces. */
8173 if (targetm.addr_space.subset_p (as_to, as_from)
8174 || targetm.addr_space.subset_p (as_from, as_to))
8175 {
8176 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8177 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8178 gcc_assert (op0);
8179 return op0;
8180 }
8181
8182 /* For disjoint address spaces, converting anything but
8183 a null pointer invokes undefined behaviour. We simply
8184 always return a null pointer here. */
8185 return CONST0_RTX (mode);
8186 }
8187
8188 case POINTER_PLUS_EXPR:
8189 /* Even though the sizetype mode and the pointer's mode can be different
8190 expand is able to handle this correctly and get the correct result out
8191 of the PLUS_EXPR code. */
8192 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8193 if sizetype precision is smaller than pointer precision. */
8194 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8195 treeop1 = fold_convert_loc (loc, type,
8196 fold_convert_loc (loc, ssizetype,
8197 treeop1));
8198 /* If sizetype precision is larger than pointer precision, truncate the
8199 offset to have matching modes. */
8200 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8201 treeop1 = fold_convert_loc (loc, type, treeop1);
8202
8203 case PLUS_EXPR:
8204 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8205 something else, make sure we add the register to the constant and
8206 then to the other thing. This case can occur during strength
8207 reduction and doing it this way will produce better code if the
8208 frame pointer or argument pointer is eliminated.
8209
8210 fold-const.c will ensure that the constant is always in the inner
8211 PLUS_EXPR, so the only case we need to do anything about is if
8212 sp, ap, or fp is our second argument, in which case we must swap
8213 the innermost first argument and our second argument. */
8214
8215 if (TREE_CODE (treeop0) == PLUS_EXPR
8216 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8217 && TREE_CODE (treeop1) == VAR_DECL
8218 && (DECL_RTL (treeop1) == frame_pointer_rtx
8219 || DECL_RTL (treeop1) == stack_pointer_rtx
8220 || DECL_RTL (treeop1) == arg_pointer_rtx))
8221 {
8222 gcc_unreachable ();
8223 }
8224
8225 /* If the result is to be ptr_mode and we are adding an integer to
8226 something, we might be forming a constant. So try to use
8227 plus_constant. If it produces a sum and we can't accept it,
8228 use force_operand. This allows P = &ARR[const] to generate
8229 efficient code on machines where a SYMBOL_REF is not a valid
8230 address.
8231
8232 If this is an EXPAND_SUM call, always return the sum. */
8233 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8234 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8235 {
8236 if (modifier == EXPAND_STACK_PARM)
8237 target = 0;
8238 if (TREE_CODE (treeop0) == INTEGER_CST
8239 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8240 && TREE_CONSTANT (treeop1))
8241 {
8242 rtx constant_part;
8243
8244 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8245 EXPAND_SUM);
8246 /* Use immed_double_const to ensure that the constant is
8247 truncated according to the mode of OP1, then sign extended
8248 to a HOST_WIDE_INT. Using the constant directly can result
8249 in non-canonical RTL in a 64x32 cross compile. */
8250 constant_part
8251 = immed_double_const (TREE_INT_CST_LOW (treeop0),
8252 (HOST_WIDE_INT) 0,
8253 TYPE_MODE (TREE_TYPE (treeop1)));
8254 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8255 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8256 op1 = force_operand (op1, target);
8257 return REDUCE_BIT_FIELD (op1);
8258 }
8259
8260 else if (TREE_CODE (treeop1) == INTEGER_CST
8261 && GET_MODE_PRECISION (mode) <= HOST_BITS_PER_WIDE_INT
8262 && TREE_CONSTANT (treeop0))
8263 {
8264 rtx constant_part;
8265
8266 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8267 (modifier == EXPAND_INITIALIZER
8268 ? EXPAND_INITIALIZER : EXPAND_SUM));
8269 if (! CONSTANT_P (op0))
8270 {
8271 op1 = expand_expr (treeop1, NULL_RTX,
8272 VOIDmode, modifier);
8273 /* Return a PLUS if modifier says it's OK. */
8274 if (modifier == EXPAND_SUM
8275 || modifier == EXPAND_INITIALIZER)
8276 return simplify_gen_binary (PLUS, mode, op0, op1);
8277 goto binop2;
8278 }
8279 /* Use immed_double_const to ensure that the constant is
8280 truncated according to the mode of OP1, then sign extended
8281 to a HOST_WIDE_INT. Using the constant directly can result
8282 in non-canonical RTL in a 64x32 cross compile. */
8283 constant_part
8284 = immed_double_const (TREE_INT_CST_LOW (treeop1),
8285 (HOST_WIDE_INT) 0,
8286 TYPE_MODE (TREE_TYPE (treeop0)));
8287 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8288 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8289 op0 = force_operand (op0, target);
8290 return REDUCE_BIT_FIELD (op0);
8291 }
8292 }
8293
8294 /* Use TER to expand pointer addition of a negated value
8295 as pointer subtraction. */
8296 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8297 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8298 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8299 && TREE_CODE (treeop1) == SSA_NAME
8300 && TYPE_MODE (TREE_TYPE (treeop0))
8301 == TYPE_MODE (TREE_TYPE (treeop1)))
8302 {
8303 gimple def = get_def_for_expr (treeop1, NEGATE_EXPR);
8304 if (def)
8305 {
8306 treeop1 = gimple_assign_rhs1 (def);
8307 code = MINUS_EXPR;
8308 goto do_minus;
8309 }
8310 }
8311
8312 /* No sense saving up arithmetic to be done
8313 if it's all in the wrong mode to form part of an address.
8314 And force_operand won't know whether to sign-extend or
8315 zero-extend. */
8316 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8317 || mode != ptr_mode)
8318 {
8319 expand_operands (treeop0, treeop1,
8320 subtarget, &op0, &op1, EXPAND_NORMAL);
8321 if (op0 == const0_rtx)
8322 return op1;
8323 if (op1 == const0_rtx)
8324 return op0;
8325 goto binop2;
8326 }
8327
8328 expand_operands (treeop0, treeop1,
8329 subtarget, &op0, &op1, modifier);
8330 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8331
8332 case MINUS_EXPR:
8333 do_minus:
8334 /* For initializers, we are allowed to return a MINUS of two
8335 symbolic constants. Here we handle all cases when both operands
8336 are constant. */
8337 /* Handle difference of two symbolic constants,
8338 for the sake of an initializer. */
8339 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8340 && really_constant_p (treeop0)
8341 && really_constant_p (treeop1))
8342 {
8343 expand_operands (treeop0, treeop1,
8344 NULL_RTX, &op0, &op1, modifier);
8345
8346 /* If the last operand is a CONST_INT, use plus_constant of
8347 the negated constant. Else make the MINUS. */
8348 if (CONST_INT_P (op1))
8349 return REDUCE_BIT_FIELD (plus_constant (mode, op0,
8350 -INTVAL (op1)));
8351 else
8352 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
8353 }
8354
8355 /* No sense saving up arithmetic to be done
8356 if it's all in the wrong mode to form part of an address.
8357 And force_operand won't know whether to sign-extend or
8358 zero-extend. */
8359 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8360 || mode != ptr_mode)
8361 goto binop;
8362
8363 expand_operands (treeop0, treeop1,
8364 subtarget, &op0, &op1, modifier);
8365
8366 /* Convert A - const to A + (-const). */
8367 if (CONST_INT_P (op1))
8368 {
8369 op1 = negate_rtx (mode, op1);
8370 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8371 }
8372
8373 goto binop2;
8374
8375 case WIDEN_MULT_PLUS_EXPR:
8376 case WIDEN_MULT_MINUS_EXPR:
8377 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8378 op2 = expand_normal (treeop2);
8379 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8380 target, unsignedp);
8381 return target;
8382
8383 case WIDEN_MULT_EXPR:
8384 /* If first operand is constant, swap them.
8385 Thus the following special case checks need only
8386 check the second operand. */
8387 if (TREE_CODE (treeop0) == INTEGER_CST)
8388 {
8389 tree t1 = treeop0;
8390 treeop0 = treeop1;
8391 treeop1 = t1;
8392 }
8393
8394 /* First, check if we have a multiplication of one signed and one
8395 unsigned operand. */
8396 if (TREE_CODE (treeop1) != INTEGER_CST
8397 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8398 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8399 {
8400 enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8401 this_optab = usmul_widen_optab;
8402 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8403 != CODE_FOR_nothing)
8404 {
8405 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8406 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8407 EXPAND_NORMAL);
8408 else
8409 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8410 EXPAND_NORMAL);
8411 /* op0 and op1 might still be constant, despite the above
8412 != INTEGER_CST check. Handle it. */
8413 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8414 {
8415 op0 = convert_modes (innermode, mode, op0, true);
8416 op1 = convert_modes (innermode, mode, op1, false);
8417 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8418 target, unsignedp));
8419 }
8420 goto binop3;
8421 }
8422 }
8423 /* Check for a multiplication with matching signedness. */
8424 else if ((TREE_CODE (treeop1) == INTEGER_CST
8425 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8426 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8427 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8428 {
8429 tree op0type = TREE_TYPE (treeop0);
8430 enum machine_mode innermode = TYPE_MODE (op0type);
8431 bool zextend_p = TYPE_UNSIGNED (op0type);
8432 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8433 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8434
8435 if (TREE_CODE (treeop0) != INTEGER_CST)
8436 {
8437 if (find_widening_optab_handler (this_optab, mode, innermode, 0)
8438 != CODE_FOR_nothing)
8439 {
8440 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8441 EXPAND_NORMAL);
8442 /* op0 and op1 might still be constant, despite the above
8443 != INTEGER_CST check. Handle it. */
8444 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8445 {
8446 widen_mult_const:
8447 op0 = convert_modes (innermode, mode, op0, zextend_p);
8448 op1
8449 = convert_modes (innermode, mode, op1,
8450 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8451 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8452 target,
8453 unsignedp));
8454 }
8455 temp = expand_widening_mult (mode, op0, op1, target,
8456 unsignedp, this_optab);
8457 return REDUCE_BIT_FIELD (temp);
8458 }
8459 if (find_widening_optab_handler (other_optab, mode, innermode, 0)
8460 != CODE_FOR_nothing
8461 && innermode == word_mode)
8462 {
8463 rtx htem, hipart;
8464 op0 = expand_normal (treeop0);
8465 if (TREE_CODE (treeop1) == INTEGER_CST)
8466 op1 = convert_modes (innermode, mode,
8467 expand_normal (treeop1),
8468 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8469 else
8470 op1 = expand_normal (treeop1);
8471 /* op0 and op1 might still be constant, despite the above
8472 != INTEGER_CST check. Handle it. */
8473 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8474 goto widen_mult_const;
8475 temp = expand_binop (mode, other_optab, op0, op1, target,
8476 unsignedp, OPTAB_LIB_WIDEN);
8477 hipart = gen_highpart (innermode, temp);
8478 htem = expand_mult_highpart_adjust (innermode, hipart,
8479 op0, op1, hipart,
8480 zextend_p);
8481 if (htem != hipart)
8482 emit_move_insn (hipart, htem);
8483 return REDUCE_BIT_FIELD (temp);
8484 }
8485 }
8486 }
8487 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8488 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8489 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8490 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8491
8492 case FMA_EXPR:
8493 {
8494 optab opt = fma_optab;
8495 gimple def0, def2;
8496
8497 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8498 call. */
8499 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8500 {
8501 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8502 tree call_expr;
8503
8504 gcc_assert (fn != NULL_TREE);
8505 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8506 return expand_builtin (call_expr, target, subtarget, mode, false);
8507 }
8508
8509 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8510 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8511
8512 op0 = op2 = NULL;
8513
8514 if (def0 && def2
8515 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8516 {
8517 opt = fnms_optab;
8518 op0 = expand_normal (gimple_assign_rhs1 (def0));
8519 op2 = expand_normal (gimple_assign_rhs1 (def2));
8520 }
8521 else if (def0
8522 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8523 {
8524 opt = fnma_optab;
8525 op0 = expand_normal (gimple_assign_rhs1 (def0));
8526 }
8527 else if (def2
8528 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8529 {
8530 opt = fms_optab;
8531 op2 = expand_normal (gimple_assign_rhs1 (def2));
8532 }
8533
8534 if (op0 == NULL)
8535 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8536 if (op2 == NULL)
8537 op2 = expand_normal (treeop2);
8538 op1 = expand_normal (treeop1);
8539
8540 return expand_ternary_op (TYPE_MODE (type), opt,
8541 op0, op1, op2, target, 0);
8542 }
8543
8544 case MULT_EXPR:
8545 /* If this is a fixed-point operation, then we cannot use the code
8546 below because "expand_mult" doesn't support sat/no-sat fixed-point
8547 multiplications. */
8548 if (ALL_FIXED_POINT_MODE_P (mode))
8549 goto binop;
8550
8551 /* If first operand is constant, swap them.
8552 Thus the following special case checks need only
8553 check the second operand. */
8554 if (TREE_CODE (treeop0) == INTEGER_CST)
8555 {
8556 tree t1 = treeop0;
8557 treeop0 = treeop1;
8558 treeop1 = t1;
8559 }
8560
8561 /* Attempt to return something suitable for generating an
8562 indexed address, for machines that support that. */
8563
8564 if (modifier == EXPAND_SUM && mode == ptr_mode
8565 && host_integerp (treeop1, 0))
8566 {
8567 tree exp1 = treeop1;
8568
8569 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8570 EXPAND_SUM);
8571
8572 if (!REG_P (op0))
8573 op0 = force_operand (op0, NULL_RTX);
8574 if (!REG_P (op0))
8575 op0 = copy_to_mode_reg (mode, op0);
8576
8577 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8578 gen_int_mode (tree_low_cst (exp1, 0),
8579 TYPE_MODE (TREE_TYPE (exp1)))));
8580 }
8581
8582 if (modifier == EXPAND_STACK_PARM)
8583 target = 0;
8584
8585 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8586 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8587
8588 case TRUNC_DIV_EXPR:
8589 case FLOOR_DIV_EXPR:
8590 case CEIL_DIV_EXPR:
8591 case ROUND_DIV_EXPR:
8592 case EXACT_DIV_EXPR:
8593 /* If this is a fixed-point operation, then we cannot use the code
8594 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8595 divisions. */
8596 if (ALL_FIXED_POINT_MODE_P (mode))
8597 goto binop;
8598
8599 if (modifier == EXPAND_STACK_PARM)
8600 target = 0;
8601 /* Possible optimization: compute the dividend with EXPAND_SUM
8602 then if the divisor is constant can optimize the case
8603 where some terms of the dividend have coeffs divisible by it. */
8604 expand_operands (treeop0, treeop1,
8605 subtarget, &op0, &op1, EXPAND_NORMAL);
8606 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
8607
8608 case RDIV_EXPR:
8609 goto binop;
8610
8611 case MULT_HIGHPART_EXPR:
8612 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8613 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
8614 gcc_assert (temp);
8615 return temp;
8616
8617 case TRUNC_MOD_EXPR:
8618 case FLOOR_MOD_EXPR:
8619 case CEIL_MOD_EXPR:
8620 case ROUND_MOD_EXPR:
8621 if (modifier == EXPAND_STACK_PARM)
8622 target = 0;
8623 expand_operands (treeop0, treeop1,
8624 subtarget, &op0, &op1, EXPAND_NORMAL);
8625 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
8626
8627 case FIXED_CONVERT_EXPR:
8628 op0 = expand_normal (treeop0);
8629 if (target == 0 || modifier == EXPAND_STACK_PARM)
8630 target = gen_reg_rtx (mode);
8631
8632 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
8633 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8634 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
8635 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
8636 else
8637 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
8638 return target;
8639
8640 case FIX_TRUNC_EXPR:
8641 op0 = expand_normal (treeop0);
8642 if (target == 0 || modifier == EXPAND_STACK_PARM)
8643 target = gen_reg_rtx (mode);
8644 expand_fix (target, op0, unsignedp);
8645 return target;
8646
8647 case FLOAT_EXPR:
8648 op0 = expand_normal (treeop0);
8649 if (target == 0 || modifier == EXPAND_STACK_PARM)
8650 target = gen_reg_rtx (mode);
8651 /* expand_float can't figure out what to do if FROM has VOIDmode.
8652 So give it the correct mode. With -O, cse will optimize this. */
8653 if (GET_MODE (op0) == VOIDmode)
8654 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
8655 op0);
8656 expand_float (target, op0,
8657 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8658 return target;
8659
8660 case NEGATE_EXPR:
8661 op0 = expand_expr (treeop0, subtarget,
8662 VOIDmode, EXPAND_NORMAL);
8663 if (modifier == EXPAND_STACK_PARM)
8664 target = 0;
8665 temp = expand_unop (mode,
8666 optab_for_tree_code (NEGATE_EXPR, type,
8667 optab_default),
8668 op0, target, 0);
8669 gcc_assert (temp);
8670 return REDUCE_BIT_FIELD (temp);
8671
8672 case ABS_EXPR:
8673 op0 = expand_expr (treeop0, subtarget,
8674 VOIDmode, EXPAND_NORMAL);
8675 if (modifier == EXPAND_STACK_PARM)
8676 target = 0;
8677
8678 /* ABS_EXPR is not valid for complex arguments. */
8679 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
8680 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
8681
8682 /* Unsigned abs is simply the operand. Testing here means we don't
8683 risk generating incorrect code below. */
8684 if (TYPE_UNSIGNED (type))
8685 return op0;
8686
8687 return expand_abs (mode, op0, target, unsignedp,
8688 safe_from_p (target, treeop0, 1));
8689
8690 case MAX_EXPR:
8691 case MIN_EXPR:
8692 target = original_target;
8693 if (target == 0
8694 || modifier == EXPAND_STACK_PARM
8695 || (MEM_P (target) && MEM_VOLATILE_P (target))
8696 || GET_MODE (target) != mode
8697 || (REG_P (target)
8698 && REGNO (target) < FIRST_PSEUDO_REGISTER))
8699 target = gen_reg_rtx (mode);
8700 expand_operands (treeop0, treeop1,
8701 target, &op0, &op1, EXPAND_NORMAL);
8702
8703 /* First try to do it with a special MIN or MAX instruction.
8704 If that does not win, use a conditional jump to select the proper
8705 value. */
8706 this_optab = optab_for_tree_code (code, type, optab_default);
8707 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
8708 OPTAB_WIDEN);
8709 if (temp != 0)
8710 return temp;
8711
8712 /* At this point, a MEM target is no longer useful; we will get better
8713 code without it. */
8714
8715 if (! REG_P (target))
8716 target = gen_reg_rtx (mode);
8717
8718 /* If op1 was placed in target, swap op0 and op1. */
8719 if (target != op0 && target == op1)
8720 {
8721 temp = op0;
8722 op0 = op1;
8723 op1 = temp;
8724 }
8725
8726 /* We generate better code and avoid problems with op1 mentioning
8727 target by forcing op1 into a pseudo if it isn't a constant. */
8728 if (! CONSTANT_P (op1))
8729 op1 = force_reg (mode, op1);
8730
8731 {
8732 enum rtx_code comparison_code;
8733 rtx cmpop1 = op1;
8734
8735 if (code == MAX_EXPR)
8736 comparison_code = unsignedp ? GEU : GE;
8737 else
8738 comparison_code = unsignedp ? LEU : LE;
8739
8740 /* Canonicalize to comparisons against 0. */
8741 if (op1 == const1_rtx)
8742 {
8743 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8744 or (a != 0 ? a : 1) for unsigned.
8745 For MIN we are safe converting (a <= 1 ? a : 1)
8746 into (a <= 0 ? a : 1) */
8747 cmpop1 = const0_rtx;
8748 if (code == MAX_EXPR)
8749 comparison_code = unsignedp ? NE : GT;
8750 }
8751 if (op1 == constm1_rtx && !unsignedp)
8752 {
8753 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8754 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8755 cmpop1 = const0_rtx;
8756 if (code == MIN_EXPR)
8757 comparison_code = LT;
8758 }
8759 #ifdef HAVE_conditional_move
8760 /* Use a conditional move if possible. */
8761 if (can_conditionally_move_p (mode))
8762 {
8763 rtx insn;
8764
8765 /* ??? Same problem as in expmed.c: emit_conditional_move
8766 forces a stack adjustment via compare_from_rtx, and we
8767 lose the stack adjustment if the sequence we are about
8768 to create is discarded. */
8769 do_pending_stack_adjust ();
8770
8771 start_sequence ();
8772
8773 /* Try to emit the conditional move. */
8774 insn = emit_conditional_move (target, comparison_code,
8775 op0, cmpop1, mode,
8776 op0, op1, mode,
8777 unsignedp);
8778
8779 /* If we could do the conditional move, emit the sequence,
8780 and return. */
8781 if (insn)
8782 {
8783 rtx seq = get_insns ();
8784 end_sequence ();
8785 emit_insn (seq);
8786 return target;
8787 }
8788
8789 /* Otherwise discard the sequence and fall back to code with
8790 branches. */
8791 end_sequence ();
8792 }
8793 #endif
8794 if (target != op0)
8795 emit_move_insn (target, op0);
8796
8797 temp = gen_label_rtx ();
8798 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
8799 unsignedp, mode, NULL_RTX, NULL_RTX, temp,
8800 -1);
8801 }
8802 emit_move_insn (target, op1);
8803 emit_label (temp);
8804 return target;
8805
8806 case BIT_NOT_EXPR:
8807 op0 = expand_expr (treeop0, subtarget,
8808 VOIDmode, EXPAND_NORMAL);
8809 if (modifier == EXPAND_STACK_PARM)
8810 target = 0;
8811 /* In case we have to reduce the result to bitfield precision
8812 for unsigned bitfield expand this as XOR with a proper constant
8813 instead. */
8814 if (reduce_bit_field && TYPE_UNSIGNED (type))
8815 temp = expand_binop (mode, xor_optab, op0,
8816 immed_double_int_const
8817 (double_int::mask (TYPE_PRECISION (type)), mode),
8818 target, 1, OPTAB_LIB_WIDEN);
8819 else
8820 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
8821 gcc_assert (temp);
8822 return temp;
8823
8824 /* ??? Can optimize bitwise operations with one arg constant.
8825 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8826 and (a bitwise1 b) bitwise2 b (etc)
8827 but that is probably not worth while. */
8828
8829 case BIT_AND_EXPR:
8830 case BIT_IOR_EXPR:
8831 case BIT_XOR_EXPR:
8832 goto binop;
8833
8834 case LROTATE_EXPR:
8835 case RROTATE_EXPR:
8836 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
8837 || (GET_MODE_PRECISION (TYPE_MODE (type))
8838 == TYPE_PRECISION (type)));
8839 /* fall through */
8840
8841 case LSHIFT_EXPR:
8842 case RSHIFT_EXPR:
8843 /* If this is a fixed-point operation, then we cannot use the code
8844 below because "expand_shift" doesn't support sat/no-sat fixed-point
8845 shifts. */
8846 if (ALL_FIXED_POINT_MODE_P (mode))
8847 goto binop;
8848
8849 if (! safe_from_p (subtarget, treeop1, 1))
8850 subtarget = 0;
8851 if (modifier == EXPAND_STACK_PARM)
8852 target = 0;
8853 op0 = expand_expr (treeop0, subtarget,
8854 VOIDmode, EXPAND_NORMAL);
8855 temp = expand_variable_shift (code, mode, op0, treeop1, target,
8856 unsignedp);
8857 if (code == LSHIFT_EXPR)
8858 temp = REDUCE_BIT_FIELD (temp);
8859 return temp;
8860
8861 /* Could determine the answer when only additive constants differ. Also,
8862 the addition of one can be handled by changing the condition. */
8863 case LT_EXPR:
8864 case LE_EXPR:
8865 case GT_EXPR:
8866 case GE_EXPR:
8867 case EQ_EXPR:
8868 case NE_EXPR:
8869 case UNORDERED_EXPR:
8870 case ORDERED_EXPR:
8871 case UNLT_EXPR:
8872 case UNLE_EXPR:
8873 case UNGT_EXPR:
8874 case UNGE_EXPR:
8875 case UNEQ_EXPR:
8876 case LTGT_EXPR:
8877 temp = do_store_flag (ops,
8878 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8879 tmode != VOIDmode ? tmode : mode);
8880 if (temp)
8881 return temp;
8882
8883 /* Use a compare and a jump for BLKmode comparisons, or for function
8884 type comparisons is HAVE_canonicalize_funcptr_for_compare. */
8885
8886 if ((target == 0
8887 || modifier == EXPAND_STACK_PARM
8888 || ! safe_from_p (target, treeop0, 1)
8889 || ! safe_from_p (target, treeop1, 1)
8890 /* Make sure we don't have a hard reg (such as function's return
8891 value) live across basic blocks, if not optimizing. */
8892 || (!optimize && REG_P (target)
8893 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8894 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8895
8896 emit_move_insn (target, const0_rtx);
8897
8898 op1 = gen_label_rtx ();
8899 jumpifnot_1 (code, treeop0, treeop1, op1, -1);
8900
8901 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
8902 emit_move_insn (target, constm1_rtx);
8903 else
8904 emit_move_insn (target, const1_rtx);
8905
8906 emit_label (op1);
8907 return target;
8908
8909 case COMPLEX_EXPR:
8910 /* Get the rtx code of the operands. */
8911 op0 = expand_normal (treeop0);
8912 op1 = expand_normal (treeop1);
8913
8914 if (!target)
8915 target = gen_reg_rtx (TYPE_MODE (type));
8916 else
8917 /* If target overlaps with op1, then either we need to force
8918 op1 into a pseudo (if target also overlaps with op0),
8919 or write the complex parts in reverse order. */
8920 switch (GET_CODE (target))
8921 {
8922 case CONCAT:
8923 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
8924 {
8925 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
8926 {
8927 complex_expr_force_op1:
8928 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
8929 emit_move_insn (temp, op1);
8930 op1 = temp;
8931 break;
8932 }
8933 complex_expr_swap_order:
8934 /* Move the imaginary (op1) and real (op0) parts to their
8935 location. */
8936 write_complex_part (target, op1, true);
8937 write_complex_part (target, op0, false);
8938
8939 return target;
8940 }
8941 break;
8942 case MEM:
8943 temp = adjust_address_nv (target,
8944 GET_MODE_INNER (GET_MODE (target)), 0);
8945 if (reg_overlap_mentioned_p (temp, op1))
8946 {
8947 enum machine_mode imode = GET_MODE_INNER (GET_MODE (target));
8948 temp = adjust_address_nv (target, imode,
8949 GET_MODE_SIZE (imode));
8950 if (reg_overlap_mentioned_p (temp, op0))
8951 goto complex_expr_force_op1;
8952 goto complex_expr_swap_order;
8953 }
8954 break;
8955 default:
8956 if (reg_overlap_mentioned_p (target, op1))
8957 {
8958 if (reg_overlap_mentioned_p (target, op0))
8959 goto complex_expr_force_op1;
8960 goto complex_expr_swap_order;
8961 }
8962 break;
8963 }
8964
8965 /* Move the real (op0) and imaginary (op1) parts to their location. */
8966 write_complex_part (target, op0, false);
8967 write_complex_part (target, op1, true);
8968
8969 return target;
8970
8971 case WIDEN_SUM_EXPR:
8972 {
8973 tree oprnd0 = treeop0;
8974 tree oprnd1 = treeop1;
8975
8976 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8977 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
8978 target, unsignedp);
8979 return target;
8980 }
8981
8982 case REDUC_MAX_EXPR:
8983 case REDUC_MIN_EXPR:
8984 case REDUC_PLUS_EXPR:
8985 {
8986 op0 = expand_normal (treeop0);
8987 this_optab = optab_for_tree_code (code, type, optab_default);
8988 temp = expand_unop (mode, this_optab, op0, target, unsignedp);
8989 gcc_assert (temp);
8990 return temp;
8991 }
8992
8993 case VEC_LSHIFT_EXPR:
8994 case VEC_RSHIFT_EXPR:
8995 {
8996 target = expand_vec_shift_expr (ops, target);
8997 return target;
8998 }
8999
9000 case VEC_UNPACK_HI_EXPR:
9001 case VEC_UNPACK_LO_EXPR:
9002 {
9003 op0 = expand_normal (treeop0);
9004 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9005 target, unsignedp);
9006 gcc_assert (temp);
9007 return temp;
9008 }
9009
9010 case VEC_UNPACK_FLOAT_HI_EXPR:
9011 case VEC_UNPACK_FLOAT_LO_EXPR:
9012 {
9013 op0 = expand_normal (treeop0);
9014 /* The signedness is determined from input operand. */
9015 temp = expand_widen_pattern_expr
9016 (ops, op0, NULL_RTX, NULL_RTX,
9017 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9018
9019 gcc_assert (temp);
9020 return temp;
9021 }
9022
9023 case VEC_WIDEN_MULT_HI_EXPR:
9024 case VEC_WIDEN_MULT_LO_EXPR:
9025 case VEC_WIDEN_MULT_EVEN_EXPR:
9026 case VEC_WIDEN_MULT_ODD_EXPR:
9027 case VEC_WIDEN_LSHIFT_HI_EXPR:
9028 case VEC_WIDEN_LSHIFT_LO_EXPR:
9029 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9030 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9031 target, unsignedp);
9032 gcc_assert (target);
9033 return target;
9034
9035 case VEC_PACK_TRUNC_EXPR:
9036 case VEC_PACK_SAT_EXPR:
9037 case VEC_PACK_FIX_TRUNC_EXPR:
9038 mode = TYPE_MODE (TREE_TYPE (treeop0));
9039 goto binop;
9040
9041 case VEC_PERM_EXPR:
9042 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9043 op2 = expand_normal (treeop2);
9044
9045 /* Careful here: if the target doesn't support integral vector modes,
9046 a constant selection vector could wind up smooshed into a normal
9047 integral constant. */
9048 if (CONSTANT_P (op2) && GET_CODE (op2) != CONST_VECTOR)
9049 {
9050 tree sel_type = TREE_TYPE (treeop2);
9051 enum machine_mode vmode
9052 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type)),
9053 TYPE_VECTOR_SUBPARTS (sel_type));
9054 gcc_assert (GET_MODE_CLASS (vmode) == MODE_VECTOR_INT);
9055 op2 = simplify_subreg (vmode, op2, TYPE_MODE (sel_type), 0);
9056 gcc_assert (op2 && GET_CODE (op2) == CONST_VECTOR);
9057 }
9058 else
9059 gcc_assert (GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT);
9060
9061 temp = expand_vec_perm (mode, op0, op1, op2, target);
9062 gcc_assert (temp);
9063 return temp;
9064
9065 case DOT_PROD_EXPR:
9066 {
9067 tree oprnd0 = treeop0;
9068 tree oprnd1 = treeop1;
9069 tree oprnd2 = treeop2;
9070 rtx op2;
9071
9072 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9073 op2 = expand_normal (oprnd2);
9074 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9075 target, unsignedp);
9076 return target;
9077 }
9078
9079 case REALIGN_LOAD_EXPR:
9080 {
9081 tree oprnd0 = treeop0;
9082 tree oprnd1 = treeop1;
9083 tree oprnd2 = treeop2;
9084 rtx op2;
9085
9086 this_optab = optab_for_tree_code (code, type, optab_default);
9087 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9088 op2 = expand_normal (oprnd2);
9089 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9090 target, unsignedp);
9091 gcc_assert (temp);
9092 return temp;
9093 }
9094
9095 case COND_EXPR:
9096 /* A COND_EXPR with its type being VOID_TYPE represents a
9097 conditional jump and is handled in
9098 expand_gimple_cond_expr. */
9099 gcc_assert (!VOID_TYPE_P (type));
9100
9101 /* Note that COND_EXPRs whose type is a structure or union
9102 are required to be constructed to contain assignments of
9103 a temporary variable, so that we can evaluate them here
9104 for side effect only. If type is void, we must do likewise. */
9105
9106 gcc_assert (!TREE_ADDRESSABLE (type)
9107 && !ignore
9108 && TREE_TYPE (treeop1) != void_type_node
9109 && TREE_TYPE (treeop2) != void_type_node);
9110
9111 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9112 if (temp)
9113 return temp;
9114
9115 /* If we are not to produce a result, we have no target. Otherwise,
9116 if a target was specified use it; it will not be used as an
9117 intermediate target unless it is safe. If no target, use a
9118 temporary. */
9119
9120 if (modifier != EXPAND_STACK_PARM
9121 && original_target
9122 && safe_from_p (original_target, treeop0, 1)
9123 && GET_MODE (original_target) == mode
9124 && !MEM_P (original_target))
9125 temp = original_target;
9126 else
9127 temp = assign_temp (type, 0, 1);
9128
9129 do_pending_stack_adjust ();
9130 NO_DEFER_POP;
9131 op0 = gen_label_rtx ();
9132 op1 = gen_label_rtx ();
9133 jumpifnot (treeop0, op0, -1);
9134 store_expr (treeop1, temp,
9135 modifier == EXPAND_STACK_PARM,
9136 false);
9137
9138 emit_jump_insn (gen_jump (op1));
9139 emit_barrier ();
9140 emit_label (op0);
9141 store_expr (treeop2, temp,
9142 modifier == EXPAND_STACK_PARM,
9143 false);
9144
9145 emit_label (op1);
9146 OK_DEFER_POP;
9147 return temp;
9148
9149 case VEC_COND_EXPR:
9150 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9151 return target;
9152
9153 default:
9154 gcc_unreachable ();
9155 }
9156
9157 /* Here to do an ordinary binary operator. */
9158 binop:
9159 expand_operands (treeop0, treeop1,
9160 subtarget, &op0, &op1, EXPAND_NORMAL);
9161 binop2:
9162 this_optab = optab_for_tree_code (code, type, optab_default);
9163 binop3:
9164 if (modifier == EXPAND_STACK_PARM)
9165 target = 0;
9166 temp = expand_binop (mode, this_optab, op0, op1, target,
9167 unsignedp, OPTAB_LIB_WIDEN);
9168 gcc_assert (temp);
9169 /* Bitwise operations do not need bitfield reduction as we expect their
9170 operands being properly truncated. */
9171 if (code == BIT_XOR_EXPR
9172 || code == BIT_AND_EXPR
9173 || code == BIT_IOR_EXPR)
9174 return temp;
9175 return REDUCE_BIT_FIELD (temp);
9176 }
9177 #undef REDUCE_BIT_FIELD
9178
9179 rtx
9180 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
9181 enum expand_modifier modifier, rtx *alt_rtl)
9182 {
9183 rtx op0, op1, temp, decl_rtl;
9184 tree type;
9185 int unsignedp;
9186 enum machine_mode mode;
9187 enum tree_code code = TREE_CODE (exp);
9188 rtx subtarget, original_target;
9189 int ignore;
9190 tree context;
9191 bool reduce_bit_field;
9192 location_t loc = EXPR_LOCATION (exp);
9193 struct separate_ops ops;
9194 tree treeop0, treeop1, treeop2;
9195 tree ssa_name = NULL_TREE;
9196 gimple g;
9197
9198 type = TREE_TYPE (exp);
9199 mode = TYPE_MODE (type);
9200 unsignedp = TYPE_UNSIGNED (type);
9201
9202 treeop0 = treeop1 = treeop2 = NULL_TREE;
9203 if (!VL_EXP_CLASS_P (exp))
9204 switch (TREE_CODE_LENGTH (code))
9205 {
9206 default:
9207 case 3: treeop2 = TREE_OPERAND (exp, 2);
9208 case 2: treeop1 = TREE_OPERAND (exp, 1);
9209 case 1: treeop0 = TREE_OPERAND (exp, 0);
9210 case 0: break;
9211 }
9212 ops.code = code;
9213 ops.type = type;
9214 ops.op0 = treeop0;
9215 ops.op1 = treeop1;
9216 ops.op2 = treeop2;
9217 ops.location = loc;
9218
9219 ignore = (target == const0_rtx
9220 || ((CONVERT_EXPR_CODE_P (code)
9221 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9222 && TREE_CODE (type) == VOID_TYPE));
9223
9224 /* An operation in what may be a bit-field type needs the
9225 result to be reduced to the precision of the bit-field type,
9226 which is narrower than that of the type's mode. */
9227 reduce_bit_field = (!ignore
9228 && INTEGRAL_TYPE_P (type)
9229 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type));
9230
9231 /* If we are going to ignore this result, we need only do something
9232 if there is a side-effect somewhere in the expression. If there
9233 is, short-circuit the most common cases here. Note that we must
9234 not call expand_expr with anything but const0_rtx in case this
9235 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9236
9237 if (ignore)
9238 {
9239 if (! TREE_SIDE_EFFECTS (exp))
9240 return const0_rtx;
9241
9242 /* Ensure we reference a volatile object even if value is ignored, but
9243 don't do this if all we are doing is taking its address. */
9244 if (TREE_THIS_VOLATILE (exp)
9245 && TREE_CODE (exp) != FUNCTION_DECL
9246 && mode != VOIDmode && mode != BLKmode
9247 && modifier != EXPAND_CONST_ADDRESS)
9248 {
9249 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9250 if (MEM_P (temp))
9251 copy_to_reg (temp);
9252 return const0_rtx;
9253 }
9254
9255 if (TREE_CODE_CLASS (code) == tcc_unary
9256 || code == BIT_FIELD_REF
9257 || code == COMPONENT_REF
9258 || code == INDIRECT_REF)
9259 return expand_expr (treeop0, const0_rtx, VOIDmode,
9260 modifier);
9261
9262 else if (TREE_CODE_CLASS (code) == tcc_binary
9263 || TREE_CODE_CLASS (code) == tcc_comparison
9264 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9265 {
9266 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9267 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9268 return const0_rtx;
9269 }
9270
9271 target = 0;
9272 }
9273
9274 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9275 target = 0;
9276
9277 /* Use subtarget as the target for operand 0 of a binary operation. */
9278 subtarget = get_subtarget (target);
9279 original_target = target;
9280
9281 switch (code)
9282 {
9283 case LABEL_DECL:
9284 {
9285 tree function = decl_function_context (exp);
9286
9287 temp = label_rtx (exp);
9288 temp = gen_rtx_LABEL_REF (Pmode, temp);
9289
9290 if (function != current_function_decl
9291 && function != 0)
9292 LABEL_REF_NONLOCAL_P (temp) = 1;
9293
9294 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9295 return temp;
9296 }
9297
9298 case SSA_NAME:
9299 /* ??? ivopts calls expander, without any preparation from
9300 out-of-ssa. So fake instructions as if this was an access to the
9301 base variable. This unnecessarily allocates a pseudo, see how we can
9302 reuse it, if partition base vars have it set already. */
9303 if (!currently_expanding_to_rtl)
9304 {
9305 tree var = SSA_NAME_VAR (exp);
9306 if (var && DECL_RTL_SET_P (var))
9307 return DECL_RTL (var);
9308 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9309 LAST_VIRTUAL_REGISTER + 1);
9310 }
9311
9312 g = get_gimple_for_ssa_name (exp);
9313 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9314 if (g == NULL
9315 && modifier == EXPAND_INITIALIZER
9316 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9317 && (optimize || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9318 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9319 g = SSA_NAME_DEF_STMT (exp);
9320 if (g)
9321 {
9322 rtx r;
9323 location_t saved_loc = curr_insn_location ();
9324
9325 set_curr_insn_location (gimple_location (g));
9326 r = expand_expr_real (gimple_assign_rhs_to_tree (g), target,
9327 tmode, modifier, NULL);
9328 set_curr_insn_location (saved_loc);
9329 if (REG_P (r) && !REG_EXPR (r))
9330 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9331 return r;
9332 }
9333
9334 ssa_name = exp;
9335 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9336 exp = SSA_NAME_VAR (ssa_name);
9337 goto expand_decl_rtl;
9338
9339 case PARM_DECL:
9340 case VAR_DECL:
9341 /* If a static var's type was incomplete when the decl was written,
9342 but the type is complete now, lay out the decl now. */
9343 if (DECL_SIZE (exp) == 0
9344 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
9345 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
9346 layout_decl (exp, 0);
9347
9348 /* ... fall through ... */
9349
9350 case FUNCTION_DECL:
9351 case RESULT_DECL:
9352 decl_rtl = DECL_RTL (exp);
9353 expand_decl_rtl:
9354 gcc_assert (decl_rtl);
9355 decl_rtl = copy_rtx (decl_rtl);
9356 /* Record writes to register variables. */
9357 if (modifier == EXPAND_WRITE
9358 && REG_P (decl_rtl)
9359 && HARD_REGISTER_P (decl_rtl))
9360 add_to_hard_reg_set (&crtl->asm_clobbers,
9361 GET_MODE (decl_rtl), REGNO (decl_rtl));
9362
9363 /* Ensure variable marked as used even if it doesn't go through
9364 a parser. If it hasn't be used yet, write out an external
9365 definition. */
9366 TREE_USED (exp) = 1;
9367
9368 /* Show we haven't gotten RTL for this yet. */
9369 temp = 0;
9370
9371 /* Variables inherited from containing functions should have
9372 been lowered by this point. */
9373 context = decl_function_context (exp);
9374 gcc_assert (SCOPE_FILE_SCOPE_P (context)
9375 || context == current_function_decl
9376 || TREE_STATIC (exp)
9377 || DECL_EXTERNAL (exp)
9378 /* ??? C++ creates functions that are not TREE_STATIC. */
9379 || TREE_CODE (exp) == FUNCTION_DECL);
9380
9381 /* This is the case of an array whose size is to be determined
9382 from its initializer, while the initializer is still being parsed.
9383 ??? We aren't parsing while expanding anymore. */
9384
9385 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
9386 temp = validize_mem (decl_rtl);
9387
9388 /* If DECL_RTL is memory, we are in the normal case and the
9389 address is not valid, get the address into a register. */
9390
9391 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
9392 {
9393 if (alt_rtl)
9394 *alt_rtl = decl_rtl;
9395 decl_rtl = use_anchored_address (decl_rtl);
9396 if (modifier != EXPAND_CONST_ADDRESS
9397 && modifier != EXPAND_SUM
9398 && !memory_address_addr_space_p (DECL_MODE (exp),
9399 XEXP (decl_rtl, 0),
9400 MEM_ADDR_SPACE (decl_rtl)))
9401 temp = replace_equiv_address (decl_rtl,
9402 copy_rtx (XEXP (decl_rtl, 0)));
9403 }
9404
9405 /* If we got something, return it. But first, set the alignment
9406 if the address is a register. */
9407 if (temp != 0)
9408 {
9409 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
9410 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
9411
9412 return temp;
9413 }
9414
9415 /* If the mode of DECL_RTL does not match that of the decl,
9416 there are two cases: we are dealing with a BLKmode value
9417 that is returned in a register, or we are dealing with
9418 a promoted value. In the latter case, return a SUBREG
9419 of the wanted mode, but mark it so that we know that it
9420 was already extended. */
9421 if (REG_P (decl_rtl)
9422 && DECL_MODE (exp) != BLKmode
9423 && GET_MODE (decl_rtl) != DECL_MODE (exp))
9424 {
9425 enum machine_mode pmode;
9426
9427 /* Get the signedness to be used for this variable. Ensure we get
9428 the same mode we got when the variable was declared. */
9429 if (code == SSA_NAME
9430 && (g = SSA_NAME_DEF_STMT (ssa_name))
9431 && gimple_code (g) == GIMPLE_CALL)
9432 {
9433 gcc_assert (!gimple_call_internal_p (g));
9434 pmode = promote_function_mode (type, mode, &unsignedp,
9435 gimple_call_fntype (g),
9436 2);
9437 }
9438 else
9439 pmode = promote_decl_mode (exp, &unsignedp);
9440 gcc_assert (GET_MODE (decl_rtl) == pmode);
9441
9442 temp = gen_lowpart_SUBREG (mode, decl_rtl);
9443 SUBREG_PROMOTED_VAR_P (temp) = 1;
9444 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
9445 return temp;
9446 }
9447
9448 return decl_rtl;
9449
9450 case INTEGER_CST:
9451 temp = immed_double_const (TREE_INT_CST_LOW (exp),
9452 TREE_INT_CST_HIGH (exp), mode);
9453
9454 return temp;
9455
9456 case VECTOR_CST:
9457 {
9458 tree tmp = NULL_TREE;
9459 if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
9460 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
9461 || GET_MODE_CLASS (mode) == MODE_VECTOR_FRACT
9462 || GET_MODE_CLASS (mode) == MODE_VECTOR_UFRACT
9463 || GET_MODE_CLASS (mode) == MODE_VECTOR_ACCUM
9464 || GET_MODE_CLASS (mode) == MODE_VECTOR_UACCUM)
9465 return const_vector_from_tree (exp);
9466 if (GET_MODE_CLASS (mode) == MODE_INT)
9467 {
9468 tree type_for_mode = lang_hooks.types.type_for_mode (mode, 1);
9469 if (type_for_mode)
9470 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, type_for_mode, exp);
9471 }
9472 if (!tmp)
9473 {
9474 vec<constructor_elt, va_gc> *v;
9475 unsigned i;
9476 vec_alloc (v, VECTOR_CST_NELTS (exp));
9477 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
9478 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
9479 tmp = build_constructor (type, v);
9480 }
9481 return expand_expr (tmp, ignore ? const0_rtx : target,
9482 tmode, modifier);
9483 }
9484
9485 case CONST_DECL:
9486 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
9487
9488 case REAL_CST:
9489 /* If optimized, generate immediate CONST_DOUBLE
9490 which will be turned into memory by reload if necessary.
9491
9492 We used to force a register so that loop.c could see it. But
9493 this does not allow gen_* patterns to perform optimizations with
9494 the constants. It also produces two insns in cases like "x = 1.0;".
9495 On most machines, floating-point constants are not permitted in
9496 many insns, so we'd end up copying it to a register in any case.
9497
9498 Now, we do the copying in expand_binop, if appropriate. */
9499 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
9500 TYPE_MODE (TREE_TYPE (exp)));
9501
9502 case FIXED_CST:
9503 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
9504 TYPE_MODE (TREE_TYPE (exp)));
9505
9506 case COMPLEX_CST:
9507 /* Handle evaluating a complex constant in a CONCAT target. */
9508 if (original_target && GET_CODE (original_target) == CONCAT)
9509 {
9510 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
9511 rtx rtarg, itarg;
9512
9513 rtarg = XEXP (original_target, 0);
9514 itarg = XEXP (original_target, 1);
9515
9516 /* Move the real and imaginary parts separately. */
9517 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
9518 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
9519
9520 if (op0 != rtarg)
9521 emit_move_insn (rtarg, op0);
9522 if (op1 != itarg)
9523 emit_move_insn (itarg, op1);
9524
9525 return original_target;
9526 }
9527
9528 /* ... fall through ... */
9529
9530 case STRING_CST:
9531 temp = expand_expr_constant (exp, 1, modifier);
9532
9533 /* temp contains a constant address.
9534 On RISC machines where a constant address isn't valid,
9535 make some insns to get that address into a register. */
9536 if (modifier != EXPAND_CONST_ADDRESS
9537 && modifier != EXPAND_INITIALIZER
9538 && modifier != EXPAND_SUM
9539 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
9540 MEM_ADDR_SPACE (temp)))
9541 return replace_equiv_address (temp,
9542 copy_rtx (XEXP (temp, 0)));
9543 return temp;
9544
9545 case SAVE_EXPR:
9546 {
9547 tree val = treeop0;
9548 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
9549
9550 if (!SAVE_EXPR_RESOLVED_P (exp))
9551 {
9552 /* We can indeed still hit this case, typically via builtin
9553 expanders calling save_expr immediately before expanding
9554 something. Assume this means that we only have to deal
9555 with non-BLKmode values. */
9556 gcc_assert (GET_MODE (ret) != BLKmode);
9557
9558 val = build_decl (curr_insn_location (),
9559 VAR_DECL, NULL, TREE_TYPE (exp));
9560 DECL_ARTIFICIAL (val) = 1;
9561 DECL_IGNORED_P (val) = 1;
9562 treeop0 = val;
9563 TREE_OPERAND (exp, 0) = treeop0;
9564 SAVE_EXPR_RESOLVED_P (exp) = 1;
9565
9566 if (!CONSTANT_P (ret))
9567 ret = copy_to_reg (ret);
9568 SET_DECL_RTL (val, ret);
9569 }
9570
9571 return ret;
9572 }
9573
9574
9575 case CONSTRUCTOR:
9576 /* If we don't need the result, just ensure we evaluate any
9577 subexpressions. */
9578 if (ignore)
9579 {
9580 unsigned HOST_WIDE_INT idx;
9581 tree value;
9582
9583 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
9584 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
9585
9586 return const0_rtx;
9587 }
9588
9589 return expand_constructor (exp, target, modifier, false);
9590
9591 case TARGET_MEM_REF:
9592 {
9593 addr_space_t as
9594 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9595 struct mem_address addr;
9596 enum insn_code icode;
9597 unsigned int align;
9598
9599 get_address_description (exp, &addr);
9600 op0 = addr_for_mem_ref (&addr, as, true);
9601 op0 = memory_address_addr_space (mode, op0, as);
9602 temp = gen_rtx_MEM (mode, op0);
9603 set_mem_attributes (temp, exp, 0);
9604 set_mem_addr_space (temp, as);
9605 align = get_object_alignment (exp);
9606 if (modifier != EXPAND_WRITE
9607 && modifier != EXPAND_MEMORY
9608 && mode != BLKmode
9609 && align < GET_MODE_ALIGNMENT (mode)
9610 /* If the target does not have special handling for unaligned
9611 loads of mode then it can use regular moves for them. */
9612 && ((icode = optab_handler (movmisalign_optab, mode))
9613 != CODE_FOR_nothing))
9614 {
9615 struct expand_operand ops[2];
9616
9617 /* We've already validated the memory, and we're creating a
9618 new pseudo destination. The predicates really can't fail,
9619 nor can the generator. */
9620 create_output_operand (&ops[0], NULL_RTX, mode);
9621 create_fixed_operand (&ops[1], temp);
9622 expand_insn (icode, 2, ops);
9623 temp = ops[0].value;
9624 }
9625 return temp;
9626 }
9627
9628 case MEM_REF:
9629 {
9630 addr_space_t as
9631 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
9632 enum machine_mode address_mode;
9633 tree base = TREE_OPERAND (exp, 0);
9634 gimple def_stmt;
9635 enum insn_code icode;
9636 unsigned align;
9637 /* Handle expansion of non-aliased memory with non-BLKmode. That
9638 might end up in a register. */
9639 if (mem_ref_refers_to_non_mem_p (exp))
9640 {
9641 HOST_WIDE_INT offset = mem_ref_offset (exp).low;
9642 base = TREE_OPERAND (base, 0);
9643 if (offset == 0
9644 && host_integerp (TYPE_SIZE (type), 1)
9645 && (GET_MODE_BITSIZE (DECL_MODE (base))
9646 == TREE_INT_CST_LOW (TYPE_SIZE (type))))
9647 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
9648 target, tmode, modifier);
9649 if (TYPE_MODE (type) == BLKmode)
9650 {
9651 temp = assign_stack_temp (DECL_MODE (base),
9652 GET_MODE_SIZE (DECL_MODE (base)));
9653 store_expr (base, temp, 0, false);
9654 temp = adjust_address (temp, BLKmode, offset);
9655 set_mem_size (temp, int_size_in_bytes (type));
9656 return temp;
9657 }
9658 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
9659 bitsize_int (offset * BITS_PER_UNIT));
9660 return expand_expr (exp, target, tmode, modifier);
9661 }
9662 address_mode = targetm.addr_space.address_mode (as);
9663 base = TREE_OPERAND (exp, 0);
9664 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
9665 {
9666 tree mask = gimple_assign_rhs2 (def_stmt);
9667 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
9668 gimple_assign_rhs1 (def_stmt), mask);
9669 TREE_OPERAND (exp, 0) = base;
9670 }
9671 align = get_object_alignment (exp);
9672 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
9673 op0 = memory_address_addr_space (address_mode, op0, as);
9674 if (!integer_zerop (TREE_OPERAND (exp, 1)))
9675 {
9676 rtx off
9677 = immed_double_int_const (mem_ref_offset (exp), address_mode);
9678 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
9679 }
9680 op0 = memory_address_addr_space (mode, op0, as);
9681 temp = gen_rtx_MEM (mode, op0);
9682 set_mem_attributes (temp, exp, 0);
9683 set_mem_addr_space (temp, as);
9684 if (TREE_THIS_VOLATILE (exp))
9685 MEM_VOLATILE_P (temp) = 1;
9686 if (modifier != EXPAND_WRITE
9687 && modifier != EXPAND_MEMORY
9688 && mode != BLKmode
9689 && align < GET_MODE_ALIGNMENT (mode))
9690 {
9691 if ((icode = optab_handler (movmisalign_optab, mode))
9692 != CODE_FOR_nothing)
9693 {
9694 struct expand_operand ops[2];
9695
9696 /* We've already validated the memory, and we're creating a
9697 new pseudo destination. The predicates really can't fail,
9698 nor can the generator. */
9699 create_output_operand (&ops[0], NULL_RTX, mode);
9700 create_fixed_operand (&ops[1], temp);
9701 expand_insn (icode, 2, ops);
9702 temp = ops[0].value;
9703 }
9704 else if (SLOW_UNALIGNED_ACCESS (mode, align))
9705 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
9706 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
9707 true, (modifier == EXPAND_STACK_PARM
9708 ? NULL_RTX : target),
9709 mode, mode);
9710 }
9711 return temp;
9712 }
9713
9714 case ARRAY_REF:
9715
9716 {
9717 tree array = treeop0;
9718 tree index = treeop1;
9719 tree init;
9720
9721 /* Fold an expression like: "foo"[2].
9722 This is not done in fold so it won't happen inside &.
9723 Don't fold if this is for wide characters since it's too
9724 difficult to do correctly and this is a very rare case. */
9725
9726 if (modifier != EXPAND_CONST_ADDRESS
9727 && modifier != EXPAND_INITIALIZER
9728 && modifier != EXPAND_MEMORY)
9729 {
9730 tree t = fold_read_from_constant_string (exp);
9731
9732 if (t)
9733 return expand_expr (t, target, tmode, modifier);
9734 }
9735
9736 /* If this is a constant index into a constant array,
9737 just get the value from the array. Handle both the cases when
9738 we have an explicit constructor and when our operand is a variable
9739 that was declared const. */
9740
9741 if (modifier != EXPAND_CONST_ADDRESS
9742 && modifier != EXPAND_INITIALIZER
9743 && modifier != EXPAND_MEMORY
9744 && TREE_CODE (array) == CONSTRUCTOR
9745 && ! TREE_SIDE_EFFECTS (array)
9746 && TREE_CODE (index) == INTEGER_CST)
9747 {
9748 unsigned HOST_WIDE_INT ix;
9749 tree field, value;
9750
9751 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
9752 field, value)
9753 if (tree_int_cst_equal (field, index))
9754 {
9755 if (!TREE_SIDE_EFFECTS (value))
9756 return expand_expr (fold (value), target, tmode, modifier);
9757 break;
9758 }
9759 }
9760
9761 else if (optimize >= 1
9762 && modifier != EXPAND_CONST_ADDRESS
9763 && modifier != EXPAND_INITIALIZER
9764 && modifier != EXPAND_MEMORY
9765 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
9766 && TREE_CODE (index) == INTEGER_CST
9767 && (TREE_CODE (array) == VAR_DECL
9768 || TREE_CODE (array) == CONST_DECL)
9769 && (init = ctor_for_folding (array)) != error_mark_node)
9770 {
9771 if (TREE_CODE (init) == CONSTRUCTOR)
9772 {
9773 unsigned HOST_WIDE_INT ix;
9774 tree field, value;
9775
9776 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
9777 field, value)
9778 if (tree_int_cst_equal (field, index))
9779 {
9780 if (TREE_SIDE_EFFECTS (value))
9781 break;
9782
9783 if (TREE_CODE (value) == CONSTRUCTOR)
9784 {
9785 /* If VALUE is a CONSTRUCTOR, this
9786 optimization is only useful if
9787 this doesn't store the CONSTRUCTOR
9788 into memory. If it does, it is more
9789 efficient to just load the data from
9790 the array directly. */
9791 rtx ret = expand_constructor (value, target,
9792 modifier, true);
9793 if (ret == NULL_RTX)
9794 break;
9795 }
9796
9797 return
9798 expand_expr (fold (value), target, tmode, modifier);
9799 }
9800 }
9801 else if (TREE_CODE (init) == STRING_CST)
9802 {
9803 tree low_bound = array_ref_low_bound (exp);
9804 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
9805
9806 /* Optimize the special case of a zero lower bound.
9807
9808 We convert the lower bound to sizetype to avoid problems
9809 with constant folding. E.g. suppose the lower bound is
9810 1 and its mode is QI. Without the conversion
9811 (ARRAY + (INDEX - (unsigned char)1))
9812 becomes
9813 (ARRAY + (-(unsigned char)1) + INDEX)
9814 which becomes
9815 (ARRAY + 255 + INDEX). Oops! */
9816 if (!integer_zerop (low_bound))
9817 index1 = size_diffop_loc (loc, index1,
9818 fold_convert_loc (loc, sizetype,
9819 low_bound));
9820
9821 if (compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
9822 {
9823 tree type = TREE_TYPE (TREE_TYPE (init));
9824 enum machine_mode mode = TYPE_MODE (type);
9825
9826 if (GET_MODE_CLASS (mode) == MODE_INT
9827 && GET_MODE_SIZE (mode) == 1)
9828 return gen_int_mode (TREE_STRING_POINTER (init)
9829 [TREE_INT_CST_LOW (index1)],
9830 mode);
9831 }
9832 }
9833 }
9834 }
9835 goto normal_inner_ref;
9836
9837 case COMPONENT_REF:
9838 /* If the operand is a CONSTRUCTOR, we can just extract the
9839 appropriate field if it is present. */
9840 if (TREE_CODE (treeop0) == CONSTRUCTOR)
9841 {
9842 unsigned HOST_WIDE_INT idx;
9843 tree field, value;
9844
9845 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
9846 idx, field, value)
9847 if (field == treeop1
9848 /* We can normally use the value of the field in the
9849 CONSTRUCTOR. However, if this is a bitfield in
9850 an integral mode that we can fit in a HOST_WIDE_INT,
9851 we must mask only the number of bits in the bitfield,
9852 since this is done implicitly by the constructor. If
9853 the bitfield does not meet either of those conditions,
9854 we can't do this optimization. */
9855 && (! DECL_BIT_FIELD (field)
9856 || ((GET_MODE_CLASS (DECL_MODE (field)) == MODE_INT)
9857 && (GET_MODE_PRECISION (DECL_MODE (field))
9858 <= HOST_BITS_PER_WIDE_INT))))
9859 {
9860 if (DECL_BIT_FIELD (field)
9861 && modifier == EXPAND_STACK_PARM)
9862 target = 0;
9863 op0 = expand_expr (value, target, tmode, modifier);
9864 if (DECL_BIT_FIELD (field))
9865 {
9866 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
9867 enum machine_mode imode = TYPE_MODE (TREE_TYPE (field));
9868
9869 if (TYPE_UNSIGNED (TREE_TYPE (field)))
9870 {
9871 op1 = gen_int_mode (((HOST_WIDE_INT) 1 << bitsize) - 1,
9872 imode);
9873 op0 = expand_and (imode, op0, op1, target);
9874 }
9875 else
9876 {
9877 int count = GET_MODE_PRECISION (imode) - bitsize;
9878
9879 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
9880 target, 0);
9881 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
9882 target, 0);
9883 }
9884 }
9885
9886 return op0;
9887 }
9888 }
9889 goto normal_inner_ref;
9890
9891 case BIT_FIELD_REF:
9892 case ARRAY_RANGE_REF:
9893 normal_inner_ref:
9894 {
9895 enum machine_mode mode1, mode2;
9896 HOST_WIDE_INT bitsize, bitpos;
9897 tree offset;
9898 int volatilep = 0, must_force_mem;
9899 bool packedp = false;
9900 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
9901 &mode1, &unsignedp, &volatilep, true);
9902 rtx orig_op0, memloc;
9903 bool mem_attrs_from_type = false;
9904
9905 /* If we got back the original object, something is wrong. Perhaps
9906 we are evaluating an expression too early. In any event, don't
9907 infinitely recurse. */
9908 gcc_assert (tem != exp);
9909
9910 if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
9911 || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
9912 && DECL_PACKED (TREE_OPERAND (exp, 1))))
9913 packedp = true;
9914
9915 /* If TEM's type is a union of variable size, pass TARGET to the inner
9916 computation, since it will need a temporary and TARGET is known
9917 to have to do. This occurs in unchecked conversion in Ada. */
9918 orig_op0 = op0
9919 = expand_expr (tem,
9920 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
9921 && COMPLETE_TYPE_P (TREE_TYPE (tem))
9922 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
9923 != INTEGER_CST)
9924 && modifier != EXPAND_STACK_PARM
9925 ? target : NULL_RTX),
9926 VOIDmode,
9927 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
9928
9929 /* If the bitfield is volatile, we want to access it in the
9930 field's mode, not the computed mode.
9931 If a MEM has VOIDmode (external with incomplete type),
9932 use BLKmode for it instead. */
9933 if (MEM_P (op0))
9934 {
9935 if (volatilep && flag_strict_volatile_bitfields > 0)
9936 op0 = adjust_address (op0, mode1, 0);
9937 else if (GET_MODE (op0) == VOIDmode)
9938 op0 = adjust_address (op0, BLKmode, 0);
9939 }
9940
9941 mode2
9942 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
9943
9944 /* If we have either an offset, a BLKmode result, or a reference
9945 outside the underlying object, we must force it to memory.
9946 Such a case can occur in Ada if we have unchecked conversion
9947 of an expression from a scalar type to an aggregate type or
9948 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
9949 passed a partially uninitialized object or a view-conversion
9950 to a larger size. */
9951 must_force_mem = (offset
9952 || mode1 == BLKmode
9953 || bitpos + bitsize > GET_MODE_BITSIZE (mode2));
9954
9955 /* Handle CONCAT first. */
9956 if (GET_CODE (op0) == CONCAT && !must_force_mem)
9957 {
9958 if (bitpos == 0
9959 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)))
9960 return op0;
9961 if (bitpos == 0
9962 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9963 && bitsize)
9964 {
9965 op0 = XEXP (op0, 0);
9966 mode2 = GET_MODE (op0);
9967 }
9968 else if (bitpos == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))
9969 && bitsize == GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))
9970 && bitpos
9971 && bitsize)
9972 {
9973 op0 = XEXP (op0, 1);
9974 bitpos = 0;
9975 mode2 = GET_MODE (op0);
9976 }
9977 else
9978 /* Otherwise force into memory. */
9979 must_force_mem = 1;
9980 }
9981
9982 /* If this is a constant, put it in a register if it is a legitimate
9983 constant and we don't need a memory reference. */
9984 if (CONSTANT_P (op0)
9985 && mode2 != BLKmode
9986 && targetm.legitimate_constant_p (mode2, op0)
9987 && !must_force_mem)
9988 op0 = force_reg (mode2, op0);
9989
9990 /* Otherwise, if this is a constant, try to force it to the constant
9991 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
9992 is a legitimate constant. */
9993 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
9994 op0 = validize_mem (memloc);
9995
9996 /* Otherwise, if this is a constant or the object is not in memory
9997 and need be, put it there. */
9998 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
9999 {
10000 tree nt = build_qualified_type (TREE_TYPE (tem),
10001 (TYPE_QUALS (TREE_TYPE (tem))
10002 | TYPE_QUAL_CONST));
10003 memloc = assign_temp (nt, 1, 1);
10004 emit_move_insn (memloc, op0);
10005 op0 = memloc;
10006 mem_attrs_from_type = true;
10007 }
10008
10009 if (offset)
10010 {
10011 enum machine_mode address_mode;
10012 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10013 EXPAND_SUM);
10014
10015 gcc_assert (MEM_P (op0));
10016
10017 address_mode = get_address_mode (op0);
10018 if (GET_MODE (offset_rtx) != address_mode)
10019 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10020
10021 if (GET_MODE (op0) == BLKmode
10022 /* A constant address in OP0 can have VOIDmode, we must
10023 not try to call force_reg in that case. */
10024 && GET_MODE (XEXP (op0, 0)) != VOIDmode
10025 && bitsize != 0
10026 && (bitpos % bitsize) == 0
10027 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
10028 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
10029 {
10030 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10031 bitpos = 0;
10032 }
10033
10034 op0 = offset_address (op0, offset_rtx,
10035 highest_pow2_factor (offset));
10036 }
10037
10038 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10039 record its alignment as BIGGEST_ALIGNMENT. */
10040 if (MEM_P (op0) && bitpos == 0 && offset != 0
10041 && is_aligning_offset (offset, tem))
10042 set_mem_align (op0, BIGGEST_ALIGNMENT);
10043
10044 /* Don't forget about volatility even if this is a bitfield. */
10045 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10046 {
10047 if (op0 == orig_op0)
10048 op0 = copy_rtx (op0);
10049
10050 MEM_VOLATILE_P (op0) = 1;
10051 }
10052
10053 /* In cases where an aligned union has an unaligned object
10054 as a field, we might be extracting a BLKmode value from
10055 an integer-mode (e.g., SImode) object. Handle this case
10056 by doing the extract into an object as wide as the field
10057 (which we know to be the width of a basic mode), then
10058 storing into memory, and changing the mode to BLKmode. */
10059 if (mode1 == VOIDmode
10060 || REG_P (op0) || GET_CODE (op0) == SUBREG
10061 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10062 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10063 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10064 && modifier != EXPAND_CONST_ADDRESS
10065 && modifier != EXPAND_INITIALIZER
10066 && modifier != EXPAND_MEMORY)
10067 /* If the field is volatile, we always want an aligned
10068 access. Do this in following two situations:
10069 1. the access is not already naturally
10070 aligned, otherwise "normal" (non-bitfield) volatile fields
10071 become non-addressable.
10072 2. the bitsize is narrower than the access size. Need
10073 to extract bitfields from the access. */
10074 || (volatilep && flag_strict_volatile_bitfields > 0
10075 && (bitpos % GET_MODE_ALIGNMENT (mode) != 0
10076 || (mode1 != BLKmode
10077 && bitsize < GET_MODE_SIZE (mode1) * BITS_PER_UNIT)))
10078 /* If the field isn't aligned enough to fetch as a memref,
10079 fetch it as a bit field. */
10080 || (mode1 != BLKmode
10081 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10082 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
10083 || (MEM_P (op0)
10084 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10085 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
10086 && modifier != EXPAND_MEMORY
10087 && ((modifier == EXPAND_CONST_ADDRESS
10088 || modifier == EXPAND_INITIALIZER)
10089 ? STRICT_ALIGNMENT
10090 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
10091 || (bitpos % BITS_PER_UNIT != 0)))
10092 /* If the type and the field are a constant size and the
10093 size of the type isn't the same size as the bitfield,
10094 we must use bitfield operations. */
10095 || (bitsize >= 0
10096 && TYPE_SIZE (TREE_TYPE (exp))
10097 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
10098 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
10099 bitsize)))
10100 {
10101 enum machine_mode ext_mode = mode;
10102
10103 if (ext_mode == BLKmode
10104 && ! (target != 0 && MEM_P (op0)
10105 && MEM_P (target)
10106 && bitpos % BITS_PER_UNIT == 0))
10107 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
10108
10109 if (ext_mode == BLKmode)
10110 {
10111 if (target == 0)
10112 target = assign_temp (type, 1, 1);
10113
10114 if (bitsize == 0)
10115 return target;
10116
10117 /* In this case, BITPOS must start at a byte boundary and
10118 TARGET, if specified, must be a MEM. */
10119 gcc_assert (MEM_P (op0)
10120 && (!target || MEM_P (target))
10121 && !(bitpos % BITS_PER_UNIT));
10122
10123 emit_block_move (target,
10124 adjust_address (op0, VOIDmode,
10125 bitpos / BITS_PER_UNIT),
10126 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
10127 / BITS_PER_UNIT),
10128 (modifier == EXPAND_STACK_PARM
10129 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10130
10131 return target;
10132 }
10133
10134 op0 = validize_mem (op0);
10135
10136 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10137 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10138
10139 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
10140 (modifier == EXPAND_STACK_PARM
10141 ? NULL_RTX : target),
10142 ext_mode, ext_mode);
10143
10144 /* If the result is a record type and BITSIZE is narrower than
10145 the mode of OP0, an integral mode, and this is a big endian
10146 machine, we must put the field into the high-order bits. */
10147 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
10148 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
10149 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
10150 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
10151 GET_MODE_BITSIZE (GET_MODE (op0))
10152 - bitsize, op0, 1);
10153
10154 /* If the result type is BLKmode, store the data into a temporary
10155 of the appropriate type, but with the mode corresponding to the
10156 mode for the data we have (op0's mode). It's tempting to make
10157 this a constant type, since we know it's only being stored once,
10158 but that can cause problems if we are taking the address of this
10159 COMPONENT_REF because the MEM of any reference via that address
10160 will have flags corresponding to the type, which will not
10161 necessarily be constant. */
10162 if (mode == BLKmode)
10163 {
10164 rtx new_rtx;
10165
10166 new_rtx = assign_stack_temp_for_type (ext_mode,
10167 GET_MODE_BITSIZE (ext_mode),
10168 type);
10169 emit_move_insn (new_rtx, op0);
10170 op0 = copy_rtx (new_rtx);
10171 PUT_MODE (op0, BLKmode);
10172 }
10173
10174 return op0;
10175 }
10176
10177 /* If the result is BLKmode, use that to access the object
10178 now as well. */
10179 if (mode == BLKmode)
10180 mode1 = BLKmode;
10181
10182 /* Get a reference to just this component. */
10183 if (modifier == EXPAND_CONST_ADDRESS
10184 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10185 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
10186 else
10187 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
10188
10189 if (op0 == orig_op0)
10190 op0 = copy_rtx (op0);
10191
10192 /* If op0 is a temporary because of forcing to memory, pass only the
10193 type to set_mem_attributes so that the original expression is never
10194 marked as ADDRESSABLE through MEM_EXPR of the temporary. */
10195 if (mem_attrs_from_type)
10196 set_mem_attributes (op0, type, 0);
10197 else
10198 set_mem_attributes (op0, exp, 0);
10199
10200 if (REG_P (XEXP (op0, 0)))
10201 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10202
10203 MEM_VOLATILE_P (op0) |= volatilep;
10204 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
10205 || modifier == EXPAND_CONST_ADDRESS
10206 || modifier == EXPAND_INITIALIZER)
10207 return op0;
10208
10209 if (target == 0)
10210 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
10211
10212 convert_move (target, op0, unsignedp);
10213 return target;
10214 }
10215
10216 case OBJ_TYPE_REF:
10217 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
10218
10219 case CALL_EXPR:
10220 /* All valid uses of __builtin_va_arg_pack () are removed during
10221 inlining. */
10222 if (CALL_EXPR_VA_ARG_PACK (exp))
10223 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
10224 {
10225 tree fndecl = get_callee_fndecl (exp), attr;
10226
10227 if (fndecl
10228 && (attr = lookup_attribute ("error",
10229 DECL_ATTRIBUTES (fndecl))) != NULL)
10230 error ("%Kcall to %qs declared with attribute error: %s",
10231 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10232 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10233 if (fndecl
10234 && (attr = lookup_attribute ("warning",
10235 DECL_ATTRIBUTES (fndecl))) != NULL)
10236 warning_at (tree_nonartificial_location (exp),
10237 0, "%Kcall to %qs declared with attribute warning: %s",
10238 exp, identifier_to_locale (lang_hooks.decl_printable_name (fndecl, 1)),
10239 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
10240
10241 /* Check for a built-in function. */
10242 if (fndecl && DECL_BUILT_IN (fndecl))
10243 {
10244 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
10245 return expand_builtin (exp, target, subtarget, tmode, ignore);
10246 }
10247 }
10248 return expand_call (exp, target, ignore);
10249
10250 case VIEW_CONVERT_EXPR:
10251 op0 = NULL_RTX;
10252
10253 /* If we are converting to BLKmode, try to avoid an intermediate
10254 temporary by fetching an inner memory reference. */
10255 if (mode == BLKmode
10256 && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
10257 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
10258 && handled_component_p (treeop0))
10259 {
10260 enum machine_mode mode1;
10261 HOST_WIDE_INT bitsize, bitpos;
10262 tree offset;
10263 int unsignedp;
10264 int volatilep = 0;
10265 tree tem
10266 = get_inner_reference (treeop0, &bitsize, &bitpos,
10267 &offset, &mode1, &unsignedp, &volatilep,
10268 true);
10269 rtx orig_op0;
10270
10271 /* ??? We should work harder and deal with non-zero offsets. */
10272 if (!offset
10273 && (bitpos % BITS_PER_UNIT) == 0
10274 && bitsize >= 0
10275 && compare_tree_int (TYPE_SIZE (type), bitsize) == 0)
10276 {
10277 /* See the normal_inner_ref case for the rationale. */
10278 orig_op0
10279 = expand_expr (tem,
10280 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10281 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10282 != INTEGER_CST)
10283 && modifier != EXPAND_STACK_PARM
10284 ? target : NULL_RTX),
10285 VOIDmode,
10286 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
10287
10288 if (MEM_P (orig_op0))
10289 {
10290 op0 = orig_op0;
10291
10292 /* Get a reference to just this component. */
10293 if (modifier == EXPAND_CONST_ADDRESS
10294 || modifier == EXPAND_SUM
10295 || modifier == EXPAND_INITIALIZER)
10296 op0 = adjust_address_nv (op0, mode, bitpos / BITS_PER_UNIT);
10297 else
10298 op0 = adjust_address (op0, mode, bitpos / BITS_PER_UNIT);
10299
10300 if (op0 == orig_op0)
10301 op0 = copy_rtx (op0);
10302
10303 set_mem_attributes (op0, treeop0, 0);
10304 if (REG_P (XEXP (op0, 0)))
10305 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10306
10307 MEM_VOLATILE_P (op0) |= volatilep;
10308 }
10309 }
10310 }
10311
10312 if (!op0)
10313 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
10314
10315 /* If the input and output modes are both the same, we are done. */
10316 if (mode == GET_MODE (op0))
10317 ;
10318 /* If neither mode is BLKmode, and both modes are the same size
10319 then we can use gen_lowpart. */
10320 else if (mode != BLKmode && GET_MODE (op0) != BLKmode
10321 && (GET_MODE_PRECISION (mode)
10322 == GET_MODE_PRECISION (GET_MODE (op0)))
10323 && !COMPLEX_MODE_P (GET_MODE (op0)))
10324 {
10325 if (GET_CODE (op0) == SUBREG)
10326 op0 = force_reg (GET_MODE (op0), op0);
10327 temp = gen_lowpart_common (mode, op0);
10328 if (temp)
10329 op0 = temp;
10330 else
10331 {
10332 if (!REG_P (op0) && !MEM_P (op0))
10333 op0 = force_reg (GET_MODE (op0), op0);
10334 op0 = gen_lowpart (mode, op0);
10335 }
10336 }
10337 /* If both types are integral, convert from one mode to the other. */
10338 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
10339 op0 = convert_modes (mode, GET_MODE (op0), op0,
10340 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
10341 /* As a last resort, spill op0 to memory, and reload it in a
10342 different mode. */
10343 else if (!MEM_P (op0))
10344 {
10345 /* If the operand is not a MEM, force it into memory. Since we
10346 are going to be changing the mode of the MEM, don't call
10347 force_const_mem for constants because we don't allow pool
10348 constants to change mode. */
10349 tree inner_type = TREE_TYPE (treeop0);
10350
10351 gcc_assert (!TREE_ADDRESSABLE (exp));
10352
10353 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
10354 target
10355 = assign_stack_temp_for_type
10356 (TYPE_MODE (inner_type),
10357 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
10358
10359 emit_move_insn (target, op0);
10360 op0 = target;
10361 }
10362
10363 /* At this point, OP0 is in the correct mode. If the output type is
10364 such that the operand is known to be aligned, indicate that it is.
10365 Otherwise, we need only be concerned about alignment for non-BLKmode
10366 results. */
10367 if (MEM_P (op0))
10368 {
10369 enum insn_code icode;
10370
10371 if (TYPE_ALIGN_OK (type))
10372 {
10373 /* ??? Copying the MEM without substantially changing it might
10374 run afoul of the code handling volatile memory references in
10375 store_expr, which assumes that TARGET is returned unmodified
10376 if it has been used. */
10377 op0 = copy_rtx (op0);
10378 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
10379 }
10380 else if (mode != BLKmode
10381 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)
10382 /* If the target does have special handling for unaligned
10383 loads of mode then use them. */
10384 && ((icode = optab_handler (movmisalign_optab, mode))
10385 != CODE_FOR_nothing))
10386 {
10387 rtx reg, insn;
10388
10389 op0 = adjust_address (op0, mode, 0);
10390 /* We've already validated the memory, and we're creating a
10391 new pseudo destination. The predicates really can't
10392 fail. */
10393 reg = gen_reg_rtx (mode);
10394
10395 /* Nor can the insn generator. */
10396 insn = GEN_FCN (icode) (reg, op0);
10397 emit_insn (insn);
10398 return reg;
10399 }
10400 else if (STRICT_ALIGNMENT
10401 && mode != BLKmode
10402 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
10403 {
10404 tree inner_type = TREE_TYPE (treeop0);
10405 HOST_WIDE_INT temp_size
10406 = MAX (int_size_in_bytes (inner_type),
10407 (HOST_WIDE_INT) GET_MODE_SIZE (mode));
10408 rtx new_rtx
10409 = assign_stack_temp_for_type (mode, temp_size, type);
10410 rtx new_with_op0_mode
10411 = adjust_address (new_rtx, GET_MODE (op0), 0);
10412
10413 gcc_assert (!TREE_ADDRESSABLE (exp));
10414
10415 if (GET_MODE (op0) == BLKmode)
10416 emit_block_move (new_with_op0_mode, op0,
10417 GEN_INT (GET_MODE_SIZE (mode)),
10418 (modifier == EXPAND_STACK_PARM
10419 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10420 else
10421 emit_move_insn (new_with_op0_mode, op0);
10422
10423 op0 = new_rtx;
10424 }
10425
10426 op0 = adjust_address (op0, mode, 0);
10427 }
10428
10429 return op0;
10430
10431 case MODIFY_EXPR:
10432 {
10433 tree lhs = treeop0;
10434 tree rhs = treeop1;
10435 gcc_assert (ignore);
10436
10437 /* Check for |= or &= of a bitfield of size one into another bitfield
10438 of size 1. In this case, (unless we need the result of the
10439 assignment) we can do this more efficiently with a
10440 test followed by an assignment, if necessary.
10441
10442 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10443 things change so we do, this code should be enhanced to
10444 support it. */
10445 if (TREE_CODE (lhs) == COMPONENT_REF
10446 && (TREE_CODE (rhs) == BIT_IOR_EXPR
10447 || TREE_CODE (rhs) == BIT_AND_EXPR)
10448 && TREE_OPERAND (rhs, 0) == lhs
10449 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
10450 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
10451 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
10452 {
10453 rtx label = gen_label_rtx ();
10454 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
10455 do_jump (TREE_OPERAND (rhs, 1),
10456 value ? label : 0,
10457 value ? 0 : label, -1);
10458 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
10459 false);
10460 do_pending_stack_adjust ();
10461 emit_label (label);
10462 return const0_rtx;
10463 }
10464
10465 expand_assignment (lhs, rhs, false);
10466 return const0_rtx;
10467 }
10468
10469 case ADDR_EXPR:
10470 return expand_expr_addr_expr (exp, target, tmode, modifier);
10471
10472 case REALPART_EXPR:
10473 op0 = expand_normal (treeop0);
10474 return read_complex_part (op0, false);
10475
10476 case IMAGPART_EXPR:
10477 op0 = expand_normal (treeop0);
10478 return read_complex_part (op0, true);
10479
10480 case RETURN_EXPR:
10481 case LABEL_EXPR:
10482 case GOTO_EXPR:
10483 case SWITCH_EXPR:
10484 case ASM_EXPR:
10485 /* Expanded in cfgexpand.c. */
10486 gcc_unreachable ();
10487
10488 case TRY_CATCH_EXPR:
10489 case CATCH_EXPR:
10490 case EH_FILTER_EXPR:
10491 case TRY_FINALLY_EXPR:
10492 /* Lowered by tree-eh.c. */
10493 gcc_unreachable ();
10494
10495 case WITH_CLEANUP_EXPR:
10496 case CLEANUP_POINT_EXPR:
10497 case TARGET_EXPR:
10498 case CASE_LABEL_EXPR:
10499 case VA_ARG_EXPR:
10500 case BIND_EXPR:
10501 case INIT_EXPR:
10502 case CONJ_EXPR:
10503 case COMPOUND_EXPR:
10504 case PREINCREMENT_EXPR:
10505 case PREDECREMENT_EXPR:
10506 case POSTINCREMENT_EXPR:
10507 case POSTDECREMENT_EXPR:
10508 case LOOP_EXPR:
10509 case EXIT_EXPR:
10510 case COMPOUND_LITERAL_EXPR:
10511 /* Lowered by gimplify.c. */
10512 gcc_unreachable ();
10513
10514 case FDESC_EXPR:
10515 /* Function descriptors are not valid except for as
10516 initialization constants, and should not be expanded. */
10517 gcc_unreachable ();
10518
10519 case WITH_SIZE_EXPR:
10520 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10521 have pulled out the size to use in whatever context it needed. */
10522 return expand_expr_real (treeop0, original_target, tmode,
10523 modifier, alt_rtl);
10524
10525 default:
10526 return expand_expr_real_2 (&ops, target, tmode, modifier);
10527 }
10528 }
10529 \f
10530 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10531 signedness of TYPE), possibly returning the result in TARGET. */
10532 static rtx
10533 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
10534 {
10535 HOST_WIDE_INT prec = TYPE_PRECISION (type);
10536 if (target && GET_MODE (target) != GET_MODE (exp))
10537 target = 0;
10538 /* For constant values, reduce using build_int_cst_type. */
10539 if (CONST_INT_P (exp))
10540 {
10541 HOST_WIDE_INT value = INTVAL (exp);
10542 tree t = build_int_cst_type (type, value);
10543 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
10544 }
10545 else if (TYPE_UNSIGNED (type))
10546 {
10547 rtx mask = immed_double_int_const (double_int::mask (prec),
10548 GET_MODE (exp));
10549 return expand_and (GET_MODE (exp), exp, mask, target);
10550 }
10551 else
10552 {
10553 int count = GET_MODE_PRECISION (GET_MODE (exp)) - prec;
10554 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp),
10555 exp, count, target, 0);
10556 return expand_shift (RSHIFT_EXPR, GET_MODE (exp),
10557 exp, count, target, 0);
10558 }
10559 }
10560 \f
10561 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10562 when applied to the address of EXP produces an address known to be
10563 aligned more than BIGGEST_ALIGNMENT. */
10564
10565 static int
10566 is_aligning_offset (const_tree offset, const_tree exp)
10567 {
10568 /* Strip off any conversions. */
10569 while (CONVERT_EXPR_P (offset))
10570 offset = TREE_OPERAND (offset, 0);
10571
10572 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10573 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10574 if (TREE_CODE (offset) != BIT_AND_EXPR
10575 || !host_integerp (TREE_OPERAND (offset, 1), 1)
10576 || compare_tree_int (TREE_OPERAND (offset, 1),
10577 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
10578 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
10579 return 0;
10580
10581 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10582 It must be NEGATE_EXPR. Then strip any more conversions. */
10583 offset = TREE_OPERAND (offset, 0);
10584 while (CONVERT_EXPR_P (offset))
10585 offset = TREE_OPERAND (offset, 0);
10586
10587 if (TREE_CODE (offset) != NEGATE_EXPR)
10588 return 0;
10589
10590 offset = TREE_OPERAND (offset, 0);
10591 while (CONVERT_EXPR_P (offset))
10592 offset = TREE_OPERAND (offset, 0);
10593
10594 /* This must now be the address of EXP. */
10595 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
10596 }
10597 \f
10598 /* Return the tree node if an ARG corresponds to a string constant or zero
10599 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10600 in bytes within the string that ARG is accessing. The type of the
10601 offset will be `sizetype'. */
10602
10603 tree
10604 string_constant (tree arg, tree *ptr_offset)
10605 {
10606 tree array, offset, lower_bound;
10607 STRIP_NOPS (arg);
10608
10609 if (TREE_CODE (arg) == ADDR_EXPR)
10610 {
10611 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
10612 {
10613 *ptr_offset = size_zero_node;
10614 return TREE_OPERAND (arg, 0);
10615 }
10616 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
10617 {
10618 array = TREE_OPERAND (arg, 0);
10619 offset = size_zero_node;
10620 }
10621 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
10622 {
10623 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10624 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10625 if (TREE_CODE (array) != STRING_CST
10626 && TREE_CODE (array) != VAR_DECL)
10627 return 0;
10628
10629 /* Check if the array has a nonzero lower bound. */
10630 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
10631 if (!integer_zerop (lower_bound))
10632 {
10633 /* If the offset and base aren't both constants, return 0. */
10634 if (TREE_CODE (lower_bound) != INTEGER_CST)
10635 return 0;
10636 if (TREE_CODE (offset) != INTEGER_CST)
10637 return 0;
10638 /* Adjust offset by the lower bound. */
10639 offset = size_diffop (fold_convert (sizetype, offset),
10640 fold_convert (sizetype, lower_bound));
10641 }
10642 }
10643 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
10644 {
10645 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
10646 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
10647 if (TREE_CODE (array) != ADDR_EXPR)
10648 return 0;
10649 array = TREE_OPERAND (array, 0);
10650 if (TREE_CODE (array) != STRING_CST
10651 && TREE_CODE (array) != VAR_DECL)
10652 return 0;
10653 }
10654 else
10655 return 0;
10656 }
10657 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
10658 {
10659 tree arg0 = TREE_OPERAND (arg, 0);
10660 tree arg1 = TREE_OPERAND (arg, 1);
10661
10662 STRIP_NOPS (arg0);
10663 STRIP_NOPS (arg1);
10664
10665 if (TREE_CODE (arg0) == ADDR_EXPR
10666 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
10667 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
10668 {
10669 array = TREE_OPERAND (arg0, 0);
10670 offset = arg1;
10671 }
10672 else if (TREE_CODE (arg1) == ADDR_EXPR
10673 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
10674 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
10675 {
10676 array = TREE_OPERAND (arg1, 0);
10677 offset = arg0;
10678 }
10679 else
10680 return 0;
10681 }
10682 else
10683 return 0;
10684
10685 if (TREE_CODE (array) == STRING_CST)
10686 {
10687 *ptr_offset = fold_convert (sizetype, offset);
10688 return array;
10689 }
10690 else if (TREE_CODE (array) == VAR_DECL
10691 || TREE_CODE (array) == CONST_DECL)
10692 {
10693 int length;
10694 tree init = ctor_for_folding (array);
10695
10696 /* Variables initialized to string literals can be handled too. */
10697 if (init == error_mark_node
10698 || !init
10699 || TREE_CODE (init) != STRING_CST)
10700 return 0;
10701
10702 /* Avoid const char foo[4] = "abcde"; */
10703 if (DECL_SIZE_UNIT (array) == NULL_TREE
10704 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
10705 || (length = TREE_STRING_LENGTH (init)) <= 0
10706 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
10707 return 0;
10708
10709 /* If variable is bigger than the string literal, OFFSET must be constant
10710 and inside of the bounds of the string literal. */
10711 offset = fold_convert (sizetype, offset);
10712 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
10713 && (! host_integerp (offset, 1)
10714 || compare_tree_int (offset, length) >= 0))
10715 return 0;
10716
10717 *ptr_offset = offset;
10718 return init;
10719 }
10720
10721 return 0;
10722 }
10723 \f
10724 /* Generate code to calculate OPS, and exploded expression
10725 using a store-flag instruction and return an rtx for the result.
10726 OPS reflects a comparison.
10727
10728 If TARGET is nonzero, store the result there if convenient.
10729
10730 Return zero if there is no suitable set-flag instruction
10731 available on this machine.
10732
10733 Once expand_expr has been called on the arguments of the comparison,
10734 we are committed to doing the store flag, since it is not safe to
10735 re-evaluate the expression. We emit the store-flag insn by calling
10736 emit_store_flag, but only expand the arguments if we have a reason
10737 to believe that emit_store_flag will be successful. If we think that
10738 it will, but it isn't, we have to simulate the store-flag with a
10739 set/jump/set sequence. */
10740
10741 static rtx
10742 do_store_flag (sepops ops, rtx target, enum machine_mode mode)
10743 {
10744 enum rtx_code code;
10745 tree arg0, arg1, type;
10746 tree tem;
10747 enum machine_mode operand_mode;
10748 int unsignedp;
10749 rtx op0, op1;
10750 rtx subtarget = target;
10751 location_t loc = ops->location;
10752
10753 arg0 = ops->op0;
10754 arg1 = ops->op1;
10755
10756 /* Don't crash if the comparison was erroneous. */
10757 if (arg0 == error_mark_node || arg1 == error_mark_node)
10758 return const0_rtx;
10759
10760 type = TREE_TYPE (arg0);
10761 operand_mode = TYPE_MODE (type);
10762 unsignedp = TYPE_UNSIGNED (type);
10763
10764 /* We won't bother with BLKmode store-flag operations because it would mean
10765 passing a lot of information to emit_store_flag. */
10766 if (operand_mode == BLKmode)
10767 return 0;
10768
10769 /* We won't bother with store-flag operations involving function pointers
10770 when function pointers must be canonicalized before comparisons. */
10771 #ifdef HAVE_canonicalize_funcptr_for_compare
10772 if (HAVE_canonicalize_funcptr_for_compare
10773 && ((TREE_CODE (TREE_TYPE (arg0)) == POINTER_TYPE
10774 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0)))
10775 == FUNCTION_TYPE))
10776 || (TREE_CODE (TREE_TYPE (arg1)) == POINTER_TYPE
10777 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1)))
10778 == FUNCTION_TYPE))))
10779 return 0;
10780 #endif
10781
10782 STRIP_NOPS (arg0);
10783 STRIP_NOPS (arg1);
10784
10785 /* For vector typed comparisons emit code to generate the desired
10786 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
10787 expander for this. */
10788 if (TREE_CODE (ops->type) == VECTOR_TYPE)
10789 {
10790 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
10791 tree if_true = constant_boolean_node (true, ops->type);
10792 tree if_false = constant_boolean_node (false, ops->type);
10793 return expand_vec_cond_expr (ops->type, ifexp, if_true, if_false, target);
10794 }
10795
10796 /* Get the rtx comparison code to use. We know that EXP is a comparison
10797 operation of some type. Some comparisons against 1 and -1 can be
10798 converted to comparisons with zero. Do so here so that the tests
10799 below will be aware that we have a comparison with zero. These
10800 tests will not catch constants in the first operand, but constants
10801 are rarely passed as the first operand. */
10802
10803 switch (ops->code)
10804 {
10805 case EQ_EXPR:
10806 code = EQ;
10807 break;
10808 case NE_EXPR:
10809 code = NE;
10810 break;
10811 case LT_EXPR:
10812 if (integer_onep (arg1))
10813 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
10814 else
10815 code = unsignedp ? LTU : LT;
10816 break;
10817 case LE_EXPR:
10818 if (! unsignedp && integer_all_onesp (arg1))
10819 arg1 = integer_zero_node, code = LT;
10820 else
10821 code = unsignedp ? LEU : LE;
10822 break;
10823 case GT_EXPR:
10824 if (! unsignedp && integer_all_onesp (arg1))
10825 arg1 = integer_zero_node, code = GE;
10826 else
10827 code = unsignedp ? GTU : GT;
10828 break;
10829 case GE_EXPR:
10830 if (integer_onep (arg1))
10831 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
10832 else
10833 code = unsignedp ? GEU : GE;
10834 break;
10835
10836 case UNORDERED_EXPR:
10837 code = UNORDERED;
10838 break;
10839 case ORDERED_EXPR:
10840 code = ORDERED;
10841 break;
10842 case UNLT_EXPR:
10843 code = UNLT;
10844 break;
10845 case UNLE_EXPR:
10846 code = UNLE;
10847 break;
10848 case UNGT_EXPR:
10849 code = UNGT;
10850 break;
10851 case UNGE_EXPR:
10852 code = UNGE;
10853 break;
10854 case UNEQ_EXPR:
10855 code = UNEQ;
10856 break;
10857 case LTGT_EXPR:
10858 code = LTGT;
10859 break;
10860
10861 default:
10862 gcc_unreachable ();
10863 }
10864
10865 /* Put a constant second. */
10866 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
10867 || TREE_CODE (arg0) == FIXED_CST)
10868 {
10869 tem = arg0; arg0 = arg1; arg1 = tem;
10870 code = swap_condition (code);
10871 }
10872
10873 /* If this is an equality or inequality test of a single bit, we can
10874 do this by shifting the bit being tested to the low-order bit and
10875 masking the result with the constant 1. If the condition was EQ,
10876 we xor it with 1. This does not require an scc insn and is faster
10877 than an scc insn even if we have it.
10878
10879 The code to make this transformation was moved into fold_single_bit_test,
10880 so we just call into the folder and expand its result. */
10881
10882 if ((code == NE || code == EQ)
10883 && integer_zerop (arg1)
10884 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
10885 {
10886 gimple srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
10887 if (srcstmt
10888 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
10889 {
10890 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
10891 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
10892 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
10893 gimple_assign_rhs1 (srcstmt),
10894 gimple_assign_rhs2 (srcstmt));
10895 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
10896 if (temp)
10897 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
10898 }
10899 }
10900
10901 if (! get_subtarget (target)
10902 || GET_MODE (subtarget) != operand_mode)
10903 subtarget = 0;
10904
10905 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
10906
10907 if (target == 0)
10908 target = gen_reg_rtx (mode);
10909
10910 /* Try a cstore if possible. */
10911 return emit_store_flag_force (target, code, op0, op1,
10912 operand_mode, unsignedp,
10913 (TYPE_PRECISION (ops->type) == 1
10914 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
10915 }
10916 \f
10917
10918 /* Stubs in case we haven't got a casesi insn. */
10919 #ifndef HAVE_casesi
10920 # define HAVE_casesi 0
10921 # define gen_casesi(a, b, c, d, e) (0)
10922 # define CODE_FOR_casesi CODE_FOR_nothing
10923 #endif
10924
10925 /* Attempt to generate a casesi instruction. Returns 1 if successful,
10926 0 otherwise (i.e. if there is no casesi instruction).
10927
10928 DEFAULT_PROBABILITY is the probability of jumping to the default
10929 label. */
10930 int
10931 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
10932 rtx table_label, rtx default_label, rtx fallback_label,
10933 int default_probability)
10934 {
10935 struct expand_operand ops[5];
10936 enum machine_mode index_mode = SImode;
10937 rtx op1, op2, index;
10938
10939 if (! HAVE_casesi)
10940 return 0;
10941
10942 /* Convert the index to SImode. */
10943 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
10944 {
10945 enum machine_mode omode = TYPE_MODE (index_type);
10946 rtx rangertx = expand_normal (range);
10947
10948 /* We must handle the endpoints in the original mode. */
10949 index_expr = build2 (MINUS_EXPR, index_type,
10950 index_expr, minval);
10951 minval = integer_zero_node;
10952 index = expand_normal (index_expr);
10953 if (default_label)
10954 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
10955 omode, 1, default_label,
10956 default_probability);
10957 /* Now we can safely truncate. */
10958 index = convert_to_mode (index_mode, index, 0);
10959 }
10960 else
10961 {
10962 if (TYPE_MODE (index_type) != index_mode)
10963 {
10964 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
10965 index_expr = fold_convert (index_type, index_expr);
10966 }
10967
10968 index = expand_normal (index_expr);
10969 }
10970
10971 do_pending_stack_adjust ();
10972
10973 op1 = expand_normal (minval);
10974 op2 = expand_normal (range);
10975
10976 create_input_operand (&ops[0], index, index_mode);
10977 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
10978 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
10979 create_fixed_operand (&ops[3], table_label);
10980 create_fixed_operand (&ops[4], (default_label
10981 ? default_label
10982 : fallback_label));
10983 expand_jump_insn (CODE_FOR_casesi, 5, ops);
10984 return 1;
10985 }
10986
10987 /* Attempt to generate a tablejump instruction; same concept. */
10988 #ifndef HAVE_tablejump
10989 #define HAVE_tablejump 0
10990 #define gen_tablejump(x, y) (0)
10991 #endif
10992
10993 /* Subroutine of the next function.
10994
10995 INDEX is the value being switched on, with the lowest value
10996 in the table already subtracted.
10997 MODE is its expected mode (needed if INDEX is constant).
10998 RANGE is the length of the jump table.
10999 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11000
11001 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11002 index value is out of range.
11003 DEFAULT_PROBABILITY is the probability of jumping to
11004 the default label. */
11005
11006 static void
11007 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
11008 rtx default_label, int default_probability)
11009 {
11010 rtx temp, vector;
11011
11012 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11013 cfun->cfg->max_jumptable_ents = INTVAL (range);
11014
11015 /* Do an unsigned comparison (in the proper mode) between the index
11016 expression and the value which represents the length of the range.
11017 Since we just finished subtracting the lower bound of the range
11018 from the index expression, this comparison allows us to simultaneously
11019 check that the original index expression value is both greater than
11020 or equal to the minimum value of the range and less than or equal to
11021 the maximum value of the range. */
11022
11023 if (default_label)
11024 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11025 default_label, default_probability);
11026
11027
11028 /* If index is in range, it must fit in Pmode.
11029 Convert to Pmode so we can index with it. */
11030 if (mode != Pmode)
11031 index = convert_to_mode (Pmode, index, 1);
11032
11033 /* Don't let a MEM slip through, because then INDEX that comes
11034 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11035 and break_out_memory_refs will go to work on it and mess it up. */
11036 #ifdef PIC_CASE_VECTOR_ADDRESS
11037 if (flag_pic && !REG_P (index))
11038 index = copy_to_mode_reg (Pmode, index);
11039 #endif
11040
11041 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11042 GET_MODE_SIZE, because this indicates how large insns are. The other
11043 uses should all be Pmode, because they are addresses. This code
11044 could fail if addresses and insns are not the same size. */
11045 index = gen_rtx_PLUS
11046 (Pmode,
11047 gen_rtx_MULT (Pmode, index,
11048 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE), Pmode)),
11049 gen_rtx_LABEL_REF (Pmode, table_label));
11050 #ifdef PIC_CASE_VECTOR_ADDRESS
11051 if (flag_pic)
11052 index = PIC_CASE_VECTOR_ADDRESS (index);
11053 else
11054 #endif
11055 index = memory_address (CASE_VECTOR_MODE, index);
11056 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11057 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11058 convert_move (temp, vector, 0);
11059
11060 emit_jump_insn (gen_tablejump (temp, table_label));
11061
11062 /* If we are generating PIC code or if the table is PC-relative, the
11063 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11064 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11065 emit_barrier ();
11066 }
11067
11068 int
11069 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11070 rtx table_label, rtx default_label, int default_probability)
11071 {
11072 rtx index;
11073
11074 if (! HAVE_tablejump)
11075 return 0;
11076
11077 index_expr = fold_build2 (MINUS_EXPR, index_type,
11078 fold_convert (index_type, index_expr),
11079 fold_convert (index_type, minval));
11080 index = expand_normal (index_expr);
11081 do_pending_stack_adjust ();
11082
11083 do_tablejump (index, TYPE_MODE (index_type),
11084 convert_modes (TYPE_MODE (index_type),
11085 TYPE_MODE (TREE_TYPE (range)),
11086 expand_normal (range),
11087 TYPE_UNSIGNED (TREE_TYPE (range))),
11088 table_label, default_label, default_probability);
11089 return 1;
11090 }
11091
11092 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11093 static rtx
11094 const_vector_from_tree (tree exp)
11095 {
11096 rtvec v;
11097 unsigned i;
11098 int units;
11099 tree elt;
11100 enum machine_mode inner, mode;
11101
11102 mode = TYPE_MODE (TREE_TYPE (exp));
11103
11104 if (initializer_zerop (exp))
11105 return CONST0_RTX (mode);
11106
11107 units = GET_MODE_NUNITS (mode);
11108 inner = GET_MODE_INNER (mode);
11109
11110 v = rtvec_alloc (units);
11111
11112 for (i = 0; i < VECTOR_CST_NELTS (exp); ++i)
11113 {
11114 elt = VECTOR_CST_ELT (exp, i);
11115
11116 if (TREE_CODE (elt) == REAL_CST)
11117 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
11118 inner);
11119 else if (TREE_CODE (elt) == FIXED_CST)
11120 RTVEC_ELT (v, i) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11121 inner);
11122 else
11123 RTVEC_ELT (v, i) = immed_double_int_const (tree_to_double_int (elt),
11124 inner);
11125 }
11126
11127 return gen_rtx_CONST_VECTOR (mode, v);
11128 }
11129
11130 /* Build a decl for a personality function given a language prefix. */
11131
11132 tree
11133 build_personality_function (const char *lang)
11134 {
11135 const char *unwind_and_version;
11136 tree decl, type;
11137 char *name;
11138
11139 switch (targetm_common.except_unwind_info (&global_options))
11140 {
11141 case UI_NONE:
11142 return NULL;
11143 case UI_SJLJ:
11144 unwind_and_version = "_sj0";
11145 break;
11146 case UI_DWARF2:
11147 case UI_TARGET:
11148 unwind_and_version = "_v0";
11149 break;
11150 case UI_SEH:
11151 unwind_and_version = "_seh0";
11152 break;
11153 default:
11154 gcc_unreachable ();
11155 }
11156
11157 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
11158
11159 type = build_function_type_list (integer_type_node, integer_type_node,
11160 long_long_unsigned_type_node,
11161 ptr_type_node, ptr_type_node, NULL_TREE);
11162 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
11163 get_identifier (name), type);
11164 DECL_ARTIFICIAL (decl) = 1;
11165 DECL_EXTERNAL (decl) = 1;
11166 TREE_PUBLIC (decl) = 1;
11167
11168 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11169 are the flags assigned by targetm.encode_section_info. */
11170 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
11171
11172 return decl;
11173 }
11174
11175 /* Extracts the personality function of DECL and returns the corresponding
11176 libfunc. */
11177
11178 rtx
11179 get_personality_function (tree decl)
11180 {
11181 tree personality = DECL_FUNCTION_PERSONALITY (decl);
11182 enum eh_personality_kind pk;
11183
11184 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
11185 if (pk == eh_personality_none)
11186 return NULL;
11187
11188 if (!personality
11189 && pk == eh_personality_any)
11190 personality = lang_hooks.eh_personality ();
11191
11192 if (pk == eh_personality_lang)
11193 gcc_assert (personality != NULL_TREE);
11194
11195 return XEXP (DECL_RTL (personality), 0);
11196 }
11197
11198 #include "gt-expr.h"