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1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "machmode.h"
27 #include "real.h"
28 #include "rtl.h"
29 #include "tree.h"
30 #include "flags.h"
31 #include "regs.h"
32 #include "hard-reg-set.h"
33 #include "except.h"
34 #include "function.h"
35 #include "insn-config.h"
36 #include "insn-attr.h"
37 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
38 #include "expr.h"
39 #include "optabs.h"
40 #include "libfuncs.h"
41 #include "recog.h"
42 #include "reload.h"
43 #include "output.h"
44 #include "typeclass.h"
45 #include "toplev.h"
46 #include "ggc.h"
47 #include "langhooks.h"
48 #include "intl.h"
49 #include "tm_p.h"
50 #include "tree-iterator.h"
51 #include "tree-pass.h"
52 #include "tree-flow.h"
53 #include "target.h"
54 #include "timevar.h"
55
56 /* Decide whether a function's arguments should be processed
57 from first to last or from last to first.
58
59 They should if the stack and args grow in opposite directions, but
60 only if we have push insns. */
61
62 #ifdef PUSH_ROUNDING
63
64 #ifndef PUSH_ARGS_REVERSED
65 #if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
66 #define PUSH_ARGS_REVERSED /* If it's last to first. */
67 #endif
68 #endif
69
70 #endif
71
72 #ifndef STACK_PUSH_CODE
73 #ifdef STACK_GROWS_DOWNWARD
74 #define STACK_PUSH_CODE PRE_DEC
75 #else
76 #define STACK_PUSH_CODE PRE_INC
77 #endif
78 #endif
79
80
81 /* If this is nonzero, we do not bother generating VOLATILE
82 around volatile memory references, and we are willing to
83 output indirect addresses. If cse is to follow, we reject
84 indirect addresses so a useful potential cse is generated;
85 if it is used only once, instruction combination will produce
86 the same indirect address eventually. */
87 int cse_not_expected;
88
89 /* This structure is used by move_by_pieces to describe the move to
90 be performed. */
91 struct move_by_pieces
92 {
93 rtx to;
94 rtx to_addr;
95 int autinc_to;
96 int explicit_inc_to;
97 rtx from;
98 rtx from_addr;
99 int autinc_from;
100 int explicit_inc_from;
101 unsigned HOST_WIDE_INT len;
102 HOST_WIDE_INT offset;
103 int reverse;
104 };
105
106 /* This structure is used by store_by_pieces to describe the clear to
107 be performed. */
108
109 struct store_by_pieces
110 {
111 rtx to;
112 rtx to_addr;
113 int autinc_to;
114 int explicit_inc_to;
115 unsigned HOST_WIDE_INT len;
116 HOST_WIDE_INT offset;
117 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
118 void *constfundata;
119 int reverse;
120 };
121
122 static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
123 unsigned int,
124 unsigned int);
125 static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
126 struct move_by_pieces *);
127 static bool block_move_libcall_safe_for_call_parm (void);
128 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned);
129 static rtx emit_block_move_via_libcall (rtx, rtx, rtx);
130 static tree emit_block_move_libcall_fn (int);
131 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
132 static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
133 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
134 static void store_by_pieces_1 (struct store_by_pieces *, unsigned int);
135 static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
136 struct store_by_pieces *);
137 static bool clear_storage_via_clrmem (rtx, rtx, unsigned);
138 static rtx clear_storage_via_libcall (rtx, rtx);
139 static tree clear_storage_libcall_fn (int);
140 static rtx compress_float_constant (rtx, rtx);
141 static rtx get_subtarget (rtx);
142 static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
143 HOST_WIDE_INT, enum machine_mode,
144 tree, tree, int, int);
145 static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
146 static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode,
147 tree, tree, int);
148
149 static unsigned HOST_WIDE_INT highest_pow2_factor (tree);
150 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (tree, tree);
151
152 static int is_aligning_offset (tree, tree);
153 static void expand_operands (tree, tree, rtx, rtx*, rtx*,
154 enum expand_modifier);
155 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
156 static rtx do_store_flag (tree, rtx, enum machine_mode, int);
157 #ifdef PUSH_ROUNDING
158 static void emit_single_push_insn (enum machine_mode, rtx, tree);
159 #endif
160 static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
161 static rtx const_vector_from_tree (tree);
162 static void write_complex_part (rtx, rtx, bool);
163
164 /* Record for each mode whether we can move a register directly to or
165 from an object of that mode in memory. If we can't, we won't try
166 to use that mode directly when accessing a field of that mode. */
167
168 static char direct_load[NUM_MACHINE_MODES];
169 static char direct_store[NUM_MACHINE_MODES];
170
171 /* Record for each mode whether we can float-extend from memory. */
172
173 static bool float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
174
175 /* This macro is used to determine whether move_by_pieces should be called
176 to perform a structure copy. */
177 #ifndef MOVE_BY_PIECES_P
178 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
179 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
180 < (unsigned int) MOVE_RATIO)
181 #endif
182
183 /* This macro is used to determine whether clear_by_pieces should be
184 called to clear storage. */
185 #ifndef CLEAR_BY_PIECES_P
186 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
187 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
188 < (unsigned int) CLEAR_RATIO)
189 #endif
190
191 /* This macro is used to determine whether store_by_pieces should be
192 called to "memset" storage with byte values other than zero, or
193 to "memcpy" storage when the source is a constant string. */
194 #ifndef STORE_BY_PIECES_P
195 #define STORE_BY_PIECES_P(SIZE, ALIGN) \
196 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
197 < (unsigned int) MOVE_RATIO)
198 #endif
199
200 /* This array records the insn_code of insns to perform block moves. */
201 enum insn_code movmem_optab[NUM_MACHINE_MODES];
202
203 /* This array records the insn_code of insns to perform block clears. */
204 enum insn_code clrmem_optab[NUM_MACHINE_MODES];
205
206 /* These arrays record the insn_code of two different kinds of insns
207 to perform block compares. */
208 enum insn_code cmpstr_optab[NUM_MACHINE_MODES];
209 enum insn_code cmpmem_optab[NUM_MACHINE_MODES];
210
211 /* Synchronization primitives. */
212 enum insn_code sync_add_optab[NUM_MACHINE_MODES];
213 enum insn_code sync_sub_optab[NUM_MACHINE_MODES];
214 enum insn_code sync_ior_optab[NUM_MACHINE_MODES];
215 enum insn_code sync_and_optab[NUM_MACHINE_MODES];
216 enum insn_code sync_xor_optab[NUM_MACHINE_MODES];
217 enum insn_code sync_nand_optab[NUM_MACHINE_MODES];
218 enum insn_code sync_old_add_optab[NUM_MACHINE_MODES];
219 enum insn_code sync_old_sub_optab[NUM_MACHINE_MODES];
220 enum insn_code sync_old_ior_optab[NUM_MACHINE_MODES];
221 enum insn_code sync_old_and_optab[NUM_MACHINE_MODES];
222 enum insn_code sync_old_xor_optab[NUM_MACHINE_MODES];
223 enum insn_code sync_old_nand_optab[NUM_MACHINE_MODES];
224 enum insn_code sync_new_add_optab[NUM_MACHINE_MODES];
225 enum insn_code sync_new_sub_optab[NUM_MACHINE_MODES];
226 enum insn_code sync_new_ior_optab[NUM_MACHINE_MODES];
227 enum insn_code sync_new_and_optab[NUM_MACHINE_MODES];
228 enum insn_code sync_new_xor_optab[NUM_MACHINE_MODES];
229 enum insn_code sync_new_nand_optab[NUM_MACHINE_MODES];
230 enum insn_code sync_compare_and_swap[NUM_MACHINE_MODES];
231 enum insn_code sync_compare_and_swap_cc[NUM_MACHINE_MODES];
232 enum insn_code sync_lock_test_and_set[NUM_MACHINE_MODES];
233 enum insn_code sync_lock_release[NUM_MACHINE_MODES];
234
235 /* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
236
237 #ifndef SLOW_UNALIGNED_ACCESS
238 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
239 #endif
240 \f
241 /* This is run once per compilation to set up which modes can be used
242 directly in memory and to initialize the block move optab. */
243
244 void
245 init_expr_once (void)
246 {
247 rtx insn, pat;
248 enum machine_mode mode;
249 int num_clobbers;
250 rtx mem, mem1;
251 rtx reg;
252
253 /* Try indexing by frame ptr and try by stack ptr.
254 It is known that on the Convex the stack ptr isn't a valid index.
255 With luck, one or the other is valid on any machine. */
256 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
257 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
258
259 /* A scratch register we can modify in-place below to avoid
260 useless RTL allocations. */
261 reg = gen_rtx_REG (VOIDmode, -1);
262
263 insn = rtx_alloc (INSN);
264 pat = gen_rtx_SET (0, NULL_RTX, NULL_RTX);
265 PATTERN (insn) = pat;
266
267 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
268 mode = (enum machine_mode) ((int) mode + 1))
269 {
270 int regno;
271
272 direct_load[(int) mode] = direct_store[(int) mode] = 0;
273 PUT_MODE (mem, mode);
274 PUT_MODE (mem1, mode);
275 PUT_MODE (reg, mode);
276
277 /* See if there is some register that can be used in this mode and
278 directly loaded or stored from memory. */
279
280 if (mode != VOIDmode && mode != BLKmode)
281 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
282 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
283 regno++)
284 {
285 if (! HARD_REGNO_MODE_OK (regno, mode))
286 continue;
287
288 REGNO (reg) = regno;
289
290 SET_SRC (pat) = mem;
291 SET_DEST (pat) = reg;
292 if (recog (pat, insn, &num_clobbers) >= 0)
293 direct_load[(int) mode] = 1;
294
295 SET_SRC (pat) = mem1;
296 SET_DEST (pat) = reg;
297 if (recog (pat, insn, &num_clobbers) >= 0)
298 direct_load[(int) mode] = 1;
299
300 SET_SRC (pat) = reg;
301 SET_DEST (pat) = mem;
302 if (recog (pat, insn, &num_clobbers) >= 0)
303 direct_store[(int) mode] = 1;
304
305 SET_SRC (pat) = reg;
306 SET_DEST (pat) = mem1;
307 if (recog (pat, insn, &num_clobbers) >= 0)
308 direct_store[(int) mode] = 1;
309 }
310 }
311
312 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
313
314 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
315 mode = GET_MODE_WIDER_MODE (mode))
316 {
317 enum machine_mode srcmode;
318 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
319 srcmode = GET_MODE_WIDER_MODE (srcmode))
320 {
321 enum insn_code ic;
322
323 ic = can_extend_p (mode, srcmode, 0);
324 if (ic == CODE_FOR_nothing)
325 continue;
326
327 PUT_MODE (mem, srcmode);
328
329 if ((*insn_data[ic].operand[1].predicate) (mem, srcmode))
330 float_extend_from_mem[mode][srcmode] = true;
331 }
332 }
333 }
334
335 /* This is run at the start of compiling a function. */
336
337 void
338 init_expr (void)
339 {
340 cfun->expr = ggc_alloc_cleared (sizeof (struct expr_status));
341 }
342 \f
343 /* Copy data from FROM to TO, where the machine modes are not the same.
344 Both modes may be integer, or both may be floating.
345 UNSIGNEDP should be nonzero if FROM is an unsigned type.
346 This causes zero-extension instead of sign-extension. */
347
348 void
349 convert_move (rtx to, rtx from, int unsignedp)
350 {
351 enum machine_mode to_mode = GET_MODE (to);
352 enum machine_mode from_mode = GET_MODE (from);
353 int to_real = GET_MODE_CLASS (to_mode) == MODE_FLOAT;
354 int from_real = GET_MODE_CLASS (from_mode) == MODE_FLOAT;
355 enum insn_code code;
356 rtx libcall;
357
358 /* rtx code for making an equivalent value. */
359 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
360 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
361
362
363 gcc_assert (to_real == from_real);
364
365 /* If the source and destination are already the same, then there's
366 nothing to do. */
367 if (to == from)
368 return;
369
370 /* If FROM is a SUBREG that indicates that we have already done at least
371 the required extension, strip it. We don't handle such SUBREGs as
372 TO here. */
373
374 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
375 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (from)))
376 >= GET_MODE_SIZE (to_mode))
377 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
378 from = gen_lowpart (to_mode, from), from_mode = to_mode;
379
380 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
381
382 if (to_mode == from_mode
383 || (from_mode == VOIDmode && CONSTANT_P (from)))
384 {
385 emit_move_insn (to, from);
386 return;
387 }
388
389 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
390 {
391 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
392
393 if (VECTOR_MODE_P (to_mode))
394 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
395 else
396 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
397
398 emit_move_insn (to, from);
399 return;
400 }
401
402 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
403 {
404 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
405 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
406 return;
407 }
408
409 if (to_real)
410 {
411 rtx value, insns;
412 convert_optab tab;
413
414 gcc_assert (GET_MODE_PRECISION (from_mode)
415 != GET_MODE_PRECISION (to_mode));
416
417 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
418 tab = sext_optab;
419 else
420 tab = trunc_optab;
421
422 /* Try converting directly if the insn is supported. */
423
424 code = tab->handlers[to_mode][from_mode].insn_code;
425 if (code != CODE_FOR_nothing)
426 {
427 emit_unop_insn (code, to, from,
428 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
429 return;
430 }
431
432 /* Otherwise use a libcall. */
433 libcall = tab->handlers[to_mode][from_mode].libfunc;
434
435 /* Is this conversion implemented yet? */
436 gcc_assert (libcall);
437
438 start_sequence ();
439 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
440 1, from, from_mode);
441 insns = get_insns ();
442 end_sequence ();
443 emit_libcall_block (insns, to, value,
444 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
445 from)
446 : gen_rtx_FLOAT_EXTEND (to_mode, from));
447 return;
448 }
449
450 /* Handle pointer conversion. */ /* SPEE 900220. */
451 /* Targets are expected to provide conversion insns between PxImode and
452 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
453 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
454 {
455 enum machine_mode full_mode
456 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
457
458 gcc_assert (trunc_optab->handlers[to_mode][full_mode].insn_code
459 != CODE_FOR_nothing);
460
461 if (full_mode != from_mode)
462 from = convert_to_mode (full_mode, from, unsignedp);
463 emit_unop_insn (trunc_optab->handlers[to_mode][full_mode].insn_code,
464 to, from, UNKNOWN);
465 return;
466 }
467 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
468 {
469 enum machine_mode full_mode
470 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
471
472 gcc_assert (sext_optab->handlers[full_mode][from_mode].insn_code
473 != CODE_FOR_nothing);
474
475 emit_unop_insn (sext_optab->handlers[full_mode][from_mode].insn_code,
476 to, from, UNKNOWN);
477 if (to_mode == full_mode)
478 return;
479
480 /* else proceed to integer conversions below. */
481 from_mode = full_mode;
482 }
483
484 /* Now both modes are integers. */
485
486 /* Handle expanding beyond a word. */
487 if (GET_MODE_BITSIZE (from_mode) < GET_MODE_BITSIZE (to_mode)
488 && GET_MODE_BITSIZE (to_mode) > BITS_PER_WORD)
489 {
490 rtx insns;
491 rtx lowpart;
492 rtx fill_value;
493 rtx lowfrom;
494 int i;
495 enum machine_mode lowpart_mode;
496 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
497
498 /* Try converting directly if the insn is supported. */
499 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
500 != CODE_FOR_nothing)
501 {
502 /* If FROM is a SUBREG, put it into a register. Do this
503 so that we always generate the same set of insns for
504 better cse'ing; if an intermediate assignment occurred,
505 we won't be doing the operation directly on the SUBREG. */
506 if (optimize > 0 && GET_CODE (from) == SUBREG)
507 from = force_reg (from_mode, from);
508 emit_unop_insn (code, to, from, equiv_code);
509 return;
510 }
511 /* Next, try converting via full word. */
512 else if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD
513 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
514 != CODE_FOR_nothing))
515 {
516 if (REG_P (to))
517 {
518 if (reg_overlap_mentioned_p (to, from))
519 from = force_reg (from_mode, from);
520 emit_insn (gen_rtx_CLOBBER (VOIDmode, to));
521 }
522 convert_move (gen_lowpart (word_mode, to), from, unsignedp);
523 emit_unop_insn (code, to,
524 gen_lowpart (word_mode, to), equiv_code);
525 return;
526 }
527
528 /* No special multiword conversion insn; do it by hand. */
529 start_sequence ();
530
531 /* Since we will turn this into a no conflict block, we must ensure
532 that the source does not overlap the target. */
533
534 if (reg_overlap_mentioned_p (to, from))
535 from = force_reg (from_mode, from);
536
537 /* Get a copy of FROM widened to a word, if necessary. */
538 if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD)
539 lowpart_mode = word_mode;
540 else
541 lowpart_mode = from_mode;
542
543 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
544
545 lowpart = gen_lowpart (lowpart_mode, to);
546 emit_move_insn (lowpart, lowfrom);
547
548 /* Compute the value to put in each remaining word. */
549 if (unsignedp)
550 fill_value = const0_rtx;
551 else
552 {
553 #ifdef HAVE_slt
554 if (HAVE_slt
555 && insn_data[(int) CODE_FOR_slt].operand[0].mode == word_mode
556 && STORE_FLAG_VALUE == -1)
557 {
558 emit_cmp_insn (lowfrom, const0_rtx, NE, NULL_RTX,
559 lowpart_mode, 0);
560 fill_value = gen_reg_rtx (word_mode);
561 emit_insn (gen_slt (fill_value));
562 }
563 else
564 #endif
565 {
566 fill_value
567 = expand_shift (RSHIFT_EXPR, lowpart_mode, lowfrom,
568 size_int (GET_MODE_BITSIZE (lowpart_mode) - 1),
569 NULL_RTX, 0);
570 fill_value = convert_to_mode (word_mode, fill_value, 1);
571 }
572 }
573
574 /* Fill the remaining words. */
575 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
576 {
577 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
578 rtx subword = operand_subword (to, index, 1, to_mode);
579
580 gcc_assert (subword);
581
582 if (fill_value != subword)
583 emit_move_insn (subword, fill_value);
584 }
585
586 insns = get_insns ();
587 end_sequence ();
588
589 emit_no_conflict_block (insns, to, from, NULL_RTX,
590 gen_rtx_fmt_e (equiv_code, to_mode, copy_rtx (from)));
591 return;
592 }
593
594 /* Truncating multi-word to a word or less. */
595 if (GET_MODE_BITSIZE (from_mode) > BITS_PER_WORD
596 && GET_MODE_BITSIZE (to_mode) <= BITS_PER_WORD)
597 {
598 if (!((MEM_P (from)
599 && ! MEM_VOLATILE_P (from)
600 && direct_load[(int) to_mode]
601 && ! mode_dependent_address_p (XEXP (from, 0)))
602 || REG_P (from)
603 || GET_CODE (from) == SUBREG))
604 from = force_reg (from_mode, from);
605 convert_move (to, gen_lowpart (word_mode, from), 0);
606 return;
607 }
608
609 /* Now follow all the conversions between integers
610 no more than a word long. */
611
612 /* For truncation, usually we can just refer to FROM in a narrower mode. */
613 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
614 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
615 GET_MODE_BITSIZE (from_mode)))
616 {
617 if (!((MEM_P (from)
618 && ! MEM_VOLATILE_P (from)
619 && direct_load[(int) to_mode]
620 && ! mode_dependent_address_p (XEXP (from, 0)))
621 || REG_P (from)
622 || GET_CODE (from) == SUBREG))
623 from = force_reg (from_mode, from);
624 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
625 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
626 from = copy_to_reg (from);
627 emit_move_insn (to, gen_lowpart (to_mode, from));
628 return;
629 }
630
631 /* Handle extension. */
632 if (GET_MODE_BITSIZE (to_mode) > GET_MODE_BITSIZE (from_mode))
633 {
634 /* Convert directly if that works. */
635 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
636 != CODE_FOR_nothing)
637 {
638 if (flag_force_mem)
639 from = force_not_mem (from);
640
641 emit_unop_insn (code, to, from, equiv_code);
642 return;
643 }
644 else
645 {
646 enum machine_mode intermediate;
647 rtx tmp;
648 tree shift_amount;
649
650 /* Search for a mode to convert via. */
651 for (intermediate = from_mode; intermediate != VOIDmode;
652 intermediate = GET_MODE_WIDER_MODE (intermediate))
653 if (((can_extend_p (to_mode, intermediate, unsignedp)
654 != CODE_FOR_nothing)
655 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
656 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
657 GET_MODE_BITSIZE (intermediate))))
658 && (can_extend_p (intermediate, from_mode, unsignedp)
659 != CODE_FOR_nothing))
660 {
661 convert_move (to, convert_to_mode (intermediate, from,
662 unsignedp), unsignedp);
663 return;
664 }
665
666 /* No suitable intermediate mode.
667 Generate what we need with shifts. */
668 shift_amount = build_int_cst (NULL_TREE,
669 GET_MODE_BITSIZE (to_mode)
670 - GET_MODE_BITSIZE (from_mode));
671 from = gen_lowpart (to_mode, force_reg (from_mode, from));
672 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
673 to, unsignedp);
674 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
675 to, unsignedp);
676 if (tmp != to)
677 emit_move_insn (to, tmp);
678 return;
679 }
680 }
681
682 /* Support special truncate insns for certain modes. */
683 if (trunc_optab->handlers[to_mode][from_mode].insn_code != CODE_FOR_nothing)
684 {
685 emit_unop_insn (trunc_optab->handlers[to_mode][from_mode].insn_code,
686 to, from, UNKNOWN);
687 return;
688 }
689
690 /* Handle truncation of volatile memrefs, and so on;
691 the things that couldn't be truncated directly,
692 and for which there was no special instruction.
693
694 ??? Code above formerly short-circuited this, for most integer
695 mode pairs, with a force_reg in from_mode followed by a recursive
696 call to this routine. Appears always to have been wrong. */
697 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode))
698 {
699 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
700 emit_move_insn (to, temp);
701 return;
702 }
703
704 /* Mode combination is not recognized. */
705 gcc_unreachable ();
706 }
707
708 /* Return an rtx for a value that would result
709 from converting X to mode MODE.
710 Both X and MODE may be floating, or both integer.
711 UNSIGNEDP is nonzero if X is an unsigned value.
712 This can be done by referring to a part of X in place
713 or by copying to a new temporary with conversion. */
714
715 rtx
716 convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
717 {
718 return convert_modes (mode, VOIDmode, x, unsignedp);
719 }
720
721 /* Return an rtx for a value that would result
722 from converting X from mode OLDMODE to mode MODE.
723 Both modes may be floating, or both integer.
724 UNSIGNEDP is nonzero if X is an unsigned value.
725
726 This can be done by referring to a part of X in place
727 or by copying to a new temporary with conversion.
728
729 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
730
731 rtx
732 convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
733 {
734 rtx temp;
735
736 /* If FROM is a SUBREG that indicates that we have already done at least
737 the required extension, strip it. */
738
739 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
740 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
741 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
742 x = gen_lowpart (mode, x);
743
744 if (GET_MODE (x) != VOIDmode)
745 oldmode = GET_MODE (x);
746
747 if (mode == oldmode)
748 return x;
749
750 /* There is one case that we must handle specially: If we are converting
751 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
752 we are to interpret the constant as unsigned, gen_lowpart will do
753 the wrong if the constant appears negative. What we want to do is
754 make the high-order word of the constant zero, not all ones. */
755
756 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
757 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
758 && GET_CODE (x) == CONST_INT && INTVAL (x) < 0)
759 {
760 HOST_WIDE_INT val = INTVAL (x);
761
762 if (oldmode != VOIDmode
763 && HOST_BITS_PER_WIDE_INT > GET_MODE_BITSIZE (oldmode))
764 {
765 int width = GET_MODE_BITSIZE (oldmode);
766
767 /* We need to zero extend VAL. */
768 val &= ((HOST_WIDE_INT) 1 << width) - 1;
769 }
770
771 return immed_double_const (val, (HOST_WIDE_INT) 0, mode);
772 }
773
774 /* We can do this with a gen_lowpart if both desired and current modes
775 are integer, and this is either a constant integer, a register, or a
776 non-volatile MEM. Except for the constant case where MODE is no
777 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
778
779 if ((GET_CODE (x) == CONST_INT
780 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
781 || (GET_MODE_CLASS (mode) == MODE_INT
782 && GET_MODE_CLASS (oldmode) == MODE_INT
783 && (GET_CODE (x) == CONST_DOUBLE
784 || (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (oldmode)
785 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
786 && direct_load[(int) mode])
787 || (REG_P (x)
788 && (! HARD_REGISTER_P (x)
789 || HARD_REGNO_MODE_OK (REGNO (x), mode))
790 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
791 GET_MODE_BITSIZE (GET_MODE (x)))))))))
792 {
793 /* ?? If we don't know OLDMODE, we have to assume here that
794 X does not need sign- or zero-extension. This may not be
795 the case, but it's the best we can do. */
796 if (GET_CODE (x) == CONST_INT && oldmode != VOIDmode
797 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (oldmode))
798 {
799 HOST_WIDE_INT val = INTVAL (x);
800 int width = GET_MODE_BITSIZE (oldmode);
801
802 /* We must sign or zero-extend in this case. Start by
803 zero-extending, then sign extend if we need to. */
804 val &= ((HOST_WIDE_INT) 1 << width) - 1;
805 if (! unsignedp
806 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
807 val |= (HOST_WIDE_INT) (-1) << width;
808
809 return gen_int_mode (val, mode);
810 }
811
812 return gen_lowpart (mode, x);
813 }
814
815 /* Converting from integer constant into mode is always equivalent to an
816 subreg operation. */
817 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
818 {
819 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
820 return simplify_gen_subreg (mode, x, oldmode, 0);
821 }
822
823 temp = gen_reg_rtx (mode);
824 convert_move (temp, x, unsignedp);
825 return temp;
826 }
827 \f
828 /* STORE_MAX_PIECES is the number of bytes at a time that we can
829 store efficiently. Due to internal GCC limitations, this is
830 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
831 for an immediate constant. */
832
833 #define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
834
835 /* Determine whether the LEN bytes can be moved by using several move
836 instructions. Return nonzero if a call to move_by_pieces should
837 succeed. */
838
839 int
840 can_move_by_pieces (unsigned HOST_WIDE_INT len,
841 unsigned int align ATTRIBUTE_UNUSED)
842 {
843 return MOVE_BY_PIECES_P (len, align);
844 }
845
846 /* Generate several move instructions to copy LEN bytes from block FROM to
847 block TO. (These are MEM rtx's with BLKmode).
848
849 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
850 used to push FROM to the stack.
851
852 ALIGN is maximum stack alignment we can assume.
853
854 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
855 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
856 stpcpy. */
857
858 rtx
859 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
860 unsigned int align, int endp)
861 {
862 struct move_by_pieces data;
863 rtx to_addr, from_addr = XEXP (from, 0);
864 unsigned int max_size = MOVE_MAX_PIECES + 1;
865 enum machine_mode mode = VOIDmode, tmode;
866 enum insn_code icode;
867
868 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
869
870 data.offset = 0;
871 data.from_addr = from_addr;
872 if (to)
873 {
874 to_addr = XEXP (to, 0);
875 data.to = to;
876 data.autinc_to
877 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
878 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
879 data.reverse
880 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
881 }
882 else
883 {
884 to_addr = NULL_RTX;
885 data.to = NULL_RTX;
886 data.autinc_to = 1;
887 #ifdef STACK_GROWS_DOWNWARD
888 data.reverse = 1;
889 #else
890 data.reverse = 0;
891 #endif
892 }
893 data.to_addr = to_addr;
894 data.from = from;
895 data.autinc_from
896 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
897 || GET_CODE (from_addr) == POST_INC
898 || GET_CODE (from_addr) == POST_DEC);
899
900 data.explicit_inc_from = 0;
901 data.explicit_inc_to = 0;
902 if (data.reverse) data.offset = len;
903 data.len = len;
904
905 /* If copying requires more than two move insns,
906 copy addresses to registers (to make displacements shorter)
907 and use post-increment if available. */
908 if (!(data.autinc_from && data.autinc_to)
909 && move_by_pieces_ninsns (len, align, max_size) > 2)
910 {
911 /* Find the mode of the largest move... */
912 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
913 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
914 if (GET_MODE_SIZE (tmode) < max_size)
915 mode = tmode;
916
917 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
918 {
919 data.from_addr = copy_addr_to_reg (plus_constant (from_addr, len));
920 data.autinc_from = 1;
921 data.explicit_inc_from = -1;
922 }
923 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
924 {
925 data.from_addr = copy_addr_to_reg (from_addr);
926 data.autinc_from = 1;
927 data.explicit_inc_from = 1;
928 }
929 if (!data.autinc_from && CONSTANT_P (from_addr))
930 data.from_addr = copy_addr_to_reg (from_addr);
931 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
932 {
933 data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
934 data.autinc_to = 1;
935 data.explicit_inc_to = -1;
936 }
937 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
938 {
939 data.to_addr = copy_addr_to_reg (to_addr);
940 data.autinc_to = 1;
941 data.explicit_inc_to = 1;
942 }
943 if (!data.autinc_to && CONSTANT_P (to_addr))
944 data.to_addr = copy_addr_to_reg (to_addr);
945 }
946
947 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
948 if (align >= GET_MODE_ALIGNMENT (tmode))
949 align = GET_MODE_ALIGNMENT (tmode);
950 else
951 {
952 enum machine_mode xmode;
953
954 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
955 tmode != VOIDmode;
956 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
957 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
958 || SLOW_UNALIGNED_ACCESS (tmode, align))
959 break;
960
961 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
962 }
963
964 /* First move what we can in the largest integer mode, then go to
965 successively smaller modes. */
966
967 while (max_size > 1)
968 {
969 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
970 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
971 if (GET_MODE_SIZE (tmode) < max_size)
972 mode = tmode;
973
974 if (mode == VOIDmode)
975 break;
976
977 icode = mov_optab->handlers[(int) mode].insn_code;
978 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
979 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
980
981 max_size = GET_MODE_SIZE (mode);
982 }
983
984 /* The code above should have handled everything. */
985 gcc_assert (!data.len);
986
987 if (endp)
988 {
989 rtx to1;
990
991 gcc_assert (!data.reverse);
992 if (data.autinc_to)
993 {
994 if (endp == 2)
995 {
996 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
997 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
998 else
999 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
1000 -1));
1001 }
1002 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1003 data.offset);
1004 }
1005 else
1006 {
1007 if (endp == 2)
1008 --data.offset;
1009 to1 = adjust_address (data.to, QImode, data.offset);
1010 }
1011 return to1;
1012 }
1013 else
1014 return data.to;
1015 }
1016
1017 /* Return number of insns required to move L bytes by pieces.
1018 ALIGN (in bits) is maximum alignment we can assume. */
1019
1020 static unsigned HOST_WIDE_INT
1021 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1022 unsigned int max_size)
1023 {
1024 unsigned HOST_WIDE_INT n_insns = 0;
1025 enum machine_mode tmode;
1026
1027 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
1028 if (align >= GET_MODE_ALIGNMENT (tmode))
1029 align = GET_MODE_ALIGNMENT (tmode);
1030 else
1031 {
1032 enum machine_mode tmode, xmode;
1033
1034 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
1035 tmode != VOIDmode;
1036 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
1037 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
1038 || SLOW_UNALIGNED_ACCESS (tmode, align))
1039 break;
1040
1041 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
1042 }
1043
1044 while (max_size > 1)
1045 {
1046 enum machine_mode mode = VOIDmode;
1047 enum insn_code icode;
1048
1049 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
1050 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
1051 if (GET_MODE_SIZE (tmode) < max_size)
1052 mode = tmode;
1053
1054 if (mode == VOIDmode)
1055 break;
1056
1057 icode = mov_optab->handlers[(int) mode].insn_code;
1058 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1059 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1060
1061 max_size = GET_MODE_SIZE (mode);
1062 }
1063
1064 gcc_assert (!l);
1065 return n_insns;
1066 }
1067
1068 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
1069 with move instructions for mode MODE. GENFUN is the gen_... function
1070 to make a move insn for that mode. DATA has all the other info. */
1071
1072 static void
1073 move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1074 struct move_by_pieces *data)
1075 {
1076 unsigned int size = GET_MODE_SIZE (mode);
1077 rtx to1 = NULL_RTX, from1;
1078
1079 while (data->len >= size)
1080 {
1081 if (data->reverse)
1082 data->offset -= size;
1083
1084 if (data->to)
1085 {
1086 if (data->autinc_to)
1087 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1088 data->offset);
1089 else
1090 to1 = adjust_address (data->to, mode, data->offset);
1091 }
1092
1093 if (data->autinc_from)
1094 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1095 data->offset);
1096 else
1097 from1 = adjust_address (data->from, mode, data->offset);
1098
1099 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1100 emit_insn (gen_add2_insn (data->to_addr,
1101 GEN_INT (-(HOST_WIDE_INT)size)));
1102 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1103 emit_insn (gen_add2_insn (data->from_addr,
1104 GEN_INT (-(HOST_WIDE_INT)size)));
1105
1106 if (data->to)
1107 emit_insn ((*genfun) (to1, from1));
1108 else
1109 {
1110 #ifdef PUSH_ROUNDING
1111 emit_single_push_insn (mode, from1, NULL);
1112 #else
1113 gcc_unreachable ();
1114 #endif
1115 }
1116
1117 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1118 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1119 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1120 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1121
1122 if (! data->reverse)
1123 data->offset += size;
1124
1125 data->len -= size;
1126 }
1127 }
1128 \f
1129 /* Emit code to move a block Y to a block X. This may be done with
1130 string-move instructions, with multiple scalar move instructions,
1131 or with a library call.
1132
1133 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1134 SIZE is an rtx that says how long they are.
1135 ALIGN is the maximum alignment we can assume they have.
1136 METHOD describes what kind of copy this is, and what mechanisms may be used.
1137
1138 Return the address of the new block, if memcpy is called and returns it,
1139 0 otherwise. */
1140
1141 rtx
1142 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1143 {
1144 bool may_use_call;
1145 rtx retval = 0;
1146 unsigned int align;
1147
1148 switch (method)
1149 {
1150 case BLOCK_OP_NORMAL:
1151 may_use_call = true;
1152 break;
1153
1154 case BLOCK_OP_CALL_PARM:
1155 may_use_call = block_move_libcall_safe_for_call_parm ();
1156
1157 /* Make inhibit_defer_pop nonzero around the library call
1158 to force it to pop the arguments right away. */
1159 NO_DEFER_POP;
1160 break;
1161
1162 case BLOCK_OP_NO_LIBCALL:
1163 may_use_call = false;
1164 break;
1165
1166 default:
1167 gcc_unreachable ();
1168 }
1169
1170 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1171
1172 gcc_assert (MEM_P (x));
1173 gcc_assert (MEM_P (y));
1174 gcc_assert (size);
1175
1176 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1177 block copy is more efficient for other large modes, e.g. DCmode. */
1178 x = adjust_address (x, BLKmode, 0);
1179 y = adjust_address (y, BLKmode, 0);
1180
1181 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1182 can be incorrect is coming from __builtin_memcpy. */
1183 if (GET_CODE (size) == CONST_INT)
1184 {
1185 if (INTVAL (size) == 0)
1186 return 0;
1187
1188 x = shallow_copy_rtx (x);
1189 y = shallow_copy_rtx (y);
1190 set_mem_size (x, size);
1191 set_mem_size (y, size);
1192 }
1193
1194 if (GET_CODE (size) == CONST_INT && MOVE_BY_PIECES_P (INTVAL (size), align))
1195 move_by_pieces (x, y, INTVAL (size), align, 0);
1196 else if (emit_block_move_via_movmem (x, y, size, align))
1197 ;
1198 else if (may_use_call)
1199 retval = emit_block_move_via_libcall (x, y, size);
1200 else
1201 emit_block_move_via_loop (x, y, size, align);
1202
1203 if (method == BLOCK_OP_CALL_PARM)
1204 OK_DEFER_POP;
1205
1206 return retval;
1207 }
1208
1209 /* A subroutine of emit_block_move. Returns true if calling the
1210 block move libcall will not clobber any parameters which may have
1211 already been placed on the stack. */
1212
1213 static bool
1214 block_move_libcall_safe_for_call_parm (void)
1215 {
1216 /* If arguments are pushed on the stack, then they're safe. */
1217 if (PUSH_ARGS)
1218 return true;
1219
1220 /* If registers go on the stack anyway, any argument is sure to clobber
1221 an outgoing argument. */
1222 #if defined (REG_PARM_STACK_SPACE) && defined (OUTGOING_REG_PARM_STACK_SPACE)
1223 {
1224 tree fn = emit_block_move_libcall_fn (false);
1225 (void) fn;
1226 if (REG_PARM_STACK_SPACE (fn) != 0)
1227 return false;
1228 }
1229 #endif
1230
1231 /* If any argument goes in memory, then it might clobber an outgoing
1232 argument. */
1233 {
1234 CUMULATIVE_ARGS args_so_far;
1235 tree fn, arg;
1236
1237 fn = emit_block_move_libcall_fn (false);
1238 INIT_CUMULATIVE_ARGS (args_so_far, TREE_TYPE (fn), NULL_RTX, 0, 3);
1239
1240 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1241 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1242 {
1243 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1244 rtx tmp = FUNCTION_ARG (args_so_far, mode, NULL_TREE, 1);
1245 if (!tmp || !REG_P (tmp))
1246 return false;
1247 if (targetm.calls.arg_partial_bytes (&args_so_far, mode, NULL, 1))
1248 return false;
1249 FUNCTION_ARG_ADVANCE (args_so_far, mode, NULL_TREE, 1);
1250 }
1251 }
1252 return true;
1253 }
1254
1255 /* A subroutine of emit_block_move. Expand a movmem pattern;
1256 return true if successful. */
1257
1258 static bool
1259 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align)
1260 {
1261 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
1262 int save_volatile_ok = volatile_ok;
1263 enum machine_mode mode;
1264
1265 /* Since this is a move insn, we don't care about volatility. */
1266 volatile_ok = 1;
1267
1268 /* Try the most limited insn first, because there's no point
1269 including more than one in the machine description unless
1270 the more limited one has some advantage. */
1271
1272 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1273 mode = GET_MODE_WIDER_MODE (mode))
1274 {
1275 enum insn_code code = movmem_optab[(int) mode];
1276 insn_operand_predicate_fn pred;
1277
1278 if (code != CODE_FOR_nothing
1279 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1280 here because if SIZE is less than the mode mask, as it is
1281 returned by the macro, it will definitely be less than the
1282 actual mode mask. */
1283 && ((GET_CODE (size) == CONST_INT
1284 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1285 <= (GET_MODE_MASK (mode) >> 1)))
1286 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
1287 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
1288 || (*pred) (x, BLKmode))
1289 && ((pred = insn_data[(int) code].operand[1].predicate) == 0
1290 || (*pred) (y, BLKmode))
1291 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
1292 || (*pred) (opalign, VOIDmode)))
1293 {
1294 rtx op2;
1295 rtx last = get_last_insn ();
1296 rtx pat;
1297
1298 op2 = convert_to_mode (mode, size, 1);
1299 pred = insn_data[(int) code].operand[2].predicate;
1300 if (pred != 0 && ! (*pred) (op2, mode))
1301 op2 = copy_to_mode_reg (mode, op2);
1302
1303 /* ??? When called via emit_block_move_for_call, it'd be
1304 nice if there were some way to inform the backend, so
1305 that it doesn't fail the expansion because it thinks
1306 emitting the libcall would be more efficient. */
1307
1308 pat = GEN_FCN ((int) code) (x, y, op2, opalign);
1309 if (pat)
1310 {
1311 emit_insn (pat);
1312 volatile_ok = save_volatile_ok;
1313 return true;
1314 }
1315 else
1316 delete_insns_since (last);
1317 }
1318 }
1319
1320 volatile_ok = save_volatile_ok;
1321 return false;
1322 }
1323
1324 /* A subroutine of emit_block_move. Expand a call to memcpy.
1325 Return the return value from memcpy, 0 otherwise. */
1326
1327 static rtx
1328 emit_block_move_via_libcall (rtx dst, rtx src, rtx size)
1329 {
1330 rtx dst_addr, src_addr;
1331 tree call_expr, arg_list, fn, src_tree, dst_tree, size_tree;
1332 enum machine_mode size_mode;
1333 rtx retval;
1334
1335 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1336 pseudos. We can then place those new pseudos into a VAR_DECL and
1337 use them later. */
1338
1339 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1340 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1341
1342 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1343 src_addr = convert_memory_address (ptr_mode, src_addr);
1344
1345 dst_tree = make_tree (ptr_type_node, dst_addr);
1346 src_tree = make_tree (ptr_type_node, src_addr);
1347
1348 size_mode = TYPE_MODE (sizetype);
1349
1350 size = convert_to_mode (size_mode, size, 1);
1351 size = copy_to_mode_reg (size_mode, size);
1352
1353 /* It is incorrect to use the libcall calling conventions to call
1354 memcpy in this context. This could be a user call to memcpy and
1355 the user may wish to examine the return value from memcpy. For
1356 targets where libcalls and normal calls have different conventions
1357 for returning pointers, we could end up generating incorrect code. */
1358
1359 size_tree = make_tree (sizetype, size);
1360
1361 fn = emit_block_move_libcall_fn (true);
1362 arg_list = tree_cons (NULL_TREE, size_tree, NULL_TREE);
1363 arg_list = tree_cons (NULL_TREE, src_tree, arg_list);
1364 arg_list = tree_cons (NULL_TREE, dst_tree, arg_list);
1365
1366 /* Now we have to build up the CALL_EXPR itself. */
1367 call_expr = build1 (ADDR_EXPR, build_pointer_type (TREE_TYPE (fn)), fn);
1368 call_expr = build3 (CALL_EXPR, TREE_TYPE (TREE_TYPE (fn)),
1369 call_expr, arg_list, NULL_TREE);
1370
1371 retval = expand_expr (call_expr, NULL_RTX, VOIDmode, 0);
1372
1373 return retval;
1374 }
1375
1376 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1377 for the function we use for block copies. The first time FOR_CALL
1378 is true, we call assemble_external. */
1379
1380 static GTY(()) tree block_move_fn;
1381
1382 void
1383 init_block_move_fn (const char *asmspec)
1384 {
1385 if (!block_move_fn)
1386 {
1387 tree args, fn;
1388
1389 fn = get_identifier ("memcpy");
1390 args = build_function_type_list (ptr_type_node, ptr_type_node,
1391 const_ptr_type_node, sizetype,
1392 NULL_TREE);
1393
1394 fn = build_decl (FUNCTION_DECL, fn, args);
1395 DECL_EXTERNAL (fn) = 1;
1396 TREE_PUBLIC (fn) = 1;
1397 DECL_ARTIFICIAL (fn) = 1;
1398 TREE_NOTHROW (fn) = 1;
1399
1400 block_move_fn = fn;
1401 }
1402
1403 if (asmspec)
1404 set_user_assembler_name (block_move_fn, asmspec);
1405 }
1406
1407 static tree
1408 emit_block_move_libcall_fn (int for_call)
1409 {
1410 static bool emitted_extern;
1411
1412 if (!block_move_fn)
1413 init_block_move_fn (NULL);
1414
1415 if (for_call && !emitted_extern)
1416 {
1417 emitted_extern = true;
1418 make_decl_rtl (block_move_fn);
1419 assemble_external (block_move_fn);
1420 }
1421
1422 return block_move_fn;
1423 }
1424
1425 /* A subroutine of emit_block_move. Copy the data via an explicit
1426 loop. This is used only when libcalls are forbidden. */
1427 /* ??? It'd be nice to copy in hunks larger than QImode. */
1428
1429 static void
1430 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1431 unsigned int align ATTRIBUTE_UNUSED)
1432 {
1433 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1434 enum machine_mode iter_mode;
1435
1436 iter_mode = GET_MODE (size);
1437 if (iter_mode == VOIDmode)
1438 iter_mode = word_mode;
1439
1440 top_label = gen_label_rtx ();
1441 cmp_label = gen_label_rtx ();
1442 iter = gen_reg_rtx (iter_mode);
1443
1444 emit_move_insn (iter, const0_rtx);
1445
1446 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1447 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1448 do_pending_stack_adjust ();
1449
1450 emit_jump (cmp_label);
1451 emit_label (top_label);
1452
1453 tmp = convert_modes (Pmode, iter_mode, iter, true);
1454 x_addr = gen_rtx_PLUS (Pmode, x_addr, tmp);
1455 y_addr = gen_rtx_PLUS (Pmode, y_addr, tmp);
1456 x = change_address (x, QImode, x_addr);
1457 y = change_address (y, QImode, y_addr);
1458
1459 emit_move_insn (x, y);
1460
1461 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1462 true, OPTAB_LIB_WIDEN);
1463 if (tmp != iter)
1464 emit_move_insn (iter, tmp);
1465
1466 emit_label (cmp_label);
1467
1468 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1469 true, top_label);
1470 }
1471 \f
1472 /* Copy all or part of a value X into registers starting at REGNO.
1473 The number of registers to be filled is NREGS. */
1474
1475 void
1476 move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1477 {
1478 int i;
1479 #ifdef HAVE_load_multiple
1480 rtx pat;
1481 rtx last;
1482 #endif
1483
1484 if (nregs == 0)
1485 return;
1486
1487 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
1488 x = validize_mem (force_const_mem (mode, x));
1489
1490 /* See if the machine can do this with a load multiple insn. */
1491 #ifdef HAVE_load_multiple
1492 if (HAVE_load_multiple)
1493 {
1494 last = get_last_insn ();
1495 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1496 GEN_INT (nregs));
1497 if (pat)
1498 {
1499 emit_insn (pat);
1500 return;
1501 }
1502 else
1503 delete_insns_since (last);
1504 }
1505 #endif
1506
1507 for (i = 0; i < nregs; i++)
1508 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1509 operand_subword_force (x, i, mode));
1510 }
1511
1512 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1513 The number of registers to be filled is NREGS. */
1514
1515 void
1516 move_block_from_reg (int regno, rtx x, int nregs)
1517 {
1518 int i;
1519
1520 if (nregs == 0)
1521 return;
1522
1523 /* See if the machine can do this with a store multiple insn. */
1524 #ifdef HAVE_store_multiple
1525 if (HAVE_store_multiple)
1526 {
1527 rtx last = get_last_insn ();
1528 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1529 GEN_INT (nregs));
1530 if (pat)
1531 {
1532 emit_insn (pat);
1533 return;
1534 }
1535 else
1536 delete_insns_since (last);
1537 }
1538 #endif
1539
1540 for (i = 0; i < nregs; i++)
1541 {
1542 rtx tem = operand_subword (x, i, 1, BLKmode);
1543
1544 gcc_assert (tem);
1545
1546 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1547 }
1548 }
1549
1550 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1551 ORIG, where ORIG is a non-consecutive group of registers represented by
1552 a PARALLEL. The clone is identical to the original except in that the
1553 original set of registers is replaced by a new set of pseudo registers.
1554 The new set has the same modes as the original set. */
1555
1556 rtx
1557 gen_group_rtx (rtx orig)
1558 {
1559 int i, length;
1560 rtx *tmps;
1561
1562 gcc_assert (GET_CODE (orig) == PARALLEL);
1563
1564 length = XVECLEN (orig, 0);
1565 tmps = alloca (sizeof (rtx) * length);
1566
1567 /* Skip a NULL entry in first slot. */
1568 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1569
1570 if (i)
1571 tmps[0] = 0;
1572
1573 for (; i < length; i++)
1574 {
1575 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1576 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1577
1578 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1579 }
1580
1581 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1582 }
1583
1584 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1585 except that values are placed in TMPS[i], and must later be moved
1586 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1587
1588 static void
1589 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1590 {
1591 rtx src;
1592 int start, i;
1593 enum machine_mode m = GET_MODE (orig_src);
1594
1595 gcc_assert (GET_CODE (dst) == PARALLEL);
1596
1597 if (m != VOIDmode
1598 && !SCALAR_INT_MODE_P (m)
1599 && !MEM_P (orig_src)
1600 && GET_CODE (orig_src) != CONCAT)
1601 {
1602 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1603 if (imode == BLKmode)
1604 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1605 else
1606 src = gen_reg_rtx (imode);
1607 if (imode != BLKmode)
1608 src = gen_lowpart (GET_MODE (orig_src), src);
1609 emit_move_insn (src, orig_src);
1610 /* ...and back again. */
1611 if (imode != BLKmode)
1612 src = gen_lowpart (imode, src);
1613 emit_group_load_1 (tmps, dst, src, type, ssize);
1614 return;
1615 }
1616
1617 /* Check for a NULL entry, used to indicate that the parameter goes
1618 both on the stack and in registers. */
1619 if (XEXP (XVECEXP (dst, 0, 0), 0))
1620 start = 0;
1621 else
1622 start = 1;
1623
1624 /* Process the pieces. */
1625 for (i = start; i < XVECLEN (dst, 0); i++)
1626 {
1627 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1628 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1629 unsigned int bytelen = GET_MODE_SIZE (mode);
1630 int shift = 0;
1631
1632 /* Handle trailing fragments that run over the size of the struct. */
1633 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1634 {
1635 /* Arrange to shift the fragment to where it belongs.
1636 extract_bit_field loads to the lsb of the reg. */
1637 if (
1638 #ifdef BLOCK_REG_PADDING
1639 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1640 == (BYTES_BIG_ENDIAN ? upward : downward)
1641 #else
1642 BYTES_BIG_ENDIAN
1643 #endif
1644 )
1645 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1646 bytelen = ssize - bytepos;
1647 gcc_assert (bytelen > 0);
1648 }
1649
1650 /* If we won't be loading directly from memory, protect the real source
1651 from strange tricks we might play; but make sure that the source can
1652 be loaded directly into the destination. */
1653 src = orig_src;
1654 if (!MEM_P (orig_src)
1655 && (!CONSTANT_P (orig_src)
1656 || (GET_MODE (orig_src) != mode
1657 && GET_MODE (orig_src) != VOIDmode)))
1658 {
1659 if (GET_MODE (orig_src) == VOIDmode)
1660 src = gen_reg_rtx (mode);
1661 else
1662 src = gen_reg_rtx (GET_MODE (orig_src));
1663
1664 emit_move_insn (src, orig_src);
1665 }
1666
1667 /* Optimize the access just a bit. */
1668 if (MEM_P (src)
1669 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1670 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1671 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1672 && bytelen == GET_MODE_SIZE (mode))
1673 {
1674 tmps[i] = gen_reg_rtx (mode);
1675 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1676 }
1677 else if (COMPLEX_MODE_P (mode)
1678 && GET_MODE (src) == mode
1679 && bytelen == GET_MODE_SIZE (mode))
1680 /* Let emit_move_complex do the bulk of the work. */
1681 tmps[i] = src;
1682 else if (GET_CODE (src) == CONCAT)
1683 {
1684 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1685 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1686
1687 if ((bytepos == 0 && bytelen == slen0)
1688 || (bytepos != 0 && bytepos + bytelen <= slen))
1689 {
1690 /* The following assumes that the concatenated objects all
1691 have the same size. In this case, a simple calculation
1692 can be used to determine the object and the bit field
1693 to be extracted. */
1694 tmps[i] = XEXP (src, bytepos / slen0);
1695 if (! CONSTANT_P (tmps[i])
1696 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1697 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1698 (bytepos % slen0) * BITS_PER_UNIT,
1699 1, NULL_RTX, mode, mode);
1700 }
1701 else
1702 {
1703 rtx mem;
1704
1705 gcc_assert (!bytepos);
1706 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1707 emit_move_insn (mem, src);
1708 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1709 0, 1, NULL_RTX, mode, mode);
1710 }
1711 }
1712 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1713 SIMD register, which is currently broken. While we get GCC
1714 to emit proper RTL for these cases, let's dump to memory. */
1715 else if (VECTOR_MODE_P (GET_MODE (dst))
1716 && REG_P (src))
1717 {
1718 int slen = GET_MODE_SIZE (GET_MODE (src));
1719 rtx mem;
1720
1721 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1722 emit_move_insn (mem, src);
1723 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1724 }
1725 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1726 && XVECLEN (dst, 0) > 1)
1727 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1728 else if (CONSTANT_P (src)
1729 || (REG_P (src) && GET_MODE (src) == mode))
1730 tmps[i] = src;
1731 else
1732 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1733 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1734 mode, mode);
1735
1736 if (shift)
1737 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1738 build_int_cst (NULL_TREE, shift), tmps[i], 0);
1739 }
1740 }
1741
1742 /* Emit code to move a block SRC of type TYPE to a block DST,
1743 where DST is non-consecutive registers represented by a PARALLEL.
1744 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1745 if not known. */
1746
1747 void
1748 emit_group_load (rtx dst, rtx src, tree type, int ssize)
1749 {
1750 rtx *tmps;
1751 int i;
1752
1753 tmps = alloca (sizeof (rtx) * XVECLEN (dst, 0));
1754 emit_group_load_1 (tmps, dst, src, type, ssize);
1755
1756 /* Copy the extracted pieces into the proper (probable) hard regs. */
1757 for (i = 0; i < XVECLEN (dst, 0); i++)
1758 {
1759 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1760 if (d == NULL)
1761 continue;
1762 emit_move_insn (d, tmps[i]);
1763 }
1764 }
1765
1766 /* Similar, but load SRC into new pseudos in a format that looks like
1767 PARALLEL. This can later be fed to emit_group_move to get things
1768 in the right place. */
1769
1770 rtx
1771 emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1772 {
1773 rtvec vec;
1774 int i;
1775
1776 vec = rtvec_alloc (XVECLEN (parallel, 0));
1777 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1778
1779 /* Convert the vector to look just like the original PARALLEL, except
1780 with the computed values. */
1781 for (i = 0; i < XVECLEN (parallel, 0); i++)
1782 {
1783 rtx e = XVECEXP (parallel, 0, i);
1784 rtx d = XEXP (e, 0);
1785
1786 if (d)
1787 {
1788 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1789 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1790 }
1791 RTVEC_ELT (vec, i) = e;
1792 }
1793
1794 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1795 }
1796
1797 /* Emit code to move a block SRC to block DST, where SRC and DST are
1798 non-consecutive groups of registers, each represented by a PARALLEL. */
1799
1800 void
1801 emit_group_move (rtx dst, rtx src)
1802 {
1803 int i;
1804
1805 gcc_assert (GET_CODE (src) == PARALLEL
1806 && GET_CODE (dst) == PARALLEL
1807 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1808
1809 /* Skip first entry if NULL. */
1810 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1811 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1812 XEXP (XVECEXP (src, 0, i), 0));
1813 }
1814
1815 /* Move a group of registers represented by a PARALLEL into pseudos. */
1816
1817 rtx
1818 emit_group_move_into_temps (rtx src)
1819 {
1820 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1821 int i;
1822
1823 for (i = 0; i < XVECLEN (src, 0); i++)
1824 {
1825 rtx e = XVECEXP (src, 0, i);
1826 rtx d = XEXP (e, 0);
1827
1828 if (d)
1829 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1830 RTVEC_ELT (vec, i) = e;
1831 }
1832
1833 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1834 }
1835
1836 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1837 where SRC is non-consecutive registers represented by a PARALLEL.
1838 SSIZE represents the total size of block ORIG_DST, or -1 if not
1839 known. */
1840
1841 void
1842 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1843 {
1844 rtx *tmps, dst;
1845 int start, i;
1846 enum machine_mode m = GET_MODE (orig_dst);
1847
1848 gcc_assert (GET_CODE (src) == PARALLEL);
1849
1850 if (!SCALAR_INT_MODE_P (m)
1851 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1852 {
1853 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1854 if (imode == BLKmode)
1855 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1856 else
1857 dst = gen_reg_rtx (imode);
1858 emit_group_store (dst, src, type, ssize);
1859 if (imode != BLKmode)
1860 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1861 emit_move_insn (orig_dst, dst);
1862 return;
1863 }
1864
1865 /* Check for a NULL entry, used to indicate that the parameter goes
1866 both on the stack and in registers. */
1867 if (XEXP (XVECEXP (src, 0, 0), 0))
1868 start = 0;
1869 else
1870 start = 1;
1871
1872 tmps = alloca (sizeof (rtx) * XVECLEN (src, 0));
1873
1874 /* Copy the (probable) hard regs into pseudos. */
1875 for (i = start; i < XVECLEN (src, 0); i++)
1876 {
1877 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1878 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1879 emit_move_insn (tmps[i], reg);
1880 }
1881
1882 /* If we won't be storing directly into memory, protect the real destination
1883 from strange tricks we might play. */
1884 dst = orig_dst;
1885 if (GET_CODE (dst) == PARALLEL)
1886 {
1887 rtx temp;
1888
1889 /* We can get a PARALLEL dst if there is a conditional expression in
1890 a return statement. In that case, the dst and src are the same,
1891 so no action is necessary. */
1892 if (rtx_equal_p (dst, src))
1893 return;
1894
1895 /* It is unclear if we can ever reach here, but we may as well handle
1896 it. Allocate a temporary, and split this into a store/load to/from
1897 the temporary. */
1898
1899 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1900 emit_group_store (temp, src, type, ssize);
1901 emit_group_load (dst, temp, type, ssize);
1902 return;
1903 }
1904 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1905 {
1906 dst = gen_reg_rtx (GET_MODE (orig_dst));
1907 /* Make life a bit easier for combine. */
1908 emit_move_insn (dst, CONST0_RTX (GET_MODE (orig_dst)));
1909 }
1910
1911 /* Process the pieces. */
1912 for (i = start; i < XVECLEN (src, 0); i++)
1913 {
1914 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
1915 enum machine_mode mode = GET_MODE (tmps[i]);
1916 unsigned int bytelen = GET_MODE_SIZE (mode);
1917 rtx dest = dst;
1918
1919 /* Handle trailing fragments that run over the size of the struct. */
1920 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1921 {
1922 /* store_bit_field always takes its value from the lsb.
1923 Move the fragment to the lsb if it's not already there. */
1924 if (
1925 #ifdef BLOCK_REG_PADDING
1926 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
1927 == (BYTES_BIG_ENDIAN ? upward : downward)
1928 #else
1929 BYTES_BIG_ENDIAN
1930 #endif
1931 )
1932 {
1933 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1934 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
1935 build_int_cst (NULL_TREE, shift),
1936 tmps[i], 0);
1937 }
1938 bytelen = ssize - bytepos;
1939 }
1940
1941 if (GET_CODE (dst) == CONCAT)
1942 {
1943 if (bytepos + bytelen <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
1944 dest = XEXP (dst, 0);
1945 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
1946 {
1947 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
1948 dest = XEXP (dst, 1);
1949 }
1950 else
1951 {
1952 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
1953 dest = assign_stack_temp (GET_MODE (dest),
1954 GET_MODE_SIZE (GET_MODE (dest)), 0);
1955 emit_move_insn (adjust_address (dest, GET_MODE (tmps[i]), bytepos),
1956 tmps[i]);
1957 dst = dest;
1958 break;
1959 }
1960 }
1961
1962 /* Optimize the access just a bit. */
1963 if (MEM_P (dest)
1964 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
1965 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
1966 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1967 && bytelen == GET_MODE_SIZE (mode))
1968 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
1969 else
1970 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
1971 mode, tmps[i]);
1972 }
1973
1974 /* Copy from the pseudo into the (probable) hard reg. */
1975 if (orig_dst != dst)
1976 emit_move_insn (orig_dst, dst);
1977 }
1978
1979 /* Generate code to copy a BLKmode object of TYPE out of a
1980 set of registers starting with SRCREG into TGTBLK. If TGTBLK
1981 is null, a stack temporary is created. TGTBLK is returned.
1982
1983 The purpose of this routine is to handle functions that return
1984 BLKmode structures in registers. Some machines (the PA for example)
1985 want to return all small structures in registers regardless of the
1986 structure's alignment. */
1987
1988 rtx
1989 copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
1990 {
1991 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
1992 rtx src = NULL, dst = NULL;
1993 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
1994 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
1995
1996 if (tgtblk == 0)
1997 {
1998 tgtblk = assign_temp (build_qualified_type (type,
1999 (TYPE_QUALS (type)
2000 | TYPE_QUAL_CONST)),
2001 0, 1, 1);
2002 preserve_temp_slots (tgtblk);
2003 }
2004
2005 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2006 into a new pseudo which is a full word. */
2007
2008 if (GET_MODE (srcreg) != BLKmode
2009 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2010 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2011
2012 /* If the structure doesn't take up a whole number of words, see whether
2013 SRCREG is padded on the left or on the right. If it's on the left,
2014 set PADDING_CORRECTION to the number of bits to skip.
2015
2016 In most ABIs, the structure will be returned at the least end of
2017 the register, which translates to right padding on little-endian
2018 targets and left padding on big-endian targets. The opposite
2019 holds if the structure is returned at the most significant
2020 end of the register. */
2021 if (bytes % UNITS_PER_WORD != 0
2022 && (targetm.calls.return_in_msb (type)
2023 ? !BYTES_BIG_ENDIAN
2024 : BYTES_BIG_ENDIAN))
2025 padding_correction
2026 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2027
2028 /* Copy the structure BITSIZE bites at a time.
2029
2030 We could probably emit more efficient code for machines which do not use
2031 strict alignment, but it doesn't seem worth the effort at the current
2032 time. */
2033 for (bitpos = 0, xbitpos = padding_correction;
2034 bitpos < bytes * BITS_PER_UNIT;
2035 bitpos += bitsize, xbitpos += bitsize)
2036 {
2037 /* We need a new source operand each time xbitpos is on a
2038 word boundary and when xbitpos == padding_correction
2039 (the first time through). */
2040 if (xbitpos % BITS_PER_WORD == 0
2041 || xbitpos == padding_correction)
2042 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2043 GET_MODE (srcreg));
2044
2045 /* We need a new destination operand each time bitpos is on
2046 a word boundary. */
2047 if (bitpos % BITS_PER_WORD == 0)
2048 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2049
2050 /* Use xbitpos for the source extraction (right justified) and
2051 xbitpos for the destination store (left justified). */
2052 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, word_mode,
2053 extract_bit_field (src, bitsize,
2054 xbitpos % BITS_PER_WORD, 1,
2055 NULL_RTX, word_mode, word_mode));
2056 }
2057
2058 return tgtblk;
2059 }
2060
2061 /* Add a USE expression for REG to the (possibly empty) list pointed
2062 to by CALL_FUSAGE. REG must denote a hard register. */
2063
2064 void
2065 use_reg (rtx *call_fusage, rtx reg)
2066 {
2067 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2068
2069 *call_fusage
2070 = gen_rtx_EXPR_LIST (VOIDmode,
2071 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2072 }
2073
2074 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2075 starting at REGNO. All of these registers must be hard registers. */
2076
2077 void
2078 use_regs (rtx *call_fusage, int regno, int nregs)
2079 {
2080 int i;
2081
2082 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2083
2084 for (i = 0; i < nregs; i++)
2085 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2086 }
2087
2088 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2089 PARALLEL REGS. This is for calls that pass values in multiple
2090 non-contiguous locations. The Irix 6 ABI has examples of this. */
2091
2092 void
2093 use_group_regs (rtx *call_fusage, rtx regs)
2094 {
2095 int i;
2096
2097 for (i = 0; i < XVECLEN (regs, 0); i++)
2098 {
2099 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2100
2101 /* A NULL entry means the parameter goes both on the stack and in
2102 registers. This can also be a MEM for targets that pass values
2103 partially on the stack and partially in registers. */
2104 if (reg != 0 && REG_P (reg))
2105 use_reg (call_fusage, reg);
2106 }
2107 }
2108 \f
2109
2110 /* Determine whether the LEN bytes generated by CONSTFUN can be
2111 stored to memory using several move instructions. CONSTFUNDATA is
2112 a pointer which will be passed as argument in every CONSTFUN call.
2113 ALIGN is maximum alignment we can assume. Return nonzero if a
2114 call to store_by_pieces should succeed. */
2115
2116 int
2117 can_store_by_pieces (unsigned HOST_WIDE_INT len,
2118 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2119 void *constfundata, unsigned int align)
2120 {
2121 unsigned HOST_WIDE_INT l;
2122 unsigned int max_size;
2123 HOST_WIDE_INT offset = 0;
2124 enum machine_mode mode, tmode;
2125 enum insn_code icode;
2126 int reverse;
2127 rtx cst;
2128
2129 if (len == 0)
2130 return 1;
2131
2132 if (! STORE_BY_PIECES_P (len, align))
2133 return 0;
2134
2135 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2136 if (align >= GET_MODE_ALIGNMENT (tmode))
2137 align = GET_MODE_ALIGNMENT (tmode);
2138 else
2139 {
2140 enum machine_mode xmode;
2141
2142 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2143 tmode != VOIDmode;
2144 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2145 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2146 || SLOW_UNALIGNED_ACCESS (tmode, align))
2147 break;
2148
2149 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2150 }
2151
2152 /* We would first store what we can in the largest integer mode, then go to
2153 successively smaller modes. */
2154
2155 for (reverse = 0;
2156 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2157 reverse++)
2158 {
2159 l = len;
2160 mode = VOIDmode;
2161 max_size = STORE_MAX_PIECES + 1;
2162 while (max_size > 1)
2163 {
2164 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2165 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2166 if (GET_MODE_SIZE (tmode) < max_size)
2167 mode = tmode;
2168
2169 if (mode == VOIDmode)
2170 break;
2171
2172 icode = mov_optab->handlers[(int) mode].insn_code;
2173 if (icode != CODE_FOR_nothing
2174 && align >= GET_MODE_ALIGNMENT (mode))
2175 {
2176 unsigned int size = GET_MODE_SIZE (mode);
2177
2178 while (l >= size)
2179 {
2180 if (reverse)
2181 offset -= size;
2182
2183 cst = (*constfun) (constfundata, offset, mode);
2184 if (!LEGITIMATE_CONSTANT_P (cst))
2185 return 0;
2186
2187 if (!reverse)
2188 offset += size;
2189
2190 l -= size;
2191 }
2192 }
2193
2194 max_size = GET_MODE_SIZE (mode);
2195 }
2196
2197 /* The code above should have handled everything. */
2198 gcc_assert (!l);
2199 }
2200
2201 return 1;
2202 }
2203
2204 /* Generate several move instructions to store LEN bytes generated by
2205 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2206 pointer which will be passed as argument in every CONSTFUN call.
2207 ALIGN is maximum alignment we can assume.
2208 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2209 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2210 stpcpy. */
2211
2212 rtx
2213 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2214 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2215 void *constfundata, unsigned int align, int endp)
2216 {
2217 struct store_by_pieces data;
2218
2219 if (len == 0)
2220 {
2221 gcc_assert (endp != 2);
2222 return to;
2223 }
2224
2225 gcc_assert (STORE_BY_PIECES_P (len, align));
2226 data.constfun = constfun;
2227 data.constfundata = constfundata;
2228 data.len = len;
2229 data.to = to;
2230 store_by_pieces_1 (&data, align);
2231 if (endp)
2232 {
2233 rtx to1;
2234
2235 gcc_assert (!data.reverse);
2236 if (data.autinc_to)
2237 {
2238 if (endp == 2)
2239 {
2240 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2241 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2242 else
2243 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
2244 -1));
2245 }
2246 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2247 data.offset);
2248 }
2249 else
2250 {
2251 if (endp == 2)
2252 --data.offset;
2253 to1 = adjust_address (data.to, QImode, data.offset);
2254 }
2255 return to1;
2256 }
2257 else
2258 return data.to;
2259 }
2260
2261 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2262 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2263
2264 static void
2265 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2266 {
2267 struct store_by_pieces data;
2268
2269 if (len == 0)
2270 return;
2271
2272 data.constfun = clear_by_pieces_1;
2273 data.constfundata = NULL;
2274 data.len = len;
2275 data.to = to;
2276 store_by_pieces_1 (&data, align);
2277 }
2278
2279 /* Callback routine for clear_by_pieces.
2280 Return const0_rtx unconditionally. */
2281
2282 static rtx
2283 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2284 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2285 enum machine_mode mode ATTRIBUTE_UNUSED)
2286 {
2287 return const0_rtx;
2288 }
2289
2290 /* Subroutine of clear_by_pieces and store_by_pieces.
2291 Generate several move instructions to store LEN bytes of block TO. (A MEM
2292 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2293
2294 static void
2295 store_by_pieces_1 (struct store_by_pieces *data ATTRIBUTE_UNUSED,
2296 unsigned int align ATTRIBUTE_UNUSED)
2297 {
2298 rtx to_addr = XEXP (data->to, 0);
2299 unsigned int max_size = STORE_MAX_PIECES + 1;
2300 enum machine_mode mode = VOIDmode, tmode;
2301 enum insn_code icode;
2302
2303 data->offset = 0;
2304 data->to_addr = to_addr;
2305 data->autinc_to
2306 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2307 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2308
2309 data->explicit_inc_to = 0;
2310 data->reverse
2311 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2312 if (data->reverse)
2313 data->offset = data->len;
2314
2315 /* If storing requires more than two move insns,
2316 copy addresses to registers (to make displacements shorter)
2317 and use post-increment if available. */
2318 if (!data->autinc_to
2319 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2320 {
2321 /* Determine the main mode we'll be using. */
2322 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2323 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2324 if (GET_MODE_SIZE (tmode) < max_size)
2325 mode = tmode;
2326
2327 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2328 {
2329 data->to_addr = copy_addr_to_reg (plus_constant (to_addr, data->len));
2330 data->autinc_to = 1;
2331 data->explicit_inc_to = -1;
2332 }
2333
2334 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2335 && ! data->autinc_to)
2336 {
2337 data->to_addr = copy_addr_to_reg (to_addr);
2338 data->autinc_to = 1;
2339 data->explicit_inc_to = 1;
2340 }
2341
2342 if ( !data->autinc_to && CONSTANT_P (to_addr))
2343 data->to_addr = copy_addr_to_reg (to_addr);
2344 }
2345
2346 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2347 if (align >= GET_MODE_ALIGNMENT (tmode))
2348 align = GET_MODE_ALIGNMENT (tmode);
2349 else
2350 {
2351 enum machine_mode xmode;
2352
2353 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2354 tmode != VOIDmode;
2355 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2356 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2357 || SLOW_UNALIGNED_ACCESS (tmode, align))
2358 break;
2359
2360 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2361 }
2362
2363 /* First store what we can in the largest integer mode, then go to
2364 successively smaller modes. */
2365
2366 while (max_size > 1)
2367 {
2368 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2369 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2370 if (GET_MODE_SIZE (tmode) < max_size)
2371 mode = tmode;
2372
2373 if (mode == VOIDmode)
2374 break;
2375
2376 icode = mov_optab->handlers[(int) mode].insn_code;
2377 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2378 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2379
2380 max_size = GET_MODE_SIZE (mode);
2381 }
2382
2383 /* The code above should have handled everything. */
2384 gcc_assert (!data->len);
2385 }
2386
2387 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2388 with move instructions for mode MODE. GENFUN is the gen_... function
2389 to make a move insn for that mode. DATA has all the other info. */
2390
2391 static void
2392 store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2393 struct store_by_pieces *data)
2394 {
2395 unsigned int size = GET_MODE_SIZE (mode);
2396 rtx to1, cst;
2397
2398 while (data->len >= size)
2399 {
2400 if (data->reverse)
2401 data->offset -= size;
2402
2403 if (data->autinc_to)
2404 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2405 data->offset);
2406 else
2407 to1 = adjust_address (data->to, mode, data->offset);
2408
2409 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2410 emit_insn (gen_add2_insn (data->to_addr,
2411 GEN_INT (-(HOST_WIDE_INT) size)));
2412
2413 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2414 emit_insn ((*genfun) (to1, cst));
2415
2416 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2417 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2418
2419 if (! data->reverse)
2420 data->offset += size;
2421
2422 data->len -= size;
2423 }
2424 }
2425 \f
2426 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2427 its length in bytes. */
2428
2429 rtx
2430 clear_storage (rtx object, rtx size)
2431 {
2432 enum machine_mode mode = GET_MODE (object);
2433 unsigned int align;
2434
2435 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2436 just move a zero. Otherwise, do this a piece at a time. */
2437 if (mode != BLKmode
2438 && GET_CODE (size) == CONST_INT
2439 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2440 {
2441 rtx zero = CONST0_RTX (mode);
2442 if (zero != NULL)
2443 {
2444 emit_move_insn (object, zero);
2445 return NULL;
2446 }
2447
2448 if (COMPLEX_MODE_P (mode))
2449 {
2450 zero = CONST0_RTX (GET_MODE_INNER (mode));
2451 if (zero != NULL)
2452 {
2453 write_complex_part (object, zero, 0);
2454 write_complex_part (object, zero, 1);
2455 return NULL;
2456 }
2457 }
2458 }
2459
2460 if (size == const0_rtx)
2461 return NULL;
2462
2463 align = MEM_ALIGN (object);
2464
2465 if (GET_CODE (size) == CONST_INT
2466 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2467 clear_by_pieces (object, INTVAL (size), align);
2468 else if (clear_storage_via_clrmem (object, size, align))
2469 ;
2470 else
2471 return clear_storage_via_libcall (object, size);
2472
2473 return NULL;
2474 }
2475
2476 /* A subroutine of clear_storage. Expand a clrmem pattern;
2477 return true if successful. */
2478
2479 static bool
2480 clear_storage_via_clrmem (rtx object, rtx size, unsigned int align)
2481 {
2482 /* Try the most limited insn first, because there's no point
2483 including more than one in the machine description unless
2484 the more limited one has some advantage. */
2485
2486 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
2487 enum machine_mode mode;
2488
2489 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2490 mode = GET_MODE_WIDER_MODE (mode))
2491 {
2492 enum insn_code code = clrmem_optab[(int) mode];
2493 insn_operand_predicate_fn pred;
2494
2495 if (code != CODE_FOR_nothing
2496 /* We don't need MODE to be narrower than
2497 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2498 the mode mask, as it is returned by the macro, it will
2499 definitely be less than the actual mode mask. */
2500 && ((GET_CODE (size) == CONST_INT
2501 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2502 <= (GET_MODE_MASK (mode) >> 1)))
2503 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
2504 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
2505 || (*pred) (object, BLKmode))
2506 && ((pred = insn_data[(int) code].operand[2].predicate) == 0
2507 || (*pred) (opalign, VOIDmode)))
2508 {
2509 rtx op1;
2510 rtx last = get_last_insn ();
2511 rtx pat;
2512
2513 op1 = convert_to_mode (mode, size, 1);
2514 pred = insn_data[(int) code].operand[1].predicate;
2515 if (pred != 0 && ! (*pred) (op1, mode))
2516 op1 = copy_to_mode_reg (mode, op1);
2517
2518 pat = GEN_FCN ((int) code) (object, op1, opalign);
2519 if (pat)
2520 {
2521 emit_insn (pat);
2522 return true;
2523 }
2524 else
2525 delete_insns_since (last);
2526 }
2527 }
2528
2529 return false;
2530 }
2531
2532 /* A subroutine of clear_storage. Expand a call to memset.
2533 Return the return value of memset, 0 otherwise. */
2534
2535 static rtx
2536 clear_storage_via_libcall (rtx object, rtx size)
2537 {
2538 tree call_expr, arg_list, fn, object_tree, size_tree;
2539 enum machine_mode size_mode;
2540 rtx retval;
2541
2542 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2543 place those into new pseudos into a VAR_DECL and use them later. */
2544
2545 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2546
2547 size_mode = TYPE_MODE (sizetype);
2548 size = convert_to_mode (size_mode, size, 1);
2549 size = copy_to_mode_reg (size_mode, size);
2550
2551 /* It is incorrect to use the libcall calling conventions to call
2552 memset in this context. This could be a user call to memset and
2553 the user may wish to examine the return value from memset. For
2554 targets where libcalls and normal calls have different conventions
2555 for returning pointers, we could end up generating incorrect code. */
2556
2557 object_tree = make_tree (ptr_type_node, object);
2558 size_tree = make_tree (sizetype, size);
2559
2560 fn = clear_storage_libcall_fn (true);
2561 arg_list = tree_cons (NULL_TREE, size_tree, NULL_TREE);
2562 arg_list = tree_cons (NULL_TREE, integer_zero_node, arg_list);
2563 arg_list = tree_cons (NULL_TREE, object_tree, arg_list);
2564
2565 /* Now we have to build up the CALL_EXPR itself. */
2566 call_expr = build1 (ADDR_EXPR, build_pointer_type (TREE_TYPE (fn)), fn);
2567 call_expr = build3 (CALL_EXPR, TREE_TYPE (TREE_TYPE (fn)),
2568 call_expr, arg_list, NULL_TREE);
2569
2570 retval = expand_expr (call_expr, NULL_RTX, VOIDmode, 0);
2571
2572 return retval;
2573 }
2574
2575 /* A subroutine of clear_storage_via_libcall. Create the tree node
2576 for the function we use for block clears. The first time FOR_CALL
2577 is true, we call assemble_external. */
2578
2579 static GTY(()) tree block_clear_fn;
2580
2581 void
2582 init_block_clear_fn (const char *asmspec)
2583 {
2584 if (!block_clear_fn)
2585 {
2586 tree fn, args;
2587
2588 fn = get_identifier ("memset");
2589 args = build_function_type_list (ptr_type_node, ptr_type_node,
2590 integer_type_node, sizetype,
2591 NULL_TREE);
2592
2593 fn = build_decl (FUNCTION_DECL, fn, args);
2594 DECL_EXTERNAL (fn) = 1;
2595 TREE_PUBLIC (fn) = 1;
2596 DECL_ARTIFICIAL (fn) = 1;
2597 TREE_NOTHROW (fn) = 1;
2598
2599 block_clear_fn = fn;
2600 }
2601
2602 if (asmspec)
2603 set_user_assembler_name (block_clear_fn, asmspec);
2604 }
2605
2606 static tree
2607 clear_storage_libcall_fn (int for_call)
2608 {
2609 static bool emitted_extern;
2610
2611 if (!block_clear_fn)
2612 init_block_clear_fn (NULL);
2613
2614 if (for_call && !emitted_extern)
2615 {
2616 emitted_extern = true;
2617 make_decl_rtl (block_clear_fn);
2618 assemble_external (block_clear_fn);
2619 }
2620
2621 return block_clear_fn;
2622 }
2623 \f
2624 /* Write to one of the components of the complex value CPLX. Write VAL to
2625 the real part if IMAG_P is false, and the imaginary part if its true. */
2626
2627 static void
2628 write_complex_part (rtx cplx, rtx val, bool imag_p)
2629 {
2630 enum machine_mode cmode;
2631 enum machine_mode imode;
2632 unsigned ibitsize;
2633
2634 if (GET_CODE (cplx) == CONCAT)
2635 {
2636 emit_move_insn (XEXP (cplx, imag_p), val);
2637 return;
2638 }
2639
2640 cmode = GET_MODE (cplx);
2641 imode = GET_MODE_INNER (cmode);
2642 ibitsize = GET_MODE_BITSIZE (imode);
2643
2644 /* If the sub-object is at least word sized, then we know that subregging
2645 will work. This special case is important, since store_bit_field
2646 wants to operate on integer modes, and there's rarely an OImode to
2647 correspond to TCmode. */
2648 if (ibitsize >= BITS_PER_WORD
2649 /* For hard regs we have exact predicates. Assume we can split
2650 the original object if it spans an even number of hard regs.
2651 This special case is important for SCmode on 64-bit platforms
2652 where the natural size of floating-point regs is 32-bit. */
2653 || (GET_CODE (cplx) == REG
2654 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2655 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0)
2656 /* For MEMs we always try to make a "subreg", that is to adjust
2657 the MEM, because store_bit_field may generate overly
2658 convoluted RTL for sub-word fields. */
2659 || MEM_P (cplx))
2660 {
2661 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2662 imag_p ? GET_MODE_SIZE (imode) : 0);
2663 if (part)
2664 {
2665 emit_move_insn (part, val);
2666 return;
2667 }
2668 else
2669 /* simplify_gen_subreg may fail for sub-word MEMs. */
2670 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2671 }
2672
2673 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, imode, val);
2674 }
2675
2676 /* Extract one of the components of the complex value CPLX. Extract the
2677 real part if IMAG_P is false, and the imaginary part if it's true. */
2678
2679 static rtx
2680 read_complex_part (rtx cplx, bool imag_p)
2681 {
2682 enum machine_mode cmode, imode;
2683 unsigned ibitsize;
2684
2685 if (GET_CODE (cplx) == CONCAT)
2686 return XEXP (cplx, imag_p);
2687
2688 cmode = GET_MODE (cplx);
2689 imode = GET_MODE_INNER (cmode);
2690 ibitsize = GET_MODE_BITSIZE (imode);
2691
2692 /* Special case reads from complex constants that got spilled to memory. */
2693 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2694 {
2695 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2696 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2697 {
2698 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2699 if (CONSTANT_CLASS_P (part))
2700 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2701 }
2702 }
2703
2704 /* If the sub-object is at least word sized, then we know that subregging
2705 will work. This special case is important, since extract_bit_field
2706 wants to operate on integer modes, and there's rarely an OImode to
2707 correspond to TCmode. */
2708 if (ibitsize >= BITS_PER_WORD
2709 /* For hard regs we have exact predicates. Assume we can split
2710 the original object if it spans an even number of hard regs.
2711 This special case is important for SCmode on 64-bit platforms
2712 where the natural size of floating-point regs is 32-bit. */
2713 || (GET_CODE (cplx) == REG
2714 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2715 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0)
2716 /* For MEMs we always try to make a "subreg", that is to adjust
2717 the MEM, because extract_bit_field may generate overly
2718 convoluted RTL for sub-word fields. */
2719 || MEM_P (cplx))
2720 {
2721 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2722 imag_p ? GET_MODE_SIZE (imode) : 0);
2723 if (ret)
2724 return ret;
2725 else
2726 /* simplify_gen_subreg may fail for sub-word MEMs. */
2727 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2728 }
2729
2730 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2731 true, NULL_RTX, imode, imode);
2732 }
2733 \f
2734 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2735 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2736 represented in NEW_MODE. If FORCE is true, this will never happen, as
2737 we'll force-create a SUBREG if needed. */
2738
2739 static rtx
2740 emit_move_change_mode (enum machine_mode new_mode,
2741 enum machine_mode old_mode, rtx x, bool force)
2742 {
2743 rtx ret;
2744
2745 if (reload_in_progress && MEM_P (x))
2746 {
2747 /* We can't use gen_lowpart here because it may call change_address
2748 which is not appropriate if we were called when a reload was in
2749 progress. We don't have to worry about changing the address since
2750 the size in bytes is supposed to be the same. Copy the MEM to
2751 change the mode and move any substitutions from the old MEM to
2752 the new one. */
2753
2754 ret = adjust_address_nv (x, new_mode, 0);
2755 copy_replacements (x, ret);
2756 }
2757 else
2758 {
2759 /* Note that we do want simplify_subreg's behavior of validating
2760 that the new mode is ok for a hard register. If we were to use
2761 simplify_gen_subreg, we would create the subreg, but would
2762 probably run into the target not being able to implement it. */
2763 /* Except, of course, when FORCE is true, when this is exactly what
2764 we want. Which is needed for CCmodes on some targets. */
2765 if (force)
2766 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2767 else
2768 ret = simplify_subreg (new_mode, x, old_mode, 0);
2769 }
2770
2771 return ret;
2772 }
2773
2774 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2775 an integer mode of the same size as MODE. Returns the instruction
2776 emitted, or NULL if such a move could not be generated. */
2777
2778 static rtx
2779 emit_move_via_integer (enum machine_mode mode, rtx x, rtx y)
2780 {
2781 enum machine_mode imode;
2782 enum insn_code code;
2783
2784 /* There must exist a mode of the exact size we require. */
2785 imode = int_mode_for_mode (mode);
2786 if (imode == BLKmode)
2787 return NULL_RTX;
2788
2789 /* The target must support moves in this mode. */
2790 code = mov_optab->handlers[imode].insn_code;
2791 if (code == CODE_FOR_nothing)
2792 return NULL_RTX;
2793
2794 x = emit_move_change_mode (imode, mode, x, false);
2795 if (x == NULL_RTX)
2796 return NULL_RTX;
2797 y = emit_move_change_mode (imode, mode, y, false);
2798 if (y == NULL_RTX)
2799 return NULL_RTX;
2800 return emit_insn (GEN_FCN (code) (x, y));
2801 }
2802
2803 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
2804 Return an equivalent MEM that does not use an auto-increment. */
2805
2806 static rtx
2807 emit_move_resolve_push (enum machine_mode mode, rtx x)
2808 {
2809 enum rtx_code code = GET_CODE (XEXP (x, 0));
2810 HOST_WIDE_INT adjust;
2811 rtx temp;
2812
2813 adjust = GET_MODE_SIZE (mode);
2814 #ifdef PUSH_ROUNDING
2815 adjust = PUSH_ROUNDING (adjust);
2816 #endif
2817 if (code == PRE_DEC || code == POST_DEC)
2818 adjust = -adjust;
2819
2820 /* Do not use anti_adjust_stack, since we don't want to update
2821 stack_pointer_delta. */
2822 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
2823 GEN_INT (adjust), stack_pointer_rtx,
2824 0, OPTAB_LIB_WIDEN);
2825 if (temp != stack_pointer_rtx)
2826 emit_move_insn (stack_pointer_rtx, temp);
2827
2828 switch (code)
2829 {
2830 case PRE_INC:
2831 case PRE_DEC:
2832 temp = stack_pointer_rtx;
2833 break;
2834 case POST_INC:
2835 temp = plus_constant (stack_pointer_rtx, -GET_MODE_SIZE (mode));
2836 break;
2837 case POST_DEC:
2838 temp = plus_constant (stack_pointer_rtx, GET_MODE_SIZE (mode));
2839 break;
2840 default:
2841 gcc_unreachable ();
2842 }
2843
2844 return replace_equiv_address (x, temp);
2845 }
2846
2847 /* A subroutine of emit_move_complex. Generate a move from Y into X.
2848 X is known to satisfy push_operand, and MODE is known to be complex.
2849 Returns the last instruction emitted. */
2850
2851 static rtx
2852 emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
2853 {
2854 enum machine_mode submode = GET_MODE_INNER (mode);
2855 bool imag_first;
2856
2857 #ifdef PUSH_ROUNDING
2858 unsigned int submodesize = GET_MODE_SIZE (submode);
2859
2860 /* In case we output to the stack, but the size is smaller than the
2861 machine can push exactly, we need to use move instructions. */
2862 if (PUSH_ROUNDING (submodesize) != submodesize)
2863 {
2864 x = emit_move_resolve_push (mode, x);
2865 return emit_move_insn (x, y);
2866 }
2867 #endif
2868
2869 /* Note that the real part always precedes the imag part in memory
2870 regardless of machine's endianness. */
2871 switch (GET_CODE (XEXP (x, 0)))
2872 {
2873 case PRE_DEC:
2874 case POST_DEC:
2875 imag_first = true;
2876 break;
2877 case PRE_INC:
2878 case POST_INC:
2879 imag_first = false;
2880 break;
2881 default:
2882 gcc_unreachable ();
2883 }
2884
2885 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
2886 read_complex_part (y, imag_first));
2887 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
2888 read_complex_part (y, !imag_first));
2889 }
2890
2891 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
2892 MODE is known to be complex. Returns the last instruction emitted. */
2893
2894 static rtx
2895 emit_move_complex (enum machine_mode mode, rtx x, rtx y)
2896 {
2897 bool try_int;
2898
2899 /* Need to take special care for pushes, to maintain proper ordering
2900 of the data, and possibly extra padding. */
2901 if (push_operand (x, mode))
2902 return emit_move_complex_push (mode, x, y);
2903
2904 /* See if we can coerce the target into moving both values at once. */
2905
2906 /* Move floating point as parts. */
2907 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
2908 && mov_optab->handlers[GET_MODE_INNER (mode)].insn_code != CODE_FOR_nothing)
2909 try_int = false;
2910 /* Not possible if the values are inherently not adjacent. */
2911 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
2912 try_int = false;
2913 /* Is possible if both are registers (or subregs of registers). */
2914 else if (register_operand (x, mode) && register_operand (y, mode))
2915 try_int = true;
2916 /* If one of the operands is a memory, and alignment constraints
2917 are friendly enough, we may be able to do combined memory operations.
2918 We do not attempt this if Y is a constant because that combination is
2919 usually better with the by-parts thing below. */
2920 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
2921 && (!STRICT_ALIGNMENT
2922 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
2923 try_int = true;
2924 else
2925 try_int = false;
2926
2927 if (try_int)
2928 {
2929 rtx ret;
2930
2931 /* For memory to memory moves, optimal behavior can be had with the
2932 existing block move logic. */
2933 if (MEM_P (x) && MEM_P (y))
2934 {
2935 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
2936 BLOCK_OP_NO_LIBCALL);
2937 return get_last_insn ();
2938 }
2939
2940 ret = emit_move_via_integer (mode, x, y);
2941 if (ret)
2942 return ret;
2943 }
2944
2945 /* Show the output dies here. This is necessary for SUBREGs
2946 of pseudos since we cannot track their lifetimes correctly;
2947 hard regs shouldn't appear here except as return values. */
2948 if (!reload_completed && !reload_in_progress
2949 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
2950 emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
2951
2952 write_complex_part (x, read_complex_part (y, false), false);
2953 write_complex_part (x, read_complex_part (y, true), true);
2954 return get_last_insn ();
2955 }
2956
2957 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
2958 MODE is known to be MODE_CC. Returns the last instruction emitted. */
2959
2960 static rtx
2961 emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
2962 {
2963 rtx ret;
2964
2965 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
2966 if (mode != CCmode)
2967 {
2968 enum insn_code code = mov_optab->handlers[CCmode].insn_code;
2969 if (code != CODE_FOR_nothing)
2970 {
2971 x = emit_move_change_mode (CCmode, mode, x, true);
2972 y = emit_move_change_mode (CCmode, mode, y, true);
2973 return emit_insn (GEN_FCN (code) (x, y));
2974 }
2975 }
2976
2977 /* Otherwise, find the MODE_INT mode of the same width. */
2978 ret = emit_move_via_integer (mode, x, y);
2979 gcc_assert (ret != NULL);
2980 return ret;
2981 }
2982
2983 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
2984 MODE is any multi-word or full-word mode that lacks a move_insn
2985 pattern. Note that you will get better code if you define such
2986 patterns, even if they must turn into multiple assembler instructions. */
2987
2988 static rtx
2989 emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
2990 {
2991 rtx last_insn = 0;
2992 rtx seq, inner;
2993 bool need_clobber;
2994 int i;
2995
2996 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
2997
2998 /* If X is a push on the stack, do the push now and replace
2999 X with a reference to the stack pointer. */
3000 if (push_operand (x, mode))
3001 x = emit_move_resolve_push (mode, x);
3002
3003 /* If we are in reload, see if either operand is a MEM whose address
3004 is scheduled for replacement. */
3005 if (reload_in_progress && MEM_P (x)
3006 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3007 x = replace_equiv_address_nv (x, inner);
3008 if (reload_in_progress && MEM_P (y)
3009 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3010 y = replace_equiv_address_nv (y, inner);
3011
3012 start_sequence ();
3013
3014 need_clobber = false;
3015 for (i = 0;
3016 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3017 i++)
3018 {
3019 rtx xpart = operand_subword (x, i, 1, mode);
3020 rtx ypart = operand_subword (y, i, 1, mode);
3021
3022 /* If we can't get a part of Y, put Y into memory if it is a
3023 constant. Otherwise, force it into a register. If we still
3024 can't get a part of Y, abort. */
3025 if (ypart == 0 && CONSTANT_P (y))
3026 {
3027 y = force_const_mem (mode, y);
3028 ypart = operand_subword (y, i, 1, mode);
3029 }
3030 else if (ypart == 0)
3031 ypart = operand_subword_force (y, i, mode);
3032
3033 gcc_assert (xpart && ypart);
3034
3035 need_clobber |= (GET_CODE (xpart) == SUBREG);
3036
3037 last_insn = emit_move_insn (xpart, ypart);
3038 }
3039
3040 seq = get_insns ();
3041 end_sequence ();
3042
3043 /* Show the output dies here. This is necessary for SUBREGs
3044 of pseudos since we cannot track their lifetimes correctly;
3045 hard regs shouldn't appear here except as return values.
3046 We never want to emit such a clobber after reload. */
3047 if (x != y
3048 && ! (reload_in_progress || reload_completed)
3049 && need_clobber != 0)
3050 emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
3051
3052 emit_insn (seq);
3053
3054 return last_insn;
3055 }
3056
3057 /* Low level part of emit_move_insn.
3058 Called just like emit_move_insn, but assumes X and Y
3059 are basically valid. */
3060
3061 rtx
3062 emit_move_insn_1 (rtx x, rtx y)
3063 {
3064 enum machine_mode mode = GET_MODE (x);
3065 enum insn_code code;
3066
3067 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3068
3069 code = mov_optab->handlers[mode].insn_code;
3070 if (code != CODE_FOR_nothing)
3071 return emit_insn (GEN_FCN (code) (x, y));
3072
3073 /* Expand complex moves by moving real part and imag part. */
3074 if (COMPLEX_MODE_P (mode))
3075 return emit_move_complex (mode, x, y);
3076
3077 if (GET_MODE_CLASS (mode) == MODE_CC)
3078 return emit_move_ccmode (mode, x, y);
3079
3080 /* Try using a move pattern for the corresponding integer mode. This is
3081 only safe when simplify_subreg can convert MODE constants into integer
3082 constants. At present, it can only do this reliably if the value
3083 fits within a HOST_WIDE_INT. */
3084 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3085 {
3086 rtx ret = emit_move_via_integer (mode, x, y);
3087 if (ret)
3088 return ret;
3089 }
3090
3091 return emit_move_multi_word (mode, x, y);
3092 }
3093
3094 /* Generate code to copy Y into X.
3095 Both Y and X must have the same mode, except that
3096 Y can be a constant with VOIDmode.
3097 This mode cannot be BLKmode; use emit_block_move for that.
3098
3099 Return the last instruction emitted. */
3100
3101 rtx
3102 emit_move_insn (rtx x, rtx y)
3103 {
3104 enum machine_mode mode = GET_MODE (x);
3105 rtx y_cst = NULL_RTX;
3106 rtx last_insn, set;
3107
3108 gcc_assert (mode != BLKmode
3109 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3110
3111 if (CONSTANT_P (y))
3112 {
3113 if (optimize
3114 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3115 && (last_insn = compress_float_constant (x, y)))
3116 return last_insn;
3117
3118 y_cst = y;
3119
3120 if (!LEGITIMATE_CONSTANT_P (y))
3121 {
3122 y = force_const_mem (mode, y);
3123
3124 /* If the target's cannot_force_const_mem prevented the spill,
3125 assume that the target's move expanders will also take care
3126 of the non-legitimate constant. */
3127 if (!y)
3128 y = y_cst;
3129 }
3130 }
3131
3132 /* If X or Y are memory references, verify that their addresses are valid
3133 for the machine. */
3134 if (MEM_P (x)
3135 && ((! memory_address_p (GET_MODE (x), XEXP (x, 0))
3136 && ! push_operand (x, GET_MODE (x)))
3137 || (flag_force_addr
3138 && CONSTANT_ADDRESS_P (XEXP (x, 0)))))
3139 x = validize_mem (x);
3140
3141 if (MEM_P (y)
3142 && (! memory_address_p (GET_MODE (y), XEXP (y, 0))
3143 || (flag_force_addr
3144 && CONSTANT_ADDRESS_P (XEXP (y, 0)))))
3145 y = validize_mem (y);
3146
3147 gcc_assert (mode != BLKmode);
3148
3149 last_insn = emit_move_insn_1 (x, y);
3150
3151 if (y_cst && REG_P (x)
3152 && (set = single_set (last_insn)) != NULL_RTX
3153 && SET_DEST (set) == x
3154 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3155 set_unique_reg_note (last_insn, REG_EQUAL, y_cst);
3156
3157 return last_insn;
3158 }
3159
3160 /* If Y is representable exactly in a narrower mode, and the target can
3161 perform the extension directly from constant or memory, then emit the
3162 move as an extension. */
3163
3164 static rtx
3165 compress_float_constant (rtx x, rtx y)
3166 {
3167 enum machine_mode dstmode = GET_MODE (x);
3168 enum machine_mode orig_srcmode = GET_MODE (y);
3169 enum machine_mode srcmode;
3170 REAL_VALUE_TYPE r;
3171
3172 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3173
3174 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3175 srcmode != orig_srcmode;
3176 srcmode = GET_MODE_WIDER_MODE (srcmode))
3177 {
3178 enum insn_code ic;
3179 rtx trunc_y, last_insn;
3180
3181 /* Skip if the target can't extend this way. */
3182 ic = can_extend_p (dstmode, srcmode, 0);
3183 if (ic == CODE_FOR_nothing)
3184 continue;
3185
3186 /* Skip if the narrowed value isn't exact. */
3187 if (! exact_real_truncate (srcmode, &r))
3188 continue;
3189
3190 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3191
3192 if (LEGITIMATE_CONSTANT_P (trunc_y))
3193 {
3194 /* Skip if the target needs extra instructions to perform
3195 the extension. */
3196 if (! (*insn_data[ic].operand[1].predicate) (trunc_y, srcmode))
3197 continue;
3198 }
3199 else if (float_extend_from_mem[dstmode][srcmode])
3200 trunc_y = validize_mem (force_const_mem (srcmode, trunc_y));
3201 else
3202 continue;
3203
3204 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3205 last_insn = get_last_insn ();
3206
3207 if (REG_P (x))
3208 set_unique_reg_note (last_insn, REG_EQUAL, y);
3209
3210 return last_insn;
3211 }
3212
3213 return NULL_RTX;
3214 }
3215 \f
3216 /* Pushing data onto the stack. */
3217
3218 /* Push a block of length SIZE (perhaps variable)
3219 and return an rtx to address the beginning of the block.
3220 The value may be virtual_outgoing_args_rtx.
3221
3222 EXTRA is the number of bytes of padding to push in addition to SIZE.
3223 BELOW nonzero means this padding comes at low addresses;
3224 otherwise, the padding comes at high addresses. */
3225
3226 rtx
3227 push_block (rtx size, int extra, int below)
3228 {
3229 rtx temp;
3230
3231 size = convert_modes (Pmode, ptr_mode, size, 1);
3232 if (CONSTANT_P (size))
3233 anti_adjust_stack (plus_constant (size, extra));
3234 else if (REG_P (size) && extra == 0)
3235 anti_adjust_stack (size);
3236 else
3237 {
3238 temp = copy_to_mode_reg (Pmode, size);
3239 if (extra != 0)
3240 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3241 temp, 0, OPTAB_LIB_WIDEN);
3242 anti_adjust_stack (temp);
3243 }
3244
3245 #ifndef STACK_GROWS_DOWNWARD
3246 if (0)
3247 #else
3248 if (1)
3249 #endif
3250 {
3251 temp = virtual_outgoing_args_rtx;
3252 if (extra != 0 && below)
3253 temp = plus_constant (temp, extra);
3254 }
3255 else
3256 {
3257 if (GET_CODE (size) == CONST_INT)
3258 temp = plus_constant (virtual_outgoing_args_rtx,
3259 -INTVAL (size) - (below ? 0 : extra));
3260 else if (extra != 0 && !below)
3261 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3262 negate_rtx (Pmode, plus_constant (size, extra)));
3263 else
3264 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3265 negate_rtx (Pmode, size));
3266 }
3267
3268 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3269 }
3270
3271 #ifdef PUSH_ROUNDING
3272
3273 /* Emit single push insn. */
3274
3275 static void
3276 emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3277 {
3278 rtx dest_addr;
3279 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3280 rtx dest;
3281 enum insn_code icode;
3282 insn_operand_predicate_fn pred;
3283
3284 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3285 /* If there is push pattern, use it. Otherwise try old way of throwing
3286 MEM representing push operation to move expander. */
3287 icode = push_optab->handlers[(int) mode].insn_code;
3288 if (icode != CODE_FOR_nothing)
3289 {
3290 if (((pred = insn_data[(int) icode].operand[0].predicate)
3291 && !((*pred) (x, mode))))
3292 x = force_reg (mode, x);
3293 emit_insn (GEN_FCN (icode) (x));
3294 return;
3295 }
3296 if (GET_MODE_SIZE (mode) == rounded_size)
3297 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3298 /* If we are to pad downward, adjust the stack pointer first and
3299 then store X into the stack location using an offset. This is
3300 because emit_move_insn does not know how to pad; it does not have
3301 access to type. */
3302 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3303 {
3304 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3305 HOST_WIDE_INT offset;
3306
3307 emit_move_insn (stack_pointer_rtx,
3308 expand_binop (Pmode,
3309 #ifdef STACK_GROWS_DOWNWARD
3310 sub_optab,
3311 #else
3312 add_optab,
3313 #endif
3314 stack_pointer_rtx,
3315 GEN_INT (rounded_size),
3316 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3317
3318 offset = (HOST_WIDE_INT) padding_size;
3319 #ifdef STACK_GROWS_DOWNWARD
3320 if (STACK_PUSH_CODE == POST_DEC)
3321 /* We have already decremented the stack pointer, so get the
3322 previous value. */
3323 offset += (HOST_WIDE_INT) rounded_size;
3324 #else
3325 if (STACK_PUSH_CODE == POST_INC)
3326 /* We have already incremented the stack pointer, so get the
3327 previous value. */
3328 offset -= (HOST_WIDE_INT) rounded_size;
3329 #endif
3330 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3331 }
3332 else
3333 {
3334 #ifdef STACK_GROWS_DOWNWARD
3335 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3336 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3337 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3338 #else
3339 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3340 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3341 GEN_INT (rounded_size));
3342 #endif
3343 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3344 }
3345
3346 dest = gen_rtx_MEM (mode, dest_addr);
3347
3348 if (type != 0)
3349 {
3350 set_mem_attributes (dest, type, 1);
3351
3352 if (flag_optimize_sibling_calls)
3353 /* Function incoming arguments may overlap with sibling call
3354 outgoing arguments and we cannot allow reordering of reads
3355 from function arguments with stores to outgoing arguments
3356 of sibling calls. */
3357 set_mem_alias_set (dest, 0);
3358 }
3359 emit_move_insn (dest, x);
3360 }
3361 #endif
3362
3363 /* Generate code to push X onto the stack, assuming it has mode MODE and
3364 type TYPE.
3365 MODE is redundant except when X is a CONST_INT (since they don't
3366 carry mode info).
3367 SIZE is an rtx for the size of data to be copied (in bytes),
3368 needed only if X is BLKmode.
3369
3370 ALIGN (in bits) is maximum alignment we can assume.
3371
3372 If PARTIAL and REG are both nonzero, then copy that many of the first
3373 bytes of X into registers starting with REG, and push the rest of X.
3374 The amount of space pushed is decreased by PARTIAL bytes.
3375 REG must be a hard register in this case.
3376 If REG is zero but PARTIAL is not, take any all others actions for an
3377 argument partially in registers, but do not actually load any
3378 registers.
3379
3380 EXTRA is the amount in bytes of extra space to leave next to this arg.
3381 This is ignored if an argument block has already been allocated.
3382
3383 On a machine that lacks real push insns, ARGS_ADDR is the address of
3384 the bottom of the argument block for this call. We use indexing off there
3385 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3386 argument block has not been preallocated.
3387
3388 ARGS_SO_FAR is the size of args previously pushed for this call.
3389
3390 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3391 for arguments passed in registers. If nonzero, it will be the number
3392 of bytes required. */
3393
3394 void
3395 emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3396 unsigned int align, int partial, rtx reg, int extra,
3397 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3398 rtx alignment_pad)
3399 {
3400 rtx xinner;
3401 enum direction stack_direction
3402 #ifdef STACK_GROWS_DOWNWARD
3403 = downward;
3404 #else
3405 = upward;
3406 #endif
3407
3408 /* Decide where to pad the argument: `downward' for below,
3409 `upward' for above, or `none' for don't pad it.
3410 Default is below for small data on big-endian machines; else above. */
3411 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3412
3413 /* Invert direction if stack is post-decrement.
3414 FIXME: why? */
3415 if (STACK_PUSH_CODE == POST_DEC)
3416 if (where_pad != none)
3417 where_pad = (where_pad == downward ? upward : downward);
3418
3419 xinner = x;
3420
3421 if (mode == BLKmode)
3422 {
3423 /* Copy a block into the stack, entirely or partially. */
3424
3425 rtx temp;
3426 int used;
3427 int offset;
3428 int skip;
3429
3430 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3431 used = partial - offset;
3432
3433 gcc_assert (size);
3434
3435 /* USED is now the # of bytes we need not copy to the stack
3436 because registers will take care of them. */
3437
3438 if (partial != 0)
3439 xinner = adjust_address (xinner, BLKmode, used);
3440
3441 /* If the partial register-part of the arg counts in its stack size,
3442 skip the part of stack space corresponding to the registers.
3443 Otherwise, start copying to the beginning of the stack space,
3444 by setting SKIP to 0. */
3445 skip = (reg_parm_stack_space == 0) ? 0 : used;
3446
3447 #ifdef PUSH_ROUNDING
3448 /* Do it with several push insns if that doesn't take lots of insns
3449 and if there is no difficulty with push insns that skip bytes
3450 on the stack for alignment purposes. */
3451 if (args_addr == 0
3452 && PUSH_ARGS
3453 && GET_CODE (size) == CONST_INT
3454 && skip == 0
3455 && MEM_ALIGN (xinner) >= align
3456 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3457 /* Here we avoid the case of a structure whose weak alignment
3458 forces many pushes of a small amount of data,
3459 and such small pushes do rounding that causes trouble. */
3460 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3461 || align >= BIGGEST_ALIGNMENT
3462 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3463 == (align / BITS_PER_UNIT)))
3464 && PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3465 {
3466 /* Push padding now if padding above and stack grows down,
3467 or if padding below and stack grows up.
3468 But if space already allocated, this has already been done. */
3469 if (extra && args_addr == 0
3470 && where_pad != none && where_pad != stack_direction)
3471 anti_adjust_stack (GEN_INT (extra));
3472
3473 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3474 }
3475 else
3476 #endif /* PUSH_ROUNDING */
3477 {
3478 rtx target;
3479
3480 /* Otherwise make space on the stack and copy the data
3481 to the address of that space. */
3482
3483 /* Deduct words put into registers from the size we must copy. */
3484 if (partial != 0)
3485 {
3486 if (GET_CODE (size) == CONST_INT)
3487 size = GEN_INT (INTVAL (size) - used);
3488 else
3489 size = expand_binop (GET_MODE (size), sub_optab, size,
3490 GEN_INT (used), NULL_RTX, 0,
3491 OPTAB_LIB_WIDEN);
3492 }
3493
3494 /* Get the address of the stack space.
3495 In this case, we do not deal with EXTRA separately.
3496 A single stack adjust will do. */
3497 if (! args_addr)
3498 {
3499 temp = push_block (size, extra, where_pad == downward);
3500 extra = 0;
3501 }
3502 else if (GET_CODE (args_so_far) == CONST_INT)
3503 temp = memory_address (BLKmode,
3504 plus_constant (args_addr,
3505 skip + INTVAL (args_so_far)));
3506 else
3507 temp = memory_address (BLKmode,
3508 plus_constant (gen_rtx_PLUS (Pmode,
3509 args_addr,
3510 args_so_far),
3511 skip));
3512
3513 if (!ACCUMULATE_OUTGOING_ARGS)
3514 {
3515 /* If the source is referenced relative to the stack pointer,
3516 copy it to another register to stabilize it. We do not need
3517 to do this if we know that we won't be changing sp. */
3518
3519 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3520 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3521 temp = copy_to_reg (temp);
3522 }
3523
3524 target = gen_rtx_MEM (BLKmode, temp);
3525
3526 /* We do *not* set_mem_attributes here, because incoming arguments
3527 may overlap with sibling call outgoing arguments and we cannot
3528 allow reordering of reads from function arguments with stores
3529 to outgoing arguments of sibling calls. We do, however, want
3530 to record the alignment of the stack slot. */
3531 /* ALIGN may well be better aligned than TYPE, e.g. due to
3532 PARM_BOUNDARY. Assume the caller isn't lying. */
3533 set_mem_align (target, align);
3534
3535 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3536 }
3537 }
3538 else if (partial > 0)
3539 {
3540 /* Scalar partly in registers. */
3541
3542 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3543 int i;
3544 int not_stack;
3545 /* # bytes of start of argument
3546 that we must make space for but need not store. */
3547 int offset = partial % (PARM_BOUNDARY / BITS_PER_WORD);
3548 int args_offset = INTVAL (args_so_far);
3549 int skip;
3550
3551 /* Push padding now if padding above and stack grows down,
3552 or if padding below and stack grows up.
3553 But if space already allocated, this has already been done. */
3554 if (extra && args_addr == 0
3555 && where_pad != none && where_pad != stack_direction)
3556 anti_adjust_stack (GEN_INT (extra));
3557
3558 /* If we make space by pushing it, we might as well push
3559 the real data. Otherwise, we can leave OFFSET nonzero
3560 and leave the space uninitialized. */
3561 if (args_addr == 0)
3562 offset = 0;
3563
3564 /* Now NOT_STACK gets the number of words that we don't need to
3565 allocate on the stack. */
3566 not_stack = (partial - offset) / UNITS_PER_WORD;
3567
3568 /* If the partial register-part of the arg counts in its stack size,
3569 skip the part of stack space corresponding to the registers.
3570 Otherwise, start copying to the beginning of the stack space,
3571 by setting SKIP to 0. */
3572 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
3573
3574 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
3575 x = validize_mem (force_const_mem (mode, x));
3576
3577 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
3578 SUBREGs of such registers are not allowed. */
3579 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3580 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
3581 x = copy_to_reg (x);
3582
3583 /* Loop over all the words allocated on the stack for this arg. */
3584 /* We can do it by words, because any scalar bigger than a word
3585 has a size a multiple of a word. */
3586 #ifndef PUSH_ARGS_REVERSED
3587 for (i = not_stack; i < size; i++)
3588 #else
3589 for (i = size - 1; i >= not_stack; i--)
3590 #endif
3591 if (i >= not_stack + offset)
3592 emit_push_insn (operand_subword_force (x, i, mode),
3593 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
3594 0, args_addr,
3595 GEN_INT (args_offset + ((i - not_stack + skip)
3596 * UNITS_PER_WORD)),
3597 reg_parm_stack_space, alignment_pad);
3598 }
3599 else
3600 {
3601 rtx addr;
3602 rtx dest;
3603
3604 /* Push padding now if padding above and stack grows down,
3605 or if padding below and stack grows up.
3606 But if space already allocated, this has already been done. */
3607 if (extra && args_addr == 0
3608 && where_pad != none && where_pad != stack_direction)
3609 anti_adjust_stack (GEN_INT (extra));
3610
3611 #ifdef PUSH_ROUNDING
3612 if (args_addr == 0 && PUSH_ARGS)
3613 emit_single_push_insn (mode, x, type);
3614 else
3615 #endif
3616 {
3617 if (GET_CODE (args_so_far) == CONST_INT)
3618 addr
3619 = memory_address (mode,
3620 plus_constant (args_addr,
3621 INTVAL (args_so_far)));
3622 else
3623 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
3624 args_so_far));
3625 dest = gen_rtx_MEM (mode, addr);
3626
3627 /* We do *not* set_mem_attributes here, because incoming arguments
3628 may overlap with sibling call outgoing arguments and we cannot
3629 allow reordering of reads from function arguments with stores
3630 to outgoing arguments of sibling calls. We do, however, want
3631 to record the alignment of the stack slot. */
3632 /* ALIGN may well be better aligned than TYPE, e.g. due to
3633 PARM_BOUNDARY. Assume the caller isn't lying. */
3634 set_mem_align (dest, align);
3635
3636 emit_move_insn (dest, x);
3637 }
3638 }
3639
3640 /* If part should go in registers, copy that part
3641 into the appropriate registers. Do this now, at the end,
3642 since mem-to-mem copies above may do function calls. */
3643 if (partial > 0 && reg != 0)
3644 {
3645 /* Handle calls that pass values in multiple non-contiguous locations.
3646 The Irix 6 ABI has examples of this. */
3647 if (GET_CODE (reg) == PARALLEL)
3648 emit_group_load (reg, x, type, -1);
3649 else
3650 {
3651 gcc_assert (partial % UNITS_PER_WORD == 0);
3652 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
3653 }
3654 }
3655
3656 if (extra && args_addr == 0 && where_pad == stack_direction)
3657 anti_adjust_stack (GEN_INT (extra));
3658
3659 if (alignment_pad && args_addr == 0)
3660 anti_adjust_stack (alignment_pad);
3661 }
3662 \f
3663 /* Return X if X can be used as a subtarget in a sequence of arithmetic
3664 operations. */
3665
3666 static rtx
3667 get_subtarget (rtx x)
3668 {
3669 return (optimize
3670 || x == 0
3671 /* Only registers can be subtargets. */
3672 || !REG_P (x)
3673 /* Don't use hard regs to avoid extending their life. */
3674 || REGNO (x) < FIRST_PSEUDO_REGISTER
3675 ? 0 : x);
3676 }
3677
3678 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
3679 FIELD is a bitfield. Returns true if the optimization was successful,
3680 and there's nothing else to do. */
3681
3682 static bool
3683 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize,
3684 unsigned HOST_WIDE_INT bitpos,
3685 enum machine_mode mode1, rtx str_rtx,
3686 tree to, tree src)
3687 {
3688 enum machine_mode str_mode = GET_MODE (str_rtx);
3689 unsigned int str_bitsize = GET_MODE_BITSIZE (str_mode);
3690 tree op0, op1;
3691 rtx value, result;
3692 optab binop;
3693
3694 if (mode1 != VOIDmode
3695 || bitsize >= BITS_PER_WORD
3696 || str_bitsize > BITS_PER_WORD
3697 || TREE_SIDE_EFFECTS (to)
3698 || TREE_THIS_VOLATILE (to))
3699 return false;
3700
3701 STRIP_NOPS (src);
3702 if (!BINARY_CLASS_P (src)
3703 || TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
3704 return false;
3705
3706 op0 = TREE_OPERAND (src, 0);
3707 op1 = TREE_OPERAND (src, 1);
3708 STRIP_NOPS (op0);
3709
3710 if (!operand_equal_p (to, op0, 0))
3711 return false;
3712
3713 if (MEM_P (str_rtx))
3714 {
3715 unsigned HOST_WIDE_INT offset1;
3716
3717 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
3718 str_mode = word_mode;
3719 str_mode = get_best_mode (bitsize, bitpos,
3720 MEM_ALIGN (str_rtx), str_mode, 0);
3721 if (str_mode == VOIDmode)
3722 return false;
3723 str_bitsize = GET_MODE_BITSIZE (str_mode);
3724
3725 offset1 = bitpos;
3726 bitpos %= str_bitsize;
3727 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
3728 str_rtx = adjust_address (str_rtx, str_mode, offset1);
3729 }
3730 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
3731 return false;
3732
3733 /* If the bit field covers the whole REG/MEM, store_field
3734 will likely generate better code. */
3735 if (bitsize >= str_bitsize)
3736 return false;
3737
3738 /* We can't handle fields split across multiple entities. */
3739 if (bitpos + bitsize > str_bitsize)
3740 return false;
3741
3742 if (BYTES_BIG_ENDIAN)
3743 bitpos = str_bitsize - bitpos - bitsize;
3744
3745 switch (TREE_CODE (src))
3746 {
3747 case PLUS_EXPR:
3748 case MINUS_EXPR:
3749 /* For now, just optimize the case of the topmost bitfield
3750 where we don't need to do any masking and also
3751 1 bit bitfields where xor can be used.
3752 We might win by one instruction for the other bitfields
3753 too if insv/extv instructions aren't used, so that
3754 can be added later. */
3755 if (bitpos + bitsize != str_bitsize
3756 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
3757 break;
3758
3759 value = expand_expr (op1, NULL_RTX, str_mode, 0);
3760 value = convert_modes (str_mode,
3761 TYPE_MODE (TREE_TYPE (op1)), value,
3762 TYPE_UNSIGNED (TREE_TYPE (op1)));
3763
3764 /* We may be accessing data outside the field, which means
3765 we can alias adjacent data. */
3766 if (MEM_P (str_rtx))
3767 {
3768 str_rtx = shallow_copy_rtx (str_rtx);
3769 set_mem_alias_set (str_rtx, 0);
3770 set_mem_expr (str_rtx, 0);
3771 }
3772
3773 binop = TREE_CODE (src) == PLUS_EXPR ? add_optab : sub_optab;
3774 if (bitsize == 1 && bitpos + bitsize != str_bitsize)
3775 {
3776 value = expand_and (str_mode, value, const1_rtx, NULL);
3777 binop = xor_optab;
3778 }
3779 value = expand_shift (LSHIFT_EXPR, str_mode, value,
3780 build_int_cst (NULL_TREE, bitpos),
3781 NULL_RTX, 1);
3782 result = expand_binop (str_mode, binop, str_rtx,
3783 value, str_rtx, 1, OPTAB_WIDEN);
3784 if (result != str_rtx)
3785 emit_move_insn (str_rtx, result);
3786 return true;
3787
3788 case BIT_IOR_EXPR:
3789 case BIT_XOR_EXPR:
3790 if (TREE_CODE (op1) != INTEGER_CST)
3791 break;
3792 value = expand_expr (op1, NULL_RTX, GET_MODE (str_rtx), 0);
3793 value = convert_modes (GET_MODE (str_rtx),
3794 TYPE_MODE (TREE_TYPE (op1)), value,
3795 TYPE_UNSIGNED (TREE_TYPE (op1)));
3796
3797 /* We may be accessing data outside the field, which means
3798 we can alias adjacent data. */
3799 if (MEM_P (str_rtx))
3800 {
3801 str_rtx = shallow_copy_rtx (str_rtx);
3802 set_mem_alias_set (str_rtx, 0);
3803 set_mem_expr (str_rtx, 0);
3804 }
3805
3806 binop = TREE_CODE (src) == BIT_IOR_EXPR ? ior_optab : xor_optab;
3807 if (bitpos + bitsize != GET_MODE_BITSIZE (GET_MODE (str_rtx)))
3808 {
3809 rtx mask = GEN_INT (((unsigned HOST_WIDE_INT) 1 << bitsize)
3810 - 1);
3811 value = expand_and (GET_MODE (str_rtx), value, mask,
3812 NULL_RTX);
3813 }
3814 value = expand_shift (LSHIFT_EXPR, GET_MODE (str_rtx), value,
3815 build_int_cst (NULL_TREE, bitpos),
3816 NULL_RTX, 1);
3817 result = expand_binop (GET_MODE (str_rtx), binop, str_rtx,
3818 value, str_rtx, 1, OPTAB_WIDEN);
3819 if (result != str_rtx)
3820 emit_move_insn (str_rtx, result);
3821 return true;
3822
3823 default:
3824 break;
3825 }
3826
3827 return false;
3828 }
3829
3830
3831 /* Expand an assignment that stores the value of FROM into TO. */
3832
3833 void
3834 expand_assignment (tree to, tree from)
3835 {
3836 rtx to_rtx = 0;
3837 rtx result;
3838
3839 /* Don't crash if the lhs of the assignment was erroneous. */
3840
3841 if (TREE_CODE (to) == ERROR_MARK)
3842 {
3843 result = expand_expr (from, NULL_RTX, VOIDmode, 0);
3844 return;
3845 }
3846
3847 /* Assignment of a structure component needs special treatment
3848 if the structure component's rtx is not simply a MEM.
3849 Assignment of an array element at a constant index, and assignment of
3850 an array element in an unaligned packed structure field, has the same
3851 problem. */
3852 if (handled_component_p (to)
3853 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
3854 {
3855 enum machine_mode mode1;
3856 HOST_WIDE_INT bitsize, bitpos;
3857 tree offset;
3858 int unsignedp;
3859 int volatilep = 0;
3860 tree tem;
3861
3862 push_temp_slots ();
3863 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
3864 &unsignedp, &volatilep, true);
3865
3866 /* If we are going to use store_bit_field and extract_bit_field,
3867 make sure to_rtx will be safe for multiple use. */
3868
3869 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, 0);
3870
3871 if (offset != 0)
3872 {
3873 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
3874
3875 gcc_assert (MEM_P (to_rtx));
3876
3877 #ifdef POINTERS_EXTEND_UNSIGNED
3878 if (GET_MODE (offset_rtx) != Pmode)
3879 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
3880 #else
3881 if (GET_MODE (offset_rtx) != ptr_mode)
3882 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
3883 #endif
3884
3885 /* A constant address in TO_RTX can have VOIDmode, we must not try
3886 to call force_reg for that case. Avoid that case. */
3887 if (MEM_P (to_rtx)
3888 && GET_MODE (to_rtx) == BLKmode
3889 && GET_MODE (XEXP (to_rtx, 0)) != VOIDmode
3890 && bitsize > 0
3891 && (bitpos % bitsize) == 0
3892 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
3893 && MEM_ALIGN (to_rtx) == GET_MODE_ALIGNMENT (mode1))
3894 {
3895 to_rtx = adjust_address (to_rtx, mode1, bitpos / BITS_PER_UNIT);
3896 bitpos = 0;
3897 }
3898
3899 to_rtx = offset_address (to_rtx, offset_rtx,
3900 highest_pow2_factor_for_target (to,
3901 offset));
3902 }
3903
3904 /* Handle expand_expr of a complex value returning a CONCAT. */
3905 if (GET_CODE (to_rtx) == CONCAT)
3906 {
3907 if (TREE_CODE (TREE_TYPE (from)) == COMPLEX_TYPE)
3908 {
3909 gcc_assert (bitpos == 0);
3910 result = store_expr (from, to_rtx, false);
3911 }
3912 else
3913 {
3914 gcc_assert (bitpos == 0 || bitpos == GET_MODE_BITSIZE (mode1));
3915 result = store_expr (from, XEXP (to_rtx, bitpos != 0), false);
3916 }
3917 }
3918 else
3919 {
3920 if (MEM_P (to_rtx))
3921 {
3922 /* If the field is at offset zero, we could have been given the
3923 DECL_RTX of the parent struct. Don't munge it. */
3924 to_rtx = shallow_copy_rtx (to_rtx);
3925
3926 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
3927
3928 /* Deal with volatile and readonly fields. The former is only
3929 done for MEM. Also set MEM_KEEP_ALIAS_SET_P if needed. */
3930 if (volatilep)
3931 MEM_VOLATILE_P (to_rtx) = 1;
3932 if (component_uses_parent_alias_set (to))
3933 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
3934 }
3935
3936 if (optimize_bitfield_assignment_op (bitsize, bitpos, mode1,
3937 to_rtx, to, from))
3938 result = NULL;
3939 else
3940 result = store_field (to_rtx, bitsize, bitpos, mode1, from,
3941 TREE_TYPE (tem), get_alias_set (to));
3942 }
3943
3944 if (result)
3945 preserve_temp_slots (result);
3946 free_temp_slots ();
3947 pop_temp_slots ();
3948 return;
3949 }
3950
3951 /* If the rhs is a function call and its value is not an aggregate,
3952 call the function before we start to compute the lhs.
3953 This is needed for correct code for cases such as
3954 val = setjmp (buf) on machines where reference to val
3955 requires loading up part of an address in a separate insn.
3956
3957 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
3958 since it might be a promoted variable where the zero- or sign- extension
3959 needs to be done. Handling this in the normal way is safe because no
3960 computation is done before the call. */
3961 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
3962 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
3963 && ! ((TREE_CODE (to) == VAR_DECL || TREE_CODE (to) == PARM_DECL)
3964 && REG_P (DECL_RTL (to))))
3965 {
3966 rtx value;
3967
3968 push_temp_slots ();
3969 value = expand_expr (from, NULL_RTX, VOIDmode, 0);
3970 if (to_rtx == 0)
3971 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
3972
3973 /* Handle calls that return values in multiple non-contiguous locations.
3974 The Irix 6 ABI has examples of this. */
3975 if (GET_CODE (to_rtx) == PARALLEL)
3976 emit_group_load (to_rtx, value, TREE_TYPE (from),
3977 int_size_in_bytes (TREE_TYPE (from)));
3978 else if (GET_MODE (to_rtx) == BLKmode)
3979 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
3980 else
3981 {
3982 if (POINTER_TYPE_P (TREE_TYPE (to)))
3983 value = convert_memory_address (GET_MODE (to_rtx), value);
3984 emit_move_insn (to_rtx, value);
3985 }
3986 preserve_temp_slots (to_rtx);
3987 free_temp_slots ();
3988 pop_temp_slots ();
3989 return;
3990 }
3991
3992 /* Ordinary treatment. Expand TO to get a REG or MEM rtx.
3993 Don't re-expand if it was expanded already (in COMPONENT_REF case). */
3994
3995 if (to_rtx == 0)
3996 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
3997
3998 /* Don't move directly into a return register. */
3999 if (TREE_CODE (to) == RESULT_DECL
4000 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
4001 {
4002 rtx temp;
4003
4004 push_temp_slots ();
4005 temp = expand_expr (from, 0, GET_MODE (to_rtx), 0);
4006
4007 if (GET_CODE (to_rtx) == PARALLEL)
4008 emit_group_load (to_rtx, temp, TREE_TYPE (from),
4009 int_size_in_bytes (TREE_TYPE (from)));
4010 else
4011 emit_move_insn (to_rtx, temp);
4012
4013 preserve_temp_slots (to_rtx);
4014 free_temp_slots ();
4015 pop_temp_slots ();
4016 return;
4017 }
4018
4019 /* In case we are returning the contents of an object which overlaps
4020 the place the value is being stored, use a safe function when copying
4021 a value through a pointer into a structure value return block. */
4022 if (TREE_CODE (to) == RESULT_DECL && TREE_CODE (from) == INDIRECT_REF
4023 && current_function_returns_struct
4024 && !current_function_returns_pcc_struct)
4025 {
4026 rtx from_rtx, size;
4027
4028 push_temp_slots ();
4029 size = expr_size (from);
4030 from_rtx = expand_expr (from, NULL_RTX, VOIDmode, 0);
4031
4032 emit_library_call (memmove_libfunc, LCT_NORMAL,
4033 VOIDmode, 3, XEXP (to_rtx, 0), Pmode,
4034 XEXP (from_rtx, 0), Pmode,
4035 convert_to_mode (TYPE_MODE (sizetype),
4036 size, TYPE_UNSIGNED (sizetype)),
4037 TYPE_MODE (sizetype));
4038
4039 preserve_temp_slots (to_rtx);
4040 free_temp_slots ();
4041 pop_temp_slots ();
4042 return;
4043 }
4044
4045 /* Compute FROM and store the value in the rtx we got. */
4046
4047 push_temp_slots ();
4048 result = store_expr (from, to_rtx, 0);
4049 preserve_temp_slots (result);
4050 free_temp_slots ();
4051 pop_temp_slots ();
4052 return;
4053 }
4054
4055 /* Generate code for computing expression EXP,
4056 and storing the value into TARGET.
4057
4058 If the mode is BLKmode then we may return TARGET itself.
4059 It turns out that in BLKmode it doesn't cause a problem.
4060 because C has no operators that could combine two different
4061 assignments into the same BLKmode object with different values
4062 with no sequence point. Will other languages need this to
4063 be more thorough?
4064
4065 If CALL_PARAM_P is nonzero, this is a store into a call param on the
4066 stack, and block moves may need to be treated specially. */
4067
4068 rtx
4069 store_expr (tree exp, rtx target, int call_param_p)
4070 {
4071 rtx temp;
4072 rtx alt_rtl = NULL_RTX;
4073 int dont_return_target = 0;
4074
4075 if (VOID_TYPE_P (TREE_TYPE (exp)))
4076 {
4077 /* C++ can generate ?: expressions with a throw expression in one
4078 branch and an rvalue in the other. Here, we resolve attempts to
4079 store the throw expression's nonexistent result. */
4080 gcc_assert (!call_param_p);
4081 expand_expr (exp, const0_rtx, VOIDmode, 0);
4082 return NULL_RTX;
4083 }
4084 if (TREE_CODE (exp) == COMPOUND_EXPR)
4085 {
4086 /* Perform first part of compound expression, then assign from second
4087 part. */
4088 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
4089 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4090 return store_expr (TREE_OPERAND (exp, 1), target, call_param_p);
4091 }
4092 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
4093 {
4094 /* For conditional expression, get safe form of the target. Then
4095 test the condition, doing the appropriate assignment on either
4096 side. This avoids the creation of unnecessary temporaries.
4097 For non-BLKmode, it is more efficient not to do this. */
4098
4099 rtx lab1 = gen_label_rtx (), lab2 = gen_label_rtx ();
4100
4101 do_pending_stack_adjust ();
4102 NO_DEFER_POP;
4103 jumpifnot (TREE_OPERAND (exp, 0), lab1);
4104 store_expr (TREE_OPERAND (exp, 1), target, call_param_p);
4105 emit_jump_insn (gen_jump (lab2));
4106 emit_barrier ();
4107 emit_label (lab1);
4108 store_expr (TREE_OPERAND (exp, 2), target, call_param_p);
4109 emit_label (lab2);
4110 OK_DEFER_POP;
4111
4112 return NULL_RTX;
4113 }
4114 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
4115 /* If this is a scalar in a register that is stored in a wider mode
4116 than the declared mode, compute the result into its declared mode
4117 and then convert to the wider mode. Our value is the computed
4118 expression. */
4119 {
4120 rtx inner_target = 0;
4121
4122 /* We can do the conversion inside EXP, which will often result
4123 in some optimizations. Do the conversion in two steps: first
4124 change the signedness, if needed, then the extend. But don't
4125 do this if the type of EXP is a subtype of something else
4126 since then the conversion might involve more than just
4127 converting modes. */
4128 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
4129 && TREE_TYPE (TREE_TYPE (exp)) == 0
4130 && (!lang_hooks.reduce_bit_field_operations
4131 || (GET_MODE_PRECISION (GET_MODE (target))
4132 == TYPE_PRECISION (TREE_TYPE (exp)))))
4133 {
4134 if (TYPE_UNSIGNED (TREE_TYPE (exp))
4135 != SUBREG_PROMOTED_UNSIGNED_P (target))
4136 exp = convert
4137 (lang_hooks.types.signed_or_unsigned_type
4138 (SUBREG_PROMOTED_UNSIGNED_P (target), TREE_TYPE (exp)), exp);
4139
4140 exp = convert (lang_hooks.types.type_for_mode
4141 (GET_MODE (SUBREG_REG (target)),
4142 SUBREG_PROMOTED_UNSIGNED_P (target)),
4143 exp);
4144
4145 inner_target = SUBREG_REG (target);
4146 }
4147
4148 temp = expand_expr (exp, inner_target, VOIDmode,
4149 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
4150
4151 /* If TEMP is a VOIDmode constant, use convert_modes to make
4152 sure that we properly convert it. */
4153 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
4154 {
4155 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4156 temp, SUBREG_PROMOTED_UNSIGNED_P (target));
4157 temp = convert_modes (GET_MODE (SUBREG_REG (target)),
4158 GET_MODE (target), temp,
4159 SUBREG_PROMOTED_UNSIGNED_P (target));
4160 }
4161
4162 convert_move (SUBREG_REG (target), temp,
4163 SUBREG_PROMOTED_UNSIGNED_P (target));
4164
4165 return NULL_RTX;
4166 }
4167 else
4168 {
4169 temp = expand_expr_real (exp, target, GET_MODE (target),
4170 (call_param_p
4171 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
4172 &alt_rtl);
4173 /* Return TARGET if it's a specified hardware register.
4174 If TARGET is a volatile mem ref, either return TARGET
4175 or return a reg copied *from* TARGET; ANSI requires this.
4176
4177 Otherwise, if TEMP is not TARGET, return TEMP
4178 if it is constant (for efficiency),
4179 or if we really want the correct value. */
4180 if (!(target && REG_P (target)
4181 && REGNO (target) < FIRST_PSEUDO_REGISTER)
4182 && !(MEM_P (target) && MEM_VOLATILE_P (target))
4183 && ! rtx_equal_p (temp, target)
4184 && CONSTANT_P (temp))
4185 dont_return_target = 1;
4186 }
4187
4188 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
4189 the same as that of TARGET, adjust the constant. This is needed, for
4190 example, in case it is a CONST_DOUBLE and we want only a word-sized
4191 value. */
4192 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
4193 && TREE_CODE (exp) != ERROR_MARK
4194 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
4195 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
4196 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
4197
4198 /* If value was not generated in the target, store it there.
4199 Convert the value to TARGET's type first if necessary and emit the
4200 pending incrementations that have been queued when expanding EXP.
4201 Note that we cannot emit the whole queue blindly because this will
4202 effectively disable the POST_INC optimization later.
4203
4204 If TEMP and TARGET compare equal according to rtx_equal_p, but
4205 one or both of them are volatile memory refs, we have to distinguish
4206 two cases:
4207 - expand_expr has used TARGET. In this case, we must not generate
4208 another copy. This can be detected by TARGET being equal according
4209 to == .
4210 - expand_expr has not used TARGET - that means that the source just
4211 happens to have the same RTX form. Since temp will have been created
4212 by expand_expr, it will compare unequal according to == .
4213 We must generate a copy in this case, to reach the correct number
4214 of volatile memory references. */
4215
4216 if ((! rtx_equal_p (temp, target)
4217 || (temp != target && (side_effects_p (temp)
4218 || side_effects_p (target))))
4219 && TREE_CODE (exp) != ERROR_MARK
4220 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
4221 but TARGET is not valid memory reference, TEMP will differ
4222 from TARGET although it is really the same location. */
4223 && !(alt_rtl && rtx_equal_p (alt_rtl, target))
4224 /* If there's nothing to copy, don't bother. Don't call expr_size
4225 unless necessary, because some front-ends (C++) expr_size-hook
4226 aborts on objects that are not supposed to be bit-copied or
4227 bit-initialized. */
4228 && expr_size (exp) != const0_rtx)
4229 {
4230 if (GET_MODE (temp) != GET_MODE (target)
4231 && GET_MODE (temp) != VOIDmode)
4232 {
4233 int unsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
4234 if (dont_return_target)
4235 {
4236 /* In this case, we will return TEMP,
4237 so make sure it has the proper mode.
4238 But don't forget to store the value into TARGET. */
4239 temp = convert_to_mode (GET_MODE (target), temp, unsignedp);
4240 emit_move_insn (target, temp);
4241 }
4242 else
4243 convert_move (target, temp, unsignedp);
4244 }
4245
4246 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
4247 {
4248 /* Handle copying a string constant into an array. The string
4249 constant may be shorter than the array. So copy just the string's
4250 actual length, and clear the rest. First get the size of the data
4251 type of the string, which is actually the size of the target. */
4252 rtx size = expr_size (exp);
4253
4254 if (GET_CODE (size) == CONST_INT
4255 && INTVAL (size) < TREE_STRING_LENGTH (exp))
4256 emit_block_move (target, temp, size,
4257 (call_param_p
4258 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4259 else
4260 {
4261 /* Compute the size of the data to copy from the string. */
4262 tree copy_size
4263 = size_binop (MIN_EXPR,
4264 make_tree (sizetype, size),
4265 size_int (TREE_STRING_LENGTH (exp)));
4266 rtx copy_size_rtx
4267 = expand_expr (copy_size, NULL_RTX, VOIDmode,
4268 (call_param_p
4269 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
4270 rtx label = 0;
4271
4272 /* Copy that much. */
4273 copy_size_rtx = convert_to_mode (ptr_mode, copy_size_rtx,
4274 TYPE_UNSIGNED (sizetype));
4275 emit_block_move (target, temp, copy_size_rtx,
4276 (call_param_p
4277 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4278
4279 /* Figure out how much is left in TARGET that we have to clear.
4280 Do all calculations in ptr_mode. */
4281 if (GET_CODE (copy_size_rtx) == CONST_INT)
4282 {
4283 size = plus_constant (size, -INTVAL (copy_size_rtx));
4284 target = adjust_address (target, BLKmode,
4285 INTVAL (copy_size_rtx));
4286 }
4287 else
4288 {
4289 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
4290 copy_size_rtx, NULL_RTX, 0,
4291 OPTAB_LIB_WIDEN);
4292
4293 #ifdef POINTERS_EXTEND_UNSIGNED
4294 if (GET_MODE (copy_size_rtx) != Pmode)
4295 copy_size_rtx = convert_to_mode (Pmode, copy_size_rtx,
4296 TYPE_UNSIGNED (sizetype));
4297 #endif
4298
4299 target = offset_address (target, copy_size_rtx,
4300 highest_pow2_factor (copy_size));
4301 label = gen_label_rtx ();
4302 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
4303 GET_MODE (size), 0, label);
4304 }
4305
4306 if (size != const0_rtx)
4307 clear_storage (target, size);
4308
4309 if (label)
4310 emit_label (label);
4311 }
4312 }
4313 /* Handle calls that return values in multiple non-contiguous locations.
4314 The Irix 6 ABI has examples of this. */
4315 else if (GET_CODE (target) == PARALLEL)
4316 emit_group_load (target, temp, TREE_TYPE (exp),
4317 int_size_in_bytes (TREE_TYPE (exp)));
4318 else if (GET_MODE (temp) == BLKmode)
4319 emit_block_move (target, temp, expr_size (exp),
4320 (call_param_p
4321 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
4322 else
4323 {
4324 temp = force_operand (temp, target);
4325 if (temp != target)
4326 emit_move_insn (target, temp);
4327 }
4328 }
4329
4330 return NULL_RTX;
4331 }
4332 \f
4333 /* Examine CTOR to discover:
4334 * how many scalar fields are set to nonzero values,
4335 and place it in *P_NZ_ELTS;
4336 * how many scalar fields are set to non-constant values,
4337 and place it in *P_NC_ELTS; and
4338 * how many scalar fields in total are in CTOR,
4339 and place it in *P_ELT_COUNT.
4340 * if a type is a union, and the initializer from the constructor
4341 is not the largest element in the union, then set *p_must_clear. */
4342
4343 static void
4344 categorize_ctor_elements_1 (tree ctor, HOST_WIDE_INT *p_nz_elts,
4345 HOST_WIDE_INT *p_nc_elts,
4346 HOST_WIDE_INT *p_elt_count,
4347 bool *p_must_clear)
4348 {
4349 HOST_WIDE_INT nz_elts, nc_elts, elt_count;
4350 tree list;
4351
4352 nz_elts = 0;
4353 nc_elts = 0;
4354 elt_count = 0;
4355
4356 for (list = CONSTRUCTOR_ELTS (ctor); list; list = TREE_CHAIN (list))
4357 {
4358 tree value = TREE_VALUE (list);
4359 tree purpose = TREE_PURPOSE (list);
4360 HOST_WIDE_INT mult;
4361
4362 mult = 1;
4363 if (TREE_CODE (purpose) == RANGE_EXPR)
4364 {
4365 tree lo_index = TREE_OPERAND (purpose, 0);
4366 tree hi_index = TREE_OPERAND (purpose, 1);
4367
4368 if (host_integerp (lo_index, 1) && host_integerp (hi_index, 1))
4369 mult = (tree_low_cst (hi_index, 1)
4370 - tree_low_cst (lo_index, 1) + 1);
4371 }
4372
4373 switch (TREE_CODE (value))
4374 {
4375 case CONSTRUCTOR:
4376 {
4377 HOST_WIDE_INT nz = 0, nc = 0, ic = 0;
4378 categorize_ctor_elements_1 (value, &nz, &nc, &ic, p_must_clear);
4379 nz_elts += mult * nz;
4380 nc_elts += mult * nc;
4381 elt_count += mult * ic;
4382 }
4383 break;
4384
4385 case INTEGER_CST:
4386 case REAL_CST:
4387 if (!initializer_zerop (value))
4388 nz_elts += mult;
4389 elt_count += mult;
4390 break;
4391
4392 case STRING_CST:
4393 nz_elts += mult * TREE_STRING_LENGTH (value);
4394 elt_count += mult * TREE_STRING_LENGTH (value);
4395 break;
4396
4397 case COMPLEX_CST:
4398 if (!initializer_zerop (TREE_REALPART (value)))
4399 nz_elts += mult;
4400 if (!initializer_zerop (TREE_IMAGPART (value)))
4401 nz_elts += mult;
4402 elt_count += mult;
4403 break;
4404
4405 case VECTOR_CST:
4406 {
4407 tree v;
4408 for (v = TREE_VECTOR_CST_ELTS (value); v; v = TREE_CHAIN (v))
4409 {
4410 if (!initializer_zerop (TREE_VALUE (v)))
4411 nz_elts += mult;
4412 elt_count += mult;
4413 }
4414 }
4415 break;
4416
4417 default:
4418 nz_elts += mult;
4419 elt_count += mult;
4420 if (!initializer_constant_valid_p (value, TREE_TYPE (value)))
4421 nc_elts += mult;
4422 break;
4423 }
4424 }
4425
4426 if (!*p_must_clear
4427 && (TREE_CODE (TREE_TYPE (ctor)) == UNION_TYPE
4428 || TREE_CODE (TREE_TYPE (ctor)) == QUAL_UNION_TYPE))
4429 {
4430 tree init_sub_type;
4431 bool clear_this = true;
4432
4433 list = CONSTRUCTOR_ELTS (ctor);
4434 if (list)
4435 {
4436 /* We don't expect more than one element of the union to be
4437 initialized. Not sure what we should do otherwise... */
4438 gcc_assert (TREE_CHAIN (list) == NULL);
4439
4440 init_sub_type = TREE_TYPE (TREE_VALUE (list));
4441
4442 /* ??? We could look at each element of the union, and find the
4443 largest element. Which would avoid comparing the size of the
4444 initialized element against any tail padding in the union.
4445 Doesn't seem worth the effort... */
4446 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (ctor)),
4447 TYPE_SIZE (init_sub_type)) == 1)
4448 {
4449 /* And now we have to find out if the element itself is fully
4450 constructed. E.g. for union { struct { int a, b; } s; } u
4451 = { .s = { .a = 1 } }. */
4452 if (elt_count == count_type_elements (init_sub_type))
4453 clear_this = false;
4454 }
4455 }
4456
4457 *p_must_clear = clear_this;
4458 }
4459
4460 *p_nz_elts += nz_elts;
4461 *p_nc_elts += nc_elts;
4462 *p_elt_count += elt_count;
4463 }
4464
4465 void
4466 categorize_ctor_elements (tree ctor, HOST_WIDE_INT *p_nz_elts,
4467 HOST_WIDE_INT *p_nc_elts,
4468 HOST_WIDE_INT *p_elt_count,
4469 bool *p_must_clear)
4470 {
4471 *p_nz_elts = 0;
4472 *p_nc_elts = 0;
4473 *p_elt_count = 0;
4474 *p_must_clear = false;
4475 categorize_ctor_elements_1 (ctor, p_nz_elts, p_nc_elts, p_elt_count,
4476 p_must_clear);
4477 }
4478
4479 /* Count the number of scalars in TYPE. Return -1 on overflow or
4480 variable-sized. */
4481
4482 HOST_WIDE_INT
4483 count_type_elements (tree type)
4484 {
4485 const HOST_WIDE_INT max = ~((HOST_WIDE_INT)1 << (HOST_BITS_PER_WIDE_INT-1));
4486 switch (TREE_CODE (type))
4487 {
4488 case ARRAY_TYPE:
4489 {
4490 tree telts = array_type_nelts (type);
4491 if (telts && host_integerp (telts, 1))
4492 {
4493 HOST_WIDE_INT n = tree_low_cst (telts, 1) + 1;
4494 HOST_WIDE_INT m = count_type_elements (TREE_TYPE (type));
4495 if (n == 0)
4496 return 0;
4497 else if (max / n > m)
4498 return n * m;
4499 }
4500 return -1;
4501 }
4502
4503 case RECORD_TYPE:
4504 {
4505 HOST_WIDE_INT n = 0, t;
4506 tree f;
4507
4508 for (f = TYPE_FIELDS (type); f ; f = TREE_CHAIN (f))
4509 if (TREE_CODE (f) == FIELD_DECL)
4510 {
4511 t = count_type_elements (TREE_TYPE (f));
4512 if (t < 0)
4513 return -1;
4514 n += t;
4515 }
4516
4517 return n;
4518 }
4519
4520 case UNION_TYPE:
4521 case QUAL_UNION_TYPE:
4522 {
4523 /* Ho hum. How in the world do we guess here? Clearly it isn't
4524 right to count the fields. Guess based on the number of words. */
4525 HOST_WIDE_INT n = int_size_in_bytes (type);
4526 if (n < 0)
4527 return -1;
4528 return n / UNITS_PER_WORD;
4529 }
4530
4531 case COMPLEX_TYPE:
4532 return 2;
4533
4534 case VECTOR_TYPE:
4535 return TYPE_VECTOR_SUBPARTS (type);
4536
4537 case INTEGER_TYPE:
4538 case REAL_TYPE:
4539 case ENUMERAL_TYPE:
4540 case BOOLEAN_TYPE:
4541 case CHAR_TYPE:
4542 case POINTER_TYPE:
4543 case OFFSET_TYPE:
4544 case REFERENCE_TYPE:
4545 return 1;
4546
4547 case VOID_TYPE:
4548 case METHOD_TYPE:
4549 case FUNCTION_TYPE:
4550 case LANG_TYPE:
4551 default:
4552 gcc_unreachable ();
4553 }
4554 }
4555
4556 /* Return 1 if EXP contains mostly (3/4) zeros. */
4557
4558 static int
4559 mostly_zeros_p (tree exp)
4560 {
4561 if (TREE_CODE (exp) == CONSTRUCTOR)
4562
4563 {
4564 HOST_WIDE_INT nz_elts, nc_elts, count, elts;
4565 bool must_clear;
4566
4567 categorize_ctor_elements (exp, &nz_elts, &nc_elts, &count, &must_clear);
4568 if (must_clear)
4569 return 1;
4570
4571 elts = count_type_elements (TREE_TYPE (exp));
4572
4573 return nz_elts < elts / 4;
4574 }
4575
4576 return initializer_zerop (exp);
4577 }
4578 \f
4579 /* Helper function for store_constructor.
4580 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
4581 TYPE is the type of the CONSTRUCTOR, not the element type.
4582 CLEARED is as for store_constructor.
4583 ALIAS_SET is the alias set to use for any stores.
4584
4585 This provides a recursive shortcut back to store_constructor when it isn't
4586 necessary to go through store_field. This is so that we can pass through
4587 the cleared field to let store_constructor know that we may not have to
4588 clear a substructure if the outer structure has already been cleared. */
4589
4590 static void
4591 store_constructor_field (rtx target, unsigned HOST_WIDE_INT bitsize,
4592 HOST_WIDE_INT bitpos, enum machine_mode mode,
4593 tree exp, tree type, int cleared, int alias_set)
4594 {
4595 if (TREE_CODE (exp) == CONSTRUCTOR
4596 /* We can only call store_constructor recursively if the size and
4597 bit position are on a byte boundary. */
4598 && bitpos % BITS_PER_UNIT == 0
4599 && (bitsize > 0 && bitsize % BITS_PER_UNIT == 0)
4600 /* If we have a nonzero bitpos for a register target, then we just
4601 let store_field do the bitfield handling. This is unlikely to
4602 generate unnecessary clear instructions anyways. */
4603 && (bitpos == 0 || MEM_P (target)))
4604 {
4605 if (MEM_P (target))
4606 target
4607 = adjust_address (target,
4608 GET_MODE (target) == BLKmode
4609 || 0 != (bitpos
4610 % GET_MODE_ALIGNMENT (GET_MODE (target)))
4611 ? BLKmode : VOIDmode, bitpos / BITS_PER_UNIT);
4612
4613
4614 /* Update the alias set, if required. */
4615 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
4616 && MEM_ALIAS_SET (target) != 0)
4617 {
4618 target = copy_rtx (target);
4619 set_mem_alias_set (target, alias_set);
4620 }
4621
4622 store_constructor (exp, target, cleared, bitsize / BITS_PER_UNIT);
4623 }
4624 else
4625 store_field (target, bitsize, bitpos, mode, exp, type, alias_set);
4626 }
4627
4628 /* Store the value of constructor EXP into the rtx TARGET.
4629 TARGET is either a REG or a MEM; we know it cannot conflict, since
4630 safe_from_p has been called.
4631 CLEARED is true if TARGET is known to have been zero'd.
4632 SIZE is the number of bytes of TARGET we are allowed to modify: this
4633 may not be the same as the size of EXP if we are assigning to a field
4634 which has been packed to exclude padding bits. */
4635
4636 static void
4637 store_constructor (tree exp, rtx target, int cleared, HOST_WIDE_INT size)
4638 {
4639 tree type = TREE_TYPE (exp);
4640 #ifdef WORD_REGISTER_OPERATIONS
4641 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
4642 #endif
4643
4644 switch (TREE_CODE (type))
4645 {
4646 case RECORD_TYPE:
4647 case UNION_TYPE:
4648 case QUAL_UNION_TYPE:
4649 {
4650 tree elt;
4651
4652 /* If size is zero or the target is already cleared, do nothing. */
4653 if (size == 0 || cleared)
4654 cleared = 1;
4655 /* We either clear the aggregate or indicate the value is dead. */
4656 else if ((TREE_CODE (type) == UNION_TYPE
4657 || TREE_CODE (type) == QUAL_UNION_TYPE)
4658 && ! CONSTRUCTOR_ELTS (exp))
4659 /* If the constructor is empty, clear the union. */
4660 {
4661 clear_storage (target, expr_size (exp));
4662 cleared = 1;
4663 }
4664
4665 /* If we are building a static constructor into a register,
4666 set the initial value as zero so we can fold the value into
4667 a constant. But if more than one register is involved,
4668 this probably loses. */
4669 else if (REG_P (target) && TREE_STATIC (exp)
4670 && GET_MODE_SIZE (GET_MODE (target)) <= UNITS_PER_WORD)
4671 {
4672 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
4673 cleared = 1;
4674 }
4675
4676 /* If the constructor has fewer fields than the structure or
4677 if we are initializing the structure to mostly zeros, clear
4678 the whole structure first. Don't do this if TARGET is a
4679 register whose mode size isn't equal to SIZE since
4680 clear_storage can't handle this case. */
4681 else if (size > 0
4682 && ((list_length (CONSTRUCTOR_ELTS (exp))
4683 != fields_length (type))
4684 || mostly_zeros_p (exp))
4685 && (!REG_P (target)
4686 || ((HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (target))
4687 == size)))
4688 {
4689 clear_storage (target, GEN_INT (size));
4690 cleared = 1;
4691 }
4692
4693 if (! cleared)
4694 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
4695
4696 /* Store each element of the constructor into the
4697 corresponding field of TARGET. */
4698
4699 for (elt = CONSTRUCTOR_ELTS (exp); elt; elt = TREE_CHAIN (elt))
4700 {
4701 tree field = TREE_PURPOSE (elt);
4702 tree value = TREE_VALUE (elt);
4703 enum machine_mode mode;
4704 HOST_WIDE_INT bitsize;
4705 HOST_WIDE_INT bitpos = 0;
4706 tree offset;
4707 rtx to_rtx = target;
4708
4709 /* Just ignore missing fields. We cleared the whole
4710 structure, above, if any fields are missing. */
4711 if (field == 0)
4712 continue;
4713
4714 if (cleared && initializer_zerop (value))
4715 continue;
4716
4717 if (host_integerp (DECL_SIZE (field), 1))
4718 bitsize = tree_low_cst (DECL_SIZE (field), 1);
4719 else
4720 bitsize = -1;
4721
4722 mode = DECL_MODE (field);
4723 if (DECL_BIT_FIELD (field))
4724 mode = VOIDmode;
4725
4726 offset = DECL_FIELD_OFFSET (field);
4727 if (host_integerp (offset, 0)
4728 && host_integerp (bit_position (field), 0))
4729 {
4730 bitpos = int_bit_position (field);
4731 offset = 0;
4732 }
4733 else
4734 bitpos = tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 0);
4735
4736 if (offset)
4737 {
4738 rtx offset_rtx;
4739
4740 offset
4741 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset,
4742 make_tree (TREE_TYPE (exp),
4743 target));
4744
4745 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, 0);
4746 gcc_assert (MEM_P (to_rtx));
4747
4748 #ifdef POINTERS_EXTEND_UNSIGNED
4749 if (GET_MODE (offset_rtx) != Pmode)
4750 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
4751 #else
4752 if (GET_MODE (offset_rtx) != ptr_mode)
4753 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
4754 #endif
4755
4756 to_rtx = offset_address (to_rtx, offset_rtx,
4757 highest_pow2_factor (offset));
4758 }
4759
4760 #ifdef WORD_REGISTER_OPERATIONS
4761 /* If this initializes a field that is smaller than a
4762 word, at the start of a word, try to widen it to a full
4763 word. This special case allows us to output C++ member
4764 function initializations in a form that the optimizers
4765 can understand. */
4766 if (REG_P (target)
4767 && bitsize < BITS_PER_WORD
4768 && bitpos % BITS_PER_WORD == 0
4769 && GET_MODE_CLASS (mode) == MODE_INT
4770 && TREE_CODE (value) == INTEGER_CST
4771 && exp_size >= 0
4772 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
4773 {
4774 tree type = TREE_TYPE (value);
4775
4776 if (TYPE_PRECISION (type) < BITS_PER_WORD)
4777 {
4778 type = lang_hooks.types.type_for_size
4779 (BITS_PER_WORD, TYPE_UNSIGNED (type));
4780 value = convert (type, value);
4781 }
4782
4783 if (BYTES_BIG_ENDIAN)
4784 value
4785 = fold (build2 (LSHIFT_EXPR, type, value,
4786 build_int_cst (NULL_TREE,
4787 BITS_PER_WORD - bitsize)));
4788 bitsize = BITS_PER_WORD;
4789 mode = word_mode;
4790 }
4791 #endif
4792
4793 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
4794 && DECL_NONADDRESSABLE_P (field))
4795 {
4796 to_rtx = copy_rtx (to_rtx);
4797 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
4798 }
4799
4800 store_constructor_field (to_rtx, bitsize, bitpos, mode,
4801 value, type, cleared,
4802 get_alias_set (TREE_TYPE (field)));
4803 }
4804 break;
4805 }
4806 case ARRAY_TYPE:
4807 {
4808 tree elt;
4809 int i;
4810 int need_to_clear;
4811 tree domain;
4812 tree elttype = TREE_TYPE (type);
4813 int const_bounds_p;
4814 HOST_WIDE_INT minelt = 0;
4815 HOST_WIDE_INT maxelt = 0;
4816
4817 domain = TYPE_DOMAIN (type);
4818 const_bounds_p = (TYPE_MIN_VALUE (domain)
4819 && TYPE_MAX_VALUE (domain)
4820 && host_integerp (TYPE_MIN_VALUE (domain), 0)
4821 && host_integerp (TYPE_MAX_VALUE (domain), 0));
4822
4823 /* If we have constant bounds for the range of the type, get them. */
4824 if (const_bounds_p)
4825 {
4826 minelt = tree_low_cst (TYPE_MIN_VALUE (domain), 0);
4827 maxelt = tree_low_cst (TYPE_MAX_VALUE (domain), 0);
4828 }
4829
4830 /* If the constructor has fewer elements than the array, clear
4831 the whole array first. Similarly if this is static
4832 constructor of a non-BLKmode object. */
4833 if (cleared)
4834 need_to_clear = 0;
4835 else if (REG_P (target) && TREE_STATIC (exp))
4836 need_to_clear = 1;
4837 else
4838 {
4839 HOST_WIDE_INT count = 0, zero_count = 0;
4840 need_to_clear = ! const_bounds_p;
4841
4842 /* This loop is a more accurate version of the loop in
4843 mostly_zeros_p (it handles RANGE_EXPR in an index). It
4844 is also needed to check for missing elements. */
4845 for (elt = CONSTRUCTOR_ELTS (exp);
4846 elt != NULL_TREE && ! need_to_clear;
4847 elt = TREE_CHAIN (elt))
4848 {
4849 tree index = TREE_PURPOSE (elt);
4850 HOST_WIDE_INT this_node_count;
4851
4852 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
4853 {
4854 tree lo_index = TREE_OPERAND (index, 0);
4855 tree hi_index = TREE_OPERAND (index, 1);
4856
4857 if (! host_integerp (lo_index, 1)
4858 || ! host_integerp (hi_index, 1))
4859 {
4860 need_to_clear = 1;
4861 break;
4862 }
4863
4864 this_node_count = (tree_low_cst (hi_index, 1)
4865 - tree_low_cst (lo_index, 1) + 1);
4866 }
4867 else
4868 this_node_count = 1;
4869
4870 count += this_node_count;
4871 if (mostly_zeros_p (TREE_VALUE (elt)))
4872 zero_count += this_node_count;
4873 }
4874
4875 /* Clear the entire array first if there are any missing
4876 elements, or if the incidence of zero elements is >=
4877 75%. */
4878 if (! need_to_clear
4879 && (count < maxelt - minelt + 1
4880 || 4 * zero_count >= 3 * count))
4881 need_to_clear = 1;
4882 }
4883
4884 if (need_to_clear && size > 0)
4885 {
4886 if (REG_P (target))
4887 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
4888 else
4889 clear_storage (target, GEN_INT (size));
4890 cleared = 1;
4891 }
4892
4893 if (!cleared && REG_P (target))
4894 /* Inform later passes that the old value is dead. */
4895 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
4896
4897 /* Store each element of the constructor into the
4898 corresponding element of TARGET, determined by counting the
4899 elements. */
4900 for (elt = CONSTRUCTOR_ELTS (exp), i = 0;
4901 elt;
4902 elt = TREE_CHAIN (elt), i++)
4903 {
4904 enum machine_mode mode;
4905 HOST_WIDE_INT bitsize;
4906 HOST_WIDE_INT bitpos;
4907 int unsignedp;
4908 tree value = TREE_VALUE (elt);
4909 tree index = TREE_PURPOSE (elt);
4910 rtx xtarget = target;
4911
4912 if (cleared && initializer_zerop (value))
4913 continue;
4914
4915 unsignedp = TYPE_UNSIGNED (elttype);
4916 mode = TYPE_MODE (elttype);
4917 if (mode == BLKmode)
4918 bitsize = (host_integerp (TYPE_SIZE (elttype), 1)
4919 ? tree_low_cst (TYPE_SIZE (elttype), 1)
4920 : -1);
4921 else
4922 bitsize = GET_MODE_BITSIZE (mode);
4923
4924 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
4925 {
4926 tree lo_index = TREE_OPERAND (index, 0);
4927 tree hi_index = TREE_OPERAND (index, 1);
4928 rtx index_r, pos_rtx;
4929 HOST_WIDE_INT lo, hi, count;
4930 tree position;
4931
4932 /* If the range is constant and "small", unroll the loop. */
4933 if (const_bounds_p
4934 && host_integerp (lo_index, 0)
4935 && host_integerp (hi_index, 0)
4936 && (lo = tree_low_cst (lo_index, 0),
4937 hi = tree_low_cst (hi_index, 0),
4938 count = hi - lo + 1,
4939 (!MEM_P (target)
4940 || count <= 2
4941 || (host_integerp (TYPE_SIZE (elttype), 1)
4942 && (tree_low_cst (TYPE_SIZE (elttype), 1) * count
4943 <= 40 * 8)))))
4944 {
4945 lo -= minelt; hi -= minelt;
4946 for (; lo <= hi; lo++)
4947 {
4948 bitpos = lo * tree_low_cst (TYPE_SIZE (elttype), 0);
4949
4950 if (MEM_P (target)
4951 && !MEM_KEEP_ALIAS_SET_P (target)
4952 && TREE_CODE (type) == ARRAY_TYPE
4953 && TYPE_NONALIASED_COMPONENT (type))
4954 {
4955 target = copy_rtx (target);
4956 MEM_KEEP_ALIAS_SET_P (target) = 1;
4957 }
4958
4959 store_constructor_field
4960 (target, bitsize, bitpos, mode, value, type, cleared,
4961 get_alias_set (elttype));
4962 }
4963 }
4964 else
4965 {
4966 rtx loop_start = gen_label_rtx ();
4967 rtx loop_end = gen_label_rtx ();
4968 tree exit_cond;
4969
4970 expand_expr (hi_index, NULL_RTX, VOIDmode, 0);
4971 unsignedp = TYPE_UNSIGNED (domain);
4972
4973 index = build_decl (VAR_DECL, NULL_TREE, domain);
4974
4975 index_r
4976 = gen_reg_rtx (promote_mode (domain, DECL_MODE (index),
4977 &unsignedp, 0));
4978 SET_DECL_RTL (index, index_r);
4979 store_expr (lo_index, index_r, 0);
4980
4981 /* Build the head of the loop. */
4982 do_pending_stack_adjust ();
4983 emit_label (loop_start);
4984
4985 /* Assign value to element index. */
4986 position
4987 = convert (ssizetype,
4988 fold (build2 (MINUS_EXPR, TREE_TYPE (index),
4989 index, TYPE_MIN_VALUE (domain))));
4990 position = size_binop (MULT_EXPR, position,
4991 convert (ssizetype,
4992 TYPE_SIZE_UNIT (elttype)));
4993
4994 pos_rtx = expand_expr (position, 0, VOIDmode, 0);
4995 xtarget = offset_address (target, pos_rtx,
4996 highest_pow2_factor (position));
4997 xtarget = adjust_address (xtarget, mode, 0);
4998 if (TREE_CODE (value) == CONSTRUCTOR)
4999 store_constructor (value, xtarget, cleared,
5000 bitsize / BITS_PER_UNIT);
5001 else
5002 store_expr (value, xtarget, 0);
5003
5004 /* Generate a conditional jump to exit the loop. */
5005 exit_cond = build2 (LT_EXPR, integer_type_node,
5006 index, hi_index);
5007 jumpif (exit_cond, loop_end);
5008
5009 /* Update the loop counter, and jump to the head of
5010 the loop. */
5011 expand_assignment (index,
5012 build2 (PLUS_EXPR, TREE_TYPE (index),
5013 index, integer_one_node));
5014
5015 emit_jump (loop_start);
5016
5017 /* Build the end of the loop. */
5018 emit_label (loop_end);
5019 }
5020 }
5021 else if ((index != 0 && ! host_integerp (index, 0))
5022 || ! host_integerp (TYPE_SIZE (elttype), 1))
5023 {
5024 tree position;
5025
5026 if (index == 0)
5027 index = ssize_int (1);
5028
5029 if (minelt)
5030 index = fold_convert (ssizetype,
5031 fold (build2 (MINUS_EXPR,
5032 TREE_TYPE (index),
5033 index,
5034 TYPE_MIN_VALUE (domain))));
5035
5036 position = size_binop (MULT_EXPR, index,
5037 convert (ssizetype,
5038 TYPE_SIZE_UNIT (elttype)));
5039 xtarget = offset_address (target,
5040 expand_expr (position, 0, VOIDmode, 0),
5041 highest_pow2_factor (position));
5042 xtarget = adjust_address (xtarget, mode, 0);
5043 store_expr (value, xtarget, 0);
5044 }
5045 else
5046 {
5047 if (index != 0)
5048 bitpos = ((tree_low_cst (index, 0) - minelt)
5049 * tree_low_cst (TYPE_SIZE (elttype), 1));
5050 else
5051 bitpos = (i * tree_low_cst (TYPE_SIZE (elttype), 1));
5052
5053 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
5054 && TREE_CODE (type) == ARRAY_TYPE
5055 && TYPE_NONALIASED_COMPONENT (type))
5056 {
5057 target = copy_rtx (target);
5058 MEM_KEEP_ALIAS_SET_P (target) = 1;
5059 }
5060 store_constructor_field (target, bitsize, bitpos, mode, value,
5061 type, cleared, get_alias_set (elttype));
5062 }
5063 }
5064 break;
5065 }
5066
5067 case VECTOR_TYPE:
5068 {
5069 tree elt;
5070 int i;
5071 int need_to_clear;
5072 int icode = 0;
5073 tree elttype = TREE_TYPE (type);
5074 int elt_size = tree_low_cst (TYPE_SIZE (elttype), 1);
5075 enum machine_mode eltmode = TYPE_MODE (elttype);
5076 HOST_WIDE_INT bitsize;
5077 HOST_WIDE_INT bitpos;
5078 rtvec vector = NULL;
5079 unsigned n_elts;
5080
5081 gcc_assert (eltmode != BLKmode);
5082
5083 n_elts = TYPE_VECTOR_SUBPARTS (type);
5084 if (REG_P (target) && VECTOR_MODE_P (GET_MODE (target)))
5085 {
5086 enum machine_mode mode = GET_MODE (target);
5087
5088 icode = (int) vec_init_optab->handlers[mode].insn_code;
5089 if (icode != CODE_FOR_nothing)
5090 {
5091 unsigned int i;
5092
5093 vector = rtvec_alloc (n_elts);
5094 for (i = 0; i < n_elts; i++)
5095 RTVEC_ELT (vector, i) = CONST0_RTX (GET_MODE_INNER (mode));
5096 }
5097 }
5098
5099 /* If the constructor has fewer elements than the vector,
5100 clear the whole array first. Similarly if this is static
5101 constructor of a non-BLKmode object. */
5102 if (cleared)
5103 need_to_clear = 0;
5104 else if (REG_P (target) && TREE_STATIC (exp))
5105 need_to_clear = 1;
5106 else
5107 {
5108 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
5109
5110 for (elt = CONSTRUCTOR_ELTS (exp);
5111 elt != NULL_TREE;
5112 elt = TREE_CHAIN (elt))
5113 {
5114 int n_elts_here = tree_low_cst
5115 (int_const_binop (TRUNC_DIV_EXPR,
5116 TYPE_SIZE (TREE_TYPE (TREE_VALUE (elt))),
5117 TYPE_SIZE (elttype), 0), 1);
5118
5119 count += n_elts_here;
5120 if (mostly_zeros_p (TREE_VALUE (elt)))
5121 zero_count += n_elts_here;
5122 }
5123
5124 /* Clear the entire vector first if there are any missing elements,
5125 or if the incidence of zero elements is >= 75%. */
5126 need_to_clear = (count < n_elts || 4 * zero_count >= 3 * count);
5127 }
5128
5129 if (need_to_clear && size > 0 && !vector)
5130 {
5131 if (REG_P (target))
5132 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
5133 else
5134 clear_storage (target, GEN_INT (size));
5135 cleared = 1;
5136 }
5137
5138 if (!cleared && REG_P (target))
5139 /* Inform later passes that the old value is dead. */
5140 emit_insn (gen_rtx_CLOBBER (VOIDmode, target));
5141
5142 /* Store each element of the constructor into the corresponding
5143 element of TARGET, determined by counting the elements. */
5144 for (elt = CONSTRUCTOR_ELTS (exp), i = 0;
5145 elt;
5146 elt = TREE_CHAIN (elt), i += bitsize / elt_size)
5147 {
5148 tree value = TREE_VALUE (elt);
5149 tree index = TREE_PURPOSE (elt);
5150 HOST_WIDE_INT eltpos;
5151
5152 bitsize = tree_low_cst (TYPE_SIZE (TREE_TYPE (value)), 1);
5153 if (cleared && initializer_zerop (value))
5154 continue;
5155
5156 if (index != 0)
5157 eltpos = tree_low_cst (index, 1);
5158 else
5159 eltpos = i;
5160
5161 if (vector)
5162 {
5163 /* Vector CONSTRUCTORs should only be built from smaller
5164 vectors in the case of BLKmode vectors. */
5165 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
5166 RTVEC_ELT (vector, eltpos)
5167 = expand_expr (value, NULL_RTX, VOIDmode, 0);
5168 }
5169 else
5170 {
5171 enum machine_mode value_mode =
5172 TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
5173 ? TYPE_MODE (TREE_TYPE (value))
5174 : eltmode;
5175 bitpos = eltpos * elt_size;
5176 store_constructor_field (target, bitsize, bitpos,
5177 value_mode, value, type,
5178 cleared, get_alias_set (elttype));
5179 }
5180 }
5181
5182 if (vector)
5183 emit_insn (GEN_FCN (icode)
5184 (target,
5185 gen_rtx_PARALLEL (GET_MODE (target), vector)));
5186 break;
5187 }
5188
5189 default:
5190 gcc_unreachable ();
5191 }
5192 }
5193
5194 /* Store the value of EXP (an expression tree)
5195 into a subfield of TARGET which has mode MODE and occupies
5196 BITSIZE bits, starting BITPOS bits from the start of TARGET.
5197 If MODE is VOIDmode, it means that we are storing into a bit-field.
5198
5199 Always return const0_rtx unless we have something particular to
5200 return.
5201
5202 TYPE is the type of the underlying object,
5203
5204 ALIAS_SET is the alias set for the destination. This value will
5205 (in general) be different from that for TARGET, since TARGET is a
5206 reference to the containing structure. */
5207
5208 static rtx
5209 store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
5210 enum machine_mode mode, tree exp, tree type, int alias_set)
5211 {
5212 HOST_WIDE_INT width_mask = 0;
5213
5214 if (TREE_CODE (exp) == ERROR_MARK)
5215 return const0_rtx;
5216
5217 /* If we have nothing to store, do nothing unless the expression has
5218 side-effects. */
5219 if (bitsize == 0)
5220 return expand_expr (exp, const0_rtx, VOIDmode, 0);
5221 else if (bitsize >= 0 && bitsize < HOST_BITS_PER_WIDE_INT)
5222 width_mask = ((HOST_WIDE_INT) 1 << bitsize) - 1;
5223
5224 /* If we are storing into an unaligned field of an aligned union that is
5225 in a register, we may have the mode of TARGET being an integer mode but
5226 MODE == BLKmode. In that case, get an aligned object whose size and
5227 alignment are the same as TARGET and store TARGET into it (we can avoid
5228 the store if the field being stored is the entire width of TARGET). Then
5229 call ourselves recursively to store the field into a BLKmode version of
5230 that object. Finally, load from the object into TARGET. This is not
5231 very efficient in general, but should only be slightly more expensive
5232 than the otherwise-required unaligned accesses. Perhaps this can be
5233 cleaned up later. It's tempting to make OBJECT readonly, but it's set
5234 twice, once with emit_move_insn and once via store_field. */
5235
5236 if (mode == BLKmode
5237 && (REG_P (target) || GET_CODE (target) == SUBREG))
5238 {
5239 rtx object = assign_temp (type, 0, 1, 1);
5240 rtx blk_object = adjust_address (object, BLKmode, 0);
5241
5242 if (bitsize != (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (target)))
5243 emit_move_insn (object, target);
5244
5245 store_field (blk_object, bitsize, bitpos, mode, exp, type, alias_set);
5246
5247 emit_move_insn (target, object);
5248
5249 /* We want to return the BLKmode version of the data. */
5250 return blk_object;
5251 }
5252
5253 if (GET_CODE (target) == CONCAT)
5254 {
5255 /* We're storing into a struct containing a single __complex. */
5256
5257 gcc_assert (!bitpos);
5258 return store_expr (exp, target, 0);
5259 }
5260
5261 /* If the structure is in a register or if the component
5262 is a bit field, we cannot use addressing to access it.
5263 Use bit-field techniques or SUBREG to store in it. */
5264
5265 if (mode == VOIDmode
5266 || (mode != BLKmode && ! direct_store[(int) mode]
5267 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
5268 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
5269 || REG_P (target)
5270 || GET_CODE (target) == SUBREG
5271 /* If the field isn't aligned enough to store as an ordinary memref,
5272 store it as a bit field. */
5273 || (mode != BLKmode
5274 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
5275 || bitpos % GET_MODE_ALIGNMENT (mode))
5276 && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
5277 || (bitpos % BITS_PER_UNIT != 0)))
5278 /* If the RHS and field are a constant size and the size of the
5279 RHS isn't the same size as the bitfield, we must use bitfield
5280 operations. */
5281 || (bitsize >= 0
5282 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
5283 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)), bitsize) != 0))
5284 {
5285 rtx temp;
5286
5287 /* If EXP is a NOP_EXPR of precision less than its mode, then that
5288 implies a mask operation. If the precision is the same size as
5289 the field we're storing into, that mask is redundant. This is
5290 particularly common with bit field assignments generated by the
5291 C front end. */
5292 if (TREE_CODE (exp) == NOP_EXPR)
5293 {
5294 tree type = TREE_TYPE (exp);
5295 if (INTEGRAL_TYPE_P (type)
5296 && TYPE_PRECISION (type) < GET_MODE_BITSIZE (TYPE_MODE (type))
5297 && bitsize == TYPE_PRECISION (type))
5298 {
5299 type = TREE_TYPE (TREE_OPERAND (exp, 0));
5300 if (INTEGRAL_TYPE_P (type) && TYPE_PRECISION (type) >= bitsize)
5301 exp = TREE_OPERAND (exp, 0);
5302 }
5303 }
5304
5305 temp = expand_expr (exp, NULL_RTX, VOIDmode, 0);
5306
5307 /* If BITSIZE is narrower than the size of the type of EXP
5308 we will be narrowing TEMP. Normally, what's wanted are the
5309 low-order bits. However, if EXP's type is a record and this is
5310 big-endian machine, we want the upper BITSIZE bits. */
5311 if (BYTES_BIG_ENDIAN && GET_MODE_CLASS (GET_MODE (temp)) == MODE_INT
5312 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (temp))
5313 && TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE)
5314 temp = expand_shift (RSHIFT_EXPR, GET_MODE (temp), temp,
5315 size_int (GET_MODE_BITSIZE (GET_MODE (temp))
5316 - bitsize),
5317 NULL_RTX, 1);
5318
5319 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to
5320 MODE. */
5321 if (mode != VOIDmode && mode != BLKmode
5322 && mode != TYPE_MODE (TREE_TYPE (exp)))
5323 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
5324
5325 /* If the modes of TARGET and TEMP are both BLKmode, both
5326 must be in memory and BITPOS must be aligned on a byte
5327 boundary. If so, we simply do a block copy. */
5328 if (GET_MODE (target) == BLKmode && GET_MODE (temp) == BLKmode)
5329 {
5330 gcc_assert (MEM_P (target) && MEM_P (temp)
5331 && !(bitpos % BITS_PER_UNIT));
5332
5333 target = adjust_address (target, VOIDmode, bitpos / BITS_PER_UNIT);
5334 emit_block_move (target, temp,
5335 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
5336 / BITS_PER_UNIT),
5337 BLOCK_OP_NORMAL);
5338
5339 return const0_rtx;
5340 }
5341
5342 /* Store the value in the bitfield. */
5343 store_bit_field (target, bitsize, bitpos, mode, temp);
5344
5345 return const0_rtx;
5346 }
5347 else
5348 {
5349 /* Now build a reference to just the desired component. */
5350 rtx to_rtx = adjust_address (target, mode, bitpos / BITS_PER_UNIT);
5351
5352 if (to_rtx == target)
5353 to_rtx = copy_rtx (to_rtx);
5354
5355 MEM_SET_IN_STRUCT_P (to_rtx, 1);
5356 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
5357 set_mem_alias_set (to_rtx, alias_set);
5358
5359 return store_expr (exp, to_rtx, 0);
5360 }
5361 }
5362 \f
5363 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
5364 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
5365 codes and find the ultimate containing object, which we return.
5366
5367 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
5368 bit position, and *PUNSIGNEDP to the signedness of the field.
5369 If the position of the field is variable, we store a tree
5370 giving the variable offset (in units) in *POFFSET.
5371 This offset is in addition to the bit position.
5372 If the position is not variable, we store 0 in *POFFSET.
5373
5374 If any of the extraction expressions is volatile,
5375 we store 1 in *PVOLATILEP. Otherwise we don't change that.
5376
5377 If the field is a bit-field, *PMODE is set to VOIDmode. Otherwise, it
5378 is a mode that can be used to access the field. In that case, *PBITSIZE
5379 is redundant.
5380
5381 If the field describes a variable-sized object, *PMODE is set to
5382 VOIDmode and *PBITSIZE is set to -1. An access cannot be made in
5383 this case, but the address of the object can be found.
5384
5385 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
5386 look through nodes that serve as markers of a greater alignment than
5387 the one that can be deduced from the expression. These nodes make it
5388 possible for front-ends to prevent temporaries from being created by
5389 the middle-end on alignment considerations. For that purpose, the
5390 normal operating mode at high-level is to always pass FALSE so that
5391 the ultimate containing object is really returned; moreover, the
5392 associated predicate handled_component_p will always return TRUE
5393 on these nodes, thus indicating that they are essentially handled
5394 by get_inner_reference. TRUE should only be passed when the caller
5395 is scanning the expression in order to build another representation
5396 and specifically knows how to handle these nodes; as such, this is
5397 the normal operating mode in the RTL expanders. */
5398
5399 tree
5400 get_inner_reference (tree exp, HOST_WIDE_INT *pbitsize,
5401 HOST_WIDE_INT *pbitpos, tree *poffset,
5402 enum machine_mode *pmode, int *punsignedp,
5403 int *pvolatilep, bool keep_aligning)
5404 {
5405 tree size_tree = 0;
5406 enum machine_mode mode = VOIDmode;
5407 tree offset = size_zero_node;
5408 tree bit_offset = bitsize_zero_node;
5409 tree tem;
5410
5411 /* First get the mode, signedness, and size. We do this from just the
5412 outermost expression. */
5413 if (TREE_CODE (exp) == COMPONENT_REF)
5414 {
5415 size_tree = DECL_SIZE (TREE_OPERAND (exp, 1));
5416 if (! DECL_BIT_FIELD (TREE_OPERAND (exp, 1)))
5417 mode = DECL_MODE (TREE_OPERAND (exp, 1));
5418
5419 *punsignedp = DECL_UNSIGNED (TREE_OPERAND (exp, 1));
5420 }
5421 else if (TREE_CODE (exp) == BIT_FIELD_REF)
5422 {
5423 size_tree = TREE_OPERAND (exp, 1);
5424 *punsignedp = BIT_FIELD_REF_UNSIGNED (exp);
5425 }
5426 else
5427 {
5428 mode = TYPE_MODE (TREE_TYPE (exp));
5429 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
5430
5431 if (mode == BLKmode)
5432 size_tree = TYPE_SIZE (TREE_TYPE (exp));
5433 else
5434 *pbitsize = GET_MODE_BITSIZE (mode);
5435 }
5436
5437 if (size_tree != 0)
5438 {
5439 if (! host_integerp (size_tree, 1))
5440 mode = BLKmode, *pbitsize = -1;
5441 else
5442 *pbitsize = tree_low_cst (size_tree, 1);
5443 }
5444
5445 /* Compute cumulative bit-offset for nested component-refs and array-refs,
5446 and find the ultimate containing object. */
5447 while (1)
5448 {
5449 switch (TREE_CODE (exp))
5450 {
5451 case BIT_FIELD_REF:
5452 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5453 TREE_OPERAND (exp, 2));
5454 break;
5455
5456 case COMPONENT_REF:
5457 {
5458 tree field = TREE_OPERAND (exp, 1);
5459 tree this_offset = component_ref_field_offset (exp);
5460
5461 /* If this field hasn't been filled in yet, don't go past it.
5462 This should only happen when folding expressions made during
5463 type construction. */
5464 if (this_offset == 0)
5465 break;
5466
5467 offset = size_binop (PLUS_EXPR, offset, this_offset);
5468 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5469 DECL_FIELD_BIT_OFFSET (field));
5470
5471 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
5472 }
5473 break;
5474
5475 case ARRAY_REF:
5476 case ARRAY_RANGE_REF:
5477 {
5478 tree index = TREE_OPERAND (exp, 1);
5479 tree low_bound = array_ref_low_bound (exp);
5480 tree unit_size = array_ref_element_size (exp);
5481
5482 /* We assume all arrays have sizes that are a multiple of a byte.
5483 First subtract the lower bound, if any, in the type of the
5484 index, then convert to sizetype and multiply by the size of
5485 the array element. */
5486 if (! integer_zerop (low_bound))
5487 index = fold (build2 (MINUS_EXPR, TREE_TYPE (index),
5488 index, low_bound));
5489
5490 offset = size_binop (PLUS_EXPR, offset,
5491 size_binop (MULT_EXPR,
5492 convert (sizetype, index),
5493 unit_size));
5494 }
5495 break;
5496
5497 case REALPART_EXPR:
5498 break;
5499
5500 case IMAGPART_EXPR:
5501 bit_offset = size_binop (PLUS_EXPR, bit_offset,
5502 bitsize_int (*pbitsize));
5503 break;
5504
5505 case VIEW_CONVERT_EXPR:
5506 if (keep_aligning && STRICT_ALIGNMENT
5507 && (TYPE_ALIGN (TREE_TYPE (exp))
5508 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0))))
5509 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp, 0)))
5510 < BIGGEST_ALIGNMENT)
5511 && (TYPE_ALIGN_OK (TREE_TYPE (exp))
5512 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp, 0)))))
5513 goto done;
5514 break;
5515
5516 default:
5517 goto done;
5518 }
5519
5520 /* If any reference in the chain is volatile, the effect is volatile. */
5521 if (TREE_THIS_VOLATILE (exp))
5522 *pvolatilep = 1;
5523
5524 exp = TREE_OPERAND (exp, 0);
5525 }
5526 done:
5527
5528 /* If OFFSET is constant, see if we can return the whole thing as a
5529 constant bit position. Otherwise, split it up. */
5530 if (host_integerp (offset, 0)
5531 && 0 != (tem = size_binop (MULT_EXPR, convert (bitsizetype, offset),
5532 bitsize_unit_node))
5533 && 0 != (tem = size_binop (PLUS_EXPR, tem, bit_offset))
5534 && host_integerp (tem, 0))
5535 *pbitpos = tree_low_cst (tem, 0), *poffset = 0;
5536 else
5537 *pbitpos = tree_low_cst (bit_offset, 0), *poffset = offset;
5538
5539 *pmode = mode;
5540 return exp;
5541 }
5542
5543 /* Return a tree of sizetype representing the size, in bytes, of the element
5544 of EXP, an ARRAY_REF. */
5545
5546 tree
5547 array_ref_element_size (tree exp)
5548 {
5549 tree aligned_size = TREE_OPERAND (exp, 3);
5550 tree elmt_type = TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)));
5551
5552 /* If a size was specified in the ARRAY_REF, it's the size measured
5553 in alignment units of the element type. So multiply by that value. */
5554 if (aligned_size)
5555 {
5556 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
5557 sizetype from another type of the same width and signedness. */
5558 if (TREE_TYPE (aligned_size) != sizetype)
5559 aligned_size = fold_convert (sizetype, aligned_size);
5560 return size_binop (MULT_EXPR, aligned_size,
5561 size_int (TYPE_ALIGN_UNIT (elmt_type)));
5562 }
5563
5564 /* Otherwise, take the size from that of the element type. Substitute
5565 any PLACEHOLDER_EXPR that we have. */
5566 else
5567 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_SIZE_UNIT (elmt_type), exp);
5568 }
5569
5570 /* Return a tree representing the lower bound of the array mentioned in
5571 EXP, an ARRAY_REF. */
5572
5573 tree
5574 array_ref_low_bound (tree exp)
5575 {
5576 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
5577
5578 /* If a lower bound is specified in EXP, use it. */
5579 if (TREE_OPERAND (exp, 2))
5580 return TREE_OPERAND (exp, 2);
5581
5582 /* Otherwise, if there is a domain type and it has a lower bound, use it,
5583 substituting for a PLACEHOLDER_EXPR as needed. */
5584 if (domain_type && TYPE_MIN_VALUE (domain_type))
5585 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MIN_VALUE (domain_type), exp);
5586
5587 /* Otherwise, return a zero of the appropriate type. */
5588 return build_int_cst (TREE_TYPE (TREE_OPERAND (exp, 1)), 0);
5589 }
5590
5591 /* Return a tree representing the upper bound of the array mentioned in
5592 EXP, an ARRAY_REF. */
5593
5594 tree
5595 array_ref_up_bound (tree exp)
5596 {
5597 tree domain_type = TYPE_DOMAIN (TREE_TYPE (TREE_OPERAND (exp, 0)));
5598
5599 /* If there is a domain type and it has an upper bound, use it, substituting
5600 for a PLACEHOLDER_EXPR as needed. */
5601 if (domain_type && TYPE_MAX_VALUE (domain_type))
5602 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (TYPE_MAX_VALUE (domain_type), exp);
5603
5604 /* Otherwise fail. */
5605 return NULL_TREE;
5606 }
5607
5608 /* Return a tree representing the offset, in bytes, of the field referenced
5609 by EXP. This does not include any offset in DECL_FIELD_BIT_OFFSET. */
5610
5611 tree
5612 component_ref_field_offset (tree exp)
5613 {
5614 tree aligned_offset = TREE_OPERAND (exp, 2);
5615 tree field = TREE_OPERAND (exp, 1);
5616
5617 /* If an offset was specified in the COMPONENT_REF, it's the offset measured
5618 in units of DECL_OFFSET_ALIGN / BITS_PER_UNIT. So multiply by that
5619 value. */
5620 if (aligned_offset)
5621 {
5622 /* ??? tree_ssa_useless_type_conversion will eliminate casts to
5623 sizetype from another type of the same width and signedness. */
5624 if (TREE_TYPE (aligned_offset) != sizetype)
5625 aligned_offset = fold_convert (sizetype, aligned_offset);
5626 return size_binop (MULT_EXPR, aligned_offset,
5627 size_int (DECL_OFFSET_ALIGN (field) / BITS_PER_UNIT));
5628 }
5629
5630 /* Otherwise, take the offset from that of the field. Substitute
5631 any PLACEHOLDER_EXPR that we have. */
5632 else
5633 return SUBSTITUTE_PLACEHOLDER_IN_EXPR (DECL_FIELD_OFFSET (field), exp);
5634 }
5635
5636 /* Return 1 if T is an expression that get_inner_reference handles. */
5637
5638 int
5639 handled_component_p (tree t)
5640 {
5641 switch (TREE_CODE (t))
5642 {
5643 case BIT_FIELD_REF:
5644 case COMPONENT_REF:
5645 case ARRAY_REF:
5646 case ARRAY_RANGE_REF:
5647 case VIEW_CONVERT_EXPR:
5648 case REALPART_EXPR:
5649 case IMAGPART_EXPR:
5650 return 1;
5651
5652 default:
5653 return 0;
5654 }
5655 }
5656 \f
5657 /* Given an rtx VALUE that may contain additions and multiplications, return
5658 an equivalent value that just refers to a register, memory, or constant.
5659 This is done by generating instructions to perform the arithmetic and
5660 returning a pseudo-register containing the value.
5661
5662 The returned value may be a REG, SUBREG, MEM or constant. */
5663
5664 rtx
5665 force_operand (rtx value, rtx target)
5666 {
5667 rtx op1, op2;
5668 /* Use subtarget as the target for operand 0 of a binary operation. */
5669 rtx subtarget = get_subtarget (target);
5670 enum rtx_code code = GET_CODE (value);
5671
5672 /* Check for subreg applied to an expression produced by loop optimizer. */
5673 if (code == SUBREG
5674 && !REG_P (SUBREG_REG (value))
5675 && !MEM_P (SUBREG_REG (value)))
5676 {
5677 value = simplify_gen_subreg (GET_MODE (value),
5678 force_reg (GET_MODE (SUBREG_REG (value)),
5679 force_operand (SUBREG_REG (value),
5680 NULL_RTX)),
5681 GET_MODE (SUBREG_REG (value)),
5682 SUBREG_BYTE (value));
5683 code = GET_CODE (value);
5684 }
5685
5686 /* Check for a PIC address load. */
5687 if ((code == PLUS || code == MINUS)
5688 && XEXP (value, 0) == pic_offset_table_rtx
5689 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
5690 || GET_CODE (XEXP (value, 1)) == LABEL_REF
5691 || GET_CODE (XEXP (value, 1)) == CONST))
5692 {
5693 if (!subtarget)
5694 subtarget = gen_reg_rtx (GET_MODE (value));
5695 emit_move_insn (subtarget, value);
5696 return subtarget;
5697 }
5698
5699 if (code == ZERO_EXTEND || code == SIGN_EXTEND)
5700 {
5701 if (!target)
5702 target = gen_reg_rtx (GET_MODE (value));
5703 convert_move (target, force_operand (XEXP (value, 0), NULL),
5704 code == ZERO_EXTEND);
5705 return target;
5706 }
5707
5708 if (ARITHMETIC_P (value))
5709 {
5710 op2 = XEXP (value, 1);
5711 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
5712 subtarget = 0;
5713 if (code == MINUS && GET_CODE (op2) == CONST_INT)
5714 {
5715 code = PLUS;
5716 op2 = negate_rtx (GET_MODE (value), op2);
5717 }
5718
5719 /* Check for an addition with OP2 a constant integer and our first
5720 operand a PLUS of a virtual register and something else. In that
5721 case, we want to emit the sum of the virtual register and the
5722 constant first and then add the other value. This allows virtual
5723 register instantiation to simply modify the constant rather than
5724 creating another one around this addition. */
5725 if (code == PLUS && GET_CODE (op2) == CONST_INT
5726 && GET_CODE (XEXP (value, 0)) == PLUS
5727 && REG_P (XEXP (XEXP (value, 0), 0))
5728 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
5729 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
5730 {
5731 rtx temp = expand_simple_binop (GET_MODE (value), code,
5732 XEXP (XEXP (value, 0), 0), op2,
5733 subtarget, 0, OPTAB_LIB_WIDEN);
5734 return expand_simple_binop (GET_MODE (value), code, temp,
5735 force_operand (XEXP (XEXP (value,
5736 0), 1), 0),
5737 target, 0, OPTAB_LIB_WIDEN);
5738 }
5739
5740 op1 = force_operand (XEXP (value, 0), subtarget);
5741 op2 = force_operand (op2, NULL_RTX);
5742 switch (code)
5743 {
5744 case MULT:
5745 return expand_mult (GET_MODE (value), op1, op2, target, 1);
5746 case DIV:
5747 if (!INTEGRAL_MODE_P (GET_MODE (value)))
5748 return expand_simple_binop (GET_MODE (value), code, op1, op2,
5749 target, 1, OPTAB_LIB_WIDEN);
5750 else
5751 return expand_divmod (0,
5752 FLOAT_MODE_P (GET_MODE (value))
5753 ? RDIV_EXPR : TRUNC_DIV_EXPR,
5754 GET_MODE (value), op1, op2, target, 0);
5755 break;
5756 case MOD:
5757 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
5758 target, 0);
5759 break;
5760 case UDIV:
5761 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
5762 target, 1);
5763 break;
5764 case UMOD:
5765 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
5766 target, 1);
5767 break;
5768 case ASHIFTRT:
5769 return expand_simple_binop (GET_MODE (value), code, op1, op2,
5770 target, 0, OPTAB_LIB_WIDEN);
5771 break;
5772 default:
5773 return expand_simple_binop (GET_MODE (value), code, op1, op2,
5774 target, 1, OPTAB_LIB_WIDEN);
5775 }
5776 }
5777 if (UNARY_P (value))
5778 {
5779 op1 = force_operand (XEXP (value, 0), NULL_RTX);
5780 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
5781 }
5782
5783 #ifdef INSN_SCHEDULING
5784 /* On machines that have insn scheduling, we want all memory reference to be
5785 explicit, so we need to deal with such paradoxical SUBREGs. */
5786 if (GET_CODE (value) == SUBREG && MEM_P (SUBREG_REG (value))
5787 && (GET_MODE_SIZE (GET_MODE (value))
5788 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (value)))))
5789 value
5790 = simplify_gen_subreg (GET_MODE (value),
5791 force_reg (GET_MODE (SUBREG_REG (value)),
5792 force_operand (SUBREG_REG (value),
5793 NULL_RTX)),
5794 GET_MODE (SUBREG_REG (value)),
5795 SUBREG_BYTE (value));
5796 #endif
5797
5798 return value;
5799 }
5800 \f
5801 /* Subroutine of expand_expr: return nonzero iff there is no way that
5802 EXP can reference X, which is being modified. TOP_P is nonzero if this
5803 call is going to be used to determine whether we need a temporary
5804 for EXP, as opposed to a recursive call to this function.
5805
5806 It is always safe for this routine to return zero since it merely
5807 searches for optimization opportunities. */
5808
5809 int
5810 safe_from_p (rtx x, tree exp, int top_p)
5811 {
5812 rtx exp_rtl = 0;
5813 int i, nops;
5814
5815 if (x == 0
5816 /* If EXP has varying size, we MUST use a target since we currently
5817 have no way of allocating temporaries of variable size
5818 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
5819 So we assume here that something at a higher level has prevented a
5820 clash. This is somewhat bogus, but the best we can do. Only
5821 do this when X is BLKmode and when we are at the top level. */
5822 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
5823 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
5824 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
5825 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
5826 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
5827 != INTEGER_CST)
5828 && GET_MODE (x) == BLKmode)
5829 /* If X is in the outgoing argument area, it is always safe. */
5830 || (MEM_P (x)
5831 && (XEXP (x, 0) == virtual_outgoing_args_rtx
5832 || (GET_CODE (XEXP (x, 0)) == PLUS
5833 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
5834 return 1;
5835
5836 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
5837 find the underlying pseudo. */
5838 if (GET_CODE (x) == SUBREG)
5839 {
5840 x = SUBREG_REG (x);
5841 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
5842 return 0;
5843 }
5844
5845 /* Now look at our tree code and possibly recurse. */
5846 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
5847 {
5848 case tcc_declaration:
5849 exp_rtl = DECL_RTL_IF_SET (exp);
5850 break;
5851
5852 case tcc_constant:
5853 return 1;
5854
5855 case tcc_exceptional:
5856 if (TREE_CODE (exp) == TREE_LIST)
5857 {
5858 while (1)
5859 {
5860 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
5861 return 0;
5862 exp = TREE_CHAIN (exp);
5863 if (!exp)
5864 return 1;
5865 if (TREE_CODE (exp) != TREE_LIST)
5866 return safe_from_p (x, exp, 0);
5867 }
5868 }
5869 else if (TREE_CODE (exp) == ERROR_MARK)
5870 return 1; /* An already-visited SAVE_EXPR? */
5871 else
5872 return 0;
5873
5874 case tcc_statement:
5875 /* The only case we look at here is the DECL_INITIAL inside a
5876 DECL_EXPR. */
5877 return (TREE_CODE (exp) != DECL_EXPR
5878 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
5879 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
5880 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
5881
5882 case tcc_binary:
5883 case tcc_comparison:
5884 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
5885 return 0;
5886 /* Fall through. */
5887
5888 case tcc_unary:
5889 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
5890
5891 case tcc_expression:
5892 case tcc_reference:
5893 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
5894 the expression. If it is set, we conflict iff we are that rtx or
5895 both are in memory. Otherwise, we check all operands of the
5896 expression recursively. */
5897
5898 switch (TREE_CODE (exp))
5899 {
5900 case ADDR_EXPR:
5901 /* If the operand is static or we are static, we can't conflict.
5902 Likewise if we don't conflict with the operand at all. */
5903 if (staticp (TREE_OPERAND (exp, 0))
5904 || TREE_STATIC (exp)
5905 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
5906 return 1;
5907
5908 /* Otherwise, the only way this can conflict is if we are taking
5909 the address of a DECL a that address if part of X, which is
5910 very rare. */
5911 exp = TREE_OPERAND (exp, 0);
5912 if (DECL_P (exp))
5913 {
5914 if (!DECL_RTL_SET_P (exp)
5915 || !MEM_P (DECL_RTL (exp)))
5916 return 0;
5917 else
5918 exp_rtl = XEXP (DECL_RTL (exp), 0);
5919 }
5920 break;
5921
5922 case MISALIGNED_INDIRECT_REF:
5923 case ALIGN_INDIRECT_REF:
5924 case INDIRECT_REF:
5925 if (MEM_P (x)
5926 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
5927 get_alias_set (exp)))
5928 return 0;
5929 break;
5930
5931 case CALL_EXPR:
5932 /* Assume that the call will clobber all hard registers and
5933 all of memory. */
5934 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
5935 || MEM_P (x))
5936 return 0;
5937 break;
5938
5939 case WITH_CLEANUP_EXPR:
5940 case CLEANUP_POINT_EXPR:
5941 /* Lowered by gimplify.c. */
5942 gcc_unreachable ();
5943
5944 case SAVE_EXPR:
5945 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
5946
5947 default:
5948 break;
5949 }
5950
5951 /* If we have an rtx, we do not need to scan our operands. */
5952 if (exp_rtl)
5953 break;
5954
5955 nops = TREE_CODE_LENGTH (TREE_CODE (exp));
5956 for (i = 0; i < nops; i++)
5957 if (TREE_OPERAND (exp, i) != 0
5958 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
5959 return 0;
5960
5961 /* If this is a language-specific tree code, it may require
5962 special handling. */
5963 if ((unsigned int) TREE_CODE (exp)
5964 >= (unsigned int) LAST_AND_UNUSED_TREE_CODE
5965 && !lang_hooks.safe_from_p (x, exp))
5966 return 0;
5967 break;
5968
5969 case tcc_type:
5970 /* Should never get a type here. */
5971 gcc_unreachable ();
5972 }
5973
5974 /* If we have an rtl, find any enclosed object. Then see if we conflict
5975 with it. */
5976 if (exp_rtl)
5977 {
5978 if (GET_CODE (exp_rtl) == SUBREG)
5979 {
5980 exp_rtl = SUBREG_REG (exp_rtl);
5981 if (REG_P (exp_rtl)
5982 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
5983 return 0;
5984 }
5985
5986 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
5987 are memory and they conflict. */
5988 return ! (rtx_equal_p (x, exp_rtl)
5989 || (MEM_P (x) && MEM_P (exp_rtl)
5990 && true_dependence (exp_rtl, VOIDmode, x,
5991 rtx_addr_varies_p)));
5992 }
5993
5994 /* If we reach here, it is safe. */
5995 return 1;
5996 }
5997
5998 \f
5999 /* Return the highest power of two that EXP is known to be a multiple of.
6000 This is used in updating alignment of MEMs in array references. */
6001
6002 static unsigned HOST_WIDE_INT
6003 highest_pow2_factor (tree exp)
6004 {
6005 unsigned HOST_WIDE_INT c0, c1;
6006
6007 switch (TREE_CODE (exp))
6008 {
6009 case INTEGER_CST:
6010 /* We can find the lowest bit that's a one. If the low
6011 HOST_BITS_PER_WIDE_INT bits are zero, return BIGGEST_ALIGNMENT.
6012 We need to handle this case since we can find it in a COND_EXPR,
6013 a MIN_EXPR, or a MAX_EXPR. If the constant overflows, we have an
6014 erroneous program, so return BIGGEST_ALIGNMENT to avoid any
6015 later ICE. */
6016 if (TREE_CONSTANT_OVERFLOW (exp))
6017 return BIGGEST_ALIGNMENT;
6018 else
6019 {
6020 /* Note: tree_low_cst is intentionally not used here,
6021 we don't care about the upper bits. */
6022 c0 = TREE_INT_CST_LOW (exp);
6023 c0 &= -c0;
6024 return c0 ? c0 : BIGGEST_ALIGNMENT;
6025 }
6026 break;
6027
6028 case PLUS_EXPR: case MINUS_EXPR: case MIN_EXPR: case MAX_EXPR:
6029 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6030 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6031 return MIN (c0, c1);
6032
6033 case MULT_EXPR:
6034 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6035 c1 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6036 return c0 * c1;
6037
6038 case ROUND_DIV_EXPR: case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR:
6039 case CEIL_DIV_EXPR:
6040 if (integer_pow2p (TREE_OPERAND (exp, 1))
6041 && host_integerp (TREE_OPERAND (exp, 1), 1))
6042 {
6043 c0 = highest_pow2_factor (TREE_OPERAND (exp, 0));
6044 c1 = tree_low_cst (TREE_OPERAND (exp, 1), 1);
6045 return MAX (1, c0 / c1);
6046 }
6047 break;
6048
6049 case NON_LVALUE_EXPR: case NOP_EXPR: case CONVERT_EXPR:
6050 case SAVE_EXPR:
6051 return highest_pow2_factor (TREE_OPERAND (exp, 0));
6052
6053 case COMPOUND_EXPR:
6054 return highest_pow2_factor (TREE_OPERAND (exp, 1));
6055
6056 case COND_EXPR:
6057 c0 = highest_pow2_factor (TREE_OPERAND (exp, 1));
6058 c1 = highest_pow2_factor (TREE_OPERAND (exp, 2));
6059 return MIN (c0, c1);
6060
6061 default:
6062 break;
6063 }
6064
6065 return 1;
6066 }
6067
6068 /* Similar, except that the alignment requirements of TARGET are
6069 taken into account. Assume it is at least as aligned as its
6070 type, unless it is a COMPONENT_REF in which case the layout of
6071 the structure gives the alignment. */
6072
6073 static unsigned HOST_WIDE_INT
6074 highest_pow2_factor_for_target (tree target, tree exp)
6075 {
6076 unsigned HOST_WIDE_INT target_align, factor;
6077
6078 factor = highest_pow2_factor (exp);
6079 if (TREE_CODE (target) == COMPONENT_REF)
6080 target_align = DECL_ALIGN_UNIT (TREE_OPERAND (target, 1));
6081 else
6082 target_align = TYPE_ALIGN_UNIT (TREE_TYPE (target));
6083 return MAX (factor, target_align);
6084 }
6085 \f
6086 /* Expands variable VAR. */
6087
6088 void
6089 expand_var (tree var)
6090 {
6091 if (DECL_EXTERNAL (var))
6092 return;
6093
6094 if (TREE_STATIC (var))
6095 /* If this is an inlined copy of a static local variable,
6096 look up the original decl. */
6097 var = DECL_ORIGIN (var);
6098
6099 if (TREE_STATIC (var)
6100 ? !TREE_ASM_WRITTEN (var)
6101 : !DECL_RTL_SET_P (var))
6102 {
6103 if (TREE_CODE (var) == VAR_DECL && DECL_VALUE_EXPR (var))
6104 /* Should be ignored. */;
6105 else if (lang_hooks.expand_decl (var))
6106 /* OK. */;
6107 else if (TREE_CODE (var) == VAR_DECL && !TREE_STATIC (var))
6108 expand_decl (var);
6109 else if (TREE_CODE (var) == VAR_DECL && TREE_STATIC (var))
6110 rest_of_decl_compilation (var, 0, 0);
6111 else
6112 /* No expansion needed. */
6113 gcc_assert (TREE_CODE (var) == TYPE_DECL
6114 || TREE_CODE (var) == CONST_DECL
6115 || TREE_CODE (var) == FUNCTION_DECL
6116 || TREE_CODE (var) == LABEL_DECL);
6117 }
6118 }
6119
6120 /* Subroutine of expand_expr. Expand the two operands of a binary
6121 expression EXP0 and EXP1 placing the results in OP0 and OP1.
6122 The value may be stored in TARGET if TARGET is nonzero. The
6123 MODIFIER argument is as documented by expand_expr. */
6124
6125 static void
6126 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
6127 enum expand_modifier modifier)
6128 {
6129 if (! safe_from_p (target, exp1, 1))
6130 target = 0;
6131 if (operand_equal_p (exp0, exp1, 0))
6132 {
6133 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6134 *op1 = copy_rtx (*op0);
6135 }
6136 else
6137 {
6138 /* If we need to preserve evaluation order, copy exp0 into its own
6139 temporary variable so that it can't be clobbered by exp1. */
6140 if (flag_evaluation_order && TREE_SIDE_EFFECTS (exp1))
6141 exp0 = save_expr (exp0);
6142 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
6143 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
6144 }
6145 }
6146
6147 \f
6148 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
6149 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6150
6151 static rtx
6152 expand_expr_addr_expr_1 (tree exp, rtx target, enum machine_mode tmode,
6153 enum expand_modifier modifier)
6154 {
6155 rtx result, subtarget;
6156 tree inner, offset;
6157 HOST_WIDE_INT bitsize, bitpos;
6158 int volatilep, unsignedp;
6159 enum machine_mode mode1;
6160
6161 /* If we are taking the address of a constant and are at the top level,
6162 we have to use output_constant_def since we can't call force_const_mem
6163 at top level. */
6164 /* ??? This should be considered a front-end bug. We should not be
6165 generating ADDR_EXPR of something that isn't an LVALUE. The only
6166 exception here is STRING_CST. */
6167 if (TREE_CODE (exp) == CONSTRUCTOR
6168 || CONSTANT_CLASS_P (exp))
6169 return XEXP (output_constant_def (exp, 0), 0);
6170
6171 /* Everything must be something allowed by is_gimple_addressable. */
6172 switch (TREE_CODE (exp))
6173 {
6174 case INDIRECT_REF:
6175 /* This case will happen via recursion for &a->b. */
6176 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, EXPAND_NORMAL);
6177
6178 case CONST_DECL:
6179 /* Recurse and make the output_constant_def clause above handle this. */
6180 return expand_expr_addr_expr_1 (DECL_INITIAL (exp), target,
6181 tmode, modifier);
6182
6183 case REALPART_EXPR:
6184 /* The real part of the complex number is always first, therefore
6185 the address is the same as the address of the parent object. */
6186 offset = 0;
6187 bitpos = 0;
6188 inner = TREE_OPERAND (exp, 0);
6189 break;
6190
6191 case IMAGPART_EXPR:
6192 /* The imaginary part of the complex number is always second.
6193 The expression is therefore always offset by the size of the
6194 scalar type. */
6195 offset = 0;
6196 bitpos = GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)));
6197 inner = TREE_OPERAND (exp, 0);
6198 break;
6199
6200 default:
6201 /* If the object is a DECL, then expand it for its rtl. Don't bypass
6202 expand_expr, as that can have various side effects; LABEL_DECLs for
6203 example, may not have their DECL_RTL set yet. Assume language
6204 specific tree nodes can be expanded in some interesting way. */
6205 if (DECL_P (exp)
6206 || TREE_CODE (exp) >= LAST_AND_UNUSED_TREE_CODE)
6207 {
6208 result = expand_expr (exp, target, tmode,
6209 modifier == EXPAND_INITIALIZER
6210 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
6211
6212 /* If the DECL isn't in memory, then the DECL wasn't properly
6213 marked TREE_ADDRESSABLE, which will be either a front-end
6214 or a tree optimizer bug. */
6215 gcc_assert (GET_CODE (result) == MEM);
6216 result = XEXP (result, 0);
6217
6218 /* ??? Is this needed anymore? */
6219 if (DECL_P (exp) && !TREE_USED (exp) == 0)
6220 {
6221 assemble_external (exp);
6222 TREE_USED (exp) = 1;
6223 }
6224
6225 if (modifier != EXPAND_INITIALIZER
6226 && modifier != EXPAND_CONST_ADDRESS)
6227 result = force_operand (result, target);
6228 return result;
6229 }
6230
6231 /* Pass FALSE as the last argument to get_inner_reference although
6232 we are expanding to RTL. The rationale is that we know how to
6233 handle "aligning nodes" here: we can just bypass them because
6234 they won't change the final object whose address will be returned
6235 (they actually exist only for that purpose). */
6236 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset,
6237 &mode1, &unsignedp, &volatilep, false);
6238 break;
6239 }
6240
6241 /* We must have made progress. */
6242 gcc_assert (inner != exp);
6243
6244 subtarget = offset || bitpos ? NULL_RTX : target;
6245 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier);
6246
6247 if (offset)
6248 {
6249 rtx tmp;
6250
6251 if (modifier != EXPAND_NORMAL)
6252 result = force_operand (result, NULL);
6253 tmp = expand_expr (offset, NULL, tmode, EXPAND_NORMAL);
6254
6255 result = convert_memory_address (tmode, result);
6256 tmp = convert_memory_address (tmode, tmp);
6257
6258 if (modifier == EXPAND_SUM)
6259 result = gen_rtx_PLUS (tmode, result, tmp);
6260 else
6261 {
6262 subtarget = bitpos ? NULL_RTX : target;
6263 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
6264 1, OPTAB_LIB_WIDEN);
6265 }
6266 }
6267
6268 if (bitpos)
6269 {
6270 /* Someone beforehand should have rejected taking the address
6271 of such an object. */
6272 gcc_assert ((bitpos % BITS_PER_UNIT) == 0);
6273
6274 result = plus_constant (result, bitpos / BITS_PER_UNIT);
6275 if (modifier < EXPAND_SUM)
6276 result = force_operand (result, target);
6277 }
6278
6279 return result;
6280 }
6281
6282 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
6283 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
6284
6285 static rtx
6286 expand_expr_addr_expr (tree exp, rtx target, enum machine_mode tmode,
6287 enum expand_modifier modifier)
6288 {
6289 enum machine_mode rmode;
6290 rtx result;
6291
6292 /* Target mode of VOIDmode says "whatever's natural". */
6293 if (tmode == VOIDmode)
6294 tmode = TYPE_MODE (TREE_TYPE (exp));
6295
6296 /* We can get called with some Weird Things if the user does silliness
6297 like "(short) &a". In that case, convert_memory_address won't do
6298 the right thing, so ignore the given target mode. */
6299 if (tmode != Pmode && tmode != ptr_mode)
6300 tmode = Pmode;
6301
6302 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
6303 tmode, modifier);
6304
6305 /* Despite expand_expr claims concerning ignoring TMODE when not
6306 strictly convenient, stuff breaks if we don't honor it. Note
6307 that combined with the above, we only do this for pointer modes. */
6308 rmode = GET_MODE (result);
6309 if (rmode == VOIDmode)
6310 rmode = tmode;
6311 if (rmode != tmode)
6312 result = convert_memory_address (tmode, result);
6313
6314 return result;
6315 }
6316
6317
6318 /* expand_expr: generate code for computing expression EXP.
6319 An rtx for the computed value is returned. The value is never null.
6320 In the case of a void EXP, const0_rtx is returned.
6321
6322 The value may be stored in TARGET if TARGET is nonzero.
6323 TARGET is just a suggestion; callers must assume that
6324 the rtx returned may not be the same as TARGET.
6325
6326 If TARGET is CONST0_RTX, it means that the value will be ignored.
6327
6328 If TMODE is not VOIDmode, it suggests generating the
6329 result in mode TMODE. But this is done only when convenient.
6330 Otherwise, TMODE is ignored and the value generated in its natural mode.
6331 TMODE is just a suggestion; callers must assume that
6332 the rtx returned may not have mode TMODE.
6333
6334 Note that TARGET may have neither TMODE nor MODE. In that case, it
6335 probably will not be used.
6336
6337 If MODIFIER is EXPAND_SUM then when EXP is an addition
6338 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
6339 or a nest of (PLUS ...) and (MINUS ...) where the terms are
6340 products as above, or REG or MEM, or constant.
6341 Ordinarily in such cases we would output mul or add instructions
6342 and then return a pseudo reg containing the sum.
6343
6344 EXPAND_INITIALIZER is much like EXPAND_SUM except that
6345 it also marks a label as absolutely required (it can't be dead).
6346 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
6347 This is used for outputting expressions used in initializers.
6348
6349 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
6350 with a constant address even if that address is not normally legitimate.
6351 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
6352
6353 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
6354 a call parameter. Such targets require special care as we haven't yet
6355 marked TARGET so that it's safe from being trashed by libcalls. We
6356 don't want to use TARGET for anything but the final result;
6357 Intermediate values must go elsewhere. Additionally, calls to
6358 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
6359
6360 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
6361 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
6362 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
6363 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
6364 recursively. */
6365
6366 static rtx expand_expr_real_1 (tree, rtx, enum machine_mode,
6367 enum expand_modifier, rtx *);
6368
6369 rtx
6370 expand_expr_real (tree exp, rtx target, enum machine_mode tmode,
6371 enum expand_modifier modifier, rtx *alt_rtl)
6372 {
6373 int rn = -1;
6374 rtx ret, last = NULL;
6375
6376 /* Handle ERROR_MARK before anybody tries to access its type. */
6377 if (TREE_CODE (exp) == ERROR_MARK
6378 || TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK)
6379 {
6380 ret = CONST0_RTX (tmode);
6381 return ret ? ret : const0_rtx;
6382 }
6383
6384 if (flag_non_call_exceptions)
6385 {
6386 rn = lookup_stmt_eh_region (exp);
6387 /* If rn < 0, then either (1) tree-ssa not used or (2) doesn't throw. */
6388 if (rn >= 0)
6389 last = get_last_insn ();
6390 }
6391
6392 /* If this is an expression of some kind and it has an associated line
6393 number, then emit the line number before expanding the expression.
6394
6395 We need to save and restore the file and line information so that
6396 errors discovered during expansion are emitted with the right
6397 information. It would be better of the diagnostic routines
6398 used the file/line information embedded in the tree nodes rather
6399 than globals. */
6400 if (cfun && EXPR_HAS_LOCATION (exp))
6401 {
6402 location_t saved_location = input_location;
6403 input_location = EXPR_LOCATION (exp);
6404 emit_line_note (input_location);
6405
6406 /* Record where the insns produced belong. */
6407 record_block_change (TREE_BLOCK (exp));
6408
6409 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
6410
6411 input_location = saved_location;
6412 }
6413 else
6414 {
6415 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl);
6416 }
6417
6418 /* If using non-call exceptions, mark all insns that may trap.
6419 expand_call() will mark CALL_INSNs before we get to this code,
6420 but it doesn't handle libcalls, and these may trap. */
6421 if (rn >= 0)
6422 {
6423 rtx insn;
6424 for (insn = next_real_insn (last); insn;
6425 insn = next_real_insn (insn))
6426 {
6427 if (! find_reg_note (insn, REG_EH_REGION, NULL_RTX)
6428 /* If we want exceptions for non-call insns, any
6429 may_trap_p instruction may throw. */
6430 && GET_CODE (PATTERN (insn)) != CLOBBER
6431 && GET_CODE (PATTERN (insn)) != USE
6432 && (CALL_P (insn) || may_trap_p (PATTERN (insn))))
6433 {
6434 REG_NOTES (insn) = alloc_EXPR_LIST (REG_EH_REGION, GEN_INT (rn),
6435 REG_NOTES (insn));
6436 }
6437 }
6438 }
6439
6440 return ret;
6441 }
6442
6443 static rtx
6444 expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
6445 enum expand_modifier modifier, rtx *alt_rtl)
6446 {
6447 rtx op0, op1, temp;
6448 tree type = TREE_TYPE (exp);
6449 int unsignedp;
6450 enum machine_mode mode;
6451 enum tree_code code = TREE_CODE (exp);
6452 optab this_optab;
6453 rtx subtarget, original_target;
6454 int ignore;
6455 tree context;
6456 bool reduce_bit_field = false;
6457 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field && !ignore \
6458 ? reduce_to_bit_field_precision ((expr), \
6459 target, \
6460 type) \
6461 : (expr))
6462
6463 mode = TYPE_MODE (type);
6464 unsignedp = TYPE_UNSIGNED (type);
6465 if (lang_hooks.reduce_bit_field_operations
6466 && TREE_CODE (type) == INTEGER_TYPE
6467 && GET_MODE_PRECISION (mode) > TYPE_PRECISION (type))
6468 {
6469 /* An operation in what may be a bit-field type needs the
6470 result to be reduced to the precision of the bit-field type,
6471 which is narrower than that of the type's mode. */
6472 reduce_bit_field = true;
6473 if (modifier == EXPAND_STACK_PARM)
6474 target = 0;
6475 }
6476
6477 /* Use subtarget as the target for operand 0 of a binary operation. */
6478 subtarget = get_subtarget (target);
6479 original_target = target;
6480 ignore = (target == const0_rtx
6481 || ((code == NON_LVALUE_EXPR || code == NOP_EXPR
6482 || code == CONVERT_EXPR || code == COND_EXPR
6483 || code == VIEW_CONVERT_EXPR)
6484 && TREE_CODE (type) == VOID_TYPE));
6485
6486 /* If we are going to ignore this result, we need only do something
6487 if there is a side-effect somewhere in the expression. If there
6488 is, short-circuit the most common cases here. Note that we must
6489 not call expand_expr with anything but const0_rtx in case this
6490 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
6491
6492 if (ignore)
6493 {
6494 if (! TREE_SIDE_EFFECTS (exp))
6495 return const0_rtx;
6496
6497 /* Ensure we reference a volatile object even if value is ignored, but
6498 don't do this if all we are doing is taking its address. */
6499 if (TREE_THIS_VOLATILE (exp)
6500 && TREE_CODE (exp) != FUNCTION_DECL
6501 && mode != VOIDmode && mode != BLKmode
6502 && modifier != EXPAND_CONST_ADDRESS)
6503 {
6504 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
6505 if (MEM_P (temp))
6506 temp = copy_to_reg (temp);
6507 return const0_rtx;
6508 }
6509
6510 if (TREE_CODE_CLASS (code) == tcc_unary
6511 || code == COMPONENT_REF || code == INDIRECT_REF)
6512 return expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
6513 modifier);
6514
6515 else if (TREE_CODE_CLASS (code) == tcc_binary
6516 || TREE_CODE_CLASS (code) == tcc_comparison
6517 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
6518 {
6519 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, modifier);
6520 expand_expr (TREE_OPERAND (exp, 1), const0_rtx, VOIDmode, modifier);
6521 return const0_rtx;
6522 }
6523 else if (code == BIT_FIELD_REF)
6524 {
6525 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, modifier);
6526 expand_expr (TREE_OPERAND (exp, 1), const0_rtx, VOIDmode, modifier);
6527 expand_expr (TREE_OPERAND (exp, 2), const0_rtx, VOIDmode, modifier);
6528 return const0_rtx;
6529 }
6530
6531 target = 0;
6532 }
6533
6534 /* If will do cse, generate all results into pseudo registers
6535 since 1) that allows cse to find more things
6536 and 2) otherwise cse could produce an insn the machine
6537 cannot support. An exception is a CONSTRUCTOR into a multi-word
6538 MEM: that's much more likely to be most efficient into the MEM.
6539 Another is a CALL_EXPR which must return in memory. */
6540
6541 if (! cse_not_expected && mode != BLKmode && target
6542 && (!REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER)
6543 && ! (code == CONSTRUCTOR && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
6544 && ! (code == CALL_EXPR && aggregate_value_p (exp, exp)))
6545 target = 0;
6546
6547 switch (code)
6548 {
6549 case LABEL_DECL:
6550 {
6551 tree function = decl_function_context (exp);
6552
6553 temp = label_rtx (exp);
6554 temp = gen_rtx_LABEL_REF (Pmode, temp);
6555
6556 if (function != current_function_decl
6557 && function != 0)
6558 LABEL_REF_NONLOCAL_P (temp) = 1;
6559
6560 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
6561 return temp;
6562 }
6563
6564 case SSA_NAME:
6565 return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
6566 NULL);
6567
6568 case PARM_DECL:
6569 case VAR_DECL:
6570 /* If a static var's type was incomplete when the decl was written,
6571 but the type is complete now, lay out the decl now. */
6572 if (DECL_SIZE (exp) == 0
6573 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
6574 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
6575 layout_decl (exp, 0);
6576
6577 /* ... fall through ... */
6578
6579 case FUNCTION_DECL:
6580 case RESULT_DECL:
6581 gcc_assert (DECL_RTL (exp));
6582
6583 /* Ensure variable marked as used even if it doesn't go through
6584 a parser. If it hasn't be used yet, write out an external
6585 definition. */
6586 if (! TREE_USED (exp))
6587 {
6588 assemble_external (exp);
6589 TREE_USED (exp) = 1;
6590 }
6591
6592 /* Show we haven't gotten RTL for this yet. */
6593 temp = 0;
6594
6595 /* Variables inherited from containing functions should have
6596 been lowered by this point. */
6597 context = decl_function_context (exp);
6598 gcc_assert (!context
6599 || context == current_function_decl
6600 || TREE_STATIC (exp)
6601 /* ??? C++ creates functions that are not TREE_STATIC. */
6602 || TREE_CODE (exp) == FUNCTION_DECL);
6603
6604 /* This is the case of an array whose size is to be determined
6605 from its initializer, while the initializer is still being parsed.
6606 See expand_decl. */
6607
6608 if (MEM_P (DECL_RTL (exp))
6609 && REG_P (XEXP (DECL_RTL (exp), 0)))
6610 temp = validize_mem (DECL_RTL (exp));
6611
6612 /* If DECL_RTL is memory, we are in the normal case and either
6613 the address is not valid or it is not a register and -fforce-addr
6614 is specified, get the address into a register. */
6615
6616 else if (MEM_P (DECL_RTL (exp))
6617 && modifier != EXPAND_CONST_ADDRESS
6618 && modifier != EXPAND_SUM
6619 && modifier != EXPAND_INITIALIZER
6620 && (! memory_address_p (DECL_MODE (exp),
6621 XEXP (DECL_RTL (exp), 0))
6622 || (flag_force_addr
6623 && !REG_P (XEXP (DECL_RTL (exp), 0)))))
6624 {
6625 if (alt_rtl)
6626 *alt_rtl = DECL_RTL (exp);
6627 temp = replace_equiv_address (DECL_RTL (exp),
6628 copy_rtx (XEXP (DECL_RTL (exp), 0)));
6629 }
6630
6631 /* If we got something, return it. But first, set the alignment
6632 if the address is a register. */
6633 if (temp != 0)
6634 {
6635 if (MEM_P (temp) && REG_P (XEXP (temp, 0)))
6636 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
6637
6638 return temp;
6639 }
6640
6641 /* If the mode of DECL_RTL does not match that of the decl, it
6642 must be a promoted value. We return a SUBREG of the wanted mode,
6643 but mark it so that we know that it was already extended. */
6644
6645 if (REG_P (DECL_RTL (exp))
6646 && GET_MODE (DECL_RTL (exp)) != DECL_MODE (exp))
6647 {
6648 enum machine_mode pmode;
6649
6650 /* Get the signedness used for this variable. Ensure we get the
6651 same mode we got when the variable was declared. */
6652 pmode = promote_mode (type, DECL_MODE (exp), &unsignedp,
6653 (TREE_CODE (exp) == RESULT_DECL ? 1 : 0));
6654 gcc_assert (GET_MODE (DECL_RTL (exp)) == pmode);
6655
6656 temp = gen_lowpart_SUBREG (mode, DECL_RTL (exp));
6657 SUBREG_PROMOTED_VAR_P (temp) = 1;
6658 SUBREG_PROMOTED_UNSIGNED_SET (temp, unsignedp);
6659 return temp;
6660 }
6661
6662 return DECL_RTL (exp);
6663
6664 case INTEGER_CST:
6665 temp = immed_double_const (TREE_INT_CST_LOW (exp),
6666 TREE_INT_CST_HIGH (exp), mode);
6667
6668 /* ??? If overflow is set, fold will have done an incomplete job,
6669 which can result in (plus xx (const_int 0)), which can get
6670 simplified by validate_replace_rtx during virtual register
6671 instantiation, which can result in unrecognizable insns.
6672 Avoid this by forcing all overflows into registers. */
6673 if (TREE_CONSTANT_OVERFLOW (exp)
6674 && modifier != EXPAND_INITIALIZER)
6675 temp = force_reg (mode, temp);
6676
6677 return temp;
6678
6679 case VECTOR_CST:
6680 if (GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp))) == MODE_VECTOR_INT
6681 || GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp))) == MODE_VECTOR_FLOAT)
6682 return const_vector_from_tree (exp);
6683 else
6684 return expand_expr (build1 (CONSTRUCTOR, TREE_TYPE (exp),
6685 TREE_VECTOR_CST_ELTS (exp)),
6686 ignore ? const0_rtx : target, tmode, modifier);
6687
6688 case CONST_DECL:
6689 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
6690
6691 case REAL_CST:
6692 /* If optimized, generate immediate CONST_DOUBLE
6693 which will be turned into memory by reload if necessary.
6694
6695 We used to force a register so that loop.c could see it. But
6696 this does not allow gen_* patterns to perform optimizations with
6697 the constants. It also produces two insns in cases like "x = 1.0;".
6698 On most machines, floating-point constants are not permitted in
6699 many insns, so we'd end up copying it to a register in any case.
6700
6701 Now, we do the copying in expand_binop, if appropriate. */
6702 return CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (exp),
6703 TYPE_MODE (TREE_TYPE (exp)));
6704
6705 case COMPLEX_CST:
6706 /* Handle evaluating a complex constant in a CONCAT target. */
6707 if (original_target && GET_CODE (original_target) == CONCAT)
6708 {
6709 enum machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
6710 rtx rtarg, itarg;
6711
6712 rtarg = XEXP (original_target, 0);
6713 itarg = XEXP (original_target, 1);
6714
6715 /* Move the real and imaginary parts separately. */
6716 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, 0);
6717 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, 0);
6718
6719 if (op0 != rtarg)
6720 emit_move_insn (rtarg, op0);
6721 if (op1 != itarg)
6722 emit_move_insn (itarg, op1);
6723
6724 return original_target;
6725 }
6726
6727 /* ... fall through ... */
6728
6729 case STRING_CST:
6730 temp = output_constant_def (exp, 1);
6731
6732 /* temp contains a constant address.
6733 On RISC machines where a constant address isn't valid,
6734 make some insns to get that address into a register. */
6735 if (modifier != EXPAND_CONST_ADDRESS
6736 && modifier != EXPAND_INITIALIZER
6737 && modifier != EXPAND_SUM
6738 && (! memory_address_p (mode, XEXP (temp, 0))
6739 || flag_force_addr))
6740 return replace_equiv_address (temp,
6741 copy_rtx (XEXP (temp, 0)));
6742 return temp;
6743
6744 case SAVE_EXPR:
6745 {
6746 tree val = TREE_OPERAND (exp, 0);
6747 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl);
6748
6749 if (!SAVE_EXPR_RESOLVED_P (exp))
6750 {
6751 /* We can indeed still hit this case, typically via builtin
6752 expanders calling save_expr immediately before expanding
6753 something. Assume this means that we only have to deal
6754 with non-BLKmode values. */
6755 gcc_assert (GET_MODE (ret) != BLKmode);
6756
6757 val = build_decl (VAR_DECL, NULL, TREE_TYPE (exp));
6758 DECL_ARTIFICIAL (val) = 1;
6759 DECL_IGNORED_P (val) = 1;
6760 TREE_OPERAND (exp, 0) = val;
6761 SAVE_EXPR_RESOLVED_P (exp) = 1;
6762
6763 if (!CONSTANT_P (ret))
6764 ret = copy_to_reg (ret);
6765 SET_DECL_RTL (val, ret);
6766 }
6767
6768 return ret;
6769 }
6770
6771 case GOTO_EXPR:
6772 if (TREE_CODE (TREE_OPERAND (exp, 0)) == LABEL_DECL)
6773 expand_goto (TREE_OPERAND (exp, 0));
6774 else
6775 expand_computed_goto (TREE_OPERAND (exp, 0));
6776 return const0_rtx;
6777
6778 case CONSTRUCTOR:
6779 /* If we don't need the result, just ensure we evaluate any
6780 subexpressions. */
6781 if (ignore)
6782 {
6783 tree elt;
6784
6785 for (elt = CONSTRUCTOR_ELTS (exp); elt; elt = TREE_CHAIN (elt))
6786 expand_expr (TREE_VALUE (elt), const0_rtx, VOIDmode, 0);
6787
6788 return const0_rtx;
6789 }
6790
6791 /* All elts simple constants => refer to a constant in memory. But
6792 if this is a non-BLKmode mode, let it store a field at a time
6793 since that should make a CONST_INT or CONST_DOUBLE when we
6794 fold. Likewise, if we have a target we can use, it is best to
6795 store directly into the target unless the type is large enough
6796 that memcpy will be used. If we are making an initializer and
6797 all operands are constant, put it in memory as well.
6798
6799 FIXME: Avoid trying to fill vector constructors piece-meal.
6800 Output them with output_constant_def below unless we're sure
6801 they're zeros. This should go away when vector initializers
6802 are treated like VECTOR_CST instead of arrays.
6803 */
6804 else if ((TREE_STATIC (exp)
6805 && ((mode == BLKmode
6806 && ! (target != 0 && safe_from_p (target, exp, 1)))
6807 || TREE_ADDRESSABLE (exp)
6808 || (host_integerp (TYPE_SIZE_UNIT (type), 1)
6809 && (! MOVE_BY_PIECES_P
6810 (tree_low_cst (TYPE_SIZE_UNIT (type), 1),
6811 TYPE_ALIGN (type)))
6812 && ! mostly_zeros_p (exp))))
6813 || ((modifier == EXPAND_INITIALIZER
6814 || modifier == EXPAND_CONST_ADDRESS)
6815 && TREE_CONSTANT (exp)))
6816 {
6817 rtx constructor = output_constant_def (exp, 1);
6818
6819 if (modifier != EXPAND_CONST_ADDRESS
6820 && modifier != EXPAND_INITIALIZER
6821 && modifier != EXPAND_SUM)
6822 constructor = validize_mem (constructor);
6823
6824 return constructor;
6825 }
6826 else
6827 {
6828 /* Handle calls that pass values in multiple non-contiguous
6829 locations. The Irix 6 ABI has examples of this. */
6830 if (target == 0 || ! safe_from_p (target, exp, 1)
6831 || GET_CODE (target) == PARALLEL
6832 || modifier == EXPAND_STACK_PARM)
6833 target
6834 = assign_temp (build_qualified_type (type,
6835 (TYPE_QUALS (type)
6836 | (TREE_READONLY (exp)
6837 * TYPE_QUAL_CONST))),
6838 0, TREE_ADDRESSABLE (exp), 1);
6839
6840 store_constructor (exp, target, 0, int_expr_size (exp));
6841 return target;
6842 }
6843
6844 case MISALIGNED_INDIRECT_REF:
6845 case ALIGN_INDIRECT_REF:
6846 case INDIRECT_REF:
6847 {
6848 tree exp1 = TREE_OPERAND (exp, 0);
6849 tree orig;
6850
6851 if (modifier != EXPAND_WRITE)
6852 {
6853 tree t;
6854
6855 t = fold_read_from_constant_string (exp);
6856 if (t)
6857 return expand_expr (t, target, tmode, modifier);
6858 }
6859
6860 op0 = expand_expr (exp1, NULL_RTX, VOIDmode, EXPAND_SUM);
6861 op0 = memory_address (mode, op0);
6862
6863 if (code == ALIGN_INDIRECT_REF)
6864 {
6865 int align = TYPE_ALIGN_UNIT (type);
6866 op0 = gen_rtx_AND (Pmode, op0, GEN_INT (-align));
6867 op0 = memory_address (mode, op0);
6868 }
6869
6870 temp = gen_rtx_MEM (mode, op0);
6871
6872 orig = REF_ORIGINAL (exp);
6873 if (!orig)
6874 orig = exp;
6875 set_mem_attributes (temp, orig, 0);
6876
6877 /* Resolve the misalignment now, so that we don't have to remember
6878 to resolve it later. Of course, this only works for reads. */
6879 /* ??? When we get around to supporting writes, we'll have to handle
6880 this in store_expr directly. The vectorizer isn't generating
6881 those yet, however. */
6882 if (code == MISALIGNED_INDIRECT_REF)
6883 {
6884 int icode;
6885 rtx reg, insn;
6886
6887 gcc_assert (modifier == EXPAND_NORMAL);
6888
6889 /* The vectorizer should have already checked the mode. */
6890 icode = movmisalign_optab->handlers[mode].insn_code;
6891 gcc_assert (icode != CODE_FOR_nothing);
6892
6893 /* We've already validated the memory, and we're creating a
6894 new pseudo destination. The predicates really can't fail. */
6895 reg = gen_reg_rtx (mode);
6896
6897 /* Nor can the insn generator. */
6898 insn = GEN_FCN (icode) (reg, temp);
6899 emit_insn (insn);
6900
6901 return reg;
6902 }
6903
6904 return temp;
6905 }
6906
6907 case ARRAY_REF:
6908
6909 {
6910 tree array = TREE_OPERAND (exp, 0);
6911 tree index = TREE_OPERAND (exp, 1);
6912
6913 /* Fold an expression like: "foo"[2].
6914 This is not done in fold so it won't happen inside &.
6915 Don't fold if this is for wide characters since it's too
6916 difficult to do correctly and this is a very rare case. */
6917
6918 if (modifier != EXPAND_CONST_ADDRESS
6919 && modifier != EXPAND_INITIALIZER
6920 && modifier != EXPAND_MEMORY)
6921 {
6922 tree t = fold_read_from_constant_string (exp);
6923
6924 if (t)
6925 return expand_expr (t, target, tmode, modifier);
6926 }
6927
6928 /* If this is a constant index into a constant array,
6929 just get the value from the array. Handle both the cases when
6930 we have an explicit constructor and when our operand is a variable
6931 that was declared const. */
6932
6933 if (modifier != EXPAND_CONST_ADDRESS
6934 && modifier != EXPAND_INITIALIZER
6935 && modifier != EXPAND_MEMORY
6936 && TREE_CODE (array) == CONSTRUCTOR
6937 && ! TREE_SIDE_EFFECTS (array)
6938 && TREE_CODE (index) == INTEGER_CST)
6939 {
6940 tree elem;
6941
6942 for (elem = CONSTRUCTOR_ELTS (array);
6943 (elem && !tree_int_cst_equal (TREE_PURPOSE (elem), index));
6944 elem = TREE_CHAIN (elem))
6945 ;
6946
6947 if (elem && !TREE_SIDE_EFFECTS (TREE_VALUE (elem)))
6948 return expand_expr (fold (TREE_VALUE (elem)), target, tmode,
6949 modifier);
6950 }
6951
6952 else if (optimize >= 1
6953 && modifier != EXPAND_CONST_ADDRESS
6954 && modifier != EXPAND_INITIALIZER
6955 && modifier != EXPAND_MEMORY
6956 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
6957 && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array)
6958 && TREE_CODE (DECL_INITIAL (array)) != ERROR_MARK
6959 && targetm.binds_local_p (array))
6960 {
6961 if (TREE_CODE (index) == INTEGER_CST)
6962 {
6963 tree init = DECL_INITIAL (array);
6964
6965 if (TREE_CODE (init) == CONSTRUCTOR)
6966 {
6967 tree elem;
6968
6969 for (elem = CONSTRUCTOR_ELTS (init);
6970 (elem
6971 && !tree_int_cst_equal (TREE_PURPOSE (elem), index));
6972 elem = TREE_CHAIN (elem))
6973 ;
6974
6975 if (elem && !TREE_SIDE_EFFECTS (TREE_VALUE (elem)))
6976 return expand_expr (fold (TREE_VALUE (elem)), target,
6977 tmode, modifier);
6978 }
6979 else if (TREE_CODE (init) == STRING_CST
6980 && 0 > compare_tree_int (index,
6981 TREE_STRING_LENGTH (init)))
6982 {
6983 tree type = TREE_TYPE (TREE_TYPE (init));
6984 enum machine_mode mode = TYPE_MODE (type);
6985
6986 if (GET_MODE_CLASS (mode) == MODE_INT
6987 && GET_MODE_SIZE (mode) == 1)
6988 return gen_int_mode (TREE_STRING_POINTER (init)
6989 [TREE_INT_CST_LOW (index)], mode);
6990 }
6991 }
6992 }
6993 }
6994 goto normal_inner_ref;
6995
6996 case COMPONENT_REF:
6997 /* If the operand is a CONSTRUCTOR, we can just extract the
6998 appropriate field if it is present. */
6999 if (TREE_CODE (TREE_OPERAND (exp, 0)) == CONSTRUCTOR)
7000 {
7001 tree elt;
7002
7003 for (elt = CONSTRUCTOR_ELTS (TREE_OPERAND (exp, 0)); elt;
7004 elt = TREE_CHAIN (elt))
7005 if (TREE_PURPOSE (elt) == TREE_OPERAND (exp, 1)
7006 /* We can normally use the value of the field in the
7007 CONSTRUCTOR. However, if this is a bitfield in
7008 an integral mode that we can fit in a HOST_WIDE_INT,
7009 we must mask only the number of bits in the bitfield,
7010 since this is done implicitly by the constructor. If
7011 the bitfield does not meet either of those conditions,
7012 we can't do this optimization. */
7013 && (! DECL_BIT_FIELD (TREE_PURPOSE (elt))
7014 || ((GET_MODE_CLASS (DECL_MODE (TREE_PURPOSE (elt)))
7015 == MODE_INT)
7016 && (GET_MODE_BITSIZE (DECL_MODE (TREE_PURPOSE (elt)))
7017 <= HOST_BITS_PER_WIDE_INT))))
7018 {
7019 if (DECL_BIT_FIELD (TREE_PURPOSE (elt))
7020 && modifier == EXPAND_STACK_PARM)
7021 target = 0;
7022 op0 = expand_expr (TREE_VALUE (elt), target, tmode, modifier);
7023 if (DECL_BIT_FIELD (TREE_PURPOSE (elt)))
7024 {
7025 HOST_WIDE_INT bitsize
7026 = TREE_INT_CST_LOW (DECL_SIZE (TREE_PURPOSE (elt)));
7027 enum machine_mode imode
7028 = TYPE_MODE (TREE_TYPE (TREE_PURPOSE (elt)));
7029
7030 if (TYPE_UNSIGNED (TREE_TYPE (TREE_PURPOSE (elt))))
7031 {
7032 op1 = GEN_INT (((HOST_WIDE_INT) 1 << bitsize) - 1);
7033 op0 = expand_and (imode, op0, op1, target);
7034 }
7035 else
7036 {
7037 tree count
7038 = build_int_cst (NULL_TREE,
7039 GET_MODE_BITSIZE (imode) - bitsize);
7040
7041 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
7042 target, 0);
7043 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
7044 target, 0);
7045 }
7046 }
7047
7048 return op0;
7049 }
7050 }
7051 goto normal_inner_ref;
7052
7053 case BIT_FIELD_REF:
7054 case ARRAY_RANGE_REF:
7055 normal_inner_ref:
7056 {
7057 enum machine_mode mode1;
7058 HOST_WIDE_INT bitsize, bitpos;
7059 tree offset;
7060 int volatilep = 0;
7061 tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
7062 &mode1, &unsignedp, &volatilep, true);
7063 rtx orig_op0;
7064
7065 /* If we got back the original object, something is wrong. Perhaps
7066 we are evaluating an expression too early. In any event, don't
7067 infinitely recurse. */
7068 gcc_assert (tem != exp);
7069
7070 /* If TEM's type is a union of variable size, pass TARGET to the inner
7071 computation, since it will need a temporary and TARGET is known
7072 to have to do. This occurs in unchecked conversion in Ada. */
7073
7074 orig_op0 = op0
7075 = expand_expr (tem,
7076 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
7077 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
7078 != INTEGER_CST)
7079 && modifier != EXPAND_STACK_PARM
7080 ? target : NULL_RTX),
7081 VOIDmode,
7082 (modifier == EXPAND_INITIALIZER
7083 || modifier == EXPAND_CONST_ADDRESS
7084 || modifier == EXPAND_STACK_PARM)
7085 ? modifier : EXPAND_NORMAL);
7086
7087 /* If this is a constant, put it into a register if it is a
7088 legitimate constant and OFFSET is 0 and memory if it isn't. */
7089 if (CONSTANT_P (op0))
7090 {
7091 enum machine_mode mode = TYPE_MODE (TREE_TYPE (tem));
7092 if (mode != BLKmode && LEGITIMATE_CONSTANT_P (op0)
7093 && offset == 0)
7094 op0 = force_reg (mode, op0);
7095 else
7096 op0 = validize_mem (force_const_mem (mode, op0));
7097 }
7098
7099 /* Otherwise, if this object not in memory and we either have an
7100 offset or a BLKmode result, put it there. This case can't occur in
7101 C, but can in Ada if we have unchecked conversion of an expression
7102 from a scalar type to an array or record type or for an
7103 ARRAY_RANGE_REF whose type is BLKmode. */
7104 else if (!MEM_P (op0)
7105 && (offset != 0
7106 || (code == ARRAY_RANGE_REF && mode == BLKmode)))
7107 {
7108 tree nt = build_qualified_type (TREE_TYPE (tem),
7109 (TYPE_QUALS (TREE_TYPE (tem))
7110 | TYPE_QUAL_CONST));
7111 rtx memloc = assign_temp (nt, 1, 1, 1);
7112
7113 emit_move_insn (memloc, op0);
7114 op0 = memloc;
7115 }
7116
7117 if (offset != 0)
7118 {
7119 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
7120 EXPAND_SUM);
7121
7122 gcc_assert (MEM_P (op0));
7123
7124 #ifdef POINTERS_EXTEND_UNSIGNED
7125 if (GET_MODE (offset_rtx) != Pmode)
7126 offset_rtx = convert_to_mode (Pmode, offset_rtx, 0);
7127 #else
7128 if (GET_MODE (offset_rtx) != ptr_mode)
7129 offset_rtx = convert_to_mode (ptr_mode, offset_rtx, 0);
7130 #endif
7131
7132 if (GET_MODE (op0) == BLKmode
7133 /* A constant address in OP0 can have VOIDmode, we must
7134 not try to call force_reg in that case. */
7135 && GET_MODE (XEXP (op0, 0)) != VOIDmode
7136 && bitsize != 0
7137 && (bitpos % bitsize) == 0
7138 && (bitsize % GET_MODE_ALIGNMENT (mode1)) == 0
7139 && MEM_ALIGN (op0) == GET_MODE_ALIGNMENT (mode1))
7140 {
7141 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
7142 bitpos = 0;
7143 }
7144
7145 op0 = offset_address (op0, offset_rtx,
7146 highest_pow2_factor (offset));
7147 }
7148
7149 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
7150 record its alignment as BIGGEST_ALIGNMENT. */
7151 if (MEM_P (op0) && bitpos == 0 && offset != 0
7152 && is_aligning_offset (offset, tem))
7153 set_mem_align (op0, BIGGEST_ALIGNMENT);
7154
7155 /* Don't forget about volatility even if this is a bitfield. */
7156 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
7157 {
7158 if (op0 == orig_op0)
7159 op0 = copy_rtx (op0);
7160
7161 MEM_VOLATILE_P (op0) = 1;
7162 }
7163
7164 /* The following code doesn't handle CONCAT.
7165 Assume only bitpos == 0 can be used for CONCAT, due to
7166 one element arrays having the same mode as its element. */
7167 if (GET_CODE (op0) == CONCAT)
7168 {
7169 gcc_assert (bitpos == 0
7170 && bitsize == GET_MODE_BITSIZE (GET_MODE (op0)));
7171 return op0;
7172 }
7173
7174 /* In cases where an aligned union has an unaligned object
7175 as a field, we might be extracting a BLKmode value from
7176 an integer-mode (e.g., SImode) object. Handle this case
7177 by doing the extract into an object as wide as the field
7178 (which we know to be the width of a basic mode), then
7179 storing into memory, and changing the mode to BLKmode. */
7180 if (mode1 == VOIDmode
7181 || REG_P (op0) || GET_CODE (op0) == SUBREG
7182 || (mode1 != BLKmode && ! direct_load[(int) mode1]
7183 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7184 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
7185 && modifier != EXPAND_CONST_ADDRESS
7186 && modifier != EXPAND_INITIALIZER)
7187 /* If the field isn't aligned enough to fetch as a memref,
7188 fetch it as a bit field. */
7189 || (mode1 != BLKmode
7190 && (((TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
7191 || (bitpos % GET_MODE_ALIGNMENT (mode) != 0)
7192 || (MEM_P (op0)
7193 && (MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
7194 || (bitpos % GET_MODE_ALIGNMENT (mode1) != 0))))
7195 && ((modifier == EXPAND_CONST_ADDRESS
7196 || modifier == EXPAND_INITIALIZER)
7197 ? STRICT_ALIGNMENT
7198 : SLOW_UNALIGNED_ACCESS (mode1, MEM_ALIGN (op0))))
7199 || (bitpos % BITS_PER_UNIT != 0)))
7200 /* If the type and the field are a constant size and the
7201 size of the type isn't the same size as the bitfield,
7202 we must use bitfield operations. */
7203 || (bitsize >= 0
7204 && TYPE_SIZE (TREE_TYPE (exp))
7205 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) == INTEGER_CST
7206 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp)),
7207 bitsize)))
7208 {
7209 enum machine_mode ext_mode = mode;
7210
7211 if (ext_mode == BLKmode
7212 && ! (target != 0 && MEM_P (op0)
7213 && MEM_P (target)
7214 && bitpos % BITS_PER_UNIT == 0))
7215 ext_mode = mode_for_size (bitsize, MODE_INT, 1);
7216
7217 if (ext_mode == BLKmode)
7218 {
7219 if (target == 0)
7220 target = assign_temp (type, 0, 1, 1);
7221
7222 if (bitsize == 0)
7223 return target;
7224
7225 /* In this case, BITPOS must start at a byte boundary and
7226 TARGET, if specified, must be a MEM. */
7227 gcc_assert (MEM_P (op0)
7228 && (!target || MEM_P (target))
7229 && !(bitpos % BITS_PER_UNIT));
7230
7231 emit_block_move (target,
7232 adjust_address (op0, VOIDmode,
7233 bitpos / BITS_PER_UNIT),
7234 GEN_INT ((bitsize + BITS_PER_UNIT - 1)
7235 / BITS_PER_UNIT),
7236 (modifier == EXPAND_STACK_PARM
7237 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
7238
7239 return target;
7240 }
7241
7242 op0 = validize_mem (op0);
7243
7244 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
7245 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
7246
7247 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
7248 (modifier == EXPAND_STACK_PARM
7249 ? NULL_RTX : target),
7250 ext_mode, ext_mode);
7251
7252 /* If the result is a record type and BITSIZE is narrower than
7253 the mode of OP0, an integral mode, and this is a big endian
7254 machine, we must put the field into the high-order bits. */
7255 if (TREE_CODE (type) == RECORD_TYPE && BYTES_BIG_ENDIAN
7256 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
7257 && bitsize < (HOST_WIDE_INT) GET_MODE_BITSIZE (GET_MODE (op0)))
7258 op0 = expand_shift (LSHIFT_EXPR, GET_MODE (op0), op0,
7259 size_int (GET_MODE_BITSIZE (GET_MODE (op0))
7260 - bitsize),
7261 op0, 1);
7262
7263 /* If the result type is BLKmode, store the data into a temporary
7264 of the appropriate type, but with the mode corresponding to the
7265 mode for the data we have (op0's mode). It's tempting to make
7266 this a constant type, since we know it's only being stored once,
7267 but that can cause problems if we are taking the address of this
7268 COMPONENT_REF because the MEM of any reference via that address
7269 will have flags corresponding to the type, which will not
7270 necessarily be constant. */
7271 if (mode == BLKmode)
7272 {
7273 rtx new
7274 = assign_stack_temp_for_type
7275 (ext_mode, GET_MODE_BITSIZE (ext_mode), 0, type);
7276
7277 emit_move_insn (new, op0);
7278 op0 = copy_rtx (new);
7279 PUT_MODE (op0, BLKmode);
7280 set_mem_attributes (op0, exp, 1);
7281 }
7282
7283 return op0;
7284 }
7285
7286 /* If the result is BLKmode, use that to access the object
7287 now as well. */
7288 if (mode == BLKmode)
7289 mode1 = BLKmode;
7290
7291 /* Get a reference to just this component. */
7292 if (modifier == EXPAND_CONST_ADDRESS
7293 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7294 op0 = adjust_address_nv (op0, mode1, bitpos / BITS_PER_UNIT);
7295 else
7296 op0 = adjust_address (op0, mode1, bitpos / BITS_PER_UNIT);
7297
7298 if (op0 == orig_op0)
7299 op0 = copy_rtx (op0);
7300
7301 set_mem_attributes (op0, exp, 0);
7302 if (REG_P (XEXP (op0, 0)))
7303 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
7304
7305 MEM_VOLATILE_P (op0) |= volatilep;
7306 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
7307 || modifier == EXPAND_CONST_ADDRESS
7308 || modifier == EXPAND_INITIALIZER)
7309 return op0;
7310 else if (target == 0)
7311 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
7312
7313 convert_move (target, op0, unsignedp);
7314 return target;
7315 }
7316
7317 case OBJ_TYPE_REF:
7318 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
7319
7320 case CALL_EXPR:
7321 /* Check for a built-in function. */
7322 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
7323 && (TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
7324 == FUNCTION_DECL)
7325 && DECL_BUILT_IN (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
7326 {
7327 if (DECL_BUILT_IN_CLASS (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
7328 == BUILT_IN_FRONTEND)
7329 return lang_hooks.expand_expr (exp, original_target,
7330 tmode, modifier,
7331 alt_rtl);
7332 else
7333 return expand_builtin (exp, target, subtarget, tmode, ignore);
7334 }
7335
7336 return expand_call (exp, target, ignore);
7337
7338 case NON_LVALUE_EXPR:
7339 case NOP_EXPR:
7340 case CONVERT_EXPR:
7341 if (TREE_OPERAND (exp, 0) == error_mark_node)
7342 return const0_rtx;
7343
7344 if (TREE_CODE (type) == UNION_TYPE)
7345 {
7346 tree valtype = TREE_TYPE (TREE_OPERAND (exp, 0));
7347
7348 /* If both input and output are BLKmode, this conversion isn't doing
7349 anything except possibly changing memory attribute. */
7350 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
7351 {
7352 rtx result = expand_expr (TREE_OPERAND (exp, 0), target, tmode,
7353 modifier);
7354
7355 result = copy_rtx (result);
7356 set_mem_attributes (result, exp, 0);
7357 return result;
7358 }
7359
7360 if (target == 0)
7361 {
7362 if (TYPE_MODE (type) != BLKmode)
7363 target = gen_reg_rtx (TYPE_MODE (type));
7364 else
7365 target = assign_temp (type, 0, 1, 1);
7366 }
7367
7368 if (MEM_P (target))
7369 /* Store data into beginning of memory target. */
7370 store_expr (TREE_OPERAND (exp, 0),
7371 adjust_address (target, TYPE_MODE (valtype), 0),
7372 modifier == EXPAND_STACK_PARM);
7373
7374 else
7375 {
7376 gcc_assert (REG_P (target));
7377
7378 /* Store this field into a union of the proper type. */
7379 store_field (target,
7380 MIN ((int_size_in_bytes (TREE_TYPE
7381 (TREE_OPERAND (exp, 0)))
7382 * BITS_PER_UNIT),
7383 (HOST_WIDE_INT) GET_MODE_BITSIZE (mode)),
7384 0, TYPE_MODE (valtype), TREE_OPERAND (exp, 0),
7385 type, 0);
7386 }
7387
7388 /* Return the entire union. */
7389 return target;
7390 }
7391
7392 if (mode == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))))
7393 {
7394 op0 = expand_expr (TREE_OPERAND (exp, 0), target, VOIDmode,
7395 modifier);
7396
7397 /* If the signedness of the conversion differs and OP0 is
7398 a promoted SUBREG, clear that indication since we now
7399 have to do the proper extension. */
7400 if (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))) != unsignedp
7401 && GET_CODE (op0) == SUBREG)
7402 SUBREG_PROMOTED_VAR_P (op0) = 0;
7403
7404 return REDUCE_BIT_FIELD (op0);
7405 }
7406
7407 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, mode, modifier);
7408 if (GET_MODE (op0) == mode)
7409 ;
7410
7411 /* If OP0 is a constant, just convert it into the proper mode. */
7412 else if (CONSTANT_P (op0))
7413 {
7414 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
7415 enum machine_mode inner_mode = TYPE_MODE (inner_type);
7416
7417 if (modifier == EXPAND_INITIALIZER)
7418 op0 = simplify_gen_subreg (mode, op0, inner_mode,
7419 subreg_lowpart_offset (mode,
7420 inner_mode));
7421 else
7422 op0= convert_modes (mode, inner_mode, op0,
7423 TYPE_UNSIGNED (inner_type));
7424 }
7425
7426 else if (modifier == EXPAND_INITIALIZER)
7427 op0 = gen_rtx_fmt_e (unsignedp ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
7428
7429 else if (target == 0)
7430 op0 = convert_to_mode (mode, op0,
7431 TYPE_UNSIGNED (TREE_TYPE
7432 (TREE_OPERAND (exp, 0))));
7433 else
7434 {
7435 convert_move (target, op0,
7436 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
7437 op0 = target;
7438 }
7439
7440 return REDUCE_BIT_FIELD (op0);
7441
7442 case VIEW_CONVERT_EXPR:
7443 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, mode, modifier);
7444
7445 /* If the input and output modes are both the same, we are done.
7446 Otherwise, if neither mode is BLKmode and both are integral and within
7447 a word, we can use gen_lowpart. If neither is true, make sure the
7448 operand is in memory and convert the MEM to the new mode. */
7449 if (TYPE_MODE (type) == GET_MODE (op0))
7450 ;
7451 else if (TYPE_MODE (type) != BLKmode && GET_MODE (op0) != BLKmode
7452 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT
7453 && GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT
7454 && GET_MODE_SIZE (TYPE_MODE (type)) <= UNITS_PER_WORD
7455 && GET_MODE_SIZE (GET_MODE (op0)) <= UNITS_PER_WORD)
7456 op0 = gen_lowpart (TYPE_MODE (type), op0);
7457 else if (!MEM_P (op0))
7458 {
7459 /* If the operand is not a MEM, force it into memory. Since we
7460 are going to be be changing the mode of the MEM, don't call
7461 force_const_mem for constants because we don't allow pool
7462 constants to change mode. */
7463 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
7464
7465 gcc_assert (!TREE_ADDRESSABLE (exp));
7466
7467 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
7468 target
7469 = assign_stack_temp_for_type
7470 (TYPE_MODE (inner_type),
7471 GET_MODE_SIZE (TYPE_MODE (inner_type)), 0, inner_type);
7472
7473 emit_move_insn (target, op0);
7474 op0 = target;
7475 }
7476
7477 /* At this point, OP0 is in the correct mode. If the output type is such
7478 that the operand is known to be aligned, indicate that it is.
7479 Otherwise, we need only be concerned about alignment for non-BLKmode
7480 results. */
7481 if (MEM_P (op0))
7482 {
7483 op0 = copy_rtx (op0);
7484
7485 if (TYPE_ALIGN_OK (type))
7486 set_mem_align (op0, MAX (MEM_ALIGN (op0), TYPE_ALIGN (type)));
7487 else if (TYPE_MODE (type) != BLKmode && STRICT_ALIGNMENT
7488 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (TYPE_MODE (type)))
7489 {
7490 tree inner_type = TREE_TYPE (TREE_OPERAND (exp, 0));
7491 HOST_WIDE_INT temp_size
7492 = MAX (int_size_in_bytes (inner_type),
7493 (HOST_WIDE_INT) GET_MODE_SIZE (TYPE_MODE (type)));
7494 rtx new = assign_stack_temp_for_type (TYPE_MODE (type),
7495 temp_size, 0, type);
7496 rtx new_with_op0_mode = adjust_address (new, GET_MODE (op0), 0);
7497
7498 gcc_assert (!TREE_ADDRESSABLE (exp));
7499
7500 if (GET_MODE (op0) == BLKmode)
7501 emit_block_move (new_with_op0_mode, op0,
7502 GEN_INT (GET_MODE_SIZE (TYPE_MODE (type))),
7503 (modifier == EXPAND_STACK_PARM
7504 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
7505 else
7506 emit_move_insn (new_with_op0_mode, op0);
7507
7508 op0 = new;
7509 }
7510
7511 op0 = adjust_address (op0, TYPE_MODE (type), 0);
7512 }
7513
7514 return op0;
7515
7516 case PLUS_EXPR:
7517 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
7518 something else, make sure we add the register to the constant and
7519 then to the other thing. This case can occur during strength
7520 reduction and doing it this way will produce better code if the
7521 frame pointer or argument pointer is eliminated.
7522
7523 fold-const.c will ensure that the constant is always in the inner
7524 PLUS_EXPR, so the only case we need to do anything about is if
7525 sp, ap, or fp is our second argument, in which case we must swap
7526 the innermost first argument and our second argument. */
7527
7528 if (TREE_CODE (TREE_OPERAND (exp, 0)) == PLUS_EXPR
7529 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 1)) == INTEGER_CST
7530 && TREE_CODE (TREE_OPERAND (exp, 1)) == VAR_DECL
7531 && (DECL_RTL (TREE_OPERAND (exp, 1)) == frame_pointer_rtx
7532 || DECL_RTL (TREE_OPERAND (exp, 1)) == stack_pointer_rtx
7533 || DECL_RTL (TREE_OPERAND (exp, 1)) == arg_pointer_rtx))
7534 {
7535 tree t = TREE_OPERAND (exp, 1);
7536
7537 TREE_OPERAND (exp, 1) = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7538 TREE_OPERAND (TREE_OPERAND (exp, 0), 0) = t;
7539 }
7540
7541 /* If the result is to be ptr_mode and we are adding an integer to
7542 something, we might be forming a constant. So try to use
7543 plus_constant. If it produces a sum and we can't accept it,
7544 use force_operand. This allows P = &ARR[const] to generate
7545 efficient code on machines where a SYMBOL_REF is not a valid
7546 address.
7547
7548 If this is an EXPAND_SUM call, always return the sum. */
7549 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
7550 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
7551 {
7552 if (modifier == EXPAND_STACK_PARM)
7553 target = 0;
7554 if (TREE_CODE (TREE_OPERAND (exp, 0)) == INTEGER_CST
7555 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT
7556 && TREE_CONSTANT (TREE_OPERAND (exp, 1)))
7557 {
7558 rtx constant_part;
7559
7560 op1 = expand_expr (TREE_OPERAND (exp, 1), subtarget, VOIDmode,
7561 EXPAND_SUM);
7562 /* Use immed_double_const to ensure that the constant is
7563 truncated according to the mode of OP1, then sign extended
7564 to a HOST_WIDE_INT. Using the constant directly can result
7565 in non-canonical RTL in a 64x32 cross compile. */
7566 constant_part
7567 = immed_double_const (TREE_INT_CST_LOW (TREE_OPERAND (exp, 0)),
7568 (HOST_WIDE_INT) 0,
7569 TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 1))));
7570 op1 = plus_constant (op1, INTVAL (constant_part));
7571 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7572 op1 = force_operand (op1, target);
7573 return REDUCE_BIT_FIELD (op1);
7574 }
7575
7576 else if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST
7577 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_INT
7578 && TREE_CONSTANT (TREE_OPERAND (exp, 0)))
7579 {
7580 rtx constant_part;
7581
7582 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode,
7583 (modifier == EXPAND_INITIALIZER
7584 ? EXPAND_INITIALIZER : EXPAND_SUM));
7585 if (! CONSTANT_P (op0))
7586 {
7587 op1 = expand_expr (TREE_OPERAND (exp, 1), NULL_RTX,
7588 VOIDmode, modifier);
7589 /* Return a PLUS if modifier says it's OK. */
7590 if (modifier == EXPAND_SUM
7591 || modifier == EXPAND_INITIALIZER)
7592 return simplify_gen_binary (PLUS, mode, op0, op1);
7593 goto binop2;
7594 }
7595 /* Use immed_double_const to ensure that the constant is
7596 truncated according to the mode of OP1, then sign extended
7597 to a HOST_WIDE_INT. Using the constant directly can result
7598 in non-canonical RTL in a 64x32 cross compile. */
7599 constant_part
7600 = immed_double_const (TREE_INT_CST_LOW (TREE_OPERAND (exp, 1)),
7601 (HOST_WIDE_INT) 0,
7602 TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))));
7603 op0 = plus_constant (op0, INTVAL (constant_part));
7604 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7605 op0 = force_operand (op0, target);
7606 return REDUCE_BIT_FIELD (op0);
7607 }
7608 }
7609
7610 /* No sense saving up arithmetic to be done
7611 if it's all in the wrong mode to form part of an address.
7612 And force_operand won't know whether to sign-extend or
7613 zero-extend. */
7614 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7615 || mode != ptr_mode)
7616 {
7617 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7618 subtarget, &op0, &op1, 0);
7619 if (op0 == const0_rtx)
7620 return op1;
7621 if (op1 == const0_rtx)
7622 return op0;
7623 goto binop2;
7624 }
7625
7626 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7627 subtarget, &op0, &op1, modifier);
7628 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7629
7630 case MINUS_EXPR:
7631 /* For initializers, we are allowed to return a MINUS of two
7632 symbolic constants. Here we handle all cases when both operands
7633 are constant. */
7634 /* Handle difference of two symbolic constants,
7635 for the sake of an initializer. */
7636 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
7637 && really_constant_p (TREE_OPERAND (exp, 0))
7638 && really_constant_p (TREE_OPERAND (exp, 1)))
7639 {
7640 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7641 NULL_RTX, &op0, &op1, modifier);
7642
7643 /* If the last operand is a CONST_INT, use plus_constant of
7644 the negated constant. Else make the MINUS. */
7645 if (GET_CODE (op1) == CONST_INT)
7646 return REDUCE_BIT_FIELD (plus_constant (op0, - INTVAL (op1)));
7647 else
7648 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode, op0, op1));
7649 }
7650
7651 /* No sense saving up arithmetic to be done
7652 if it's all in the wrong mode to form part of an address.
7653 And force_operand won't know whether to sign-extend or
7654 zero-extend. */
7655 if ((modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
7656 || mode != ptr_mode)
7657 goto binop;
7658
7659 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7660 subtarget, &op0, &op1, modifier);
7661
7662 /* Convert A - const to A + (-const). */
7663 if (GET_CODE (op1) == CONST_INT)
7664 {
7665 op1 = negate_rtx (mode, op1);
7666 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
7667 }
7668
7669 goto binop2;
7670
7671 case MULT_EXPR:
7672 /* If first operand is constant, swap them.
7673 Thus the following special case checks need only
7674 check the second operand. */
7675 if (TREE_CODE (TREE_OPERAND (exp, 0)) == INTEGER_CST)
7676 {
7677 tree t1 = TREE_OPERAND (exp, 0);
7678 TREE_OPERAND (exp, 0) = TREE_OPERAND (exp, 1);
7679 TREE_OPERAND (exp, 1) = t1;
7680 }
7681
7682 /* Attempt to return something suitable for generating an
7683 indexed address, for machines that support that. */
7684
7685 if (modifier == EXPAND_SUM && mode == ptr_mode
7686 && host_integerp (TREE_OPERAND (exp, 1), 0))
7687 {
7688 tree exp1 = TREE_OPERAND (exp, 1);
7689
7690 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode,
7691 EXPAND_SUM);
7692
7693 if (!REG_P (op0))
7694 op0 = force_operand (op0, NULL_RTX);
7695 if (!REG_P (op0))
7696 op0 = copy_to_mode_reg (mode, op0);
7697
7698 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
7699 gen_int_mode (tree_low_cst (exp1, 0),
7700 TYPE_MODE (TREE_TYPE (exp1)))));
7701 }
7702
7703 if (modifier == EXPAND_STACK_PARM)
7704 target = 0;
7705
7706 /* Check for multiplying things that have been extended
7707 from a narrower type. If this machine supports multiplying
7708 in that narrower type with a result in the desired type,
7709 do it that way, and avoid the explicit type-conversion. */
7710 if (TREE_CODE (TREE_OPERAND (exp, 0)) == NOP_EXPR
7711 && TREE_CODE (type) == INTEGER_TYPE
7712 && (TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
7713 < TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (exp, 0))))
7714 && ((TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST
7715 && int_fits_type_p (TREE_OPERAND (exp, 1),
7716 TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)))
7717 /* Don't use a widening multiply if a shift will do. */
7718 && ((GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 1))))
7719 > HOST_BITS_PER_WIDE_INT)
7720 || exact_log2 (TREE_INT_CST_LOW (TREE_OPERAND (exp, 1))) < 0))
7721 ||
7722 (TREE_CODE (TREE_OPERAND (exp, 1)) == NOP_EXPR
7723 && (TYPE_PRECISION (TREE_TYPE
7724 (TREE_OPERAND (TREE_OPERAND (exp, 1), 0)))
7725 == TYPE_PRECISION (TREE_TYPE
7726 (TREE_OPERAND
7727 (TREE_OPERAND (exp, 0), 0))))
7728 /* If both operands are extended, they must either both
7729 be zero-extended or both be sign-extended. */
7730 && (TYPE_UNSIGNED (TREE_TYPE
7731 (TREE_OPERAND (TREE_OPERAND (exp, 1), 0)))
7732 == TYPE_UNSIGNED (TREE_TYPE
7733 (TREE_OPERAND
7734 (TREE_OPERAND (exp, 0), 0)))))))
7735 {
7736 tree op0type = TREE_TYPE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0));
7737 enum machine_mode innermode = TYPE_MODE (op0type);
7738 bool zextend_p = TYPE_UNSIGNED (op0type);
7739 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
7740 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
7741
7742 if (mode == GET_MODE_WIDER_MODE (innermode))
7743 {
7744 if (this_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing)
7745 {
7746 if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST)
7747 expand_operands (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
7748 TREE_OPERAND (exp, 1),
7749 NULL_RTX, &op0, &op1, 0);
7750 else
7751 expand_operands (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
7752 TREE_OPERAND (TREE_OPERAND (exp, 1), 0),
7753 NULL_RTX, &op0, &op1, 0);
7754 goto binop3;
7755 }
7756 else if (other_optab->handlers[(int) mode].insn_code != CODE_FOR_nothing
7757 && innermode == word_mode)
7758 {
7759 rtx htem, hipart;
7760 op0 = expand_expr (TREE_OPERAND (TREE_OPERAND (exp, 0), 0),
7761 NULL_RTX, VOIDmode, 0);
7762 if (TREE_CODE (TREE_OPERAND (exp, 1)) == INTEGER_CST)
7763 op1 = convert_modes (innermode, mode,
7764 expand_expr (TREE_OPERAND (exp, 1),
7765 NULL_RTX, VOIDmode, 0),
7766 unsignedp);
7767 else
7768 op1 = expand_expr (TREE_OPERAND (TREE_OPERAND (exp, 1), 0),
7769 NULL_RTX, VOIDmode, 0);
7770 temp = expand_binop (mode, other_optab, op0, op1, target,
7771 unsignedp, OPTAB_LIB_WIDEN);
7772 hipart = gen_highpart (innermode, temp);
7773 htem = expand_mult_highpart_adjust (innermode, hipart,
7774 op0, op1, hipart,
7775 zextend_p);
7776 if (htem != hipart)
7777 emit_move_insn (hipart, htem);
7778 return REDUCE_BIT_FIELD (temp);
7779 }
7780 }
7781 }
7782 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7783 subtarget, &op0, &op1, 0);
7784 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
7785
7786 case TRUNC_DIV_EXPR:
7787 case FLOOR_DIV_EXPR:
7788 case CEIL_DIV_EXPR:
7789 case ROUND_DIV_EXPR:
7790 case EXACT_DIV_EXPR:
7791 if (modifier == EXPAND_STACK_PARM)
7792 target = 0;
7793 /* Possible optimization: compute the dividend with EXPAND_SUM
7794 then if the divisor is constant can optimize the case
7795 where some terms of the dividend have coeffs divisible by it. */
7796 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7797 subtarget, &op0, &op1, 0);
7798 return expand_divmod (0, code, mode, op0, op1, target, unsignedp);
7799
7800 case RDIV_EXPR:
7801 /* Emit a/b as a*(1/b). Later we may manage CSE the reciprocal saving
7802 expensive divide. If not, combine will rebuild the original
7803 computation. */
7804 if (flag_unsafe_math_optimizations && optimize && !optimize_size
7805 && TREE_CODE (type) == REAL_TYPE
7806 && !real_onep (TREE_OPERAND (exp, 0)))
7807 return expand_expr (build2 (MULT_EXPR, type, TREE_OPERAND (exp, 0),
7808 build2 (RDIV_EXPR, type,
7809 build_real (type, dconst1),
7810 TREE_OPERAND (exp, 1))),
7811 target, tmode, modifier);
7812
7813 goto binop;
7814
7815 case TRUNC_MOD_EXPR:
7816 case FLOOR_MOD_EXPR:
7817 case CEIL_MOD_EXPR:
7818 case ROUND_MOD_EXPR:
7819 if (modifier == EXPAND_STACK_PARM)
7820 target = 0;
7821 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7822 subtarget, &op0, &op1, 0);
7823 return expand_divmod (1, code, mode, op0, op1, target, unsignedp);
7824
7825 case FIX_ROUND_EXPR:
7826 case FIX_FLOOR_EXPR:
7827 case FIX_CEIL_EXPR:
7828 gcc_unreachable (); /* Not used for C. */
7829
7830 case FIX_TRUNC_EXPR:
7831 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, VOIDmode, 0);
7832 if (target == 0 || modifier == EXPAND_STACK_PARM)
7833 target = gen_reg_rtx (mode);
7834 expand_fix (target, op0, unsignedp);
7835 return target;
7836
7837 case FLOAT_EXPR:
7838 op0 = expand_expr (TREE_OPERAND (exp, 0), NULL_RTX, VOIDmode, 0);
7839 if (target == 0 || modifier == EXPAND_STACK_PARM)
7840 target = gen_reg_rtx (mode);
7841 /* expand_float can't figure out what to do if FROM has VOIDmode.
7842 So give it the correct mode. With -O, cse will optimize this. */
7843 if (GET_MODE (op0) == VOIDmode)
7844 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))),
7845 op0);
7846 expand_float (target, op0,
7847 TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))));
7848 return target;
7849
7850 case NEGATE_EXPR:
7851 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
7852 if (modifier == EXPAND_STACK_PARM)
7853 target = 0;
7854 temp = expand_unop (mode,
7855 optab_for_tree_code (NEGATE_EXPR, type),
7856 op0, target, 0);
7857 gcc_assert (temp);
7858 return REDUCE_BIT_FIELD (temp);
7859
7860 case ABS_EXPR:
7861 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
7862 if (modifier == EXPAND_STACK_PARM)
7863 target = 0;
7864
7865 /* ABS_EXPR is not valid for complex arguments. */
7866 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
7867 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
7868
7869 /* Unsigned abs is simply the operand. Testing here means we don't
7870 risk generating incorrect code below. */
7871 if (TYPE_UNSIGNED (type))
7872 return op0;
7873
7874 return expand_abs (mode, op0, target, unsignedp,
7875 safe_from_p (target, TREE_OPERAND (exp, 0), 1));
7876
7877 case MAX_EXPR:
7878 case MIN_EXPR:
7879 target = original_target;
7880 if (target == 0
7881 || modifier == EXPAND_STACK_PARM
7882 || (MEM_P (target) && MEM_VOLATILE_P (target))
7883 || GET_MODE (target) != mode
7884 || (REG_P (target)
7885 && REGNO (target) < FIRST_PSEUDO_REGISTER))
7886 target = gen_reg_rtx (mode);
7887 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
7888 target, &op0, &op1, 0);
7889
7890 /* First try to do it with a special MIN or MAX instruction.
7891 If that does not win, use a conditional jump to select the proper
7892 value. */
7893 this_optab = optab_for_tree_code (code, type);
7894 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
7895 OPTAB_WIDEN);
7896 if (temp != 0)
7897 return temp;
7898
7899 /* At this point, a MEM target is no longer useful; we will get better
7900 code without it. */
7901
7902 if (! REG_P (target))
7903 target = gen_reg_rtx (mode);
7904
7905 /* If op1 was placed in target, swap op0 and op1. */
7906 if (target != op0 && target == op1)
7907 {
7908 temp = op0;
7909 op0 = op1;
7910 op1 = temp;
7911 }
7912
7913 /* We generate better code and avoid problems with op1 mentioning
7914 target by forcing op1 into a pseudo if it isn't a constant. */
7915 if (! CONSTANT_P (op1))
7916 op1 = force_reg (mode, op1);
7917
7918 #ifdef HAVE_conditional_move
7919 /* Use a conditional move if possible. */
7920 if (can_conditionally_move_p (mode))
7921 {
7922 enum rtx_code comparison_code;
7923 rtx insn;
7924
7925 if (code == MAX_EXPR)
7926 comparison_code = unsignedp ? GEU : GE;
7927 else
7928 comparison_code = unsignedp ? LEU : LE;
7929
7930 /* ??? Same problem as in expmed.c: emit_conditional_move
7931 forces a stack adjustment via compare_from_rtx, and we
7932 lose the stack adjustment if the sequence we are about
7933 to create is discarded. */
7934 do_pending_stack_adjust ();
7935
7936 start_sequence ();
7937
7938 /* Try to emit the conditional move. */
7939 insn = emit_conditional_move (target, comparison_code,
7940 op0, op1, mode,
7941 op0, op1, mode,
7942 unsignedp);
7943
7944 /* If we could do the conditional move, emit the sequence,
7945 and return. */
7946 if (insn)
7947 {
7948 rtx seq = get_insns ();
7949 end_sequence ();
7950 emit_insn (seq);
7951 return target;
7952 }
7953
7954 /* Otherwise discard the sequence and fall back to code with
7955 branches. */
7956 end_sequence ();
7957 }
7958 #endif
7959 if (target != op0)
7960 emit_move_insn (target, op0);
7961
7962 temp = gen_label_rtx ();
7963
7964 /* If this mode is an integer too wide to compare properly,
7965 compare word by word. Rely on cse to optimize constant cases. */
7966 if (GET_MODE_CLASS (mode) == MODE_INT
7967 && ! can_compare_p (GE, mode, ccp_jump))
7968 {
7969 if (code == MAX_EXPR)
7970 do_jump_by_parts_greater_rtx (mode, unsignedp, target, op1,
7971 NULL_RTX, temp);
7972 else
7973 do_jump_by_parts_greater_rtx (mode, unsignedp, op1, target,
7974 NULL_RTX, temp);
7975 }
7976 else
7977 {
7978 do_compare_rtx_and_jump (target, op1, code == MAX_EXPR ? GE : LE,
7979 unsignedp, mode, NULL_RTX, NULL_RTX, temp);
7980 }
7981 emit_move_insn (target, op1);
7982 emit_label (temp);
7983 return target;
7984
7985 case BIT_NOT_EXPR:
7986 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
7987 if (modifier == EXPAND_STACK_PARM)
7988 target = 0;
7989 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
7990 gcc_assert (temp);
7991 return temp;
7992
7993 /* ??? Can optimize bitwise operations with one arg constant.
7994 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
7995 and (a bitwise1 b) bitwise2 b (etc)
7996 but that is probably not worth while. */
7997
7998 /* BIT_AND_EXPR is for bitwise anding. TRUTH_AND_EXPR is for anding two
7999 boolean values when we want in all cases to compute both of them. In
8000 general it is fastest to do TRUTH_AND_EXPR by computing both operands
8001 as actual zero-or-1 values and then bitwise anding. In cases where
8002 there cannot be any side effects, better code would be made by
8003 treating TRUTH_AND_EXPR like TRUTH_ANDIF_EXPR; but the question is
8004 how to recognize those cases. */
8005
8006 case TRUTH_AND_EXPR:
8007 code = BIT_AND_EXPR;
8008 case BIT_AND_EXPR:
8009 goto binop;
8010
8011 case TRUTH_OR_EXPR:
8012 code = BIT_IOR_EXPR;
8013 case BIT_IOR_EXPR:
8014 goto binop;
8015
8016 case TRUTH_XOR_EXPR:
8017 code = BIT_XOR_EXPR;
8018 case BIT_XOR_EXPR:
8019 goto binop;
8020
8021 case LSHIFT_EXPR:
8022 case RSHIFT_EXPR:
8023 case LROTATE_EXPR:
8024 case RROTATE_EXPR:
8025 if (! safe_from_p (subtarget, TREE_OPERAND (exp, 1), 1))
8026 subtarget = 0;
8027 if (modifier == EXPAND_STACK_PARM)
8028 target = 0;
8029 op0 = expand_expr (TREE_OPERAND (exp, 0), subtarget, VOIDmode, 0);
8030 return expand_shift (code, mode, op0, TREE_OPERAND (exp, 1), target,
8031 unsignedp);
8032
8033 /* Could determine the answer when only additive constants differ. Also,
8034 the addition of one can be handled by changing the condition. */
8035 case LT_EXPR:
8036 case LE_EXPR:
8037 case GT_EXPR:
8038 case GE_EXPR:
8039 case EQ_EXPR:
8040 case NE_EXPR:
8041 case UNORDERED_EXPR:
8042 case ORDERED_EXPR:
8043 case UNLT_EXPR:
8044 case UNLE_EXPR:
8045 case UNGT_EXPR:
8046 case UNGE_EXPR:
8047 case UNEQ_EXPR:
8048 case LTGT_EXPR:
8049 temp = do_store_flag (exp,
8050 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
8051 tmode != VOIDmode ? tmode : mode, 0);
8052 if (temp != 0)
8053 return temp;
8054
8055 /* For foo != 0, load foo, and if it is nonzero load 1 instead. */
8056 if (code == NE_EXPR && integer_zerop (TREE_OPERAND (exp, 1))
8057 && original_target
8058 && REG_P (original_target)
8059 && (GET_MODE (original_target)
8060 == TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))))
8061 {
8062 temp = expand_expr (TREE_OPERAND (exp, 0), original_target,
8063 VOIDmode, 0);
8064
8065 /* If temp is constant, we can just compute the result. */
8066 if (GET_CODE (temp) == CONST_INT)
8067 {
8068 if (INTVAL (temp) != 0)
8069 emit_move_insn (target, const1_rtx);
8070 else
8071 emit_move_insn (target, const0_rtx);
8072
8073 return target;
8074 }
8075
8076 if (temp != original_target)
8077 {
8078 enum machine_mode mode1 = GET_MODE (temp);
8079 if (mode1 == VOIDmode)
8080 mode1 = tmode != VOIDmode ? tmode : mode;
8081
8082 temp = copy_to_mode_reg (mode1, temp);
8083 }
8084
8085 op1 = gen_label_rtx ();
8086 emit_cmp_and_jump_insns (temp, const0_rtx, EQ, NULL_RTX,
8087 GET_MODE (temp), unsignedp, op1);
8088 emit_move_insn (temp, const1_rtx);
8089 emit_label (op1);
8090 return temp;
8091 }
8092
8093 /* If no set-flag instruction, must generate a conditional store
8094 into a temporary variable. Drop through and handle this
8095 like && and ||. */
8096
8097 if (! ignore
8098 && (target == 0
8099 || modifier == EXPAND_STACK_PARM
8100 || ! safe_from_p (target, exp, 1)
8101 /* Make sure we don't have a hard reg (such as function's return
8102 value) live across basic blocks, if not optimizing. */
8103 || (!optimize && REG_P (target)
8104 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
8105 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
8106
8107 if (target)
8108 emit_move_insn (target, const0_rtx);
8109
8110 op1 = gen_label_rtx ();
8111 jumpifnot (exp, op1);
8112
8113 if (target)
8114 emit_move_insn (target, const1_rtx);
8115
8116 emit_label (op1);
8117 return ignore ? const0_rtx : target;
8118
8119 case TRUTH_NOT_EXPR:
8120 if (modifier == EXPAND_STACK_PARM)
8121 target = 0;
8122 op0 = expand_expr (TREE_OPERAND (exp, 0), target, VOIDmode, 0);
8123 /* The parser is careful to generate TRUTH_NOT_EXPR
8124 only with operands that are always zero or one. */
8125 temp = expand_binop (mode, xor_optab, op0, const1_rtx,
8126 target, 1, OPTAB_LIB_WIDEN);
8127 gcc_assert (temp);
8128 return temp;
8129
8130 case STATEMENT_LIST:
8131 {
8132 tree_stmt_iterator iter;
8133
8134 gcc_assert (ignore);
8135
8136 for (iter = tsi_start (exp); !tsi_end_p (iter); tsi_next (&iter))
8137 expand_expr (tsi_stmt (iter), const0_rtx, VOIDmode, modifier);
8138 }
8139 return const0_rtx;
8140
8141 case COND_EXPR:
8142 /* A COND_EXPR with its type being VOID_TYPE represents a
8143 conditional jump and is handled in
8144 expand_gimple_cond_expr. */
8145 gcc_assert (!VOID_TYPE_P (TREE_TYPE (exp)));
8146
8147 /* Note that COND_EXPRs whose type is a structure or union
8148 are required to be constructed to contain assignments of
8149 a temporary variable, so that we can evaluate them here
8150 for side effect only. If type is void, we must do likewise. */
8151
8152 gcc_assert (!TREE_ADDRESSABLE (type)
8153 && !ignore
8154 && TREE_TYPE (TREE_OPERAND (exp, 1)) != void_type_node
8155 && TREE_TYPE (TREE_OPERAND (exp, 2)) != void_type_node);
8156
8157 /* If we are not to produce a result, we have no target. Otherwise,
8158 if a target was specified use it; it will not be used as an
8159 intermediate target unless it is safe. If no target, use a
8160 temporary. */
8161
8162 if (modifier != EXPAND_STACK_PARM
8163 && original_target
8164 && safe_from_p (original_target, TREE_OPERAND (exp, 0), 1)
8165 && GET_MODE (original_target) == mode
8166 #ifdef HAVE_conditional_move
8167 && (! can_conditionally_move_p (mode)
8168 || REG_P (original_target))
8169 #endif
8170 && !MEM_P (original_target))
8171 temp = original_target;
8172 else
8173 temp = assign_temp (type, 0, 0, 1);
8174
8175 do_pending_stack_adjust ();
8176 NO_DEFER_POP;
8177 op0 = gen_label_rtx ();
8178 op1 = gen_label_rtx ();
8179 jumpifnot (TREE_OPERAND (exp, 0), op0);
8180 store_expr (TREE_OPERAND (exp, 1), temp,
8181 modifier == EXPAND_STACK_PARM);
8182
8183 emit_jump_insn (gen_jump (op1));
8184 emit_barrier ();
8185 emit_label (op0);
8186 store_expr (TREE_OPERAND (exp, 2), temp,
8187 modifier == EXPAND_STACK_PARM);
8188
8189 emit_label (op1);
8190 OK_DEFER_POP;
8191 return temp;
8192
8193 case VEC_COND_EXPR:
8194 target = expand_vec_cond_expr (exp, target);
8195 return target;
8196
8197 case MODIFY_EXPR:
8198 {
8199 tree lhs = TREE_OPERAND (exp, 0);
8200 tree rhs = TREE_OPERAND (exp, 1);
8201
8202 gcc_assert (ignore);
8203
8204 /* Check for |= or &= of a bitfield of size one into another bitfield
8205 of size 1. In this case, (unless we need the result of the
8206 assignment) we can do this more efficiently with a
8207 test followed by an assignment, if necessary.
8208
8209 ??? At this point, we can't get a BIT_FIELD_REF here. But if
8210 things change so we do, this code should be enhanced to
8211 support it. */
8212 if (TREE_CODE (lhs) == COMPONENT_REF
8213 && (TREE_CODE (rhs) == BIT_IOR_EXPR
8214 || TREE_CODE (rhs) == BIT_AND_EXPR)
8215 && TREE_OPERAND (rhs, 0) == lhs
8216 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
8217 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
8218 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
8219 {
8220 rtx label = gen_label_rtx ();
8221
8222 do_jump (TREE_OPERAND (rhs, 1),
8223 TREE_CODE (rhs) == BIT_IOR_EXPR ? label : 0,
8224 TREE_CODE (rhs) == BIT_AND_EXPR ? label : 0);
8225 expand_assignment (lhs, convert (TREE_TYPE (rhs),
8226 (TREE_CODE (rhs) == BIT_IOR_EXPR
8227 ? integer_one_node
8228 : integer_zero_node)));
8229 do_pending_stack_adjust ();
8230 emit_label (label);
8231 return const0_rtx;
8232 }
8233
8234 expand_assignment (lhs, rhs);
8235
8236 return const0_rtx;
8237 }
8238
8239 case RETURN_EXPR:
8240 if (!TREE_OPERAND (exp, 0))
8241 expand_null_return ();
8242 else
8243 expand_return (TREE_OPERAND (exp, 0));
8244 return const0_rtx;
8245
8246 case ADDR_EXPR:
8247 return expand_expr_addr_expr (exp, target, tmode, modifier);
8248
8249 case COMPLEX_EXPR:
8250 /* Get the rtx code of the operands. */
8251 op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0);
8252 op1 = expand_expr (TREE_OPERAND (exp, 1), 0, VOIDmode, 0);
8253
8254 if (!target)
8255 target = gen_reg_rtx (TYPE_MODE (TREE_TYPE (exp)));
8256
8257 /* Move the real (op0) and imaginary (op1) parts to their location. */
8258 write_complex_part (target, op0, false);
8259 write_complex_part (target, op1, true);
8260
8261 return target;
8262
8263 case REALPART_EXPR:
8264 op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0);
8265 return read_complex_part (op0, false);
8266
8267 case IMAGPART_EXPR:
8268 op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0);
8269 return read_complex_part (op0, true);
8270
8271 case RESX_EXPR:
8272 expand_resx_expr (exp);
8273 return const0_rtx;
8274
8275 case TRY_CATCH_EXPR:
8276 case CATCH_EXPR:
8277 case EH_FILTER_EXPR:
8278 case TRY_FINALLY_EXPR:
8279 /* Lowered by tree-eh.c. */
8280 gcc_unreachable ();
8281
8282 case WITH_CLEANUP_EXPR:
8283 case CLEANUP_POINT_EXPR:
8284 case TARGET_EXPR:
8285 case CASE_LABEL_EXPR:
8286 case VA_ARG_EXPR:
8287 case BIND_EXPR:
8288 case INIT_EXPR:
8289 case CONJ_EXPR:
8290 case COMPOUND_EXPR:
8291 case PREINCREMENT_EXPR:
8292 case PREDECREMENT_EXPR:
8293 case POSTINCREMENT_EXPR:
8294 case POSTDECREMENT_EXPR:
8295 case LOOP_EXPR:
8296 case EXIT_EXPR:
8297 case TRUTH_ANDIF_EXPR:
8298 case TRUTH_ORIF_EXPR:
8299 /* Lowered by gimplify.c. */
8300 gcc_unreachable ();
8301
8302 case EXC_PTR_EXPR:
8303 return get_exception_pointer (cfun);
8304
8305 case FILTER_EXPR:
8306 return get_exception_filter (cfun);
8307
8308 case FDESC_EXPR:
8309 /* Function descriptors are not valid except for as
8310 initialization constants, and should not be expanded. */
8311 gcc_unreachable ();
8312
8313 case SWITCH_EXPR:
8314 expand_case (exp);
8315 return const0_rtx;
8316
8317 case LABEL_EXPR:
8318 expand_label (TREE_OPERAND (exp, 0));
8319 return const0_rtx;
8320
8321 case ASM_EXPR:
8322 expand_asm_expr (exp);
8323 return const0_rtx;
8324
8325 case WITH_SIZE_EXPR:
8326 /* WITH_SIZE_EXPR expands to its first argument. The caller should
8327 have pulled out the size to use in whatever context it needed. */
8328 return expand_expr_real (TREE_OPERAND (exp, 0), original_target, tmode,
8329 modifier, alt_rtl);
8330
8331 case REALIGN_LOAD_EXPR:
8332 {
8333 tree oprnd0 = TREE_OPERAND (exp, 0);
8334 tree oprnd1 = TREE_OPERAND (exp, 1);
8335 tree oprnd2 = TREE_OPERAND (exp, 2);
8336 rtx op2;
8337
8338 this_optab = optab_for_tree_code (code, type);
8339 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, 0);
8340 op2 = expand_expr (oprnd2, NULL_RTX, VOIDmode, 0);
8341 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
8342 target, unsignedp);
8343 if (temp == 0)
8344 abort ();
8345 return temp;
8346 }
8347
8348
8349 default:
8350 return lang_hooks.expand_expr (exp, original_target, tmode,
8351 modifier, alt_rtl);
8352 }
8353
8354 /* Here to do an ordinary binary operator. */
8355 binop:
8356 expand_operands (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1),
8357 subtarget, &op0, &op1, 0);
8358 binop2:
8359 this_optab = optab_for_tree_code (code, type);
8360 binop3:
8361 if (modifier == EXPAND_STACK_PARM)
8362 target = 0;
8363 temp = expand_binop (mode, this_optab, op0, op1, target,
8364 unsignedp, OPTAB_LIB_WIDEN);
8365 gcc_assert (temp);
8366 return REDUCE_BIT_FIELD (temp);
8367 }
8368 #undef REDUCE_BIT_FIELD
8369 \f
8370 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
8371 signedness of TYPE), possibly returning the result in TARGET. */
8372 static rtx
8373 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
8374 {
8375 HOST_WIDE_INT prec = TYPE_PRECISION (type);
8376 if (target && GET_MODE (target) != GET_MODE (exp))
8377 target = 0;
8378 if (TYPE_UNSIGNED (type))
8379 {
8380 rtx mask;
8381 if (prec < HOST_BITS_PER_WIDE_INT)
8382 mask = immed_double_const (((unsigned HOST_WIDE_INT) 1 << prec) - 1, 0,
8383 GET_MODE (exp));
8384 else
8385 mask = immed_double_const ((unsigned HOST_WIDE_INT) -1,
8386 ((unsigned HOST_WIDE_INT) 1
8387 << (prec - HOST_BITS_PER_WIDE_INT)) - 1,
8388 GET_MODE (exp));
8389 return expand_and (GET_MODE (exp), exp, mask, target);
8390 }
8391 else
8392 {
8393 tree count = build_int_cst (NULL_TREE,
8394 GET_MODE_BITSIZE (GET_MODE (exp)) - prec);
8395 exp = expand_shift (LSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
8396 return expand_shift (RSHIFT_EXPR, GET_MODE (exp), exp, count, target, 0);
8397 }
8398 }
8399 \f
8400 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
8401 when applied to the address of EXP produces an address known to be
8402 aligned more than BIGGEST_ALIGNMENT. */
8403
8404 static int
8405 is_aligning_offset (tree offset, tree exp)
8406 {
8407 /* Strip off any conversions. */
8408 while (TREE_CODE (offset) == NON_LVALUE_EXPR
8409 || TREE_CODE (offset) == NOP_EXPR
8410 || TREE_CODE (offset) == CONVERT_EXPR)
8411 offset = TREE_OPERAND (offset, 0);
8412
8413 /* We must now have a BIT_AND_EXPR with a constant that is one less than
8414 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
8415 if (TREE_CODE (offset) != BIT_AND_EXPR
8416 || !host_integerp (TREE_OPERAND (offset, 1), 1)
8417 || compare_tree_int (TREE_OPERAND (offset, 1),
8418 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
8419 || !exact_log2 (tree_low_cst (TREE_OPERAND (offset, 1), 1) + 1) < 0)
8420 return 0;
8421
8422 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
8423 It must be NEGATE_EXPR. Then strip any more conversions. */
8424 offset = TREE_OPERAND (offset, 0);
8425 while (TREE_CODE (offset) == NON_LVALUE_EXPR
8426 || TREE_CODE (offset) == NOP_EXPR
8427 || TREE_CODE (offset) == CONVERT_EXPR)
8428 offset = TREE_OPERAND (offset, 0);
8429
8430 if (TREE_CODE (offset) != NEGATE_EXPR)
8431 return 0;
8432
8433 offset = TREE_OPERAND (offset, 0);
8434 while (TREE_CODE (offset) == NON_LVALUE_EXPR
8435 || TREE_CODE (offset) == NOP_EXPR
8436 || TREE_CODE (offset) == CONVERT_EXPR)
8437 offset = TREE_OPERAND (offset, 0);
8438
8439 /* This must now be the address of EXP. */
8440 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
8441 }
8442 \f
8443 /* Return the tree node if an ARG corresponds to a string constant or zero
8444 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
8445 in bytes within the string that ARG is accessing. The type of the
8446 offset will be `sizetype'. */
8447
8448 tree
8449 string_constant (tree arg, tree *ptr_offset)
8450 {
8451 tree array, offset;
8452 STRIP_NOPS (arg);
8453
8454 if (TREE_CODE (arg) == ADDR_EXPR)
8455 {
8456 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
8457 {
8458 *ptr_offset = size_zero_node;
8459 return TREE_OPERAND (arg, 0);
8460 }
8461 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
8462 {
8463 array = TREE_OPERAND (arg, 0);
8464 offset = size_zero_node;
8465 }
8466 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
8467 {
8468 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
8469 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
8470 if (TREE_CODE (array) != STRING_CST
8471 && TREE_CODE (array) != VAR_DECL)
8472 return 0;
8473 }
8474 else
8475 return 0;
8476 }
8477 else if (TREE_CODE (arg) == PLUS_EXPR)
8478 {
8479 tree arg0 = TREE_OPERAND (arg, 0);
8480 tree arg1 = TREE_OPERAND (arg, 1);
8481
8482 STRIP_NOPS (arg0);
8483 STRIP_NOPS (arg1);
8484
8485 if (TREE_CODE (arg0) == ADDR_EXPR
8486 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
8487 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
8488 {
8489 array = TREE_OPERAND (arg0, 0);
8490 offset = arg1;
8491 }
8492 else if (TREE_CODE (arg1) == ADDR_EXPR
8493 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
8494 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
8495 {
8496 array = TREE_OPERAND (arg1, 0);
8497 offset = arg0;
8498 }
8499 else
8500 return 0;
8501 }
8502 else
8503 return 0;
8504
8505 if (TREE_CODE (array) == STRING_CST)
8506 {
8507 *ptr_offset = convert (sizetype, offset);
8508 return array;
8509 }
8510 else if (TREE_CODE (array) == VAR_DECL)
8511 {
8512 int length;
8513
8514 /* Variables initialized to string literals can be handled too. */
8515 if (DECL_INITIAL (array) == NULL_TREE
8516 || TREE_CODE (DECL_INITIAL (array)) != STRING_CST)
8517 return 0;
8518
8519 /* If they are read-only, non-volatile and bind locally. */
8520 if (! TREE_READONLY (array)
8521 || TREE_SIDE_EFFECTS (array)
8522 || ! targetm.binds_local_p (array))
8523 return 0;
8524
8525 /* Avoid const char foo[4] = "abcde"; */
8526 if (DECL_SIZE_UNIT (array) == NULL_TREE
8527 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
8528 || (length = TREE_STRING_LENGTH (DECL_INITIAL (array))) <= 0
8529 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
8530 return 0;
8531
8532 /* If variable is bigger than the string literal, OFFSET must be constant
8533 and inside of the bounds of the string literal. */
8534 offset = convert (sizetype, offset);
8535 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
8536 && (! host_integerp (offset, 1)
8537 || compare_tree_int (offset, length) >= 0))
8538 return 0;
8539
8540 *ptr_offset = offset;
8541 return DECL_INITIAL (array);
8542 }
8543
8544 return 0;
8545 }
8546 \f
8547 /* Generate code to calculate EXP using a store-flag instruction
8548 and return an rtx for the result. EXP is either a comparison
8549 or a TRUTH_NOT_EXPR whose operand is a comparison.
8550
8551 If TARGET is nonzero, store the result there if convenient.
8552
8553 If ONLY_CHEAP is nonzero, only do this if it is likely to be very
8554 cheap.
8555
8556 Return zero if there is no suitable set-flag instruction
8557 available on this machine.
8558
8559 Once expand_expr has been called on the arguments of the comparison,
8560 we are committed to doing the store flag, since it is not safe to
8561 re-evaluate the expression. We emit the store-flag insn by calling
8562 emit_store_flag, but only expand the arguments if we have a reason
8563 to believe that emit_store_flag will be successful. If we think that
8564 it will, but it isn't, we have to simulate the store-flag with a
8565 set/jump/set sequence. */
8566
8567 static rtx
8568 do_store_flag (tree exp, rtx target, enum machine_mode mode, int only_cheap)
8569 {
8570 enum rtx_code code;
8571 tree arg0, arg1, type;
8572 tree tem;
8573 enum machine_mode operand_mode;
8574 int invert = 0;
8575 int unsignedp;
8576 rtx op0, op1;
8577 enum insn_code icode;
8578 rtx subtarget = target;
8579 rtx result, label;
8580
8581 /* If this is a TRUTH_NOT_EXPR, set a flag indicating we must invert the
8582 result at the end. We can't simply invert the test since it would
8583 have already been inverted if it were valid. This case occurs for
8584 some floating-point comparisons. */
8585
8586 if (TREE_CODE (exp) == TRUTH_NOT_EXPR)
8587 invert = 1, exp = TREE_OPERAND (exp, 0);
8588
8589 arg0 = TREE_OPERAND (exp, 0);
8590 arg1 = TREE_OPERAND (exp, 1);
8591
8592 /* Don't crash if the comparison was erroneous. */
8593 if (arg0 == error_mark_node || arg1 == error_mark_node)
8594 return const0_rtx;
8595
8596 type = TREE_TYPE (arg0);
8597 operand_mode = TYPE_MODE (type);
8598 unsignedp = TYPE_UNSIGNED (type);
8599
8600 /* We won't bother with BLKmode store-flag operations because it would mean
8601 passing a lot of information to emit_store_flag. */
8602 if (operand_mode == BLKmode)
8603 return 0;
8604
8605 /* We won't bother with store-flag operations involving function pointers
8606 when function pointers must be canonicalized before comparisons. */
8607 #ifdef HAVE_canonicalize_funcptr_for_compare
8608 if (HAVE_canonicalize_funcptr_for_compare
8609 && ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == POINTER_TYPE
8610 && (TREE_CODE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))))
8611 == FUNCTION_TYPE))
8612 || (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 1))) == POINTER_TYPE
8613 && (TREE_CODE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 1))))
8614 == FUNCTION_TYPE))))
8615 return 0;
8616 #endif
8617
8618 STRIP_NOPS (arg0);
8619 STRIP_NOPS (arg1);
8620
8621 /* Get the rtx comparison code to use. We know that EXP is a comparison
8622 operation of some type. Some comparisons against 1 and -1 can be
8623 converted to comparisons with zero. Do so here so that the tests
8624 below will be aware that we have a comparison with zero. These
8625 tests will not catch constants in the first operand, but constants
8626 are rarely passed as the first operand. */
8627
8628 switch (TREE_CODE (exp))
8629 {
8630 case EQ_EXPR:
8631 code = EQ;
8632 break;
8633 case NE_EXPR:
8634 code = NE;
8635 break;
8636 case LT_EXPR:
8637 if (integer_onep (arg1))
8638 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
8639 else
8640 code = unsignedp ? LTU : LT;
8641 break;
8642 case LE_EXPR:
8643 if (! unsignedp && integer_all_onesp (arg1))
8644 arg1 = integer_zero_node, code = LT;
8645 else
8646 code = unsignedp ? LEU : LE;
8647 break;
8648 case GT_EXPR:
8649 if (! unsignedp && integer_all_onesp (arg1))
8650 arg1 = integer_zero_node, code = GE;
8651 else
8652 code = unsignedp ? GTU : GT;
8653 break;
8654 case GE_EXPR:
8655 if (integer_onep (arg1))
8656 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
8657 else
8658 code = unsignedp ? GEU : GE;
8659 break;
8660
8661 case UNORDERED_EXPR:
8662 code = UNORDERED;
8663 break;
8664 case ORDERED_EXPR:
8665 code = ORDERED;
8666 break;
8667 case UNLT_EXPR:
8668 code = UNLT;
8669 break;
8670 case UNLE_EXPR:
8671 code = UNLE;
8672 break;
8673 case UNGT_EXPR:
8674 code = UNGT;
8675 break;
8676 case UNGE_EXPR:
8677 code = UNGE;
8678 break;
8679 case UNEQ_EXPR:
8680 code = UNEQ;
8681 break;
8682 case LTGT_EXPR:
8683 code = LTGT;
8684 break;
8685
8686 default:
8687 gcc_unreachable ();
8688 }
8689
8690 /* Put a constant second. */
8691 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST)
8692 {
8693 tem = arg0; arg0 = arg1; arg1 = tem;
8694 code = swap_condition (code);
8695 }
8696
8697 /* If this is an equality or inequality test of a single bit, we can
8698 do this by shifting the bit being tested to the low-order bit and
8699 masking the result with the constant 1. If the condition was EQ,
8700 we xor it with 1. This does not require an scc insn and is faster
8701 than an scc insn even if we have it.
8702
8703 The code to make this transformation was moved into fold_single_bit_test,
8704 so we just call into the folder and expand its result. */
8705
8706 if ((code == NE || code == EQ)
8707 && TREE_CODE (arg0) == BIT_AND_EXPR && integer_zerop (arg1)
8708 && integer_pow2p (TREE_OPERAND (arg0, 1)))
8709 {
8710 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
8711 return expand_expr (fold_single_bit_test (code == NE ? NE_EXPR : EQ_EXPR,
8712 arg0, arg1, type),
8713 target, VOIDmode, EXPAND_NORMAL);
8714 }
8715
8716 /* Now see if we are likely to be able to do this. Return if not. */
8717 if (! can_compare_p (code, operand_mode, ccp_store_flag))
8718 return 0;
8719
8720 icode = setcc_gen_code[(int) code];
8721 if (icode == CODE_FOR_nothing
8722 || (only_cheap && insn_data[(int) icode].operand[0].mode != mode))
8723 {
8724 /* We can only do this if it is one of the special cases that
8725 can be handled without an scc insn. */
8726 if ((code == LT && integer_zerop (arg1))
8727 || (! only_cheap && code == GE && integer_zerop (arg1)))
8728 ;
8729 else if (BRANCH_COST >= 0
8730 && ! only_cheap && (code == NE || code == EQ)
8731 && TREE_CODE (type) != REAL_TYPE
8732 && ((abs_optab->handlers[(int) operand_mode].insn_code
8733 != CODE_FOR_nothing)
8734 || (ffs_optab->handlers[(int) operand_mode].insn_code
8735 != CODE_FOR_nothing)))
8736 ;
8737 else
8738 return 0;
8739 }
8740
8741 if (! get_subtarget (target)
8742 || GET_MODE (subtarget) != operand_mode)
8743 subtarget = 0;
8744
8745 expand_operands (arg0, arg1, subtarget, &op0, &op1, 0);
8746
8747 if (target == 0)
8748 target = gen_reg_rtx (mode);
8749
8750 result = emit_store_flag (target, code, op0, op1,
8751 operand_mode, unsignedp, 1);
8752
8753 if (result)
8754 {
8755 if (invert)
8756 result = expand_binop (mode, xor_optab, result, const1_rtx,
8757 result, 0, OPTAB_LIB_WIDEN);
8758 return result;
8759 }
8760
8761 /* If this failed, we have to do this with set/compare/jump/set code. */
8762 if (!REG_P (target)
8763 || reg_mentioned_p (target, op0) || reg_mentioned_p (target, op1))
8764 target = gen_reg_rtx (GET_MODE (target));
8765
8766 emit_move_insn (target, invert ? const0_rtx : const1_rtx);
8767 result = compare_from_rtx (op0, op1, code, unsignedp,
8768 operand_mode, NULL_RTX);
8769 if (GET_CODE (result) == CONST_INT)
8770 return (((result == const0_rtx && ! invert)
8771 || (result != const0_rtx && invert))
8772 ? const0_rtx : const1_rtx);
8773
8774 /* The code of RESULT may not match CODE if compare_from_rtx
8775 decided to swap its operands and reverse the original code.
8776
8777 We know that compare_from_rtx returns either a CONST_INT or
8778 a new comparison code, so it is safe to just extract the
8779 code from RESULT. */
8780 code = GET_CODE (result);
8781
8782 label = gen_label_rtx ();
8783 gcc_assert (bcc_gen_fctn[(int) code]);
8784
8785 emit_jump_insn ((*bcc_gen_fctn[(int) code]) (label));
8786 emit_move_insn (target, invert ? const1_rtx : const0_rtx);
8787 emit_label (label);
8788
8789 return target;
8790 }
8791 \f
8792
8793 /* Stubs in case we haven't got a casesi insn. */
8794 #ifndef HAVE_casesi
8795 # define HAVE_casesi 0
8796 # define gen_casesi(a, b, c, d, e) (0)
8797 # define CODE_FOR_casesi CODE_FOR_nothing
8798 #endif
8799
8800 /* If the machine does not have a case insn that compares the bounds,
8801 this means extra overhead for dispatch tables, which raises the
8802 threshold for using them. */
8803 #ifndef CASE_VALUES_THRESHOLD
8804 #define CASE_VALUES_THRESHOLD (HAVE_casesi ? 4 : 5)
8805 #endif /* CASE_VALUES_THRESHOLD */
8806
8807 unsigned int
8808 case_values_threshold (void)
8809 {
8810 return CASE_VALUES_THRESHOLD;
8811 }
8812
8813 /* Attempt to generate a casesi instruction. Returns 1 if successful,
8814 0 otherwise (i.e. if there is no casesi instruction). */
8815 int
8816 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
8817 rtx table_label ATTRIBUTE_UNUSED, rtx default_label)
8818 {
8819 enum machine_mode index_mode = SImode;
8820 int index_bits = GET_MODE_BITSIZE (index_mode);
8821 rtx op1, op2, index;
8822 enum machine_mode op_mode;
8823
8824 if (! HAVE_casesi)
8825 return 0;
8826
8827 /* Convert the index to SImode. */
8828 if (GET_MODE_BITSIZE (TYPE_MODE (index_type)) > GET_MODE_BITSIZE (index_mode))
8829 {
8830 enum machine_mode omode = TYPE_MODE (index_type);
8831 rtx rangertx = expand_expr (range, NULL_RTX, VOIDmode, 0);
8832
8833 /* We must handle the endpoints in the original mode. */
8834 index_expr = build2 (MINUS_EXPR, index_type,
8835 index_expr, minval);
8836 minval = integer_zero_node;
8837 index = expand_expr (index_expr, NULL_RTX, VOIDmode, 0);
8838 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
8839 omode, 1, default_label);
8840 /* Now we can safely truncate. */
8841 index = convert_to_mode (index_mode, index, 0);
8842 }
8843 else
8844 {
8845 if (TYPE_MODE (index_type) != index_mode)
8846 {
8847 index_expr = convert (lang_hooks.types.type_for_size
8848 (index_bits, 0), index_expr);
8849 index_type = TREE_TYPE (index_expr);
8850 }
8851
8852 index = expand_expr (index_expr, NULL_RTX, VOIDmode, 0);
8853 }
8854
8855 do_pending_stack_adjust ();
8856
8857 op_mode = insn_data[(int) CODE_FOR_casesi].operand[0].mode;
8858 if (! (*insn_data[(int) CODE_FOR_casesi].operand[0].predicate)
8859 (index, op_mode))
8860 index = copy_to_mode_reg (op_mode, index);
8861
8862 op1 = expand_expr (minval, NULL_RTX, VOIDmode, 0);
8863
8864 op_mode = insn_data[(int) CODE_FOR_casesi].operand[1].mode;
8865 op1 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (minval)),
8866 op1, TYPE_UNSIGNED (TREE_TYPE (minval)));
8867 if (! (*insn_data[(int) CODE_FOR_casesi].operand[1].predicate)
8868 (op1, op_mode))
8869 op1 = copy_to_mode_reg (op_mode, op1);
8870
8871 op2 = expand_expr (range, NULL_RTX, VOIDmode, 0);
8872
8873 op_mode = insn_data[(int) CODE_FOR_casesi].operand[2].mode;
8874 op2 = convert_modes (op_mode, TYPE_MODE (TREE_TYPE (range)),
8875 op2, TYPE_UNSIGNED (TREE_TYPE (range)));
8876 if (! (*insn_data[(int) CODE_FOR_casesi].operand[2].predicate)
8877 (op2, op_mode))
8878 op2 = copy_to_mode_reg (op_mode, op2);
8879
8880 emit_jump_insn (gen_casesi (index, op1, op2,
8881 table_label, default_label));
8882 return 1;
8883 }
8884
8885 /* Attempt to generate a tablejump instruction; same concept. */
8886 #ifndef HAVE_tablejump
8887 #define HAVE_tablejump 0
8888 #define gen_tablejump(x, y) (0)
8889 #endif
8890
8891 /* Subroutine of the next function.
8892
8893 INDEX is the value being switched on, with the lowest value
8894 in the table already subtracted.
8895 MODE is its expected mode (needed if INDEX is constant).
8896 RANGE is the length of the jump table.
8897 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
8898
8899 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
8900 index value is out of range. */
8901
8902 static void
8903 do_tablejump (rtx index, enum machine_mode mode, rtx range, rtx table_label,
8904 rtx default_label)
8905 {
8906 rtx temp, vector;
8907
8908 if (INTVAL (range) > cfun->max_jumptable_ents)
8909 cfun->max_jumptable_ents = INTVAL (range);
8910
8911 /* Do an unsigned comparison (in the proper mode) between the index
8912 expression and the value which represents the length of the range.
8913 Since we just finished subtracting the lower bound of the range
8914 from the index expression, this comparison allows us to simultaneously
8915 check that the original index expression value is both greater than
8916 or equal to the minimum value of the range and less than or equal to
8917 the maximum value of the range. */
8918
8919 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
8920 default_label);
8921
8922 /* If index is in range, it must fit in Pmode.
8923 Convert to Pmode so we can index with it. */
8924 if (mode != Pmode)
8925 index = convert_to_mode (Pmode, index, 1);
8926
8927 /* Don't let a MEM slip through, because then INDEX that comes
8928 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
8929 and break_out_memory_refs will go to work on it and mess it up. */
8930 #ifdef PIC_CASE_VECTOR_ADDRESS
8931 if (flag_pic && !REG_P (index))
8932 index = copy_to_mode_reg (Pmode, index);
8933 #endif
8934
8935 /* If flag_force_addr were to affect this address
8936 it could interfere with the tricky assumptions made
8937 about addresses that contain label-refs,
8938 which may be valid only very near the tablejump itself. */
8939 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
8940 GET_MODE_SIZE, because this indicates how large insns are. The other
8941 uses should all be Pmode, because they are addresses. This code
8942 could fail if addresses and insns are not the same size. */
8943 index = gen_rtx_PLUS (Pmode,
8944 gen_rtx_MULT (Pmode, index,
8945 GEN_INT (GET_MODE_SIZE (CASE_VECTOR_MODE))),
8946 gen_rtx_LABEL_REF (Pmode, table_label));
8947 #ifdef PIC_CASE_VECTOR_ADDRESS
8948 if (flag_pic)
8949 index = PIC_CASE_VECTOR_ADDRESS (index);
8950 else
8951 #endif
8952 index = memory_address_noforce (CASE_VECTOR_MODE, index);
8953 temp = gen_reg_rtx (CASE_VECTOR_MODE);
8954 vector = gen_const_mem (CASE_VECTOR_MODE, index);
8955 convert_move (temp, vector, 0);
8956
8957 emit_jump_insn (gen_tablejump (temp, table_label));
8958
8959 /* If we are generating PIC code or if the table is PC-relative, the
8960 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
8961 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
8962 emit_barrier ();
8963 }
8964
8965 int
8966 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
8967 rtx table_label, rtx default_label)
8968 {
8969 rtx index;
8970
8971 if (! HAVE_tablejump)
8972 return 0;
8973
8974 index_expr = fold (build2 (MINUS_EXPR, index_type,
8975 convert (index_type, index_expr),
8976 convert (index_type, minval)));
8977 index = expand_expr (index_expr, NULL_RTX, VOIDmode, 0);
8978 do_pending_stack_adjust ();
8979
8980 do_tablejump (index, TYPE_MODE (index_type),
8981 convert_modes (TYPE_MODE (index_type),
8982 TYPE_MODE (TREE_TYPE (range)),
8983 expand_expr (range, NULL_RTX,
8984 VOIDmode, 0),
8985 TYPE_UNSIGNED (TREE_TYPE (range))),
8986 table_label, default_label);
8987 return 1;
8988 }
8989
8990 /* Nonzero if the mode is a valid vector mode for this architecture.
8991 This returns nonzero even if there is no hardware support for the
8992 vector mode, but we can emulate with narrower modes. */
8993
8994 int
8995 vector_mode_valid_p (enum machine_mode mode)
8996 {
8997 enum mode_class class = GET_MODE_CLASS (mode);
8998 enum machine_mode innermode;
8999
9000 /* Doh! What's going on? */
9001 if (class != MODE_VECTOR_INT
9002 && class != MODE_VECTOR_FLOAT)
9003 return 0;
9004
9005 /* Hardware support. Woo hoo! */
9006 if (targetm.vector_mode_supported_p (mode))
9007 return 1;
9008
9009 innermode = GET_MODE_INNER (mode);
9010
9011 /* We should probably return 1 if requesting V4DI and we have no DI,
9012 but we have V2DI, but this is probably very unlikely. */
9013
9014 /* If we have support for the inner mode, we can safely emulate it.
9015 We may not have V2DI, but me can emulate with a pair of DIs. */
9016 return targetm.scalar_mode_supported_p (innermode);
9017 }
9018
9019 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
9020 static rtx
9021 const_vector_from_tree (tree exp)
9022 {
9023 rtvec v;
9024 int units, i;
9025 tree link, elt;
9026 enum machine_mode inner, mode;
9027
9028 mode = TYPE_MODE (TREE_TYPE (exp));
9029
9030 if (initializer_zerop (exp))
9031 return CONST0_RTX (mode);
9032
9033 units = GET_MODE_NUNITS (mode);
9034 inner = GET_MODE_INNER (mode);
9035
9036 v = rtvec_alloc (units);
9037
9038 link = TREE_VECTOR_CST_ELTS (exp);
9039 for (i = 0; link; link = TREE_CHAIN (link), ++i)
9040 {
9041 elt = TREE_VALUE (link);
9042
9043 if (TREE_CODE (elt) == REAL_CST)
9044 RTVEC_ELT (v, i) = CONST_DOUBLE_FROM_REAL_VALUE (TREE_REAL_CST (elt),
9045 inner);
9046 else
9047 RTVEC_ELT (v, i) = immed_double_const (TREE_INT_CST_LOW (elt),
9048 TREE_INT_CST_HIGH (elt),
9049 inner);
9050 }
9051
9052 /* Initialize remaining elements to 0. */
9053 for (; i < units; ++i)
9054 RTVEC_ELT (v, i) = CONST0_RTX (inner);
9055
9056 return gen_rtx_CONST_VECTOR (mode, v);
9057 }
9058 #include "gt-expr.h"