1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2020 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_pattern (rtx
, rtx
, rtx
, unsigned, unsigned,
77 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
,
79 unsigned HOST_WIDE_INT
, bool);
80 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
81 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
82 static rtx_insn
*compress_float_constant (rtx
, rtx
);
83 static rtx
get_subtarget (rtx
);
84 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
85 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
86 machine_mode
, tree
, alias_set_type
, bool, bool);
88 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
90 static int is_aligning_offset (const_tree
, const_tree
);
91 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
92 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
94 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
96 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
98 static rtx
const_vector_from_tree (tree
);
99 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
100 static tree
tree_expr_size (const_tree
);
101 static HOST_WIDE_INT
int_expr_size (tree
);
102 static void convert_mode_scalar (rtx
, rtx
, int);
105 /* This is run to set up which modes can be used
106 directly in memory and to initialize the block move optab. It is run
107 at the beginning of compilation and when the target is reinitialized. */
110 init_expr_target (void)
117 /* Try indexing by frame ptr and try by stack ptr.
118 It is known that on the Convex the stack ptr isn't a valid index.
119 With luck, one or the other is valid on any machine. */
120 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
121 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
123 /* A scratch register we can modify in-place below to avoid
124 useless RTL allocations. */
125 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
127 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
128 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
129 PATTERN (insn
) = pat
;
131 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
132 mode
= (machine_mode
) ((int) mode
+ 1))
136 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
137 PUT_MODE (mem
, mode
);
138 PUT_MODE (mem1
, mode
);
140 /* See if there is some register that can be used in this mode and
141 directly loaded or stored from memory. */
143 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
144 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
145 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
148 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
151 set_mode_and_regno (reg
, mode
, regno
);
154 SET_DEST (pat
) = reg
;
155 if (recog (pat
, insn
, &num_clobbers
) >= 0)
156 direct_load
[(int) mode
] = 1;
158 SET_SRC (pat
) = mem1
;
159 SET_DEST (pat
) = reg
;
160 if (recog (pat
, insn
, &num_clobbers
) >= 0)
161 direct_load
[(int) mode
] = 1;
164 SET_DEST (pat
) = mem
;
165 if (recog (pat
, insn
, &num_clobbers
) >= 0)
166 direct_store
[(int) mode
] = 1;
169 SET_DEST (pat
) = mem1
;
170 if (recog (pat
, insn
, &num_clobbers
) >= 0)
171 direct_store
[(int) mode
] = 1;
175 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
177 opt_scalar_float_mode mode_iter
;
178 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
180 scalar_float_mode mode
= mode_iter
.require ();
181 scalar_float_mode srcmode
;
182 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
186 ic
= can_extend_p (mode
, srcmode
, 0);
187 if (ic
== CODE_FOR_nothing
)
190 PUT_MODE (mem
, srcmode
);
192 if (insn_operand_matches (ic
, 1, mem
))
193 float_extend_from_mem
[mode
][srcmode
] = true;
198 /* This is run at the start of compiling a function. */
203 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
206 /* Copy data from FROM to TO, where the machine modes are not the same.
207 Both modes may be integer, or both may be floating, or both may be
209 UNSIGNEDP should be nonzero if FROM is an unsigned type.
210 This causes zero-extension instead of sign-extension. */
213 convert_move (rtx to
, rtx from
, int unsignedp
)
215 machine_mode to_mode
= GET_MODE (to
);
216 machine_mode from_mode
= GET_MODE (from
);
218 gcc_assert (to_mode
!= BLKmode
);
219 gcc_assert (from_mode
!= BLKmode
);
221 /* If the source and destination are already the same, then there's
226 /* If FROM is a SUBREG that indicates that we have already done at least
227 the required extension, strip it. We don't handle such SUBREGs as
230 scalar_int_mode to_int_mode
;
231 if (GET_CODE (from
) == SUBREG
232 && SUBREG_PROMOTED_VAR_P (from
)
233 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
234 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
235 >= GET_MODE_PRECISION (to_int_mode
))
236 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
238 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
239 from_mode
= to_int_mode
;
242 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
244 if (to_mode
== from_mode
245 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
247 emit_move_insn (to
, from
);
251 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
253 if (GET_MODE_UNIT_PRECISION (to_mode
)
254 > GET_MODE_UNIT_PRECISION (from_mode
))
256 optab op
= unsignedp
? zext_optab
: sext_optab
;
257 insn_code icode
= convert_optab_handler (op
, to_mode
, from_mode
);
258 if (icode
!= CODE_FOR_nothing
)
260 emit_unop_insn (icode
, to
, from
,
261 unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
);
266 if (GET_MODE_UNIT_PRECISION (to_mode
)
267 < GET_MODE_UNIT_PRECISION (from_mode
))
269 insn_code icode
= convert_optab_handler (trunc_optab
,
271 if (icode
!= CODE_FOR_nothing
)
273 emit_unop_insn (icode
, to
, from
, TRUNCATE
);
278 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
279 GET_MODE_BITSIZE (to_mode
)));
281 if (VECTOR_MODE_P (to_mode
))
282 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
284 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
286 emit_move_insn (to
, from
);
290 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
292 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
293 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
297 convert_mode_scalar (to
, from
, unsignedp
);
300 /* Like convert_move, but deals only with scalar modes. */
303 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
305 /* Both modes should be scalar types. */
306 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
307 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
308 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
309 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
313 gcc_assert (to_real
== from_real
);
315 /* rtx code for making an equivalent value. */
316 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
317 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
325 gcc_assert ((GET_MODE_PRECISION (from_mode
)
326 != GET_MODE_PRECISION (to_mode
))
327 || (DECIMAL_FLOAT_MODE_P (from_mode
)
328 != DECIMAL_FLOAT_MODE_P (to_mode
)));
330 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
331 /* Conversion between decimal float and binary float, same size. */
332 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
333 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
338 /* Try converting directly if the insn is supported. */
340 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
341 if (code
!= CODE_FOR_nothing
)
343 emit_unop_insn (code
, to
, from
,
344 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
348 /* Otherwise use a libcall. */
349 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
351 /* Is this conversion implemented yet? */
352 gcc_assert (libcall
);
355 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
357 insns
= get_insns ();
359 emit_libcall_block (insns
, to
, value
,
360 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
362 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
366 /* Handle pointer conversion. */ /* SPEE 900220. */
367 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
371 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
378 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
381 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
387 /* Targets are expected to provide conversion insns between PxImode and
388 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
389 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
391 scalar_int_mode full_mode
392 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
394 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
395 != CODE_FOR_nothing
);
397 if (full_mode
!= from_mode
)
398 from
= convert_to_mode (full_mode
, from
, unsignedp
);
399 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
403 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
406 scalar_int_mode full_mode
407 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
408 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
409 enum insn_code icode
;
411 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
412 gcc_assert (icode
!= CODE_FOR_nothing
);
414 if (to_mode
== full_mode
)
416 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
420 new_from
= gen_reg_rtx (full_mode
);
421 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
423 /* else proceed to integer conversions below. */
424 from_mode
= full_mode
;
428 /* Make sure both are fixed-point modes or both are not. */
429 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
430 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
431 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
433 /* If we widen from_mode to to_mode and they are in the same class,
434 we won't saturate the result.
435 Otherwise, always saturate the result to play safe. */
436 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
437 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
438 expand_fixed_convert (to
, from
, 0, 0);
440 expand_fixed_convert (to
, from
, 0, 1);
444 /* Now both modes are integers. */
446 /* Handle expanding beyond a word. */
447 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
448 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
455 scalar_mode lowpart_mode
;
456 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
458 /* Try converting directly if the insn is supported. */
459 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
462 /* If FROM is a SUBREG, put it into a register. Do this
463 so that we always generate the same set of insns for
464 better cse'ing; if an intermediate assignment occurred,
465 we won't be doing the operation directly on the SUBREG. */
466 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
467 from
= force_reg (from_mode
, from
);
468 emit_unop_insn (code
, to
, from
, equiv_code
);
471 /* Next, try converting via full word. */
472 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
473 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
474 != CODE_FOR_nothing
))
476 rtx word_to
= gen_reg_rtx (word_mode
);
479 if (reg_overlap_mentioned_p (to
, from
))
480 from
= force_reg (from_mode
, from
);
483 convert_move (word_to
, from
, unsignedp
);
484 emit_unop_insn (code
, to
, word_to
, equiv_code
);
488 /* No special multiword conversion insn; do it by hand. */
491 /* Since we will turn this into a no conflict block, we must ensure
492 the source does not overlap the target so force it into an isolated
493 register when maybe so. Likewise for any MEM input, since the
494 conversion sequence might require several references to it and we
495 must ensure we're getting the same value every time. */
497 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
498 from
= force_reg (from_mode
, from
);
500 /* Get a copy of FROM widened to a word, if necessary. */
501 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
502 lowpart_mode
= word_mode
;
504 lowpart_mode
= from_mode
;
506 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
508 lowpart
= gen_lowpart (lowpart_mode
, to
);
509 emit_move_insn (lowpart
, lowfrom
);
511 /* Compute the value to put in each remaining word. */
513 fill_value
= const0_rtx
;
515 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
516 LT
, lowfrom
, const0_rtx
,
517 lowpart_mode
, 0, -1);
519 /* Fill the remaining words. */
520 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
522 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
523 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
525 gcc_assert (subword
);
527 if (fill_value
!= subword
)
528 emit_move_insn (subword
, fill_value
);
531 insns
= get_insns ();
538 /* Truncating multi-word to a word or less. */
539 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
540 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
543 && ! MEM_VOLATILE_P (from
)
544 && direct_load
[(int) to_mode
]
545 && ! mode_dependent_address_p (XEXP (from
, 0),
546 MEM_ADDR_SPACE (from
)))
548 || GET_CODE (from
) == SUBREG
))
549 from
= force_reg (from_mode
, from
);
550 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
554 /* Now follow all the conversions between integers
555 no more than a word long. */
557 /* For truncation, usually we can just refer to FROM in a narrower mode. */
558 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
559 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
562 && ! MEM_VOLATILE_P (from
)
563 && direct_load
[(int) to_mode
]
564 && ! mode_dependent_address_p (XEXP (from
, 0),
565 MEM_ADDR_SPACE (from
)))
567 || GET_CODE (from
) == SUBREG
))
568 from
= force_reg (from_mode
, from
);
569 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
570 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
571 from
= copy_to_reg (from
);
572 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
576 /* Handle extension. */
577 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
579 /* Convert directly if that works. */
580 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
583 emit_unop_insn (code
, to
, from
, equiv_code
);
591 /* Search for a mode to convert via. */
592 opt_scalar_mode intermediate_iter
;
593 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
595 scalar_mode intermediate
= intermediate_iter
.require ();
596 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
598 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
599 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
601 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
602 != CODE_FOR_nothing
))
604 convert_move (to
, convert_to_mode (intermediate
, from
,
605 unsignedp
), unsignedp
);
610 /* No suitable intermediate mode.
611 Generate what we need with shifts. */
612 shift_amount
= (GET_MODE_PRECISION (to_mode
)
613 - GET_MODE_PRECISION (from_mode
));
614 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
615 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
617 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
620 emit_move_insn (to
, tmp
);
625 /* Support special truncate insns for certain modes. */
626 if (convert_optab_handler (trunc_optab
, to_mode
,
627 from_mode
) != CODE_FOR_nothing
)
629 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
634 /* Handle truncation of volatile memrefs, and so on;
635 the things that couldn't be truncated directly,
636 and for which there was no special instruction.
638 ??? Code above formerly short-circuited this, for most integer
639 mode pairs, with a force_reg in from_mode followed by a recursive
640 call to this routine. Appears always to have been wrong. */
641 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
643 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
644 emit_move_insn (to
, temp
);
648 /* Mode combination is not recognized. */
652 /* Return an rtx for a value that would result
653 from converting X to mode MODE.
654 Both X and MODE may be floating, or both integer.
655 UNSIGNEDP is nonzero if X is an unsigned value.
656 This can be done by referring to a part of X in place
657 or by copying to a new temporary with conversion. */
660 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
662 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
665 /* Return an rtx for a value that would result
666 from converting X from mode OLDMODE to mode MODE.
667 Both modes may be floating, or both integer.
668 UNSIGNEDP is nonzero if X is an unsigned value.
670 This can be done by referring to a part of X in place
671 or by copying to a new temporary with conversion.
673 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
676 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
679 scalar_int_mode int_mode
;
681 /* If FROM is a SUBREG that indicates that we have already done at least
682 the required extension, strip it. */
684 if (GET_CODE (x
) == SUBREG
685 && SUBREG_PROMOTED_VAR_P (x
)
686 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
687 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
688 >= GET_MODE_PRECISION (int_mode
))
689 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
690 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
692 if (GET_MODE (x
) != VOIDmode
)
693 oldmode
= GET_MODE (x
);
698 if (CONST_SCALAR_INT_P (x
)
699 && is_int_mode (mode
, &int_mode
))
701 /* If the caller did not tell us the old mode, then there is not
702 much to do with respect to canonicalization. We have to
703 assume that all the bits are significant. */
704 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
705 oldmode
= MAX_MODE_INT
;
706 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
707 GET_MODE_PRECISION (int_mode
),
708 unsignedp
? UNSIGNED
: SIGNED
);
709 return immed_wide_int_const (w
, int_mode
);
712 /* We can do this with a gen_lowpart if both desired and current modes
713 are integer, and this is either a constant integer, a register, or a
715 scalar_int_mode int_oldmode
;
716 if (is_int_mode (mode
, &int_mode
)
717 && is_int_mode (oldmode
, &int_oldmode
)
718 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
719 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
720 || CONST_POLY_INT_P (x
)
722 && (!HARD_REGISTER_P (x
)
723 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
724 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
725 return gen_lowpart (int_mode
, x
);
727 /* Converting from integer constant into mode is always equivalent to an
729 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
731 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
732 GET_MODE_BITSIZE (oldmode
)));
733 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
736 temp
= gen_reg_rtx (mode
);
737 convert_move (temp
, x
, unsignedp
);
741 /* Return the largest alignment we can use for doing a move (or store)
742 of MAX_PIECES. ALIGN is the largest alignment we could use. */
745 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
747 scalar_int_mode tmode
748 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
750 if (align
>= GET_MODE_ALIGNMENT (tmode
))
751 align
= GET_MODE_ALIGNMENT (tmode
);
754 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
755 opt_scalar_int_mode mode_iter
;
756 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
758 tmode
= mode_iter
.require ();
759 if (GET_MODE_SIZE (tmode
) > max_pieces
760 || targetm
.slow_unaligned_access (tmode
, align
))
765 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
771 /* Return the widest integer mode that is narrower than SIZE bytes. */
773 static scalar_int_mode
774 widest_int_mode_for_size (unsigned int size
)
776 scalar_int_mode result
= NARROWEST_INT_MODE
;
778 gcc_checking_assert (size
> 1);
780 opt_scalar_int_mode tmode
;
781 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
782 if (GET_MODE_SIZE (tmode
.require ()) < size
)
783 result
= tmode
.require ();
788 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
789 and should be performed piecewise. */
792 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
793 enum by_pieces_operation op
)
795 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
796 optimize_insn_for_speed_p ());
799 /* Determine whether the LEN bytes can be moved by using several move
800 instructions. Return nonzero if a call to move_by_pieces should
804 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
806 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
809 /* Return number of insns required to perform operation OP by pieces
810 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
812 unsigned HOST_WIDE_INT
813 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
814 unsigned int max_size
, by_pieces_operation op
)
816 unsigned HOST_WIDE_INT n_insns
= 0;
818 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
820 while (max_size
> 1 && l
> 0)
822 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
823 enum insn_code icode
;
825 unsigned int modesize
= GET_MODE_SIZE (mode
);
827 icode
= optab_handler (mov_optab
, mode
);
828 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
830 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
838 case COMPARE_BY_PIECES
:
839 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
840 int batch_ops
= 4 * batch
- 1;
841 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
842 n_insns
+= full
* batch_ops
;
843 if (n_pieces
% batch
!= 0)
856 /* Used when performing piecewise block operations, holds information
857 about one of the memory objects involved. The member functions
858 can be used to generate code for loading from the object and
859 updating the address when iterating. */
863 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
866 /* The address of the object. Can differ from that seen in the
867 MEM rtx if we copied the address to a register. */
869 /* Nonzero if the address on the object has an autoincrement already,
870 signifies whether that was an increment or decrement. */
871 signed char m_addr_inc
;
872 /* Nonzero if we intend to use autoinc without the address already
873 having autoinc form. We will insert add insns around each memory
874 reference, expecting later passes to form autoinc addressing modes.
875 The only supported options are predecrement and postincrement. */
876 signed char m_explicit_inc
;
877 /* True if we have either of the two possible cases of using
880 /* True if this is an address to be used for load operations rather
884 /* Optionally, a function to obtain constants for any given offset into
885 the objects, and data associated with it. */
886 by_pieces_constfn m_constfn
;
889 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
890 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
891 void increment_address (HOST_WIDE_INT
);
892 void maybe_predec (HOST_WIDE_INT
);
893 void maybe_postinc (HOST_WIDE_INT
);
894 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
901 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
902 true if the operation to be performed on this object is a load
903 rather than a store. For stores, OBJ can be NULL, in which case we
904 assume the operation is a stack push. For loads, the optional
905 CONSTFN and its associated CFNDATA can be used in place of the
908 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
910 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
916 rtx addr
= XEXP (obj
, 0);
917 rtx_code code
= GET_CODE (addr
);
919 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
920 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
923 m_addr_inc
= dec
? -1 : 1;
925 /* While we have always looked for these codes here, the code
926 implementing the memory operation has never handled them.
927 Support could be added later if necessary or beneficial. */
928 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
936 if (STACK_GROWS_DOWNWARD
)
942 gcc_assert (constfn
!= NULL
);
946 gcc_assert (is_load
);
949 /* Decide whether to use autoinc for an address involved in a memory op.
950 MODE is the mode of the accesses, REVERSE is true if we've decided to
951 perform the operation starting from the end, and LEN is the length of
952 the operation. Don't override an earlier decision to set m_auto. */
955 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
958 if (m_auto
|| m_obj
== NULL_RTX
)
961 bool use_predec
= (m_is_load
962 ? USE_LOAD_PRE_DECREMENT (mode
)
963 : USE_STORE_PRE_DECREMENT (mode
));
964 bool use_postinc
= (m_is_load
965 ? USE_LOAD_POST_INCREMENT (mode
)
966 : USE_STORE_POST_INCREMENT (mode
));
967 machine_mode addr_mode
= get_address_mode (m_obj
);
969 if (use_predec
&& reverse
)
971 m_addr
= copy_to_mode_reg (addr_mode
,
972 plus_constant (addr_mode
,
977 else if (use_postinc
&& !reverse
)
979 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
983 else if (CONSTANT_P (m_addr
))
984 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
987 /* Adjust the address to refer to the data at OFFSET in MODE. If we
988 are using autoincrement for this address, we don't add the offset,
989 but we still modify the MEM's properties. */
992 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
995 return m_constfn (m_cfndata
, offset
, mode
);
996 if (m_obj
== NULL_RTX
)
999 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
1001 return adjust_address (m_obj
, mode
, offset
);
1004 /* Emit an add instruction to increment the address by SIZE. */
1007 pieces_addr::increment_address (HOST_WIDE_INT size
)
1009 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
1010 emit_insn (gen_add2_insn (m_addr
, amount
));
1013 /* If we are supposed to decrement the address after each access, emit code
1014 to do so now. Increment by SIZE (which has should have the correct sign
1018 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
1020 if (m_explicit_inc
>= 0)
1022 gcc_assert (HAVE_PRE_DECREMENT
);
1023 increment_address (size
);
1026 /* If we are supposed to decrement the address after each access, emit code
1027 to do so now. Increment by SIZE. */
1030 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1032 if (m_explicit_inc
<= 0)
1034 gcc_assert (HAVE_POST_INCREMENT
);
1035 increment_address (size
);
1038 /* This structure is used by do_op_by_pieces to describe the operation
1041 class op_by_pieces_d
1044 pieces_addr m_to
, m_from
;
1045 unsigned HOST_WIDE_INT m_len
;
1046 HOST_WIDE_INT m_offset
;
1047 unsigned int m_align
;
1048 unsigned int m_max_size
;
1051 /* Virtual functions, overriden by derived classes for the specific
1053 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1054 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1055 virtual void finish_mode (machine_mode
)
1060 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1061 unsigned HOST_WIDE_INT
, unsigned int);
1065 /* The constructor for an op_by_pieces_d structure. We require two
1066 objects named TO and FROM, which are identified as loads or stores
1067 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1068 and its associated FROM_CFN_DATA can be used to replace loads with
1069 constant values. LEN describes the length of the operation. */
1071 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1072 rtx from
, bool from_load
,
1073 by_pieces_constfn from_cfn
,
1074 void *from_cfn_data
,
1075 unsigned HOST_WIDE_INT len
,
1077 : m_to (to
, to_load
, NULL
, NULL
),
1078 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1079 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1081 int toi
= m_to
.get_addr_inc ();
1082 int fromi
= m_from
.get_addr_inc ();
1083 if (toi
>= 0 && fromi
>= 0)
1085 else if (toi
<= 0 && fromi
<= 0)
1090 m_offset
= m_reverse
? len
: 0;
1091 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1092 from
? MEM_ALIGN (from
) : align
);
1094 /* If copying requires more than two move insns,
1095 copy addresses to registers (to make displacements shorter)
1096 and use post-increment if available. */
1097 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1099 /* Find the mode of the largest comparison. */
1100 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1102 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1103 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1106 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1110 /* This function contains the main loop used for expanding a block
1111 operation. First move what we can in the largest integer mode,
1112 then go to successively smaller modes. For every access, call
1113 GENFUN with the two operands and the EXTRA_DATA. */
1116 op_by_pieces_d::run ()
1118 while (m_max_size
> 1 && m_len
> 0)
1120 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1122 if (prepare_mode (mode
, m_align
))
1124 unsigned int size
= GET_MODE_SIZE (mode
);
1125 rtx to1
= NULL_RTX
, from1
;
1127 while (m_len
>= size
)
1132 to1
= m_to
.adjust (mode
, m_offset
);
1133 from1
= m_from
.adjust (mode
, m_offset
);
1135 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1136 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1138 generate (to1
, from1
, mode
);
1140 m_to
.maybe_postinc (size
);
1141 m_from
.maybe_postinc (size
);
1152 m_max_size
= GET_MODE_SIZE (mode
);
1155 /* The code above should have handled everything. */
1156 gcc_assert (!m_len
);
1159 /* Derived class from op_by_pieces_d, providing support for block move
1162 class move_by_pieces_d
: public op_by_pieces_d
1164 insn_gen_fn m_gen_fun
;
1165 void generate (rtx
, rtx
, machine_mode
);
1166 bool prepare_mode (machine_mode
, unsigned int);
1169 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1171 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1174 rtx
finish_retmode (memop_ret
);
1177 /* Return true if MODE can be used for a set of copies, given an
1178 alignment ALIGN. Prepare whatever data is necessary for later
1179 calls to generate. */
1182 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1184 insn_code icode
= optab_handler (mov_optab
, mode
);
1185 m_gen_fun
= GEN_FCN (icode
);
1186 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1189 /* A callback used when iterating for a compare_by_pieces_operation.
1190 OP0 and OP1 are the values that have been loaded and should be
1191 compared in MODE. If OP0 is NULL, this means we should generate a
1192 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1193 gen function that should be used to generate the mode. */
1196 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1197 machine_mode mode ATTRIBUTE_UNUSED
)
1199 #ifdef PUSH_ROUNDING
1200 if (op0
== NULL_RTX
)
1202 emit_single_push_insn (mode
, op1
, NULL
);
1206 emit_insn (m_gen_fun (op0
, op1
));
1209 /* Perform the final adjustment at the end of a string to obtain the
1210 correct return value for the block operation.
1211 Return value is based on RETMODE argument. */
1214 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1216 gcc_assert (!m_reverse
);
1217 if (retmode
== RETURN_END_MINUS_ONE
)
1219 m_to
.maybe_postinc (-1);
1222 return m_to
.adjust (QImode
, m_offset
);
1225 /* Generate several move instructions to copy LEN bytes from block FROM to
1226 block TO. (These are MEM rtx's with BLKmode).
1228 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1229 used to push FROM to the stack.
1231 ALIGN is maximum stack alignment we can assume.
1233 Return value is based on RETMODE argument. */
1236 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1237 unsigned int align
, memop_ret retmode
)
1239 #ifndef PUSH_ROUNDING
1244 move_by_pieces_d
data (to
, from
, len
, align
);
1248 if (retmode
!= RETURN_BEGIN
)
1249 return data
.finish_retmode (retmode
);
1254 /* Derived class from op_by_pieces_d, providing support for block move
1257 class store_by_pieces_d
: public op_by_pieces_d
1259 insn_gen_fn m_gen_fun
;
1260 void generate (rtx
, rtx
, machine_mode
);
1261 bool prepare_mode (machine_mode
, unsigned int);
1264 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1265 unsigned HOST_WIDE_INT len
, unsigned int align
)
1266 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1269 rtx
finish_retmode (memop_ret
);
1272 /* Return true if MODE can be used for a set of stores, given an
1273 alignment ALIGN. Prepare whatever data is necessary for later
1274 calls to generate. */
1277 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1279 insn_code icode
= optab_handler (mov_optab
, mode
);
1280 m_gen_fun
= GEN_FCN (icode
);
1281 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1284 /* A callback used when iterating for a store_by_pieces_operation.
1285 OP0 and OP1 are the values that have been loaded and should be
1286 compared in MODE. If OP0 is NULL, this means we should generate a
1287 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1288 gen function that should be used to generate the mode. */
1291 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1293 emit_insn (m_gen_fun (op0
, op1
));
1296 /* Perform the final adjustment at the end of a string to obtain the
1297 correct return value for the block operation.
1298 Return value is based on RETMODE argument. */
1301 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1303 gcc_assert (!m_reverse
);
1304 if (retmode
== RETURN_END_MINUS_ONE
)
1306 m_to
.maybe_postinc (-1);
1309 return m_to
.adjust (QImode
, m_offset
);
1312 /* Determine whether the LEN bytes generated by CONSTFUN can be
1313 stored to memory using several move instructions. CONSTFUNDATA is
1314 a pointer which will be passed as argument in every CONSTFUN call.
1315 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1316 a memset operation and false if it's a copy of a constant string.
1317 Return nonzero if a call to store_by_pieces should succeed. */
1320 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1321 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1322 void *constfundata
, unsigned int align
, bool memsetp
)
1324 unsigned HOST_WIDE_INT l
;
1325 unsigned int max_size
;
1326 HOST_WIDE_INT offset
= 0;
1327 enum insn_code icode
;
1329 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1330 rtx cst ATTRIBUTE_UNUSED
;
1335 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1339 optimize_insn_for_speed_p ()))
1342 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1344 /* We would first store what we can in the largest integer mode, then go to
1345 successively smaller modes. */
1348 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1352 max_size
= STORE_MAX_PIECES
+ 1;
1353 while (max_size
> 1 && l
> 0)
1355 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1357 icode
= optab_handler (mov_optab
, mode
);
1358 if (icode
!= CODE_FOR_nothing
1359 && align
>= GET_MODE_ALIGNMENT (mode
))
1361 unsigned int size
= GET_MODE_SIZE (mode
);
1368 cst
= (*constfun
) (constfundata
, offset
, mode
);
1369 if (!targetm
.legitimate_constant_p (mode
, cst
))
1379 max_size
= GET_MODE_SIZE (mode
);
1382 /* The code above should have handled everything. */
1389 /* Generate several move instructions to store LEN bytes generated by
1390 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1391 pointer which will be passed as argument in every CONSTFUN call.
1392 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1393 a memset operation and false if it's a copy of a constant string.
1394 Return value is based on RETMODE argument. */
1397 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1398 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1399 void *constfundata
, unsigned int align
, bool memsetp
,
1404 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1408 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1410 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1411 optimize_insn_for_speed_p ()));
1413 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1416 if (retmode
!= RETURN_BEGIN
)
1417 return data
.finish_retmode (retmode
);
1422 /* Callback routine for clear_by_pieces.
1423 Return const0_rtx unconditionally. */
1426 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1431 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1432 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1435 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1440 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1444 /* Context used by compare_by_pieces_genfn. It stores the fail label
1445 to jump to in case of miscomparison, and for branch ratios greater than 1,
1446 it stores an accumulator and the current and maximum counts before
1447 emitting another branch. */
1449 class compare_by_pieces_d
: public op_by_pieces_d
1451 rtx_code_label
*m_fail_label
;
1453 int m_count
, m_batch
;
1455 void generate (rtx
, rtx
, machine_mode
);
1456 bool prepare_mode (machine_mode
, unsigned int);
1457 void finish_mode (machine_mode
);
1459 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1460 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1461 rtx_code_label
*fail_label
)
1462 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1464 m_fail_label
= fail_label
;
1468 /* A callback used when iterating for a compare_by_pieces_operation.
1469 OP0 and OP1 are the values that have been loaded and should be
1470 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1471 context structure. */
1474 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1478 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1479 true, OPTAB_LIB_WIDEN
);
1481 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1482 true, OPTAB_LIB_WIDEN
);
1483 m_accumulator
= temp
;
1485 if (++m_count
< m_batch
)
1489 op0
= m_accumulator
;
1491 m_accumulator
= NULL_RTX
;
1493 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1494 m_fail_label
, profile_probability::uninitialized ());
1497 /* Return true if MODE can be used for a set of moves and comparisons,
1498 given an alignment ALIGN. Prepare whatever data is necessary for
1499 later calls to generate. */
1502 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1504 insn_code icode
= optab_handler (mov_optab
, mode
);
1505 if (icode
== CODE_FOR_nothing
1506 || align
< GET_MODE_ALIGNMENT (mode
)
1507 || !can_compare_p (EQ
, mode
, ccp_jump
))
1509 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1512 m_accumulator
= NULL_RTX
;
1517 /* Called after expanding a series of comparisons in MODE. If we have
1518 accumulated results for which we haven't emitted a branch yet, do
1522 compare_by_pieces_d::finish_mode (machine_mode mode
)
1524 if (m_accumulator
!= NULL_RTX
)
1525 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1526 NULL_RTX
, NULL
, m_fail_label
,
1527 profile_probability::uninitialized ());
1530 /* Generate several move instructions to compare LEN bytes from blocks
1531 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1533 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1534 used to push FROM to the stack.
1536 ALIGN is maximum stack alignment we can assume.
1538 Optionally, the caller can pass a constfn and associated data in A1_CFN
1539 and A1_CFN_DATA. describing that the second operand being compared is a
1540 known constant and how to obtain its data. */
1543 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1544 rtx target
, unsigned int align
,
1545 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1547 rtx_code_label
*fail_label
= gen_label_rtx ();
1548 rtx_code_label
*end_label
= gen_label_rtx ();
1550 if (target
== NULL_RTX
1551 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1552 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1554 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1559 emit_move_insn (target
, const0_rtx
);
1560 emit_jump (end_label
);
1562 emit_label (fail_label
);
1563 emit_move_insn (target
, const1_rtx
);
1564 emit_label (end_label
);
1569 /* Emit code to move a block Y to a block X. This may be done with
1570 string-move instructions, with multiple scalar move instructions,
1571 or with a library call.
1573 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1574 SIZE is an rtx that says how long they are.
1575 ALIGN is the maximum alignment we can assume they have.
1576 METHOD describes what kind of copy this is, and what mechanisms may be used.
1577 MIN_SIZE is the minimal size of block to move
1578 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1579 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1581 Return the address of the new block, if memcpy is called and returns it,
1585 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1586 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1587 unsigned HOST_WIDE_INT min_size
,
1588 unsigned HOST_WIDE_INT max_size
,
1589 unsigned HOST_WIDE_INT probable_max_size
,
1590 bool bail_out_libcall
, bool *is_move_done
,
1598 *is_move_done
= true;
1601 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1606 case BLOCK_OP_NORMAL
:
1607 case BLOCK_OP_TAILCALL
:
1611 case BLOCK_OP_CALL_PARM
:
1612 may_use_call
= block_move_libcall_safe_for_call_parm ();
1614 /* Make inhibit_defer_pop nonzero around the library call
1615 to force it to pop the arguments right away. */
1619 case BLOCK_OP_NO_LIBCALL
:
1623 case BLOCK_OP_NO_LIBCALL_RET
:
1631 gcc_assert (MEM_P (x
) && MEM_P (y
));
1632 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1633 gcc_assert (align
>= BITS_PER_UNIT
);
1635 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1636 block copy is more efficient for other large modes, e.g. DCmode. */
1637 x
= adjust_address (x
, BLKmode
, 0);
1638 y
= adjust_address (y
, BLKmode
, 0);
1640 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1641 can be incorrect is coming from __builtin_memcpy. */
1642 poly_int64 const_size
;
1643 if (poly_int_rtx_p (size
, &const_size
))
1645 x
= shallow_copy_rtx (x
);
1646 y
= shallow_copy_rtx (y
);
1647 set_mem_size (x
, const_size
);
1648 set_mem_size (y
, const_size
);
1651 bool pieces_ok
= CONST_INT_P (size
)
1652 && can_move_by_pieces (INTVAL (size
), align
);
1653 bool pattern_ok
= false;
1655 if (!pieces_ok
|| might_overlap
)
1658 = emit_block_move_via_pattern (x
, y
, size
, align
,
1659 expected_align
, expected_size
,
1660 min_size
, max_size
, probable_max_size
,
1662 if (!pattern_ok
&& might_overlap
)
1664 /* Do not try any of the other methods below as they are not safe
1665 for overlapping moves. */
1666 *is_move_done
= false;
1674 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
1675 else if (may_use_call
&& !might_overlap
1676 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1677 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1679 if (bail_out_libcall
)
1682 *is_move_done
= false;
1686 if (may_use_call
< 0)
1689 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1690 method
== BLOCK_OP_TAILCALL
);
1692 else if (might_overlap
)
1693 *is_move_done
= false;
1695 emit_block_move_via_loop (x
, y
, size
, align
);
1697 if (method
== BLOCK_OP_CALL_PARM
)
1704 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1706 unsigned HOST_WIDE_INT max
, min
= 0;
1707 if (GET_CODE (size
) == CONST_INT
)
1708 min
= max
= UINTVAL (size
);
1710 max
= GET_MODE_MASK (GET_MODE (size
));
1711 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1715 /* A subroutine of emit_block_move. Returns true if calling the
1716 block move libcall will not clobber any parameters which may have
1717 already been placed on the stack. */
1720 block_move_libcall_safe_for_call_parm (void)
1724 /* If arguments are pushed on the stack, then they're safe. */
1728 /* If registers go on the stack anyway, any argument is sure to clobber
1729 an outgoing argument. */
1730 #if defined (REG_PARM_STACK_SPACE)
1731 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1732 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1733 depend on its argument. */
1735 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1736 && REG_PARM_STACK_SPACE (fn
) != 0)
1740 /* If any argument goes in memory, then it might clobber an outgoing
1743 CUMULATIVE_ARGS args_so_far_v
;
1744 cumulative_args_t args_so_far
;
1747 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1748 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1749 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1751 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1752 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1754 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1755 function_arg_info
arg_info (mode
, /*named=*/true);
1756 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, arg_info
);
1757 if (!tmp
|| !REG_P (tmp
))
1759 if (targetm
.calls
.arg_partial_bytes (args_so_far
, arg_info
))
1761 targetm
.calls
.function_arg_advance (args_so_far
, arg_info
);
1767 /* A subroutine of emit_block_move. Expand a cpymem or movmem pattern;
1768 return true if successful.
1770 X is the destination of the copy or move.
1771 Y is the source of the copy or move.
1772 SIZE is the size of the block to be moved.
1774 MIGHT_OVERLAP indicates this originated with expansion of a
1775 builtin_memmove() and the source and destination blocks may
1780 emit_block_move_via_pattern (rtx x
, rtx y
, rtx size
, unsigned int align
,
1781 unsigned int expected_align
,
1782 HOST_WIDE_INT expected_size
,
1783 unsigned HOST_WIDE_INT min_size
,
1784 unsigned HOST_WIDE_INT max_size
,
1785 unsigned HOST_WIDE_INT probable_max_size
,
1788 if (expected_align
< align
)
1789 expected_align
= align
;
1790 if (expected_size
!= -1)
1792 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1793 expected_size
= probable_max_size
;
1794 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1795 expected_size
= min_size
;
1798 /* Since this is a move insn, we don't care about volatility. */
1799 temporary_volatile_ok
v (true);
1801 /* Try the most limited insn first, because there's no point
1802 including more than one in the machine description unless
1803 the more limited one has some advantage. */
1805 opt_scalar_int_mode mode_iter
;
1806 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1808 scalar_int_mode mode
= mode_iter
.require ();
1809 enum insn_code code
;
1811 code
= direct_optab_handler (movmem_optab
, mode
);
1813 code
= direct_optab_handler (cpymem_optab
, mode
);
1815 if (code
!= CODE_FOR_nothing
1816 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1817 here because if SIZE is less than the mode mask, as it is
1818 returned by the macro, it will definitely be less than the
1819 actual mode mask. Since SIZE is within the Pmode address
1820 space, we limit MODE to Pmode. */
1821 && ((CONST_INT_P (size
)
1822 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1823 <= (GET_MODE_MASK (mode
) >> 1)))
1824 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1825 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1827 class expand_operand ops
[9];
1830 /* ??? When called via emit_block_move_for_call, it'd be
1831 nice if there were some way to inform the backend, so
1832 that it doesn't fail the expansion because it thinks
1833 emitting the libcall would be more efficient. */
1834 nops
= insn_data
[(int) code
].n_generator_args
;
1835 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1837 create_fixed_operand (&ops
[0], x
);
1838 create_fixed_operand (&ops
[1], y
);
1839 /* The check above guarantees that this size conversion is valid. */
1840 create_convert_operand_to (&ops
[2], size
, mode
, true);
1841 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1844 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1845 create_integer_operand (&ops
[5], expected_size
);
1849 create_integer_operand (&ops
[6], min_size
);
1850 /* If we cannot represent the maximal size,
1851 make parameter NULL. */
1852 if ((HOST_WIDE_INT
) max_size
!= -1)
1853 create_integer_operand (&ops
[7], max_size
);
1855 create_fixed_operand (&ops
[7], NULL
);
1859 /* If we cannot represent the maximal size,
1860 make parameter NULL. */
1861 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1862 create_integer_operand (&ops
[8], probable_max_size
);
1864 create_fixed_operand (&ops
[8], NULL
);
1866 if (maybe_expand_insn (code
, nops
, ops
))
1874 /* A subroutine of emit_block_move. Copy the data via an explicit
1875 loop. This is used only when libcalls are forbidden. */
1876 /* ??? It'd be nice to copy in hunks larger than QImode. */
1879 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1880 unsigned int align ATTRIBUTE_UNUSED
)
1882 rtx_code_label
*cmp_label
, *top_label
;
1883 rtx iter
, x_addr
, y_addr
, tmp
;
1884 machine_mode x_addr_mode
= get_address_mode (x
);
1885 machine_mode y_addr_mode
= get_address_mode (y
);
1886 machine_mode iter_mode
;
1888 iter_mode
= GET_MODE (size
);
1889 if (iter_mode
== VOIDmode
)
1890 iter_mode
= word_mode
;
1892 top_label
= gen_label_rtx ();
1893 cmp_label
= gen_label_rtx ();
1894 iter
= gen_reg_rtx (iter_mode
);
1896 emit_move_insn (iter
, const0_rtx
);
1898 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1899 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1900 do_pending_stack_adjust ();
1902 emit_jump (cmp_label
);
1903 emit_label (top_label
);
1905 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1906 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1908 if (x_addr_mode
!= y_addr_mode
)
1909 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1910 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1912 x
= change_address (x
, QImode
, x_addr
);
1913 y
= change_address (y
, QImode
, y_addr
);
1915 emit_move_insn (x
, y
);
1917 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1918 true, OPTAB_LIB_WIDEN
);
1920 emit_move_insn (iter
, tmp
);
1922 emit_label (cmp_label
);
1924 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1926 profile_probability::guessed_always ()
1927 .apply_scale (9, 10));
1930 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1931 TAILCALL is true if this is a tail call. */
1934 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1935 rtx size
, bool tailcall
)
1937 rtx dst_addr
, src_addr
;
1938 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1939 machine_mode size_mode
;
1941 /* Since dst and src are passed to a libcall, mark the corresponding
1942 tree EXPR as addressable. */
1943 tree dst_expr
= MEM_EXPR (dst
);
1944 tree src_expr
= MEM_EXPR (src
);
1946 mark_addressable (dst_expr
);
1948 mark_addressable (src_expr
);
1950 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1951 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1952 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1954 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1955 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1956 src_tree
= make_tree (ptr_type_node
, src_addr
);
1958 size_mode
= TYPE_MODE (sizetype
);
1959 size
= convert_to_mode (size_mode
, size
, 1);
1960 size
= copy_to_mode_reg (size_mode
, size
);
1961 size_tree
= make_tree (sizetype
, size
);
1963 /* It is incorrect to use the libcall calling conventions for calls to
1964 memcpy/memmove/memcmp because they can be provided by the user. */
1965 tree fn
= builtin_decl_implicit (fncode
);
1966 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1967 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1969 return expand_call (call_expr
, NULL_RTX
, false);
1972 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1973 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1974 otherwise return null. */
1977 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1978 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1979 HOST_WIDE_INT align
)
1981 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1983 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1986 class expand_operand ops
[5];
1987 create_output_operand (&ops
[0], target
, insn_mode
);
1988 create_fixed_operand (&ops
[1], arg1_rtx
);
1989 create_fixed_operand (&ops
[2], arg2_rtx
);
1990 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1991 TYPE_UNSIGNED (arg3_type
));
1992 create_integer_operand (&ops
[4], align
);
1993 if (maybe_expand_insn (icode
, 5, ops
))
1994 return ops
[0].value
;
1998 /* Expand a block compare between X and Y with length LEN using the
1999 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
2000 of the expression that was used to calculate the length. ALIGN
2001 gives the known minimum common alignment. */
2004 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2007 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
2008 implementing memcmp because it will stop if it encounters two
2010 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
2012 if (icode
== CODE_FOR_nothing
)
2015 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
2018 /* Emit code to compare a block Y to a block X. This may be done with
2019 string-compare instructions, with multiple scalar instructions,
2020 or with a library call.
2022 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
2023 they are. LEN_TYPE is the type of the expression that was used to
2026 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
2027 value of a normal memcmp call, instead we can just compare for equality.
2028 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
2031 Optionally, the caller can pass a constfn and associated data in Y_CFN
2032 and Y_CFN_DATA. describing that the second operand being compared is a
2033 known constant and how to obtain its data.
2034 Return the result of the comparison, or NULL_RTX if we failed to
2035 perform the operation. */
2038 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2039 bool equality_only
, by_pieces_constfn y_cfn
,
2044 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
2047 gcc_assert (MEM_P (x
) && MEM_P (y
));
2048 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
2049 gcc_assert (align
>= BITS_PER_UNIT
);
2051 x
= adjust_address (x
, BLKmode
, 0);
2052 y
= adjust_address (y
, BLKmode
, 0);
2055 && CONST_INT_P (len
)
2056 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
2057 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2060 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2065 /* Copy all or part of a value X into registers starting at REGNO.
2066 The number of registers to be filled is NREGS. */
2069 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2074 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2075 x
= validize_mem (force_const_mem (mode
, x
));
2077 /* See if the machine can do this with a load multiple insn. */
2078 if (targetm
.have_load_multiple ())
2080 rtx_insn
*last
= get_last_insn ();
2081 rtx first
= gen_rtx_REG (word_mode
, regno
);
2082 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2089 delete_insns_since (last
);
2092 for (int i
= 0; i
< nregs
; i
++)
2093 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2094 operand_subword_force (x
, i
, mode
));
2097 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2098 The number of registers to be filled is NREGS. */
2101 move_block_from_reg (int regno
, rtx x
, int nregs
)
2106 /* See if the machine can do this with a store multiple insn. */
2107 if (targetm
.have_store_multiple ())
2109 rtx_insn
*last
= get_last_insn ();
2110 rtx first
= gen_rtx_REG (word_mode
, regno
);
2111 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2118 delete_insns_since (last
);
2121 for (int i
= 0; i
< nregs
; i
++)
2123 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2127 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2131 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2132 ORIG, where ORIG is a non-consecutive group of registers represented by
2133 a PARALLEL. The clone is identical to the original except in that the
2134 original set of registers is replaced by a new set of pseudo registers.
2135 The new set has the same modes as the original set. */
2138 gen_group_rtx (rtx orig
)
2143 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2145 length
= XVECLEN (orig
, 0);
2146 tmps
= XALLOCAVEC (rtx
, length
);
2148 /* Skip a NULL entry in first slot. */
2149 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2154 for (; i
< length
; i
++)
2156 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2157 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2159 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2162 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2165 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2166 except that values are placed in TMPS[i], and must later be moved
2167 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2170 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2175 machine_mode m
= GET_MODE (orig_src
);
2177 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2180 && !SCALAR_INT_MODE_P (m
)
2181 && !MEM_P (orig_src
)
2182 && GET_CODE (orig_src
) != CONCAT
)
2184 scalar_int_mode imode
;
2185 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2187 src
= gen_reg_rtx (imode
);
2188 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2192 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2193 emit_move_insn (src
, orig_src
);
2195 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2199 /* Check for a NULL entry, used to indicate that the parameter goes
2200 both on the stack and in registers. */
2201 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2206 /* Process the pieces. */
2207 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2209 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2210 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2211 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2212 poly_int64 shift
= 0;
2214 /* Handle trailing fragments that run over the size of the struct.
2215 It's the target's responsibility to make sure that the fragment
2216 cannot be strictly smaller in some cases and strictly larger
2218 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2219 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2221 /* Arrange to shift the fragment to where it belongs.
2222 extract_bit_field loads to the lsb of the reg. */
2224 #ifdef BLOCK_REG_PADDING
2225 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2226 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2231 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2232 bytelen
= ssize
- bytepos
;
2233 gcc_assert (maybe_gt (bytelen
, 0));
2236 /* If we won't be loading directly from memory, protect the real source
2237 from strange tricks we might play; but make sure that the source can
2238 be loaded directly into the destination. */
2240 if (!MEM_P (orig_src
)
2241 && (!CONSTANT_P (orig_src
)
2242 || (GET_MODE (orig_src
) != mode
2243 && GET_MODE (orig_src
) != VOIDmode
)))
2245 if (GET_MODE (orig_src
) == VOIDmode
)
2246 src
= gen_reg_rtx (mode
);
2248 src
= gen_reg_rtx (GET_MODE (orig_src
));
2250 emit_move_insn (src
, orig_src
);
2253 /* Optimize the access just a bit. */
2255 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2256 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2257 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2258 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2260 tmps
[i
] = gen_reg_rtx (mode
);
2261 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2263 else if (COMPLEX_MODE_P (mode
)
2264 && GET_MODE (src
) == mode
2265 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2266 /* Let emit_move_complex do the bulk of the work. */
2268 else if (GET_CODE (src
) == CONCAT
)
2270 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2271 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2275 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2276 && known_le (subpos
+ bytelen
, slen0
))
2278 /* The following assumes that the concatenated objects all
2279 have the same size. In this case, a simple calculation
2280 can be used to determine the object and the bit field
2282 tmps
[i
] = XEXP (src
, elt
);
2283 if (maybe_ne (subpos
, 0)
2284 || maybe_ne (subpos
+ bytelen
, slen0
)
2285 || (!CONSTANT_P (tmps
[i
])
2286 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2287 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2288 subpos
* BITS_PER_UNIT
,
2289 1, NULL_RTX
, mode
, mode
, false,
2296 gcc_assert (known_eq (bytepos
, 0));
2297 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2298 emit_move_insn (mem
, src
);
2299 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2300 0, 1, NULL_RTX
, mode
, mode
, false,
2304 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2305 SIMD register, which is currently broken. While we get GCC
2306 to emit proper RTL for these cases, let's dump to memory. */
2307 else if (VECTOR_MODE_P (GET_MODE (dst
))
2310 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2313 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2314 emit_move_insn (mem
, src
);
2315 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2317 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2318 && XVECLEN (dst
, 0) > 1)
2319 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2320 else if (CONSTANT_P (src
))
2322 if (known_eq (bytelen
, ssize
))
2328 /* TODO: const_wide_int can have sizes other than this... */
2329 gcc_assert (known_eq (2 * bytelen
, ssize
));
2330 split_double (src
, &first
, &second
);
2337 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2340 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2341 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2342 mode
, mode
, false, NULL
);
2344 if (maybe_ne (shift
, 0))
2345 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2350 /* Emit code to move a block SRC of type TYPE to a block DST,
2351 where DST is non-consecutive registers represented by a PARALLEL.
2352 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2356 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2361 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2362 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2364 /* Copy the extracted pieces into the proper (probable) hard regs. */
2365 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2367 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2370 emit_move_insn (d
, tmps
[i
]);
2374 /* Similar, but load SRC into new pseudos in a format that looks like
2375 PARALLEL. This can later be fed to emit_group_move to get things
2376 in the right place. */
2379 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2384 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2385 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2387 /* Convert the vector to look just like the original PARALLEL, except
2388 with the computed values. */
2389 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2391 rtx e
= XVECEXP (parallel
, 0, i
);
2392 rtx d
= XEXP (e
, 0);
2396 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2397 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2399 RTVEC_ELT (vec
, i
) = e
;
2402 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2405 /* Emit code to move a block SRC to block DST, where SRC and DST are
2406 non-consecutive groups of registers, each represented by a PARALLEL. */
2409 emit_group_move (rtx dst
, rtx src
)
2413 gcc_assert (GET_CODE (src
) == PARALLEL
2414 && GET_CODE (dst
) == PARALLEL
2415 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2417 /* Skip first entry if NULL. */
2418 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2419 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2420 XEXP (XVECEXP (src
, 0, i
), 0));
2423 /* Move a group of registers represented by a PARALLEL into pseudos. */
2426 emit_group_move_into_temps (rtx src
)
2428 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2431 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2433 rtx e
= XVECEXP (src
, 0, i
);
2434 rtx d
= XEXP (e
, 0);
2437 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2438 RTVEC_ELT (vec
, i
) = e
;
2441 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2444 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2445 where SRC is non-consecutive registers represented by a PARALLEL.
2446 SSIZE represents the total size of block ORIG_DST, or -1 if not
2450 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2454 int start
, finish
, i
;
2455 machine_mode m
= GET_MODE (orig_dst
);
2457 gcc_assert (GET_CODE (src
) == PARALLEL
);
2459 if (!SCALAR_INT_MODE_P (m
)
2460 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2462 scalar_int_mode imode
;
2463 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2465 dst
= gen_reg_rtx (imode
);
2466 emit_group_store (dst
, src
, type
, ssize
);
2467 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2471 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2472 emit_group_store (dst
, src
, type
, ssize
);
2474 emit_move_insn (orig_dst
, dst
);
2478 /* Check for a NULL entry, used to indicate that the parameter goes
2479 both on the stack and in registers. */
2480 if (XEXP (XVECEXP (src
, 0, 0), 0))
2484 finish
= XVECLEN (src
, 0);
2486 tmps
= XALLOCAVEC (rtx
, finish
);
2488 /* Copy the (probable) hard regs into pseudos. */
2489 for (i
= start
; i
< finish
; i
++)
2491 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2492 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2494 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2495 emit_move_insn (tmps
[i
], reg
);
2501 /* If we won't be storing directly into memory, protect the real destination
2502 from strange tricks we might play. */
2504 if (GET_CODE (dst
) == PARALLEL
)
2508 /* We can get a PARALLEL dst if there is a conditional expression in
2509 a return statement. In that case, the dst and src are the same,
2510 so no action is necessary. */
2511 if (rtx_equal_p (dst
, src
))
2514 /* It is unclear if we can ever reach here, but we may as well handle
2515 it. Allocate a temporary, and split this into a store/load to/from
2517 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2518 emit_group_store (temp
, src
, type
, ssize
);
2519 emit_group_load (dst
, temp
, type
, ssize
);
2522 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2524 machine_mode outer
= GET_MODE (dst
);
2530 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2531 dst
= gen_reg_rtx (outer
);
2533 /* Make life a bit easier for combine. */
2534 /* If the first element of the vector is the low part
2535 of the destination mode, use a paradoxical subreg to
2536 initialize the destination. */
2539 inner
= GET_MODE (tmps
[start
]);
2540 bytepos
= subreg_lowpart_offset (inner
, outer
);
2541 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2544 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2548 emit_move_insn (dst
, temp
);
2555 /* If the first element wasn't the low part, try the last. */
2557 && start
< finish
- 1)
2559 inner
= GET_MODE (tmps
[finish
- 1]);
2560 bytepos
= subreg_lowpart_offset (inner
, outer
);
2561 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2565 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2569 emit_move_insn (dst
, temp
);
2576 /* Otherwise, simply initialize the result to zero. */
2578 emit_move_insn (dst
, CONST0_RTX (outer
));
2581 /* Process the pieces. */
2582 for (i
= start
; i
< finish
; i
++)
2584 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2585 machine_mode mode
= GET_MODE (tmps
[i
]);
2586 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2587 poly_uint64 adj_bytelen
;
2590 /* Handle trailing fragments that run over the size of the struct.
2591 It's the target's responsibility to make sure that the fragment
2592 cannot be strictly smaller in some cases and strictly larger
2594 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2595 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2596 adj_bytelen
= ssize
- bytepos
;
2598 adj_bytelen
= bytelen
;
2600 if (GET_CODE (dst
) == CONCAT
)
2602 if (known_le (bytepos
+ adj_bytelen
,
2603 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2604 dest
= XEXP (dst
, 0);
2605 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2607 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2608 dest
= XEXP (dst
, 1);
2612 machine_mode dest_mode
= GET_MODE (dest
);
2613 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2615 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2617 if (GET_MODE_ALIGNMENT (dest_mode
)
2618 >= GET_MODE_ALIGNMENT (tmp_mode
))
2620 dest
= assign_stack_temp (dest_mode
,
2621 GET_MODE_SIZE (dest_mode
));
2622 emit_move_insn (adjust_address (dest
,
2630 dest
= assign_stack_temp (tmp_mode
,
2631 GET_MODE_SIZE (tmp_mode
));
2632 emit_move_insn (dest
, tmps
[i
]);
2633 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2639 /* Handle trailing fragments that run over the size of the struct. */
2640 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2642 /* store_bit_field always takes its value from the lsb.
2643 Move the fragment to the lsb if it's not already there. */
2645 #ifdef BLOCK_REG_PADDING
2646 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2647 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2653 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2654 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2658 /* Make sure not to write past the end of the struct. */
2659 store_bit_field (dest
,
2660 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2661 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2662 VOIDmode
, tmps
[i
], false);
2665 /* Optimize the access just a bit. */
2666 else if (MEM_P (dest
)
2667 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2668 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2669 && multiple_p (bytepos
* BITS_PER_UNIT
,
2670 GET_MODE_ALIGNMENT (mode
))
2671 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2672 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2675 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2676 0, 0, mode
, tmps
[i
], false);
2679 /* Copy from the pseudo into the (probable) hard reg. */
2680 if (orig_dst
!= dst
)
2681 emit_move_insn (orig_dst
, dst
);
2684 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2685 of the value stored in X. */
2688 maybe_emit_group_store (rtx x
, tree type
)
2690 machine_mode mode
= TYPE_MODE (type
);
2691 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2692 if (GET_CODE (x
) == PARALLEL
)
2694 rtx result
= gen_reg_rtx (mode
);
2695 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2701 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2703 This is used on targets that return BLKmode values in registers. */
2706 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2708 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2709 rtx src
= NULL
, dst
= NULL
;
2710 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2711 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2712 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2713 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2714 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2715 fixed_size_mode copy_mode
;
2717 /* BLKmode registers created in the back-end shouldn't have survived. */
2718 gcc_assert (mode
!= BLKmode
);
2720 /* If the structure doesn't take up a whole number of words, see whether
2721 SRCREG is padded on the left or on the right. If it's on the left,
2722 set PADDING_CORRECTION to the number of bits to skip.
2724 In most ABIs, the structure will be returned at the least end of
2725 the register, which translates to right padding on little-endian
2726 targets and left padding on big-endian targets. The opposite
2727 holds if the structure is returned at the most significant
2728 end of the register. */
2729 if (bytes
% UNITS_PER_WORD
!= 0
2730 && (targetm
.calls
.return_in_msb (type
)
2732 : BYTES_BIG_ENDIAN
))
2734 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2736 /* We can use a single move if we have an exact mode for the size. */
2737 else if (MEM_P (target
)
2738 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2739 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2740 && bytes
== GET_MODE_SIZE (mode
))
2742 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2746 /* And if we additionally have the same mode for a register. */
2747 else if (REG_P (target
)
2748 && GET_MODE (target
) == mode
2749 && bytes
== GET_MODE_SIZE (mode
))
2751 emit_move_insn (target
, srcreg
);
2755 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2756 into a new pseudo which is a full word. */
2757 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2759 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2763 /* Copy the structure BITSIZE bits at a time. If the target lives in
2764 memory, take care of not reading/writing past its end by selecting
2765 a copy mode suited to BITSIZE. This should always be possible given
2768 If the target lives in register, make sure not to select a copy mode
2769 larger than the mode of the register.
2771 We could probably emit more efficient code for machines which do not use
2772 strict alignment, but it doesn't seem worth the effort at the current
2775 copy_mode
= word_mode
;
2778 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2779 if (mem_mode
.exists ())
2780 copy_mode
= mem_mode
.require ();
2782 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2785 for (bitpos
= 0, xbitpos
= padding_correction
;
2786 bitpos
< bytes
* BITS_PER_UNIT
;
2787 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2789 /* We need a new source operand each time xbitpos is on a
2790 word boundary and when xbitpos == padding_correction
2791 (the first time through). */
2792 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2793 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2795 /* We need a new destination operand each time bitpos is on
2797 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2799 else if (bitpos
% BITS_PER_WORD
== 0)
2800 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2802 /* Use xbitpos for the source extraction (right justified) and
2803 bitpos for the destination store (left justified). */
2804 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2805 extract_bit_field (src
, bitsize
,
2806 xbitpos
% BITS_PER_WORD
, 1,
2807 NULL_RTX
, copy_mode
, copy_mode
,
2813 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2814 register if it contains any data, otherwise return null.
2816 This is used on targets that return BLKmode values in registers. */
2819 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2822 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2823 unsigned int bitsize
;
2824 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2825 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2826 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2827 fixed_size_mode dst_mode
;
2828 scalar_int_mode min_mode
;
2830 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2832 x
= expand_normal (src
);
2834 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2838 /* If the structure doesn't take up a whole number of words, see
2839 whether the register value should be padded on the left or on
2840 the right. Set PADDING_CORRECTION to the number of padding
2841 bits needed on the left side.
2843 In most ABIs, the structure will be returned at the least end of
2844 the register, which translates to right padding on little-endian
2845 targets and left padding on big-endian targets. The opposite
2846 holds if the structure is returned at the most significant
2847 end of the register. */
2848 if (bytes
% UNITS_PER_WORD
!= 0
2849 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2851 : BYTES_BIG_ENDIAN
))
2852 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2855 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2856 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2857 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2858 min_mode
= smallest_int_mode_for_size (bitsize
);
2860 /* Copy the structure BITSIZE bits at a time. */
2861 for (bitpos
= 0, xbitpos
= padding_correction
;
2862 bitpos
< bytes
* BITS_PER_UNIT
;
2863 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2865 /* We need a new destination pseudo each time xbitpos is
2866 on a word boundary and when xbitpos == padding_correction
2867 (the first time through). */
2868 if (xbitpos
% BITS_PER_WORD
== 0
2869 || xbitpos
== padding_correction
)
2871 /* Generate an appropriate register. */
2872 dst_word
= gen_reg_rtx (word_mode
);
2873 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2875 /* Clear the destination before we move anything into it. */
2876 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2879 /* Find the largest integer mode that can be used to copy all or as
2880 many bits as possible of the structure if the target supports larger
2881 copies. There are too many corner cases here w.r.t to alignments on
2882 the read/writes. So if there is any padding just use single byte
2884 opt_scalar_int_mode mode_iter
;
2885 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2887 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2889 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2890 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2891 && msize
<= BITS_PER_WORD
)
2898 /* We need a new source operand each time bitpos is on a word
2900 if (bitpos
% BITS_PER_WORD
== 0)
2901 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2903 /* Use bitpos for the source extraction (left justified) and
2904 xbitpos for the destination store (right justified). */
2905 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2907 extract_bit_field (src_word
, bitsize
,
2908 bitpos
% BITS_PER_WORD
, 1,
2909 NULL_RTX
, word_mode
, word_mode
,
2914 if (mode
== BLKmode
)
2916 /* Find the smallest integer mode large enough to hold the
2917 entire structure. */
2918 opt_scalar_int_mode mode_iter
;
2919 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2920 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2923 /* A suitable mode should have been found. */
2924 mode
= mode_iter
.require ();
2927 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2928 dst_mode
= word_mode
;
2931 dst
= gen_reg_rtx (dst_mode
);
2933 for (i
= 0; i
< n_regs
; i
++)
2934 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2936 if (mode
!= dst_mode
)
2937 dst
= gen_lowpart (mode
, dst
);
2942 /* Add a USE expression for REG to the (possibly empty) list pointed
2943 to by CALL_FUSAGE. REG must denote a hard register. */
2946 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2948 gcc_assert (REG_P (reg
));
2950 if (!HARD_REGISTER_P (reg
))
2954 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2957 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2958 to by CALL_FUSAGE. REG must denote a hard register. */
2961 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2963 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2966 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2969 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2970 starting at REGNO. All of these registers must be hard registers. */
2973 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2977 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2979 for (i
= 0; i
< nregs
; i
++)
2980 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2983 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2984 PARALLEL REGS. This is for calls that pass values in multiple
2985 non-contiguous locations. The Irix 6 ABI has examples of this. */
2988 use_group_regs (rtx
*call_fusage
, rtx regs
)
2992 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2994 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2996 /* A NULL entry means the parameter goes both on the stack and in
2997 registers. This can also be a MEM for targets that pass values
2998 partially on the stack and partially in registers. */
2999 if (reg
!= 0 && REG_P (reg
))
3000 use_reg (call_fusage
, reg
);
3004 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3005 assigment and the code of the expresion on the RHS is CODE. Return
3009 get_def_for_expr (tree name
, enum tree_code code
)
3013 if (TREE_CODE (name
) != SSA_NAME
)
3016 def_stmt
= get_gimple_for_ssa_name (name
);
3018 || gimple_assign_rhs_code (def_stmt
) != code
)
3024 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3025 assigment and the class of the expresion on the RHS is CLASS. Return
3029 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
3033 if (TREE_CODE (name
) != SSA_NAME
)
3036 def_stmt
= get_gimple_for_ssa_name (name
);
3038 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
3044 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
3045 its length in bytes. */
3048 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
3049 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3050 unsigned HOST_WIDE_INT min_size
,
3051 unsigned HOST_WIDE_INT max_size
,
3052 unsigned HOST_WIDE_INT probable_max_size
)
3054 machine_mode mode
= GET_MODE (object
);
3057 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3059 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3060 just move a zero. Otherwise, do this a piece at a time. */
3061 poly_int64 size_val
;
3063 && poly_int_rtx_p (size
, &size_val
)
3064 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3066 rtx zero
= CONST0_RTX (mode
);
3069 emit_move_insn (object
, zero
);
3073 if (COMPLEX_MODE_P (mode
))
3075 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3078 write_complex_part (object
, zero
, 0);
3079 write_complex_part (object
, zero
, 1);
3085 if (size
== const0_rtx
)
3088 align
= MEM_ALIGN (object
);
3090 if (CONST_INT_P (size
)
3091 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3093 optimize_insn_for_speed_p ()))
3094 clear_by_pieces (object
, INTVAL (size
), align
);
3095 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3096 expected_align
, expected_size
,
3097 min_size
, max_size
, probable_max_size
))
3099 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3100 return set_storage_via_libcall (object
, size
, const0_rtx
,
3101 method
== BLOCK_OP_TAILCALL
);
3109 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3111 unsigned HOST_WIDE_INT max
, min
= 0;
3112 if (GET_CODE (size
) == CONST_INT
)
3113 min
= max
= UINTVAL (size
);
3115 max
= GET_MODE_MASK (GET_MODE (size
));
3116 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3120 /* A subroutine of clear_storage. Expand a call to memset.
3121 Return the return value of memset, 0 otherwise. */
3124 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3126 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3127 machine_mode size_mode
;
3129 object
= copy_addr_to_reg (XEXP (object
, 0));
3130 object_tree
= make_tree (ptr_type_node
, object
);
3132 if (!CONST_INT_P (val
))
3133 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3134 val_tree
= make_tree (integer_type_node
, val
);
3136 size_mode
= TYPE_MODE (sizetype
);
3137 size
= convert_to_mode (size_mode
, size
, 1);
3138 size
= copy_to_mode_reg (size_mode
, size
);
3139 size_tree
= make_tree (sizetype
, size
);
3141 /* It is incorrect to use the libcall calling conventions for calls to
3142 memset because it can be provided by the user. */
3143 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3144 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3145 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3147 return expand_call (call_expr
, NULL_RTX
, false);
3150 /* Expand a setmem pattern; return true if successful. */
3153 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3154 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3155 unsigned HOST_WIDE_INT min_size
,
3156 unsigned HOST_WIDE_INT max_size
,
3157 unsigned HOST_WIDE_INT probable_max_size
)
3159 /* Try the most limited insn first, because there's no point
3160 including more than one in the machine description unless
3161 the more limited one has some advantage. */
3163 if (expected_align
< align
)
3164 expected_align
= align
;
3165 if (expected_size
!= -1)
3167 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3168 expected_size
= max_size
;
3169 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3170 expected_size
= min_size
;
3173 opt_scalar_int_mode mode_iter
;
3174 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3176 scalar_int_mode mode
= mode_iter
.require ();
3177 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3179 if (code
!= CODE_FOR_nothing
3180 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3181 here because if SIZE is less than the mode mask, as it is
3182 returned by the macro, it will definitely be less than the
3183 actual mode mask. Since SIZE is within the Pmode address
3184 space, we limit MODE to Pmode. */
3185 && ((CONST_INT_P (size
)
3186 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3187 <= (GET_MODE_MASK (mode
) >> 1)))
3188 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3189 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3191 class expand_operand ops
[9];
3194 nops
= insn_data
[(int) code
].n_generator_args
;
3195 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3197 create_fixed_operand (&ops
[0], object
);
3198 /* The check above guarantees that this size conversion is valid. */
3199 create_convert_operand_to (&ops
[1], size
, mode
, true);
3200 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3201 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3204 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3205 create_integer_operand (&ops
[5], expected_size
);
3209 create_integer_operand (&ops
[6], min_size
);
3210 /* If we cannot represent the maximal size,
3211 make parameter NULL. */
3212 if ((HOST_WIDE_INT
) max_size
!= -1)
3213 create_integer_operand (&ops
[7], max_size
);
3215 create_fixed_operand (&ops
[7], NULL
);
3219 /* If we cannot represent the maximal size,
3220 make parameter NULL. */
3221 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3222 create_integer_operand (&ops
[8], probable_max_size
);
3224 create_fixed_operand (&ops
[8], NULL
);
3226 if (maybe_expand_insn (code
, nops
, ops
))
3235 /* Write to one of the components of the complex value CPLX. Write VAL to
3236 the real part if IMAG_P is false, and the imaginary part if its true. */
3239 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3245 if (GET_CODE (cplx
) == CONCAT
)
3247 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3251 cmode
= GET_MODE (cplx
);
3252 imode
= GET_MODE_INNER (cmode
);
3253 ibitsize
= GET_MODE_BITSIZE (imode
);
3255 /* For MEMs simplify_gen_subreg may generate an invalid new address
3256 because, e.g., the original address is considered mode-dependent
3257 by the target, which restricts simplify_subreg from invoking
3258 adjust_address_nv. Instead of preparing fallback support for an
3259 invalid address, we call adjust_address_nv directly. */
3262 emit_move_insn (adjust_address_nv (cplx
, imode
,
3263 imag_p
? GET_MODE_SIZE (imode
) : 0),
3268 /* If the sub-object is at least word sized, then we know that subregging
3269 will work. This special case is important, since store_bit_field
3270 wants to operate on integer modes, and there's rarely an OImode to
3271 correspond to TCmode. */
3272 if (ibitsize
>= BITS_PER_WORD
3273 /* For hard regs we have exact predicates. Assume we can split
3274 the original object if it spans an even number of hard regs.
3275 This special case is important for SCmode on 64-bit platforms
3276 where the natural size of floating-point regs is 32-bit. */
3278 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3279 && REG_NREGS (cplx
) % 2 == 0))
3281 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3282 imag_p
? GET_MODE_SIZE (imode
) : 0);
3285 emit_move_insn (part
, val
);
3289 /* simplify_gen_subreg may fail for sub-word MEMs. */
3290 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3293 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3297 /* Extract one of the components of the complex value CPLX. Extract the
3298 real part if IMAG_P is false, and the imaginary part if it's true. */
3301 read_complex_part (rtx cplx
, bool imag_p
)
3307 if (GET_CODE (cplx
) == CONCAT
)
3308 return XEXP (cplx
, imag_p
);
3310 cmode
= GET_MODE (cplx
);
3311 imode
= GET_MODE_INNER (cmode
);
3312 ibitsize
= GET_MODE_BITSIZE (imode
);
3314 /* Special case reads from complex constants that got spilled to memory. */
3315 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3317 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3318 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3320 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3321 if (CONSTANT_CLASS_P (part
))
3322 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3326 /* For MEMs simplify_gen_subreg may generate an invalid new address
3327 because, e.g., the original address is considered mode-dependent
3328 by the target, which restricts simplify_subreg from invoking
3329 adjust_address_nv. Instead of preparing fallback support for an
3330 invalid address, we call adjust_address_nv directly. */
3332 return adjust_address_nv (cplx
, imode
,
3333 imag_p
? GET_MODE_SIZE (imode
) : 0);
3335 /* If the sub-object is at least word sized, then we know that subregging
3336 will work. This special case is important, since extract_bit_field
3337 wants to operate on integer modes, and there's rarely an OImode to
3338 correspond to TCmode. */
3339 if (ibitsize
>= BITS_PER_WORD
3340 /* For hard regs we have exact predicates. Assume we can split
3341 the original object if it spans an even number of hard regs.
3342 This special case is important for SCmode on 64-bit platforms
3343 where the natural size of floating-point regs is 32-bit. */
3345 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3346 && REG_NREGS (cplx
) % 2 == 0))
3348 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3349 imag_p
? GET_MODE_SIZE (imode
) : 0);
3353 /* simplify_gen_subreg may fail for sub-word MEMs. */
3354 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3357 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3358 true, NULL_RTX
, imode
, imode
, false, NULL
);
3361 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3362 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3363 represented in NEW_MODE. If FORCE is true, this will never happen, as
3364 we'll force-create a SUBREG if needed. */
3367 emit_move_change_mode (machine_mode new_mode
,
3368 machine_mode old_mode
, rtx x
, bool force
)
3372 if (push_operand (x
, GET_MODE (x
)))
3374 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3375 MEM_COPY_ATTRIBUTES (ret
, x
);
3379 /* We don't have to worry about changing the address since the
3380 size in bytes is supposed to be the same. */
3381 if (reload_in_progress
)
3383 /* Copy the MEM to change the mode and move any
3384 substitutions from the old MEM to the new one. */
3385 ret
= adjust_address_nv (x
, new_mode
, 0);
3386 copy_replacements (x
, ret
);
3389 ret
= adjust_address (x
, new_mode
, 0);
3393 /* Note that we do want simplify_subreg's behavior of validating
3394 that the new mode is ok for a hard register. If we were to use
3395 simplify_gen_subreg, we would create the subreg, but would
3396 probably run into the target not being able to implement it. */
3397 /* Except, of course, when FORCE is true, when this is exactly what
3398 we want. Which is needed for CCmodes on some targets. */
3400 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3402 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3408 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3409 an integer mode of the same size as MODE. Returns the instruction
3410 emitted, or NULL if such a move could not be generated. */
3413 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3415 scalar_int_mode imode
;
3416 enum insn_code code
;
3418 /* There must exist a mode of the exact size we require. */
3419 if (!int_mode_for_mode (mode
).exists (&imode
))
3422 /* The target must support moves in this mode. */
3423 code
= optab_handler (mov_optab
, imode
);
3424 if (code
== CODE_FOR_nothing
)
3427 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3430 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3433 return emit_insn (GEN_FCN (code
) (x
, y
));
3436 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3437 Return an equivalent MEM that does not use an auto-increment. */
3440 emit_move_resolve_push (machine_mode mode
, rtx x
)
3442 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3445 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3446 #ifdef PUSH_ROUNDING
3447 adjust
= PUSH_ROUNDING (adjust
);
3449 if (code
== PRE_DEC
|| code
== POST_DEC
)
3451 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3453 rtx expr
= XEXP (XEXP (x
, 0), 1);
3455 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3456 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3457 if (GET_CODE (expr
) == MINUS
)
3459 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3463 /* Do not use anti_adjust_stack, since we don't want to update
3464 stack_pointer_delta. */
3465 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3466 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3467 0, OPTAB_LIB_WIDEN
);
3468 if (temp
!= stack_pointer_rtx
)
3469 emit_move_insn (stack_pointer_rtx
, temp
);
3476 temp
= stack_pointer_rtx
;
3481 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3487 return replace_equiv_address (x
, temp
);
3490 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3491 X is known to satisfy push_operand, and MODE is known to be complex.
3492 Returns the last instruction emitted. */
3495 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3497 scalar_mode submode
= GET_MODE_INNER (mode
);
3500 #ifdef PUSH_ROUNDING
3501 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3503 /* In case we output to the stack, but the size is smaller than the
3504 machine can push exactly, we need to use move instructions. */
3505 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3507 x
= emit_move_resolve_push (mode
, x
);
3508 return emit_move_insn (x
, y
);
3512 /* Note that the real part always precedes the imag part in memory
3513 regardless of machine's endianness. */
3514 switch (GET_CODE (XEXP (x
, 0)))
3528 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3529 read_complex_part (y
, imag_first
));
3530 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3531 read_complex_part (y
, !imag_first
));
3534 /* A subroutine of emit_move_complex. Perform the move from Y to X
3535 via two moves of the parts. Returns the last instruction emitted. */
3538 emit_move_complex_parts (rtx x
, rtx y
)
3540 /* Show the output dies here. This is necessary for SUBREGs
3541 of pseudos since we cannot track their lifetimes correctly;
3542 hard regs shouldn't appear here except as return values. */
3543 if (!reload_completed
&& !reload_in_progress
3544 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3547 write_complex_part (x
, read_complex_part (y
, false), false);
3548 write_complex_part (x
, read_complex_part (y
, true), true);
3550 return get_last_insn ();
3553 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3554 MODE is known to be complex. Returns the last instruction emitted. */
3557 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3561 /* Need to take special care for pushes, to maintain proper ordering
3562 of the data, and possibly extra padding. */
3563 if (push_operand (x
, mode
))
3564 return emit_move_complex_push (mode
, x
, y
);
3566 /* See if we can coerce the target into moving both values at once, except
3567 for floating point where we favor moving as parts if this is easy. */
3568 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3569 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3571 && HARD_REGISTER_P (x
)
3572 && REG_NREGS (x
) == 1)
3574 && HARD_REGISTER_P (y
)
3575 && REG_NREGS (y
) == 1))
3577 /* Not possible if the values are inherently not adjacent. */
3578 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3580 /* Is possible if both are registers (or subregs of registers). */
3581 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3583 /* If one of the operands is a memory, and alignment constraints
3584 are friendly enough, we may be able to do combined memory operations.
3585 We do not attempt this if Y is a constant because that combination is
3586 usually better with the by-parts thing below. */
3587 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3588 && (!STRICT_ALIGNMENT
3589 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3598 /* For memory to memory moves, optimal behavior can be had with the
3599 existing block move logic. But use normal expansion if optimizing
3601 if (MEM_P (x
) && MEM_P (y
))
3603 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3604 (optimize_insn_for_speed_p()
3605 ? BLOCK_OP_NO_LIBCALL
: BLOCK_OP_NORMAL
));
3606 return get_last_insn ();
3609 ret
= emit_move_via_integer (mode
, x
, y
, true);
3614 return emit_move_complex_parts (x
, y
);
3617 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3618 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3621 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3625 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3628 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3629 if (code
!= CODE_FOR_nothing
)
3631 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3632 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3633 return emit_insn (GEN_FCN (code
) (x
, y
));
3637 /* Otherwise, find the MODE_INT mode of the same width. */
3638 ret
= emit_move_via_integer (mode
, x
, y
, false);
3639 gcc_assert (ret
!= NULL
);
3643 /* Return true if word I of OP lies entirely in the
3644 undefined bits of a paradoxical subreg. */
3647 undefined_operand_subword_p (const_rtx op
, int i
)
3649 if (GET_CODE (op
) != SUBREG
)
3651 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3652 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3653 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3654 || known_le (offset
, -UNITS_PER_WORD
));
3657 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3658 MODE is any multi-word or full-word mode that lacks a move_insn
3659 pattern. Note that you will get better code if you define such
3660 patterns, even if they must turn into multiple assembler instructions. */
3663 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3665 rtx_insn
*last_insn
= 0;
3671 /* This function can only handle cases where the number of words is
3672 known at compile time. */
3673 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3674 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3676 /* If X is a push on the stack, do the push now and replace
3677 X with a reference to the stack pointer. */
3678 if (push_operand (x
, mode
))
3679 x
= emit_move_resolve_push (mode
, x
);
3681 /* If we are in reload, see if either operand is a MEM whose address
3682 is scheduled for replacement. */
3683 if (reload_in_progress
&& MEM_P (x
)
3684 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3685 x
= replace_equiv_address_nv (x
, inner
);
3686 if (reload_in_progress
&& MEM_P (y
)
3687 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3688 y
= replace_equiv_address_nv (y
, inner
);
3692 need_clobber
= false;
3693 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3695 /* Do not generate code for a move if it would go entirely
3696 to the non-existing bits of a paradoxical subreg. */
3697 if (undefined_operand_subword_p (x
, i
))
3700 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3703 /* Do not generate code for a move if it would come entirely
3704 from the undefined bits of a paradoxical subreg. */
3705 if (undefined_operand_subword_p (y
, i
))
3708 ypart
= operand_subword (y
, i
, 1, mode
);
3710 /* If we can't get a part of Y, put Y into memory if it is a
3711 constant. Otherwise, force it into a register. Then we must
3712 be able to get a part of Y. */
3713 if (ypart
== 0 && CONSTANT_P (y
))
3715 y
= use_anchored_address (force_const_mem (mode
, y
));
3716 ypart
= operand_subword (y
, i
, 1, mode
);
3718 else if (ypart
== 0)
3719 ypart
= operand_subword_force (y
, i
, mode
);
3721 gcc_assert (xpart
&& ypart
);
3723 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3725 last_insn
= emit_move_insn (xpart
, ypart
);
3731 /* Show the output dies here. This is necessary for SUBREGs
3732 of pseudos since we cannot track their lifetimes correctly;
3733 hard regs shouldn't appear here except as return values.
3734 We never want to emit such a clobber after reload. */
3736 && ! (reload_in_progress
|| reload_completed
)
3737 && need_clobber
!= 0)
3745 /* Low level part of emit_move_insn.
3746 Called just like emit_move_insn, but assumes X and Y
3747 are basically valid. */
3750 emit_move_insn_1 (rtx x
, rtx y
)
3752 machine_mode mode
= GET_MODE (x
);
3753 enum insn_code code
;
3755 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3757 code
= optab_handler (mov_optab
, mode
);
3758 if (code
!= CODE_FOR_nothing
)
3759 return emit_insn (GEN_FCN (code
) (x
, y
));
3761 /* Expand complex moves by moving real part and imag part. */
3762 if (COMPLEX_MODE_P (mode
))
3763 return emit_move_complex (mode
, x
, y
);
3765 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3766 || ALL_FIXED_POINT_MODE_P (mode
))
3768 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3770 /* If we can't find an integer mode, use multi words. */
3774 return emit_move_multi_word (mode
, x
, y
);
3777 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3778 return emit_move_ccmode (mode
, x
, y
);
3780 /* Try using a move pattern for the corresponding integer mode. This is
3781 only safe when simplify_subreg can convert MODE constants into integer
3782 constants. At present, it can only do this reliably if the value
3783 fits within a HOST_WIDE_INT. */
3785 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3787 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3791 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3796 return emit_move_multi_word (mode
, x
, y
);
3799 /* Generate code to copy Y into X.
3800 Both Y and X must have the same mode, except that
3801 Y can be a constant with VOIDmode.
3802 This mode cannot be BLKmode; use emit_block_move for that.
3804 Return the last instruction emitted. */
3807 emit_move_insn (rtx x
, rtx y
)
3809 machine_mode mode
= GET_MODE (x
);
3810 rtx y_cst
= NULL_RTX
;
3811 rtx_insn
*last_insn
;
3814 gcc_assert (mode
!= BLKmode
3815 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3817 /* If we have a copy that looks like one of the following patterns:
3818 (set (subreg:M1 (reg:M2 ...)) (subreg:M1 (reg:M2 ...)))
3819 (set (subreg:M1 (reg:M2 ...)) (mem:M1 ADDR))
3820 (set (mem:M1 ADDR) (subreg:M1 (reg:M2 ...)))
3821 (set (subreg:M1 (reg:M2 ...)) (constant C))
3822 where mode M1 is equal in size to M2, try to detect whether the
3823 mode change involves an implicit round trip through memory.
3824 If so, see if we can avoid that by removing the subregs and
3825 doing the move in mode M2 instead. */
3827 rtx x_inner
= NULL_RTX
;
3828 rtx y_inner
= NULL_RTX
;
3830 auto candidate_subreg_p
= [&](rtx subreg
) {
3831 return (REG_P (SUBREG_REG (subreg
))
3832 && known_eq (GET_MODE_SIZE (GET_MODE (SUBREG_REG (subreg
))),
3833 GET_MODE_SIZE (GET_MODE (subreg
)))
3834 && optab_handler (mov_optab
, GET_MODE (SUBREG_REG (subreg
)))
3835 != CODE_FOR_nothing
);
3838 auto candidate_mem_p
= [&](machine_mode innermode
, rtx mem
) {
3839 return (!targetm
.can_change_mode_class (innermode
, GET_MODE (mem
), ALL_REGS
)
3840 && !push_operand (mem
, GET_MODE (mem
))
3841 /* Not a candiate if innermode requires too much alignment. */
3842 && (MEM_ALIGN (mem
) >= GET_MODE_ALIGNMENT (innermode
)
3843 || targetm
.slow_unaligned_access (GET_MODE (mem
),
3845 || !targetm
.slow_unaligned_access (innermode
,
3849 if (SUBREG_P (x
) && candidate_subreg_p (x
))
3850 x_inner
= SUBREG_REG (x
);
3852 if (SUBREG_P (y
) && candidate_subreg_p (y
))
3853 y_inner
= SUBREG_REG (y
);
3855 if (x_inner
!= NULL_RTX
3856 && y_inner
!= NULL_RTX
3857 && GET_MODE (x_inner
) == GET_MODE (y_inner
)
3858 && !targetm
.can_change_mode_class (GET_MODE (x_inner
), mode
, ALL_REGS
))
3862 mode
= GET_MODE (x_inner
);
3864 else if (x_inner
!= NULL_RTX
3866 && candidate_mem_p (GET_MODE (x_inner
), y
))
3869 y
= adjust_address (y
, GET_MODE (x_inner
), 0);
3870 mode
= GET_MODE (x_inner
);
3872 else if (y_inner
!= NULL_RTX
3874 && candidate_mem_p (GET_MODE (y_inner
), x
))
3876 x
= adjust_address (x
, GET_MODE (y_inner
), 0);
3878 mode
= GET_MODE (y_inner
);
3880 else if (x_inner
!= NULL_RTX
3882 && !targetm
.can_change_mode_class (GET_MODE (x_inner
),
3884 && (y_inner
= simplify_subreg (GET_MODE (x_inner
), y
, mode
, 0)))
3888 mode
= GET_MODE (x_inner
);
3894 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3895 && (last_insn
= compress_float_constant (x
, y
)))
3900 if (!targetm
.legitimate_constant_p (mode
, y
))
3902 y
= force_const_mem (mode
, y
);
3904 /* If the target's cannot_force_const_mem prevented the spill,
3905 assume that the target's move expanders will also take care
3906 of the non-legitimate constant. */
3910 y
= use_anchored_address (y
);
3914 /* If X or Y are memory references, verify that their addresses are valid
3917 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3919 && ! push_operand (x
, GET_MODE (x
))))
3920 x
= validize_mem (x
);
3923 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3924 MEM_ADDR_SPACE (y
)))
3925 y
= validize_mem (y
);
3927 gcc_assert (mode
!= BLKmode
);
3929 last_insn
= emit_move_insn_1 (x
, y
);
3931 if (y_cst
&& REG_P (x
)
3932 && (set
= single_set (last_insn
)) != NULL_RTX
3933 && SET_DEST (set
) == x
3934 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3935 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3940 /* Generate the body of an instruction to copy Y into X.
3941 It may be a list of insns, if one insn isn't enough. */
3944 gen_move_insn (rtx x
, rtx y
)
3949 emit_move_insn_1 (x
, y
);
3955 /* If Y is representable exactly in a narrower mode, and the target can
3956 perform the extension directly from constant or memory, then emit the
3957 move as an extension. */
3960 compress_float_constant (rtx x
, rtx y
)
3962 machine_mode dstmode
= GET_MODE (x
);
3963 machine_mode orig_srcmode
= GET_MODE (y
);
3964 machine_mode srcmode
;
3965 const REAL_VALUE_TYPE
*r
;
3966 int oldcost
, newcost
;
3967 bool speed
= optimize_insn_for_speed_p ();
3969 r
= CONST_DOUBLE_REAL_VALUE (y
);
3971 if (targetm
.legitimate_constant_p (dstmode
, y
))
3972 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3974 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3976 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3980 rtx_insn
*last_insn
;
3982 /* Skip if the target can't extend this way. */
3983 ic
= can_extend_p (dstmode
, srcmode
, 0);
3984 if (ic
== CODE_FOR_nothing
)
3987 /* Skip if the narrowed value isn't exact. */
3988 if (! exact_real_truncate (srcmode
, r
))
3991 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3993 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3995 /* Skip if the target needs extra instructions to perform
3997 if (!insn_operand_matches (ic
, 1, trunc_y
))
3999 /* This is valid, but may not be cheaper than the original. */
4000 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4002 if (oldcost
< newcost
)
4005 else if (float_extend_from_mem
[dstmode
][srcmode
])
4007 trunc_y
= force_const_mem (srcmode
, trunc_y
);
4008 /* This is valid, but may not be cheaper than the original. */
4009 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4011 if (oldcost
< newcost
)
4013 trunc_y
= validize_mem (trunc_y
);
4018 /* For CSE's benefit, force the compressed constant pool entry
4019 into a new pseudo. This constant may be used in different modes,
4020 and if not, combine will put things back together for us. */
4021 trunc_y
= force_reg (srcmode
, trunc_y
);
4023 /* If x is a hard register, perform the extension into a pseudo,
4024 so that e.g. stack realignment code is aware of it. */
4026 if (REG_P (x
) && HARD_REGISTER_P (x
))
4027 target
= gen_reg_rtx (dstmode
);
4029 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
4030 last_insn
= get_last_insn ();
4033 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
4036 return emit_move_insn (x
, target
);
4043 /* Pushing data onto the stack. */
4045 /* Push a block of length SIZE (perhaps variable)
4046 and return an rtx to address the beginning of the block.
4047 The value may be virtual_outgoing_args_rtx.
4049 EXTRA is the number of bytes of padding to push in addition to SIZE.
4050 BELOW nonzero means this padding comes at low addresses;
4051 otherwise, the padding comes at high addresses. */
4054 push_block (rtx size
, poly_int64 extra
, int below
)
4058 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
4059 if (CONSTANT_P (size
))
4060 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
4061 else if (REG_P (size
) && known_eq (extra
, 0))
4062 anti_adjust_stack (size
);
4065 temp
= copy_to_mode_reg (Pmode
, size
);
4066 if (maybe_ne (extra
, 0))
4067 temp
= expand_binop (Pmode
, add_optab
, temp
,
4068 gen_int_mode (extra
, Pmode
),
4069 temp
, 0, OPTAB_LIB_WIDEN
);
4070 anti_adjust_stack (temp
);
4073 if (STACK_GROWS_DOWNWARD
)
4075 temp
= virtual_outgoing_args_rtx
;
4076 if (maybe_ne (extra
, 0) && below
)
4077 temp
= plus_constant (Pmode
, temp
, extra
);
4082 if (poly_int_rtx_p (size
, &csize
))
4083 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
4084 -csize
- (below
? 0 : extra
));
4085 else if (maybe_ne (extra
, 0) && !below
)
4086 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4087 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
4090 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4091 negate_rtx (Pmode
, size
));
4094 return memory_address (NARROWEST_INT_MODE
, temp
);
4097 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
4100 mem_autoinc_base (rtx mem
)
4104 rtx addr
= XEXP (mem
, 0);
4105 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
4106 return XEXP (addr
, 0);
4111 /* A utility routine used here, in reload, and in try_split. The insns
4112 after PREV up to and including LAST are known to adjust the stack,
4113 with a final value of END_ARGS_SIZE. Iterate backward from LAST
4114 placing notes as appropriate. PREV may be NULL, indicating the
4115 entire insn sequence prior to LAST should be scanned.
4117 The set of allowed stack pointer modifications is small:
4118 (1) One or more auto-inc style memory references (aka pushes),
4119 (2) One or more addition/subtraction with the SP as destination,
4120 (3) A single move insn with the SP as destination,
4121 (4) A call_pop insn,
4122 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
4124 Insns in the sequence that do not modify the SP are ignored,
4125 except for noreturn calls.
4127 The return value is the amount of adjustment that can be trivially
4128 verified, via immediate operand or auto-inc. If the adjustment
4129 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
4132 find_args_size_adjust (rtx_insn
*insn
)
4137 pat
= PATTERN (insn
);
4140 /* Look for a call_pop pattern. */
4143 /* We have to allow non-call_pop patterns for the case
4144 of emit_single_push_insn of a TLS address. */
4145 if (GET_CODE (pat
) != PARALLEL
)
4148 /* All call_pop have a stack pointer adjust in the parallel.
4149 The call itself is always first, and the stack adjust is
4150 usually last, so search from the end. */
4151 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4153 set
= XVECEXP (pat
, 0, i
);
4154 if (GET_CODE (set
) != SET
)
4156 dest
= SET_DEST (set
);
4157 if (dest
== stack_pointer_rtx
)
4160 /* We'd better have found the stack pointer adjust. */
4163 /* Fall through to process the extracted SET and DEST
4164 as if it was a standalone insn. */
4166 else if (GET_CODE (pat
) == SET
)
4168 else if ((set
= single_set (insn
)) != NULL
)
4170 else if (GET_CODE (pat
) == PARALLEL
)
4172 /* ??? Some older ports use a parallel with a stack adjust
4173 and a store for a PUSH_ROUNDING pattern, rather than a
4174 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4175 /* ??? See h8300 and m68k, pushqi1. */
4176 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4178 set
= XVECEXP (pat
, 0, i
);
4179 if (GET_CODE (set
) != SET
)
4181 dest
= SET_DEST (set
);
4182 if (dest
== stack_pointer_rtx
)
4185 /* We do not expect an auto-inc of the sp in the parallel. */
4186 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4187 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4188 != stack_pointer_rtx
);
4196 dest
= SET_DEST (set
);
4198 /* Look for direct modifications of the stack pointer. */
4199 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4201 /* Look for a trivial adjustment, otherwise assume nothing. */
4202 /* Note that the SPU restore_stack_block pattern refers to
4203 the stack pointer in V4SImode. Consider that non-trivial. */
4205 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4206 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4208 /* ??? Reload can generate no-op moves, which will be cleaned
4209 up later. Recognize it and continue searching. */
4210 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4213 return HOST_WIDE_INT_MIN
;
4219 /* Otherwise only think about autoinc patterns. */
4220 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4223 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4224 != stack_pointer_rtx
);
4226 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4227 mem
= SET_SRC (set
);
4231 addr
= XEXP (mem
, 0);
4232 switch (GET_CODE (addr
))
4236 return GET_MODE_SIZE (GET_MODE (mem
));
4239 return -GET_MODE_SIZE (GET_MODE (mem
));
4242 addr
= XEXP (addr
, 1);
4243 gcc_assert (GET_CODE (addr
) == PLUS
);
4244 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4245 return rtx_to_poly_int64 (XEXP (addr
, 1));
4253 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4254 poly_int64 end_args_size
)
4256 poly_int64 args_size
= end_args_size
;
4257 bool saw_unknown
= false;
4260 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4262 if (!NONDEBUG_INSN_P (insn
))
4265 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4266 a call argument containing a TLS address that itself requires
4267 a call to __tls_get_addr. The handling of stack_pointer_delta
4268 in emit_single_push_insn is supposed to ensure that any such
4269 notes are already correct. */
4270 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4271 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4273 poly_int64 this_delta
= find_args_size_adjust (insn
);
4274 if (known_eq (this_delta
, 0))
4277 || ACCUMULATE_OUTGOING_ARGS
4278 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4282 gcc_assert (!saw_unknown
);
4283 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4287 add_args_size_note (insn
, args_size
);
4288 if (STACK_GROWS_DOWNWARD
)
4289 this_delta
= -poly_uint64 (this_delta
);
4292 args_size
= HOST_WIDE_INT_MIN
;
4294 args_size
-= this_delta
;
4300 #ifdef PUSH_ROUNDING
4301 /* Emit single push insn. */
4304 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4307 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4309 enum insn_code icode
;
4311 /* If there is push pattern, use it. Otherwise try old way of throwing
4312 MEM representing push operation to move expander. */
4313 icode
= optab_handler (push_optab
, mode
);
4314 if (icode
!= CODE_FOR_nothing
)
4316 class expand_operand ops
[1];
4318 create_input_operand (&ops
[0], x
, mode
);
4319 if (maybe_expand_insn (icode
, 1, ops
))
4322 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4323 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4324 /* If we are to pad downward, adjust the stack pointer first and
4325 then store X into the stack location using an offset. This is
4326 because emit_move_insn does not know how to pad; it does not have
4328 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4330 emit_move_insn (stack_pointer_rtx
,
4331 expand_binop (Pmode
,
4332 STACK_GROWS_DOWNWARD
? sub_optab
4335 gen_int_mode (rounded_size
, Pmode
),
4336 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4338 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4339 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4340 /* We have already decremented the stack pointer, so get the
4342 offset
+= rounded_size
;
4344 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4345 /* We have already incremented the stack pointer, so get the
4347 offset
-= rounded_size
;
4349 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4353 if (STACK_GROWS_DOWNWARD
)
4354 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4355 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4357 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4358 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4360 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4363 dest
= gen_rtx_MEM (mode
, dest_addr
);
4367 set_mem_attributes (dest
, type
, 1);
4369 if (cfun
->tail_call_marked
)
4370 /* Function incoming arguments may overlap with sibling call
4371 outgoing arguments and we cannot allow reordering of reads
4372 from function arguments with stores to outgoing arguments
4373 of sibling calls. */
4374 set_mem_alias_set (dest
, 0);
4376 emit_move_insn (dest
, x
);
4379 /* Emit and annotate a single push insn. */
4382 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4384 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4385 rtx_insn
*prev
= get_last_insn ();
4388 emit_single_push_insn_1 (mode
, x
, type
);
4390 /* Adjust stack_pointer_delta to describe the situation after the push
4391 we just performed. Note that we must do this after the push rather
4392 than before the push in case calculating X needs pushes and pops of
4393 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4394 for such pushes and pops must not include the effect of the future
4396 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4398 last
= get_last_insn ();
4400 /* Notice the common case where we emitted exactly one insn. */
4401 if (PREV_INSN (last
) == prev
)
4403 add_args_size_note (last
, stack_pointer_delta
);
4407 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4408 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4409 || known_eq (delta
, old_delta
));
4413 /* If reading SIZE bytes from X will end up reading from
4414 Y return the number of bytes that overlap. Return -1
4415 if there is no overlap or -2 if we can't determine
4416 (for example when X and Y have different base registers). */
4419 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4421 rtx tmp
= plus_constant (Pmode
, x
, size
);
4422 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4424 if (!CONST_INT_P (sub
))
4427 HOST_WIDE_INT val
= INTVAL (sub
);
4429 return IN_RANGE (val
, 1, size
) ? val
: -1;
4432 /* Generate code to push X onto the stack, assuming it has mode MODE and
4434 MODE is redundant except when X is a CONST_INT (since they don't
4436 SIZE is an rtx for the size of data to be copied (in bytes),
4437 needed only if X is BLKmode.
4438 Return true if successful. May return false if asked to push a
4439 partial argument during a sibcall optimization (as specified by
4440 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4443 ALIGN (in bits) is maximum alignment we can assume.
4445 If PARTIAL and REG are both nonzero, then copy that many of the first
4446 bytes of X into registers starting with REG, and push the rest of X.
4447 The amount of space pushed is decreased by PARTIAL bytes.
4448 REG must be a hard register in this case.
4449 If REG is zero but PARTIAL is not, take any all others actions for an
4450 argument partially in registers, but do not actually load any
4453 EXTRA is the amount in bytes of extra space to leave next to this arg.
4454 This is ignored if an argument block has already been allocated.
4456 On a machine that lacks real push insns, ARGS_ADDR is the address of
4457 the bottom of the argument block for this call. We use indexing off there
4458 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4459 argument block has not been preallocated.
4461 ARGS_SO_FAR is the size of args previously pushed for this call.
4463 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4464 for arguments passed in registers. If nonzero, it will be the number
4465 of bytes required. */
4468 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4469 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4470 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4471 rtx alignment_pad
, bool sibcall_p
)
4474 pad_direction stack_direction
4475 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4477 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4478 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4479 Default is below for small data on big-endian machines; else above. */
4480 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4482 /* Invert direction if stack is post-decrement.
4484 if (STACK_PUSH_CODE
== POST_DEC
)
4485 if (where_pad
!= PAD_NONE
)
4486 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4490 int nregs
= partial
/ UNITS_PER_WORD
;
4491 rtx
*tmp_regs
= NULL
;
4492 int overlapping
= 0;
4495 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4497 /* Copy a block into the stack, entirely or partially. */
4504 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4505 used
= partial
- offset
;
4507 if (mode
!= BLKmode
)
4509 /* A value is to be stored in an insufficiently aligned
4510 stack slot; copy via a suitably aligned slot if
4512 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4513 if (!MEM_P (xinner
))
4515 temp
= assign_temp (type
, 1, 1);
4516 emit_move_insn (temp
, xinner
);
4523 /* USED is now the # of bytes we need not copy to the stack
4524 because registers will take care of them. */
4527 xinner
= adjust_address (xinner
, BLKmode
, used
);
4529 /* If the partial register-part of the arg counts in its stack size,
4530 skip the part of stack space corresponding to the registers.
4531 Otherwise, start copying to the beginning of the stack space,
4532 by setting SKIP to 0. */
4533 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4535 #ifdef PUSH_ROUNDING
4536 /* Do it with several push insns if that doesn't take lots of insns
4537 and if there is no difficulty with push insns that skip bytes
4538 on the stack for alignment purposes. */
4541 && CONST_INT_P (size
)
4543 && MEM_ALIGN (xinner
) >= align
4544 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4545 /* Here we avoid the case of a structure whose weak alignment
4546 forces many pushes of a small amount of data,
4547 and such small pushes do rounding that causes trouble. */
4548 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4549 || align
>= BIGGEST_ALIGNMENT
4550 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4551 align
/ BITS_PER_UNIT
))
4552 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4554 /* Push padding now if padding above and stack grows down,
4555 or if padding below and stack grows up.
4556 But if space already allocated, this has already been done. */
4557 if (maybe_ne (extra
, 0)
4559 && where_pad
!= PAD_NONE
4560 && where_pad
!= stack_direction
)
4561 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4563 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
4567 #endif /* PUSH_ROUNDING */
4571 /* Otherwise make space on the stack and copy the data
4572 to the address of that space. */
4574 /* Deduct words put into registers from the size we must copy. */
4577 if (CONST_INT_P (size
))
4578 size
= GEN_INT (INTVAL (size
) - used
);
4580 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4581 gen_int_mode (used
, GET_MODE (size
)),
4582 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4585 /* Get the address of the stack space.
4586 In this case, we do not deal with EXTRA separately.
4587 A single stack adjust will do. */
4588 poly_int64 const_args_so_far
;
4591 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4594 else if (poly_int_rtx_p (args_so_far
, &const_args_so_far
))
4595 temp
= memory_address (BLKmode
,
4596 plus_constant (Pmode
, args_addr
,
4597 skip
+ const_args_so_far
));
4599 temp
= memory_address (BLKmode
,
4600 plus_constant (Pmode
,
4601 gen_rtx_PLUS (Pmode
,
4606 if (!ACCUMULATE_OUTGOING_ARGS
)
4608 /* If the source is referenced relative to the stack pointer,
4609 copy it to another register to stabilize it. We do not need
4610 to do this if we know that we won't be changing sp. */
4612 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4613 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4614 temp
= copy_to_reg (temp
);
4617 target
= gen_rtx_MEM (BLKmode
, temp
);
4619 /* We do *not* set_mem_attributes here, because incoming arguments
4620 may overlap with sibling call outgoing arguments and we cannot
4621 allow reordering of reads from function arguments with stores
4622 to outgoing arguments of sibling calls. We do, however, want
4623 to record the alignment of the stack slot. */
4624 /* ALIGN may well be better aligned than TYPE, e.g. due to
4625 PARM_BOUNDARY. Assume the caller isn't lying. */
4626 set_mem_align (target
, align
);
4628 /* If part should go in registers and pushing to that part would
4629 overwrite some of the values that need to go into regs, load the
4630 overlapping values into temporary pseudos to be moved into the hard
4631 regs at the end after the stack pushing has completed.
4632 We cannot load them directly into the hard regs here because
4633 they can be clobbered by the block move expansions.
4636 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4637 && GET_CODE (reg
) != PARALLEL
)
4639 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4640 if (overlapping
> 0)
4642 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4643 overlapping
/= UNITS_PER_WORD
;
4645 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4647 for (int i
= 0; i
< overlapping
; i
++)
4648 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4650 for (int i
= 0; i
< overlapping
; i
++)
4651 emit_move_insn (tmp_regs
[i
],
4652 operand_subword_force (target
, i
, mode
));
4654 else if (overlapping
== -1)
4656 /* Could not determine whether there is overlap.
4657 Fail the sibcall. */
4665 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4668 else if (partial
> 0)
4670 /* Scalar partly in registers. This case is only supported
4671 for fixed-wdth modes. */
4672 int num_words
= GET_MODE_SIZE (mode
).to_constant ();
4673 num_words
/= UNITS_PER_WORD
;
4676 /* # bytes of start of argument
4677 that we must make space for but need not store. */
4678 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4679 int args_offset
= INTVAL (args_so_far
);
4682 /* Push padding now if padding above and stack grows down,
4683 or if padding below and stack grows up.
4684 But if space already allocated, this has already been done. */
4685 if (maybe_ne (extra
, 0)
4687 && where_pad
!= PAD_NONE
4688 && where_pad
!= stack_direction
)
4689 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4691 /* If we make space by pushing it, we might as well push
4692 the real data. Otherwise, we can leave OFFSET nonzero
4693 and leave the space uninitialized. */
4697 /* Now NOT_STACK gets the number of words that we don't need to
4698 allocate on the stack. Convert OFFSET to words too. */
4699 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4700 offset
/= UNITS_PER_WORD
;
4702 /* If the partial register-part of the arg counts in its stack size,
4703 skip the part of stack space corresponding to the registers.
4704 Otherwise, start copying to the beginning of the stack space,
4705 by setting SKIP to 0. */
4706 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4708 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4709 x
= validize_mem (force_const_mem (mode
, x
));
4711 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4712 SUBREGs of such registers are not allowed. */
4713 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4714 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4715 x
= copy_to_reg (x
);
4717 /* Loop over all the words allocated on the stack for this arg. */
4718 /* We can do it by words, because any scalar bigger than a word
4719 has a size a multiple of a word. */
4720 for (i
= num_words
- 1; i
>= not_stack
; i
--)
4721 if (i
>= not_stack
+ offset
)
4722 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4723 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4725 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4727 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4735 /* Push padding now if padding above and stack grows down,
4736 or if padding below and stack grows up.
4737 But if space already allocated, this has already been done. */
4738 if (maybe_ne (extra
, 0)
4740 && where_pad
!= PAD_NONE
4741 && where_pad
!= stack_direction
)
4742 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4744 #ifdef PUSH_ROUNDING
4745 if (args_addr
== 0 && PUSH_ARGS
)
4746 emit_single_push_insn (mode
, x
, type
);
4750 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4751 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4753 /* We do *not* set_mem_attributes here, because incoming arguments
4754 may overlap with sibling call outgoing arguments and we cannot
4755 allow reordering of reads from function arguments with stores
4756 to outgoing arguments of sibling calls. We do, however, want
4757 to record the alignment of the stack slot. */
4758 /* ALIGN may well be better aligned than TYPE, e.g. due to
4759 PARM_BOUNDARY. Assume the caller isn't lying. */
4760 set_mem_align (dest
, align
);
4762 emit_move_insn (dest
, x
);
4766 /* Move the partial arguments into the registers and any overlapping
4767 values that we moved into the pseudos in tmp_regs. */
4768 if (partial
> 0 && reg
!= 0)
4770 /* Handle calls that pass values in multiple non-contiguous locations.
4771 The Irix 6 ABI has examples of this. */
4772 if (GET_CODE (reg
) == PARALLEL
)
4773 emit_group_load (reg
, x
, type
, -1);
4776 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4777 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4779 for (int i
= 0; i
< overlapping
; i
++)
4780 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4781 + nregs
- overlapping
+ i
),
4787 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4788 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4790 if (alignment_pad
&& args_addr
== 0)
4791 anti_adjust_stack (alignment_pad
);
4796 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4800 get_subtarget (rtx x
)
4804 /* Only registers can be subtargets. */
4806 /* Don't use hard regs to avoid extending their life. */
4807 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4811 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4812 FIELD is a bitfield. Returns true if the optimization was successful,
4813 and there's nothing else to do. */
4816 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4817 poly_uint64 pbitpos
,
4818 poly_uint64 pbitregion_start
,
4819 poly_uint64 pbitregion_end
,
4820 machine_mode mode1
, rtx str_rtx
,
4821 tree to
, tree src
, bool reverse
)
4823 /* str_mode is not guaranteed to be a scalar type. */
4824 machine_mode str_mode
= GET_MODE (str_rtx
);
4825 unsigned int str_bitsize
;
4830 enum tree_code code
;
4832 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4833 if (mode1
!= VOIDmode
4834 || !pbitsize
.is_constant (&bitsize
)
4835 || !pbitpos
.is_constant (&bitpos
)
4836 || !pbitregion_start
.is_constant (&bitregion_start
)
4837 || !pbitregion_end
.is_constant (&bitregion_end
)
4838 || bitsize
>= BITS_PER_WORD
4839 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4840 || str_bitsize
> BITS_PER_WORD
4841 || TREE_SIDE_EFFECTS (to
)
4842 || TREE_THIS_VOLATILE (to
))
4846 if (TREE_CODE (src
) != SSA_NAME
)
4848 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4851 srcstmt
= get_gimple_for_ssa_name (src
);
4853 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4856 code
= gimple_assign_rhs_code (srcstmt
);
4858 op0
= gimple_assign_rhs1 (srcstmt
);
4860 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4861 to find its initialization. Hopefully the initialization will
4862 be from a bitfield load. */
4863 if (TREE_CODE (op0
) == SSA_NAME
)
4865 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4867 /* We want to eventually have OP0 be the same as TO, which
4868 should be a bitfield. */
4870 || !is_gimple_assign (op0stmt
)
4871 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4873 op0
= gimple_assign_rhs1 (op0stmt
);
4876 op1
= gimple_assign_rhs2 (srcstmt
);
4878 if (!operand_equal_p (to
, op0
, 0))
4881 if (MEM_P (str_rtx
))
4883 unsigned HOST_WIDE_INT offset1
;
4885 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4886 str_bitsize
= BITS_PER_WORD
;
4888 scalar_int_mode best_mode
;
4889 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4890 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4892 str_mode
= best_mode
;
4893 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4896 bitpos
%= str_bitsize
;
4897 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4898 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4900 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4903 /* If the bit field covers the whole REG/MEM, store_field
4904 will likely generate better code. */
4905 if (bitsize
>= str_bitsize
)
4908 /* We can't handle fields split across multiple entities. */
4909 if (bitpos
+ bitsize
> str_bitsize
)
4912 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4913 bitpos
= str_bitsize
- bitpos
- bitsize
;
4919 /* For now, just optimize the case of the topmost bitfield
4920 where we don't need to do any masking and also
4921 1 bit bitfields where xor can be used.
4922 We might win by one instruction for the other bitfields
4923 too if insv/extv instructions aren't used, so that
4924 can be added later. */
4925 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4926 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4929 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4930 value
= convert_modes (str_mode
,
4931 TYPE_MODE (TREE_TYPE (op1
)), value
,
4932 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4934 /* We may be accessing data outside the field, which means
4935 we can alias adjacent data. */
4936 if (MEM_P (str_rtx
))
4938 str_rtx
= shallow_copy_rtx (str_rtx
);
4939 set_mem_alias_set (str_rtx
, 0);
4940 set_mem_expr (str_rtx
, 0);
4943 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4945 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4949 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4951 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4953 value
= flip_storage_order (str_mode
, value
);
4954 result
= expand_binop (str_mode
, binop
, str_rtx
,
4955 value
, str_rtx
, 1, OPTAB_WIDEN
);
4956 if (result
!= str_rtx
)
4957 emit_move_insn (str_rtx
, result
);
4962 if (TREE_CODE (op1
) != INTEGER_CST
)
4964 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4965 value
= convert_modes (str_mode
,
4966 TYPE_MODE (TREE_TYPE (op1
)), value
,
4967 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4969 /* We may be accessing data outside the field, which means
4970 we can alias adjacent data. */
4971 if (MEM_P (str_rtx
))
4973 str_rtx
= shallow_copy_rtx (str_rtx
);
4974 set_mem_alias_set (str_rtx
, 0);
4975 set_mem_expr (str_rtx
, 0);
4978 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4979 if (bitpos
+ bitsize
!= str_bitsize
)
4981 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4983 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4985 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4987 value
= flip_storage_order (str_mode
, value
);
4988 result
= expand_binop (str_mode
, binop
, str_rtx
,
4989 value
, str_rtx
, 1, OPTAB_WIDEN
);
4990 if (result
!= str_rtx
)
4991 emit_move_insn (str_rtx
, result
);
5001 /* In the C++ memory model, consecutive bit fields in a structure are
5002 considered one memory location.
5004 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
5005 returns the bit range of consecutive bits in which this COMPONENT_REF
5006 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
5007 and *OFFSET may be adjusted in the process.
5009 If the access does not need to be restricted, 0 is returned in both
5010 *BITSTART and *BITEND. */
5013 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
5014 poly_int64_pod
*bitpos
, tree
*offset
)
5016 poly_int64 bitoffset
;
5019 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
5021 field
= TREE_OPERAND (exp
, 1);
5022 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
5023 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
5024 need to limit the range we can access. */
5027 *bitstart
= *bitend
= 0;
5031 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
5032 part of a larger bit field, then the representative does not serve any
5033 useful purpose. This can occur in Ada. */
5034 if (handled_component_p (TREE_OPERAND (exp
, 0)))
5037 poly_int64 rbitsize
, rbitpos
;
5039 int unsignedp
, reversep
, volatilep
= 0;
5040 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
5041 &roffset
, &rmode
, &unsignedp
, &reversep
,
5043 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
5045 *bitstart
= *bitend
= 0;
5050 /* Compute the adjustment to bitpos from the offset of the field
5051 relative to the representative. DECL_FIELD_OFFSET of field and
5052 repr are the same by construction if they are not constants,
5053 see finish_bitfield_layout. */
5054 poly_uint64 field_offset
, repr_offset
;
5055 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
5056 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
5057 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
5060 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
5061 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
5063 /* If the adjustment is larger than bitpos, we would have a negative bit
5064 position for the lower bound and this may wreak havoc later. Adjust
5065 offset and bitpos to make the lower bound non-negative in that case. */
5066 if (maybe_gt (bitoffset
, *bitpos
))
5068 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
5069 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
5071 *bitpos
+= adjust_bits
;
5072 if (*offset
== NULL_TREE
)
5073 *offset
= size_int (-adjust_bytes
);
5075 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
5079 *bitstart
= *bitpos
- bitoffset
;
5081 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
5084 /* Returns true if BASE is a DECL that does not reside in memory and
5085 has non-BLKmode. DECL_RTL must not be a MEM; if
5086 DECL_RTL was not set yet, return false. */
5089 non_mem_decl_p (tree base
)
5092 || TREE_ADDRESSABLE (base
)
5093 || DECL_MODE (base
) == BLKmode
)
5096 if (!DECL_RTL_SET_P (base
))
5099 return (!MEM_P (DECL_RTL (base
)));
5102 /* Returns true if REF refers to an object that does not
5103 reside in memory and has non-BLKmode. */
5106 mem_ref_refers_to_non_mem_p (tree ref
)
5110 if (TREE_CODE (ref
) == MEM_REF
5111 || TREE_CODE (ref
) == TARGET_MEM_REF
)
5113 tree addr
= TREE_OPERAND (ref
, 0);
5115 if (TREE_CODE (addr
) != ADDR_EXPR
)
5118 base
= TREE_OPERAND (addr
, 0);
5123 return non_mem_decl_p (base
);
5126 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
5127 is true, try generating a nontemporal store. */
5130 expand_assignment (tree to
, tree from
, bool nontemporal
)
5136 enum insn_code icode
;
5138 /* Don't crash if the lhs of the assignment was erroneous. */
5139 if (TREE_CODE (to
) == ERROR_MARK
)
5141 expand_normal (from
);
5145 /* Optimize away no-op moves without side-effects. */
5146 if (operand_equal_p (to
, from
, 0))
5149 /* Handle misaligned stores. */
5150 mode
= TYPE_MODE (TREE_TYPE (to
));
5151 if ((TREE_CODE (to
) == MEM_REF
5152 || TREE_CODE (to
) == TARGET_MEM_REF
5155 && !mem_ref_refers_to_non_mem_p (to
)
5156 && ((align
= get_object_alignment (to
))
5157 < GET_MODE_ALIGNMENT (mode
))
5158 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5159 != CODE_FOR_nothing
)
5160 || targetm
.slow_unaligned_access (mode
, align
)))
5164 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5165 reg
= force_not_mem (reg
);
5166 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5167 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5168 reg
= flip_storage_order (mode
, reg
);
5170 if (icode
!= CODE_FOR_nothing
)
5172 class expand_operand ops
[2];
5174 create_fixed_operand (&ops
[0], mem
);
5175 create_input_operand (&ops
[1], reg
, mode
);
5176 /* The movmisalign<mode> pattern cannot fail, else the assignment
5177 would silently be omitted. */
5178 expand_insn (icode
, 2, ops
);
5181 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5186 /* Assignment of a structure component needs special treatment
5187 if the structure component's rtx is not simply a MEM.
5188 Assignment of an array element at a constant index, and assignment of
5189 an array element in an unaligned packed structure field, has the same
5190 problem. Same for (partially) storing into a non-memory object. */
5191 if (handled_component_p (to
)
5192 || (TREE_CODE (to
) == MEM_REF
5193 && (REF_REVERSE_STORAGE_ORDER (to
)
5194 || mem_ref_refers_to_non_mem_p (to
)))
5195 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5198 poly_int64 bitsize
, bitpos
;
5199 poly_uint64 bitregion_start
= 0;
5200 poly_uint64 bitregion_end
= 0;
5202 int unsignedp
, reversep
, volatilep
= 0;
5206 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5207 &unsignedp
, &reversep
, &volatilep
);
5209 /* Make sure bitpos is not negative, it can wreak havoc later. */
5210 if (maybe_lt (bitpos
, 0))
5212 gcc_assert (offset
== NULL_TREE
);
5213 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5214 bitpos
= num_trailing_bits (bitpos
);
5217 if (TREE_CODE (to
) == COMPONENT_REF
5218 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5219 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5220 /* The C++ memory model naturally applies to byte-aligned fields.
5221 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5222 BITSIZE are not byte-aligned, there is no need to limit the range
5223 we can access. This can occur with packed structures in Ada. */
5224 else if (maybe_gt (bitsize
, 0)
5225 && multiple_p (bitsize
, BITS_PER_UNIT
)
5226 && multiple_p (bitpos
, BITS_PER_UNIT
))
5228 bitregion_start
= bitpos
;
5229 bitregion_end
= bitpos
+ bitsize
- 1;
5232 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5234 /* If the field has a mode, we want to access it in the
5235 field's mode, not the computed mode.
5236 If a MEM has VOIDmode (external with incomplete type),
5237 use BLKmode for it instead. */
5240 if (mode1
!= VOIDmode
)
5241 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5242 else if (GET_MODE (to_rtx
) == VOIDmode
)
5243 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5248 machine_mode address_mode
;
5251 if (!MEM_P (to_rtx
))
5253 /* We can get constant negative offsets into arrays with broken
5254 user code. Translate this to a trap instead of ICEing. */
5255 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5256 expand_builtin_trap ();
5257 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5260 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5261 address_mode
= get_address_mode (to_rtx
);
5262 if (GET_MODE (offset_rtx
) != address_mode
)
5264 /* We cannot be sure that the RTL in offset_rtx is valid outside
5265 of a memory address context, so force it into a register
5266 before attempting to convert it to the desired mode. */
5267 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5268 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5271 /* If we have an expression in OFFSET_RTX and a non-zero
5272 byte offset in BITPOS, adding the byte offset before the
5273 OFFSET_RTX results in better intermediate code, which makes
5274 later rtl optimization passes perform better.
5276 We prefer intermediate code like this:
5278 r124:DI=r123:DI+0x18
5283 r124:DI=r123:DI+0x10
5284 [r124:DI+0x8]=r121:DI
5286 This is only done for aligned data values, as these can
5287 be expected to result in single move instructions. */
5289 if (mode1
!= VOIDmode
5290 && maybe_ne (bitpos
, 0)
5291 && maybe_gt (bitsize
, 0)
5292 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5293 && multiple_p (bitpos
, bitsize
)
5294 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5295 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5297 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5298 bitregion_start
= 0;
5299 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5300 bitregion_end
-= bitpos
;
5304 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5305 highest_pow2_factor_for_target (to
,
5309 /* No action is needed if the target is not a memory and the field
5310 lies completely outside that target. This can occur if the source
5311 code contains an out-of-bounds access to a small array. */
5313 && GET_MODE (to_rtx
) != BLKmode
5314 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5316 expand_normal (from
);
5319 /* Handle expand_expr of a complex value returning a CONCAT. */
5320 else if (GET_CODE (to_rtx
) == CONCAT
)
5322 machine_mode to_mode
= GET_MODE (to_rtx
);
5323 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5324 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5325 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5326 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5327 && known_eq (bitpos
, 0)
5328 && known_eq (bitsize
, mode_bitsize
))
5329 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5330 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5331 && known_eq (bitsize
, inner_bitsize
)
5332 && (known_eq (bitpos
, 0)
5333 || known_eq (bitpos
, inner_bitsize
)))
5334 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5335 false, nontemporal
, reversep
);
5336 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5337 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5338 bitregion_start
, bitregion_end
,
5339 mode1
, from
, get_alias_set (to
),
5340 nontemporal
, reversep
);
5341 else if (known_ge (bitpos
, inner_bitsize
))
5342 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5343 bitpos
- inner_bitsize
,
5344 bitregion_start
, bitregion_end
,
5345 mode1
, from
, get_alias_set (to
),
5346 nontemporal
, reversep
);
5347 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5349 result
= expand_normal (from
);
5350 if (GET_CODE (result
) == CONCAT
)
5352 to_mode
= GET_MODE_INNER (to_mode
);
5353 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5355 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5358 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5360 if (!from_real
|| !from_imag
)
5361 goto concat_store_slow
;
5362 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5363 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5367 machine_mode from_mode
5368 = GET_MODE (result
) == VOIDmode
5369 ? TYPE_MODE (TREE_TYPE (from
))
5370 : GET_MODE (result
);
5373 from_rtx
= change_address (result
, to_mode
, NULL_RTX
);
5376 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5379 emit_move_insn (XEXP (to_rtx
, 0),
5380 read_complex_part (from_rtx
, false));
5381 emit_move_insn (XEXP (to_rtx
, 1),
5382 read_complex_part (from_rtx
, true));
5386 to_mode
= GET_MODE_INNER (to_mode
);
5388 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5390 = simplify_gen_subreg (to_mode
, result
, from_mode
,
5391 GET_MODE_SIZE (to_mode
));
5392 if (!from_real
|| !from_imag
)
5393 goto concat_store_slow
;
5394 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5395 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5402 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5403 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5404 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5405 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5406 result
= store_field (temp
, bitsize
, bitpos
,
5407 bitregion_start
, bitregion_end
,
5408 mode1
, from
, get_alias_set (to
),
5409 nontemporal
, reversep
);
5410 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5411 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5414 /* For calls to functions returning variable length structures, if TO_RTX
5415 is not a MEM, go through a MEM because we must not create temporaries
5417 else if (!MEM_P (to_rtx
)
5418 && TREE_CODE (from
) == CALL_EXPR
5419 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5420 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
5422 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5423 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5424 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
5425 bitregion_end
, mode1
, from
, get_alias_set (to
),
5426 nontemporal
, reversep
);
5427 emit_move_insn (to_rtx
, temp
);
5433 /* If the field is at offset zero, we could have been given the
5434 DECL_RTX of the parent struct. Don't munge it. */
5435 to_rtx
= shallow_copy_rtx (to_rtx
);
5436 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5438 MEM_VOLATILE_P (to_rtx
) = 1;
5441 gcc_checking_assert (known_ge (bitpos
, 0));
5442 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5443 bitregion_start
, bitregion_end
,
5444 mode1
, to_rtx
, to
, from
,
5448 result
= store_field (to_rtx
, bitsize
, bitpos
,
5449 bitregion_start
, bitregion_end
,
5450 mode1
, from
, get_alias_set (to
),
5451 nontemporal
, reversep
);
5455 preserve_temp_slots (result
);
5460 /* If the rhs is a function call and its value is not an aggregate,
5461 call the function before we start to compute the lhs.
5462 This is needed for correct code for cases such as
5463 val = setjmp (buf) on machines where reference to val
5464 requires loading up part of an address in a separate insn.
5466 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5467 since it might be a promoted variable where the zero- or sign- extension
5468 needs to be done. Handling this in the normal way is safe because no
5469 computation is done before the call. The same is true for SSA names. */
5470 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5471 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5472 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5474 || TREE_CODE (to
) == PARM_DECL
5475 || TREE_CODE (to
) == RESULT_DECL
)
5476 && REG_P (DECL_RTL (to
)))
5477 || TREE_CODE (to
) == SSA_NAME
))
5482 value
= expand_normal (from
);
5485 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5487 /* Handle calls that return values in multiple non-contiguous locations.
5488 The Irix 6 ABI has examples of this. */
5489 if (GET_CODE (to_rtx
) == PARALLEL
)
5491 if (GET_CODE (value
) == PARALLEL
)
5492 emit_group_move (to_rtx
, value
);
5494 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5495 int_size_in_bytes (TREE_TYPE (from
)));
5497 else if (GET_CODE (value
) == PARALLEL
)
5498 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5499 int_size_in_bytes (TREE_TYPE (from
)));
5500 else if (GET_MODE (to_rtx
) == BLKmode
)
5502 /* Handle calls that return BLKmode values in registers. */
5504 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5506 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5510 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5511 value
= convert_memory_address_addr_space
5512 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5513 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5515 emit_move_insn (to_rtx
, value
);
5518 preserve_temp_slots (to_rtx
);
5523 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5524 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5526 /* Don't move directly into a return register. */
5527 if (TREE_CODE (to
) == RESULT_DECL
5528 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5534 /* If the source is itself a return value, it still is in a pseudo at
5535 this point so we can move it back to the return register directly. */
5537 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5538 && TREE_CODE (from
) != CALL_EXPR
)
5539 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5541 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5543 /* Handle calls that return values in multiple non-contiguous locations.
5544 The Irix 6 ABI has examples of this. */
5545 if (GET_CODE (to_rtx
) == PARALLEL
)
5547 if (GET_CODE (temp
) == PARALLEL
)
5548 emit_group_move (to_rtx
, temp
);
5550 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5551 int_size_in_bytes (TREE_TYPE (from
)));
5554 emit_move_insn (to_rtx
, temp
);
5556 preserve_temp_slots (to_rtx
);
5561 /* In case we are returning the contents of an object which overlaps
5562 the place the value is being stored, use a safe function when copying
5563 a value through a pointer into a structure value return block. */
5564 if (TREE_CODE (to
) == RESULT_DECL
5565 && TREE_CODE (from
) == INDIRECT_REF
5566 && ADDR_SPACE_GENERIC_P
5567 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5568 && refs_may_alias_p (to
, from
)
5569 && cfun
->returns_struct
5570 && !cfun
->returns_pcc_struct
)
5575 size
= expr_size (from
);
5576 from_rtx
= expand_normal (from
);
5578 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5580 preserve_temp_slots (to_rtx
);
5585 /* Compute FROM and store the value in the rtx we got. */
5588 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5589 preserve_temp_slots (result
);
5594 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5595 succeeded, false otherwise. */
5598 emit_storent_insn (rtx to
, rtx from
)
5600 class expand_operand ops
[2];
5601 machine_mode mode
= GET_MODE (to
);
5602 enum insn_code code
= optab_handler (storent_optab
, mode
);
5604 if (code
== CODE_FOR_nothing
)
5607 create_fixed_operand (&ops
[0], to
);
5608 create_input_operand (&ops
[1], from
, mode
);
5609 return maybe_expand_insn (code
, 2, ops
);
5612 /* Helper function for store_expr storing of STRING_CST. */
5615 string_cst_read_str (void *data
, HOST_WIDE_INT offset
, scalar_int_mode mode
)
5617 tree str
= (tree
) data
;
5619 gcc_assert (offset
>= 0);
5620 if (offset
>= TREE_STRING_LENGTH (str
))
5623 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
5624 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
5626 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
5627 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
5628 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
5629 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
5630 return c_readstr (p
, mode
, false);
5633 return c_readstr (TREE_STRING_POINTER (str
) + offset
, mode
, false);
5636 /* Generate code for computing expression EXP,
5637 and storing the value into TARGET.
5639 If the mode is BLKmode then we may return TARGET itself.
5640 It turns out that in BLKmode it doesn't cause a problem.
5641 because C has no operators that could combine two different
5642 assignments into the same BLKmode object with different values
5643 with no sequence point. Will other languages need this to
5646 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5647 stack, and block moves may need to be treated specially.
5649 If NONTEMPORAL is true, try using a nontemporal store instruction.
5651 If REVERSE is true, the store is to be done in reverse order. */
5654 store_expr (tree exp
, rtx target
, int call_param_p
,
5655 bool nontemporal
, bool reverse
)
5658 rtx alt_rtl
= NULL_RTX
;
5659 location_t loc
= curr_insn_location ();
5660 bool shortened_string_cst
= false;
5662 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5664 /* C++ can generate ?: expressions with a throw expression in one
5665 branch and an rvalue in the other. Here, we resolve attempts to
5666 store the throw expression's nonexistent result. */
5667 gcc_assert (!call_param_p
);
5668 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5671 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5673 /* Perform first part of compound expression, then assign from second
5675 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5676 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5677 return store_expr (TREE_OPERAND (exp
, 1), target
,
5678 call_param_p
, nontemporal
, reverse
);
5680 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5682 /* For conditional expression, get safe form of the target. Then
5683 test the condition, doing the appropriate assignment on either
5684 side. This avoids the creation of unnecessary temporaries.
5685 For non-BLKmode, it is more efficient not to do this. */
5687 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5689 do_pending_stack_adjust ();
5691 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5692 profile_probability::uninitialized ());
5693 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5694 nontemporal
, reverse
);
5695 emit_jump_insn (targetm
.gen_jump (lab2
));
5698 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5699 nontemporal
, reverse
);
5705 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5706 /* If this is a scalar in a register that is stored in a wider mode
5707 than the declared mode, compute the result into its declared mode
5708 and then convert to the wider mode. Our value is the computed
5711 rtx inner_target
= 0;
5712 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5713 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5715 /* We can do the conversion inside EXP, which will often result
5716 in some optimizations. Do the conversion in two steps: first
5717 change the signedness, if needed, then the extend. But don't
5718 do this if the type of EXP is a subtype of something else
5719 since then the conversion might involve more than just
5720 converting modes. */
5721 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5722 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5723 && GET_MODE_PRECISION (outer_mode
)
5724 == TYPE_PRECISION (TREE_TYPE (exp
)))
5726 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5727 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5729 /* Some types, e.g. Fortran's logical*4, won't have a signed
5730 version, so use the mode instead. */
5732 = (signed_or_unsigned_type_for
5733 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5735 ntype
= lang_hooks
.types
.type_for_mode
5736 (TYPE_MODE (TREE_TYPE (exp
)),
5737 SUBREG_PROMOTED_SIGN (target
));
5739 exp
= fold_convert_loc (loc
, ntype
, exp
);
5742 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5743 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5746 inner_target
= SUBREG_REG (target
);
5749 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5750 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5753 /* If TEMP is a VOIDmode constant, use convert_modes to make
5754 sure that we properly convert it. */
5755 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5757 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5758 temp
, SUBREG_PROMOTED_SIGN (target
));
5759 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5760 SUBREG_PROMOTED_SIGN (target
));
5763 convert_move (SUBREG_REG (target
), temp
,
5764 SUBREG_PROMOTED_SIGN (target
));
5768 else if ((TREE_CODE (exp
) == STRING_CST
5769 || (TREE_CODE (exp
) == MEM_REF
5770 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5771 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5773 && integer_zerop (TREE_OPERAND (exp
, 1))))
5774 && !nontemporal
&& !call_param_p
5777 /* Optimize initialization of an array with a STRING_CST. */
5778 HOST_WIDE_INT exp_len
, str_copy_len
;
5780 tree str
= TREE_CODE (exp
) == STRING_CST
5781 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5783 exp_len
= int_expr_size (exp
);
5787 if (TREE_STRING_LENGTH (str
) <= 0)
5790 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
5791 MEM_ALIGN (target
), false))
5793 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
5794 MEM_ALIGN (target
), false, RETURN_BEGIN
);
5798 str_copy_len
= TREE_STRING_LENGTH (str
);
5799 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
5801 str_copy_len
+= STORE_MAX_PIECES
- 1;
5802 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5804 if (str_copy_len
>= exp_len
)
5807 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
5808 (void *) str
, MEM_ALIGN (target
), false))
5811 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
5812 (void *) str
, MEM_ALIGN (target
), false,
5814 clear_storage (adjust_address_1 (dest_mem
, BLKmode
, 0, 1, 1, 0,
5815 exp_len
- str_copy_len
),
5816 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
5824 /* If we want to use a nontemporal or a reverse order store, force the
5825 value into a register first. */
5826 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5828 if (TREE_CODE (exp
) == STRING_CST
5829 && tmp_target
== target
5830 && GET_MODE (target
) == BLKmode
5831 && TYPE_MODE (TREE_TYPE (exp
)) == BLKmode
)
5833 rtx size
= expr_size (exp
);
5834 if (CONST_INT_P (size
)
5835 && size
!= const0_rtx
5837 > ((unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (exp
) + 32)))
5839 /* If the STRING_CST has much larger array type than
5840 TREE_STRING_LENGTH, only emit the TREE_STRING_LENGTH part of
5841 it into the rodata section as the code later on will use
5842 memset zero for the remainder anyway. See PR95052. */
5843 tmp_target
= NULL_RTX
;
5844 rexp
= copy_node (exp
);
5846 = build_index_type (size_int (TREE_STRING_LENGTH (exp
) - 1));
5847 TREE_TYPE (rexp
) = build_array_type (TREE_TYPE (TREE_TYPE (exp
)),
5849 shortened_string_cst
= true;
5852 temp
= expand_expr_real (rexp
, tmp_target
, GET_MODE (target
),
5854 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5856 if (shortened_string_cst
)
5858 gcc_assert (MEM_P (temp
));
5859 temp
= change_address (temp
, BLKmode
, NULL_RTX
);
5863 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5864 the same as that of TARGET, adjust the constant. This is needed, for
5865 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5866 only a word-sized value. */
5867 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5868 && TREE_CODE (exp
) != ERROR_MARK
5869 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5871 gcc_assert (!shortened_string_cst
);
5872 if (GET_MODE_CLASS (GET_MODE (target
))
5873 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5874 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5875 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5877 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5878 TYPE_MODE (TREE_TYPE (exp
)), 0);
5882 if (GET_MODE (temp
) == VOIDmode
)
5883 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5884 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5887 /* If value was not generated in the target, store it there.
5888 Convert the value to TARGET's type first if necessary and emit the
5889 pending incrementations that have been queued when expanding EXP.
5890 Note that we cannot emit the whole queue blindly because this will
5891 effectively disable the POST_INC optimization later.
5893 If TEMP and TARGET compare equal according to rtx_equal_p, but
5894 one or both of them are volatile memory refs, we have to distinguish
5896 - expand_expr has used TARGET. In this case, we must not generate
5897 another copy. This can be detected by TARGET being equal according
5899 - expand_expr has not used TARGET - that means that the source just
5900 happens to have the same RTX form. Since temp will have been created
5901 by expand_expr, it will compare unequal according to == .
5902 We must generate a copy in this case, to reach the correct number
5903 of volatile memory references. */
5905 if ((! rtx_equal_p (temp
, target
)
5906 || (temp
!= target
&& (side_effects_p (temp
)
5907 || side_effects_p (target
))))
5908 && TREE_CODE (exp
) != ERROR_MARK
5909 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5910 but TARGET is not valid memory reference, TEMP will differ
5911 from TARGET although it is really the same location. */
5913 && rtx_equal_p (alt_rtl
, target
)
5914 && !side_effects_p (alt_rtl
)
5915 && !side_effects_p (target
))
5916 /* If there's nothing to copy, don't bother. Don't call
5917 expr_size unless necessary, because some front-ends (C++)
5918 expr_size-hook must not be given objects that are not
5919 supposed to be bit-copied or bit-initialized. */
5920 && expr_size (exp
) != const0_rtx
)
5922 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5924 gcc_assert (!shortened_string_cst
);
5925 if (GET_MODE (target
) == BLKmode
)
5927 /* Handle calls that return BLKmode values in registers. */
5928 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5929 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5931 store_bit_field (target
,
5932 rtx_to_poly_int64 (expr_size (exp
))
5934 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5937 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5940 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5942 /* Handle copying a string constant into an array. The string
5943 constant may be shorter than the array. So copy just the string's
5944 actual length, and clear the rest. First get the size of the data
5945 type of the string, which is actually the size of the target. */
5946 rtx size
= expr_size (exp
);
5948 if (CONST_INT_P (size
)
5949 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5950 emit_block_move (target
, temp
, size
,
5952 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5955 machine_mode pointer_mode
5956 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5957 machine_mode address_mode
= get_address_mode (target
);
5959 /* Compute the size of the data to copy from the string. */
5961 = size_binop_loc (loc
, MIN_EXPR
,
5962 make_tree (sizetype
, size
),
5963 size_int (TREE_STRING_LENGTH (exp
)));
5965 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5967 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5968 rtx_code_label
*label
= 0;
5970 /* Copy that much. */
5971 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5972 TYPE_UNSIGNED (sizetype
));
5973 emit_block_move (target
, temp
, copy_size_rtx
,
5975 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5977 /* Figure out how much is left in TARGET that we have to clear.
5978 Do all calculations in pointer_mode. */
5979 poly_int64 const_copy_size
;
5980 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
5982 size
= plus_constant (address_mode
, size
, -const_copy_size
);
5983 target
= adjust_address (target
, BLKmode
, const_copy_size
);
5987 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5988 copy_size_rtx
, NULL_RTX
, 0,
5991 if (GET_MODE (copy_size_rtx
) != address_mode
)
5992 copy_size_rtx
= convert_to_mode (address_mode
,
5994 TYPE_UNSIGNED (sizetype
));
5996 target
= offset_address (target
, copy_size_rtx
,
5997 highest_pow2_factor (copy_size
));
5998 label
= gen_label_rtx ();
5999 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
6000 GET_MODE (size
), 0, label
);
6003 if (size
!= const0_rtx
)
6004 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
6010 else if (shortened_string_cst
)
6012 /* Handle calls that return values in multiple non-contiguous locations.
6013 The Irix 6 ABI has examples of this. */
6014 else if (GET_CODE (target
) == PARALLEL
)
6016 if (GET_CODE (temp
) == PARALLEL
)
6017 emit_group_move (target
, temp
);
6019 emit_group_load (target
, temp
, TREE_TYPE (exp
),
6020 int_size_in_bytes (TREE_TYPE (exp
)));
6022 else if (GET_CODE (temp
) == PARALLEL
)
6023 emit_group_store (target
, temp
, TREE_TYPE (exp
),
6024 int_size_in_bytes (TREE_TYPE (exp
)));
6025 else if (GET_MODE (temp
) == BLKmode
)
6026 emit_block_move (target
, temp
, expr_size (exp
),
6028 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6029 /* If we emit a nontemporal store, there is nothing else to do. */
6030 else if (nontemporal
&& emit_storent_insn (target
, temp
))
6035 temp
= flip_storage_order (GET_MODE (target
), temp
);
6036 temp
= force_operand (temp
, target
);
6038 emit_move_insn (target
, temp
);
6042 gcc_assert (!shortened_string_cst
);
6047 /* Return true if field F of structure TYPE is a flexible array. */
6050 flexible_array_member_p (const_tree f
, const_tree type
)
6055 return (DECL_CHAIN (f
) == NULL
6056 && TREE_CODE (tf
) == ARRAY_TYPE
6058 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
6059 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
6060 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
6061 && int_size_in_bytes (type
) >= 0);
6064 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
6065 must have in order for it to completely initialize a value of type TYPE.
6066 Return -1 if the number isn't known.
6068 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
6070 static HOST_WIDE_INT
6071 count_type_elements (const_tree type
, bool for_ctor_p
)
6073 switch (TREE_CODE (type
))
6079 nelts
= array_type_nelts (type
);
6080 if (nelts
&& tree_fits_uhwi_p (nelts
))
6082 unsigned HOST_WIDE_INT n
;
6084 n
= tree_to_uhwi (nelts
) + 1;
6085 if (n
== 0 || for_ctor_p
)
6088 return n
* count_type_elements (TREE_TYPE (type
), false);
6090 return for_ctor_p
? -1 : 1;
6095 unsigned HOST_WIDE_INT n
;
6099 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6100 if (TREE_CODE (f
) == FIELD_DECL
)
6103 n
+= count_type_elements (TREE_TYPE (f
), false);
6104 else if (!flexible_array_member_p (f
, type
))
6105 /* Don't count flexible arrays, which are not supposed
6106 to be initialized. */
6114 case QUAL_UNION_TYPE
:
6119 gcc_assert (!for_ctor_p
);
6120 /* Estimate the number of scalars in each field and pick the
6121 maximum. Other estimates would do instead; the idea is simply
6122 to make sure that the estimate is not sensitive to the ordering
6125 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6126 if (TREE_CODE (f
) == FIELD_DECL
)
6128 m
= count_type_elements (TREE_TYPE (f
), false);
6129 /* If the field doesn't span the whole union, add an extra
6130 scalar for the rest. */
6131 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
6132 TYPE_SIZE (type
)) != 1)
6145 unsigned HOST_WIDE_INT nelts
;
6146 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
6154 case FIXED_POINT_TYPE
:
6159 case REFERENCE_TYPE
:
6175 /* Helper for categorize_ctor_elements. Identical interface. */
6178 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6179 HOST_WIDE_INT
*p_unique_nz_elts
,
6180 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6182 unsigned HOST_WIDE_INT idx
;
6183 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
6184 tree value
, purpose
, elt_type
;
6186 /* Whether CTOR is a valid constant initializer, in accordance with what
6187 initializer_constant_valid_p does. If inferred from the constructor
6188 elements, true until proven otherwise. */
6189 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
6190 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
6196 elt_type
= NULL_TREE
;
6198 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
6200 HOST_WIDE_INT mult
= 1;
6202 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
6204 tree lo_index
= TREE_OPERAND (purpose
, 0);
6205 tree hi_index
= TREE_OPERAND (purpose
, 1);
6207 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6208 mult
= (tree_to_uhwi (hi_index
)
6209 - tree_to_uhwi (lo_index
) + 1);
6212 elt_type
= TREE_TYPE (value
);
6214 switch (TREE_CODE (value
))
6218 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
6220 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
6223 nz_elts
+= mult
* nz
;
6224 unique_nz_elts
+= unz
;
6225 init_elts
+= mult
* ic
;
6227 if (const_from_elts_p
&& const_p
)
6228 const_p
= const_elt_p
;
6235 if (!initializer_zerop (value
))
6244 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6245 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
6246 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6250 if (!initializer_zerop (TREE_REALPART (value
)))
6255 if (!initializer_zerop (TREE_IMAGPART (value
)))
6260 init_elts
+= 2 * mult
;
6265 /* We can only construct constant-length vectors using
6267 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6268 for (unsigned int i
= 0; i
< nunits
; ++i
)
6270 tree v
= VECTOR_CST_ELT (value
, i
);
6271 if (!initializer_zerop (v
))
6283 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6284 nz_elts
+= mult
* tc
;
6285 unique_nz_elts
+= tc
;
6286 init_elts
+= mult
* tc
;
6288 if (const_from_elts_p
&& const_p
)
6290 = initializer_constant_valid_p (value
,
6292 TYPE_REVERSE_STORAGE_ORDER
6300 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6301 num_fields
, elt_type
))
6302 *p_complete
= false;
6304 *p_nz_elts
+= nz_elts
;
6305 *p_unique_nz_elts
+= unique_nz_elts
;
6306 *p_init_elts
+= init_elts
;
6311 /* Examine CTOR to discover:
6312 * how many scalar fields are set to nonzero values,
6313 and place it in *P_NZ_ELTS;
6314 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6315 high - low + 1 (this can be useful for callers to determine ctors
6316 that could be cheaply initialized with - perhaps nested - loops
6317 compared to copied from huge read-only data),
6318 and place it in *P_UNIQUE_NZ_ELTS;
6319 * how many scalar fields in total are in CTOR,
6320 and place it in *P_ELT_COUNT.
6321 * whether the constructor is complete -- in the sense that every
6322 meaningful byte is explicitly given a value --
6323 and place it in *P_COMPLETE.
6325 Return whether or not CTOR is a valid static constant initializer, the same
6326 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6329 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6330 HOST_WIDE_INT
*p_unique_nz_elts
,
6331 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6334 *p_unique_nz_elts
= 0;
6338 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
6339 p_init_elts
, p_complete
);
6342 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6343 of which had type LAST_TYPE. Each element was itself a complete
6344 initializer, in the sense that every meaningful byte was explicitly
6345 given a value. Return true if the same is true for the constructor
6349 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6350 const_tree last_type
)
6352 if (TREE_CODE (type
) == UNION_TYPE
6353 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6358 gcc_assert (num_elts
== 1 && last_type
);
6360 /* ??? We could look at each element of the union, and find the
6361 largest element. Which would avoid comparing the size of the
6362 initialized element against any tail padding in the union.
6363 Doesn't seem worth the effort... */
6364 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6367 return count_type_elements (type
, true) == num_elts
;
6370 /* Return 1 if EXP contains mostly (3/4) zeros. */
6373 mostly_zeros_p (const_tree exp
)
6375 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6377 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6380 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6382 return !complete_p
|| nz_elts
< init_elts
/ 4;
6385 return initializer_zerop (exp
);
6388 /* Return 1 if EXP contains all zeros. */
6391 all_zeros_p (const_tree exp
)
6393 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6395 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6398 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6400 return nz_elts
== 0;
6403 return initializer_zerop (exp
);
6406 /* Helper function for store_constructor.
6407 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6408 CLEARED is as for store_constructor.
6409 ALIAS_SET is the alias set to use for any stores.
6410 If REVERSE is true, the store is to be done in reverse order.
6412 This provides a recursive shortcut back to store_constructor when it isn't
6413 necessary to go through store_field. This is so that we can pass through
6414 the cleared field to let store_constructor know that we may not have to
6415 clear a substructure if the outer structure has already been cleared. */
6418 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6419 poly_uint64 bitregion_start
,
6420 poly_uint64 bitregion_end
,
6422 tree exp
, int cleared
,
6423 alias_set_type alias_set
, bool reverse
)
6426 poly_uint64 bytesize
;
6427 if (TREE_CODE (exp
) == CONSTRUCTOR
6428 /* We can only call store_constructor recursively if the size and
6429 bit position are on a byte boundary. */
6430 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6431 && maybe_ne (bitsize
, 0U)
6432 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6433 /* If we have a nonzero bitpos for a register target, then we just
6434 let store_field do the bitfield handling. This is unlikely to
6435 generate unnecessary clear instructions anyways. */
6436 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6440 machine_mode target_mode
= GET_MODE (target
);
6441 if (target_mode
!= BLKmode
6442 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6443 target_mode
= BLKmode
;
6444 target
= adjust_address (target
, target_mode
, bytepos
);
6448 /* Update the alias set, if required. */
6449 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6450 && MEM_ALIAS_SET (target
) != 0)
6452 target
= copy_rtx (target
);
6453 set_mem_alias_set (target
, alias_set
);
6456 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6459 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6460 exp
, alias_set
, false, reverse
);
6464 /* Returns the number of FIELD_DECLs in TYPE. */
6467 fields_length (const_tree type
)
6469 tree t
= TYPE_FIELDS (type
);
6472 for (; t
; t
= DECL_CHAIN (t
))
6473 if (TREE_CODE (t
) == FIELD_DECL
)
6480 /* Store the value of constructor EXP into the rtx TARGET.
6481 TARGET is either a REG or a MEM; we know it cannot conflict, since
6482 safe_from_p has been called.
6483 CLEARED is true if TARGET is known to have been zero'd.
6484 SIZE is the number of bytes of TARGET we are allowed to modify: this
6485 may not be the same as the size of EXP if we are assigning to a field
6486 which has been packed to exclude padding bits.
6487 If REVERSE is true, the store is to be done in reverse order. */
6490 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6493 tree type
= TREE_TYPE (exp
);
6494 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6495 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6497 switch (TREE_CODE (type
))
6501 case QUAL_UNION_TYPE
:
6503 unsigned HOST_WIDE_INT idx
;
6506 /* The storage order is specified for every aggregate type. */
6507 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6509 /* If size is zero or the target is already cleared, do nothing. */
6510 if (known_eq (size
, 0) || cleared
)
6512 /* We either clear the aggregate or indicate the value is dead. */
6513 else if ((TREE_CODE (type
) == UNION_TYPE
6514 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6515 && ! CONSTRUCTOR_ELTS (exp
))
6516 /* If the constructor is empty, clear the union. */
6518 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6522 /* If we are building a static constructor into a register,
6523 set the initial value as zero so we can fold the value into
6524 a constant. But if more than one register is involved,
6525 this probably loses. */
6526 else if (REG_P (target
) && TREE_STATIC (exp
)
6527 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6528 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6530 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6534 /* If the constructor has fewer fields than the structure or
6535 if we are initializing the structure to mostly zeros, clear
6536 the whole structure first. Don't do this if TARGET is a
6537 register whose mode size isn't equal to SIZE since
6538 clear_storage can't handle this case. */
6539 else if (known_size_p (size
)
6540 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6541 || mostly_zeros_p (exp
))
6543 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6545 clear_storage (target
, gen_int_mode (size
, Pmode
),
6550 if (REG_P (target
) && !cleared
)
6551 emit_clobber (target
);
6553 /* Store each element of the constructor into the
6554 corresponding field of TARGET. */
6555 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6558 HOST_WIDE_INT bitsize
;
6559 HOST_WIDE_INT bitpos
= 0;
6561 rtx to_rtx
= target
;
6563 /* Just ignore missing fields. We cleared the whole
6564 structure, above, if any fields are missing. */
6568 if (cleared
&& initializer_zerop (value
))
6571 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6572 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6576 mode
= DECL_MODE (field
);
6577 if (DECL_BIT_FIELD (field
))
6580 offset
= DECL_FIELD_OFFSET (field
);
6581 if (tree_fits_shwi_p (offset
)
6582 && tree_fits_shwi_p (bit_position (field
)))
6584 bitpos
= int_bit_position (field
);
6590 /* If this initializes a field that is smaller than a
6591 word, at the start of a word, try to widen it to a full
6592 word. This special case allows us to output C++ member
6593 function initializations in a form that the optimizers
6595 if (WORD_REGISTER_OPERATIONS
6597 && bitsize
< BITS_PER_WORD
6598 && bitpos
% BITS_PER_WORD
== 0
6599 && GET_MODE_CLASS (mode
) == MODE_INT
6600 && TREE_CODE (value
) == INTEGER_CST
6602 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6604 type
= TREE_TYPE (value
);
6606 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6608 type
= lang_hooks
.types
.type_for_mode
6609 (word_mode
, TYPE_UNSIGNED (type
));
6610 value
= fold_convert (type
, value
);
6611 /* Make sure the bits beyond the original bitsize are zero
6612 so that we can correctly avoid extra zeroing stores in
6613 later constructor elements. */
6615 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6617 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6620 if (BYTES_BIG_ENDIAN
)
6622 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6623 build_int_cst (type
,
6624 BITS_PER_WORD
- bitsize
));
6625 bitsize
= BITS_PER_WORD
;
6629 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6630 && DECL_NONADDRESSABLE_P (field
))
6632 to_rtx
= copy_rtx (to_rtx
);
6633 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6636 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6637 0, bitregion_end
, mode
,
6639 get_alias_set (TREE_TYPE (field
)),
6647 unsigned HOST_WIDE_INT i
;
6650 tree elttype
= TREE_TYPE (type
);
6652 HOST_WIDE_INT minelt
= 0;
6653 HOST_WIDE_INT maxelt
= 0;
6655 /* The storage order is specified for every aggregate type. */
6656 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6658 domain
= TYPE_DOMAIN (type
);
6659 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6660 && TYPE_MAX_VALUE (domain
)
6661 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6662 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6664 /* If we have constant bounds for the range of the type, get them. */
6667 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6668 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6671 /* If the constructor has fewer elements than the array, clear
6672 the whole array first. Similarly if this is static
6673 constructor of a non-BLKmode object. */
6676 else if (REG_P (target
) && TREE_STATIC (exp
))
6680 unsigned HOST_WIDE_INT idx
;
6681 HOST_WIDE_INT count
= 0, zero_count
= 0;
6682 need_to_clear
= ! const_bounds_p
;
6684 /* This loop is a more accurate version of the loop in
6685 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6686 is also needed to check for missing elements. */
6687 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6689 HOST_WIDE_INT this_node_count
;
6694 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6696 tree lo_index
= TREE_OPERAND (index
, 0);
6697 tree hi_index
= TREE_OPERAND (index
, 1);
6699 if (! tree_fits_uhwi_p (lo_index
)
6700 || ! tree_fits_uhwi_p (hi_index
))
6706 this_node_count
= (tree_to_uhwi (hi_index
)
6707 - tree_to_uhwi (lo_index
) + 1);
6710 this_node_count
= 1;
6712 count
+= this_node_count
;
6713 if (mostly_zeros_p (value
))
6714 zero_count
+= this_node_count
;
6717 /* Clear the entire array first if there are any missing
6718 elements, or if the incidence of zero elements is >=
6721 && (count
< maxelt
- minelt
+ 1
6722 || 4 * zero_count
>= 3 * count
))
6726 if (need_to_clear
&& maybe_gt (size
, 0))
6729 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6731 clear_storage (target
, gen_int_mode (size
, Pmode
),
6736 if (!cleared
&& REG_P (target
))
6737 /* Inform later passes that the old value is dead. */
6738 emit_clobber (target
);
6740 /* Store each element of the constructor into the
6741 corresponding element of TARGET, determined by counting the
6743 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6747 HOST_WIDE_INT bitpos
;
6748 rtx xtarget
= target
;
6750 if (cleared
&& initializer_zerop (value
))
6753 mode
= TYPE_MODE (elttype
);
6754 if (mode
!= BLKmode
)
6755 bitsize
= GET_MODE_BITSIZE (mode
);
6756 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6759 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6761 tree lo_index
= TREE_OPERAND (index
, 0);
6762 tree hi_index
= TREE_OPERAND (index
, 1);
6763 rtx index_r
, pos_rtx
;
6764 HOST_WIDE_INT lo
, hi
, count
;
6767 /* If the range is constant and "small", unroll the loop. */
6769 && tree_fits_shwi_p (lo_index
)
6770 && tree_fits_shwi_p (hi_index
)
6771 && (lo
= tree_to_shwi (lo_index
),
6772 hi
= tree_to_shwi (hi_index
),
6773 count
= hi
- lo
+ 1,
6776 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6777 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6780 lo
-= minelt
; hi
-= minelt
;
6781 for (; lo
<= hi
; lo
++)
6783 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6786 && !MEM_KEEP_ALIAS_SET_P (target
)
6787 && TREE_CODE (type
) == ARRAY_TYPE
6788 && TYPE_NONALIASED_COMPONENT (type
))
6790 target
= copy_rtx (target
);
6791 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6794 store_constructor_field
6795 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6796 mode
, value
, cleared
,
6797 get_alias_set (elttype
), reverse
);
6802 rtx_code_label
*loop_start
= gen_label_rtx ();
6803 rtx_code_label
*loop_end
= gen_label_rtx ();
6806 expand_normal (hi_index
);
6808 index
= build_decl (EXPR_LOCATION (exp
),
6809 VAR_DECL
, NULL_TREE
, domain
);
6810 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6811 SET_DECL_RTL (index
, index_r
);
6812 store_expr (lo_index
, index_r
, 0, false, reverse
);
6814 /* Build the head of the loop. */
6815 do_pending_stack_adjust ();
6816 emit_label (loop_start
);
6818 /* Assign value to element index. */
6820 fold_convert (ssizetype
,
6821 fold_build2 (MINUS_EXPR
,
6824 TYPE_MIN_VALUE (domain
)));
6827 size_binop (MULT_EXPR
, position
,
6828 fold_convert (ssizetype
,
6829 TYPE_SIZE_UNIT (elttype
)));
6831 pos_rtx
= expand_normal (position
);
6832 xtarget
= offset_address (target
, pos_rtx
,
6833 highest_pow2_factor (position
));
6834 xtarget
= adjust_address (xtarget
, mode
, 0);
6835 if (TREE_CODE (value
) == CONSTRUCTOR
)
6836 store_constructor (value
, xtarget
, cleared
,
6837 exact_div (bitsize
, BITS_PER_UNIT
),
6840 store_expr (value
, xtarget
, 0, false, reverse
);
6842 /* Generate a conditional jump to exit the loop. */
6843 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6845 jumpif (exit_cond
, loop_end
,
6846 profile_probability::uninitialized ());
6848 /* Update the loop counter, and jump to the head of
6850 expand_assignment (index
,
6851 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6852 index
, integer_one_node
),
6855 emit_jump (loop_start
);
6857 /* Build the end of the loop. */
6858 emit_label (loop_end
);
6861 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6862 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6867 index
= ssize_int (1);
6870 index
= fold_convert (ssizetype
,
6871 fold_build2 (MINUS_EXPR
,
6874 TYPE_MIN_VALUE (domain
)));
6877 size_binop (MULT_EXPR
, index
,
6878 fold_convert (ssizetype
,
6879 TYPE_SIZE_UNIT (elttype
)));
6880 xtarget
= offset_address (target
,
6881 expand_normal (position
),
6882 highest_pow2_factor (position
));
6883 xtarget
= adjust_address (xtarget
, mode
, 0);
6884 store_expr (value
, xtarget
, 0, false, reverse
);
6889 bitpos
= ((tree_to_shwi (index
) - minelt
)
6890 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6892 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6894 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6895 && TREE_CODE (type
) == ARRAY_TYPE
6896 && TYPE_NONALIASED_COMPONENT (type
))
6898 target
= copy_rtx (target
);
6899 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6901 store_constructor_field (target
, bitsize
, bitpos
, 0,
6902 bitregion_end
, mode
, value
,
6903 cleared
, get_alias_set (elttype
),
6912 unsigned HOST_WIDE_INT idx
;
6913 constructor_elt
*ce
;
6916 insn_code icode
= CODE_FOR_nothing
;
6918 tree elttype
= TREE_TYPE (type
);
6919 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6920 machine_mode eltmode
= TYPE_MODE (elttype
);
6921 HOST_WIDE_INT bitsize
;
6922 HOST_WIDE_INT bitpos
;
6923 rtvec vector
= NULL
;
6925 unsigned HOST_WIDE_INT const_n_elts
;
6926 alias_set_type alias
;
6927 bool vec_vec_init_p
= false;
6928 machine_mode mode
= GET_MODE (target
);
6930 gcc_assert (eltmode
!= BLKmode
);
6932 /* Try using vec_duplicate_optab for uniform vectors. */
6933 if (!TREE_SIDE_EFFECTS (exp
)
6934 && VECTOR_MODE_P (mode
)
6935 && eltmode
== GET_MODE_INNER (mode
)
6936 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6937 != CODE_FOR_nothing
)
6938 && (elt
= uniform_vector_p (exp
)))
6940 class expand_operand ops
[2];
6941 create_output_operand (&ops
[0], target
, mode
);
6942 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6943 expand_insn (icode
, 2, ops
);
6944 if (!rtx_equal_p (target
, ops
[0].value
))
6945 emit_move_insn (target
, ops
[0].value
);
6949 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6951 && VECTOR_MODE_P (mode
)
6952 && n_elts
.is_constant (&const_n_elts
))
6954 machine_mode emode
= eltmode
;
6955 bool vector_typed_elts_p
= false;
6957 if (CONSTRUCTOR_NELTS (exp
)
6958 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6961 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6962 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6963 * TYPE_VECTOR_SUBPARTS (etype
),
6965 emode
= TYPE_MODE (etype
);
6966 vector_typed_elts_p
= true;
6968 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6969 if (icode
!= CODE_FOR_nothing
)
6971 unsigned int n
= const_n_elts
;
6973 if (vector_typed_elts_p
)
6975 n
= CONSTRUCTOR_NELTS (exp
);
6976 vec_vec_init_p
= true;
6978 vector
= rtvec_alloc (n
);
6979 for (unsigned int k
= 0; k
< n
; k
++)
6980 RTVEC_ELT (vector
, k
) = CONST0_RTX (emode
);
6984 /* If the constructor has fewer elements than the vector,
6985 clear the whole array first. Similarly if this is static
6986 constructor of a non-BLKmode object. */
6989 else if (REG_P (target
) && TREE_STATIC (exp
))
6993 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6996 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6998 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
7000 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
7001 TYPE_SIZE (elttype
)));
7003 count
+= n_elts_here
;
7004 if (mostly_zeros_p (value
))
7005 zero_count
+= n_elts_here
;
7008 /* Clear the entire vector first if there are any missing elements,
7009 or if the incidence of zero elements is >= 75%. */
7010 need_to_clear
= (maybe_lt (count
, n_elts
)
7011 || 4 * zero_count
>= 3 * count
);
7014 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
7017 emit_move_insn (target
, CONST0_RTX (mode
));
7019 clear_storage (target
, gen_int_mode (size
, Pmode
),
7024 /* Inform later passes that the old value is dead. */
7025 if (!cleared
&& !vector
&& REG_P (target
))
7026 emit_move_insn (target
, CONST0_RTX (mode
));
7029 alias
= MEM_ALIAS_SET (target
);
7031 alias
= get_alias_set (elttype
);
7033 /* Store each element of the constructor into the corresponding
7034 element of TARGET, determined by counting the elements. */
7035 for (idx
= 0, i
= 0;
7036 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
7037 idx
++, i
+= bitsize
/ elt_size
)
7039 HOST_WIDE_INT eltpos
;
7040 tree value
= ce
->value
;
7042 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
7043 if (cleared
&& initializer_zerop (value
))
7047 eltpos
= tree_to_uhwi (ce
->index
);
7055 gcc_assert (ce
->index
== NULL_TREE
);
7056 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
7060 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
7061 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
7065 machine_mode value_mode
7066 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
7067 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
7068 bitpos
= eltpos
* elt_size
;
7069 store_constructor_field (target
, bitsize
, bitpos
, 0,
7070 bitregion_end
, value_mode
,
7071 value
, cleared
, alias
, reverse
);
7076 emit_insn (GEN_FCN (icode
) (target
,
7077 gen_rtx_PARALLEL (mode
, vector
)));
7086 /* Store the value of EXP (an expression tree)
7087 into a subfield of TARGET which has mode MODE and occupies
7088 BITSIZE bits, starting BITPOS bits from the start of TARGET.
7089 If MODE is VOIDmode, it means that we are storing into a bit-field.
7091 BITREGION_START is bitpos of the first bitfield in this region.
7092 BITREGION_END is the bitpos of the ending bitfield in this region.
7093 These two fields are 0, if the C++ memory model does not apply,
7094 or we are not interested in keeping track of bitfield regions.
7096 Always return const0_rtx unless we have something particular to
7099 ALIAS_SET is the alias set for the destination. This value will
7100 (in general) be different from that for TARGET, since TARGET is a
7101 reference to the containing structure.
7103 If NONTEMPORAL is true, try generating a nontemporal store.
7105 If REVERSE is true, the store is to be done in reverse order. */
7108 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
7109 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
7110 machine_mode mode
, tree exp
,
7111 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
7113 if (TREE_CODE (exp
) == ERROR_MARK
)
7116 /* If we have nothing to store, do nothing unless the expression has
7117 side-effects. Don't do that for zero sized addressable lhs of
7119 if (known_eq (bitsize
, 0)
7120 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7121 || TREE_CODE (exp
) != CALL_EXPR
))
7122 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
7124 if (GET_CODE (target
) == CONCAT
)
7126 /* We're storing into a struct containing a single __complex. */
7128 gcc_assert (known_eq (bitpos
, 0));
7129 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
7132 /* If the structure is in a register or if the component
7133 is a bit field, we cannot use addressing to access it.
7134 Use bit-field techniques or SUBREG to store in it. */
7136 poly_int64 decl_bitsize
;
7137 if (mode
== VOIDmode
7138 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
7139 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
7140 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
7142 || GET_CODE (target
) == SUBREG
7143 /* If the field isn't aligned enough to store as an ordinary memref,
7144 store it as a bit field. */
7146 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
7147 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
7148 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
7149 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
7150 || (known_size_p (bitsize
)
7152 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
7153 /* If the RHS and field are a constant size and the size of the
7154 RHS isn't the same size as the bitfield, we must use bitfield
7156 || (known_size_p (bitsize
)
7157 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
7158 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
7160 /* Except for initialization of full bytes from a CONSTRUCTOR, which
7161 we will handle specially below. */
7162 && !(TREE_CODE (exp
) == CONSTRUCTOR
7163 && multiple_p (bitsize
, BITS_PER_UNIT
))
7164 /* And except for bitwise copying of TREE_ADDRESSABLE types,
7165 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
7166 includes some extra padding. store_expr / expand_expr will in
7167 that case call get_inner_reference that will have the bitsize
7168 we check here and thus the block move will not clobber the
7169 padding that shouldn't be clobbered. In the future we could
7170 replace the TREE_ADDRESSABLE check with a check that
7171 get_base_address needs to live in memory. */
7172 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7173 || TREE_CODE (exp
) != COMPONENT_REF
7174 || !multiple_p (bitsize
, BITS_PER_UNIT
)
7175 || !multiple_p (bitpos
, BITS_PER_UNIT
)
7176 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
7178 || maybe_ne (decl_bitsize
, bitsize
)))
7179 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
7180 decl we must use bitfield operations. */
7181 || (known_size_p (bitsize
)
7182 && TREE_CODE (exp
) == MEM_REF
7183 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
7184 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7185 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7186 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
7191 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7192 implies a mask operation. If the precision is the same size as
7193 the field we're storing into, that mask is redundant. This is
7194 particularly common with bit field assignments generated by the
7196 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
7199 tree type
= TREE_TYPE (exp
);
7200 if (INTEGRAL_TYPE_P (type
)
7201 && maybe_ne (TYPE_PRECISION (type
),
7202 GET_MODE_BITSIZE (TYPE_MODE (type
)))
7203 && known_eq (bitsize
, TYPE_PRECISION (type
)))
7205 tree op
= gimple_assign_rhs1 (nop_def
);
7206 type
= TREE_TYPE (op
);
7207 if (INTEGRAL_TYPE_P (type
)
7208 && known_ge (TYPE_PRECISION (type
), bitsize
))
7213 temp
= expand_normal (exp
);
7215 /* We don't support variable-sized BLKmode bitfields, since our
7216 handling of BLKmode is bound up with the ability to break
7217 things into words. */
7218 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
7220 /* Handle calls that return values in multiple non-contiguous locations.
7221 The Irix 6 ABI has examples of this. */
7222 if (GET_CODE (temp
) == PARALLEL
)
7224 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
7225 machine_mode temp_mode
= GET_MODE (temp
);
7226 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
7227 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
7228 rtx temp_target
= gen_reg_rtx (temp_mode
);
7229 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
7233 /* Handle calls that return BLKmode values in registers. */
7234 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7236 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7237 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7241 /* If the value has aggregate type and an integral mode then, if BITSIZE
7242 is narrower than this mode and this is for big-endian data, we first
7243 need to put the value into the low-order bits for store_bit_field,
7244 except when MODE is BLKmode and BITSIZE larger than the word size
7245 (see the handling of fields larger than a word in store_bit_field).
7246 Moreover, the field may be not aligned on a byte boundary; in this
7247 case, if it has reverse storage order, it needs to be accessed as a
7248 scalar field with reverse storage order and we must first put the
7249 value into target order. */
7250 scalar_int_mode temp_mode
;
7251 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7252 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7254 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7256 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7259 temp
= flip_storage_order (temp_mode
, temp
);
7261 gcc_checking_assert (known_le (bitsize
, size
));
7262 if (maybe_lt (bitsize
, size
)
7263 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7264 /* Use of to_constant for BLKmode was checked above. */
7265 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7266 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7267 size
- bitsize
, NULL_RTX
, 1);
7270 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7271 if (mode
!= VOIDmode
&& mode
!= BLKmode
7272 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7273 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7275 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7276 and BITPOS must be aligned on a byte boundary. If so, we simply do
7277 a block copy. Likewise for a BLKmode-like TARGET. */
7278 if (GET_MODE (temp
) == BLKmode
7279 && (GET_MODE (target
) == BLKmode
7281 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7282 && multiple_p (bitpos
, BITS_PER_UNIT
)
7283 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7285 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7286 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7287 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7289 target
= adjust_address (target
, VOIDmode
, bytepos
);
7290 emit_block_move (target
, temp
,
7291 gen_int_mode (bytesize
, Pmode
),
7297 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7298 word size, we need to load the value (see again store_bit_field). */
7299 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7301 temp_mode
= smallest_int_mode_for_size (bitsize
);
7302 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7303 temp_mode
, false, NULL
);
7306 /* Store the value in the bitfield. */
7307 gcc_checking_assert (known_ge (bitpos
, 0));
7308 store_bit_field (target
, bitsize
, bitpos
,
7309 bitregion_start
, bitregion_end
,
7310 mode
, temp
, reverse
);
7316 /* Now build a reference to just the desired component. */
7317 rtx to_rtx
= adjust_address (target
, mode
,
7318 exact_div (bitpos
, BITS_PER_UNIT
));
7320 if (to_rtx
== target
)
7321 to_rtx
= copy_rtx (to_rtx
);
7323 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7324 set_mem_alias_set (to_rtx
, alias_set
);
7326 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7327 into a target smaller than its type; handle that case now. */
7328 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7330 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7331 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7335 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7339 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7340 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7341 codes and find the ultimate containing object, which we return.
7343 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7344 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7345 storage order of the field.
7346 If the position of the field is variable, we store a tree
7347 giving the variable offset (in units) in *POFFSET.
7348 This offset is in addition to the bit position.
7349 If the position is not variable, we store 0 in *POFFSET.
7351 If any of the extraction expressions is volatile,
7352 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7354 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7355 Otherwise, it is a mode that can be used to access the field.
7357 If the field describes a variable-sized object, *PMODE is set to
7358 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7359 this case, but the address of the object can be found. */
7362 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7363 poly_int64_pod
*pbitpos
, tree
*poffset
,
7364 machine_mode
*pmode
, int *punsignedp
,
7365 int *preversep
, int *pvolatilep
)
7368 machine_mode mode
= VOIDmode
;
7369 bool blkmode_bitfield
= false;
7370 tree offset
= size_zero_node
;
7371 poly_offset_int bit_offset
= 0;
7373 /* First get the mode, signedness, storage order and size. We do this from
7374 just the outermost expression. */
7376 if (TREE_CODE (exp
) == COMPONENT_REF
)
7378 tree field
= TREE_OPERAND (exp
, 1);
7379 size_tree
= DECL_SIZE (field
);
7380 if (flag_strict_volatile_bitfields
> 0
7381 && TREE_THIS_VOLATILE (exp
)
7382 && DECL_BIT_FIELD_TYPE (field
)
7383 && DECL_MODE (field
) != BLKmode
)
7384 /* Volatile bitfields should be accessed in the mode of the
7385 field's type, not the mode computed based on the bit
7387 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7388 else if (!DECL_BIT_FIELD (field
))
7390 mode
= DECL_MODE (field
);
7391 /* For vector fields re-check the target flags, as DECL_MODE
7392 could have been set with different target flags than
7393 the current function has. */
7395 && VECTOR_TYPE_P (TREE_TYPE (field
))
7396 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7397 mode
= TYPE_MODE (TREE_TYPE (field
));
7399 else if (DECL_MODE (field
) == BLKmode
)
7400 blkmode_bitfield
= true;
7402 *punsignedp
= DECL_UNSIGNED (field
);
7404 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7406 size_tree
= TREE_OPERAND (exp
, 1);
7407 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7408 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7410 /* For vector element types with the correct size of access or for
7411 vector typed accesses use the mode of the access type. */
7412 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7413 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7414 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7415 || VECTOR_TYPE_P (TREE_TYPE (exp
)))
7416 mode
= TYPE_MODE (TREE_TYPE (exp
));
7420 mode
= TYPE_MODE (TREE_TYPE (exp
));
7421 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7423 if (mode
== BLKmode
)
7424 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7426 *pbitsize
= GET_MODE_BITSIZE (mode
);
7431 if (! tree_fits_uhwi_p (size_tree
))
7432 mode
= BLKmode
, *pbitsize
= -1;
7434 *pbitsize
= tree_to_uhwi (size_tree
);
7437 *preversep
= reverse_storage_order_for_component_p (exp
);
7439 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7440 and find the ultimate containing object. */
7443 switch (TREE_CODE (exp
))
7446 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7451 tree field
= TREE_OPERAND (exp
, 1);
7452 tree this_offset
= component_ref_field_offset (exp
);
7454 /* If this field hasn't been filled in yet, don't go past it.
7455 This should only happen when folding expressions made during
7456 type construction. */
7457 if (this_offset
== 0)
7460 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7461 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7463 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7468 case ARRAY_RANGE_REF
:
7470 tree index
= TREE_OPERAND (exp
, 1);
7471 tree low_bound
= array_ref_low_bound (exp
);
7472 tree unit_size
= array_ref_element_size (exp
);
7474 /* We assume all arrays have sizes that are a multiple of a byte.
7475 First subtract the lower bound, if any, in the type of the
7476 index, then convert to sizetype and multiply by the size of
7477 the array element. */
7478 if (! integer_zerop (low_bound
))
7479 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7482 offset
= size_binop (PLUS_EXPR
, offset
,
7483 size_binop (MULT_EXPR
,
7484 fold_convert (sizetype
, index
),
7493 bit_offset
+= *pbitsize
;
7496 case VIEW_CONVERT_EXPR
:
7500 /* Hand back the decl for MEM[&decl, off]. */
7501 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7503 tree off
= TREE_OPERAND (exp
, 1);
7504 if (!integer_zerop (off
))
7506 poly_offset_int boff
= mem_ref_offset (exp
);
7507 boff
<<= LOG2_BITS_PER_UNIT
;
7510 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7518 /* If any reference in the chain is volatile, the effect is volatile. */
7519 if (TREE_THIS_VOLATILE (exp
))
7522 exp
= TREE_OPERAND (exp
, 0);
7526 /* If OFFSET is constant, see if we can return the whole thing as a
7527 constant bit position. Make sure to handle overflow during
7529 if (poly_int_tree_p (offset
))
7531 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7532 TYPE_PRECISION (sizetype
));
7533 tem
<<= LOG2_BITS_PER_UNIT
;
7535 if (tem
.to_shwi (pbitpos
))
7536 *poffset
= offset
= NULL_TREE
;
7539 /* Otherwise, split it up. */
7542 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7543 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7545 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7546 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7547 offset
= size_binop (PLUS_EXPR
, offset
,
7548 build_int_cst (sizetype
, bytes
.force_shwi ()));
7554 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7555 if (mode
== VOIDmode
7557 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7558 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7566 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7568 static unsigned HOST_WIDE_INT
7569 target_align (const_tree target
)
7571 /* We might have a chain of nested references with intermediate misaligning
7572 bitfields components, so need to recurse to find out. */
7574 unsigned HOST_WIDE_INT this_align
, outer_align
;
7576 switch (TREE_CODE (target
))
7582 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7583 outer_align
= target_align (TREE_OPERAND (target
, 0));
7584 return MIN (this_align
, outer_align
);
7587 case ARRAY_RANGE_REF
:
7588 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7589 outer_align
= target_align (TREE_OPERAND (target
, 0));
7590 return MIN (this_align
, outer_align
);
7593 case NON_LVALUE_EXPR
:
7594 case VIEW_CONVERT_EXPR
:
7595 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7596 outer_align
= target_align (TREE_OPERAND (target
, 0));
7597 return MAX (this_align
, outer_align
);
7600 return TYPE_ALIGN (TREE_TYPE (target
));
7605 /* Given an rtx VALUE that may contain additions and multiplications, return
7606 an equivalent value that just refers to a register, memory, or constant.
7607 This is done by generating instructions to perform the arithmetic and
7608 returning a pseudo-register containing the value.
7610 The returned value may be a REG, SUBREG, MEM or constant. */
7613 force_operand (rtx value
, rtx target
)
7616 /* Use subtarget as the target for operand 0 of a binary operation. */
7617 rtx subtarget
= get_subtarget (target
);
7618 enum rtx_code code
= GET_CODE (value
);
7620 /* Check for subreg applied to an expression produced by loop optimizer. */
7622 && !REG_P (SUBREG_REG (value
))
7623 && !MEM_P (SUBREG_REG (value
)))
7626 = simplify_gen_subreg (GET_MODE (value
),
7627 force_reg (GET_MODE (SUBREG_REG (value
)),
7628 force_operand (SUBREG_REG (value
),
7630 GET_MODE (SUBREG_REG (value
)),
7631 SUBREG_BYTE (value
));
7632 code
= GET_CODE (value
);
7635 /* Check for a PIC address load. */
7636 if ((code
== PLUS
|| code
== MINUS
)
7637 && XEXP (value
, 0) == pic_offset_table_rtx
7638 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7639 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7640 || GET_CODE (XEXP (value
, 1)) == CONST
))
7643 subtarget
= gen_reg_rtx (GET_MODE (value
));
7644 emit_move_insn (subtarget
, value
);
7648 if (ARITHMETIC_P (value
))
7650 op2
= XEXP (value
, 1);
7651 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7653 if (code
== MINUS
&& CONST_INT_P (op2
))
7656 op2
= negate_rtx (GET_MODE (value
), op2
);
7659 /* Check for an addition with OP2 a constant integer and our first
7660 operand a PLUS of a virtual register and something else. In that
7661 case, we want to emit the sum of the virtual register and the
7662 constant first and then add the other value. This allows virtual
7663 register instantiation to simply modify the constant rather than
7664 creating another one around this addition. */
7665 if (code
== PLUS
&& CONST_INT_P (op2
)
7666 && GET_CODE (XEXP (value
, 0)) == PLUS
7667 && REG_P (XEXP (XEXP (value
, 0), 0))
7668 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7669 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7671 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7672 XEXP (XEXP (value
, 0), 0), op2
,
7673 subtarget
, 0, OPTAB_LIB_WIDEN
);
7674 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7675 force_operand (XEXP (XEXP (value
,
7677 target
, 0, OPTAB_LIB_WIDEN
);
7680 op1
= force_operand (XEXP (value
, 0), subtarget
);
7681 op2
= force_operand (op2
, NULL_RTX
);
7685 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7687 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7688 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7689 target
, 1, OPTAB_LIB_WIDEN
);
7691 return expand_divmod (0,
7692 FLOAT_MODE_P (GET_MODE (value
))
7693 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7694 GET_MODE (value
), op1
, op2
, target
, 0);
7696 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7699 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7702 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7705 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7706 target
, 0, OPTAB_LIB_WIDEN
);
7708 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7709 target
, 1, OPTAB_LIB_WIDEN
);
7712 if (UNARY_P (value
))
7715 target
= gen_reg_rtx (GET_MODE (value
));
7716 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7723 case FLOAT_TRUNCATE
:
7724 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7729 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7733 case UNSIGNED_FLOAT
:
7734 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7738 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7742 #ifdef INSN_SCHEDULING
7743 /* On machines that have insn scheduling, we want all memory reference to be
7744 explicit, so we need to deal with such paradoxical SUBREGs. */
7745 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7747 = simplify_gen_subreg (GET_MODE (value
),
7748 force_reg (GET_MODE (SUBREG_REG (value
)),
7749 force_operand (SUBREG_REG (value
),
7751 GET_MODE (SUBREG_REG (value
)),
7752 SUBREG_BYTE (value
));
7758 /* Subroutine of expand_expr: return nonzero iff there is no way that
7759 EXP can reference X, which is being modified. TOP_P is nonzero if this
7760 call is going to be used to determine whether we need a temporary
7761 for EXP, as opposed to a recursive call to this function.
7763 It is always safe for this routine to return zero since it merely
7764 searches for optimization opportunities. */
7767 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7773 /* If EXP has varying size, we MUST use a target since we currently
7774 have no way of allocating temporaries of variable size
7775 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7776 So we assume here that something at a higher level has prevented a
7777 clash. This is somewhat bogus, but the best we can do. Only
7778 do this when X is BLKmode and when we are at the top level. */
7779 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7780 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7781 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7782 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7783 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7785 && GET_MODE (x
) == BLKmode
)
7786 /* If X is in the outgoing argument area, it is always safe. */
7788 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7789 || (GET_CODE (XEXP (x
, 0)) == PLUS
7790 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7793 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7794 find the underlying pseudo. */
7795 if (GET_CODE (x
) == SUBREG
)
7798 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7802 /* Now look at our tree code and possibly recurse. */
7803 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7805 case tcc_declaration
:
7806 exp_rtl
= DECL_RTL_IF_SET (exp
);
7812 case tcc_exceptional
:
7813 if (TREE_CODE (exp
) == TREE_LIST
)
7817 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7819 exp
= TREE_CHAIN (exp
);
7822 if (TREE_CODE (exp
) != TREE_LIST
)
7823 return safe_from_p (x
, exp
, 0);
7826 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7828 constructor_elt
*ce
;
7829 unsigned HOST_WIDE_INT idx
;
7831 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7832 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7833 || !safe_from_p (x
, ce
->value
, 0))
7837 else if (TREE_CODE (exp
) == ERROR_MARK
)
7838 return 1; /* An already-visited SAVE_EXPR? */
7843 /* The only case we look at here is the DECL_INITIAL inside a
7845 return (TREE_CODE (exp
) != DECL_EXPR
7846 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7847 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7848 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7851 case tcc_comparison
:
7852 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7857 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7859 case tcc_expression
:
7862 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7863 the expression. If it is set, we conflict iff we are that rtx or
7864 both are in memory. Otherwise, we check all operands of the
7865 expression recursively. */
7867 switch (TREE_CODE (exp
))
7870 /* If the operand is static or we are static, we can't conflict.
7871 Likewise if we don't conflict with the operand at all. */
7872 if (staticp (TREE_OPERAND (exp
, 0))
7873 || TREE_STATIC (exp
)
7874 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7877 /* Otherwise, the only way this can conflict is if we are taking
7878 the address of a DECL a that address if part of X, which is
7880 exp
= TREE_OPERAND (exp
, 0);
7883 if (!DECL_RTL_SET_P (exp
)
7884 || !MEM_P (DECL_RTL (exp
)))
7887 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7893 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7894 get_alias_set (exp
)))
7899 /* Assume that the call will clobber all hard registers and
7901 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7906 case WITH_CLEANUP_EXPR
:
7907 case CLEANUP_POINT_EXPR
:
7908 /* Lowered by gimplify.c. */
7912 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7918 /* If we have an rtx, we do not need to scan our operands. */
7922 nops
= TREE_OPERAND_LENGTH (exp
);
7923 for (i
= 0; i
< nops
; i
++)
7924 if (TREE_OPERAND (exp
, i
) != 0
7925 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7931 /* Should never get a type here. */
7935 /* If we have an rtl, find any enclosed object. Then see if we conflict
7939 if (GET_CODE (exp_rtl
) == SUBREG
)
7941 exp_rtl
= SUBREG_REG (exp_rtl
);
7943 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7947 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7948 are memory and they conflict. */
7949 return ! (rtx_equal_p (x
, exp_rtl
)
7950 || (MEM_P (x
) && MEM_P (exp_rtl
)
7951 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7954 /* If we reach here, it is safe. */
7959 /* Return the highest power of two that EXP is known to be a multiple of.
7960 This is used in updating alignment of MEMs in array references. */
7962 unsigned HOST_WIDE_INT
7963 highest_pow2_factor (const_tree exp
)
7965 unsigned HOST_WIDE_INT ret
;
7966 int trailing_zeros
= tree_ctz (exp
);
7967 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7968 return BIGGEST_ALIGNMENT
;
7969 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7970 if (ret
> BIGGEST_ALIGNMENT
)
7971 return BIGGEST_ALIGNMENT
;
7975 /* Similar, except that the alignment requirements of TARGET are
7976 taken into account. Assume it is at least as aligned as its
7977 type, unless it is a COMPONENT_REF in which case the layout of
7978 the structure gives the alignment. */
7980 static unsigned HOST_WIDE_INT
7981 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7983 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7984 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7986 return MAX (factor
, talign
);
7989 /* Convert the tree comparison code TCODE to the rtl one where the
7990 signedness is UNSIGNEDP. */
7992 static enum rtx_code
7993 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
8005 code
= unsignedp
? LTU
: LT
;
8008 code
= unsignedp
? LEU
: LE
;
8011 code
= unsignedp
? GTU
: GT
;
8014 code
= unsignedp
? GEU
: GE
;
8016 case UNORDERED_EXPR
:
8047 /* Subroutine of expand_expr. Expand the two operands of a binary
8048 expression EXP0 and EXP1 placing the results in OP0 and OP1.
8049 The value may be stored in TARGET if TARGET is nonzero. The
8050 MODIFIER argument is as documented by expand_expr. */
8053 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
8054 enum expand_modifier modifier
)
8056 if (! safe_from_p (target
, exp1
, 1))
8058 if (operand_equal_p (exp0
, exp1
, 0))
8060 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8061 *op1
= copy_rtx (*op0
);
8065 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8066 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
8071 /* Return a MEM that contains constant EXP. DEFER is as for
8072 output_constant_def and MODIFIER is as for expand_expr. */
8075 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
8079 mem
= output_constant_def (exp
, defer
);
8080 if (modifier
!= EXPAND_INITIALIZER
)
8081 mem
= use_anchored_address (mem
);
8085 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
8086 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8089 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
8090 enum expand_modifier modifier
, addr_space_t as
)
8092 rtx result
, subtarget
;
8094 poly_int64 bitsize
, bitpos
;
8095 int unsignedp
, reversep
, volatilep
= 0;
8098 /* If we are taking the address of a constant and are at the top level,
8099 we have to use output_constant_def since we can't call force_const_mem
8101 /* ??? This should be considered a front-end bug. We should not be
8102 generating ADDR_EXPR of something that isn't an LVALUE. The only
8103 exception here is STRING_CST. */
8104 if (CONSTANT_CLASS_P (exp
))
8106 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
8107 if (modifier
< EXPAND_SUM
)
8108 result
= force_operand (result
, target
);
8112 /* Everything must be something allowed by is_gimple_addressable. */
8113 switch (TREE_CODE (exp
))
8116 /* This case will happen via recursion for &a->b. */
8117 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
8121 tree tem
= TREE_OPERAND (exp
, 0);
8122 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
8123 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
8124 return expand_expr (tem
, target
, tmode
, modifier
);
8127 case TARGET_MEM_REF
:
8128 return addr_for_mem_ref (exp
, as
, true);
8131 /* Expand the initializer like constants above. */
8132 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
8134 if (modifier
< EXPAND_SUM
)
8135 result
= force_operand (result
, target
);
8139 /* The real part of the complex number is always first, therefore
8140 the address is the same as the address of the parent object. */
8143 inner
= TREE_OPERAND (exp
, 0);
8147 /* The imaginary part of the complex number is always second.
8148 The expression is therefore always offset by the size of the
8151 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
8152 inner
= TREE_OPERAND (exp
, 0);
8155 case COMPOUND_LITERAL_EXPR
:
8156 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
8157 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
8158 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
8159 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
8160 the initializers aren't gimplified. */
8161 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
8162 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
8163 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
8164 target
, tmode
, modifier
, as
);
8167 /* If the object is a DECL, then expand it for its rtl. Don't bypass
8168 expand_expr, as that can have various side effects; LABEL_DECLs for
8169 example, may not have their DECL_RTL set yet. Expand the rtl of
8170 CONSTRUCTORs too, which should yield a memory reference for the
8171 constructor's contents. Assume language specific tree nodes can
8172 be expanded in some interesting way. */
8173 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
8175 || TREE_CODE (exp
) == CONSTRUCTOR
8176 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
8178 result
= expand_expr (exp
, target
, tmode
,
8179 modifier
== EXPAND_INITIALIZER
8180 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
8182 /* If the DECL isn't in memory, then the DECL wasn't properly
8183 marked TREE_ADDRESSABLE, which will be either a front-end
8184 or a tree optimizer bug. */
8186 gcc_assert (MEM_P (result
));
8187 result
= XEXP (result
, 0);
8189 /* ??? Is this needed anymore? */
8191 TREE_USED (exp
) = 1;
8193 if (modifier
!= EXPAND_INITIALIZER
8194 && modifier
!= EXPAND_CONST_ADDRESS
8195 && modifier
!= EXPAND_SUM
)
8196 result
= force_operand (result
, target
);
8200 /* Pass FALSE as the last argument to get_inner_reference although
8201 we are expanding to RTL. The rationale is that we know how to
8202 handle "aligning nodes" here: we can just bypass them because
8203 they won't change the final object whose address will be returned
8204 (they actually exist only for that purpose). */
8205 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
8206 &unsignedp
, &reversep
, &volatilep
);
8210 /* We must have made progress. */
8211 gcc_assert (inner
!= exp
);
8213 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8214 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8215 inner alignment, force the inner to be sufficiently aligned. */
8216 if (CONSTANT_CLASS_P (inner
)
8217 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
8219 inner
= copy_node (inner
);
8220 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
8221 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
8222 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
8224 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
8230 if (modifier
!= EXPAND_NORMAL
)
8231 result
= force_operand (result
, NULL
);
8232 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
8233 modifier
== EXPAND_INITIALIZER
8234 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8236 /* expand_expr is allowed to return an object in a mode other
8237 than TMODE. If it did, we need to convert. */
8238 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8239 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8240 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8241 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8242 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8244 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8245 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8248 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8249 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8250 1, OPTAB_LIB_WIDEN
);
8254 if (maybe_ne (bitpos
, 0))
8256 /* Someone beforehand should have rejected taking the address
8257 of an object that isn't byte-aligned. */
8258 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8259 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8260 result
= plus_constant (tmode
, result
, bytepos
);
8261 if (modifier
< EXPAND_SUM
)
8262 result
= force_operand (result
, target
);
8268 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8269 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8272 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8273 enum expand_modifier modifier
)
8275 addr_space_t as
= ADDR_SPACE_GENERIC
;
8276 scalar_int_mode address_mode
= Pmode
;
8277 scalar_int_mode pointer_mode
= ptr_mode
;
8281 /* Target mode of VOIDmode says "whatever's natural". */
8282 if (tmode
== VOIDmode
)
8283 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8285 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8287 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8288 address_mode
= targetm
.addr_space
.address_mode (as
);
8289 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8292 /* We can get called with some Weird Things if the user does silliness
8293 like "(short) &a". In that case, convert_memory_address won't do
8294 the right thing, so ignore the given target mode. */
8295 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8299 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8300 new_tmode
, modifier
, as
);
8302 /* Despite expand_expr claims concerning ignoring TMODE when not
8303 strictly convenient, stuff breaks if we don't honor it. Note
8304 that combined with the above, we only do this for pointer modes. */
8305 rmode
= GET_MODE (result
);
8306 if (rmode
== VOIDmode
)
8308 if (rmode
!= new_tmode
)
8309 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8314 /* Generate code for computing CONSTRUCTOR EXP.
8315 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8316 is TRUE, instead of creating a temporary variable in memory
8317 NULL is returned and the caller needs to handle it differently. */
8320 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8321 bool avoid_temp_mem
)
8323 tree type
= TREE_TYPE (exp
);
8324 machine_mode mode
= TYPE_MODE (type
);
8326 /* Try to avoid creating a temporary at all. This is possible
8327 if all of the initializer is zero.
8328 FIXME: try to handle all [0..255] initializers we can handle
8330 if (TREE_STATIC (exp
)
8331 && !TREE_ADDRESSABLE (exp
)
8332 && target
!= 0 && mode
== BLKmode
8333 && all_zeros_p (exp
))
8335 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8339 /* All elts simple constants => refer to a constant in memory. But
8340 if this is a non-BLKmode mode, let it store a field at a time
8341 since that should make a CONST_INT, CONST_WIDE_INT or
8342 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8343 use, it is best to store directly into the target unless the type
8344 is large enough that memcpy will be used. If we are making an
8345 initializer and all operands are constant, put it in memory as
8348 FIXME: Avoid trying to fill vector constructors piece-meal.
8349 Output them with output_constant_def below unless we're sure
8350 they're zeros. This should go away when vector initializers
8351 are treated like VECTOR_CST instead of arrays. */
8352 if ((TREE_STATIC (exp
)
8353 && ((mode
== BLKmode
8354 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8355 || TREE_ADDRESSABLE (exp
)
8356 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8357 && (! can_move_by_pieces
8358 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8360 && ! mostly_zeros_p (exp
))))
8361 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8362 && TREE_CONSTANT (exp
)))
8369 constructor
= expand_expr_constant (exp
, 1, modifier
);
8371 if (modifier
!= EXPAND_CONST_ADDRESS
8372 && modifier
!= EXPAND_INITIALIZER
8373 && modifier
!= EXPAND_SUM
)
8374 constructor
= validize_mem (constructor
);
8379 /* Handle calls that pass values in multiple non-contiguous
8380 locations. The Irix 6 ABI has examples of this. */
8381 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8382 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8387 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8390 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8395 /* expand_expr: generate code for computing expression EXP.
8396 An rtx for the computed value is returned. The value is never null.
8397 In the case of a void EXP, const0_rtx is returned.
8399 The value may be stored in TARGET if TARGET is nonzero.
8400 TARGET is just a suggestion; callers must assume that
8401 the rtx returned may not be the same as TARGET.
8403 If TARGET is CONST0_RTX, it means that the value will be ignored.
8405 If TMODE is not VOIDmode, it suggests generating the
8406 result in mode TMODE. But this is done only when convenient.
8407 Otherwise, TMODE is ignored and the value generated in its natural mode.
8408 TMODE is just a suggestion; callers must assume that
8409 the rtx returned may not have mode TMODE.
8411 Note that TARGET may have neither TMODE nor MODE. In that case, it
8412 probably will not be used.
8414 If MODIFIER is EXPAND_SUM then when EXP is an addition
8415 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8416 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8417 products as above, or REG or MEM, or constant.
8418 Ordinarily in such cases we would output mul or add instructions
8419 and then return a pseudo reg containing the sum.
8421 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8422 it also marks a label as absolutely required (it can't be dead).
8423 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8424 This is used for outputting expressions used in initializers.
8426 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8427 with a constant address even if that address is not normally legitimate.
8428 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8430 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8431 a call parameter. Such targets require special care as we haven't yet
8432 marked TARGET so that it's safe from being trashed by libcalls. We
8433 don't want to use TARGET for anything but the final result;
8434 Intermediate values must go elsewhere. Additionally, calls to
8435 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8437 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8438 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8439 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8440 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8442 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8443 then *ALT_RTL is set to TARGET (before legitimziation).
8445 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8446 In this case, we don't adjust a returned MEM rtx that wouldn't be
8447 sufficiently aligned for its mode; instead, it's up to the caller
8448 to deal with it afterwards. This is used to make sure that unaligned
8449 base objects for which out-of-bounds accesses are supported, for
8450 example record types with trailing arrays, aren't realigned behind
8451 the back of the caller.
8452 The normal operating mode is to pass FALSE for this parameter. */
8455 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8456 enum expand_modifier modifier
, rtx
*alt_rtl
,
8457 bool inner_reference_p
)
8461 /* Handle ERROR_MARK before anybody tries to access its type. */
8462 if (TREE_CODE (exp
) == ERROR_MARK
8463 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8465 ret
= CONST0_RTX (tmode
);
8466 return ret
? ret
: const0_rtx
;
8469 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8474 /* Try to expand the conditional expression which is represented by
8475 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8476 return the rtl reg which represents the result. Otherwise return
8480 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8481 tree treeop1 ATTRIBUTE_UNUSED
,
8482 tree treeop2 ATTRIBUTE_UNUSED
)
8485 rtx op00
, op01
, op1
, op2
;
8486 enum rtx_code comparison_code
;
8487 machine_mode comparison_mode
;
8490 tree type
= TREE_TYPE (treeop1
);
8491 int unsignedp
= TYPE_UNSIGNED (type
);
8492 machine_mode mode
= TYPE_MODE (type
);
8493 machine_mode orig_mode
= mode
;
8494 static bool expanding_cond_expr_using_cmove
= false;
8496 /* Conditional move expansion can end up TERing two operands which,
8497 when recursively hitting conditional expressions can result in
8498 exponential behavior if the cmove expansion ultimatively fails.
8499 It's hardly profitable to TER a cmove into a cmove so avoid doing
8500 that by failing early if we end up recursing. */
8501 if (expanding_cond_expr_using_cmove
)
8504 /* If we cannot do a conditional move on the mode, try doing it
8505 with the promoted mode. */
8506 if (!can_conditionally_move_p (mode
))
8508 mode
= promote_mode (type
, mode
, &unsignedp
);
8509 if (!can_conditionally_move_p (mode
))
8511 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8514 temp
= assign_temp (type
, 0, 1);
8516 expanding_cond_expr_using_cmove
= true;
8518 expand_operands (treeop1
, treeop2
,
8519 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8521 if (TREE_CODE (treeop0
) == SSA_NAME
8522 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8524 type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8525 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8526 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8527 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8528 comparison_mode
= TYPE_MODE (type
);
8529 unsignedp
= TYPE_UNSIGNED (type
);
8530 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8532 else if (COMPARISON_CLASS_P (treeop0
))
8534 type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8535 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8536 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8537 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8538 unsignedp
= TYPE_UNSIGNED (type
);
8539 comparison_mode
= TYPE_MODE (type
);
8540 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8544 op00
= expand_normal (treeop0
);
8546 comparison_code
= NE
;
8547 comparison_mode
= GET_MODE (op00
);
8548 if (comparison_mode
== VOIDmode
)
8549 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8551 expanding_cond_expr_using_cmove
= false;
8553 if (GET_MODE (op1
) != mode
)
8554 op1
= gen_lowpart (mode
, op1
);
8556 if (GET_MODE (op2
) != mode
)
8557 op2
= gen_lowpart (mode
, op2
);
8559 /* Try to emit the conditional move. */
8560 insn
= emit_conditional_move (temp
, comparison_code
,
8561 op00
, op01
, comparison_mode
,
8565 /* If we could do the conditional move, emit the sequence,
8569 rtx_insn
*seq
= get_insns ();
8572 return convert_modes (orig_mode
, mode
, temp
, 0);
8575 /* Otherwise discard the sequence and fall back to code with
8581 /* A helper function for expand_expr_real_2 to be used with a
8582 misaligned mem_ref TEMP. Assume an unsigned type if UNSIGNEDP
8583 is nonzero, with alignment ALIGN in bits.
8584 Store the value at TARGET if possible (if TARGET is nonzero).
8585 Regardless of TARGET, we return the rtx for where the value is placed.
8586 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8587 then *ALT_RTL is set to TARGET (before legitimziation). */
8590 expand_misaligned_mem_ref (rtx temp
, machine_mode mode
, int unsignedp
,
8591 unsigned int align
, rtx target
, rtx
*alt_rtl
)
8593 enum insn_code icode
;
8595 if ((icode
= optab_handler (movmisalign_optab
, mode
))
8596 != CODE_FOR_nothing
)
8598 class expand_operand ops
[2];
8600 /* We've already validated the memory, and we're creating a
8601 new pseudo destination. The predicates really can't fail,
8602 nor can the generator. */
8603 create_output_operand (&ops
[0], NULL_RTX
, mode
);
8604 create_fixed_operand (&ops
[1], temp
);
8605 expand_insn (icode
, 2, ops
);
8606 temp
= ops
[0].value
;
8608 else if (targetm
.slow_unaligned_access (mode
, align
))
8609 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
8610 0, unsignedp
, target
,
8611 mode
, mode
, false, alt_rtl
);
8616 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8617 enum expand_modifier modifier
)
8619 rtx op0
, op1
, op2
, temp
;
8620 rtx_code_label
*lab
;
8624 scalar_int_mode int_mode
;
8625 enum tree_code code
= ops
->code
;
8627 rtx subtarget
, original_target
;
8629 bool reduce_bit_field
;
8630 location_t loc
= ops
->location
;
8631 tree treeop0
, treeop1
, treeop2
;
8632 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8633 ? reduce_to_bit_field_precision ((expr), \
8639 mode
= TYPE_MODE (type
);
8640 unsignedp
= TYPE_UNSIGNED (type
);
8646 /* We should be called only on simple (binary or unary) expressions,
8647 exactly those that are valid in gimple expressions that aren't
8648 GIMPLE_SINGLE_RHS (or invalid). */
8649 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8650 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8651 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8653 ignore
= (target
== const0_rtx
8654 || ((CONVERT_EXPR_CODE_P (code
)
8655 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8656 && TREE_CODE (type
) == VOID_TYPE
));
8658 /* We should be called only if we need the result. */
8659 gcc_assert (!ignore
);
8661 /* An operation in what may be a bit-field type needs the
8662 result to be reduced to the precision of the bit-field type,
8663 which is narrower than that of the type's mode. */
8664 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8665 && !type_has_mode_precision_p (type
));
8667 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8670 /* Use subtarget as the target for operand 0 of a binary operation. */
8671 subtarget
= get_subtarget (target
);
8672 original_target
= target
;
8676 case NON_LVALUE_EXPR
:
8679 if (treeop0
== error_mark_node
)
8682 if (TREE_CODE (type
) == UNION_TYPE
)
8684 tree valtype
= TREE_TYPE (treeop0
);
8686 /* If both input and output are BLKmode, this conversion isn't doing
8687 anything except possibly changing memory attribute. */
8688 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8690 rtx result
= expand_expr (treeop0
, target
, tmode
,
8693 result
= copy_rtx (result
);
8694 set_mem_attributes (result
, type
, 0);
8700 if (TYPE_MODE (type
) != BLKmode
)
8701 target
= gen_reg_rtx (TYPE_MODE (type
));
8703 target
= assign_temp (type
, 1, 1);
8707 /* Store data into beginning of memory target. */
8708 store_expr (treeop0
,
8709 adjust_address (target
, TYPE_MODE (valtype
), 0),
8710 modifier
== EXPAND_STACK_PARM
,
8711 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8715 gcc_assert (REG_P (target
)
8716 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8718 /* Store this field into a union of the proper type. */
8719 poly_uint64 op0_size
8720 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8721 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8722 store_field (target
,
8723 /* The conversion must be constructed so that
8724 we know at compile time how many bits
8726 ordered_min (op0_size
, union_size
),
8727 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8731 /* Return the entire union. */
8735 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8737 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8740 /* If the signedness of the conversion differs and OP0 is
8741 a promoted SUBREG, clear that indication since we now
8742 have to do the proper extension. */
8743 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8744 && GET_CODE (op0
) == SUBREG
)
8745 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8747 return REDUCE_BIT_FIELD (op0
);
8750 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8751 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8752 if (GET_MODE (op0
) == mode
)
8755 /* If OP0 is a constant, just convert it into the proper mode. */
8756 else if (CONSTANT_P (op0
))
8758 tree inner_type
= TREE_TYPE (treeop0
);
8759 machine_mode inner_mode
= GET_MODE (op0
);
8761 if (inner_mode
== VOIDmode
)
8762 inner_mode
= TYPE_MODE (inner_type
);
8764 if (modifier
== EXPAND_INITIALIZER
)
8765 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8767 op0
= convert_modes (mode
, inner_mode
, op0
,
8768 TYPE_UNSIGNED (inner_type
));
8771 else if (modifier
== EXPAND_INITIALIZER
)
8772 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8773 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8775 else if (target
== 0)
8776 op0
= convert_to_mode (mode
, op0
,
8777 TYPE_UNSIGNED (TREE_TYPE
8781 convert_move (target
, op0
,
8782 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8786 return REDUCE_BIT_FIELD (op0
);
8788 case ADDR_SPACE_CONVERT_EXPR
:
8790 tree treeop0_type
= TREE_TYPE (treeop0
);
8792 gcc_assert (POINTER_TYPE_P (type
));
8793 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8795 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8796 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8798 /* Conversions between pointers to the same address space should
8799 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8800 gcc_assert (as_to
!= as_from
);
8802 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8804 /* Ask target code to handle conversion between pointers
8805 to overlapping address spaces. */
8806 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8807 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8809 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8813 /* For disjoint address spaces, converting anything but a null
8814 pointer invokes undefined behavior. We truncate or extend the
8815 value as if we'd converted via integers, which handles 0 as
8816 required, and all others as the programmer likely expects. */
8817 #ifndef POINTERS_EXTEND_UNSIGNED
8818 const int POINTERS_EXTEND_UNSIGNED
= 1;
8820 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8821 op0
, POINTERS_EXTEND_UNSIGNED
);
8827 case POINTER_PLUS_EXPR
:
8828 /* Even though the sizetype mode and the pointer's mode can be different
8829 expand is able to handle this correctly and get the correct result out
8830 of the PLUS_EXPR code. */
8831 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8832 if sizetype precision is smaller than pointer precision. */
8833 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8834 treeop1
= fold_convert_loc (loc
, type
,
8835 fold_convert_loc (loc
, ssizetype
,
8837 /* If sizetype precision is larger than pointer precision, truncate the
8838 offset to have matching modes. */
8839 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8840 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8844 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8845 something else, make sure we add the register to the constant and
8846 then to the other thing. This case can occur during strength
8847 reduction and doing it this way will produce better code if the
8848 frame pointer or argument pointer is eliminated.
8850 fold-const.c will ensure that the constant is always in the inner
8851 PLUS_EXPR, so the only case we need to do anything about is if
8852 sp, ap, or fp is our second argument, in which case we must swap
8853 the innermost first argument and our second argument. */
8855 if (TREE_CODE (treeop0
) == PLUS_EXPR
8856 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8858 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8859 || DECL_RTL (treeop1
) == stack_pointer_rtx
8860 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8865 /* If the result is to be ptr_mode and we are adding an integer to
8866 something, we might be forming a constant. So try to use
8867 plus_constant. If it produces a sum and we can't accept it,
8868 use force_operand. This allows P = &ARR[const] to generate
8869 efficient code on machines where a SYMBOL_REF is not a valid
8872 If this is an EXPAND_SUM call, always return the sum. */
8873 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8874 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8876 if (modifier
== EXPAND_STACK_PARM
)
8878 if (TREE_CODE (treeop0
) == INTEGER_CST
8879 && HWI_COMPUTABLE_MODE_P (mode
)
8880 && TREE_CONSTANT (treeop1
))
8884 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8886 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8888 /* Use wi::shwi to ensure that the constant is
8889 truncated according to the mode of OP1, then sign extended
8890 to a HOST_WIDE_INT. Using the constant directly can result
8891 in non-canonical RTL in a 64x32 cross compile. */
8892 wc
= TREE_INT_CST_LOW (treeop0
);
8894 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8895 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8896 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8897 op1
= force_operand (op1
, target
);
8898 return REDUCE_BIT_FIELD (op1
);
8901 else if (TREE_CODE (treeop1
) == INTEGER_CST
8902 && HWI_COMPUTABLE_MODE_P (mode
)
8903 && TREE_CONSTANT (treeop0
))
8907 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8909 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8910 (modifier
== EXPAND_INITIALIZER
8911 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8912 if (! CONSTANT_P (op0
))
8914 op1
= expand_expr (treeop1
, NULL_RTX
,
8915 VOIDmode
, modifier
);
8916 /* Return a PLUS if modifier says it's OK. */
8917 if (modifier
== EXPAND_SUM
8918 || modifier
== EXPAND_INITIALIZER
)
8919 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8922 /* Use wi::shwi to ensure that the constant is
8923 truncated according to the mode of OP1, then sign extended
8924 to a HOST_WIDE_INT. Using the constant directly can result
8925 in non-canonical RTL in a 64x32 cross compile. */
8926 wc
= TREE_INT_CST_LOW (treeop1
);
8928 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8929 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8930 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8931 op0
= force_operand (op0
, target
);
8932 return REDUCE_BIT_FIELD (op0
);
8936 /* Use TER to expand pointer addition of a negated value
8937 as pointer subtraction. */
8938 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8939 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8940 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8941 && TREE_CODE (treeop1
) == SSA_NAME
8942 && TYPE_MODE (TREE_TYPE (treeop0
))
8943 == TYPE_MODE (TREE_TYPE (treeop1
)))
8945 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8948 treeop1
= gimple_assign_rhs1 (def
);
8954 /* No sense saving up arithmetic to be done
8955 if it's all in the wrong mode to form part of an address.
8956 And force_operand won't know whether to sign-extend or
8958 if (modifier
!= EXPAND_INITIALIZER
8959 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8961 expand_operands (treeop0
, treeop1
,
8962 subtarget
, &op0
, &op1
, modifier
);
8963 if (op0
== const0_rtx
)
8965 if (op1
== const0_rtx
)
8970 expand_operands (treeop0
, treeop1
,
8971 subtarget
, &op0
, &op1
, modifier
);
8972 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8975 case POINTER_DIFF_EXPR
:
8977 /* For initializers, we are allowed to return a MINUS of two
8978 symbolic constants. Here we handle all cases when both operands
8980 /* Handle difference of two symbolic constants,
8981 for the sake of an initializer. */
8982 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8983 && really_constant_p (treeop0
)
8984 && really_constant_p (treeop1
))
8986 expand_operands (treeop0
, treeop1
,
8987 NULL_RTX
, &op0
, &op1
, modifier
);
8988 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8991 /* No sense saving up arithmetic to be done
8992 if it's all in the wrong mode to form part of an address.
8993 And force_operand won't know whether to sign-extend or
8995 if (modifier
!= EXPAND_INITIALIZER
8996 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8999 expand_operands (treeop0
, treeop1
,
9000 subtarget
, &op0
, &op1
, modifier
);
9002 /* Convert A - const to A + (-const). */
9003 if (CONST_INT_P (op1
))
9005 op1
= negate_rtx (mode
, op1
);
9006 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
9011 case WIDEN_MULT_PLUS_EXPR
:
9012 case WIDEN_MULT_MINUS_EXPR
:
9013 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9014 op2
= expand_normal (treeop2
);
9015 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9019 case WIDEN_MULT_EXPR
:
9020 /* If first operand is constant, swap them.
9021 Thus the following special case checks need only
9022 check the second operand. */
9023 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9024 std::swap (treeop0
, treeop1
);
9026 /* First, check if we have a multiplication of one signed and one
9027 unsigned operand. */
9028 if (TREE_CODE (treeop1
) != INTEGER_CST
9029 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
9030 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
9032 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
9033 this_optab
= usmul_widen_optab
;
9034 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
9035 != CODE_FOR_nothing
)
9037 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9038 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9041 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
9043 /* op0 and op1 might still be constant, despite the above
9044 != INTEGER_CST check. Handle it. */
9045 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9047 op0
= convert_modes (mode
, innermode
, op0
, true);
9048 op1
= convert_modes (mode
, innermode
, op1
, false);
9049 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9050 target
, unsignedp
));
9055 /* Check for a multiplication with matching signedness. */
9056 else if ((TREE_CODE (treeop1
) == INTEGER_CST
9057 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
9058 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
9059 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
9061 tree op0type
= TREE_TYPE (treeop0
);
9062 machine_mode innermode
= TYPE_MODE (op0type
);
9063 bool zextend_p
= TYPE_UNSIGNED (op0type
);
9064 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
9065 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
9067 if (TREE_CODE (treeop0
) != INTEGER_CST
)
9069 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
9070 != CODE_FOR_nothing
)
9072 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9074 /* op0 and op1 might still be constant, despite the above
9075 != INTEGER_CST check. Handle it. */
9076 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9079 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
9081 = convert_modes (mode
, innermode
, op1
,
9082 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
9083 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9087 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
9088 unsignedp
, this_optab
);
9089 return REDUCE_BIT_FIELD (temp
);
9091 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
9093 && innermode
== word_mode
)
9096 op0
= expand_normal (treeop0
);
9097 op1
= expand_normal (treeop1
);
9098 /* op0 and op1 might be constants, despite the above
9099 != INTEGER_CST check. Handle it. */
9100 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9101 goto widen_mult_const
;
9102 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
9103 unsignedp
, OPTAB_LIB_WIDEN
);
9104 hipart
= gen_highpart (word_mode
, temp
);
9105 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
9109 emit_move_insn (hipart
, htem
);
9110 return REDUCE_BIT_FIELD (temp
);
9114 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
9115 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
9116 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9117 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9120 /* If this is a fixed-point operation, then we cannot use the code
9121 below because "expand_mult" doesn't support sat/no-sat fixed-point
9123 if (ALL_FIXED_POINT_MODE_P (mode
))
9126 /* If first operand is constant, swap them.
9127 Thus the following special case checks need only
9128 check the second operand. */
9129 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9130 std::swap (treeop0
, treeop1
);
9132 /* Attempt to return something suitable for generating an
9133 indexed address, for machines that support that. */
9135 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
9136 && tree_fits_shwi_p (treeop1
))
9138 tree exp1
= treeop1
;
9140 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
9144 op0
= force_operand (op0
, NULL_RTX
);
9146 op0
= copy_to_mode_reg (mode
, op0
);
9148 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
9149 gen_int_mode (tree_to_shwi (exp1
),
9150 TYPE_MODE (TREE_TYPE (exp1
)))));
9153 if (modifier
== EXPAND_STACK_PARM
)
9156 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9157 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9159 case TRUNC_MOD_EXPR
:
9160 case FLOOR_MOD_EXPR
:
9162 case ROUND_MOD_EXPR
:
9164 case TRUNC_DIV_EXPR
:
9165 case FLOOR_DIV_EXPR
:
9167 case ROUND_DIV_EXPR
:
9168 case EXACT_DIV_EXPR
:
9170 /* If this is a fixed-point operation, then we cannot use the code
9171 below because "expand_divmod" doesn't support sat/no-sat fixed-point
9173 if (ALL_FIXED_POINT_MODE_P (mode
))
9176 if (modifier
== EXPAND_STACK_PARM
)
9178 /* Possible optimization: compute the dividend with EXPAND_SUM
9179 then if the divisor is constant can optimize the case
9180 where some terms of the dividend have coeffs divisible by it. */
9181 expand_operands (treeop0
, treeop1
,
9182 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9183 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
9184 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
9185 if (SCALAR_INT_MODE_P (mode
)
9187 && get_range_pos_neg (treeop0
) == 1
9188 && get_range_pos_neg (treeop1
) == 1)
9190 /* If both arguments are known to be positive when interpreted
9191 as signed, we can expand it as both signed and unsigned
9192 division or modulo. Choose the cheaper sequence in that case. */
9193 bool speed_p
= optimize_insn_for_speed_p ();
9194 do_pending_stack_adjust ();
9196 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
9197 rtx_insn
*uns_insns
= get_insns ();
9200 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
9201 rtx_insn
*sgn_insns
= get_insns ();
9203 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
9204 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
9206 /* If costs are the same then use as tie breaker the other
9208 if (uns_cost
== sgn_cost
)
9210 uns_cost
= seq_cost (uns_insns
, !speed_p
);
9211 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9214 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9216 emit_insn (uns_insns
);
9219 emit_insn (sgn_insns
);
9222 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9227 case MULT_HIGHPART_EXPR
:
9228 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9229 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9233 case FIXED_CONVERT_EXPR
:
9234 op0
= expand_normal (treeop0
);
9235 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9236 target
= gen_reg_rtx (mode
);
9238 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9239 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9240 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9241 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9243 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9246 case FIX_TRUNC_EXPR
:
9247 op0
= expand_normal (treeop0
);
9248 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9249 target
= gen_reg_rtx (mode
);
9250 expand_fix (target
, op0
, unsignedp
);
9254 op0
= expand_normal (treeop0
);
9255 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9256 target
= gen_reg_rtx (mode
);
9257 /* expand_float can't figure out what to do if FROM has VOIDmode.
9258 So give it the correct mode. With -O, cse will optimize this. */
9259 if (GET_MODE (op0
) == VOIDmode
)
9260 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9262 expand_float (target
, op0
,
9263 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9267 op0
= expand_expr (treeop0
, subtarget
,
9268 VOIDmode
, EXPAND_NORMAL
);
9269 if (modifier
== EXPAND_STACK_PARM
)
9271 temp
= expand_unop (mode
,
9272 optab_for_tree_code (NEGATE_EXPR
, type
,
9276 return REDUCE_BIT_FIELD (temp
);
9280 op0
= expand_expr (treeop0
, subtarget
,
9281 VOIDmode
, EXPAND_NORMAL
);
9282 if (modifier
== EXPAND_STACK_PARM
)
9285 /* ABS_EXPR is not valid for complex arguments. */
9286 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9287 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9289 /* Unsigned abs is simply the operand. Testing here means we don't
9290 risk generating incorrect code below. */
9291 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9294 return expand_abs (mode
, op0
, target
, unsignedp
,
9295 safe_from_p (target
, treeop0
, 1));
9299 target
= original_target
;
9301 || modifier
== EXPAND_STACK_PARM
9302 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9303 || GET_MODE (target
) != mode
9305 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9306 target
= gen_reg_rtx (mode
);
9307 expand_operands (treeop0
, treeop1
,
9308 target
, &op0
, &op1
, EXPAND_NORMAL
);
9310 /* First try to do it with a special MIN or MAX instruction.
9311 If that does not win, use a conditional jump to select the proper
9313 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9314 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9319 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9320 and similarly for MAX <x, y>. */
9321 if (VECTOR_TYPE_P (type
))
9323 tree t0
= make_tree (type
, op0
);
9324 tree t1
= make_tree (type
, op1
);
9325 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9327 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9331 /* At this point, a MEM target is no longer useful; we will get better
9334 if (! REG_P (target
))
9335 target
= gen_reg_rtx (mode
);
9337 /* If op1 was placed in target, swap op0 and op1. */
9338 if (target
!= op0
&& target
== op1
)
9339 std::swap (op0
, op1
);
9341 /* We generate better code and avoid problems with op1 mentioning
9342 target by forcing op1 into a pseudo if it isn't a constant. */
9343 if (! CONSTANT_P (op1
))
9344 op1
= force_reg (mode
, op1
);
9347 enum rtx_code comparison_code
;
9350 if (code
== MAX_EXPR
)
9351 comparison_code
= unsignedp
? GEU
: GE
;
9353 comparison_code
= unsignedp
? LEU
: LE
;
9355 /* Canonicalize to comparisons against 0. */
9356 if (op1
== const1_rtx
)
9358 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9359 or (a != 0 ? a : 1) for unsigned.
9360 For MIN we are safe converting (a <= 1 ? a : 1)
9361 into (a <= 0 ? a : 1) */
9362 cmpop1
= const0_rtx
;
9363 if (code
== MAX_EXPR
)
9364 comparison_code
= unsignedp
? NE
: GT
;
9366 if (op1
== constm1_rtx
&& !unsignedp
)
9368 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9369 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9370 cmpop1
= const0_rtx
;
9371 if (code
== MIN_EXPR
)
9372 comparison_code
= LT
;
9375 /* Use a conditional move if possible. */
9376 if (can_conditionally_move_p (mode
))
9382 /* Try to emit the conditional move. */
9383 insn
= emit_conditional_move (target
, comparison_code
,
9388 /* If we could do the conditional move, emit the sequence,
9392 rtx_insn
*seq
= get_insns ();
9398 /* Otherwise discard the sequence and fall back to code with
9404 emit_move_insn (target
, op0
);
9406 lab
= gen_label_rtx ();
9407 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9408 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9409 profile_probability::uninitialized ());
9411 emit_move_insn (target
, op1
);
9416 op0
= expand_expr (treeop0
, subtarget
,
9417 VOIDmode
, EXPAND_NORMAL
);
9418 if (modifier
== EXPAND_STACK_PARM
)
9420 /* In case we have to reduce the result to bitfield precision
9421 for unsigned bitfield expand this as XOR with a proper constant
9423 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9425 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9426 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9427 false, GET_MODE_PRECISION (int_mode
));
9429 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9430 immed_wide_int_const (mask
, int_mode
),
9431 target
, 1, OPTAB_LIB_WIDEN
);
9434 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9438 /* ??? Can optimize bitwise operations with one arg constant.
9439 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9440 and (a bitwise1 b) bitwise2 b (etc)
9441 but that is probably not worth while. */
9450 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9451 || type_has_mode_precision_p (type
));
9457 /* If this is a fixed-point operation, then we cannot use the code
9458 below because "expand_shift" doesn't support sat/no-sat fixed-point
9460 if (ALL_FIXED_POINT_MODE_P (mode
))
9463 if (! safe_from_p (subtarget
, treeop1
, 1))
9465 if (modifier
== EXPAND_STACK_PARM
)
9467 op0
= expand_expr (treeop0
, subtarget
,
9468 VOIDmode
, EXPAND_NORMAL
);
9470 /* Left shift optimization when shifting across word_size boundary.
9472 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9473 there isn't native instruction to support this wide mode
9474 left shift. Given below scenario:
9476 Type A = (Type) B << C
9479 | dest_high | dest_low |
9483 If the shift amount C caused we shift B to across the word
9484 size boundary, i.e part of B shifted into high half of
9485 destination register, and part of B remains in the low
9486 half, then GCC will use the following left shift expand
9489 1. Initialize dest_low to B.
9490 2. Initialize every bit of dest_high to the sign bit of B.
9491 3. Logic left shift dest_low by C bit to finalize dest_low.
9492 The value of dest_low before this shift is kept in a temp D.
9493 4. Logic left shift dest_high by C.
9494 5. Logic right shift D by (word_size - C).
9495 6. Or the result of 4 and 5 to finalize dest_high.
9497 While, by checking gimple statements, if operand B is
9498 coming from signed extension, then we can simplify above
9501 1. dest_high = src_low >> (word_size - C).
9502 2. dest_low = src_low << C.
9504 We can use one arithmetic right shift to finish all the
9505 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9506 needed from 6 into 2.
9508 The case is similar for zero extension, except that we
9509 initialize dest_high to zero rather than copies of the sign
9510 bit from B. Furthermore, we need to use a logical right shift
9513 The choice of sign-extension versus zero-extension is
9514 determined entirely by whether or not B is signed and is
9515 independent of the current setting of unsignedp. */
9518 if (code
== LSHIFT_EXPR
9521 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9523 && TREE_CONSTANT (treeop1
)
9524 && TREE_CODE (treeop0
) == SSA_NAME
)
9526 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9527 if (is_gimple_assign (def
)
9528 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9530 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9531 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9533 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9534 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9535 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9536 >= GET_MODE_BITSIZE (word_mode
)))
9538 rtx_insn
*seq
, *seq_old
;
9539 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9541 bool extend_unsigned
9542 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9543 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9544 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9545 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9546 int_mode
, high_off
);
9547 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9548 - TREE_INT_CST_LOW (treeop1
));
9549 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9552 /* dest_high = src_low >> (word_size - C). */
9553 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9556 if (temp
!= dest_high
)
9557 emit_move_insn (dest_high
, temp
);
9559 /* dest_low = src_low << C. */
9560 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9561 treeop1
, dest_low
, unsignedp
);
9562 if (temp
!= dest_low
)
9563 emit_move_insn (dest_low
, temp
);
9569 if (have_insn_for (ASHIFT
, int_mode
))
9571 bool speed_p
= optimize_insn_for_speed_p ();
9573 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9578 seq_old
= get_insns ();
9580 if (seq_cost (seq
, speed_p
)
9581 >= seq_cost (seq_old
, speed_p
))
9592 if (temp
== NULL_RTX
)
9593 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9595 if (code
== LSHIFT_EXPR
)
9596 temp
= REDUCE_BIT_FIELD (temp
);
9600 /* Could determine the answer when only additive constants differ. Also,
9601 the addition of one can be handled by changing the condition. */
9608 case UNORDERED_EXPR
:
9617 temp
= do_store_flag (ops
,
9618 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9619 tmode
!= VOIDmode
? tmode
: mode
);
9623 /* Use a compare and a jump for BLKmode comparisons, or for function
9624 type comparisons is have_canonicalize_funcptr_for_compare. */
9627 || modifier
== EXPAND_STACK_PARM
9628 || ! safe_from_p (target
, treeop0
, 1)
9629 || ! safe_from_p (target
, treeop1
, 1)
9630 /* Make sure we don't have a hard reg (such as function's return
9631 value) live across basic blocks, if not optimizing. */
9632 || (!optimize
&& REG_P (target
)
9633 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9634 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9636 emit_move_insn (target
, const0_rtx
);
9638 rtx_code_label
*lab1
= gen_label_rtx ();
9639 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9640 profile_probability::uninitialized ());
9642 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9643 emit_move_insn (target
, constm1_rtx
);
9645 emit_move_insn (target
, const1_rtx
);
9651 /* Get the rtx code of the operands. */
9652 op0
= expand_normal (treeop0
);
9653 op1
= expand_normal (treeop1
);
9656 target
= gen_reg_rtx (TYPE_MODE (type
));
9658 /* If target overlaps with op1, then either we need to force
9659 op1 into a pseudo (if target also overlaps with op0),
9660 or write the complex parts in reverse order. */
9661 switch (GET_CODE (target
))
9664 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9666 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9668 complex_expr_force_op1
:
9669 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9670 emit_move_insn (temp
, op1
);
9674 complex_expr_swap_order
:
9675 /* Move the imaginary (op1) and real (op0) parts to their
9677 write_complex_part (target
, op1
, true);
9678 write_complex_part (target
, op0
, false);
9684 temp
= adjust_address_nv (target
,
9685 GET_MODE_INNER (GET_MODE (target
)), 0);
9686 if (reg_overlap_mentioned_p (temp
, op1
))
9688 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9689 temp
= adjust_address_nv (target
, imode
,
9690 GET_MODE_SIZE (imode
));
9691 if (reg_overlap_mentioned_p (temp
, op0
))
9692 goto complex_expr_force_op1
;
9693 goto complex_expr_swap_order
;
9697 if (reg_overlap_mentioned_p (target
, op1
))
9699 if (reg_overlap_mentioned_p (target
, op0
))
9700 goto complex_expr_force_op1
;
9701 goto complex_expr_swap_order
;
9706 /* Move the real (op0) and imaginary (op1) parts to their location. */
9707 write_complex_part (target
, op0
, false);
9708 write_complex_part (target
, op1
, true);
9712 case WIDEN_SUM_EXPR
:
9714 tree oprnd0
= treeop0
;
9715 tree oprnd1
= treeop1
;
9717 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9718 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9723 case VEC_UNPACK_HI_EXPR
:
9724 case VEC_UNPACK_LO_EXPR
:
9725 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9726 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9728 op0
= expand_normal (treeop0
);
9729 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9735 case VEC_UNPACK_FLOAT_HI_EXPR
:
9736 case VEC_UNPACK_FLOAT_LO_EXPR
:
9738 op0
= expand_normal (treeop0
);
9739 /* The signedness is determined from input operand. */
9740 temp
= expand_widen_pattern_expr
9741 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9742 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9748 case VEC_WIDEN_MULT_HI_EXPR
:
9749 case VEC_WIDEN_MULT_LO_EXPR
:
9750 case VEC_WIDEN_MULT_EVEN_EXPR
:
9751 case VEC_WIDEN_MULT_ODD_EXPR
:
9752 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9753 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9754 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9755 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9757 gcc_assert (target
);
9760 case VEC_PACK_SAT_EXPR
:
9761 case VEC_PACK_FIX_TRUNC_EXPR
:
9762 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9765 case VEC_PACK_TRUNC_EXPR
:
9766 if (VECTOR_BOOLEAN_TYPE_P (type
)
9767 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
9768 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
9769 && SCALAR_INT_MODE_P (mode
))
9771 class expand_operand eops
[4];
9772 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
9773 expand_operands (treeop0
, treeop1
,
9774 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9775 this_optab
= vec_pack_sbool_trunc_optab
;
9776 enum insn_code icode
= optab_handler (this_optab
, imode
);
9777 create_output_operand (&eops
[0], target
, mode
);
9778 create_convert_operand_from (&eops
[1], op0
, imode
, false);
9779 create_convert_operand_from (&eops
[2], op1
, imode
, false);
9780 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
9781 create_input_operand (&eops
[3], temp
, imode
);
9782 expand_insn (icode
, 4, eops
);
9783 return eops
[0].value
;
9785 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9788 case VEC_PACK_FLOAT_EXPR
:
9789 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9790 expand_operands (treeop0
, treeop1
,
9791 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9792 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9794 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9795 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9797 gcc_assert (target
);
9802 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9803 vec_perm_builder sel
;
9804 if (TREE_CODE (treeop2
) == VECTOR_CST
9805 && tree_to_vec_perm_builder (&sel
, treeop2
))
9807 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9808 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9813 op2
= expand_normal (treeop2
);
9814 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9822 tree oprnd0
= treeop0
;
9823 tree oprnd1
= treeop1
;
9824 tree oprnd2
= treeop2
;
9826 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9827 op2
= expand_normal (oprnd2
);
9828 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9835 tree oprnd0
= treeop0
;
9836 tree oprnd1
= treeop1
;
9837 tree oprnd2
= treeop2
;
9839 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9840 op2
= expand_normal (oprnd2
);
9841 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9846 case REALIGN_LOAD_EXPR
:
9848 tree oprnd0
= treeop0
;
9849 tree oprnd1
= treeop1
;
9850 tree oprnd2
= treeop2
;
9852 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9853 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9854 op2
= expand_normal (oprnd2
);
9855 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9863 /* A COND_EXPR with its type being VOID_TYPE represents a
9864 conditional jump and is handled in
9865 expand_gimple_cond_expr. */
9866 gcc_assert (!VOID_TYPE_P (type
));
9868 /* Note that COND_EXPRs whose type is a structure or union
9869 are required to be constructed to contain assignments of
9870 a temporary variable, so that we can evaluate them here
9871 for side effect only. If type is void, we must do likewise. */
9873 gcc_assert (!TREE_ADDRESSABLE (type
)
9875 && TREE_TYPE (treeop1
) != void_type_node
9876 && TREE_TYPE (treeop2
) != void_type_node
);
9878 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9882 /* If we are not to produce a result, we have no target. Otherwise,
9883 if a target was specified use it; it will not be used as an
9884 intermediate target unless it is safe. If no target, use a
9887 if (modifier
!= EXPAND_STACK_PARM
9889 && safe_from_p (original_target
, treeop0
, 1)
9890 && GET_MODE (original_target
) == mode
9891 && !MEM_P (original_target
))
9892 temp
= original_target
;
9894 temp
= assign_temp (type
, 0, 1);
9896 do_pending_stack_adjust ();
9898 rtx_code_label
*lab0
= gen_label_rtx ();
9899 rtx_code_label
*lab1
= gen_label_rtx ();
9900 jumpifnot (treeop0
, lab0
,
9901 profile_probability::uninitialized ());
9902 store_expr (treeop1
, temp
,
9903 modifier
== EXPAND_STACK_PARM
,
9906 emit_jump_insn (targetm
.gen_jump (lab1
));
9909 store_expr (treeop2
, temp
,
9910 modifier
== EXPAND_STACK_PARM
,
9919 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9922 case VEC_DUPLICATE_EXPR
:
9923 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9924 target
= expand_vector_broadcast (mode
, op0
);
9925 gcc_assert (target
);
9928 case VEC_SERIES_EXPR
:
9929 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9930 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9932 case BIT_INSERT_EXPR
:
9934 unsigned bitpos
= tree_to_uhwi (treeop2
);
9936 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9937 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9939 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9940 op0
= expand_normal (treeop0
);
9941 op1
= expand_normal (treeop1
);
9942 rtx dst
= gen_reg_rtx (mode
);
9943 emit_move_insn (dst
, op0
);
9944 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9945 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9953 /* Here to do an ordinary binary operator. */
9955 expand_operands (treeop0
, treeop1
,
9956 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9958 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9960 if (modifier
== EXPAND_STACK_PARM
)
9962 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9963 unsignedp
, OPTAB_LIB_WIDEN
);
9965 /* Bitwise operations do not need bitfield reduction as we expect their
9966 operands being properly truncated. */
9967 if (code
== BIT_XOR_EXPR
9968 || code
== BIT_AND_EXPR
9969 || code
== BIT_IOR_EXPR
)
9971 return REDUCE_BIT_FIELD (temp
);
9973 #undef REDUCE_BIT_FIELD
9976 /* Return TRUE if expression STMT is suitable for replacement.
9977 Never consider memory loads as replaceable, because those don't ever lead
9978 into constant expressions. */
9981 stmt_is_replaceable_p (gimple
*stmt
)
9983 if (ssa_is_replaceable_p (stmt
))
9985 /* Don't move around loads. */
9986 if (!gimple_assign_single_p (stmt
)
9987 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9994 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9995 enum expand_modifier modifier
, rtx
*alt_rtl
,
9996 bool inner_reference_p
)
9998 rtx op0
, op1
, temp
, decl_rtl
;
10001 machine_mode mode
, dmode
;
10002 enum tree_code code
= TREE_CODE (exp
);
10003 rtx subtarget
, original_target
;
10006 bool reduce_bit_field
;
10007 location_t loc
= EXPR_LOCATION (exp
);
10008 struct separate_ops ops
;
10009 tree treeop0
, treeop1
, treeop2
;
10010 tree ssa_name
= NULL_TREE
;
10013 type
= TREE_TYPE (exp
);
10014 mode
= TYPE_MODE (type
);
10015 unsignedp
= TYPE_UNSIGNED (type
);
10017 treeop0
= treeop1
= treeop2
= NULL_TREE
;
10018 if (!VL_EXP_CLASS_P (exp
))
10019 switch (TREE_CODE_LENGTH (code
))
10022 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
10023 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
10024 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
10032 ops
.location
= loc
;
10034 ignore
= (target
== const0_rtx
10035 || ((CONVERT_EXPR_CODE_P (code
)
10036 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
10037 && TREE_CODE (type
) == VOID_TYPE
));
10039 /* An operation in what may be a bit-field type needs the
10040 result to be reduced to the precision of the bit-field type,
10041 which is narrower than that of the type's mode. */
10042 reduce_bit_field
= (!ignore
10043 && INTEGRAL_TYPE_P (type
)
10044 && !type_has_mode_precision_p (type
));
10046 /* If we are going to ignore this result, we need only do something
10047 if there is a side-effect somewhere in the expression. If there
10048 is, short-circuit the most common cases here. Note that we must
10049 not call expand_expr with anything but const0_rtx in case this
10050 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
10054 if (! TREE_SIDE_EFFECTS (exp
))
10057 /* Ensure we reference a volatile object even if value is ignored, but
10058 don't do this if all we are doing is taking its address. */
10059 if (TREE_THIS_VOLATILE (exp
)
10060 && TREE_CODE (exp
) != FUNCTION_DECL
10061 && mode
!= VOIDmode
&& mode
!= BLKmode
10062 && modifier
!= EXPAND_CONST_ADDRESS
)
10064 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
10066 copy_to_reg (temp
);
10070 if (TREE_CODE_CLASS (code
) == tcc_unary
10071 || code
== BIT_FIELD_REF
10072 || code
== COMPONENT_REF
10073 || code
== INDIRECT_REF
)
10074 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
10077 else if (TREE_CODE_CLASS (code
) == tcc_binary
10078 || TREE_CODE_CLASS (code
) == tcc_comparison
10079 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
10081 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
10082 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
10089 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
10092 /* Use subtarget as the target for operand 0 of a binary operation. */
10093 subtarget
= get_subtarget (target
);
10094 original_target
= target
;
10100 tree function
= decl_function_context (exp
);
10102 temp
= label_rtx (exp
);
10103 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
10105 if (function
!= current_function_decl
10107 LABEL_REF_NONLOCAL_P (temp
) = 1;
10109 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
10114 /* ??? ivopts calls expander, without any preparation from
10115 out-of-ssa. So fake instructions as if this was an access to the
10116 base variable. This unnecessarily allocates a pseudo, see how we can
10117 reuse it, if partition base vars have it set already. */
10118 if (!currently_expanding_to_rtl
)
10120 tree var
= SSA_NAME_VAR (exp
);
10121 if (var
&& DECL_RTL_SET_P (var
))
10122 return DECL_RTL (var
);
10123 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
10124 LAST_VIRTUAL_REGISTER
+ 1);
10127 g
= get_gimple_for_ssa_name (exp
);
10128 /* For EXPAND_INITIALIZER try harder to get something simpler. */
10130 && modifier
== EXPAND_INITIALIZER
10131 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
10132 && (optimize
|| !SSA_NAME_VAR (exp
)
10133 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
10134 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
10135 g
= SSA_NAME_DEF_STMT (exp
);
10139 location_t saved_loc
= curr_insn_location ();
10140 loc
= gimple_location (g
);
10141 if (loc
!= UNKNOWN_LOCATION
)
10142 set_curr_insn_location (loc
);
10143 ops
.code
= gimple_assign_rhs_code (g
);
10144 switch (get_gimple_rhs_class (ops
.code
))
10146 case GIMPLE_TERNARY_RHS
:
10147 ops
.op2
= gimple_assign_rhs3 (g
);
10149 case GIMPLE_BINARY_RHS
:
10150 ops
.op1
= gimple_assign_rhs2 (g
);
10152 /* Try to expand conditonal compare. */
10153 if (targetm
.gen_ccmp_first
)
10155 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
10156 r
= expand_ccmp_expr (g
, mode
);
10161 case GIMPLE_UNARY_RHS
:
10162 ops
.op0
= gimple_assign_rhs1 (g
);
10163 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
10164 ops
.location
= loc
;
10165 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
10167 case GIMPLE_SINGLE_RHS
:
10169 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
10170 tmode
, modifier
, alt_rtl
,
10171 inner_reference_p
);
10175 gcc_unreachable ();
10177 set_curr_insn_location (saved_loc
);
10178 if (REG_P (r
) && !REG_EXPR (r
))
10179 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
10184 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
10185 exp
= SSA_NAME_VAR (ssa_name
);
10186 goto expand_decl_rtl
;
10190 /* If a static var's type was incomplete when the decl was written,
10191 but the type is complete now, lay out the decl now. */
10192 if (DECL_SIZE (exp
) == 0
10193 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
10194 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
10195 layout_decl (exp
, 0);
10199 case FUNCTION_DECL
:
10201 decl_rtl
= DECL_RTL (exp
);
10203 gcc_assert (decl_rtl
);
10205 /* DECL_MODE might change when TYPE_MODE depends on attribute target
10206 settings for VECTOR_TYPE_P that might switch for the function. */
10207 if (currently_expanding_to_rtl
10208 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
10209 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
10210 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
10212 decl_rtl
= copy_rtx (decl_rtl
);
10214 /* Record writes to register variables. */
10215 if (modifier
== EXPAND_WRITE
10216 && REG_P (decl_rtl
)
10217 && HARD_REGISTER_P (decl_rtl
))
10218 add_to_hard_reg_set (&crtl
->asm_clobbers
,
10219 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
10221 /* Ensure variable marked as used even if it doesn't go through
10222 a parser. If it hasn't be used yet, write out an external
10225 TREE_USED (exp
) = 1;
10227 /* Show we haven't gotten RTL for this yet. */
10230 /* Variables inherited from containing functions should have
10231 been lowered by this point. */
10233 context
= decl_function_context (exp
);
10235 || SCOPE_FILE_SCOPE_P (context
)
10236 || context
== current_function_decl
10237 || TREE_STATIC (exp
)
10238 || DECL_EXTERNAL (exp
)
10239 /* ??? C++ creates functions that are not TREE_STATIC. */
10240 || TREE_CODE (exp
) == FUNCTION_DECL
);
10242 /* This is the case of an array whose size is to be determined
10243 from its initializer, while the initializer is still being parsed.
10244 ??? We aren't parsing while expanding anymore. */
10246 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10247 temp
= validize_mem (decl_rtl
);
10249 /* If DECL_RTL is memory, we are in the normal case and the
10250 address is not valid, get the address into a register. */
10252 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10255 *alt_rtl
= decl_rtl
;
10256 decl_rtl
= use_anchored_address (decl_rtl
);
10257 if (modifier
!= EXPAND_CONST_ADDRESS
10258 && modifier
!= EXPAND_SUM
10259 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10260 : GET_MODE (decl_rtl
),
10261 XEXP (decl_rtl
, 0),
10262 MEM_ADDR_SPACE (decl_rtl
)))
10263 temp
= replace_equiv_address (decl_rtl
,
10264 copy_rtx (XEXP (decl_rtl
, 0)));
10267 /* If we got something, return it. But first, set the alignment
10268 if the address is a register. */
10271 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10272 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10274 else if (MEM_P (decl_rtl
))
10280 && modifier
!= EXPAND_WRITE
10281 && modifier
!= EXPAND_MEMORY
10282 && modifier
!= EXPAND_INITIALIZER
10283 && modifier
!= EXPAND_CONST_ADDRESS
10284 && modifier
!= EXPAND_SUM
10285 && !inner_reference_p
10287 && MEM_ALIGN (temp
) < GET_MODE_ALIGNMENT (mode
))
10288 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10289 MEM_ALIGN (temp
), NULL_RTX
, NULL
);
10295 dmode
= DECL_MODE (exp
);
10297 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10299 /* If the mode of DECL_RTL does not match that of the decl,
10300 there are two cases: we are dealing with a BLKmode value
10301 that is returned in a register, or we are dealing with
10302 a promoted value. In the latter case, return a SUBREG
10303 of the wanted mode, but mark it so that we know that it
10304 was already extended. */
10305 if (REG_P (decl_rtl
)
10306 && dmode
!= BLKmode
10307 && GET_MODE (decl_rtl
) != dmode
)
10309 machine_mode pmode
;
10311 /* Get the signedness to be used for this variable. Ensure we get
10312 the same mode we got when the variable was declared. */
10313 if (code
!= SSA_NAME
)
10314 pmode
= promote_decl_mode (exp
, &unsignedp
);
10315 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10316 && gimple_code (g
) == GIMPLE_CALL
10317 && !gimple_call_internal_p (g
))
10318 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10319 gimple_call_fntype (g
),
10322 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10323 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10325 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10326 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10327 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10335 /* Given that TYPE_PRECISION (type) is not always equal to
10336 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10337 the former to the latter according to the signedness of the
10339 scalar_int_mode int_mode
= SCALAR_INT_TYPE_MODE (type
);
10340 temp
= immed_wide_int_const
10341 (wi::to_wide (exp
, GET_MODE_PRECISION (int_mode
)), int_mode
);
10347 tree tmp
= NULL_TREE
;
10348 if (VECTOR_MODE_P (mode
))
10349 return const_vector_from_tree (exp
);
10350 scalar_int_mode int_mode
;
10351 if (is_int_mode (mode
, &int_mode
))
10353 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10354 return const_scalar_mask_from_tree (int_mode
, exp
);
10358 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10360 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10361 type_for_mode
, exp
);
10366 vec
<constructor_elt
, va_gc
> *v
;
10367 /* Constructors need to be fixed-length. FIXME. */
10368 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10369 vec_alloc (v
, nunits
);
10370 for (unsigned int i
= 0; i
< nunits
; ++i
)
10371 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10372 tmp
= build_constructor (type
, v
);
10374 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10379 if (modifier
== EXPAND_WRITE
)
10381 /* Writing into CONST_DECL is always invalid, but handle it
10383 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10384 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10385 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10386 EXPAND_NORMAL
, as
);
10387 op0
= memory_address_addr_space (mode
, op0
, as
);
10388 temp
= gen_rtx_MEM (mode
, op0
);
10389 set_mem_addr_space (temp
, as
);
10392 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10395 /* If optimized, generate immediate CONST_DOUBLE
10396 which will be turned into memory by reload if necessary.
10398 We used to force a register so that loop.c could see it. But
10399 this does not allow gen_* patterns to perform optimizations with
10400 the constants. It also produces two insns in cases like "x = 1.0;".
10401 On most machines, floating-point constants are not permitted in
10402 many insns, so we'd end up copying it to a register in any case.
10404 Now, we do the copying in expand_binop, if appropriate. */
10405 return const_double_from_real_value (TREE_REAL_CST (exp
),
10406 TYPE_MODE (TREE_TYPE (exp
)));
10409 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10410 TYPE_MODE (TREE_TYPE (exp
)));
10413 /* Handle evaluating a complex constant in a CONCAT target. */
10414 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10418 mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10419 rtarg
= XEXP (original_target
, 0);
10420 itarg
= XEXP (original_target
, 1);
10422 /* Move the real and imaginary parts separately. */
10423 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10424 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10427 emit_move_insn (rtarg
, op0
);
10429 emit_move_insn (itarg
, op1
);
10431 return original_target
;
10437 temp
= expand_expr_constant (exp
, 1, modifier
);
10439 /* temp contains a constant address.
10440 On RISC machines where a constant address isn't valid,
10441 make some insns to get that address into a register. */
10442 if (modifier
!= EXPAND_CONST_ADDRESS
10443 && modifier
!= EXPAND_INITIALIZER
10444 && modifier
!= EXPAND_SUM
10445 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10446 MEM_ADDR_SPACE (temp
)))
10447 return replace_equiv_address (temp
,
10448 copy_rtx (XEXP (temp
, 0)));
10452 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10456 tree val
= treeop0
;
10457 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10458 inner_reference_p
);
10460 if (!SAVE_EXPR_RESOLVED_P (exp
))
10462 /* We can indeed still hit this case, typically via builtin
10463 expanders calling save_expr immediately before expanding
10464 something. Assume this means that we only have to deal
10465 with non-BLKmode values. */
10466 gcc_assert (GET_MODE (ret
) != BLKmode
);
10468 val
= build_decl (curr_insn_location (),
10469 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10470 DECL_ARTIFICIAL (val
) = 1;
10471 DECL_IGNORED_P (val
) = 1;
10473 TREE_OPERAND (exp
, 0) = treeop0
;
10474 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10476 if (!CONSTANT_P (ret
))
10477 ret
= copy_to_reg (ret
);
10478 SET_DECL_RTL (val
, ret
);
10486 /* If we don't need the result, just ensure we evaluate any
10490 unsigned HOST_WIDE_INT idx
;
10493 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10494 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10499 return expand_constructor (exp
, target
, modifier
, false);
10501 case TARGET_MEM_REF
:
10504 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10505 unsigned int align
;
10507 op0
= addr_for_mem_ref (exp
, as
, true);
10508 op0
= memory_address_addr_space (mode
, op0
, as
);
10509 temp
= gen_rtx_MEM (mode
, op0
);
10510 set_mem_attributes (temp
, exp
, 0);
10511 set_mem_addr_space (temp
, as
);
10512 align
= get_object_alignment (exp
);
10513 if (modifier
!= EXPAND_WRITE
10514 && modifier
!= EXPAND_MEMORY
10516 && align
< GET_MODE_ALIGNMENT (mode
))
10517 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10518 align
, NULL_RTX
, NULL
);
10524 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10526 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10527 machine_mode address_mode
;
10528 tree base
= TREE_OPERAND (exp
, 0);
10531 /* Handle expansion of non-aliased memory with non-BLKmode. That
10532 might end up in a register. */
10533 if (mem_ref_refers_to_non_mem_p (exp
))
10535 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10536 base
= TREE_OPERAND (base
, 0);
10537 poly_uint64 type_size
;
10538 if (known_eq (offset
, 0)
10540 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10541 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10542 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10543 target
, tmode
, modifier
);
10544 if (TYPE_MODE (type
) == BLKmode
)
10546 temp
= assign_stack_temp (DECL_MODE (base
),
10547 GET_MODE_SIZE (DECL_MODE (base
)));
10548 store_expr (base
, temp
, 0, false, false);
10549 temp
= adjust_address (temp
, BLKmode
, offset
);
10550 set_mem_size (temp
, int_size_in_bytes (type
));
10553 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10554 bitsize_int (offset
* BITS_PER_UNIT
));
10555 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10556 return expand_expr (exp
, target
, tmode
, modifier
);
10558 address_mode
= targetm
.addr_space
.address_mode (as
);
10559 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10561 tree mask
= gimple_assign_rhs2 (def_stmt
);
10562 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10563 gimple_assign_rhs1 (def_stmt
), mask
);
10564 TREE_OPERAND (exp
, 0) = base
;
10566 align
= get_object_alignment (exp
);
10567 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10568 op0
= memory_address_addr_space (mode
, op0
, as
);
10569 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10571 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10572 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10573 op0
= memory_address_addr_space (mode
, op0
, as
);
10575 temp
= gen_rtx_MEM (mode
, op0
);
10576 set_mem_attributes (temp
, exp
, 0);
10577 set_mem_addr_space (temp
, as
);
10578 if (TREE_THIS_VOLATILE (exp
))
10579 MEM_VOLATILE_P (temp
) = 1;
10580 if (modifier
!= EXPAND_WRITE
10581 && modifier
!= EXPAND_MEMORY
10582 && !inner_reference_p
10584 && align
< GET_MODE_ALIGNMENT (mode
))
10585 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
, align
,
10586 modifier
== EXPAND_STACK_PARM
10587 ? NULL_RTX
: target
, alt_rtl
);
10589 && modifier
!= EXPAND_MEMORY
10590 && modifier
!= EXPAND_WRITE
)
10591 temp
= flip_storage_order (mode
, temp
);
10598 tree array
= treeop0
;
10599 tree index
= treeop1
;
10602 /* Fold an expression like: "foo"[2].
10603 This is not done in fold so it won't happen inside &.
10604 Don't fold if this is for wide characters since it's too
10605 difficult to do correctly and this is a very rare case. */
10607 if (modifier
!= EXPAND_CONST_ADDRESS
10608 && modifier
!= EXPAND_INITIALIZER
10609 && modifier
!= EXPAND_MEMORY
)
10611 tree t
= fold_read_from_constant_string (exp
);
10614 return expand_expr (t
, target
, tmode
, modifier
);
10617 /* If this is a constant index into a constant array,
10618 just get the value from the array. Handle both the cases when
10619 we have an explicit constructor and when our operand is a variable
10620 that was declared const. */
10622 if (modifier
!= EXPAND_CONST_ADDRESS
10623 && modifier
!= EXPAND_INITIALIZER
10624 && modifier
!= EXPAND_MEMORY
10625 && TREE_CODE (array
) == CONSTRUCTOR
10626 && ! TREE_SIDE_EFFECTS (array
)
10627 && TREE_CODE (index
) == INTEGER_CST
)
10629 unsigned HOST_WIDE_INT ix
;
10632 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10634 if (tree_int_cst_equal (field
, index
))
10636 if (!TREE_SIDE_EFFECTS (value
))
10637 return expand_expr (fold (value
), target
, tmode
, modifier
);
10642 else if (optimize
>= 1
10643 && modifier
!= EXPAND_CONST_ADDRESS
10644 && modifier
!= EXPAND_INITIALIZER
10645 && modifier
!= EXPAND_MEMORY
10646 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10647 && TREE_CODE (index
) == INTEGER_CST
10648 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10649 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10651 if (init
== NULL_TREE
)
10653 tree value
= build_zero_cst (type
);
10654 if (TREE_CODE (value
) == CONSTRUCTOR
)
10656 /* If VALUE is a CONSTRUCTOR, this optimization is only
10657 useful if this doesn't store the CONSTRUCTOR into
10658 memory. If it does, it is more efficient to just
10659 load the data from the array directly. */
10660 rtx ret
= expand_constructor (value
, target
,
10662 if (ret
== NULL_RTX
)
10667 return expand_expr (value
, target
, tmode
, modifier
);
10669 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10671 unsigned HOST_WIDE_INT ix
;
10674 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10676 if (tree_int_cst_equal (field
, index
))
10678 if (TREE_SIDE_EFFECTS (value
))
10681 if (TREE_CODE (value
) == CONSTRUCTOR
)
10683 /* If VALUE is a CONSTRUCTOR, this
10684 optimization is only useful if
10685 this doesn't store the CONSTRUCTOR
10686 into memory. If it does, it is more
10687 efficient to just load the data from
10688 the array directly. */
10689 rtx ret
= expand_constructor (value
, target
,
10691 if (ret
== NULL_RTX
)
10696 expand_expr (fold (value
), target
, tmode
, modifier
);
10699 else if (TREE_CODE (init
) == STRING_CST
)
10701 tree low_bound
= array_ref_low_bound (exp
);
10702 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10704 /* Optimize the special case of a zero lower bound.
10706 We convert the lower bound to sizetype to avoid problems
10707 with constant folding. E.g. suppose the lower bound is
10708 1 and its mode is QI. Without the conversion
10709 (ARRAY + (INDEX - (unsigned char)1))
10711 (ARRAY + (-(unsigned char)1) + INDEX)
10713 (ARRAY + 255 + INDEX). Oops! */
10714 if (!integer_zerop (low_bound
))
10715 index1
= size_diffop_loc (loc
, index1
,
10716 fold_convert_loc (loc
, sizetype
,
10719 if (tree_fits_uhwi_p (index1
)
10720 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10722 tree char_type
= TREE_TYPE (TREE_TYPE (init
));
10723 scalar_int_mode char_mode
;
10725 if (is_int_mode (TYPE_MODE (char_type
), &char_mode
)
10726 && GET_MODE_SIZE (char_mode
) == 1)
10727 return gen_int_mode (TREE_STRING_POINTER (init
)
10728 [TREE_INT_CST_LOW (index1
)],
10734 goto normal_inner_ref
;
10736 case COMPONENT_REF
:
10737 /* If the operand is a CONSTRUCTOR, we can just extract the
10738 appropriate field if it is present. */
10739 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10741 unsigned HOST_WIDE_INT idx
;
10743 scalar_int_mode field_mode
;
10745 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10747 if (field
== treeop1
10748 /* We can normally use the value of the field in the
10749 CONSTRUCTOR. However, if this is a bitfield in
10750 an integral mode that we can fit in a HOST_WIDE_INT,
10751 we must mask only the number of bits in the bitfield,
10752 since this is done implicitly by the constructor. If
10753 the bitfield does not meet either of those conditions,
10754 we can't do this optimization. */
10755 && (! DECL_BIT_FIELD (field
)
10756 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10757 && (GET_MODE_PRECISION (field_mode
)
10758 <= HOST_BITS_PER_WIDE_INT
))))
10760 if (DECL_BIT_FIELD (field
)
10761 && modifier
== EXPAND_STACK_PARM
)
10763 op0
= expand_expr (value
, target
, tmode
, modifier
);
10764 if (DECL_BIT_FIELD (field
))
10766 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10767 scalar_int_mode imode
10768 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10770 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10772 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10774 op0
= expand_and (imode
, op0
, op1
, target
);
10778 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10780 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10782 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10790 goto normal_inner_ref
;
10792 case BIT_FIELD_REF
:
10793 case ARRAY_RANGE_REF
:
10796 machine_mode mode1
, mode2
;
10797 poly_int64 bitsize
, bitpos
, bytepos
;
10799 int reversep
, volatilep
= 0, must_force_mem
;
10801 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10802 &unsignedp
, &reversep
, &volatilep
);
10803 rtx orig_op0
, memloc
;
10804 bool clear_mem_expr
= false;
10806 /* If we got back the original object, something is wrong. Perhaps
10807 we are evaluating an expression too early. In any event, don't
10808 infinitely recurse. */
10809 gcc_assert (tem
!= exp
);
10811 /* If TEM's type is a union of variable size, pass TARGET to the inner
10812 computation, since it will need a temporary and TARGET is known
10813 to have to do. This occurs in unchecked conversion in Ada. */
10815 = expand_expr_real (tem
,
10816 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10817 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10818 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10820 && modifier
!= EXPAND_STACK_PARM
10821 ? target
: NULL_RTX
),
10823 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10826 /* If the field has a mode, we want to access it in the
10827 field's mode, not the computed mode.
10828 If a MEM has VOIDmode (external with incomplete type),
10829 use BLKmode for it instead. */
10832 if (mode1
!= VOIDmode
)
10833 op0
= adjust_address (op0
, mode1
, 0);
10834 else if (GET_MODE (op0
) == VOIDmode
)
10835 op0
= adjust_address (op0
, BLKmode
, 0);
10839 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10841 /* Make sure bitpos is not negative, it can wreak havoc later. */
10842 if (maybe_lt (bitpos
, 0))
10844 gcc_checking_assert (offset
== NULL_TREE
);
10845 offset
= size_int (bits_to_bytes_round_down (bitpos
));
10846 bitpos
= num_trailing_bits (bitpos
);
10849 /* If we have either an offset, a BLKmode result, or a reference
10850 outside the underlying object, we must force it to memory.
10851 Such a case can occur in Ada if we have unchecked conversion
10852 of an expression from a scalar type to an aggregate type or
10853 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10854 passed a partially uninitialized object or a view-conversion
10855 to a larger size. */
10856 must_force_mem
= (offset
10857 || mode1
== BLKmode
10858 || (mode
== BLKmode
10859 && !int_mode_for_size (bitsize
, 1).exists ())
10860 || maybe_gt (bitpos
+ bitsize
,
10861 GET_MODE_BITSIZE (mode2
)));
10863 /* Handle CONCAT first. */
10864 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10866 if (known_eq (bitpos
, 0)
10867 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10868 && COMPLEX_MODE_P (mode1
)
10869 && COMPLEX_MODE_P (GET_MODE (op0
))
10870 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10871 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10874 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10875 if (mode1
!= GET_MODE (op0
))
10878 for (int i
= 0; i
< 2; i
++)
10880 rtx op
= read_complex_part (op0
, i
!= 0);
10881 if (GET_CODE (op
) == SUBREG
)
10882 op
= force_reg (GET_MODE (op
), op
);
10883 temp
= gen_lowpart_common (GET_MODE_INNER (mode1
), op
);
10888 if (!REG_P (op
) && !MEM_P (op
))
10889 op
= force_reg (GET_MODE (op
), op
);
10890 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10894 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10898 if (known_eq (bitpos
, 0)
10899 && known_eq (bitsize
,
10900 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10901 && maybe_ne (bitsize
, 0))
10903 op0
= XEXP (op0
, 0);
10904 mode2
= GET_MODE (op0
);
10906 else if (known_eq (bitpos
,
10907 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10908 && known_eq (bitsize
,
10909 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10910 && maybe_ne (bitpos
, 0)
10911 && maybe_ne (bitsize
, 0))
10913 op0
= XEXP (op0
, 1);
10915 mode2
= GET_MODE (op0
);
10918 /* Otherwise force into memory. */
10919 must_force_mem
= 1;
10922 /* If this is a constant, put it in a register if it is a legitimate
10923 constant and we don't need a memory reference. */
10924 if (CONSTANT_P (op0
)
10925 && mode2
!= BLKmode
10926 && targetm
.legitimate_constant_p (mode2
, op0
)
10927 && !must_force_mem
)
10928 op0
= force_reg (mode2
, op0
);
10930 /* Otherwise, if this is a constant, try to force it to the constant
10931 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10932 is a legitimate constant. */
10933 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10934 op0
= validize_mem (memloc
);
10936 /* Otherwise, if this is a constant or the object is not in memory
10937 and need be, put it there. */
10938 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10940 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10941 emit_move_insn (memloc
, op0
);
10943 clear_mem_expr
= true;
10948 machine_mode address_mode
;
10949 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10952 gcc_assert (MEM_P (op0
));
10954 address_mode
= get_address_mode (op0
);
10955 if (GET_MODE (offset_rtx
) != address_mode
)
10957 /* We cannot be sure that the RTL in offset_rtx is valid outside
10958 of a memory address context, so force it into a register
10959 before attempting to convert it to the desired mode. */
10960 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10961 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10964 /* See the comment in expand_assignment for the rationale. */
10965 if (mode1
!= VOIDmode
10966 && maybe_ne (bitpos
, 0)
10967 && maybe_gt (bitsize
, 0)
10968 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10969 && multiple_p (bitpos
, bitsize
)
10970 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10971 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10973 op0
= adjust_address (op0
, mode1
, bytepos
);
10977 op0
= offset_address (op0
, offset_rtx
,
10978 highest_pow2_factor (offset
));
10981 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10982 record its alignment as BIGGEST_ALIGNMENT. */
10984 && known_eq (bitpos
, 0)
10986 && is_aligning_offset (offset
, tem
))
10987 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10989 /* Don't forget about volatility even if this is a bitfield. */
10990 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10992 if (op0
== orig_op0
)
10993 op0
= copy_rtx (op0
);
10995 MEM_VOLATILE_P (op0
) = 1;
10998 if (MEM_P (op0
) && TREE_CODE (tem
) == FUNCTION_DECL
)
11000 if (op0
== orig_op0
)
11001 op0
= copy_rtx (op0
);
11003 set_mem_align (op0
, BITS_PER_UNIT
);
11006 /* In cases where an aligned union has an unaligned object
11007 as a field, we might be extracting a BLKmode value from
11008 an integer-mode (e.g., SImode) object. Handle this case
11009 by doing the extract into an object as wide as the field
11010 (which we know to be the width of a basic mode), then
11011 storing into memory, and changing the mode to BLKmode. */
11012 if (mode1
== VOIDmode
11013 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
11014 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
11015 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
11016 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
11017 && modifier
!= EXPAND_CONST_ADDRESS
11018 && modifier
!= EXPAND_INITIALIZER
11019 && modifier
!= EXPAND_MEMORY
)
11020 /* If the bitfield is volatile and the bitsize
11021 is narrower than the access size of the bitfield,
11022 we need to extract bitfields from the access. */
11023 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
11024 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
11025 && mode1
!= BLKmode
11026 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
11027 /* If the field isn't aligned enough to fetch as a memref,
11028 fetch it as a bit field. */
11029 || (mode1
!= BLKmode
11031 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
11032 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
11033 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
11034 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
11035 && modifier
!= EXPAND_MEMORY
11036 && ((modifier
== EXPAND_CONST_ADDRESS
11037 || modifier
== EXPAND_INITIALIZER
)
11039 : targetm
.slow_unaligned_access (mode1
,
11041 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
11042 /* If the type and the field are a constant size and the
11043 size of the type isn't the same size as the bitfield,
11044 we must use bitfield operations. */
11045 || (known_size_p (bitsize
)
11046 && TYPE_SIZE (TREE_TYPE (exp
))
11047 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
11048 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
11051 machine_mode ext_mode
= mode
;
11053 if (ext_mode
== BLKmode
11054 && ! (target
!= 0 && MEM_P (op0
)
11056 && multiple_p (bitpos
, BITS_PER_UNIT
)))
11057 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
11059 if (ext_mode
== BLKmode
)
11062 target
= assign_temp (type
, 1, 1);
11064 /* ??? Unlike the similar test a few lines below, this one is
11065 very likely obsolete. */
11066 if (known_eq (bitsize
, 0))
11069 /* In this case, BITPOS must start at a byte boundary and
11070 TARGET, if specified, must be a MEM. */
11071 gcc_assert (MEM_P (op0
)
11072 && (!target
|| MEM_P (target
)));
11074 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
11075 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
11076 emit_block_move (target
,
11077 adjust_address (op0
, VOIDmode
, bytepos
),
11078 gen_int_mode (bytesize
, Pmode
),
11079 (modifier
== EXPAND_STACK_PARM
11080 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
11085 /* If we have nothing to extract, the result will be 0 for targets
11086 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
11087 return 0 for the sake of consistency, as reading a zero-sized
11088 bitfield is valid in Ada and the value is fully specified. */
11089 if (known_eq (bitsize
, 0))
11092 op0
= validize_mem (op0
);
11094 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
11095 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11097 /* If the result has aggregate type and the extraction is done in
11098 an integral mode, then the field may be not aligned on a byte
11099 boundary; in this case, if it has reverse storage order, it
11100 needs to be extracted as a scalar field with reverse storage
11101 order and put back into memory order afterwards. */
11102 if (AGGREGATE_TYPE_P (type
)
11103 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
11104 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
11106 gcc_checking_assert (known_ge (bitpos
, 0));
11107 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
11108 (modifier
== EXPAND_STACK_PARM
11109 ? NULL_RTX
: target
),
11110 ext_mode
, ext_mode
, reversep
, alt_rtl
);
11112 /* If the result has aggregate type and the mode of OP0 is an
11113 integral mode then, if BITSIZE is narrower than this mode
11114 and this is for big-endian data, we must put the field
11115 into the high-order bits. And we must also put it back
11116 into memory order if it has been previously reversed. */
11117 scalar_int_mode op0_mode
;
11118 if (AGGREGATE_TYPE_P (type
)
11119 && is_int_mode (GET_MODE (op0
), &op0_mode
))
11121 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
11123 gcc_checking_assert (known_le (bitsize
, size
));
11124 if (maybe_lt (bitsize
, size
)
11125 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
11126 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
11127 size
- bitsize
, op0
, 1);
11130 op0
= flip_storage_order (op0_mode
, op0
);
11133 /* If the result type is BLKmode, store the data into a temporary
11134 of the appropriate type, but with the mode corresponding to the
11135 mode for the data we have (op0's mode). */
11136 if (mode
== BLKmode
)
11139 = assign_stack_temp_for_type (ext_mode
,
11140 GET_MODE_BITSIZE (ext_mode
),
11142 emit_move_insn (new_rtx
, op0
);
11143 op0
= copy_rtx (new_rtx
);
11144 PUT_MODE (op0
, BLKmode
);
11150 /* If the result is BLKmode, use that to access the object
11152 if (mode
== BLKmode
)
11155 /* Get a reference to just this component. */
11156 bytepos
= bits_to_bytes_round_down (bitpos
);
11157 if (modifier
== EXPAND_CONST_ADDRESS
11158 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
11159 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
11161 op0
= adjust_address (op0
, mode1
, bytepos
);
11163 if (op0
== orig_op0
)
11164 op0
= copy_rtx (op0
);
11166 /* Don't set memory attributes if the base expression is
11167 SSA_NAME that got expanded as a MEM or a CONSTANT. In that case,
11168 we should just honor its original memory attributes. */
11169 if (!(TREE_CODE (tem
) == SSA_NAME
11170 && (MEM_P (orig_op0
) || CONSTANT_P (orig_op0
))))
11171 set_mem_attributes (op0
, exp
, 0);
11173 if (REG_P (XEXP (op0
, 0)))
11174 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11176 /* If op0 is a temporary because the original expressions was forced
11177 to memory, clear MEM_EXPR so that the original expression cannot
11178 be marked as addressable through MEM_EXPR of the temporary. */
11179 if (clear_mem_expr
)
11180 set_mem_expr (op0
, NULL_TREE
);
11182 MEM_VOLATILE_P (op0
) |= volatilep
;
11185 && modifier
!= EXPAND_MEMORY
11186 && modifier
!= EXPAND_WRITE
)
11187 op0
= flip_storage_order (mode1
, op0
);
11189 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
11190 || modifier
== EXPAND_CONST_ADDRESS
11191 || modifier
== EXPAND_INITIALIZER
)
11195 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
11197 convert_move (target
, op0
, unsignedp
);
11202 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
11205 /* All valid uses of __builtin_va_arg_pack () are removed during
11207 if (CALL_EXPR_VA_ARG_PACK (exp
))
11208 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
11210 tree fndecl
= get_callee_fndecl (exp
), attr
;
11213 /* Don't diagnose the error attribute in thunks, those are
11214 artificially created. */
11215 && !CALL_FROM_THUNK_P (exp
)
11216 && (attr
= lookup_attribute ("error",
11217 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11219 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11220 error ("%Kcall to %qs declared with attribute error: %s", exp
,
11221 identifier_to_locale (ident
),
11222 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11225 /* Don't diagnose the warning attribute in thunks, those are
11226 artificially created. */
11227 && !CALL_FROM_THUNK_P (exp
)
11228 && (attr
= lookup_attribute ("warning",
11229 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11231 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11232 warning_at (tree_nonartificial_location (exp
),
11233 OPT_Wattribute_warning
,
11234 "%Kcall to %qs declared with attribute warning: %s",
11235 exp
, identifier_to_locale (ident
),
11236 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11239 /* Check for a built-in function. */
11240 if (fndecl
&& fndecl_built_in_p (fndecl
))
11242 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11243 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11246 return expand_call (exp
, target
, ignore
);
11248 case VIEW_CONVERT_EXPR
:
11251 /* If we are converting to BLKmode, try to avoid an intermediate
11252 temporary by fetching an inner memory reference. */
11253 if (mode
== BLKmode
11254 && poly_int_tree_p (TYPE_SIZE (type
))
11255 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11256 && handled_component_p (treeop0
))
11258 machine_mode mode1
;
11259 poly_int64 bitsize
, bitpos
, bytepos
;
11261 int reversep
, volatilep
= 0;
11263 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11264 &unsignedp
, &reversep
, &volatilep
);
11266 /* ??? We should work harder and deal with non-zero offsets. */
11268 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11270 && known_size_p (bitsize
)
11271 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11273 /* See the normal_inner_ref case for the rationale. */
11275 = expand_expr_real (tem
,
11276 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11277 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11279 && modifier
!= EXPAND_STACK_PARM
11280 ? target
: NULL_RTX
),
11282 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11285 if (MEM_P (orig_op0
))
11289 /* Get a reference to just this component. */
11290 if (modifier
== EXPAND_CONST_ADDRESS
11291 || modifier
== EXPAND_SUM
11292 || modifier
== EXPAND_INITIALIZER
)
11293 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11295 op0
= adjust_address (op0
, mode
, bytepos
);
11297 if (op0
== orig_op0
)
11298 op0
= copy_rtx (op0
);
11300 set_mem_attributes (op0
, treeop0
, 0);
11301 if (REG_P (XEXP (op0
, 0)))
11302 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11304 MEM_VOLATILE_P (op0
) |= volatilep
;
11310 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11311 NULL
, inner_reference_p
);
11313 /* If the input and output modes are both the same, we are done. */
11314 if (mode
== GET_MODE (op0
))
11316 /* If neither mode is BLKmode, and both modes are the same size
11317 then we can use gen_lowpart. */
11318 else if (mode
!= BLKmode
11319 && GET_MODE (op0
) != BLKmode
11320 && known_eq (GET_MODE_PRECISION (mode
),
11321 GET_MODE_PRECISION (GET_MODE (op0
)))
11322 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11324 if (GET_CODE (op0
) == SUBREG
)
11325 op0
= force_reg (GET_MODE (op0
), op0
);
11326 temp
= gen_lowpart_common (mode
, op0
);
11331 if (!REG_P (op0
) && !MEM_P (op0
))
11332 op0
= force_reg (GET_MODE (op0
), op0
);
11333 op0
= gen_lowpart (mode
, op0
);
11336 /* If both types are integral, convert from one mode to the other. */
11337 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11338 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11339 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11340 /* If the output type is a bit-field type, do an extraction. */
11341 else if (reduce_bit_field
)
11342 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11343 TYPE_UNSIGNED (type
), NULL_RTX
,
11344 mode
, mode
, false, NULL
);
11345 /* As a last resort, spill op0 to memory, and reload it in a
11347 else if (!MEM_P (op0
))
11349 /* If the operand is not a MEM, force it into memory. Since we
11350 are going to be changing the mode of the MEM, don't call
11351 force_const_mem for constants because we don't allow pool
11352 constants to change mode. */
11353 tree inner_type
= TREE_TYPE (treeop0
);
11355 gcc_assert (!TREE_ADDRESSABLE (exp
));
11357 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11359 = assign_stack_temp_for_type
11360 (TYPE_MODE (inner_type
),
11361 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11363 emit_move_insn (target
, op0
);
11367 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11368 output type is such that the operand is known to be aligned, indicate
11369 that it is. Otherwise, we need only be concerned about alignment for
11370 non-BLKmode results. */
11373 enum insn_code icode
;
11375 if (modifier
!= EXPAND_WRITE
11376 && modifier
!= EXPAND_MEMORY
11377 && !inner_reference_p
11379 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11381 /* If the target does have special handling for unaligned
11382 loads of mode then use them. */
11383 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11384 != CODE_FOR_nothing
)
11388 op0
= adjust_address (op0
, mode
, 0);
11389 /* We've already validated the memory, and we're creating a
11390 new pseudo destination. The predicates really can't
11392 reg
= gen_reg_rtx (mode
);
11394 /* Nor can the insn generator. */
11395 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11399 else if (STRICT_ALIGNMENT
)
11401 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11402 poly_uint64 temp_size
= mode_size
;
11403 if (GET_MODE (op0
) != BLKmode
)
11404 temp_size
= upper_bound (temp_size
,
11405 GET_MODE_SIZE (GET_MODE (op0
)));
11407 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11408 rtx new_with_op0_mode
11409 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11411 gcc_assert (!TREE_ADDRESSABLE (exp
));
11413 if (GET_MODE (op0
) == BLKmode
)
11415 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11416 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11417 (modifier
== EXPAND_STACK_PARM
11418 ? BLOCK_OP_CALL_PARM
11419 : BLOCK_OP_NORMAL
));
11422 emit_move_insn (new_with_op0_mode
, op0
);
11428 op0
= adjust_address (op0
, mode
, 0);
11435 tree lhs
= treeop0
;
11436 tree rhs
= treeop1
;
11437 gcc_assert (ignore
);
11439 /* Check for |= or &= of a bitfield of size one into another bitfield
11440 of size 1. In this case, (unless we need the result of the
11441 assignment) we can do this more efficiently with a
11442 test followed by an assignment, if necessary.
11444 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11445 things change so we do, this code should be enhanced to
11447 if (TREE_CODE (lhs
) == COMPONENT_REF
11448 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11449 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11450 && TREE_OPERAND (rhs
, 0) == lhs
11451 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11452 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11453 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11455 rtx_code_label
*label
= gen_label_rtx ();
11456 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11457 profile_probability prob
= profile_probability::uninitialized ();
11459 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
11461 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
11462 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11464 do_pending_stack_adjust ();
11465 emit_label (label
);
11469 expand_assignment (lhs
, rhs
, false);
11474 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11476 case REALPART_EXPR
:
11477 op0
= expand_normal (treeop0
);
11478 return read_complex_part (op0
, false);
11480 case IMAGPART_EXPR
:
11481 op0
= expand_normal (treeop0
);
11482 return read_complex_part (op0
, true);
11489 /* Expanded in cfgexpand.c. */
11490 gcc_unreachable ();
11492 case TRY_CATCH_EXPR
:
11494 case EH_FILTER_EXPR
:
11495 case TRY_FINALLY_EXPR
:
11497 /* Lowered by tree-eh.c. */
11498 gcc_unreachable ();
11500 case WITH_CLEANUP_EXPR
:
11501 case CLEANUP_POINT_EXPR
:
11503 case CASE_LABEL_EXPR
:
11508 case COMPOUND_EXPR
:
11509 case PREINCREMENT_EXPR
:
11510 case PREDECREMENT_EXPR
:
11511 case POSTINCREMENT_EXPR
:
11512 case POSTDECREMENT_EXPR
:
11515 case COMPOUND_LITERAL_EXPR
:
11516 /* Lowered by gimplify.c. */
11517 gcc_unreachable ();
11520 /* Function descriptors are not valid except for as
11521 initialization constants, and should not be expanded. */
11522 gcc_unreachable ();
11524 case WITH_SIZE_EXPR
:
11525 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11526 have pulled out the size to use in whatever context it needed. */
11527 return expand_expr_real (treeop0
, original_target
, tmode
,
11528 modifier
, alt_rtl
, inner_reference_p
);
11531 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11535 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11536 signedness of TYPE), possibly returning the result in TARGET.
11537 TYPE is known to be a partial integer type. */
11539 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11541 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11542 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11544 /* For constant values, reduce using build_int_cst_type. */
11545 poly_int64 const_exp
;
11546 if (poly_int_rtx_p (exp
, &const_exp
))
11548 tree t
= build_int_cst_type (type
, const_exp
);
11549 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11551 else if (TYPE_UNSIGNED (type
))
11553 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11554 rtx mask
= immed_wide_int_const
11555 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11556 return expand_and (mode
, exp
, mask
, target
);
11560 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11561 int count
= GET_MODE_PRECISION (mode
) - prec
;
11562 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11563 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11567 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11568 when applied to the address of EXP produces an address known to be
11569 aligned more than BIGGEST_ALIGNMENT. */
11572 is_aligning_offset (const_tree offset
, const_tree exp
)
11574 /* Strip off any conversions. */
11575 while (CONVERT_EXPR_P (offset
))
11576 offset
= TREE_OPERAND (offset
, 0);
11578 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11579 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11580 if (TREE_CODE (offset
) != BIT_AND_EXPR
11581 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11582 || compare_tree_int (TREE_OPERAND (offset
, 1),
11583 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11584 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11587 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11588 It must be NEGATE_EXPR. Then strip any more conversions. */
11589 offset
= TREE_OPERAND (offset
, 0);
11590 while (CONVERT_EXPR_P (offset
))
11591 offset
= TREE_OPERAND (offset
, 0);
11593 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11596 offset
= TREE_OPERAND (offset
, 0);
11597 while (CONVERT_EXPR_P (offset
))
11598 offset
= TREE_OPERAND (offset
, 0);
11600 /* This must now be the address of EXP. */
11601 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11604 /* Return the tree node if an ARG corresponds to a string constant or zero
11605 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11606 non-constant) offset in bytes within the string that ARG is accessing.
11607 If MEM_SIZE is non-zero the storage size of the memory is returned.
11608 If DECL is non-zero the constant declaration is returned if available. */
11611 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
11613 tree dummy
= NULL_TREE
;;
11617 /* Store the type of the original expression before conversions
11618 via NOP_EXPR or POINTER_PLUS_EXPR to other types have been
11620 tree argtype
= TREE_TYPE (arg
);
11625 /* Non-constant index into the character array in an ARRAY_REF
11626 expression or null. */
11627 tree varidx
= NULL_TREE
;
11629 poly_int64 base_off
= 0;
11631 if (TREE_CODE (arg
) == ADDR_EXPR
)
11633 arg
= TREE_OPERAND (arg
, 0);
11635 if (TREE_CODE (arg
) == ARRAY_REF
)
11637 tree idx
= TREE_OPERAND (arg
, 1);
11638 if (TREE_CODE (idx
) != INTEGER_CST
)
11640 /* From a pointer (but not array) argument extract the variable
11641 index to prevent get_addr_base_and_unit_offset() from failing
11642 due to it. Use it later to compute the non-constant offset
11643 into the string and return it to the caller. */
11645 ref
= TREE_OPERAND (arg
, 0);
11647 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11650 if (!integer_zerop (array_ref_low_bound (arg
)))
11653 if (!integer_onep (array_ref_element_size (arg
)))
11657 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11659 || (TREE_CODE (array
) != VAR_DECL
11660 && TREE_CODE (array
) != CONST_DECL
11661 && TREE_CODE (array
) != STRING_CST
))
11664 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11666 tree arg0
= TREE_OPERAND (arg
, 0);
11667 tree arg1
= TREE_OPERAND (arg
, 1);
11670 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
11673 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
11679 /* Avoid pointers to arrays (see bug 86622). */
11680 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11681 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11682 && !(decl
&& !*decl
)
11683 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11684 && tree_fits_uhwi_p (*mem_size
)
11685 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11688 tree type
= TREE_TYPE (offset
);
11689 arg1
= fold_convert (type
, arg1
);
11690 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11695 else if (TREE_CODE (arg
) == SSA_NAME
)
11697 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
11698 if (!is_gimple_assign (stmt
))
11701 tree rhs1
= gimple_assign_rhs1 (stmt
);
11702 tree_code code
= gimple_assign_rhs_code (stmt
);
11703 if (code
== ADDR_EXPR
)
11704 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
11705 else if (code
!= POINTER_PLUS_EXPR
)
11709 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
11711 /* Avoid pointers to arrays (see bug 86622). */
11712 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
11713 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
11714 && !(decl
&& !*decl
)
11715 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11716 && tree_fits_uhwi_p (*mem_size
)
11717 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11720 tree rhs2
= gimple_assign_rhs2 (stmt
);
11721 tree type
= TREE_TYPE (offset
);
11722 rhs2
= fold_convert (type
, rhs2
);
11723 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
11728 else if (DECL_P (arg
))
11733 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11736 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11739 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11740 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11741 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11744 offset
= fold_convert (sizetype
, varidx
);
11747 if (TREE_CODE (array
) == STRING_CST
)
11749 *ptr_offset
= fold_convert (sizetype
, offset
);
11750 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11753 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
11754 >= TREE_STRING_LENGTH (array
));
11758 if (!VAR_P (array
) && TREE_CODE (array
) != CONST_DECL
)
11761 tree init
= ctor_for_folding (array
);
11763 /* Handle variables initialized with string literals. */
11764 if (!init
|| init
== error_mark_node
)
11766 if (TREE_CODE (init
) == CONSTRUCTOR
)
11768 /* Convert the 64-bit constant offset to a wider type to avoid
11771 if (!base_off
.is_constant (&wioff
))
11774 wioff
*= BITS_PER_UNIT
;
11775 if (!wi::fits_uhwi_p (wioff
))
11778 base_off
= wioff
.to_uhwi ();
11779 unsigned HOST_WIDE_INT fieldoff
= 0;
11780 init
= fold_ctor_reference (TREE_TYPE (arg
), init
, base_off
, 0, array
,
11782 HOST_WIDE_INT cstoff
;
11783 if (!base_off
.is_constant (&cstoff
))
11786 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11787 tree off
= build_int_cst (sizetype
, cstoff
);
11789 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11797 *ptr_offset
= offset
;
11799 tree inittype
= TREE_TYPE (init
);
11801 if (TREE_CODE (init
) == INTEGER_CST
11802 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
11803 || TYPE_MAIN_VARIANT (inittype
) == char_type_node
))
11805 /* For a reference to (address of) a single constant character,
11806 store the native representation of the character in CHARBUF.
11807 If the reference is to an element of an array or a member
11808 of a struct, only consider narrow characters until ctors
11809 for wide character arrays are transformed to STRING_CSTs
11810 like those for narrow arrays. */
11811 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
11812 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
11815 /* Construct a string literal with elements of INITTYPE and
11816 the representation above. Then strip
11817 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
11818 init
= build_string_literal (len
, (char *)charbuf
, inittype
);
11819 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
11823 tree initsize
= TYPE_SIZE_UNIT (inittype
);
11825 if (TREE_CODE (init
) == CONSTRUCTOR
&& initializer_zerop (init
))
11827 /* Fold an empty/zero constructor for an implicitly initialized
11828 object or subobject into the empty string. */
11830 /* Determine the character type from that of the original
11832 tree chartype
= argtype
;
11833 if (POINTER_TYPE_P (chartype
))
11834 chartype
= TREE_TYPE (chartype
);
11835 while (TREE_CODE (chartype
) == ARRAY_TYPE
)
11836 chartype
= TREE_TYPE (chartype
);
11837 /* Convert a char array to an empty STRING_CST having an array
11838 of the expected type. */
11840 initsize
= integer_zero_node
;
11842 unsigned HOST_WIDE_INT size
= tree_to_uhwi (initsize
);
11843 init
= build_string_literal (size
? 1 : 0, "", chartype
, size
);
11844 init
= TREE_OPERAND (init
, 0);
11845 init
= TREE_OPERAND (init
, 0);
11847 *ptr_offset
= integer_zero_node
;
11853 if (TREE_CODE (init
) != STRING_CST
)
11856 *mem_size
= initsize
;
11858 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
11863 /* Compute the modular multiplicative inverse of A modulo M
11864 using extended Euclid's algorithm. Assumes A and M are coprime. */
11866 mod_inv (const wide_int
&a
, const wide_int
&b
)
11868 /* Verify the assumption. */
11869 gcc_checking_assert (wi::eq_p (wi::gcd (a
, b
), 1));
11871 unsigned int p
= a
.get_precision () + 1;
11872 gcc_checking_assert (b
.get_precision () + 1 == p
);
11873 wide_int c
= wide_int::from (a
, p
, UNSIGNED
);
11874 wide_int d
= wide_int::from (b
, p
, UNSIGNED
);
11875 wide_int x0
= wide_int::from (0, p
, UNSIGNED
);
11876 wide_int x1
= wide_int::from (1, p
, UNSIGNED
);
11878 if (wi::eq_p (b
, 1))
11879 return wide_int::from (1, p
, UNSIGNED
);
11881 while (wi::gt_p (c
, 1, UNSIGNED
))
11884 wide_int q
= wi::divmod_trunc (c
, d
, UNSIGNED
, &d
);
11887 x0
= wi::sub (x1
, wi::mul (q
, x0
));
11890 if (wi::lt_p (x1
, 0, SIGNED
))
11895 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
11896 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
11897 for C2 > 0 to x & C3 == C2
11898 for C2 < 0 to x & C3 == (C2 & C3). */
11900 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11902 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11903 tree treeop0
= gimple_assign_rhs1 (stmt
);
11904 tree treeop1
= gimple_assign_rhs2 (stmt
);
11905 tree type
= TREE_TYPE (*arg0
);
11906 scalar_int_mode mode
;
11907 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11909 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11910 || TYPE_PRECISION (type
) <= 1
11911 || TYPE_UNSIGNED (type
)
11912 /* Signed x % c == 0 should have been optimized into unsigned modulo
11914 || integer_zerop (*arg1
)
11915 /* If c is known to be non-negative, modulo will be expanded as unsigned
11917 || get_range_pos_neg (treeop0
) == 1)
11920 /* x % c == d where d < 0 && d <= -c should be always false. */
11921 if (tree_int_cst_sgn (*arg1
) == -1
11922 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
11925 int prec
= TYPE_PRECISION (type
);
11926 wide_int w
= wi::to_wide (treeop1
) - 1;
11927 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
11928 tree c3
= wide_int_to_tree (type
, w
);
11930 if (tree_int_cst_sgn (*arg1
) == -1)
11931 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
11933 rtx op0
= expand_normal (treeop0
);
11934 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11936 bool speed_p
= optimize_insn_for_speed_p ();
11938 do_pending_stack_adjust ();
11940 location_t loc
= gimple_location (stmt
);
11941 struct separate_ops ops
;
11942 ops
.code
= TRUNC_MOD_EXPR
;
11943 ops
.location
= loc
;
11944 ops
.type
= TREE_TYPE (treeop0
);
11947 ops
.op2
= NULL_TREE
;
11949 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11951 rtx_insn
*moinsns
= get_insns ();
11954 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11955 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11956 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11958 ops
.code
= BIT_AND_EXPR
;
11959 ops
.location
= loc
;
11960 ops
.type
= TREE_TYPE (treeop0
);
11963 ops
.op2
= NULL_TREE
;
11965 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11967 rtx_insn
*muinsns
= get_insns ();
11970 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11971 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
11972 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
11974 if (mocost
<= mucost
)
11976 emit_insn (moinsns
);
11977 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11981 emit_insn (muinsns
);
11982 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
11987 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
11989 (X - C2) * C3 <= C4 (or >), where
11990 C3 is modular multiplicative inverse of C1 and 1<<prec and
11991 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
11992 if C2 > ((1<<prec) - 1) % C1).
11993 If C1 is even, S = ctz (C1) and C2 is 0, use
11994 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
11995 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
11997 For signed (X % C1) == 0 if C1 is odd to (all operations in it
11999 (X * C3) + C4 <= 2 * C4, where
12000 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
12001 C4 is ((1<<(prec - 1) - 1) / C1).
12002 If C1 is even, S = ctz(C1), use
12003 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
12004 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
12005 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
12007 See the Hacker's Delight book, section 10-17. */
12009 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
12011 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
12012 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
12017 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
12021 tree treeop0
= gimple_assign_rhs1 (stmt
);
12022 tree treeop1
= gimple_assign_rhs2 (stmt
);
12023 if (TREE_CODE (treeop0
) != SSA_NAME
12024 || TREE_CODE (treeop1
) != INTEGER_CST
12025 /* Don't optimize the undefined behavior case x % 0;
12026 x % 1 should have been optimized into zero, punt if
12027 it makes it here for whatever reason;
12028 x % -c should have been optimized into x % c. */
12029 || compare_tree_int (treeop1
, 2) <= 0
12030 /* Likewise x % c == d where d >= c should be always false. */
12031 || tree_int_cst_le (treeop1
, *arg1
))
12034 /* Unsigned x % pow2 is handled right already, for signed
12035 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
12036 if (integer_pow2p (treeop1
))
12037 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
12039 tree type
= TREE_TYPE (*arg0
);
12040 scalar_int_mode mode
;
12041 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
12043 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
12044 || TYPE_PRECISION (type
) <= 1)
12047 signop sgn
= UNSIGNED
;
12048 /* If both operands are known to have the sign bit clear, handle
12049 even the signed modulo case as unsigned. treeop1 is always
12050 positive >= 2, checked above. */
12051 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
12054 if (!TYPE_UNSIGNED (type
))
12056 if (tree_int_cst_sgn (*arg1
) == -1)
12058 type
= unsigned_type_for (type
);
12059 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
12063 int prec
= TYPE_PRECISION (type
);
12064 wide_int w
= wi::to_wide (treeop1
);
12065 int shift
= wi::ctz (w
);
12066 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
12067 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
12068 If C1 is odd, we can handle all cases by subtracting
12069 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
12070 e.g. by testing for overflow on the subtraction, punt on that for now
12072 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
12076 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
12077 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
12081 imm_use_iterator imm_iter
;
12082 use_operand_p use_p
;
12083 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
12085 gimple
*use_stmt
= USE_STMT (use_p
);
12086 /* Punt if treeop0 is used in the same bb in a division
12087 or another modulo with the same divisor. We should expect
12088 the division and modulo combined together. */
12089 if (use_stmt
== stmt
12090 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
12092 if (!is_gimple_assign (use_stmt
)
12093 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
12094 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
12096 if (gimple_assign_rhs1 (use_stmt
) != treeop0
12097 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
12102 w
= wi::lrshift (w
, shift
);
12103 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
12104 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
12105 wide_int m
= wide_int::from (mod_inv (a
, b
), prec
, UNSIGNED
);
12106 tree c3
= wide_int_to_tree (type
, m
);
12107 tree c5
= NULL_TREE
;
12109 if (sgn
== UNSIGNED
)
12111 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
12112 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
12113 otherwise use < or subtract one from C4. E.g. for
12114 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
12115 x % 3U == 1 already needs to be
12116 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
12117 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
12120 d
= wi::lrshift (d
, shift
);
12124 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
12126 d
= wi::lshift (e
, 1);
12129 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
12130 d
= wi::lrshift (e
, shift
- 1);
12132 c5
= wide_int_to_tree (type
, e
);
12134 tree c4
= wide_int_to_tree (type
, d
);
12136 rtx op0
= expand_normal (treeop0
);
12137 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
12139 bool speed_p
= optimize_insn_for_speed_p ();
12141 do_pending_stack_adjust ();
12143 location_t loc
= gimple_location (stmt
);
12144 struct separate_ops ops
;
12145 ops
.code
= TRUNC_MOD_EXPR
;
12146 ops
.location
= loc
;
12147 ops
.type
= TREE_TYPE (treeop0
);
12150 ops
.op2
= NULL_TREE
;
12152 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12154 rtx_insn
*moinsns
= get_insns ();
12157 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12158 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12159 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12161 tree t
= fold_convert_loc (loc
, type
, treeop0
);
12162 if (!integer_zerop (*arg1
))
12163 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
12164 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
12166 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
12169 tree s
= build_int_cst (NULL_TREE
, shift
);
12170 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
12174 rtx mur
= expand_normal (t
);
12175 rtx_insn
*muinsns
= get_insns ();
12178 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12179 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
12180 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
12182 if (mocost
<= mucost
)
12184 emit_insn (moinsns
);
12185 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12189 emit_insn (muinsns
);
12190 *arg0
= make_tree (type
, mur
);
12192 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
12195 /* Generate code to calculate OPS, and exploded expression
12196 using a store-flag instruction and return an rtx for the result.
12197 OPS reflects a comparison.
12199 If TARGET is nonzero, store the result there if convenient.
12201 Return zero if there is no suitable set-flag instruction
12202 available on this machine.
12204 Once expand_expr has been called on the arguments of the comparison,
12205 we are committed to doing the store flag, since it is not safe to
12206 re-evaluate the expression. We emit the store-flag insn by calling
12207 emit_store_flag, but only expand the arguments if we have a reason
12208 to believe that emit_store_flag will be successful. If we think that
12209 it will, but it isn't, we have to simulate the store-flag with a
12210 set/jump/set sequence. */
12213 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
12215 enum rtx_code code
;
12216 tree arg0
, arg1
, type
;
12217 machine_mode operand_mode
;
12220 rtx subtarget
= target
;
12221 location_t loc
= ops
->location
;
12226 /* Don't crash if the comparison was erroneous. */
12227 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
12230 type
= TREE_TYPE (arg0
);
12231 operand_mode
= TYPE_MODE (type
);
12232 unsignedp
= TYPE_UNSIGNED (type
);
12234 /* We won't bother with BLKmode store-flag operations because it would mean
12235 passing a lot of information to emit_store_flag. */
12236 if (operand_mode
== BLKmode
)
12239 /* We won't bother with store-flag operations involving function pointers
12240 when function pointers must be canonicalized before comparisons. */
12241 if (targetm
.have_canonicalize_funcptr_for_compare ()
12242 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
12243 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
12244 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
12245 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
12251 /* For vector typed comparisons emit code to generate the desired
12252 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
12253 expander for this. */
12254 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
12256 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
12257 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
12258 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
12259 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
12262 tree if_true
= constant_boolean_node (true, ops
->type
);
12263 tree if_false
= constant_boolean_node (false, ops
->type
);
12264 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
12269 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
12270 into (x - C2) * C3 < C4. */
12271 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
12272 && TREE_CODE (arg0
) == SSA_NAME
12273 && TREE_CODE (arg1
) == INTEGER_CST
)
12275 enum tree_code new_code
= maybe_optimize_mod_cmp (ops
->code
,
12277 if (new_code
!= ops
->code
)
12279 struct separate_ops nops
= *ops
;
12280 nops
.code
= ops
->code
= new_code
;
12283 nops
.type
= TREE_TYPE (arg0
);
12284 return do_store_flag (&nops
, target
, mode
);
12288 /* Get the rtx comparison code to use. We know that EXP is a comparison
12289 operation of some type. Some comparisons against 1 and -1 can be
12290 converted to comparisons with zero. Do so here so that the tests
12291 below will be aware that we have a comparison with zero. These
12292 tests will not catch constants in the first operand, but constants
12293 are rarely passed as the first operand. */
12304 if (integer_onep (arg1
))
12305 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
12307 code
= unsignedp
? LTU
: LT
;
12310 if (! unsignedp
&& integer_all_onesp (arg1
))
12311 arg1
= integer_zero_node
, code
= LT
;
12313 code
= unsignedp
? LEU
: LE
;
12316 if (! unsignedp
&& integer_all_onesp (arg1
))
12317 arg1
= integer_zero_node
, code
= GE
;
12319 code
= unsignedp
? GTU
: GT
;
12322 if (integer_onep (arg1
))
12323 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
12325 code
= unsignedp
? GEU
: GE
;
12328 case UNORDERED_EXPR
:
12354 gcc_unreachable ();
12357 /* Put a constant second. */
12358 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
12359 || TREE_CODE (arg0
) == FIXED_CST
)
12361 std::swap (arg0
, arg1
);
12362 code
= swap_condition (code
);
12365 /* If this is an equality or inequality test of a single bit, we can
12366 do this by shifting the bit being tested to the low-order bit and
12367 masking the result with the constant 1. If the condition was EQ,
12368 we xor it with 1. This does not require an scc insn and is faster
12369 than an scc insn even if we have it.
12371 The code to make this transformation was moved into fold_single_bit_test,
12372 so we just call into the folder and expand its result. */
12374 if ((code
== NE
|| code
== EQ
)
12375 && integer_zerop (arg1
)
12376 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
12378 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
12380 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
12382 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
12383 type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
12384 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
12385 gimple_assign_rhs1 (srcstmt
),
12386 gimple_assign_rhs2 (srcstmt
));
12387 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
12389 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
12393 if (! get_subtarget (target
)
12394 || GET_MODE (subtarget
) != operand_mode
)
12397 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
12400 target
= gen_reg_rtx (mode
);
12402 /* Try a cstore if possible. */
12403 return emit_store_flag_force (target
, code
, op0
, op1
,
12404 operand_mode
, unsignedp
,
12405 (TYPE_PRECISION (ops
->type
) == 1
12406 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
12409 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12410 0 otherwise (i.e. if there is no casesi instruction).
12412 DEFAULT_PROBABILITY is the probability of jumping to the default
12415 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
12416 rtx table_label
, rtx default_label
, rtx fallback_label
,
12417 profile_probability default_probability
)
12419 class expand_operand ops
[5];
12420 scalar_int_mode index_mode
= SImode
;
12421 rtx op1
, op2
, index
;
12423 if (! targetm
.have_casesi ())
12426 /* The index must be some form of integer. Convert it to SImode. */
12427 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
12428 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
12430 rtx rangertx
= expand_normal (range
);
12432 /* We must handle the endpoints in the original mode. */
12433 index_expr
= build2 (MINUS_EXPR
, index_type
,
12434 index_expr
, minval
);
12435 minval
= integer_zero_node
;
12436 index
= expand_normal (index_expr
);
12438 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
12439 omode
, 1, default_label
,
12440 default_probability
);
12441 /* Now we can safely truncate. */
12442 index
= convert_to_mode (index_mode
, index
, 0);
12446 if (omode
!= index_mode
)
12448 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
12449 index_expr
= fold_convert (index_type
, index_expr
);
12452 index
= expand_normal (index_expr
);
12455 do_pending_stack_adjust ();
12457 op1
= expand_normal (minval
);
12458 op2
= expand_normal (range
);
12460 create_input_operand (&ops
[0], index
, index_mode
);
12461 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
12462 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
12463 create_fixed_operand (&ops
[3], table_label
);
12464 create_fixed_operand (&ops
[4], (default_label
12466 : fallback_label
));
12467 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
12471 /* Attempt to generate a tablejump instruction; same concept. */
12472 /* Subroutine of the next function.
12474 INDEX is the value being switched on, with the lowest value
12475 in the table already subtracted.
12476 MODE is its expected mode (needed if INDEX is constant).
12477 RANGE is the length of the jump table.
12478 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12480 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12481 index value is out of range.
12482 DEFAULT_PROBABILITY is the probability of jumping to
12483 the default label. */
12486 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
12487 rtx default_label
, profile_probability default_probability
)
12491 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
12492 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
12494 /* Do an unsigned comparison (in the proper mode) between the index
12495 expression and the value which represents the length of the range.
12496 Since we just finished subtracting the lower bound of the range
12497 from the index expression, this comparison allows us to simultaneously
12498 check that the original index expression value is both greater than
12499 or equal to the minimum value of the range and less than or equal to
12500 the maximum value of the range. */
12503 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
12504 default_label
, default_probability
);
12506 /* If index is in range, it must fit in Pmode.
12507 Convert to Pmode so we can index with it. */
12510 unsigned int width
;
12512 /* We know the value of INDEX is between 0 and RANGE. If we have a
12513 sign-extended subreg, and RANGE does not have the sign bit set, then
12514 we have a value that is valid for both sign and zero extension. In
12515 this case, we get better code if we sign extend. */
12516 if (GET_CODE (index
) == SUBREG
12517 && SUBREG_PROMOTED_VAR_P (index
)
12518 && SUBREG_PROMOTED_SIGNED_P (index
)
12519 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
12520 <= HOST_BITS_PER_WIDE_INT
)
12521 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
12522 index
= convert_to_mode (Pmode
, index
, 0);
12524 index
= convert_to_mode (Pmode
, index
, 1);
12527 /* Don't let a MEM slip through, because then INDEX that comes
12528 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12529 and break_out_memory_refs will go to work on it and mess it up. */
12530 #ifdef PIC_CASE_VECTOR_ADDRESS
12531 if (flag_pic
&& !REG_P (index
))
12532 index
= copy_to_mode_reg (Pmode
, index
);
12535 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12536 GET_MODE_SIZE, because this indicates how large insns are. The other
12537 uses should all be Pmode, because they are addresses. This code
12538 could fail if addresses and insns are not the same size. */
12539 index
= simplify_gen_binary (MULT
, Pmode
, index
,
12540 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
12542 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
12543 gen_rtx_LABEL_REF (Pmode
, table_label
));
12545 #ifdef PIC_CASE_VECTOR_ADDRESS
12547 index
= PIC_CASE_VECTOR_ADDRESS (index
);
12550 index
= memory_address (CASE_VECTOR_MODE
, index
);
12551 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
12552 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
12553 convert_move (temp
, vector
, 0);
12555 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
12557 /* If we are generating PIC code or if the table is PC-relative, the
12558 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12559 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
12564 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
12565 rtx table_label
, rtx default_label
,
12566 profile_probability default_probability
)
12570 if (! targetm
.have_tablejump ())
12573 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
12574 fold_convert (index_type
, index_expr
),
12575 fold_convert (index_type
, minval
));
12576 index
= expand_normal (index_expr
);
12577 do_pending_stack_adjust ();
12579 do_tablejump (index
, TYPE_MODE (index_type
),
12580 convert_modes (TYPE_MODE (index_type
),
12581 TYPE_MODE (TREE_TYPE (range
)),
12582 expand_normal (range
),
12583 TYPE_UNSIGNED (TREE_TYPE (range
))),
12584 table_label
, default_label
, default_probability
);
12588 /* Return a CONST_VECTOR rtx representing vector mask for
12589 a VECTOR_CST of booleans. */
12591 const_vector_mask_from_tree (tree exp
)
12593 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12594 machine_mode inner
= GET_MODE_INNER (mode
);
12596 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12597 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12598 unsigned int count
= builder
.encoded_nelts ();
12599 for (unsigned int i
= 0; i
< count
; ++i
)
12601 tree elt
= VECTOR_CST_ELT (exp
, i
);
12602 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12603 if (integer_zerop (elt
))
12604 builder
.quick_push (CONST0_RTX (inner
));
12605 else if (integer_onep (elt
)
12606 || integer_minus_onep (elt
))
12607 builder
.quick_push (CONSTM1_RTX (inner
));
12609 gcc_unreachable ();
12611 return builder
.build ();
12614 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
12615 Return a constant scalar rtx of mode MODE in which bit X is set if element
12616 X of EXP is nonzero. */
12618 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
12620 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
12623 /* The result has a fixed number of bits so the input must too. */
12624 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
12625 for (unsigned int i
= 0; i
< nunits
; ++i
)
12627 elt
= VECTOR_CST_ELT (exp
, i
);
12628 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12629 if (integer_all_onesp (elt
))
12630 res
= wi::set_bit (res
, i
);
12632 gcc_assert (integer_zerop (elt
));
12635 return immed_wide_int_const (res
, mode
);
12638 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12640 const_vector_from_tree (tree exp
)
12642 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12644 if (initializer_zerop (exp
))
12645 return CONST0_RTX (mode
);
12647 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
12648 return const_vector_mask_from_tree (exp
);
12650 machine_mode inner
= GET_MODE_INNER (mode
);
12652 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12653 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12654 unsigned int count
= builder
.encoded_nelts ();
12655 for (unsigned int i
= 0; i
< count
; ++i
)
12657 tree elt
= VECTOR_CST_ELT (exp
, i
);
12658 if (TREE_CODE (elt
) == REAL_CST
)
12659 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
12661 else if (TREE_CODE (elt
) == FIXED_CST
)
12662 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
12665 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
12668 return builder
.build ();
12671 /* Build a decl for a personality function given a language prefix. */
12674 build_personality_function (const char *lang
)
12676 const char *unwind_and_version
;
12680 switch (targetm_common
.except_unwind_info (&global_options
))
12685 unwind_and_version
= "_sj0";
12689 unwind_and_version
= "_v0";
12692 unwind_and_version
= "_seh0";
12695 gcc_unreachable ();
12698 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
12700 type
= build_function_type_list (unsigned_type_node
,
12701 integer_type_node
, integer_type_node
,
12702 long_long_unsigned_type_node
,
12703 ptr_type_node
, ptr_type_node
, NULL_TREE
);
12704 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
12705 get_identifier (name
), type
);
12706 DECL_ARTIFICIAL (decl
) = 1;
12707 DECL_EXTERNAL (decl
) = 1;
12708 TREE_PUBLIC (decl
) = 1;
12710 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12711 are the flags assigned by targetm.encode_section_info. */
12712 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
12717 /* Extracts the personality function of DECL and returns the corresponding
12721 get_personality_function (tree decl
)
12723 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
12724 enum eh_personality_kind pk
;
12726 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
12727 if (pk
== eh_personality_none
)
12731 && pk
== eh_personality_any
)
12732 personality
= lang_hooks
.eh_personality ();
12734 if (pk
== eh_personality_lang
)
12735 gcc_assert (personality
!= NULL_TREE
);
12737 return XEXP (DECL_RTL (personality
), 0);
12740 /* Returns a tree for the size of EXP in bytes. */
12743 tree_expr_size (const_tree exp
)
12746 && DECL_SIZE_UNIT (exp
) != 0)
12747 return DECL_SIZE_UNIT (exp
);
12749 return size_in_bytes (TREE_TYPE (exp
));
12752 /* Return an rtx for the size in bytes of the value of EXP. */
12755 expr_size (tree exp
)
12759 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12760 size
= TREE_OPERAND (exp
, 1);
12763 size
= tree_expr_size (exp
);
12765 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12768 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12771 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12772 if the size can vary or is larger than an integer. */
12774 static HOST_WIDE_INT
12775 int_expr_size (tree exp
)
12779 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12780 size
= TREE_OPERAND (exp
, 1);
12783 size
= tree_expr_size (exp
);
12787 if (size
== 0 || !tree_fits_shwi_p (size
))
12790 return tree_to_shwi (size
);