1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2019 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
);
79 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
80 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
81 static rtx_insn
*compress_float_constant (rtx
, rtx
);
82 static rtx
get_subtarget (rtx
);
83 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
84 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
85 machine_mode
, tree
, alias_set_type
, bool, bool);
87 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
89 static int is_aligning_offset (const_tree
, const_tree
);
90 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
91 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
93 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
95 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
97 static rtx
const_vector_from_tree (tree
);
98 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
99 static tree
tree_expr_size (const_tree
);
100 static HOST_WIDE_INT
int_expr_size (tree
);
101 static void convert_mode_scalar (rtx
, rtx
, int);
104 /* This is run to set up which modes can be used
105 directly in memory and to initialize the block move optab. It is run
106 at the beginning of compilation and when the target is reinitialized. */
109 init_expr_target (void)
116 /* Try indexing by frame ptr and try by stack ptr.
117 It is known that on the Convex the stack ptr isn't a valid index.
118 With luck, one or the other is valid on any machine. */
119 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
120 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
122 /* A scratch register we can modify in-place below to avoid
123 useless RTL allocations. */
124 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
126 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
127 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
128 PATTERN (insn
) = pat
;
130 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
131 mode
= (machine_mode
) ((int) mode
+ 1))
135 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
136 PUT_MODE (mem
, mode
);
137 PUT_MODE (mem1
, mode
);
139 /* See if there is some register that can be used in this mode and
140 directly loaded or stored from memory. */
142 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
143 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
144 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
147 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
150 set_mode_and_regno (reg
, mode
, regno
);
153 SET_DEST (pat
) = reg
;
154 if (recog (pat
, insn
, &num_clobbers
) >= 0)
155 direct_load
[(int) mode
] = 1;
157 SET_SRC (pat
) = mem1
;
158 SET_DEST (pat
) = reg
;
159 if (recog (pat
, insn
, &num_clobbers
) >= 0)
160 direct_load
[(int) mode
] = 1;
163 SET_DEST (pat
) = mem
;
164 if (recog (pat
, insn
, &num_clobbers
) >= 0)
165 direct_store
[(int) mode
] = 1;
168 SET_DEST (pat
) = mem1
;
169 if (recog (pat
, insn
, &num_clobbers
) >= 0)
170 direct_store
[(int) mode
] = 1;
174 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
176 opt_scalar_float_mode mode_iter
;
177 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
179 scalar_float_mode mode
= mode_iter
.require ();
180 scalar_float_mode srcmode
;
181 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
185 ic
= can_extend_p (mode
, srcmode
, 0);
186 if (ic
== CODE_FOR_nothing
)
189 PUT_MODE (mem
, srcmode
);
191 if (insn_operand_matches (ic
, 1, mem
))
192 float_extend_from_mem
[mode
][srcmode
] = true;
197 /* This is run at the start of compiling a function. */
202 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
205 /* Copy data from FROM to TO, where the machine modes are not the same.
206 Both modes may be integer, or both may be floating, or both may be
208 UNSIGNEDP should be nonzero if FROM is an unsigned type.
209 This causes zero-extension instead of sign-extension. */
212 convert_move (rtx to
, rtx from
, int unsignedp
)
214 machine_mode to_mode
= GET_MODE (to
);
215 machine_mode from_mode
= GET_MODE (from
);
217 gcc_assert (to_mode
!= BLKmode
);
218 gcc_assert (from_mode
!= BLKmode
);
220 /* If the source and destination are already the same, then there's
225 /* If FROM is a SUBREG that indicates that we have already done at least
226 the required extension, strip it. We don't handle such SUBREGs as
229 scalar_int_mode to_int_mode
;
230 if (GET_CODE (from
) == SUBREG
231 && SUBREG_PROMOTED_VAR_P (from
)
232 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
233 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
234 >= GET_MODE_PRECISION (to_int_mode
))
235 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
237 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
238 from_mode
= to_int_mode
;
241 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
243 if (to_mode
== from_mode
244 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
246 emit_move_insn (to
, from
);
250 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
252 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
253 GET_MODE_BITSIZE (to_mode
)));
255 if (VECTOR_MODE_P (to_mode
))
256 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
258 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
260 emit_move_insn (to
, from
);
264 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
266 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
267 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
271 convert_mode_scalar (to
, from
, unsignedp
);
274 /* Like convert_move, but deals only with scalar modes. */
277 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
279 /* Both modes should be scalar types. */
280 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
281 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
282 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
283 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
287 gcc_assert (to_real
== from_real
);
289 /* rtx code for making an equivalent value. */
290 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
291 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
299 gcc_assert ((GET_MODE_PRECISION (from_mode
)
300 != GET_MODE_PRECISION (to_mode
))
301 || (DECIMAL_FLOAT_MODE_P (from_mode
)
302 != DECIMAL_FLOAT_MODE_P (to_mode
)));
304 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
305 /* Conversion between decimal float and binary float, same size. */
306 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
307 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
312 /* Try converting directly if the insn is supported. */
314 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
315 if (code
!= CODE_FOR_nothing
)
317 emit_unop_insn (code
, to
, from
,
318 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
322 /* Otherwise use a libcall. */
323 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
325 /* Is this conversion implemented yet? */
326 gcc_assert (libcall
);
329 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
331 insns
= get_insns ();
333 emit_libcall_block (insns
, to
, value
,
334 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
336 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
340 /* Handle pointer conversion. */ /* SPEE 900220. */
341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
345 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
352 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
355 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
361 /* Targets are expected to provide conversion insns between PxImode and
362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
363 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
365 scalar_int_mode full_mode
366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
368 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
369 != CODE_FOR_nothing
);
371 if (full_mode
!= from_mode
)
372 from
= convert_to_mode (full_mode
, from
, unsignedp
);
373 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
377 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
380 scalar_int_mode full_mode
381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
382 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
383 enum insn_code icode
;
385 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
386 gcc_assert (icode
!= CODE_FOR_nothing
);
388 if (to_mode
== full_mode
)
390 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
394 new_from
= gen_reg_rtx (full_mode
);
395 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
397 /* else proceed to integer conversions below. */
398 from_mode
= full_mode
;
402 /* Make sure both are fixed-point modes or both are not. */
403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
407 /* If we widen from_mode to to_mode and they are in the same class,
408 we won't saturate the result.
409 Otherwise, always saturate the result to play safe. */
410 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
411 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
412 expand_fixed_convert (to
, from
, 0, 0);
414 expand_fixed_convert (to
, from
, 0, 1);
418 /* Now both modes are integers. */
420 /* Handle expanding beyond a word. */
421 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
422 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
429 scalar_mode lowpart_mode
;
430 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
432 /* Try converting directly if the insn is supported. */
433 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
436 /* If FROM is a SUBREG, put it into a register. Do this
437 so that we always generate the same set of insns for
438 better cse'ing; if an intermediate assignment occurred,
439 we won't be doing the operation directly on the SUBREG. */
440 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
441 from
= force_reg (from_mode
, from
);
442 emit_unop_insn (code
, to
, from
, equiv_code
);
445 /* Next, try converting via full word. */
446 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
447 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
448 != CODE_FOR_nothing
))
450 rtx word_to
= gen_reg_rtx (word_mode
);
453 if (reg_overlap_mentioned_p (to
, from
))
454 from
= force_reg (from_mode
, from
);
457 convert_move (word_to
, from
, unsignedp
);
458 emit_unop_insn (code
, to
, word_to
, equiv_code
);
462 /* No special multiword conversion insn; do it by hand. */
465 /* Since we will turn this into a no conflict block, we must ensure
466 the source does not overlap the target so force it into an isolated
467 register when maybe so. Likewise for any MEM input, since the
468 conversion sequence might require several references to it and we
469 must ensure we're getting the same value every time. */
471 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
472 from
= force_reg (from_mode
, from
);
474 /* Get a copy of FROM widened to a word, if necessary. */
475 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
476 lowpart_mode
= word_mode
;
478 lowpart_mode
= from_mode
;
480 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
482 lowpart
= gen_lowpart (lowpart_mode
, to
);
483 emit_move_insn (lowpart
, lowfrom
);
485 /* Compute the value to put in each remaining word. */
487 fill_value
= const0_rtx
;
489 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
490 LT
, lowfrom
, const0_rtx
,
491 lowpart_mode
, 0, -1);
493 /* Fill the remaining words. */
494 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
496 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
497 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
499 gcc_assert (subword
);
501 if (fill_value
!= subword
)
502 emit_move_insn (subword
, fill_value
);
505 insns
= get_insns ();
512 /* Truncating multi-word to a word or less. */
513 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
514 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
517 && ! MEM_VOLATILE_P (from
)
518 && direct_load
[(int) to_mode
]
519 && ! mode_dependent_address_p (XEXP (from
, 0),
520 MEM_ADDR_SPACE (from
)))
522 || GET_CODE (from
) == SUBREG
))
523 from
= force_reg (from_mode
, from
);
524 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
528 /* Now follow all the conversions between integers
529 no more than a word long. */
531 /* For truncation, usually we can just refer to FROM in a narrower mode. */
532 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
536 && ! MEM_VOLATILE_P (from
)
537 && direct_load
[(int) to_mode
]
538 && ! mode_dependent_address_p (XEXP (from
, 0),
539 MEM_ADDR_SPACE (from
)))
541 || GET_CODE (from
) == SUBREG
))
542 from
= force_reg (from_mode
, from
);
543 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
544 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
545 from
= copy_to_reg (from
);
546 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
550 /* Handle extension. */
551 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
553 /* Convert directly if that works. */
554 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
557 emit_unop_insn (code
, to
, from
, equiv_code
);
562 scalar_mode intermediate
;
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter
;
568 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
570 scalar_mode intermediate
= intermediate_iter
.require ();
571 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
573 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
576 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
577 != CODE_FOR_nothing
))
579 convert_move (to
, convert_to_mode (intermediate
, from
,
580 unsignedp
), unsignedp
);
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount
= (GET_MODE_PRECISION (to_mode
)
588 - GET_MODE_PRECISION (from_mode
));
589 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
590 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
592 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
595 emit_move_insn (to
, tmp
);
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab
, to_mode
,
602 from_mode
) != CODE_FOR_nothing
)
604 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
618 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
619 emit_move_insn (to
, temp
);
623 /* Mode combination is not recognized. */
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
637 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
654 scalar_int_mode int_mode
;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x
) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x
)
661 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
663 >= GET_MODE_PRECISION (int_mode
))
664 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
665 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
667 if (GET_MODE (x
) != VOIDmode
)
668 oldmode
= GET_MODE (x
);
673 if (CONST_SCALAR_INT_P (x
)
674 && is_int_mode (mode
, &int_mode
))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
680 oldmode
= MAX_MODE_INT
;
681 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
682 GET_MODE_PRECISION (int_mode
),
683 unsignedp
? UNSIGNED
: SIGNED
);
684 return immed_wide_int_const (w
, int_mode
);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
690 scalar_int_mode int_oldmode
;
691 if (is_int_mode (mode
, &int_mode
)
692 && is_int_mode (oldmode
, &int_oldmode
)
693 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
694 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
695 || CONST_POLY_INT_P (x
)
697 && (!HARD_REGISTER_P (x
)
698 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
699 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
700 return gen_lowpart (int_mode
, x
);
702 /* Converting from integer constant into mode is always equivalent to an
704 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
706 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
707 GET_MODE_BITSIZE (oldmode
)));
708 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
711 temp
= gen_reg_rtx (mode
);
712 convert_move (temp
, x
, unsignedp
);
716 /* Return the largest alignment we can use for doing a move (or store)
717 of MAX_PIECES. ALIGN is the largest alignment we could use. */
720 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
722 scalar_int_mode tmode
723 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
725 if (align
>= GET_MODE_ALIGNMENT (tmode
))
726 align
= GET_MODE_ALIGNMENT (tmode
);
729 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
730 opt_scalar_int_mode mode_iter
;
731 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
733 tmode
= mode_iter
.require ();
734 if (GET_MODE_SIZE (tmode
) > max_pieces
735 || targetm
.slow_unaligned_access (tmode
, align
))
740 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
746 /* Return the widest integer mode that is narrower than SIZE bytes. */
748 static scalar_int_mode
749 widest_int_mode_for_size (unsigned int size
)
751 scalar_int_mode result
= NARROWEST_INT_MODE
;
753 gcc_checking_assert (size
> 1);
755 opt_scalar_int_mode tmode
;
756 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
757 if (GET_MODE_SIZE (tmode
.require ()) < size
)
758 result
= tmode
.require ();
763 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
764 and should be performed piecewise. */
767 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
768 enum by_pieces_operation op
)
770 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
771 optimize_insn_for_speed_p ());
774 /* Determine whether the LEN bytes can be moved by using several move
775 instructions. Return nonzero if a call to move_by_pieces should
779 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
781 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
784 /* Return number of insns required to perform operation OP by pieces
785 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
787 unsigned HOST_WIDE_INT
788 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
789 unsigned int max_size
, by_pieces_operation op
)
791 unsigned HOST_WIDE_INT n_insns
= 0;
793 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
795 while (max_size
> 1 && l
> 0)
797 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
798 enum insn_code icode
;
800 unsigned int modesize
= GET_MODE_SIZE (mode
);
802 icode
= optab_handler (mov_optab
, mode
);
803 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
805 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
813 case COMPARE_BY_PIECES
:
814 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
815 int batch_ops
= 4 * batch
- 1;
816 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
817 n_insns
+= full
* batch_ops
;
818 if (n_pieces
% batch
!= 0)
831 /* Used when performing piecewise block operations, holds information
832 about one of the memory objects involved. The member functions
833 can be used to generate code for loading from the object and
834 updating the address when iterating. */
838 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
841 /* The address of the object. Can differ from that seen in the
842 MEM rtx if we copied the address to a register. */
844 /* Nonzero if the address on the object has an autoincrement already,
845 signifies whether that was an increment or decrement. */
846 signed char m_addr_inc
;
847 /* Nonzero if we intend to use autoinc without the address already
848 having autoinc form. We will insert add insns around each memory
849 reference, expecting later passes to form autoinc addressing modes.
850 The only supported options are predecrement and postincrement. */
851 signed char m_explicit_inc
;
852 /* True if we have either of the two possible cases of using
855 /* True if this is an address to be used for load operations rather
859 /* Optionally, a function to obtain constants for any given offset into
860 the objects, and data associated with it. */
861 by_pieces_constfn m_constfn
;
864 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
865 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
866 void increment_address (HOST_WIDE_INT
);
867 void maybe_predec (HOST_WIDE_INT
);
868 void maybe_postinc (HOST_WIDE_INT
);
869 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
876 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
877 true if the operation to be performed on this object is a load
878 rather than a store. For stores, OBJ can be NULL, in which case we
879 assume the operation is a stack push. For loads, the optional
880 CONSTFN and its associated CFNDATA can be used in place of the
883 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
885 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
891 rtx addr
= XEXP (obj
, 0);
892 rtx_code code
= GET_CODE (addr
);
894 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
895 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
898 m_addr_inc
= dec
? -1 : 1;
900 /* While we have always looked for these codes here, the code
901 implementing the memory operation has never handled them.
902 Support could be added later if necessary or beneficial. */
903 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
911 if (STACK_GROWS_DOWNWARD
)
917 gcc_assert (constfn
!= NULL
);
921 gcc_assert (is_load
);
924 /* Decide whether to use autoinc for an address involved in a memory op.
925 MODE is the mode of the accesses, REVERSE is true if we've decided to
926 perform the operation starting from the end, and LEN is the length of
927 the operation. Don't override an earlier decision to set m_auto. */
930 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
933 if (m_auto
|| m_obj
== NULL_RTX
)
936 bool use_predec
= (m_is_load
937 ? USE_LOAD_PRE_DECREMENT (mode
)
938 : USE_STORE_PRE_DECREMENT (mode
));
939 bool use_postinc
= (m_is_load
940 ? USE_LOAD_POST_INCREMENT (mode
)
941 : USE_STORE_POST_INCREMENT (mode
));
942 machine_mode addr_mode
= get_address_mode (m_obj
);
944 if (use_predec
&& reverse
)
946 m_addr
= copy_to_mode_reg (addr_mode
,
947 plus_constant (addr_mode
,
952 else if (use_postinc
&& !reverse
)
954 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
958 else if (CONSTANT_P (m_addr
))
959 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
962 /* Adjust the address to refer to the data at OFFSET in MODE. If we
963 are using autoincrement for this address, we don't add the offset,
964 but we still modify the MEM's properties. */
967 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
970 return m_constfn (m_cfndata
, offset
, mode
);
971 if (m_obj
== NULL_RTX
)
974 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
976 return adjust_address (m_obj
, mode
, offset
);
979 /* Emit an add instruction to increment the address by SIZE. */
982 pieces_addr::increment_address (HOST_WIDE_INT size
)
984 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
985 emit_insn (gen_add2_insn (m_addr
, amount
));
988 /* If we are supposed to decrement the address after each access, emit code
989 to do so now. Increment by SIZE (which has should have the correct sign
993 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
995 if (m_explicit_inc
>= 0)
997 gcc_assert (HAVE_PRE_DECREMENT
);
998 increment_address (size
);
1001 /* If we are supposed to decrement the address after each access, emit code
1002 to do so now. Increment by SIZE. */
1005 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1007 if (m_explicit_inc
<= 0)
1009 gcc_assert (HAVE_POST_INCREMENT
);
1010 increment_address (size
);
1013 /* This structure is used by do_op_by_pieces to describe the operation
1016 class op_by_pieces_d
1019 pieces_addr m_to
, m_from
;
1020 unsigned HOST_WIDE_INT m_len
;
1021 HOST_WIDE_INT m_offset
;
1022 unsigned int m_align
;
1023 unsigned int m_max_size
;
1026 /* Virtual functions, overriden by derived classes for the specific
1028 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1029 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1030 virtual void finish_mode (machine_mode
)
1035 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1036 unsigned HOST_WIDE_INT
, unsigned int);
1040 /* The constructor for an op_by_pieces_d structure. We require two
1041 objects named TO and FROM, which are identified as loads or stores
1042 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1043 and its associated FROM_CFN_DATA can be used to replace loads with
1044 constant values. LEN describes the length of the operation. */
1046 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1047 rtx from
, bool from_load
,
1048 by_pieces_constfn from_cfn
,
1049 void *from_cfn_data
,
1050 unsigned HOST_WIDE_INT len
,
1052 : m_to (to
, to_load
, NULL
, NULL
),
1053 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1054 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1056 int toi
= m_to
.get_addr_inc ();
1057 int fromi
= m_from
.get_addr_inc ();
1058 if (toi
>= 0 && fromi
>= 0)
1060 else if (toi
<= 0 && fromi
<= 0)
1065 m_offset
= m_reverse
? len
: 0;
1066 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1067 from
? MEM_ALIGN (from
) : align
);
1069 /* If copying requires more than two move insns,
1070 copy addresses to registers (to make displacements shorter)
1071 and use post-increment if available. */
1072 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1074 /* Find the mode of the largest comparison. */
1075 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1077 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1078 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1081 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1085 /* This function contains the main loop used for expanding a block
1086 operation. First move what we can in the largest integer mode,
1087 then go to successively smaller modes. For every access, call
1088 GENFUN with the two operands and the EXTRA_DATA. */
1091 op_by_pieces_d::run ()
1093 while (m_max_size
> 1 && m_len
> 0)
1095 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1097 if (prepare_mode (mode
, m_align
))
1099 unsigned int size
= GET_MODE_SIZE (mode
);
1100 rtx to1
= NULL_RTX
, from1
;
1102 while (m_len
>= size
)
1107 to1
= m_to
.adjust (mode
, m_offset
);
1108 from1
= m_from
.adjust (mode
, m_offset
);
1110 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1111 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1113 generate (to1
, from1
, mode
);
1115 m_to
.maybe_postinc (size
);
1116 m_from
.maybe_postinc (size
);
1127 m_max_size
= GET_MODE_SIZE (mode
);
1130 /* The code above should have handled everything. */
1131 gcc_assert (!m_len
);
1134 /* Derived class from op_by_pieces_d, providing support for block move
1137 class move_by_pieces_d
: public op_by_pieces_d
1139 insn_gen_fn m_gen_fun
;
1140 void generate (rtx
, rtx
, machine_mode
);
1141 bool prepare_mode (machine_mode
, unsigned int);
1144 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1146 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1149 rtx
finish_retmode (memop_ret
);
1152 /* Return true if MODE can be used for a set of copies, given an
1153 alignment ALIGN. Prepare whatever data is necessary for later
1154 calls to generate. */
1157 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1159 insn_code icode
= optab_handler (mov_optab
, mode
);
1160 m_gen_fun
= GEN_FCN (icode
);
1161 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1164 /* A callback used when iterating for a compare_by_pieces_operation.
1165 OP0 and OP1 are the values that have been loaded and should be
1166 compared in MODE. If OP0 is NULL, this means we should generate a
1167 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1168 gen function that should be used to generate the mode. */
1171 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1172 machine_mode mode ATTRIBUTE_UNUSED
)
1174 #ifdef PUSH_ROUNDING
1175 if (op0
== NULL_RTX
)
1177 emit_single_push_insn (mode
, op1
, NULL
);
1181 emit_insn (m_gen_fun (op0
, op1
));
1184 /* Perform the final adjustment at the end of a string to obtain the
1185 correct return value for the block operation.
1186 Return value is based on RETMODE argument. */
1189 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1191 gcc_assert (!m_reverse
);
1192 if (retmode
== RETURN_END_MINUS_ONE
)
1194 m_to
.maybe_postinc (-1);
1197 return m_to
.adjust (QImode
, m_offset
);
1200 /* Generate several move instructions to copy LEN bytes from block FROM to
1201 block TO. (These are MEM rtx's with BLKmode).
1203 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1204 used to push FROM to the stack.
1206 ALIGN is maximum stack alignment we can assume.
1208 Return value is based on RETMODE argument. */
1211 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1212 unsigned int align
, memop_ret retmode
)
1214 #ifndef PUSH_ROUNDING
1219 move_by_pieces_d
data (to
, from
, len
, align
);
1223 if (retmode
!= RETURN_BEGIN
)
1224 return data
.finish_retmode (retmode
);
1229 /* Derived class from op_by_pieces_d, providing support for block move
1232 class store_by_pieces_d
: public op_by_pieces_d
1234 insn_gen_fn m_gen_fun
;
1235 void generate (rtx
, rtx
, machine_mode
);
1236 bool prepare_mode (machine_mode
, unsigned int);
1239 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1240 unsigned HOST_WIDE_INT len
, unsigned int align
)
1241 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1244 rtx
finish_retmode (memop_ret
);
1247 /* Return true if MODE can be used for a set of stores, given an
1248 alignment ALIGN. Prepare whatever data is necessary for later
1249 calls to generate. */
1252 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1254 insn_code icode
= optab_handler (mov_optab
, mode
);
1255 m_gen_fun
= GEN_FCN (icode
);
1256 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1259 /* A callback used when iterating for a store_by_pieces_operation.
1260 OP0 and OP1 are the values that have been loaded and should be
1261 compared in MODE. If OP0 is NULL, this means we should generate a
1262 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1263 gen function that should be used to generate the mode. */
1266 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1268 emit_insn (m_gen_fun (op0
, op1
));
1271 /* Perform the final adjustment at the end of a string to obtain the
1272 correct return value for the block operation.
1273 Return value is based on RETMODE argument. */
1276 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1278 gcc_assert (!m_reverse
);
1279 if (retmode
== RETURN_END_MINUS_ONE
)
1281 m_to
.maybe_postinc (-1);
1284 return m_to
.adjust (QImode
, m_offset
);
1287 /* Determine whether the LEN bytes generated by CONSTFUN can be
1288 stored to memory using several move instructions. CONSTFUNDATA is
1289 a pointer which will be passed as argument in every CONSTFUN call.
1290 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1291 a memset operation and false if it's a copy of a constant string.
1292 Return nonzero if a call to store_by_pieces should succeed. */
1295 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1296 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1297 void *constfundata
, unsigned int align
, bool memsetp
)
1299 unsigned HOST_WIDE_INT l
;
1300 unsigned int max_size
;
1301 HOST_WIDE_INT offset
= 0;
1302 enum insn_code icode
;
1304 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1305 rtx cst ATTRIBUTE_UNUSED
;
1310 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1314 optimize_insn_for_speed_p ()))
1317 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1319 /* We would first store what we can in the largest integer mode, then go to
1320 successively smaller modes. */
1323 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1327 max_size
= STORE_MAX_PIECES
+ 1;
1328 while (max_size
> 1 && l
> 0)
1330 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1332 icode
= optab_handler (mov_optab
, mode
);
1333 if (icode
!= CODE_FOR_nothing
1334 && align
>= GET_MODE_ALIGNMENT (mode
))
1336 unsigned int size
= GET_MODE_SIZE (mode
);
1343 cst
= (*constfun
) (constfundata
, offset
, mode
);
1344 if (!targetm
.legitimate_constant_p (mode
, cst
))
1354 max_size
= GET_MODE_SIZE (mode
);
1357 /* The code above should have handled everything. */
1364 /* Generate several move instructions to store LEN bytes generated by
1365 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1366 pointer which will be passed as argument in every CONSTFUN call.
1367 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1368 a memset operation and false if it's a copy of a constant string.
1369 Return value is based on RETMODE argument. */
1372 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1373 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1374 void *constfundata
, unsigned int align
, bool memsetp
,
1379 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1383 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1385 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1386 optimize_insn_for_speed_p ()));
1388 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1391 if (retmode
!= RETURN_BEGIN
)
1392 return data
.finish_retmode (retmode
);
1397 /* Callback routine for clear_by_pieces.
1398 Return const0_rtx unconditionally. */
1401 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1406 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1407 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1410 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1415 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1419 /* Context used by compare_by_pieces_genfn. It stores the fail label
1420 to jump to in case of miscomparison, and for branch ratios greater than 1,
1421 it stores an accumulator and the current and maximum counts before
1422 emitting another branch. */
1424 class compare_by_pieces_d
: public op_by_pieces_d
1426 rtx_code_label
*m_fail_label
;
1428 int m_count
, m_batch
;
1430 void generate (rtx
, rtx
, machine_mode
);
1431 bool prepare_mode (machine_mode
, unsigned int);
1432 void finish_mode (machine_mode
);
1434 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1435 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1436 rtx_code_label
*fail_label
)
1437 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1439 m_fail_label
= fail_label
;
1443 /* A callback used when iterating for a compare_by_pieces_operation.
1444 OP0 and OP1 are the values that have been loaded and should be
1445 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1446 context structure. */
1449 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1453 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1454 true, OPTAB_LIB_WIDEN
);
1456 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1457 true, OPTAB_LIB_WIDEN
);
1458 m_accumulator
= temp
;
1460 if (++m_count
< m_batch
)
1464 op0
= m_accumulator
;
1466 m_accumulator
= NULL_RTX
;
1468 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1469 m_fail_label
, profile_probability::uninitialized ());
1472 /* Return true if MODE can be used for a set of moves and comparisons,
1473 given an alignment ALIGN. Prepare whatever data is necessary for
1474 later calls to generate. */
1477 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1479 insn_code icode
= optab_handler (mov_optab
, mode
);
1480 if (icode
== CODE_FOR_nothing
1481 || align
< GET_MODE_ALIGNMENT (mode
)
1482 || !can_compare_p (EQ
, mode
, ccp_jump
))
1484 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1487 m_accumulator
= NULL_RTX
;
1492 /* Called after expanding a series of comparisons in MODE. If we have
1493 accumulated results for which we haven't emitted a branch yet, do
1497 compare_by_pieces_d::finish_mode (machine_mode mode
)
1499 if (m_accumulator
!= NULL_RTX
)
1500 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1501 NULL_RTX
, NULL
, m_fail_label
,
1502 profile_probability::uninitialized ());
1505 /* Generate several move instructions to compare LEN bytes from blocks
1506 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1508 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1509 used to push FROM to the stack.
1511 ALIGN is maximum stack alignment we can assume.
1513 Optionally, the caller can pass a constfn and associated data in A1_CFN
1514 and A1_CFN_DATA. describing that the second operand being compared is a
1515 known constant and how to obtain its data. */
1518 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1519 rtx target
, unsigned int align
,
1520 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1522 rtx_code_label
*fail_label
= gen_label_rtx ();
1523 rtx_code_label
*end_label
= gen_label_rtx ();
1525 if (target
== NULL_RTX
1526 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1527 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1529 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1534 emit_move_insn (target
, const0_rtx
);
1535 emit_jump (end_label
);
1537 emit_label (fail_label
);
1538 emit_move_insn (target
, const1_rtx
);
1539 emit_label (end_label
);
1544 /* Emit code to move a block Y to a block X. This may be done with
1545 string-move instructions, with multiple scalar move instructions,
1546 or with a library call.
1548 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1549 SIZE is an rtx that says how long they are.
1550 ALIGN is the maximum alignment we can assume they have.
1551 METHOD describes what kind of copy this is, and what mechanisms may be used.
1552 MIN_SIZE is the minimal size of block to move
1553 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1554 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1556 Return the address of the new block, if memcpy is called and returns it,
1560 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1561 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1562 unsigned HOST_WIDE_INT min_size
,
1563 unsigned HOST_WIDE_INT max_size
,
1564 unsigned HOST_WIDE_INT probable_max_size
)
1571 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1576 case BLOCK_OP_NORMAL
:
1577 case BLOCK_OP_TAILCALL
:
1581 case BLOCK_OP_CALL_PARM
:
1582 may_use_call
= block_move_libcall_safe_for_call_parm ();
1584 /* Make inhibit_defer_pop nonzero around the library call
1585 to force it to pop the arguments right away. */
1589 case BLOCK_OP_NO_LIBCALL
:
1593 case BLOCK_OP_NO_LIBCALL_RET
:
1601 gcc_assert (MEM_P (x
) && MEM_P (y
));
1602 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1603 gcc_assert (align
>= BITS_PER_UNIT
);
1605 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1606 block copy is more efficient for other large modes, e.g. DCmode. */
1607 x
= adjust_address (x
, BLKmode
, 0);
1608 y
= adjust_address (y
, BLKmode
, 0);
1610 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1611 can be incorrect is coming from __builtin_memcpy. */
1612 poly_int64 const_size
;
1613 if (poly_int_rtx_p (size
, &const_size
))
1615 x
= shallow_copy_rtx (x
);
1616 y
= shallow_copy_rtx (y
);
1617 set_mem_size (x
, const_size
);
1618 set_mem_size (y
, const_size
);
1621 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1622 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
1623 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1624 expected_align
, expected_size
,
1625 min_size
, max_size
, probable_max_size
))
1627 else if (may_use_call
1628 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1629 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1631 if (may_use_call
< 0)
1634 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1635 method
== BLOCK_OP_TAILCALL
);
1639 emit_block_move_via_loop (x
, y
, size
, align
);
1641 if (method
== BLOCK_OP_CALL_PARM
)
1648 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1650 unsigned HOST_WIDE_INT max
, min
= 0;
1651 if (GET_CODE (size
) == CONST_INT
)
1652 min
= max
= UINTVAL (size
);
1654 max
= GET_MODE_MASK (GET_MODE (size
));
1655 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1659 /* A subroutine of emit_block_move. Returns true if calling the
1660 block move libcall will not clobber any parameters which may have
1661 already been placed on the stack. */
1664 block_move_libcall_safe_for_call_parm (void)
1666 #if defined (REG_PARM_STACK_SPACE)
1670 /* If arguments are pushed on the stack, then they're safe. */
1674 /* If registers go on the stack anyway, any argument is sure to clobber
1675 an outgoing argument. */
1676 #if defined (REG_PARM_STACK_SPACE)
1677 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1678 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1679 depend on its argument. */
1681 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1682 && REG_PARM_STACK_SPACE (fn
) != 0)
1686 /* If any argument goes in memory, then it might clobber an outgoing
1689 CUMULATIVE_ARGS args_so_far_v
;
1690 cumulative_args_t args_so_far
;
1693 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1694 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1695 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1697 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1698 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1700 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1701 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1703 if (!tmp
|| !REG_P (tmp
))
1705 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1707 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1714 /* A subroutine of emit_block_move. Expand a movmem pattern;
1715 return true if successful. */
1718 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1719 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1720 unsigned HOST_WIDE_INT min_size
,
1721 unsigned HOST_WIDE_INT max_size
,
1722 unsigned HOST_WIDE_INT probable_max_size
)
1724 int save_volatile_ok
= volatile_ok
;
1726 if (expected_align
< align
)
1727 expected_align
= align
;
1728 if (expected_size
!= -1)
1730 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1731 expected_size
= probable_max_size
;
1732 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1733 expected_size
= min_size
;
1736 /* Since this is a move insn, we don't care about volatility. */
1739 /* Try the most limited insn first, because there's no point
1740 including more than one in the machine description unless
1741 the more limited one has some advantage. */
1743 opt_scalar_int_mode mode_iter
;
1744 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1746 scalar_int_mode mode
= mode_iter
.require ();
1747 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1749 if (code
!= CODE_FOR_nothing
1750 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1751 here because if SIZE is less than the mode mask, as it is
1752 returned by the macro, it will definitely be less than the
1753 actual mode mask. Since SIZE is within the Pmode address
1754 space, we limit MODE to Pmode. */
1755 && ((CONST_INT_P (size
)
1756 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1757 <= (GET_MODE_MASK (mode
) >> 1)))
1758 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1759 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1761 struct expand_operand ops
[9];
1764 /* ??? When called via emit_block_move_for_call, it'd be
1765 nice if there were some way to inform the backend, so
1766 that it doesn't fail the expansion because it thinks
1767 emitting the libcall would be more efficient. */
1768 nops
= insn_data
[(int) code
].n_generator_args
;
1769 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1771 create_fixed_operand (&ops
[0], x
);
1772 create_fixed_operand (&ops
[1], y
);
1773 /* The check above guarantees that this size conversion is valid. */
1774 create_convert_operand_to (&ops
[2], size
, mode
, true);
1775 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1778 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1779 create_integer_operand (&ops
[5], expected_size
);
1783 create_integer_operand (&ops
[6], min_size
);
1784 /* If we cannot represent the maximal size,
1785 make parameter NULL. */
1786 if ((HOST_WIDE_INT
) max_size
!= -1)
1787 create_integer_operand (&ops
[7], max_size
);
1789 create_fixed_operand (&ops
[7], NULL
);
1793 /* If we cannot represent the maximal size,
1794 make parameter NULL. */
1795 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1796 create_integer_operand (&ops
[8], probable_max_size
);
1798 create_fixed_operand (&ops
[8], NULL
);
1800 if (maybe_expand_insn (code
, nops
, ops
))
1802 volatile_ok
= save_volatile_ok
;
1808 volatile_ok
= save_volatile_ok
;
1812 /* A subroutine of emit_block_move. Copy the data via an explicit
1813 loop. This is used only when libcalls are forbidden. */
1814 /* ??? It'd be nice to copy in hunks larger than QImode. */
1817 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1818 unsigned int align ATTRIBUTE_UNUSED
)
1820 rtx_code_label
*cmp_label
, *top_label
;
1821 rtx iter
, x_addr
, y_addr
, tmp
;
1822 machine_mode x_addr_mode
= get_address_mode (x
);
1823 machine_mode y_addr_mode
= get_address_mode (y
);
1824 machine_mode iter_mode
;
1826 iter_mode
= GET_MODE (size
);
1827 if (iter_mode
== VOIDmode
)
1828 iter_mode
= word_mode
;
1830 top_label
= gen_label_rtx ();
1831 cmp_label
= gen_label_rtx ();
1832 iter
= gen_reg_rtx (iter_mode
);
1834 emit_move_insn (iter
, const0_rtx
);
1836 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1837 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1838 do_pending_stack_adjust ();
1840 emit_jump (cmp_label
);
1841 emit_label (top_label
);
1843 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1844 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1846 if (x_addr_mode
!= y_addr_mode
)
1847 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1848 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1850 x
= change_address (x
, QImode
, x_addr
);
1851 y
= change_address (y
, QImode
, y_addr
);
1853 emit_move_insn (x
, y
);
1855 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1856 true, OPTAB_LIB_WIDEN
);
1858 emit_move_insn (iter
, tmp
);
1860 emit_label (cmp_label
);
1862 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1864 profile_probability::guessed_always ()
1865 .apply_scale (9, 10));
1868 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1869 TAILCALL is true if this is a tail call. */
1872 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1873 rtx size
, bool tailcall
)
1875 rtx dst_addr
, src_addr
;
1876 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1877 machine_mode size_mode
;
1879 /* Since dst and src are passed to a libcall, mark the corresponding
1880 tree EXPR as addressable. */
1881 tree dst_expr
= MEM_EXPR (dst
);
1882 tree src_expr
= MEM_EXPR (src
);
1884 mark_addressable (dst_expr
);
1886 mark_addressable (src_expr
);
1888 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1889 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1890 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1892 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1893 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1894 src_tree
= make_tree (ptr_type_node
, src_addr
);
1896 size_mode
= TYPE_MODE (sizetype
);
1897 size
= convert_to_mode (size_mode
, size
, 1);
1898 size
= copy_to_mode_reg (size_mode
, size
);
1899 size_tree
= make_tree (sizetype
, size
);
1901 /* It is incorrect to use the libcall calling conventions for calls to
1902 memcpy/memmove/memcmp because they can be provided by the user. */
1903 tree fn
= builtin_decl_implicit (fncode
);
1904 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1905 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1907 return expand_call (call_expr
, NULL_RTX
, false);
1910 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1911 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1912 otherwise return null. */
1915 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1916 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1917 HOST_WIDE_INT align
)
1919 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1921 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1924 struct expand_operand ops
[5];
1925 create_output_operand (&ops
[0], target
, insn_mode
);
1926 create_fixed_operand (&ops
[1], arg1_rtx
);
1927 create_fixed_operand (&ops
[2], arg2_rtx
);
1928 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1929 TYPE_UNSIGNED (arg3_type
));
1930 create_integer_operand (&ops
[4], align
);
1931 if (maybe_expand_insn (icode
, 5, ops
))
1932 return ops
[0].value
;
1936 /* Expand a block compare between X and Y with length LEN using the
1937 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1938 of the expression that was used to calculate the length. ALIGN
1939 gives the known minimum common alignment. */
1942 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1945 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1946 implementing memcmp because it will stop if it encounters two
1948 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1950 if (icode
== CODE_FOR_nothing
)
1953 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1956 /* Emit code to compare a block Y to a block X. This may be done with
1957 string-compare instructions, with multiple scalar instructions,
1958 or with a library call.
1960 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1961 they are. LEN_TYPE is the type of the expression that was used to
1964 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1965 value of a normal memcmp call, instead we can just compare for equality.
1966 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1969 Optionally, the caller can pass a constfn and associated data in Y_CFN
1970 and Y_CFN_DATA. describing that the second operand being compared is a
1971 known constant and how to obtain its data.
1972 Return the result of the comparison, or NULL_RTX if we failed to
1973 perform the operation. */
1976 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1977 bool equality_only
, by_pieces_constfn y_cfn
,
1982 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1985 gcc_assert (MEM_P (x
) && MEM_P (y
));
1986 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1987 gcc_assert (align
>= BITS_PER_UNIT
);
1989 x
= adjust_address (x
, BLKmode
, 0);
1990 y
= adjust_address (y
, BLKmode
, 0);
1993 && CONST_INT_P (len
)
1994 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1995 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
1998 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2003 /* Copy all or part of a value X into registers starting at REGNO.
2004 The number of registers to be filled is NREGS. */
2007 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2012 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2013 x
= validize_mem (force_const_mem (mode
, x
));
2015 /* See if the machine can do this with a load multiple insn. */
2016 if (targetm
.have_load_multiple ())
2018 rtx_insn
*last
= get_last_insn ();
2019 rtx first
= gen_rtx_REG (word_mode
, regno
);
2020 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2027 delete_insns_since (last
);
2030 for (int i
= 0; i
< nregs
; i
++)
2031 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2032 operand_subword_force (x
, i
, mode
));
2035 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2036 The number of registers to be filled is NREGS. */
2039 move_block_from_reg (int regno
, rtx x
, int nregs
)
2044 /* See if the machine can do this with a store multiple insn. */
2045 if (targetm
.have_store_multiple ())
2047 rtx_insn
*last
= get_last_insn ();
2048 rtx first
= gen_rtx_REG (word_mode
, regno
);
2049 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2056 delete_insns_since (last
);
2059 for (int i
= 0; i
< nregs
; i
++)
2061 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2065 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2069 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2070 ORIG, where ORIG is a non-consecutive group of registers represented by
2071 a PARALLEL. The clone is identical to the original except in that the
2072 original set of registers is replaced by a new set of pseudo registers.
2073 The new set has the same modes as the original set. */
2076 gen_group_rtx (rtx orig
)
2081 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2083 length
= XVECLEN (orig
, 0);
2084 tmps
= XALLOCAVEC (rtx
, length
);
2086 /* Skip a NULL entry in first slot. */
2087 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2092 for (; i
< length
; i
++)
2094 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2095 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2097 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2100 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2103 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2104 except that values are placed in TMPS[i], and must later be moved
2105 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2108 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2113 machine_mode m
= GET_MODE (orig_src
);
2115 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2118 && !SCALAR_INT_MODE_P (m
)
2119 && !MEM_P (orig_src
)
2120 && GET_CODE (orig_src
) != CONCAT
)
2122 scalar_int_mode imode
;
2123 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2125 src
= gen_reg_rtx (imode
);
2126 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2130 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2131 emit_move_insn (src
, orig_src
);
2133 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2137 /* Check for a NULL entry, used to indicate that the parameter goes
2138 both on the stack and in registers. */
2139 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2144 /* Process the pieces. */
2145 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2147 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2148 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2149 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2150 poly_int64 shift
= 0;
2152 /* Handle trailing fragments that run over the size of the struct.
2153 It's the target's responsibility to make sure that the fragment
2154 cannot be strictly smaller in some cases and strictly larger
2156 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2157 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2159 /* Arrange to shift the fragment to where it belongs.
2160 extract_bit_field loads to the lsb of the reg. */
2162 #ifdef BLOCK_REG_PADDING
2163 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2164 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2169 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2170 bytelen
= ssize
- bytepos
;
2171 gcc_assert (maybe_gt (bytelen
, 0));
2174 /* If we won't be loading directly from memory, protect the real source
2175 from strange tricks we might play; but make sure that the source can
2176 be loaded directly into the destination. */
2178 if (!MEM_P (orig_src
)
2179 && (!CONSTANT_P (orig_src
)
2180 || (GET_MODE (orig_src
) != mode
2181 && GET_MODE (orig_src
) != VOIDmode
)))
2183 if (GET_MODE (orig_src
) == VOIDmode
)
2184 src
= gen_reg_rtx (mode
);
2186 src
= gen_reg_rtx (GET_MODE (orig_src
));
2188 emit_move_insn (src
, orig_src
);
2191 /* Optimize the access just a bit. */
2193 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2194 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2195 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2196 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2198 tmps
[i
] = gen_reg_rtx (mode
);
2199 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2201 else if (COMPLEX_MODE_P (mode
)
2202 && GET_MODE (src
) == mode
2203 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2204 /* Let emit_move_complex do the bulk of the work. */
2206 else if (GET_CODE (src
) == CONCAT
)
2208 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2209 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2213 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2214 && known_le (subpos
+ bytelen
, slen0
))
2216 /* The following assumes that the concatenated objects all
2217 have the same size. In this case, a simple calculation
2218 can be used to determine the object and the bit field
2220 tmps
[i
] = XEXP (src
, elt
);
2221 if (maybe_ne (subpos
, 0)
2222 || maybe_ne (subpos
+ bytelen
, slen0
)
2223 || (!CONSTANT_P (tmps
[i
])
2224 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2225 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2226 subpos
* BITS_PER_UNIT
,
2227 1, NULL_RTX
, mode
, mode
, false,
2234 gcc_assert (known_eq (bytepos
, 0));
2235 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2236 emit_move_insn (mem
, src
);
2237 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2238 0, 1, NULL_RTX
, mode
, mode
, false,
2242 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2243 SIMD register, which is currently broken. While we get GCC
2244 to emit proper RTL for these cases, let's dump to memory. */
2245 else if (VECTOR_MODE_P (GET_MODE (dst
))
2248 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2251 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2252 emit_move_insn (mem
, src
);
2253 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2255 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2256 && XVECLEN (dst
, 0) > 1)
2257 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2258 else if (CONSTANT_P (src
))
2260 if (known_eq (bytelen
, ssize
))
2266 /* TODO: const_wide_int can have sizes other than this... */
2267 gcc_assert (known_eq (2 * bytelen
, ssize
));
2268 split_double (src
, &first
, &second
);
2275 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2278 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2279 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2280 mode
, mode
, false, NULL
);
2282 if (maybe_ne (shift
, 0))
2283 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2288 /* Emit code to move a block SRC of type TYPE to a block DST,
2289 where DST is non-consecutive registers represented by a PARALLEL.
2290 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2294 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2299 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2300 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2302 /* Copy the extracted pieces into the proper (probable) hard regs. */
2303 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2305 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2308 emit_move_insn (d
, tmps
[i
]);
2312 /* Similar, but load SRC into new pseudos in a format that looks like
2313 PARALLEL. This can later be fed to emit_group_move to get things
2314 in the right place. */
2317 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2322 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2323 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2325 /* Convert the vector to look just like the original PARALLEL, except
2326 with the computed values. */
2327 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2329 rtx e
= XVECEXP (parallel
, 0, i
);
2330 rtx d
= XEXP (e
, 0);
2334 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2335 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2337 RTVEC_ELT (vec
, i
) = e
;
2340 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2343 /* Emit code to move a block SRC to block DST, where SRC and DST are
2344 non-consecutive groups of registers, each represented by a PARALLEL. */
2347 emit_group_move (rtx dst
, rtx src
)
2351 gcc_assert (GET_CODE (src
) == PARALLEL
2352 && GET_CODE (dst
) == PARALLEL
2353 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2355 /* Skip first entry if NULL. */
2356 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2357 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2358 XEXP (XVECEXP (src
, 0, i
), 0));
2361 /* Move a group of registers represented by a PARALLEL into pseudos. */
2364 emit_group_move_into_temps (rtx src
)
2366 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2369 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2371 rtx e
= XVECEXP (src
, 0, i
);
2372 rtx d
= XEXP (e
, 0);
2375 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2376 RTVEC_ELT (vec
, i
) = e
;
2379 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2382 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2383 where SRC is non-consecutive registers represented by a PARALLEL.
2384 SSIZE represents the total size of block ORIG_DST, or -1 if not
2388 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2392 int start
, finish
, i
;
2393 machine_mode m
= GET_MODE (orig_dst
);
2395 gcc_assert (GET_CODE (src
) == PARALLEL
);
2397 if (!SCALAR_INT_MODE_P (m
)
2398 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2400 scalar_int_mode imode
;
2401 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2403 dst
= gen_reg_rtx (imode
);
2404 emit_group_store (dst
, src
, type
, ssize
);
2405 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2409 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2410 emit_group_store (dst
, src
, type
, ssize
);
2412 emit_move_insn (orig_dst
, dst
);
2416 /* Check for a NULL entry, used to indicate that the parameter goes
2417 both on the stack and in registers. */
2418 if (XEXP (XVECEXP (src
, 0, 0), 0))
2422 finish
= XVECLEN (src
, 0);
2424 tmps
= XALLOCAVEC (rtx
, finish
);
2426 /* Copy the (probable) hard regs into pseudos. */
2427 for (i
= start
; i
< finish
; i
++)
2429 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2430 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2432 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2433 emit_move_insn (tmps
[i
], reg
);
2439 /* If we won't be storing directly into memory, protect the real destination
2440 from strange tricks we might play. */
2442 if (GET_CODE (dst
) == PARALLEL
)
2446 /* We can get a PARALLEL dst if there is a conditional expression in
2447 a return statement. In that case, the dst and src are the same,
2448 so no action is necessary. */
2449 if (rtx_equal_p (dst
, src
))
2452 /* It is unclear if we can ever reach here, but we may as well handle
2453 it. Allocate a temporary, and split this into a store/load to/from
2455 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2456 emit_group_store (temp
, src
, type
, ssize
);
2457 emit_group_load (dst
, temp
, type
, ssize
);
2460 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2462 machine_mode outer
= GET_MODE (dst
);
2468 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2469 dst
= gen_reg_rtx (outer
);
2471 /* Make life a bit easier for combine. */
2472 /* If the first element of the vector is the low part
2473 of the destination mode, use a paradoxical subreg to
2474 initialize the destination. */
2477 inner
= GET_MODE (tmps
[start
]);
2478 bytepos
= subreg_lowpart_offset (inner
, outer
);
2479 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2482 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2486 emit_move_insn (dst
, temp
);
2493 /* If the first element wasn't the low part, try the last. */
2495 && start
< finish
- 1)
2497 inner
= GET_MODE (tmps
[finish
- 1]);
2498 bytepos
= subreg_lowpart_offset (inner
, outer
);
2499 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2503 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2507 emit_move_insn (dst
, temp
);
2514 /* Otherwise, simply initialize the result to zero. */
2516 emit_move_insn (dst
, CONST0_RTX (outer
));
2519 /* Process the pieces. */
2520 for (i
= start
; i
< finish
; i
++)
2522 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2523 machine_mode mode
= GET_MODE (tmps
[i
]);
2524 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2525 poly_uint64 adj_bytelen
;
2528 /* Handle trailing fragments that run over the size of the struct.
2529 It's the target's responsibility to make sure that the fragment
2530 cannot be strictly smaller in some cases and strictly larger
2532 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2533 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2534 adj_bytelen
= ssize
- bytepos
;
2536 adj_bytelen
= bytelen
;
2538 if (GET_CODE (dst
) == CONCAT
)
2540 if (known_le (bytepos
+ adj_bytelen
,
2541 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2542 dest
= XEXP (dst
, 0);
2543 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2545 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2546 dest
= XEXP (dst
, 1);
2550 machine_mode dest_mode
= GET_MODE (dest
);
2551 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2553 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2555 if (GET_MODE_ALIGNMENT (dest_mode
)
2556 >= GET_MODE_ALIGNMENT (tmp_mode
))
2558 dest
= assign_stack_temp (dest_mode
,
2559 GET_MODE_SIZE (dest_mode
));
2560 emit_move_insn (adjust_address (dest
,
2568 dest
= assign_stack_temp (tmp_mode
,
2569 GET_MODE_SIZE (tmp_mode
));
2570 emit_move_insn (dest
, tmps
[i
]);
2571 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2577 /* Handle trailing fragments that run over the size of the struct. */
2578 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2580 /* store_bit_field always takes its value from the lsb.
2581 Move the fragment to the lsb if it's not already there. */
2583 #ifdef BLOCK_REG_PADDING
2584 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2585 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2591 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2592 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2596 /* Make sure not to write past the end of the struct. */
2597 store_bit_field (dest
,
2598 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2599 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2600 VOIDmode
, tmps
[i
], false);
2603 /* Optimize the access just a bit. */
2604 else if (MEM_P (dest
)
2605 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2606 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2607 && multiple_p (bytepos
* BITS_PER_UNIT
,
2608 GET_MODE_ALIGNMENT (mode
))
2609 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2610 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2613 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2614 0, 0, mode
, tmps
[i
], false);
2617 /* Copy from the pseudo into the (probable) hard reg. */
2618 if (orig_dst
!= dst
)
2619 emit_move_insn (orig_dst
, dst
);
2622 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2623 of the value stored in X. */
2626 maybe_emit_group_store (rtx x
, tree type
)
2628 machine_mode mode
= TYPE_MODE (type
);
2629 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2630 if (GET_CODE (x
) == PARALLEL
)
2632 rtx result
= gen_reg_rtx (mode
);
2633 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2639 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2641 This is used on targets that return BLKmode values in registers. */
2644 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2646 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2647 rtx src
= NULL
, dst
= NULL
;
2648 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2649 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2650 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2651 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2652 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2653 fixed_size_mode copy_mode
;
2655 /* BLKmode registers created in the back-end shouldn't have survived. */
2656 gcc_assert (mode
!= BLKmode
);
2658 /* If the structure doesn't take up a whole number of words, see whether
2659 SRCREG is padded on the left or on the right. If it's on the left,
2660 set PADDING_CORRECTION to the number of bits to skip.
2662 In most ABIs, the structure will be returned at the least end of
2663 the register, which translates to right padding on little-endian
2664 targets and left padding on big-endian targets. The opposite
2665 holds if the structure is returned at the most significant
2666 end of the register. */
2667 if (bytes
% UNITS_PER_WORD
!= 0
2668 && (targetm
.calls
.return_in_msb (type
)
2670 : BYTES_BIG_ENDIAN
))
2672 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2674 /* We can use a single move if we have an exact mode for the size. */
2675 else if (MEM_P (target
)
2676 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2677 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2678 && bytes
== GET_MODE_SIZE (mode
))
2680 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2684 /* And if we additionally have the same mode for a register. */
2685 else if (REG_P (target
)
2686 && GET_MODE (target
) == mode
2687 && bytes
== GET_MODE_SIZE (mode
))
2689 emit_move_insn (target
, srcreg
);
2693 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2694 into a new pseudo which is a full word. */
2695 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2697 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2701 /* Copy the structure BITSIZE bits at a time. If the target lives in
2702 memory, take care of not reading/writing past its end by selecting
2703 a copy mode suited to BITSIZE. This should always be possible given
2706 If the target lives in register, make sure not to select a copy mode
2707 larger than the mode of the register.
2709 We could probably emit more efficient code for machines which do not use
2710 strict alignment, but it doesn't seem worth the effort at the current
2713 copy_mode
= word_mode
;
2716 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2717 if (mem_mode
.exists ())
2718 copy_mode
= mem_mode
.require ();
2720 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2723 for (bitpos
= 0, xbitpos
= padding_correction
;
2724 bitpos
< bytes
* BITS_PER_UNIT
;
2725 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2727 /* We need a new source operand each time xbitpos is on a
2728 word boundary and when xbitpos == padding_correction
2729 (the first time through). */
2730 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2731 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2733 /* We need a new destination operand each time bitpos is on
2735 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2737 else if (bitpos
% BITS_PER_WORD
== 0)
2738 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2740 /* Use xbitpos for the source extraction (right justified) and
2741 bitpos for the destination store (left justified). */
2742 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2743 extract_bit_field (src
, bitsize
,
2744 xbitpos
% BITS_PER_WORD
, 1,
2745 NULL_RTX
, copy_mode
, copy_mode
,
2751 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2752 register if it contains any data, otherwise return null.
2754 This is used on targets that return BLKmode values in registers. */
2757 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2760 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2761 unsigned int bitsize
;
2762 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2763 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2764 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2765 fixed_size_mode dst_mode
;
2766 scalar_int_mode min_mode
;
2768 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2770 x
= expand_normal (src
);
2772 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2776 /* If the structure doesn't take up a whole number of words, see
2777 whether the register value should be padded on the left or on
2778 the right. Set PADDING_CORRECTION to the number of padding
2779 bits needed on the left side.
2781 In most ABIs, the structure will be returned at the least end of
2782 the register, which translates to right padding on little-endian
2783 targets and left padding on big-endian targets. The opposite
2784 holds if the structure is returned at the most significant
2785 end of the register. */
2786 if (bytes
% UNITS_PER_WORD
!= 0
2787 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2789 : BYTES_BIG_ENDIAN
))
2790 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2793 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2794 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2795 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2796 min_mode
= smallest_int_mode_for_size (bitsize
);
2798 /* Copy the structure BITSIZE bits at a time. */
2799 for (bitpos
= 0, xbitpos
= padding_correction
;
2800 bitpos
< bytes
* BITS_PER_UNIT
;
2801 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2803 /* We need a new destination pseudo each time xbitpos is
2804 on a word boundary and when xbitpos == padding_correction
2805 (the first time through). */
2806 if (xbitpos
% BITS_PER_WORD
== 0
2807 || xbitpos
== padding_correction
)
2809 /* Generate an appropriate register. */
2810 dst_word
= gen_reg_rtx (word_mode
);
2811 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2813 /* Clear the destination before we move anything into it. */
2814 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2817 /* Find the largest integer mode that can be used to copy all or as
2818 many bits as possible of the structure if the target supports larger
2819 copies. There are too many corner cases here w.r.t to alignments on
2820 the read/writes. So if there is any padding just use single byte
2822 opt_scalar_int_mode mode_iter
;
2823 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2825 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2827 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2828 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2829 && msize
<= BITS_PER_WORD
)
2836 /* We need a new source operand each time bitpos is on a word
2838 if (bitpos
% BITS_PER_WORD
== 0)
2839 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2841 /* Use bitpos for the source extraction (left justified) and
2842 xbitpos for the destination store (right justified). */
2843 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2845 extract_bit_field (src_word
, bitsize
,
2846 bitpos
% BITS_PER_WORD
, 1,
2847 NULL_RTX
, word_mode
, word_mode
,
2852 if (mode
== BLKmode
)
2854 /* Find the smallest integer mode large enough to hold the
2855 entire structure. */
2856 opt_scalar_int_mode mode_iter
;
2857 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2858 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2861 /* A suitable mode should have been found. */
2862 mode
= mode_iter
.require ();
2865 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2866 dst_mode
= word_mode
;
2869 dst
= gen_reg_rtx (dst_mode
);
2871 for (i
= 0; i
< n_regs
; i
++)
2872 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2874 if (mode
!= dst_mode
)
2875 dst
= gen_lowpart (mode
, dst
);
2880 /* Add a USE expression for REG to the (possibly empty) list pointed
2881 to by CALL_FUSAGE. REG must denote a hard register. */
2884 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2886 gcc_assert (REG_P (reg
));
2888 if (!HARD_REGISTER_P (reg
))
2892 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2895 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2896 to by CALL_FUSAGE. REG must denote a hard register. */
2899 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2901 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2904 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2907 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2908 starting at REGNO. All of these registers must be hard registers. */
2911 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2915 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2917 for (i
= 0; i
< nregs
; i
++)
2918 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2921 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2922 PARALLEL REGS. This is for calls that pass values in multiple
2923 non-contiguous locations. The Irix 6 ABI has examples of this. */
2926 use_group_regs (rtx
*call_fusage
, rtx regs
)
2930 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2932 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2934 /* A NULL entry means the parameter goes both on the stack and in
2935 registers. This can also be a MEM for targets that pass values
2936 partially on the stack and partially in registers. */
2937 if (reg
!= 0 && REG_P (reg
))
2938 use_reg (call_fusage
, reg
);
2942 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2943 assigment and the code of the expresion on the RHS is CODE. Return
2947 get_def_for_expr (tree name
, enum tree_code code
)
2951 if (TREE_CODE (name
) != SSA_NAME
)
2954 def_stmt
= get_gimple_for_ssa_name (name
);
2956 || gimple_assign_rhs_code (def_stmt
) != code
)
2962 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2963 assigment and the class of the expresion on the RHS is CLASS. Return
2967 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2971 if (TREE_CODE (name
) != SSA_NAME
)
2974 def_stmt
= get_gimple_for_ssa_name (name
);
2976 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2982 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2983 its length in bytes. */
2986 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2987 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2988 unsigned HOST_WIDE_INT min_size
,
2989 unsigned HOST_WIDE_INT max_size
,
2990 unsigned HOST_WIDE_INT probable_max_size
)
2992 machine_mode mode
= GET_MODE (object
);
2995 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2997 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2998 just move a zero. Otherwise, do this a piece at a time. */
2999 poly_int64 size_val
;
3001 && poly_int_rtx_p (size
, &size_val
)
3002 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3004 rtx zero
= CONST0_RTX (mode
);
3007 emit_move_insn (object
, zero
);
3011 if (COMPLEX_MODE_P (mode
))
3013 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3016 write_complex_part (object
, zero
, 0);
3017 write_complex_part (object
, zero
, 1);
3023 if (size
== const0_rtx
)
3026 align
= MEM_ALIGN (object
);
3028 if (CONST_INT_P (size
)
3029 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3031 optimize_insn_for_speed_p ()))
3032 clear_by_pieces (object
, INTVAL (size
), align
);
3033 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3034 expected_align
, expected_size
,
3035 min_size
, max_size
, probable_max_size
))
3037 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3038 return set_storage_via_libcall (object
, size
, const0_rtx
,
3039 method
== BLOCK_OP_TAILCALL
);
3047 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3049 unsigned HOST_WIDE_INT max
, min
= 0;
3050 if (GET_CODE (size
) == CONST_INT
)
3051 min
= max
= UINTVAL (size
);
3053 max
= GET_MODE_MASK (GET_MODE (size
));
3054 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3058 /* A subroutine of clear_storage. Expand a call to memset.
3059 Return the return value of memset, 0 otherwise. */
3062 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3064 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3065 machine_mode size_mode
;
3067 object
= copy_addr_to_reg (XEXP (object
, 0));
3068 object_tree
= make_tree (ptr_type_node
, object
);
3070 if (!CONST_INT_P (val
))
3071 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3072 val_tree
= make_tree (integer_type_node
, val
);
3074 size_mode
= TYPE_MODE (sizetype
);
3075 size
= convert_to_mode (size_mode
, size
, 1);
3076 size
= copy_to_mode_reg (size_mode
, size
);
3077 size_tree
= make_tree (sizetype
, size
);
3079 /* It is incorrect to use the libcall calling conventions for calls to
3080 memset because it can be provided by the user. */
3081 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3082 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3083 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3085 return expand_call (call_expr
, NULL_RTX
, false);
3088 /* Expand a setmem pattern; return true if successful. */
3091 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3092 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3093 unsigned HOST_WIDE_INT min_size
,
3094 unsigned HOST_WIDE_INT max_size
,
3095 unsigned HOST_WIDE_INT probable_max_size
)
3097 /* Try the most limited insn first, because there's no point
3098 including more than one in the machine description unless
3099 the more limited one has some advantage. */
3101 if (expected_align
< align
)
3102 expected_align
= align
;
3103 if (expected_size
!= -1)
3105 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3106 expected_size
= max_size
;
3107 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3108 expected_size
= min_size
;
3111 opt_scalar_int_mode mode_iter
;
3112 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3114 scalar_int_mode mode
= mode_iter
.require ();
3115 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3117 if (code
!= CODE_FOR_nothing
3118 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3119 here because if SIZE is less than the mode mask, as it is
3120 returned by the macro, it will definitely be less than the
3121 actual mode mask. Since SIZE is within the Pmode address
3122 space, we limit MODE to Pmode. */
3123 && ((CONST_INT_P (size
)
3124 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3125 <= (GET_MODE_MASK (mode
) >> 1)))
3126 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3127 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3129 struct expand_operand ops
[9];
3132 nops
= insn_data
[(int) code
].n_generator_args
;
3133 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3135 create_fixed_operand (&ops
[0], object
);
3136 /* The check above guarantees that this size conversion is valid. */
3137 create_convert_operand_to (&ops
[1], size
, mode
, true);
3138 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3139 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3142 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3143 create_integer_operand (&ops
[5], expected_size
);
3147 create_integer_operand (&ops
[6], min_size
);
3148 /* If we cannot represent the maximal size,
3149 make parameter NULL. */
3150 if ((HOST_WIDE_INT
) max_size
!= -1)
3151 create_integer_operand (&ops
[7], max_size
);
3153 create_fixed_operand (&ops
[7], NULL
);
3157 /* If we cannot represent the maximal size,
3158 make parameter NULL. */
3159 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3160 create_integer_operand (&ops
[8], probable_max_size
);
3162 create_fixed_operand (&ops
[8], NULL
);
3164 if (maybe_expand_insn (code
, nops
, ops
))
3173 /* Write to one of the components of the complex value CPLX. Write VAL to
3174 the real part if IMAG_P is false, and the imaginary part if its true. */
3177 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3183 if (GET_CODE (cplx
) == CONCAT
)
3185 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3189 cmode
= GET_MODE (cplx
);
3190 imode
= GET_MODE_INNER (cmode
);
3191 ibitsize
= GET_MODE_BITSIZE (imode
);
3193 /* For MEMs simplify_gen_subreg may generate an invalid new address
3194 because, e.g., the original address is considered mode-dependent
3195 by the target, which restricts simplify_subreg from invoking
3196 adjust_address_nv. Instead of preparing fallback support for an
3197 invalid address, we call adjust_address_nv directly. */
3200 emit_move_insn (adjust_address_nv (cplx
, imode
,
3201 imag_p
? GET_MODE_SIZE (imode
) : 0),
3206 /* If the sub-object is at least word sized, then we know that subregging
3207 will work. This special case is important, since store_bit_field
3208 wants to operate on integer modes, and there's rarely an OImode to
3209 correspond to TCmode. */
3210 if (ibitsize
>= BITS_PER_WORD
3211 /* For hard regs we have exact predicates. Assume we can split
3212 the original object if it spans an even number of hard regs.
3213 This special case is important for SCmode on 64-bit platforms
3214 where the natural size of floating-point regs is 32-bit. */
3216 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3217 && REG_NREGS (cplx
) % 2 == 0))
3219 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3220 imag_p
? GET_MODE_SIZE (imode
) : 0);
3223 emit_move_insn (part
, val
);
3227 /* simplify_gen_subreg may fail for sub-word MEMs. */
3228 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3231 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3235 /* Extract one of the components of the complex value CPLX. Extract the
3236 real part if IMAG_P is false, and the imaginary part if it's true. */
3239 read_complex_part (rtx cplx
, bool imag_p
)
3245 if (GET_CODE (cplx
) == CONCAT
)
3246 return XEXP (cplx
, imag_p
);
3248 cmode
= GET_MODE (cplx
);
3249 imode
= GET_MODE_INNER (cmode
);
3250 ibitsize
= GET_MODE_BITSIZE (imode
);
3252 /* Special case reads from complex constants that got spilled to memory. */
3253 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3255 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3256 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3258 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3259 if (CONSTANT_CLASS_P (part
))
3260 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3264 /* For MEMs simplify_gen_subreg may generate an invalid new address
3265 because, e.g., the original address is considered mode-dependent
3266 by the target, which restricts simplify_subreg from invoking
3267 adjust_address_nv. Instead of preparing fallback support for an
3268 invalid address, we call adjust_address_nv directly. */
3270 return adjust_address_nv (cplx
, imode
,
3271 imag_p
? GET_MODE_SIZE (imode
) : 0);
3273 /* If the sub-object is at least word sized, then we know that subregging
3274 will work. This special case is important, since extract_bit_field
3275 wants to operate on integer modes, and there's rarely an OImode to
3276 correspond to TCmode. */
3277 if (ibitsize
>= BITS_PER_WORD
3278 /* For hard regs we have exact predicates. Assume we can split
3279 the original object if it spans an even number of hard regs.
3280 This special case is important for SCmode on 64-bit platforms
3281 where the natural size of floating-point regs is 32-bit. */
3283 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3284 && REG_NREGS (cplx
) % 2 == 0))
3286 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3287 imag_p
? GET_MODE_SIZE (imode
) : 0);
3291 /* simplify_gen_subreg may fail for sub-word MEMs. */
3292 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3295 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3296 true, NULL_RTX
, imode
, imode
, false, NULL
);
3299 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3300 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3301 represented in NEW_MODE. If FORCE is true, this will never happen, as
3302 we'll force-create a SUBREG if needed. */
3305 emit_move_change_mode (machine_mode new_mode
,
3306 machine_mode old_mode
, rtx x
, bool force
)
3310 if (push_operand (x
, GET_MODE (x
)))
3312 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3313 MEM_COPY_ATTRIBUTES (ret
, x
);
3317 /* We don't have to worry about changing the address since the
3318 size in bytes is supposed to be the same. */
3319 if (reload_in_progress
)
3321 /* Copy the MEM to change the mode and move any
3322 substitutions from the old MEM to the new one. */
3323 ret
= adjust_address_nv (x
, new_mode
, 0);
3324 copy_replacements (x
, ret
);
3327 ret
= adjust_address (x
, new_mode
, 0);
3331 /* Note that we do want simplify_subreg's behavior of validating
3332 that the new mode is ok for a hard register. If we were to use
3333 simplify_gen_subreg, we would create the subreg, but would
3334 probably run into the target not being able to implement it. */
3335 /* Except, of course, when FORCE is true, when this is exactly what
3336 we want. Which is needed for CCmodes on some targets. */
3338 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3340 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3346 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3347 an integer mode of the same size as MODE. Returns the instruction
3348 emitted, or NULL if such a move could not be generated. */
3351 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3353 scalar_int_mode imode
;
3354 enum insn_code code
;
3356 /* There must exist a mode of the exact size we require. */
3357 if (!int_mode_for_mode (mode
).exists (&imode
))
3360 /* The target must support moves in this mode. */
3361 code
= optab_handler (mov_optab
, imode
);
3362 if (code
== CODE_FOR_nothing
)
3365 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3368 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3371 return emit_insn (GEN_FCN (code
) (x
, y
));
3374 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3375 Return an equivalent MEM that does not use an auto-increment. */
3378 emit_move_resolve_push (machine_mode mode
, rtx x
)
3380 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3383 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3384 #ifdef PUSH_ROUNDING
3385 adjust
= PUSH_ROUNDING (adjust
);
3387 if (code
== PRE_DEC
|| code
== POST_DEC
)
3389 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3391 rtx expr
= XEXP (XEXP (x
, 0), 1);
3393 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3394 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3395 if (GET_CODE (expr
) == MINUS
)
3397 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3401 /* Do not use anti_adjust_stack, since we don't want to update
3402 stack_pointer_delta. */
3403 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3404 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3405 0, OPTAB_LIB_WIDEN
);
3406 if (temp
!= stack_pointer_rtx
)
3407 emit_move_insn (stack_pointer_rtx
, temp
);
3414 temp
= stack_pointer_rtx
;
3419 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3425 return replace_equiv_address (x
, temp
);
3428 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3429 X is known to satisfy push_operand, and MODE is known to be complex.
3430 Returns the last instruction emitted. */
3433 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3435 scalar_mode submode
= GET_MODE_INNER (mode
);
3438 #ifdef PUSH_ROUNDING
3439 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3441 /* In case we output to the stack, but the size is smaller than the
3442 machine can push exactly, we need to use move instructions. */
3443 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3445 x
= emit_move_resolve_push (mode
, x
);
3446 return emit_move_insn (x
, y
);
3450 /* Note that the real part always precedes the imag part in memory
3451 regardless of machine's endianness. */
3452 switch (GET_CODE (XEXP (x
, 0)))
3466 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3467 read_complex_part (y
, imag_first
));
3468 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3469 read_complex_part (y
, !imag_first
));
3472 /* A subroutine of emit_move_complex. Perform the move from Y to X
3473 via two moves of the parts. Returns the last instruction emitted. */
3476 emit_move_complex_parts (rtx x
, rtx y
)
3478 /* Show the output dies here. This is necessary for SUBREGs
3479 of pseudos since we cannot track their lifetimes correctly;
3480 hard regs shouldn't appear here except as return values. */
3481 if (!reload_completed
&& !reload_in_progress
3482 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3485 write_complex_part (x
, read_complex_part (y
, false), false);
3486 write_complex_part (x
, read_complex_part (y
, true), true);
3488 return get_last_insn ();
3491 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3492 MODE is known to be complex. Returns the last instruction emitted. */
3495 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3499 /* Need to take special care for pushes, to maintain proper ordering
3500 of the data, and possibly extra padding. */
3501 if (push_operand (x
, mode
))
3502 return emit_move_complex_push (mode
, x
, y
);
3504 /* See if we can coerce the target into moving both values at once, except
3505 for floating point where we favor moving as parts if this is easy. */
3506 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3507 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3509 && HARD_REGISTER_P (x
)
3510 && REG_NREGS (x
) == 1)
3512 && HARD_REGISTER_P (y
)
3513 && REG_NREGS (y
) == 1))
3515 /* Not possible if the values are inherently not adjacent. */
3516 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3518 /* Is possible if both are registers (or subregs of registers). */
3519 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3521 /* If one of the operands is a memory, and alignment constraints
3522 are friendly enough, we may be able to do combined memory operations.
3523 We do not attempt this if Y is a constant because that combination is
3524 usually better with the by-parts thing below. */
3525 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3526 && (!STRICT_ALIGNMENT
3527 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3536 /* For memory to memory moves, optimal behavior can be had with the
3537 existing block move logic. */
3538 if (MEM_P (x
) && MEM_P (y
))
3540 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3541 BLOCK_OP_NO_LIBCALL
);
3542 return get_last_insn ();
3545 ret
= emit_move_via_integer (mode
, x
, y
, true);
3550 return emit_move_complex_parts (x
, y
);
3553 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3554 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3557 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3561 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3564 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3565 if (code
!= CODE_FOR_nothing
)
3567 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3568 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3569 return emit_insn (GEN_FCN (code
) (x
, y
));
3573 /* Otherwise, find the MODE_INT mode of the same width. */
3574 ret
= emit_move_via_integer (mode
, x
, y
, false);
3575 gcc_assert (ret
!= NULL
);
3579 /* Return true if word I of OP lies entirely in the
3580 undefined bits of a paradoxical subreg. */
3583 undefined_operand_subword_p (const_rtx op
, int i
)
3585 if (GET_CODE (op
) != SUBREG
)
3587 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3588 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3589 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3590 || known_le (offset
, -UNITS_PER_WORD
));
3593 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3594 MODE is any multi-word or full-word mode that lacks a move_insn
3595 pattern. Note that you will get better code if you define such
3596 patterns, even if they must turn into multiple assembler instructions. */
3599 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3601 rtx_insn
*last_insn
= 0;
3607 /* This function can only handle cases where the number of words is
3608 known at compile time. */
3609 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3610 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3612 /* If X is a push on the stack, do the push now and replace
3613 X with a reference to the stack pointer. */
3614 if (push_operand (x
, mode
))
3615 x
= emit_move_resolve_push (mode
, x
);
3617 /* If we are in reload, see if either operand is a MEM whose address
3618 is scheduled for replacement. */
3619 if (reload_in_progress
&& MEM_P (x
)
3620 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3621 x
= replace_equiv_address_nv (x
, inner
);
3622 if (reload_in_progress
&& MEM_P (y
)
3623 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3624 y
= replace_equiv_address_nv (y
, inner
);
3628 need_clobber
= false;
3629 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3631 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3634 /* Do not generate code for a move if it would come entirely
3635 from the undefined bits of a paradoxical subreg. */
3636 if (undefined_operand_subword_p (y
, i
))
3639 ypart
= operand_subword (y
, i
, 1, mode
);
3641 /* If we can't get a part of Y, put Y into memory if it is a
3642 constant. Otherwise, force it into a register. Then we must
3643 be able to get a part of Y. */
3644 if (ypart
== 0 && CONSTANT_P (y
))
3646 y
= use_anchored_address (force_const_mem (mode
, y
));
3647 ypart
= operand_subword (y
, i
, 1, mode
);
3649 else if (ypart
== 0)
3650 ypart
= operand_subword_force (y
, i
, mode
);
3652 gcc_assert (xpart
&& ypart
);
3654 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3656 last_insn
= emit_move_insn (xpart
, ypart
);
3662 /* Show the output dies here. This is necessary for SUBREGs
3663 of pseudos since we cannot track their lifetimes correctly;
3664 hard regs shouldn't appear here except as return values.
3665 We never want to emit such a clobber after reload. */
3667 && ! (reload_in_progress
|| reload_completed
)
3668 && need_clobber
!= 0)
3676 /* Low level part of emit_move_insn.
3677 Called just like emit_move_insn, but assumes X and Y
3678 are basically valid. */
3681 emit_move_insn_1 (rtx x
, rtx y
)
3683 machine_mode mode
= GET_MODE (x
);
3684 enum insn_code code
;
3686 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3688 code
= optab_handler (mov_optab
, mode
);
3689 if (code
!= CODE_FOR_nothing
)
3690 return emit_insn (GEN_FCN (code
) (x
, y
));
3692 /* Expand complex moves by moving real part and imag part. */
3693 if (COMPLEX_MODE_P (mode
))
3694 return emit_move_complex (mode
, x
, y
);
3696 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3697 || ALL_FIXED_POINT_MODE_P (mode
))
3699 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3701 /* If we can't find an integer mode, use multi words. */
3705 return emit_move_multi_word (mode
, x
, y
);
3708 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3709 return emit_move_ccmode (mode
, x
, y
);
3711 /* Try using a move pattern for the corresponding integer mode. This is
3712 only safe when simplify_subreg can convert MODE constants into integer
3713 constants. At present, it can only do this reliably if the value
3714 fits within a HOST_WIDE_INT. */
3716 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3718 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3722 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3727 return emit_move_multi_word (mode
, x
, y
);
3730 /* Generate code to copy Y into X.
3731 Both Y and X must have the same mode, except that
3732 Y can be a constant with VOIDmode.
3733 This mode cannot be BLKmode; use emit_block_move for that.
3735 Return the last instruction emitted. */
3738 emit_move_insn (rtx x
, rtx y
)
3740 machine_mode mode
= GET_MODE (x
);
3741 rtx y_cst
= NULL_RTX
;
3742 rtx_insn
*last_insn
;
3745 gcc_assert (mode
!= BLKmode
3746 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3751 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3752 && (last_insn
= compress_float_constant (x
, y
)))
3757 if (!targetm
.legitimate_constant_p (mode
, y
))
3759 y
= force_const_mem (mode
, y
);
3761 /* If the target's cannot_force_const_mem prevented the spill,
3762 assume that the target's move expanders will also take care
3763 of the non-legitimate constant. */
3767 y
= use_anchored_address (y
);
3771 /* If X or Y are memory references, verify that their addresses are valid
3774 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3776 && ! push_operand (x
, GET_MODE (x
))))
3777 x
= validize_mem (x
);
3780 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3781 MEM_ADDR_SPACE (y
)))
3782 y
= validize_mem (y
);
3784 gcc_assert (mode
!= BLKmode
);
3786 last_insn
= emit_move_insn_1 (x
, y
);
3788 if (y_cst
&& REG_P (x
)
3789 && (set
= single_set (last_insn
)) != NULL_RTX
3790 && SET_DEST (set
) == x
3791 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3792 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3797 /* Generate the body of an instruction to copy Y into X.
3798 It may be a list of insns, if one insn isn't enough. */
3801 gen_move_insn (rtx x
, rtx y
)
3806 emit_move_insn_1 (x
, y
);
3812 /* If Y is representable exactly in a narrower mode, and the target can
3813 perform the extension directly from constant or memory, then emit the
3814 move as an extension. */
3817 compress_float_constant (rtx x
, rtx y
)
3819 machine_mode dstmode
= GET_MODE (x
);
3820 machine_mode orig_srcmode
= GET_MODE (y
);
3821 machine_mode srcmode
;
3822 const REAL_VALUE_TYPE
*r
;
3823 int oldcost
, newcost
;
3824 bool speed
= optimize_insn_for_speed_p ();
3826 r
= CONST_DOUBLE_REAL_VALUE (y
);
3828 if (targetm
.legitimate_constant_p (dstmode
, y
))
3829 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3831 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3833 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3837 rtx_insn
*last_insn
;
3839 /* Skip if the target can't extend this way. */
3840 ic
= can_extend_p (dstmode
, srcmode
, 0);
3841 if (ic
== CODE_FOR_nothing
)
3844 /* Skip if the narrowed value isn't exact. */
3845 if (! exact_real_truncate (srcmode
, r
))
3848 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3850 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3852 /* Skip if the target needs extra instructions to perform
3854 if (!insn_operand_matches (ic
, 1, trunc_y
))
3856 /* This is valid, but may not be cheaper than the original. */
3857 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3859 if (oldcost
< newcost
)
3862 else if (float_extend_from_mem
[dstmode
][srcmode
])
3864 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3865 /* This is valid, but may not be cheaper than the original. */
3866 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3868 if (oldcost
< newcost
)
3870 trunc_y
= validize_mem (trunc_y
);
3875 /* For CSE's benefit, force the compressed constant pool entry
3876 into a new pseudo. This constant may be used in different modes,
3877 and if not, combine will put things back together for us. */
3878 trunc_y
= force_reg (srcmode
, trunc_y
);
3880 /* If x is a hard register, perform the extension into a pseudo,
3881 so that e.g. stack realignment code is aware of it. */
3883 if (REG_P (x
) && HARD_REGISTER_P (x
))
3884 target
= gen_reg_rtx (dstmode
);
3886 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3887 last_insn
= get_last_insn ();
3890 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3893 return emit_move_insn (x
, target
);
3900 /* Pushing data onto the stack. */
3902 /* Push a block of length SIZE (perhaps variable)
3903 and return an rtx to address the beginning of the block.
3904 The value may be virtual_outgoing_args_rtx.
3906 EXTRA is the number of bytes of padding to push in addition to SIZE.
3907 BELOW nonzero means this padding comes at low addresses;
3908 otherwise, the padding comes at high addresses. */
3911 push_block (rtx size
, poly_int64 extra
, int below
)
3915 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3916 if (CONSTANT_P (size
))
3917 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3918 else if (REG_P (size
) && known_eq (extra
, 0))
3919 anti_adjust_stack (size
);
3922 temp
= copy_to_mode_reg (Pmode
, size
);
3923 if (maybe_ne (extra
, 0))
3924 temp
= expand_binop (Pmode
, add_optab
, temp
,
3925 gen_int_mode (extra
, Pmode
),
3926 temp
, 0, OPTAB_LIB_WIDEN
);
3927 anti_adjust_stack (temp
);
3930 if (STACK_GROWS_DOWNWARD
)
3932 temp
= virtual_outgoing_args_rtx
;
3933 if (maybe_ne (extra
, 0) && below
)
3934 temp
= plus_constant (Pmode
, temp
, extra
);
3939 if (poly_int_rtx_p (size
, &csize
))
3940 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3941 -csize
- (below
? 0 : extra
));
3942 else if (maybe_ne (extra
, 0) && !below
)
3943 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3944 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3947 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3948 negate_rtx (Pmode
, size
));
3951 return memory_address (NARROWEST_INT_MODE
, temp
);
3954 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3957 mem_autoinc_base (rtx mem
)
3961 rtx addr
= XEXP (mem
, 0);
3962 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3963 return XEXP (addr
, 0);
3968 /* A utility routine used here, in reload, and in try_split. The insns
3969 after PREV up to and including LAST are known to adjust the stack,
3970 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3971 placing notes as appropriate. PREV may be NULL, indicating the
3972 entire insn sequence prior to LAST should be scanned.
3974 The set of allowed stack pointer modifications is small:
3975 (1) One or more auto-inc style memory references (aka pushes),
3976 (2) One or more addition/subtraction with the SP as destination,
3977 (3) A single move insn with the SP as destination,
3978 (4) A call_pop insn,
3979 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3981 Insns in the sequence that do not modify the SP are ignored,
3982 except for noreturn calls.
3984 The return value is the amount of adjustment that can be trivially
3985 verified, via immediate operand or auto-inc. If the adjustment
3986 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3989 find_args_size_adjust (rtx_insn
*insn
)
3994 pat
= PATTERN (insn
);
3997 /* Look for a call_pop pattern. */
4000 /* We have to allow non-call_pop patterns for the case
4001 of emit_single_push_insn of a TLS address. */
4002 if (GET_CODE (pat
) != PARALLEL
)
4005 /* All call_pop have a stack pointer adjust in the parallel.
4006 The call itself is always first, and the stack adjust is
4007 usually last, so search from the end. */
4008 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4010 set
= XVECEXP (pat
, 0, i
);
4011 if (GET_CODE (set
) != SET
)
4013 dest
= SET_DEST (set
);
4014 if (dest
== stack_pointer_rtx
)
4017 /* We'd better have found the stack pointer adjust. */
4020 /* Fall through to process the extracted SET and DEST
4021 as if it was a standalone insn. */
4023 else if (GET_CODE (pat
) == SET
)
4025 else if ((set
= single_set (insn
)) != NULL
)
4027 else if (GET_CODE (pat
) == PARALLEL
)
4029 /* ??? Some older ports use a parallel with a stack adjust
4030 and a store for a PUSH_ROUNDING pattern, rather than a
4031 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4032 /* ??? See h8300 and m68k, pushqi1. */
4033 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4035 set
= XVECEXP (pat
, 0, i
);
4036 if (GET_CODE (set
) != SET
)
4038 dest
= SET_DEST (set
);
4039 if (dest
== stack_pointer_rtx
)
4042 /* We do not expect an auto-inc of the sp in the parallel. */
4043 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4044 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4045 != stack_pointer_rtx
);
4053 dest
= SET_DEST (set
);
4055 /* Look for direct modifications of the stack pointer. */
4056 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4058 /* Look for a trivial adjustment, otherwise assume nothing. */
4059 /* Note that the SPU restore_stack_block pattern refers to
4060 the stack pointer in V4SImode. Consider that non-trivial. */
4062 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4063 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4065 /* ??? Reload can generate no-op moves, which will be cleaned
4066 up later. Recognize it and continue searching. */
4067 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4070 return HOST_WIDE_INT_MIN
;
4076 /* Otherwise only think about autoinc patterns. */
4077 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4080 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4081 != stack_pointer_rtx
);
4083 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4084 mem
= SET_SRC (set
);
4088 addr
= XEXP (mem
, 0);
4089 switch (GET_CODE (addr
))
4093 return GET_MODE_SIZE (GET_MODE (mem
));
4096 return -GET_MODE_SIZE (GET_MODE (mem
));
4099 addr
= XEXP (addr
, 1);
4100 gcc_assert (GET_CODE (addr
) == PLUS
);
4101 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4102 return rtx_to_poly_int64 (XEXP (addr
, 1));
4110 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4111 poly_int64 end_args_size
)
4113 poly_int64 args_size
= end_args_size
;
4114 bool saw_unknown
= false;
4117 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4119 if (!NONDEBUG_INSN_P (insn
))
4122 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4123 a call argument containing a TLS address that itself requires
4124 a call to __tls_get_addr. The handling of stack_pointer_delta
4125 in emit_single_push_insn is supposed to ensure that any such
4126 notes are already correct. */
4127 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4128 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4130 poly_int64 this_delta
= find_args_size_adjust (insn
);
4131 if (known_eq (this_delta
, 0))
4134 || ACCUMULATE_OUTGOING_ARGS
4135 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4139 gcc_assert (!saw_unknown
);
4140 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4144 add_args_size_note (insn
, args_size
);
4145 if (STACK_GROWS_DOWNWARD
)
4146 this_delta
= -poly_uint64 (this_delta
);
4149 args_size
= HOST_WIDE_INT_MIN
;
4151 args_size
-= this_delta
;
4157 #ifdef PUSH_ROUNDING
4158 /* Emit single push insn. */
4161 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4164 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4166 enum insn_code icode
;
4168 /* If there is push pattern, use it. Otherwise try old way of throwing
4169 MEM representing push operation to move expander. */
4170 icode
= optab_handler (push_optab
, mode
);
4171 if (icode
!= CODE_FOR_nothing
)
4173 struct expand_operand ops
[1];
4175 create_input_operand (&ops
[0], x
, mode
);
4176 if (maybe_expand_insn (icode
, 1, ops
))
4179 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4180 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4181 /* If we are to pad downward, adjust the stack pointer first and
4182 then store X into the stack location using an offset. This is
4183 because emit_move_insn does not know how to pad; it does not have
4185 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4187 emit_move_insn (stack_pointer_rtx
,
4188 expand_binop (Pmode
,
4189 STACK_GROWS_DOWNWARD
? sub_optab
4192 gen_int_mode (rounded_size
, Pmode
),
4193 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4195 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4196 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4197 /* We have already decremented the stack pointer, so get the
4199 offset
+= rounded_size
;
4201 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4202 /* We have already incremented the stack pointer, so get the
4204 offset
-= rounded_size
;
4206 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4210 if (STACK_GROWS_DOWNWARD
)
4211 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4212 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4214 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4215 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4217 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4220 dest
= gen_rtx_MEM (mode
, dest_addr
);
4224 set_mem_attributes (dest
, type
, 1);
4226 if (cfun
->tail_call_marked
)
4227 /* Function incoming arguments may overlap with sibling call
4228 outgoing arguments and we cannot allow reordering of reads
4229 from function arguments with stores to outgoing arguments
4230 of sibling calls. */
4231 set_mem_alias_set (dest
, 0);
4233 emit_move_insn (dest
, x
);
4236 /* Emit and annotate a single push insn. */
4239 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4241 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4242 rtx_insn
*prev
= get_last_insn ();
4245 emit_single_push_insn_1 (mode
, x
, type
);
4247 /* Adjust stack_pointer_delta to describe the situation after the push
4248 we just performed. Note that we must do this after the push rather
4249 than before the push in case calculating X needs pushes and pops of
4250 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4251 for such pushes and pops must not include the effect of the future
4253 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4255 last
= get_last_insn ();
4257 /* Notice the common case where we emitted exactly one insn. */
4258 if (PREV_INSN (last
) == prev
)
4260 add_args_size_note (last
, stack_pointer_delta
);
4264 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4265 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4266 || known_eq (delta
, old_delta
));
4270 /* If reading SIZE bytes from X will end up reading from
4271 Y return the number of bytes that overlap. Return -1
4272 if there is no overlap or -2 if we can't determine
4273 (for example when X and Y have different base registers). */
4276 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4278 rtx tmp
= plus_constant (Pmode
, x
, size
);
4279 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4281 if (!CONST_INT_P (sub
))
4284 HOST_WIDE_INT val
= INTVAL (sub
);
4286 return IN_RANGE (val
, 1, size
) ? val
: -1;
4289 /* Generate code to push X onto the stack, assuming it has mode MODE and
4291 MODE is redundant except when X is a CONST_INT (since they don't
4293 SIZE is an rtx for the size of data to be copied (in bytes),
4294 needed only if X is BLKmode.
4295 Return true if successful. May return false if asked to push a
4296 partial argument during a sibcall optimization (as specified by
4297 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4300 ALIGN (in bits) is maximum alignment we can assume.
4302 If PARTIAL and REG are both nonzero, then copy that many of the first
4303 bytes of X into registers starting with REG, and push the rest of X.
4304 The amount of space pushed is decreased by PARTIAL bytes.
4305 REG must be a hard register in this case.
4306 If REG is zero but PARTIAL is not, take any all others actions for an
4307 argument partially in registers, but do not actually load any
4310 EXTRA is the amount in bytes of extra space to leave next to this arg.
4311 This is ignored if an argument block has already been allocated.
4313 On a machine that lacks real push insns, ARGS_ADDR is the address of
4314 the bottom of the argument block for this call. We use indexing off there
4315 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4316 argument block has not been preallocated.
4318 ARGS_SO_FAR is the size of args previously pushed for this call.
4320 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4321 for arguments passed in registers. If nonzero, it will be the number
4322 of bytes required. */
4325 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4326 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4327 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4328 rtx alignment_pad
, bool sibcall_p
)
4331 pad_direction stack_direction
4332 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4334 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4335 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4336 Default is below for small data on big-endian machines; else above. */
4337 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4339 /* Invert direction if stack is post-decrement.
4341 if (STACK_PUSH_CODE
== POST_DEC
)
4342 if (where_pad
!= PAD_NONE
)
4343 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4347 int nregs
= partial
/ UNITS_PER_WORD
;
4348 rtx
*tmp_regs
= NULL
;
4349 int overlapping
= 0;
4352 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4354 /* Copy a block into the stack, entirely or partially. */
4361 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4362 used
= partial
- offset
;
4364 if (mode
!= BLKmode
)
4366 /* A value is to be stored in an insufficiently aligned
4367 stack slot; copy via a suitably aligned slot if
4369 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4370 if (!MEM_P (xinner
))
4372 temp
= assign_temp (type
, 1, 1);
4373 emit_move_insn (temp
, xinner
);
4380 /* USED is now the # of bytes we need not copy to the stack
4381 because registers will take care of them. */
4384 xinner
= adjust_address (xinner
, BLKmode
, used
);
4386 /* If the partial register-part of the arg counts in its stack size,
4387 skip the part of stack space corresponding to the registers.
4388 Otherwise, start copying to the beginning of the stack space,
4389 by setting SKIP to 0. */
4390 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4392 #ifdef PUSH_ROUNDING
4393 /* Do it with several push insns if that doesn't take lots of insns
4394 and if there is no difficulty with push insns that skip bytes
4395 on the stack for alignment purposes. */
4398 && CONST_INT_P (size
)
4400 && MEM_ALIGN (xinner
) >= align
4401 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4402 /* Here we avoid the case of a structure whose weak alignment
4403 forces many pushes of a small amount of data,
4404 and such small pushes do rounding that causes trouble. */
4405 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4406 || align
>= BIGGEST_ALIGNMENT
4407 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4408 align
/ BITS_PER_UNIT
))
4409 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4411 /* Push padding now if padding above and stack grows down,
4412 or if padding below and stack grows up.
4413 But if space already allocated, this has already been done. */
4414 if (maybe_ne (extra
, 0)
4416 && where_pad
!= PAD_NONE
4417 && where_pad
!= stack_direction
)
4418 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4420 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
4424 #endif /* PUSH_ROUNDING */
4428 /* Otherwise make space on the stack and copy the data
4429 to the address of that space. */
4431 /* Deduct words put into registers from the size we must copy. */
4434 if (CONST_INT_P (size
))
4435 size
= GEN_INT (INTVAL (size
) - used
);
4437 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4438 gen_int_mode (used
, GET_MODE (size
)),
4439 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4442 /* Get the address of the stack space.
4443 In this case, we do not deal with EXTRA separately.
4444 A single stack adjust will do. */
4448 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4451 else if (poly_int_rtx_p (args_so_far
, &offset
))
4452 temp
= memory_address (BLKmode
,
4453 plus_constant (Pmode
, args_addr
,
4456 temp
= memory_address (BLKmode
,
4457 plus_constant (Pmode
,
4458 gen_rtx_PLUS (Pmode
,
4463 if (!ACCUMULATE_OUTGOING_ARGS
)
4465 /* If the source is referenced relative to the stack pointer,
4466 copy it to another register to stabilize it. We do not need
4467 to do this if we know that we won't be changing sp. */
4469 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4470 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4471 temp
= copy_to_reg (temp
);
4474 target
= gen_rtx_MEM (BLKmode
, temp
);
4476 /* We do *not* set_mem_attributes here, because incoming arguments
4477 may overlap with sibling call outgoing arguments and we cannot
4478 allow reordering of reads from function arguments with stores
4479 to outgoing arguments of sibling calls. We do, however, want
4480 to record the alignment of the stack slot. */
4481 /* ALIGN may well be better aligned than TYPE, e.g. due to
4482 PARM_BOUNDARY. Assume the caller isn't lying. */
4483 set_mem_align (target
, align
);
4485 /* If part should go in registers and pushing to that part would
4486 overwrite some of the values that need to go into regs, load the
4487 overlapping values into temporary pseudos to be moved into the hard
4488 regs at the end after the stack pushing has completed.
4489 We cannot load them directly into the hard regs here because
4490 they can be clobbered by the block move expansions.
4493 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4494 && GET_CODE (reg
) != PARALLEL
)
4496 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4497 if (overlapping
> 0)
4499 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4500 overlapping
/= UNITS_PER_WORD
;
4502 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4504 for (int i
= 0; i
< overlapping
; i
++)
4505 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4507 for (int i
= 0; i
< overlapping
; i
++)
4508 emit_move_insn (tmp_regs
[i
],
4509 operand_subword_force (target
, i
, mode
));
4511 else if (overlapping
== -1)
4513 /* Could not determine whether there is overlap.
4514 Fail the sibcall. */
4522 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4525 else if (partial
> 0)
4527 /* Scalar partly in registers. This case is only supported
4528 for fixed-wdth modes. */
4529 int size
= GET_MODE_SIZE (mode
).to_constant ();
4530 size
/= UNITS_PER_WORD
;
4533 /* # bytes of start of argument
4534 that we must make space for but need not store. */
4535 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4536 int args_offset
= INTVAL (args_so_far
);
4539 /* Push padding now if padding above and stack grows down,
4540 or if padding below and stack grows up.
4541 But if space already allocated, this has already been done. */
4542 if (maybe_ne (extra
, 0)
4544 && where_pad
!= PAD_NONE
4545 && where_pad
!= stack_direction
)
4546 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4548 /* If we make space by pushing it, we might as well push
4549 the real data. Otherwise, we can leave OFFSET nonzero
4550 and leave the space uninitialized. */
4554 /* Now NOT_STACK gets the number of words that we don't need to
4555 allocate on the stack. Convert OFFSET to words too. */
4556 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4557 offset
/= UNITS_PER_WORD
;
4559 /* If the partial register-part of the arg counts in its stack size,
4560 skip the part of stack space corresponding to the registers.
4561 Otherwise, start copying to the beginning of the stack space,
4562 by setting SKIP to 0. */
4563 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4565 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4566 x
= validize_mem (force_const_mem (mode
, x
));
4568 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4569 SUBREGs of such registers are not allowed. */
4570 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4571 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4572 x
= copy_to_reg (x
);
4574 /* Loop over all the words allocated on the stack for this arg. */
4575 /* We can do it by words, because any scalar bigger than a word
4576 has a size a multiple of a word. */
4577 for (i
= size
- 1; i
>= not_stack
; i
--)
4578 if (i
>= not_stack
+ offset
)
4579 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4580 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4582 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4584 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4592 /* Push padding now if padding above and stack grows down,
4593 or if padding below and stack grows up.
4594 But if space already allocated, this has already been done. */
4595 if (maybe_ne (extra
, 0)
4597 && where_pad
!= PAD_NONE
4598 && where_pad
!= stack_direction
)
4599 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4601 #ifdef PUSH_ROUNDING
4602 if (args_addr
== 0 && PUSH_ARGS
)
4603 emit_single_push_insn (mode
, x
, type
);
4607 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4608 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4610 /* We do *not* set_mem_attributes here, because incoming arguments
4611 may overlap with sibling call outgoing arguments and we cannot
4612 allow reordering of reads from function arguments with stores
4613 to outgoing arguments of sibling calls. We do, however, want
4614 to record the alignment of the stack slot. */
4615 /* ALIGN may well be better aligned than TYPE, e.g. due to
4616 PARM_BOUNDARY. Assume the caller isn't lying. */
4617 set_mem_align (dest
, align
);
4619 emit_move_insn (dest
, x
);
4623 /* Move the partial arguments into the registers and any overlapping
4624 values that we moved into the pseudos in tmp_regs. */
4625 if (partial
> 0 && reg
!= 0)
4627 /* Handle calls that pass values in multiple non-contiguous locations.
4628 The Irix 6 ABI has examples of this. */
4629 if (GET_CODE (reg
) == PARALLEL
)
4630 emit_group_load (reg
, x
, type
, -1);
4633 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4634 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4636 for (int i
= 0; i
< overlapping
; i
++)
4637 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4638 + nregs
- overlapping
+ i
),
4644 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4645 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4647 if (alignment_pad
&& args_addr
== 0)
4648 anti_adjust_stack (alignment_pad
);
4653 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4657 get_subtarget (rtx x
)
4661 /* Only registers can be subtargets. */
4663 /* Don't use hard regs to avoid extending their life. */
4664 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4668 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4669 FIELD is a bitfield. Returns true if the optimization was successful,
4670 and there's nothing else to do. */
4673 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4674 poly_uint64 pbitpos
,
4675 poly_uint64 pbitregion_start
,
4676 poly_uint64 pbitregion_end
,
4677 machine_mode mode1
, rtx str_rtx
,
4678 tree to
, tree src
, bool reverse
)
4680 /* str_mode is not guaranteed to be a scalar type. */
4681 machine_mode str_mode
= GET_MODE (str_rtx
);
4682 unsigned int str_bitsize
;
4687 enum tree_code code
;
4689 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4690 if (mode1
!= VOIDmode
4691 || !pbitsize
.is_constant (&bitsize
)
4692 || !pbitpos
.is_constant (&bitpos
)
4693 || !pbitregion_start
.is_constant (&bitregion_start
)
4694 || !pbitregion_end
.is_constant (&bitregion_end
)
4695 || bitsize
>= BITS_PER_WORD
4696 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4697 || str_bitsize
> BITS_PER_WORD
4698 || TREE_SIDE_EFFECTS (to
)
4699 || TREE_THIS_VOLATILE (to
))
4703 if (TREE_CODE (src
) != SSA_NAME
)
4705 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4708 srcstmt
= get_gimple_for_ssa_name (src
);
4710 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4713 code
= gimple_assign_rhs_code (srcstmt
);
4715 op0
= gimple_assign_rhs1 (srcstmt
);
4717 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4718 to find its initialization. Hopefully the initialization will
4719 be from a bitfield load. */
4720 if (TREE_CODE (op0
) == SSA_NAME
)
4722 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4724 /* We want to eventually have OP0 be the same as TO, which
4725 should be a bitfield. */
4727 || !is_gimple_assign (op0stmt
)
4728 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4730 op0
= gimple_assign_rhs1 (op0stmt
);
4733 op1
= gimple_assign_rhs2 (srcstmt
);
4735 if (!operand_equal_p (to
, op0
, 0))
4738 if (MEM_P (str_rtx
))
4740 unsigned HOST_WIDE_INT offset1
;
4742 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4743 str_bitsize
= BITS_PER_WORD
;
4745 scalar_int_mode best_mode
;
4746 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4747 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4749 str_mode
= best_mode
;
4750 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4753 bitpos
%= str_bitsize
;
4754 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4755 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4757 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4760 /* If the bit field covers the whole REG/MEM, store_field
4761 will likely generate better code. */
4762 if (bitsize
>= str_bitsize
)
4765 /* We can't handle fields split across multiple entities. */
4766 if (bitpos
+ bitsize
> str_bitsize
)
4769 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4770 bitpos
= str_bitsize
- bitpos
- bitsize
;
4776 /* For now, just optimize the case of the topmost bitfield
4777 where we don't need to do any masking and also
4778 1 bit bitfields where xor can be used.
4779 We might win by one instruction for the other bitfields
4780 too if insv/extv instructions aren't used, so that
4781 can be added later. */
4782 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4783 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4786 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4787 value
= convert_modes (str_mode
,
4788 TYPE_MODE (TREE_TYPE (op1
)), value
,
4789 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4791 /* We may be accessing data outside the field, which means
4792 we can alias adjacent data. */
4793 if (MEM_P (str_rtx
))
4795 str_rtx
= shallow_copy_rtx (str_rtx
);
4796 set_mem_alias_set (str_rtx
, 0);
4797 set_mem_expr (str_rtx
, 0);
4800 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4802 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4806 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4808 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4810 value
= flip_storage_order (str_mode
, value
);
4811 result
= expand_binop (str_mode
, binop
, str_rtx
,
4812 value
, str_rtx
, 1, OPTAB_WIDEN
);
4813 if (result
!= str_rtx
)
4814 emit_move_insn (str_rtx
, result
);
4819 if (TREE_CODE (op1
) != INTEGER_CST
)
4821 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4822 value
= convert_modes (str_mode
,
4823 TYPE_MODE (TREE_TYPE (op1
)), value
,
4824 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4826 /* We may be accessing data outside the field, which means
4827 we can alias adjacent data. */
4828 if (MEM_P (str_rtx
))
4830 str_rtx
= shallow_copy_rtx (str_rtx
);
4831 set_mem_alias_set (str_rtx
, 0);
4832 set_mem_expr (str_rtx
, 0);
4835 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4836 if (bitpos
+ bitsize
!= str_bitsize
)
4838 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4840 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4842 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4844 value
= flip_storage_order (str_mode
, value
);
4845 result
= expand_binop (str_mode
, binop
, str_rtx
,
4846 value
, str_rtx
, 1, OPTAB_WIDEN
);
4847 if (result
!= str_rtx
)
4848 emit_move_insn (str_rtx
, result
);
4858 /* In the C++ memory model, consecutive bit fields in a structure are
4859 considered one memory location.
4861 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4862 returns the bit range of consecutive bits in which this COMPONENT_REF
4863 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4864 and *OFFSET may be adjusted in the process.
4866 If the access does not need to be restricted, 0 is returned in both
4867 *BITSTART and *BITEND. */
4870 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4871 poly_int64_pod
*bitpos
, tree
*offset
)
4873 poly_int64 bitoffset
;
4876 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4878 field
= TREE_OPERAND (exp
, 1);
4879 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4880 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4881 need to limit the range we can access. */
4884 *bitstart
= *bitend
= 0;
4888 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4889 part of a larger bit field, then the representative does not serve any
4890 useful purpose. This can occur in Ada. */
4891 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4894 poly_int64 rbitsize
, rbitpos
;
4896 int unsignedp
, reversep
, volatilep
= 0;
4897 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4898 &roffset
, &rmode
, &unsignedp
, &reversep
,
4900 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4902 *bitstart
= *bitend
= 0;
4907 /* Compute the adjustment to bitpos from the offset of the field
4908 relative to the representative. DECL_FIELD_OFFSET of field and
4909 repr are the same by construction if they are not constants,
4910 see finish_bitfield_layout. */
4911 poly_uint64 field_offset
, repr_offset
;
4912 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4913 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4914 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4917 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4918 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4920 /* If the adjustment is larger than bitpos, we would have a negative bit
4921 position for the lower bound and this may wreak havoc later. Adjust
4922 offset and bitpos to make the lower bound non-negative in that case. */
4923 if (maybe_gt (bitoffset
, *bitpos
))
4925 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4926 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4928 *bitpos
+= adjust_bits
;
4929 if (*offset
== NULL_TREE
)
4930 *offset
= size_int (-adjust_bytes
);
4932 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
4936 *bitstart
= *bitpos
- bitoffset
;
4938 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
4941 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4942 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4943 DECL_RTL was not set yet, return NORTL. */
4946 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4948 if (TREE_CODE (addr
) != ADDR_EXPR
)
4951 tree base
= TREE_OPERAND (addr
, 0);
4954 || TREE_ADDRESSABLE (base
)
4955 || DECL_MODE (base
) == BLKmode
)
4958 if (!DECL_RTL_SET_P (base
))
4961 return (!MEM_P (DECL_RTL (base
)));
4964 /* Returns true if the MEM_REF REF refers to an object that does not
4965 reside in memory and has non-BLKmode. */
4968 mem_ref_refers_to_non_mem_p (tree ref
)
4970 tree base
= TREE_OPERAND (ref
, 0);
4971 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4974 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4975 is true, try generating a nontemporal store. */
4978 expand_assignment (tree to
, tree from
, bool nontemporal
)
4984 enum insn_code icode
;
4986 /* Don't crash if the lhs of the assignment was erroneous. */
4987 if (TREE_CODE (to
) == ERROR_MARK
)
4989 expand_normal (from
);
4993 /* Optimize away no-op moves without side-effects. */
4994 if (operand_equal_p (to
, from
, 0))
4997 /* Handle misaligned stores. */
4998 mode
= TYPE_MODE (TREE_TYPE (to
));
4999 if ((TREE_CODE (to
) == MEM_REF
5000 || TREE_CODE (to
) == TARGET_MEM_REF
)
5002 && !mem_ref_refers_to_non_mem_p (to
)
5003 && ((align
= get_object_alignment (to
))
5004 < GET_MODE_ALIGNMENT (mode
))
5005 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5006 != CODE_FOR_nothing
)
5007 || targetm
.slow_unaligned_access (mode
, align
)))
5011 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5012 reg
= force_not_mem (reg
);
5013 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5014 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5015 reg
= flip_storage_order (mode
, reg
);
5017 if (icode
!= CODE_FOR_nothing
)
5019 struct expand_operand ops
[2];
5021 create_fixed_operand (&ops
[0], mem
);
5022 create_input_operand (&ops
[1], reg
, mode
);
5023 /* The movmisalign<mode> pattern cannot fail, else the assignment
5024 would silently be omitted. */
5025 expand_insn (icode
, 2, ops
);
5028 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5033 /* Assignment of a structure component needs special treatment
5034 if the structure component's rtx is not simply a MEM.
5035 Assignment of an array element at a constant index, and assignment of
5036 an array element in an unaligned packed structure field, has the same
5037 problem. Same for (partially) storing into a non-memory object. */
5038 if (handled_component_p (to
)
5039 || (TREE_CODE (to
) == MEM_REF
5040 && (REF_REVERSE_STORAGE_ORDER (to
)
5041 || mem_ref_refers_to_non_mem_p (to
)))
5042 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5045 poly_int64 bitsize
, bitpos
;
5046 poly_uint64 bitregion_start
= 0;
5047 poly_uint64 bitregion_end
= 0;
5049 int unsignedp
, reversep
, volatilep
= 0;
5053 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5054 &unsignedp
, &reversep
, &volatilep
);
5056 /* Make sure bitpos is not negative, it can wreak havoc later. */
5057 if (maybe_lt (bitpos
, 0))
5059 gcc_assert (offset
== NULL_TREE
);
5060 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5061 bitpos
= num_trailing_bits (bitpos
);
5064 if (TREE_CODE (to
) == COMPONENT_REF
5065 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5066 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5067 /* The C++ memory model naturally applies to byte-aligned fields.
5068 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5069 BITSIZE are not byte-aligned, there is no need to limit the range
5070 we can access. This can occur with packed structures in Ada. */
5071 else if (maybe_gt (bitsize
, 0)
5072 && multiple_p (bitsize
, BITS_PER_UNIT
)
5073 && multiple_p (bitpos
, BITS_PER_UNIT
))
5075 bitregion_start
= bitpos
;
5076 bitregion_end
= bitpos
+ bitsize
- 1;
5079 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5081 /* If the field has a mode, we want to access it in the
5082 field's mode, not the computed mode.
5083 If a MEM has VOIDmode (external with incomplete type),
5084 use BLKmode for it instead. */
5087 if (mode1
!= VOIDmode
)
5088 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5089 else if (GET_MODE (to_rtx
) == VOIDmode
)
5090 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5095 machine_mode address_mode
;
5098 if (!MEM_P (to_rtx
))
5100 /* We can get constant negative offsets into arrays with broken
5101 user code. Translate this to a trap instead of ICEing. */
5102 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5103 expand_builtin_trap ();
5104 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5107 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5108 address_mode
= get_address_mode (to_rtx
);
5109 if (GET_MODE (offset_rtx
) != address_mode
)
5111 /* We cannot be sure that the RTL in offset_rtx is valid outside
5112 of a memory address context, so force it into a register
5113 before attempting to convert it to the desired mode. */
5114 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5115 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5118 /* If we have an expression in OFFSET_RTX and a non-zero
5119 byte offset in BITPOS, adding the byte offset before the
5120 OFFSET_RTX results in better intermediate code, which makes
5121 later rtl optimization passes perform better.
5123 We prefer intermediate code like this:
5125 r124:DI=r123:DI+0x18
5130 r124:DI=r123:DI+0x10
5131 [r124:DI+0x8]=r121:DI
5133 This is only done for aligned data values, as these can
5134 be expected to result in single move instructions. */
5136 if (mode1
!= VOIDmode
5137 && maybe_ne (bitpos
, 0)
5138 && maybe_gt (bitsize
, 0)
5139 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5140 && multiple_p (bitpos
, bitsize
)
5141 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5142 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5144 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5145 bitregion_start
= 0;
5146 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5147 bitregion_end
-= bitpos
;
5151 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5152 highest_pow2_factor_for_target (to
,
5156 /* No action is needed if the target is not a memory and the field
5157 lies completely outside that target. This can occur if the source
5158 code contains an out-of-bounds access to a small array. */
5160 && GET_MODE (to_rtx
) != BLKmode
5161 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5163 expand_normal (from
);
5166 /* Handle expand_expr of a complex value returning a CONCAT. */
5167 else if (GET_CODE (to_rtx
) == CONCAT
)
5169 machine_mode to_mode
= GET_MODE (to_rtx
);
5170 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5171 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5172 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5173 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5174 && known_eq (bitpos
, 0)
5175 && known_eq (bitsize
, mode_bitsize
))
5176 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5177 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5178 && known_eq (bitsize
, inner_bitsize
)
5179 && (known_eq (bitpos
, 0)
5180 || known_eq (bitpos
, inner_bitsize
)))
5181 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5182 false, nontemporal
, reversep
);
5183 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5184 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5185 bitregion_start
, bitregion_end
,
5186 mode1
, from
, get_alias_set (to
),
5187 nontemporal
, reversep
);
5188 else if (known_ge (bitpos
, inner_bitsize
))
5189 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5190 bitpos
- inner_bitsize
,
5191 bitregion_start
, bitregion_end
,
5192 mode1
, from
, get_alias_set (to
),
5193 nontemporal
, reversep
);
5194 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5196 result
= expand_normal (from
);
5197 if (GET_CODE (result
) == CONCAT
)
5199 to_mode
= GET_MODE_INNER (to_mode
);
5200 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5202 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5205 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5207 if (!from_real
|| !from_imag
)
5208 goto concat_store_slow
;
5209 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5210 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5215 = simplify_gen_subreg (to_mode
, result
,
5216 TYPE_MODE (TREE_TYPE (from
)), 0);
5219 emit_move_insn (XEXP (to_rtx
, 0),
5220 read_complex_part (from_rtx
, false));
5221 emit_move_insn (XEXP (to_rtx
, 1),
5222 read_complex_part (from_rtx
, true));
5226 machine_mode to_mode
5227 = GET_MODE_INNER (GET_MODE (to_rtx
));
5229 = simplify_gen_subreg (to_mode
, result
,
5230 TYPE_MODE (TREE_TYPE (from
)),
5233 = simplify_gen_subreg (to_mode
, result
,
5234 TYPE_MODE (TREE_TYPE (from
)),
5235 GET_MODE_SIZE (to_mode
));
5236 if (!from_real
|| !from_imag
)
5237 goto concat_store_slow
;
5238 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5239 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5246 rtx temp
= assign_stack_temp (to_mode
,
5247 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5248 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5249 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5250 result
= store_field (temp
, bitsize
, bitpos
,
5251 bitregion_start
, bitregion_end
,
5252 mode1
, from
, get_alias_set (to
),
5253 nontemporal
, reversep
);
5254 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5255 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5258 /* For calls to functions returning variable length structures, if TO_RTX
5259 is not a MEM, go through a MEM because we must not create temporaries
5261 else if (!MEM_P (to_rtx
)
5262 && TREE_CODE (from
) == CALL_EXPR
5263 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5264 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
5266 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5267 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5268 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
5269 bitregion_end
, mode1
, from
, get_alias_set (to
),
5270 nontemporal
, reversep
);
5271 emit_move_insn (to_rtx
, temp
);
5277 /* If the field is at offset zero, we could have been given the
5278 DECL_RTX of the parent struct. Don't munge it. */
5279 to_rtx
= shallow_copy_rtx (to_rtx
);
5280 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5282 MEM_VOLATILE_P (to_rtx
) = 1;
5285 gcc_checking_assert (known_ge (bitpos
, 0));
5286 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5287 bitregion_start
, bitregion_end
,
5288 mode1
, to_rtx
, to
, from
,
5292 result
= store_field (to_rtx
, bitsize
, bitpos
,
5293 bitregion_start
, bitregion_end
,
5294 mode1
, from
, get_alias_set (to
),
5295 nontemporal
, reversep
);
5299 preserve_temp_slots (result
);
5304 /* If the rhs is a function call and its value is not an aggregate,
5305 call the function before we start to compute the lhs.
5306 This is needed for correct code for cases such as
5307 val = setjmp (buf) on machines where reference to val
5308 requires loading up part of an address in a separate insn.
5310 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5311 since it might be a promoted variable where the zero- or sign- extension
5312 needs to be done. Handling this in the normal way is safe because no
5313 computation is done before the call. The same is true for SSA names. */
5314 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5315 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5316 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5318 || TREE_CODE (to
) == PARM_DECL
5319 || TREE_CODE (to
) == RESULT_DECL
)
5320 && REG_P (DECL_RTL (to
)))
5321 || TREE_CODE (to
) == SSA_NAME
))
5326 value
= expand_normal (from
);
5329 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5331 /* Handle calls that return values in multiple non-contiguous locations.
5332 The Irix 6 ABI has examples of this. */
5333 if (GET_CODE (to_rtx
) == PARALLEL
)
5335 if (GET_CODE (value
) == PARALLEL
)
5336 emit_group_move (to_rtx
, value
);
5338 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5339 int_size_in_bytes (TREE_TYPE (from
)));
5341 else if (GET_CODE (value
) == PARALLEL
)
5342 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5343 int_size_in_bytes (TREE_TYPE (from
)));
5344 else if (GET_MODE (to_rtx
) == BLKmode
)
5346 /* Handle calls that return BLKmode values in registers. */
5348 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5350 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5354 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5355 value
= convert_memory_address_addr_space
5356 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5357 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5359 emit_move_insn (to_rtx
, value
);
5362 preserve_temp_slots (to_rtx
);
5367 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5368 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5370 /* Don't move directly into a return register. */
5371 if (TREE_CODE (to
) == RESULT_DECL
5372 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5378 /* If the source is itself a return value, it still is in a pseudo at
5379 this point so we can move it back to the return register directly. */
5381 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5382 && TREE_CODE (from
) != CALL_EXPR
)
5383 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5385 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5387 /* Handle calls that return values in multiple non-contiguous locations.
5388 The Irix 6 ABI has examples of this. */
5389 if (GET_CODE (to_rtx
) == PARALLEL
)
5391 if (GET_CODE (temp
) == PARALLEL
)
5392 emit_group_move (to_rtx
, temp
);
5394 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5395 int_size_in_bytes (TREE_TYPE (from
)));
5398 emit_move_insn (to_rtx
, temp
);
5400 preserve_temp_slots (to_rtx
);
5405 /* In case we are returning the contents of an object which overlaps
5406 the place the value is being stored, use a safe function when copying
5407 a value through a pointer into a structure value return block. */
5408 if (TREE_CODE (to
) == RESULT_DECL
5409 && TREE_CODE (from
) == INDIRECT_REF
5410 && ADDR_SPACE_GENERIC_P
5411 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5412 && refs_may_alias_p (to
, from
)
5413 && cfun
->returns_struct
5414 && !cfun
->returns_pcc_struct
)
5419 size
= expr_size (from
);
5420 from_rtx
= expand_normal (from
);
5422 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5424 preserve_temp_slots (to_rtx
);
5429 /* Compute FROM and store the value in the rtx we got. */
5432 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5433 preserve_temp_slots (result
);
5438 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5439 succeeded, false otherwise. */
5442 emit_storent_insn (rtx to
, rtx from
)
5444 struct expand_operand ops
[2];
5445 machine_mode mode
= GET_MODE (to
);
5446 enum insn_code code
= optab_handler (storent_optab
, mode
);
5448 if (code
== CODE_FOR_nothing
)
5451 create_fixed_operand (&ops
[0], to
);
5452 create_input_operand (&ops
[1], from
, mode
);
5453 return maybe_expand_insn (code
, 2, ops
);
5456 /* Helper function for store_expr storing of STRING_CST. */
5459 string_cst_read_str (void *data
, HOST_WIDE_INT offset
, scalar_int_mode mode
)
5461 tree str
= (tree
) data
;
5463 gcc_assert (offset
>= 0);
5464 if (offset
>= TREE_STRING_LENGTH (str
))
5467 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
5468 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
5470 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
5471 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
5472 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
5473 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
5474 return c_readstr (p
, mode
, false);
5477 return c_readstr (TREE_STRING_POINTER (str
) + offset
, mode
, false);
5480 /* Generate code for computing expression EXP,
5481 and storing the value into TARGET.
5483 If the mode is BLKmode then we may return TARGET itself.
5484 It turns out that in BLKmode it doesn't cause a problem.
5485 because C has no operators that could combine two different
5486 assignments into the same BLKmode object with different values
5487 with no sequence point. Will other languages need this to
5490 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5491 stack, and block moves may need to be treated specially.
5493 If NONTEMPORAL is true, try using a nontemporal store instruction.
5495 If REVERSE is true, the store is to be done in reverse order. */
5498 store_expr (tree exp
, rtx target
, int call_param_p
,
5499 bool nontemporal
, bool reverse
)
5502 rtx alt_rtl
= NULL_RTX
;
5503 location_t loc
= curr_insn_location ();
5505 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5507 /* C++ can generate ?: expressions with a throw expression in one
5508 branch and an rvalue in the other. Here, we resolve attempts to
5509 store the throw expression's nonexistent result. */
5510 gcc_assert (!call_param_p
);
5511 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5514 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5516 /* Perform first part of compound expression, then assign from second
5518 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5519 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5520 return store_expr (TREE_OPERAND (exp
, 1), target
,
5521 call_param_p
, nontemporal
, reverse
);
5523 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5525 /* For conditional expression, get safe form of the target. Then
5526 test the condition, doing the appropriate assignment on either
5527 side. This avoids the creation of unnecessary temporaries.
5528 For non-BLKmode, it is more efficient not to do this. */
5530 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5532 do_pending_stack_adjust ();
5534 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5535 profile_probability::uninitialized ());
5536 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5537 nontemporal
, reverse
);
5538 emit_jump_insn (targetm
.gen_jump (lab2
));
5541 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5542 nontemporal
, reverse
);
5548 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5549 /* If this is a scalar in a register that is stored in a wider mode
5550 than the declared mode, compute the result into its declared mode
5551 and then convert to the wider mode. Our value is the computed
5554 rtx inner_target
= 0;
5555 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5556 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5558 /* We can do the conversion inside EXP, which will often result
5559 in some optimizations. Do the conversion in two steps: first
5560 change the signedness, if needed, then the extend. But don't
5561 do this if the type of EXP is a subtype of something else
5562 since then the conversion might involve more than just
5563 converting modes. */
5564 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5565 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5566 && GET_MODE_PRECISION (outer_mode
)
5567 == TYPE_PRECISION (TREE_TYPE (exp
)))
5569 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5570 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5572 /* Some types, e.g. Fortran's logical*4, won't have a signed
5573 version, so use the mode instead. */
5575 = (signed_or_unsigned_type_for
5576 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5578 ntype
= lang_hooks
.types
.type_for_mode
5579 (TYPE_MODE (TREE_TYPE (exp
)),
5580 SUBREG_PROMOTED_SIGN (target
));
5582 exp
= fold_convert_loc (loc
, ntype
, exp
);
5585 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5586 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5589 inner_target
= SUBREG_REG (target
);
5592 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5593 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5596 /* If TEMP is a VOIDmode constant, use convert_modes to make
5597 sure that we properly convert it. */
5598 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5600 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5601 temp
, SUBREG_PROMOTED_SIGN (target
));
5602 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5603 SUBREG_PROMOTED_SIGN (target
));
5606 convert_move (SUBREG_REG (target
), temp
,
5607 SUBREG_PROMOTED_SIGN (target
));
5611 else if ((TREE_CODE (exp
) == STRING_CST
5612 || (TREE_CODE (exp
) == MEM_REF
5613 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5614 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5616 && integer_zerop (TREE_OPERAND (exp
, 1))))
5617 && !nontemporal
&& !call_param_p
5620 /* Optimize initialization of an array with a STRING_CST. */
5621 HOST_WIDE_INT exp_len
, str_copy_len
;
5623 tree str
= TREE_CODE (exp
) == STRING_CST
5624 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5626 exp_len
= int_expr_size (exp
);
5630 if (TREE_STRING_LENGTH (str
) <= 0)
5633 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
5634 MEM_ALIGN (target
), false))
5636 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
5637 MEM_ALIGN (target
), false, RETURN_BEGIN
);
5641 str_copy_len
= TREE_STRING_LENGTH (str
);
5642 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
5644 str_copy_len
+= STORE_MAX_PIECES
- 1;
5645 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5647 if (str_copy_len
>= exp_len
)
5650 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
5651 (void *) str
, MEM_ALIGN (target
), false))
5654 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
5655 (void *) str
, MEM_ALIGN (target
), false,
5657 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5658 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
5666 /* If we want to use a nontemporal or a reverse order store, force the
5667 value into a register first. */
5668 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5669 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5671 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5675 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5676 the same as that of TARGET, adjust the constant. This is needed, for
5677 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5678 only a word-sized value. */
5679 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5680 && TREE_CODE (exp
) != ERROR_MARK
5681 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5683 if (GET_MODE_CLASS (GET_MODE (target
))
5684 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5685 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5686 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5688 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5689 TYPE_MODE (TREE_TYPE (exp
)), 0);
5693 if (GET_MODE (temp
) == VOIDmode
)
5694 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5695 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5698 /* If value was not generated in the target, store it there.
5699 Convert the value to TARGET's type first if necessary and emit the
5700 pending incrementations that have been queued when expanding EXP.
5701 Note that we cannot emit the whole queue blindly because this will
5702 effectively disable the POST_INC optimization later.
5704 If TEMP and TARGET compare equal according to rtx_equal_p, but
5705 one or both of them are volatile memory refs, we have to distinguish
5707 - expand_expr has used TARGET. In this case, we must not generate
5708 another copy. This can be detected by TARGET being equal according
5710 - expand_expr has not used TARGET - that means that the source just
5711 happens to have the same RTX form. Since temp will have been created
5712 by expand_expr, it will compare unequal according to == .
5713 We must generate a copy in this case, to reach the correct number
5714 of volatile memory references. */
5716 if ((! rtx_equal_p (temp
, target
)
5717 || (temp
!= target
&& (side_effects_p (temp
)
5718 || side_effects_p (target
))))
5719 && TREE_CODE (exp
) != ERROR_MARK
5720 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5721 but TARGET is not valid memory reference, TEMP will differ
5722 from TARGET although it is really the same location. */
5724 && rtx_equal_p (alt_rtl
, target
)
5725 && !side_effects_p (alt_rtl
)
5726 && !side_effects_p (target
))
5727 /* If there's nothing to copy, don't bother. Don't call
5728 expr_size unless necessary, because some front-ends (C++)
5729 expr_size-hook must not be given objects that are not
5730 supposed to be bit-copied or bit-initialized. */
5731 && expr_size (exp
) != const0_rtx
)
5733 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5735 if (GET_MODE (target
) == BLKmode
)
5737 /* Handle calls that return BLKmode values in registers. */
5738 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5739 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5741 store_bit_field (target
,
5742 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5743 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5746 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5749 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5751 /* Handle copying a string constant into an array. The string
5752 constant may be shorter than the array. So copy just the string's
5753 actual length, and clear the rest. First get the size of the data
5754 type of the string, which is actually the size of the target. */
5755 rtx size
= expr_size (exp
);
5757 if (CONST_INT_P (size
)
5758 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5759 emit_block_move (target
, temp
, size
,
5761 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5764 machine_mode pointer_mode
5765 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5766 machine_mode address_mode
= get_address_mode (target
);
5768 /* Compute the size of the data to copy from the string. */
5770 = size_binop_loc (loc
, MIN_EXPR
,
5771 make_tree (sizetype
, size
),
5772 size_int (TREE_STRING_LENGTH (exp
)));
5774 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5776 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5777 rtx_code_label
*label
= 0;
5779 /* Copy that much. */
5780 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5781 TYPE_UNSIGNED (sizetype
));
5782 emit_block_move (target
, temp
, copy_size_rtx
,
5784 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5786 /* Figure out how much is left in TARGET that we have to clear.
5787 Do all calculations in pointer_mode. */
5788 poly_int64 const_copy_size
;
5789 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
5791 size
= plus_constant (address_mode
, size
, -const_copy_size
);
5792 target
= adjust_address (target
, BLKmode
, const_copy_size
);
5796 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5797 copy_size_rtx
, NULL_RTX
, 0,
5800 if (GET_MODE (copy_size_rtx
) != address_mode
)
5801 copy_size_rtx
= convert_to_mode (address_mode
,
5803 TYPE_UNSIGNED (sizetype
));
5805 target
= offset_address (target
, copy_size_rtx
,
5806 highest_pow2_factor (copy_size
));
5807 label
= gen_label_rtx ();
5808 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5809 GET_MODE (size
), 0, label
);
5812 if (size
!= const0_rtx
)
5813 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5819 /* Handle calls that return values in multiple non-contiguous locations.
5820 The Irix 6 ABI has examples of this. */
5821 else if (GET_CODE (target
) == PARALLEL
)
5823 if (GET_CODE (temp
) == PARALLEL
)
5824 emit_group_move (target
, temp
);
5826 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5827 int_size_in_bytes (TREE_TYPE (exp
)));
5829 else if (GET_CODE (temp
) == PARALLEL
)
5830 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5831 int_size_in_bytes (TREE_TYPE (exp
)));
5832 else if (GET_MODE (temp
) == BLKmode
)
5833 emit_block_move (target
, temp
, expr_size (exp
),
5835 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5836 /* If we emit a nontemporal store, there is nothing else to do. */
5837 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5842 temp
= flip_storage_order (GET_MODE (target
), temp
);
5843 temp
= force_operand (temp
, target
);
5845 emit_move_insn (target
, temp
);
5852 /* Return true if field F of structure TYPE is a flexible array. */
5855 flexible_array_member_p (const_tree f
, const_tree type
)
5860 return (DECL_CHAIN (f
) == NULL
5861 && TREE_CODE (tf
) == ARRAY_TYPE
5863 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5864 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5865 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5866 && int_size_in_bytes (type
) >= 0);
5869 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5870 must have in order for it to completely initialize a value of type TYPE.
5871 Return -1 if the number isn't known.
5873 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5875 static HOST_WIDE_INT
5876 count_type_elements (const_tree type
, bool for_ctor_p
)
5878 switch (TREE_CODE (type
))
5884 nelts
= array_type_nelts (type
);
5885 if (nelts
&& tree_fits_uhwi_p (nelts
))
5887 unsigned HOST_WIDE_INT n
;
5889 n
= tree_to_uhwi (nelts
) + 1;
5890 if (n
== 0 || for_ctor_p
)
5893 return n
* count_type_elements (TREE_TYPE (type
), false);
5895 return for_ctor_p
? -1 : 1;
5900 unsigned HOST_WIDE_INT n
;
5904 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5905 if (TREE_CODE (f
) == FIELD_DECL
)
5908 n
+= count_type_elements (TREE_TYPE (f
), false);
5909 else if (!flexible_array_member_p (f
, type
))
5910 /* Don't count flexible arrays, which are not supposed
5911 to be initialized. */
5919 case QUAL_UNION_TYPE
:
5924 gcc_assert (!for_ctor_p
);
5925 /* Estimate the number of scalars in each field and pick the
5926 maximum. Other estimates would do instead; the idea is simply
5927 to make sure that the estimate is not sensitive to the ordering
5930 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5931 if (TREE_CODE (f
) == FIELD_DECL
)
5933 m
= count_type_elements (TREE_TYPE (f
), false);
5934 /* If the field doesn't span the whole union, add an extra
5935 scalar for the rest. */
5936 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5937 TYPE_SIZE (type
)) != 1)
5950 unsigned HOST_WIDE_INT nelts
;
5951 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
5959 case FIXED_POINT_TYPE
:
5964 case REFERENCE_TYPE
:
5980 /* Helper for categorize_ctor_elements. Identical interface. */
5983 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5984 HOST_WIDE_INT
*p_unique_nz_elts
,
5985 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5987 unsigned HOST_WIDE_INT idx
;
5988 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
5989 tree value
, purpose
, elt_type
;
5991 /* Whether CTOR is a valid constant initializer, in accordance with what
5992 initializer_constant_valid_p does. If inferred from the constructor
5993 elements, true until proven otherwise. */
5994 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5995 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
6001 elt_type
= NULL_TREE
;
6003 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
6005 HOST_WIDE_INT mult
= 1;
6007 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
6009 tree lo_index
= TREE_OPERAND (purpose
, 0);
6010 tree hi_index
= TREE_OPERAND (purpose
, 1);
6012 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6013 mult
= (tree_to_uhwi (hi_index
)
6014 - tree_to_uhwi (lo_index
) + 1);
6017 elt_type
= TREE_TYPE (value
);
6019 switch (TREE_CODE (value
))
6023 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
6025 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
6028 nz_elts
+= mult
* nz
;
6029 unique_nz_elts
+= unz
;
6030 init_elts
+= mult
* ic
;
6032 if (const_from_elts_p
&& const_p
)
6033 const_p
= const_elt_p
;
6040 if (!initializer_zerop (value
))
6049 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6050 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
6051 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6055 if (!initializer_zerop (TREE_REALPART (value
)))
6060 if (!initializer_zerop (TREE_IMAGPART (value
)))
6065 init_elts
+= 2 * mult
;
6070 /* We can only construct constant-length vectors using
6072 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6073 for (unsigned int i
= 0; i
< nunits
; ++i
)
6075 tree v
= VECTOR_CST_ELT (value
, i
);
6076 if (!initializer_zerop (v
))
6088 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6089 nz_elts
+= mult
* tc
;
6090 unique_nz_elts
+= tc
;
6091 init_elts
+= mult
* tc
;
6093 if (const_from_elts_p
&& const_p
)
6095 = initializer_constant_valid_p (value
,
6097 TYPE_REVERSE_STORAGE_ORDER
6105 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6106 num_fields
, elt_type
))
6107 *p_complete
= false;
6109 *p_nz_elts
+= nz_elts
;
6110 *p_unique_nz_elts
+= unique_nz_elts
;
6111 *p_init_elts
+= init_elts
;
6116 /* Examine CTOR to discover:
6117 * how many scalar fields are set to nonzero values,
6118 and place it in *P_NZ_ELTS;
6119 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6120 high - low + 1 (this can be useful for callers to determine ctors
6121 that could be cheaply initialized with - perhaps nested - loops
6122 compared to copied from huge read-only data),
6123 and place it in *P_UNIQUE_NZ_ELTS;
6124 * how many scalar fields in total are in CTOR,
6125 and place it in *P_ELT_COUNT.
6126 * whether the constructor is complete -- in the sense that every
6127 meaningful byte is explicitly given a value --
6128 and place it in *P_COMPLETE.
6130 Return whether or not CTOR is a valid static constant initializer, the same
6131 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6134 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6135 HOST_WIDE_INT
*p_unique_nz_elts
,
6136 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6139 *p_unique_nz_elts
= 0;
6143 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
6144 p_init_elts
, p_complete
);
6147 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6148 of which had type LAST_TYPE. Each element was itself a complete
6149 initializer, in the sense that every meaningful byte was explicitly
6150 given a value. Return true if the same is true for the constructor
6154 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6155 const_tree last_type
)
6157 if (TREE_CODE (type
) == UNION_TYPE
6158 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6163 gcc_assert (num_elts
== 1 && last_type
);
6165 /* ??? We could look at each element of the union, and find the
6166 largest element. Which would avoid comparing the size of the
6167 initialized element against any tail padding in the union.
6168 Doesn't seem worth the effort... */
6169 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6172 return count_type_elements (type
, true) == num_elts
;
6175 /* Return 1 if EXP contains mostly (3/4) zeros. */
6178 mostly_zeros_p (const_tree exp
)
6180 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6182 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6185 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6187 return !complete_p
|| nz_elts
< init_elts
/ 4;
6190 return initializer_zerop (exp
);
6193 /* Return 1 if EXP contains all zeros. */
6196 all_zeros_p (const_tree exp
)
6198 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6200 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6203 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6205 return nz_elts
== 0;
6208 return initializer_zerop (exp
);
6211 /* Helper function for store_constructor.
6212 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6213 CLEARED is as for store_constructor.
6214 ALIAS_SET is the alias set to use for any stores.
6215 If REVERSE is true, the store is to be done in reverse order.
6217 This provides a recursive shortcut back to store_constructor when it isn't
6218 necessary to go through store_field. This is so that we can pass through
6219 the cleared field to let store_constructor know that we may not have to
6220 clear a substructure if the outer structure has already been cleared. */
6223 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6224 poly_uint64 bitregion_start
,
6225 poly_uint64 bitregion_end
,
6227 tree exp
, int cleared
,
6228 alias_set_type alias_set
, bool reverse
)
6231 poly_uint64 bytesize
;
6232 if (TREE_CODE (exp
) == CONSTRUCTOR
6233 /* We can only call store_constructor recursively if the size and
6234 bit position are on a byte boundary. */
6235 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6236 && maybe_ne (bitsize
, 0U)
6237 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6238 /* If we have a nonzero bitpos for a register target, then we just
6239 let store_field do the bitfield handling. This is unlikely to
6240 generate unnecessary clear instructions anyways. */
6241 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6245 machine_mode target_mode
= GET_MODE (target
);
6246 if (target_mode
!= BLKmode
6247 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6248 target_mode
= BLKmode
;
6249 target
= adjust_address (target
, target_mode
, bytepos
);
6253 /* Update the alias set, if required. */
6254 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6255 && MEM_ALIAS_SET (target
) != 0)
6257 target
= copy_rtx (target
);
6258 set_mem_alias_set (target
, alias_set
);
6261 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6264 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6265 exp
, alias_set
, false, reverse
);
6269 /* Returns the number of FIELD_DECLs in TYPE. */
6272 fields_length (const_tree type
)
6274 tree t
= TYPE_FIELDS (type
);
6277 for (; t
; t
= DECL_CHAIN (t
))
6278 if (TREE_CODE (t
) == FIELD_DECL
)
6285 /* Store the value of constructor EXP into the rtx TARGET.
6286 TARGET is either a REG or a MEM; we know it cannot conflict, since
6287 safe_from_p has been called.
6288 CLEARED is true if TARGET is known to have been zero'd.
6289 SIZE is the number of bytes of TARGET we are allowed to modify: this
6290 may not be the same as the size of EXP if we are assigning to a field
6291 which has been packed to exclude padding bits.
6292 If REVERSE is true, the store is to be done in reverse order. */
6295 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6298 tree type
= TREE_TYPE (exp
);
6299 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6300 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6302 switch (TREE_CODE (type
))
6306 case QUAL_UNION_TYPE
:
6308 unsigned HOST_WIDE_INT idx
;
6311 /* The storage order is specified for every aggregate type. */
6312 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6314 /* If size is zero or the target is already cleared, do nothing. */
6315 if (known_eq (size
, 0) || cleared
)
6317 /* We either clear the aggregate or indicate the value is dead. */
6318 else if ((TREE_CODE (type
) == UNION_TYPE
6319 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6320 && ! CONSTRUCTOR_ELTS (exp
))
6321 /* If the constructor is empty, clear the union. */
6323 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6327 /* If we are building a static constructor into a register,
6328 set the initial value as zero so we can fold the value into
6329 a constant. But if more than one register is involved,
6330 this probably loses. */
6331 else if (REG_P (target
) && TREE_STATIC (exp
)
6332 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6333 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6335 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6339 /* If the constructor has fewer fields than the structure or
6340 if we are initializing the structure to mostly zeros, clear
6341 the whole structure first. Don't do this if TARGET is a
6342 register whose mode size isn't equal to SIZE since
6343 clear_storage can't handle this case. */
6344 else if (known_size_p (size
)
6345 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6346 || mostly_zeros_p (exp
))
6348 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6350 clear_storage (target
, gen_int_mode (size
, Pmode
),
6355 if (REG_P (target
) && !cleared
)
6356 emit_clobber (target
);
6358 /* Store each element of the constructor into the
6359 corresponding field of TARGET. */
6360 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6363 HOST_WIDE_INT bitsize
;
6364 HOST_WIDE_INT bitpos
= 0;
6366 rtx to_rtx
= target
;
6368 /* Just ignore missing fields. We cleared the whole
6369 structure, above, if any fields are missing. */
6373 if (cleared
&& initializer_zerop (value
))
6376 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6377 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6381 mode
= DECL_MODE (field
);
6382 if (DECL_BIT_FIELD (field
))
6385 offset
= DECL_FIELD_OFFSET (field
);
6386 if (tree_fits_shwi_p (offset
)
6387 && tree_fits_shwi_p (bit_position (field
)))
6389 bitpos
= int_bit_position (field
);
6395 /* If this initializes a field that is smaller than a
6396 word, at the start of a word, try to widen it to a full
6397 word. This special case allows us to output C++ member
6398 function initializations in a form that the optimizers
6400 if (WORD_REGISTER_OPERATIONS
6402 && bitsize
< BITS_PER_WORD
6403 && bitpos
% BITS_PER_WORD
== 0
6404 && GET_MODE_CLASS (mode
) == MODE_INT
6405 && TREE_CODE (value
) == INTEGER_CST
6407 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6409 tree type
= TREE_TYPE (value
);
6411 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6413 type
= lang_hooks
.types
.type_for_mode
6414 (word_mode
, TYPE_UNSIGNED (type
));
6415 value
= fold_convert (type
, value
);
6416 /* Make sure the bits beyond the original bitsize are zero
6417 so that we can correctly avoid extra zeroing stores in
6418 later constructor elements. */
6420 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6422 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6425 if (BYTES_BIG_ENDIAN
)
6427 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6428 build_int_cst (type
,
6429 BITS_PER_WORD
- bitsize
));
6430 bitsize
= BITS_PER_WORD
;
6434 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6435 && DECL_NONADDRESSABLE_P (field
))
6437 to_rtx
= copy_rtx (to_rtx
);
6438 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6441 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6442 0, bitregion_end
, mode
,
6444 get_alias_set (TREE_TYPE (field
)),
6452 unsigned HOST_WIDE_INT i
;
6455 tree elttype
= TREE_TYPE (type
);
6457 HOST_WIDE_INT minelt
= 0;
6458 HOST_WIDE_INT maxelt
= 0;
6460 /* The storage order is specified for every aggregate type. */
6461 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6463 domain
= TYPE_DOMAIN (type
);
6464 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6465 && TYPE_MAX_VALUE (domain
)
6466 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6467 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6469 /* If we have constant bounds for the range of the type, get them. */
6472 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6473 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6476 /* If the constructor has fewer elements than the array, clear
6477 the whole array first. Similarly if this is static
6478 constructor of a non-BLKmode object. */
6481 else if (REG_P (target
) && TREE_STATIC (exp
))
6485 unsigned HOST_WIDE_INT idx
;
6487 HOST_WIDE_INT count
= 0, zero_count
= 0;
6488 need_to_clear
= ! const_bounds_p
;
6490 /* This loop is a more accurate version of the loop in
6491 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6492 is also needed to check for missing elements. */
6493 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6495 HOST_WIDE_INT this_node_count
;
6500 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6502 tree lo_index
= TREE_OPERAND (index
, 0);
6503 tree hi_index
= TREE_OPERAND (index
, 1);
6505 if (! tree_fits_uhwi_p (lo_index
)
6506 || ! tree_fits_uhwi_p (hi_index
))
6512 this_node_count
= (tree_to_uhwi (hi_index
)
6513 - tree_to_uhwi (lo_index
) + 1);
6516 this_node_count
= 1;
6518 count
+= this_node_count
;
6519 if (mostly_zeros_p (value
))
6520 zero_count
+= this_node_count
;
6523 /* Clear the entire array first if there are any missing
6524 elements, or if the incidence of zero elements is >=
6527 && (count
< maxelt
- minelt
+ 1
6528 || 4 * zero_count
>= 3 * count
))
6532 if (need_to_clear
&& maybe_gt (size
, 0))
6535 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6537 clear_storage (target
, gen_int_mode (size
, Pmode
),
6542 if (!cleared
&& REG_P (target
))
6543 /* Inform later passes that the old value is dead. */
6544 emit_clobber (target
);
6546 /* Store each element of the constructor into the
6547 corresponding element of TARGET, determined by counting the
6549 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6553 HOST_WIDE_INT bitpos
;
6554 rtx xtarget
= target
;
6556 if (cleared
&& initializer_zerop (value
))
6559 mode
= TYPE_MODE (elttype
);
6560 if (mode
!= BLKmode
)
6561 bitsize
= GET_MODE_BITSIZE (mode
);
6562 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6565 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6567 tree lo_index
= TREE_OPERAND (index
, 0);
6568 tree hi_index
= TREE_OPERAND (index
, 1);
6569 rtx index_r
, pos_rtx
;
6570 HOST_WIDE_INT lo
, hi
, count
;
6573 /* If the range is constant and "small", unroll the loop. */
6575 && tree_fits_shwi_p (lo_index
)
6576 && tree_fits_shwi_p (hi_index
)
6577 && (lo
= tree_to_shwi (lo_index
),
6578 hi
= tree_to_shwi (hi_index
),
6579 count
= hi
- lo
+ 1,
6582 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6583 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6586 lo
-= minelt
; hi
-= minelt
;
6587 for (; lo
<= hi
; lo
++)
6589 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6592 && !MEM_KEEP_ALIAS_SET_P (target
)
6593 && TREE_CODE (type
) == ARRAY_TYPE
6594 && TYPE_NONALIASED_COMPONENT (type
))
6596 target
= copy_rtx (target
);
6597 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6600 store_constructor_field
6601 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6602 mode
, value
, cleared
,
6603 get_alias_set (elttype
), reverse
);
6608 rtx_code_label
*loop_start
= gen_label_rtx ();
6609 rtx_code_label
*loop_end
= gen_label_rtx ();
6612 expand_normal (hi_index
);
6614 index
= build_decl (EXPR_LOCATION (exp
),
6615 VAR_DECL
, NULL_TREE
, domain
);
6616 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6617 SET_DECL_RTL (index
, index_r
);
6618 store_expr (lo_index
, index_r
, 0, false, reverse
);
6620 /* Build the head of the loop. */
6621 do_pending_stack_adjust ();
6622 emit_label (loop_start
);
6624 /* Assign value to element index. */
6626 fold_convert (ssizetype
,
6627 fold_build2 (MINUS_EXPR
,
6630 TYPE_MIN_VALUE (domain
)));
6633 size_binop (MULT_EXPR
, position
,
6634 fold_convert (ssizetype
,
6635 TYPE_SIZE_UNIT (elttype
)));
6637 pos_rtx
= expand_normal (position
);
6638 xtarget
= offset_address (target
, pos_rtx
,
6639 highest_pow2_factor (position
));
6640 xtarget
= adjust_address (xtarget
, mode
, 0);
6641 if (TREE_CODE (value
) == CONSTRUCTOR
)
6642 store_constructor (value
, xtarget
, cleared
,
6643 exact_div (bitsize
, BITS_PER_UNIT
),
6646 store_expr (value
, xtarget
, 0, false, reverse
);
6648 /* Generate a conditional jump to exit the loop. */
6649 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6651 jumpif (exit_cond
, loop_end
,
6652 profile_probability::uninitialized ());
6654 /* Update the loop counter, and jump to the head of
6656 expand_assignment (index
,
6657 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6658 index
, integer_one_node
),
6661 emit_jump (loop_start
);
6663 /* Build the end of the loop. */
6664 emit_label (loop_end
);
6667 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6668 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6673 index
= ssize_int (1);
6676 index
= fold_convert (ssizetype
,
6677 fold_build2 (MINUS_EXPR
,
6680 TYPE_MIN_VALUE (domain
)));
6683 size_binop (MULT_EXPR
, index
,
6684 fold_convert (ssizetype
,
6685 TYPE_SIZE_UNIT (elttype
)));
6686 xtarget
= offset_address (target
,
6687 expand_normal (position
),
6688 highest_pow2_factor (position
));
6689 xtarget
= adjust_address (xtarget
, mode
, 0);
6690 store_expr (value
, xtarget
, 0, false, reverse
);
6695 bitpos
= ((tree_to_shwi (index
) - minelt
)
6696 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6698 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6700 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6701 && TREE_CODE (type
) == ARRAY_TYPE
6702 && TYPE_NONALIASED_COMPONENT (type
))
6704 target
= copy_rtx (target
);
6705 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6707 store_constructor_field (target
, bitsize
, bitpos
, 0,
6708 bitregion_end
, mode
, value
,
6709 cleared
, get_alias_set (elttype
),
6718 unsigned HOST_WIDE_INT idx
;
6719 constructor_elt
*ce
;
6722 insn_code icode
= CODE_FOR_nothing
;
6724 tree elttype
= TREE_TYPE (type
);
6725 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6726 machine_mode eltmode
= TYPE_MODE (elttype
);
6727 HOST_WIDE_INT bitsize
;
6728 HOST_WIDE_INT bitpos
;
6729 rtvec vector
= NULL
;
6731 unsigned HOST_WIDE_INT const_n_elts
;
6732 alias_set_type alias
;
6733 bool vec_vec_init_p
= false;
6734 machine_mode mode
= GET_MODE (target
);
6736 gcc_assert (eltmode
!= BLKmode
);
6738 /* Try using vec_duplicate_optab for uniform vectors. */
6739 if (!TREE_SIDE_EFFECTS (exp
)
6740 && VECTOR_MODE_P (mode
)
6741 && eltmode
== GET_MODE_INNER (mode
)
6742 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6743 != CODE_FOR_nothing
)
6744 && (elt
= uniform_vector_p (exp
)))
6746 struct expand_operand ops
[2];
6747 create_output_operand (&ops
[0], target
, mode
);
6748 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6749 expand_insn (icode
, 2, ops
);
6750 if (!rtx_equal_p (target
, ops
[0].value
))
6751 emit_move_insn (target
, ops
[0].value
);
6755 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6757 && VECTOR_MODE_P (mode
)
6758 && n_elts
.is_constant (&const_n_elts
))
6760 machine_mode emode
= eltmode
;
6762 if (CONSTRUCTOR_NELTS (exp
)
6763 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6766 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6767 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6768 * TYPE_VECTOR_SUBPARTS (etype
),
6770 emode
= TYPE_MODE (etype
);
6772 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6773 if (icode
!= CODE_FOR_nothing
)
6775 unsigned int i
, n
= const_n_elts
;
6777 if (emode
!= eltmode
)
6779 n
= CONSTRUCTOR_NELTS (exp
);
6780 vec_vec_init_p
= true;
6782 vector
= rtvec_alloc (n
);
6783 for (i
= 0; i
< n
; i
++)
6784 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6788 /* If the constructor has fewer elements than the vector,
6789 clear the whole array first. Similarly if this is static
6790 constructor of a non-BLKmode object. */
6793 else if (REG_P (target
) && TREE_STATIC (exp
))
6797 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6800 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6802 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6804 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6805 TYPE_SIZE (elttype
)));
6807 count
+= n_elts_here
;
6808 if (mostly_zeros_p (value
))
6809 zero_count
+= n_elts_here
;
6812 /* Clear the entire vector first if there are any missing elements,
6813 or if the incidence of zero elements is >= 75%. */
6814 need_to_clear
= (maybe_lt (count
, n_elts
)
6815 || 4 * zero_count
>= 3 * count
);
6818 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6821 emit_move_insn (target
, CONST0_RTX (mode
));
6823 clear_storage (target
, gen_int_mode (size
, Pmode
),
6828 /* Inform later passes that the old value is dead. */
6829 if (!cleared
&& !vector
&& REG_P (target
))
6830 emit_move_insn (target
, CONST0_RTX (mode
));
6833 alias
= MEM_ALIAS_SET (target
);
6835 alias
= get_alias_set (elttype
);
6837 /* Store each element of the constructor into the corresponding
6838 element of TARGET, determined by counting the elements. */
6839 for (idx
= 0, i
= 0;
6840 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6841 idx
++, i
+= bitsize
/ elt_size
)
6843 HOST_WIDE_INT eltpos
;
6844 tree value
= ce
->value
;
6846 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6847 if (cleared
&& initializer_zerop (value
))
6851 eltpos
= tree_to_uhwi (ce
->index
);
6859 gcc_assert (ce
->index
== NULL_TREE
);
6860 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6864 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6865 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6869 machine_mode value_mode
6870 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6871 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6872 bitpos
= eltpos
* elt_size
;
6873 store_constructor_field (target
, bitsize
, bitpos
, 0,
6874 bitregion_end
, value_mode
,
6875 value
, cleared
, alias
, reverse
);
6880 emit_insn (GEN_FCN (icode
) (target
,
6881 gen_rtx_PARALLEL (mode
, vector
)));
6890 /* Store the value of EXP (an expression tree)
6891 into a subfield of TARGET which has mode MODE and occupies
6892 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6893 If MODE is VOIDmode, it means that we are storing into a bit-field.
6895 BITREGION_START is bitpos of the first bitfield in this region.
6896 BITREGION_END is the bitpos of the ending bitfield in this region.
6897 These two fields are 0, if the C++ memory model does not apply,
6898 or we are not interested in keeping track of bitfield regions.
6900 Always return const0_rtx unless we have something particular to
6903 ALIAS_SET is the alias set for the destination. This value will
6904 (in general) be different from that for TARGET, since TARGET is a
6905 reference to the containing structure.
6907 If NONTEMPORAL is true, try generating a nontemporal store.
6909 If REVERSE is true, the store is to be done in reverse order. */
6912 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
6913 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
6914 machine_mode mode
, tree exp
,
6915 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6917 if (TREE_CODE (exp
) == ERROR_MARK
)
6920 /* If we have nothing to store, do nothing unless the expression has
6921 side-effects. Don't do that for zero sized addressable lhs of
6923 if (known_eq (bitsize
, 0)
6924 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6925 || TREE_CODE (exp
) != CALL_EXPR
))
6926 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6928 if (GET_CODE (target
) == CONCAT
)
6930 /* We're storing into a struct containing a single __complex. */
6932 gcc_assert (known_eq (bitpos
, 0));
6933 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6936 /* If the structure is in a register or if the component
6937 is a bit field, we cannot use addressing to access it.
6938 Use bit-field techniques or SUBREG to store in it. */
6940 poly_int64 decl_bitsize
;
6941 if (mode
== VOIDmode
6942 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6943 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6944 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6946 || GET_CODE (target
) == SUBREG
6947 /* If the field isn't aligned enough to store as an ordinary memref,
6948 store it as a bit field. */
6950 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6951 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
6952 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6953 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
6954 || (known_size_p (bitsize
)
6956 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
6957 /* If the RHS and field are a constant size and the size of the
6958 RHS isn't the same size as the bitfield, we must use bitfield
6960 || (known_size_p (bitsize
)
6961 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
6962 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
6964 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6965 we will handle specially below. */
6966 && !(TREE_CODE (exp
) == CONSTRUCTOR
6967 && multiple_p (bitsize
, BITS_PER_UNIT
))
6968 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6969 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6970 includes some extra padding. store_expr / expand_expr will in
6971 that case call get_inner_reference that will have the bitsize
6972 we check here and thus the block move will not clobber the
6973 padding that shouldn't be clobbered. In the future we could
6974 replace the TREE_ADDRESSABLE check with a check that
6975 get_base_address needs to live in memory. */
6976 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6977 || TREE_CODE (exp
) != COMPONENT_REF
6978 || !multiple_p (bitsize
, BITS_PER_UNIT
)
6979 || !multiple_p (bitpos
, BITS_PER_UNIT
)
6980 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
6982 || maybe_ne (decl_bitsize
, bitsize
)))
6983 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6984 decl we must use bitfield operations. */
6985 || (known_size_p (bitsize
)
6986 && TREE_CODE (exp
) == MEM_REF
6987 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6988 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6989 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6990 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6995 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6996 implies a mask operation. If the precision is the same size as
6997 the field we're storing into, that mask is redundant. This is
6998 particularly common with bit field assignments generated by the
7000 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
7003 tree type
= TREE_TYPE (exp
);
7004 if (INTEGRAL_TYPE_P (type
)
7005 && maybe_ne (TYPE_PRECISION (type
),
7006 GET_MODE_BITSIZE (TYPE_MODE (type
)))
7007 && known_eq (bitsize
, TYPE_PRECISION (type
)))
7009 tree op
= gimple_assign_rhs1 (nop_def
);
7010 type
= TREE_TYPE (op
);
7011 if (INTEGRAL_TYPE_P (type
)
7012 && known_ge (TYPE_PRECISION (type
), bitsize
))
7017 temp
= expand_normal (exp
);
7019 /* We don't support variable-sized BLKmode bitfields, since our
7020 handling of BLKmode is bound up with the ability to break
7021 things into words. */
7022 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
7024 /* Handle calls that return values in multiple non-contiguous locations.
7025 The Irix 6 ABI has examples of this. */
7026 if (GET_CODE (temp
) == PARALLEL
)
7028 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
7029 machine_mode temp_mode
= GET_MODE (temp
);
7030 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
7031 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
7032 rtx temp_target
= gen_reg_rtx (temp_mode
);
7033 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
7037 /* Handle calls that return BLKmode values in registers. */
7038 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7040 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7041 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7045 /* If the value has aggregate type and an integral mode then, if BITSIZE
7046 is narrower than this mode and this is for big-endian data, we first
7047 need to put the value into the low-order bits for store_bit_field,
7048 except when MODE is BLKmode and BITSIZE larger than the word size
7049 (see the handling of fields larger than a word in store_bit_field).
7050 Moreover, the field may be not aligned on a byte boundary; in this
7051 case, if it has reverse storage order, it needs to be accessed as a
7052 scalar field with reverse storage order and we must first put the
7053 value into target order. */
7054 scalar_int_mode temp_mode
;
7055 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7056 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7058 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7060 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7063 temp
= flip_storage_order (temp_mode
, temp
);
7065 gcc_checking_assert (known_le (bitsize
, size
));
7066 if (maybe_lt (bitsize
, size
)
7067 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7068 /* Use of to_constant for BLKmode was checked above. */
7069 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7070 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7071 size
- bitsize
, NULL_RTX
, 1);
7074 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7075 if (mode
!= VOIDmode
&& mode
!= BLKmode
7076 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7077 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7079 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7080 and BITPOS must be aligned on a byte boundary. If so, we simply do
7081 a block copy. Likewise for a BLKmode-like TARGET. */
7082 if (GET_MODE (temp
) == BLKmode
7083 && (GET_MODE (target
) == BLKmode
7085 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7086 && multiple_p (bitpos
, BITS_PER_UNIT
)
7087 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7089 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7090 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7091 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7093 target
= adjust_address (target
, VOIDmode
, bytepos
);
7094 emit_block_move (target
, temp
,
7095 gen_int_mode (bytesize
, Pmode
),
7101 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7102 word size, we need to load the value (see again store_bit_field). */
7103 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7105 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
7106 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7107 temp_mode
, false, NULL
);
7110 /* Store the value in the bitfield. */
7111 gcc_checking_assert (known_ge (bitpos
, 0));
7112 store_bit_field (target
, bitsize
, bitpos
,
7113 bitregion_start
, bitregion_end
,
7114 mode
, temp
, reverse
);
7120 /* Now build a reference to just the desired component. */
7121 rtx to_rtx
= adjust_address (target
, mode
,
7122 exact_div (bitpos
, BITS_PER_UNIT
));
7124 if (to_rtx
== target
)
7125 to_rtx
= copy_rtx (to_rtx
);
7127 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7128 set_mem_alias_set (to_rtx
, alias_set
);
7130 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7131 into a target smaller than its type; handle that case now. */
7132 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7134 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7135 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7139 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7143 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7144 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7145 codes and find the ultimate containing object, which we return.
7147 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7148 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7149 storage order of the field.
7150 If the position of the field is variable, we store a tree
7151 giving the variable offset (in units) in *POFFSET.
7152 This offset is in addition to the bit position.
7153 If the position is not variable, we store 0 in *POFFSET.
7155 If any of the extraction expressions is volatile,
7156 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7158 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7159 Otherwise, it is a mode that can be used to access the field.
7161 If the field describes a variable-sized object, *PMODE is set to
7162 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7163 this case, but the address of the object can be found. */
7166 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7167 poly_int64_pod
*pbitpos
, tree
*poffset
,
7168 machine_mode
*pmode
, int *punsignedp
,
7169 int *preversep
, int *pvolatilep
)
7172 machine_mode mode
= VOIDmode
;
7173 bool blkmode_bitfield
= false;
7174 tree offset
= size_zero_node
;
7175 poly_offset_int bit_offset
= 0;
7177 /* First get the mode, signedness, storage order and size. We do this from
7178 just the outermost expression. */
7180 if (TREE_CODE (exp
) == COMPONENT_REF
)
7182 tree field
= TREE_OPERAND (exp
, 1);
7183 size_tree
= DECL_SIZE (field
);
7184 if (flag_strict_volatile_bitfields
> 0
7185 && TREE_THIS_VOLATILE (exp
)
7186 && DECL_BIT_FIELD_TYPE (field
)
7187 && DECL_MODE (field
) != BLKmode
)
7188 /* Volatile bitfields should be accessed in the mode of the
7189 field's type, not the mode computed based on the bit
7191 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7192 else if (!DECL_BIT_FIELD (field
))
7194 mode
= DECL_MODE (field
);
7195 /* For vector fields re-check the target flags, as DECL_MODE
7196 could have been set with different target flags than
7197 the current function has. */
7199 && VECTOR_TYPE_P (TREE_TYPE (field
))
7200 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7201 mode
= TYPE_MODE (TREE_TYPE (field
));
7203 else if (DECL_MODE (field
) == BLKmode
)
7204 blkmode_bitfield
= true;
7206 *punsignedp
= DECL_UNSIGNED (field
);
7208 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7210 size_tree
= TREE_OPERAND (exp
, 1);
7211 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7212 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7214 /* For vector types, with the correct size of access, use the mode of
7216 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7217 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7218 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7219 mode
= TYPE_MODE (TREE_TYPE (exp
));
7223 mode
= TYPE_MODE (TREE_TYPE (exp
));
7224 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7226 if (mode
== BLKmode
)
7227 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7229 *pbitsize
= GET_MODE_BITSIZE (mode
);
7234 if (! tree_fits_uhwi_p (size_tree
))
7235 mode
= BLKmode
, *pbitsize
= -1;
7237 *pbitsize
= tree_to_uhwi (size_tree
);
7240 *preversep
= reverse_storage_order_for_component_p (exp
);
7242 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7243 and find the ultimate containing object. */
7246 switch (TREE_CODE (exp
))
7249 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7254 tree field
= TREE_OPERAND (exp
, 1);
7255 tree this_offset
= component_ref_field_offset (exp
);
7257 /* If this field hasn't been filled in yet, don't go past it.
7258 This should only happen when folding expressions made during
7259 type construction. */
7260 if (this_offset
== 0)
7263 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7264 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7266 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7271 case ARRAY_RANGE_REF
:
7273 tree index
= TREE_OPERAND (exp
, 1);
7274 tree low_bound
= array_ref_low_bound (exp
);
7275 tree unit_size
= array_ref_element_size (exp
);
7277 /* We assume all arrays have sizes that are a multiple of a byte.
7278 First subtract the lower bound, if any, in the type of the
7279 index, then convert to sizetype and multiply by the size of
7280 the array element. */
7281 if (! integer_zerop (low_bound
))
7282 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7285 offset
= size_binop (PLUS_EXPR
, offset
,
7286 size_binop (MULT_EXPR
,
7287 fold_convert (sizetype
, index
),
7296 bit_offset
+= *pbitsize
;
7299 case VIEW_CONVERT_EXPR
:
7303 /* Hand back the decl for MEM[&decl, off]. */
7304 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7306 tree off
= TREE_OPERAND (exp
, 1);
7307 if (!integer_zerop (off
))
7309 poly_offset_int boff
= mem_ref_offset (exp
);
7310 boff
<<= LOG2_BITS_PER_UNIT
;
7313 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7321 /* If any reference in the chain is volatile, the effect is volatile. */
7322 if (TREE_THIS_VOLATILE (exp
))
7325 exp
= TREE_OPERAND (exp
, 0);
7329 /* If OFFSET is constant, see if we can return the whole thing as a
7330 constant bit position. Make sure to handle overflow during
7332 if (poly_int_tree_p (offset
))
7334 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7335 TYPE_PRECISION (sizetype
));
7336 tem
<<= LOG2_BITS_PER_UNIT
;
7338 if (tem
.to_shwi (pbitpos
))
7339 *poffset
= offset
= NULL_TREE
;
7342 /* Otherwise, split it up. */
7345 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7346 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7348 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7349 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7350 offset
= size_binop (PLUS_EXPR
, offset
,
7351 build_int_cst (sizetype
, bytes
.force_shwi ()));
7357 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7358 if (mode
== VOIDmode
7360 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7361 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7369 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7371 static unsigned HOST_WIDE_INT
7372 target_align (const_tree target
)
7374 /* We might have a chain of nested references with intermediate misaligning
7375 bitfields components, so need to recurse to find out. */
7377 unsigned HOST_WIDE_INT this_align
, outer_align
;
7379 switch (TREE_CODE (target
))
7385 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7386 outer_align
= target_align (TREE_OPERAND (target
, 0));
7387 return MIN (this_align
, outer_align
);
7390 case ARRAY_RANGE_REF
:
7391 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7392 outer_align
= target_align (TREE_OPERAND (target
, 0));
7393 return MIN (this_align
, outer_align
);
7396 case NON_LVALUE_EXPR
:
7397 case VIEW_CONVERT_EXPR
:
7398 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7399 outer_align
= target_align (TREE_OPERAND (target
, 0));
7400 return MAX (this_align
, outer_align
);
7403 return TYPE_ALIGN (TREE_TYPE (target
));
7408 /* Given an rtx VALUE that may contain additions and multiplications, return
7409 an equivalent value that just refers to a register, memory, or constant.
7410 This is done by generating instructions to perform the arithmetic and
7411 returning a pseudo-register containing the value.
7413 The returned value may be a REG, SUBREG, MEM or constant. */
7416 force_operand (rtx value
, rtx target
)
7419 /* Use subtarget as the target for operand 0 of a binary operation. */
7420 rtx subtarget
= get_subtarget (target
);
7421 enum rtx_code code
= GET_CODE (value
);
7423 /* Check for subreg applied to an expression produced by loop optimizer. */
7425 && !REG_P (SUBREG_REG (value
))
7426 && !MEM_P (SUBREG_REG (value
)))
7429 = simplify_gen_subreg (GET_MODE (value
),
7430 force_reg (GET_MODE (SUBREG_REG (value
)),
7431 force_operand (SUBREG_REG (value
),
7433 GET_MODE (SUBREG_REG (value
)),
7434 SUBREG_BYTE (value
));
7435 code
= GET_CODE (value
);
7438 /* Check for a PIC address load. */
7439 if ((code
== PLUS
|| code
== MINUS
)
7440 && XEXP (value
, 0) == pic_offset_table_rtx
7441 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7442 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7443 || GET_CODE (XEXP (value
, 1)) == CONST
))
7446 subtarget
= gen_reg_rtx (GET_MODE (value
));
7447 emit_move_insn (subtarget
, value
);
7451 if (ARITHMETIC_P (value
))
7453 op2
= XEXP (value
, 1);
7454 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7456 if (code
== MINUS
&& CONST_INT_P (op2
))
7459 op2
= negate_rtx (GET_MODE (value
), op2
);
7462 /* Check for an addition with OP2 a constant integer and our first
7463 operand a PLUS of a virtual register and something else. In that
7464 case, we want to emit the sum of the virtual register and the
7465 constant first and then add the other value. This allows virtual
7466 register instantiation to simply modify the constant rather than
7467 creating another one around this addition. */
7468 if (code
== PLUS
&& CONST_INT_P (op2
)
7469 && GET_CODE (XEXP (value
, 0)) == PLUS
7470 && REG_P (XEXP (XEXP (value
, 0), 0))
7471 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7472 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7474 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7475 XEXP (XEXP (value
, 0), 0), op2
,
7476 subtarget
, 0, OPTAB_LIB_WIDEN
);
7477 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7478 force_operand (XEXP (XEXP (value
,
7480 target
, 0, OPTAB_LIB_WIDEN
);
7483 op1
= force_operand (XEXP (value
, 0), subtarget
);
7484 op2
= force_operand (op2
, NULL_RTX
);
7488 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7490 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7491 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7492 target
, 1, OPTAB_LIB_WIDEN
);
7494 return expand_divmod (0,
7495 FLOAT_MODE_P (GET_MODE (value
))
7496 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7497 GET_MODE (value
), op1
, op2
, target
, 0);
7499 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7502 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7505 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7508 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7509 target
, 0, OPTAB_LIB_WIDEN
);
7511 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7512 target
, 1, OPTAB_LIB_WIDEN
);
7515 if (UNARY_P (value
))
7518 target
= gen_reg_rtx (GET_MODE (value
));
7519 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7526 case FLOAT_TRUNCATE
:
7527 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7532 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7536 case UNSIGNED_FLOAT
:
7537 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7541 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7545 #ifdef INSN_SCHEDULING
7546 /* On machines that have insn scheduling, we want all memory reference to be
7547 explicit, so we need to deal with such paradoxical SUBREGs. */
7548 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7550 = simplify_gen_subreg (GET_MODE (value
),
7551 force_reg (GET_MODE (SUBREG_REG (value
)),
7552 force_operand (SUBREG_REG (value
),
7554 GET_MODE (SUBREG_REG (value
)),
7555 SUBREG_BYTE (value
));
7561 /* Subroutine of expand_expr: return nonzero iff there is no way that
7562 EXP can reference X, which is being modified. TOP_P is nonzero if this
7563 call is going to be used to determine whether we need a temporary
7564 for EXP, as opposed to a recursive call to this function.
7566 It is always safe for this routine to return zero since it merely
7567 searches for optimization opportunities. */
7570 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7576 /* If EXP has varying size, we MUST use a target since we currently
7577 have no way of allocating temporaries of variable size
7578 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7579 So we assume here that something at a higher level has prevented a
7580 clash. This is somewhat bogus, but the best we can do. Only
7581 do this when X is BLKmode and when we are at the top level. */
7582 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7583 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7584 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7585 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7586 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7588 && GET_MODE (x
) == BLKmode
)
7589 /* If X is in the outgoing argument area, it is always safe. */
7591 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7592 || (GET_CODE (XEXP (x
, 0)) == PLUS
7593 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7596 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7597 find the underlying pseudo. */
7598 if (GET_CODE (x
) == SUBREG
)
7601 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7605 /* Now look at our tree code and possibly recurse. */
7606 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7608 case tcc_declaration
:
7609 exp_rtl
= DECL_RTL_IF_SET (exp
);
7615 case tcc_exceptional
:
7616 if (TREE_CODE (exp
) == TREE_LIST
)
7620 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7622 exp
= TREE_CHAIN (exp
);
7625 if (TREE_CODE (exp
) != TREE_LIST
)
7626 return safe_from_p (x
, exp
, 0);
7629 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7631 constructor_elt
*ce
;
7632 unsigned HOST_WIDE_INT idx
;
7634 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7635 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7636 || !safe_from_p (x
, ce
->value
, 0))
7640 else if (TREE_CODE (exp
) == ERROR_MARK
)
7641 return 1; /* An already-visited SAVE_EXPR? */
7646 /* The only case we look at here is the DECL_INITIAL inside a
7648 return (TREE_CODE (exp
) != DECL_EXPR
7649 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7650 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7651 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7654 case tcc_comparison
:
7655 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7660 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7662 case tcc_expression
:
7665 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7666 the expression. If it is set, we conflict iff we are that rtx or
7667 both are in memory. Otherwise, we check all operands of the
7668 expression recursively. */
7670 switch (TREE_CODE (exp
))
7673 /* If the operand is static or we are static, we can't conflict.
7674 Likewise if we don't conflict with the operand at all. */
7675 if (staticp (TREE_OPERAND (exp
, 0))
7676 || TREE_STATIC (exp
)
7677 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7680 /* Otherwise, the only way this can conflict is if we are taking
7681 the address of a DECL a that address if part of X, which is
7683 exp
= TREE_OPERAND (exp
, 0);
7686 if (!DECL_RTL_SET_P (exp
)
7687 || !MEM_P (DECL_RTL (exp
)))
7690 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7696 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7697 get_alias_set (exp
)))
7702 /* Assume that the call will clobber all hard registers and
7704 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7709 case WITH_CLEANUP_EXPR
:
7710 case CLEANUP_POINT_EXPR
:
7711 /* Lowered by gimplify.c. */
7715 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7721 /* If we have an rtx, we do not need to scan our operands. */
7725 nops
= TREE_OPERAND_LENGTH (exp
);
7726 for (i
= 0; i
< nops
; i
++)
7727 if (TREE_OPERAND (exp
, i
) != 0
7728 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7734 /* Should never get a type here. */
7738 /* If we have an rtl, find any enclosed object. Then see if we conflict
7742 if (GET_CODE (exp_rtl
) == SUBREG
)
7744 exp_rtl
= SUBREG_REG (exp_rtl
);
7746 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7750 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7751 are memory and they conflict. */
7752 return ! (rtx_equal_p (x
, exp_rtl
)
7753 || (MEM_P (x
) && MEM_P (exp_rtl
)
7754 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7757 /* If we reach here, it is safe. */
7762 /* Return the highest power of two that EXP is known to be a multiple of.
7763 This is used in updating alignment of MEMs in array references. */
7765 unsigned HOST_WIDE_INT
7766 highest_pow2_factor (const_tree exp
)
7768 unsigned HOST_WIDE_INT ret
;
7769 int trailing_zeros
= tree_ctz (exp
);
7770 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7771 return BIGGEST_ALIGNMENT
;
7772 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7773 if (ret
> BIGGEST_ALIGNMENT
)
7774 return BIGGEST_ALIGNMENT
;
7778 /* Similar, except that the alignment requirements of TARGET are
7779 taken into account. Assume it is at least as aligned as its
7780 type, unless it is a COMPONENT_REF in which case the layout of
7781 the structure gives the alignment. */
7783 static unsigned HOST_WIDE_INT
7784 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7786 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7787 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7789 return MAX (factor
, talign
);
7792 /* Convert the tree comparison code TCODE to the rtl one where the
7793 signedness is UNSIGNEDP. */
7795 static enum rtx_code
7796 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7808 code
= unsignedp
? LTU
: LT
;
7811 code
= unsignedp
? LEU
: LE
;
7814 code
= unsignedp
? GTU
: GT
;
7817 code
= unsignedp
? GEU
: GE
;
7819 case UNORDERED_EXPR
:
7850 /* Subroutine of expand_expr. Expand the two operands of a binary
7851 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7852 The value may be stored in TARGET if TARGET is nonzero. The
7853 MODIFIER argument is as documented by expand_expr. */
7856 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7857 enum expand_modifier modifier
)
7859 if (! safe_from_p (target
, exp1
, 1))
7861 if (operand_equal_p (exp0
, exp1
, 0))
7863 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7864 *op1
= copy_rtx (*op0
);
7868 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7869 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7874 /* Return a MEM that contains constant EXP. DEFER is as for
7875 output_constant_def and MODIFIER is as for expand_expr. */
7878 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7882 mem
= output_constant_def (exp
, defer
);
7883 if (modifier
!= EXPAND_INITIALIZER
)
7884 mem
= use_anchored_address (mem
);
7888 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7889 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7892 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7893 enum expand_modifier modifier
, addr_space_t as
)
7895 rtx result
, subtarget
;
7897 poly_int64 bitsize
, bitpos
;
7898 int unsignedp
, reversep
, volatilep
= 0;
7901 /* If we are taking the address of a constant and are at the top level,
7902 we have to use output_constant_def since we can't call force_const_mem
7904 /* ??? This should be considered a front-end bug. We should not be
7905 generating ADDR_EXPR of something that isn't an LVALUE. The only
7906 exception here is STRING_CST. */
7907 if (CONSTANT_CLASS_P (exp
))
7909 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7910 if (modifier
< EXPAND_SUM
)
7911 result
= force_operand (result
, target
);
7915 /* Everything must be something allowed by is_gimple_addressable. */
7916 switch (TREE_CODE (exp
))
7919 /* This case will happen via recursion for &a->b. */
7920 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7924 tree tem
= TREE_OPERAND (exp
, 0);
7925 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7926 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7927 return expand_expr (tem
, target
, tmode
, modifier
);
7930 case TARGET_MEM_REF
:
7931 return addr_for_mem_ref (exp
, as
, true);
7934 /* Expand the initializer like constants above. */
7935 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7937 if (modifier
< EXPAND_SUM
)
7938 result
= force_operand (result
, target
);
7942 /* The real part of the complex number is always first, therefore
7943 the address is the same as the address of the parent object. */
7946 inner
= TREE_OPERAND (exp
, 0);
7950 /* The imaginary part of the complex number is always second.
7951 The expression is therefore always offset by the size of the
7954 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7955 inner
= TREE_OPERAND (exp
, 0);
7958 case COMPOUND_LITERAL_EXPR
:
7959 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7960 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7961 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7962 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7963 the initializers aren't gimplified. */
7964 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7965 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7966 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7967 target
, tmode
, modifier
, as
);
7970 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7971 expand_expr, as that can have various side effects; LABEL_DECLs for
7972 example, may not have their DECL_RTL set yet. Expand the rtl of
7973 CONSTRUCTORs too, which should yield a memory reference for the
7974 constructor's contents. Assume language specific tree nodes can
7975 be expanded in some interesting way. */
7976 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7978 || TREE_CODE (exp
) == CONSTRUCTOR
7979 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7981 result
= expand_expr (exp
, target
, tmode
,
7982 modifier
== EXPAND_INITIALIZER
7983 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7985 /* If the DECL isn't in memory, then the DECL wasn't properly
7986 marked TREE_ADDRESSABLE, which will be either a front-end
7987 or a tree optimizer bug. */
7989 gcc_assert (MEM_P (result
));
7990 result
= XEXP (result
, 0);
7992 /* ??? Is this needed anymore? */
7994 TREE_USED (exp
) = 1;
7996 if (modifier
!= EXPAND_INITIALIZER
7997 && modifier
!= EXPAND_CONST_ADDRESS
7998 && modifier
!= EXPAND_SUM
)
7999 result
= force_operand (result
, target
);
8003 /* Pass FALSE as the last argument to get_inner_reference although
8004 we are expanding to RTL. The rationale is that we know how to
8005 handle "aligning nodes" here: we can just bypass them because
8006 they won't change the final object whose address will be returned
8007 (they actually exist only for that purpose). */
8008 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
8009 &unsignedp
, &reversep
, &volatilep
);
8013 /* We must have made progress. */
8014 gcc_assert (inner
!= exp
);
8016 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8017 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8018 inner alignment, force the inner to be sufficiently aligned. */
8019 if (CONSTANT_CLASS_P (inner
)
8020 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
8022 inner
= copy_node (inner
);
8023 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
8024 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
8025 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
8027 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
8033 if (modifier
!= EXPAND_NORMAL
)
8034 result
= force_operand (result
, NULL
);
8035 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
8036 modifier
== EXPAND_INITIALIZER
8037 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8039 /* expand_expr is allowed to return an object in a mode other
8040 than TMODE. If it did, we need to convert. */
8041 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8042 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8043 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8044 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8045 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8047 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8048 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8051 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8052 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8053 1, OPTAB_LIB_WIDEN
);
8057 if (maybe_ne (bitpos
, 0))
8059 /* Someone beforehand should have rejected taking the address
8060 of an object that isn't byte-aligned. */
8061 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8062 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8063 result
= plus_constant (tmode
, result
, bytepos
);
8064 if (modifier
< EXPAND_SUM
)
8065 result
= force_operand (result
, target
);
8071 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8072 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8075 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8076 enum expand_modifier modifier
)
8078 addr_space_t as
= ADDR_SPACE_GENERIC
;
8079 scalar_int_mode address_mode
= Pmode
;
8080 scalar_int_mode pointer_mode
= ptr_mode
;
8084 /* Target mode of VOIDmode says "whatever's natural". */
8085 if (tmode
== VOIDmode
)
8086 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8088 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8090 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8091 address_mode
= targetm
.addr_space
.address_mode (as
);
8092 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8095 /* We can get called with some Weird Things if the user does silliness
8096 like "(short) &a". In that case, convert_memory_address won't do
8097 the right thing, so ignore the given target mode. */
8098 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8102 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8103 new_tmode
, modifier
, as
);
8105 /* Despite expand_expr claims concerning ignoring TMODE when not
8106 strictly convenient, stuff breaks if we don't honor it. Note
8107 that combined with the above, we only do this for pointer modes. */
8108 rmode
= GET_MODE (result
);
8109 if (rmode
== VOIDmode
)
8111 if (rmode
!= new_tmode
)
8112 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8117 /* Generate code for computing CONSTRUCTOR EXP.
8118 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8119 is TRUE, instead of creating a temporary variable in memory
8120 NULL is returned and the caller needs to handle it differently. */
8123 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8124 bool avoid_temp_mem
)
8126 tree type
= TREE_TYPE (exp
);
8127 machine_mode mode
= TYPE_MODE (type
);
8129 /* Try to avoid creating a temporary at all. This is possible
8130 if all of the initializer is zero.
8131 FIXME: try to handle all [0..255] initializers we can handle
8133 if (TREE_STATIC (exp
)
8134 && !TREE_ADDRESSABLE (exp
)
8135 && target
!= 0 && mode
== BLKmode
8136 && all_zeros_p (exp
))
8138 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8142 /* All elts simple constants => refer to a constant in memory. But
8143 if this is a non-BLKmode mode, let it store a field at a time
8144 since that should make a CONST_INT, CONST_WIDE_INT or
8145 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8146 use, it is best to store directly into the target unless the type
8147 is large enough that memcpy will be used. If we are making an
8148 initializer and all operands are constant, put it in memory as
8151 FIXME: Avoid trying to fill vector constructors piece-meal.
8152 Output them with output_constant_def below unless we're sure
8153 they're zeros. This should go away when vector initializers
8154 are treated like VECTOR_CST instead of arrays. */
8155 if ((TREE_STATIC (exp
)
8156 && ((mode
== BLKmode
8157 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8158 || TREE_ADDRESSABLE (exp
)
8159 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8160 && (! can_move_by_pieces
8161 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8163 && ! mostly_zeros_p (exp
))))
8164 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8165 && TREE_CONSTANT (exp
)))
8172 constructor
= expand_expr_constant (exp
, 1, modifier
);
8174 if (modifier
!= EXPAND_CONST_ADDRESS
8175 && modifier
!= EXPAND_INITIALIZER
8176 && modifier
!= EXPAND_SUM
)
8177 constructor
= validize_mem (constructor
);
8182 /* Handle calls that pass values in multiple non-contiguous
8183 locations. The Irix 6 ABI has examples of this. */
8184 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8185 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8190 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8193 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8198 /* expand_expr: generate code for computing expression EXP.
8199 An rtx for the computed value is returned. The value is never null.
8200 In the case of a void EXP, const0_rtx is returned.
8202 The value may be stored in TARGET if TARGET is nonzero.
8203 TARGET is just a suggestion; callers must assume that
8204 the rtx returned may not be the same as TARGET.
8206 If TARGET is CONST0_RTX, it means that the value will be ignored.
8208 If TMODE is not VOIDmode, it suggests generating the
8209 result in mode TMODE. But this is done only when convenient.
8210 Otherwise, TMODE is ignored and the value generated in its natural mode.
8211 TMODE is just a suggestion; callers must assume that
8212 the rtx returned may not have mode TMODE.
8214 Note that TARGET may have neither TMODE nor MODE. In that case, it
8215 probably will not be used.
8217 If MODIFIER is EXPAND_SUM then when EXP is an addition
8218 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8219 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8220 products as above, or REG or MEM, or constant.
8221 Ordinarily in such cases we would output mul or add instructions
8222 and then return a pseudo reg containing the sum.
8224 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8225 it also marks a label as absolutely required (it can't be dead).
8226 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8227 This is used for outputting expressions used in initializers.
8229 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8230 with a constant address even if that address is not normally legitimate.
8231 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8233 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8234 a call parameter. Such targets require special care as we haven't yet
8235 marked TARGET so that it's safe from being trashed by libcalls. We
8236 don't want to use TARGET for anything but the final result;
8237 Intermediate values must go elsewhere. Additionally, calls to
8238 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8240 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8241 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8242 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8243 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8246 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8247 In this case, we don't adjust a returned MEM rtx that wouldn't be
8248 sufficiently aligned for its mode; instead, it's up to the caller
8249 to deal with it afterwards. This is used to make sure that unaligned
8250 base objects for which out-of-bounds accesses are supported, for
8251 example record types with trailing arrays, aren't realigned behind
8252 the back of the caller.
8253 The normal operating mode is to pass FALSE for this parameter. */
8256 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8257 enum expand_modifier modifier
, rtx
*alt_rtl
,
8258 bool inner_reference_p
)
8262 /* Handle ERROR_MARK before anybody tries to access its type. */
8263 if (TREE_CODE (exp
) == ERROR_MARK
8264 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8266 ret
= CONST0_RTX (tmode
);
8267 return ret
? ret
: const0_rtx
;
8270 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8275 /* Try to expand the conditional expression which is represented by
8276 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8277 return the rtl reg which represents the result. Otherwise return
8281 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8282 tree treeop1 ATTRIBUTE_UNUSED
,
8283 tree treeop2 ATTRIBUTE_UNUSED
)
8286 rtx op00
, op01
, op1
, op2
;
8287 enum rtx_code comparison_code
;
8288 machine_mode comparison_mode
;
8291 tree type
= TREE_TYPE (treeop1
);
8292 int unsignedp
= TYPE_UNSIGNED (type
);
8293 machine_mode mode
= TYPE_MODE (type
);
8294 machine_mode orig_mode
= mode
;
8295 static bool expanding_cond_expr_using_cmove
= false;
8297 /* Conditional move expansion can end up TERing two operands which,
8298 when recursively hitting conditional expressions can result in
8299 exponential behavior if the cmove expansion ultimatively fails.
8300 It's hardly profitable to TER a cmove into a cmove so avoid doing
8301 that by failing early if we end up recursing. */
8302 if (expanding_cond_expr_using_cmove
)
8305 /* If we cannot do a conditional move on the mode, try doing it
8306 with the promoted mode. */
8307 if (!can_conditionally_move_p (mode
))
8309 mode
= promote_mode (type
, mode
, &unsignedp
);
8310 if (!can_conditionally_move_p (mode
))
8312 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8315 temp
= assign_temp (type
, 0, 1);
8317 expanding_cond_expr_using_cmove
= true;
8319 expand_operands (treeop1
, treeop2
,
8320 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8322 if (TREE_CODE (treeop0
) == SSA_NAME
8323 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8325 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8326 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8327 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8328 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8329 comparison_mode
= TYPE_MODE (type
);
8330 unsignedp
= TYPE_UNSIGNED (type
);
8331 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8333 else if (COMPARISON_CLASS_P (treeop0
))
8335 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8336 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8337 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8338 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8339 unsignedp
= TYPE_UNSIGNED (type
);
8340 comparison_mode
= TYPE_MODE (type
);
8341 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8345 op00
= expand_normal (treeop0
);
8347 comparison_code
= NE
;
8348 comparison_mode
= GET_MODE (op00
);
8349 if (comparison_mode
== VOIDmode
)
8350 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8352 expanding_cond_expr_using_cmove
= false;
8354 if (GET_MODE (op1
) != mode
)
8355 op1
= gen_lowpart (mode
, op1
);
8357 if (GET_MODE (op2
) != mode
)
8358 op2
= gen_lowpart (mode
, op2
);
8360 /* Try to emit the conditional move. */
8361 insn
= emit_conditional_move (temp
, comparison_code
,
8362 op00
, op01
, comparison_mode
,
8366 /* If we could do the conditional move, emit the sequence,
8370 rtx_insn
*seq
= get_insns ();
8373 return convert_modes (orig_mode
, mode
, temp
, 0);
8376 /* Otherwise discard the sequence and fall back to code with
8383 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8384 enum expand_modifier modifier
)
8386 rtx op0
, op1
, op2
, temp
;
8387 rtx_code_label
*lab
;
8391 scalar_int_mode int_mode
;
8392 enum tree_code code
= ops
->code
;
8394 rtx subtarget
, original_target
;
8396 bool reduce_bit_field
;
8397 location_t loc
= ops
->location
;
8398 tree treeop0
, treeop1
, treeop2
;
8399 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8400 ? reduce_to_bit_field_precision ((expr), \
8406 mode
= TYPE_MODE (type
);
8407 unsignedp
= TYPE_UNSIGNED (type
);
8413 /* We should be called only on simple (binary or unary) expressions,
8414 exactly those that are valid in gimple expressions that aren't
8415 GIMPLE_SINGLE_RHS (or invalid). */
8416 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8417 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8418 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8420 ignore
= (target
== const0_rtx
8421 || ((CONVERT_EXPR_CODE_P (code
)
8422 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8423 && TREE_CODE (type
) == VOID_TYPE
));
8425 /* We should be called only if we need the result. */
8426 gcc_assert (!ignore
);
8428 /* An operation in what may be a bit-field type needs the
8429 result to be reduced to the precision of the bit-field type,
8430 which is narrower than that of the type's mode. */
8431 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8432 && !type_has_mode_precision_p (type
));
8434 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8437 /* Use subtarget as the target for operand 0 of a binary operation. */
8438 subtarget
= get_subtarget (target
);
8439 original_target
= target
;
8443 case NON_LVALUE_EXPR
:
8446 if (treeop0
== error_mark_node
)
8449 if (TREE_CODE (type
) == UNION_TYPE
)
8451 tree valtype
= TREE_TYPE (treeop0
);
8453 /* If both input and output are BLKmode, this conversion isn't doing
8454 anything except possibly changing memory attribute. */
8455 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8457 rtx result
= expand_expr (treeop0
, target
, tmode
,
8460 result
= copy_rtx (result
);
8461 set_mem_attributes (result
, type
, 0);
8467 if (TYPE_MODE (type
) != BLKmode
)
8468 target
= gen_reg_rtx (TYPE_MODE (type
));
8470 target
= assign_temp (type
, 1, 1);
8474 /* Store data into beginning of memory target. */
8475 store_expr (treeop0
,
8476 adjust_address (target
, TYPE_MODE (valtype
), 0),
8477 modifier
== EXPAND_STACK_PARM
,
8478 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8482 gcc_assert (REG_P (target
)
8483 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8485 /* Store this field into a union of the proper type. */
8486 poly_uint64 op0_size
8487 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8488 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8489 store_field (target
,
8490 /* The conversion must be constructed so that
8491 we know at compile time how many bits
8493 ordered_min (op0_size
, union_size
),
8494 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8498 /* Return the entire union. */
8502 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8504 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8507 /* If the signedness of the conversion differs and OP0 is
8508 a promoted SUBREG, clear that indication since we now
8509 have to do the proper extension. */
8510 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8511 && GET_CODE (op0
) == SUBREG
)
8512 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8514 return REDUCE_BIT_FIELD (op0
);
8517 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8518 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8519 if (GET_MODE (op0
) == mode
)
8522 /* If OP0 is a constant, just convert it into the proper mode. */
8523 else if (CONSTANT_P (op0
))
8525 tree inner_type
= TREE_TYPE (treeop0
);
8526 machine_mode inner_mode
= GET_MODE (op0
);
8528 if (inner_mode
== VOIDmode
)
8529 inner_mode
= TYPE_MODE (inner_type
);
8531 if (modifier
== EXPAND_INITIALIZER
)
8532 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8534 op0
= convert_modes (mode
, inner_mode
, op0
,
8535 TYPE_UNSIGNED (inner_type
));
8538 else if (modifier
== EXPAND_INITIALIZER
)
8539 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8540 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8542 else if (target
== 0)
8543 op0
= convert_to_mode (mode
, op0
,
8544 TYPE_UNSIGNED (TREE_TYPE
8548 convert_move (target
, op0
,
8549 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8553 return REDUCE_BIT_FIELD (op0
);
8555 case ADDR_SPACE_CONVERT_EXPR
:
8557 tree treeop0_type
= TREE_TYPE (treeop0
);
8559 gcc_assert (POINTER_TYPE_P (type
));
8560 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8562 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8563 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8565 /* Conversions between pointers to the same address space should
8566 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8567 gcc_assert (as_to
!= as_from
);
8569 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8571 /* Ask target code to handle conversion between pointers
8572 to overlapping address spaces. */
8573 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8574 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8576 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8580 /* For disjoint address spaces, converting anything but a null
8581 pointer invokes undefined behavior. We truncate or extend the
8582 value as if we'd converted via integers, which handles 0 as
8583 required, and all others as the programmer likely expects. */
8584 #ifndef POINTERS_EXTEND_UNSIGNED
8585 const int POINTERS_EXTEND_UNSIGNED
= 1;
8587 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8588 op0
, POINTERS_EXTEND_UNSIGNED
);
8594 case POINTER_PLUS_EXPR
:
8595 /* Even though the sizetype mode and the pointer's mode can be different
8596 expand is able to handle this correctly and get the correct result out
8597 of the PLUS_EXPR code. */
8598 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8599 if sizetype precision is smaller than pointer precision. */
8600 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8601 treeop1
= fold_convert_loc (loc
, type
,
8602 fold_convert_loc (loc
, ssizetype
,
8604 /* If sizetype precision is larger than pointer precision, truncate the
8605 offset to have matching modes. */
8606 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8607 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8611 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8612 something else, make sure we add the register to the constant and
8613 then to the other thing. This case can occur during strength
8614 reduction and doing it this way will produce better code if the
8615 frame pointer or argument pointer is eliminated.
8617 fold-const.c will ensure that the constant is always in the inner
8618 PLUS_EXPR, so the only case we need to do anything about is if
8619 sp, ap, or fp is our second argument, in which case we must swap
8620 the innermost first argument and our second argument. */
8622 if (TREE_CODE (treeop0
) == PLUS_EXPR
8623 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8625 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8626 || DECL_RTL (treeop1
) == stack_pointer_rtx
8627 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8632 /* If the result is to be ptr_mode and we are adding an integer to
8633 something, we might be forming a constant. So try to use
8634 plus_constant. If it produces a sum and we can't accept it,
8635 use force_operand. This allows P = &ARR[const] to generate
8636 efficient code on machines where a SYMBOL_REF is not a valid
8639 If this is an EXPAND_SUM call, always return the sum. */
8640 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8641 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8643 if (modifier
== EXPAND_STACK_PARM
)
8645 if (TREE_CODE (treeop0
) == INTEGER_CST
8646 && HWI_COMPUTABLE_MODE_P (mode
)
8647 && TREE_CONSTANT (treeop1
))
8651 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8653 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8655 /* Use wi::shwi to ensure that the constant is
8656 truncated according to the mode of OP1, then sign extended
8657 to a HOST_WIDE_INT. Using the constant directly can result
8658 in non-canonical RTL in a 64x32 cross compile. */
8659 wc
= TREE_INT_CST_LOW (treeop0
);
8661 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8662 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8663 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8664 op1
= force_operand (op1
, target
);
8665 return REDUCE_BIT_FIELD (op1
);
8668 else if (TREE_CODE (treeop1
) == INTEGER_CST
8669 && HWI_COMPUTABLE_MODE_P (mode
)
8670 && TREE_CONSTANT (treeop0
))
8674 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8676 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8677 (modifier
== EXPAND_INITIALIZER
8678 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8679 if (! CONSTANT_P (op0
))
8681 op1
= expand_expr (treeop1
, NULL_RTX
,
8682 VOIDmode
, modifier
);
8683 /* Return a PLUS if modifier says it's OK. */
8684 if (modifier
== EXPAND_SUM
8685 || modifier
== EXPAND_INITIALIZER
)
8686 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8689 /* Use wi::shwi to ensure that the constant is
8690 truncated according to the mode of OP1, then sign extended
8691 to a HOST_WIDE_INT. Using the constant directly can result
8692 in non-canonical RTL in a 64x32 cross compile. */
8693 wc
= TREE_INT_CST_LOW (treeop1
);
8695 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8696 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8697 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8698 op0
= force_operand (op0
, target
);
8699 return REDUCE_BIT_FIELD (op0
);
8703 /* Use TER to expand pointer addition of a negated value
8704 as pointer subtraction. */
8705 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8706 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8707 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8708 && TREE_CODE (treeop1
) == SSA_NAME
8709 && TYPE_MODE (TREE_TYPE (treeop0
))
8710 == TYPE_MODE (TREE_TYPE (treeop1
)))
8712 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8715 treeop1
= gimple_assign_rhs1 (def
);
8721 /* No sense saving up arithmetic to be done
8722 if it's all in the wrong mode to form part of an address.
8723 And force_operand won't know whether to sign-extend or
8725 if (modifier
!= EXPAND_INITIALIZER
8726 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8728 expand_operands (treeop0
, treeop1
,
8729 subtarget
, &op0
, &op1
, modifier
);
8730 if (op0
== const0_rtx
)
8732 if (op1
== const0_rtx
)
8737 expand_operands (treeop0
, treeop1
,
8738 subtarget
, &op0
, &op1
, modifier
);
8739 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8742 case POINTER_DIFF_EXPR
:
8744 /* For initializers, we are allowed to return a MINUS of two
8745 symbolic constants. Here we handle all cases when both operands
8747 /* Handle difference of two symbolic constants,
8748 for the sake of an initializer. */
8749 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8750 && really_constant_p (treeop0
)
8751 && really_constant_p (treeop1
))
8753 expand_operands (treeop0
, treeop1
,
8754 NULL_RTX
, &op0
, &op1
, modifier
);
8755 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8758 /* No sense saving up arithmetic to be done
8759 if it's all in the wrong mode to form part of an address.
8760 And force_operand won't know whether to sign-extend or
8762 if (modifier
!= EXPAND_INITIALIZER
8763 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8766 expand_operands (treeop0
, treeop1
,
8767 subtarget
, &op0
, &op1
, modifier
);
8769 /* Convert A - const to A + (-const). */
8770 if (CONST_INT_P (op1
))
8772 op1
= negate_rtx (mode
, op1
);
8773 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8778 case WIDEN_MULT_PLUS_EXPR
:
8779 case WIDEN_MULT_MINUS_EXPR
:
8780 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8781 op2
= expand_normal (treeop2
);
8782 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8786 case WIDEN_MULT_EXPR
:
8787 /* If first operand is constant, swap them.
8788 Thus the following special case checks need only
8789 check the second operand. */
8790 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8791 std::swap (treeop0
, treeop1
);
8793 /* First, check if we have a multiplication of one signed and one
8794 unsigned operand. */
8795 if (TREE_CODE (treeop1
) != INTEGER_CST
8796 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8797 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8799 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8800 this_optab
= usmul_widen_optab
;
8801 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8802 != CODE_FOR_nothing
)
8804 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8805 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8808 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8810 /* op0 and op1 might still be constant, despite the above
8811 != INTEGER_CST check. Handle it. */
8812 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8814 op0
= convert_modes (mode
, innermode
, op0
, true);
8815 op1
= convert_modes (mode
, innermode
, op1
, false);
8816 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8817 target
, unsignedp
));
8822 /* Check for a multiplication with matching signedness. */
8823 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8824 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8825 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8826 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8828 tree op0type
= TREE_TYPE (treeop0
);
8829 machine_mode innermode
= TYPE_MODE (op0type
);
8830 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8831 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8832 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8834 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8836 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8837 != CODE_FOR_nothing
)
8839 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8841 /* op0 and op1 might still be constant, despite the above
8842 != INTEGER_CST check. Handle it. */
8843 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8846 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
8848 = convert_modes (mode
, innermode
, op1
,
8849 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8850 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8854 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8855 unsignedp
, this_optab
);
8856 return REDUCE_BIT_FIELD (temp
);
8858 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8860 && innermode
== word_mode
)
8863 op0
= expand_normal (treeop0
);
8864 op1
= expand_normal (treeop1
);
8865 /* op0 and op1 might be constants, despite the above
8866 != INTEGER_CST check. Handle it. */
8867 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8868 goto widen_mult_const
;
8869 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8870 op1
= convert_modes (mode
, word_mode
, op1
,
8871 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8872 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8873 unsignedp
, OPTAB_LIB_WIDEN
);
8874 hipart
= gen_highpart (word_mode
, temp
);
8875 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8879 emit_move_insn (hipart
, htem
);
8880 return REDUCE_BIT_FIELD (temp
);
8884 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8885 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8886 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8887 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8890 /* If this is a fixed-point operation, then we cannot use the code
8891 below because "expand_mult" doesn't support sat/no-sat fixed-point
8893 if (ALL_FIXED_POINT_MODE_P (mode
))
8896 /* If first operand is constant, swap them.
8897 Thus the following special case checks need only
8898 check the second operand. */
8899 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8900 std::swap (treeop0
, treeop1
);
8902 /* Attempt to return something suitable for generating an
8903 indexed address, for machines that support that. */
8905 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8906 && tree_fits_shwi_p (treeop1
))
8908 tree exp1
= treeop1
;
8910 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8914 op0
= force_operand (op0
, NULL_RTX
);
8916 op0
= copy_to_mode_reg (mode
, op0
);
8918 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8919 gen_int_mode (tree_to_shwi (exp1
),
8920 TYPE_MODE (TREE_TYPE (exp1
)))));
8923 if (modifier
== EXPAND_STACK_PARM
)
8926 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8927 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8929 case TRUNC_MOD_EXPR
:
8930 case FLOOR_MOD_EXPR
:
8932 case ROUND_MOD_EXPR
:
8934 case TRUNC_DIV_EXPR
:
8935 case FLOOR_DIV_EXPR
:
8937 case ROUND_DIV_EXPR
:
8938 case EXACT_DIV_EXPR
:
8940 /* If this is a fixed-point operation, then we cannot use the code
8941 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8943 if (ALL_FIXED_POINT_MODE_P (mode
))
8946 if (modifier
== EXPAND_STACK_PARM
)
8948 /* Possible optimization: compute the dividend with EXPAND_SUM
8949 then if the divisor is constant can optimize the case
8950 where some terms of the dividend have coeffs divisible by it. */
8951 expand_operands (treeop0
, treeop1
,
8952 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8953 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8954 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8955 if (SCALAR_INT_MODE_P (mode
)
8957 && get_range_pos_neg (treeop0
) == 1
8958 && get_range_pos_neg (treeop1
) == 1)
8960 /* If both arguments are known to be positive when interpreted
8961 as signed, we can expand it as both signed and unsigned
8962 division or modulo. Choose the cheaper sequence in that case. */
8963 bool speed_p
= optimize_insn_for_speed_p ();
8964 do_pending_stack_adjust ();
8966 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8967 rtx_insn
*uns_insns
= get_insns ();
8970 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8971 rtx_insn
*sgn_insns
= get_insns ();
8973 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8974 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8976 /* If costs are the same then use as tie breaker the other
8978 if (uns_cost
== sgn_cost
)
8980 uns_cost
= seq_cost (uns_insns
, !speed_p
);
8981 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
8984 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
8986 emit_insn (uns_insns
);
8989 emit_insn (sgn_insns
);
8992 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
8997 case MULT_HIGHPART_EXPR
:
8998 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8999 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9003 case FIXED_CONVERT_EXPR
:
9004 op0
= expand_normal (treeop0
);
9005 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9006 target
= gen_reg_rtx (mode
);
9008 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9009 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9010 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9011 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9013 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9016 case FIX_TRUNC_EXPR
:
9017 op0
= expand_normal (treeop0
);
9018 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9019 target
= gen_reg_rtx (mode
);
9020 expand_fix (target
, op0
, unsignedp
);
9024 op0
= expand_normal (treeop0
);
9025 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9026 target
= gen_reg_rtx (mode
);
9027 /* expand_float can't figure out what to do if FROM has VOIDmode.
9028 So give it the correct mode. With -O, cse will optimize this. */
9029 if (GET_MODE (op0
) == VOIDmode
)
9030 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9032 expand_float (target
, op0
,
9033 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9037 op0
= expand_expr (treeop0
, subtarget
,
9038 VOIDmode
, EXPAND_NORMAL
);
9039 if (modifier
== EXPAND_STACK_PARM
)
9041 temp
= expand_unop (mode
,
9042 optab_for_tree_code (NEGATE_EXPR
, type
,
9046 return REDUCE_BIT_FIELD (temp
);
9050 op0
= expand_expr (treeop0
, subtarget
,
9051 VOIDmode
, EXPAND_NORMAL
);
9052 if (modifier
== EXPAND_STACK_PARM
)
9055 /* ABS_EXPR is not valid for complex arguments. */
9056 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9057 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9059 /* Unsigned abs is simply the operand. Testing here means we don't
9060 risk generating incorrect code below. */
9061 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9064 return expand_abs (mode
, op0
, target
, unsignedp
,
9065 safe_from_p (target
, treeop0
, 1));
9069 target
= original_target
;
9071 || modifier
== EXPAND_STACK_PARM
9072 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9073 || GET_MODE (target
) != mode
9075 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9076 target
= gen_reg_rtx (mode
);
9077 expand_operands (treeop0
, treeop1
,
9078 target
, &op0
, &op1
, EXPAND_NORMAL
);
9080 /* First try to do it with a special MIN or MAX instruction.
9081 If that does not win, use a conditional jump to select the proper
9083 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9084 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9089 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9090 and similarly for MAX <x, y>. */
9091 if (VECTOR_TYPE_P (type
))
9093 tree t0
= make_tree (type
, op0
);
9094 tree t1
= make_tree (type
, op1
);
9095 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9097 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9101 /* At this point, a MEM target is no longer useful; we will get better
9104 if (! REG_P (target
))
9105 target
= gen_reg_rtx (mode
);
9107 /* If op1 was placed in target, swap op0 and op1. */
9108 if (target
!= op0
&& target
== op1
)
9109 std::swap (op0
, op1
);
9111 /* We generate better code and avoid problems with op1 mentioning
9112 target by forcing op1 into a pseudo if it isn't a constant. */
9113 if (! CONSTANT_P (op1
))
9114 op1
= force_reg (mode
, op1
);
9117 enum rtx_code comparison_code
;
9120 if (code
== MAX_EXPR
)
9121 comparison_code
= unsignedp
? GEU
: GE
;
9123 comparison_code
= unsignedp
? LEU
: LE
;
9125 /* Canonicalize to comparisons against 0. */
9126 if (op1
== const1_rtx
)
9128 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9129 or (a != 0 ? a : 1) for unsigned.
9130 For MIN we are safe converting (a <= 1 ? a : 1)
9131 into (a <= 0 ? a : 1) */
9132 cmpop1
= const0_rtx
;
9133 if (code
== MAX_EXPR
)
9134 comparison_code
= unsignedp
? NE
: GT
;
9136 if (op1
== constm1_rtx
&& !unsignedp
)
9138 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9139 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9140 cmpop1
= const0_rtx
;
9141 if (code
== MIN_EXPR
)
9142 comparison_code
= LT
;
9145 /* Use a conditional move if possible. */
9146 if (can_conditionally_move_p (mode
))
9152 /* Try to emit the conditional move. */
9153 insn
= emit_conditional_move (target
, comparison_code
,
9158 /* If we could do the conditional move, emit the sequence,
9162 rtx_insn
*seq
= get_insns ();
9168 /* Otherwise discard the sequence and fall back to code with
9174 emit_move_insn (target
, op0
);
9176 lab
= gen_label_rtx ();
9177 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9178 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9179 profile_probability::uninitialized ());
9181 emit_move_insn (target
, op1
);
9186 op0
= expand_expr (treeop0
, subtarget
,
9187 VOIDmode
, EXPAND_NORMAL
);
9188 if (modifier
== EXPAND_STACK_PARM
)
9190 /* In case we have to reduce the result to bitfield precision
9191 for unsigned bitfield expand this as XOR with a proper constant
9193 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9195 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9196 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9197 false, GET_MODE_PRECISION (int_mode
));
9199 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9200 immed_wide_int_const (mask
, int_mode
),
9201 target
, 1, OPTAB_LIB_WIDEN
);
9204 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9208 /* ??? Can optimize bitwise operations with one arg constant.
9209 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9210 and (a bitwise1 b) bitwise2 b (etc)
9211 but that is probably not worth while. */
9220 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9221 || type_has_mode_precision_p (type
));
9227 /* If this is a fixed-point operation, then we cannot use the code
9228 below because "expand_shift" doesn't support sat/no-sat fixed-point
9230 if (ALL_FIXED_POINT_MODE_P (mode
))
9233 if (! safe_from_p (subtarget
, treeop1
, 1))
9235 if (modifier
== EXPAND_STACK_PARM
)
9237 op0
= expand_expr (treeop0
, subtarget
,
9238 VOIDmode
, EXPAND_NORMAL
);
9240 /* Left shift optimization when shifting across word_size boundary.
9242 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9243 there isn't native instruction to support this wide mode
9244 left shift. Given below scenario:
9246 Type A = (Type) B << C
9249 | dest_high | dest_low |
9253 If the shift amount C caused we shift B to across the word
9254 size boundary, i.e part of B shifted into high half of
9255 destination register, and part of B remains in the low
9256 half, then GCC will use the following left shift expand
9259 1. Initialize dest_low to B.
9260 2. Initialize every bit of dest_high to the sign bit of B.
9261 3. Logic left shift dest_low by C bit to finalize dest_low.
9262 The value of dest_low before this shift is kept in a temp D.
9263 4. Logic left shift dest_high by C.
9264 5. Logic right shift D by (word_size - C).
9265 6. Or the result of 4 and 5 to finalize dest_high.
9267 While, by checking gimple statements, if operand B is
9268 coming from signed extension, then we can simplify above
9271 1. dest_high = src_low >> (word_size - C).
9272 2. dest_low = src_low << C.
9274 We can use one arithmetic right shift to finish all the
9275 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9276 needed from 6 into 2.
9278 The case is similar for zero extension, except that we
9279 initialize dest_high to zero rather than copies of the sign
9280 bit from B. Furthermore, we need to use a logical right shift
9283 The choice of sign-extension versus zero-extension is
9284 determined entirely by whether or not B is signed and is
9285 independent of the current setting of unsignedp. */
9288 if (code
== LSHIFT_EXPR
9291 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9293 && TREE_CONSTANT (treeop1
)
9294 && TREE_CODE (treeop0
) == SSA_NAME
)
9296 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9297 if (is_gimple_assign (def
)
9298 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9300 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9301 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9303 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9304 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9305 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9306 >= GET_MODE_BITSIZE (word_mode
)))
9308 rtx_insn
*seq
, *seq_old
;
9309 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9311 bool extend_unsigned
9312 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9313 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9314 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9315 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9316 int_mode
, high_off
);
9317 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9318 - TREE_INT_CST_LOW (treeop1
));
9319 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9322 /* dest_high = src_low >> (word_size - C). */
9323 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9326 if (temp
!= dest_high
)
9327 emit_move_insn (dest_high
, temp
);
9329 /* dest_low = src_low << C. */
9330 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9331 treeop1
, dest_low
, unsignedp
);
9332 if (temp
!= dest_low
)
9333 emit_move_insn (dest_low
, temp
);
9339 if (have_insn_for (ASHIFT
, int_mode
))
9341 bool speed_p
= optimize_insn_for_speed_p ();
9343 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9348 seq_old
= get_insns ();
9350 if (seq_cost (seq
, speed_p
)
9351 >= seq_cost (seq_old
, speed_p
))
9362 if (temp
== NULL_RTX
)
9363 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9365 if (code
== LSHIFT_EXPR
)
9366 temp
= REDUCE_BIT_FIELD (temp
);
9370 /* Could determine the answer when only additive constants differ. Also,
9371 the addition of one can be handled by changing the condition. */
9378 case UNORDERED_EXPR
:
9387 temp
= do_store_flag (ops
,
9388 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9389 tmode
!= VOIDmode
? tmode
: mode
);
9393 /* Use a compare and a jump for BLKmode comparisons, or for function
9394 type comparisons is have_canonicalize_funcptr_for_compare. */
9397 || modifier
== EXPAND_STACK_PARM
9398 || ! safe_from_p (target
, treeop0
, 1)
9399 || ! safe_from_p (target
, treeop1
, 1)
9400 /* Make sure we don't have a hard reg (such as function's return
9401 value) live across basic blocks, if not optimizing. */
9402 || (!optimize
&& REG_P (target
)
9403 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9404 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9406 emit_move_insn (target
, const0_rtx
);
9408 rtx_code_label
*lab1
= gen_label_rtx ();
9409 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9410 profile_probability::uninitialized ());
9412 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9413 emit_move_insn (target
, constm1_rtx
);
9415 emit_move_insn (target
, const1_rtx
);
9421 /* Get the rtx code of the operands. */
9422 op0
= expand_normal (treeop0
);
9423 op1
= expand_normal (treeop1
);
9426 target
= gen_reg_rtx (TYPE_MODE (type
));
9428 /* If target overlaps with op1, then either we need to force
9429 op1 into a pseudo (if target also overlaps with op0),
9430 or write the complex parts in reverse order. */
9431 switch (GET_CODE (target
))
9434 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9436 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9438 complex_expr_force_op1
:
9439 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9440 emit_move_insn (temp
, op1
);
9444 complex_expr_swap_order
:
9445 /* Move the imaginary (op1) and real (op0) parts to their
9447 write_complex_part (target
, op1
, true);
9448 write_complex_part (target
, op0
, false);
9454 temp
= adjust_address_nv (target
,
9455 GET_MODE_INNER (GET_MODE (target
)), 0);
9456 if (reg_overlap_mentioned_p (temp
, op1
))
9458 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9459 temp
= adjust_address_nv (target
, imode
,
9460 GET_MODE_SIZE (imode
));
9461 if (reg_overlap_mentioned_p (temp
, op0
))
9462 goto complex_expr_force_op1
;
9463 goto complex_expr_swap_order
;
9467 if (reg_overlap_mentioned_p (target
, op1
))
9469 if (reg_overlap_mentioned_p (target
, op0
))
9470 goto complex_expr_force_op1
;
9471 goto complex_expr_swap_order
;
9476 /* Move the real (op0) and imaginary (op1) parts to their location. */
9477 write_complex_part (target
, op0
, false);
9478 write_complex_part (target
, op1
, true);
9482 case WIDEN_SUM_EXPR
:
9484 tree oprnd0
= treeop0
;
9485 tree oprnd1
= treeop1
;
9487 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9488 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9493 case VEC_UNPACK_HI_EXPR
:
9494 case VEC_UNPACK_LO_EXPR
:
9495 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9496 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9498 op0
= expand_normal (treeop0
);
9499 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9505 case VEC_UNPACK_FLOAT_HI_EXPR
:
9506 case VEC_UNPACK_FLOAT_LO_EXPR
:
9508 op0
= expand_normal (treeop0
);
9509 /* The signedness is determined from input operand. */
9510 temp
= expand_widen_pattern_expr
9511 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9512 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9518 case VEC_WIDEN_MULT_HI_EXPR
:
9519 case VEC_WIDEN_MULT_LO_EXPR
:
9520 case VEC_WIDEN_MULT_EVEN_EXPR
:
9521 case VEC_WIDEN_MULT_ODD_EXPR
:
9522 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9523 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9524 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9525 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9527 gcc_assert (target
);
9530 case VEC_PACK_SAT_EXPR
:
9531 case VEC_PACK_FIX_TRUNC_EXPR
:
9532 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9535 case VEC_PACK_TRUNC_EXPR
:
9536 if (VECTOR_BOOLEAN_TYPE_P (type
)
9537 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
9538 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
9539 && SCALAR_INT_MODE_P (mode
))
9541 struct expand_operand eops
[4];
9542 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
9543 expand_operands (treeop0
, treeop1
,
9544 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9545 this_optab
= vec_pack_sbool_trunc_optab
;
9546 enum insn_code icode
= optab_handler (this_optab
, imode
);
9547 create_output_operand (&eops
[0], target
, mode
);
9548 create_convert_operand_from (&eops
[1], op0
, imode
, false);
9549 create_convert_operand_from (&eops
[2], op1
, imode
, false);
9550 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
9551 create_input_operand (&eops
[3], temp
, imode
);
9552 expand_insn (icode
, 4, eops
);
9553 return eops
[0].value
;
9555 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9558 case VEC_PACK_FLOAT_EXPR
:
9559 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9560 expand_operands (treeop0
, treeop1
,
9561 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9562 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9564 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9565 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9567 gcc_assert (target
);
9572 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9573 vec_perm_builder sel
;
9574 if (TREE_CODE (treeop2
) == VECTOR_CST
9575 && tree_to_vec_perm_builder (&sel
, treeop2
))
9577 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9578 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9583 op2
= expand_normal (treeop2
);
9584 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9592 tree oprnd0
= treeop0
;
9593 tree oprnd1
= treeop1
;
9594 tree oprnd2
= treeop2
;
9597 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9598 op2
= expand_normal (oprnd2
);
9599 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9606 tree oprnd0
= treeop0
;
9607 tree oprnd1
= treeop1
;
9608 tree oprnd2
= treeop2
;
9611 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9612 op2
= expand_normal (oprnd2
);
9613 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9618 case REALIGN_LOAD_EXPR
:
9620 tree oprnd0
= treeop0
;
9621 tree oprnd1
= treeop1
;
9622 tree oprnd2
= treeop2
;
9625 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9626 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9627 op2
= expand_normal (oprnd2
);
9628 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9636 /* A COND_EXPR with its type being VOID_TYPE represents a
9637 conditional jump and is handled in
9638 expand_gimple_cond_expr. */
9639 gcc_assert (!VOID_TYPE_P (type
));
9641 /* Note that COND_EXPRs whose type is a structure or union
9642 are required to be constructed to contain assignments of
9643 a temporary variable, so that we can evaluate them here
9644 for side effect only. If type is void, we must do likewise. */
9646 gcc_assert (!TREE_ADDRESSABLE (type
)
9648 && TREE_TYPE (treeop1
) != void_type_node
9649 && TREE_TYPE (treeop2
) != void_type_node
);
9651 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9655 /* If we are not to produce a result, we have no target. Otherwise,
9656 if a target was specified use it; it will not be used as an
9657 intermediate target unless it is safe. If no target, use a
9660 if (modifier
!= EXPAND_STACK_PARM
9662 && safe_from_p (original_target
, treeop0
, 1)
9663 && GET_MODE (original_target
) == mode
9664 && !MEM_P (original_target
))
9665 temp
= original_target
;
9667 temp
= assign_temp (type
, 0, 1);
9669 do_pending_stack_adjust ();
9671 rtx_code_label
*lab0
= gen_label_rtx ();
9672 rtx_code_label
*lab1
= gen_label_rtx ();
9673 jumpifnot (treeop0
, lab0
,
9674 profile_probability::uninitialized ());
9675 store_expr (treeop1
, temp
,
9676 modifier
== EXPAND_STACK_PARM
,
9679 emit_jump_insn (targetm
.gen_jump (lab1
));
9682 store_expr (treeop2
, temp
,
9683 modifier
== EXPAND_STACK_PARM
,
9692 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9695 case VEC_DUPLICATE_EXPR
:
9696 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9697 target
= expand_vector_broadcast (mode
, op0
);
9698 gcc_assert (target
);
9701 case VEC_SERIES_EXPR
:
9702 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9703 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9705 case BIT_INSERT_EXPR
:
9707 unsigned bitpos
= tree_to_uhwi (treeop2
);
9709 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9710 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9712 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9713 rtx op0
= expand_normal (treeop0
);
9714 rtx op1
= expand_normal (treeop1
);
9715 rtx dst
= gen_reg_rtx (mode
);
9716 emit_move_insn (dst
, op0
);
9717 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9718 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9726 /* Here to do an ordinary binary operator. */
9728 expand_operands (treeop0
, treeop1
,
9729 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9731 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9733 if (modifier
== EXPAND_STACK_PARM
)
9735 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9736 unsignedp
, OPTAB_LIB_WIDEN
);
9738 /* Bitwise operations do not need bitfield reduction as we expect their
9739 operands being properly truncated. */
9740 if (code
== BIT_XOR_EXPR
9741 || code
== BIT_AND_EXPR
9742 || code
== BIT_IOR_EXPR
)
9744 return REDUCE_BIT_FIELD (temp
);
9746 #undef REDUCE_BIT_FIELD
9749 /* Return TRUE if expression STMT is suitable for replacement.
9750 Never consider memory loads as replaceable, because those don't ever lead
9751 into constant expressions. */
9754 stmt_is_replaceable_p (gimple
*stmt
)
9756 if (ssa_is_replaceable_p (stmt
))
9758 /* Don't move around loads. */
9759 if (!gimple_assign_single_p (stmt
)
9760 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9767 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9768 enum expand_modifier modifier
, rtx
*alt_rtl
,
9769 bool inner_reference_p
)
9771 rtx op0
, op1
, temp
, decl_rtl
;
9774 machine_mode mode
, dmode
;
9775 enum tree_code code
= TREE_CODE (exp
);
9776 rtx subtarget
, original_target
;
9779 bool reduce_bit_field
;
9780 location_t loc
= EXPR_LOCATION (exp
);
9781 struct separate_ops ops
;
9782 tree treeop0
, treeop1
, treeop2
;
9783 tree ssa_name
= NULL_TREE
;
9786 type
= TREE_TYPE (exp
);
9787 mode
= TYPE_MODE (type
);
9788 unsignedp
= TYPE_UNSIGNED (type
);
9790 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9791 if (!VL_EXP_CLASS_P (exp
))
9792 switch (TREE_CODE_LENGTH (code
))
9795 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9796 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9797 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9807 ignore
= (target
== const0_rtx
9808 || ((CONVERT_EXPR_CODE_P (code
)
9809 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9810 && TREE_CODE (type
) == VOID_TYPE
));
9812 /* An operation in what may be a bit-field type needs the
9813 result to be reduced to the precision of the bit-field type,
9814 which is narrower than that of the type's mode. */
9815 reduce_bit_field
= (!ignore
9816 && INTEGRAL_TYPE_P (type
)
9817 && !type_has_mode_precision_p (type
));
9819 /* If we are going to ignore this result, we need only do something
9820 if there is a side-effect somewhere in the expression. If there
9821 is, short-circuit the most common cases here. Note that we must
9822 not call expand_expr with anything but const0_rtx in case this
9823 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9827 if (! TREE_SIDE_EFFECTS (exp
))
9830 /* Ensure we reference a volatile object even if value is ignored, but
9831 don't do this if all we are doing is taking its address. */
9832 if (TREE_THIS_VOLATILE (exp
)
9833 && TREE_CODE (exp
) != FUNCTION_DECL
9834 && mode
!= VOIDmode
&& mode
!= BLKmode
9835 && modifier
!= EXPAND_CONST_ADDRESS
)
9837 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9843 if (TREE_CODE_CLASS (code
) == tcc_unary
9844 || code
== BIT_FIELD_REF
9845 || code
== COMPONENT_REF
9846 || code
== INDIRECT_REF
)
9847 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9850 else if (TREE_CODE_CLASS (code
) == tcc_binary
9851 || TREE_CODE_CLASS (code
) == tcc_comparison
9852 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9854 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9855 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9862 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9865 /* Use subtarget as the target for operand 0 of a binary operation. */
9866 subtarget
= get_subtarget (target
);
9867 original_target
= target
;
9873 tree function
= decl_function_context (exp
);
9875 temp
= label_rtx (exp
);
9876 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9878 if (function
!= current_function_decl
9880 LABEL_REF_NONLOCAL_P (temp
) = 1;
9882 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9887 /* ??? ivopts calls expander, without any preparation from
9888 out-of-ssa. So fake instructions as if this was an access to the
9889 base variable. This unnecessarily allocates a pseudo, see how we can
9890 reuse it, if partition base vars have it set already. */
9891 if (!currently_expanding_to_rtl
)
9893 tree var
= SSA_NAME_VAR (exp
);
9894 if (var
&& DECL_RTL_SET_P (var
))
9895 return DECL_RTL (var
);
9896 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9897 LAST_VIRTUAL_REGISTER
+ 1);
9900 g
= get_gimple_for_ssa_name (exp
);
9901 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9903 && modifier
== EXPAND_INITIALIZER
9904 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9905 && (optimize
|| !SSA_NAME_VAR (exp
)
9906 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9907 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9908 g
= SSA_NAME_DEF_STMT (exp
);
9912 location_t saved_loc
= curr_insn_location ();
9913 location_t loc
= gimple_location (g
);
9914 if (loc
!= UNKNOWN_LOCATION
)
9915 set_curr_insn_location (loc
);
9916 ops
.code
= gimple_assign_rhs_code (g
);
9917 switch (get_gimple_rhs_class (ops
.code
))
9919 case GIMPLE_TERNARY_RHS
:
9920 ops
.op2
= gimple_assign_rhs3 (g
);
9922 case GIMPLE_BINARY_RHS
:
9923 ops
.op1
= gimple_assign_rhs2 (g
);
9925 /* Try to expand conditonal compare. */
9926 if (targetm
.gen_ccmp_first
)
9928 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9929 r
= expand_ccmp_expr (g
, mode
);
9934 case GIMPLE_UNARY_RHS
:
9935 ops
.op0
= gimple_assign_rhs1 (g
);
9936 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9938 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9940 case GIMPLE_SINGLE_RHS
:
9942 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9943 tmode
, modifier
, alt_rtl
,
9950 set_curr_insn_location (saved_loc
);
9951 if (REG_P (r
) && !REG_EXPR (r
))
9952 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9957 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9958 exp
= SSA_NAME_VAR (ssa_name
);
9959 goto expand_decl_rtl
;
9963 /* If a static var's type was incomplete when the decl was written,
9964 but the type is complete now, lay out the decl now. */
9965 if (DECL_SIZE (exp
) == 0
9966 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9967 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9968 layout_decl (exp
, 0);
9974 decl_rtl
= DECL_RTL (exp
);
9976 gcc_assert (decl_rtl
);
9978 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9979 settings for VECTOR_TYPE_P that might switch for the function. */
9980 if (currently_expanding_to_rtl
9981 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9982 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9983 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9985 decl_rtl
= copy_rtx (decl_rtl
);
9987 /* Record writes to register variables. */
9988 if (modifier
== EXPAND_WRITE
9990 && HARD_REGISTER_P (decl_rtl
))
9991 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9992 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9994 /* Ensure variable marked as used even if it doesn't go through
9995 a parser. If it hasn't be used yet, write out an external
9998 TREE_USED (exp
) = 1;
10000 /* Show we haven't gotten RTL for this yet. */
10003 /* Variables inherited from containing functions should have
10004 been lowered by this point. */
10006 context
= decl_function_context (exp
);
10008 || SCOPE_FILE_SCOPE_P (context
)
10009 || context
== current_function_decl
10010 || TREE_STATIC (exp
)
10011 || DECL_EXTERNAL (exp
)
10012 /* ??? C++ creates functions that are not TREE_STATIC. */
10013 || TREE_CODE (exp
) == FUNCTION_DECL
);
10015 /* This is the case of an array whose size is to be determined
10016 from its initializer, while the initializer is still being parsed.
10017 ??? We aren't parsing while expanding anymore. */
10019 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10020 temp
= validize_mem (decl_rtl
);
10022 /* If DECL_RTL is memory, we are in the normal case and the
10023 address is not valid, get the address into a register. */
10025 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10028 *alt_rtl
= decl_rtl
;
10029 decl_rtl
= use_anchored_address (decl_rtl
);
10030 if (modifier
!= EXPAND_CONST_ADDRESS
10031 && modifier
!= EXPAND_SUM
10032 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10033 : GET_MODE (decl_rtl
),
10034 XEXP (decl_rtl
, 0),
10035 MEM_ADDR_SPACE (decl_rtl
)))
10036 temp
= replace_equiv_address (decl_rtl
,
10037 copy_rtx (XEXP (decl_rtl
, 0)));
10040 /* If we got something, return it. But first, set the alignment
10041 if the address is a register. */
10044 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10045 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10051 dmode
= DECL_MODE (exp
);
10053 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10055 /* If the mode of DECL_RTL does not match that of the decl,
10056 there are two cases: we are dealing with a BLKmode value
10057 that is returned in a register, or we are dealing with
10058 a promoted value. In the latter case, return a SUBREG
10059 of the wanted mode, but mark it so that we know that it
10060 was already extended. */
10061 if (REG_P (decl_rtl
)
10062 && dmode
!= BLKmode
10063 && GET_MODE (decl_rtl
) != dmode
)
10065 machine_mode pmode
;
10067 /* Get the signedness to be used for this variable. Ensure we get
10068 the same mode we got when the variable was declared. */
10069 if (code
!= SSA_NAME
)
10070 pmode
= promote_decl_mode (exp
, &unsignedp
);
10071 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10072 && gimple_code (g
) == GIMPLE_CALL
10073 && !gimple_call_internal_p (g
))
10074 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10075 gimple_call_fntype (g
),
10078 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10079 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10081 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10082 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10083 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10091 /* Given that TYPE_PRECISION (type) is not always equal to
10092 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10093 the former to the latter according to the signedness of the
10095 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
10096 temp
= immed_wide_int_const
10097 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
10103 tree tmp
= NULL_TREE
;
10104 if (VECTOR_MODE_P (mode
))
10105 return const_vector_from_tree (exp
);
10106 scalar_int_mode int_mode
;
10107 if (is_int_mode (mode
, &int_mode
))
10109 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10110 return const_scalar_mask_from_tree (int_mode
, exp
);
10114 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10116 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10117 type_for_mode
, exp
);
10122 vec
<constructor_elt
, va_gc
> *v
;
10123 /* Constructors need to be fixed-length. FIXME. */
10124 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10125 vec_alloc (v
, nunits
);
10126 for (unsigned int i
= 0; i
< nunits
; ++i
)
10127 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10128 tmp
= build_constructor (type
, v
);
10130 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10135 if (modifier
== EXPAND_WRITE
)
10137 /* Writing into CONST_DECL is always invalid, but handle it
10139 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10140 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10141 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10142 EXPAND_NORMAL
, as
);
10143 op0
= memory_address_addr_space (mode
, op0
, as
);
10144 temp
= gen_rtx_MEM (mode
, op0
);
10145 set_mem_addr_space (temp
, as
);
10148 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10151 /* If optimized, generate immediate CONST_DOUBLE
10152 which will be turned into memory by reload if necessary.
10154 We used to force a register so that loop.c could see it. But
10155 this does not allow gen_* patterns to perform optimizations with
10156 the constants. It also produces two insns in cases like "x = 1.0;".
10157 On most machines, floating-point constants are not permitted in
10158 many insns, so we'd end up copying it to a register in any case.
10160 Now, we do the copying in expand_binop, if appropriate. */
10161 return const_double_from_real_value (TREE_REAL_CST (exp
),
10162 TYPE_MODE (TREE_TYPE (exp
)));
10165 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10166 TYPE_MODE (TREE_TYPE (exp
)));
10169 /* Handle evaluating a complex constant in a CONCAT target. */
10170 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10172 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10175 rtarg
= XEXP (original_target
, 0);
10176 itarg
= XEXP (original_target
, 1);
10178 /* Move the real and imaginary parts separately. */
10179 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10180 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10183 emit_move_insn (rtarg
, op0
);
10185 emit_move_insn (itarg
, op1
);
10187 return original_target
;
10193 temp
= expand_expr_constant (exp
, 1, modifier
);
10195 /* temp contains a constant address.
10196 On RISC machines where a constant address isn't valid,
10197 make some insns to get that address into a register. */
10198 if (modifier
!= EXPAND_CONST_ADDRESS
10199 && modifier
!= EXPAND_INITIALIZER
10200 && modifier
!= EXPAND_SUM
10201 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10202 MEM_ADDR_SPACE (temp
)))
10203 return replace_equiv_address (temp
,
10204 copy_rtx (XEXP (temp
, 0)));
10208 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10212 tree val
= treeop0
;
10213 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10214 inner_reference_p
);
10216 if (!SAVE_EXPR_RESOLVED_P (exp
))
10218 /* We can indeed still hit this case, typically via builtin
10219 expanders calling save_expr immediately before expanding
10220 something. Assume this means that we only have to deal
10221 with non-BLKmode values. */
10222 gcc_assert (GET_MODE (ret
) != BLKmode
);
10224 val
= build_decl (curr_insn_location (),
10225 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10226 DECL_ARTIFICIAL (val
) = 1;
10227 DECL_IGNORED_P (val
) = 1;
10229 TREE_OPERAND (exp
, 0) = treeop0
;
10230 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10232 if (!CONSTANT_P (ret
))
10233 ret
= copy_to_reg (ret
);
10234 SET_DECL_RTL (val
, ret
);
10242 /* If we don't need the result, just ensure we evaluate any
10246 unsigned HOST_WIDE_INT idx
;
10249 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10250 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10255 return expand_constructor (exp
, target
, modifier
, false);
10257 case TARGET_MEM_REF
:
10260 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10261 enum insn_code icode
;
10262 unsigned int align
;
10264 op0
= addr_for_mem_ref (exp
, as
, true);
10265 op0
= memory_address_addr_space (mode
, op0
, as
);
10266 temp
= gen_rtx_MEM (mode
, op0
);
10267 set_mem_attributes (temp
, exp
, 0);
10268 set_mem_addr_space (temp
, as
);
10269 align
= get_object_alignment (exp
);
10270 if (modifier
!= EXPAND_WRITE
10271 && modifier
!= EXPAND_MEMORY
10273 && align
< GET_MODE_ALIGNMENT (mode
)
10274 /* If the target does not have special handling for unaligned
10275 loads of mode then it can use regular moves for them. */
10276 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10277 != CODE_FOR_nothing
))
10279 struct expand_operand ops
[2];
10281 /* We've already validated the memory, and we're creating a
10282 new pseudo destination. The predicates really can't fail,
10283 nor can the generator. */
10284 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10285 create_fixed_operand (&ops
[1], temp
);
10286 expand_insn (icode
, 2, ops
);
10287 temp
= ops
[0].value
;
10294 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10296 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10297 machine_mode address_mode
;
10298 tree base
= TREE_OPERAND (exp
, 0);
10300 enum insn_code icode
;
10302 /* Handle expansion of non-aliased memory with non-BLKmode. That
10303 might end up in a register. */
10304 if (mem_ref_refers_to_non_mem_p (exp
))
10306 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10307 base
= TREE_OPERAND (base
, 0);
10308 poly_uint64 type_size
;
10309 if (known_eq (offset
, 0)
10311 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10312 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10313 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10314 target
, tmode
, modifier
);
10315 if (TYPE_MODE (type
) == BLKmode
)
10317 temp
= assign_stack_temp (DECL_MODE (base
),
10318 GET_MODE_SIZE (DECL_MODE (base
)));
10319 store_expr (base
, temp
, 0, false, false);
10320 temp
= adjust_address (temp
, BLKmode
, offset
);
10321 set_mem_size (temp
, int_size_in_bytes (type
));
10324 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10325 bitsize_int (offset
* BITS_PER_UNIT
));
10326 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10327 return expand_expr (exp
, target
, tmode
, modifier
);
10329 address_mode
= targetm
.addr_space
.address_mode (as
);
10330 base
= TREE_OPERAND (exp
, 0);
10331 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10333 tree mask
= gimple_assign_rhs2 (def_stmt
);
10334 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10335 gimple_assign_rhs1 (def_stmt
), mask
);
10336 TREE_OPERAND (exp
, 0) = base
;
10338 align
= get_object_alignment (exp
);
10339 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10340 op0
= memory_address_addr_space (mode
, op0
, as
);
10341 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10343 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10344 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10345 op0
= memory_address_addr_space (mode
, op0
, as
);
10347 temp
= gen_rtx_MEM (mode
, op0
);
10348 set_mem_attributes (temp
, exp
, 0);
10349 set_mem_addr_space (temp
, as
);
10350 if (TREE_THIS_VOLATILE (exp
))
10351 MEM_VOLATILE_P (temp
) = 1;
10352 if (modifier
!= EXPAND_WRITE
10353 && modifier
!= EXPAND_MEMORY
10354 && !inner_reference_p
10356 && align
< GET_MODE_ALIGNMENT (mode
))
10358 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10359 != CODE_FOR_nothing
)
10361 struct expand_operand ops
[2];
10363 /* We've already validated the memory, and we're creating a
10364 new pseudo destination. The predicates really can't fail,
10365 nor can the generator. */
10366 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10367 create_fixed_operand (&ops
[1], temp
);
10368 expand_insn (icode
, 2, ops
);
10369 temp
= ops
[0].value
;
10371 else if (targetm
.slow_unaligned_access (mode
, align
))
10372 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10373 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10374 (modifier
== EXPAND_STACK_PARM
10375 ? NULL_RTX
: target
),
10376 mode
, mode
, false, alt_rtl
);
10379 && modifier
!= EXPAND_MEMORY
10380 && modifier
!= EXPAND_WRITE
)
10381 temp
= flip_storage_order (mode
, temp
);
10388 tree array
= treeop0
;
10389 tree index
= treeop1
;
10392 /* Fold an expression like: "foo"[2].
10393 This is not done in fold so it won't happen inside &.
10394 Don't fold if this is for wide characters since it's too
10395 difficult to do correctly and this is a very rare case. */
10397 if (modifier
!= EXPAND_CONST_ADDRESS
10398 && modifier
!= EXPAND_INITIALIZER
10399 && modifier
!= EXPAND_MEMORY
)
10401 tree t
= fold_read_from_constant_string (exp
);
10404 return expand_expr (t
, target
, tmode
, modifier
);
10407 /* If this is a constant index into a constant array,
10408 just get the value from the array. Handle both the cases when
10409 we have an explicit constructor and when our operand is a variable
10410 that was declared const. */
10412 if (modifier
!= EXPAND_CONST_ADDRESS
10413 && modifier
!= EXPAND_INITIALIZER
10414 && modifier
!= EXPAND_MEMORY
10415 && TREE_CODE (array
) == CONSTRUCTOR
10416 && ! TREE_SIDE_EFFECTS (array
)
10417 && TREE_CODE (index
) == INTEGER_CST
)
10419 unsigned HOST_WIDE_INT ix
;
10422 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10424 if (tree_int_cst_equal (field
, index
))
10426 if (!TREE_SIDE_EFFECTS (value
))
10427 return expand_expr (fold (value
), target
, tmode
, modifier
);
10432 else if (optimize
>= 1
10433 && modifier
!= EXPAND_CONST_ADDRESS
10434 && modifier
!= EXPAND_INITIALIZER
10435 && modifier
!= EXPAND_MEMORY
10436 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10437 && TREE_CODE (index
) == INTEGER_CST
10438 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10439 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10441 if (init
== NULL_TREE
)
10443 tree value
= build_zero_cst (type
);
10444 if (TREE_CODE (value
) == CONSTRUCTOR
)
10446 /* If VALUE is a CONSTRUCTOR, this optimization is only
10447 useful if this doesn't store the CONSTRUCTOR into
10448 memory. If it does, it is more efficient to just
10449 load the data from the array directly. */
10450 rtx ret
= expand_constructor (value
, target
,
10452 if (ret
== NULL_RTX
)
10457 return expand_expr (value
, target
, tmode
, modifier
);
10459 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10461 unsigned HOST_WIDE_INT ix
;
10464 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10466 if (tree_int_cst_equal (field
, index
))
10468 if (TREE_SIDE_EFFECTS (value
))
10471 if (TREE_CODE (value
) == CONSTRUCTOR
)
10473 /* If VALUE is a CONSTRUCTOR, this
10474 optimization is only useful if
10475 this doesn't store the CONSTRUCTOR
10476 into memory. If it does, it is more
10477 efficient to just load the data from
10478 the array directly. */
10479 rtx ret
= expand_constructor (value
, target
,
10481 if (ret
== NULL_RTX
)
10486 expand_expr (fold (value
), target
, tmode
, modifier
);
10489 else if (TREE_CODE (init
) == STRING_CST
)
10491 tree low_bound
= array_ref_low_bound (exp
);
10492 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10494 /* Optimize the special case of a zero lower bound.
10496 We convert the lower bound to sizetype to avoid problems
10497 with constant folding. E.g. suppose the lower bound is
10498 1 and its mode is QI. Without the conversion
10499 (ARRAY + (INDEX - (unsigned char)1))
10501 (ARRAY + (-(unsigned char)1) + INDEX)
10503 (ARRAY + 255 + INDEX). Oops! */
10504 if (!integer_zerop (low_bound
))
10505 index1
= size_diffop_loc (loc
, index1
,
10506 fold_convert_loc (loc
, sizetype
,
10509 if (tree_fits_uhwi_p (index1
)
10510 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10512 tree type
= TREE_TYPE (TREE_TYPE (init
));
10513 scalar_int_mode mode
;
10515 if (is_int_mode (TYPE_MODE (type
), &mode
)
10516 && GET_MODE_SIZE (mode
) == 1)
10517 return gen_int_mode (TREE_STRING_POINTER (init
)
10518 [TREE_INT_CST_LOW (index1
)],
10524 goto normal_inner_ref
;
10526 case COMPONENT_REF
:
10527 /* If the operand is a CONSTRUCTOR, we can just extract the
10528 appropriate field if it is present. */
10529 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10531 unsigned HOST_WIDE_INT idx
;
10533 scalar_int_mode field_mode
;
10535 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10537 if (field
== treeop1
10538 /* We can normally use the value of the field in the
10539 CONSTRUCTOR. However, if this is a bitfield in
10540 an integral mode that we can fit in a HOST_WIDE_INT,
10541 we must mask only the number of bits in the bitfield,
10542 since this is done implicitly by the constructor. If
10543 the bitfield does not meet either of those conditions,
10544 we can't do this optimization. */
10545 && (! DECL_BIT_FIELD (field
)
10546 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10547 && (GET_MODE_PRECISION (field_mode
)
10548 <= HOST_BITS_PER_WIDE_INT
))))
10550 if (DECL_BIT_FIELD (field
)
10551 && modifier
== EXPAND_STACK_PARM
)
10553 op0
= expand_expr (value
, target
, tmode
, modifier
);
10554 if (DECL_BIT_FIELD (field
))
10556 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10557 scalar_int_mode imode
10558 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10560 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10562 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10564 op0
= expand_and (imode
, op0
, op1
, target
);
10568 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10570 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10572 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10580 goto normal_inner_ref
;
10582 case BIT_FIELD_REF
:
10583 case ARRAY_RANGE_REF
:
10586 machine_mode mode1
, mode2
;
10587 poly_int64 bitsize
, bitpos
, bytepos
;
10589 int reversep
, volatilep
= 0, must_force_mem
;
10591 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10592 &unsignedp
, &reversep
, &volatilep
);
10593 rtx orig_op0
, memloc
;
10594 bool clear_mem_expr
= false;
10596 /* If we got back the original object, something is wrong. Perhaps
10597 we are evaluating an expression too early. In any event, don't
10598 infinitely recurse. */
10599 gcc_assert (tem
!= exp
);
10601 /* If TEM's type is a union of variable size, pass TARGET to the inner
10602 computation, since it will need a temporary and TARGET is known
10603 to have to do. This occurs in unchecked conversion in Ada. */
10605 = expand_expr_real (tem
,
10606 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10607 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10608 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10610 && modifier
!= EXPAND_STACK_PARM
10611 ? target
: NULL_RTX
),
10613 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10616 /* If the field has a mode, we want to access it in the
10617 field's mode, not the computed mode.
10618 If a MEM has VOIDmode (external with incomplete type),
10619 use BLKmode for it instead. */
10622 if (mode1
!= VOIDmode
)
10623 op0
= adjust_address (op0
, mode1
, 0);
10624 else if (GET_MODE (op0
) == VOIDmode
)
10625 op0
= adjust_address (op0
, BLKmode
, 0);
10629 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10631 /* Make sure bitpos is not negative, it can wreak havoc later. */
10632 if (maybe_lt (bitpos
, 0))
10634 gcc_checking_assert (offset
== NULL_TREE
);
10635 offset
= size_int (bits_to_bytes_round_down (bitpos
));
10636 bitpos
= num_trailing_bits (bitpos
);
10639 /* If we have either an offset, a BLKmode result, or a reference
10640 outside the underlying object, we must force it to memory.
10641 Such a case can occur in Ada if we have unchecked conversion
10642 of an expression from a scalar type to an aggregate type or
10643 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10644 passed a partially uninitialized object or a view-conversion
10645 to a larger size. */
10646 must_force_mem
= (offset
10647 || mode1
== BLKmode
10648 || (mode
== BLKmode
10649 && !int_mode_for_size (bitsize
, 1).exists ())
10650 || maybe_gt (bitpos
+ bitsize
,
10651 GET_MODE_BITSIZE (mode2
)));
10653 /* Handle CONCAT first. */
10654 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10656 if (known_eq (bitpos
, 0)
10657 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10658 && COMPLEX_MODE_P (mode1
)
10659 && COMPLEX_MODE_P (GET_MODE (op0
))
10660 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10661 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10664 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10665 if (mode1
!= GET_MODE (op0
))
10668 for (int i
= 0; i
< 2; i
++)
10670 rtx op
= read_complex_part (op0
, i
!= 0);
10671 if (GET_CODE (op
) == SUBREG
)
10672 op
= force_reg (GET_MODE (op
), op
);
10673 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10679 if (!REG_P (op
) && !MEM_P (op
))
10680 op
= force_reg (GET_MODE (op
), op
);
10681 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10685 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10689 if (known_eq (bitpos
, 0)
10690 && known_eq (bitsize
,
10691 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10692 && maybe_ne (bitsize
, 0))
10694 op0
= XEXP (op0
, 0);
10695 mode2
= GET_MODE (op0
);
10697 else if (known_eq (bitpos
,
10698 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10699 && known_eq (bitsize
,
10700 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10701 && maybe_ne (bitpos
, 0)
10702 && maybe_ne (bitsize
, 0))
10704 op0
= XEXP (op0
, 1);
10706 mode2
= GET_MODE (op0
);
10709 /* Otherwise force into memory. */
10710 must_force_mem
= 1;
10713 /* If this is a constant, put it in a register if it is a legitimate
10714 constant and we don't need a memory reference. */
10715 if (CONSTANT_P (op0
)
10716 && mode2
!= BLKmode
10717 && targetm
.legitimate_constant_p (mode2
, op0
)
10718 && !must_force_mem
)
10719 op0
= force_reg (mode2
, op0
);
10721 /* Otherwise, if this is a constant, try to force it to the constant
10722 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10723 is a legitimate constant. */
10724 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10725 op0
= validize_mem (memloc
);
10727 /* Otherwise, if this is a constant or the object is not in memory
10728 and need be, put it there. */
10729 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10731 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10732 emit_move_insn (memloc
, op0
);
10734 clear_mem_expr
= true;
10739 machine_mode address_mode
;
10740 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10743 gcc_assert (MEM_P (op0
));
10745 address_mode
= get_address_mode (op0
);
10746 if (GET_MODE (offset_rtx
) != address_mode
)
10748 /* We cannot be sure that the RTL in offset_rtx is valid outside
10749 of a memory address context, so force it into a register
10750 before attempting to convert it to the desired mode. */
10751 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10752 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10755 /* See the comment in expand_assignment for the rationale. */
10756 if (mode1
!= VOIDmode
10757 && maybe_ne (bitpos
, 0)
10758 && maybe_gt (bitsize
, 0)
10759 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10760 && multiple_p (bitpos
, bitsize
)
10761 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10762 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10764 op0
= adjust_address (op0
, mode1
, bytepos
);
10768 op0
= offset_address (op0
, offset_rtx
,
10769 highest_pow2_factor (offset
));
10772 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10773 record its alignment as BIGGEST_ALIGNMENT. */
10775 && known_eq (bitpos
, 0)
10777 && is_aligning_offset (offset
, tem
))
10778 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10780 /* Don't forget about volatility even if this is a bitfield. */
10781 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10783 if (op0
== orig_op0
)
10784 op0
= copy_rtx (op0
);
10786 MEM_VOLATILE_P (op0
) = 1;
10789 /* In cases where an aligned union has an unaligned object
10790 as a field, we might be extracting a BLKmode value from
10791 an integer-mode (e.g., SImode) object. Handle this case
10792 by doing the extract into an object as wide as the field
10793 (which we know to be the width of a basic mode), then
10794 storing into memory, and changing the mode to BLKmode. */
10795 if (mode1
== VOIDmode
10796 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10797 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10798 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10799 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10800 && modifier
!= EXPAND_CONST_ADDRESS
10801 && modifier
!= EXPAND_INITIALIZER
10802 && modifier
!= EXPAND_MEMORY
)
10803 /* If the bitfield is volatile and the bitsize
10804 is narrower than the access size of the bitfield,
10805 we need to extract bitfields from the access. */
10806 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10807 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10808 && mode1
!= BLKmode
10809 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10810 /* If the field isn't aligned enough to fetch as a memref,
10811 fetch it as a bit field. */
10812 || (mode1
!= BLKmode
10814 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10815 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10816 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10817 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10818 && modifier
!= EXPAND_MEMORY
10819 && ((modifier
== EXPAND_CONST_ADDRESS
10820 || modifier
== EXPAND_INITIALIZER
)
10822 : targetm
.slow_unaligned_access (mode1
,
10824 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10825 /* If the type and the field are a constant size and the
10826 size of the type isn't the same size as the bitfield,
10827 we must use bitfield operations. */
10828 || (known_size_p (bitsize
)
10829 && TYPE_SIZE (TREE_TYPE (exp
))
10830 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10831 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10834 machine_mode ext_mode
= mode
;
10836 if (ext_mode
== BLKmode
10837 && ! (target
!= 0 && MEM_P (op0
)
10839 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10840 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10842 if (ext_mode
== BLKmode
)
10845 target
= assign_temp (type
, 1, 1);
10847 /* ??? Unlike the similar test a few lines below, this one is
10848 very likely obsolete. */
10849 if (known_eq (bitsize
, 0))
10852 /* In this case, BITPOS must start at a byte boundary and
10853 TARGET, if specified, must be a MEM. */
10854 gcc_assert (MEM_P (op0
)
10855 && (!target
|| MEM_P (target
)));
10857 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
10858 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
10859 emit_block_move (target
,
10860 adjust_address (op0
, VOIDmode
, bytepos
),
10861 gen_int_mode (bytesize
, Pmode
),
10862 (modifier
== EXPAND_STACK_PARM
10863 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10868 /* If we have nothing to extract, the result will be 0 for targets
10869 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10870 return 0 for the sake of consistency, as reading a zero-sized
10871 bitfield is valid in Ada and the value is fully specified. */
10872 if (known_eq (bitsize
, 0))
10875 op0
= validize_mem (op0
);
10877 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10878 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10880 /* If the result has a record type and the extraction is done in
10881 an integral mode, then the field may be not aligned on a byte
10882 boundary; in this case, if it has reverse storage order, it
10883 needs to be extracted as a scalar field with reverse storage
10884 order and put back into memory order afterwards. */
10885 if (TREE_CODE (type
) == RECORD_TYPE
10886 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10887 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10889 gcc_checking_assert (known_ge (bitpos
, 0));
10890 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10891 (modifier
== EXPAND_STACK_PARM
10892 ? NULL_RTX
: target
),
10893 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10895 /* If the result has a record type and the mode of OP0 is an
10896 integral mode then, if BITSIZE is narrower than this mode
10897 and this is for big-endian data, we must put the field
10898 into the high-order bits. And we must also put it back
10899 into memory order if it has been previously reversed. */
10900 scalar_int_mode op0_mode
;
10901 if (TREE_CODE (type
) == RECORD_TYPE
10902 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10904 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10906 gcc_checking_assert (known_le (bitsize
, size
));
10907 if (maybe_lt (bitsize
, size
)
10908 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10909 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10910 size
- bitsize
, op0
, 1);
10913 op0
= flip_storage_order (op0_mode
, op0
);
10916 /* If the result type is BLKmode, store the data into a temporary
10917 of the appropriate type, but with the mode corresponding to the
10918 mode for the data we have (op0's mode). */
10919 if (mode
== BLKmode
)
10922 = assign_stack_temp_for_type (ext_mode
,
10923 GET_MODE_BITSIZE (ext_mode
),
10925 emit_move_insn (new_rtx
, op0
);
10926 op0
= copy_rtx (new_rtx
);
10927 PUT_MODE (op0
, BLKmode
);
10933 /* If the result is BLKmode, use that to access the object
10935 if (mode
== BLKmode
)
10938 /* Get a reference to just this component. */
10939 bytepos
= bits_to_bytes_round_down (bitpos
);
10940 if (modifier
== EXPAND_CONST_ADDRESS
10941 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10942 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
10944 op0
= adjust_address (op0
, mode1
, bytepos
);
10946 if (op0
== orig_op0
)
10947 op0
= copy_rtx (op0
);
10949 /* Don't set memory attributes if the base expression is
10950 SSA_NAME that got expanded as a MEM. In that case, we should
10951 just honor its original memory attributes. */
10952 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10953 set_mem_attributes (op0
, exp
, 0);
10955 if (REG_P (XEXP (op0
, 0)))
10956 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10958 /* If op0 is a temporary because the original expressions was forced
10959 to memory, clear MEM_EXPR so that the original expression cannot
10960 be marked as addressable through MEM_EXPR of the temporary. */
10961 if (clear_mem_expr
)
10962 set_mem_expr (op0
, NULL_TREE
);
10964 MEM_VOLATILE_P (op0
) |= volatilep
;
10967 && modifier
!= EXPAND_MEMORY
10968 && modifier
!= EXPAND_WRITE
)
10969 op0
= flip_storage_order (mode1
, op0
);
10971 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10972 || modifier
== EXPAND_CONST_ADDRESS
10973 || modifier
== EXPAND_INITIALIZER
)
10977 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10979 convert_move (target
, op0
, unsignedp
);
10984 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10987 /* All valid uses of __builtin_va_arg_pack () are removed during
10989 if (CALL_EXPR_VA_ARG_PACK (exp
))
10990 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10992 tree fndecl
= get_callee_fndecl (exp
), attr
;
10995 /* Don't diagnose the error attribute in thunks, those are
10996 artificially created. */
10997 && !CALL_FROM_THUNK_P (exp
)
10998 && (attr
= lookup_attribute ("error",
10999 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11001 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11002 error ("%Kcall to %qs declared with attribute error: %s", exp
,
11003 identifier_to_locale (ident
),
11004 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11007 /* Don't diagnose the warning attribute in thunks, those are
11008 artificially created. */
11009 && !CALL_FROM_THUNK_P (exp
)
11010 && (attr
= lookup_attribute ("warning",
11011 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11013 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11014 warning_at (tree_nonartificial_location (exp
),
11015 OPT_Wattribute_warning
,
11016 "%Kcall to %qs declared with attribute warning: %s",
11017 exp
, identifier_to_locale (ident
),
11018 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11021 /* Check for a built-in function. */
11022 if (fndecl
&& fndecl_built_in_p (fndecl
))
11024 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11025 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11028 return expand_call (exp
, target
, ignore
);
11030 case VIEW_CONVERT_EXPR
:
11033 /* If we are converting to BLKmode, try to avoid an intermediate
11034 temporary by fetching an inner memory reference. */
11035 if (mode
== BLKmode
11036 && poly_int_tree_p (TYPE_SIZE (type
))
11037 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11038 && handled_component_p (treeop0
))
11040 machine_mode mode1
;
11041 poly_int64 bitsize
, bitpos
, bytepos
;
11043 int unsignedp
, reversep
, volatilep
= 0;
11045 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11046 &unsignedp
, &reversep
, &volatilep
);
11049 /* ??? We should work harder and deal with non-zero offsets. */
11051 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11053 && known_size_p (bitsize
)
11054 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11056 /* See the normal_inner_ref case for the rationale. */
11058 = expand_expr_real (tem
,
11059 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11060 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11062 && modifier
!= EXPAND_STACK_PARM
11063 ? target
: NULL_RTX
),
11065 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11068 if (MEM_P (orig_op0
))
11072 /* Get a reference to just this component. */
11073 if (modifier
== EXPAND_CONST_ADDRESS
11074 || modifier
== EXPAND_SUM
11075 || modifier
== EXPAND_INITIALIZER
)
11076 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11078 op0
= adjust_address (op0
, mode
, bytepos
);
11080 if (op0
== orig_op0
)
11081 op0
= copy_rtx (op0
);
11083 set_mem_attributes (op0
, treeop0
, 0);
11084 if (REG_P (XEXP (op0
, 0)))
11085 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11087 MEM_VOLATILE_P (op0
) |= volatilep
;
11093 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11094 NULL
, inner_reference_p
);
11096 /* If the input and output modes are both the same, we are done. */
11097 if (mode
== GET_MODE (op0
))
11099 /* If neither mode is BLKmode, and both modes are the same size
11100 then we can use gen_lowpart. */
11101 else if (mode
!= BLKmode
11102 && GET_MODE (op0
) != BLKmode
11103 && known_eq (GET_MODE_PRECISION (mode
),
11104 GET_MODE_PRECISION (GET_MODE (op0
)))
11105 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11107 if (GET_CODE (op0
) == SUBREG
)
11108 op0
= force_reg (GET_MODE (op0
), op0
);
11109 temp
= gen_lowpart_common (mode
, op0
);
11114 if (!REG_P (op0
) && !MEM_P (op0
))
11115 op0
= force_reg (GET_MODE (op0
), op0
);
11116 op0
= gen_lowpart (mode
, op0
);
11119 /* If both types are integral, convert from one mode to the other. */
11120 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11121 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11122 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11123 /* If the output type is a bit-field type, do an extraction. */
11124 else if (reduce_bit_field
)
11125 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11126 TYPE_UNSIGNED (type
), NULL_RTX
,
11127 mode
, mode
, false, NULL
);
11128 /* As a last resort, spill op0 to memory, and reload it in a
11130 else if (!MEM_P (op0
))
11132 /* If the operand is not a MEM, force it into memory. Since we
11133 are going to be changing the mode of the MEM, don't call
11134 force_const_mem for constants because we don't allow pool
11135 constants to change mode. */
11136 tree inner_type
= TREE_TYPE (treeop0
);
11138 gcc_assert (!TREE_ADDRESSABLE (exp
));
11140 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11142 = assign_stack_temp_for_type
11143 (TYPE_MODE (inner_type
),
11144 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11146 emit_move_insn (target
, op0
);
11150 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11151 output type is such that the operand is known to be aligned, indicate
11152 that it is. Otherwise, we need only be concerned about alignment for
11153 non-BLKmode results. */
11156 enum insn_code icode
;
11158 if (modifier
!= EXPAND_WRITE
11159 && modifier
!= EXPAND_MEMORY
11160 && !inner_reference_p
11162 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11164 /* If the target does have special handling for unaligned
11165 loads of mode then use them. */
11166 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11167 != CODE_FOR_nothing
)
11171 op0
= adjust_address (op0
, mode
, 0);
11172 /* We've already validated the memory, and we're creating a
11173 new pseudo destination. The predicates really can't
11175 reg
= gen_reg_rtx (mode
);
11177 /* Nor can the insn generator. */
11178 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11182 else if (STRICT_ALIGNMENT
)
11184 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11185 poly_uint64 temp_size
= mode_size
;
11186 if (GET_MODE (op0
) != BLKmode
)
11187 temp_size
= upper_bound (temp_size
,
11188 GET_MODE_SIZE (GET_MODE (op0
)));
11190 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11191 rtx new_with_op0_mode
11192 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11194 gcc_assert (!TREE_ADDRESSABLE (exp
));
11196 if (GET_MODE (op0
) == BLKmode
)
11198 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11199 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11200 (modifier
== EXPAND_STACK_PARM
11201 ? BLOCK_OP_CALL_PARM
11202 : BLOCK_OP_NORMAL
));
11205 emit_move_insn (new_with_op0_mode
, op0
);
11211 op0
= adjust_address (op0
, mode
, 0);
11218 tree lhs
= treeop0
;
11219 tree rhs
= treeop1
;
11220 gcc_assert (ignore
);
11222 /* Check for |= or &= of a bitfield of size one into another bitfield
11223 of size 1. In this case, (unless we need the result of the
11224 assignment) we can do this more efficiently with a
11225 test followed by an assignment, if necessary.
11227 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11228 things change so we do, this code should be enhanced to
11230 if (TREE_CODE (lhs
) == COMPONENT_REF
11231 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11232 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11233 && TREE_OPERAND (rhs
, 0) == lhs
11234 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11235 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11236 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11238 rtx_code_label
*label
= gen_label_rtx ();
11239 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11240 profile_probability prob
= profile_probability::uninitialized ();
11242 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
11244 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
11245 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11247 do_pending_stack_adjust ();
11248 emit_label (label
);
11252 expand_assignment (lhs
, rhs
, false);
11257 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11259 case REALPART_EXPR
:
11260 op0
= expand_normal (treeop0
);
11261 return read_complex_part (op0
, false);
11263 case IMAGPART_EXPR
:
11264 op0
= expand_normal (treeop0
);
11265 return read_complex_part (op0
, true);
11272 /* Expanded in cfgexpand.c. */
11273 gcc_unreachable ();
11275 case TRY_CATCH_EXPR
:
11277 case EH_FILTER_EXPR
:
11278 case TRY_FINALLY_EXPR
:
11279 /* Lowered by tree-eh.c. */
11280 gcc_unreachable ();
11282 case WITH_CLEANUP_EXPR
:
11283 case CLEANUP_POINT_EXPR
:
11285 case CASE_LABEL_EXPR
:
11290 case COMPOUND_EXPR
:
11291 case PREINCREMENT_EXPR
:
11292 case PREDECREMENT_EXPR
:
11293 case POSTINCREMENT_EXPR
:
11294 case POSTDECREMENT_EXPR
:
11297 case COMPOUND_LITERAL_EXPR
:
11298 /* Lowered by gimplify.c. */
11299 gcc_unreachable ();
11302 /* Function descriptors are not valid except for as
11303 initialization constants, and should not be expanded. */
11304 gcc_unreachable ();
11306 case WITH_SIZE_EXPR
:
11307 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11308 have pulled out the size to use in whatever context it needed. */
11309 return expand_expr_real (treeop0
, original_target
, tmode
,
11310 modifier
, alt_rtl
, inner_reference_p
);
11313 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11317 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11318 signedness of TYPE), possibly returning the result in TARGET.
11319 TYPE is known to be a partial integer type. */
11321 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11323 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11324 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11326 /* For constant values, reduce using build_int_cst_type. */
11327 poly_int64 const_exp
;
11328 if (poly_int_rtx_p (exp
, &const_exp
))
11330 tree t
= build_int_cst_type (type
, const_exp
);
11331 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11333 else if (TYPE_UNSIGNED (type
))
11335 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11336 rtx mask
= immed_wide_int_const
11337 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11338 return expand_and (mode
, exp
, mask
, target
);
11342 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11343 int count
= GET_MODE_PRECISION (mode
) - prec
;
11344 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11345 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11349 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11350 when applied to the address of EXP produces an address known to be
11351 aligned more than BIGGEST_ALIGNMENT. */
11354 is_aligning_offset (const_tree offset
, const_tree exp
)
11356 /* Strip off any conversions. */
11357 while (CONVERT_EXPR_P (offset
))
11358 offset
= TREE_OPERAND (offset
, 0);
11360 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11361 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11362 if (TREE_CODE (offset
) != BIT_AND_EXPR
11363 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11364 || compare_tree_int (TREE_OPERAND (offset
, 1),
11365 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11366 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11369 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11370 It must be NEGATE_EXPR. Then strip any more conversions. */
11371 offset
= TREE_OPERAND (offset
, 0);
11372 while (CONVERT_EXPR_P (offset
))
11373 offset
= TREE_OPERAND (offset
, 0);
11375 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11378 offset
= TREE_OPERAND (offset
, 0);
11379 while (CONVERT_EXPR_P (offset
))
11380 offset
= TREE_OPERAND (offset
, 0);
11382 /* This must now be the address of EXP. */
11383 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11386 /* Return the tree node if an ARG corresponds to a string constant or zero
11387 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11388 non-constant) offset in bytes within the string that ARG is accessing.
11389 If MEM_SIZE is non-zero the storage size of the memory is returned.
11390 If DECL is non-zero the constant declaration is returned if available. */
11393 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
11398 /* Non-constant index into the character array in an ARRAY_REF
11399 expression or null. */
11400 tree varidx
= NULL_TREE
;
11402 poly_int64 base_off
= 0;
11404 if (TREE_CODE (arg
) == ADDR_EXPR
)
11406 arg
= TREE_OPERAND (arg
, 0);
11408 if (TREE_CODE (arg
) == ARRAY_REF
)
11410 tree idx
= TREE_OPERAND (arg
, 1);
11411 if (TREE_CODE (idx
) != INTEGER_CST
)
11413 /* From a pointer (but not array) argument extract the variable
11414 index to prevent get_addr_base_and_unit_offset() from failing
11415 due to it. Use it later to compute the non-constant offset
11416 into the string and return it to the caller. */
11418 ref
= TREE_OPERAND (arg
, 0);
11420 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11423 if (!integer_zerop (array_ref_low_bound (arg
)))
11426 if (!integer_onep (array_ref_element_size (arg
)))
11430 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11432 || (TREE_CODE (array
) != VAR_DECL
11433 && TREE_CODE (array
) != CONST_DECL
11434 && TREE_CODE (array
) != STRING_CST
))
11437 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11439 tree arg0
= TREE_OPERAND (arg
, 0);
11440 tree arg1
= TREE_OPERAND (arg
, 1);
11443 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
11446 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
11452 /* Avoid pointers to arrays (see bug 86622). */
11453 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11454 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11455 && !(decl
&& !*decl
)
11456 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11457 && mem_size
&& tree_fits_uhwi_p (*mem_size
)
11458 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11461 tree type
= TREE_TYPE (offset
);
11462 arg1
= fold_convert (type
, arg1
);
11463 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11468 else if (TREE_CODE (arg
) == SSA_NAME
)
11470 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
11471 if (!is_gimple_assign (stmt
))
11474 tree rhs1
= gimple_assign_rhs1 (stmt
);
11475 tree_code code
= gimple_assign_rhs_code (stmt
);
11476 if (code
== ADDR_EXPR
)
11477 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
11478 else if (code
!= POINTER_PLUS_EXPR
)
11482 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
11484 /* Avoid pointers to arrays (see bug 86622). */
11485 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
11486 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
11487 && !(decl
&& !*decl
)
11488 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11489 && mem_size
&& tree_fits_uhwi_p (*mem_size
)
11490 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11493 tree rhs2
= gimple_assign_rhs2 (stmt
);
11494 tree type
= TREE_TYPE (offset
);
11495 rhs2
= fold_convert (type
, rhs2
);
11496 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
11501 else if (DECL_P (arg
))
11506 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11509 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11512 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11513 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11514 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11517 offset
= fold_convert (sizetype
, varidx
);
11520 if (TREE_CODE (array
) == STRING_CST
)
11522 *ptr_offset
= fold_convert (sizetype
, offset
);
11524 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11527 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
11528 >= TREE_STRING_LENGTH (array
));
11532 if (!VAR_P (array
) && TREE_CODE (array
) != CONST_DECL
)
11535 tree init
= ctor_for_folding (array
);
11537 /* Handle variables initialized with string literals. */
11538 if (!init
|| init
== error_mark_node
)
11540 if (TREE_CODE (init
) == CONSTRUCTOR
)
11542 /* Convert the 64-bit constant offset to a wider type to avoid
11545 if (!base_off
.is_constant (&wioff
))
11548 wioff
*= BITS_PER_UNIT
;
11549 if (!wi::fits_uhwi_p (wioff
))
11552 base_off
= wioff
.to_uhwi ();
11553 unsigned HOST_WIDE_INT fieldoff
= 0;
11554 init
= fold_ctor_reference (NULL_TREE
, init
, base_off
, 0, array
,
11556 HOST_WIDE_INT cstoff
;
11557 if (!base_off
.is_constant (&cstoff
))
11560 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11561 tree off
= build_int_cst (sizetype
, cstoff
);
11563 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11571 *ptr_offset
= offset
;
11573 tree eltype
= TREE_TYPE (init
);
11574 tree initsize
= TYPE_SIZE_UNIT (eltype
);
11576 *mem_size
= initsize
;
11581 if (TREE_CODE (init
) == INTEGER_CST
11582 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
11583 || TYPE_MAIN_VARIANT (eltype
) == char_type_node
))
11585 /* For a reference to (address of) a single constant character,
11586 store the native representation of the character in CHARBUF.
11587 If the reference is to an element of an array or a member
11588 of a struct, only consider narrow characters until ctors
11589 for wide character arrays are transformed to STRING_CSTs
11590 like those for narrow arrays. */
11591 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
11592 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
11595 /* Construct a string literal with elements of ELTYPE and
11596 the representation above. Then strip
11597 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
11598 init
= build_string_literal (len
, (char *)charbuf
, eltype
);
11599 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
11603 if (TREE_CODE (init
) != STRING_CST
)
11606 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
11611 /* Compute the modular multiplicative inverse of A modulo M
11612 using extended Euclid's algorithm. Assumes A and M are coprime. */
11614 mod_inv (const wide_int
&a
, const wide_int
&b
)
11616 /* Verify the assumption. */
11617 gcc_checking_assert (wi::eq_p (wi::gcd (a
, b
), 1));
11619 unsigned int p
= a
.get_precision () + 1;
11620 gcc_checking_assert (b
.get_precision () + 1 == p
);
11621 wide_int c
= wide_int::from (a
, p
, UNSIGNED
);
11622 wide_int d
= wide_int::from (b
, p
, UNSIGNED
);
11623 wide_int x0
= wide_int::from (0, p
, UNSIGNED
);
11624 wide_int x1
= wide_int::from (1, p
, UNSIGNED
);
11626 if (wi::eq_p (b
, 1))
11627 return wide_int::from (1, p
, UNSIGNED
);
11629 while (wi::gt_p (c
, 1, UNSIGNED
))
11632 wide_int q
= wi::divmod_trunc (c
, d
, UNSIGNED
, &d
);
11635 x0
= wi::sub (x1
, wi::mul (q
, x0
));
11638 if (wi::lt_p (x1
, 0, SIGNED
))
11643 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
11644 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
11645 for C2 > 0 to x & C3 == C2
11646 for C2 < 0 to x & C3 == (C2 & C3). */
11648 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11650 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11651 tree treeop0
= gimple_assign_rhs1 (stmt
);
11652 tree treeop1
= gimple_assign_rhs2 (stmt
);
11653 tree type
= TREE_TYPE (*arg0
);
11654 scalar_int_mode mode
;
11655 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11657 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11658 || TYPE_PRECISION (type
) <= 1
11659 || TYPE_UNSIGNED (type
)
11660 /* Signed x % c == 0 should have been optimized into unsigned modulo
11662 || integer_zerop (*arg1
)
11663 /* If c is known to be non-negative, modulo will be expanded as unsigned
11665 || get_range_pos_neg (treeop0
) == 1)
11668 /* x % c == d where d < 0 && d <= -c should be always false. */
11669 if (tree_int_cst_sgn (*arg1
) == -1
11670 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
11673 int prec
= TYPE_PRECISION (type
);
11674 wide_int w
= wi::to_wide (treeop1
) - 1;
11675 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
11676 tree c3
= wide_int_to_tree (type
, w
);
11678 if (tree_int_cst_sgn (*arg1
) == -1)
11679 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
11681 rtx op0
= expand_normal (treeop0
);
11682 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11684 bool speed_p
= optimize_insn_for_speed_p ();
11686 do_pending_stack_adjust ();
11688 location_t loc
= gimple_location (stmt
);
11689 struct separate_ops ops
;
11690 ops
.code
= TRUNC_MOD_EXPR
;
11691 ops
.location
= loc
;
11692 ops
.type
= TREE_TYPE (treeop0
);
11695 ops
.op2
= NULL_TREE
;
11697 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11699 rtx_insn
*moinsns
= get_insns ();
11702 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11703 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11704 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11706 ops
.code
= BIT_AND_EXPR
;
11707 ops
.location
= loc
;
11708 ops
.type
= TREE_TYPE (treeop0
);
11711 ops
.op2
= NULL_TREE
;
11713 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11715 rtx_insn
*muinsns
= get_insns ();
11718 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11719 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
11720 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
11722 if (mocost
<= mucost
)
11724 emit_insn (moinsns
);
11725 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11729 emit_insn (muinsns
);
11730 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
11735 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
11737 (X - C2) * C3 <= C4 (or >), where
11738 C3 is modular multiplicative inverse of C1 and 1<<prec and
11739 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
11740 if C2 > ((1<<prec) - 1) % C1).
11741 If C1 is even, S = ctz (C1) and C2 is 0, use
11742 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
11743 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
11745 For signed (X % C1) == 0 if C1 is odd to (all operations in it
11747 (X * C3) + C4 <= 2 * C4, where
11748 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
11749 C4 is ((1<<(prec - 1) - 1) / C1).
11750 If C1 is even, S = ctz(C1), use
11751 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
11752 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
11753 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
11755 See the Hacker's Delight book, section 10-17. */
11757 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11759 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
11760 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
11765 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11769 tree treeop0
= gimple_assign_rhs1 (stmt
);
11770 tree treeop1
= gimple_assign_rhs2 (stmt
);
11771 if (TREE_CODE (treeop0
) != SSA_NAME
11772 || TREE_CODE (treeop1
) != INTEGER_CST
11773 /* Don't optimize the undefined behavior case x % 0;
11774 x % 1 should have been optimized into zero, punt if
11775 it makes it here for whatever reason;
11776 x % -c should have been optimized into x % c. */
11777 || compare_tree_int (treeop1
, 2) <= 0
11778 /* Likewise x % c == d where d >= c should be always false. */
11779 || tree_int_cst_le (treeop1
, *arg1
))
11782 /* Unsigned x % pow2 is handled right already, for signed
11783 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
11784 if (integer_pow2p (treeop1
))
11785 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
11787 tree type
= TREE_TYPE (*arg0
);
11788 scalar_int_mode mode
;
11789 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11791 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11792 || TYPE_PRECISION (type
) <= 1)
11795 signop sgn
= UNSIGNED
;
11796 /* If both operands are known to have the sign bit clear, handle
11797 even the signed modulo case as unsigned. treeop1 is always
11798 positive >= 2, checked above. */
11799 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
11802 if (!TYPE_UNSIGNED (type
))
11804 if (tree_int_cst_sgn (*arg1
) == -1)
11806 type
= unsigned_type_for (type
);
11807 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
11811 int prec
= TYPE_PRECISION (type
);
11812 wide_int w
= wi::to_wide (treeop1
);
11813 int shift
= wi::ctz (w
);
11814 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
11815 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
11816 If C1 is odd, we can handle all cases by subtracting
11817 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
11818 e.g. by testing for overflow on the subtraction, punt on that for now
11820 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
11824 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
11825 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
11829 imm_use_iterator imm_iter
;
11830 use_operand_p use_p
;
11831 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
11833 gimple
*use_stmt
= USE_STMT (use_p
);
11834 /* Punt if treeop0 is used in the same bb in a division
11835 or another modulo with the same divisor. We should expect
11836 the division and modulo combined together. */
11837 if (use_stmt
== stmt
11838 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
11840 if (!is_gimple_assign (use_stmt
)
11841 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
11842 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
11844 if (gimple_assign_rhs1 (use_stmt
) != treeop0
11845 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
11850 w
= wi::lrshift (w
, shift
);
11851 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
11852 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
11853 wide_int m
= wide_int::from (mod_inv (a
, b
), prec
, UNSIGNED
);
11854 tree c3
= wide_int_to_tree (type
, m
);
11855 tree c5
= NULL_TREE
;
11857 if (sgn
== UNSIGNED
)
11859 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
11860 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
11861 otherwise use < or subtract one from C4. E.g. for
11862 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
11863 x % 3U == 1 already needs to be
11864 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
11865 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
11868 d
= wi::lrshift (d
, shift
);
11872 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
11874 d
= wi::lshift (e
, 1);
11877 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
11878 d
= wi::lrshift (e
, shift
- 1);
11880 c5
= wide_int_to_tree (type
, e
);
11882 tree c4
= wide_int_to_tree (type
, d
);
11884 rtx op0
= expand_normal (treeop0
);
11885 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11887 bool speed_p
= optimize_insn_for_speed_p ();
11889 do_pending_stack_adjust ();
11891 location_t loc
= gimple_location (stmt
);
11892 struct separate_ops ops
;
11893 ops
.code
= TRUNC_MOD_EXPR
;
11894 ops
.location
= loc
;
11895 ops
.type
= TREE_TYPE (treeop0
);
11898 ops
.op2
= NULL_TREE
;
11900 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11902 rtx_insn
*moinsns
= get_insns ();
11905 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11906 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11907 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11909 tree t
= fold_convert_loc (loc
, type
, treeop0
);
11910 if (!integer_zerop (*arg1
))
11911 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
11912 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
11914 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
11917 tree s
= build_int_cst (NULL_TREE
, shift
);
11918 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
11922 rtx mur
= expand_normal (t
);
11923 rtx_insn
*muinsns
= get_insns ();
11926 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11927 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
11928 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
11930 if (mocost
<= mucost
)
11932 emit_insn (moinsns
);
11933 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11937 emit_insn (muinsns
);
11938 *arg0
= make_tree (type
, mur
);
11940 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
11943 /* Generate code to calculate OPS, and exploded expression
11944 using a store-flag instruction and return an rtx for the result.
11945 OPS reflects a comparison.
11947 If TARGET is nonzero, store the result there if convenient.
11949 Return zero if there is no suitable set-flag instruction
11950 available on this machine.
11952 Once expand_expr has been called on the arguments of the comparison,
11953 we are committed to doing the store flag, since it is not safe to
11954 re-evaluate the expression. We emit the store-flag insn by calling
11955 emit_store_flag, but only expand the arguments if we have a reason
11956 to believe that emit_store_flag will be successful. If we think that
11957 it will, but it isn't, we have to simulate the store-flag with a
11958 set/jump/set sequence. */
11961 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11963 enum rtx_code code
;
11964 tree arg0
, arg1
, type
;
11965 machine_mode operand_mode
;
11968 rtx subtarget
= target
;
11969 location_t loc
= ops
->location
;
11974 /* Don't crash if the comparison was erroneous. */
11975 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11978 type
= TREE_TYPE (arg0
);
11979 operand_mode
= TYPE_MODE (type
);
11980 unsignedp
= TYPE_UNSIGNED (type
);
11982 /* We won't bother with BLKmode store-flag operations because it would mean
11983 passing a lot of information to emit_store_flag. */
11984 if (operand_mode
== BLKmode
)
11987 /* We won't bother with store-flag operations involving function pointers
11988 when function pointers must be canonicalized before comparisons. */
11989 if (targetm
.have_canonicalize_funcptr_for_compare ()
11990 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
11991 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
11992 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
11993 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
11999 /* For vector typed comparisons emit code to generate the desired
12000 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
12001 expander for this. */
12002 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
12004 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
12005 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
12006 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
12007 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
12010 tree if_true
= constant_boolean_node (true, ops
->type
);
12011 tree if_false
= constant_boolean_node (false, ops
->type
);
12012 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
12017 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
12018 into (x - C2) * C3 < C4. */
12019 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
12020 && TREE_CODE (arg0
) == SSA_NAME
12021 && TREE_CODE (arg1
) == INTEGER_CST
)
12023 enum tree_code code
= maybe_optimize_mod_cmp (ops
->code
, &arg0
, &arg1
);
12024 if (code
!= ops
->code
)
12026 struct separate_ops nops
= *ops
;
12027 nops
.code
= ops
->code
= code
;
12030 nops
.type
= TREE_TYPE (arg0
);
12031 return do_store_flag (&nops
, target
, mode
);
12035 /* Get the rtx comparison code to use. We know that EXP is a comparison
12036 operation of some type. Some comparisons against 1 and -1 can be
12037 converted to comparisons with zero. Do so here so that the tests
12038 below will be aware that we have a comparison with zero. These
12039 tests will not catch constants in the first operand, but constants
12040 are rarely passed as the first operand. */
12051 if (integer_onep (arg1
))
12052 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
12054 code
= unsignedp
? LTU
: LT
;
12057 if (! unsignedp
&& integer_all_onesp (arg1
))
12058 arg1
= integer_zero_node
, code
= LT
;
12060 code
= unsignedp
? LEU
: LE
;
12063 if (! unsignedp
&& integer_all_onesp (arg1
))
12064 arg1
= integer_zero_node
, code
= GE
;
12066 code
= unsignedp
? GTU
: GT
;
12069 if (integer_onep (arg1
))
12070 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
12072 code
= unsignedp
? GEU
: GE
;
12075 case UNORDERED_EXPR
:
12101 gcc_unreachable ();
12104 /* Put a constant second. */
12105 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
12106 || TREE_CODE (arg0
) == FIXED_CST
)
12108 std::swap (arg0
, arg1
);
12109 code
= swap_condition (code
);
12112 /* If this is an equality or inequality test of a single bit, we can
12113 do this by shifting the bit being tested to the low-order bit and
12114 masking the result with the constant 1. If the condition was EQ,
12115 we xor it with 1. This does not require an scc insn and is faster
12116 than an scc insn even if we have it.
12118 The code to make this transformation was moved into fold_single_bit_test,
12119 so we just call into the folder and expand its result. */
12121 if ((code
== NE
|| code
== EQ
)
12122 && integer_zerop (arg1
)
12123 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
12125 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
12127 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
12129 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
12130 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
12131 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
12132 gimple_assign_rhs1 (srcstmt
),
12133 gimple_assign_rhs2 (srcstmt
));
12134 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
12136 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
12140 if (! get_subtarget (target
)
12141 || GET_MODE (subtarget
) != operand_mode
)
12144 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
12147 target
= gen_reg_rtx (mode
);
12149 /* Try a cstore if possible. */
12150 return emit_store_flag_force (target
, code
, op0
, op1
,
12151 operand_mode
, unsignedp
,
12152 (TYPE_PRECISION (ops
->type
) == 1
12153 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
12156 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12157 0 otherwise (i.e. if there is no casesi instruction).
12159 DEFAULT_PROBABILITY is the probability of jumping to the default
12162 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
12163 rtx table_label
, rtx default_label
, rtx fallback_label
,
12164 profile_probability default_probability
)
12166 struct expand_operand ops
[5];
12167 scalar_int_mode index_mode
= SImode
;
12168 rtx op1
, op2
, index
;
12170 if (! targetm
.have_casesi ())
12173 /* The index must be some form of integer. Convert it to SImode. */
12174 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
12175 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
12177 rtx rangertx
= expand_normal (range
);
12179 /* We must handle the endpoints in the original mode. */
12180 index_expr
= build2 (MINUS_EXPR
, index_type
,
12181 index_expr
, minval
);
12182 minval
= integer_zero_node
;
12183 index
= expand_normal (index_expr
);
12185 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
12186 omode
, 1, default_label
,
12187 default_probability
);
12188 /* Now we can safely truncate. */
12189 index
= convert_to_mode (index_mode
, index
, 0);
12193 if (omode
!= index_mode
)
12195 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
12196 index_expr
= fold_convert (index_type
, index_expr
);
12199 index
= expand_normal (index_expr
);
12202 do_pending_stack_adjust ();
12204 op1
= expand_normal (minval
);
12205 op2
= expand_normal (range
);
12207 create_input_operand (&ops
[0], index
, index_mode
);
12208 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
12209 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
12210 create_fixed_operand (&ops
[3], table_label
);
12211 create_fixed_operand (&ops
[4], (default_label
12213 : fallback_label
));
12214 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
12218 /* Attempt to generate a tablejump instruction; same concept. */
12219 /* Subroutine of the next function.
12221 INDEX is the value being switched on, with the lowest value
12222 in the table already subtracted.
12223 MODE is its expected mode (needed if INDEX is constant).
12224 RANGE is the length of the jump table.
12225 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12227 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12228 index value is out of range.
12229 DEFAULT_PROBABILITY is the probability of jumping to
12230 the default label. */
12233 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
12234 rtx default_label
, profile_probability default_probability
)
12238 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
12239 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
12241 /* Do an unsigned comparison (in the proper mode) between the index
12242 expression and the value which represents the length of the range.
12243 Since we just finished subtracting the lower bound of the range
12244 from the index expression, this comparison allows us to simultaneously
12245 check that the original index expression value is both greater than
12246 or equal to the minimum value of the range and less than or equal to
12247 the maximum value of the range. */
12250 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
12251 default_label
, default_probability
);
12253 /* If index is in range, it must fit in Pmode.
12254 Convert to Pmode so we can index with it. */
12257 unsigned int width
;
12259 /* We know the value of INDEX is between 0 and RANGE. If we have a
12260 sign-extended subreg, and RANGE does not have the sign bit set, then
12261 we have a value that is valid for both sign and zero extension. In
12262 this case, we get better code if we sign extend. */
12263 if (GET_CODE (index
) == SUBREG
12264 && SUBREG_PROMOTED_VAR_P (index
)
12265 && SUBREG_PROMOTED_SIGNED_P (index
)
12266 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
12267 <= HOST_BITS_PER_WIDE_INT
)
12268 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
12269 index
= convert_to_mode (Pmode
, index
, 0);
12271 index
= convert_to_mode (Pmode
, index
, 1);
12274 /* Don't let a MEM slip through, because then INDEX that comes
12275 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12276 and break_out_memory_refs will go to work on it and mess it up. */
12277 #ifdef PIC_CASE_VECTOR_ADDRESS
12278 if (flag_pic
&& !REG_P (index
))
12279 index
= copy_to_mode_reg (Pmode
, index
);
12282 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12283 GET_MODE_SIZE, because this indicates how large insns are. The other
12284 uses should all be Pmode, because they are addresses. This code
12285 could fail if addresses and insns are not the same size. */
12286 index
= simplify_gen_binary (MULT
, Pmode
, index
,
12287 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
12289 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
12290 gen_rtx_LABEL_REF (Pmode
, table_label
));
12292 #ifdef PIC_CASE_VECTOR_ADDRESS
12294 index
= PIC_CASE_VECTOR_ADDRESS (index
);
12297 index
= memory_address (CASE_VECTOR_MODE
, index
);
12298 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
12299 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
12300 convert_move (temp
, vector
, 0);
12302 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
12304 /* If we are generating PIC code or if the table is PC-relative, the
12305 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12306 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
12311 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
12312 rtx table_label
, rtx default_label
,
12313 profile_probability default_probability
)
12317 if (! targetm
.have_tablejump ())
12320 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
12321 fold_convert (index_type
, index_expr
),
12322 fold_convert (index_type
, minval
));
12323 index
= expand_normal (index_expr
);
12324 do_pending_stack_adjust ();
12326 do_tablejump (index
, TYPE_MODE (index_type
),
12327 convert_modes (TYPE_MODE (index_type
),
12328 TYPE_MODE (TREE_TYPE (range
)),
12329 expand_normal (range
),
12330 TYPE_UNSIGNED (TREE_TYPE (range
))),
12331 table_label
, default_label
, default_probability
);
12335 /* Return a CONST_VECTOR rtx representing vector mask for
12336 a VECTOR_CST of booleans. */
12338 const_vector_mask_from_tree (tree exp
)
12340 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12341 machine_mode inner
= GET_MODE_INNER (mode
);
12343 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12344 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12345 unsigned int count
= builder
.encoded_nelts ();
12346 for (unsigned int i
= 0; i
< count
; ++i
)
12348 tree elt
= VECTOR_CST_ELT (exp
, i
);
12349 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12350 if (integer_zerop (elt
))
12351 builder
.quick_push (CONST0_RTX (inner
));
12352 else if (integer_onep (elt
)
12353 || integer_minus_onep (elt
))
12354 builder
.quick_push (CONSTM1_RTX (inner
));
12356 gcc_unreachable ();
12358 return builder
.build ();
12361 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
12362 Return a constant scalar rtx of mode MODE in which bit X is set if element
12363 X of EXP is nonzero. */
12365 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
12367 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
12370 /* The result has a fixed number of bits so the input must too. */
12371 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
12372 for (unsigned int i
= 0; i
< nunits
; ++i
)
12374 elt
= VECTOR_CST_ELT (exp
, i
);
12375 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12376 if (integer_all_onesp (elt
))
12377 res
= wi::set_bit (res
, i
);
12379 gcc_assert (integer_zerop (elt
));
12382 return immed_wide_int_const (res
, mode
);
12385 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12387 const_vector_from_tree (tree exp
)
12389 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12391 if (initializer_zerop (exp
))
12392 return CONST0_RTX (mode
);
12394 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
12395 return const_vector_mask_from_tree (exp
);
12397 machine_mode inner
= GET_MODE_INNER (mode
);
12399 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12400 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12401 unsigned int count
= builder
.encoded_nelts ();
12402 for (unsigned int i
= 0; i
< count
; ++i
)
12404 tree elt
= VECTOR_CST_ELT (exp
, i
);
12405 if (TREE_CODE (elt
) == REAL_CST
)
12406 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
12408 else if (TREE_CODE (elt
) == FIXED_CST
)
12409 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
12412 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
12415 return builder
.build ();
12418 /* Build a decl for a personality function given a language prefix. */
12421 build_personality_function (const char *lang
)
12423 const char *unwind_and_version
;
12427 switch (targetm_common
.except_unwind_info (&global_options
))
12432 unwind_and_version
= "_sj0";
12436 unwind_and_version
= "_v0";
12439 unwind_and_version
= "_seh0";
12442 gcc_unreachable ();
12445 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
12447 type
= build_function_type_list (integer_type_node
, integer_type_node
,
12448 long_long_unsigned_type_node
,
12449 ptr_type_node
, ptr_type_node
, NULL_TREE
);
12450 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
12451 get_identifier (name
), type
);
12452 DECL_ARTIFICIAL (decl
) = 1;
12453 DECL_EXTERNAL (decl
) = 1;
12454 TREE_PUBLIC (decl
) = 1;
12456 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12457 are the flags assigned by targetm.encode_section_info. */
12458 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
12463 /* Extracts the personality function of DECL and returns the corresponding
12467 get_personality_function (tree decl
)
12469 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
12470 enum eh_personality_kind pk
;
12472 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
12473 if (pk
== eh_personality_none
)
12477 && pk
== eh_personality_any
)
12478 personality
= lang_hooks
.eh_personality ();
12480 if (pk
== eh_personality_lang
)
12481 gcc_assert (personality
!= NULL_TREE
);
12483 return XEXP (DECL_RTL (personality
), 0);
12486 /* Returns a tree for the size of EXP in bytes. */
12489 tree_expr_size (const_tree exp
)
12492 && DECL_SIZE_UNIT (exp
) != 0)
12493 return DECL_SIZE_UNIT (exp
);
12495 return size_in_bytes (TREE_TYPE (exp
));
12498 /* Return an rtx for the size in bytes of the value of EXP. */
12501 expr_size (tree exp
)
12505 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12506 size
= TREE_OPERAND (exp
, 1);
12509 size
= tree_expr_size (exp
);
12511 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12514 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12517 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12518 if the size can vary or is larger than an integer. */
12520 static HOST_WIDE_INT
12521 int_expr_size (tree exp
)
12525 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12526 size
= TREE_OPERAND (exp
, 1);
12529 size
= tree_expr_size (exp
);
12533 if (size
== 0 || !tree_fits_shwi_p (size
))
12536 return tree_to_shwi (size
);