1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
);
79 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
80 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
81 static rtx_insn
*compress_float_constant (rtx
, rtx
);
82 static rtx
get_subtarget (rtx
);
83 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
84 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
85 machine_mode
, tree
, alias_set_type
, bool, bool);
87 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
89 static int is_aligning_offset (const_tree
, const_tree
);
90 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
91 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
93 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
95 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
97 static rtx
const_vector_from_tree (tree
);
98 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
99 static tree
tree_expr_size (const_tree
);
100 static HOST_WIDE_INT
int_expr_size (tree
);
101 static void convert_mode_scalar (rtx
, rtx
, int);
104 /* This is run to set up which modes can be used
105 directly in memory and to initialize the block move optab. It is run
106 at the beginning of compilation and when the target is reinitialized. */
109 init_expr_target (void)
116 /* Try indexing by frame ptr and try by stack ptr.
117 It is known that on the Convex the stack ptr isn't a valid index.
118 With luck, one or the other is valid on any machine. */
119 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
120 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
122 /* A scratch register we can modify in-place below to avoid
123 useless RTL allocations. */
124 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
126 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
127 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
128 PATTERN (insn
) = pat
;
130 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
131 mode
= (machine_mode
) ((int) mode
+ 1))
135 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
136 PUT_MODE (mem
, mode
);
137 PUT_MODE (mem1
, mode
);
139 /* See if there is some register that can be used in this mode and
140 directly loaded or stored from memory. */
142 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
143 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
144 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
147 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
150 set_mode_and_regno (reg
, mode
, regno
);
153 SET_DEST (pat
) = reg
;
154 if (recog (pat
, insn
, &num_clobbers
) >= 0)
155 direct_load
[(int) mode
] = 1;
157 SET_SRC (pat
) = mem1
;
158 SET_DEST (pat
) = reg
;
159 if (recog (pat
, insn
, &num_clobbers
) >= 0)
160 direct_load
[(int) mode
] = 1;
163 SET_DEST (pat
) = mem
;
164 if (recog (pat
, insn
, &num_clobbers
) >= 0)
165 direct_store
[(int) mode
] = 1;
168 SET_DEST (pat
) = mem1
;
169 if (recog (pat
, insn
, &num_clobbers
) >= 0)
170 direct_store
[(int) mode
] = 1;
174 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
176 opt_scalar_float_mode mode_iter
;
177 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
179 scalar_float_mode mode
= mode_iter
.require ();
180 scalar_float_mode srcmode
;
181 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
185 ic
= can_extend_p (mode
, srcmode
, 0);
186 if (ic
== CODE_FOR_nothing
)
189 PUT_MODE (mem
, srcmode
);
191 if (insn_operand_matches (ic
, 1, mem
))
192 float_extend_from_mem
[mode
][srcmode
] = true;
197 /* This is run at the start of compiling a function. */
202 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
205 /* Copy data from FROM to TO, where the machine modes are not the same.
206 Both modes may be integer, or both may be floating, or both may be
208 UNSIGNEDP should be nonzero if FROM is an unsigned type.
209 This causes zero-extension instead of sign-extension. */
212 convert_move (rtx to
, rtx from
, int unsignedp
)
214 machine_mode to_mode
= GET_MODE (to
);
215 machine_mode from_mode
= GET_MODE (from
);
217 gcc_assert (to_mode
!= BLKmode
);
218 gcc_assert (from_mode
!= BLKmode
);
220 /* If the source and destination are already the same, then there's
225 /* If FROM is a SUBREG that indicates that we have already done at least
226 the required extension, strip it. We don't handle such SUBREGs as
229 scalar_int_mode to_int_mode
;
230 if (GET_CODE (from
) == SUBREG
231 && SUBREG_PROMOTED_VAR_P (from
)
232 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
233 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
234 >= GET_MODE_PRECISION (to_int_mode
))
235 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
237 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
238 from_mode
= to_int_mode
;
241 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
243 if (to_mode
== from_mode
244 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
246 emit_move_insn (to
, from
);
250 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
252 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
253 GET_MODE_BITSIZE (to_mode
)));
255 if (VECTOR_MODE_P (to_mode
))
256 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
258 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
260 emit_move_insn (to
, from
);
264 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
266 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
267 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
271 convert_mode_scalar (to
, from
, unsignedp
);
274 /* Like convert_move, but deals only with scalar modes. */
277 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
279 /* Both modes should be scalar types. */
280 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
281 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
282 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
283 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
287 gcc_assert (to_real
== from_real
);
289 /* rtx code for making an equivalent value. */
290 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
291 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
299 gcc_assert ((GET_MODE_PRECISION (from_mode
)
300 != GET_MODE_PRECISION (to_mode
))
301 || (DECIMAL_FLOAT_MODE_P (from_mode
)
302 != DECIMAL_FLOAT_MODE_P (to_mode
)));
304 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
305 /* Conversion between decimal float and binary float, same size. */
306 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
307 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
312 /* Try converting directly if the insn is supported. */
314 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
315 if (code
!= CODE_FOR_nothing
)
317 emit_unop_insn (code
, to
, from
,
318 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
322 /* Otherwise use a libcall. */
323 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
325 /* Is this conversion implemented yet? */
326 gcc_assert (libcall
);
329 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
331 insns
= get_insns ();
333 emit_libcall_block (insns
, to
, value
,
334 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
336 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
340 /* Handle pointer conversion. */ /* SPEE 900220. */
341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
345 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
352 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
355 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
361 /* Targets are expected to provide conversion insns between PxImode and
362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
363 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
365 scalar_int_mode full_mode
366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
368 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
369 != CODE_FOR_nothing
);
371 if (full_mode
!= from_mode
)
372 from
= convert_to_mode (full_mode
, from
, unsignedp
);
373 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
377 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
380 scalar_int_mode full_mode
381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
382 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
383 enum insn_code icode
;
385 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
386 gcc_assert (icode
!= CODE_FOR_nothing
);
388 if (to_mode
== full_mode
)
390 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
394 new_from
= gen_reg_rtx (full_mode
);
395 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
397 /* else proceed to integer conversions below. */
398 from_mode
= full_mode
;
402 /* Make sure both are fixed-point modes or both are not. */
403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
407 /* If we widen from_mode to to_mode and they are in the same class,
408 we won't saturate the result.
409 Otherwise, always saturate the result to play safe. */
410 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
411 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
412 expand_fixed_convert (to
, from
, 0, 0);
414 expand_fixed_convert (to
, from
, 0, 1);
418 /* Now both modes are integers. */
420 /* Handle expanding beyond a word. */
421 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
422 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
429 scalar_mode lowpart_mode
;
430 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
432 /* Try converting directly if the insn is supported. */
433 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
436 /* If FROM is a SUBREG, put it into a register. Do this
437 so that we always generate the same set of insns for
438 better cse'ing; if an intermediate assignment occurred,
439 we won't be doing the operation directly on the SUBREG. */
440 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
441 from
= force_reg (from_mode
, from
);
442 emit_unop_insn (code
, to
, from
, equiv_code
);
445 /* Next, try converting via full word. */
446 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
447 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
448 != CODE_FOR_nothing
))
450 rtx word_to
= gen_reg_rtx (word_mode
);
453 if (reg_overlap_mentioned_p (to
, from
))
454 from
= force_reg (from_mode
, from
);
457 convert_move (word_to
, from
, unsignedp
);
458 emit_unop_insn (code
, to
, word_to
, equiv_code
);
462 /* No special multiword conversion insn; do it by hand. */
465 /* Since we will turn this into a no conflict block, we must ensure
466 the source does not overlap the target so force it into an isolated
467 register when maybe so. Likewise for any MEM input, since the
468 conversion sequence might require several references to it and we
469 must ensure we're getting the same value every time. */
471 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
472 from
= force_reg (from_mode
, from
);
474 /* Get a copy of FROM widened to a word, if necessary. */
475 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
476 lowpart_mode
= word_mode
;
478 lowpart_mode
= from_mode
;
480 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
482 lowpart
= gen_lowpart (lowpart_mode
, to
);
483 emit_move_insn (lowpart
, lowfrom
);
485 /* Compute the value to put in each remaining word. */
487 fill_value
= const0_rtx
;
489 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
490 LT
, lowfrom
, const0_rtx
,
491 lowpart_mode
, 0, -1);
493 /* Fill the remaining words. */
494 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
496 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
497 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
499 gcc_assert (subword
);
501 if (fill_value
!= subword
)
502 emit_move_insn (subword
, fill_value
);
505 insns
= get_insns ();
512 /* Truncating multi-word to a word or less. */
513 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
514 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
517 && ! MEM_VOLATILE_P (from
)
518 && direct_load
[(int) to_mode
]
519 && ! mode_dependent_address_p (XEXP (from
, 0),
520 MEM_ADDR_SPACE (from
)))
522 || GET_CODE (from
) == SUBREG
))
523 from
= force_reg (from_mode
, from
);
524 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
528 /* Now follow all the conversions between integers
529 no more than a word long. */
531 /* For truncation, usually we can just refer to FROM in a narrower mode. */
532 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
536 && ! MEM_VOLATILE_P (from
)
537 && direct_load
[(int) to_mode
]
538 && ! mode_dependent_address_p (XEXP (from
, 0),
539 MEM_ADDR_SPACE (from
)))
541 || GET_CODE (from
) == SUBREG
))
542 from
= force_reg (from_mode
, from
);
543 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
544 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
545 from
= copy_to_reg (from
);
546 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
550 /* Handle extension. */
551 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
553 /* Convert directly if that works. */
554 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
557 emit_unop_insn (code
, to
, from
, equiv_code
);
562 scalar_mode intermediate
;
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter
;
568 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
570 scalar_mode intermediate
= intermediate_iter
.require ();
571 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
573 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
576 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
577 != CODE_FOR_nothing
))
579 convert_move (to
, convert_to_mode (intermediate
, from
,
580 unsignedp
), unsignedp
);
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount
= (GET_MODE_PRECISION (to_mode
)
588 - GET_MODE_PRECISION (from_mode
));
589 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
590 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
592 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
595 emit_move_insn (to
, tmp
);
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab
, to_mode
,
602 from_mode
) != CODE_FOR_nothing
)
604 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
618 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
619 emit_move_insn (to
, temp
);
623 /* Mode combination is not recognized. */
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
637 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
654 scalar_int_mode int_mode
;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x
) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x
)
661 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
663 >= GET_MODE_PRECISION (int_mode
))
664 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
665 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
667 if (GET_MODE (x
) != VOIDmode
)
668 oldmode
= GET_MODE (x
);
673 if (CONST_SCALAR_INT_P (x
)
674 && is_int_mode (mode
, &int_mode
))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
680 oldmode
= MAX_MODE_INT
;
681 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
682 GET_MODE_PRECISION (int_mode
),
683 unsignedp
? UNSIGNED
: SIGNED
);
684 return immed_wide_int_const (w
, int_mode
);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
690 scalar_int_mode int_oldmode
;
691 if (is_int_mode (mode
, &int_mode
)
692 && is_int_mode (oldmode
, &int_oldmode
)
693 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
694 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
695 || CONST_POLY_INT_P (x
)
697 && (!HARD_REGISTER_P (x
)
698 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
699 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
700 return gen_lowpart (int_mode
, x
);
702 /* Converting from integer constant into mode is always equivalent to an
704 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
706 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
707 GET_MODE_BITSIZE (oldmode
)));
708 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
711 temp
= gen_reg_rtx (mode
);
712 convert_move (temp
, x
, unsignedp
);
716 /* Return the largest alignment we can use for doing a move (or store)
717 of MAX_PIECES. ALIGN is the largest alignment we could use. */
720 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
722 scalar_int_mode tmode
723 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
725 if (align
>= GET_MODE_ALIGNMENT (tmode
))
726 align
= GET_MODE_ALIGNMENT (tmode
);
729 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
730 opt_scalar_int_mode mode_iter
;
731 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
733 tmode
= mode_iter
.require ();
734 if (GET_MODE_SIZE (tmode
) > max_pieces
735 || targetm
.slow_unaligned_access (tmode
, align
))
740 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
746 /* Return the widest integer mode that is narrower than SIZE bytes. */
748 static scalar_int_mode
749 widest_int_mode_for_size (unsigned int size
)
751 scalar_int_mode result
= NARROWEST_INT_MODE
;
753 gcc_checking_assert (size
> 1);
755 opt_scalar_int_mode tmode
;
756 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
757 if (GET_MODE_SIZE (tmode
.require ()) < size
)
758 result
= tmode
.require ();
763 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
764 and should be performed piecewise. */
767 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
768 enum by_pieces_operation op
)
770 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
771 optimize_insn_for_speed_p ());
774 /* Determine whether the LEN bytes can be moved by using several move
775 instructions. Return nonzero if a call to move_by_pieces should
779 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
781 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
784 /* Return number of insns required to perform operation OP by pieces
785 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
787 unsigned HOST_WIDE_INT
788 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
789 unsigned int max_size
, by_pieces_operation op
)
791 unsigned HOST_WIDE_INT n_insns
= 0;
793 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
795 while (max_size
> 1 && l
> 0)
797 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
798 enum insn_code icode
;
800 unsigned int modesize
= GET_MODE_SIZE (mode
);
802 icode
= optab_handler (mov_optab
, mode
);
803 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
805 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
813 case COMPARE_BY_PIECES
:
814 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
815 int batch_ops
= 4 * batch
- 1;
816 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
817 n_insns
+= full
* batch_ops
;
818 if (n_pieces
% batch
!= 0)
831 /* Used when performing piecewise block operations, holds information
832 about one of the memory objects involved. The member functions
833 can be used to generate code for loading from the object and
834 updating the address when iterating. */
838 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
841 /* The address of the object. Can differ from that seen in the
842 MEM rtx if we copied the address to a register. */
844 /* Nonzero if the address on the object has an autoincrement already,
845 signifies whether that was an increment or decrement. */
846 signed char m_addr_inc
;
847 /* Nonzero if we intend to use autoinc without the address already
848 having autoinc form. We will insert add insns around each memory
849 reference, expecting later passes to form autoinc addressing modes.
850 The only supported options are predecrement and postincrement. */
851 signed char m_explicit_inc
;
852 /* True if we have either of the two possible cases of using
855 /* True if this is an address to be used for load operations rather
859 /* Optionally, a function to obtain constants for any given offset into
860 the objects, and data associated with it. */
861 by_pieces_constfn m_constfn
;
864 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
865 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
866 void increment_address (HOST_WIDE_INT
);
867 void maybe_predec (HOST_WIDE_INT
);
868 void maybe_postinc (HOST_WIDE_INT
);
869 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
876 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
877 true if the operation to be performed on this object is a load
878 rather than a store. For stores, OBJ can be NULL, in which case we
879 assume the operation is a stack push. For loads, the optional
880 CONSTFN and its associated CFNDATA can be used in place of the
883 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
885 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
891 rtx addr
= XEXP (obj
, 0);
892 rtx_code code
= GET_CODE (addr
);
894 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
895 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
898 m_addr_inc
= dec
? -1 : 1;
900 /* While we have always looked for these codes here, the code
901 implementing the memory operation has never handled them.
902 Support could be added later if necessary or beneficial. */
903 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
911 if (STACK_GROWS_DOWNWARD
)
917 gcc_assert (constfn
!= NULL
);
921 gcc_assert (is_load
);
924 /* Decide whether to use autoinc for an address involved in a memory op.
925 MODE is the mode of the accesses, REVERSE is true if we've decided to
926 perform the operation starting from the end, and LEN is the length of
927 the operation. Don't override an earlier decision to set m_auto. */
930 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
933 if (m_auto
|| m_obj
== NULL_RTX
)
936 bool use_predec
= (m_is_load
937 ? USE_LOAD_PRE_DECREMENT (mode
)
938 : USE_STORE_PRE_DECREMENT (mode
));
939 bool use_postinc
= (m_is_load
940 ? USE_LOAD_POST_INCREMENT (mode
)
941 : USE_STORE_POST_INCREMENT (mode
));
942 machine_mode addr_mode
= get_address_mode (m_obj
);
944 if (use_predec
&& reverse
)
946 m_addr
= copy_to_mode_reg (addr_mode
,
947 plus_constant (addr_mode
,
952 else if (use_postinc
&& !reverse
)
954 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
958 else if (CONSTANT_P (m_addr
))
959 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
962 /* Adjust the address to refer to the data at OFFSET in MODE. If we
963 are using autoincrement for this address, we don't add the offset,
964 but we still modify the MEM's properties. */
967 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
970 return m_constfn (m_cfndata
, offset
, mode
);
971 if (m_obj
== NULL_RTX
)
974 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
976 return adjust_address (m_obj
, mode
, offset
);
979 /* Emit an add instruction to increment the address by SIZE. */
982 pieces_addr::increment_address (HOST_WIDE_INT size
)
984 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
985 emit_insn (gen_add2_insn (m_addr
, amount
));
988 /* If we are supposed to decrement the address after each access, emit code
989 to do so now. Increment by SIZE (which has should have the correct sign
993 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
995 if (m_explicit_inc
>= 0)
997 gcc_assert (HAVE_PRE_DECREMENT
);
998 increment_address (size
);
1001 /* If we are supposed to decrement the address after each access, emit code
1002 to do so now. Increment by SIZE. */
1005 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1007 if (m_explicit_inc
<= 0)
1009 gcc_assert (HAVE_POST_INCREMENT
);
1010 increment_address (size
);
1013 /* This structure is used by do_op_by_pieces to describe the operation
1016 class op_by_pieces_d
1019 pieces_addr m_to
, m_from
;
1020 unsigned HOST_WIDE_INT m_len
;
1021 HOST_WIDE_INT m_offset
;
1022 unsigned int m_align
;
1023 unsigned int m_max_size
;
1026 /* Virtual functions, overriden by derived classes for the specific
1028 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1029 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1030 virtual void finish_mode (machine_mode
)
1035 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1036 unsigned HOST_WIDE_INT
, unsigned int);
1040 /* The constructor for an op_by_pieces_d structure. We require two
1041 objects named TO and FROM, which are identified as loads or stores
1042 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1043 and its associated FROM_CFN_DATA can be used to replace loads with
1044 constant values. LEN describes the length of the operation. */
1046 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1047 rtx from
, bool from_load
,
1048 by_pieces_constfn from_cfn
,
1049 void *from_cfn_data
,
1050 unsigned HOST_WIDE_INT len
,
1052 : m_to (to
, to_load
, NULL
, NULL
),
1053 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1054 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1056 int toi
= m_to
.get_addr_inc ();
1057 int fromi
= m_from
.get_addr_inc ();
1058 if (toi
>= 0 && fromi
>= 0)
1060 else if (toi
<= 0 && fromi
<= 0)
1065 m_offset
= m_reverse
? len
: 0;
1066 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1067 from
? MEM_ALIGN (from
) : align
);
1069 /* If copying requires more than two move insns,
1070 copy addresses to registers (to make displacements shorter)
1071 and use post-increment if available. */
1072 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1074 /* Find the mode of the largest comparison. */
1075 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1077 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1078 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1081 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1085 /* This function contains the main loop used for expanding a block
1086 operation. First move what we can in the largest integer mode,
1087 then go to successively smaller modes. For every access, call
1088 GENFUN with the two operands and the EXTRA_DATA. */
1091 op_by_pieces_d::run ()
1093 while (m_max_size
> 1 && m_len
> 0)
1095 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1097 if (prepare_mode (mode
, m_align
))
1099 unsigned int size
= GET_MODE_SIZE (mode
);
1100 rtx to1
= NULL_RTX
, from1
;
1102 while (m_len
>= size
)
1107 to1
= m_to
.adjust (mode
, m_offset
);
1108 from1
= m_from
.adjust (mode
, m_offset
);
1110 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1111 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1113 generate (to1
, from1
, mode
);
1115 m_to
.maybe_postinc (size
);
1116 m_from
.maybe_postinc (size
);
1127 m_max_size
= GET_MODE_SIZE (mode
);
1130 /* The code above should have handled everything. */
1131 gcc_assert (!m_len
);
1134 /* Derived class from op_by_pieces_d, providing support for block move
1137 class move_by_pieces_d
: public op_by_pieces_d
1139 insn_gen_fn m_gen_fun
;
1140 void generate (rtx
, rtx
, machine_mode
);
1141 bool prepare_mode (machine_mode
, unsigned int);
1144 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1146 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1149 rtx
finish_endp (int);
1152 /* Return true if MODE can be used for a set of copies, given an
1153 alignment ALIGN. Prepare whatever data is necessary for later
1154 calls to generate. */
1157 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1159 insn_code icode
= optab_handler (mov_optab
, mode
);
1160 m_gen_fun
= GEN_FCN (icode
);
1161 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1164 /* A callback used when iterating for a compare_by_pieces_operation.
1165 OP0 and OP1 are the values that have been loaded and should be
1166 compared in MODE. If OP0 is NULL, this means we should generate a
1167 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1168 gen function that should be used to generate the mode. */
1171 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1172 machine_mode mode ATTRIBUTE_UNUSED
)
1174 #ifdef PUSH_ROUNDING
1175 if (op0
== NULL_RTX
)
1177 emit_single_push_insn (mode
, op1
, NULL
);
1181 emit_insn (m_gen_fun (op0
, op1
));
1184 /* Perform the final adjustment at the end of a string to obtain the
1185 correct return value for the block operation. If ENDP is 1 return
1186 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1187 end minus one byte ala stpcpy. */
1190 move_by_pieces_d::finish_endp (int endp
)
1192 gcc_assert (!m_reverse
);
1195 m_to
.maybe_postinc (-1);
1198 return m_to
.adjust (QImode
, m_offset
);
1201 /* Generate several move instructions to copy LEN bytes from block FROM to
1202 block TO. (These are MEM rtx's with BLKmode).
1204 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1205 used to push FROM to the stack.
1207 ALIGN is maximum stack alignment we can assume.
1209 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1210 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1214 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1215 unsigned int align
, int endp
)
1217 #ifndef PUSH_ROUNDING
1222 move_by_pieces_d
data (to
, from
, len
, align
);
1227 return data
.finish_endp (endp
);
1232 /* Derived class from op_by_pieces_d, providing support for block move
1235 class store_by_pieces_d
: public op_by_pieces_d
1237 insn_gen_fn m_gen_fun
;
1238 void generate (rtx
, rtx
, machine_mode
);
1239 bool prepare_mode (machine_mode
, unsigned int);
1242 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1243 unsigned HOST_WIDE_INT len
, unsigned int align
)
1244 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1247 rtx
finish_endp (int);
1250 /* Return true if MODE can be used for a set of stores, given an
1251 alignment ALIGN. Prepare whatever data is necessary for later
1252 calls to generate. */
1255 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1257 insn_code icode
= optab_handler (mov_optab
, mode
);
1258 m_gen_fun
= GEN_FCN (icode
);
1259 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1262 /* A callback used when iterating for a store_by_pieces_operation.
1263 OP0 and OP1 are the values that have been loaded and should be
1264 compared in MODE. If OP0 is NULL, this means we should generate a
1265 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1266 gen function that should be used to generate the mode. */
1269 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1271 emit_insn (m_gen_fun (op0
, op1
));
1274 /* Perform the final adjustment at the end of a string to obtain the
1275 correct return value for the block operation. If ENDP is 1 return
1276 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1277 end minus one byte ala stpcpy. */
1280 store_by_pieces_d::finish_endp (int endp
)
1282 gcc_assert (!m_reverse
);
1285 m_to
.maybe_postinc (-1);
1288 return m_to
.adjust (QImode
, m_offset
);
1291 /* Determine whether the LEN bytes generated by CONSTFUN can be
1292 stored to memory using several move instructions. CONSTFUNDATA is
1293 a pointer which will be passed as argument in every CONSTFUN call.
1294 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1295 a memset operation and false if it's a copy of a constant string.
1296 Return nonzero if a call to store_by_pieces should succeed. */
1299 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1300 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1301 void *constfundata
, unsigned int align
, bool memsetp
)
1303 unsigned HOST_WIDE_INT l
;
1304 unsigned int max_size
;
1305 HOST_WIDE_INT offset
= 0;
1306 enum insn_code icode
;
1308 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1309 rtx cst ATTRIBUTE_UNUSED
;
1314 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1318 optimize_insn_for_speed_p ()))
1321 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1323 /* We would first store what we can in the largest integer mode, then go to
1324 successively smaller modes. */
1327 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1331 max_size
= STORE_MAX_PIECES
+ 1;
1332 while (max_size
> 1 && l
> 0)
1334 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1336 icode
= optab_handler (mov_optab
, mode
);
1337 if (icode
!= CODE_FOR_nothing
1338 && align
>= GET_MODE_ALIGNMENT (mode
))
1340 unsigned int size
= GET_MODE_SIZE (mode
);
1347 cst
= (*constfun
) (constfundata
, offset
, mode
);
1348 if (!targetm
.legitimate_constant_p (mode
, cst
))
1358 max_size
= GET_MODE_SIZE (mode
);
1361 /* The code above should have handled everything. */
1368 /* Generate several move instructions to store LEN bytes generated by
1369 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1370 pointer which will be passed as argument in every CONSTFUN call.
1371 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1372 a memset operation and false if it's a copy of a constant string.
1373 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1374 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1378 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1379 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1380 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
1384 gcc_assert (endp
!= 2);
1388 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1390 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1391 optimize_insn_for_speed_p ()));
1393 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1397 return data
.finish_endp (endp
);
1402 /* Callback routine for clear_by_pieces.
1403 Return const0_rtx unconditionally. */
1406 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1411 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1412 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1415 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1420 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1424 /* Context used by compare_by_pieces_genfn. It stores the fail label
1425 to jump to in case of miscomparison, and for branch ratios greater than 1,
1426 it stores an accumulator and the current and maximum counts before
1427 emitting another branch. */
1429 class compare_by_pieces_d
: public op_by_pieces_d
1431 rtx_code_label
*m_fail_label
;
1433 int m_count
, m_batch
;
1435 void generate (rtx
, rtx
, machine_mode
);
1436 bool prepare_mode (machine_mode
, unsigned int);
1437 void finish_mode (machine_mode
);
1439 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1440 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1441 rtx_code_label
*fail_label
)
1442 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1444 m_fail_label
= fail_label
;
1448 /* A callback used when iterating for a compare_by_pieces_operation.
1449 OP0 and OP1 are the values that have been loaded and should be
1450 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1451 context structure. */
1454 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1458 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1459 true, OPTAB_LIB_WIDEN
);
1461 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1462 true, OPTAB_LIB_WIDEN
);
1463 m_accumulator
= temp
;
1465 if (++m_count
< m_batch
)
1469 op0
= m_accumulator
;
1471 m_accumulator
= NULL_RTX
;
1473 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1474 m_fail_label
, profile_probability::uninitialized ());
1477 /* Return true if MODE can be used for a set of moves and comparisons,
1478 given an alignment ALIGN. Prepare whatever data is necessary for
1479 later calls to generate. */
1482 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1484 insn_code icode
= optab_handler (mov_optab
, mode
);
1485 if (icode
== CODE_FOR_nothing
1486 || align
< GET_MODE_ALIGNMENT (mode
)
1487 || !can_compare_p (EQ
, mode
, ccp_jump
))
1489 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1492 m_accumulator
= NULL_RTX
;
1497 /* Called after expanding a series of comparisons in MODE. If we have
1498 accumulated results for which we haven't emitted a branch yet, do
1502 compare_by_pieces_d::finish_mode (machine_mode mode
)
1504 if (m_accumulator
!= NULL_RTX
)
1505 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1506 NULL_RTX
, NULL
, m_fail_label
,
1507 profile_probability::uninitialized ());
1510 /* Generate several move instructions to compare LEN bytes from blocks
1511 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1513 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1514 used to push FROM to the stack.
1516 ALIGN is maximum stack alignment we can assume.
1518 Optionally, the caller can pass a constfn and associated data in A1_CFN
1519 and A1_CFN_DATA. describing that the second operand being compared is a
1520 known constant and how to obtain its data. */
1523 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1524 rtx target
, unsigned int align
,
1525 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1527 rtx_code_label
*fail_label
= gen_label_rtx ();
1528 rtx_code_label
*end_label
= gen_label_rtx ();
1530 if (target
== NULL_RTX
1531 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1532 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1534 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1539 emit_move_insn (target
, const0_rtx
);
1540 emit_jump (end_label
);
1542 emit_label (fail_label
);
1543 emit_move_insn (target
, const1_rtx
);
1544 emit_label (end_label
);
1549 /* Emit code to move a block Y to a block X. This may be done with
1550 string-move instructions, with multiple scalar move instructions,
1551 or with a library call.
1553 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1554 SIZE is an rtx that says how long they are.
1555 ALIGN is the maximum alignment we can assume they have.
1556 METHOD describes what kind of copy this is, and what mechanisms may be used.
1557 MIN_SIZE is the minimal size of block to move
1558 MAX_SIZE is the maximal size of block to move, if it can not be represented
1559 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1561 Return the address of the new block, if memcpy is called and returns it,
1565 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1566 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1567 unsigned HOST_WIDE_INT min_size
,
1568 unsigned HOST_WIDE_INT max_size
,
1569 unsigned HOST_WIDE_INT probable_max_size
)
1576 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1581 case BLOCK_OP_NORMAL
:
1582 case BLOCK_OP_TAILCALL
:
1586 case BLOCK_OP_CALL_PARM
:
1587 may_use_call
= block_move_libcall_safe_for_call_parm ();
1589 /* Make inhibit_defer_pop nonzero around the library call
1590 to force it to pop the arguments right away. */
1594 case BLOCK_OP_NO_LIBCALL
:
1598 case BLOCK_OP_NO_LIBCALL_RET
:
1606 gcc_assert (MEM_P (x
) && MEM_P (y
));
1607 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1608 gcc_assert (align
>= BITS_PER_UNIT
);
1610 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1611 block copy is more efficient for other large modes, e.g. DCmode. */
1612 x
= adjust_address (x
, BLKmode
, 0);
1613 y
= adjust_address (y
, BLKmode
, 0);
1615 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1616 can be incorrect is coming from __builtin_memcpy. */
1617 poly_int64 const_size
;
1618 if (poly_int_rtx_p (size
, &const_size
))
1620 x
= shallow_copy_rtx (x
);
1621 y
= shallow_copy_rtx (y
);
1622 set_mem_size (x
, const_size
);
1623 set_mem_size (y
, const_size
);
1626 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1627 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1628 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1629 expected_align
, expected_size
,
1630 min_size
, max_size
, probable_max_size
))
1632 else if (may_use_call
1633 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1634 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1636 if (may_use_call
< 0)
1639 /* Since x and y are passed to a libcall, mark the corresponding
1640 tree EXPR as addressable. */
1641 tree y_expr
= MEM_EXPR (y
);
1642 tree x_expr
= MEM_EXPR (x
);
1644 mark_addressable (y_expr
);
1646 mark_addressable (x_expr
);
1647 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1648 method
== BLOCK_OP_TAILCALL
);
1652 emit_block_move_via_loop (x
, y
, size
, align
);
1654 if (method
== BLOCK_OP_CALL_PARM
)
1661 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1663 unsigned HOST_WIDE_INT max
, min
= 0;
1664 if (GET_CODE (size
) == CONST_INT
)
1665 min
= max
= UINTVAL (size
);
1667 max
= GET_MODE_MASK (GET_MODE (size
));
1668 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1672 /* A subroutine of emit_block_move. Returns true if calling the
1673 block move libcall will not clobber any parameters which may have
1674 already been placed on the stack. */
1677 block_move_libcall_safe_for_call_parm (void)
1679 #if defined (REG_PARM_STACK_SPACE)
1683 /* If arguments are pushed on the stack, then they're safe. */
1687 /* If registers go on the stack anyway, any argument is sure to clobber
1688 an outgoing argument. */
1689 #if defined (REG_PARM_STACK_SPACE)
1690 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1691 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1692 depend on its argument. */
1694 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1695 && REG_PARM_STACK_SPACE (fn
) != 0)
1699 /* If any argument goes in memory, then it might clobber an outgoing
1702 CUMULATIVE_ARGS args_so_far_v
;
1703 cumulative_args_t args_so_far
;
1706 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1707 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1708 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1710 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1711 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1713 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1714 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1716 if (!tmp
|| !REG_P (tmp
))
1718 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1720 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1727 /* A subroutine of emit_block_move. Expand a movmem pattern;
1728 return true if successful. */
1731 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1732 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1733 unsigned HOST_WIDE_INT min_size
,
1734 unsigned HOST_WIDE_INT max_size
,
1735 unsigned HOST_WIDE_INT probable_max_size
)
1737 int save_volatile_ok
= volatile_ok
;
1739 if (expected_align
< align
)
1740 expected_align
= align
;
1741 if (expected_size
!= -1)
1743 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1744 expected_size
= probable_max_size
;
1745 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1746 expected_size
= min_size
;
1749 /* Since this is a move insn, we don't care about volatility. */
1752 /* Try the most limited insn first, because there's no point
1753 including more than one in the machine description unless
1754 the more limited one has some advantage. */
1756 opt_scalar_int_mode mode_iter
;
1757 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1759 scalar_int_mode mode
= mode_iter
.require ();
1760 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1762 if (code
!= CODE_FOR_nothing
1763 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1764 here because if SIZE is less than the mode mask, as it is
1765 returned by the macro, it will definitely be less than the
1766 actual mode mask. Since SIZE is within the Pmode address
1767 space, we limit MODE to Pmode. */
1768 && ((CONST_INT_P (size
)
1769 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1770 <= (GET_MODE_MASK (mode
) >> 1)))
1771 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1772 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1774 struct expand_operand ops
[9];
1777 /* ??? When called via emit_block_move_for_call, it'd be
1778 nice if there were some way to inform the backend, so
1779 that it doesn't fail the expansion because it thinks
1780 emitting the libcall would be more efficient. */
1781 nops
= insn_data
[(int) code
].n_generator_args
;
1782 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1784 create_fixed_operand (&ops
[0], x
);
1785 create_fixed_operand (&ops
[1], y
);
1786 /* The check above guarantees that this size conversion is valid. */
1787 create_convert_operand_to (&ops
[2], size
, mode
, true);
1788 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1791 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1792 create_integer_operand (&ops
[5], expected_size
);
1796 create_integer_operand (&ops
[6], min_size
);
1797 /* If we can not represent the maximal size,
1798 make parameter NULL. */
1799 if ((HOST_WIDE_INT
) max_size
!= -1)
1800 create_integer_operand (&ops
[7], max_size
);
1802 create_fixed_operand (&ops
[7], NULL
);
1806 /* If we can not represent the maximal size,
1807 make parameter NULL. */
1808 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1809 create_integer_operand (&ops
[8], probable_max_size
);
1811 create_fixed_operand (&ops
[8], NULL
);
1813 if (maybe_expand_insn (code
, nops
, ops
))
1815 volatile_ok
= save_volatile_ok
;
1821 volatile_ok
= save_volatile_ok
;
1825 /* A subroutine of emit_block_move. Copy the data via an explicit
1826 loop. This is used only when libcalls are forbidden. */
1827 /* ??? It'd be nice to copy in hunks larger than QImode. */
1830 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1831 unsigned int align ATTRIBUTE_UNUSED
)
1833 rtx_code_label
*cmp_label
, *top_label
;
1834 rtx iter
, x_addr
, y_addr
, tmp
;
1835 machine_mode x_addr_mode
= get_address_mode (x
);
1836 machine_mode y_addr_mode
= get_address_mode (y
);
1837 machine_mode iter_mode
;
1839 iter_mode
= GET_MODE (size
);
1840 if (iter_mode
== VOIDmode
)
1841 iter_mode
= word_mode
;
1843 top_label
= gen_label_rtx ();
1844 cmp_label
= gen_label_rtx ();
1845 iter
= gen_reg_rtx (iter_mode
);
1847 emit_move_insn (iter
, const0_rtx
);
1849 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1850 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1851 do_pending_stack_adjust ();
1853 emit_jump (cmp_label
);
1854 emit_label (top_label
);
1856 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1857 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1859 if (x_addr_mode
!= y_addr_mode
)
1860 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1861 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1863 x
= change_address (x
, QImode
, x_addr
);
1864 y
= change_address (y
, QImode
, y_addr
);
1866 emit_move_insn (x
, y
);
1868 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1869 true, OPTAB_LIB_WIDEN
);
1871 emit_move_insn (iter
, tmp
);
1873 emit_label (cmp_label
);
1875 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1877 profile_probability::guessed_always ()
1878 .apply_scale (9, 10));
1881 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1882 TAILCALL is true if this is a tail call. */
1885 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1886 rtx size
, bool tailcall
)
1888 rtx dst_addr
, src_addr
;
1889 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1890 machine_mode size_mode
;
1892 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1893 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1894 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1896 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1897 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1898 src_tree
= make_tree (ptr_type_node
, src_addr
);
1900 size_mode
= TYPE_MODE (sizetype
);
1901 size
= convert_to_mode (size_mode
, size
, 1);
1902 size
= copy_to_mode_reg (size_mode
, size
);
1903 size_tree
= make_tree (sizetype
, size
);
1905 /* It is incorrect to use the libcall calling conventions for calls to
1906 memcpy/memmove/memcmp because they can be provided by the user. */
1907 tree fn
= builtin_decl_implicit (fncode
);
1908 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1909 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1911 return expand_call (call_expr
, NULL_RTX
, false);
1914 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1915 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1916 otherwise return null. */
1919 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1920 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1921 HOST_WIDE_INT align
)
1923 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1925 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1928 struct expand_operand ops
[5];
1929 create_output_operand (&ops
[0], target
, insn_mode
);
1930 create_fixed_operand (&ops
[1], arg1_rtx
);
1931 create_fixed_operand (&ops
[2], arg2_rtx
);
1932 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1933 TYPE_UNSIGNED (arg3_type
));
1934 create_integer_operand (&ops
[4], align
);
1935 if (maybe_expand_insn (icode
, 5, ops
))
1936 return ops
[0].value
;
1940 /* Expand a block compare between X and Y with length LEN using the
1941 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1942 of the expression that was used to calculate the length. ALIGN
1943 gives the known minimum common alignment. */
1946 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1949 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1950 implementing memcmp because it will stop if it encounters two
1952 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1954 if (icode
== CODE_FOR_nothing
)
1957 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1960 /* Emit code to compare a block Y to a block X. This may be done with
1961 string-compare instructions, with multiple scalar instructions,
1962 or with a library call.
1964 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1965 they are. LEN_TYPE is the type of the expression that was used to
1968 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1969 value of a normal memcmp call, instead we can just compare for equality.
1970 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1973 Optionally, the caller can pass a constfn and associated data in Y_CFN
1974 and Y_CFN_DATA. describing that the second operand being compared is a
1975 known constant and how to obtain its data.
1976 Return the result of the comparison, or NULL_RTX if we failed to
1977 perform the operation. */
1980 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1981 bool equality_only
, by_pieces_constfn y_cfn
,
1986 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1989 gcc_assert (MEM_P (x
) && MEM_P (y
));
1990 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1991 gcc_assert (align
>= BITS_PER_UNIT
);
1993 x
= adjust_address (x
, BLKmode
, 0);
1994 y
= adjust_address (y
, BLKmode
, 0);
1997 && CONST_INT_P (len
)
1998 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1999 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2002 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2007 /* Copy all or part of a value X into registers starting at REGNO.
2008 The number of registers to be filled is NREGS. */
2011 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2016 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2017 x
= validize_mem (force_const_mem (mode
, x
));
2019 /* See if the machine can do this with a load multiple insn. */
2020 if (targetm
.have_load_multiple ())
2022 rtx_insn
*last
= get_last_insn ();
2023 rtx first
= gen_rtx_REG (word_mode
, regno
);
2024 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2031 delete_insns_since (last
);
2034 for (int i
= 0; i
< nregs
; i
++)
2035 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2036 operand_subword_force (x
, i
, mode
));
2039 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2040 The number of registers to be filled is NREGS. */
2043 move_block_from_reg (int regno
, rtx x
, int nregs
)
2048 /* See if the machine can do this with a store multiple insn. */
2049 if (targetm
.have_store_multiple ())
2051 rtx_insn
*last
= get_last_insn ();
2052 rtx first
= gen_rtx_REG (word_mode
, regno
);
2053 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2060 delete_insns_since (last
);
2063 for (int i
= 0; i
< nregs
; i
++)
2065 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2069 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2073 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2074 ORIG, where ORIG is a non-consecutive group of registers represented by
2075 a PARALLEL. The clone is identical to the original except in that the
2076 original set of registers is replaced by a new set of pseudo registers.
2077 The new set has the same modes as the original set. */
2080 gen_group_rtx (rtx orig
)
2085 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2087 length
= XVECLEN (orig
, 0);
2088 tmps
= XALLOCAVEC (rtx
, length
);
2090 /* Skip a NULL entry in first slot. */
2091 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2096 for (; i
< length
; i
++)
2098 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2099 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2101 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2104 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2107 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2108 except that values are placed in TMPS[i], and must later be moved
2109 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2112 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2117 machine_mode m
= GET_MODE (orig_src
);
2119 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2122 && !SCALAR_INT_MODE_P (m
)
2123 && !MEM_P (orig_src
)
2124 && GET_CODE (orig_src
) != CONCAT
)
2126 scalar_int_mode imode
;
2127 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2129 src
= gen_reg_rtx (imode
);
2130 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2134 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2135 emit_move_insn (src
, orig_src
);
2137 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2141 /* Check for a NULL entry, used to indicate that the parameter goes
2142 both on the stack and in registers. */
2143 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2148 /* Process the pieces. */
2149 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2151 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2152 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2153 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2154 poly_int64 shift
= 0;
2156 /* Handle trailing fragments that run over the size of the struct.
2157 It's the target's responsibility to make sure that the fragment
2158 cannot be strictly smaller in some cases and strictly larger
2160 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2161 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2163 /* Arrange to shift the fragment to where it belongs.
2164 extract_bit_field loads to the lsb of the reg. */
2166 #ifdef BLOCK_REG_PADDING
2167 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2168 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2173 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2174 bytelen
= ssize
- bytepos
;
2175 gcc_assert (maybe_gt (bytelen
, 0));
2178 /* If we won't be loading directly from memory, protect the real source
2179 from strange tricks we might play; but make sure that the source can
2180 be loaded directly into the destination. */
2182 if (!MEM_P (orig_src
)
2183 && (!CONSTANT_P (orig_src
)
2184 || (GET_MODE (orig_src
) != mode
2185 && GET_MODE (orig_src
) != VOIDmode
)))
2187 if (GET_MODE (orig_src
) == VOIDmode
)
2188 src
= gen_reg_rtx (mode
);
2190 src
= gen_reg_rtx (GET_MODE (orig_src
));
2192 emit_move_insn (src
, orig_src
);
2195 /* Optimize the access just a bit. */
2197 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2198 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2199 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2200 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2202 tmps
[i
] = gen_reg_rtx (mode
);
2203 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2205 else if (COMPLEX_MODE_P (mode
)
2206 && GET_MODE (src
) == mode
2207 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2208 /* Let emit_move_complex do the bulk of the work. */
2210 else if (GET_CODE (src
) == CONCAT
)
2212 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2213 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2217 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2218 && known_le (subpos
+ bytelen
, slen0
))
2220 /* The following assumes that the concatenated objects all
2221 have the same size. In this case, a simple calculation
2222 can be used to determine the object and the bit field
2224 tmps
[i
] = XEXP (src
, elt
);
2225 if (maybe_ne (subpos
, 0)
2226 || maybe_ne (subpos
+ bytelen
, slen0
)
2227 || (!CONSTANT_P (tmps
[i
])
2228 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2229 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2230 subpos
* BITS_PER_UNIT
,
2231 1, NULL_RTX
, mode
, mode
, false,
2238 gcc_assert (known_eq (bytepos
, 0));
2239 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2240 emit_move_insn (mem
, src
);
2241 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2242 0, 1, NULL_RTX
, mode
, mode
, false,
2246 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2247 SIMD register, which is currently broken. While we get GCC
2248 to emit proper RTL for these cases, let's dump to memory. */
2249 else if (VECTOR_MODE_P (GET_MODE (dst
))
2252 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2255 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2256 emit_move_insn (mem
, src
);
2257 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2259 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2260 && XVECLEN (dst
, 0) > 1)
2261 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2262 else if (CONSTANT_P (src
))
2264 if (known_eq (bytelen
, ssize
))
2270 /* TODO: const_wide_int can have sizes other than this... */
2271 gcc_assert (known_eq (2 * bytelen
, ssize
));
2272 split_double (src
, &first
, &second
);
2279 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2282 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2283 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2284 mode
, mode
, false, NULL
);
2286 if (maybe_ne (shift
, 0))
2287 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2292 /* Emit code to move a block SRC of type TYPE to a block DST,
2293 where DST is non-consecutive registers represented by a PARALLEL.
2294 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2298 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2303 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2304 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2306 /* Copy the extracted pieces into the proper (probable) hard regs. */
2307 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2309 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2312 emit_move_insn (d
, tmps
[i
]);
2316 /* Similar, but load SRC into new pseudos in a format that looks like
2317 PARALLEL. This can later be fed to emit_group_move to get things
2318 in the right place. */
2321 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2326 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2327 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2329 /* Convert the vector to look just like the original PARALLEL, except
2330 with the computed values. */
2331 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2333 rtx e
= XVECEXP (parallel
, 0, i
);
2334 rtx d
= XEXP (e
, 0);
2338 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2339 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2341 RTVEC_ELT (vec
, i
) = e
;
2344 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2347 /* Emit code to move a block SRC to block DST, where SRC and DST are
2348 non-consecutive groups of registers, each represented by a PARALLEL. */
2351 emit_group_move (rtx dst
, rtx src
)
2355 gcc_assert (GET_CODE (src
) == PARALLEL
2356 && GET_CODE (dst
) == PARALLEL
2357 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2359 /* Skip first entry if NULL. */
2360 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2361 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2362 XEXP (XVECEXP (src
, 0, i
), 0));
2365 /* Move a group of registers represented by a PARALLEL into pseudos. */
2368 emit_group_move_into_temps (rtx src
)
2370 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2373 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2375 rtx e
= XVECEXP (src
, 0, i
);
2376 rtx d
= XEXP (e
, 0);
2379 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2380 RTVEC_ELT (vec
, i
) = e
;
2383 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2386 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2387 where SRC is non-consecutive registers represented by a PARALLEL.
2388 SSIZE represents the total size of block ORIG_DST, or -1 if not
2392 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2396 int start
, finish
, i
;
2397 machine_mode m
= GET_MODE (orig_dst
);
2399 gcc_assert (GET_CODE (src
) == PARALLEL
);
2401 if (!SCALAR_INT_MODE_P (m
)
2402 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2404 scalar_int_mode imode
;
2405 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2407 dst
= gen_reg_rtx (imode
);
2408 emit_group_store (dst
, src
, type
, ssize
);
2409 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2413 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2414 emit_group_store (dst
, src
, type
, ssize
);
2416 emit_move_insn (orig_dst
, dst
);
2420 /* Check for a NULL entry, used to indicate that the parameter goes
2421 both on the stack and in registers. */
2422 if (XEXP (XVECEXP (src
, 0, 0), 0))
2426 finish
= XVECLEN (src
, 0);
2428 tmps
= XALLOCAVEC (rtx
, finish
);
2430 /* Copy the (probable) hard regs into pseudos. */
2431 for (i
= start
; i
< finish
; i
++)
2433 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2434 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2436 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2437 emit_move_insn (tmps
[i
], reg
);
2443 /* If we won't be storing directly into memory, protect the real destination
2444 from strange tricks we might play. */
2446 if (GET_CODE (dst
) == PARALLEL
)
2450 /* We can get a PARALLEL dst if there is a conditional expression in
2451 a return statement. In that case, the dst and src are the same,
2452 so no action is necessary. */
2453 if (rtx_equal_p (dst
, src
))
2456 /* It is unclear if we can ever reach here, but we may as well handle
2457 it. Allocate a temporary, and split this into a store/load to/from
2459 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2460 emit_group_store (temp
, src
, type
, ssize
);
2461 emit_group_load (dst
, temp
, type
, ssize
);
2464 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2466 machine_mode outer
= GET_MODE (dst
);
2472 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2473 dst
= gen_reg_rtx (outer
);
2475 /* Make life a bit easier for combine. */
2476 /* If the first element of the vector is the low part
2477 of the destination mode, use a paradoxical subreg to
2478 initialize the destination. */
2481 inner
= GET_MODE (tmps
[start
]);
2482 bytepos
= subreg_lowpart_offset (inner
, outer
);
2483 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2486 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2490 emit_move_insn (dst
, temp
);
2497 /* If the first element wasn't the low part, try the last. */
2499 && start
< finish
- 1)
2501 inner
= GET_MODE (tmps
[finish
- 1]);
2502 bytepos
= subreg_lowpart_offset (inner
, outer
);
2503 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2507 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2511 emit_move_insn (dst
, temp
);
2518 /* Otherwise, simply initialize the result to zero. */
2520 emit_move_insn (dst
, CONST0_RTX (outer
));
2523 /* Process the pieces. */
2524 for (i
= start
; i
< finish
; i
++)
2526 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2527 machine_mode mode
= GET_MODE (tmps
[i
]);
2528 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2529 poly_uint64 adj_bytelen
;
2532 /* Handle trailing fragments that run over the size of the struct.
2533 It's the target's responsibility to make sure that the fragment
2534 cannot be strictly smaller in some cases and strictly larger
2536 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2537 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2538 adj_bytelen
= ssize
- bytepos
;
2540 adj_bytelen
= bytelen
;
2542 if (GET_CODE (dst
) == CONCAT
)
2544 if (known_le (bytepos
+ adj_bytelen
,
2545 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2546 dest
= XEXP (dst
, 0);
2547 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2549 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2550 dest
= XEXP (dst
, 1);
2554 machine_mode dest_mode
= GET_MODE (dest
);
2555 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2557 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2559 if (GET_MODE_ALIGNMENT (dest_mode
)
2560 >= GET_MODE_ALIGNMENT (tmp_mode
))
2562 dest
= assign_stack_temp (dest_mode
,
2563 GET_MODE_SIZE (dest_mode
));
2564 emit_move_insn (adjust_address (dest
,
2572 dest
= assign_stack_temp (tmp_mode
,
2573 GET_MODE_SIZE (tmp_mode
));
2574 emit_move_insn (dest
, tmps
[i
]);
2575 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2581 /* Handle trailing fragments that run over the size of the struct. */
2582 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2584 /* store_bit_field always takes its value from the lsb.
2585 Move the fragment to the lsb if it's not already there. */
2587 #ifdef BLOCK_REG_PADDING
2588 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2589 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2595 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2596 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2600 /* Make sure not to write past the end of the struct. */
2601 store_bit_field (dest
,
2602 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2603 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2604 VOIDmode
, tmps
[i
], false);
2607 /* Optimize the access just a bit. */
2608 else if (MEM_P (dest
)
2609 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2610 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2611 && multiple_p (bytepos
* BITS_PER_UNIT
,
2612 GET_MODE_ALIGNMENT (mode
))
2613 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2614 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2617 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2618 0, 0, mode
, tmps
[i
], false);
2621 /* Copy from the pseudo into the (probable) hard reg. */
2622 if (orig_dst
!= dst
)
2623 emit_move_insn (orig_dst
, dst
);
2626 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2627 of the value stored in X. */
2630 maybe_emit_group_store (rtx x
, tree type
)
2632 machine_mode mode
= TYPE_MODE (type
);
2633 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2634 if (GET_CODE (x
) == PARALLEL
)
2636 rtx result
= gen_reg_rtx (mode
);
2637 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2643 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2645 This is used on targets that return BLKmode values in registers. */
2648 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2650 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2651 rtx src
= NULL
, dst
= NULL
;
2652 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2653 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2654 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2655 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2656 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2657 fixed_size_mode copy_mode
;
2659 /* BLKmode registers created in the back-end shouldn't have survived. */
2660 gcc_assert (mode
!= BLKmode
);
2662 /* If the structure doesn't take up a whole number of words, see whether
2663 SRCREG is padded on the left or on the right. If it's on the left,
2664 set PADDING_CORRECTION to the number of bits to skip.
2666 In most ABIs, the structure will be returned at the least end of
2667 the register, which translates to right padding on little-endian
2668 targets and left padding on big-endian targets. The opposite
2669 holds if the structure is returned at the most significant
2670 end of the register. */
2671 if (bytes
% UNITS_PER_WORD
!= 0
2672 && (targetm
.calls
.return_in_msb (type
)
2674 : BYTES_BIG_ENDIAN
))
2676 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2678 /* We can use a single move if we have an exact mode for the size. */
2679 else if (MEM_P (target
)
2680 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2681 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2682 && bytes
== GET_MODE_SIZE (mode
))
2684 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2688 /* And if we additionally have the same mode for a register. */
2689 else if (REG_P (target
)
2690 && GET_MODE (target
) == mode
2691 && bytes
== GET_MODE_SIZE (mode
))
2693 emit_move_insn (target
, srcreg
);
2697 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2698 into a new pseudo which is a full word. */
2699 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2701 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2705 /* Copy the structure BITSIZE bits at a time. If the target lives in
2706 memory, take care of not reading/writing past its end by selecting
2707 a copy mode suited to BITSIZE. This should always be possible given
2710 If the target lives in register, make sure not to select a copy mode
2711 larger than the mode of the register.
2713 We could probably emit more efficient code for machines which do not use
2714 strict alignment, but it doesn't seem worth the effort at the current
2717 copy_mode
= word_mode
;
2720 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2721 if (mem_mode
.exists ())
2722 copy_mode
= mem_mode
.require ();
2724 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2727 for (bitpos
= 0, xbitpos
= padding_correction
;
2728 bitpos
< bytes
* BITS_PER_UNIT
;
2729 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2731 /* We need a new source operand each time xbitpos is on a
2732 word boundary and when xbitpos == padding_correction
2733 (the first time through). */
2734 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2735 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2737 /* We need a new destination operand each time bitpos is on
2739 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2741 else if (bitpos
% BITS_PER_WORD
== 0)
2742 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2744 /* Use xbitpos for the source extraction (right justified) and
2745 bitpos for the destination store (left justified). */
2746 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2747 extract_bit_field (src
, bitsize
,
2748 xbitpos
% BITS_PER_WORD
, 1,
2749 NULL_RTX
, copy_mode
, copy_mode
,
2755 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2756 register if it contains any data, otherwise return null.
2758 This is used on targets that return BLKmode values in registers. */
2761 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2764 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2765 unsigned int bitsize
;
2766 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2767 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2768 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2769 fixed_size_mode dst_mode
;
2770 scalar_int_mode min_mode
;
2772 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2774 x
= expand_normal (src
);
2776 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2780 /* If the structure doesn't take up a whole number of words, see
2781 whether the register value should be padded on the left or on
2782 the right. Set PADDING_CORRECTION to the number of padding
2783 bits needed on the left side.
2785 In most ABIs, the structure will be returned at the least end of
2786 the register, which translates to right padding on little-endian
2787 targets and left padding on big-endian targets. The opposite
2788 holds if the structure is returned at the most significant
2789 end of the register. */
2790 if (bytes
% UNITS_PER_WORD
!= 0
2791 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2793 : BYTES_BIG_ENDIAN
))
2794 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2797 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2798 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2799 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2800 min_mode
= smallest_int_mode_for_size (bitsize
);
2802 /* Copy the structure BITSIZE bits at a time. */
2803 for (bitpos
= 0, xbitpos
= padding_correction
;
2804 bitpos
< bytes
* BITS_PER_UNIT
;
2805 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2807 /* We need a new destination pseudo each time xbitpos is
2808 on a word boundary and when xbitpos == padding_correction
2809 (the first time through). */
2810 if (xbitpos
% BITS_PER_WORD
== 0
2811 || xbitpos
== padding_correction
)
2813 /* Generate an appropriate register. */
2814 dst_word
= gen_reg_rtx (word_mode
);
2815 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2817 /* Clear the destination before we move anything into it. */
2818 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2821 /* Find the largest integer mode that can be used to copy all or as
2822 many bits as possible of the structure if the target supports larger
2823 copies. There are too many corner cases here w.r.t to alignments on
2824 the read/writes. So if there is any padding just use single byte
2826 opt_scalar_int_mode mode_iter
;
2827 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2829 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2831 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2832 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2833 && msize
<= BITS_PER_WORD
)
2840 /* We need a new source operand each time bitpos is on a word
2842 if (bitpos
% BITS_PER_WORD
== 0)
2843 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2845 /* Use bitpos for the source extraction (left justified) and
2846 xbitpos for the destination store (right justified). */
2847 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2849 extract_bit_field (src_word
, bitsize
,
2850 bitpos
% BITS_PER_WORD
, 1,
2851 NULL_RTX
, word_mode
, word_mode
,
2856 if (mode
== BLKmode
)
2858 /* Find the smallest integer mode large enough to hold the
2859 entire structure. */
2860 opt_scalar_int_mode mode_iter
;
2861 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2862 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2865 /* A suitable mode should have been found. */
2866 mode
= mode_iter
.require ();
2869 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2870 dst_mode
= word_mode
;
2873 dst
= gen_reg_rtx (dst_mode
);
2875 for (i
= 0; i
< n_regs
; i
++)
2876 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2878 if (mode
!= dst_mode
)
2879 dst
= gen_lowpart (mode
, dst
);
2884 /* Add a USE expression for REG to the (possibly empty) list pointed
2885 to by CALL_FUSAGE. REG must denote a hard register. */
2888 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2890 gcc_assert (REG_P (reg
));
2892 if (!HARD_REGISTER_P (reg
))
2896 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2899 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2900 to by CALL_FUSAGE. REG must denote a hard register. */
2903 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2905 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2908 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2911 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2912 starting at REGNO. All of these registers must be hard registers. */
2915 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2919 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2921 for (i
= 0; i
< nregs
; i
++)
2922 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2925 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2926 PARALLEL REGS. This is for calls that pass values in multiple
2927 non-contiguous locations. The Irix 6 ABI has examples of this. */
2930 use_group_regs (rtx
*call_fusage
, rtx regs
)
2934 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2936 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2938 /* A NULL entry means the parameter goes both on the stack and in
2939 registers. This can also be a MEM for targets that pass values
2940 partially on the stack and partially in registers. */
2941 if (reg
!= 0 && REG_P (reg
))
2942 use_reg (call_fusage
, reg
);
2946 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2947 assigment and the code of the expresion on the RHS is CODE. Return
2951 get_def_for_expr (tree name
, enum tree_code code
)
2955 if (TREE_CODE (name
) != SSA_NAME
)
2958 def_stmt
= get_gimple_for_ssa_name (name
);
2960 || gimple_assign_rhs_code (def_stmt
) != code
)
2966 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2967 assigment and the class of the expresion on the RHS is CLASS. Return
2971 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2975 if (TREE_CODE (name
) != SSA_NAME
)
2978 def_stmt
= get_gimple_for_ssa_name (name
);
2980 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2986 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2987 its length in bytes. */
2990 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2991 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2992 unsigned HOST_WIDE_INT min_size
,
2993 unsigned HOST_WIDE_INT max_size
,
2994 unsigned HOST_WIDE_INT probable_max_size
)
2996 machine_mode mode
= GET_MODE (object
);
2999 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3001 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3002 just move a zero. Otherwise, do this a piece at a time. */
3003 poly_int64 size_val
;
3005 && poly_int_rtx_p (size
, &size_val
)
3006 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3008 rtx zero
= CONST0_RTX (mode
);
3011 emit_move_insn (object
, zero
);
3015 if (COMPLEX_MODE_P (mode
))
3017 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3020 write_complex_part (object
, zero
, 0);
3021 write_complex_part (object
, zero
, 1);
3027 if (size
== const0_rtx
)
3030 align
= MEM_ALIGN (object
);
3032 if (CONST_INT_P (size
)
3033 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3035 optimize_insn_for_speed_p ()))
3036 clear_by_pieces (object
, INTVAL (size
), align
);
3037 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3038 expected_align
, expected_size
,
3039 min_size
, max_size
, probable_max_size
))
3041 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3042 return set_storage_via_libcall (object
, size
, const0_rtx
,
3043 method
== BLOCK_OP_TAILCALL
);
3051 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3053 unsigned HOST_WIDE_INT max
, min
= 0;
3054 if (GET_CODE (size
) == CONST_INT
)
3055 min
= max
= UINTVAL (size
);
3057 max
= GET_MODE_MASK (GET_MODE (size
));
3058 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3062 /* A subroutine of clear_storage. Expand a call to memset.
3063 Return the return value of memset, 0 otherwise. */
3066 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3068 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3069 machine_mode size_mode
;
3071 object
= copy_addr_to_reg (XEXP (object
, 0));
3072 object_tree
= make_tree (ptr_type_node
, object
);
3074 if (!CONST_INT_P (val
))
3075 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3076 val_tree
= make_tree (integer_type_node
, val
);
3078 size_mode
= TYPE_MODE (sizetype
);
3079 size
= convert_to_mode (size_mode
, size
, 1);
3080 size
= copy_to_mode_reg (size_mode
, size
);
3081 size_tree
= make_tree (sizetype
, size
);
3083 /* It is incorrect to use the libcall calling conventions for calls to
3084 memset because it can be provided by the user. */
3085 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3086 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3087 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3089 return expand_call (call_expr
, NULL_RTX
, false);
3092 /* Expand a setmem pattern; return true if successful. */
3095 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3096 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3097 unsigned HOST_WIDE_INT min_size
,
3098 unsigned HOST_WIDE_INT max_size
,
3099 unsigned HOST_WIDE_INT probable_max_size
)
3101 /* Try the most limited insn first, because there's no point
3102 including more than one in the machine description unless
3103 the more limited one has some advantage. */
3105 if (expected_align
< align
)
3106 expected_align
= align
;
3107 if (expected_size
!= -1)
3109 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3110 expected_size
= max_size
;
3111 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3112 expected_size
= min_size
;
3115 opt_scalar_int_mode mode_iter
;
3116 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3118 scalar_int_mode mode
= mode_iter
.require ();
3119 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3121 if (code
!= CODE_FOR_nothing
3122 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3123 here because if SIZE is less than the mode mask, as it is
3124 returned by the macro, it will definitely be less than the
3125 actual mode mask. Since SIZE is within the Pmode address
3126 space, we limit MODE to Pmode. */
3127 && ((CONST_INT_P (size
)
3128 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3129 <= (GET_MODE_MASK (mode
) >> 1)))
3130 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3131 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3133 struct expand_operand ops
[9];
3136 nops
= insn_data
[(int) code
].n_generator_args
;
3137 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3139 create_fixed_operand (&ops
[0], object
);
3140 /* The check above guarantees that this size conversion is valid. */
3141 create_convert_operand_to (&ops
[1], size
, mode
, true);
3142 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3143 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3146 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3147 create_integer_operand (&ops
[5], expected_size
);
3151 create_integer_operand (&ops
[6], min_size
);
3152 /* If we can not represent the maximal size,
3153 make parameter NULL. */
3154 if ((HOST_WIDE_INT
) max_size
!= -1)
3155 create_integer_operand (&ops
[7], max_size
);
3157 create_fixed_operand (&ops
[7], NULL
);
3161 /* If we can not represent the maximal size,
3162 make parameter NULL. */
3163 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3164 create_integer_operand (&ops
[8], probable_max_size
);
3166 create_fixed_operand (&ops
[8], NULL
);
3168 if (maybe_expand_insn (code
, nops
, ops
))
3177 /* Write to one of the components of the complex value CPLX. Write VAL to
3178 the real part if IMAG_P is false, and the imaginary part if its true. */
3181 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3187 if (GET_CODE (cplx
) == CONCAT
)
3189 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3193 cmode
= GET_MODE (cplx
);
3194 imode
= GET_MODE_INNER (cmode
);
3195 ibitsize
= GET_MODE_BITSIZE (imode
);
3197 /* For MEMs simplify_gen_subreg may generate an invalid new address
3198 because, e.g., the original address is considered mode-dependent
3199 by the target, which restricts simplify_subreg from invoking
3200 adjust_address_nv. Instead of preparing fallback support for an
3201 invalid address, we call adjust_address_nv directly. */
3204 emit_move_insn (adjust_address_nv (cplx
, imode
,
3205 imag_p
? GET_MODE_SIZE (imode
) : 0),
3210 /* If the sub-object is at least word sized, then we know that subregging
3211 will work. This special case is important, since store_bit_field
3212 wants to operate on integer modes, and there's rarely an OImode to
3213 correspond to TCmode. */
3214 if (ibitsize
>= BITS_PER_WORD
3215 /* For hard regs we have exact predicates. Assume we can split
3216 the original object if it spans an even number of hard regs.
3217 This special case is important for SCmode on 64-bit platforms
3218 where the natural size of floating-point regs is 32-bit. */
3220 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3221 && REG_NREGS (cplx
) % 2 == 0))
3223 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3224 imag_p
? GET_MODE_SIZE (imode
) : 0);
3227 emit_move_insn (part
, val
);
3231 /* simplify_gen_subreg may fail for sub-word MEMs. */
3232 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3235 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3239 /* Extract one of the components of the complex value CPLX. Extract the
3240 real part if IMAG_P is false, and the imaginary part if it's true. */
3243 read_complex_part (rtx cplx
, bool imag_p
)
3249 if (GET_CODE (cplx
) == CONCAT
)
3250 return XEXP (cplx
, imag_p
);
3252 cmode
= GET_MODE (cplx
);
3253 imode
= GET_MODE_INNER (cmode
);
3254 ibitsize
= GET_MODE_BITSIZE (imode
);
3256 /* Special case reads from complex constants that got spilled to memory. */
3257 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3259 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3260 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3262 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3263 if (CONSTANT_CLASS_P (part
))
3264 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3268 /* For MEMs simplify_gen_subreg may generate an invalid new address
3269 because, e.g., the original address is considered mode-dependent
3270 by the target, which restricts simplify_subreg from invoking
3271 adjust_address_nv. Instead of preparing fallback support for an
3272 invalid address, we call adjust_address_nv directly. */
3274 return adjust_address_nv (cplx
, imode
,
3275 imag_p
? GET_MODE_SIZE (imode
) : 0);
3277 /* If the sub-object is at least word sized, then we know that subregging
3278 will work. This special case is important, since extract_bit_field
3279 wants to operate on integer modes, and there's rarely an OImode to
3280 correspond to TCmode. */
3281 if (ibitsize
>= BITS_PER_WORD
3282 /* For hard regs we have exact predicates. Assume we can split
3283 the original object if it spans an even number of hard regs.
3284 This special case is important for SCmode on 64-bit platforms
3285 where the natural size of floating-point regs is 32-bit. */
3287 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3288 && REG_NREGS (cplx
) % 2 == 0))
3290 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3291 imag_p
? GET_MODE_SIZE (imode
) : 0);
3295 /* simplify_gen_subreg may fail for sub-word MEMs. */
3296 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3299 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3300 true, NULL_RTX
, imode
, imode
, false, NULL
);
3303 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3304 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3305 represented in NEW_MODE. If FORCE is true, this will never happen, as
3306 we'll force-create a SUBREG if needed. */
3309 emit_move_change_mode (machine_mode new_mode
,
3310 machine_mode old_mode
, rtx x
, bool force
)
3314 if (push_operand (x
, GET_MODE (x
)))
3316 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3317 MEM_COPY_ATTRIBUTES (ret
, x
);
3321 /* We don't have to worry about changing the address since the
3322 size in bytes is supposed to be the same. */
3323 if (reload_in_progress
)
3325 /* Copy the MEM to change the mode and move any
3326 substitutions from the old MEM to the new one. */
3327 ret
= adjust_address_nv (x
, new_mode
, 0);
3328 copy_replacements (x
, ret
);
3331 ret
= adjust_address (x
, new_mode
, 0);
3335 /* Note that we do want simplify_subreg's behavior of validating
3336 that the new mode is ok for a hard register. If we were to use
3337 simplify_gen_subreg, we would create the subreg, but would
3338 probably run into the target not being able to implement it. */
3339 /* Except, of course, when FORCE is true, when this is exactly what
3340 we want. Which is needed for CCmodes on some targets. */
3342 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3344 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3350 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3351 an integer mode of the same size as MODE. Returns the instruction
3352 emitted, or NULL if such a move could not be generated. */
3355 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3357 scalar_int_mode imode
;
3358 enum insn_code code
;
3360 /* There must exist a mode of the exact size we require. */
3361 if (!int_mode_for_mode (mode
).exists (&imode
))
3364 /* The target must support moves in this mode. */
3365 code
= optab_handler (mov_optab
, imode
);
3366 if (code
== CODE_FOR_nothing
)
3369 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3372 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3375 return emit_insn (GEN_FCN (code
) (x
, y
));
3378 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3379 Return an equivalent MEM that does not use an auto-increment. */
3382 emit_move_resolve_push (machine_mode mode
, rtx x
)
3384 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3387 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3388 #ifdef PUSH_ROUNDING
3389 adjust
= PUSH_ROUNDING (adjust
);
3391 if (code
== PRE_DEC
|| code
== POST_DEC
)
3393 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3395 rtx expr
= XEXP (XEXP (x
, 0), 1);
3397 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3398 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3399 if (GET_CODE (expr
) == MINUS
)
3401 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3405 /* Do not use anti_adjust_stack, since we don't want to update
3406 stack_pointer_delta. */
3407 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3408 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3409 0, OPTAB_LIB_WIDEN
);
3410 if (temp
!= stack_pointer_rtx
)
3411 emit_move_insn (stack_pointer_rtx
, temp
);
3418 temp
= stack_pointer_rtx
;
3423 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3429 return replace_equiv_address (x
, temp
);
3432 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3433 X is known to satisfy push_operand, and MODE is known to be complex.
3434 Returns the last instruction emitted. */
3437 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3439 scalar_mode submode
= GET_MODE_INNER (mode
);
3442 #ifdef PUSH_ROUNDING
3443 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3445 /* In case we output to the stack, but the size is smaller than the
3446 machine can push exactly, we need to use move instructions. */
3447 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3449 x
= emit_move_resolve_push (mode
, x
);
3450 return emit_move_insn (x
, y
);
3454 /* Note that the real part always precedes the imag part in memory
3455 regardless of machine's endianness. */
3456 switch (GET_CODE (XEXP (x
, 0)))
3470 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3471 read_complex_part (y
, imag_first
));
3472 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3473 read_complex_part (y
, !imag_first
));
3476 /* A subroutine of emit_move_complex. Perform the move from Y to X
3477 via two moves of the parts. Returns the last instruction emitted. */
3480 emit_move_complex_parts (rtx x
, rtx y
)
3482 /* Show the output dies here. This is necessary for SUBREGs
3483 of pseudos since we cannot track their lifetimes correctly;
3484 hard regs shouldn't appear here except as return values. */
3485 if (!reload_completed
&& !reload_in_progress
3486 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3489 write_complex_part (x
, read_complex_part (y
, false), false);
3490 write_complex_part (x
, read_complex_part (y
, true), true);
3492 return get_last_insn ();
3495 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3496 MODE is known to be complex. Returns the last instruction emitted. */
3499 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3503 /* Need to take special care for pushes, to maintain proper ordering
3504 of the data, and possibly extra padding. */
3505 if (push_operand (x
, mode
))
3506 return emit_move_complex_push (mode
, x
, y
);
3508 /* See if we can coerce the target into moving both values at once, except
3509 for floating point where we favor moving as parts if this is easy. */
3510 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3511 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3513 && HARD_REGISTER_P (x
)
3514 && REG_NREGS (x
) == 1)
3516 && HARD_REGISTER_P (y
)
3517 && REG_NREGS (y
) == 1))
3519 /* Not possible if the values are inherently not adjacent. */
3520 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3522 /* Is possible if both are registers (or subregs of registers). */
3523 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3525 /* If one of the operands is a memory, and alignment constraints
3526 are friendly enough, we may be able to do combined memory operations.
3527 We do not attempt this if Y is a constant because that combination is
3528 usually better with the by-parts thing below. */
3529 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3530 && (!STRICT_ALIGNMENT
3531 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3540 /* For memory to memory moves, optimal behavior can be had with the
3541 existing block move logic. */
3542 if (MEM_P (x
) && MEM_P (y
))
3544 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3545 BLOCK_OP_NO_LIBCALL
);
3546 return get_last_insn ();
3549 ret
= emit_move_via_integer (mode
, x
, y
, true);
3554 return emit_move_complex_parts (x
, y
);
3557 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3558 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3561 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3565 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3568 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3569 if (code
!= CODE_FOR_nothing
)
3571 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3572 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3573 return emit_insn (GEN_FCN (code
) (x
, y
));
3577 /* Otherwise, find the MODE_INT mode of the same width. */
3578 ret
= emit_move_via_integer (mode
, x
, y
, false);
3579 gcc_assert (ret
!= NULL
);
3583 /* Return true if word I of OP lies entirely in the
3584 undefined bits of a paradoxical subreg. */
3587 undefined_operand_subword_p (const_rtx op
, int i
)
3589 if (GET_CODE (op
) != SUBREG
)
3591 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3592 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3593 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3594 || known_le (offset
, -UNITS_PER_WORD
));
3597 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3598 MODE is any multi-word or full-word mode that lacks a move_insn
3599 pattern. Note that you will get better code if you define such
3600 patterns, even if they must turn into multiple assembler instructions. */
3603 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3605 rtx_insn
*last_insn
= 0;
3611 /* This function can only handle cases where the number of words is
3612 known at compile time. */
3613 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3614 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3616 /* If X is a push on the stack, do the push now and replace
3617 X with a reference to the stack pointer. */
3618 if (push_operand (x
, mode
))
3619 x
= emit_move_resolve_push (mode
, x
);
3621 /* If we are in reload, see if either operand is a MEM whose address
3622 is scheduled for replacement. */
3623 if (reload_in_progress
&& MEM_P (x
)
3624 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3625 x
= replace_equiv_address_nv (x
, inner
);
3626 if (reload_in_progress
&& MEM_P (y
)
3627 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3628 y
= replace_equiv_address_nv (y
, inner
);
3632 need_clobber
= false;
3633 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3635 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3638 /* Do not generate code for a move if it would come entirely
3639 from the undefined bits of a paradoxical subreg. */
3640 if (undefined_operand_subword_p (y
, i
))
3643 ypart
= operand_subword (y
, i
, 1, mode
);
3645 /* If we can't get a part of Y, put Y into memory if it is a
3646 constant. Otherwise, force it into a register. Then we must
3647 be able to get a part of Y. */
3648 if (ypart
== 0 && CONSTANT_P (y
))
3650 y
= use_anchored_address (force_const_mem (mode
, y
));
3651 ypart
= operand_subword (y
, i
, 1, mode
);
3653 else if (ypart
== 0)
3654 ypart
= operand_subword_force (y
, i
, mode
);
3656 gcc_assert (xpart
&& ypart
);
3658 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3660 last_insn
= emit_move_insn (xpart
, ypart
);
3666 /* Show the output dies here. This is necessary for SUBREGs
3667 of pseudos since we cannot track their lifetimes correctly;
3668 hard regs shouldn't appear here except as return values.
3669 We never want to emit such a clobber after reload. */
3671 && ! (reload_in_progress
|| reload_completed
)
3672 && need_clobber
!= 0)
3680 /* Low level part of emit_move_insn.
3681 Called just like emit_move_insn, but assumes X and Y
3682 are basically valid. */
3685 emit_move_insn_1 (rtx x
, rtx y
)
3687 machine_mode mode
= GET_MODE (x
);
3688 enum insn_code code
;
3690 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3692 code
= optab_handler (mov_optab
, mode
);
3693 if (code
!= CODE_FOR_nothing
)
3694 return emit_insn (GEN_FCN (code
) (x
, y
));
3696 /* Expand complex moves by moving real part and imag part. */
3697 if (COMPLEX_MODE_P (mode
))
3698 return emit_move_complex (mode
, x
, y
);
3700 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3701 || ALL_FIXED_POINT_MODE_P (mode
))
3703 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3705 /* If we can't find an integer mode, use multi words. */
3709 return emit_move_multi_word (mode
, x
, y
);
3712 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3713 return emit_move_ccmode (mode
, x
, y
);
3715 /* Try using a move pattern for the corresponding integer mode. This is
3716 only safe when simplify_subreg can convert MODE constants into integer
3717 constants. At present, it can only do this reliably if the value
3718 fits within a HOST_WIDE_INT. */
3720 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3722 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3726 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3731 return emit_move_multi_word (mode
, x
, y
);
3734 /* Generate code to copy Y into X.
3735 Both Y and X must have the same mode, except that
3736 Y can be a constant with VOIDmode.
3737 This mode cannot be BLKmode; use emit_block_move for that.
3739 Return the last instruction emitted. */
3742 emit_move_insn (rtx x
, rtx y
)
3744 machine_mode mode
= GET_MODE (x
);
3745 rtx y_cst
= NULL_RTX
;
3746 rtx_insn
*last_insn
;
3749 gcc_assert (mode
!= BLKmode
3750 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3755 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3756 && (last_insn
= compress_float_constant (x
, y
)))
3761 if (!targetm
.legitimate_constant_p (mode
, y
))
3763 y
= force_const_mem (mode
, y
);
3765 /* If the target's cannot_force_const_mem prevented the spill,
3766 assume that the target's move expanders will also take care
3767 of the non-legitimate constant. */
3771 y
= use_anchored_address (y
);
3775 /* If X or Y are memory references, verify that their addresses are valid
3778 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3780 && ! push_operand (x
, GET_MODE (x
))))
3781 x
= validize_mem (x
);
3784 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3785 MEM_ADDR_SPACE (y
)))
3786 y
= validize_mem (y
);
3788 gcc_assert (mode
!= BLKmode
);
3790 last_insn
= emit_move_insn_1 (x
, y
);
3792 if (y_cst
&& REG_P (x
)
3793 && (set
= single_set (last_insn
)) != NULL_RTX
3794 && SET_DEST (set
) == x
3795 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3796 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3801 /* Generate the body of an instruction to copy Y into X.
3802 It may be a list of insns, if one insn isn't enough. */
3805 gen_move_insn (rtx x
, rtx y
)
3810 emit_move_insn_1 (x
, y
);
3816 /* If Y is representable exactly in a narrower mode, and the target can
3817 perform the extension directly from constant or memory, then emit the
3818 move as an extension. */
3821 compress_float_constant (rtx x
, rtx y
)
3823 machine_mode dstmode
= GET_MODE (x
);
3824 machine_mode orig_srcmode
= GET_MODE (y
);
3825 machine_mode srcmode
;
3826 const REAL_VALUE_TYPE
*r
;
3827 int oldcost
, newcost
;
3828 bool speed
= optimize_insn_for_speed_p ();
3830 r
= CONST_DOUBLE_REAL_VALUE (y
);
3832 if (targetm
.legitimate_constant_p (dstmode
, y
))
3833 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3835 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3837 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3841 rtx_insn
*last_insn
;
3843 /* Skip if the target can't extend this way. */
3844 ic
= can_extend_p (dstmode
, srcmode
, 0);
3845 if (ic
== CODE_FOR_nothing
)
3848 /* Skip if the narrowed value isn't exact. */
3849 if (! exact_real_truncate (srcmode
, r
))
3852 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3854 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3856 /* Skip if the target needs extra instructions to perform
3858 if (!insn_operand_matches (ic
, 1, trunc_y
))
3860 /* This is valid, but may not be cheaper than the original. */
3861 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3863 if (oldcost
< newcost
)
3866 else if (float_extend_from_mem
[dstmode
][srcmode
])
3868 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3869 /* This is valid, but may not be cheaper than the original. */
3870 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3872 if (oldcost
< newcost
)
3874 trunc_y
= validize_mem (trunc_y
);
3879 /* For CSE's benefit, force the compressed constant pool entry
3880 into a new pseudo. This constant may be used in different modes,
3881 and if not, combine will put things back together for us. */
3882 trunc_y
= force_reg (srcmode
, trunc_y
);
3884 /* If x is a hard register, perform the extension into a pseudo,
3885 so that e.g. stack realignment code is aware of it. */
3887 if (REG_P (x
) && HARD_REGISTER_P (x
))
3888 target
= gen_reg_rtx (dstmode
);
3890 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3891 last_insn
= get_last_insn ();
3894 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3897 return emit_move_insn (x
, target
);
3904 /* Pushing data onto the stack. */
3906 /* Push a block of length SIZE (perhaps variable)
3907 and return an rtx to address the beginning of the block.
3908 The value may be virtual_outgoing_args_rtx.
3910 EXTRA is the number of bytes of padding to push in addition to SIZE.
3911 BELOW nonzero means this padding comes at low addresses;
3912 otherwise, the padding comes at high addresses. */
3915 push_block (rtx size
, poly_int64 extra
, int below
)
3919 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3920 if (CONSTANT_P (size
))
3921 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3922 else if (REG_P (size
) && known_eq (extra
, 0))
3923 anti_adjust_stack (size
);
3926 temp
= copy_to_mode_reg (Pmode
, size
);
3927 if (maybe_ne (extra
, 0))
3928 temp
= expand_binop (Pmode
, add_optab
, temp
,
3929 gen_int_mode (extra
, Pmode
),
3930 temp
, 0, OPTAB_LIB_WIDEN
);
3931 anti_adjust_stack (temp
);
3934 if (STACK_GROWS_DOWNWARD
)
3936 temp
= virtual_outgoing_args_rtx
;
3937 if (maybe_ne (extra
, 0) && below
)
3938 temp
= plus_constant (Pmode
, temp
, extra
);
3943 if (poly_int_rtx_p (size
, &csize
))
3944 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3945 -csize
- (below
? 0 : extra
));
3946 else if (maybe_ne (extra
, 0) && !below
)
3947 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3948 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3951 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3952 negate_rtx (Pmode
, size
));
3955 return memory_address (NARROWEST_INT_MODE
, temp
);
3958 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3961 mem_autoinc_base (rtx mem
)
3965 rtx addr
= XEXP (mem
, 0);
3966 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3967 return XEXP (addr
, 0);
3972 /* A utility routine used here, in reload, and in try_split. The insns
3973 after PREV up to and including LAST are known to adjust the stack,
3974 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3975 placing notes as appropriate. PREV may be NULL, indicating the
3976 entire insn sequence prior to LAST should be scanned.
3978 The set of allowed stack pointer modifications is small:
3979 (1) One or more auto-inc style memory references (aka pushes),
3980 (2) One or more addition/subtraction with the SP as destination,
3981 (3) A single move insn with the SP as destination,
3982 (4) A call_pop insn,
3983 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3985 Insns in the sequence that do not modify the SP are ignored,
3986 except for noreturn calls.
3988 The return value is the amount of adjustment that can be trivially
3989 verified, via immediate operand or auto-inc. If the adjustment
3990 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3993 find_args_size_adjust (rtx_insn
*insn
)
3998 pat
= PATTERN (insn
);
4001 /* Look for a call_pop pattern. */
4004 /* We have to allow non-call_pop patterns for the case
4005 of emit_single_push_insn of a TLS address. */
4006 if (GET_CODE (pat
) != PARALLEL
)
4009 /* All call_pop have a stack pointer adjust in the parallel.
4010 The call itself is always first, and the stack adjust is
4011 usually last, so search from the end. */
4012 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4014 set
= XVECEXP (pat
, 0, i
);
4015 if (GET_CODE (set
) != SET
)
4017 dest
= SET_DEST (set
);
4018 if (dest
== stack_pointer_rtx
)
4021 /* We'd better have found the stack pointer adjust. */
4024 /* Fall through to process the extracted SET and DEST
4025 as if it was a standalone insn. */
4027 else if (GET_CODE (pat
) == SET
)
4029 else if ((set
= single_set (insn
)) != NULL
)
4031 else if (GET_CODE (pat
) == PARALLEL
)
4033 /* ??? Some older ports use a parallel with a stack adjust
4034 and a store for a PUSH_ROUNDING pattern, rather than a
4035 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4036 /* ??? See h8300 and m68k, pushqi1. */
4037 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4039 set
= XVECEXP (pat
, 0, i
);
4040 if (GET_CODE (set
) != SET
)
4042 dest
= SET_DEST (set
);
4043 if (dest
== stack_pointer_rtx
)
4046 /* We do not expect an auto-inc of the sp in the parallel. */
4047 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4048 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4049 != stack_pointer_rtx
);
4057 dest
= SET_DEST (set
);
4059 /* Look for direct modifications of the stack pointer. */
4060 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4062 /* Look for a trivial adjustment, otherwise assume nothing. */
4063 /* Note that the SPU restore_stack_block pattern refers to
4064 the stack pointer in V4SImode. Consider that non-trivial. */
4066 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4067 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4069 /* ??? Reload can generate no-op moves, which will be cleaned
4070 up later. Recognize it and continue searching. */
4071 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4074 return HOST_WIDE_INT_MIN
;
4080 /* Otherwise only think about autoinc patterns. */
4081 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4084 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4085 != stack_pointer_rtx
);
4087 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4088 mem
= SET_SRC (set
);
4092 addr
= XEXP (mem
, 0);
4093 switch (GET_CODE (addr
))
4097 return GET_MODE_SIZE (GET_MODE (mem
));
4100 return -GET_MODE_SIZE (GET_MODE (mem
));
4103 addr
= XEXP (addr
, 1);
4104 gcc_assert (GET_CODE (addr
) == PLUS
);
4105 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4106 return rtx_to_poly_int64 (XEXP (addr
, 1));
4114 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4115 poly_int64 end_args_size
)
4117 poly_int64 args_size
= end_args_size
;
4118 bool saw_unknown
= false;
4121 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4123 if (!NONDEBUG_INSN_P (insn
))
4126 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4127 a call argument containing a TLS address that itself requires
4128 a call to __tls_get_addr. The handling of stack_pointer_delta
4129 in emit_single_push_insn is supposed to ensure that any such
4130 notes are already correct. */
4131 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4132 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4134 poly_int64 this_delta
= find_args_size_adjust (insn
);
4135 if (known_eq (this_delta
, 0))
4138 || ACCUMULATE_OUTGOING_ARGS
4139 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4143 gcc_assert (!saw_unknown
);
4144 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4148 add_args_size_note (insn
, args_size
);
4149 if (STACK_GROWS_DOWNWARD
)
4150 this_delta
= -poly_uint64 (this_delta
);
4153 args_size
= HOST_WIDE_INT_MIN
;
4155 args_size
-= this_delta
;
4161 #ifdef PUSH_ROUNDING
4162 /* Emit single push insn. */
4165 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4168 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4170 enum insn_code icode
;
4172 /* If there is push pattern, use it. Otherwise try old way of throwing
4173 MEM representing push operation to move expander. */
4174 icode
= optab_handler (push_optab
, mode
);
4175 if (icode
!= CODE_FOR_nothing
)
4177 struct expand_operand ops
[1];
4179 create_input_operand (&ops
[0], x
, mode
);
4180 if (maybe_expand_insn (icode
, 1, ops
))
4183 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4184 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4185 /* If we are to pad downward, adjust the stack pointer first and
4186 then store X into the stack location using an offset. This is
4187 because emit_move_insn does not know how to pad; it does not have
4189 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4191 emit_move_insn (stack_pointer_rtx
,
4192 expand_binop (Pmode
,
4193 STACK_GROWS_DOWNWARD
? sub_optab
4196 gen_int_mode (rounded_size
, Pmode
),
4197 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4199 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4200 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4201 /* We have already decremented the stack pointer, so get the
4203 offset
+= rounded_size
;
4205 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4206 /* We have already incremented the stack pointer, so get the
4208 offset
-= rounded_size
;
4210 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4214 if (STACK_GROWS_DOWNWARD
)
4215 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4216 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4218 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4219 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4221 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4224 dest
= gen_rtx_MEM (mode
, dest_addr
);
4228 set_mem_attributes (dest
, type
, 1);
4230 if (cfun
->tail_call_marked
)
4231 /* Function incoming arguments may overlap with sibling call
4232 outgoing arguments and we cannot allow reordering of reads
4233 from function arguments with stores to outgoing arguments
4234 of sibling calls. */
4235 set_mem_alias_set (dest
, 0);
4237 emit_move_insn (dest
, x
);
4240 /* Emit and annotate a single push insn. */
4243 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4245 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4246 rtx_insn
*prev
= get_last_insn ();
4249 emit_single_push_insn_1 (mode
, x
, type
);
4251 /* Adjust stack_pointer_delta to describe the situation after the push
4252 we just performed. Note that we must do this after the push rather
4253 than before the push in case calculating X needs pushes and pops of
4254 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4255 for such pushes and pops must not include the effect of the future
4257 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4259 last
= get_last_insn ();
4261 /* Notice the common case where we emitted exactly one insn. */
4262 if (PREV_INSN (last
) == prev
)
4264 add_args_size_note (last
, stack_pointer_delta
);
4268 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4269 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4270 || known_eq (delta
, old_delta
));
4274 /* If reading SIZE bytes from X will end up reading from
4275 Y return the number of bytes that overlap. Return -1
4276 if there is no overlap or -2 if we can't determine
4277 (for example when X and Y have different base registers). */
4280 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4282 rtx tmp
= plus_constant (Pmode
, x
, size
);
4283 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4285 if (!CONST_INT_P (sub
))
4288 HOST_WIDE_INT val
= INTVAL (sub
);
4290 return IN_RANGE (val
, 1, size
) ? val
: -1;
4293 /* Generate code to push X onto the stack, assuming it has mode MODE and
4295 MODE is redundant except when X is a CONST_INT (since they don't
4297 SIZE is an rtx for the size of data to be copied (in bytes),
4298 needed only if X is BLKmode.
4299 Return true if successful. May return false if asked to push a
4300 partial argument during a sibcall optimization (as specified by
4301 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4304 ALIGN (in bits) is maximum alignment we can assume.
4306 If PARTIAL and REG are both nonzero, then copy that many of the first
4307 bytes of X into registers starting with REG, and push the rest of X.
4308 The amount of space pushed is decreased by PARTIAL bytes.
4309 REG must be a hard register in this case.
4310 If REG is zero but PARTIAL is not, take any all others actions for an
4311 argument partially in registers, but do not actually load any
4314 EXTRA is the amount in bytes of extra space to leave next to this arg.
4315 This is ignored if an argument block has already been allocated.
4317 On a machine that lacks real push insns, ARGS_ADDR is the address of
4318 the bottom of the argument block for this call. We use indexing off there
4319 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4320 argument block has not been preallocated.
4322 ARGS_SO_FAR is the size of args previously pushed for this call.
4324 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4325 for arguments passed in registers. If nonzero, it will be the number
4326 of bytes required. */
4329 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4330 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4331 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4332 rtx alignment_pad
, bool sibcall_p
)
4335 pad_direction stack_direction
4336 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4338 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4339 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4340 Default is below for small data on big-endian machines; else above. */
4341 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4343 /* Invert direction if stack is post-decrement.
4345 if (STACK_PUSH_CODE
== POST_DEC
)
4346 if (where_pad
!= PAD_NONE
)
4347 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4351 int nregs
= partial
/ UNITS_PER_WORD
;
4352 rtx
*tmp_regs
= NULL
;
4353 int overlapping
= 0;
4356 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4358 /* Copy a block into the stack, entirely or partially. */
4365 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4366 used
= partial
- offset
;
4368 if (mode
!= BLKmode
)
4370 /* A value is to be stored in an insufficiently aligned
4371 stack slot; copy via a suitably aligned slot if
4373 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4374 if (!MEM_P (xinner
))
4376 temp
= assign_temp (type
, 1, 1);
4377 emit_move_insn (temp
, xinner
);
4384 /* USED is now the # of bytes we need not copy to the stack
4385 because registers will take care of them. */
4388 xinner
= adjust_address (xinner
, BLKmode
, used
);
4390 /* If the partial register-part of the arg counts in its stack size,
4391 skip the part of stack space corresponding to the registers.
4392 Otherwise, start copying to the beginning of the stack space,
4393 by setting SKIP to 0. */
4394 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4396 #ifdef PUSH_ROUNDING
4397 /* Do it with several push insns if that doesn't take lots of insns
4398 and if there is no difficulty with push insns that skip bytes
4399 on the stack for alignment purposes. */
4402 && CONST_INT_P (size
)
4404 && MEM_ALIGN (xinner
) >= align
4405 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4406 /* Here we avoid the case of a structure whose weak alignment
4407 forces many pushes of a small amount of data,
4408 and such small pushes do rounding that causes trouble. */
4409 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4410 || align
>= BIGGEST_ALIGNMENT
4411 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4412 align
/ BITS_PER_UNIT
))
4413 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4415 /* Push padding now if padding above and stack grows down,
4416 or if padding below and stack grows up.
4417 But if space already allocated, this has already been done. */
4418 if (maybe_ne (extra
, 0)
4420 && where_pad
!= PAD_NONE
4421 && where_pad
!= stack_direction
)
4422 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4424 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4427 #endif /* PUSH_ROUNDING */
4431 /* Otherwise make space on the stack and copy the data
4432 to the address of that space. */
4434 /* Deduct words put into registers from the size we must copy. */
4437 if (CONST_INT_P (size
))
4438 size
= GEN_INT (INTVAL (size
) - used
);
4440 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4441 gen_int_mode (used
, GET_MODE (size
)),
4442 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4445 /* Get the address of the stack space.
4446 In this case, we do not deal with EXTRA separately.
4447 A single stack adjust will do. */
4451 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4454 else if (poly_int_rtx_p (args_so_far
, &offset
))
4455 temp
= memory_address (BLKmode
,
4456 plus_constant (Pmode
, args_addr
,
4459 temp
= memory_address (BLKmode
,
4460 plus_constant (Pmode
,
4461 gen_rtx_PLUS (Pmode
,
4466 if (!ACCUMULATE_OUTGOING_ARGS
)
4468 /* If the source is referenced relative to the stack pointer,
4469 copy it to another register to stabilize it. We do not need
4470 to do this if we know that we won't be changing sp. */
4472 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4473 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4474 temp
= copy_to_reg (temp
);
4477 target
= gen_rtx_MEM (BLKmode
, temp
);
4479 /* We do *not* set_mem_attributes here, because incoming arguments
4480 may overlap with sibling call outgoing arguments and we cannot
4481 allow reordering of reads from function arguments with stores
4482 to outgoing arguments of sibling calls. We do, however, want
4483 to record the alignment of the stack slot. */
4484 /* ALIGN may well be better aligned than TYPE, e.g. due to
4485 PARM_BOUNDARY. Assume the caller isn't lying. */
4486 set_mem_align (target
, align
);
4488 /* If part should go in registers and pushing to that part would
4489 overwrite some of the values that need to go into regs, load the
4490 overlapping values into temporary pseudos to be moved into the hard
4491 regs at the end after the stack pushing has completed.
4492 We cannot load them directly into the hard regs here because
4493 they can be clobbered by the block move expansions.
4496 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4497 && GET_CODE (reg
) != PARALLEL
)
4499 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4500 if (overlapping
> 0)
4502 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4503 overlapping
/= UNITS_PER_WORD
;
4505 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4507 for (int i
= 0; i
< overlapping
; i
++)
4508 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4510 for (int i
= 0; i
< overlapping
; i
++)
4511 emit_move_insn (tmp_regs
[i
],
4512 operand_subword_force (target
, i
, mode
));
4514 else if (overlapping
== -1)
4516 /* Could not determine whether there is overlap.
4517 Fail the sibcall. */
4525 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4528 else if (partial
> 0)
4530 /* Scalar partly in registers. This case is only supported
4531 for fixed-wdth modes. */
4532 int size
= GET_MODE_SIZE (mode
).to_constant ();
4533 size
/= UNITS_PER_WORD
;
4536 /* # bytes of start of argument
4537 that we must make space for but need not store. */
4538 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4539 int args_offset
= INTVAL (args_so_far
);
4542 /* Push padding now if padding above and stack grows down,
4543 or if padding below and stack grows up.
4544 But if space already allocated, this has already been done. */
4545 if (maybe_ne (extra
, 0)
4547 && where_pad
!= PAD_NONE
4548 && where_pad
!= stack_direction
)
4549 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4551 /* If we make space by pushing it, we might as well push
4552 the real data. Otherwise, we can leave OFFSET nonzero
4553 and leave the space uninitialized. */
4557 /* Now NOT_STACK gets the number of words that we don't need to
4558 allocate on the stack. Convert OFFSET to words too. */
4559 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4560 offset
/= UNITS_PER_WORD
;
4562 /* If the partial register-part of the arg counts in its stack size,
4563 skip the part of stack space corresponding to the registers.
4564 Otherwise, start copying to the beginning of the stack space,
4565 by setting SKIP to 0. */
4566 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4568 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4569 x
= validize_mem (force_const_mem (mode
, x
));
4571 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4572 SUBREGs of such registers are not allowed. */
4573 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4574 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4575 x
= copy_to_reg (x
);
4577 /* Loop over all the words allocated on the stack for this arg. */
4578 /* We can do it by words, because any scalar bigger than a word
4579 has a size a multiple of a word. */
4580 for (i
= size
- 1; i
>= not_stack
; i
--)
4581 if (i
>= not_stack
+ offset
)
4582 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4583 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4585 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4587 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4595 /* Push padding now if padding above and stack grows down,
4596 or if padding below and stack grows up.
4597 But if space already allocated, this has already been done. */
4598 if (maybe_ne (extra
, 0)
4600 && where_pad
!= PAD_NONE
4601 && where_pad
!= stack_direction
)
4602 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4604 #ifdef PUSH_ROUNDING
4605 if (args_addr
== 0 && PUSH_ARGS
)
4606 emit_single_push_insn (mode
, x
, type
);
4610 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4611 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4613 /* We do *not* set_mem_attributes here, because incoming arguments
4614 may overlap with sibling call outgoing arguments and we cannot
4615 allow reordering of reads from function arguments with stores
4616 to outgoing arguments of sibling calls. We do, however, want
4617 to record the alignment of the stack slot. */
4618 /* ALIGN may well be better aligned than TYPE, e.g. due to
4619 PARM_BOUNDARY. Assume the caller isn't lying. */
4620 set_mem_align (dest
, align
);
4622 emit_move_insn (dest
, x
);
4626 /* Move the partial arguments into the registers and any overlapping
4627 values that we moved into the pseudos in tmp_regs. */
4628 if (partial
> 0 && reg
!= 0)
4630 /* Handle calls that pass values in multiple non-contiguous locations.
4631 The Irix 6 ABI has examples of this. */
4632 if (GET_CODE (reg
) == PARALLEL
)
4633 emit_group_load (reg
, x
, type
, -1);
4636 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4637 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4639 for (int i
= 0; i
< overlapping
; i
++)
4640 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4641 + nregs
- overlapping
+ i
),
4647 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4648 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4650 if (alignment_pad
&& args_addr
== 0)
4651 anti_adjust_stack (alignment_pad
);
4656 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4660 get_subtarget (rtx x
)
4664 /* Only registers can be subtargets. */
4666 /* Don't use hard regs to avoid extending their life. */
4667 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4671 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4672 FIELD is a bitfield. Returns true if the optimization was successful,
4673 and there's nothing else to do. */
4676 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4677 poly_uint64 pbitpos
,
4678 poly_uint64 pbitregion_start
,
4679 poly_uint64 pbitregion_end
,
4680 machine_mode mode1
, rtx str_rtx
,
4681 tree to
, tree src
, bool reverse
)
4683 /* str_mode is not guaranteed to be a scalar type. */
4684 machine_mode str_mode
= GET_MODE (str_rtx
);
4685 unsigned int str_bitsize
;
4690 enum tree_code code
;
4692 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4693 if (mode1
!= VOIDmode
4694 || !pbitsize
.is_constant (&bitsize
)
4695 || !pbitpos
.is_constant (&bitpos
)
4696 || !pbitregion_start
.is_constant (&bitregion_start
)
4697 || !pbitregion_end
.is_constant (&bitregion_end
)
4698 || bitsize
>= BITS_PER_WORD
4699 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4700 || str_bitsize
> BITS_PER_WORD
4701 || TREE_SIDE_EFFECTS (to
)
4702 || TREE_THIS_VOLATILE (to
))
4706 if (TREE_CODE (src
) != SSA_NAME
)
4708 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4711 srcstmt
= get_gimple_for_ssa_name (src
);
4713 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4716 code
= gimple_assign_rhs_code (srcstmt
);
4718 op0
= gimple_assign_rhs1 (srcstmt
);
4720 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4721 to find its initialization. Hopefully the initialization will
4722 be from a bitfield load. */
4723 if (TREE_CODE (op0
) == SSA_NAME
)
4725 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4727 /* We want to eventually have OP0 be the same as TO, which
4728 should be a bitfield. */
4730 || !is_gimple_assign (op0stmt
)
4731 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4733 op0
= gimple_assign_rhs1 (op0stmt
);
4736 op1
= gimple_assign_rhs2 (srcstmt
);
4738 if (!operand_equal_p (to
, op0
, 0))
4741 if (MEM_P (str_rtx
))
4743 unsigned HOST_WIDE_INT offset1
;
4745 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4746 str_bitsize
= BITS_PER_WORD
;
4748 scalar_int_mode best_mode
;
4749 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4750 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4752 str_mode
= best_mode
;
4753 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4756 bitpos
%= str_bitsize
;
4757 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4758 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4760 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4763 /* If the bit field covers the whole REG/MEM, store_field
4764 will likely generate better code. */
4765 if (bitsize
>= str_bitsize
)
4768 /* We can't handle fields split across multiple entities. */
4769 if (bitpos
+ bitsize
> str_bitsize
)
4772 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4773 bitpos
= str_bitsize
- bitpos
- bitsize
;
4779 /* For now, just optimize the case of the topmost bitfield
4780 where we don't need to do any masking and also
4781 1 bit bitfields where xor can be used.
4782 We might win by one instruction for the other bitfields
4783 too if insv/extv instructions aren't used, so that
4784 can be added later. */
4785 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4786 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4789 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4790 value
= convert_modes (str_mode
,
4791 TYPE_MODE (TREE_TYPE (op1
)), value
,
4792 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4794 /* We may be accessing data outside the field, which means
4795 we can alias adjacent data. */
4796 if (MEM_P (str_rtx
))
4798 str_rtx
= shallow_copy_rtx (str_rtx
);
4799 set_mem_alias_set (str_rtx
, 0);
4800 set_mem_expr (str_rtx
, 0);
4803 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4805 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4809 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4811 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4813 value
= flip_storage_order (str_mode
, value
);
4814 result
= expand_binop (str_mode
, binop
, str_rtx
,
4815 value
, str_rtx
, 1, OPTAB_WIDEN
);
4816 if (result
!= str_rtx
)
4817 emit_move_insn (str_rtx
, result
);
4822 if (TREE_CODE (op1
) != INTEGER_CST
)
4824 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4825 value
= convert_modes (str_mode
,
4826 TYPE_MODE (TREE_TYPE (op1
)), value
,
4827 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4829 /* We may be accessing data outside the field, which means
4830 we can alias adjacent data. */
4831 if (MEM_P (str_rtx
))
4833 str_rtx
= shallow_copy_rtx (str_rtx
);
4834 set_mem_alias_set (str_rtx
, 0);
4835 set_mem_expr (str_rtx
, 0);
4838 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4839 if (bitpos
+ bitsize
!= str_bitsize
)
4841 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4843 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4845 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4847 value
= flip_storage_order (str_mode
, value
);
4848 result
= expand_binop (str_mode
, binop
, str_rtx
,
4849 value
, str_rtx
, 1, OPTAB_WIDEN
);
4850 if (result
!= str_rtx
)
4851 emit_move_insn (str_rtx
, result
);
4861 /* In the C++ memory model, consecutive bit fields in a structure are
4862 considered one memory location.
4864 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4865 returns the bit range of consecutive bits in which this COMPONENT_REF
4866 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4867 and *OFFSET may be adjusted in the process.
4869 If the access does not need to be restricted, 0 is returned in both
4870 *BITSTART and *BITEND. */
4873 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4874 poly_int64_pod
*bitpos
, tree
*offset
)
4876 poly_int64 bitoffset
;
4879 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4881 field
= TREE_OPERAND (exp
, 1);
4882 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4883 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4884 need to limit the range we can access. */
4887 *bitstart
= *bitend
= 0;
4891 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4892 part of a larger bit field, then the representative does not serve any
4893 useful purpose. This can occur in Ada. */
4894 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4897 poly_int64 rbitsize
, rbitpos
;
4899 int unsignedp
, reversep
, volatilep
= 0;
4900 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4901 &roffset
, &rmode
, &unsignedp
, &reversep
,
4903 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4905 *bitstart
= *bitend
= 0;
4910 /* Compute the adjustment to bitpos from the offset of the field
4911 relative to the representative. DECL_FIELD_OFFSET of field and
4912 repr are the same by construction if they are not constants,
4913 see finish_bitfield_layout. */
4914 poly_uint64 field_offset
, repr_offset
;
4915 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4916 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4917 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4920 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4921 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4923 /* If the adjustment is larger than bitpos, we would have a negative bit
4924 position for the lower bound and this may wreak havoc later. Adjust
4925 offset and bitpos to make the lower bound non-negative in that case. */
4926 if (maybe_gt (bitoffset
, *bitpos
))
4928 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4929 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4931 *bitpos
+= adjust_bits
;
4932 if (*offset
== NULL_TREE
)
4933 *offset
= size_int (-adjust_bytes
);
4935 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
4939 *bitstart
= *bitpos
- bitoffset
;
4941 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
4944 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4945 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4946 DECL_RTL was not set yet, return NORTL. */
4949 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4951 if (TREE_CODE (addr
) != ADDR_EXPR
)
4954 tree base
= TREE_OPERAND (addr
, 0);
4957 || TREE_ADDRESSABLE (base
)
4958 || DECL_MODE (base
) == BLKmode
)
4961 if (!DECL_RTL_SET_P (base
))
4964 return (!MEM_P (DECL_RTL (base
)));
4967 /* Returns true if the MEM_REF REF refers to an object that does not
4968 reside in memory and has non-BLKmode. */
4971 mem_ref_refers_to_non_mem_p (tree ref
)
4973 tree base
= TREE_OPERAND (ref
, 0);
4974 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4977 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4978 is true, try generating a nontemporal store. */
4981 expand_assignment (tree to
, tree from
, bool nontemporal
)
4987 enum insn_code icode
;
4989 /* Don't crash if the lhs of the assignment was erroneous. */
4990 if (TREE_CODE (to
) == ERROR_MARK
)
4992 expand_normal (from
);
4996 /* Optimize away no-op moves without side-effects. */
4997 if (operand_equal_p (to
, from
, 0))
5000 /* Handle misaligned stores. */
5001 mode
= TYPE_MODE (TREE_TYPE (to
));
5002 if ((TREE_CODE (to
) == MEM_REF
5003 || TREE_CODE (to
) == TARGET_MEM_REF
)
5005 && !mem_ref_refers_to_non_mem_p (to
)
5006 && ((align
= get_object_alignment (to
))
5007 < GET_MODE_ALIGNMENT (mode
))
5008 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5009 != CODE_FOR_nothing
)
5010 || targetm
.slow_unaligned_access (mode
, align
)))
5014 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5015 reg
= force_not_mem (reg
);
5016 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5017 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5018 reg
= flip_storage_order (mode
, reg
);
5020 if (icode
!= CODE_FOR_nothing
)
5022 struct expand_operand ops
[2];
5024 create_fixed_operand (&ops
[0], mem
);
5025 create_input_operand (&ops
[1], reg
, mode
);
5026 /* The movmisalign<mode> pattern cannot fail, else the assignment
5027 would silently be omitted. */
5028 expand_insn (icode
, 2, ops
);
5031 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5036 /* Assignment of a structure component needs special treatment
5037 if the structure component's rtx is not simply a MEM.
5038 Assignment of an array element at a constant index, and assignment of
5039 an array element in an unaligned packed structure field, has the same
5040 problem. Same for (partially) storing into a non-memory object. */
5041 if (handled_component_p (to
)
5042 || (TREE_CODE (to
) == MEM_REF
5043 && (REF_REVERSE_STORAGE_ORDER (to
)
5044 || mem_ref_refers_to_non_mem_p (to
)))
5045 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5048 poly_int64 bitsize
, bitpos
;
5049 poly_uint64 bitregion_start
= 0;
5050 poly_uint64 bitregion_end
= 0;
5052 int unsignedp
, reversep
, volatilep
= 0;
5056 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5057 &unsignedp
, &reversep
, &volatilep
);
5059 /* Make sure bitpos is not negative, it can wreak havoc later. */
5060 if (maybe_lt (bitpos
, 0))
5062 gcc_assert (offset
== NULL_TREE
);
5063 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5064 bitpos
= num_trailing_bits (bitpos
);
5067 if (TREE_CODE (to
) == COMPONENT_REF
5068 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5069 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5070 /* The C++ memory model naturally applies to byte-aligned fields.
5071 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5072 BITSIZE are not byte-aligned, there is no need to limit the range
5073 we can access. This can occur with packed structures in Ada. */
5074 else if (maybe_gt (bitsize
, 0)
5075 && multiple_p (bitsize
, BITS_PER_UNIT
)
5076 && multiple_p (bitpos
, BITS_PER_UNIT
))
5078 bitregion_start
= bitpos
;
5079 bitregion_end
= bitpos
+ bitsize
- 1;
5082 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5084 /* If the field has a mode, we want to access it in the
5085 field's mode, not the computed mode.
5086 If a MEM has VOIDmode (external with incomplete type),
5087 use BLKmode for it instead. */
5090 if (mode1
!= VOIDmode
)
5091 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5092 else if (GET_MODE (to_rtx
) == VOIDmode
)
5093 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5098 machine_mode address_mode
;
5101 if (!MEM_P (to_rtx
))
5103 /* We can get constant negative offsets into arrays with broken
5104 user code. Translate this to a trap instead of ICEing. */
5105 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5106 expand_builtin_trap ();
5107 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5110 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5111 address_mode
= get_address_mode (to_rtx
);
5112 if (GET_MODE (offset_rtx
) != address_mode
)
5114 /* We cannot be sure that the RTL in offset_rtx is valid outside
5115 of a memory address context, so force it into a register
5116 before attempting to convert it to the desired mode. */
5117 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5118 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5121 /* If we have an expression in OFFSET_RTX and a non-zero
5122 byte offset in BITPOS, adding the byte offset before the
5123 OFFSET_RTX results in better intermediate code, which makes
5124 later rtl optimization passes perform better.
5126 We prefer intermediate code like this:
5128 r124:DI=r123:DI+0x18
5133 r124:DI=r123:DI+0x10
5134 [r124:DI+0x8]=r121:DI
5136 This is only done for aligned data values, as these can
5137 be expected to result in single move instructions. */
5139 if (mode1
!= VOIDmode
5140 && maybe_ne (bitpos
, 0)
5141 && maybe_gt (bitsize
, 0)
5142 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5143 && multiple_p (bitpos
, bitsize
)
5144 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5145 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5147 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5148 bitregion_start
= 0;
5149 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5150 bitregion_end
-= bitpos
;
5154 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5155 highest_pow2_factor_for_target (to
,
5159 /* No action is needed if the target is not a memory and the field
5160 lies completely outside that target. This can occur if the source
5161 code contains an out-of-bounds access to a small array. */
5163 && GET_MODE (to_rtx
) != BLKmode
5164 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5166 expand_normal (from
);
5169 /* Handle expand_expr of a complex value returning a CONCAT. */
5170 else if (GET_CODE (to_rtx
) == CONCAT
)
5172 machine_mode to_mode
= GET_MODE (to_rtx
);
5173 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5174 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5175 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5176 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5177 && known_eq (bitpos
, 0)
5178 && known_eq (bitsize
, mode_bitsize
))
5179 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5180 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5181 && known_eq (bitsize
, inner_bitsize
)
5182 && (known_eq (bitpos
, 0)
5183 || known_eq (bitpos
, inner_bitsize
)))
5184 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5185 false, nontemporal
, reversep
);
5186 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5187 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5188 bitregion_start
, bitregion_end
,
5189 mode1
, from
, get_alias_set (to
),
5190 nontemporal
, reversep
);
5191 else if (known_ge (bitpos
, inner_bitsize
))
5192 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5193 bitpos
- inner_bitsize
,
5194 bitregion_start
, bitregion_end
,
5195 mode1
, from
, get_alias_set (to
),
5196 nontemporal
, reversep
);
5197 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5199 result
= expand_normal (from
);
5200 if (GET_CODE (result
) == CONCAT
)
5202 to_mode
= GET_MODE_INNER (to_mode
);
5203 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5205 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5208 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5210 if (!from_real
|| !from_imag
)
5211 goto concat_store_slow
;
5212 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5213 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5218 = simplify_gen_subreg (to_mode
, result
,
5219 TYPE_MODE (TREE_TYPE (from
)), 0);
5222 emit_move_insn (XEXP (to_rtx
, 0),
5223 read_complex_part (from_rtx
, false));
5224 emit_move_insn (XEXP (to_rtx
, 1),
5225 read_complex_part (from_rtx
, true));
5229 machine_mode to_mode
5230 = GET_MODE_INNER (GET_MODE (to_rtx
));
5232 = simplify_gen_subreg (to_mode
, result
,
5233 TYPE_MODE (TREE_TYPE (from
)),
5236 = simplify_gen_subreg (to_mode
, result
,
5237 TYPE_MODE (TREE_TYPE (from
)),
5238 GET_MODE_SIZE (to_mode
));
5239 if (!from_real
|| !from_imag
)
5240 goto concat_store_slow
;
5241 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5242 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5249 rtx temp
= assign_stack_temp (to_mode
,
5250 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5251 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5252 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5253 result
= store_field (temp
, bitsize
, bitpos
,
5254 bitregion_start
, bitregion_end
,
5255 mode1
, from
, get_alias_set (to
),
5256 nontemporal
, reversep
);
5257 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5258 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5265 /* If the field is at offset zero, we could have been given the
5266 DECL_RTX of the parent struct. Don't munge it. */
5267 to_rtx
= shallow_copy_rtx (to_rtx
);
5268 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5270 MEM_VOLATILE_P (to_rtx
) = 1;
5273 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5274 bitregion_start
, bitregion_end
,
5275 mode1
, to_rtx
, to
, from
,
5279 result
= store_field (to_rtx
, bitsize
, bitpos
,
5280 bitregion_start
, bitregion_end
,
5281 mode1
, from
, get_alias_set (to
),
5282 nontemporal
, reversep
);
5286 preserve_temp_slots (result
);
5291 /* If the rhs is a function call and its value is not an aggregate,
5292 call the function before we start to compute the lhs.
5293 This is needed for correct code for cases such as
5294 val = setjmp (buf) on machines where reference to val
5295 requires loading up part of an address in a separate insn.
5297 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5298 since it might be a promoted variable where the zero- or sign- extension
5299 needs to be done. Handling this in the normal way is safe because no
5300 computation is done before the call. The same is true for SSA names. */
5301 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5302 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5303 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5305 || TREE_CODE (to
) == PARM_DECL
5306 || TREE_CODE (to
) == RESULT_DECL
)
5307 && REG_P (DECL_RTL (to
)))
5308 || TREE_CODE (to
) == SSA_NAME
))
5313 value
= expand_normal (from
);
5316 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5318 /* Handle calls that return values in multiple non-contiguous locations.
5319 The Irix 6 ABI has examples of this. */
5320 if (GET_CODE (to_rtx
) == PARALLEL
)
5322 if (GET_CODE (value
) == PARALLEL
)
5323 emit_group_move (to_rtx
, value
);
5325 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5326 int_size_in_bytes (TREE_TYPE (from
)));
5328 else if (GET_CODE (value
) == PARALLEL
)
5329 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5330 int_size_in_bytes (TREE_TYPE (from
)));
5331 else if (GET_MODE (to_rtx
) == BLKmode
)
5333 /* Handle calls that return BLKmode values in registers. */
5335 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5337 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5341 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5342 value
= convert_memory_address_addr_space
5343 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5344 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5346 emit_move_insn (to_rtx
, value
);
5349 preserve_temp_slots (to_rtx
);
5354 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5355 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5357 /* Don't move directly into a return register. */
5358 if (TREE_CODE (to
) == RESULT_DECL
5359 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5365 /* If the source is itself a return value, it still is in a pseudo at
5366 this point so we can move it back to the return register directly. */
5368 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5369 && TREE_CODE (from
) != CALL_EXPR
)
5370 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5372 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5374 /* Handle calls that return values in multiple non-contiguous locations.
5375 The Irix 6 ABI has examples of this. */
5376 if (GET_CODE (to_rtx
) == PARALLEL
)
5378 if (GET_CODE (temp
) == PARALLEL
)
5379 emit_group_move (to_rtx
, temp
);
5381 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5382 int_size_in_bytes (TREE_TYPE (from
)));
5385 emit_move_insn (to_rtx
, temp
);
5387 preserve_temp_slots (to_rtx
);
5392 /* In case we are returning the contents of an object which overlaps
5393 the place the value is being stored, use a safe function when copying
5394 a value through a pointer into a structure value return block. */
5395 if (TREE_CODE (to
) == RESULT_DECL
5396 && TREE_CODE (from
) == INDIRECT_REF
5397 && ADDR_SPACE_GENERIC_P
5398 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5399 && refs_may_alias_p (to
, from
)
5400 && cfun
->returns_struct
5401 && !cfun
->returns_pcc_struct
)
5406 size
= expr_size (from
);
5407 from_rtx
= expand_normal (from
);
5409 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5411 preserve_temp_slots (to_rtx
);
5416 /* Compute FROM and store the value in the rtx we got. */
5419 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5420 preserve_temp_slots (result
);
5425 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5426 succeeded, false otherwise. */
5429 emit_storent_insn (rtx to
, rtx from
)
5431 struct expand_operand ops
[2];
5432 machine_mode mode
= GET_MODE (to
);
5433 enum insn_code code
= optab_handler (storent_optab
, mode
);
5435 if (code
== CODE_FOR_nothing
)
5438 create_fixed_operand (&ops
[0], to
);
5439 create_input_operand (&ops
[1], from
, mode
);
5440 return maybe_expand_insn (code
, 2, ops
);
5443 /* Generate code for computing expression EXP,
5444 and storing the value into TARGET.
5446 If the mode is BLKmode then we may return TARGET itself.
5447 It turns out that in BLKmode it doesn't cause a problem.
5448 because C has no operators that could combine two different
5449 assignments into the same BLKmode object with different values
5450 with no sequence point. Will other languages need this to
5453 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5454 stack, and block moves may need to be treated specially.
5456 If NONTEMPORAL is true, try using a nontemporal store instruction.
5458 If REVERSE is true, the store is to be done in reverse order. */
5461 store_expr (tree exp
, rtx target
, int call_param_p
,
5462 bool nontemporal
, bool reverse
)
5465 rtx alt_rtl
= NULL_RTX
;
5466 location_t loc
= curr_insn_location ();
5468 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5470 /* C++ can generate ?: expressions with a throw expression in one
5471 branch and an rvalue in the other. Here, we resolve attempts to
5472 store the throw expression's nonexistent result. */
5473 gcc_assert (!call_param_p
);
5474 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5477 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5479 /* Perform first part of compound expression, then assign from second
5481 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5482 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5483 return store_expr (TREE_OPERAND (exp
, 1), target
,
5484 call_param_p
, nontemporal
, reverse
);
5486 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5488 /* For conditional expression, get safe form of the target. Then
5489 test the condition, doing the appropriate assignment on either
5490 side. This avoids the creation of unnecessary temporaries.
5491 For non-BLKmode, it is more efficient not to do this. */
5493 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5495 do_pending_stack_adjust ();
5497 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5498 profile_probability::uninitialized ());
5499 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5500 nontemporal
, reverse
);
5501 emit_jump_insn (targetm
.gen_jump (lab2
));
5504 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5505 nontemporal
, reverse
);
5511 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5512 /* If this is a scalar in a register that is stored in a wider mode
5513 than the declared mode, compute the result into its declared mode
5514 and then convert to the wider mode. Our value is the computed
5517 rtx inner_target
= 0;
5518 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5519 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5521 /* We can do the conversion inside EXP, which will often result
5522 in some optimizations. Do the conversion in two steps: first
5523 change the signedness, if needed, then the extend. But don't
5524 do this if the type of EXP is a subtype of something else
5525 since then the conversion might involve more than just
5526 converting modes. */
5527 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5528 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5529 && GET_MODE_PRECISION (outer_mode
)
5530 == TYPE_PRECISION (TREE_TYPE (exp
)))
5532 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5533 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5535 /* Some types, e.g. Fortran's logical*4, won't have a signed
5536 version, so use the mode instead. */
5538 = (signed_or_unsigned_type_for
5539 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5541 ntype
= lang_hooks
.types
.type_for_mode
5542 (TYPE_MODE (TREE_TYPE (exp
)),
5543 SUBREG_PROMOTED_SIGN (target
));
5545 exp
= fold_convert_loc (loc
, ntype
, exp
);
5548 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5549 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5552 inner_target
= SUBREG_REG (target
);
5555 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5556 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5559 /* If TEMP is a VOIDmode constant, use convert_modes to make
5560 sure that we properly convert it. */
5561 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5563 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5564 temp
, SUBREG_PROMOTED_SIGN (target
));
5565 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5566 SUBREG_PROMOTED_SIGN (target
));
5569 convert_move (SUBREG_REG (target
), temp
,
5570 SUBREG_PROMOTED_SIGN (target
));
5574 else if ((TREE_CODE (exp
) == STRING_CST
5575 || (TREE_CODE (exp
) == MEM_REF
5576 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5577 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5579 && integer_zerop (TREE_OPERAND (exp
, 1))))
5580 && !nontemporal
&& !call_param_p
5583 /* Optimize initialization of an array with a STRING_CST. */
5584 HOST_WIDE_INT exp_len
, str_copy_len
;
5586 tree str
= TREE_CODE (exp
) == STRING_CST
5587 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5589 exp_len
= int_expr_size (exp
);
5593 if (TREE_STRING_LENGTH (str
) <= 0)
5596 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5597 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5600 str_copy_len
= TREE_STRING_LENGTH (str
);
5601 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5602 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5604 str_copy_len
+= STORE_MAX_PIECES
- 1;
5605 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5607 str_copy_len
= MIN (str_copy_len
, exp_len
);
5608 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5609 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5610 MEM_ALIGN (target
), false))
5615 dest_mem
= store_by_pieces (dest_mem
,
5616 str_copy_len
, builtin_strncpy_read_str
,
5618 TREE_STRING_POINTER (str
)),
5619 MEM_ALIGN (target
), false,
5620 exp_len
> str_copy_len
? 1 : 0);
5621 if (exp_len
> str_copy_len
)
5622 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5623 GEN_INT (exp_len
- str_copy_len
),
5632 /* If we want to use a nontemporal or a reverse order store, force the
5633 value into a register first. */
5634 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5635 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5637 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5641 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5642 the same as that of TARGET, adjust the constant. This is needed, for
5643 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5644 only a word-sized value. */
5645 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5646 && TREE_CODE (exp
) != ERROR_MARK
5647 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5649 if (GET_MODE_CLASS (GET_MODE (target
))
5650 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5651 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5652 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5654 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5655 TYPE_MODE (TREE_TYPE (exp
)), 0);
5659 if (GET_MODE (temp
) == VOIDmode
)
5660 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5661 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5664 /* If value was not generated in the target, store it there.
5665 Convert the value to TARGET's type first if necessary and emit the
5666 pending incrementations that have been queued when expanding EXP.
5667 Note that we cannot emit the whole queue blindly because this will
5668 effectively disable the POST_INC optimization later.
5670 If TEMP and TARGET compare equal according to rtx_equal_p, but
5671 one or both of them are volatile memory refs, we have to distinguish
5673 - expand_expr has used TARGET. In this case, we must not generate
5674 another copy. This can be detected by TARGET being equal according
5676 - expand_expr has not used TARGET - that means that the source just
5677 happens to have the same RTX form. Since temp will have been created
5678 by expand_expr, it will compare unequal according to == .
5679 We must generate a copy in this case, to reach the correct number
5680 of volatile memory references. */
5682 if ((! rtx_equal_p (temp
, target
)
5683 || (temp
!= target
&& (side_effects_p (temp
)
5684 || side_effects_p (target
))))
5685 && TREE_CODE (exp
) != ERROR_MARK
5686 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5687 but TARGET is not valid memory reference, TEMP will differ
5688 from TARGET although it is really the same location. */
5690 && rtx_equal_p (alt_rtl
, target
)
5691 && !side_effects_p (alt_rtl
)
5692 && !side_effects_p (target
))
5693 /* If there's nothing to copy, don't bother. Don't call
5694 expr_size unless necessary, because some front-ends (C++)
5695 expr_size-hook must not be given objects that are not
5696 supposed to be bit-copied or bit-initialized. */
5697 && expr_size (exp
) != const0_rtx
)
5699 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5701 if (GET_MODE (target
) == BLKmode
)
5703 /* Handle calls that return BLKmode values in registers. */
5704 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5705 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5707 store_bit_field (target
,
5708 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5709 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5712 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5715 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5717 /* Handle copying a string constant into an array. The string
5718 constant may be shorter than the array. So copy just the string's
5719 actual length, and clear the rest. First get the size of the data
5720 type of the string, which is actually the size of the target. */
5721 rtx size
= expr_size (exp
);
5723 if (CONST_INT_P (size
)
5724 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5725 emit_block_move (target
, temp
, size
,
5727 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5730 machine_mode pointer_mode
5731 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5732 machine_mode address_mode
= get_address_mode (target
);
5734 /* Compute the size of the data to copy from the string. */
5736 = size_binop_loc (loc
, MIN_EXPR
,
5737 make_tree (sizetype
, size
),
5738 size_int (TREE_STRING_LENGTH (exp
)));
5740 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5742 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5743 rtx_code_label
*label
= 0;
5745 /* Copy that much. */
5746 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5747 TYPE_UNSIGNED (sizetype
));
5748 emit_block_move (target
, temp
, copy_size_rtx
,
5750 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5752 /* Figure out how much is left in TARGET that we have to clear.
5753 Do all calculations in pointer_mode. */
5754 poly_int64 const_copy_size
;
5755 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
5757 size
= plus_constant (address_mode
, size
, -const_copy_size
);
5758 target
= adjust_address (target
, BLKmode
, const_copy_size
);
5762 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5763 copy_size_rtx
, NULL_RTX
, 0,
5766 if (GET_MODE (copy_size_rtx
) != address_mode
)
5767 copy_size_rtx
= convert_to_mode (address_mode
,
5769 TYPE_UNSIGNED (sizetype
));
5771 target
= offset_address (target
, copy_size_rtx
,
5772 highest_pow2_factor (copy_size
));
5773 label
= gen_label_rtx ();
5774 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5775 GET_MODE (size
), 0, label
);
5778 if (size
!= const0_rtx
)
5779 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5785 /* Handle calls that return values in multiple non-contiguous locations.
5786 The Irix 6 ABI has examples of this. */
5787 else if (GET_CODE (target
) == PARALLEL
)
5789 if (GET_CODE (temp
) == PARALLEL
)
5790 emit_group_move (target
, temp
);
5792 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5793 int_size_in_bytes (TREE_TYPE (exp
)));
5795 else if (GET_CODE (temp
) == PARALLEL
)
5796 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5797 int_size_in_bytes (TREE_TYPE (exp
)));
5798 else if (GET_MODE (temp
) == BLKmode
)
5799 emit_block_move (target
, temp
, expr_size (exp
),
5801 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5802 /* If we emit a nontemporal store, there is nothing else to do. */
5803 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5808 temp
= flip_storage_order (GET_MODE (target
), temp
);
5809 temp
= force_operand (temp
, target
);
5811 emit_move_insn (target
, temp
);
5818 /* Return true if field F of structure TYPE is a flexible array. */
5821 flexible_array_member_p (const_tree f
, const_tree type
)
5826 return (DECL_CHAIN (f
) == NULL
5827 && TREE_CODE (tf
) == ARRAY_TYPE
5829 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5830 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5831 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5832 && int_size_in_bytes (type
) >= 0);
5835 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5836 must have in order for it to completely initialize a value of type TYPE.
5837 Return -1 if the number isn't known.
5839 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5841 static HOST_WIDE_INT
5842 count_type_elements (const_tree type
, bool for_ctor_p
)
5844 switch (TREE_CODE (type
))
5850 nelts
= array_type_nelts (type
);
5851 if (nelts
&& tree_fits_uhwi_p (nelts
))
5853 unsigned HOST_WIDE_INT n
;
5855 n
= tree_to_uhwi (nelts
) + 1;
5856 if (n
== 0 || for_ctor_p
)
5859 return n
* count_type_elements (TREE_TYPE (type
), false);
5861 return for_ctor_p
? -1 : 1;
5866 unsigned HOST_WIDE_INT n
;
5870 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5871 if (TREE_CODE (f
) == FIELD_DECL
)
5874 n
+= count_type_elements (TREE_TYPE (f
), false);
5875 else if (!flexible_array_member_p (f
, type
))
5876 /* Don't count flexible arrays, which are not supposed
5877 to be initialized. */
5885 case QUAL_UNION_TYPE
:
5890 gcc_assert (!for_ctor_p
);
5891 /* Estimate the number of scalars in each field and pick the
5892 maximum. Other estimates would do instead; the idea is simply
5893 to make sure that the estimate is not sensitive to the ordering
5896 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5897 if (TREE_CODE (f
) == FIELD_DECL
)
5899 m
= count_type_elements (TREE_TYPE (f
), false);
5900 /* If the field doesn't span the whole union, add an extra
5901 scalar for the rest. */
5902 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5903 TYPE_SIZE (type
)) != 1)
5916 unsigned HOST_WIDE_INT nelts
;
5917 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
5925 case FIXED_POINT_TYPE
:
5930 case REFERENCE_TYPE
:
5946 /* Helper for categorize_ctor_elements. Identical interface. */
5949 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5950 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5952 unsigned HOST_WIDE_INT idx
;
5953 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5954 tree value
, purpose
, elt_type
;
5956 /* Whether CTOR is a valid constant initializer, in accordance with what
5957 initializer_constant_valid_p does. If inferred from the constructor
5958 elements, true until proven otherwise. */
5959 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5960 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5965 elt_type
= NULL_TREE
;
5967 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5969 HOST_WIDE_INT mult
= 1;
5971 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5973 tree lo_index
= TREE_OPERAND (purpose
, 0);
5974 tree hi_index
= TREE_OPERAND (purpose
, 1);
5976 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
5977 mult
= (tree_to_uhwi (hi_index
)
5978 - tree_to_uhwi (lo_index
) + 1);
5981 elt_type
= TREE_TYPE (value
);
5983 switch (TREE_CODE (value
))
5987 HOST_WIDE_INT nz
= 0, ic
= 0;
5989 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
5992 nz_elts
+= mult
* nz
;
5993 init_elts
+= mult
* ic
;
5995 if (const_from_elts_p
&& const_p
)
5996 const_p
= const_elt_p
;
6003 if (!initializer_zerop (value
))
6009 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6010 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6014 if (!initializer_zerop (TREE_REALPART (value
)))
6016 if (!initializer_zerop (TREE_IMAGPART (value
)))
6023 /* We can only construct constant-length vectors using
6025 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6026 for (unsigned int i
= 0; i
< nunits
; ++i
)
6028 tree v
= VECTOR_CST_ELT (value
, i
);
6029 if (!initializer_zerop (v
))
6038 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6039 nz_elts
+= mult
* tc
;
6040 init_elts
+= mult
* tc
;
6042 if (const_from_elts_p
&& const_p
)
6044 = initializer_constant_valid_p (value
,
6046 TYPE_REVERSE_STORAGE_ORDER
6054 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6055 num_fields
, elt_type
))
6056 *p_complete
= false;
6058 *p_nz_elts
+= nz_elts
;
6059 *p_init_elts
+= init_elts
;
6064 /* Examine CTOR to discover:
6065 * how many scalar fields are set to nonzero values,
6066 and place it in *P_NZ_ELTS;
6067 * how many scalar fields in total are in CTOR,
6068 and place it in *P_ELT_COUNT.
6069 * whether the constructor is complete -- in the sense that every
6070 meaningful byte is explicitly given a value --
6071 and place it in *P_COMPLETE.
6073 Return whether or not CTOR is a valid static constant initializer, the same
6074 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6077 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6078 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6084 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
6087 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6088 of which had type LAST_TYPE. Each element was itself a complete
6089 initializer, in the sense that every meaningful byte was explicitly
6090 given a value. Return true if the same is true for the constructor
6094 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6095 const_tree last_type
)
6097 if (TREE_CODE (type
) == UNION_TYPE
6098 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6103 gcc_assert (num_elts
== 1 && last_type
);
6105 /* ??? We could look at each element of the union, and find the
6106 largest element. Which would avoid comparing the size of the
6107 initialized element against any tail padding in the union.
6108 Doesn't seem worth the effort... */
6109 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6112 return count_type_elements (type
, true) == num_elts
;
6115 /* Return 1 if EXP contains mostly (3/4) zeros. */
6118 mostly_zeros_p (const_tree exp
)
6120 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6122 HOST_WIDE_INT nz_elts
, init_elts
;
6125 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6126 return !complete_p
|| nz_elts
< init_elts
/ 4;
6129 return initializer_zerop (exp
);
6132 /* Return 1 if EXP contains all zeros. */
6135 all_zeros_p (const_tree exp
)
6137 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6139 HOST_WIDE_INT nz_elts
, init_elts
;
6142 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6143 return nz_elts
== 0;
6146 return initializer_zerop (exp
);
6149 /* Helper function for store_constructor.
6150 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6151 CLEARED is as for store_constructor.
6152 ALIAS_SET is the alias set to use for any stores.
6153 If REVERSE is true, the store is to be done in reverse order.
6155 This provides a recursive shortcut back to store_constructor when it isn't
6156 necessary to go through store_field. This is so that we can pass through
6157 the cleared field to let store_constructor know that we may not have to
6158 clear a substructure if the outer structure has already been cleared. */
6161 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6162 poly_uint64 bitregion_start
,
6163 poly_uint64 bitregion_end
,
6165 tree exp
, int cleared
,
6166 alias_set_type alias_set
, bool reverse
)
6169 poly_uint64 bytesize
;
6170 if (TREE_CODE (exp
) == CONSTRUCTOR
6171 /* We can only call store_constructor recursively if the size and
6172 bit position are on a byte boundary. */
6173 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6174 && maybe_ne (bitsize
, 0U)
6175 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6176 /* If we have a nonzero bitpos for a register target, then we just
6177 let store_field do the bitfield handling. This is unlikely to
6178 generate unnecessary clear instructions anyways. */
6179 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6183 machine_mode target_mode
= GET_MODE (target
);
6184 if (target_mode
!= BLKmode
6185 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6186 target_mode
= BLKmode
;
6187 target
= adjust_address (target
, target_mode
, bytepos
);
6191 /* Update the alias set, if required. */
6192 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6193 && MEM_ALIAS_SET (target
) != 0)
6195 target
= copy_rtx (target
);
6196 set_mem_alias_set (target
, alias_set
);
6199 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6202 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6203 exp
, alias_set
, false, reverse
);
6207 /* Returns the number of FIELD_DECLs in TYPE. */
6210 fields_length (const_tree type
)
6212 tree t
= TYPE_FIELDS (type
);
6215 for (; t
; t
= DECL_CHAIN (t
))
6216 if (TREE_CODE (t
) == FIELD_DECL
)
6223 /* Store the value of constructor EXP into the rtx TARGET.
6224 TARGET is either a REG or a MEM; we know it cannot conflict, since
6225 safe_from_p has been called.
6226 CLEARED is true if TARGET is known to have been zero'd.
6227 SIZE is the number of bytes of TARGET we are allowed to modify: this
6228 may not be the same as the size of EXP if we are assigning to a field
6229 which has been packed to exclude padding bits.
6230 If REVERSE is true, the store is to be done in reverse order. */
6233 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6236 tree type
= TREE_TYPE (exp
);
6237 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6238 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6240 switch (TREE_CODE (type
))
6244 case QUAL_UNION_TYPE
:
6246 unsigned HOST_WIDE_INT idx
;
6249 /* The storage order is specified for every aggregate type. */
6250 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6252 /* If size is zero or the target is already cleared, do nothing. */
6253 if (known_eq (size
, 0) || cleared
)
6255 /* We either clear the aggregate or indicate the value is dead. */
6256 else if ((TREE_CODE (type
) == UNION_TYPE
6257 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6258 && ! CONSTRUCTOR_ELTS (exp
))
6259 /* If the constructor is empty, clear the union. */
6261 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6265 /* If we are building a static constructor into a register,
6266 set the initial value as zero so we can fold the value into
6267 a constant. But if more than one register is involved,
6268 this probably loses. */
6269 else if (REG_P (target
) && TREE_STATIC (exp
)
6270 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6271 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6273 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6277 /* If the constructor has fewer fields than the structure or
6278 if we are initializing the structure to mostly zeros, clear
6279 the whole structure first. Don't do this if TARGET is a
6280 register whose mode size isn't equal to SIZE since
6281 clear_storage can't handle this case. */
6282 else if (known_size_p (size
)
6283 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6284 || mostly_zeros_p (exp
))
6286 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6288 clear_storage (target
, gen_int_mode (size
, Pmode
),
6293 if (REG_P (target
) && !cleared
)
6294 emit_clobber (target
);
6296 /* Store each element of the constructor into the
6297 corresponding field of TARGET. */
6298 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6301 HOST_WIDE_INT bitsize
;
6302 HOST_WIDE_INT bitpos
= 0;
6304 rtx to_rtx
= target
;
6306 /* Just ignore missing fields. We cleared the whole
6307 structure, above, if any fields are missing. */
6311 if (cleared
&& initializer_zerop (value
))
6314 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6315 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6319 mode
= DECL_MODE (field
);
6320 if (DECL_BIT_FIELD (field
))
6323 offset
= DECL_FIELD_OFFSET (field
);
6324 if (tree_fits_shwi_p (offset
)
6325 && tree_fits_shwi_p (bit_position (field
)))
6327 bitpos
= int_bit_position (field
);
6333 /* If this initializes a field that is smaller than a
6334 word, at the start of a word, try to widen it to a full
6335 word. This special case allows us to output C++ member
6336 function initializations in a form that the optimizers
6338 if (WORD_REGISTER_OPERATIONS
6340 && bitsize
< BITS_PER_WORD
6341 && bitpos
% BITS_PER_WORD
== 0
6342 && GET_MODE_CLASS (mode
) == MODE_INT
6343 && TREE_CODE (value
) == INTEGER_CST
6345 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6347 tree type
= TREE_TYPE (value
);
6349 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6351 type
= lang_hooks
.types
.type_for_mode
6352 (word_mode
, TYPE_UNSIGNED (type
));
6353 value
= fold_convert (type
, value
);
6354 /* Make sure the bits beyond the original bitsize are zero
6355 so that we can correctly avoid extra zeroing stores in
6356 later constructor elements. */
6358 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6360 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6363 if (BYTES_BIG_ENDIAN
)
6365 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6366 build_int_cst (type
,
6367 BITS_PER_WORD
- bitsize
));
6368 bitsize
= BITS_PER_WORD
;
6372 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6373 && DECL_NONADDRESSABLE_P (field
))
6375 to_rtx
= copy_rtx (to_rtx
);
6376 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6379 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6380 0, bitregion_end
, mode
,
6382 get_alias_set (TREE_TYPE (field
)),
6390 unsigned HOST_WIDE_INT i
;
6393 tree elttype
= TREE_TYPE (type
);
6395 HOST_WIDE_INT minelt
= 0;
6396 HOST_WIDE_INT maxelt
= 0;
6398 /* The storage order is specified for every aggregate type. */
6399 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6401 domain
= TYPE_DOMAIN (type
);
6402 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6403 && TYPE_MAX_VALUE (domain
)
6404 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6405 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6407 /* If we have constant bounds for the range of the type, get them. */
6410 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6411 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6414 /* If the constructor has fewer elements than the array, clear
6415 the whole array first. Similarly if this is static
6416 constructor of a non-BLKmode object. */
6419 else if (REG_P (target
) && TREE_STATIC (exp
))
6423 unsigned HOST_WIDE_INT idx
;
6425 HOST_WIDE_INT count
= 0, zero_count
= 0;
6426 need_to_clear
= ! const_bounds_p
;
6428 /* This loop is a more accurate version of the loop in
6429 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6430 is also needed to check for missing elements. */
6431 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6433 HOST_WIDE_INT this_node_count
;
6438 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6440 tree lo_index
= TREE_OPERAND (index
, 0);
6441 tree hi_index
= TREE_OPERAND (index
, 1);
6443 if (! tree_fits_uhwi_p (lo_index
)
6444 || ! tree_fits_uhwi_p (hi_index
))
6450 this_node_count
= (tree_to_uhwi (hi_index
)
6451 - tree_to_uhwi (lo_index
) + 1);
6454 this_node_count
= 1;
6456 count
+= this_node_count
;
6457 if (mostly_zeros_p (value
))
6458 zero_count
+= this_node_count
;
6461 /* Clear the entire array first if there are any missing
6462 elements, or if the incidence of zero elements is >=
6465 && (count
< maxelt
- minelt
+ 1
6466 || 4 * zero_count
>= 3 * count
))
6470 if (need_to_clear
&& maybe_gt (size
, 0))
6473 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6475 clear_storage (target
, gen_int_mode (size
, Pmode
),
6480 if (!cleared
&& REG_P (target
))
6481 /* Inform later passes that the old value is dead. */
6482 emit_clobber (target
);
6484 /* Store each element of the constructor into the
6485 corresponding element of TARGET, determined by counting the
6487 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6491 HOST_WIDE_INT bitpos
;
6492 rtx xtarget
= target
;
6494 if (cleared
&& initializer_zerop (value
))
6497 mode
= TYPE_MODE (elttype
);
6498 if (mode
!= BLKmode
)
6499 bitsize
= GET_MODE_BITSIZE (mode
);
6500 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6503 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6505 tree lo_index
= TREE_OPERAND (index
, 0);
6506 tree hi_index
= TREE_OPERAND (index
, 1);
6507 rtx index_r
, pos_rtx
;
6508 HOST_WIDE_INT lo
, hi
, count
;
6511 /* If the range is constant and "small", unroll the loop. */
6513 && tree_fits_shwi_p (lo_index
)
6514 && tree_fits_shwi_p (hi_index
)
6515 && (lo
= tree_to_shwi (lo_index
),
6516 hi
= tree_to_shwi (hi_index
),
6517 count
= hi
- lo
+ 1,
6520 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6521 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6524 lo
-= minelt
; hi
-= minelt
;
6525 for (; lo
<= hi
; lo
++)
6527 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6530 && !MEM_KEEP_ALIAS_SET_P (target
)
6531 && TREE_CODE (type
) == ARRAY_TYPE
6532 && TYPE_NONALIASED_COMPONENT (type
))
6534 target
= copy_rtx (target
);
6535 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6538 store_constructor_field
6539 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6540 mode
, value
, cleared
,
6541 get_alias_set (elttype
), reverse
);
6546 rtx_code_label
*loop_start
= gen_label_rtx ();
6547 rtx_code_label
*loop_end
= gen_label_rtx ();
6550 expand_normal (hi_index
);
6552 index
= build_decl (EXPR_LOCATION (exp
),
6553 VAR_DECL
, NULL_TREE
, domain
);
6554 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6555 SET_DECL_RTL (index
, index_r
);
6556 store_expr (lo_index
, index_r
, 0, false, reverse
);
6558 /* Build the head of the loop. */
6559 do_pending_stack_adjust ();
6560 emit_label (loop_start
);
6562 /* Assign value to element index. */
6564 fold_convert (ssizetype
,
6565 fold_build2 (MINUS_EXPR
,
6568 TYPE_MIN_VALUE (domain
)));
6571 size_binop (MULT_EXPR
, position
,
6572 fold_convert (ssizetype
,
6573 TYPE_SIZE_UNIT (elttype
)));
6575 pos_rtx
= expand_normal (position
);
6576 xtarget
= offset_address (target
, pos_rtx
,
6577 highest_pow2_factor (position
));
6578 xtarget
= adjust_address (xtarget
, mode
, 0);
6579 if (TREE_CODE (value
) == CONSTRUCTOR
)
6580 store_constructor (value
, xtarget
, cleared
,
6581 exact_div (bitsize
, BITS_PER_UNIT
),
6584 store_expr (value
, xtarget
, 0, false, reverse
);
6586 /* Generate a conditional jump to exit the loop. */
6587 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6589 jumpif (exit_cond
, loop_end
,
6590 profile_probability::uninitialized ());
6592 /* Update the loop counter, and jump to the head of
6594 expand_assignment (index
,
6595 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6596 index
, integer_one_node
),
6599 emit_jump (loop_start
);
6601 /* Build the end of the loop. */
6602 emit_label (loop_end
);
6605 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6606 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6611 index
= ssize_int (1);
6614 index
= fold_convert (ssizetype
,
6615 fold_build2 (MINUS_EXPR
,
6618 TYPE_MIN_VALUE (domain
)));
6621 size_binop (MULT_EXPR
, index
,
6622 fold_convert (ssizetype
,
6623 TYPE_SIZE_UNIT (elttype
)));
6624 xtarget
= offset_address (target
,
6625 expand_normal (position
),
6626 highest_pow2_factor (position
));
6627 xtarget
= adjust_address (xtarget
, mode
, 0);
6628 store_expr (value
, xtarget
, 0, false, reverse
);
6633 bitpos
= ((tree_to_shwi (index
) - minelt
)
6634 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6636 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6638 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6639 && TREE_CODE (type
) == ARRAY_TYPE
6640 && TYPE_NONALIASED_COMPONENT (type
))
6642 target
= copy_rtx (target
);
6643 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6645 store_constructor_field (target
, bitsize
, bitpos
, 0,
6646 bitregion_end
, mode
, value
,
6647 cleared
, get_alias_set (elttype
),
6656 unsigned HOST_WIDE_INT idx
;
6657 constructor_elt
*ce
;
6660 insn_code icode
= CODE_FOR_nothing
;
6662 tree elttype
= TREE_TYPE (type
);
6663 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6664 machine_mode eltmode
= TYPE_MODE (elttype
);
6665 HOST_WIDE_INT bitsize
;
6666 HOST_WIDE_INT bitpos
;
6667 rtvec vector
= NULL
;
6669 unsigned HOST_WIDE_INT const_n_elts
;
6670 alias_set_type alias
;
6671 bool vec_vec_init_p
= false;
6672 machine_mode mode
= GET_MODE (target
);
6674 gcc_assert (eltmode
!= BLKmode
);
6676 /* Try using vec_duplicate_optab for uniform vectors. */
6677 if (!TREE_SIDE_EFFECTS (exp
)
6678 && VECTOR_MODE_P (mode
)
6679 && eltmode
== GET_MODE_INNER (mode
)
6680 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6681 != CODE_FOR_nothing
)
6682 && (elt
= uniform_vector_p (exp
)))
6684 struct expand_operand ops
[2];
6685 create_output_operand (&ops
[0], target
, mode
);
6686 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6687 expand_insn (icode
, 2, ops
);
6688 if (!rtx_equal_p (target
, ops
[0].value
))
6689 emit_move_insn (target
, ops
[0].value
);
6693 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6695 && VECTOR_MODE_P (mode
)
6696 && n_elts
.is_constant (&const_n_elts
))
6698 machine_mode emode
= eltmode
;
6700 if (CONSTRUCTOR_NELTS (exp
)
6701 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6704 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6705 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6706 * TYPE_VECTOR_SUBPARTS (etype
),
6708 emode
= TYPE_MODE (etype
);
6710 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6711 if (icode
!= CODE_FOR_nothing
)
6713 unsigned int i
, n
= const_n_elts
;
6715 if (emode
!= eltmode
)
6717 n
= CONSTRUCTOR_NELTS (exp
);
6718 vec_vec_init_p
= true;
6720 vector
= rtvec_alloc (n
);
6721 for (i
= 0; i
< n
; i
++)
6722 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6726 /* If the constructor has fewer elements than the vector,
6727 clear the whole array first. Similarly if this is static
6728 constructor of a non-BLKmode object. */
6731 else if (REG_P (target
) && TREE_STATIC (exp
))
6735 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6738 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6740 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6742 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6743 TYPE_SIZE (elttype
)));
6745 count
+= n_elts_here
;
6746 if (mostly_zeros_p (value
))
6747 zero_count
+= n_elts_here
;
6750 /* Clear the entire vector first if there are any missing elements,
6751 or if the incidence of zero elements is >= 75%. */
6752 need_to_clear
= (maybe_lt (count
, n_elts
)
6753 || 4 * zero_count
>= 3 * count
);
6756 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6759 emit_move_insn (target
, CONST0_RTX (mode
));
6761 clear_storage (target
, gen_int_mode (size
, Pmode
),
6766 /* Inform later passes that the old value is dead. */
6767 if (!cleared
&& !vector
&& REG_P (target
))
6768 emit_move_insn (target
, CONST0_RTX (mode
));
6771 alias
= MEM_ALIAS_SET (target
);
6773 alias
= get_alias_set (elttype
);
6775 /* Store each element of the constructor into the corresponding
6776 element of TARGET, determined by counting the elements. */
6777 for (idx
= 0, i
= 0;
6778 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6779 idx
++, i
+= bitsize
/ elt_size
)
6781 HOST_WIDE_INT eltpos
;
6782 tree value
= ce
->value
;
6784 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6785 if (cleared
&& initializer_zerop (value
))
6789 eltpos
= tree_to_uhwi (ce
->index
);
6797 gcc_assert (ce
->index
== NULL_TREE
);
6798 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6802 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6803 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6807 machine_mode value_mode
6808 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6809 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6810 bitpos
= eltpos
* elt_size
;
6811 store_constructor_field (target
, bitsize
, bitpos
, 0,
6812 bitregion_end
, value_mode
,
6813 value
, cleared
, alias
, reverse
);
6818 emit_insn (GEN_FCN (icode
) (target
,
6819 gen_rtx_PARALLEL (mode
, vector
)));
6828 /* Store the value of EXP (an expression tree)
6829 into a subfield of TARGET which has mode MODE and occupies
6830 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6831 If MODE is VOIDmode, it means that we are storing into a bit-field.
6833 BITREGION_START is bitpos of the first bitfield in this region.
6834 BITREGION_END is the bitpos of the ending bitfield in this region.
6835 These two fields are 0, if the C++ memory model does not apply,
6836 or we are not interested in keeping track of bitfield regions.
6838 Always return const0_rtx unless we have something particular to
6841 ALIAS_SET is the alias set for the destination. This value will
6842 (in general) be different from that for TARGET, since TARGET is a
6843 reference to the containing structure.
6845 If NONTEMPORAL is true, try generating a nontemporal store.
6847 If REVERSE is true, the store is to be done in reverse order. */
6850 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
6851 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
6852 machine_mode mode
, tree exp
,
6853 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6855 if (TREE_CODE (exp
) == ERROR_MARK
)
6858 /* If we have nothing to store, do nothing unless the expression has
6859 side-effects. Don't do that for zero sized addressable lhs of
6861 if (known_eq (bitsize
, 0)
6862 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6863 || TREE_CODE (exp
) != CALL_EXPR
))
6864 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6866 if (GET_CODE (target
) == CONCAT
)
6868 /* We're storing into a struct containing a single __complex. */
6870 gcc_assert (known_eq (bitpos
, 0));
6871 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6874 /* If the structure is in a register or if the component
6875 is a bit field, we cannot use addressing to access it.
6876 Use bit-field techniques or SUBREG to store in it. */
6878 poly_int64 decl_bitsize
;
6879 if (mode
== VOIDmode
6880 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6881 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6882 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6884 || GET_CODE (target
) == SUBREG
6885 /* If the field isn't aligned enough to store as an ordinary memref,
6886 store it as a bit field. */
6888 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6889 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
6890 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6891 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
6892 || (known_size_p (bitsize
)
6894 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
6895 /* If the RHS and field are a constant size and the size of the
6896 RHS isn't the same size as the bitfield, we must use bitfield
6898 || (known_size_p (bitsize
)
6899 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
6900 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
6902 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6903 we will handle specially below. */
6904 && !(TREE_CODE (exp
) == CONSTRUCTOR
6905 && multiple_p (bitsize
, BITS_PER_UNIT
))
6906 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6907 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6908 includes some extra padding. store_expr / expand_expr will in
6909 that case call get_inner_reference that will have the bitsize
6910 we check here and thus the block move will not clobber the
6911 padding that shouldn't be clobbered. In the future we could
6912 replace the TREE_ADDRESSABLE check with a check that
6913 get_base_address needs to live in memory. */
6914 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6915 || TREE_CODE (exp
) != COMPONENT_REF
6916 || !multiple_p (bitsize
, BITS_PER_UNIT
)
6917 || !multiple_p (bitpos
, BITS_PER_UNIT
)
6918 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
6920 || maybe_ne (decl_bitsize
, bitsize
)))
6921 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6922 decl we must use bitfield operations. */
6923 || (known_size_p (bitsize
)
6924 && TREE_CODE (exp
) == MEM_REF
6925 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6926 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6927 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6928 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6933 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6934 implies a mask operation. If the precision is the same size as
6935 the field we're storing into, that mask is redundant. This is
6936 particularly common with bit field assignments generated by the
6938 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6941 tree type
= TREE_TYPE (exp
);
6942 if (INTEGRAL_TYPE_P (type
)
6943 && maybe_ne (TYPE_PRECISION (type
),
6944 GET_MODE_BITSIZE (TYPE_MODE (type
)))
6945 && known_eq (bitsize
, TYPE_PRECISION (type
)))
6947 tree op
= gimple_assign_rhs1 (nop_def
);
6948 type
= TREE_TYPE (op
);
6949 if (INTEGRAL_TYPE_P (type
)
6950 && known_ge (TYPE_PRECISION (type
), bitsize
))
6955 temp
= expand_normal (exp
);
6957 /* We don't support variable-sized BLKmode bitfields, since our
6958 handling of BLKmode is bound up with the ability to break
6959 things into words. */
6960 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
6962 /* Handle calls that return values in multiple non-contiguous locations.
6963 The Irix 6 ABI has examples of this. */
6964 if (GET_CODE (temp
) == PARALLEL
)
6966 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6967 machine_mode temp_mode
= GET_MODE (temp
);
6968 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
6969 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
6970 rtx temp_target
= gen_reg_rtx (temp_mode
);
6971 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6975 /* Handle calls that return BLKmode values in registers. */
6976 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6978 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
6979 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
6983 /* If the value has aggregate type and an integral mode then, if BITSIZE
6984 is narrower than this mode and this is for big-endian data, we first
6985 need to put the value into the low-order bits for store_bit_field,
6986 except when MODE is BLKmode and BITSIZE larger than the word size
6987 (see the handling of fields larger than a word in store_bit_field).
6988 Moreover, the field may be not aligned on a byte boundary; in this
6989 case, if it has reverse storage order, it needs to be accessed as a
6990 scalar field with reverse storage order and we must first put the
6991 value into target order. */
6992 scalar_int_mode temp_mode
;
6993 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
6994 && is_int_mode (GET_MODE (temp
), &temp_mode
))
6996 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
6998 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7001 temp
= flip_storage_order (temp_mode
, temp
);
7003 gcc_checking_assert (known_le (bitsize
, size
));
7004 if (maybe_lt (bitsize
, size
)
7005 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7006 /* Use of to_constant for BLKmode was checked above. */
7007 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7008 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7009 size
- bitsize
, NULL_RTX
, 1);
7012 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7013 if (mode
!= VOIDmode
&& mode
!= BLKmode
7014 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7015 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7017 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7018 and BITPOS must be aligned on a byte boundary. If so, we simply do
7019 a block copy. Likewise for a BLKmode-like TARGET. */
7020 if (GET_MODE (temp
) == BLKmode
7021 && (GET_MODE (target
) == BLKmode
7023 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7024 && multiple_p (bitpos
, BITS_PER_UNIT
)
7025 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7027 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7028 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7029 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7031 target
= adjust_address (target
, VOIDmode
, bytepos
);
7032 emit_block_move (target
, temp
,
7033 gen_int_mode (bytesize
, Pmode
),
7039 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7040 word size, we need to load the value (see again store_bit_field). */
7041 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7043 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
7044 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7045 temp_mode
, false, NULL
);
7048 /* Store the value in the bitfield. */
7049 store_bit_field (target
, bitsize
, bitpos
,
7050 bitregion_start
, bitregion_end
,
7051 mode
, temp
, reverse
);
7057 /* Now build a reference to just the desired component. */
7058 rtx to_rtx
= adjust_address (target
, mode
,
7059 exact_div (bitpos
, BITS_PER_UNIT
));
7061 if (to_rtx
== target
)
7062 to_rtx
= copy_rtx (to_rtx
);
7064 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7065 set_mem_alias_set (to_rtx
, alias_set
);
7067 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7068 into a target smaller than its type; handle that case now. */
7069 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7071 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7072 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7076 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7080 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7081 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7082 codes and find the ultimate containing object, which we return.
7084 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7085 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7086 storage order of the field.
7087 If the position of the field is variable, we store a tree
7088 giving the variable offset (in units) in *POFFSET.
7089 This offset is in addition to the bit position.
7090 If the position is not variable, we store 0 in *POFFSET.
7092 If any of the extraction expressions is volatile,
7093 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7095 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7096 Otherwise, it is a mode that can be used to access the field.
7098 If the field describes a variable-sized object, *PMODE is set to
7099 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7100 this case, but the address of the object can be found. */
7103 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7104 poly_int64_pod
*pbitpos
, tree
*poffset
,
7105 machine_mode
*pmode
, int *punsignedp
,
7106 int *preversep
, int *pvolatilep
)
7109 machine_mode mode
= VOIDmode
;
7110 bool blkmode_bitfield
= false;
7111 tree offset
= size_zero_node
;
7112 poly_offset_int bit_offset
= 0;
7114 /* First get the mode, signedness, storage order and size. We do this from
7115 just the outermost expression. */
7117 if (TREE_CODE (exp
) == COMPONENT_REF
)
7119 tree field
= TREE_OPERAND (exp
, 1);
7120 size_tree
= DECL_SIZE (field
);
7121 if (flag_strict_volatile_bitfields
> 0
7122 && TREE_THIS_VOLATILE (exp
)
7123 && DECL_BIT_FIELD_TYPE (field
)
7124 && DECL_MODE (field
) != BLKmode
)
7125 /* Volatile bitfields should be accessed in the mode of the
7126 field's type, not the mode computed based on the bit
7128 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7129 else if (!DECL_BIT_FIELD (field
))
7131 mode
= DECL_MODE (field
);
7132 /* For vector fields re-check the target flags, as DECL_MODE
7133 could have been set with different target flags than
7134 the current function has. */
7136 && VECTOR_TYPE_P (TREE_TYPE (field
))
7137 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7138 mode
= TYPE_MODE (TREE_TYPE (field
));
7140 else if (DECL_MODE (field
) == BLKmode
)
7141 blkmode_bitfield
= true;
7143 *punsignedp
= DECL_UNSIGNED (field
);
7145 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7147 size_tree
= TREE_OPERAND (exp
, 1);
7148 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7149 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7151 /* For vector types, with the correct size of access, use the mode of
7153 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7154 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7155 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7156 mode
= TYPE_MODE (TREE_TYPE (exp
));
7160 mode
= TYPE_MODE (TREE_TYPE (exp
));
7161 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7163 if (mode
== BLKmode
)
7164 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7166 *pbitsize
= GET_MODE_BITSIZE (mode
);
7171 if (! tree_fits_uhwi_p (size_tree
))
7172 mode
= BLKmode
, *pbitsize
= -1;
7174 *pbitsize
= tree_to_uhwi (size_tree
);
7177 *preversep
= reverse_storage_order_for_component_p (exp
);
7179 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7180 and find the ultimate containing object. */
7183 switch (TREE_CODE (exp
))
7186 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7191 tree field
= TREE_OPERAND (exp
, 1);
7192 tree this_offset
= component_ref_field_offset (exp
);
7194 /* If this field hasn't been filled in yet, don't go past it.
7195 This should only happen when folding expressions made during
7196 type construction. */
7197 if (this_offset
== 0)
7200 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7201 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7203 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7208 case ARRAY_RANGE_REF
:
7210 tree index
= TREE_OPERAND (exp
, 1);
7211 tree low_bound
= array_ref_low_bound (exp
);
7212 tree unit_size
= array_ref_element_size (exp
);
7214 /* We assume all arrays have sizes that are a multiple of a byte.
7215 First subtract the lower bound, if any, in the type of the
7216 index, then convert to sizetype and multiply by the size of
7217 the array element. */
7218 if (! integer_zerop (low_bound
))
7219 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7222 offset
= size_binop (PLUS_EXPR
, offset
,
7223 size_binop (MULT_EXPR
,
7224 fold_convert (sizetype
, index
),
7233 bit_offset
+= *pbitsize
;
7236 case VIEW_CONVERT_EXPR
:
7240 /* Hand back the decl for MEM[&decl, off]. */
7241 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7243 tree off
= TREE_OPERAND (exp
, 1);
7244 if (!integer_zerop (off
))
7246 poly_offset_int boff
= mem_ref_offset (exp
);
7247 boff
<<= LOG2_BITS_PER_UNIT
;
7250 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7258 /* If any reference in the chain is volatile, the effect is volatile. */
7259 if (TREE_THIS_VOLATILE (exp
))
7262 exp
= TREE_OPERAND (exp
, 0);
7266 /* If OFFSET is constant, see if we can return the whole thing as a
7267 constant bit position. Make sure to handle overflow during
7269 if (poly_int_tree_p (offset
))
7271 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7272 TYPE_PRECISION (sizetype
));
7273 tem
<<= LOG2_BITS_PER_UNIT
;
7275 if (tem
.to_shwi (pbitpos
))
7276 *poffset
= offset
= NULL_TREE
;
7279 /* Otherwise, split it up. */
7282 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7283 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7285 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7286 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7287 offset
= size_binop (PLUS_EXPR
, offset
,
7288 build_int_cst (sizetype
, bytes
.force_shwi ()));
7294 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7295 if (mode
== VOIDmode
7297 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7298 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7306 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7308 static unsigned HOST_WIDE_INT
7309 target_align (const_tree target
)
7311 /* We might have a chain of nested references with intermediate misaligning
7312 bitfields components, so need to recurse to find out. */
7314 unsigned HOST_WIDE_INT this_align
, outer_align
;
7316 switch (TREE_CODE (target
))
7322 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7323 outer_align
= target_align (TREE_OPERAND (target
, 0));
7324 return MIN (this_align
, outer_align
);
7327 case ARRAY_RANGE_REF
:
7328 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7329 outer_align
= target_align (TREE_OPERAND (target
, 0));
7330 return MIN (this_align
, outer_align
);
7333 case NON_LVALUE_EXPR
:
7334 case VIEW_CONVERT_EXPR
:
7335 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7336 outer_align
= target_align (TREE_OPERAND (target
, 0));
7337 return MAX (this_align
, outer_align
);
7340 return TYPE_ALIGN (TREE_TYPE (target
));
7345 /* Given an rtx VALUE that may contain additions and multiplications, return
7346 an equivalent value that just refers to a register, memory, or constant.
7347 This is done by generating instructions to perform the arithmetic and
7348 returning a pseudo-register containing the value.
7350 The returned value may be a REG, SUBREG, MEM or constant. */
7353 force_operand (rtx value
, rtx target
)
7356 /* Use subtarget as the target for operand 0 of a binary operation. */
7357 rtx subtarget
= get_subtarget (target
);
7358 enum rtx_code code
= GET_CODE (value
);
7360 /* Check for subreg applied to an expression produced by loop optimizer. */
7362 && !REG_P (SUBREG_REG (value
))
7363 && !MEM_P (SUBREG_REG (value
)))
7366 = simplify_gen_subreg (GET_MODE (value
),
7367 force_reg (GET_MODE (SUBREG_REG (value
)),
7368 force_operand (SUBREG_REG (value
),
7370 GET_MODE (SUBREG_REG (value
)),
7371 SUBREG_BYTE (value
));
7372 code
= GET_CODE (value
);
7375 /* Check for a PIC address load. */
7376 if ((code
== PLUS
|| code
== MINUS
)
7377 && XEXP (value
, 0) == pic_offset_table_rtx
7378 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7379 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7380 || GET_CODE (XEXP (value
, 1)) == CONST
))
7383 subtarget
= gen_reg_rtx (GET_MODE (value
));
7384 emit_move_insn (subtarget
, value
);
7388 if (ARITHMETIC_P (value
))
7390 op2
= XEXP (value
, 1);
7391 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7393 if (code
== MINUS
&& CONST_INT_P (op2
))
7396 op2
= negate_rtx (GET_MODE (value
), op2
);
7399 /* Check for an addition with OP2 a constant integer and our first
7400 operand a PLUS of a virtual register and something else. In that
7401 case, we want to emit the sum of the virtual register and the
7402 constant first and then add the other value. This allows virtual
7403 register instantiation to simply modify the constant rather than
7404 creating another one around this addition. */
7405 if (code
== PLUS
&& CONST_INT_P (op2
)
7406 && GET_CODE (XEXP (value
, 0)) == PLUS
7407 && REG_P (XEXP (XEXP (value
, 0), 0))
7408 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7409 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7411 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7412 XEXP (XEXP (value
, 0), 0), op2
,
7413 subtarget
, 0, OPTAB_LIB_WIDEN
);
7414 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7415 force_operand (XEXP (XEXP (value
,
7417 target
, 0, OPTAB_LIB_WIDEN
);
7420 op1
= force_operand (XEXP (value
, 0), subtarget
);
7421 op2
= force_operand (op2
, NULL_RTX
);
7425 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7427 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7428 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7429 target
, 1, OPTAB_LIB_WIDEN
);
7431 return expand_divmod (0,
7432 FLOAT_MODE_P (GET_MODE (value
))
7433 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7434 GET_MODE (value
), op1
, op2
, target
, 0);
7436 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7439 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7442 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7445 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7446 target
, 0, OPTAB_LIB_WIDEN
);
7448 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7449 target
, 1, OPTAB_LIB_WIDEN
);
7452 if (UNARY_P (value
))
7455 target
= gen_reg_rtx (GET_MODE (value
));
7456 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7463 case FLOAT_TRUNCATE
:
7464 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7469 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7473 case UNSIGNED_FLOAT
:
7474 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7478 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7482 #ifdef INSN_SCHEDULING
7483 /* On machines that have insn scheduling, we want all memory reference to be
7484 explicit, so we need to deal with such paradoxical SUBREGs. */
7485 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7487 = simplify_gen_subreg (GET_MODE (value
),
7488 force_reg (GET_MODE (SUBREG_REG (value
)),
7489 force_operand (SUBREG_REG (value
),
7491 GET_MODE (SUBREG_REG (value
)),
7492 SUBREG_BYTE (value
));
7498 /* Subroutine of expand_expr: return nonzero iff there is no way that
7499 EXP can reference X, which is being modified. TOP_P is nonzero if this
7500 call is going to be used to determine whether we need a temporary
7501 for EXP, as opposed to a recursive call to this function.
7503 It is always safe for this routine to return zero since it merely
7504 searches for optimization opportunities. */
7507 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7513 /* If EXP has varying size, we MUST use a target since we currently
7514 have no way of allocating temporaries of variable size
7515 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7516 So we assume here that something at a higher level has prevented a
7517 clash. This is somewhat bogus, but the best we can do. Only
7518 do this when X is BLKmode and when we are at the top level. */
7519 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7520 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7521 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7522 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7523 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7525 && GET_MODE (x
) == BLKmode
)
7526 /* If X is in the outgoing argument area, it is always safe. */
7528 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7529 || (GET_CODE (XEXP (x
, 0)) == PLUS
7530 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7533 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7534 find the underlying pseudo. */
7535 if (GET_CODE (x
) == SUBREG
)
7538 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7542 /* Now look at our tree code and possibly recurse. */
7543 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7545 case tcc_declaration
:
7546 exp_rtl
= DECL_RTL_IF_SET (exp
);
7552 case tcc_exceptional
:
7553 if (TREE_CODE (exp
) == TREE_LIST
)
7557 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7559 exp
= TREE_CHAIN (exp
);
7562 if (TREE_CODE (exp
) != TREE_LIST
)
7563 return safe_from_p (x
, exp
, 0);
7566 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7568 constructor_elt
*ce
;
7569 unsigned HOST_WIDE_INT idx
;
7571 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7572 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7573 || !safe_from_p (x
, ce
->value
, 0))
7577 else if (TREE_CODE (exp
) == ERROR_MARK
)
7578 return 1; /* An already-visited SAVE_EXPR? */
7583 /* The only case we look at here is the DECL_INITIAL inside a
7585 return (TREE_CODE (exp
) != DECL_EXPR
7586 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7587 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7588 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7591 case tcc_comparison
:
7592 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7597 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7599 case tcc_expression
:
7602 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7603 the expression. If it is set, we conflict iff we are that rtx or
7604 both are in memory. Otherwise, we check all operands of the
7605 expression recursively. */
7607 switch (TREE_CODE (exp
))
7610 /* If the operand is static or we are static, we can't conflict.
7611 Likewise if we don't conflict with the operand at all. */
7612 if (staticp (TREE_OPERAND (exp
, 0))
7613 || TREE_STATIC (exp
)
7614 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7617 /* Otherwise, the only way this can conflict is if we are taking
7618 the address of a DECL a that address if part of X, which is
7620 exp
= TREE_OPERAND (exp
, 0);
7623 if (!DECL_RTL_SET_P (exp
)
7624 || !MEM_P (DECL_RTL (exp
)))
7627 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7633 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7634 get_alias_set (exp
)))
7639 /* Assume that the call will clobber all hard registers and
7641 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7646 case WITH_CLEANUP_EXPR
:
7647 case CLEANUP_POINT_EXPR
:
7648 /* Lowered by gimplify.c. */
7652 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7658 /* If we have an rtx, we do not need to scan our operands. */
7662 nops
= TREE_OPERAND_LENGTH (exp
);
7663 for (i
= 0; i
< nops
; i
++)
7664 if (TREE_OPERAND (exp
, i
) != 0
7665 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7671 /* Should never get a type here. */
7675 /* If we have an rtl, find any enclosed object. Then see if we conflict
7679 if (GET_CODE (exp_rtl
) == SUBREG
)
7681 exp_rtl
= SUBREG_REG (exp_rtl
);
7683 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7687 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7688 are memory and they conflict. */
7689 return ! (rtx_equal_p (x
, exp_rtl
)
7690 || (MEM_P (x
) && MEM_P (exp_rtl
)
7691 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7694 /* If we reach here, it is safe. */
7699 /* Return the highest power of two that EXP is known to be a multiple of.
7700 This is used in updating alignment of MEMs in array references. */
7702 unsigned HOST_WIDE_INT
7703 highest_pow2_factor (const_tree exp
)
7705 unsigned HOST_WIDE_INT ret
;
7706 int trailing_zeros
= tree_ctz (exp
);
7707 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7708 return BIGGEST_ALIGNMENT
;
7709 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7710 if (ret
> BIGGEST_ALIGNMENT
)
7711 return BIGGEST_ALIGNMENT
;
7715 /* Similar, except that the alignment requirements of TARGET are
7716 taken into account. Assume it is at least as aligned as its
7717 type, unless it is a COMPONENT_REF in which case the layout of
7718 the structure gives the alignment. */
7720 static unsigned HOST_WIDE_INT
7721 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7723 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7724 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7726 return MAX (factor
, talign
);
7729 /* Convert the tree comparison code TCODE to the rtl one where the
7730 signedness is UNSIGNEDP. */
7732 static enum rtx_code
7733 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7745 code
= unsignedp
? LTU
: LT
;
7748 code
= unsignedp
? LEU
: LE
;
7751 code
= unsignedp
? GTU
: GT
;
7754 code
= unsignedp
? GEU
: GE
;
7756 case UNORDERED_EXPR
:
7787 /* Subroutine of expand_expr. Expand the two operands of a binary
7788 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7789 The value may be stored in TARGET if TARGET is nonzero. The
7790 MODIFIER argument is as documented by expand_expr. */
7793 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7794 enum expand_modifier modifier
)
7796 if (! safe_from_p (target
, exp1
, 1))
7798 if (operand_equal_p (exp0
, exp1
, 0))
7800 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7801 *op1
= copy_rtx (*op0
);
7805 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7806 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7811 /* Return a MEM that contains constant EXP. DEFER is as for
7812 output_constant_def and MODIFIER is as for expand_expr. */
7815 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7819 mem
= output_constant_def (exp
, defer
);
7820 if (modifier
!= EXPAND_INITIALIZER
)
7821 mem
= use_anchored_address (mem
);
7825 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7826 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7829 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7830 enum expand_modifier modifier
, addr_space_t as
)
7832 rtx result
, subtarget
;
7834 poly_int64 bitsize
, bitpos
;
7835 int unsignedp
, reversep
, volatilep
= 0;
7838 /* If we are taking the address of a constant and are at the top level,
7839 we have to use output_constant_def since we can't call force_const_mem
7841 /* ??? This should be considered a front-end bug. We should not be
7842 generating ADDR_EXPR of something that isn't an LVALUE. The only
7843 exception here is STRING_CST. */
7844 if (CONSTANT_CLASS_P (exp
))
7846 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7847 if (modifier
< EXPAND_SUM
)
7848 result
= force_operand (result
, target
);
7852 /* Everything must be something allowed by is_gimple_addressable. */
7853 switch (TREE_CODE (exp
))
7856 /* This case will happen via recursion for &a->b. */
7857 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7861 tree tem
= TREE_OPERAND (exp
, 0);
7862 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7863 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7864 return expand_expr (tem
, target
, tmode
, modifier
);
7867 case TARGET_MEM_REF
:
7868 return addr_for_mem_ref (exp
, as
, true);
7871 /* Expand the initializer like constants above. */
7872 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7874 if (modifier
< EXPAND_SUM
)
7875 result
= force_operand (result
, target
);
7879 /* The real part of the complex number is always first, therefore
7880 the address is the same as the address of the parent object. */
7883 inner
= TREE_OPERAND (exp
, 0);
7887 /* The imaginary part of the complex number is always second.
7888 The expression is therefore always offset by the size of the
7891 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7892 inner
= TREE_OPERAND (exp
, 0);
7895 case COMPOUND_LITERAL_EXPR
:
7896 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7897 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7898 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7899 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7900 the initializers aren't gimplified. */
7901 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7902 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7903 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7904 target
, tmode
, modifier
, as
);
7907 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7908 expand_expr, as that can have various side effects; LABEL_DECLs for
7909 example, may not have their DECL_RTL set yet. Expand the rtl of
7910 CONSTRUCTORs too, which should yield a memory reference for the
7911 constructor's contents. Assume language specific tree nodes can
7912 be expanded in some interesting way. */
7913 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7915 || TREE_CODE (exp
) == CONSTRUCTOR
7916 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7918 result
= expand_expr (exp
, target
, tmode
,
7919 modifier
== EXPAND_INITIALIZER
7920 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7922 /* If the DECL isn't in memory, then the DECL wasn't properly
7923 marked TREE_ADDRESSABLE, which will be either a front-end
7924 or a tree optimizer bug. */
7926 gcc_assert (MEM_P (result
));
7927 result
= XEXP (result
, 0);
7929 /* ??? Is this needed anymore? */
7931 TREE_USED (exp
) = 1;
7933 if (modifier
!= EXPAND_INITIALIZER
7934 && modifier
!= EXPAND_CONST_ADDRESS
7935 && modifier
!= EXPAND_SUM
)
7936 result
= force_operand (result
, target
);
7940 /* Pass FALSE as the last argument to get_inner_reference although
7941 we are expanding to RTL. The rationale is that we know how to
7942 handle "aligning nodes" here: we can just bypass them because
7943 they won't change the final object whose address will be returned
7944 (they actually exist only for that purpose). */
7945 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
7946 &unsignedp
, &reversep
, &volatilep
);
7950 /* We must have made progress. */
7951 gcc_assert (inner
!= exp
);
7953 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
7954 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7955 inner alignment, force the inner to be sufficiently aligned. */
7956 if (CONSTANT_CLASS_P (inner
)
7957 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7959 inner
= copy_node (inner
);
7960 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7961 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
7962 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7964 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7970 if (modifier
!= EXPAND_NORMAL
)
7971 result
= force_operand (result
, NULL
);
7972 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7973 modifier
== EXPAND_INITIALIZER
7974 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
7976 /* expand_expr is allowed to return an object in a mode other
7977 than TMODE. If it did, we need to convert. */
7978 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
7979 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
7980 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
7981 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7982 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
7984 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
7985 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
7988 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
7989 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
7990 1, OPTAB_LIB_WIDEN
);
7994 if (maybe_ne (bitpos
, 0))
7996 /* Someone beforehand should have rejected taking the address
7997 of an object that isn't byte-aligned. */
7998 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7999 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8000 result
= plus_constant (tmode
, result
, bytepos
);
8001 if (modifier
< EXPAND_SUM
)
8002 result
= force_operand (result
, target
);
8008 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8009 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8012 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8013 enum expand_modifier modifier
)
8015 addr_space_t as
= ADDR_SPACE_GENERIC
;
8016 scalar_int_mode address_mode
= Pmode
;
8017 scalar_int_mode pointer_mode
= ptr_mode
;
8021 /* Target mode of VOIDmode says "whatever's natural". */
8022 if (tmode
== VOIDmode
)
8023 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8025 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8027 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8028 address_mode
= targetm
.addr_space
.address_mode (as
);
8029 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8032 /* We can get called with some Weird Things if the user does silliness
8033 like "(short) &a". In that case, convert_memory_address won't do
8034 the right thing, so ignore the given target mode. */
8035 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8039 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8040 new_tmode
, modifier
, as
);
8042 /* Despite expand_expr claims concerning ignoring TMODE when not
8043 strictly convenient, stuff breaks if we don't honor it. Note
8044 that combined with the above, we only do this for pointer modes. */
8045 rmode
= GET_MODE (result
);
8046 if (rmode
== VOIDmode
)
8048 if (rmode
!= new_tmode
)
8049 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8054 /* Generate code for computing CONSTRUCTOR EXP.
8055 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8056 is TRUE, instead of creating a temporary variable in memory
8057 NULL is returned and the caller needs to handle it differently. */
8060 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8061 bool avoid_temp_mem
)
8063 tree type
= TREE_TYPE (exp
);
8064 machine_mode mode
= TYPE_MODE (type
);
8066 /* Try to avoid creating a temporary at all. This is possible
8067 if all of the initializer is zero.
8068 FIXME: try to handle all [0..255] initializers we can handle
8070 if (TREE_STATIC (exp
)
8071 && !TREE_ADDRESSABLE (exp
)
8072 && target
!= 0 && mode
== BLKmode
8073 && all_zeros_p (exp
))
8075 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8079 /* All elts simple constants => refer to a constant in memory. But
8080 if this is a non-BLKmode mode, let it store a field at a time
8081 since that should make a CONST_INT, CONST_WIDE_INT or
8082 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8083 use, it is best to store directly into the target unless the type
8084 is large enough that memcpy will be used. If we are making an
8085 initializer and all operands are constant, put it in memory as
8088 FIXME: Avoid trying to fill vector constructors piece-meal.
8089 Output them with output_constant_def below unless we're sure
8090 they're zeros. This should go away when vector initializers
8091 are treated like VECTOR_CST instead of arrays. */
8092 if ((TREE_STATIC (exp
)
8093 && ((mode
== BLKmode
8094 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8095 || TREE_ADDRESSABLE (exp
)
8096 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8097 && (! can_move_by_pieces
8098 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8100 && ! mostly_zeros_p (exp
))))
8101 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8102 && TREE_CONSTANT (exp
)))
8109 constructor
= expand_expr_constant (exp
, 1, modifier
);
8111 if (modifier
!= EXPAND_CONST_ADDRESS
8112 && modifier
!= EXPAND_INITIALIZER
8113 && modifier
!= EXPAND_SUM
)
8114 constructor
= validize_mem (constructor
);
8119 /* Handle calls that pass values in multiple non-contiguous
8120 locations. The Irix 6 ABI has examples of this. */
8121 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8122 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8127 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8130 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8135 /* expand_expr: generate code for computing expression EXP.
8136 An rtx for the computed value is returned. The value is never null.
8137 In the case of a void EXP, const0_rtx is returned.
8139 The value may be stored in TARGET if TARGET is nonzero.
8140 TARGET is just a suggestion; callers must assume that
8141 the rtx returned may not be the same as TARGET.
8143 If TARGET is CONST0_RTX, it means that the value will be ignored.
8145 If TMODE is not VOIDmode, it suggests generating the
8146 result in mode TMODE. But this is done only when convenient.
8147 Otherwise, TMODE is ignored and the value generated in its natural mode.
8148 TMODE is just a suggestion; callers must assume that
8149 the rtx returned may not have mode TMODE.
8151 Note that TARGET may have neither TMODE nor MODE. In that case, it
8152 probably will not be used.
8154 If MODIFIER is EXPAND_SUM then when EXP is an addition
8155 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8156 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8157 products as above, or REG or MEM, or constant.
8158 Ordinarily in such cases we would output mul or add instructions
8159 and then return a pseudo reg containing the sum.
8161 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8162 it also marks a label as absolutely required (it can't be dead).
8163 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8164 This is used for outputting expressions used in initializers.
8166 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8167 with a constant address even if that address is not normally legitimate.
8168 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8170 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8171 a call parameter. Such targets require special care as we haven't yet
8172 marked TARGET so that it's safe from being trashed by libcalls. We
8173 don't want to use TARGET for anything but the final result;
8174 Intermediate values must go elsewhere. Additionally, calls to
8175 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8177 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8178 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8179 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8180 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8183 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8184 In this case, we don't adjust a returned MEM rtx that wouldn't be
8185 sufficiently aligned for its mode; instead, it's up to the caller
8186 to deal with it afterwards. This is used to make sure that unaligned
8187 base objects for which out-of-bounds accesses are supported, for
8188 example record types with trailing arrays, aren't realigned behind
8189 the back of the caller.
8190 The normal operating mode is to pass FALSE for this parameter. */
8193 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8194 enum expand_modifier modifier
, rtx
*alt_rtl
,
8195 bool inner_reference_p
)
8199 /* Handle ERROR_MARK before anybody tries to access its type. */
8200 if (TREE_CODE (exp
) == ERROR_MARK
8201 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8203 ret
= CONST0_RTX (tmode
);
8204 return ret
? ret
: const0_rtx
;
8207 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8212 /* Try to expand the conditional expression which is represented by
8213 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8214 return the rtl reg which represents the result. Otherwise return
8218 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8219 tree treeop1 ATTRIBUTE_UNUSED
,
8220 tree treeop2 ATTRIBUTE_UNUSED
)
8223 rtx op00
, op01
, op1
, op2
;
8224 enum rtx_code comparison_code
;
8225 machine_mode comparison_mode
;
8228 tree type
= TREE_TYPE (treeop1
);
8229 int unsignedp
= TYPE_UNSIGNED (type
);
8230 machine_mode mode
= TYPE_MODE (type
);
8231 machine_mode orig_mode
= mode
;
8232 static bool expanding_cond_expr_using_cmove
= false;
8234 /* Conditional move expansion can end up TERing two operands which,
8235 when recursively hitting conditional expressions can result in
8236 exponential behavior if the cmove expansion ultimatively fails.
8237 It's hardly profitable to TER a cmove into a cmove so avoid doing
8238 that by failing early if we end up recursing. */
8239 if (expanding_cond_expr_using_cmove
)
8242 /* If we cannot do a conditional move on the mode, try doing it
8243 with the promoted mode. */
8244 if (!can_conditionally_move_p (mode
))
8246 mode
= promote_mode (type
, mode
, &unsignedp
);
8247 if (!can_conditionally_move_p (mode
))
8249 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8252 temp
= assign_temp (type
, 0, 1);
8254 expanding_cond_expr_using_cmove
= true;
8256 expand_operands (treeop1
, treeop2
,
8257 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8259 if (TREE_CODE (treeop0
) == SSA_NAME
8260 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8262 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8263 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8264 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8265 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8266 comparison_mode
= TYPE_MODE (type
);
8267 unsignedp
= TYPE_UNSIGNED (type
);
8268 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8270 else if (COMPARISON_CLASS_P (treeop0
))
8272 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8273 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8274 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8275 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8276 unsignedp
= TYPE_UNSIGNED (type
);
8277 comparison_mode
= TYPE_MODE (type
);
8278 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8282 op00
= expand_normal (treeop0
);
8284 comparison_code
= NE
;
8285 comparison_mode
= GET_MODE (op00
);
8286 if (comparison_mode
== VOIDmode
)
8287 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8289 expanding_cond_expr_using_cmove
= false;
8291 if (GET_MODE (op1
) != mode
)
8292 op1
= gen_lowpart (mode
, op1
);
8294 if (GET_MODE (op2
) != mode
)
8295 op2
= gen_lowpart (mode
, op2
);
8297 /* Try to emit the conditional move. */
8298 insn
= emit_conditional_move (temp
, comparison_code
,
8299 op00
, op01
, comparison_mode
,
8303 /* If we could do the conditional move, emit the sequence,
8307 rtx_insn
*seq
= get_insns ();
8310 return convert_modes (orig_mode
, mode
, temp
, 0);
8313 /* Otherwise discard the sequence and fall back to code with
8320 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8321 enum expand_modifier modifier
)
8323 rtx op0
, op1
, op2
, temp
;
8324 rtx_code_label
*lab
;
8328 scalar_int_mode int_mode
;
8329 enum tree_code code
= ops
->code
;
8331 rtx subtarget
, original_target
;
8333 bool reduce_bit_field
;
8334 location_t loc
= ops
->location
;
8335 tree treeop0
, treeop1
, treeop2
;
8336 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8337 ? reduce_to_bit_field_precision ((expr), \
8343 mode
= TYPE_MODE (type
);
8344 unsignedp
= TYPE_UNSIGNED (type
);
8350 /* We should be called only on simple (binary or unary) expressions,
8351 exactly those that are valid in gimple expressions that aren't
8352 GIMPLE_SINGLE_RHS (or invalid). */
8353 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8354 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8355 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8357 ignore
= (target
== const0_rtx
8358 || ((CONVERT_EXPR_CODE_P (code
)
8359 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8360 && TREE_CODE (type
) == VOID_TYPE
));
8362 /* We should be called only if we need the result. */
8363 gcc_assert (!ignore
);
8365 /* An operation in what may be a bit-field type needs the
8366 result to be reduced to the precision of the bit-field type,
8367 which is narrower than that of the type's mode. */
8368 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8369 && !type_has_mode_precision_p (type
));
8371 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8374 /* Use subtarget as the target for operand 0 of a binary operation. */
8375 subtarget
= get_subtarget (target
);
8376 original_target
= target
;
8380 case NON_LVALUE_EXPR
:
8383 if (treeop0
== error_mark_node
)
8386 if (TREE_CODE (type
) == UNION_TYPE
)
8388 tree valtype
= TREE_TYPE (treeop0
);
8390 /* If both input and output are BLKmode, this conversion isn't doing
8391 anything except possibly changing memory attribute. */
8392 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8394 rtx result
= expand_expr (treeop0
, target
, tmode
,
8397 result
= copy_rtx (result
);
8398 set_mem_attributes (result
, type
, 0);
8404 if (TYPE_MODE (type
) != BLKmode
)
8405 target
= gen_reg_rtx (TYPE_MODE (type
));
8407 target
= assign_temp (type
, 1, 1);
8411 /* Store data into beginning of memory target. */
8412 store_expr (treeop0
,
8413 adjust_address (target
, TYPE_MODE (valtype
), 0),
8414 modifier
== EXPAND_STACK_PARM
,
8415 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8419 gcc_assert (REG_P (target
)
8420 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8422 /* Store this field into a union of the proper type. */
8423 poly_uint64 op0_size
8424 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8425 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8426 store_field (target
,
8427 /* The conversion must be constructed so that
8428 we know at compile time how many bits
8430 ordered_min (op0_size
, union_size
),
8431 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8435 /* Return the entire union. */
8439 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8441 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8444 /* If the signedness of the conversion differs and OP0 is
8445 a promoted SUBREG, clear that indication since we now
8446 have to do the proper extension. */
8447 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8448 && GET_CODE (op0
) == SUBREG
)
8449 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8451 return REDUCE_BIT_FIELD (op0
);
8454 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8455 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8456 if (GET_MODE (op0
) == mode
)
8459 /* If OP0 is a constant, just convert it into the proper mode. */
8460 else if (CONSTANT_P (op0
))
8462 tree inner_type
= TREE_TYPE (treeop0
);
8463 machine_mode inner_mode
= GET_MODE (op0
);
8465 if (inner_mode
== VOIDmode
)
8466 inner_mode
= TYPE_MODE (inner_type
);
8468 if (modifier
== EXPAND_INITIALIZER
)
8469 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8471 op0
= convert_modes (mode
, inner_mode
, op0
,
8472 TYPE_UNSIGNED (inner_type
));
8475 else if (modifier
== EXPAND_INITIALIZER
)
8476 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8477 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8479 else if (target
== 0)
8480 op0
= convert_to_mode (mode
, op0
,
8481 TYPE_UNSIGNED (TREE_TYPE
8485 convert_move (target
, op0
,
8486 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8490 return REDUCE_BIT_FIELD (op0
);
8492 case ADDR_SPACE_CONVERT_EXPR
:
8494 tree treeop0_type
= TREE_TYPE (treeop0
);
8496 gcc_assert (POINTER_TYPE_P (type
));
8497 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8499 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8500 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8502 /* Conversions between pointers to the same address space should
8503 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8504 gcc_assert (as_to
!= as_from
);
8506 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8508 /* Ask target code to handle conversion between pointers
8509 to overlapping address spaces. */
8510 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8511 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8513 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8517 /* For disjoint address spaces, converting anything but a null
8518 pointer invokes undefined behavior. We truncate or extend the
8519 value as if we'd converted via integers, which handles 0 as
8520 required, and all others as the programmer likely expects. */
8521 #ifndef POINTERS_EXTEND_UNSIGNED
8522 const int POINTERS_EXTEND_UNSIGNED
= 1;
8524 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8525 op0
, POINTERS_EXTEND_UNSIGNED
);
8531 case POINTER_PLUS_EXPR
:
8532 /* Even though the sizetype mode and the pointer's mode can be different
8533 expand is able to handle this correctly and get the correct result out
8534 of the PLUS_EXPR code. */
8535 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8536 if sizetype precision is smaller than pointer precision. */
8537 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8538 treeop1
= fold_convert_loc (loc
, type
,
8539 fold_convert_loc (loc
, ssizetype
,
8541 /* If sizetype precision is larger than pointer precision, truncate the
8542 offset to have matching modes. */
8543 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8544 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8548 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8549 something else, make sure we add the register to the constant and
8550 then to the other thing. This case can occur during strength
8551 reduction and doing it this way will produce better code if the
8552 frame pointer or argument pointer is eliminated.
8554 fold-const.c will ensure that the constant is always in the inner
8555 PLUS_EXPR, so the only case we need to do anything about is if
8556 sp, ap, or fp is our second argument, in which case we must swap
8557 the innermost first argument and our second argument. */
8559 if (TREE_CODE (treeop0
) == PLUS_EXPR
8560 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8562 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8563 || DECL_RTL (treeop1
) == stack_pointer_rtx
8564 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8569 /* If the result is to be ptr_mode and we are adding an integer to
8570 something, we might be forming a constant. So try to use
8571 plus_constant. If it produces a sum and we can't accept it,
8572 use force_operand. This allows P = &ARR[const] to generate
8573 efficient code on machines where a SYMBOL_REF is not a valid
8576 If this is an EXPAND_SUM call, always return the sum. */
8577 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8578 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8580 if (modifier
== EXPAND_STACK_PARM
)
8582 if (TREE_CODE (treeop0
) == INTEGER_CST
8583 && HWI_COMPUTABLE_MODE_P (mode
)
8584 && TREE_CONSTANT (treeop1
))
8588 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8590 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8592 /* Use wi::shwi to ensure that the constant is
8593 truncated according to the mode of OP1, then sign extended
8594 to a HOST_WIDE_INT. Using the constant directly can result
8595 in non-canonical RTL in a 64x32 cross compile. */
8596 wc
= TREE_INT_CST_LOW (treeop0
);
8598 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8599 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8600 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8601 op1
= force_operand (op1
, target
);
8602 return REDUCE_BIT_FIELD (op1
);
8605 else if (TREE_CODE (treeop1
) == INTEGER_CST
8606 && HWI_COMPUTABLE_MODE_P (mode
)
8607 && TREE_CONSTANT (treeop0
))
8611 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8613 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8614 (modifier
== EXPAND_INITIALIZER
8615 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8616 if (! CONSTANT_P (op0
))
8618 op1
= expand_expr (treeop1
, NULL_RTX
,
8619 VOIDmode
, modifier
);
8620 /* Return a PLUS if modifier says it's OK. */
8621 if (modifier
== EXPAND_SUM
8622 || modifier
== EXPAND_INITIALIZER
)
8623 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8626 /* Use wi::shwi to ensure that the constant is
8627 truncated according to the mode of OP1, then sign extended
8628 to a HOST_WIDE_INT. Using the constant directly can result
8629 in non-canonical RTL in a 64x32 cross compile. */
8630 wc
= TREE_INT_CST_LOW (treeop1
);
8632 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8633 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8634 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8635 op0
= force_operand (op0
, target
);
8636 return REDUCE_BIT_FIELD (op0
);
8640 /* Use TER to expand pointer addition of a negated value
8641 as pointer subtraction. */
8642 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8643 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8644 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8645 && TREE_CODE (treeop1
) == SSA_NAME
8646 && TYPE_MODE (TREE_TYPE (treeop0
))
8647 == TYPE_MODE (TREE_TYPE (treeop1
)))
8649 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8652 treeop1
= gimple_assign_rhs1 (def
);
8658 /* No sense saving up arithmetic to be done
8659 if it's all in the wrong mode to form part of an address.
8660 And force_operand won't know whether to sign-extend or
8662 if (modifier
!= EXPAND_INITIALIZER
8663 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8665 expand_operands (treeop0
, treeop1
,
8666 subtarget
, &op0
, &op1
, modifier
);
8667 if (op0
== const0_rtx
)
8669 if (op1
== const0_rtx
)
8674 expand_operands (treeop0
, treeop1
,
8675 subtarget
, &op0
, &op1
, modifier
);
8676 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8679 case POINTER_DIFF_EXPR
:
8681 /* For initializers, we are allowed to return a MINUS of two
8682 symbolic constants. Here we handle all cases when both operands
8684 /* Handle difference of two symbolic constants,
8685 for the sake of an initializer. */
8686 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8687 && really_constant_p (treeop0
)
8688 && really_constant_p (treeop1
))
8690 expand_operands (treeop0
, treeop1
,
8691 NULL_RTX
, &op0
, &op1
, modifier
);
8692 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8695 /* No sense saving up arithmetic to be done
8696 if it's all in the wrong mode to form part of an address.
8697 And force_operand won't know whether to sign-extend or
8699 if (modifier
!= EXPAND_INITIALIZER
8700 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8703 expand_operands (treeop0
, treeop1
,
8704 subtarget
, &op0
, &op1
, modifier
);
8706 /* Convert A - const to A + (-const). */
8707 if (CONST_INT_P (op1
))
8709 op1
= negate_rtx (mode
, op1
);
8710 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8715 case WIDEN_MULT_PLUS_EXPR
:
8716 case WIDEN_MULT_MINUS_EXPR
:
8717 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8718 op2
= expand_normal (treeop2
);
8719 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8723 case WIDEN_MULT_EXPR
:
8724 /* If first operand is constant, swap them.
8725 Thus the following special case checks need only
8726 check the second operand. */
8727 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8728 std::swap (treeop0
, treeop1
);
8730 /* First, check if we have a multiplication of one signed and one
8731 unsigned operand. */
8732 if (TREE_CODE (treeop1
) != INTEGER_CST
8733 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8734 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8736 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8737 this_optab
= usmul_widen_optab
;
8738 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8739 != CODE_FOR_nothing
)
8741 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8742 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8745 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8747 /* op0 and op1 might still be constant, despite the above
8748 != INTEGER_CST check. Handle it. */
8749 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8751 op0
= convert_modes (innermode
, mode
, op0
, true);
8752 op1
= convert_modes (innermode
, mode
, op1
, false);
8753 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8754 target
, unsignedp
));
8759 /* Check for a multiplication with matching signedness. */
8760 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8761 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8762 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8763 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8765 tree op0type
= TREE_TYPE (treeop0
);
8766 machine_mode innermode
= TYPE_MODE (op0type
);
8767 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8768 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8769 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8771 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8773 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8774 != CODE_FOR_nothing
)
8776 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8778 /* op0 and op1 might still be constant, despite the above
8779 != INTEGER_CST check. Handle it. */
8780 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8783 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8785 = convert_modes (innermode
, mode
, op1
,
8786 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8787 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8791 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8792 unsignedp
, this_optab
);
8793 return REDUCE_BIT_FIELD (temp
);
8795 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8797 && innermode
== word_mode
)
8800 op0
= expand_normal (treeop0
);
8801 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8802 op1
= convert_modes (word_mode
, mode
,
8803 expand_normal (treeop1
),
8804 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8806 op1
= expand_normal (treeop1
);
8807 /* op0 and op1 might still be constant, despite the above
8808 != INTEGER_CST check. Handle it. */
8809 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8810 goto widen_mult_const
;
8811 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8812 unsignedp
, OPTAB_LIB_WIDEN
);
8813 hipart
= gen_highpart (word_mode
, temp
);
8814 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8818 emit_move_insn (hipart
, htem
);
8819 return REDUCE_BIT_FIELD (temp
);
8823 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8824 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8825 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8826 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8829 /* If this is a fixed-point operation, then we cannot use the code
8830 below because "expand_mult" doesn't support sat/no-sat fixed-point
8832 if (ALL_FIXED_POINT_MODE_P (mode
))
8835 /* If first operand is constant, swap them.
8836 Thus the following special case checks need only
8837 check the second operand. */
8838 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8839 std::swap (treeop0
, treeop1
);
8841 /* Attempt to return something suitable for generating an
8842 indexed address, for machines that support that. */
8844 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8845 && tree_fits_shwi_p (treeop1
))
8847 tree exp1
= treeop1
;
8849 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8853 op0
= force_operand (op0
, NULL_RTX
);
8855 op0
= copy_to_mode_reg (mode
, op0
);
8857 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8858 gen_int_mode (tree_to_shwi (exp1
),
8859 TYPE_MODE (TREE_TYPE (exp1
)))));
8862 if (modifier
== EXPAND_STACK_PARM
)
8865 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8866 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8868 case TRUNC_MOD_EXPR
:
8869 case FLOOR_MOD_EXPR
:
8871 case ROUND_MOD_EXPR
:
8873 case TRUNC_DIV_EXPR
:
8874 case FLOOR_DIV_EXPR
:
8876 case ROUND_DIV_EXPR
:
8877 case EXACT_DIV_EXPR
:
8879 /* If this is a fixed-point operation, then we cannot use the code
8880 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8882 if (ALL_FIXED_POINT_MODE_P (mode
))
8885 if (modifier
== EXPAND_STACK_PARM
)
8887 /* Possible optimization: compute the dividend with EXPAND_SUM
8888 then if the divisor is constant can optimize the case
8889 where some terms of the dividend have coeffs divisible by it. */
8890 expand_operands (treeop0
, treeop1
,
8891 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8892 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8893 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8894 if (SCALAR_INT_MODE_P (mode
)
8896 && get_range_pos_neg (treeop0
) == 1
8897 && get_range_pos_neg (treeop1
) == 1)
8899 /* If both arguments are known to be positive when interpreted
8900 as signed, we can expand it as both signed and unsigned
8901 division or modulo. Choose the cheaper sequence in that case. */
8902 bool speed_p
= optimize_insn_for_speed_p ();
8903 do_pending_stack_adjust ();
8905 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8906 rtx_insn
*uns_insns
= get_insns ();
8909 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8910 rtx_insn
*sgn_insns
= get_insns ();
8912 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8913 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8915 /* If costs are the same then use as tie breaker the other
8917 if (uns_cost
== sgn_cost
)
8919 uns_cost
= seq_cost (uns_insns
, !speed_p
);
8920 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
8923 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
8925 emit_insn (uns_insns
);
8928 emit_insn (sgn_insns
);
8931 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
8936 case MULT_HIGHPART_EXPR
:
8937 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8938 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
8942 case FIXED_CONVERT_EXPR
:
8943 op0
= expand_normal (treeop0
);
8944 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8945 target
= gen_reg_rtx (mode
);
8947 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
8948 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8949 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
8950 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
8952 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
8955 case FIX_TRUNC_EXPR
:
8956 op0
= expand_normal (treeop0
);
8957 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8958 target
= gen_reg_rtx (mode
);
8959 expand_fix (target
, op0
, unsignedp
);
8963 op0
= expand_normal (treeop0
);
8964 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8965 target
= gen_reg_rtx (mode
);
8966 /* expand_float can't figure out what to do if FROM has VOIDmode.
8967 So give it the correct mode. With -O, cse will optimize this. */
8968 if (GET_MODE (op0
) == VOIDmode
)
8969 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
8971 expand_float (target
, op0
,
8972 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8976 op0
= expand_expr (treeop0
, subtarget
,
8977 VOIDmode
, EXPAND_NORMAL
);
8978 if (modifier
== EXPAND_STACK_PARM
)
8980 temp
= expand_unop (mode
,
8981 optab_for_tree_code (NEGATE_EXPR
, type
,
8985 return REDUCE_BIT_FIELD (temp
);
8989 op0
= expand_expr (treeop0
, subtarget
,
8990 VOIDmode
, EXPAND_NORMAL
);
8991 if (modifier
== EXPAND_STACK_PARM
)
8994 /* ABS_EXPR is not valid for complex arguments. */
8995 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
8996 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
8998 /* Unsigned abs is simply the operand. Testing here means we don't
8999 risk generating incorrect code below. */
9000 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9003 return expand_abs (mode
, op0
, target
, unsignedp
,
9004 safe_from_p (target
, treeop0
, 1));
9008 target
= original_target
;
9010 || modifier
== EXPAND_STACK_PARM
9011 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9012 || GET_MODE (target
) != mode
9014 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9015 target
= gen_reg_rtx (mode
);
9016 expand_operands (treeop0
, treeop1
,
9017 target
, &op0
, &op1
, EXPAND_NORMAL
);
9019 /* First try to do it with a special MIN or MAX instruction.
9020 If that does not win, use a conditional jump to select the proper
9022 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9023 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9028 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9029 and similarly for MAX <x, y>. */
9030 if (VECTOR_TYPE_P (type
))
9032 tree t0
= make_tree (type
, op0
);
9033 tree t1
= make_tree (type
, op1
);
9034 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9036 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9040 /* At this point, a MEM target is no longer useful; we will get better
9043 if (! REG_P (target
))
9044 target
= gen_reg_rtx (mode
);
9046 /* If op1 was placed in target, swap op0 and op1. */
9047 if (target
!= op0
&& target
== op1
)
9048 std::swap (op0
, op1
);
9050 /* We generate better code and avoid problems with op1 mentioning
9051 target by forcing op1 into a pseudo if it isn't a constant. */
9052 if (! CONSTANT_P (op1
))
9053 op1
= force_reg (mode
, op1
);
9056 enum rtx_code comparison_code
;
9059 if (code
== MAX_EXPR
)
9060 comparison_code
= unsignedp
? GEU
: GE
;
9062 comparison_code
= unsignedp
? LEU
: LE
;
9064 /* Canonicalize to comparisons against 0. */
9065 if (op1
== const1_rtx
)
9067 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9068 or (a != 0 ? a : 1) for unsigned.
9069 For MIN we are safe converting (a <= 1 ? a : 1)
9070 into (a <= 0 ? a : 1) */
9071 cmpop1
= const0_rtx
;
9072 if (code
== MAX_EXPR
)
9073 comparison_code
= unsignedp
? NE
: GT
;
9075 if (op1
== constm1_rtx
&& !unsignedp
)
9077 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9078 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9079 cmpop1
= const0_rtx
;
9080 if (code
== MIN_EXPR
)
9081 comparison_code
= LT
;
9084 /* Use a conditional move if possible. */
9085 if (can_conditionally_move_p (mode
))
9091 /* Try to emit the conditional move. */
9092 insn
= emit_conditional_move (target
, comparison_code
,
9097 /* If we could do the conditional move, emit the sequence,
9101 rtx_insn
*seq
= get_insns ();
9107 /* Otherwise discard the sequence and fall back to code with
9113 emit_move_insn (target
, op0
);
9115 lab
= gen_label_rtx ();
9116 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9117 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9118 profile_probability::uninitialized ());
9120 emit_move_insn (target
, op1
);
9125 op0
= expand_expr (treeop0
, subtarget
,
9126 VOIDmode
, EXPAND_NORMAL
);
9127 if (modifier
== EXPAND_STACK_PARM
)
9129 /* In case we have to reduce the result to bitfield precision
9130 for unsigned bitfield expand this as XOR with a proper constant
9132 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9134 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9135 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9136 false, GET_MODE_PRECISION (int_mode
));
9138 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9139 immed_wide_int_const (mask
, int_mode
),
9140 target
, 1, OPTAB_LIB_WIDEN
);
9143 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9147 /* ??? Can optimize bitwise operations with one arg constant.
9148 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9149 and (a bitwise1 b) bitwise2 b (etc)
9150 but that is probably not worth while. */
9159 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9160 || type_has_mode_precision_p (type
));
9166 /* If this is a fixed-point operation, then we cannot use the code
9167 below because "expand_shift" doesn't support sat/no-sat fixed-point
9169 if (ALL_FIXED_POINT_MODE_P (mode
))
9172 if (! safe_from_p (subtarget
, treeop1
, 1))
9174 if (modifier
== EXPAND_STACK_PARM
)
9176 op0
= expand_expr (treeop0
, subtarget
,
9177 VOIDmode
, EXPAND_NORMAL
);
9179 /* Left shift optimization when shifting across word_size boundary.
9181 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9182 there isn't native instruction to support this wide mode
9183 left shift. Given below scenario:
9185 Type A = (Type) B << C
9188 | dest_high | dest_low |
9192 If the shift amount C caused we shift B to across the word
9193 size boundary, i.e part of B shifted into high half of
9194 destination register, and part of B remains in the low
9195 half, then GCC will use the following left shift expand
9198 1. Initialize dest_low to B.
9199 2. Initialize every bit of dest_high to the sign bit of B.
9200 3. Logic left shift dest_low by C bit to finalize dest_low.
9201 The value of dest_low before this shift is kept in a temp D.
9202 4. Logic left shift dest_high by C.
9203 5. Logic right shift D by (word_size - C).
9204 6. Or the result of 4 and 5 to finalize dest_high.
9206 While, by checking gimple statements, if operand B is
9207 coming from signed extension, then we can simplify above
9210 1. dest_high = src_low >> (word_size - C).
9211 2. dest_low = src_low << C.
9213 We can use one arithmetic right shift to finish all the
9214 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9215 needed from 6 into 2.
9217 The case is similar for zero extension, except that we
9218 initialize dest_high to zero rather than copies of the sign
9219 bit from B. Furthermore, we need to use a logical right shift
9222 The choice of sign-extension versus zero-extension is
9223 determined entirely by whether or not B is signed and is
9224 independent of the current setting of unsignedp. */
9227 if (code
== LSHIFT_EXPR
9230 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9232 && TREE_CONSTANT (treeop1
)
9233 && TREE_CODE (treeop0
) == SSA_NAME
)
9235 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9236 if (is_gimple_assign (def
)
9237 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9239 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9240 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9242 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9243 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9244 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9245 >= GET_MODE_BITSIZE (word_mode
)))
9247 rtx_insn
*seq
, *seq_old
;
9248 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9250 bool extend_unsigned
9251 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9252 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9253 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9254 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9255 int_mode
, high_off
);
9256 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9257 - TREE_INT_CST_LOW (treeop1
));
9258 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9261 /* dest_high = src_low >> (word_size - C). */
9262 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9265 if (temp
!= dest_high
)
9266 emit_move_insn (dest_high
, temp
);
9268 /* dest_low = src_low << C. */
9269 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9270 treeop1
, dest_low
, unsignedp
);
9271 if (temp
!= dest_low
)
9272 emit_move_insn (dest_low
, temp
);
9278 if (have_insn_for (ASHIFT
, int_mode
))
9280 bool speed_p
= optimize_insn_for_speed_p ();
9282 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9287 seq_old
= get_insns ();
9289 if (seq_cost (seq
, speed_p
)
9290 >= seq_cost (seq_old
, speed_p
))
9301 if (temp
== NULL_RTX
)
9302 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9304 if (code
== LSHIFT_EXPR
)
9305 temp
= REDUCE_BIT_FIELD (temp
);
9309 /* Could determine the answer when only additive constants differ. Also,
9310 the addition of one can be handled by changing the condition. */
9317 case UNORDERED_EXPR
:
9326 temp
= do_store_flag (ops
,
9327 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9328 tmode
!= VOIDmode
? tmode
: mode
);
9332 /* Use a compare and a jump for BLKmode comparisons, or for function
9333 type comparisons is have_canonicalize_funcptr_for_compare. */
9336 || modifier
== EXPAND_STACK_PARM
9337 || ! safe_from_p (target
, treeop0
, 1)
9338 || ! safe_from_p (target
, treeop1
, 1)
9339 /* Make sure we don't have a hard reg (such as function's return
9340 value) live across basic blocks, if not optimizing. */
9341 || (!optimize
&& REG_P (target
)
9342 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9343 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9345 emit_move_insn (target
, const0_rtx
);
9347 rtx_code_label
*lab1
= gen_label_rtx ();
9348 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9349 profile_probability::uninitialized ());
9351 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9352 emit_move_insn (target
, constm1_rtx
);
9354 emit_move_insn (target
, const1_rtx
);
9360 /* Get the rtx code of the operands. */
9361 op0
= expand_normal (treeop0
);
9362 op1
= expand_normal (treeop1
);
9365 target
= gen_reg_rtx (TYPE_MODE (type
));
9367 /* If target overlaps with op1, then either we need to force
9368 op1 into a pseudo (if target also overlaps with op0),
9369 or write the complex parts in reverse order. */
9370 switch (GET_CODE (target
))
9373 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9375 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9377 complex_expr_force_op1
:
9378 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9379 emit_move_insn (temp
, op1
);
9383 complex_expr_swap_order
:
9384 /* Move the imaginary (op1) and real (op0) parts to their
9386 write_complex_part (target
, op1
, true);
9387 write_complex_part (target
, op0
, false);
9393 temp
= adjust_address_nv (target
,
9394 GET_MODE_INNER (GET_MODE (target
)), 0);
9395 if (reg_overlap_mentioned_p (temp
, op1
))
9397 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9398 temp
= adjust_address_nv (target
, imode
,
9399 GET_MODE_SIZE (imode
));
9400 if (reg_overlap_mentioned_p (temp
, op0
))
9401 goto complex_expr_force_op1
;
9402 goto complex_expr_swap_order
;
9406 if (reg_overlap_mentioned_p (target
, op1
))
9408 if (reg_overlap_mentioned_p (target
, op0
))
9409 goto complex_expr_force_op1
;
9410 goto complex_expr_swap_order
;
9415 /* Move the real (op0) and imaginary (op1) parts to their location. */
9416 write_complex_part (target
, op0
, false);
9417 write_complex_part (target
, op1
, true);
9421 case WIDEN_SUM_EXPR
:
9423 tree oprnd0
= treeop0
;
9424 tree oprnd1
= treeop1
;
9426 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9427 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9432 case VEC_UNPACK_HI_EXPR
:
9433 case VEC_UNPACK_LO_EXPR
:
9434 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9435 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9437 op0
= expand_normal (treeop0
);
9438 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9444 case VEC_UNPACK_FLOAT_HI_EXPR
:
9445 case VEC_UNPACK_FLOAT_LO_EXPR
:
9447 op0
= expand_normal (treeop0
);
9448 /* The signedness is determined from input operand. */
9449 temp
= expand_widen_pattern_expr
9450 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9451 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9457 case VEC_WIDEN_MULT_HI_EXPR
:
9458 case VEC_WIDEN_MULT_LO_EXPR
:
9459 case VEC_WIDEN_MULT_EVEN_EXPR
:
9460 case VEC_WIDEN_MULT_ODD_EXPR
:
9461 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9462 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9463 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9464 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9466 gcc_assert (target
);
9469 case VEC_PACK_TRUNC_EXPR
:
9470 case VEC_PACK_SAT_EXPR
:
9471 case VEC_PACK_FIX_TRUNC_EXPR
:
9472 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9475 case VEC_PACK_FLOAT_EXPR
:
9476 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9477 expand_operands (treeop0
, treeop1
,
9478 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9479 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9481 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9482 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9484 gcc_assert (target
);
9489 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9490 vec_perm_builder sel
;
9491 if (TREE_CODE (treeop2
) == VECTOR_CST
9492 && tree_to_vec_perm_builder (&sel
, treeop2
))
9494 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9495 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9500 op2
= expand_normal (treeop2
);
9501 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9509 tree oprnd0
= treeop0
;
9510 tree oprnd1
= treeop1
;
9511 tree oprnd2
= treeop2
;
9514 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9515 op2
= expand_normal (oprnd2
);
9516 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9523 tree oprnd0
= treeop0
;
9524 tree oprnd1
= treeop1
;
9525 tree oprnd2
= treeop2
;
9528 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9529 op2
= expand_normal (oprnd2
);
9530 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9535 case REALIGN_LOAD_EXPR
:
9537 tree oprnd0
= treeop0
;
9538 tree oprnd1
= treeop1
;
9539 tree oprnd2
= treeop2
;
9542 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9543 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9544 op2
= expand_normal (oprnd2
);
9545 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9553 /* A COND_EXPR with its type being VOID_TYPE represents a
9554 conditional jump and is handled in
9555 expand_gimple_cond_expr. */
9556 gcc_assert (!VOID_TYPE_P (type
));
9558 /* Note that COND_EXPRs whose type is a structure or union
9559 are required to be constructed to contain assignments of
9560 a temporary variable, so that we can evaluate them here
9561 for side effect only. If type is void, we must do likewise. */
9563 gcc_assert (!TREE_ADDRESSABLE (type
)
9565 && TREE_TYPE (treeop1
) != void_type_node
9566 && TREE_TYPE (treeop2
) != void_type_node
);
9568 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9572 /* If we are not to produce a result, we have no target. Otherwise,
9573 if a target was specified use it; it will not be used as an
9574 intermediate target unless it is safe. If no target, use a
9577 if (modifier
!= EXPAND_STACK_PARM
9579 && safe_from_p (original_target
, treeop0
, 1)
9580 && GET_MODE (original_target
) == mode
9581 && !MEM_P (original_target
))
9582 temp
= original_target
;
9584 temp
= assign_temp (type
, 0, 1);
9586 do_pending_stack_adjust ();
9588 rtx_code_label
*lab0
= gen_label_rtx ();
9589 rtx_code_label
*lab1
= gen_label_rtx ();
9590 jumpifnot (treeop0
, lab0
,
9591 profile_probability::uninitialized ());
9592 store_expr (treeop1
, temp
,
9593 modifier
== EXPAND_STACK_PARM
,
9596 emit_jump_insn (targetm
.gen_jump (lab1
));
9599 store_expr (treeop2
, temp
,
9600 modifier
== EXPAND_STACK_PARM
,
9609 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9612 case VEC_DUPLICATE_EXPR
:
9613 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9614 target
= expand_vector_broadcast (mode
, op0
);
9615 gcc_assert (target
);
9618 case VEC_SERIES_EXPR
:
9619 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9620 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9622 case BIT_INSERT_EXPR
:
9624 unsigned bitpos
= tree_to_uhwi (treeop2
);
9626 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9627 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9629 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9630 rtx op0
= expand_normal (treeop0
);
9631 rtx op1
= expand_normal (treeop1
);
9632 rtx dst
= gen_reg_rtx (mode
);
9633 emit_move_insn (dst
, op0
);
9634 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9635 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9643 /* Here to do an ordinary binary operator. */
9645 expand_operands (treeop0
, treeop1
,
9646 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9648 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9650 if (modifier
== EXPAND_STACK_PARM
)
9652 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9653 unsignedp
, OPTAB_LIB_WIDEN
);
9655 /* Bitwise operations do not need bitfield reduction as we expect their
9656 operands being properly truncated. */
9657 if (code
== BIT_XOR_EXPR
9658 || code
== BIT_AND_EXPR
9659 || code
== BIT_IOR_EXPR
)
9661 return REDUCE_BIT_FIELD (temp
);
9663 #undef REDUCE_BIT_FIELD
9666 /* Return TRUE if expression STMT is suitable for replacement.
9667 Never consider memory loads as replaceable, because those don't ever lead
9668 into constant expressions. */
9671 stmt_is_replaceable_p (gimple
*stmt
)
9673 if (ssa_is_replaceable_p (stmt
))
9675 /* Don't move around loads. */
9676 if (!gimple_assign_single_p (stmt
)
9677 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9684 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9685 enum expand_modifier modifier
, rtx
*alt_rtl
,
9686 bool inner_reference_p
)
9688 rtx op0
, op1
, temp
, decl_rtl
;
9691 machine_mode mode
, dmode
;
9692 enum tree_code code
= TREE_CODE (exp
);
9693 rtx subtarget
, original_target
;
9696 bool reduce_bit_field
;
9697 location_t loc
= EXPR_LOCATION (exp
);
9698 struct separate_ops ops
;
9699 tree treeop0
, treeop1
, treeop2
;
9700 tree ssa_name
= NULL_TREE
;
9703 type
= TREE_TYPE (exp
);
9704 mode
= TYPE_MODE (type
);
9705 unsignedp
= TYPE_UNSIGNED (type
);
9707 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9708 if (!VL_EXP_CLASS_P (exp
))
9709 switch (TREE_CODE_LENGTH (code
))
9712 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9713 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9714 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9724 ignore
= (target
== const0_rtx
9725 || ((CONVERT_EXPR_CODE_P (code
)
9726 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9727 && TREE_CODE (type
) == VOID_TYPE
));
9729 /* An operation in what may be a bit-field type needs the
9730 result to be reduced to the precision of the bit-field type,
9731 which is narrower than that of the type's mode. */
9732 reduce_bit_field
= (!ignore
9733 && INTEGRAL_TYPE_P (type
)
9734 && !type_has_mode_precision_p (type
));
9736 /* If we are going to ignore this result, we need only do something
9737 if there is a side-effect somewhere in the expression. If there
9738 is, short-circuit the most common cases here. Note that we must
9739 not call expand_expr with anything but const0_rtx in case this
9740 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9744 if (! TREE_SIDE_EFFECTS (exp
))
9747 /* Ensure we reference a volatile object even if value is ignored, but
9748 don't do this if all we are doing is taking its address. */
9749 if (TREE_THIS_VOLATILE (exp
)
9750 && TREE_CODE (exp
) != FUNCTION_DECL
9751 && mode
!= VOIDmode
&& mode
!= BLKmode
9752 && modifier
!= EXPAND_CONST_ADDRESS
)
9754 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9760 if (TREE_CODE_CLASS (code
) == tcc_unary
9761 || code
== BIT_FIELD_REF
9762 || code
== COMPONENT_REF
9763 || code
== INDIRECT_REF
)
9764 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9767 else if (TREE_CODE_CLASS (code
) == tcc_binary
9768 || TREE_CODE_CLASS (code
) == tcc_comparison
9769 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9771 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9772 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9779 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9782 /* Use subtarget as the target for operand 0 of a binary operation. */
9783 subtarget
= get_subtarget (target
);
9784 original_target
= target
;
9790 tree function
= decl_function_context (exp
);
9792 temp
= label_rtx (exp
);
9793 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9795 if (function
!= current_function_decl
9797 LABEL_REF_NONLOCAL_P (temp
) = 1;
9799 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9804 /* ??? ivopts calls expander, without any preparation from
9805 out-of-ssa. So fake instructions as if this was an access to the
9806 base variable. This unnecessarily allocates a pseudo, see how we can
9807 reuse it, if partition base vars have it set already. */
9808 if (!currently_expanding_to_rtl
)
9810 tree var
= SSA_NAME_VAR (exp
);
9811 if (var
&& DECL_RTL_SET_P (var
))
9812 return DECL_RTL (var
);
9813 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9814 LAST_VIRTUAL_REGISTER
+ 1);
9817 g
= get_gimple_for_ssa_name (exp
);
9818 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9820 && modifier
== EXPAND_INITIALIZER
9821 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9822 && (optimize
|| !SSA_NAME_VAR (exp
)
9823 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9824 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9825 g
= SSA_NAME_DEF_STMT (exp
);
9829 location_t saved_loc
= curr_insn_location ();
9830 location_t loc
= gimple_location (g
);
9831 if (loc
!= UNKNOWN_LOCATION
)
9832 set_curr_insn_location (loc
);
9833 ops
.code
= gimple_assign_rhs_code (g
);
9834 switch (get_gimple_rhs_class (ops
.code
))
9836 case GIMPLE_TERNARY_RHS
:
9837 ops
.op2
= gimple_assign_rhs3 (g
);
9839 case GIMPLE_BINARY_RHS
:
9840 ops
.op1
= gimple_assign_rhs2 (g
);
9842 /* Try to expand conditonal compare. */
9843 if (targetm
.gen_ccmp_first
)
9845 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9846 r
= expand_ccmp_expr (g
, mode
);
9851 case GIMPLE_UNARY_RHS
:
9852 ops
.op0
= gimple_assign_rhs1 (g
);
9853 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9855 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9857 case GIMPLE_SINGLE_RHS
:
9859 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9860 tmode
, modifier
, alt_rtl
,
9867 set_curr_insn_location (saved_loc
);
9868 if (REG_P (r
) && !REG_EXPR (r
))
9869 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9874 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9875 exp
= SSA_NAME_VAR (ssa_name
);
9876 goto expand_decl_rtl
;
9880 /* If a static var's type was incomplete when the decl was written,
9881 but the type is complete now, lay out the decl now. */
9882 if (DECL_SIZE (exp
) == 0
9883 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9884 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9885 layout_decl (exp
, 0);
9891 decl_rtl
= DECL_RTL (exp
);
9893 gcc_assert (decl_rtl
);
9895 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9896 settings for VECTOR_TYPE_P that might switch for the function. */
9897 if (currently_expanding_to_rtl
9898 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9899 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9900 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9902 decl_rtl
= copy_rtx (decl_rtl
);
9904 /* Record writes to register variables. */
9905 if (modifier
== EXPAND_WRITE
9907 && HARD_REGISTER_P (decl_rtl
))
9908 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9909 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9911 /* Ensure variable marked as used even if it doesn't go through
9912 a parser. If it hasn't be used yet, write out an external
9915 TREE_USED (exp
) = 1;
9917 /* Show we haven't gotten RTL for this yet. */
9920 /* Variables inherited from containing functions should have
9921 been lowered by this point. */
9923 context
= decl_function_context (exp
);
9925 || SCOPE_FILE_SCOPE_P (context
)
9926 || context
== current_function_decl
9927 || TREE_STATIC (exp
)
9928 || DECL_EXTERNAL (exp
)
9929 /* ??? C++ creates functions that are not TREE_STATIC. */
9930 || TREE_CODE (exp
) == FUNCTION_DECL
);
9932 /* This is the case of an array whose size is to be determined
9933 from its initializer, while the initializer is still being parsed.
9934 ??? We aren't parsing while expanding anymore. */
9936 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
9937 temp
= validize_mem (decl_rtl
);
9939 /* If DECL_RTL is memory, we are in the normal case and the
9940 address is not valid, get the address into a register. */
9942 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
9945 *alt_rtl
= decl_rtl
;
9946 decl_rtl
= use_anchored_address (decl_rtl
);
9947 if (modifier
!= EXPAND_CONST_ADDRESS
9948 && modifier
!= EXPAND_SUM
9949 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
9950 : GET_MODE (decl_rtl
),
9952 MEM_ADDR_SPACE (decl_rtl
)))
9953 temp
= replace_equiv_address (decl_rtl
,
9954 copy_rtx (XEXP (decl_rtl
, 0)));
9957 /* If we got something, return it. But first, set the alignment
9958 if the address is a register. */
9961 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
9962 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
9968 dmode
= DECL_MODE (exp
);
9970 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
9972 /* If the mode of DECL_RTL does not match that of the decl,
9973 there are two cases: we are dealing with a BLKmode value
9974 that is returned in a register, or we are dealing with
9975 a promoted value. In the latter case, return a SUBREG
9976 of the wanted mode, but mark it so that we know that it
9977 was already extended. */
9978 if (REG_P (decl_rtl
)
9980 && GET_MODE (decl_rtl
) != dmode
)
9984 /* Get the signedness to be used for this variable. Ensure we get
9985 the same mode we got when the variable was declared. */
9986 if (code
!= SSA_NAME
)
9987 pmode
= promote_decl_mode (exp
, &unsignedp
);
9988 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
9989 && gimple_code (g
) == GIMPLE_CALL
9990 && !gimple_call_internal_p (g
))
9991 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
9992 gimple_call_fntype (g
),
9995 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
9996 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
9998 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
9999 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10000 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10008 /* Given that TYPE_PRECISION (type) is not always equal to
10009 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10010 the former to the latter according to the signedness of the
10012 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
10013 temp
= immed_wide_int_const
10014 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
10020 tree tmp
= NULL_TREE
;
10021 if (VECTOR_MODE_P (mode
))
10022 return const_vector_from_tree (exp
);
10023 scalar_int_mode int_mode
;
10024 if (is_int_mode (mode
, &int_mode
))
10026 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10027 return const_scalar_mask_from_tree (int_mode
, exp
);
10031 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10033 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10034 type_for_mode
, exp
);
10039 vec
<constructor_elt
, va_gc
> *v
;
10040 /* Constructors need to be fixed-length. FIXME. */
10041 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10042 vec_alloc (v
, nunits
);
10043 for (unsigned int i
= 0; i
< nunits
; ++i
)
10044 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10045 tmp
= build_constructor (type
, v
);
10047 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10052 if (modifier
== EXPAND_WRITE
)
10054 /* Writing into CONST_DECL is always invalid, but handle it
10056 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10057 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10058 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10059 EXPAND_NORMAL
, as
);
10060 op0
= memory_address_addr_space (mode
, op0
, as
);
10061 temp
= gen_rtx_MEM (mode
, op0
);
10062 set_mem_addr_space (temp
, as
);
10065 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10068 /* If optimized, generate immediate CONST_DOUBLE
10069 which will be turned into memory by reload if necessary.
10071 We used to force a register so that loop.c could see it. But
10072 this does not allow gen_* patterns to perform optimizations with
10073 the constants. It also produces two insns in cases like "x = 1.0;".
10074 On most machines, floating-point constants are not permitted in
10075 many insns, so we'd end up copying it to a register in any case.
10077 Now, we do the copying in expand_binop, if appropriate. */
10078 return const_double_from_real_value (TREE_REAL_CST (exp
),
10079 TYPE_MODE (TREE_TYPE (exp
)));
10082 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10083 TYPE_MODE (TREE_TYPE (exp
)));
10086 /* Handle evaluating a complex constant in a CONCAT target. */
10087 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10089 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10092 rtarg
= XEXP (original_target
, 0);
10093 itarg
= XEXP (original_target
, 1);
10095 /* Move the real and imaginary parts separately. */
10096 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10097 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10100 emit_move_insn (rtarg
, op0
);
10102 emit_move_insn (itarg
, op1
);
10104 return original_target
;
10110 temp
= expand_expr_constant (exp
, 1, modifier
);
10112 /* temp contains a constant address.
10113 On RISC machines where a constant address isn't valid,
10114 make some insns to get that address into a register. */
10115 if (modifier
!= EXPAND_CONST_ADDRESS
10116 && modifier
!= EXPAND_INITIALIZER
10117 && modifier
!= EXPAND_SUM
10118 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10119 MEM_ADDR_SPACE (temp
)))
10120 return replace_equiv_address (temp
,
10121 copy_rtx (XEXP (temp
, 0)));
10125 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10129 tree val
= treeop0
;
10130 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10131 inner_reference_p
);
10133 if (!SAVE_EXPR_RESOLVED_P (exp
))
10135 /* We can indeed still hit this case, typically via builtin
10136 expanders calling save_expr immediately before expanding
10137 something. Assume this means that we only have to deal
10138 with non-BLKmode values. */
10139 gcc_assert (GET_MODE (ret
) != BLKmode
);
10141 val
= build_decl (curr_insn_location (),
10142 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10143 DECL_ARTIFICIAL (val
) = 1;
10144 DECL_IGNORED_P (val
) = 1;
10146 TREE_OPERAND (exp
, 0) = treeop0
;
10147 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10149 if (!CONSTANT_P (ret
))
10150 ret
= copy_to_reg (ret
);
10151 SET_DECL_RTL (val
, ret
);
10159 /* If we don't need the result, just ensure we evaluate any
10163 unsigned HOST_WIDE_INT idx
;
10166 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10167 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10172 return expand_constructor (exp
, target
, modifier
, false);
10174 case TARGET_MEM_REF
:
10177 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10178 enum insn_code icode
;
10179 unsigned int align
;
10181 op0
= addr_for_mem_ref (exp
, as
, true);
10182 op0
= memory_address_addr_space (mode
, op0
, as
);
10183 temp
= gen_rtx_MEM (mode
, op0
);
10184 set_mem_attributes (temp
, exp
, 0);
10185 set_mem_addr_space (temp
, as
);
10186 align
= get_object_alignment (exp
);
10187 if (modifier
!= EXPAND_WRITE
10188 && modifier
!= EXPAND_MEMORY
10190 && align
< GET_MODE_ALIGNMENT (mode
)
10191 /* If the target does not have special handling for unaligned
10192 loads of mode then it can use regular moves for them. */
10193 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10194 != CODE_FOR_nothing
))
10196 struct expand_operand ops
[2];
10198 /* We've already validated the memory, and we're creating a
10199 new pseudo destination. The predicates really can't fail,
10200 nor can the generator. */
10201 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10202 create_fixed_operand (&ops
[1], temp
);
10203 expand_insn (icode
, 2, ops
);
10204 temp
= ops
[0].value
;
10211 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10213 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10214 machine_mode address_mode
;
10215 tree base
= TREE_OPERAND (exp
, 0);
10217 enum insn_code icode
;
10219 /* Handle expansion of non-aliased memory with non-BLKmode. That
10220 might end up in a register. */
10221 if (mem_ref_refers_to_non_mem_p (exp
))
10223 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10224 base
= TREE_OPERAND (base
, 0);
10225 poly_uint64 type_size
;
10226 if (known_eq (offset
, 0)
10228 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10229 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10230 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10231 target
, tmode
, modifier
);
10232 if (TYPE_MODE (type
) == BLKmode
)
10234 temp
= assign_stack_temp (DECL_MODE (base
),
10235 GET_MODE_SIZE (DECL_MODE (base
)));
10236 store_expr (base
, temp
, 0, false, false);
10237 temp
= adjust_address (temp
, BLKmode
, offset
);
10238 set_mem_size (temp
, int_size_in_bytes (type
));
10241 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10242 bitsize_int (offset
* BITS_PER_UNIT
));
10243 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10244 return expand_expr (exp
, target
, tmode
, modifier
);
10246 address_mode
= targetm
.addr_space
.address_mode (as
);
10247 base
= TREE_OPERAND (exp
, 0);
10248 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10250 tree mask
= gimple_assign_rhs2 (def_stmt
);
10251 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10252 gimple_assign_rhs1 (def_stmt
), mask
);
10253 TREE_OPERAND (exp
, 0) = base
;
10255 align
= get_object_alignment (exp
);
10256 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10257 op0
= memory_address_addr_space (mode
, op0
, as
);
10258 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10260 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10261 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10262 op0
= memory_address_addr_space (mode
, op0
, as
);
10264 temp
= gen_rtx_MEM (mode
, op0
);
10265 set_mem_attributes (temp
, exp
, 0);
10266 set_mem_addr_space (temp
, as
);
10267 if (TREE_THIS_VOLATILE (exp
))
10268 MEM_VOLATILE_P (temp
) = 1;
10269 if (modifier
!= EXPAND_WRITE
10270 && modifier
!= EXPAND_MEMORY
10271 && !inner_reference_p
10273 && align
< GET_MODE_ALIGNMENT (mode
))
10275 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10276 != CODE_FOR_nothing
)
10278 struct expand_operand ops
[2];
10280 /* We've already validated the memory, and we're creating a
10281 new pseudo destination. The predicates really can't fail,
10282 nor can the generator. */
10283 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10284 create_fixed_operand (&ops
[1], temp
);
10285 expand_insn (icode
, 2, ops
);
10286 temp
= ops
[0].value
;
10288 else if (targetm
.slow_unaligned_access (mode
, align
))
10289 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10290 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10291 (modifier
== EXPAND_STACK_PARM
10292 ? NULL_RTX
: target
),
10293 mode
, mode
, false, alt_rtl
);
10296 && modifier
!= EXPAND_MEMORY
10297 && modifier
!= EXPAND_WRITE
)
10298 temp
= flip_storage_order (mode
, temp
);
10305 tree array
= treeop0
;
10306 tree index
= treeop1
;
10309 /* Fold an expression like: "foo"[2].
10310 This is not done in fold so it won't happen inside &.
10311 Don't fold if this is for wide characters since it's too
10312 difficult to do correctly and this is a very rare case. */
10314 if (modifier
!= EXPAND_CONST_ADDRESS
10315 && modifier
!= EXPAND_INITIALIZER
10316 && modifier
!= EXPAND_MEMORY
)
10318 tree t
= fold_read_from_constant_string (exp
);
10321 return expand_expr (t
, target
, tmode
, modifier
);
10324 /* If this is a constant index into a constant array,
10325 just get the value from the array. Handle both the cases when
10326 we have an explicit constructor and when our operand is a variable
10327 that was declared const. */
10329 if (modifier
!= EXPAND_CONST_ADDRESS
10330 && modifier
!= EXPAND_INITIALIZER
10331 && modifier
!= EXPAND_MEMORY
10332 && TREE_CODE (array
) == CONSTRUCTOR
10333 && ! TREE_SIDE_EFFECTS (array
)
10334 && TREE_CODE (index
) == INTEGER_CST
)
10336 unsigned HOST_WIDE_INT ix
;
10339 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10341 if (tree_int_cst_equal (field
, index
))
10343 if (!TREE_SIDE_EFFECTS (value
))
10344 return expand_expr (fold (value
), target
, tmode
, modifier
);
10349 else if (optimize
>= 1
10350 && modifier
!= EXPAND_CONST_ADDRESS
10351 && modifier
!= EXPAND_INITIALIZER
10352 && modifier
!= EXPAND_MEMORY
10353 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10354 && TREE_CODE (index
) == INTEGER_CST
10355 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10356 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10358 if (init
== NULL_TREE
)
10360 tree value
= build_zero_cst (type
);
10361 if (TREE_CODE (value
) == CONSTRUCTOR
)
10363 /* If VALUE is a CONSTRUCTOR, this optimization is only
10364 useful if this doesn't store the CONSTRUCTOR into
10365 memory. If it does, it is more efficient to just
10366 load the data from the array directly. */
10367 rtx ret
= expand_constructor (value
, target
,
10369 if (ret
== NULL_RTX
)
10374 return expand_expr (value
, target
, tmode
, modifier
);
10376 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10378 unsigned HOST_WIDE_INT ix
;
10381 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10383 if (tree_int_cst_equal (field
, index
))
10385 if (TREE_SIDE_EFFECTS (value
))
10388 if (TREE_CODE (value
) == CONSTRUCTOR
)
10390 /* If VALUE is a CONSTRUCTOR, this
10391 optimization is only useful if
10392 this doesn't store the CONSTRUCTOR
10393 into memory. If it does, it is more
10394 efficient to just load the data from
10395 the array directly. */
10396 rtx ret
= expand_constructor (value
, target
,
10398 if (ret
== NULL_RTX
)
10403 expand_expr (fold (value
), target
, tmode
, modifier
);
10406 else if (TREE_CODE (init
) == STRING_CST
)
10408 tree low_bound
= array_ref_low_bound (exp
);
10409 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10411 /* Optimize the special case of a zero lower bound.
10413 We convert the lower bound to sizetype to avoid problems
10414 with constant folding. E.g. suppose the lower bound is
10415 1 and its mode is QI. Without the conversion
10416 (ARRAY + (INDEX - (unsigned char)1))
10418 (ARRAY + (-(unsigned char)1) + INDEX)
10420 (ARRAY + 255 + INDEX). Oops! */
10421 if (!integer_zerop (low_bound
))
10422 index1
= size_diffop_loc (loc
, index1
,
10423 fold_convert_loc (loc
, sizetype
,
10426 if (tree_fits_uhwi_p (index1
)
10427 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10429 tree type
= TREE_TYPE (TREE_TYPE (init
));
10430 scalar_int_mode mode
;
10432 if (is_int_mode (TYPE_MODE (type
), &mode
)
10433 && GET_MODE_SIZE (mode
) == 1)
10434 return gen_int_mode (TREE_STRING_POINTER (init
)
10435 [TREE_INT_CST_LOW (index1
)],
10441 goto normal_inner_ref
;
10443 case COMPONENT_REF
:
10444 /* If the operand is a CONSTRUCTOR, we can just extract the
10445 appropriate field if it is present. */
10446 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10448 unsigned HOST_WIDE_INT idx
;
10450 scalar_int_mode field_mode
;
10452 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10454 if (field
== treeop1
10455 /* We can normally use the value of the field in the
10456 CONSTRUCTOR. However, if this is a bitfield in
10457 an integral mode that we can fit in a HOST_WIDE_INT,
10458 we must mask only the number of bits in the bitfield,
10459 since this is done implicitly by the constructor. If
10460 the bitfield does not meet either of those conditions,
10461 we can't do this optimization. */
10462 && (! DECL_BIT_FIELD (field
)
10463 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10464 && (GET_MODE_PRECISION (field_mode
)
10465 <= HOST_BITS_PER_WIDE_INT
))))
10467 if (DECL_BIT_FIELD (field
)
10468 && modifier
== EXPAND_STACK_PARM
)
10470 op0
= expand_expr (value
, target
, tmode
, modifier
);
10471 if (DECL_BIT_FIELD (field
))
10473 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10474 scalar_int_mode imode
10475 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10477 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10479 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10481 op0
= expand_and (imode
, op0
, op1
, target
);
10485 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10487 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10489 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10497 goto normal_inner_ref
;
10499 case BIT_FIELD_REF
:
10500 case ARRAY_RANGE_REF
:
10503 machine_mode mode1
, mode2
;
10504 poly_int64 bitsize
, bitpos
, bytepos
;
10506 int reversep
, volatilep
= 0, must_force_mem
;
10508 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10509 &unsignedp
, &reversep
, &volatilep
);
10510 rtx orig_op0
, memloc
;
10511 bool clear_mem_expr
= false;
10513 /* If we got back the original object, something is wrong. Perhaps
10514 we are evaluating an expression too early. In any event, don't
10515 infinitely recurse. */
10516 gcc_assert (tem
!= exp
);
10518 /* If TEM's type is a union of variable size, pass TARGET to the inner
10519 computation, since it will need a temporary and TARGET is known
10520 to have to do. This occurs in unchecked conversion in Ada. */
10522 = expand_expr_real (tem
,
10523 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10524 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10525 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10527 && modifier
!= EXPAND_STACK_PARM
10528 ? target
: NULL_RTX
),
10530 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10533 /* If the field has a mode, we want to access it in the
10534 field's mode, not the computed mode.
10535 If a MEM has VOIDmode (external with incomplete type),
10536 use BLKmode for it instead. */
10539 if (mode1
!= VOIDmode
)
10540 op0
= adjust_address (op0
, mode1
, 0);
10541 else if (GET_MODE (op0
) == VOIDmode
)
10542 op0
= adjust_address (op0
, BLKmode
, 0);
10546 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10548 /* If we have either an offset, a BLKmode result, or a reference
10549 outside the underlying object, we must force it to memory.
10550 Such a case can occur in Ada if we have unchecked conversion
10551 of an expression from a scalar type to an aggregate type or
10552 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10553 passed a partially uninitialized object or a view-conversion
10554 to a larger size. */
10555 must_force_mem
= (offset
10556 || mode1
== BLKmode
10557 || (mode
== BLKmode
10558 && !int_mode_for_size (bitsize
, 1).exists ())
10559 || maybe_gt (bitpos
+ bitsize
,
10560 GET_MODE_BITSIZE (mode2
)));
10562 /* Handle CONCAT first. */
10563 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10565 if (known_eq (bitpos
, 0)
10566 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10567 && COMPLEX_MODE_P (mode1
)
10568 && COMPLEX_MODE_P (GET_MODE (op0
))
10569 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10570 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10573 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10574 if (mode1
!= GET_MODE (op0
))
10577 for (int i
= 0; i
< 2; i
++)
10579 rtx op
= read_complex_part (op0
, i
!= 0);
10580 if (GET_CODE (op
) == SUBREG
)
10581 op
= force_reg (GET_MODE (op
), op
);
10582 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10588 if (!REG_P (op
) && !MEM_P (op
))
10589 op
= force_reg (GET_MODE (op
), op
);
10590 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10594 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10598 if (known_eq (bitpos
, 0)
10599 && known_eq (bitsize
,
10600 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10601 && maybe_ne (bitsize
, 0))
10603 op0
= XEXP (op0
, 0);
10604 mode2
= GET_MODE (op0
);
10606 else if (known_eq (bitpos
,
10607 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10608 && known_eq (bitsize
,
10609 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10610 && maybe_ne (bitpos
, 0)
10611 && maybe_ne (bitsize
, 0))
10613 op0
= XEXP (op0
, 1);
10615 mode2
= GET_MODE (op0
);
10618 /* Otherwise force into memory. */
10619 must_force_mem
= 1;
10622 /* If this is a constant, put it in a register if it is a legitimate
10623 constant and we don't need a memory reference. */
10624 if (CONSTANT_P (op0
)
10625 && mode2
!= BLKmode
10626 && targetm
.legitimate_constant_p (mode2
, op0
)
10627 && !must_force_mem
)
10628 op0
= force_reg (mode2
, op0
);
10630 /* Otherwise, if this is a constant, try to force it to the constant
10631 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10632 is a legitimate constant. */
10633 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10634 op0
= validize_mem (memloc
);
10636 /* Otherwise, if this is a constant or the object is not in memory
10637 and need be, put it there. */
10638 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10640 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10641 emit_move_insn (memloc
, op0
);
10643 clear_mem_expr
= true;
10648 machine_mode address_mode
;
10649 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10652 gcc_assert (MEM_P (op0
));
10654 address_mode
= get_address_mode (op0
);
10655 if (GET_MODE (offset_rtx
) != address_mode
)
10657 /* We cannot be sure that the RTL in offset_rtx is valid outside
10658 of a memory address context, so force it into a register
10659 before attempting to convert it to the desired mode. */
10660 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10661 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10664 /* See the comment in expand_assignment for the rationale. */
10665 if (mode1
!= VOIDmode
10666 && maybe_ne (bitpos
, 0)
10667 && maybe_gt (bitsize
, 0)
10668 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10669 && multiple_p (bitpos
, bitsize
)
10670 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10671 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10673 op0
= adjust_address (op0
, mode1
, bytepos
);
10677 op0
= offset_address (op0
, offset_rtx
,
10678 highest_pow2_factor (offset
));
10681 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10682 record its alignment as BIGGEST_ALIGNMENT. */
10684 && known_eq (bitpos
, 0)
10686 && is_aligning_offset (offset
, tem
))
10687 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10689 /* Don't forget about volatility even if this is a bitfield. */
10690 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10692 if (op0
== orig_op0
)
10693 op0
= copy_rtx (op0
);
10695 MEM_VOLATILE_P (op0
) = 1;
10698 /* In cases where an aligned union has an unaligned object
10699 as a field, we might be extracting a BLKmode value from
10700 an integer-mode (e.g., SImode) object. Handle this case
10701 by doing the extract into an object as wide as the field
10702 (which we know to be the width of a basic mode), then
10703 storing into memory, and changing the mode to BLKmode. */
10704 if (mode1
== VOIDmode
10705 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10706 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10707 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10708 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10709 && modifier
!= EXPAND_CONST_ADDRESS
10710 && modifier
!= EXPAND_INITIALIZER
10711 && modifier
!= EXPAND_MEMORY
)
10712 /* If the bitfield is volatile and the bitsize
10713 is narrower than the access size of the bitfield,
10714 we need to extract bitfields from the access. */
10715 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10716 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10717 && mode1
!= BLKmode
10718 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10719 /* If the field isn't aligned enough to fetch as a memref,
10720 fetch it as a bit field. */
10721 || (mode1
!= BLKmode
10723 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10724 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10725 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10726 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10727 && modifier
!= EXPAND_MEMORY
10728 && ((modifier
== EXPAND_CONST_ADDRESS
10729 || modifier
== EXPAND_INITIALIZER
)
10731 : targetm
.slow_unaligned_access (mode1
,
10733 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10734 /* If the type and the field are a constant size and the
10735 size of the type isn't the same size as the bitfield,
10736 we must use bitfield operations. */
10737 || (known_size_p (bitsize
)
10738 && TYPE_SIZE (TREE_TYPE (exp
))
10739 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10740 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10743 machine_mode ext_mode
= mode
;
10745 if (ext_mode
== BLKmode
10746 && ! (target
!= 0 && MEM_P (op0
)
10748 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10749 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10751 if (ext_mode
== BLKmode
)
10754 target
= assign_temp (type
, 1, 1);
10756 /* ??? Unlike the similar test a few lines below, this one is
10757 very likely obsolete. */
10758 if (known_eq (bitsize
, 0))
10761 /* In this case, BITPOS must start at a byte boundary and
10762 TARGET, if specified, must be a MEM. */
10763 gcc_assert (MEM_P (op0
)
10764 && (!target
|| MEM_P (target
)));
10766 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
10767 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
10768 emit_block_move (target
,
10769 adjust_address (op0
, VOIDmode
, bytepos
),
10770 gen_int_mode (bytesize
, Pmode
),
10771 (modifier
== EXPAND_STACK_PARM
10772 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10777 /* If we have nothing to extract, the result will be 0 for targets
10778 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10779 return 0 for the sake of consistency, as reading a zero-sized
10780 bitfield is valid in Ada and the value is fully specified. */
10781 if (known_eq (bitsize
, 0))
10784 op0
= validize_mem (op0
);
10786 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10787 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10789 /* If the result has a record type and the extraction is done in
10790 an integral mode, then the field may be not aligned on a byte
10791 boundary; in this case, if it has reverse storage order, it
10792 needs to be extracted as a scalar field with reverse storage
10793 order and put back into memory order afterwards. */
10794 if (TREE_CODE (type
) == RECORD_TYPE
10795 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10796 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10798 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10799 (modifier
== EXPAND_STACK_PARM
10800 ? NULL_RTX
: target
),
10801 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10803 /* If the result has a record type and the mode of OP0 is an
10804 integral mode then, if BITSIZE is narrower than this mode
10805 and this is for big-endian data, we must put the field
10806 into the high-order bits. And we must also put it back
10807 into memory order if it has been previously reversed. */
10808 scalar_int_mode op0_mode
;
10809 if (TREE_CODE (type
) == RECORD_TYPE
10810 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10812 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10814 gcc_checking_assert (known_le (bitsize
, size
));
10815 if (maybe_lt (bitsize
, size
)
10816 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10817 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10818 size
- bitsize
, op0
, 1);
10821 op0
= flip_storage_order (op0_mode
, op0
);
10824 /* If the result type is BLKmode, store the data into a temporary
10825 of the appropriate type, but with the mode corresponding to the
10826 mode for the data we have (op0's mode). */
10827 if (mode
== BLKmode
)
10830 = assign_stack_temp_for_type (ext_mode
,
10831 GET_MODE_BITSIZE (ext_mode
),
10833 emit_move_insn (new_rtx
, op0
);
10834 op0
= copy_rtx (new_rtx
);
10835 PUT_MODE (op0
, BLKmode
);
10841 /* If the result is BLKmode, use that to access the object
10843 if (mode
== BLKmode
)
10846 /* Get a reference to just this component. */
10847 bytepos
= bits_to_bytes_round_down (bitpos
);
10848 if (modifier
== EXPAND_CONST_ADDRESS
10849 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10850 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
10852 op0
= adjust_address (op0
, mode1
, bytepos
);
10854 if (op0
== orig_op0
)
10855 op0
= copy_rtx (op0
);
10857 /* Don't set memory attributes if the base expression is
10858 SSA_NAME that got expanded as a MEM. In that case, we should
10859 just honor its original memory attributes. */
10860 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10861 set_mem_attributes (op0
, exp
, 0);
10863 if (REG_P (XEXP (op0
, 0)))
10864 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10866 /* If op0 is a temporary because the original expressions was forced
10867 to memory, clear MEM_EXPR so that the original expression cannot
10868 be marked as addressable through MEM_EXPR of the temporary. */
10869 if (clear_mem_expr
)
10870 set_mem_expr (op0
, NULL_TREE
);
10872 MEM_VOLATILE_P (op0
) |= volatilep
;
10875 && modifier
!= EXPAND_MEMORY
10876 && modifier
!= EXPAND_WRITE
)
10877 op0
= flip_storage_order (mode1
, op0
);
10879 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10880 || modifier
== EXPAND_CONST_ADDRESS
10881 || modifier
== EXPAND_INITIALIZER
)
10885 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10887 convert_move (target
, op0
, unsignedp
);
10892 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10895 /* All valid uses of __builtin_va_arg_pack () are removed during
10897 if (CALL_EXPR_VA_ARG_PACK (exp
))
10898 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10900 tree fndecl
= get_callee_fndecl (exp
), attr
;
10903 /* Don't diagnose the error attribute in thunks, those are
10904 artificially created. */
10905 && !CALL_FROM_THUNK_P (exp
)
10906 && (attr
= lookup_attribute ("error",
10907 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10909 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
10910 error ("%Kcall to %qs declared with attribute error: %s", exp
,
10911 identifier_to_locale (ident
),
10912 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10915 /* Don't diagnose the warning attribute in thunks, those are
10916 artificially created. */
10917 && !CALL_FROM_THUNK_P (exp
)
10918 && (attr
= lookup_attribute ("warning",
10919 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10921 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
10922 warning_at (tree_nonartificial_location (exp
), 0,
10923 "%Kcall to %qs declared with attribute warning: %s",
10924 exp
, identifier_to_locale (ident
),
10925 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10928 /* Check for a built-in function. */
10929 if (fndecl
&& DECL_BUILT_IN (fndecl
))
10931 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
10932 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
10935 return expand_call (exp
, target
, ignore
);
10937 case VIEW_CONVERT_EXPR
:
10940 /* If we are converting to BLKmode, try to avoid an intermediate
10941 temporary by fetching an inner memory reference. */
10942 if (mode
== BLKmode
10943 && poly_int_tree_p (TYPE_SIZE (type
))
10944 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
10945 && handled_component_p (treeop0
))
10947 machine_mode mode1
;
10948 poly_int64 bitsize
, bitpos
, bytepos
;
10950 int unsignedp
, reversep
, volatilep
= 0;
10952 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
10953 &unsignedp
, &reversep
, &volatilep
);
10956 /* ??? We should work harder and deal with non-zero offsets. */
10958 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10960 && known_size_p (bitsize
)
10961 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
10963 /* See the normal_inner_ref case for the rationale. */
10965 = expand_expr_real (tem
,
10966 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10967 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10969 && modifier
!= EXPAND_STACK_PARM
10970 ? target
: NULL_RTX
),
10972 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10975 if (MEM_P (orig_op0
))
10979 /* Get a reference to just this component. */
10980 if (modifier
== EXPAND_CONST_ADDRESS
10981 || modifier
== EXPAND_SUM
10982 || modifier
== EXPAND_INITIALIZER
)
10983 op0
= adjust_address_nv (op0
, mode
, bytepos
);
10985 op0
= adjust_address (op0
, mode
, bytepos
);
10987 if (op0
== orig_op0
)
10988 op0
= copy_rtx (op0
);
10990 set_mem_attributes (op0
, treeop0
, 0);
10991 if (REG_P (XEXP (op0
, 0)))
10992 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10994 MEM_VOLATILE_P (op0
) |= volatilep
;
11000 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11001 NULL
, inner_reference_p
);
11003 /* If the input and output modes are both the same, we are done. */
11004 if (mode
== GET_MODE (op0
))
11006 /* If neither mode is BLKmode, and both modes are the same size
11007 then we can use gen_lowpart. */
11008 else if (mode
!= BLKmode
11009 && GET_MODE (op0
) != BLKmode
11010 && known_eq (GET_MODE_PRECISION (mode
),
11011 GET_MODE_PRECISION (GET_MODE (op0
)))
11012 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11014 if (GET_CODE (op0
) == SUBREG
)
11015 op0
= force_reg (GET_MODE (op0
), op0
);
11016 temp
= gen_lowpart_common (mode
, op0
);
11021 if (!REG_P (op0
) && !MEM_P (op0
))
11022 op0
= force_reg (GET_MODE (op0
), op0
);
11023 op0
= gen_lowpart (mode
, op0
);
11026 /* If both types are integral, convert from one mode to the other. */
11027 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11028 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11029 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11030 /* If the output type is a bit-field type, do an extraction. */
11031 else if (reduce_bit_field
)
11032 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11033 TYPE_UNSIGNED (type
), NULL_RTX
,
11034 mode
, mode
, false, NULL
);
11035 /* As a last resort, spill op0 to memory, and reload it in a
11037 else if (!MEM_P (op0
))
11039 /* If the operand is not a MEM, force it into memory. Since we
11040 are going to be changing the mode of the MEM, don't call
11041 force_const_mem for constants because we don't allow pool
11042 constants to change mode. */
11043 tree inner_type
= TREE_TYPE (treeop0
);
11045 gcc_assert (!TREE_ADDRESSABLE (exp
));
11047 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11049 = assign_stack_temp_for_type
11050 (TYPE_MODE (inner_type
),
11051 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11053 emit_move_insn (target
, op0
);
11057 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11058 output type is such that the operand is known to be aligned, indicate
11059 that it is. Otherwise, we need only be concerned about alignment for
11060 non-BLKmode results. */
11063 enum insn_code icode
;
11065 if (modifier
!= EXPAND_WRITE
11066 && modifier
!= EXPAND_MEMORY
11067 && !inner_reference_p
11069 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11071 /* If the target does have special handling for unaligned
11072 loads of mode then use them. */
11073 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11074 != CODE_FOR_nothing
)
11078 op0
= adjust_address (op0
, mode
, 0);
11079 /* We've already validated the memory, and we're creating a
11080 new pseudo destination. The predicates really can't
11082 reg
= gen_reg_rtx (mode
);
11084 /* Nor can the insn generator. */
11085 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11089 else if (STRICT_ALIGNMENT
)
11091 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11092 poly_uint64 temp_size
= mode_size
;
11093 if (GET_MODE (op0
) != BLKmode
)
11094 temp_size
= upper_bound (temp_size
,
11095 GET_MODE_SIZE (GET_MODE (op0
)));
11097 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11098 rtx new_with_op0_mode
11099 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11101 gcc_assert (!TREE_ADDRESSABLE (exp
));
11103 if (GET_MODE (op0
) == BLKmode
)
11105 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11106 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11107 (modifier
== EXPAND_STACK_PARM
11108 ? BLOCK_OP_CALL_PARM
11109 : BLOCK_OP_NORMAL
));
11112 emit_move_insn (new_with_op0_mode
, op0
);
11118 op0
= adjust_address (op0
, mode
, 0);
11125 tree lhs
= treeop0
;
11126 tree rhs
= treeop1
;
11127 gcc_assert (ignore
);
11129 /* Check for |= or &= of a bitfield of size one into another bitfield
11130 of size 1. In this case, (unless we need the result of the
11131 assignment) we can do this more efficiently with a
11132 test followed by an assignment, if necessary.
11134 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11135 things change so we do, this code should be enhanced to
11137 if (TREE_CODE (lhs
) == COMPONENT_REF
11138 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11139 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11140 && TREE_OPERAND (rhs
, 0) == lhs
11141 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11142 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11143 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11145 rtx_code_label
*label
= gen_label_rtx ();
11146 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11147 do_jump (TREE_OPERAND (rhs
, 1),
11150 profile_probability::uninitialized ());
11151 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11153 do_pending_stack_adjust ();
11154 emit_label (label
);
11158 expand_assignment (lhs
, rhs
, false);
11163 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11165 case REALPART_EXPR
:
11166 op0
= expand_normal (treeop0
);
11167 return read_complex_part (op0
, false);
11169 case IMAGPART_EXPR
:
11170 op0
= expand_normal (treeop0
);
11171 return read_complex_part (op0
, true);
11178 /* Expanded in cfgexpand.c. */
11179 gcc_unreachable ();
11181 case TRY_CATCH_EXPR
:
11183 case EH_FILTER_EXPR
:
11184 case TRY_FINALLY_EXPR
:
11185 /* Lowered by tree-eh.c. */
11186 gcc_unreachable ();
11188 case WITH_CLEANUP_EXPR
:
11189 case CLEANUP_POINT_EXPR
:
11191 case CASE_LABEL_EXPR
:
11196 case COMPOUND_EXPR
:
11197 case PREINCREMENT_EXPR
:
11198 case PREDECREMENT_EXPR
:
11199 case POSTINCREMENT_EXPR
:
11200 case POSTDECREMENT_EXPR
:
11203 case COMPOUND_LITERAL_EXPR
:
11204 /* Lowered by gimplify.c. */
11205 gcc_unreachable ();
11208 /* Function descriptors are not valid except for as
11209 initialization constants, and should not be expanded. */
11210 gcc_unreachable ();
11212 case WITH_SIZE_EXPR
:
11213 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11214 have pulled out the size to use in whatever context it needed. */
11215 return expand_expr_real (treeop0
, original_target
, tmode
,
11216 modifier
, alt_rtl
, inner_reference_p
);
11219 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11223 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11224 signedness of TYPE), possibly returning the result in TARGET.
11225 TYPE is known to be a partial integer type. */
11227 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11229 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11230 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11232 /* For constant values, reduce using build_int_cst_type. */
11233 poly_int64 const_exp
;
11234 if (poly_int_rtx_p (exp
, &const_exp
))
11236 tree t
= build_int_cst_type (type
, const_exp
);
11237 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11239 else if (TYPE_UNSIGNED (type
))
11241 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11242 rtx mask
= immed_wide_int_const
11243 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11244 return expand_and (mode
, exp
, mask
, target
);
11248 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11249 int count
= GET_MODE_PRECISION (mode
) - prec
;
11250 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11251 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11255 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11256 when applied to the address of EXP produces an address known to be
11257 aligned more than BIGGEST_ALIGNMENT. */
11260 is_aligning_offset (const_tree offset
, const_tree exp
)
11262 /* Strip off any conversions. */
11263 while (CONVERT_EXPR_P (offset
))
11264 offset
= TREE_OPERAND (offset
, 0);
11266 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11267 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11268 if (TREE_CODE (offset
) != BIT_AND_EXPR
11269 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11270 || compare_tree_int (TREE_OPERAND (offset
, 1),
11271 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11272 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11275 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11276 It must be NEGATE_EXPR. Then strip any more conversions. */
11277 offset
= TREE_OPERAND (offset
, 0);
11278 while (CONVERT_EXPR_P (offset
))
11279 offset
= TREE_OPERAND (offset
, 0);
11281 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11284 offset
= TREE_OPERAND (offset
, 0);
11285 while (CONVERT_EXPR_P (offset
))
11286 offset
= TREE_OPERAND (offset
, 0);
11288 /* This must now be the address of EXP. */
11289 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11292 /* Return the tree node if an ARG corresponds to a string constant or zero
11293 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11294 non-constant) offset in bytes within the string that ARG is accessing.
11295 The type of the offset is sizetype. If MEM_SIZE is non-zero the storage
11296 size of the memory is returned. If MEM_SIZE is zero, the string is
11297 only returned when it is properly zero terminated. */
11300 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
)
11305 /* Non-constant index into the character array in an ARRAY_REF
11306 expression or null. */
11307 tree varidx
= NULL_TREE
;
11309 poly_int64 base_off
= 0;
11311 if (TREE_CODE (arg
) == ADDR_EXPR
)
11313 arg
= TREE_OPERAND (arg
, 0);
11315 if (TREE_CODE (arg
) == ARRAY_REF
)
11317 tree idx
= TREE_OPERAND (arg
, 1);
11318 if (TREE_CODE (idx
) != INTEGER_CST
)
11320 /* From a pointer (but not array) argument extract the variable
11321 index to prevent get_addr_base_and_unit_offset() from failing
11322 due to it. Use it later to compute the non-constant offset
11323 into the string and return it to the caller. */
11325 ref
= TREE_OPERAND (arg
, 0);
11327 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11331 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11333 || (TREE_CODE (array
) != VAR_DECL
11334 && TREE_CODE (array
) != CONST_DECL
11335 && TREE_CODE (array
) != STRING_CST
))
11338 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11340 tree arg0
= TREE_OPERAND (arg
, 0);
11341 tree arg1
= TREE_OPERAND (arg
, 1);
11346 if (TREE_CODE (arg0
) == ADDR_EXPR
)
11347 ; /* Do nothing. */
11348 else if (TREE_CODE (arg1
) == ADDR_EXPR
)
11349 std::swap (arg0
, arg1
);
11354 if (tree str
= string_constant (arg0
, &offset
, mem_size
))
11356 /* Avoid pointers to arrays (see bug 86622). */
11357 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11358 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11359 && TREE_CODE (TREE_OPERAND (arg0
, 0)) == ARRAY_REF
)
11362 tree type
= TREE_TYPE (arg1
);
11363 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11368 else if (DECL_P (arg
))
11373 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11376 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11379 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11380 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11381 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11384 tree charsize
= array_ref_element_size (arg
);
11385 /* Set the non-constant offset to the non-constant index scaled
11386 by the size of the character type. */
11387 offset
= fold_build2 (MULT_EXPR
, TREE_TYPE (offset
),
11388 fold_convert (sizetype
, varidx
), charsize
);
11391 if (TREE_CODE (array
) == STRING_CST
)
11393 *ptr_offset
= fold_convert (sizetype
, offset
);
11395 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11399 if (!VAR_P (array
) && TREE_CODE (array
) != CONST_DECL
)
11402 tree init
= ctor_for_folding (array
);
11404 /* Handle variables initialized with string literals. */
11405 if (!init
|| init
== error_mark_node
)
11407 if (TREE_CODE (init
) == CONSTRUCTOR
)
11409 /* Convert the 64-bit constant offset to a wider type to avoid
11412 if (!base_off
.is_constant (&wioff
))
11415 wioff
*= BITS_PER_UNIT
;
11416 if (!wi::fits_uhwi_p (wioff
))
11419 base_off
= wioff
.to_uhwi ();
11420 unsigned HOST_WIDE_INT fieldoff
= 0;
11421 init
= fold_ctor_reference (NULL_TREE
, init
, base_off
, 0, array
,
11423 HOST_WIDE_INT cstoff
;
11424 if (!base_off
.is_constant (&cstoff
))
11427 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11428 tree off
= build_int_cst (sizetype
, cstoff
);
11430 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11435 if (!init
|| TREE_CODE (init
) != STRING_CST
)
11438 tree array_size
= DECL_SIZE_UNIT (array
);
11439 if (!array_size
|| TREE_CODE (array_size
) != INTEGER_CST
)
11442 /* Avoid returning a string that doesn't fit in the array
11443 it is stored in, like
11444 const char a[4] = "abcde";
11445 but do handle those that fit even if they have excess
11446 initializers, such as in
11447 const char a[4] = "abc\000\000";
11448 The excess elements contribute to TREE_STRING_LENGTH()
11449 but not to strlen(). */
11450 unsigned HOST_WIDE_INT charsize
11451 = tree_to_uhwi (TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (init
))));
11452 unsigned HOST_WIDE_INT length
= TREE_STRING_LENGTH (init
);
11453 length
= string_length (TREE_STRING_POINTER (init
), charsize
,
11454 length
/ charsize
);
11456 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (init
));
11457 else if (compare_tree_int (array_size
, length
+ 1) < 0)
11460 *ptr_offset
= offset
;
11464 /* Generate code to calculate OPS, and exploded expression
11465 using a store-flag instruction and return an rtx for the result.
11466 OPS reflects a comparison.
11468 If TARGET is nonzero, store the result there if convenient.
11470 Return zero if there is no suitable set-flag instruction
11471 available on this machine.
11473 Once expand_expr has been called on the arguments of the comparison,
11474 we are committed to doing the store flag, since it is not safe to
11475 re-evaluate the expression. We emit the store-flag insn by calling
11476 emit_store_flag, but only expand the arguments if we have a reason
11477 to believe that emit_store_flag will be successful. If we think that
11478 it will, but it isn't, we have to simulate the store-flag with a
11479 set/jump/set sequence. */
11482 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11484 enum rtx_code code
;
11485 tree arg0
, arg1
, type
;
11486 machine_mode operand_mode
;
11489 rtx subtarget
= target
;
11490 location_t loc
= ops
->location
;
11495 /* Don't crash if the comparison was erroneous. */
11496 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11499 type
= TREE_TYPE (arg0
);
11500 operand_mode
= TYPE_MODE (type
);
11501 unsignedp
= TYPE_UNSIGNED (type
);
11503 /* We won't bother with BLKmode store-flag operations because it would mean
11504 passing a lot of information to emit_store_flag. */
11505 if (operand_mode
== BLKmode
)
11508 /* We won't bother with store-flag operations involving function pointers
11509 when function pointers must be canonicalized before comparisons. */
11510 if (targetm
.have_canonicalize_funcptr_for_compare ()
11511 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
11512 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
11514 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
11515 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
11516 == FUNCTION_TYPE
))))
11522 /* For vector typed comparisons emit code to generate the desired
11523 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11524 expander for this. */
11525 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
11527 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
11528 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
11529 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
11530 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
11533 tree if_true
= constant_boolean_node (true, ops
->type
);
11534 tree if_false
= constant_boolean_node (false, ops
->type
);
11535 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
11540 /* Get the rtx comparison code to use. We know that EXP is a comparison
11541 operation of some type. Some comparisons against 1 and -1 can be
11542 converted to comparisons with zero. Do so here so that the tests
11543 below will be aware that we have a comparison with zero. These
11544 tests will not catch constants in the first operand, but constants
11545 are rarely passed as the first operand. */
11556 if (integer_onep (arg1
))
11557 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
11559 code
= unsignedp
? LTU
: LT
;
11562 if (! unsignedp
&& integer_all_onesp (arg1
))
11563 arg1
= integer_zero_node
, code
= LT
;
11565 code
= unsignedp
? LEU
: LE
;
11568 if (! unsignedp
&& integer_all_onesp (arg1
))
11569 arg1
= integer_zero_node
, code
= GE
;
11571 code
= unsignedp
? GTU
: GT
;
11574 if (integer_onep (arg1
))
11575 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
11577 code
= unsignedp
? GEU
: GE
;
11580 case UNORDERED_EXPR
:
11606 gcc_unreachable ();
11609 /* Put a constant second. */
11610 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
11611 || TREE_CODE (arg0
) == FIXED_CST
)
11613 std::swap (arg0
, arg1
);
11614 code
= swap_condition (code
);
11617 /* If this is an equality or inequality test of a single bit, we can
11618 do this by shifting the bit being tested to the low-order bit and
11619 masking the result with the constant 1. If the condition was EQ,
11620 we xor it with 1. This does not require an scc insn and is faster
11621 than an scc insn even if we have it.
11623 The code to make this transformation was moved into fold_single_bit_test,
11624 so we just call into the folder and expand its result. */
11626 if ((code
== NE
|| code
== EQ
)
11627 && integer_zerop (arg1
)
11628 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
11630 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
11632 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
11634 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
11635 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
11636 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
11637 gimple_assign_rhs1 (srcstmt
),
11638 gimple_assign_rhs2 (srcstmt
));
11639 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
11641 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
11645 if (! get_subtarget (target
)
11646 || GET_MODE (subtarget
) != operand_mode
)
11649 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
11652 target
= gen_reg_rtx (mode
);
11654 /* Try a cstore if possible. */
11655 return emit_store_flag_force (target
, code
, op0
, op1
,
11656 operand_mode
, unsignedp
,
11657 (TYPE_PRECISION (ops
->type
) == 1
11658 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
11661 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11662 0 otherwise (i.e. if there is no casesi instruction).
11664 DEFAULT_PROBABILITY is the probability of jumping to the default
11667 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
11668 rtx table_label
, rtx default_label
, rtx fallback_label
,
11669 profile_probability default_probability
)
11671 struct expand_operand ops
[5];
11672 scalar_int_mode index_mode
= SImode
;
11673 rtx op1
, op2
, index
;
11675 if (! targetm
.have_casesi ())
11678 /* The index must be some form of integer. Convert it to SImode. */
11679 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
11680 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
11682 rtx rangertx
= expand_normal (range
);
11684 /* We must handle the endpoints in the original mode. */
11685 index_expr
= build2 (MINUS_EXPR
, index_type
,
11686 index_expr
, minval
);
11687 minval
= integer_zero_node
;
11688 index
= expand_normal (index_expr
);
11690 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
11691 omode
, 1, default_label
,
11692 default_probability
);
11693 /* Now we can safely truncate. */
11694 index
= convert_to_mode (index_mode
, index
, 0);
11698 if (omode
!= index_mode
)
11700 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
11701 index_expr
= fold_convert (index_type
, index_expr
);
11704 index
= expand_normal (index_expr
);
11707 do_pending_stack_adjust ();
11709 op1
= expand_normal (minval
);
11710 op2
= expand_normal (range
);
11712 create_input_operand (&ops
[0], index
, index_mode
);
11713 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
11714 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
11715 create_fixed_operand (&ops
[3], table_label
);
11716 create_fixed_operand (&ops
[4], (default_label
11718 : fallback_label
));
11719 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
11723 /* Attempt to generate a tablejump instruction; same concept. */
11724 /* Subroutine of the next function.
11726 INDEX is the value being switched on, with the lowest value
11727 in the table already subtracted.
11728 MODE is its expected mode (needed if INDEX is constant).
11729 RANGE is the length of the jump table.
11730 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11732 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11733 index value is out of range.
11734 DEFAULT_PROBABILITY is the probability of jumping to
11735 the default label. */
11738 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
11739 rtx default_label
, profile_probability default_probability
)
11743 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
11744 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
11746 /* Do an unsigned comparison (in the proper mode) between the index
11747 expression and the value which represents the length of the range.
11748 Since we just finished subtracting the lower bound of the range
11749 from the index expression, this comparison allows us to simultaneously
11750 check that the original index expression value is both greater than
11751 or equal to the minimum value of the range and less than or equal to
11752 the maximum value of the range. */
11755 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
11756 default_label
, default_probability
);
11758 /* If index is in range, it must fit in Pmode.
11759 Convert to Pmode so we can index with it. */
11762 unsigned int width
;
11764 /* We know the value of INDEX is between 0 and RANGE. If we have a
11765 sign-extended subreg, and RANGE does not have the sign bit set, then
11766 we have a value that is valid for both sign and zero extension. In
11767 this case, we get better code if we sign extend. */
11768 if (GET_CODE (index
) == SUBREG
11769 && SUBREG_PROMOTED_VAR_P (index
)
11770 && SUBREG_PROMOTED_SIGNED_P (index
)
11771 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
11772 <= HOST_BITS_PER_WIDE_INT
)
11773 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
11774 index
= convert_to_mode (Pmode
, index
, 0);
11776 index
= convert_to_mode (Pmode
, index
, 1);
11779 /* Don't let a MEM slip through, because then INDEX that comes
11780 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11781 and break_out_memory_refs will go to work on it and mess it up. */
11782 #ifdef PIC_CASE_VECTOR_ADDRESS
11783 if (flag_pic
&& !REG_P (index
))
11784 index
= copy_to_mode_reg (Pmode
, index
);
11787 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11788 GET_MODE_SIZE, because this indicates how large insns are. The other
11789 uses should all be Pmode, because they are addresses. This code
11790 could fail if addresses and insns are not the same size. */
11791 index
= simplify_gen_binary (MULT
, Pmode
, index
,
11792 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
11794 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
11795 gen_rtx_LABEL_REF (Pmode
, table_label
));
11797 #ifdef PIC_CASE_VECTOR_ADDRESS
11799 index
= PIC_CASE_VECTOR_ADDRESS (index
);
11802 index
= memory_address (CASE_VECTOR_MODE
, index
);
11803 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
11804 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
11805 convert_move (temp
, vector
, 0);
11807 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
11809 /* If we are generating PIC code or if the table is PC-relative, the
11810 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11811 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
11816 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
11817 rtx table_label
, rtx default_label
,
11818 profile_probability default_probability
)
11822 if (! targetm
.have_tablejump ())
11825 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
11826 fold_convert (index_type
, index_expr
),
11827 fold_convert (index_type
, minval
));
11828 index
= expand_normal (index_expr
);
11829 do_pending_stack_adjust ();
11831 do_tablejump (index
, TYPE_MODE (index_type
),
11832 convert_modes (TYPE_MODE (index_type
),
11833 TYPE_MODE (TREE_TYPE (range
)),
11834 expand_normal (range
),
11835 TYPE_UNSIGNED (TREE_TYPE (range
))),
11836 table_label
, default_label
, default_probability
);
11840 /* Return a CONST_VECTOR rtx representing vector mask for
11841 a VECTOR_CST of booleans. */
11843 const_vector_mask_from_tree (tree exp
)
11845 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11846 machine_mode inner
= GET_MODE_INNER (mode
);
11848 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
11849 VECTOR_CST_NELTS_PER_PATTERN (exp
));
11850 unsigned int count
= builder
.encoded_nelts ();
11851 for (unsigned int i
= 0; i
< count
; ++i
)
11853 tree elt
= VECTOR_CST_ELT (exp
, i
);
11854 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11855 if (integer_zerop (elt
))
11856 builder
.quick_push (CONST0_RTX (inner
));
11857 else if (integer_onep (elt
)
11858 || integer_minus_onep (elt
))
11859 builder
.quick_push (CONSTM1_RTX (inner
));
11861 gcc_unreachable ();
11863 return builder
.build ();
11866 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11867 Return a constant scalar rtx of mode MODE in which bit X is set if element
11868 X of EXP is nonzero. */
11870 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
11872 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
11875 /* The result has a fixed number of bits so the input must too. */
11876 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
11877 for (unsigned int i
= 0; i
< nunits
; ++i
)
11879 elt
= VECTOR_CST_ELT (exp
, i
);
11880 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11881 if (integer_all_onesp (elt
))
11882 res
= wi::set_bit (res
, i
);
11884 gcc_assert (integer_zerop (elt
));
11887 return immed_wide_int_const (res
, mode
);
11890 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11892 const_vector_from_tree (tree exp
)
11894 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11896 if (initializer_zerop (exp
))
11897 return CONST0_RTX (mode
);
11899 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
11900 return const_vector_mask_from_tree (exp
);
11902 machine_mode inner
= GET_MODE_INNER (mode
);
11904 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
11905 VECTOR_CST_NELTS_PER_PATTERN (exp
));
11906 unsigned int count
= builder
.encoded_nelts ();
11907 for (unsigned int i
= 0; i
< count
; ++i
)
11909 tree elt
= VECTOR_CST_ELT (exp
, i
);
11910 if (TREE_CODE (elt
) == REAL_CST
)
11911 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
11913 else if (TREE_CODE (elt
) == FIXED_CST
)
11914 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
11917 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
11920 return builder
.build ();
11923 /* Build a decl for a personality function given a language prefix. */
11926 build_personality_function (const char *lang
)
11928 const char *unwind_and_version
;
11932 switch (targetm_common
.except_unwind_info (&global_options
))
11937 unwind_and_version
= "_sj0";
11941 unwind_and_version
= "_v0";
11944 unwind_and_version
= "_seh0";
11947 gcc_unreachable ();
11950 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
11952 type
= build_function_type_list (integer_type_node
, integer_type_node
,
11953 long_long_unsigned_type_node
,
11954 ptr_type_node
, ptr_type_node
, NULL_TREE
);
11955 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
11956 get_identifier (name
), type
);
11957 DECL_ARTIFICIAL (decl
) = 1;
11958 DECL_EXTERNAL (decl
) = 1;
11959 TREE_PUBLIC (decl
) = 1;
11961 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11962 are the flags assigned by targetm.encode_section_info. */
11963 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
11968 /* Extracts the personality function of DECL and returns the corresponding
11972 get_personality_function (tree decl
)
11974 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
11975 enum eh_personality_kind pk
;
11977 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
11978 if (pk
== eh_personality_none
)
11982 && pk
== eh_personality_any
)
11983 personality
= lang_hooks
.eh_personality ();
11985 if (pk
== eh_personality_lang
)
11986 gcc_assert (personality
!= NULL_TREE
);
11988 return XEXP (DECL_RTL (personality
), 0);
11991 /* Returns a tree for the size of EXP in bytes. */
11994 tree_expr_size (const_tree exp
)
11997 && DECL_SIZE_UNIT (exp
) != 0)
11998 return DECL_SIZE_UNIT (exp
);
12000 return size_in_bytes (TREE_TYPE (exp
));
12003 /* Return an rtx for the size in bytes of the value of EXP. */
12006 expr_size (tree exp
)
12010 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12011 size
= TREE_OPERAND (exp
, 1);
12014 size
= tree_expr_size (exp
);
12016 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12019 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12022 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12023 if the size can vary or is larger than an integer. */
12025 static HOST_WIDE_INT
12026 int_expr_size (tree exp
)
12030 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12031 size
= TREE_OPERAND (exp
, 1);
12034 size
= tree_expr_size (exp
);
12038 if (size
== 0 || !tree_fits_shwi_p (size
))
12041 return tree_to_shwi (size
);