1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
61 #include "tree-chkp.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
);
79 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
80 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
81 static rtx_insn
*compress_float_constant (rtx
, rtx
);
82 static rtx
get_subtarget (rtx
);
83 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
84 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
85 machine_mode
, tree
, alias_set_type
, bool, bool);
87 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
89 static int is_aligning_offset (const_tree
, const_tree
);
90 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
91 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
93 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
95 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
97 static rtx
const_vector_from_tree (tree
);
98 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
99 static tree
tree_expr_size (const_tree
);
100 static HOST_WIDE_INT
int_expr_size (tree
);
101 static void convert_mode_scalar (rtx
, rtx
, int);
104 /* This is run to set up which modes can be used
105 directly in memory and to initialize the block move optab. It is run
106 at the beginning of compilation and when the target is reinitialized. */
109 init_expr_target (void)
116 /* Try indexing by frame ptr and try by stack ptr.
117 It is known that on the Convex the stack ptr isn't a valid index.
118 With luck, one or the other is valid on any machine. */
119 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
120 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
122 /* A scratch register we can modify in-place below to avoid
123 useless RTL allocations. */
124 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
126 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
127 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
128 PATTERN (insn
) = pat
;
130 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
131 mode
= (machine_mode
) ((int) mode
+ 1))
135 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
136 PUT_MODE (mem
, mode
);
137 PUT_MODE (mem1
, mode
);
139 /* See if there is some register that can be used in this mode and
140 directly loaded or stored from memory. */
142 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
143 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
144 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
147 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
150 set_mode_and_regno (reg
, mode
, regno
);
153 SET_DEST (pat
) = reg
;
154 if (recog (pat
, insn
, &num_clobbers
) >= 0)
155 direct_load
[(int) mode
] = 1;
157 SET_SRC (pat
) = mem1
;
158 SET_DEST (pat
) = reg
;
159 if (recog (pat
, insn
, &num_clobbers
) >= 0)
160 direct_load
[(int) mode
] = 1;
163 SET_DEST (pat
) = mem
;
164 if (recog (pat
, insn
, &num_clobbers
) >= 0)
165 direct_store
[(int) mode
] = 1;
168 SET_DEST (pat
) = mem1
;
169 if (recog (pat
, insn
, &num_clobbers
) >= 0)
170 direct_store
[(int) mode
] = 1;
174 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
176 opt_scalar_float_mode mode_iter
;
177 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
179 scalar_float_mode mode
= mode_iter
.require ();
180 scalar_float_mode srcmode
;
181 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
185 ic
= can_extend_p (mode
, srcmode
, 0);
186 if (ic
== CODE_FOR_nothing
)
189 PUT_MODE (mem
, srcmode
);
191 if (insn_operand_matches (ic
, 1, mem
))
192 float_extend_from_mem
[mode
][srcmode
] = true;
197 /* This is run at the start of compiling a function. */
202 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
205 /* Copy data from FROM to TO, where the machine modes are not the same.
206 Both modes may be integer, or both may be floating, or both may be
208 UNSIGNEDP should be nonzero if FROM is an unsigned type.
209 This causes zero-extension instead of sign-extension. */
212 convert_move (rtx to
, rtx from
, int unsignedp
)
214 machine_mode to_mode
= GET_MODE (to
);
215 machine_mode from_mode
= GET_MODE (from
);
217 gcc_assert (to_mode
!= BLKmode
);
218 gcc_assert (from_mode
!= BLKmode
);
220 /* If the source and destination are already the same, then there's
225 /* If FROM is a SUBREG that indicates that we have already done at least
226 the required extension, strip it. We don't handle such SUBREGs as
229 scalar_int_mode to_int_mode
;
230 if (GET_CODE (from
) == SUBREG
231 && SUBREG_PROMOTED_VAR_P (from
)
232 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
233 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
234 >= GET_MODE_PRECISION (to_int_mode
))
235 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
236 from
= gen_lowpart (to_int_mode
, from
), from_mode
= to_int_mode
;
238 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
240 if (to_mode
== from_mode
241 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
243 emit_move_insn (to
, from
);
247 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
249 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
250 GET_MODE_BITSIZE (to_mode
)));
252 if (VECTOR_MODE_P (to_mode
))
253 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
255 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
257 emit_move_insn (to
, from
);
261 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
263 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
264 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
268 convert_mode_scalar (to
, from
, unsignedp
);
271 /* Like convert_move, but deals only with scalar modes. */
274 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
276 /* Both modes should be scalar types. */
277 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
278 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
279 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
280 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
284 gcc_assert (to_real
== from_real
);
286 /* rtx code for making an equivalent value. */
287 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
288 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
296 gcc_assert ((GET_MODE_PRECISION (from_mode
)
297 != GET_MODE_PRECISION (to_mode
))
298 || (DECIMAL_FLOAT_MODE_P (from_mode
)
299 != DECIMAL_FLOAT_MODE_P (to_mode
)));
301 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
302 /* Conversion between decimal float and binary float, same size. */
303 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
304 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
309 /* Try converting directly if the insn is supported. */
311 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
312 if (code
!= CODE_FOR_nothing
)
314 emit_unop_insn (code
, to
, from
,
315 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
319 /* Otherwise use a libcall. */
320 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
322 /* Is this conversion implemented yet? */
323 gcc_assert (libcall
);
326 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
328 insns
= get_insns ();
330 emit_libcall_block (insns
, to
, value
,
331 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
333 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
337 /* Handle pointer conversion. */ /* SPEE 900220. */
338 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
342 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
349 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
352 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
358 /* Targets are expected to provide conversion insns between PxImode and
359 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
360 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
362 scalar_int_mode full_mode
363 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
365 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
366 != CODE_FOR_nothing
);
368 if (full_mode
!= from_mode
)
369 from
= convert_to_mode (full_mode
, from
, unsignedp
);
370 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
374 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
377 scalar_int_mode full_mode
378 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
379 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
380 enum insn_code icode
;
382 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
383 gcc_assert (icode
!= CODE_FOR_nothing
);
385 if (to_mode
== full_mode
)
387 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
391 new_from
= gen_reg_rtx (full_mode
);
392 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
394 /* else proceed to integer conversions below. */
395 from_mode
= full_mode
;
399 /* Make sure both are fixed-point modes or both are not. */
400 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
401 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
402 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
404 /* If we widen from_mode to to_mode and they are in the same class,
405 we won't saturate the result.
406 Otherwise, always saturate the result to play safe. */
407 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
408 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
409 expand_fixed_convert (to
, from
, 0, 0);
411 expand_fixed_convert (to
, from
, 0, 1);
415 /* Now both modes are integers. */
417 /* Handle expanding beyond a word. */
418 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
419 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
426 scalar_mode lowpart_mode
;
427 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
429 /* Try converting directly if the insn is supported. */
430 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
433 /* If FROM is a SUBREG, put it into a register. Do this
434 so that we always generate the same set of insns for
435 better cse'ing; if an intermediate assignment occurred,
436 we won't be doing the operation directly on the SUBREG. */
437 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
438 from
= force_reg (from_mode
, from
);
439 emit_unop_insn (code
, to
, from
, equiv_code
);
442 /* Next, try converting via full word. */
443 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
444 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
445 != CODE_FOR_nothing
))
447 rtx word_to
= gen_reg_rtx (word_mode
);
450 if (reg_overlap_mentioned_p (to
, from
))
451 from
= force_reg (from_mode
, from
);
454 convert_move (word_to
, from
, unsignedp
);
455 emit_unop_insn (code
, to
, word_to
, equiv_code
);
459 /* No special multiword conversion insn; do it by hand. */
462 /* Since we will turn this into a no conflict block, we must ensure
463 the source does not overlap the target so force it into an isolated
464 register when maybe so. Likewise for any MEM input, since the
465 conversion sequence might require several references to it and we
466 must ensure we're getting the same value every time. */
468 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
469 from
= force_reg (from_mode
, from
);
471 /* Get a copy of FROM widened to a word, if necessary. */
472 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
473 lowpart_mode
= word_mode
;
475 lowpart_mode
= from_mode
;
477 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
479 lowpart
= gen_lowpart (lowpart_mode
, to
);
480 emit_move_insn (lowpart
, lowfrom
);
482 /* Compute the value to put in each remaining word. */
484 fill_value
= const0_rtx
;
486 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
487 LT
, lowfrom
, const0_rtx
,
488 lowpart_mode
, 0, -1);
490 /* Fill the remaining words. */
491 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
493 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
494 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
496 gcc_assert (subword
);
498 if (fill_value
!= subword
)
499 emit_move_insn (subword
, fill_value
);
502 insns
= get_insns ();
509 /* Truncating multi-word to a word or less. */
510 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
511 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
514 && ! MEM_VOLATILE_P (from
)
515 && direct_load
[(int) to_mode
]
516 && ! mode_dependent_address_p (XEXP (from
, 0),
517 MEM_ADDR_SPACE (from
)))
519 || GET_CODE (from
) == SUBREG
))
520 from
= force_reg (from_mode
, from
);
521 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
525 /* Now follow all the conversions between integers
526 no more than a word long. */
528 /* For truncation, usually we can just refer to FROM in a narrower mode. */
529 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
530 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
533 && ! MEM_VOLATILE_P (from
)
534 && direct_load
[(int) to_mode
]
535 && ! mode_dependent_address_p (XEXP (from
, 0),
536 MEM_ADDR_SPACE (from
)))
538 || GET_CODE (from
) == SUBREG
))
539 from
= force_reg (from_mode
, from
);
540 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
541 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
542 from
= copy_to_reg (from
);
543 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
547 /* Handle extension. */
548 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
550 /* Convert directly if that works. */
551 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
554 emit_unop_insn (code
, to
, from
, equiv_code
);
559 scalar_mode intermediate
;
563 /* Search for a mode to convert via. */
564 opt_scalar_mode intermediate_iter
;
565 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
567 scalar_mode intermediate
= intermediate_iter
.require ();
568 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
570 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
571 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
573 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
574 != CODE_FOR_nothing
))
576 convert_move (to
, convert_to_mode (intermediate
, from
,
577 unsignedp
), unsignedp
);
582 /* No suitable intermediate mode.
583 Generate what we need with shifts. */
584 shift_amount
= (GET_MODE_PRECISION (to_mode
)
585 - GET_MODE_PRECISION (from_mode
));
586 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
587 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
589 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
592 emit_move_insn (to
, tmp
);
597 /* Support special truncate insns for certain modes. */
598 if (convert_optab_handler (trunc_optab
, to_mode
,
599 from_mode
) != CODE_FOR_nothing
)
601 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
606 /* Handle truncation of volatile memrefs, and so on;
607 the things that couldn't be truncated directly,
608 and for which there was no special instruction.
610 ??? Code above formerly short-circuited this, for most integer
611 mode pairs, with a force_reg in from_mode followed by a recursive
612 call to this routine. Appears always to have been wrong. */
613 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
615 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
616 emit_move_insn (to
, temp
);
620 /* Mode combination is not recognized. */
624 /* Return an rtx for a value that would result
625 from converting X to mode MODE.
626 Both X and MODE may be floating, or both integer.
627 UNSIGNEDP is nonzero if X is an unsigned value.
628 This can be done by referring to a part of X in place
629 or by copying to a new temporary with conversion. */
632 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
634 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
637 /* Return an rtx for a value that would result
638 from converting X from mode OLDMODE to mode MODE.
639 Both modes may be floating, or both integer.
640 UNSIGNEDP is nonzero if X is an unsigned value.
642 This can be done by referring to a part of X in place
643 or by copying to a new temporary with conversion.
645 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
648 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
651 scalar_int_mode int_mode
;
653 /* If FROM is a SUBREG that indicates that we have already done at least
654 the required extension, strip it. */
656 if (GET_CODE (x
) == SUBREG
657 && SUBREG_PROMOTED_VAR_P (x
)
658 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
659 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
660 >= GET_MODE_PRECISION (int_mode
))
661 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
662 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
664 if (GET_MODE (x
) != VOIDmode
)
665 oldmode
= GET_MODE (x
);
670 if (CONST_SCALAR_INT_P (x
)
671 && is_int_mode (mode
, &int_mode
))
673 /* If the caller did not tell us the old mode, then there is not
674 much to do with respect to canonicalization. We have to
675 assume that all the bits are significant. */
676 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
677 oldmode
= MAX_MODE_INT
;
678 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
679 GET_MODE_PRECISION (int_mode
),
680 unsignedp
? UNSIGNED
: SIGNED
);
681 return immed_wide_int_const (w
, int_mode
);
684 /* We can do this with a gen_lowpart if both desired and current modes
685 are integer, and this is either a constant integer, a register, or a
687 scalar_int_mode int_oldmode
;
688 if (is_int_mode (mode
, &int_mode
)
689 && is_int_mode (oldmode
, &int_oldmode
)
690 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
691 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
692 || CONST_POLY_INT_P (x
)
694 && (!HARD_REGISTER_P (x
)
695 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
696 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
697 return gen_lowpart (int_mode
, x
);
699 /* Converting from integer constant into mode is always equivalent to an
701 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
703 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
704 GET_MODE_BITSIZE (oldmode
)));
705 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
708 temp
= gen_reg_rtx (mode
);
709 convert_move (temp
, x
, unsignedp
);
713 /* Return the largest alignment we can use for doing a move (or store)
714 of MAX_PIECES. ALIGN is the largest alignment we could use. */
717 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
719 scalar_int_mode tmode
720 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
722 if (align
>= GET_MODE_ALIGNMENT (tmode
))
723 align
= GET_MODE_ALIGNMENT (tmode
);
726 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
727 opt_scalar_int_mode mode_iter
;
728 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
730 tmode
= mode_iter
.require ();
731 if (GET_MODE_SIZE (tmode
) > max_pieces
732 || targetm
.slow_unaligned_access (tmode
, align
))
737 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
743 /* Return the widest integer mode that is narrower than SIZE bytes. */
745 static scalar_int_mode
746 widest_int_mode_for_size (unsigned int size
)
748 scalar_int_mode result
= NARROWEST_INT_MODE
;
750 gcc_checking_assert (size
> 1);
752 opt_scalar_int_mode tmode
;
753 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
754 if (GET_MODE_SIZE (tmode
.require ()) < size
)
755 result
= tmode
.require ();
760 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
761 and should be performed piecewise. */
764 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
765 enum by_pieces_operation op
)
767 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
768 optimize_insn_for_speed_p ());
771 /* Determine whether the LEN bytes can be moved by using several move
772 instructions. Return nonzero if a call to move_by_pieces should
776 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
778 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
781 /* Return number of insns required to perform operation OP by pieces
782 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
784 unsigned HOST_WIDE_INT
785 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
786 unsigned int max_size
, by_pieces_operation op
)
788 unsigned HOST_WIDE_INT n_insns
= 0;
790 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
792 while (max_size
> 1 && l
> 0)
794 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
795 enum insn_code icode
;
797 unsigned int modesize
= GET_MODE_SIZE (mode
);
799 icode
= optab_handler (mov_optab
, mode
);
800 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
802 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
810 case COMPARE_BY_PIECES
:
811 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
812 int batch_ops
= 4 * batch
- 1;
813 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
814 n_insns
+= full
* batch_ops
;
815 if (n_pieces
% batch
!= 0)
828 /* Used when performing piecewise block operations, holds information
829 about one of the memory objects involved. The member functions
830 can be used to generate code for loading from the object and
831 updating the address when iterating. */
835 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
838 /* The address of the object. Can differ from that seen in the
839 MEM rtx if we copied the address to a register. */
841 /* Nonzero if the address on the object has an autoincrement already,
842 signifies whether that was an increment or decrement. */
843 signed char m_addr_inc
;
844 /* Nonzero if we intend to use autoinc without the address already
845 having autoinc form. We will insert add insns around each memory
846 reference, expecting later passes to form autoinc addressing modes.
847 The only supported options are predecrement and postincrement. */
848 signed char m_explicit_inc
;
849 /* True if we have either of the two possible cases of using
852 /* True if this is an address to be used for load operations rather
856 /* Optionally, a function to obtain constants for any given offset into
857 the objects, and data associated with it. */
858 by_pieces_constfn m_constfn
;
861 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
862 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
863 void increment_address (HOST_WIDE_INT
);
864 void maybe_predec (HOST_WIDE_INT
);
865 void maybe_postinc (HOST_WIDE_INT
);
866 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
873 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
874 true if the operation to be performed on this object is a load
875 rather than a store. For stores, OBJ can be NULL, in which case we
876 assume the operation is a stack push. For loads, the optional
877 CONSTFN and its associated CFNDATA can be used in place of the
880 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
882 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
888 rtx addr
= XEXP (obj
, 0);
889 rtx_code code
= GET_CODE (addr
);
891 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
892 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
895 m_addr_inc
= dec
? -1 : 1;
897 /* While we have always looked for these codes here, the code
898 implementing the memory operation has never handled them.
899 Support could be added later if necessary or beneficial. */
900 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
908 if (STACK_GROWS_DOWNWARD
)
914 gcc_assert (constfn
!= NULL
);
918 gcc_assert (is_load
);
921 /* Decide whether to use autoinc for an address involved in a memory op.
922 MODE is the mode of the accesses, REVERSE is true if we've decided to
923 perform the operation starting from the end, and LEN is the length of
924 the operation. Don't override an earlier decision to set m_auto. */
927 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
930 if (m_auto
|| m_obj
== NULL_RTX
)
933 bool use_predec
= (m_is_load
934 ? USE_LOAD_PRE_DECREMENT (mode
)
935 : USE_STORE_PRE_DECREMENT (mode
));
936 bool use_postinc
= (m_is_load
937 ? USE_LOAD_POST_INCREMENT (mode
)
938 : USE_STORE_POST_INCREMENT (mode
));
939 machine_mode addr_mode
= get_address_mode (m_obj
);
941 if (use_predec
&& reverse
)
943 m_addr
= copy_to_mode_reg (addr_mode
,
944 plus_constant (addr_mode
,
949 else if (use_postinc
&& !reverse
)
951 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
955 else if (CONSTANT_P (m_addr
))
956 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
959 /* Adjust the address to refer to the data at OFFSET in MODE. If we
960 are using autoincrement for this address, we don't add the offset,
961 but we still modify the MEM's properties. */
964 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
967 return m_constfn (m_cfndata
, offset
, mode
);
968 if (m_obj
== NULL_RTX
)
971 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
973 return adjust_address (m_obj
, mode
, offset
);
976 /* Emit an add instruction to increment the address by SIZE. */
979 pieces_addr::increment_address (HOST_WIDE_INT size
)
981 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
982 emit_insn (gen_add2_insn (m_addr
, amount
));
985 /* If we are supposed to decrement the address after each access, emit code
986 to do so now. Increment by SIZE (which has should have the correct sign
990 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
992 if (m_explicit_inc
>= 0)
994 gcc_assert (HAVE_PRE_DECREMENT
);
995 increment_address (size
);
998 /* If we are supposed to decrement the address after each access, emit code
999 to do so now. Increment by SIZE. */
1002 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1004 if (m_explicit_inc
<= 0)
1006 gcc_assert (HAVE_POST_INCREMENT
);
1007 increment_address (size
);
1010 /* This structure is used by do_op_by_pieces to describe the operation
1013 class op_by_pieces_d
1016 pieces_addr m_to
, m_from
;
1017 unsigned HOST_WIDE_INT m_len
;
1018 HOST_WIDE_INT m_offset
;
1019 unsigned int m_align
;
1020 unsigned int m_max_size
;
1023 /* Virtual functions, overriden by derived classes for the specific
1025 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1026 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1027 virtual void finish_mode (machine_mode
)
1032 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1033 unsigned HOST_WIDE_INT
, unsigned int);
1037 /* The constructor for an op_by_pieces_d structure. We require two
1038 objects named TO and FROM, which are identified as loads or stores
1039 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1040 and its associated FROM_CFN_DATA can be used to replace loads with
1041 constant values. LEN describes the length of the operation. */
1043 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1044 rtx from
, bool from_load
,
1045 by_pieces_constfn from_cfn
,
1046 void *from_cfn_data
,
1047 unsigned HOST_WIDE_INT len
,
1049 : m_to (to
, to_load
, NULL
, NULL
),
1050 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1051 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1053 int toi
= m_to
.get_addr_inc ();
1054 int fromi
= m_from
.get_addr_inc ();
1055 if (toi
>= 0 && fromi
>= 0)
1057 else if (toi
<= 0 && fromi
<= 0)
1062 m_offset
= m_reverse
? len
: 0;
1063 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1064 from
? MEM_ALIGN (from
) : align
);
1066 /* If copying requires more than two move insns,
1067 copy addresses to registers (to make displacements shorter)
1068 and use post-increment if available. */
1069 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1071 /* Find the mode of the largest comparison. */
1072 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1074 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1075 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1078 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1082 /* This function contains the main loop used for expanding a block
1083 operation. First move what we can in the largest integer mode,
1084 then go to successively smaller modes. For every access, call
1085 GENFUN with the two operands and the EXTRA_DATA. */
1088 op_by_pieces_d::run ()
1090 while (m_max_size
> 1 && m_len
> 0)
1092 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1094 if (prepare_mode (mode
, m_align
))
1096 unsigned int size
= GET_MODE_SIZE (mode
);
1097 rtx to1
= NULL_RTX
, from1
;
1099 while (m_len
>= size
)
1104 to1
= m_to
.adjust (mode
, m_offset
);
1105 from1
= m_from
.adjust (mode
, m_offset
);
1107 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1108 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1110 generate (to1
, from1
, mode
);
1112 m_to
.maybe_postinc (size
);
1113 m_from
.maybe_postinc (size
);
1124 m_max_size
= GET_MODE_SIZE (mode
);
1127 /* The code above should have handled everything. */
1128 gcc_assert (!m_len
);
1131 /* Derived class from op_by_pieces_d, providing support for block move
1134 class move_by_pieces_d
: public op_by_pieces_d
1136 insn_gen_fn m_gen_fun
;
1137 void generate (rtx
, rtx
, machine_mode
);
1138 bool prepare_mode (machine_mode
, unsigned int);
1141 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1143 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1146 rtx
finish_endp (int);
1149 /* Return true if MODE can be used for a set of copies, given an
1150 alignment ALIGN. Prepare whatever data is necessary for later
1151 calls to generate. */
1154 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1156 insn_code icode
= optab_handler (mov_optab
, mode
);
1157 m_gen_fun
= GEN_FCN (icode
);
1158 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1161 /* A callback used when iterating for a compare_by_pieces_operation.
1162 OP0 and OP1 are the values that have been loaded and should be
1163 compared in MODE. If OP0 is NULL, this means we should generate a
1164 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1165 gen function that should be used to generate the mode. */
1168 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1169 machine_mode mode ATTRIBUTE_UNUSED
)
1171 #ifdef PUSH_ROUNDING
1172 if (op0
== NULL_RTX
)
1174 emit_single_push_insn (mode
, op1
, NULL
);
1178 emit_insn (m_gen_fun (op0
, op1
));
1181 /* Perform the final adjustment at the end of a string to obtain the
1182 correct return value for the block operation. If ENDP is 1 return
1183 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1184 end minus one byte ala stpcpy. */
1187 move_by_pieces_d::finish_endp (int endp
)
1189 gcc_assert (!m_reverse
);
1192 m_to
.maybe_postinc (-1);
1195 return m_to
.adjust (QImode
, m_offset
);
1198 /* Generate several move instructions to copy LEN bytes from block FROM to
1199 block TO. (These are MEM rtx's with BLKmode).
1201 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1202 used to push FROM to the stack.
1204 ALIGN is maximum stack alignment we can assume.
1206 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1207 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1211 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1212 unsigned int align
, int endp
)
1214 #ifndef PUSH_ROUNDING
1219 move_by_pieces_d
data (to
, from
, len
, align
);
1224 return data
.finish_endp (endp
);
1229 /* Derived class from op_by_pieces_d, providing support for block move
1232 class store_by_pieces_d
: public op_by_pieces_d
1234 insn_gen_fn m_gen_fun
;
1235 void generate (rtx
, rtx
, machine_mode
);
1236 bool prepare_mode (machine_mode
, unsigned int);
1239 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1240 unsigned HOST_WIDE_INT len
, unsigned int align
)
1241 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1244 rtx
finish_endp (int);
1247 /* Return true if MODE can be used for a set of stores, given an
1248 alignment ALIGN. Prepare whatever data is necessary for later
1249 calls to generate. */
1252 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1254 insn_code icode
= optab_handler (mov_optab
, mode
);
1255 m_gen_fun
= GEN_FCN (icode
);
1256 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1259 /* A callback used when iterating for a store_by_pieces_operation.
1260 OP0 and OP1 are the values that have been loaded and should be
1261 compared in MODE. If OP0 is NULL, this means we should generate a
1262 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1263 gen function that should be used to generate the mode. */
1266 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1268 emit_insn (m_gen_fun (op0
, op1
));
1271 /* Perform the final adjustment at the end of a string to obtain the
1272 correct return value for the block operation. If ENDP is 1 return
1273 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1274 end minus one byte ala stpcpy. */
1277 store_by_pieces_d::finish_endp (int endp
)
1279 gcc_assert (!m_reverse
);
1282 m_to
.maybe_postinc (-1);
1285 return m_to
.adjust (QImode
, m_offset
);
1288 /* Determine whether the LEN bytes generated by CONSTFUN can be
1289 stored to memory using several move instructions. CONSTFUNDATA is
1290 a pointer which will be passed as argument in every CONSTFUN call.
1291 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1292 a memset operation and false if it's a copy of a constant string.
1293 Return nonzero if a call to store_by_pieces should succeed. */
1296 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1297 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1298 void *constfundata
, unsigned int align
, bool memsetp
)
1300 unsigned HOST_WIDE_INT l
;
1301 unsigned int max_size
;
1302 HOST_WIDE_INT offset
= 0;
1303 enum insn_code icode
;
1305 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1306 rtx cst ATTRIBUTE_UNUSED
;
1311 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1315 optimize_insn_for_speed_p ()))
1318 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1320 /* We would first store what we can in the largest integer mode, then go to
1321 successively smaller modes. */
1324 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1328 max_size
= STORE_MAX_PIECES
+ 1;
1329 while (max_size
> 1 && l
> 0)
1331 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1333 icode
= optab_handler (mov_optab
, mode
);
1334 if (icode
!= CODE_FOR_nothing
1335 && align
>= GET_MODE_ALIGNMENT (mode
))
1337 unsigned int size
= GET_MODE_SIZE (mode
);
1344 cst
= (*constfun
) (constfundata
, offset
, mode
);
1345 if (!targetm
.legitimate_constant_p (mode
, cst
))
1355 max_size
= GET_MODE_SIZE (mode
);
1358 /* The code above should have handled everything. */
1365 /* Generate several move instructions to store LEN bytes generated by
1366 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1367 pointer which will be passed as argument in every CONSTFUN call.
1368 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1369 a memset operation and false if it's a copy of a constant string.
1370 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1371 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1375 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1376 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1377 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
1381 gcc_assert (endp
!= 2);
1385 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1387 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1388 optimize_insn_for_speed_p ()));
1390 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1394 return data
.finish_endp (endp
);
1399 /* Callback routine for clear_by_pieces.
1400 Return const0_rtx unconditionally. */
1403 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1408 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1409 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1412 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1417 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1421 /* Context used by compare_by_pieces_genfn. It stores the fail label
1422 to jump to in case of miscomparison, and for branch ratios greater than 1,
1423 it stores an accumulator and the current and maximum counts before
1424 emitting another branch. */
1426 class compare_by_pieces_d
: public op_by_pieces_d
1428 rtx_code_label
*m_fail_label
;
1430 int m_count
, m_batch
;
1432 void generate (rtx
, rtx
, machine_mode
);
1433 bool prepare_mode (machine_mode
, unsigned int);
1434 void finish_mode (machine_mode
);
1436 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1437 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1438 rtx_code_label
*fail_label
)
1439 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1441 m_fail_label
= fail_label
;
1445 /* A callback used when iterating for a compare_by_pieces_operation.
1446 OP0 and OP1 are the values that have been loaded and should be
1447 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1448 context structure. */
1451 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1455 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1456 true, OPTAB_LIB_WIDEN
);
1458 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1459 true, OPTAB_LIB_WIDEN
);
1460 m_accumulator
= temp
;
1462 if (++m_count
< m_batch
)
1466 op0
= m_accumulator
;
1468 m_accumulator
= NULL_RTX
;
1470 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1471 m_fail_label
, profile_probability::uninitialized ());
1474 /* Return true if MODE can be used for a set of moves and comparisons,
1475 given an alignment ALIGN. Prepare whatever data is necessary for
1476 later calls to generate. */
1479 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1481 insn_code icode
= optab_handler (mov_optab
, mode
);
1482 if (icode
== CODE_FOR_nothing
1483 || align
< GET_MODE_ALIGNMENT (mode
)
1484 || !can_compare_p (EQ
, mode
, ccp_jump
))
1486 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1489 m_accumulator
= NULL_RTX
;
1494 /* Called after expanding a series of comparisons in MODE. If we have
1495 accumulated results for which we haven't emitted a branch yet, do
1499 compare_by_pieces_d::finish_mode (machine_mode mode
)
1501 if (m_accumulator
!= NULL_RTX
)
1502 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1503 NULL_RTX
, NULL
, m_fail_label
,
1504 profile_probability::uninitialized ());
1507 /* Generate several move instructions to compare LEN bytes from blocks
1508 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1510 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1511 used to push FROM to the stack.
1513 ALIGN is maximum stack alignment we can assume.
1515 Optionally, the caller can pass a constfn and associated data in A1_CFN
1516 and A1_CFN_DATA. describing that the second operand being compared is a
1517 known constant and how to obtain its data. */
1520 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1521 rtx target
, unsigned int align
,
1522 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1524 rtx_code_label
*fail_label
= gen_label_rtx ();
1525 rtx_code_label
*end_label
= gen_label_rtx ();
1527 if (target
== NULL_RTX
1528 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1529 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1531 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1536 emit_move_insn (target
, const0_rtx
);
1537 emit_jump (end_label
);
1539 emit_label (fail_label
);
1540 emit_move_insn (target
, const1_rtx
);
1541 emit_label (end_label
);
1546 /* Emit code to move a block Y to a block X. This may be done with
1547 string-move instructions, with multiple scalar move instructions,
1548 or with a library call.
1550 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1551 SIZE is an rtx that says how long they are.
1552 ALIGN is the maximum alignment we can assume they have.
1553 METHOD describes what kind of copy this is, and what mechanisms may be used.
1554 MIN_SIZE is the minimal size of block to move
1555 MAX_SIZE is the maximal size of block to move, if it can not be represented
1556 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1558 Return the address of the new block, if memcpy is called and returns it,
1562 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1563 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1564 unsigned HOST_WIDE_INT min_size
,
1565 unsigned HOST_WIDE_INT max_size
,
1566 unsigned HOST_WIDE_INT probable_max_size
)
1573 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1578 case BLOCK_OP_NORMAL
:
1579 case BLOCK_OP_TAILCALL
:
1580 may_use_call
= true;
1583 case BLOCK_OP_CALL_PARM
:
1584 may_use_call
= block_move_libcall_safe_for_call_parm ();
1586 /* Make inhibit_defer_pop nonzero around the library call
1587 to force it to pop the arguments right away. */
1591 case BLOCK_OP_NO_LIBCALL
:
1592 may_use_call
= false;
1599 gcc_assert (MEM_P (x
) && MEM_P (y
));
1600 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1601 gcc_assert (align
>= BITS_PER_UNIT
);
1603 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1604 block copy is more efficient for other large modes, e.g. DCmode. */
1605 x
= adjust_address (x
, BLKmode
, 0);
1606 y
= adjust_address (y
, BLKmode
, 0);
1608 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1609 can be incorrect is coming from __builtin_memcpy. */
1610 if (CONST_INT_P (size
))
1612 x
= shallow_copy_rtx (x
);
1613 y
= shallow_copy_rtx (y
);
1614 set_mem_size (x
, INTVAL (size
));
1615 set_mem_size (y
, INTVAL (size
));
1618 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1619 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1620 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1621 expected_align
, expected_size
,
1622 min_size
, max_size
, probable_max_size
))
1624 else if (may_use_call
1625 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1626 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1628 /* Since x and y are passed to a libcall, mark the corresponding
1629 tree EXPR as addressable. */
1630 tree y_expr
= MEM_EXPR (y
);
1631 tree x_expr
= MEM_EXPR (x
);
1633 mark_addressable (y_expr
);
1635 mark_addressable (x_expr
);
1636 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1637 method
== BLOCK_OP_TAILCALL
);
1641 emit_block_move_via_loop (x
, y
, size
, align
);
1643 if (method
== BLOCK_OP_CALL_PARM
)
1650 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1652 unsigned HOST_WIDE_INT max
, min
= 0;
1653 if (GET_CODE (size
) == CONST_INT
)
1654 min
= max
= UINTVAL (size
);
1656 max
= GET_MODE_MASK (GET_MODE (size
));
1657 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1661 /* A subroutine of emit_block_move. Returns true if calling the
1662 block move libcall will not clobber any parameters which may have
1663 already been placed on the stack. */
1666 block_move_libcall_safe_for_call_parm (void)
1668 #if defined (REG_PARM_STACK_SPACE)
1672 /* If arguments are pushed on the stack, then they're safe. */
1676 /* If registers go on the stack anyway, any argument is sure to clobber
1677 an outgoing argument. */
1678 #if defined (REG_PARM_STACK_SPACE)
1679 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1680 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1681 depend on its argument. */
1683 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1684 && REG_PARM_STACK_SPACE (fn
) != 0)
1688 /* If any argument goes in memory, then it might clobber an outgoing
1691 CUMULATIVE_ARGS args_so_far_v
;
1692 cumulative_args_t args_so_far
;
1695 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1696 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1697 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1699 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1700 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1702 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1703 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1705 if (!tmp
|| !REG_P (tmp
))
1707 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1709 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1716 /* A subroutine of emit_block_move. Expand a movmem pattern;
1717 return true if successful. */
1720 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1721 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1722 unsigned HOST_WIDE_INT min_size
,
1723 unsigned HOST_WIDE_INT max_size
,
1724 unsigned HOST_WIDE_INT probable_max_size
)
1726 int save_volatile_ok
= volatile_ok
;
1728 if (expected_align
< align
)
1729 expected_align
= align
;
1730 if (expected_size
!= -1)
1732 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1733 expected_size
= probable_max_size
;
1734 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1735 expected_size
= min_size
;
1738 /* Since this is a move insn, we don't care about volatility. */
1741 /* Try the most limited insn first, because there's no point
1742 including more than one in the machine description unless
1743 the more limited one has some advantage. */
1745 opt_scalar_int_mode mode_iter
;
1746 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1748 scalar_int_mode mode
= mode_iter
.require ();
1749 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1751 if (code
!= CODE_FOR_nothing
1752 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1753 here because if SIZE is less than the mode mask, as it is
1754 returned by the macro, it will definitely be less than the
1755 actual mode mask. Since SIZE is within the Pmode address
1756 space, we limit MODE to Pmode. */
1757 && ((CONST_INT_P (size
)
1758 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1759 <= (GET_MODE_MASK (mode
) >> 1)))
1760 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1761 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1763 struct expand_operand ops
[9];
1766 /* ??? When called via emit_block_move_for_call, it'd be
1767 nice if there were some way to inform the backend, so
1768 that it doesn't fail the expansion because it thinks
1769 emitting the libcall would be more efficient. */
1770 nops
= insn_data
[(int) code
].n_generator_args
;
1771 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1773 create_fixed_operand (&ops
[0], x
);
1774 create_fixed_operand (&ops
[1], y
);
1775 /* The check above guarantees that this size conversion is valid. */
1776 create_convert_operand_to (&ops
[2], size
, mode
, true);
1777 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1780 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1781 create_integer_operand (&ops
[5], expected_size
);
1785 create_integer_operand (&ops
[6], min_size
);
1786 /* If we can not represent the maximal size,
1787 make parameter NULL. */
1788 if ((HOST_WIDE_INT
) max_size
!= -1)
1789 create_integer_operand (&ops
[7], max_size
);
1791 create_fixed_operand (&ops
[7], NULL
);
1795 /* If we can not represent the maximal size,
1796 make parameter NULL. */
1797 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1798 create_integer_operand (&ops
[8], probable_max_size
);
1800 create_fixed_operand (&ops
[8], NULL
);
1802 if (maybe_expand_insn (code
, nops
, ops
))
1804 volatile_ok
= save_volatile_ok
;
1810 volatile_ok
= save_volatile_ok
;
1814 /* A subroutine of emit_block_move. Copy the data via an explicit
1815 loop. This is used only when libcalls are forbidden. */
1816 /* ??? It'd be nice to copy in hunks larger than QImode. */
1819 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1820 unsigned int align ATTRIBUTE_UNUSED
)
1822 rtx_code_label
*cmp_label
, *top_label
;
1823 rtx iter
, x_addr
, y_addr
, tmp
;
1824 machine_mode x_addr_mode
= get_address_mode (x
);
1825 machine_mode y_addr_mode
= get_address_mode (y
);
1826 machine_mode iter_mode
;
1828 iter_mode
= GET_MODE (size
);
1829 if (iter_mode
== VOIDmode
)
1830 iter_mode
= word_mode
;
1832 top_label
= gen_label_rtx ();
1833 cmp_label
= gen_label_rtx ();
1834 iter
= gen_reg_rtx (iter_mode
);
1836 emit_move_insn (iter
, const0_rtx
);
1838 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1839 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1840 do_pending_stack_adjust ();
1842 emit_jump (cmp_label
);
1843 emit_label (top_label
);
1845 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1846 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1848 if (x_addr_mode
!= y_addr_mode
)
1849 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1850 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1852 x
= change_address (x
, QImode
, x_addr
);
1853 y
= change_address (y
, QImode
, y_addr
);
1855 emit_move_insn (x
, y
);
1857 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1858 true, OPTAB_LIB_WIDEN
);
1860 emit_move_insn (iter
, tmp
);
1862 emit_label (cmp_label
);
1864 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1866 profile_probability::guessed_always ()
1867 .apply_scale (9, 10));
1870 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1871 TAILCALL is true if this is a tail call. */
1874 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1875 rtx size
, bool tailcall
)
1877 rtx dst_addr
, src_addr
;
1878 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1879 machine_mode size_mode
;
1881 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1882 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1883 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1885 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1886 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1887 src_tree
= make_tree (ptr_type_node
, src_addr
);
1889 size_mode
= TYPE_MODE (sizetype
);
1890 size
= convert_to_mode (size_mode
, size
, 1);
1891 size
= copy_to_mode_reg (size_mode
, size
);
1892 size_tree
= make_tree (sizetype
, size
);
1894 /* It is incorrect to use the libcall calling conventions for calls to
1895 memcpy/memmove/memcmp because they can be provided by the user. */
1896 tree fn
= builtin_decl_implicit (fncode
);
1897 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1898 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1900 return expand_call (call_expr
, NULL_RTX
, false);
1903 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1904 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1905 otherwise return null. */
1908 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1909 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1910 HOST_WIDE_INT align
)
1912 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1914 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1917 struct expand_operand ops
[5];
1918 create_output_operand (&ops
[0], target
, insn_mode
);
1919 create_fixed_operand (&ops
[1], arg1_rtx
);
1920 create_fixed_operand (&ops
[2], arg2_rtx
);
1921 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1922 TYPE_UNSIGNED (arg3_type
));
1923 create_integer_operand (&ops
[4], align
);
1924 if (maybe_expand_insn (icode
, 5, ops
))
1925 return ops
[0].value
;
1929 /* Expand a block compare between X and Y with length LEN using the
1930 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1931 of the expression that was used to calculate the length. ALIGN
1932 gives the known minimum common alignment. */
1935 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1938 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1939 implementing memcmp because it will stop if it encounters two
1941 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1943 if (icode
== CODE_FOR_nothing
)
1946 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1949 /* Emit code to compare a block Y to a block X. This may be done with
1950 string-compare instructions, with multiple scalar instructions,
1951 or with a library call.
1953 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1954 they are. LEN_TYPE is the type of the expression that was used to
1957 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1958 value of a normal memcmp call, instead we can just compare for equality.
1959 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1962 Optionally, the caller can pass a constfn and associated data in Y_CFN
1963 and Y_CFN_DATA. describing that the second operand being compared is a
1964 known constant and how to obtain its data.
1965 Return the result of the comparison, or NULL_RTX if we failed to
1966 perform the operation. */
1969 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1970 bool equality_only
, by_pieces_constfn y_cfn
,
1975 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1978 gcc_assert (MEM_P (x
) && MEM_P (y
));
1979 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1980 gcc_assert (align
>= BITS_PER_UNIT
);
1982 x
= adjust_address (x
, BLKmode
, 0);
1983 y
= adjust_address (y
, BLKmode
, 0);
1986 && CONST_INT_P (len
)
1987 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
1988 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
1991 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
1996 /* Copy all or part of a value X into registers starting at REGNO.
1997 The number of registers to be filled is NREGS. */
2000 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2005 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2006 x
= validize_mem (force_const_mem (mode
, x
));
2008 /* See if the machine can do this with a load multiple insn. */
2009 if (targetm
.have_load_multiple ())
2011 rtx_insn
*last
= get_last_insn ();
2012 rtx first
= gen_rtx_REG (word_mode
, regno
);
2013 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2020 delete_insns_since (last
);
2023 for (int i
= 0; i
< nregs
; i
++)
2024 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2025 operand_subword_force (x
, i
, mode
));
2028 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2029 The number of registers to be filled is NREGS. */
2032 move_block_from_reg (int regno
, rtx x
, int nregs
)
2037 /* See if the machine can do this with a store multiple insn. */
2038 if (targetm
.have_store_multiple ())
2040 rtx_insn
*last
= get_last_insn ();
2041 rtx first
= gen_rtx_REG (word_mode
, regno
);
2042 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2049 delete_insns_since (last
);
2052 for (int i
= 0; i
< nregs
; i
++)
2054 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2058 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2062 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2063 ORIG, where ORIG is a non-consecutive group of registers represented by
2064 a PARALLEL. The clone is identical to the original except in that the
2065 original set of registers is replaced by a new set of pseudo registers.
2066 The new set has the same modes as the original set. */
2069 gen_group_rtx (rtx orig
)
2074 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2076 length
= XVECLEN (orig
, 0);
2077 tmps
= XALLOCAVEC (rtx
, length
);
2079 /* Skip a NULL entry in first slot. */
2080 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2085 for (; i
< length
; i
++)
2087 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2088 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2090 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2093 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2096 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2097 except that values are placed in TMPS[i], and must later be moved
2098 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2101 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2106 machine_mode m
= GET_MODE (orig_src
);
2108 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2111 && !SCALAR_INT_MODE_P (m
)
2112 && !MEM_P (orig_src
)
2113 && GET_CODE (orig_src
) != CONCAT
)
2115 scalar_int_mode imode
;
2116 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2118 src
= gen_reg_rtx (imode
);
2119 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2123 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2124 emit_move_insn (src
, orig_src
);
2126 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2130 /* Check for a NULL entry, used to indicate that the parameter goes
2131 both on the stack and in registers. */
2132 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2137 /* Process the pieces. */
2138 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2140 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2141 poly_int64 bytepos
= INTVAL (XEXP (XVECEXP (dst
, 0, i
), 1));
2142 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2143 poly_int64 shift
= 0;
2145 /* Handle trailing fragments that run over the size of the struct.
2146 It's the target's responsibility to make sure that the fragment
2147 cannot be strictly smaller in some cases and strictly larger
2149 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2150 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2152 /* Arrange to shift the fragment to where it belongs.
2153 extract_bit_field loads to the lsb of the reg. */
2155 #ifdef BLOCK_REG_PADDING
2156 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2157 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2162 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2163 bytelen
= ssize
- bytepos
;
2164 gcc_assert (maybe_gt (bytelen
, 0));
2167 /* If we won't be loading directly from memory, protect the real source
2168 from strange tricks we might play; but make sure that the source can
2169 be loaded directly into the destination. */
2171 if (!MEM_P (orig_src
)
2172 && (!CONSTANT_P (orig_src
)
2173 || (GET_MODE (orig_src
) != mode
2174 && GET_MODE (orig_src
) != VOIDmode
)))
2176 if (GET_MODE (orig_src
) == VOIDmode
)
2177 src
= gen_reg_rtx (mode
);
2179 src
= gen_reg_rtx (GET_MODE (orig_src
));
2181 emit_move_insn (src
, orig_src
);
2184 /* Optimize the access just a bit. */
2186 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2187 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2188 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2189 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2191 tmps
[i
] = gen_reg_rtx (mode
);
2192 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2194 else if (COMPLEX_MODE_P (mode
)
2195 && GET_MODE (src
) == mode
2196 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2197 /* Let emit_move_complex do the bulk of the work. */
2199 else if (GET_CODE (src
) == CONCAT
)
2201 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2202 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2206 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2207 && known_le (subpos
+ bytelen
, slen0
))
2209 /* The following assumes that the concatenated objects all
2210 have the same size. In this case, a simple calculation
2211 can be used to determine the object and the bit field
2213 tmps
[i
] = XEXP (src
, elt
);
2214 if (maybe_ne (subpos
, 0)
2215 || maybe_ne (subpos
+ bytelen
, slen0
)
2216 || (!CONSTANT_P (tmps
[i
])
2217 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2218 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2219 subpos
* BITS_PER_UNIT
,
2220 1, NULL_RTX
, mode
, mode
, false,
2227 gcc_assert (known_eq (bytepos
, 0));
2228 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2229 emit_move_insn (mem
, src
);
2230 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2231 0, 1, NULL_RTX
, mode
, mode
, false,
2235 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2236 SIMD register, which is currently broken. While we get GCC
2237 to emit proper RTL for these cases, let's dump to memory. */
2238 else if (VECTOR_MODE_P (GET_MODE (dst
))
2241 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2244 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2245 emit_move_insn (mem
, src
);
2246 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2248 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2249 && XVECLEN (dst
, 0) > 1)
2250 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2251 else if (CONSTANT_P (src
))
2253 if (known_eq (bytelen
, ssize
))
2259 /* TODO: const_wide_int can have sizes other than this... */
2260 gcc_assert (known_eq (2 * bytelen
, ssize
));
2261 split_double (src
, &first
, &second
);
2268 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2271 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2272 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2273 mode
, mode
, false, NULL
);
2275 if (maybe_ne (shift
, 0))
2276 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2281 /* Emit code to move a block SRC of type TYPE to a block DST,
2282 where DST is non-consecutive registers represented by a PARALLEL.
2283 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2287 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2292 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2293 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2295 /* Copy the extracted pieces into the proper (probable) hard regs. */
2296 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2298 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2301 emit_move_insn (d
, tmps
[i
]);
2305 /* Similar, but load SRC into new pseudos in a format that looks like
2306 PARALLEL. This can later be fed to emit_group_move to get things
2307 in the right place. */
2310 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2315 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2316 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2318 /* Convert the vector to look just like the original PARALLEL, except
2319 with the computed values. */
2320 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2322 rtx e
= XVECEXP (parallel
, 0, i
);
2323 rtx d
= XEXP (e
, 0);
2327 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2328 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2330 RTVEC_ELT (vec
, i
) = e
;
2333 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2336 /* Emit code to move a block SRC to block DST, where SRC and DST are
2337 non-consecutive groups of registers, each represented by a PARALLEL. */
2340 emit_group_move (rtx dst
, rtx src
)
2344 gcc_assert (GET_CODE (src
) == PARALLEL
2345 && GET_CODE (dst
) == PARALLEL
2346 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2348 /* Skip first entry if NULL. */
2349 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2350 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2351 XEXP (XVECEXP (src
, 0, i
), 0));
2354 /* Move a group of registers represented by a PARALLEL into pseudos. */
2357 emit_group_move_into_temps (rtx src
)
2359 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2362 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2364 rtx e
= XVECEXP (src
, 0, i
);
2365 rtx d
= XEXP (e
, 0);
2368 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2369 RTVEC_ELT (vec
, i
) = e
;
2372 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2375 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2376 where SRC is non-consecutive registers represented by a PARALLEL.
2377 SSIZE represents the total size of block ORIG_DST, or -1 if not
2381 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2385 int start
, finish
, i
;
2386 machine_mode m
= GET_MODE (orig_dst
);
2388 gcc_assert (GET_CODE (src
) == PARALLEL
);
2390 if (!SCALAR_INT_MODE_P (m
)
2391 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2393 scalar_int_mode imode
;
2394 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2396 dst
= gen_reg_rtx (imode
);
2397 emit_group_store (dst
, src
, type
, ssize
);
2398 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2402 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2403 emit_group_store (dst
, src
, type
, ssize
);
2405 emit_move_insn (orig_dst
, dst
);
2409 /* Check for a NULL entry, used to indicate that the parameter goes
2410 both on the stack and in registers. */
2411 if (XEXP (XVECEXP (src
, 0, 0), 0))
2415 finish
= XVECLEN (src
, 0);
2417 tmps
= XALLOCAVEC (rtx
, finish
);
2419 /* Copy the (probable) hard regs into pseudos. */
2420 for (i
= start
; i
< finish
; i
++)
2422 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2423 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2425 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2426 emit_move_insn (tmps
[i
], reg
);
2432 /* If we won't be storing directly into memory, protect the real destination
2433 from strange tricks we might play. */
2435 if (GET_CODE (dst
) == PARALLEL
)
2439 /* We can get a PARALLEL dst if there is a conditional expression in
2440 a return statement. In that case, the dst and src are the same,
2441 so no action is necessary. */
2442 if (rtx_equal_p (dst
, src
))
2445 /* It is unclear if we can ever reach here, but we may as well handle
2446 it. Allocate a temporary, and split this into a store/load to/from
2448 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2449 emit_group_store (temp
, src
, type
, ssize
);
2450 emit_group_load (dst
, temp
, type
, ssize
);
2453 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2455 machine_mode outer
= GET_MODE (dst
);
2461 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2462 dst
= gen_reg_rtx (outer
);
2464 /* Make life a bit easier for combine. */
2465 /* If the first element of the vector is the low part
2466 of the destination mode, use a paradoxical subreg to
2467 initialize the destination. */
2470 inner
= GET_MODE (tmps
[start
]);
2471 bytepos
= subreg_lowpart_offset (inner
, outer
);
2472 if (known_eq (INTVAL (XEXP (XVECEXP (src
, 0, start
), 1)), bytepos
))
2474 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2478 emit_move_insn (dst
, temp
);
2485 /* If the first element wasn't the low part, try the last. */
2487 && start
< finish
- 1)
2489 inner
= GET_MODE (tmps
[finish
- 1]);
2490 bytepos
= subreg_lowpart_offset (inner
, outer
);
2491 if (known_eq (INTVAL (XEXP (XVECEXP (src
, 0, finish
- 1), 1)),
2494 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2498 emit_move_insn (dst
, temp
);
2505 /* Otherwise, simply initialize the result to zero. */
2507 emit_move_insn (dst
, CONST0_RTX (outer
));
2510 /* Process the pieces. */
2511 for (i
= start
; i
< finish
; i
++)
2513 poly_int64 bytepos
= INTVAL (XEXP (XVECEXP (src
, 0, i
), 1));
2514 machine_mode mode
= GET_MODE (tmps
[i
]);
2515 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2516 poly_uint64 adj_bytelen
;
2519 /* Handle trailing fragments that run over the size of the struct.
2520 It's the target's responsibility to make sure that the fragment
2521 cannot be strictly smaller in some cases and strictly larger
2523 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2524 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2525 adj_bytelen
= ssize
- bytepos
;
2527 adj_bytelen
= bytelen
;
2529 if (GET_CODE (dst
) == CONCAT
)
2531 if (known_le (bytepos
+ adj_bytelen
,
2532 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2533 dest
= XEXP (dst
, 0);
2534 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2536 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2537 dest
= XEXP (dst
, 1);
2541 machine_mode dest_mode
= GET_MODE (dest
);
2542 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2544 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2546 if (GET_MODE_ALIGNMENT (dest_mode
)
2547 >= GET_MODE_ALIGNMENT (tmp_mode
))
2549 dest
= assign_stack_temp (dest_mode
,
2550 GET_MODE_SIZE (dest_mode
));
2551 emit_move_insn (adjust_address (dest
,
2559 dest
= assign_stack_temp (tmp_mode
,
2560 GET_MODE_SIZE (tmp_mode
));
2561 emit_move_insn (dest
, tmps
[i
]);
2562 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2568 /* Handle trailing fragments that run over the size of the struct. */
2569 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2571 /* store_bit_field always takes its value from the lsb.
2572 Move the fragment to the lsb if it's not already there. */
2574 #ifdef BLOCK_REG_PADDING
2575 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2576 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2582 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2583 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2587 /* Make sure not to write past the end of the struct. */
2588 store_bit_field (dest
,
2589 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2590 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2591 VOIDmode
, tmps
[i
], false);
2594 /* Optimize the access just a bit. */
2595 else if (MEM_P (dest
)
2596 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2597 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2598 && multiple_p (bytepos
* BITS_PER_UNIT
,
2599 GET_MODE_ALIGNMENT (mode
))
2600 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2601 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2604 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2605 0, 0, mode
, tmps
[i
], false);
2608 /* Copy from the pseudo into the (probable) hard reg. */
2609 if (orig_dst
!= dst
)
2610 emit_move_insn (orig_dst
, dst
);
2613 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2614 of the value stored in X. */
2617 maybe_emit_group_store (rtx x
, tree type
)
2619 machine_mode mode
= TYPE_MODE (type
);
2620 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2621 if (GET_CODE (x
) == PARALLEL
)
2623 rtx result
= gen_reg_rtx (mode
);
2624 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2630 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2632 This is used on targets that return BLKmode values in registers. */
2635 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2637 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2638 rtx src
= NULL
, dst
= NULL
;
2639 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2640 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2641 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2642 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2643 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2644 fixed_size_mode copy_mode
;
2646 /* BLKmode registers created in the back-end shouldn't have survived. */
2647 gcc_assert (mode
!= BLKmode
);
2649 /* If the structure doesn't take up a whole number of words, see whether
2650 SRCREG is padded on the left or on the right. If it's on the left,
2651 set PADDING_CORRECTION to the number of bits to skip.
2653 In most ABIs, the structure will be returned at the least end of
2654 the register, which translates to right padding on little-endian
2655 targets and left padding on big-endian targets. The opposite
2656 holds if the structure is returned at the most significant
2657 end of the register. */
2658 if (bytes
% UNITS_PER_WORD
!= 0
2659 && (targetm
.calls
.return_in_msb (type
)
2661 : BYTES_BIG_ENDIAN
))
2663 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2665 /* We can use a single move if we have an exact mode for the size. */
2666 else if (MEM_P (target
)
2667 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2668 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2669 && bytes
== GET_MODE_SIZE (mode
))
2671 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2675 /* And if we additionally have the same mode for a register. */
2676 else if (REG_P (target
)
2677 && GET_MODE (target
) == mode
2678 && bytes
== GET_MODE_SIZE (mode
))
2680 emit_move_insn (target
, srcreg
);
2684 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2685 into a new pseudo which is a full word. */
2686 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2688 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2692 /* Copy the structure BITSIZE bits at a time. If the target lives in
2693 memory, take care of not reading/writing past its end by selecting
2694 a copy mode suited to BITSIZE. This should always be possible given
2697 If the target lives in register, make sure not to select a copy mode
2698 larger than the mode of the register.
2700 We could probably emit more efficient code for machines which do not use
2701 strict alignment, but it doesn't seem worth the effort at the current
2704 copy_mode
= word_mode
;
2707 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2708 if (mem_mode
.exists ())
2709 copy_mode
= mem_mode
.require ();
2711 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2714 for (bitpos
= 0, xbitpos
= padding_correction
;
2715 bitpos
< bytes
* BITS_PER_UNIT
;
2716 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2718 /* We need a new source operand each time xbitpos is on a
2719 word boundary and when xbitpos == padding_correction
2720 (the first time through). */
2721 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2722 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2724 /* We need a new destination operand each time bitpos is on
2726 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2728 else if (bitpos
% BITS_PER_WORD
== 0)
2729 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2731 /* Use xbitpos for the source extraction (right justified) and
2732 bitpos for the destination store (left justified). */
2733 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2734 extract_bit_field (src
, bitsize
,
2735 xbitpos
% BITS_PER_WORD
, 1,
2736 NULL_RTX
, copy_mode
, copy_mode
,
2742 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2743 register if it contains any data, otherwise return null.
2745 This is used on targets that return BLKmode values in registers. */
2748 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2751 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2752 unsigned int bitsize
;
2753 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2754 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2755 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2756 fixed_size_mode dst_mode
;
2758 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2760 x
= expand_normal (src
);
2762 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2766 /* If the structure doesn't take up a whole number of words, see
2767 whether the register value should be padded on the left or on
2768 the right. Set PADDING_CORRECTION to the number of padding
2769 bits needed on the left side.
2771 In most ABIs, the structure will be returned at the least end of
2772 the register, which translates to right padding on little-endian
2773 targets and left padding on big-endian targets. The opposite
2774 holds if the structure is returned at the most significant
2775 end of the register. */
2776 if (bytes
% UNITS_PER_WORD
!= 0
2777 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2779 : BYTES_BIG_ENDIAN
))
2780 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2783 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2784 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2785 bitsize
= BITS_PER_WORD
;
2786 if (targetm
.slow_unaligned_access (word_mode
, TYPE_ALIGN (TREE_TYPE (src
))))
2787 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2789 /* Copy the structure BITSIZE bits at a time. */
2790 for (bitpos
= 0, xbitpos
= padding_correction
;
2791 bitpos
< bytes
* BITS_PER_UNIT
;
2792 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2794 /* We need a new destination pseudo each time xbitpos is
2795 on a word boundary and when xbitpos == padding_correction
2796 (the first time through). */
2797 if (xbitpos
% BITS_PER_WORD
== 0
2798 || xbitpos
== padding_correction
)
2800 /* Generate an appropriate register. */
2801 dst_word
= gen_reg_rtx (word_mode
);
2802 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2804 /* Clear the destination before we move anything into it. */
2805 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2808 /* We need a new source operand each time bitpos is on a word
2810 if (bitpos
% BITS_PER_WORD
== 0)
2811 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2813 /* Use bitpos for the source extraction (left justified) and
2814 xbitpos for the destination store (right justified). */
2815 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2817 extract_bit_field (src_word
, bitsize
,
2818 bitpos
% BITS_PER_WORD
, 1,
2819 NULL_RTX
, word_mode
, word_mode
,
2824 if (mode
== BLKmode
)
2826 /* Find the smallest integer mode large enough to hold the
2827 entire structure. */
2828 opt_scalar_int_mode mode_iter
;
2829 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2830 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2833 /* A suitable mode should have been found. */
2834 mode
= mode_iter
.require ();
2837 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2838 dst_mode
= word_mode
;
2841 dst
= gen_reg_rtx (dst_mode
);
2843 for (i
= 0; i
< n_regs
; i
++)
2844 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2846 if (mode
!= dst_mode
)
2847 dst
= gen_lowpart (mode
, dst
);
2852 /* Add a USE expression for REG to the (possibly empty) list pointed
2853 to by CALL_FUSAGE. REG must denote a hard register. */
2856 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2858 gcc_assert (REG_P (reg
));
2860 if (!HARD_REGISTER_P (reg
))
2864 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2867 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2868 to by CALL_FUSAGE. REG must denote a hard register. */
2871 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2873 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2876 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2879 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2880 starting at REGNO. All of these registers must be hard registers. */
2883 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2887 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2889 for (i
= 0; i
< nregs
; i
++)
2890 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2893 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2894 PARALLEL REGS. This is for calls that pass values in multiple
2895 non-contiguous locations. The Irix 6 ABI has examples of this. */
2898 use_group_regs (rtx
*call_fusage
, rtx regs
)
2902 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2904 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2906 /* A NULL entry means the parameter goes both on the stack and in
2907 registers. This can also be a MEM for targets that pass values
2908 partially on the stack and partially in registers. */
2909 if (reg
!= 0 && REG_P (reg
))
2910 use_reg (call_fusage
, reg
);
2914 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2915 assigment and the code of the expresion on the RHS is CODE. Return
2919 get_def_for_expr (tree name
, enum tree_code code
)
2923 if (TREE_CODE (name
) != SSA_NAME
)
2926 def_stmt
= get_gimple_for_ssa_name (name
);
2928 || gimple_assign_rhs_code (def_stmt
) != code
)
2934 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2935 assigment and the class of the expresion on the RHS is CLASS. Return
2939 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2943 if (TREE_CODE (name
) != SSA_NAME
)
2946 def_stmt
= get_gimple_for_ssa_name (name
);
2948 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2954 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2955 its length in bytes. */
2958 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2959 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2960 unsigned HOST_WIDE_INT min_size
,
2961 unsigned HOST_WIDE_INT max_size
,
2962 unsigned HOST_WIDE_INT probable_max_size
)
2964 machine_mode mode
= GET_MODE (object
);
2967 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2969 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2970 just move a zero. Otherwise, do this a piece at a time. */
2972 && CONST_INT_P (size
)
2973 && known_eq (INTVAL (size
), GET_MODE_SIZE (mode
)))
2975 rtx zero
= CONST0_RTX (mode
);
2978 emit_move_insn (object
, zero
);
2982 if (COMPLEX_MODE_P (mode
))
2984 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
2987 write_complex_part (object
, zero
, 0);
2988 write_complex_part (object
, zero
, 1);
2994 if (size
== const0_rtx
)
2997 align
= MEM_ALIGN (object
);
2999 if (CONST_INT_P (size
)
3000 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3002 optimize_insn_for_speed_p ()))
3003 clear_by_pieces (object
, INTVAL (size
), align
);
3004 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3005 expected_align
, expected_size
,
3006 min_size
, max_size
, probable_max_size
))
3008 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3009 return set_storage_via_libcall (object
, size
, const0_rtx
,
3010 method
== BLOCK_OP_TAILCALL
);
3018 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3020 unsigned HOST_WIDE_INT max
, min
= 0;
3021 if (GET_CODE (size
) == CONST_INT
)
3022 min
= max
= UINTVAL (size
);
3024 max
= GET_MODE_MASK (GET_MODE (size
));
3025 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3029 /* A subroutine of clear_storage. Expand a call to memset.
3030 Return the return value of memset, 0 otherwise. */
3033 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3035 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3036 machine_mode size_mode
;
3038 object
= copy_addr_to_reg (XEXP (object
, 0));
3039 object_tree
= make_tree (ptr_type_node
, object
);
3041 if (!CONST_INT_P (val
))
3042 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3043 val_tree
= make_tree (integer_type_node
, val
);
3045 size_mode
= TYPE_MODE (sizetype
);
3046 size
= convert_to_mode (size_mode
, size
, 1);
3047 size
= copy_to_mode_reg (size_mode
, size
);
3048 size_tree
= make_tree (sizetype
, size
);
3050 /* It is incorrect to use the libcall calling conventions for calls to
3051 memset because it can be provided by the user. */
3052 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3053 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3054 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3056 return expand_call (call_expr
, NULL_RTX
, false);
3059 /* Expand a setmem pattern; return true if successful. */
3062 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3063 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3064 unsigned HOST_WIDE_INT min_size
,
3065 unsigned HOST_WIDE_INT max_size
,
3066 unsigned HOST_WIDE_INT probable_max_size
)
3068 /* Try the most limited insn first, because there's no point
3069 including more than one in the machine description unless
3070 the more limited one has some advantage. */
3072 if (expected_align
< align
)
3073 expected_align
= align
;
3074 if (expected_size
!= -1)
3076 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3077 expected_size
= max_size
;
3078 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3079 expected_size
= min_size
;
3082 opt_scalar_int_mode mode_iter
;
3083 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3085 scalar_int_mode mode
= mode_iter
.require ();
3086 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3088 if (code
!= CODE_FOR_nothing
3089 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3090 here because if SIZE is less than the mode mask, as it is
3091 returned by the macro, it will definitely be less than the
3092 actual mode mask. Since SIZE is within the Pmode address
3093 space, we limit MODE to Pmode. */
3094 && ((CONST_INT_P (size
)
3095 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3096 <= (GET_MODE_MASK (mode
) >> 1)))
3097 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3098 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3100 struct expand_operand ops
[9];
3103 nops
= insn_data
[(int) code
].n_generator_args
;
3104 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3106 create_fixed_operand (&ops
[0], object
);
3107 /* The check above guarantees that this size conversion is valid. */
3108 create_convert_operand_to (&ops
[1], size
, mode
, true);
3109 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3110 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3113 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3114 create_integer_operand (&ops
[5], expected_size
);
3118 create_integer_operand (&ops
[6], min_size
);
3119 /* If we can not represent the maximal size,
3120 make parameter NULL. */
3121 if ((HOST_WIDE_INT
) max_size
!= -1)
3122 create_integer_operand (&ops
[7], max_size
);
3124 create_fixed_operand (&ops
[7], NULL
);
3128 /* If we can not represent the maximal size,
3129 make parameter NULL. */
3130 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3131 create_integer_operand (&ops
[8], probable_max_size
);
3133 create_fixed_operand (&ops
[8], NULL
);
3135 if (maybe_expand_insn (code
, nops
, ops
))
3144 /* Write to one of the components of the complex value CPLX. Write VAL to
3145 the real part if IMAG_P is false, and the imaginary part if its true. */
3148 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3154 if (GET_CODE (cplx
) == CONCAT
)
3156 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3160 cmode
= GET_MODE (cplx
);
3161 imode
= GET_MODE_INNER (cmode
);
3162 ibitsize
= GET_MODE_BITSIZE (imode
);
3164 /* For MEMs simplify_gen_subreg may generate an invalid new address
3165 because, e.g., the original address is considered mode-dependent
3166 by the target, which restricts simplify_subreg from invoking
3167 adjust_address_nv. Instead of preparing fallback support for an
3168 invalid address, we call adjust_address_nv directly. */
3171 emit_move_insn (adjust_address_nv (cplx
, imode
,
3172 imag_p
? GET_MODE_SIZE (imode
) : 0),
3177 /* If the sub-object is at least word sized, then we know that subregging
3178 will work. This special case is important, since store_bit_field
3179 wants to operate on integer modes, and there's rarely an OImode to
3180 correspond to TCmode. */
3181 if (ibitsize
>= BITS_PER_WORD
3182 /* For hard regs we have exact predicates. Assume we can split
3183 the original object if it spans an even number of hard regs.
3184 This special case is important for SCmode on 64-bit platforms
3185 where the natural size of floating-point regs is 32-bit. */
3187 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3188 && REG_NREGS (cplx
) % 2 == 0))
3190 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3191 imag_p
? GET_MODE_SIZE (imode
) : 0);
3194 emit_move_insn (part
, val
);
3198 /* simplify_gen_subreg may fail for sub-word MEMs. */
3199 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3202 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3206 /* Extract one of the components of the complex value CPLX. Extract the
3207 real part if IMAG_P is false, and the imaginary part if it's true. */
3210 read_complex_part (rtx cplx
, bool imag_p
)
3216 if (GET_CODE (cplx
) == CONCAT
)
3217 return XEXP (cplx
, imag_p
);
3219 cmode
= GET_MODE (cplx
);
3220 imode
= GET_MODE_INNER (cmode
);
3221 ibitsize
= GET_MODE_BITSIZE (imode
);
3223 /* Special case reads from complex constants that got spilled to memory. */
3224 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3226 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3227 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3229 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3230 if (CONSTANT_CLASS_P (part
))
3231 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3235 /* For MEMs simplify_gen_subreg may generate an invalid new address
3236 because, e.g., the original address is considered mode-dependent
3237 by the target, which restricts simplify_subreg from invoking
3238 adjust_address_nv. Instead of preparing fallback support for an
3239 invalid address, we call adjust_address_nv directly. */
3241 return adjust_address_nv (cplx
, imode
,
3242 imag_p
? GET_MODE_SIZE (imode
) : 0);
3244 /* If the sub-object is at least word sized, then we know that subregging
3245 will work. This special case is important, since extract_bit_field
3246 wants to operate on integer modes, and there's rarely an OImode to
3247 correspond to TCmode. */
3248 if (ibitsize
>= BITS_PER_WORD
3249 /* For hard regs we have exact predicates. Assume we can split
3250 the original object if it spans an even number of hard regs.
3251 This special case is important for SCmode on 64-bit platforms
3252 where the natural size of floating-point regs is 32-bit. */
3254 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3255 && REG_NREGS (cplx
) % 2 == 0))
3257 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3258 imag_p
? GET_MODE_SIZE (imode
) : 0);
3262 /* simplify_gen_subreg may fail for sub-word MEMs. */
3263 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3266 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3267 true, NULL_RTX
, imode
, imode
, false, NULL
);
3270 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3271 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3272 represented in NEW_MODE. If FORCE is true, this will never happen, as
3273 we'll force-create a SUBREG if needed. */
3276 emit_move_change_mode (machine_mode new_mode
,
3277 machine_mode old_mode
, rtx x
, bool force
)
3281 if (push_operand (x
, GET_MODE (x
)))
3283 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3284 MEM_COPY_ATTRIBUTES (ret
, x
);
3288 /* We don't have to worry about changing the address since the
3289 size in bytes is supposed to be the same. */
3290 if (reload_in_progress
)
3292 /* Copy the MEM to change the mode and move any
3293 substitutions from the old MEM to the new one. */
3294 ret
= adjust_address_nv (x
, new_mode
, 0);
3295 copy_replacements (x
, ret
);
3298 ret
= adjust_address (x
, new_mode
, 0);
3302 /* Note that we do want simplify_subreg's behavior of validating
3303 that the new mode is ok for a hard register. If we were to use
3304 simplify_gen_subreg, we would create the subreg, but would
3305 probably run into the target not being able to implement it. */
3306 /* Except, of course, when FORCE is true, when this is exactly what
3307 we want. Which is needed for CCmodes on some targets. */
3309 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3311 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3317 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3318 an integer mode of the same size as MODE. Returns the instruction
3319 emitted, or NULL if such a move could not be generated. */
3322 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3324 scalar_int_mode imode
;
3325 enum insn_code code
;
3327 /* There must exist a mode of the exact size we require. */
3328 if (!int_mode_for_mode (mode
).exists (&imode
))
3331 /* The target must support moves in this mode. */
3332 code
= optab_handler (mov_optab
, imode
);
3333 if (code
== CODE_FOR_nothing
)
3336 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3339 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3342 return emit_insn (GEN_FCN (code
) (x
, y
));
3345 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3346 Return an equivalent MEM that does not use an auto-increment. */
3349 emit_move_resolve_push (machine_mode mode
, rtx x
)
3351 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3354 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3355 #ifdef PUSH_ROUNDING
3356 adjust
= PUSH_ROUNDING (adjust
);
3358 if (code
== PRE_DEC
|| code
== POST_DEC
)
3360 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3362 rtx expr
= XEXP (XEXP (x
, 0), 1);
3364 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3365 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3366 if (GET_CODE (expr
) == MINUS
)
3368 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3372 /* Do not use anti_adjust_stack, since we don't want to update
3373 stack_pointer_delta. */
3374 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3375 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3376 0, OPTAB_LIB_WIDEN
);
3377 if (temp
!= stack_pointer_rtx
)
3378 emit_move_insn (stack_pointer_rtx
, temp
);
3385 temp
= stack_pointer_rtx
;
3390 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3396 return replace_equiv_address (x
, temp
);
3399 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3400 X is known to satisfy push_operand, and MODE is known to be complex.
3401 Returns the last instruction emitted. */
3404 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3406 scalar_mode submode
= GET_MODE_INNER (mode
);
3409 #ifdef PUSH_ROUNDING
3410 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3412 /* In case we output to the stack, but the size is smaller than the
3413 machine can push exactly, we need to use move instructions. */
3414 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3416 x
= emit_move_resolve_push (mode
, x
);
3417 return emit_move_insn (x
, y
);
3421 /* Note that the real part always precedes the imag part in memory
3422 regardless of machine's endianness. */
3423 switch (GET_CODE (XEXP (x
, 0)))
3437 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3438 read_complex_part (y
, imag_first
));
3439 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3440 read_complex_part (y
, !imag_first
));
3443 /* A subroutine of emit_move_complex. Perform the move from Y to X
3444 via two moves of the parts. Returns the last instruction emitted. */
3447 emit_move_complex_parts (rtx x
, rtx y
)
3449 /* Show the output dies here. This is necessary for SUBREGs
3450 of pseudos since we cannot track their lifetimes correctly;
3451 hard regs shouldn't appear here except as return values. */
3452 if (!reload_completed
&& !reload_in_progress
3453 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3456 write_complex_part (x
, read_complex_part (y
, false), false);
3457 write_complex_part (x
, read_complex_part (y
, true), true);
3459 return get_last_insn ();
3462 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3463 MODE is known to be complex. Returns the last instruction emitted. */
3466 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3470 /* Need to take special care for pushes, to maintain proper ordering
3471 of the data, and possibly extra padding. */
3472 if (push_operand (x
, mode
))
3473 return emit_move_complex_push (mode
, x
, y
);
3475 /* See if we can coerce the target into moving both values at once, except
3476 for floating point where we favor moving as parts if this is easy. */
3477 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3478 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3480 && HARD_REGISTER_P (x
)
3481 && REG_NREGS (x
) == 1)
3483 && HARD_REGISTER_P (y
)
3484 && REG_NREGS (y
) == 1))
3486 /* Not possible if the values are inherently not adjacent. */
3487 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3489 /* Is possible if both are registers (or subregs of registers). */
3490 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3492 /* If one of the operands is a memory, and alignment constraints
3493 are friendly enough, we may be able to do combined memory operations.
3494 We do not attempt this if Y is a constant because that combination is
3495 usually better with the by-parts thing below. */
3496 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3497 && (!STRICT_ALIGNMENT
3498 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3507 /* For memory to memory moves, optimal behavior can be had with the
3508 existing block move logic. */
3509 if (MEM_P (x
) && MEM_P (y
))
3511 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3512 BLOCK_OP_NO_LIBCALL
);
3513 return get_last_insn ();
3516 ret
= emit_move_via_integer (mode
, x
, y
, true);
3521 return emit_move_complex_parts (x
, y
);
3524 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3525 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3528 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3532 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3535 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3536 if (code
!= CODE_FOR_nothing
)
3538 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3539 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3540 return emit_insn (GEN_FCN (code
) (x
, y
));
3544 /* Otherwise, find the MODE_INT mode of the same width. */
3545 ret
= emit_move_via_integer (mode
, x
, y
, false);
3546 gcc_assert (ret
!= NULL
);
3550 /* Return true if word I of OP lies entirely in the
3551 undefined bits of a paradoxical subreg. */
3554 undefined_operand_subword_p (const_rtx op
, int i
)
3556 if (GET_CODE (op
) != SUBREG
)
3558 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3559 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3560 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3561 || known_le (offset
, -UNITS_PER_WORD
));
3564 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3565 MODE is any multi-word or full-word mode that lacks a move_insn
3566 pattern. Note that you will get better code if you define such
3567 patterns, even if they must turn into multiple assembler instructions. */
3570 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3572 rtx_insn
*last_insn
= 0;
3578 /* This function can only handle cases where the number of words is
3579 known at compile time. */
3580 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3581 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3583 /* If X is a push on the stack, do the push now and replace
3584 X with a reference to the stack pointer. */
3585 if (push_operand (x
, mode
))
3586 x
= emit_move_resolve_push (mode
, x
);
3588 /* If we are in reload, see if either operand is a MEM whose address
3589 is scheduled for replacement. */
3590 if (reload_in_progress
&& MEM_P (x
)
3591 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3592 x
= replace_equiv_address_nv (x
, inner
);
3593 if (reload_in_progress
&& MEM_P (y
)
3594 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3595 y
= replace_equiv_address_nv (y
, inner
);
3599 need_clobber
= false;
3600 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3602 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3605 /* Do not generate code for a move if it would come entirely
3606 from the undefined bits of a paradoxical subreg. */
3607 if (undefined_operand_subword_p (y
, i
))
3610 ypart
= operand_subword (y
, i
, 1, mode
);
3612 /* If we can't get a part of Y, put Y into memory if it is a
3613 constant. Otherwise, force it into a register. Then we must
3614 be able to get a part of Y. */
3615 if (ypart
== 0 && CONSTANT_P (y
))
3617 y
= use_anchored_address (force_const_mem (mode
, y
));
3618 ypart
= operand_subword (y
, i
, 1, mode
);
3620 else if (ypart
== 0)
3621 ypart
= operand_subword_force (y
, i
, mode
);
3623 gcc_assert (xpart
&& ypart
);
3625 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3627 last_insn
= emit_move_insn (xpart
, ypart
);
3633 /* Show the output dies here. This is necessary for SUBREGs
3634 of pseudos since we cannot track their lifetimes correctly;
3635 hard regs shouldn't appear here except as return values.
3636 We never want to emit such a clobber after reload. */
3638 && ! (reload_in_progress
|| reload_completed
)
3639 && need_clobber
!= 0)
3647 /* Low level part of emit_move_insn.
3648 Called just like emit_move_insn, but assumes X and Y
3649 are basically valid. */
3652 emit_move_insn_1 (rtx x
, rtx y
)
3654 machine_mode mode
= GET_MODE (x
);
3655 enum insn_code code
;
3657 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3659 code
= optab_handler (mov_optab
, mode
);
3660 if (code
!= CODE_FOR_nothing
)
3661 return emit_insn (GEN_FCN (code
) (x
, y
));
3663 /* Expand complex moves by moving real part and imag part. */
3664 if (COMPLEX_MODE_P (mode
))
3665 return emit_move_complex (mode
, x
, y
);
3667 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3668 || ALL_FIXED_POINT_MODE_P (mode
))
3670 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3672 /* If we can't find an integer mode, use multi words. */
3676 return emit_move_multi_word (mode
, x
, y
);
3679 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3680 return emit_move_ccmode (mode
, x
, y
);
3682 /* Try using a move pattern for the corresponding integer mode. This is
3683 only safe when simplify_subreg can convert MODE constants into integer
3684 constants. At present, it can only do this reliably if the value
3685 fits within a HOST_WIDE_INT. */
3687 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3689 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3693 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3698 return emit_move_multi_word (mode
, x
, y
);
3701 /* Generate code to copy Y into X.
3702 Both Y and X must have the same mode, except that
3703 Y can be a constant with VOIDmode.
3704 This mode cannot be BLKmode; use emit_block_move for that.
3706 Return the last instruction emitted. */
3709 emit_move_insn (rtx x
, rtx y
)
3711 machine_mode mode
= GET_MODE (x
);
3712 rtx y_cst
= NULL_RTX
;
3713 rtx_insn
*last_insn
;
3716 gcc_assert (mode
!= BLKmode
3717 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3722 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3723 && (last_insn
= compress_float_constant (x
, y
)))
3728 if (!targetm
.legitimate_constant_p (mode
, y
))
3730 y
= force_const_mem (mode
, y
);
3732 /* If the target's cannot_force_const_mem prevented the spill,
3733 assume that the target's move expanders will also take care
3734 of the non-legitimate constant. */
3738 y
= use_anchored_address (y
);
3742 /* If X or Y are memory references, verify that their addresses are valid
3745 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3747 && ! push_operand (x
, GET_MODE (x
))))
3748 x
= validize_mem (x
);
3751 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3752 MEM_ADDR_SPACE (y
)))
3753 y
= validize_mem (y
);
3755 gcc_assert (mode
!= BLKmode
);
3757 last_insn
= emit_move_insn_1 (x
, y
);
3759 if (y_cst
&& REG_P (x
)
3760 && (set
= single_set (last_insn
)) != NULL_RTX
3761 && SET_DEST (set
) == x
3762 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3763 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3768 /* Generate the body of an instruction to copy Y into X.
3769 It may be a list of insns, if one insn isn't enough. */
3772 gen_move_insn (rtx x
, rtx y
)
3777 emit_move_insn_1 (x
, y
);
3783 /* If Y is representable exactly in a narrower mode, and the target can
3784 perform the extension directly from constant or memory, then emit the
3785 move as an extension. */
3788 compress_float_constant (rtx x
, rtx y
)
3790 machine_mode dstmode
= GET_MODE (x
);
3791 machine_mode orig_srcmode
= GET_MODE (y
);
3792 machine_mode srcmode
;
3793 const REAL_VALUE_TYPE
*r
;
3794 int oldcost
, newcost
;
3795 bool speed
= optimize_insn_for_speed_p ();
3797 r
= CONST_DOUBLE_REAL_VALUE (y
);
3799 if (targetm
.legitimate_constant_p (dstmode
, y
))
3800 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3802 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3804 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3808 rtx_insn
*last_insn
;
3810 /* Skip if the target can't extend this way. */
3811 ic
= can_extend_p (dstmode
, srcmode
, 0);
3812 if (ic
== CODE_FOR_nothing
)
3815 /* Skip if the narrowed value isn't exact. */
3816 if (! exact_real_truncate (srcmode
, r
))
3819 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3821 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3823 /* Skip if the target needs extra instructions to perform
3825 if (!insn_operand_matches (ic
, 1, trunc_y
))
3827 /* This is valid, but may not be cheaper than the original. */
3828 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3830 if (oldcost
< newcost
)
3833 else if (float_extend_from_mem
[dstmode
][srcmode
])
3835 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3836 /* This is valid, but may not be cheaper than the original. */
3837 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3839 if (oldcost
< newcost
)
3841 trunc_y
= validize_mem (trunc_y
);
3846 /* For CSE's benefit, force the compressed constant pool entry
3847 into a new pseudo. This constant may be used in different modes,
3848 and if not, combine will put things back together for us. */
3849 trunc_y
= force_reg (srcmode
, trunc_y
);
3851 /* If x is a hard register, perform the extension into a pseudo,
3852 so that e.g. stack realignment code is aware of it. */
3854 if (REG_P (x
) && HARD_REGISTER_P (x
))
3855 target
= gen_reg_rtx (dstmode
);
3857 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3858 last_insn
= get_last_insn ();
3861 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3864 return emit_move_insn (x
, target
);
3871 /* Pushing data onto the stack. */
3873 /* Push a block of length SIZE (perhaps variable)
3874 and return an rtx to address the beginning of the block.
3875 The value may be virtual_outgoing_args_rtx.
3877 EXTRA is the number of bytes of padding to push in addition to SIZE.
3878 BELOW nonzero means this padding comes at low addresses;
3879 otherwise, the padding comes at high addresses. */
3882 push_block (rtx size
, poly_int64 extra
, int below
)
3886 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3887 if (CONSTANT_P (size
))
3888 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3889 else if (REG_P (size
) && known_eq (extra
, 0))
3890 anti_adjust_stack (size
);
3893 temp
= copy_to_mode_reg (Pmode
, size
);
3894 if (maybe_ne (extra
, 0))
3895 temp
= expand_binop (Pmode
, add_optab
, temp
,
3896 gen_int_mode (extra
, Pmode
),
3897 temp
, 0, OPTAB_LIB_WIDEN
);
3898 anti_adjust_stack (temp
);
3901 if (STACK_GROWS_DOWNWARD
)
3903 temp
= virtual_outgoing_args_rtx
;
3904 if (maybe_ne (extra
, 0) && below
)
3905 temp
= plus_constant (Pmode
, temp
, extra
);
3909 if (CONST_INT_P (size
))
3910 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3911 -INTVAL (size
) - (below
? 0 : extra
));
3912 else if (maybe_ne (extra
, 0) && !below
)
3913 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3914 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3917 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3918 negate_rtx (Pmode
, size
));
3921 return memory_address (NARROWEST_INT_MODE
, temp
);
3924 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3927 mem_autoinc_base (rtx mem
)
3931 rtx addr
= XEXP (mem
, 0);
3932 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3933 return XEXP (addr
, 0);
3938 /* A utility routine used here, in reload, and in try_split. The insns
3939 after PREV up to and including LAST are known to adjust the stack,
3940 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3941 placing notes as appropriate. PREV may be NULL, indicating the
3942 entire insn sequence prior to LAST should be scanned.
3944 The set of allowed stack pointer modifications is small:
3945 (1) One or more auto-inc style memory references (aka pushes),
3946 (2) One or more addition/subtraction with the SP as destination,
3947 (3) A single move insn with the SP as destination,
3948 (4) A call_pop insn,
3949 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3951 Insns in the sequence that do not modify the SP are ignored,
3952 except for noreturn calls.
3954 The return value is the amount of adjustment that can be trivially
3955 verified, via immediate operand or auto-inc. If the adjustment
3956 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3959 find_args_size_adjust (rtx_insn
*insn
)
3964 pat
= PATTERN (insn
);
3967 /* Look for a call_pop pattern. */
3970 /* We have to allow non-call_pop patterns for the case
3971 of emit_single_push_insn of a TLS address. */
3972 if (GET_CODE (pat
) != PARALLEL
)
3975 /* All call_pop have a stack pointer adjust in the parallel.
3976 The call itself is always first, and the stack adjust is
3977 usually last, so search from the end. */
3978 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
3980 set
= XVECEXP (pat
, 0, i
);
3981 if (GET_CODE (set
) != SET
)
3983 dest
= SET_DEST (set
);
3984 if (dest
== stack_pointer_rtx
)
3987 /* We'd better have found the stack pointer adjust. */
3990 /* Fall through to process the extracted SET and DEST
3991 as if it was a standalone insn. */
3993 else if (GET_CODE (pat
) == SET
)
3995 else if ((set
= single_set (insn
)) != NULL
)
3997 else if (GET_CODE (pat
) == PARALLEL
)
3999 /* ??? Some older ports use a parallel with a stack adjust
4000 and a store for a PUSH_ROUNDING pattern, rather than a
4001 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4002 /* ??? See h8300 and m68k, pushqi1. */
4003 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4005 set
= XVECEXP (pat
, 0, i
);
4006 if (GET_CODE (set
) != SET
)
4008 dest
= SET_DEST (set
);
4009 if (dest
== stack_pointer_rtx
)
4012 /* We do not expect an auto-inc of the sp in the parallel. */
4013 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4014 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4015 != stack_pointer_rtx
);
4023 dest
= SET_DEST (set
);
4025 /* Look for direct modifications of the stack pointer. */
4026 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4028 /* Look for a trivial adjustment, otherwise assume nothing. */
4029 /* Note that the SPU restore_stack_block pattern refers to
4030 the stack pointer in V4SImode. Consider that non-trivial. */
4031 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4032 && GET_CODE (SET_SRC (set
)) == PLUS
4033 && XEXP (SET_SRC (set
), 0) == stack_pointer_rtx
4034 && CONST_INT_P (XEXP (SET_SRC (set
), 1)))
4035 return INTVAL (XEXP (SET_SRC (set
), 1));
4036 /* ??? Reload can generate no-op moves, which will be cleaned
4037 up later. Recognize it and continue searching. */
4038 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4041 return HOST_WIDE_INT_MIN
;
4047 /* Otherwise only think about autoinc patterns. */
4048 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4051 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4052 != stack_pointer_rtx
);
4054 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4055 mem
= SET_SRC (set
);
4059 addr
= XEXP (mem
, 0);
4060 switch (GET_CODE (addr
))
4064 return GET_MODE_SIZE (GET_MODE (mem
));
4067 return -GET_MODE_SIZE (GET_MODE (mem
));
4070 addr
= XEXP (addr
, 1);
4071 gcc_assert (GET_CODE (addr
) == PLUS
);
4072 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4073 gcc_assert (CONST_INT_P (XEXP (addr
, 1)));
4074 return INTVAL (XEXP (addr
, 1));
4082 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4083 poly_int64 end_args_size
)
4085 poly_int64 args_size
= end_args_size
;
4086 bool saw_unknown
= false;
4089 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4091 if (!NONDEBUG_INSN_P (insn
))
4094 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4095 a call argument containing a TLS address that itself requires
4096 a call to __tls_get_addr. The handling of stack_pointer_delta
4097 in emit_single_push_insn is supposed to ensure that any such
4098 notes are already correct. */
4099 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4100 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4102 poly_int64 this_delta
= find_args_size_adjust (insn
);
4103 if (known_eq (this_delta
, 0))
4106 || ACCUMULATE_OUTGOING_ARGS
4107 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4111 gcc_assert (!saw_unknown
);
4112 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4116 add_args_size_note (insn
, args_size
);
4117 if (STACK_GROWS_DOWNWARD
)
4118 this_delta
= -poly_uint64 (this_delta
);
4121 args_size
= HOST_WIDE_INT_MIN
;
4123 args_size
-= this_delta
;
4129 #ifdef PUSH_ROUNDING
4130 /* Emit single push insn. */
4133 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4136 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4138 enum insn_code icode
;
4140 /* If there is push pattern, use it. Otherwise try old way of throwing
4141 MEM representing push operation to move expander. */
4142 icode
= optab_handler (push_optab
, mode
);
4143 if (icode
!= CODE_FOR_nothing
)
4145 struct expand_operand ops
[1];
4147 create_input_operand (&ops
[0], x
, mode
);
4148 if (maybe_expand_insn (icode
, 1, ops
))
4151 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4152 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4153 /* If we are to pad downward, adjust the stack pointer first and
4154 then store X into the stack location using an offset. This is
4155 because emit_move_insn does not know how to pad; it does not have
4157 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4159 emit_move_insn (stack_pointer_rtx
,
4160 expand_binop (Pmode
,
4161 STACK_GROWS_DOWNWARD
? sub_optab
4164 gen_int_mode (rounded_size
, Pmode
),
4165 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4167 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4168 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4169 /* We have already decremented the stack pointer, so get the
4171 offset
+= rounded_size
;
4173 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4174 /* We have already incremented the stack pointer, so get the
4176 offset
-= rounded_size
;
4178 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4182 if (STACK_GROWS_DOWNWARD
)
4183 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4184 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4186 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4187 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4189 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4192 dest
= gen_rtx_MEM (mode
, dest_addr
);
4196 set_mem_attributes (dest
, type
, 1);
4198 if (cfun
->tail_call_marked
)
4199 /* Function incoming arguments may overlap with sibling call
4200 outgoing arguments and we cannot allow reordering of reads
4201 from function arguments with stores to outgoing arguments
4202 of sibling calls. */
4203 set_mem_alias_set (dest
, 0);
4205 emit_move_insn (dest
, x
);
4208 /* Emit and annotate a single push insn. */
4211 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4213 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4214 rtx_insn
*prev
= get_last_insn ();
4217 emit_single_push_insn_1 (mode
, x
, type
);
4219 /* Adjust stack_pointer_delta to describe the situation after the push
4220 we just performed. Note that we must do this after the push rather
4221 than before the push in case calculating X needs pushes and pops of
4222 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4223 for such pushes and pops must not include the effect of the future
4225 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4227 last
= get_last_insn ();
4229 /* Notice the common case where we emitted exactly one insn. */
4230 if (PREV_INSN (last
) == prev
)
4232 add_args_size_note (last
, stack_pointer_delta
);
4236 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4237 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4238 || known_eq (delta
, old_delta
));
4242 /* If reading SIZE bytes from X will end up reading from
4243 Y return the number of bytes that overlap. Return -1
4244 if there is no overlap or -2 if we can't determine
4245 (for example when X and Y have different base registers). */
4248 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4250 rtx tmp
= plus_constant (Pmode
, x
, size
);
4251 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4253 if (!CONST_INT_P (sub
))
4256 HOST_WIDE_INT val
= INTVAL (sub
);
4258 return IN_RANGE (val
, 1, size
) ? val
: -1;
4261 /* Generate code to push X onto the stack, assuming it has mode MODE and
4263 MODE is redundant except when X is a CONST_INT (since they don't
4265 SIZE is an rtx for the size of data to be copied (in bytes),
4266 needed only if X is BLKmode.
4267 Return true if successful. May return false if asked to push a
4268 partial argument during a sibcall optimization (as specified by
4269 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4272 ALIGN (in bits) is maximum alignment we can assume.
4274 If PARTIAL and REG are both nonzero, then copy that many of the first
4275 bytes of X into registers starting with REG, and push the rest of X.
4276 The amount of space pushed is decreased by PARTIAL bytes.
4277 REG must be a hard register in this case.
4278 If REG is zero but PARTIAL is not, take any all others actions for an
4279 argument partially in registers, but do not actually load any
4282 EXTRA is the amount in bytes of extra space to leave next to this arg.
4283 This is ignored if an argument block has already been allocated.
4285 On a machine that lacks real push insns, ARGS_ADDR is the address of
4286 the bottom of the argument block for this call. We use indexing off there
4287 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4288 argument block has not been preallocated.
4290 ARGS_SO_FAR is the size of args previously pushed for this call.
4292 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4293 for arguments passed in registers. If nonzero, it will be the number
4294 of bytes required. */
4297 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4298 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4299 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4300 rtx alignment_pad
, bool sibcall_p
)
4303 pad_direction stack_direction
4304 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4306 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4307 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4308 Default is below for small data on big-endian machines; else above. */
4309 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4311 /* Invert direction if stack is post-decrement.
4313 if (STACK_PUSH_CODE
== POST_DEC
)
4314 if (where_pad
!= PAD_NONE
)
4315 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4319 int nregs
= partial
/ UNITS_PER_WORD
;
4320 rtx
*tmp_regs
= NULL
;
4321 int overlapping
= 0;
4324 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4326 /* Copy a block into the stack, entirely or partially. */
4333 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4334 used
= partial
- offset
;
4336 if (mode
!= BLKmode
)
4338 /* A value is to be stored in an insufficiently aligned
4339 stack slot; copy via a suitably aligned slot if
4341 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4342 if (!MEM_P (xinner
))
4344 temp
= assign_temp (type
, 1, 1);
4345 emit_move_insn (temp
, xinner
);
4352 /* USED is now the # of bytes we need not copy to the stack
4353 because registers will take care of them. */
4356 xinner
= adjust_address (xinner
, BLKmode
, used
);
4358 /* If the partial register-part of the arg counts in its stack size,
4359 skip the part of stack space corresponding to the registers.
4360 Otherwise, start copying to the beginning of the stack space,
4361 by setting SKIP to 0. */
4362 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4364 #ifdef PUSH_ROUNDING
4365 /* Do it with several push insns if that doesn't take lots of insns
4366 and if there is no difficulty with push insns that skip bytes
4367 on the stack for alignment purposes. */
4370 && CONST_INT_P (size
)
4372 && MEM_ALIGN (xinner
) >= align
4373 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4374 /* Here we avoid the case of a structure whose weak alignment
4375 forces many pushes of a small amount of data,
4376 and such small pushes do rounding that causes trouble. */
4377 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4378 || align
>= BIGGEST_ALIGNMENT
4379 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4380 align
/ BITS_PER_UNIT
))
4381 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4383 /* Push padding now if padding above and stack grows down,
4384 or if padding below and stack grows up.
4385 But if space already allocated, this has already been done. */
4386 if (maybe_ne (extra
, 0)
4388 && where_pad
!= PAD_NONE
4389 && where_pad
!= stack_direction
)
4390 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4392 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4395 #endif /* PUSH_ROUNDING */
4399 /* Otherwise make space on the stack and copy the data
4400 to the address of that space. */
4402 /* Deduct words put into registers from the size we must copy. */
4405 if (CONST_INT_P (size
))
4406 size
= GEN_INT (INTVAL (size
) - used
);
4408 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4409 gen_int_mode (used
, GET_MODE (size
)),
4410 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4413 /* Get the address of the stack space.
4414 In this case, we do not deal with EXTRA separately.
4415 A single stack adjust will do. */
4418 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4421 else if (CONST_INT_P (args_so_far
))
4422 temp
= memory_address (BLKmode
,
4423 plus_constant (Pmode
, args_addr
,
4424 skip
+ INTVAL (args_so_far
)));
4426 temp
= memory_address (BLKmode
,
4427 plus_constant (Pmode
,
4428 gen_rtx_PLUS (Pmode
,
4433 if (!ACCUMULATE_OUTGOING_ARGS
)
4435 /* If the source is referenced relative to the stack pointer,
4436 copy it to another register to stabilize it. We do not need
4437 to do this if we know that we won't be changing sp. */
4439 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4440 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4441 temp
= copy_to_reg (temp
);
4444 target
= gen_rtx_MEM (BLKmode
, temp
);
4446 /* We do *not* set_mem_attributes here, because incoming arguments
4447 may overlap with sibling call outgoing arguments and we cannot
4448 allow reordering of reads from function arguments with stores
4449 to outgoing arguments of sibling calls. We do, however, want
4450 to record the alignment of the stack slot. */
4451 /* ALIGN may well be better aligned than TYPE, e.g. due to
4452 PARM_BOUNDARY. Assume the caller isn't lying. */
4453 set_mem_align (target
, align
);
4455 /* If part should go in registers and pushing to that part would
4456 overwrite some of the values that need to go into regs, load the
4457 overlapping values into temporary pseudos to be moved into the hard
4458 regs at the end after the stack pushing has completed.
4459 We cannot load them directly into the hard regs here because
4460 they can be clobbered by the block move expansions.
4463 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4464 && GET_CODE (reg
) != PARALLEL
)
4466 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4467 if (overlapping
> 0)
4469 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4470 overlapping
/= UNITS_PER_WORD
;
4472 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4474 for (int i
= 0; i
< overlapping
; i
++)
4475 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4477 for (int i
= 0; i
< overlapping
; i
++)
4478 emit_move_insn (tmp_regs
[i
],
4479 operand_subword_force (target
, i
, mode
));
4481 else if (overlapping
== -1)
4483 /* Could not determine whether there is overlap.
4484 Fail the sibcall. */
4492 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4495 else if (partial
> 0)
4497 /* Scalar partly in registers. This case is only supported
4498 for fixed-wdth modes. */
4499 int size
= GET_MODE_SIZE (mode
).to_constant ();
4500 size
/= UNITS_PER_WORD
;
4503 /* # bytes of start of argument
4504 that we must make space for but need not store. */
4505 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4506 int args_offset
= INTVAL (args_so_far
);
4509 /* Push padding now if padding above and stack grows down,
4510 or if padding below and stack grows up.
4511 But if space already allocated, this has already been done. */
4512 if (maybe_ne (extra
, 0)
4514 && where_pad
!= PAD_NONE
4515 && where_pad
!= stack_direction
)
4516 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4518 /* If we make space by pushing it, we might as well push
4519 the real data. Otherwise, we can leave OFFSET nonzero
4520 and leave the space uninitialized. */
4524 /* Now NOT_STACK gets the number of words that we don't need to
4525 allocate on the stack. Convert OFFSET to words too. */
4526 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4527 offset
/= UNITS_PER_WORD
;
4529 /* If the partial register-part of the arg counts in its stack size,
4530 skip the part of stack space corresponding to the registers.
4531 Otherwise, start copying to the beginning of the stack space,
4532 by setting SKIP to 0. */
4533 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4535 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4536 x
= validize_mem (force_const_mem (mode
, x
));
4538 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4539 SUBREGs of such registers are not allowed. */
4540 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4541 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4542 x
= copy_to_reg (x
);
4544 /* Loop over all the words allocated on the stack for this arg. */
4545 /* We can do it by words, because any scalar bigger than a word
4546 has a size a multiple of a word. */
4547 for (i
= size
- 1; i
>= not_stack
; i
--)
4548 if (i
>= not_stack
+ offset
)
4549 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4550 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4552 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4554 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4562 /* Push padding now if padding above and stack grows down,
4563 or if padding below and stack grows up.
4564 But if space already allocated, this has already been done. */
4565 if (maybe_ne (extra
, 0)
4567 && where_pad
!= PAD_NONE
4568 && where_pad
!= stack_direction
)
4569 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4571 #ifdef PUSH_ROUNDING
4572 if (args_addr
== 0 && PUSH_ARGS
)
4573 emit_single_push_insn (mode
, x
, type
);
4577 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4578 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4580 /* We do *not* set_mem_attributes here, because incoming arguments
4581 may overlap with sibling call outgoing arguments and we cannot
4582 allow reordering of reads from function arguments with stores
4583 to outgoing arguments of sibling calls. We do, however, want
4584 to record the alignment of the stack slot. */
4585 /* ALIGN may well be better aligned than TYPE, e.g. due to
4586 PARM_BOUNDARY. Assume the caller isn't lying. */
4587 set_mem_align (dest
, align
);
4589 emit_move_insn (dest
, x
);
4593 /* Move the partial arguments into the registers and any overlapping
4594 values that we moved into the pseudos in tmp_regs. */
4595 if (partial
> 0 && reg
!= 0)
4597 /* Handle calls that pass values in multiple non-contiguous locations.
4598 The Irix 6 ABI has examples of this. */
4599 if (GET_CODE (reg
) == PARALLEL
)
4600 emit_group_load (reg
, x
, type
, -1);
4603 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4604 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4606 for (int i
= 0; i
< overlapping
; i
++)
4607 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4608 + nregs
- overlapping
+ i
),
4614 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4615 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4617 if (alignment_pad
&& args_addr
== 0)
4618 anti_adjust_stack (alignment_pad
);
4623 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4627 get_subtarget (rtx x
)
4631 /* Only registers can be subtargets. */
4633 /* Don't use hard regs to avoid extending their life. */
4634 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4638 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4639 FIELD is a bitfield. Returns true if the optimization was successful,
4640 and there's nothing else to do. */
4643 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4644 poly_uint64 pbitpos
,
4645 poly_uint64 pbitregion_start
,
4646 poly_uint64 pbitregion_end
,
4647 machine_mode mode1
, rtx str_rtx
,
4648 tree to
, tree src
, bool reverse
)
4650 /* str_mode is not guaranteed to be a scalar type. */
4651 machine_mode str_mode
= GET_MODE (str_rtx
);
4652 unsigned int str_bitsize
;
4657 enum tree_code code
;
4659 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4660 if (mode1
!= VOIDmode
4661 || !pbitsize
.is_constant (&bitsize
)
4662 || !pbitpos
.is_constant (&bitpos
)
4663 || !pbitregion_start
.is_constant (&bitregion_start
)
4664 || !pbitregion_end
.is_constant (&bitregion_end
)
4665 || bitsize
>= BITS_PER_WORD
4666 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4667 || str_bitsize
> BITS_PER_WORD
4668 || TREE_SIDE_EFFECTS (to
)
4669 || TREE_THIS_VOLATILE (to
))
4673 if (TREE_CODE (src
) != SSA_NAME
)
4675 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4678 srcstmt
= get_gimple_for_ssa_name (src
);
4680 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4683 code
= gimple_assign_rhs_code (srcstmt
);
4685 op0
= gimple_assign_rhs1 (srcstmt
);
4687 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4688 to find its initialization. Hopefully the initialization will
4689 be from a bitfield load. */
4690 if (TREE_CODE (op0
) == SSA_NAME
)
4692 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4694 /* We want to eventually have OP0 be the same as TO, which
4695 should be a bitfield. */
4697 || !is_gimple_assign (op0stmt
)
4698 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4700 op0
= gimple_assign_rhs1 (op0stmt
);
4703 op1
= gimple_assign_rhs2 (srcstmt
);
4705 if (!operand_equal_p (to
, op0
, 0))
4708 if (MEM_P (str_rtx
))
4710 unsigned HOST_WIDE_INT offset1
;
4712 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4713 str_bitsize
= BITS_PER_WORD
;
4715 scalar_int_mode best_mode
;
4716 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4717 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4719 str_mode
= best_mode
;
4720 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4723 bitpos
%= str_bitsize
;
4724 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4725 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4727 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4730 gcc_assert (!reverse
);
4732 /* If the bit field covers the whole REG/MEM, store_field
4733 will likely generate better code. */
4734 if (bitsize
>= str_bitsize
)
4737 /* We can't handle fields split across multiple entities. */
4738 if (bitpos
+ bitsize
> str_bitsize
)
4741 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4742 bitpos
= str_bitsize
- bitpos
- bitsize
;
4748 /* For now, just optimize the case of the topmost bitfield
4749 where we don't need to do any masking and also
4750 1 bit bitfields where xor can be used.
4751 We might win by one instruction for the other bitfields
4752 too if insv/extv instructions aren't used, so that
4753 can be added later. */
4754 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4755 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4758 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4759 value
= convert_modes (str_mode
,
4760 TYPE_MODE (TREE_TYPE (op1
)), value
,
4761 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4763 /* We may be accessing data outside the field, which means
4764 we can alias adjacent data. */
4765 if (MEM_P (str_rtx
))
4767 str_rtx
= shallow_copy_rtx (str_rtx
);
4768 set_mem_alias_set (str_rtx
, 0);
4769 set_mem_expr (str_rtx
, 0);
4772 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4774 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4778 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4780 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4782 value
= flip_storage_order (str_mode
, value
);
4783 result
= expand_binop (str_mode
, binop
, str_rtx
,
4784 value
, str_rtx
, 1, OPTAB_WIDEN
);
4785 if (result
!= str_rtx
)
4786 emit_move_insn (str_rtx
, result
);
4791 if (TREE_CODE (op1
) != INTEGER_CST
)
4793 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4794 value
= convert_modes (str_mode
,
4795 TYPE_MODE (TREE_TYPE (op1
)), value
,
4796 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4798 /* We may be accessing data outside the field, which means
4799 we can alias adjacent data. */
4800 if (MEM_P (str_rtx
))
4802 str_rtx
= shallow_copy_rtx (str_rtx
);
4803 set_mem_alias_set (str_rtx
, 0);
4804 set_mem_expr (str_rtx
, 0);
4807 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4808 if (bitpos
+ bitsize
!= str_bitsize
)
4810 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4812 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4814 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4816 value
= flip_storage_order (str_mode
, value
);
4817 result
= expand_binop (str_mode
, binop
, str_rtx
,
4818 value
, str_rtx
, 1, OPTAB_WIDEN
);
4819 if (result
!= str_rtx
)
4820 emit_move_insn (str_rtx
, result
);
4830 /* In the C++ memory model, consecutive bit fields in a structure are
4831 considered one memory location.
4833 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4834 returns the bit range of consecutive bits in which this COMPONENT_REF
4835 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4836 and *OFFSET may be adjusted in the process.
4838 If the access does not need to be restricted, 0 is returned in both
4839 *BITSTART and *BITEND. */
4842 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4843 poly_int64_pod
*bitpos
, tree
*offset
)
4845 poly_int64 bitoffset
;
4848 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4850 field
= TREE_OPERAND (exp
, 1);
4851 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4852 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4853 need to limit the range we can access. */
4856 *bitstart
= *bitend
= 0;
4860 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4861 part of a larger bit field, then the representative does not serve any
4862 useful purpose. This can occur in Ada. */
4863 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4866 poly_int64 rbitsize
, rbitpos
;
4868 int unsignedp
, reversep
, volatilep
= 0;
4869 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4870 &roffset
, &rmode
, &unsignedp
, &reversep
,
4872 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4874 *bitstart
= *bitend
= 0;
4879 /* Compute the adjustment to bitpos from the offset of the field
4880 relative to the representative. DECL_FIELD_OFFSET of field and
4881 repr are the same by construction if they are not constants,
4882 see finish_bitfield_layout. */
4883 poly_uint64 field_offset
, repr_offset
;
4884 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4885 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4886 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4889 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4890 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4892 /* If the adjustment is larger than bitpos, we would have a negative bit
4893 position for the lower bound and this may wreak havoc later. Adjust
4894 offset and bitpos to make the lower bound non-negative in that case. */
4895 if (maybe_gt (bitoffset
, *bitpos
))
4897 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4898 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4900 *bitpos
+= adjust_bits
;
4901 if (*offset
== NULL_TREE
)
4902 *offset
= size_int (-adjust_bytes
);
4904 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
4908 *bitstart
= *bitpos
- bitoffset
;
4910 *bitend
= *bitstart
+ tree_to_uhwi (DECL_SIZE (repr
)) - 1;
4913 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4914 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4915 DECL_RTL was not set yet, return NORTL. */
4918 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4920 if (TREE_CODE (addr
) != ADDR_EXPR
)
4923 tree base
= TREE_OPERAND (addr
, 0);
4926 || TREE_ADDRESSABLE (base
)
4927 || DECL_MODE (base
) == BLKmode
)
4930 if (!DECL_RTL_SET_P (base
))
4933 return (!MEM_P (DECL_RTL (base
)));
4936 /* Returns true if the MEM_REF REF refers to an object that does not
4937 reside in memory and has non-BLKmode. */
4940 mem_ref_refers_to_non_mem_p (tree ref
)
4942 tree base
= TREE_OPERAND (ref
, 0);
4943 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4946 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4947 is true, try generating a nontemporal store. */
4950 expand_assignment (tree to
, tree from
, bool nontemporal
)
4956 enum insn_code icode
;
4958 /* Don't crash if the lhs of the assignment was erroneous. */
4959 if (TREE_CODE (to
) == ERROR_MARK
)
4961 expand_normal (from
);
4965 /* Optimize away no-op moves without side-effects. */
4966 if (operand_equal_p (to
, from
, 0))
4969 /* Handle misaligned stores. */
4970 mode
= TYPE_MODE (TREE_TYPE (to
));
4971 if ((TREE_CODE (to
) == MEM_REF
4972 || TREE_CODE (to
) == TARGET_MEM_REF
)
4974 && !mem_ref_refers_to_non_mem_p (to
)
4975 && ((align
= get_object_alignment (to
))
4976 < GET_MODE_ALIGNMENT (mode
))
4977 && (((icode
= optab_handler (movmisalign_optab
, mode
))
4978 != CODE_FOR_nothing
)
4979 || targetm
.slow_unaligned_access (mode
, align
)))
4983 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
4984 reg
= force_not_mem (reg
);
4985 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4986 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
4987 reg
= flip_storage_order (mode
, reg
);
4989 if (icode
!= CODE_FOR_nothing
)
4991 struct expand_operand ops
[2];
4993 create_fixed_operand (&ops
[0], mem
);
4994 create_input_operand (&ops
[1], reg
, mode
);
4995 /* The movmisalign<mode> pattern cannot fail, else the assignment
4996 would silently be omitted. */
4997 expand_insn (icode
, 2, ops
);
5000 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5005 /* Assignment of a structure component needs special treatment
5006 if the structure component's rtx is not simply a MEM.
5007 Assignment of an array element at a constant index, and assignment of
5008 an array element in an unaligned packed structure field, has the same
5009 problem. Same for (partially) storing into a non-memory object. */
5010 if (handled_component_p (to
)
5011 || (TREE_CODE (to
) == MEM_REF
5012 && (REF_REVERSE_STORAGE_ORDER (to
)
5013 || mem_ref_refers_to_non_mem_p (to
)))
5014 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5017 poly_int64 bitsize
, bitpos
;
5018 poly_uint64 bitregion_start
= 0;
5019 poly_uint64 bitregion_end
= 0;
5021 int unsignedp
, reversep
, volatilep
= 0;
5025 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5026 &unsignedp
, &reversep
, &volatilep
);
5028 /* Make sure bitpos is not negative, it can wreak havoc later. */
5029 if (maybe_lt (bitpos
, 0))
5031 gcc_assert (offset
== NULL_TREE
);
5032 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5033 bitpos
= num_trailing_bits (bitpos
);
5036 if (TREE_CODE (to
) == COMPONENT_REF
5037 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5038 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5039 /* The C++ memory model naturally applies to byte-aligned fields.
5040 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5041 BITSIZE are not byte-aligned, there is no need to limit the range
5042 we can access. This can occur with packed structures in Ada. */
5043 else if (maybe_gt (bitsize
, 0)
5044 && multiple_p (bitsize
, BITS_PER_UNIT
)
5045 && multiple_p (bitpos
, BITS_PER_UNIT
))
5047 bitregion_start
= bitpos
;
5048 bitregion_end
= bitpos
+ bitsize
- 1;
5051 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5053 /* If the field has a mode, we want to access it in the
5054 field's mode, not the computed mode.
5055 If a MEM has VOIDmode (external with incomplete type),
5056 use BLKmode for it instead. */
5059 if (mode1
!= VOIDmode
)
5060 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5061 else if (GET_MODE (to_rtx
) == VOIDmode
)
5062 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5067 machine_mode address_mode
;
5070 if (!MEM_P (to_rtx
))
5072 /* We can get constant negative offsets into arrays with broken
5073 user code. Translate this to a trap instead of ICEing. */
5074 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5075 expand_builtin_trap ();
5076 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5079 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5080 address_mode
= get_address_mode (to_rtx
);
5081 if (GET_MODE (offset_rtx
) != address_mode
)
5083 /* We cannot be sure that the RTL in offset_rtx is valid outside
5084 of a memory address context, so force it into a register
5085 before attempting to convert it to the desired mode. */
5086 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5087 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5090 /* If we have an expression in OFFSET_RTX and a non-zero
5091 byte offset in BITPOS, adding the byte offset before the
5092 OFFSET_RTX results in better intermediate code, which makes
5093 later rtl optimization passes perform better.
5095 We prefer intermediate code like this:
5097 r124:DI=r123:DI+0x18
5102 r124:DI=r123:DI+0x10
5103 [r124:DI+0x8]=r121:DI
5105 This is only done for aligned data values, as these can
5106 be expected to result in single move instructions. */
5108 if (mode1
!= VOIDmode
5109 && maybe_ne (bitpos
, 0)
5110 && maybe_gt (bitsize
, 0)
5111 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5112 && multiple_p (bitpos
, bitsize
)
5113 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5114 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5116 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5117 bitregion_start
= 0;
5118 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5119 bitregion_end
-= bitpos
;
5123 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5124 highest_pow2_factor_for_target (to
,
5128 /* No action is needed if the target is not a memory and the field
5129 lies completely outside that target. This can occur if the source
5130 code contains an out-of-bounds access to a small array. */
5132 && GET_MODE (to_rtx
) != BLKmode
5133 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5135 expand_normal (from
);
5138 /* Handle expand_expr of a complex value returning a CONCAT. */
5139 else if (GET_CODE (to_rtx
) == CONCAT
)
5141 machine_mode to_mode
= GET_MODE (to_rtx
);
5142 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5143 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5144 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5145 if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE (to_rtx
)
5146 && COMPLEX_MODE_P (GET_MODE (to_rtx
))
5147 && known_eq (bitpos
, 0)
5148 && known_eq (bitsize
, mode_bitsize
))
5149 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5150 else if (known_eq (bitsize
, inner_bitsize
)
5151 && (known_eq (bitpos
, 0)
5152 || known_eq (bitpos
, inner_bitsize
)))
5153 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5154 false, nontemporal
, reversep
);
5155 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5156 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5157 bitregion_start
, bitregion_end
,
5158 mode1
, from
, get_alias_set (to
),
5159 nontemporal
, reversep
);
5160 else if (known_ge (bitpos
, inner_bitsize
))
5161 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5162 bitpos
- inner_bitsize
,
5163 bitregion_start
, bitregion_end
,
5164 mode1
, from
, get_alias_set (to
),
5165 nontemporal
, reversep
);
5166 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5168 result
= expand_normal (from
);
5169 if (GET_CODE (result
) == CONCAT
)
5171 to_mode
= GET_MODE_INNER (to_mode
);
5172 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5174 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5177 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5179 if (!from_real
|| !from_imag
)
5180 goto concat_store_slow
;
5181 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5182 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5187 = simplify_gen_subreg (to_mode
, result
,
5188 TYPE_MODE (TREE_TYPE (from
)), 0);
5191 emit_move_insn (XEXP (to_rtx
, 0),
5192 read_complex_part (from_rtx
, false));
5193 emit_move_insn (XEXP (to_rtx
, 1),
5194 read_complex_part (from_rtx
, true));
5198 machine_mode to_mode
5199 = GET_MODE_INNER (GET_MODE (to_rtx
));
5201 = simplify_gen_subreg (to_mode
, result
,
5202 TYPE_MODE (TREE_TYPE (from
)),
5205 = simplify_gen_subreg (to_mode
, result
,
5206 TYPE_MODE (TREE_TYPE (from
)),
5207 GET_MODE_SIZE (to_mode
));
5208 if (!from_real
|| !from_imag
)
5209 goto concat_store_slow
;
5210 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5211 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5218 rtx temp
= assign_stack_temp (to_mode
,
5219 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5220 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5221 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5222 result
= store_field (temp
, bitsize
, bitpos
,
5223 bitregion_start
, bitregion_end
,
5224 mode1
, from
, get_alias_set (to
),
5225 nontemporal
, reversep
);
5226 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5227 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5234 /* If the field is at offset zero, we could have been given the
5235 DECL_RTX of the parent struct. Don't munge it. */
5236 to_rtx
= shallow_copy_rtx (to_rtx
);
5237 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5239 MEM_VOLATILE_P (to_rtx
) = 1;
5242 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5243 bitregion_start
, bitregion_end
,
5244 mode1
, to_rtx
, to
, from
,
5248 result
= store_field (to_rtx
, bitsize
, bitpos
,
5249 bitregion_start
, bitregion_end
,
5250 mode1
, from
, get_alias_set (to
),
5251 nontemporal
, reversep
);
5255 preserve_temp_slots (result
);
5260 /* If the rhs is a function call and its value is not an aggregate,
5261 call the function before we start to compute the lhs.
5262 This is needed for correct code for cases such as
5263 val = setjmp (buf) on machines where reference to val
5264 requires loading up part of an address in a separate insn.
5266 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5267 since it might be a promoted variable where the zero- or sign- extension
5268 needs to be done. Handling this in the normal way is safe because no
5269 computation is done before the call. The same is true for SSA names. */
5270 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5271 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5272 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5274 || TREE_CODE (to
) == PARM_DECL
5275 || TREE_CODE (to
) == RESULT_DECL
)
5276 && REG_P (DECL_RTL (to
)))
5277 || TREE_CODE (to
) == SSA_NAME
))
5283 value
= expand_normal (from
);
5285 /* Split value and bounds to store them separately. */
5286 chkp_split_slot (value
, &value
, &bounds
);
5289 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5291 /* Handle calls that return values in multiple non-contiguous locations.
5292 The Irix 6 ABI has examples of this. */
5293 if (GET_CODE (to_rtx
) == PARALLEL
)
5295 if (GET_CODE (value
) == PARALLEL
)
5296 emit_group_move (to_rtx
, value
);
5298 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5299 int_size_in_bytes (TREE_TYPE (from
)));
5301 else if (GET_CODE (value
) == PARALLEL
)
5302 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5303 int_size_in_bytes (TREE_TYPE (from
)));
5304 else if (GET_MODE (to_rtx
) == BLKmode
)
5306 /* Handle calls that return BLKmode values in registers. */
5308 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5310 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5314 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5315 value
= convert_memory_address_addr_space
5316 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5317 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5319 emit_move_insn (to_rtx
, value
);
5322 /* Store bounds if required. */
5324 && (BOUNDED_P (to
) || chkp_type_has_pointer (TREE_TYPE (to
))))
5326 gcc_assert (MEM_P (to_rtx
));
5327 chkp_emit_bounds_store (bounds
, value
, to_rtx
);
5330 preserve_temp_slots (to_rtx
);
5335 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5336 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5338 /* Don't move directly into a return register. */
5339 if (TREE_CODE (to
) == RESULT_DECL
5340 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5346 /* If the source is itself a return value, it still is in a pseudo at
5347 this point so we can move it back to the return register directly. */
5349 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5350 && TREE_CODE (from
) != CALL_EXPR
)
5351 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5353 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5355 /* Handle calls that return values in multiple non-contiguous locations.
5356 The Irix 6 ABI has examples of this. */
5357 if (GET_CODE (to_rtx
) == PARALLEL
)
5359 if (GET_CODE (temp
) == PARALLEL
)
5360 emit_group_move (to_rtx
, temp
);
5362 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5363 int_size_in_bytes (TREE_TYPE (from
)));
5366 emit_move_insn (to_rtx
, temp
);
5368 preserve_temp_slots (to_rtx
);
5373 /* In case we are returning the contents of an object which overlaps
5374 the place the value is being stored, use a safe function when copying
5375 a value through a pointer into a structure value return block. */
5376 if (TREE_CODE (to
) == RESULT_DECL
5377 && TREE_CODE (from
) == INDIRECT_REF
5378 && ADDR_SPACE_GENERIC_P
5379 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5380 && refs_may_alias_p (to
, from
)
5381 && cfun
->returns_struct
5382 && !cfun
->returns_pcc_struct
)
5387 size
= expr_size (from
);
5388 from_rtx
= expand_normal (from
);
5390 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5392 preserve_temp_slots (to_rtx
);
5397 /* Compute FROM and store the value in the rtx we got. */
5400 result
= store_expr_with_bounds (from
, to_rtx
, 0, nontemporal
, false, to
);
5401 preserve_temp_slots (result
);
5406 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5407 succeeded, false otherwise. */
5410 emit_storent_insn (rtx to
, rtx from
)
5412 struct expand_operand ops
[2];
5413 machine_mode mode
= GET_MODE (to
);
5414 enum insn_code code
= optab_handler (storent_optab
, mode
);
5416 if (code
== CODE_FOR_nothing
)
5419 create_fixed_operand (&ops
[0], to
);
5420 create_input_operand (&ops
[1], from
, mode
);
5421 return maybe_expand_insn (code
, 2, ops
);
5424 /* Generate code for computing expression EXP,
5425 and storing the value into TARGET.
5427 If the mode is BLKmode then we may return TARGET itself.
5428 It turns out that in BLKmode it doesn't cause a problem.
5429 because C has no operators that could combine two different
5430 assignments into the same BLKmode object with different values
5431 with no sequence point. Will other languages need this to
5434 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5435 stack, and block moves may need to be treated specially.
5437 If NONTEMPORAL is true, try using a nontemporal store instruction.
5439 If REVERSE is true, the store is to be done in reverse order.
5441 If BTARGET is not NULL then computed bounds of EXP are
5442 associated with BTARGET. */
5445 store_expr_with_bounds (tree exp
, rtx target
, int call_param_p
,
5446 bool nontemporal
, bool reverse
, tree btarget
)
5449 rtx alt_rtl
= NULL_RTX
;
5450 location_t loc
= curr_insn_location ();
5452 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5454 /* C++ can generate ?: expressions with a throw expression in one
5455 branch and an rvalue in the other. Here, we resolve attempts to
5456 store the throw expression's nonexistent result. */
5457 gcc_assert (!call_param_p
);
5458 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5461 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5463 /* Perform first part of compound expression, then assign from second
5465 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5466 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5467 return store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
,
5468 call_param_p
, nontemporal
, reverse
,
5471 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5473 /* For conditional expression, get safe form of the target. Then
5474 test the condition, doing the appropriate assignment on either
5475 side. This avoids the creation of unnecessary temporaries.
5476 For non-BLKmode, it is more efficient not to do this. */
5478 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5480 do_pending_stack_adjust ();
5482 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5483 profile_probability::uninitialized ());
5484 store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5485 nontemporal
, reverse
, btarget
);
5486 emit_jump_insn (targetm
.gen_jump (lab2
));
5489 store_expr_with_bounds (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5490 nontemporal
, reverse
, btarget
);
5496 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5497 /* If this is a scalar in a register that is stored in a wider mode
5498 than the declared mode, compute the result into its declared mode
5499 and then convert to the wider mode. Our value is the computed
5502 rtx inner_target
= 0;
5503 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5504 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5506 /* We can do the conversion inside EXP, which will often result
5507 in some optimizations. Do the conversion in two steps: first
5508 change the signedness, if needed, then the extend. But don't
5509 do this if the type of EXP is a subtype of something else
5510 since then the conversion might involve more than just
5511 converting modes. */
5512 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5513 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5514 && GET_MODE_PRECISION (outer_mode
)
5515 == TYPE_PRECISION (TREE_TYPE (exp
)))
5517 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5518 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5520 /* Some types, e.g. Fortran's logical*4, won't have a signed
5521 version, so use the mode instead. */
5523 = (signed_or_unsigned_type_for
5524 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5526 ntype
= lang_hooks
.types
.type_for_mode
5527 (TYPE_MODE (TREE_TYPE (exp
)),
5528 SUBREG_PROMOTED_SIGN (target
));
5530 exp
= fold_convert_loc (loc
, ntype
, exp
);
5533 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5534 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5537 inner_target
= SUBREG_REG (target
);
5540 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5541 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5543 /* Handle bounds returned by call. */
5544 if (TREE_CODE (exp
) == CALL_EXPR
)
5547 chkp_split_slot (temp
, &temp
, &bounds
);
5548 if (bounds
&& btarget
)
5550 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5551 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5552 chkp_set_rtl_bounds (btarget
, tmp
);
5556 /* If TEMP is a VOIDmode constant, use convert_modes to make
5557 sure that we properly convert it. */
5558 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5560 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5561 temp
, SUBREG_PROMOTED_SIGN (target
));
5562 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5563 SUBREG_PROMOTED_SIGN (target
));
5566 convert_move (SUBREG_REG (target
), temp
,
5567 SUBREG_PROMOTED_SIGN (target
));
5571 else if ((TREE_CODE (exp
) == STRING_CST
5572 || (TREE_CODE (exp
) == MEM_REF
5573 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5574 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5576 && integer_zerop (TREE_OPERAND (exp
, 1))))
5577 && !nontemporal
&& !call_param_p
5580 /* Optimize initialization of an array with a STRING_CST. */
5581 HOST_WIDE_INT exp_len
, str_copy_len
;
5583 tree str
= TREE_CODE (exp
) == STRING_CST
5584 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5586 exp_len
= int_expr_size (exp
);
5590 if (TREE_STRING_LENGTH (str
) <= 0)
5593 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5594 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5597 str_copy_len
= TREE_STRING_LENGTH (str
);
5598 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5599 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5601 str_copy_len
+= STORE_MAX_PIECES
- 1;
5602 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5604 str_copy_len
= MIN (str_copy_len
, exp_len
);
5605 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5606 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5607 MEM_ALIGN (target
), false))
5612 dest_mem
= store_by_pieces (dest_mem
,
5613 str_copy_len
, builtin_strncpy_read_str
,
5615 TREE_STRING_POINTER (str
)),
5616 MEM_ALIGN (target
), false,
5617 exp_len
> str_copy_len
? 1 : 0);
5618 if (exp_len
> str_copy_len
)
5619 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5620 GEN_INT (exp_len
- str_copy_len
),
5629 /* If we want to use a nontemporal or a reverse order store, force the
5630 value into a register first. */
5631 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5632 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5634 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5637 /* Handle bounds returned by call. */
5638 if (TREE_CODE (exp
) == CALL_EXPR
)
5641 chkp_split_slot (temp
, &temp
, &bounds
);
5642 if (bounds
&& btarget
)
5644 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5645 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5646 chkp_set_rtl_bounds (btarget
, tmp
);
5651 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5652 the same as that of TARGET, adjust the constant. This is needed, for
5653 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5654 only a word-sized value. */
5655 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5656 && TREE_CODE (exp
) != ERROR_MARK
5657 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5659 if (GET_MODE_CLASS (GET_MODE (target
))
5660 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5661 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5662 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5664 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5665 TYPE_MODE (TREE_TYPE (exp
)), 0);
5669 if (GET_MODE (temp
) == VOIDmode
)
5670 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5671 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5674 /* If value was not generated in the target, store it there.
5675 Convert the value to TARGET's type first if necessary and emit the
5676 pending incrementations that have been queued when expanding EXP.
5677 Note that we cannot emit the whole queue blindly because this will
5678 effectively disable the POST_INC optimization later.
5680 If TEMP and TARGET compare equal according to rtx_equal_p, but
5681 one or both of them are volatile memory refs, we have to distinguish
5683 - expand_expr has used TARGET. In this case, we must not generate
5684 another copy. This can be detected by TARGET being equal according
5686 - expand_expr has not used TARGET - that means that the source just
5687 happens to have the same RTX form. Since temp will have been created
5688 by expand_expr, it will compare unequal according to == .
5689 We must generate a copy in this case, to reach the correct number
5690 of volatile memory references. */
5692 if ((! rtx_equal_p (temp
, target
)
5693 || (temp
!= target
&& (side_effects_p (temp
)
5694 || side_effects_p (target
))))
5695 && TREE_CODE (exp
) != ERROR_MARK
5696 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5697 but TARGET is not valid memory reference, TEMP will differ
5698 from TARGET although it is really the same location. */
5700 && rtx_equal_p (alt_rtl
, target
)
5701 && !side_effects_p (alt_rtl
)
5702 && !side_effects_p (target
))
5703 /* If there's nothing to copy, don't bother. Don't call
5704 expr_size unless necessary, because some front-ends (C++)
5705 expr_size-hook must not be given objects that are not
5706 supposed to be bit-copied or bit-initialized. */
5707 && expr_size (exp
) != const0_rtx
)
5709 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5711 if (GET_MODE (target
) == BLKmode
)
5713 /* Handle calls that return BLKmode values in registers. */
5714 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5715 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5717 store_bit_field (target
,
5718 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5719 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5722 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5725 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5727 /* Handle copying a string constant into an array. The string
5728 constant may be shorter than the array. So copy just the string's
5729 actual length, and clear the rest. First get the size of the data
5730 type of the string, which is actually the size of the target. */
5731 rtx size
= expr_size (exp
);
5733 if (CONST_INT_P (size
)
5734 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5735 emit_block_move (target
, temp
, size
,
5737 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5740 machine_mode pointer_mode
5741 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5742 machine_mode address_mode
= get_address_mode (target
);
5744 /* Compute the size of the data to copy from the string. */
5746 = size_binop_loc (loc
, MIN_EXPR
,
5747 make_tree (sizetype
, size
),
5748 size_int (TREE_STRING_LENGTH (exp
)));
5750 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5752 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5753 rtx_code_label
*label
= 0;
5755 /* Copy that much. */
5756 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5757 TYPE_UNSIGNED (sizetype
));
5758 emit_block_move (target
, temp
, copy_size_rtx
,
5760 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5762 /* Figure out how much is left in TARGET that we have to clear.
5763 Do all calculations in pointer_mode. */
5764 if (CONST_INT_P (copy_size_rtx
))
5766 size
= plus_constant (address_mode
, size
,
5767 -INTVAL (copy_size_rtx
));
5768 target
= adjust_address (target
, BLKmode
,
5769 INTVAL (copy_size_rtx
));
5773 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5774 copy_size_rtx
, NULL_RTX
, 0,
5777 if (GET_MODE (copy_size_rtx
) != address_mode
)
5778 copy_size_rtx
= convert_to_mode (address_mode
,
5780 TYPE_UNSIGNED (sizetype
));
5782 target
= offset_address (target
, copy_size_rtx
,
5783 highest_pow2_factor (copy_size
));
5784 label
= gen_label_rtx ();
5785 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5786 GET_MODE (size
), 0, label
);
5789 if (size
!= const0_rtx
)
5790 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5796 /* Handle calls that return values in multiple non-contiguous locations.
5797 The Irix 6 ABI has examples of this. */
5798 else if (GET_CODE (target
) == PARALLEL
)
5800 if (GET_CODE (temp
) == PARALLEL
)
5801 emit_group_move (target
, temp
);
5803 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5804 int_size_in_bytes (TREE_TYPE (exp
)));
5806 else if (GET_CODE (temp
) == PARALLEL
)
5807 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5808 int_size_in_bytes (TREE_TYPE (exp
)));
5809 else if (GET_MODE (temp
) == BLKmode
)
5810 emit_block_move (target
, temp
, expr_size (exp
),
5812 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5813 /* If we emit a nontemporal store, there is nothing else to do. */
5814 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5819 temp
= flip_storage_order (GET_MODE (target
), temp
);
5820 temp
= force_operand (temp
, target
);
5822 emit_move_insn (target
, temp
);
5829 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5831 store_expr (tree exp
, rtx target
, int call_param_p
, bool nontemporal
,
5834 return store_expr_with_bounds (exp
, target
, call_param_p
, nontemporal
,
5838 /* Return true if field F of structure TYPE is a flexible array. */
5841 flexible_array_member_p (const_tree f
, const_tree type
)
5846 return (DECL_CHAIN (f
) == NULL
5847 && TREE_CODE (tf
) == ARRAY_TYPE
5849 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5850 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5851 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5852 && int_size_in_bytes (type
) >= 0);
5855 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5856 must have in order for it to completely initialize a value of type TYPE.
5857 Return -1 if the number isn't known.
5859 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5861 static HOST_WIDE_INT
5862 count_type_elements (const_tree type
, bool for_ctor_p
)
5864 switch (TREE_CODE (type
))
5870 nelts
= array_type_nelts (type
);
5871 if (nelts
&& tree_fits_uhwi_p (nelts
))
5873 unsigned HOST_WIDE_INT n
;
5875 n
= tree_to_uhwi (nelts
) + 1;
5876 if (n
== 0 || for_ctor_p
)
5879 return n
* count_type_elements (TREE_TYPE (type
), false);
5881 return for_ctor_p
? -1 : 1;
5886 unsigned HOST_WIDE_INT n
;
5890 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5891 if (TREE_CODE (f
) == FIELD_DECL
)
5894 n
+= count_type_elements (TREE_TYPE (f
), false);
5895 else if (!flexible_array_member_p (f
, type
))
5896 /* Don't count flexible arrays, which are not supposed
5897 to be initialized. */
5905 case QUAL_UNION_TYPE
:
5910 gcc_assert (!for_ctor_p
);
5911 /* Estimate the number of scalars in each field and pick the
5912 maximum. Other estimates would do instead; the idea is simply
5913 to make sure that the estimate is not sensitive to the ordering
5916 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5917 if (TREE_CODE (f
) == FIELD_DECL
)
5919 m
= count_type_elements (TREE_TYPE (f
), false);
5920 /* If the field doesn't span the whole union, add an extra
5921 scalar for the rest. */
5922 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5923 TYPE_SIZE (type
)) != 1)
5936 unsigned HOST_WIDE_INT nelts
;
5937 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
5945 case FIXED_POINT_TYPE
:
5950 case REFERENCE_TYPE
:
5966 /* Helper for categorize_ctor_elements. Identical interface. */
5969 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5970 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5972 unsigned HOST_WIDE_INT idx
;
5973 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5974 tree value
, purpose
, elt_type
;
5976 /* Whether CTOR is a valid constant initializer, in accordance with what
5977 initializer_constant_valid_p does. If inferred from the constructor
5978 elements, true until proven otherwise. */
5979 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5980 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5985 elt_type
= NULL_TREE
;
5987 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5989 HOST_WIDE_INT mult
= 1;
5991 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5993 tree lo_index
= TREE_OPERAND (purpose
, 0);
5994 tree hi_index
= TREE_OPERAND (purpose
, 1);
5996 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
5997 mult
= (tree_to_uhwi (hi_index
)
5998 - tree_to_uhwi (lo_index
) + 1);
6001 elt_type
= TREE_TYPE (value
);
6003 switch (TREE_CODE (value
))
6007 HOST_WIDE_INT nz
= 0, ic
= 0;
6009 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
6012 nz_elts
+= mult
* nz
;
6013 init_elts
+= mult
* ic
;
6015 if (const_from_elts_p
&& const_p
)
6016 const_p
= const_elt_p
;
6023 if (!initializer_zerop (value
))
6029 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6030 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6034 if (!initializer_zerop (TREE_REALPART (value
)))
6036 if (!initializer_zerop (TREE_IMAGPART (value
)))
6043 /* We can only construct constant-length vectors using
6045 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6046 for (unsigned int i
= 0; i
< nunits
; ++i
)
6048 tree v
= VECTOR_CST_ELT (value
, i
);
6049 if (!initializer_zerop (v
))
6058 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6059 nz_elts
+= mult
* tc
;
6060 init_elts
+= mult
* tc
;
6062 if (const_from_elts_p
&& const_p
)
6064 = initializer_constant_valid_p (value
,
6066 TYPE_REVERSE_STORAGE_ORDER
6074 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6075 num_fields
, elt_type
))
6076 *p_complete
= false;
6078 *p_nz_elts
+= nz_elts
;
6079 *p_init_elts
+= init_elts
;
6084 /* Examine CTOR to discover:
6085 * how many scalar fields are set to nonzero values,
6086 and place it in *P_NZ_ELTS;
6087 * how many scalar fields in total are in CTOR,
6088 and place it in *P_ELT_COUNT.
6089 * whether the constructor is complete -- in the sense that every
6090 meaningful byte is explicitly given a value --
6091 and place it in *P_COMPLETE.
6093 Return whether or not CTOR is a valid static constant initializer, the same
6094 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6097 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6098 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6104 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
6107 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6108 of which had type LAST_TYPE. Each element was itself a complete
6109 initializer, in the sense that every meaningful byte was explicitly
6110 given a value. Return true if the same is true for the constructor
6114 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6115 const_tree last_type
)
6117 if (TREE_CODE (type
) == UNION_TYPE
6118 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6123 gcc_assert (num_elts
== 1 && last_type
);
6125 /* ??? We could look at each element of the union, and find the
6126 largest element. Which would avoid comparing the size of the
6127 initialized element against any tail padding in the union.
6128 Doesn't seem worth the effort... */
6129 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6132 return count_type_elements (type
, true) == num_elts
;
6135 /* Return 1 if EXP contains mostly (3/4) zeros. */
6138 mostly_zeros_p (const_tree exp
)
6140 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6142 HOST_WIDE_INT nz_elts
, init_elts
;
6145 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6146 return !complete_p
|| nz_elts
< init_elts
/ 4;
6149 return initializer_zerop (exp
);
6152 /* Return 1 if EXP contains all zeros. */
6155 all_zeros_p (const_tree exp
)
6157 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6159 HOST_WIDE_INT nz_elts
, init_elts
;
6162 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
6163 return nz_elts
== 0;
6166 return initializer_zerop (exp
);
6169 /* Helper function for store_constructor.
6170 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6171 CLEARED is as for store_constructor.
6172 ALIAS_SET is the alias set to use for any stores.
6173 If REVERSE is true, the store is to be done in reverse order.
6175 This provides a recursive shortcut back to store_constructor when it isn't
6176 necessary to go through store_field. This is so that we can pass through
6177 the cleared field to let store_constructor know that we may not have to
6178 clear a substructure if the outer structure has already been cleared. */
6181 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6182 poly_uint64 bitregion_start
,
6183 poly_uint64 bitregion_end
,
6185 tree exp
, int cleared
,
6186 alias_set_type alias_set
, bool reverse
)
6189 poly_uint64 bytesize
;
6190 if (TREE_CODE (exp
) == CONSTRUCTOR
6191 /* We can only call store_constructor recursively if the size and
6192 bit position are on a byte boundary. */
6193 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6194 && maybe_ne (bitsize
, 0U)
6195 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6196 /* If we have a nonzero bitpos for a register target, then we just
6197 let store_field do the bitfield handling. This is unlikely to
6198 generate unnecessary clear instructions anyways. */
6199 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6203 machine_mode target_mode
= GET_MODE (target
);
6204 if (target_mode
!= BLKmode
6205 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6206 target_mode
= BLKmode
;
6207 target
= adjust_address (target
, target_mode
, bytepos
);
6211 /* Update the alias set, if required. */
6212 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6213 && MEM_ALIAS_SET (target
) != 0)
6215 target
= copy_rtx (target
);
6216 set_mem_alias_set (target
, alias_set
);
6219 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6222 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6223 exp
, alias_set
, false, reverse
);
6227 /* Returns the number of FIELD_DECLs in TYPE. */
6230 fields_length (const_tree type
)
6232 tree t
= TYPE_FIELDS (type
);
6235 for (; t
; t
= DECL_CHAIN (t
))
6236 if (TREE_CODE (t
) == FIELD_DECL
)
6243 /* Store the value of constructor EXP into the rtx TARGET.
6244 TARGET is either a REG or a MEM; we know it cannot conflict, since
6245 safe_from_p has been called.
6246 CLEARED is true if TARGET is known to have been zero'd.
6247 SIZE is the number of bytes of TARGET we are allowed to modify: this
6248 may not be the same as the size of EXP if we are assigning to a field
6249 which has been packed to exclude padding bits.
6250 If REVERSE is true, the store is to be done in reverse order. */
6253 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6256 tree type
= TREE_TYPE (exp
);
6257 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6258 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6260 switch (TREE_CODE (type
))
6264 case QUAL_UNION_TYPE
:
6266 unsigned HOST_WIDE_INT idx
;
6269 /* The storage order is specified for every aggregate type. */
6270 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6272 /* If size is zero or the target is already cleared, do nothing. */
6273 if (known_eq (size
, 0) || cleared
)
6275 /* We either clear the aggregate or indicate the value is dead. */
6276 else if ((TREE_CODE (type
) == UNION_TYPE
6277 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6278 && ! CONSTRUCTOR_ELTS (exp
))
6279 /* If the constructor is empty, clear the union. */
6281 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6285 /* If we are building a static constructor into a register,
6286 set the initial value as zero so we can fold the value into
6287 a constant. But if more than one register is involved,
6288 this probably loses. */
6289 else if (REG_P (target
) && TREE_STATIC (exp
)
6290 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6291 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6293 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6297 /* If the constructor has fewer fields than the structure or
6298 if we are initializing the structure to mostly zeros, clear
6299 the whole structure first. Don't do this if TARGET is a
6300 register whose mode size isn't equal to SIZE since
6301 clear_storage can't handle this case. */
6302 else if (known_size_p (size
)
6303 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6304 || mostly_zeros_p (exp
))
6306 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6308 clear_storage (target
, gen_int_mode (size
, Pmode
),
6313 if (REG_P (target
) && !cleared
)
6314 emit_clobber (target
);
6316 /* Store each element of the constructor into the
6317 corresponding field of TARGET. */
6318 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6321 HOST_WIDE_INT bitsize
;
6322 HOST_WIDE_INT bitpos
= 0;
6324 rtx to_rtx
= target
;
6326 /* Just ignore missing fields. We cleared the whole
6327 structure, above, if any fields are missing. */
6331 if (cleared
&& initializer_zerop (value
))
6334 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6335 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6339 mode
= DECL_MODE (field
);
6340 if (DECL_BIT_FIELD (field
))
6343 offset
= DECL_FIELD_OFFSET (field
);
6344 if (tree_fits_shwi_p (offset
)
6345 && tree_fits_shwi_p (bit_position (field
)))
6347 bitpos
= int_bit_position (field
);
6353 /* If this initializes a field that is smaller than a
6354 word, at the start of a word, try to widen it to a full
6355 word. This special case allows us to output C++ member
6356 function initializations in a form that the optimizers
6358 if (WORD_REGISTER_OPERATIONS
6360 && bitsize
< BITS_PER_WORD
6361 && bitpos
% BITS_PER_WORD
== 0
6362 && GET_MODE_CLASS (mode
) == MODE_INT
6363 && TREE_CODE (value
) == INTEGER_CST
6365 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6367 tree type
= TREE_TYPE (value
);
6369 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6371 type
= lang_hooks
.types
.type_for_mode
6372 (word_mode
, TYPE_UNSIGNED (type
));
6373 value
= fold_convert (type
, value
);
6374 /* Make sure the bits beyond the original bitsize are zero
6375 so that we can correctly avoid extra zeroing stores in
6376 later constructor elements. */
6378 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6380 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6383 if (BYTES_BIG_ENDIAN
)
6385 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6386 build_int_cst (type
,
6387 BITS_PER_WORD
- bitsize
));
6388 bitsize
= BITS_PER_WORD
;
6392 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6393 && DECL_NONADDRESSABLE_P (field
))
6395 to_rtx
= copy_rtx (to_rtx
);
6396 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6399 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6400 0, bitregion_end
, mode
,
6402 get_alias_set (TREE_TYPE (field
)),
6410 unsigned HOST_WIDE_INT i
;
6413 tree elttype
= TREE_TYPE (type
);
6415 HOST_WIDE_INT minelt
= 0;
6416 HOST_WIDE_INT maxelt
= 0;
6418 /* The storage order is specified for every aggregate type. */
6419 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6421 domain
= TYPE_DOMAIN (type
);
6422 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6423 && TYPE_MAX_VALUE (domain
)
6424 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6425 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6427 /* If we have constant bounds for the range of the type, get them. */
6430 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6431 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6434 /* If the constructor has fewer elements than the array, clear
6435 the whole array first. Similarly if this is static
6436 constructor of a non-BLKmode object. */
6439 else if (REG_P (target
) && TREE_STATIC (exp
))
6443 unsigned HOST_WIDE_INT idx
;
6445 HOST_WIDE_INT count
= 0, zero_count
= 0;
6446 need_to_clear
= ! const_bounds_p
;
6448 /* This loop is a more accurate version of the loop in
6449 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6450 is also needed to check for missing elements. */
6451 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6453 HOST_WIDE_INT this_node_count
;
6458 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6460 tree lo_index
= TREE_OPERAND (index
, 0);
6461 tree hi_index
= TREE_OPERAND (index
, 1);
6463 if (! tree_fits_uhwi_p (lo_index
)
6464 || ! tree_fits_uhwi_p (hi_index
))
6470 this_node_count
= (tree_to_uhwi (hi_index
)
6471 - tree_to_uhwi (lo_index
) + 1);
6474 this_node_count
= 1;
6476 count
+= this_node_count
;
6477 if (mostly_zeros_p (value
))
6478 zero_count
+= this_node_count
;
6481 /* Clear the entire array first if there are any missing
6482 elements, or if the incidence of zero elements is >=
6485 && (count
< maxelt
- minelt
+ 1
6486 || 4 * zero_count
>= 3 * count
))
6490 if (need_to_clear
&& maybe_gt (size
, 0))
6493 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6495 clear_storage (target
, gen_int_mode (size
, Pmode
),
6500 if (!cleared
&& REG_P (target
))
6501 /* Inform later passes that the old value is dead. */
6502 emit_clobber (target
);
6504 /* Store each element of the constructor into the
6505 corresponding element of TARGET, determined by counting the
6507 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6511 HOST_WIDE_INT bitpos
;
6512 rtx xtarget
= target
;
6514 if (cleared
&& initializer_zerop (value
))
6517 mode
= TYPE_MODE (elttype
);
6518 if (mode
== BLKmode
)
6519 bitsize
= (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6520 ? tree_to_uhwi (TYPE_SIZE (elttype
))
6523 bitsize
= GET_MODE_BITSIZE (mode
);
6525 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6527 tree lo_index
= TREE_OPERAND (index
, 0);
6528 tree hi_index
= TREE_OPERAND (index
, 1);
6529 rtx index_r
, pos_rtx
;
6530 HOST_WIDE_INT lo
, hi
, count
;
6533 /* If the range is constant and "small", unroll the loop. */
6535 && tree_fits_shwi_p (lo_index
)
6536 && tree_fits_shwi_p (hi_index
)
6537 && (lo
= tree_to_shwi (lo_index
),
6538 hi
= tree_to_shwi (hi_index
),
6539 count
= hi
- lo
+ 1,
6542 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6543 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6546 lo
-= minelt
; hi
-= minelt
;
6547 for (; lo
<= hi
; lo
++)
6549 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6552 && !MEM_KEEP_ALIAS_SET_P (target
)
6553 && TREE_CODE (type
) == ARRAY_TYPE
6554 && TYPE_NONALIASED_COMPONENT (type
))
6556 target
= copy_rtx (target
);
6557 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6560 store_constructor_field
6561 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6562 mode
, value
, cleared
,
6563 get_alias_set (elttype
), reverse
);
6568 rtx_code_label
*loop_start
= gen_label_rtx ();
6569 rtx_code_label
*loop_end
= gen_label_rtx ();
6572 expand_normal (hi_index
);
6574 index
= build_decl (EXPR_LOCATION (exp
),
6575 VAR_DECL
, NULL_TREE
, domain
);
6576 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6577 SET_DECL_RTL (index
, index_r
);
6578 store_expr (lo_index
, index_r
, 0, false, reverse
);
6580 /* Build the head of the loop. */
6581 do_pending_stack_adjust ();
6582 emit_label (loop_start
);
6584 /* Assign value to element index. */
6586 fold_convert (ssizetype
,
6587 fold_build2 (MINUS_EXPR
,
6590 TYPE_MIN_VALUE (domain
)));
6593 size_binop (MULT_EXPR
, position
,
6594 fold_convert (ssizetype
,
6595 TYPE_SIZE_UNIT (elttype
)));
6597 pos_rtx
= expand_normal (position
);
6598 xtarget
= offset_address (target
, pos_rtx
,
6599 highest_pow2_factor (position
));
6600 xtarget
= adjust_address (xtarget
, mode
, 0);
6601 if (TREE_CODE (value
) == CONSTRUCTOR
)
6602 store_constructor (value
, xtarget
, cleared
,
6603 exact_div (bitsize
, BITS_PER_UNIT
),
6606 store_expr (value
, xtarget
, 0, false, reverse
);
6608 /* Generate a conditional jump to exit the loop. */
6609 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6611 jumpif (exit_cond
, loop_end
,
6612 profile_probability::uninitialized ());
6614 /* Update the loop counter, and jump to the head of
6616 expand_assignment (index
,
6617 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6618 index
, integer_one_node
),
6621 emit_jump (loop_start
);
6623 /* Build the end of the loop. */
6624 emit_label (loop_end
);
6627 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6628 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6633 index
= ssize_int (1);
6636 index
= fold_convert (ssizetype
,
6637 fold_build2 (MINUS_EXPR
,
6640 TYPE_MIN_VALUE (domain
)));
6643 size_binop (MULT_EXPR
, index
,
6644 fold_convert (ssizetype
,
6645 TYPE_SIZE_UNIT (elttype
)));
6646 xtarget
= offset_address (target
,
6647 expand_normal (position
),
6648 highest_pow2_factor (position
));
6649 xtarget
= adjust_address (xtarget
, mode
, 0);
6650 store_expr (value
, xtarget
, 0, false, reverse
);
6655 bitpos
= ((tree_to_shwi (index
) - minelt
)
6656 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6658 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6660 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6661 && TREE_CODE (type
) == ARRAY_TYPE
6662 && TYPE_NONALIASED_COMPONENT (type
))
6664 target
= copy_rtx (target
);
6665 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6667 store_constructor_field (target
, bitsize
, bitpos
, 0,
6668 bitregion_end
, mode
, value
,
6669 cleared
, get_alias_set (elttype
),
6678 unsigned HOST_WIDE_INT idx
;
6679 constructor_elt
*ce
;
6682 insn_code icode
= CODE_FOR_nothing
;
6684 tree elttype
= TREE_TYPE (type
);
6685 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6686 machine_mode eltmode
= TYPE_MODE (elttype
);
6687 HOST_WIDE_INT bitsize
;
6688 HOST_WIDE_INT bitpos
;
6689 rtvec vector
= NULL
;
6691 unsigned HOST_WIDE_INT const_n_elts
;
6692 alias_set_type alias
;
6693 bool vec_vec_init_p
= false;
6694 machine_mode mode
= GET_MODE (target
);
6696 gcc_assert (eltmode
!= BLKmode
);
6698 /* Try using vec_duplicate_optab for uniform vectors. */
6699 if (!TREE_SIDE_EFFECTS (exp
)
6700 && VECTOR_MODE_P (mode
)
6701 && eltmode
== GET_MODE_INNER (mode
)
6702 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6703 != CODE_FOR_nothing
)
6704 && (elt
= uniform_vector_p (exp
)))
6706 struct expand_operand ops
[2];
6707 create_output_operand (&ops
[0], target
, mode
);
6708 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6709 expand_insn (icode
, 2, ops
);
6710 if (!rtx_equal_p (target
, ops
[0].value
))
6711 emit_move_insn (target
, ops
[0].value
);
6715 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6717 && VECTOR_MODE_P (mode
)
6718 && n_elts
.is_constant (&const_n_elts
))
6720 machine_mode emode
= eltmode
;
6722 if (CONSTRUCTOR_NELTS (exp
)
6723 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6726 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6727 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6728 * TYPE_VECTOR_SUBPARTS (etype
),
6730 emode
= TYPE_MODE (etype
);
6732 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6733 if (icode
!= CODE_FOR_nothing
)
6735 unsigned int i
, n
= const_n_elts
;
6737 if (emode
!= eltmode
)
6739 n
= CONSTRUCTOR_NELTS (exp
);
6740 vec_vec_init_p
= true;
6742 vector
= rtvec_alloc (n
);
6743 for (i
= 0; i
< n
; i
++)
6744 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6748 /* If the constructor has fewer elements than the vector,
6749 clear the whole array first. Similarly if this is static
6750 constructor of a non-BLKmode object. */
6753 else if (REG_P (target
) && TREE_STATIC (exp
))
6757 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6760 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6762 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6764 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6765 TYPE_SIZE (elttype
)));
6767 count
+= n_elts_here
;
6768 if (mostly_zeros_p (value
))
6769 zero_count
+= n_elts_here
;
6772 /* Clear the entire vector first if there are any missing elements,
6773 or if the incidence of zero elements is >= 75%. */
6774 need_to_clear
= (maybe_lt (count
, n_elts
)
6775 || 4 * zero_count
>= 3 * count
);
6778 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6781 emit_move_insn (target
, CONST0_RTX (mode
));
6783 clear_storage (target
, gen_int_mode (size
, Pmode
),
6788 /* Inform later passes that the old value is dead. */
6789 if (!cleared
&& !vector
&& REG_P (target
))
6790 emit_move_insn (target
, CONST0_RTX (mode
));
6793 alias
= MEM_ALIAS_SET (target
);
6795 alias
= get_alias_set (elttype
);
6797 /* Store each element of the constructor into the corresponding
6798 element of TARGET, determined by counting the elements. */
6799 for (idx
= 0, i
= 0;
6800 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6801 idx
++, i
+= bitsize
/ elt_size
)
6803 HOST_WIDE_INT eltpos
;
6804 tree value
= ce
->value
;
6806 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6807 if (cleared
&& initializer_zerop (value
))
6811 eltpos
= tree_to_uhwi (ce
->index
);
6819 gcc_assert (ce
->index
== NULL_TREE
);
6820 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6824 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6825 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6829 machine_mode value_mode
6830 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6831 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6832 bitpos
= eltpos
* elt_size
;
6833 store_constructor_field (target
, bitsize
, bitpos
, 0,
6834 bitregion_end
, value_mode
,
6835 value
, cleared
, alias
, reverse
);
6840 emit_insn (GEN_FCN (icode
) (target
,
6841 gen_rtx_PARALLEL (mode
, vector
)));
6850 /* Store the value of EXP (an expression tree)
6851 into a subfield of TARGET which has mode MODE and occupies
6852 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6853 If MODE is VOIDmode, it means that we are storing into a bit-field.
6855 BITREGION_START is bitpos of the first bitfield in this region.
6856 BITREGION_END is the bitpos of the ending bitfield in this region.
6857 These two fields are 0, if the C++ memory model does not apply,
6858 or we are not interested in keeping track of bitfield regions.
6860 Always return const0_rtx unless we have something particular to
6863 ALIAS_SET is the alias set for the destination. This value will
6864 (in general) be different from that for TARGET, since TARGET is a
6865 reference to the containing structure.
6867 If NONTEMPORAL is true, try generating a nontemporal store.
6869 If REVERSE is true, the store is to be done in reverse order. */
6872 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
6873 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
6874 machine_mode mode
, tree exp
,
6875 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6877 if (TREE_CODE (exp
) == ERROR_MARK
)
6880 /* If we have nothing to store, do nothing unless the expression has
6881 side-effects. Don't do that for zero sized addressable lhs of
6883 if (known_eq (bitsize
, 0)
6884 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6885 || TREE_CODE (exp
) != CALL_EXPR
))
6886 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6888 if (GET_CODE (target
) == CONCAT
)
6890 /* We're storing into a struct containing a single __complex. */
6892 gcc_assert (known_eq (bitpos
, 0));
6893 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6896 /* If the structure is in a register or if the component
6897 is a bit field, we cannot use addressing to access it.
6898 Use bit-field techniques or SUBREG to store in it. */
6900 poly_int64 decl_bitsize
;
6901 if (mode
== VOIDmode
6902 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6903 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6904 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6906 || GET_CODE (target
) == SUBREG
6907 /* If the field isn't aligned enough to store as an ordinary memref,
6908 store it as a bit field. */
6910 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6911 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
6912 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6913 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
6914 || (known_size_p (bitsize
)
6916 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
6917 /* If the RHS and field are a constant size and the size of the
6918 RHS isn't the same size as the bitfield, we must use bitfield
6920 || (known_size_p (bitsize
)
6921 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
6922 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
6924 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6925 we will handle specially below. */
6926 && !(TREE_CODE (exp
) == CONSTRUCTOR
6927 && multiple_p (bitsize
, BITS_PER_UNIT
))
6928 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6929 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6930 includes some extra padding. store_expr / expand_expr will in
6931 that case call get_inner_reference that will have the bitsize
6932 we check here and thus the block move will not clobber the
6933 padding that shouldn't be clobbered. In the future we could
6934 replace the TREE_ADDRESSABLE check with a check that
6935 get_base_address needs to live in memory. */
6936 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6937 || TREE_CODE (exp
) != COMPONENT_REF
6938 || !multiple_p (bitsize
, BITS_PER_UNIT
)
6939 || !multiple_p (bitpos
, BITS_PER_UNIT
)
6940 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
6942 || maybe_ne (decl_bitsize
, bitsize
)))
6943 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6944 decl we must use bitfield operations. */
6945 || (known_size_p (bitsize
)
6946 && TREE_CODE (exp
) == MEM_REF
6947 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6948 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6949 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6950 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6955 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6956 implies a mask operation. If the precision is the same size as
6957 the field we're storing into, that mask is redundant. This is
6958 particularly common with bit field assignments generated by the
6960 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6963 tree type
= TREE_TYPE (exp
);
6964 if (INTEGRAL_TYPE_P (type
)
6965 && maybe_ne (TYPE_PRECISION (type
),
6966 GET_MODE_BITSIZE (TYPE_MODE (type
)))
6967 && known_eq (bitsize
, TYPE_PRECISION (type
)))
6969 tree op
= gimple_assign_rhs1 (nop_def
);
6970 type
= TREE_TYPE (op
);
6971 if (INTEGRAL_TYPE_P (type
)
6972 && known_ge (TYPE_PRECISION (type
), bitsize
))
6977 temp
= expand_normal (exp
);
6979 /* We don't support variable-sized BLKmode bitfields, since our
6980 handling of BLKmode is bound up with the ability to break
6981 things into words. */
6982 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
6984 /* Handle calls that return values in multiple non-contiguous locations.
6985 The Irix 6 ABI has examples of this. */
6986 if (GET_CODE (temp
) == PARALLEL
)
6988 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6989 scalar_int_mode temp_mode
6990 = smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
6991 rtx temp_target
= gen_reg_rtx (temp_mode
);
6992 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6996 /* Handle calls that return BLKmode values in registers. */
6997 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6999 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7000 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7004 /* If the value has aggregate type and an integral mode then, if BITSIZE
7005 is narrower than this mode and this is for big-endian data, we first
7006 need to put the value into the low-order bits for store_bit_field,
7007 except when MODE is BLKmode and BITSIZE larger than the word size
7008 (see the handling of fields larger than a word in store_bit_field).
7009 Moreover, the field may be not aligned on a byte boundary; in this
7010 case, if it has reverse storage order, it needs to be accessed as a
7011 scalar field with reverse storage order and we must first put the
7012 value into target order. */
7013 scalar_int_mode temp_mode
;
7014 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7015 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7017 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7019 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7022 temp
= flip_storage_order (temp_mode
, temp
);
7024 gcc_checking_assert (known_le (bitsize
, size
));
7025 if (maybe_lt (bitsize
, size
)
7026 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7027 /* Use of to_constant for BLKmode was checked above. */
7028 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7029 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7030 size
- bitsize
, NULL_RTX
, 1);
7033 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7034 if (mode
!= VOIDmode
&& mode
!= BLKmode
7035 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7036 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7038 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7039 and BITPOS must be aligned on a byte boundary. If so, we simply do
7040 a block copy. Likewise for a BLKmode-like TARGET. */
7041 if (GET_MODE (temp
) == BLKmode
7042 && (GET_MODE (target
) == BLKmode
7044 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7045 && multiple_p (bitpos
, BITS_PER_UNIT
)
7046 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7048 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7049 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7050 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7052 target
= adjust_address (target
, VOIDmode
, bytepos
);
7053 emit_block_move (target
, temp
,
7054 gen_int_mode (bytesize
, Pmode
),
7060 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7061 word size, we need to load the value (see again store_bit_field). */
7062 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7064 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
7065 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7066 temp_mode
, false, NULL
);
7069 /* Store the value in the bitfield. */
7070 store_bit_field (target
, bitsize
, bitpos
,
7071 bitregion_start
, bitregion_end
,
7072 mode
, temp
, reverse
);
7078 /* Now build a reference to just the desired component. */
7079 rtx to_rtx
= adjust_address (target
, mode
,
7080 exact_div (bitpos
, BITS_PER_UNIT
));
7082 if (to_rtx
== target
)
7083 to_rtx
= copy_rtx (to_rtx
);
7085 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7086 set_mem_alias_set (to_rtx
, alias_set
);
7088 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7089 into a target smaller than its type; handle that case now. */
7090 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7092 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7093 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7097 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7101 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7102 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7103 codes and find the ultimate containing object, which we return.
7105 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7106 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7107 storage order of the field.
7108 If the position of the field is variable, we store a tree
7109 giving the variable offset (in units) in *POFFSET.
7110 This offset is in addition to the bit position.
7111 If the position is not variable, we store 0 in *POFFSET.
7113 If any of the extraction expressions is volatile,
7114 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7116 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7117 Otherwise, it is a mode that can be used to access the field.
7119 If the field describes a variable-sized object, *PMODE is set to
7120 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7121 this case, but the address of the object can be found. */
7124 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7125 poly_int64_pod
*pbitpos
, tree
*poffset
,
7126 machine_mode
*pmode
, int *punsignedp
,
7127 int *preversep
, int *pvolatilep
)
7130 machine_mode mode
= VOIDmode
;
7131 bool blkmode_bitfield
= false;
7132 tree offset
= size_zero_node
;
7133 poly_offset_int bit_offset
= 0;
7135 /* First get the mode, signedness, storage order and size. We do this from
7136 just the outermost expression. */
7138 if (TREE_CODE (exp
) == COMPONENT_REF
)
7140 tree field
= TREE_OPERAND (exp
, 1);
7141 size_tree
= DECL_SIZE (field
);
7142 if (flag_strict_volatile_bitfields
> 0
7143 && TREE_THIS_VOLATILE (exp
)
7144 && DECL_BIT_FIELD_TYPE (field
)
7145 && DECL_MODE (field
) != BLKmode
)
7146 /* Volatile bitfields should be accessed in the mode of the
7147 field's type, not the mode computed based on the bit
7149 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7150 else if (!DECL_BIT_FIELD (field
))
7152 mode
= DECL_MODE (field
);
7153 /* For vector fields re-check the target flags, as DECL_MODE
7154 could have been set with different target flags than
7155 the current function has. */
7157 && VECTOR_TYPE_P (TREE_TYPE (field
))
7158 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7159 mode
= TYPE_MODE (TREE_TYPE (field
));
7161 else if (DECL_MODE (field
) == BLKmode
)
7162 blkmode_bitfield
= true;
7164 *punsignedp
= DECL_UNSIGNED (field
);
7166 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7168 size_tree
= TREE_OPERAND (exp
, 1);
7169 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7170 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7172 /* For vector types, with the correct size of access, use the mode of
7174 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7175 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7176 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7177 mode
= TYPE_MODE (TREE_TYPE (exp
));
7181 mode
= TYPE_MODE (TREE_TYPE (exp
));
7182 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7184 if (mode
== BLKmode
)
7185 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7187 *pbitsize
= GET_MODE_BITSIZE (mode
);
7192 if (! tree_fits_uhwi_p (size_tree
))
7193 mode
= BLKmode
, *pbitsize
= -1;
7195 *pbitsize
= tree_to_uhwi (size_tree
);
7198 *preversep
= reverse_storage_order_for_component_p (exp
);
7200 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7201 and find the ultimate containing object. */
7204 switch (TREE_CODE (exp
))
7207 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7212 tree field
= TREE_OPERAND (exp
, 1);
7213 tree this_offset
= component_ref_field_offset (exp
);
7215 /* If this field hasn't been filled in yet, don't go past it.
7216 This should only happen when folding expressions made during
7217 type construction. */
7218 if (this_offset
== 0)
7221 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7222 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7224 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7229 case ARRAY_RANGE_REF
:
7231 tree index
= TREE_OPERAND (exp
, 1);
7232 tree low_bound
= array_ref_low_bound (exp
);
7233 tree unit_size
= array_ref_element_size (exp
);
7235 /* We assume all arrays have sizes that are a multiple of a byte.
7236 First subtract the lower bound, if any, in the type of the
7237 index, then convert to sizetype and multiply by the size of
7238 the array element. */
7239 if (! integer_zerop (low_bound
))
7240 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7243 offset
= size_binop (PLUS_EXPR
, offset
,
7244 size_binop (MULT_EXPR
,
7245 fold_convert (sizetype
, index
),
7254 bit_offset
+= *pbitsize
;
7257 case VIEW_CONVERT_EXPR
:
7261 /* Hand back the decl for MEM[&decl, off]. */
7262 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7264 tree off
= TREE_OPERAND (exp
, 1);
7265 if (!integer_zerop (off
))
7267 poly_offset_int boff
= mem_ref_offset (exp
);
7268 boff
<<= LOG2_BITS_PER_UNIT
;
7271 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7279 /* If any reference in the chain is volatile, the effect is volatile. */
7280 if (TREE_THIS_VOLATILE (exp
))
7283 exp
= TREE_OPERAND (exp
, 0);
7287 /* If OFFSET is constant, see if we can return the whole thing as a
7288 constant bit position. Make sure to handle overflow during
7290 if (poly_int_tree_p (offset
))
7292 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7293 TYPE_PRECISION (sizetype
));
7294 tem
<<= LOG2_BITS_PER_UNIT
;
7296 if (tem
.to_shwi (pbitpos
))
7297 *poffset
= offset
= NULL_TREE
;
7300 /* Otherwise, split it up. */
7303 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7304 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7306 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7307 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7308 offset
= size_binop (PLUS_EXPR
, offset
,
7309 build_int_cst (sizetype
, bytes
.force_shwi ()));
7315 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7316 if (mode
== VOIDmode
7318 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7319 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7327 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7329 static unsigned HOST_WIDE_INT
7330 target_align (const_tree target
)
7332 /* We might have a chain of nested references with intermediate misaligning
7333 bitfields components, so need to recurse to find out. */
7335 unsigned HOST_WIDE_INT this_align
, outer_align
;
7337 switch (TREE_CODE (target
))
7343 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7344 outer_align
= target_align (TREE_OPERAND (target
, 0));
7345 return MIN (this_align
, outer_align
);
7348 case ARRAY_RANGE_REF
:
7349 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7350 outer_align
= target_align (TREE_OPERAND (target
, 0));
7351 return MIN (this_align
, outer_align
);
7354 case NON_LVALUE_EXPR
:
7355 case VIEW_CONVERT_EXPR
:
7356 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7357 outer_align
= target_align (TREE_OPERAND (target
, 0));
7358 return MAX (this_align
, outer_align
);
7361 return TYPE_ALIGN (TREE_TYPE (target
));
7366 /* Given an rtx VALUE that may contain additions and multiplications, return
7367 an equivalent value that just refers to a register, memory, or constant.
7368 This is done by generating instructions to perform the arithmetic and
7369 returning a pseudo-register containing the value.
7371 The returned value may be a REG, SUBREG, MEM or constant. */
7374 force_operand (rtx value
, rtx target
)
7377 /* Use subtarget as the target for operand 0 of a binary operation. */
7378 rtx subtarget
= get_subtarget (target
);
7379 enum rtx_code code
= GET_CODE (value
);
7381 /* Check for subreg applied to an expression produced by loop optimizer. */
7383 && !REG_P (SUBREG_REG (value
))
7384 && !MEM_P (SUBREG_REG (value
)))
7387 = simplify_gen_subreg (GET_MODE (value
),
7388 force_reg (GET_MODE (SUBREG_REG (value
)),
7389 force_operand (SUBREG_REG (value
),
7391 GET_MODE (SUBREG_REG (value
)),
7392 SUBREG_BYTE (value
));
7393 code
= GET_CODE (value
);
7396 /* Check for a PIC address load. */
7397 if ((code
== PLUS
|| code
== MINUS
)
7398 && XEXP (value
, 0) == pic_offset_table_rtx
7399 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7400 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7401 || GET_CODE (XEXP (value
, 1)) == CONST
))
7404 subtarget
= gen_reg_rtx (GET_MODE (value
));
7405 emit_move_insn (subtarget
, value
);
7409 if (ARITHMETIC_P (value
))
7411 op2
= XEXP (value
, 1);
7412 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7414 if (code
== MINUS
&& CONST_INT_P (op2
))
7417 op2
= negate_rtx (GET_MODE (value
), op2
);
7420 /* Check for an addition with OP2 a constant integer and our first
7421 operand a PLUS of a virtual register and something else. In that
7422 case, we want to emit the sum of the virtual register and the
7423 constant first and then add the other value. This allows virtual
7424 register instantiation to simply modify the constant rather than
7425 creating another one around this addition. */
7426 if (code
== PLUS
&& CONST_INT_P (op2
)
7427 && GET_CODE (XEXP (value
, 0)) == PLUS
7428 && REG_P (XEXP (XEXP (value
, 0), 0))
7429 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7430 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7432 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7433 XEXP (XEXP (value
, 0), 0), op2
,
7434 subtarget
, 0, OPTAB_LIB_WIDEN
);
7435 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7436 force_operand (XEXP (XEXP (value
,
7438 target
, 0, OPTAB_LIB_WIDEN
);
7441 op1
= force_operand (XEXP (value
, 0), subtarget
);
7442 op2
= force_operand (op2
, NULL_RTX
);
7446 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7448 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7449 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7450 target
, 1, OPTAB_LIB_WIDEN
);
7452 return expand_divmod (0,
7453 FLOAT_MODE_P (GET_MODE (value
))
7454 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7455 GET_MODE (value
), op1
, op2
, target
, 0);
7457 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7460 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7463 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7466 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7467 target
, 0, OPTAB_LIB_WIDEN
);
7469 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7470 target
, 1, OPTAB_LIB_WIDEN
);
7473 if (UNARY_P (value
))
7476 target
= gen_reg_rtx (GET_MODE (value
));
7477 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7484 case FLOAT_TRUNCATE
:
7485 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7490 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7494 case UNSIGNED_FLOAT
:
7495 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7499 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7503 #ifdef INSN_SCHEDULING
7504 /* On machines that have insn scheduling, we want all memory reference to be
7505 explicit, so we need to deal with such paradoxical SUBREGs. */
7506 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7508 = simplify_gen_subreg (GET_MODE (value
),
7509 force_reg (GET_MODE (SUBREG_REG (value
)),
7510 force_operand (SUBREG_REG (value
),
7512 GET_MODE (SUBREG_REG (value
)),
7513 SUBREG_BYTE (value
));
7519 /* Subroutine of expand_expr: return nonzero iff there is no way that
7520 EXP can reference X, which is being modified. TOP_P is nonzero if this
7521 call is going to be used to determine whether we need a temporary
7522 for EXP, as opposed to a recursive call to this function.
7524 It is always safe for this routine to return zero since it merely
7525 searches for optimization opportunities. */
7528 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7534 /* If EXP has varying size, we MUST use a target since we currently
7535 have no way of allocating temporaries of variable size
7536 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7537 So we assume here that something at a higher level has prevented a
7538 clash. This is somewhat bogus, but the best we can do. Only
7539 do this when X is BLKmode and when we are at the top level. */
7540 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7541 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7542 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7543 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7544 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7546 && GET_MODE (x
) == BLKmode
)
7547 /* If X is in the outgoing argument area, it is always safe. */
7549 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7550 || (GET_CODE (XEXP (x
, 0)) == PLUS
7551 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7554 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7555 find the underlying pseudo. */
7556 if (GET_CODE (x
) == SUBREG
)
7559 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7563 /* Now look at our tree code and possibly recurse. */
7564 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7566 case tcc_declaration
:
7567 exp_rtl
= DECL_RTL_IF_SET (exp
);
7573 case tcc_exceptional
:
7574 if (TREE_CODE (exp
) == TREE_LIST
)
7578 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7580 exp
= TREE_CHAIN (exp
);
7583 if (TREE_CODE (exp
) != TREE_LIST
)
7584 return safe_from_p (x
, exp
, 0);
7587 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7589 constructor_elt
*ce
;
7590 unsigned HOST_WIDE_INT idx
;
7592 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7593 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7594 || !safe_from_p (x
, ce
->value
, 0))
7598 else if (TREE_CODE (exp
) == ERROR_MARK
)
7599 return 1; /* An already-visited SAVE_EXPR? */
7604 /* The only case we look at here is the DECL_INITIAL inside a
7606 return (TREE_CODE (exp
) != DECL_EXPR
7607 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7608 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7609 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7612 case tcc_comparison
:
7613 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7618 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7620 case tcc_expression
:
7623 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7624 the expression. If it is set, we conflict iff we are that rtx or
7625 both are in memory. Otherwise, we check all operands of the
7626 expression recursively. */
7628 switch (TREE_CODE (exp
))
7631 /* If the operand is static or we are static, we can't conflict.
7632 Likewise if we don't conflict with the operand at all. */
7633 if (staticp (TREE_OPERAND (exp
, 0))
7634 || TREE_STATIC (exp
)
7635 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7638 /* Otherwise, the only way this can conflict is if we are taking
7639 the address of a DECL a that address if part of X, which is
7641 exp
= TREE_OPERAND (exp
, 0);
7644 if (!DECL_RTL_SET_P (exp
)
7645 || !MEM_P (DECL_RTL (exp
)))
7648 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7654 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7655 get_alias_set (exp
)))
7660 /* Assume that the call will clobber all hard registers and
7662 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7667 case WITH_CLEANUP_EXPR
:
7668 case CLEANUP_POINT_EXPR
:
7669 /* Lowered by gimplify.c. */
7673 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7679 /* If we have an rtx, we do not need to scan our operands. */
7683 nops
= TREE_OPERAND_LENGTH (exp
);
7684 for (i
= 0; i
< nops
; i
++)
7685 if (TREE_OPERAND (exp
, i
) != 0
7686 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7692 /* Should never get a type here. */
7696 /* If we have an rtl, find any enclosed object. Then see if we conflict
7700 if (GET_CODE (exp_rtl
) == SUBREG
)
7702 exp_rtl
= SUBREG_REG (exp_rtl
);
7704 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7708 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7709 are memory and they conflict. */
7710 return ! (rtx_equal_p (x
, exp_rtl
)
7711 || (MEM_P (x
) && MEM_P (exp_rtl
)
7712 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7715 /* If we reach here, it is safe. */
7720 /* Return the highest power of two that EXP is known to be a multiple of.
7721 This is used in updating alignment of MEMs in array references. */
7723 unsigned HOST_WIDE_INT
7724 highest_pow2_factor (const_tree exp
)
7726 unsigned HOST_WIDE_INT ret
;
7727 int trailing_zeros
= tree_ctz (exp
);
7728 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7729 return BIGGEST_ALIGNMENT
;
7730 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7731 if (ret
> BIGGEST_ALIGNMENT
)
7732 return BIGGEST_ALIGNMENT
;
7736 /* Similar, except that the alignment requirements of TARGET are
7737 taken into account. Assume it is at least as aligned as its
7738 type, unless it is a COMPONENT_REF in which case the layout of
7739 the structure gives the alignment. */
7741 static unsigned HOST_WIDE_INT
7742 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7744 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7745 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7747 return MAX (factor
, talign
);
7750 /* Convert the tree comparison code TCODE to the rtl one where the
7751 signedness is UNSIGNEDP. */
7753 static enum rtx_code
7754 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7766 code
= unsignedp
? LTU
: LT
;
7769 code
= unsignedp
? LEU
: LE
;
7772 code
= unsignedp
? GTU
: GT
;
7775 code
= unsignedp
? GEU
: GE
;
7777 case UNORDERED_EXPR
:
7808 /* Subroutine of expand_expr. Expand the two operands of a binary
7809 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7810 The value may be stored in TARGET if TARGET is nonzero. The
7811 MODIFIER argument is as documented by expand_expr. */
7814 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7815 enum expand_modifier modifier
)
7817 if (! safe_from_p (target
, exp1
, 1))
7819 if (operand_equal_p (exp0
, exp1
, 0))
7821 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7822 *op1
= copy_rtx (*op0
);
7826 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7827 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7832 /* Return a MEM that contains constant EXP. DEFER is as for
7833 output_constant_def and MODIFIER is as for expand_expr. */
7836 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7840 mem
= output_constant_def (exp
, defer
);
7841 if (modifier
!= EXPAND_INITIALIZER
)
7842 mem
= use_anchored_address (mem
);
7846 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7847 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7850 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7851 enum expand_modifier modifier
, addr_space_t as
)
7853 rtx result
, subtarget
;
7855 poly_int64 bitsize
, bitpos
;
7856 int unsignedp
, reversep
, volatilep
= 0;
7859 /* If we are taking the address of a constant and are at the top level,
7860 we have to use output_constant_def since we can't call force_const_mem
7862 /* ??? This should be considered a front-end bug. We should not be
7863 generating ADDR_EXPR of something that isn't an LVALUE. The only
7864 exception here is STRING_CST. */
7865 if (CONSTANT_CLASS_P (exp
))
7867 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7868 if (modifier
< EXPAND_SUM
)
7869 result
= force_operand (result
, target
);
7873 /* Everything must be something allowed by is_gimple_addressable. */
7874 switch (TREE_CODE (exp
))
7877 /* This case will happen via recursion for &a->b. */
7878 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7882 tree tem
= TREE_OPERAND (exp
, 0);
7883 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7884 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7885 return expand_expr (tem
, target
, tmode
, modifier
);
7888 case TARGET_MEM_REF
:
7889 return addr_for_mem_ref (exp
, as
, true);
7892 /* Expand the initializer like constants above. */
7893 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7895 if (modifier
< EXPAND_SUM
)
7896 result
= force_operand (result
, target
);
7900 /* The real part of the complex number is always first, therefore
7901 the address is the same as the address of the parent object. */
7904 inner
= TREE_OPERAND (exp
, 0);
7908 /* The imaginary part of the complex number is always second.
7909 The expression is therefore always offset by the size of the
7912 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7913 inner
= TREE_OPERAND (exp
, 0);
7916 case COMPOUND_LITERAL_EXPR
:
7917 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7918 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7919 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7920 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7921 the initializers aren't gimplified. */
7922 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7923 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7924 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7925 target
, tmode
, modifier
, as
);
7928 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7929 expand_expr, as that can have various side effects; LABEL_DECLs for
7930 example, may not have their DECL_RTL set yet. Expand the rtl of
7931 CONSTRUCTORs too, which should yield a memory reference for the
7932 constructor's contents. Assume language specific tree nodes can
7933 be expanded in some interesting way. */
7934 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7936 || TREE_CODE (exp
) == CONSTRUCTOR
7937 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7939 result
= expand_expr (exp
, target
, tmode
,
7940 modifier
== EXPAND_INITIALIZER
7941 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7943 /* If the DECL isn't in memory, then the DECL wasn't properly
7944 marked TREE_ADDRESSABLE, which will be either a front-end
7945 or a tree optimizer bug. */
7947 gcc_assert (MEM_P (result
));
7948 result
= XEXP (result
, 0);
7950 /* ??? Is this needed anymore? */
7952 TREE_USED (exp
) = 1;
7954 if (modifier
!= EXPAND_INITIALIZER
7955 && modifier
!= EXPAND_CONST_ADDRESS
7956 && modifier
!= EXPAND_SUM
)
7957 result
= force_operand (result
, target
);
7961 /* Pass FALSE as the last argument to get_inner_reference although
7962 we are expanding to RTL. The rationale is that we know how to
7963 handle "aligning nodes" here: we can just bypass them because
7964 they won't change the final object whose address will be returned
7965 (they actually exist only for that purpose). */
7966 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
7967 &unsignedp
, &reversep
, &volatilep
);
7971 /* We must have made progress. */
7972 gcc_assert (inner
!= exp
);
7974 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
7975 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7976 inner alignment, force the inner to be sufficiently aligned. */
7977 if (CONSTANT_CLASS_P (inner
)
7978 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7980 inner
= copy_node (inner
);
7981 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7982 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
7983 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7985 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7991 if (modifier
!= EXPAND_NORMAL
)
7992 result
= force_operand (result
, NULL
);
7993 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7994 modifier
== EXPAND_INITIALIZER
7995 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
7997 /* expand_expr is allowed to return an object in a mode other
7998 than TMODE. If it did, we need to convert. */
7999 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8000 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8001 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8002 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8003 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8005 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8006 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8009 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8010 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8011 1, OPTAB_LIB_WIDEN
);
8015 if (maybe_ne (bitpos
, 0))
8017 /* Someone beforehand should have rejected taking the address
8018 of an object that isn't byte-aligned. */
8019 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8020 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8021 result
= plus_constant (tmode
, result
, bytepos
);
8022 if (modifier
< EXPAND_SUM
)
8023 result
= force_operand (result
, target
);
8029 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8030 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8033 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8034 enum expand_modifier modifier
)
8036 addr_space_t as
= ADDR_SPACE_GENERIC
;
8037 scalar_int_mode address_mode
= Pmode
;
8038 scalar_int_mode pointer_mode
= ptr_mode
;
8042 /* Target mode of VOIDmode says "whatever's natural". */
8043 if (tmode
== VOIDmode
)
8044 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8046 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8048 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8049 address_mode
= targetm
.addr_space
.address_mode (as
);
8050 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8053 /* We can get called with some Weird Things if the user does silliness
8054 like "(short) &a". In that case, convert_memory_address won't do
8055 the right thing, so ignore the given target mode. */
8056 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8060 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8061 new_tmode
, modifier
, as
);
8063 /* Despite expand_expr claims concerning ignoring TMODE when not
8064 strictly convenient, stuff breaks if we don't honor it. Note
8065 that combined with the above, we only do this for pointer modes. */
8066 rmode
= GET_MODE (result
);
8067 if (rmode
== VOIDmode
)
8069 if (rmode
!= new_tmode
)
8070 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8075 /* Generate code for computing CONSTRUCTOR EXP.
8076 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8077 is TRUE, instead of creating a temporary variable in memory
8078 NULL is returned and the caller needs to handle it differently. */
8081 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8082 bool avoid_temp_mem
)
8084 tree type
= TREE_TYPE (exp
);
8085 machine_mode mode
= TYPE_MODE (type
);
8087 /* Try to avoid creating a temporary at all. This is possible
8088 if all of the initializer is zero.
8089 FIXME: try to handle all [0..255] initializers we can handle
8091 if (TREE_STATIC (exp
)
8092 && !TREE_ADDRESSABLE (exp
)
8093 && target
!= 0 && mode
== BLKmode
8094 && all_zeros_p (exp
))
8096 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8100 /* All elts simple constants => refer to a constant in memory. But
8101 if this is a non-BLKmode mode, let it store a field at a time
8102 since that should make a CONST_INT, CONST_WIDE_INT or
8103 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8104 use, it is best to store directly into the target unless the type
8105 is large enough that memcpy will be used. If we are making an
8106 initializer and all operands are constant, put it in memory as
8109 FIXME: Avoid trying to fill vector constructors piece-meal.
8110 Output them with output_constant_def below unless we're sure
8111 they're zeros. This should go away when vector initializers
8112 are treated like VECTOR_CST instead of arrays. */
8113 if ((TREE_STATIC (exp
)
8114 && ((mode
== BLKmode
8115 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8116 || TREE_ADDRESSABLE (exp
)
8117 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8118 && (! can_move_by_pieces
8119 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8121 && ! mostly_zeros_p (exp
))))
8122 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8123 && TREE_CONSTANT (exp
)))
8130 constructor
= expand_expr_constant (exp
, 1, modifier
);
8132 if (modifier
!= EXPAND_CONST_ADDRESS
8133 && modifier
!= EXPAND_INITIALIZER
8134 && modifier
!= EXPAND_SUM
)
8135 constructor
= validize_mem (constructor
);
8140 /* Handle calls that pass values in multiple non-contiguous
8141 locations. The Irix 6 ABI has examples of this. */
8142 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8143 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8148 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8151 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8156 /* expand_expr: generate code for computing expression EXP.
8157 An rtx for the computed value is returned. The value is never null.
8158 In the case of a void EXP, const0_rtx is returned.
8160 The value may be stored in TARGET if TARGET is nonzero.
8161 TARGET is just a suggestion; callers must assume that
8162 the rtx returned may not be the same as TARGET.
8164 If TARGET is CONST0_RTX, it means that the value will be ignored.
8166 If TMODE is not VOIDmode, it suggests generating the
8167 result in mode TMODE. But this is done only when convenient.
8168 Otherwise, TMODE is ignored and the value generated in its natural mode.
8169 TMODE is just a suggestion; callers must assume that
8170 the rtx returned may not have mode TMODE.
8172 Note that TARGET may have neither TMODE nor MODE. In that case, it
8173 probably will not be used.
8175 If MODIFIER is EXPAND_SUM then when EXP is an addition
8176 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8177 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8178 products as above, or REG or MEM, or constant.
8179 Ordinarily in such cases we would output mul or add instructions
8180 and then return a pseudo reg containing the sum.
8182 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8183 it also marks a label as absolutely required (it can't be dead).
8184 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8185 This is used for outputting expressions used in initializers.
8187 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8188 with a constant address even if that address is not normally legitimate.
8189 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8191 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8192 a call parameter. Such targets require special care as we haven't yet
8193 marked TARGET so that it's safe from being trashed by libcalls. We
8194 don't want to use TARGET for anything but the final result;
8195 Intermediate values must go elsewhere. Additionally, calls to
8196 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8198 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8199 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8200 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8201 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8204 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8205 In this case, we don't adjust a returned MEM rtx that wouldn't be
8206 sufficiently aligned for its mode; instead, it's up to the caller
8207 to deal with it afterwards. This is used to make sure that unaligned
8208 base objects for which out-of-bounds accesses are supported, for
8209 example record types with trailing arrays, aren't realigned behind
8210 the back of the caller.
8211 The normal operating mode is to pass FALSE for this parameter. */
8214 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8215 enum expand_modifier modifier
, rtx
*alt_rtl
,
8216 bool inner_reference_p
)
8220 /* Handle ERROR_MARK before anybody tries to access its type. */
8221 if (TREE_CODE (exp
) == ERROR_MARK
8222 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8224 ret
= CONST0_RTX (tmode
);
8225 return ret
? ret
: const0_rtx
;
8228 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8233 /* Try to expand the conditional expression which is represented by
8234 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8235 return the rtl reg which represents the result. Otherwise return
8239 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8240 tree treeop1 ATTRIBUTE_UNUSED
,
8241 tree treeop2 ATTRIBUTE_UNUSED
)
8244 rtx op00
, op01
, op1
, op2
;
8245 enum rtx_code comparison_code
;
8246 machine_mode comparison_mode
;
8249 tree type
= TREE_TYPE (treeop1
);
8250 int unsignedp
= TYPE_UNSIGNED (type
);
8251 machine_mode mode
= TYPE_MODE (type
);
8252 machine_mode orig_mode
= mode
;
8253 static bool expanding_cond_expr_using_cmove
= false;
8255 /* Conditional move expansion can end up TERing two operands which,
8256 when recursively hitting conditional expressions can result in
8257 exponential behavior if the cmove expansion ultimatively fails.
8258 It's hardly profitable to TER a cmove into a cmove so avoid doing
8259 that by failing early if we end up recursing. */
8260 if (expanding_cond_expr_using_cmove
)
8263 /* If we cannot do a conditional move on the mode, try doing it
8264 with the promoted mode. */
8265 if (!can_conditionally_move_p (mode
))
8267 mode
= promote_mode (type
, mode
, &unsignedp
);
8268 if (!can_conditionally_move_p (mode
))
8270 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8273 temp
= assign_temp (type
, 0, 1);
8275 expanding_cond_expr_using_cmove
= true;
8277 expand_operands (treeop1
, treeop2
,
8278 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8280 if (TREE_CODE (treeop0
) == SSA_NAME
8281 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8283 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8284 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8285 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8286 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8287 comparison_mode
= TYPE_MODE (type
);
8288 unsignedp
= TYPE_UNSIGNED (type
);
8289 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8291 else if (COMPARISON_CLASS_P (treeop0
))
8293 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8294 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8295 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8296 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8297 unsignedp
= TYPE_UNSIGNED (type
);
8298 comparison_mode
= TYPE_MODE (type
);
8299 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8303 op00
= expand_normal (treeop0
);
8305 comparison_code
= NE
;
8306 comparison_mode
= GET_MODE (op00
);
8307 if (comparison_mode
== VOIDmode
)
8308 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8310 expanding_cond_expr_using_cmove
= false;
8312 if (GET_MODE (op1
) != mode
)
8313 op1
= gen_lowpart (mode
, op1
);
8315 if (GET_MODE (op2
) != mode
)
8316 op2
= gen_lowpart (mode
, op2
);
8318 /* Try to emit the conditional move. */
8319 insn
= emit_conditional_move (temp
, comparison_code
,
8320 op00
, op01
, comparison_mode
,
8324 /* If we could do the conditional move, emit the sequence,
8328 rtx_insn
*seq
= get_insns ();
8331 return convert_modes (orig_mode
, mode
, temp
, 0);
8334 /* Otherwise discard the sequence and fall back to code with
8341 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8342 enum expand_modifier modifier
)
8344 rtx op0
, op1
, op2
, temp
;
8345 rtx_code_label
*lab
;
8349 scalar_int_mode int_mode
;
8350 enum tree_code code
= ops
->code
;
8352 rtx subtarget
, original_target
;
8354 bool reduce_bit_field
;
8355 location_t loc
= ops
->location
;
8356 tree treeop0
, treeop1
, treeop2
;
8357 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8358 ? reduce_to_bit_field_precision ((expr), \
8364 mode
= TYPE_MODE (type
);
8365 unsignedp
= TYPE_UNSIGNED (type
);
8371 /* We should be called only on simple (binary or unary) expressions,
8372 exactly those that are valid in gimple expressions that aren't
8373 GIMPLE_SINGLE_RHS (or invalid). */
8374 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8375 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8376 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8378 ignore
= (target
== const0_rtx
8379 || ((CONVERT_EXPR_CODE_P (code
)
8380 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8381 && TREE_CODE (type
) == VOID_TYPE
));
8383 /* We should be called only if we need the result. */
8384 gcc_assert (!ignore
);
8386 /* An operation in what may be a bit-field type needs the
8387 result to be reduced to the precision of the bit-field type,
8388 which is narrower than that of the type's mode. */
8389 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8390 && !type_has_mode_precision_p (type
));
8392 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8395 /* Use subtarget as the target for operand 0 of a binary operation. */
8396 subtarget
= get_subtarget (target
);
8397 original_target
= target
;
8401 case NON_LVALUE_EXPR
:
8404 if (treeop0
== error_mark_node
)
8407 if (TREE_CODE (type
) == UNION_TYPE
)
8409 tree valtype
= TREE_TYPE (treeop0
);
8411 /* If both input and output are BLKmode, this conversion isn't doing
8412 anything except possibly changing memory attribute. */
8413 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8415 rtx result
= expand_expr (treeop0
, target
, tmode
,
8418 result
= copy_rtx (result
);
8419 set_mem_attributes (result
, type
, 0);
8425 if (TYPE_MODE (type
) != BLKmode
)
8426 target
= gen_reg_rtx (TYPE_MODE (type
));
8428 target
= assign_temp (type
, 1, 1);
8432 /* Store data into beginning of memory target. */
8433 store_expr (treeop0
,
8434 adjust_address (target
, TYPE_MODE (valtype
), 0),
8435 modifier
== EXPAND_STACK_PARM
,
8436 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8440 gcc_assert (REG_P (target
)
8441 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8443 /* Store this field into a union of the proper type. */
8444 poly_uint64 op0_size
8445 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8446 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8447 store_field (target
,
8448 /* The conversion must be constructed so that
8449 we know at compile time how many bits
8451 ordered_min (op0_size
, union_size
),
8452 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8456 /* Return the entire union. */
8460 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8462 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8465 /* If the signedness of the conversion differs and OP0 is
8466 a promoted SUBREG, clear that indication since we now
8467 have to do the proper extension. */
8468 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8469 && GET_CODE (op0
) == SUBREG
)
8470 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8472 return REDUCE_BIT_FIELD (op0
);
8475 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8476 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8477 if (GET_MODE (op0
) == mode
)
8480 /* If OP0 is a constant, just convert it into the proper mode. */
8481 else if (CONSTANT_P (op0
))
8483 tree inner_type
= TREE_TYPE (treeop0
);
8484 machine_mode inner_mode
= GET_MODE (op0
);
8486 if (inner_mode
== VOIDmode
)
8487 inner_mode
= TYPE_MODE (inner_type
);
8489 if (modifier
== EXPAND_INITIALIZER
)
8490 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8492 op0
= convert_modes (mode
, inner_mode
, op0
,
8493 TYPE_UNSIGNED (inner_type
));
8496 else if (modifier
== EXPAND_INITIALIZER
)
8497 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8498 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8500 else if (target
== 0)
8501 op0
= convert_to_mode (mode
, op0
,
8502 TYPE_UNSIGNED (TREE_TYPE
8506 convert_move (target
, op0
,
8507 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8511 return REDUCE_BIT_FIELD (op0
);
8513 case ADDR_SPACE_CONVERT_EXPR
:
8515 tree treeop0_type
= TREE_TYPE (treeop0
);
8517 gcc_assert (POINTER_TYPE_P (type
));
8518 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8520 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8521 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8523 /* Conversions between pointers to the same address space should
8524 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8525 gcc_assert (as_to
!= as_from
);
8527 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8529 /* Ask target code to handle conversion between pointers
8530 to overlapping address spaces. */
8531 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8532 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8534 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8538 /* For disjoint address spaces, converting anything but a null
8539 pointer invokes undefined behavior. We truncate or extend the
8540 value as if we'd converted via integers, which handles 0 as
8541 required, and all others as the programmer likely expects. */
8542 #ifndef POINTERS_EXTEND_UNSIGNED
8543 const int POINTERS_EXTEND_UNSIGNED
= 1;
8545 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8546 op0
, POINTERS_EXTEND_UNSIGNED
);
8552 case POINTER_PLUS_EXPR
:
8553 /* Even though the sizetype mode and the pointer's mode can be different
8554 expand is able to handle this correctly and get the correct result out
8555 of the PLUS_EXPR code. */
8556 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8557 if sizetype precision is smaller than pointer precision. */
8558 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8559 treeop1
= fold_convert_loc (loc
, type
,
8560 fold_convert_loc (loc
, ssizetype
,
8562 /* If sizetype precision is larger than pointer precision, truncate the
8563 offset to have matching modes. */
8564 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8565 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8569 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8570 something else, make sure we add the register to the constant and
8571 then to the other thing. This case can occur during strength
8572 reduction and doing it this way will produce better code if the
8573 frame pointer or argument pointer is eliminated.
8575 fold-const.c will ensure that the constant is always in the inner
8576 PLUS_EXPR, so the only case we need to do anything about is if
8577 sp, ap, or fp is our second argument, in which case we must swap
8578 the innermost first argument and our second argument. */
8580 if (TREE_CODE (treeop0
) == PLUS_EXPR
8581 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8583 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8584 || DECL_RTL (treeop1
) == stack_pointer_rtx
8585 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8590 /* If the result is to be ptr_mode and we are adding an integer to
8591 something, we might be forming a constant. So try to use
8592 plus_constant. If it produces a sum and we can't accept it,
8593 use force_operand. This allows P = &ARR[const] to generate
8594 efficient code on machines where a SYMBOL_REF is not a valid
8597 If this is an EXPAND_SUM call, always return the sum. */
8598 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8599 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8601 if (modifier
== EXPAND_STACK_PARM
)
8603 if (TREE_CODE (treeop0
) == INTEGER_CST
8604 && HWI_COMPUTABLE_MODE_P (mode
)
8605 && TREE_CONSTANT (treeop1
))
8609 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8611 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8613 /* Use wi::shwi to ensure that the constant is
8614 truncated according to the mode of OP1, then sign extended
8615 to a HOST_WIDE_INT. Using the constant directly can result
8616 in non-canonical RTL in a 64x32 cross compile. */
8617 wc
= TREE_INT_CST_LOW (treeop0
);
8619 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8620 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8621 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8622 op1
= force_operand (op1
, target
);
8623 return REDUCE_BIT_FIELD (op1
);
8626 else if (TREE_CODE (treeop1
) == INTEGER_CST
8627 && HWI_COMPUTABLE_MODE_P (mode
)
8628 && TREE_CONSTANT (treeop0
))
8632 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8634 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8635 (modifier
== EXPAND_INITIALIZER
8636 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8637 if (! CONSTANT_P (op0
))
8639 op1
= expand_expr (treeop1
, NULL_RTX
,
8640 VOIDmode
, modifier
);
8641 /* Return a PLUS if modifier says it's OK. */
8642 if (modifier
== EXPAND_SUM
8643 || modifier
== EXPAND_INITIALIZER
)
8644 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8647 /* Use wi::shwi to ensure that the constant is
8648 truncated according to the mode of OP1, then sign extended
8649 to a HOST_WIDE_INT. Using the constant directly can result
8650 in non-canonical RTL in a 64x32 cross compile. */
8651 wc
= TREE_INT_CST_LOW (treeop1
);
8653 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8654 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8655 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8656 op0
= force_operand (op0
, target
);
8657 return REDUCE_BIT_FIELD (op0
);
8661 /* Use TER to expand pointer addition of a negated value
8662 as pointer subtraction. */
8663 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8664 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8665 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8666 && TREE_CODE (treeop1
) == SSA_NAME
8667 && TYPE_MODE (TREE_TYPE (treeop0
))
8668 == TYPE_MODE (TREE_TYPE (treeop1
)))
8670 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8673 treeop1
= gimple_assign_rhs1 (def
);
8679 /* No sense saving up arithmetic to be done
8680 if it's all in the wrong mode to form part of an address.
8681 And force_operand won't know whether to sign-extend or
8683 if (modifier
!= EXPAND_INITIALIZER
8684 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8686 expand_operands (treeop0
, treeop1
,
8687 subtarget
, &op0
, &op1
, modifier
);
8688 if (op0
== const0_rtx
)
8690 if (op1
== const0_rtx
)
8695 expand_operands (treeop0
, treeop1
,
8696 subtarget
, &op0
, &op1
, modifier
);
8697 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8700 case POINTER_DIFF_EXPR
:
8702 /* For initializers, we are allowed to return a MINUS of two
8703 symbolic constants. Here we handle all cases when both operands
8705 /* Handle difference of two symbolic constants,
8706 for the sake of an initializer. */
8707 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8708 && really_constant_p (treeop0
)
8709 && really_constant_p (treeop1
))
8711 expand_operands (treeop0
, treeop1
,
8712 NULL_RTX
, &op0
, &op1
, modifier
);
8713 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8716 /* No sense saving up arithmetic to be done
8717 if it's all in the wrong mode to form part of an address.
8718 And force_operand won't know whether to sign-extend or
8720 if (modifier
!= EXPAND_INITIALIZER
8721 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8724 expand_operands (treeop0
, treeop1
,
8725 subtarget
, &op0
, &op1
, modifier
);
8727 /* Convert A - const to A + (-const). */
8728 if (CONST_INT_P (op1
))
8730 op1
= negate_rtx (mode
, op1
);
8731 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8736 case WIDEN_MULT_PLUS_EXPR
:
8737 case WIDEN_MULT_MINUS_EXPR
:
8738 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8739 op2
= expand_normal (treeop2
);
8740 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8744 case WIDEN_MULT_EXPR
:
8745 /* If first operand is constant, swap them.
8746 Thus the following special case checks need only
8747 check the second operand. */
8748 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8749 std::swap (treeop0
, treeop1
);
8751 /* First, check if we have a multiplication of one signed and one
8752 unsigned operand. */
8753 if (TREE_CODE (treeop1
) != INTEGER_CST
8754 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8755 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8757 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8758 this_optab
= usmul_widen_optab
;
8759 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8760 != CODE_FOR_nothing
)
8762 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8763 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8766 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8768 /* op0 and op1 might still be constant, despite the above
8769 != INTEGER_CST check. Handle it. */
8770 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8772 op0
= convert_modes (innermode
, mode
, op0
, true);
8773 op1
= convert_modes (innermode
, mode
, op1
, false);
8774 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8775 target
, unsignedp
));
8780 /* Check for a multiplication with matching signedness. */
8781 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8782 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8783 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8784 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8786 tree op0type
= TREE_TYPE (treeop0
);
8787 machine_mode innermode
= TYPE_MODE (op0type
);
8788 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8789 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8790 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8792 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8794 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8795 != CODE_FOR_nothing
)
8797 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8799 /* op0 and op1 might still be constant, despite the above
8800 != INTEGER_CST check. Handle it. */
8801 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8804 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8806 = convert_modes (innermode
, mode
, op1
,
8807 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8808 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8812 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8813 unsignedp
, this_optab
);
8814 return REDUCE_BIT_FIELD (temp
);
8816 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8818 && innermode
== word_mode
)
8821 op0
= expand_normal (treeop0
);
8822 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8823 op1
= convert_modes (word_mode
, mode
,
8824 expand_normal (treeop1
),
8825 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8827 op1
= expand_normal (treeop1
);
8828 /* op0 and op1 might still be constant, despite the above
8829 != INTEGER_CST check. Handle it. */
8830 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8831 goto widen_mult_const
;
8832 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8833 unsignedp
, OPTAB_LIB_WIDEN
);
8834 hipart
= gen_highpart (word_mode
, temp
);
8835 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8839 emit_move_insn (hipart
, htem
);
8840 return REDUCE_BIT_FIELD (temp
);
8844 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8845 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8846 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8847 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8851 optab opt
= fma_optab
;
8852 gimple
*def0
, *def2
;
8854 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8856 if (optab_handler (fma_optab
, mode
) == CODE_FOR_nothing
)
8858 tree fn
= mathfn_built_in (TREE_TYPE (treeop0
), BUILT_IN_FMA
);
8861 gcc_assert (fn
!= NULL_TREE
);
8862 call_expr
= build_call_expr (fn
, 3, treeop0
, treeop1
, treeop2
);
8863 return expand_builtin (call_expr
, target
, subtarget
, mode
, false);
8866 def0
= get_def_for_expr (treeop0
, NEGATE_EXPR
);
8867 /* The multiplication is commutative - look at its 2nd operand
8868 if the first isn't fed by a negate. */
8871 def0
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8872 /* Swap operands if the 2nd operand is fed by a negate. */
8874 std::swap (treeop0
, treeop1
);
8876 def2
= get_def_for_expr (treeop2
, NEGATE_EXPR
);
8881 && optab_handler (fnms_optab
, mode
) != CODE_FOR_nothing
)
8884 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8885 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8888 && optab_handler (fnma_optab
, mode
) != CODE_FOR_nothing
)
8891 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8894 && optab_handler (fms_optab
, mode
) != CODE_FOR_nothing
)
8897 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8901 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
, EXPAND_NORMAL
);
8903 op2
= expand_normal (treeop2
);
8904 op1
= expand_normal (treeop1
);
8906 return expand_ternary_op (TYPE_MODE (type
), opt
,
8907 op0
, op1
, op2
, target
, 0);
8911 /* If this is a fixed-point operation, then we cannot use the code
8912 below because "expand_mult" doesn't support sat/no-sat fixed-point
8914 if (ALL_FIXED_POINT_MODE_P (mode
))
8917 /* If first operand is constant, swap them.
8918 Thus the following special case checks need only
8919 check the second operand. */
8920 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8921 std::swap (treeop0
, treeop1
);
8923 /* Attempt to return something suitable for generating an
8924 indexed address, for machines that support that. */
8926 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8927 && tree_fits_shwi_p (treeop1
))
8929 tree exp1
= treeop1
;
8931 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8935 op0
= force_operand (op0
, NULL_RTX
);
8937 op0
= copy_to_mode_reg (mode
, op0
);
8939 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8940 gen_int_mode (tree_to_shwi (exp1
),
8941 TYPE_MODE (TREE_TYPE (exp1
)))));
8944 if (modifier
== EXPAND_STACK_PARM
)
8947 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8948 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8950 case TRUNC_MOD_EXPR
:
8951 case FLOOR_MOD_EXPR
:
8953 case ROUND_MOD_EXPR
:
8955 case TRUNC_DIV_EXPR
:
8956 case FLOOR_DIV_EXPR
:
8958 case ROUND_DIV_EXPR
:
8959 case EXACT_DIV_EXPR
:
8961 /* If this is a fixed-point operation, then we cannot use the code
8962 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8964 if (ALL_FIXED_POINT_MODE_P (mode
))
8967 if (modifier
== EXPAND_STACK_PARM
)
8969 /* Possible optimization: compute the dividend with EXPAND_SUM
8970 then if the divisor is constant can optimize the case
8971 where some terms of the dividend have coeffs divisible by it. */
8972 expand_operands (treeop0
, treeop1
,
8973 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8974 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8975 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8976 if (SCALAR_INT_MODE_P (mode
)
8978 && get_range_pos_neg (treeop0
) == 1
8979 && get_range_pos_neg (treeop1
) == 1)
8981 /* If both arguments are known to be positive when interpreted
8982 as signed, we can expand it as both signed and unsigned
8983 division or modulo. Choose the cheaper sequence in that case. */
8984 bool speed_p
= optimize_insn_for_speed_p ();
8985 do_pending_stack_adjust ();
8987 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8988 rtx_insn
*uns_insns
= get_insns ();
8991 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8992 rtx_insn
*sgn_insns
= get_insns ();
8994 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8995 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8997 /* If costs are the same then use as tie breaker the other
8999 if (uns_cost
== sgn_cost
)
9001 uns_cost
= seq_cost (uns_insns
, !speed_p
);
9002 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9005 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9007 emit_insn (uns_insns
);
9010 emit_insn (sgn_insns
);
9013 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9018 case MULT_HIGHPART_EXPR
:
9019 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9020 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9024 case FIXED_CONVERT_EXPR
:
9025 op0
= expand_normal (treeop0
);
9026 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9027 target
= gen_reg_rtx (mode
);
9029 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9030 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9031 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9032 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9034 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9037 case FIX_TRUNC_EXPR
:
9038 op0
= expand_normal (treeop0
);
9039 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9040 target
= gen_reg_rtx (mode
);
9041 expand_fix (target
, op0
, unsignedp
);
9045 op0
= expand_normal (treeop0
);
9046 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9047 target
= gen_reg_rtx (mode
);
9048 /* expand_float can't figure out what to do if FROM has VOIDmode.
9049 So give it the correct mode. With -O, cse will optimize this. */
9050 if (GET_MODE (op0
) == VOIDmode
)
9051 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9053 expand_float (target
, op0
,
9054 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9058 op0
= expand_expr (treeop0
, subtarget
,
9059 VOIDmode
, EXPAND_NORMAL
);
9060 if (modifier
== EXPAND_STACK_PARM
)
9062 temp
= expand_unop (mode
,
9063 optab_for_tree_code (NEGATE_EXPR
, type
,
9067 return REDUCE_BIT_FIELD (temp
);
9070 op0
= expand_expr (treeop0
, subtarget
,
9071 VOIDmode
, EXPAND_NORMAL
);
9072 if (modifier
== EXPAND_STACK_PARM
)
9075 /* ABS_EXPR is not valid for complex arguments. */
9076 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9077 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9079 /* Unsigned abs is simply the operand. Testing here means we don't
9080 risk generating incorrect code below. */
9081 if (TYPE_UNSIGNED (type
))
9084 return expand_abs (mode
, op0
, target
, unsignedp
,
9085 safe_from_p (target
, treeop0
, 1));
9089 target
= original_target
;
9091 || modifier
== EXPAND_STACK_PARM
9092 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9093 || GET_MODE (target
) != mode
9095 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9096 target
= gen_reg_rtx (mode
);
9097 expand_operands (treeop0
, treeop1
,
9098 target
, &op0
, &op1
, EXPAND_NORMAL
);
9100 /* First try to do it with a special MIN or MAX instruction.
9101 If that does not win, use a conditional jump to select the proper
9103 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9104 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9109 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9110 and similarly for MAX <x, y>. */
9111 if (VECTOR_TYPE_P (type
))
9113 tree t0
= make_tree (type
, op0
);
9114 tree t1
= make_tree (type
, op1
);
9115 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9117 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9121 /* At this point, a MEM target is no longer useful; we will get better
9124 if (! REG_P (target
))
9125 target
= gen_reg_rtx (mode
);
9127 /* If op1 was placed in target, swap op0 and op1. */
9128 if (target
!= op0
&& target
== op1
)
9129 std::swap (op0
, op1
);
9131 /* We generate better code and avoid problems with op1 mentioning
9132 target by forcing op1 into a pseudo if it isn't a constant. */
9133 if (! CONSTANT_P (op1
))
9134 op1
= force_reg (mode
, op1
);
9137 enum rtx_code comparison_code
;
9140 if (code
== MAX_EXPR
)
9141 comparison_code
= unsignedp
? GEU
: GE
;
9143 comparison_code
= unsignedp
? LEU
: LE
;
9145 /* Canonicalize to comparisons against 0. */
9146 if (op1
== const1_rtx
)
9148 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9149 or (a != 0 ? a : 1) for unsigned.
9150 For MIN we are safe converting (a <= 1 ? a : 1)
9151 into (a <= 0 ? a : 1) */
9152 cmpop1
= const0_rtx
;
9153 if (code
== MAX_EXPR
)
9154 comparison_code
= unsignedp
? NE
: GT
;
9156 if (op1
== constm1_rtx
&& !unsignedp
)
9158 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9159 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9160 cmpop1
= const0_rtx
;
9161 if (code
== MIN_EXPR
)
9162 comparison_code
= LT
;
9165 /* Use a conditional move if possible. */
9166 if (can_conditionally_move_p (mode
))
9172 /* Try to emit the conditional move. */
9173 insn
= emit_conditional_move (target
, comparison_code
,
9178 /* If we could do the conditional move, emit the sequence,
9182 rtx_insn
*seq
= get_insns ();
9188 /* Otherwise discard the sequence and fall back to code with
9194 emit_move_insn (target
, op0
);
9196 lab
= gen_label_rtx ();
9197 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9198 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9199 profile_probability::uninitialized ());
9201 emit_move_insn (target
, op1
);
9206 op0
= expand_expr (treeop0
, subtarget
,
9207 VOIDmode
, EXPAND_NORMAL
);
9208 if (modifier
== EXPAND_STACK_PARM
)
9210 /* In case we have to reduce the result to bitfield precision
9211 for unsigned bitfield expand this as XOR with a proper constant
9213 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9215 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9216 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9217 false, GET_MODE_PRECISION (int_mode
));
9219 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9220 immed_wide_int_const (mask
, int_mode
),
9221 target
, 1, OPTAB_LIB_WIDEN
);
9224 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9228 /* ??? Can optimize bitwise operations with one arg constant.
9229 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9230 and (a bitwise1 b) bitwise2 b (etc)
9231 but that is probably not worth while. */
9240 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9241 || type_has_mode_precision_p (type
));
9247 /* If this is a fixed-point operation, then we cannot use the code
9248 below because "expand_shift" doesn't support sat/no-sat fixed-point
9250 if (ALL_FIXED_POINT_MODE_P (mode
))
9253 if (! safe_from_p (subtarget
, treeop1
, 1))
9255 if (modifier
== EXPAND_STACK_PARM
)
9257 op0
= expand_expr (treeop0
, subtarget
,
9258 VOIDmode
, EXPAND_NORMAL
);
9260 /* Left shift optimization when shifting across word_size boundary.
9262 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9263 there isn't native instruction to support this wide mode
9264 left shift. Given below scenario:
9266 Type A = (Type) B << C
9269 | dest_high | dest_low |
9273 If the shift amount C caused we shift B to across the word
9274 size boundary, i.e part of B shifted into high half of
9275 destination register, and part of B remains in the low
9276 half, then GCC will use the following left shift expand
9279 1. Initialize dest_low to B.
9280 2. Initialize every bit of dest_high to the sign bit of B.
9281 3. Logic left shift dest_low by C bit to finalize dest_low.
9282 The value of dest_low before this shift is kept in a temp D.
9283 4. Logic left shift dest_high by C.
9284 5. Logic right shift D by (word_size - C).
9285 6. Or the result of 4 and 5 to finalize dest_high.
9287 While, by checking gimple statements, if operand B is
9288 coming from signed extension, then we can simplify above
9291 1. dest_high = src_low >> (word_size - C).
9292 2. dest_low = src_low << C.
9294 We can use one arithmetic right shift to finish all the
9295 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9296 needed from 6 into 2.
9298 The case is similar for zero extension, except that we
9299 initialize dest_high to zero rather than copies of the sign
9300 bit from B. Furthermore, we need to use a logical right shift
9303 The choice of sign-extension versus zero-extension is
9304 determined entirely by whether or not B is signed and is
9305 independent of the current setting of unsignedp. */
9308 if (code
== LSHIFT_EXPR
9311 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9313 && TREE_CONSTANT (treeop1
)
9314 && TREE_CODE (treeop0
) == SSA_NAME
)
9316 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9317 if (is_gimple_assign (def
)
9318 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9320 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9321 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9323 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9324 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9325 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9326 >= GET_MODE_BITSIZE (word_mode
)))
9328 rtx_insn
*seq
, *seq_old
;
9329 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9331 bool extend_unsigned
9332 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9333 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9334 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9335 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9336 int_mode
, high_off
);
9337 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9338 - TREE_INT_CST_LOW (treeop1
));
9339 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9342 /* dest_high = src_low >> (word_size - C). */
9343 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9346 if (temp
!= dest_high
)
9347 emit_move_insn (dest_high
, temp
);
9349 /* dest_low = src_low << C. */
9350 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9351 treeop1
, dest_low
, unsignedp
);
9352 if (temp
!= dest_low
)
9353 emit_move_insn (dest_low
, temp
);
9359 if (have_insn_for (ASHIFT
, int_mode
))
9361 bool speed_p
= optimize_insn_for_speed_p ();
9363 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9368 seq_old
= get_insns ();
9370 if (seq_cost (seq
, speed_p
)
9371 >= seq_cost (seq_old
, speed_p
))
9382 if (temp
== NULL_RTX
)
9383 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9385 if (code
== LSHIFT_EXPR
)
9386 temp
= REDUCE_BIT_FIELD (temp
);
9390 /* Could determine the answer when only additive constants differ. Also,
9391 the addition of one can be handled by changing the condition. */
9398 case UNORDERED_EXPR
:
9407 temp
= do_store_flag (ops
,
9408 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9409 tmode
!= VOIDmode
? tmode
: mode
);
9413 /* Use a compare and a jump for BLKmode comparisons, or for function
9414 type comparisons is have_canonicalize_funcptr_for_compare. */
9417 || modifier
== EXPAND_STACK_PARM
9418 || ! safe_from_p (target
, treeop0
, 1)
9419 || ! safe_from_p (target
, treeop1
, 1)
9420 /* Make sure we don't have a hard reg (such as function's return
9421 value) live across basic blocks, if not optimizing. */
9422 || (!optimize
&& REG_P (target
)
9423 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9424 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9426 emit_move_insn (target
, const0_rtx
);
9428 rtx_code_label
*lab1
= gen_label_rtx ();
9429 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9430 profile_probability::uninitialized ());
9432 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9433 emit_move_insn (target
, constm1_rtx
);
9435 emit_move_insn (target
, const1_rtx
);
9441 /* Get the rtx code of the operands. */
9442 op0
= expand_normal (treeop0
);
9443 op1
= expand_normal (treeop1
);
9446 target
= gen_reg_rtx (TYPE_MODE (type
));
9448 /* If target overlaps with op1, then either we need to force
9449 op1 into a pseudo (if target also overlaps with op0),
9450 or write the complex parts in reverse order. */
9451 switch (GET_CODE (target
))
9454 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9456 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9458 complex_expr_force_op1
:
9459 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9460 emit_move_insn (temp
, op1
);
9464 complex_expr_swap_order
:
9465 /* Move the imaginary (op1) and real (op0) parts to their
9467 write_complex_part (target
, op1
, true);
9468 write_complex_part (target
, op0
, false);
9474 temp
= adjust_address_nv (target
,
9475 GET_MODE_INNER (GET_MODE (target
)), 0);
9476 if (reg_overlap_mentioned_p (temp
, op1
))
9478 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9479 temp
= adjust_address_nv (target
, imode
,
9480 GET_MODE_SIZE (imode
));
9481 if (reg_overlap_mentioned_p (temp
, op0
))
9482 goto complex_expr_force_op1
;
9483 goto complex_expr_swap_order
;
9487 if (reg_overlap_mentioned_p (target
, op1
))
9489 if (reg_overlap_mentioned_p (target
, op0
))
9490 goto complex_expr_force_op1
;
9491 goto complex_expr_swap_order
;
9496 /* Move the real (op0) and imaginary (op1) parts to their location. */
9497 write_complex_part (target
, op0
, false);
9498 write_complex_part (target
, op1
, true);
9502 case WIDEN_SUM_EXPR
:
9504 tree oprnd0
= treeop0
;
9505 tree oprnd1
= treeop1
;
9507 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9508 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9513 case VEC_UNPACK_HI_EXPR
:
9514 case VEC_UNPACK_LO_EXPR
:
9516 op0
= expand_normal (treeop0
);
9517 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9523 case VEC_UNPACK_FLOAT_HI_EXPR
:
9524 case VEC_UNPACK_FLOAT_LO_EXPR
:
9526 op0
= expand_normal (treeop0
);
9527 /* The signedness is determined from input operand. */
9528 temp
= expand_widen_pattern_expr
9529 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9530 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9536 case VEC_WIDEN_MULT_HI_EXPR
:
9537 case VEC_WIDEN_MULT_LO_EXPR
:
9538 case VEC_WIDEN_MULT_EVEN_EXPR
:
9539 case VEC_WIDEN_MULT_ODD_EXPR
:
9540 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9541 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9542 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9543 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9545 gcc_assert (target
);
9548 case VEC_PACK_TRUNC_EXPR
:
9549 case VEC_PACK_SAT_EXPR
:
9550 case VEC_PACK_FIX_TRUNC_EXPR
:
9551 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9556 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9557 vec_perm_builder sel
;
9558 if (TREE_CODE (treeop2
) == VECTOR_CST
9559 && tree_to_vec_perm_builder (&sel
, treeop2
))
9561 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9562 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9567 op2
= expand_normal (treeop2
);
9568 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9576 tree oprnd0
= treeop0
;
9577 tree oprnd1
= treeop1
;
9578 tree oprnd2
= treeop2
;
9581 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9582 op2
= expand_normal (oprnd2
);
9583 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9590 tree oprnd0
= treeop0
;
9591 tree oprnd1
= treeop1
;
9592 tree oprnd2
= treeop2
;
9595 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9596 op2
= expand_normal (oprnd2
);
9597 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9602 case REALIGN_LOAD_EXPR
:
9604 tree oprnd0
= treeop0
;
9605 tree oprnd1
= treeop1
;
9606 tree oprnd2
= treeop2
;
9609 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9610 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9611 op2
= expand_normal (oprnd2
);
9612 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9620 /* A COND_EXPR with its type being VOID_TYPE represents a
9621 conditional jump and is handled in
9622 expand_gimple_cond_expr. */
9623 gcc_assert (!VOID_TYPE_P (type
));
9625 /* Note that COND_EXPRs whose type is a structure or union
9626 are required to be constructed to contain assignments of
9627 a temporary variable, so that we can evaluate them here
9628 for side effect only. If type is void, we must do likewise. */
9630 gcc_assert (!TREE_ADDRESSABLE (type
)
9632 && TREE_TYPE (treeop1
) != void_type_node
9633 && TREE_TYPE (treeop2
) != void_type_node
);
9635 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9639 /* If we are not to produce a result, we have no target. Otherwise,
9640 if a target was specified use it; it will not be used as an
9641 intermediate target unless it is safe. If no target, use a
9644 if (modifier
!= EXPAND_STACK_PARM
9646 && safe_from_p (original_target
, treeop0
, 1)
9647 && GET_MODE (original_target
) == mode
9648 && !MEM_P (original_target
))
9649 temp
= original_target
;
9651 temp
= assign_temp (type
, 0, 1);
9653 do_pending_stack_adjust ();
9655 rtx_code_label
*lab0
= gen_label_rtx ();
9656 rtx_code_label
*lab1
= gen_label_rtx ();
9657 jumpifnot (treeop0
, lab0
,
9658 profile_probability::uninitialized ());
9659 store_expr (treeop1
, temp
,
9660 modifier
== EXPAND_STACK_PARM
,
9663 emit_jump_insn (targetm
.gen_jump (lab1
));
9666 store_expr (treeop2
, temp
,
9667 modifier
== EXPAND_STACK_PARM
,
9676 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9679 case VEC_DUPLICATE_EXPR
:
9680 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9681 target
= expand_vector_broadcast (mode
, op0
);
9682 gcc_assert (target
);
9685 case VEC_SERIES_EXPR
:
9686 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9687 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9689 case BIT_INSERT_EXPR
:
9691 unsigned bitpos
= tree_to_uhwi (treeop2
);
9693 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9694 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9696 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9697 rtx op0
= expand_normal (treeop0
);
9698 rtx op1
= expand_normal (treeop1
);
9699 rtx dst
= gen_reg_rtx (mode
);
9700 emit_move_insn (dst
, op0
);
9701 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9702 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9710 /* Here to do an ordinary binary operator. */
9712 expand_operands (treeop0
, treeop1
,
9713 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9715 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9717 if (modifier
== EXPAND_STACK_PARM
)
9719 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9720 unsignedp
, OPTAB_LIB_WIDEN
);
9722 /* Bitwise operations do not need bitfield reduction as we expect their
9723 operands being properly truncated. */
9724 if (code
== BIT_XOR_EXPR
9725 || code
== BIT_AND_EXPR
9726 || code
== BIT_IOR_EXPR
)
9728 return REDUCE_BIT_FIELD (temp
);
9730 #undef REDUCE_BIT_FIELD
9733 /* Return TRUE if expression STMT is suitable for replacement.
9734 Never consider memory loads as replaceable, because those don't ever lead
9735 into constant expressions. */
9738 stmt_is_replaceable_p (gimple
*stmt
)
9740 if (ssa_is_replaceable_p (stmt
))
9742 /* Don't move around loads. */
9743 if (!gimple_assign_single_p (stmt
)
9744 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9751 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9752 enum expand_modifier modifier
, rtx
*alt_rtl
,
9753 bool inner_reference_p
)
9755 rtx op0
, op1
, temp
, decl_rtl
;
9758 machine_mode mode
, dmode
;
9759 enum tree_code code
= TREE_CODE (exp
);
9760 rtx subtarget
, original_target
;
9763 bool reduce_bit_field
;
9764 location_t loc
= EXPR_LOCATION (exp
);
9765 struct separate_ops ops
;
9766 tree treeop0
, treeop1
, treeop2
;
9767 tree ssa_name
= NULL_TREE
;
9770 type
= TREE_TYPE (exp
);
9771 mode
= TYPE_MODE (type
);
9772 unsignedp
= TYPE_UNSIGNED (type
);
9774 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9775 if (!VL_EXP_CLASS_P (exp
))
9776 switch (TREE_CODE_LENGTH (code
))
9779 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9780 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9781 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9791 ignore
= (target
== const0_rtx
9792 || ((CONVERT_EXPR_CODE_P (code
)
9793 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9794 && TREE_CODE (type
) == VOID_TYPE
));
9796 /* An operation in what may be a bit-field type needs the
9797 result to be reduced to the precision of the bit-field type,
9798 which is narrower than that of the type's mode. */
9799 reduce_bit_field
= (!ignore
9800 && INTEGRAL_TYPE_P (type
)
9801 && !type_has_mode_precision_p (type
));
9803 /* If we are going to ignore this result, we need only do something
9804 if there is a side-effect somewhere in the expression. If there
9805 is, short-circuit the most common cases here. Note that we must
9806 not call expand_expr with anything but const0_rtx in case this
9807 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9811 if (! TREE_SIDE_EFFECTS (exp
))
9814 /* Ensure we reference a volatile object even if value is ignored, but
9815 don't do this if all we are doing is taking its address. */
9816 if (TREE_THIS_VOLATILE (exp
)
9817 && TREE_CODE (exp
) != FUNCTION_DECL
9818 && mode
!= VOIDmode
&& mode
!= BLKmode
9819 && modifier
!= EXPAND_CONST_ADDRESS
)
9821 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9827 if (TREE_CODE_CLASS (code
) == tcc_unary
9828 || code
== BIT_FIELD_REF
9829 || code
== COMPONENT_REF
9830 || code
== INDIRECT_REF
)
9831 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9834 else if (TREE_CODE_CLASS (code
) == tcc_binary
9835 || TREE_CODE_CLASS (code
) == tcc_comparison
9836 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9838 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9839 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9846 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9849 /* Use subtarget as the target for operand 0 of a binary operation. */
9850 subtarget
= get_subtarget (target
);
9851 original_target
= target
;
9857 tree function
= decl_function_context (exp
);
9859 temp
= label_rtx (exp
);
9860 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9862 if (function
!= current_function_decl
9864 LABEL_REF_NONLOCAL_P (temp
) = 1;
9866 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9871 /* ??? ivopts calls expander, without any preparation from
9872 out-of-ssa. So fake instructions as if this was an access to the
9873 base variable. This unnecessarily allocates a pseudo, see how we can
9874 reuse it, if partition base vars have it set already. */
9875 if (!currently_expanding_to_rtl
)
9877 tree var
= SSA_NAME_VAR (exp
);
9878 if (var
&& DECL_RTL_SET_P (var
))
9879 return DECL_RTL (var
);
9880 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9881 LAST_VIRTUAL_REGISTER
+ 1);
9884 g
= get_gimple_for_ssa_name (exp
);
9885 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9887 && modifier
== EXPAND_INITIALIZER
9888 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9889 && (optimize
|| !SSA_NAME_VAR (exp
)
9890 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9891 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9892 g
= SSA_NAME_DEF_STMT (exp
);
9896 location_t saved_loc
= curr_insn_location ();
9897 location_t loc
= gimple_location (g
);
9898 if (loc
!= UNKNOWN_LOCATION
)
9899 set_curr_insn_location (loc
);
9900 ops
.code
= gimple_assign_rhs_code (g
);
9901 switch (get_gimple_rhs_class (ops
.code
))
9903 case GIMPLE_TERNARY_RHS
:
9904 ops
.op2
= gimple_assign_rhs3 (g
);
9906 case GIMPLE_BINARY_RHS
:
9907 ops
.op1
= gimple_assign_rhs2 (g
);
9909 /* Try to expand conditonal compare. */
9910 if (targetm
.gen_ccmp_first
)
9912 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9913 r
= expand_ccmp_expr (g
, mode
);
9918 case GIMPLE_UNARY_RHS
:
9919 ops
.op0
= gimple_assign_rhs1 (g
);
9920 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9922 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9924 case GIMPLE_SINGLE_RHS
:
9926 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9927 tmode
, modifier
, alt_rtl
,
9934 set_curr_insn_location (saved_loc
);
9935 if (REG_P (r
) && !REG_EXPR (r
))
9936 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9941 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9942 exp
= SSA_NAME_VAR (ssa_name
);
9943 goto expand_decl_rtl
;
9947 /* If a static var's type was incomplete when the decl was written,
9948 but the type is complete now, lay out the decl now. */
9949 if (DECL_SIZE (exp
) == 0
9950 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9951 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9952 layout_decl (exp
, 0);
9958 decl_rtl
= DECL_RTL (exp
);
9960 gcc_assert (decl_rtl
);
9962 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9963 settings for VECTOR_TYPE_P that might switch for the function. */
9964 if (currently_expanding_to_rtl
9965 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9966 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9967 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9969 decl_rtl
= copy_rtx (decl_rtl
);
9971 /* Record writes to register variables. */
9972 if (modifier
== EXPAND_WRITE
9974 && HARD_REGISTER_P (decl_rtl
))
9975 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9976 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9978 /* Ensure variable marked as used even if it doesn't go through
9979 a parser. If it hasn't be used yet, write out an external
9982 TREE_USED (exp
) = 1;
9984 /* Show we haven't gotten RTL for this yet. */
9987 /* Variables inherited from containing functions should have
9988 been lowered by this point. */
9990 context
= decl_function_context (exp
);
9992 || SCOPE_FILE_SCOPE_P (context
)
9993 || context
== current_function_decl
9994 || TREE_STATIC (exp
)
9995 || DECL_EXTERNAL (exp
)
9996 /* ??? C++ creates functions that are not TREE_STATIC. */
9997 || TREE_CODE (exp
) == FUNCTION_DECL
);
9999 /* This is the case of an array whose size is to be determined
10000 from its initializer, while the initializer is still being parsed.
10001 ??? We aren't parsing while expanding anymore. */
10003 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10004 temp
= validize_mem (decl_rtl
);
10006 /* If DECL_RTL is memory, we are in the normal case and the
10007 address is not valid, get the address into a register. */
10009 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10012 *alt_rtl
= decl_rtl
;
10013 decl_rtl
= use_anchored_address (decl_rtl
);
10014 if (modifier
!= EXPAND_CONST_ADDRESS
10015 && modifier
!= EXPAND_SUM
10016 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10017 : GET_MODE (decl_rtl
),
10018 XEXP (decl_rtl
, 0),
10019 MEM_ADDR_SPACE (decl_rtl
)))
10020 temp
= replace_equiv_address (decl_rtl
,
10021 copy_rtx (XEXP (decl_rtl
, 0)));
10024 /* If we got something, return it. But first, set the alignment
10025 if the address is a register. */
10028 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10029 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10035 dmode
= DECL_MODE (exp
);
10037 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10039 /* If the mode of DECL_RTL does not match that of the decl,
10040 there are two cases: we are dealing with a BLKmode value
10041 that is returned in a register, or we are dealing with
10042 a promoted value. In the latter case, return a SUBREG
10043 of the wanted mode, but mark it so that we know that it
10044 was already extended. */
10045 if (REG_P (decl_rtl
)
10046 && dmode
!= BLKmode
10047 && GET_MODE (decl_rtl
) != dmode
)
10049 machine_mode pmode
;
10051 /* Get the signedness to be used for this variable. Ensure we get
10052 the same mode we got when the variable was declared. */
10053 if (code
!= SSA_NAME
)
10054 pmode
= promote_decl_mode (exp
, &unsignedp
);
10055 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10056 && gimple_code (g
) == GIMPLE_CALL
10057 && !gimple_call_internal_p (g
))
10058 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10059 gimple_call_fntype (g
),
10062 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10063 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10065 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10066 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10067 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10075 /* Given that TYPE_PRECISION (type) is not always equal to
10076 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10077 the former to the latter according to the signedness of the
10079 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
10080 temp
= immed_wide_int_const
10081 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
10087 tree tmp
= NULL_TREE
;
10088 if (VECTOR_MODE_P (mode
))
10089 return const_vector_from_tree (exp
);
10090 scalar_int_mode int_mode
;
10091 if (is_int_mode (mode
, &int_mode
))
10093 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10094 return const_scalar_mask_from_tree (int_mode
, exp
);
10098 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10100 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10101 type_for_mode
, exp
);
10106 vec
<constructor_elt
, va_gc
> *v
;
10107 /* Constructors need to be fixed-length. FIXME. */
10108 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10109 vec_alloc (v
, nunits
);
10110 for (unsigned int i
= 0; i
< nunits
; ++i
)
10111 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10112 tmp
= build_constructor (type
, v
);
10114 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10119 if (modifier
== EXPAND_WRITE
)
10121 /* Writing into CONST_DECL is always invalid, but handle it
10123 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10124 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10125 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10126 EXPAND_NORMAL
, as
);
10127 op0
= memory_address_addr_space (mode
, op0
, as
);
10128 temp
= gen_rtx_MEM (mode
, op0
);
10129 set_mem_addr_space (temp
, as
);
10132 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10135 /* If optimized, generate immediate CONST_DOUBLE
10136 which will be turned into memory by reload if necessary.
10138 We used to force a register so that loop.c could see it. But
10139 this does not allow gen_* patterns to perform optimizations with
10140 the constants. It also produces two insns in cases like "x = 1.0;".
10141 On most machines, floating-point constants are not permitted in
10142 many insns, so we'd end up copying it to a register in any case.
10144 Now, we do the copying in expand_binop, if appropriate. */
10145 return const_double_from_real_value (TREE_REAL_CST (exp
),
10146 TYPE_MODE (TREE_TYPE (exp
)));
10149 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10150 TYPE_MODE (TREE_TYPE (exp
)));
10153 /* Handle evaluating a complex constant in a CONCAT target. */
10154 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10156 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10159 rtarg
= XEXP (original_target
, 0);
10160 itarg
= XEXP (original_target
, 1);
10162 /* Move the real and imaginary parts separately. */
10163 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10164 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10167 emit_move_insn (rtarg
, op0
);
10169 emit_move_insn (itarg
, op1
);
10171 return original_target
;
10177 temp
= expand_expr_constant (exp
, 1, modifier
);
10179 /* temp contains a constant address.
10180 On RISC machines where a constant address isn't valid,
10181 make some insns to get that address into a register. */
10182 if (modifier
!= EXPAND_CONST_ADDRESS
10183 && modifier
!= EXPAND_INITIALIZER
10184 && modifier
!= EXPAND_SUM
10185 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10186 MEM_ADDR_SPACE (temp
)))
10187 return replace_equiv_address (temp
,
10188 copy_rtx (XEXP (temp
, 0)));
10192 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10196 tree val
= treeop0
;
10197 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10198 inner_reference_p
);
10200 if (!SAVE_EXPR_RESOLVED_P (exp
))
10202 /* We can indeed still hit this case, typically via builtin
10203 expanders calling save_expr immediately before expanding
10204 something. Assume this means that we only have to deal
10205 with non-BLKmode values. */
10206 gcc_assert (GET_MODE (ret
) != BLKmode
);
10208 val
= build_decl (curr_insn_location (),
10209 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10210 DECL_ARTIFICIAL (val
) = 1;
10211 DECL_IGNORED_P (val
) = 1;
10213 TREE_OPERAND (exp
, 0) = treeop0
;
10214 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10216 if (!CONSTANT_P (ret
))
10217 ret
= copy_to_reg (ret
);
10218 SET_DECL_RTL (val
, ret
);
10226 /* If we don't need the result, just ensure we evaluate any
10230 unsigned HOST_WIDE_INT idx
;
10233 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10234 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10239 return expand_constructor (exp
, target
, modifier
, false);
10241 case TARGET_MEM_REF
:
10244 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10245 enum insn_code icode
;
10246 unsigned int align
;
10248 op0
= addr_for_mem_ref (exp
, as
, true);
10249 op0
= memory_address_addr_space (mode
, op0
, as
);
10250 temp
= gen_rtx_MEM (mode
, op0
);
10251 set_mem_attributes (temp
, exp
, 0);
10252 set_mem_addr_space (temp
, as
);
10253 align
= get_object_alignment (exp
);
10254 if (modifier
!= EXPAND_WRITE
10255 && modifier
!= EXPAND_MEMORY
10257 && align
< GET_MODE_ALIGNMENT (mode
)
10258 /* If the target does not have special handling for unaligned
10259 loads of mode then it can use regular moves for them. */
10260 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10261 != CODE_FOR_nothing
))
10263 struct expand_operand ops
[2];
10265 /* We've already validated the memory, and we're creating a
10266 new pseudo destination. The predicates really can't fail,
10267 nor can the generator. */
10268 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10269 create_fixed_operand (&ops
[1], temp
);
10270 expand_insn (icode
, 2, ops
);
10271 temp
= ops
[0].value
;
10278 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10280 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10281 machine_mode address_mode
;
10282 tree base
= TREE_OPERAND (exp
, 0);
10284 enum insn_code icode
;
10286 /* Handle expansion of non-aliased memory with non-BLKmode. That
10287 might end up in a register. */
10288 if (mem_ref_refers_to_non_mem_p (exp
))
10290 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10291 base
= TREE_OPERAND (base
, 0);
10292 if (known_eq (offset
, 0)
10294 && tree_fits_uhwi_p (TYPE_SIZE (type
))
10295 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)),
10296 tree_to_uhwi (TYPE_SIZE (type
))))
10297 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10298 target
, tmode
, modifier
);
10299 if (TYPE_MODE (type
) == BLKmode
)
10301 temp
= assign_stack_temp (DECL_MODE (base
),
10302 GET_MODE_SIZE (DECL_MODE (base
)));
10303 store_expr (base
, temp
, 0, false, false);
10304 temp
= adjust_address (temp
, BLKmode
, offset
);
10305 set_mem_size (temp
, int_size_in_bytes (type
));
10308 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10309 bitsize_int (offset
* BITS_PER_UNIT
));
10310 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10311 return expand_expr (exp
, target
, tmode
, modifier
);
10313 address_mode
= targetm
.addr_space
.address_mode (as
);
10314 base
= TREE_OPERAND (exp
, 0);
10315 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10317 tree mask
= gimple_assign_rhs2 (def_stmt
);
10318 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10319 gimple_assign_rhs1 (def_stmt
), mask
);
10320 TREE_OPERAND (exp
, 0) = base
;
10322 align
= get_object_alignment (exp
);
10323 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10324 op0
= memory_address_addr_space (mode
, op0
, as
);
10325 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10327 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10328 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10329 op0
= memory_address_addr_space (mode
, op0
, as
);
10331 temp
= gen_rtx_MEM (mode
, op0
);
10332 set_mem_attributes (temp
, exp
, 0);
10333 set_mem_addr_space (temp
, as
);
10334 if (TREE_THIS_VOLATILE (exp
))
10335 MEM_VOLATILE_P (temp
) = 1;
10336 if (modifier
!= EXPAND_WRITE
10337 && modifier
!= EXPAND_MEMORY
10338 && !inner_reference_p
10340 && align
< GET_MODE_ALIGNMENT (mode
))
10342 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10343 != CODE_FOR_nothing
)
10345 struct expand_operand ops
[2];
10347 /* We've already validated the memory, and we're creating a
10348 new pseudo destination. The predicates really can't fail,
10349 nor can the generator. */
10350 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10351 create_fixed_operand (&ops
[1], temp
);
10352 expand_insn (icode
, 2, ops
);
10353 temp
= ops
[0].value
;
10355 else if (targetm
.slow_unaligned_access (mode
, align
))
10356 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10357 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10358 (modifier
== EXPAND_STACK_PARM
10359 ? NULL_RTX
: target
),
10360 mode
, mode
, false, alt_rtl
);
10363 && modifier
!= EXPAND_MEMORY
10364 && modifier
!= EXPAND_WRITE
)
10365 temp
= flip_storage_order (mode
, temp
);
10372 tree array
= treeop0
;
10373 tree index
= treeop1
;
10376 /* Fold an expression like: "foo"[2].
10377 This is not done in fold so it won't happen inside &.
10378 Don't fold if this is for wide characters since it's too
10379 difficult to do correctly and this is a very rare case. */
10381 if (modifier
!= EXPAND_CONST_ADDRESS
10382 && modifier
!= EXPAND_INITIALIZER
10383 && modifier
!= EXPAND_MEMORY
)
10385 tree t
= fold_read_from_constant_string (exp
);
10388 return expand_expr (t
, target
, tmode
, modifier
);
10391 /* If this is a constant index into a constant array,
10392 just get the value from the array. Handle both the cases when
10393 we have an explicit constructor and when our operand is a variable
10394 that was declared const. */
10396 if (modifier
!= EXPAND_CONST_ADDRESS
10397 && modifier
!= EXPAND_INITIALIZER
10398 && modifier
!= EXPAND_MEMORY
10399 && TREE_CODE (array
) == CONSTRUCTOR
10400 && ! TREE_SIDE_EFFECTS (array
)
10401 && TREE_CODE (index
) == INTEGER_CST
)
10403 unsigned HOST_WIDE_INT ix
;
10406 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10408 if (tree_int_cst_equal (field
, index
))
10410 if (!TREE_SIDE_EFFECTS (value
))
10411 return expand_expr (fold (value
), target
, tmode
, modifier
);
10416 else if (optimize
>= 1
10417 && modifier
!= EXPAND_CONST_ADDRESS
10418 && modifier
!= EXPAND_INITIALIZER
10419 && modifier
!= EXPAND_MEMORY
10420 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10421 && TREE_CODE (index
) == INTEGER_CST
10422 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10423 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10425 if (init
== NULL_TREE
)
10427 tree value
= build_zero_cst (type
);
10428 if (TREE_CODE (value
) == CONSTRUCTOR
)
10430 /* If VALUE is a CONSTRUCTOR, this optimization is only
10431 useful if this doesn't store the CONSTRUCTOR into
10432 memory. If it does, it is more efficient to just
10433 load the data from the array directly. */
10434 rtx ret
= expand_constructor (value
, target
,
10436 if (ret
== NULL_RTX
)
10441 return expand_expr (value
, target
, tmode
, modifier
);
10443 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10445 unsigned HOST_WIDE_INT ix
;
10448 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10450 if (tree_int_cst_equal (field
, index
))
10452 if (TREE_SIDE_EFFECTS (value
))
10455 if (TREE_CODE (value
) == CONSTRUCTOR
)
10457 /* If VALUE is a CONSTRUCTOR, this
10458 optimization is only useful if
10459 this doesn't store the CONSTRUCTOR
10460 into memory. If it does, it is more
10461 efficient to just load the data from
10462 the array directly. */
10463 rtx ret
= expand_constructor (value
, target
,
10465 if (ret
== NULL_RTX
)
10470 expand_expr (fold (value
), target
, tmode
, modifier
);
10473 else if (TREE_CODE (init
) == STRING_CST
)
10475 tree low_bound
= array_ref_low_bound (exp
);
10476 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10478 /* Optimize the special case of a zero lower bound.
10480 We convert the lower bound to sizetype to avoid problems
10481 with constant folding. E.g. suppose the lower bound is
10482 1 and its mode is QI. Without the conversion
10483 (ARRAY + (INDEX - (unsigned char)1))
10485 (ARRAY + (-(unsigned char)1) + INDEX)
10487 (ARRAY + 255 + INDEX). Oops! */
10488 if (!integer_zerop (low_bound
))
10489 index1
= size_diffop_loc (loc
, index1
,
10490 fold_convert_loc (loc
, sizetype
,
10493 if (tree_fits_uhwi_p (index1
)
10494 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10496 tree type
= TREE_TYPE (TREE_TYPE (init
));
10497 scalar_int_mode mode
;
10499 if (is_int_mode (TYPE_MODE (type
), &mode
)
10500 && GET_MODE_SIZE (mode
) == 1)
10501 return gen_int_mode (TREE_STRING_POINTER (init
)
10502 [TREE_INT_CST_LOW (index1
)],
10508 goto normal_inner_ref
;
10510 case COMPONENT_REF
:
10511 /* If the operand is a CONSTRUCTOR, we can just extract the
10512 appropriate field if it is present. */
10513 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10515 unsigned HOST_WIDE_INT idx
;
10517 scalar_int_mode field_mode
;
10519 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10521 if (field
== treeop1
10522 /* We can normally use the value of the field in the
10523 CONSTRUCTOR. However, if this is a bitfield in
10524 an integral mode that we can fit in a HOST_WIDE_INT,
10525 we must mask only the number of bits in the bitfield,
10526 since this is done implicitly by the constructor. If
10527 the bitfield does not meet either of those conditions,
10528 we can't do this optimization. */
10529 && (! DECL_BIT_FIELD (field
)
10530 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10531 && (GET_MODE_PRECISION (field_mode
)
10532 <= HOST_BITS_PER_WIDE_INT
))))
10534 if (DECL_BIT_FIELD (field
)
10535 && modifier
== EXPAND_STACK_PARM
)
10537 op0
= expand_expr (value
, target
, tmode
, modifier
);
10538 if (DECL_BIT_FIELD (field
))
10540 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10541 scalar_int_mode imode
10542 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10544 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10546 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10548 op0
= expand_and (imode
, op0
, op1
, target
);
10552 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10554 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10556 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10564 goto normal_inner_ref
;
10566 case BIT_FIELD_REF
:
10567 case ARRAY_RANGE_REF
:
10570 machine_mode mode1
, mode2
;
10571 poly_int64 bitsize
, bitpos
, bytepos
;
10573 int reversep
, volatilep
= 0, must_force_mem
;
10575 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10576 &unsignedp
, &reversep
, &volatilep
);
10577 rtx orig_op0
, memloc
;
10578 bool clear_mem_expr
= false;
10580 /* If we got back the original object, something is wrong. Perhaps
10581 we are evaluating an expression too early. In any event, don't
10582 infinitely recurse. */
10583 gcc_assert (tem
!= exp
);
10585 /* If TEM's type is a union of variable size, pass TARGET to the inner
10586 computation, since it will need a temporary and TARGET is known
10587 to have to do. This occurs in unchecked conversion in Ada. */
10589 = expand_expr_real (tem
,
10590 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10591 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10592 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10594 && modifier
!= EXPAND_STACK_PARM
10595 ? target
: NULL_RTX
),
10597 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10600 /* If the field has a mode, we want to access it in the
10601 field's mode, not the computed mode.
10602 If a MEM has VOIDmode (external with incomplete type),
10603 use BLKmode for it instead. */
10606 if (mode1
!= VOIDmode
)
10607 op0
= adjust_address (op0
, mode1
, 0);
10608 else if (GET_MODE (op0
) == VOIDmode
)
10609 op0
= adjust_address (op0
, BLKmode
, 0);
10613 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10615 /* If we have either an offset, a BLKmode result, or a reference
10616 outside the underlying object, we must force it to memory.
10617 Such a case can occur in Ada if we have unchecked conversion
10618 of an expression from a scalar type to an aggregate type or
10619 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10620 passed a partially uninitialized object or a view-conversion
10621 to a larger size. */
10622 must_force_mem
= (offset
10623 || mode1
== BLKmode
10624 || maybe_gt (bitpos
+ bitsize
,
10625 GET_MODE_BITSIZE (mode2
)));
10627 /* Handle CONCAT first. */
10628 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10630 if (known_eq (bitpos
, 0)
10631 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10632 && COMPLEX_MODE_P (mode1
)
10633 && COMPLEX_MODE_P (GET_MODE (op0
))
10634 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10635 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10638 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10639 if (mode1
!= GET_MODE (op0
))
10642 for (int i
= 0; i
< 2; i
++)
10644 rtx op
= read_complex_part (op0
, i
!= 0);
10645 if (GET_CODE (op
) == SUBREG
)
10646 op
= force_reg (GET_MODE (op
), op
);
10647 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10653 if (!REG_P (op
) && !MEM_P (op
))
10654 op
= force_reg (GET_MODE (op
), op
);
10655 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10659 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10663 if (known_eq (bitpos
, 0)
10664 && known_eq (bitsize
,
10665 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10666 && maybe_ne (bitsize
, 0))
10668 op0
= XEXP (op0
, 0);
10669 mode2
= GET_MODE (op0
);
10671 else if (known_eq (bitpos
,
10672 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10673 && known_eq (bitsize
,
10674 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10675 && maybe_ne (bitpos
, 0)
10676 && maybe_ne (bitsize
, 0))
10678 op0
= XEXP (op0
, 1);
10680 mode2
= GET_MODE (op0
);
10683 /* Otherwise force into memory. */
10684 must_force_mem
= 1;
10687 /* If this is a constant, put it in a register if it is a legitimate
10688 constant and we don't need a memory reference. */
10689 if (CONSTANT_P (op0
)
10690 && mode2
!= BLKmode
10691 && targetm
.legitimate_constant_p (mode2
, op0
)
10692 && !must_force_mem
)
10693 op0
= force_reg (mode2
, op0
);
10695 /* Otherwise, if this is a constant, try to force it to the constant
10696 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10697 is a legitimate constant. */
10698 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10699 op0
= validize_mem (memloc
);
10701 /* Otherwise, if this is a constant or the object is not in memory
10702 and need be, put it there. */
10703 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10705 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10706 emit_move_insn (memloc
, op0
);
10708 clear_mem_expr
= true;
10713 machine_mode address_mode
;
10714 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10717 gcc_assert (MEM_P (op0
));
10719 address_mode
= get_address_mode (op0
);
10720 if (GET_MODE (offset_rtx
) != address_mode
)
10722 /* We cannot be sure that the RTL in offset_rtx is valid outside
10723 of a memory address context, so force it into a register
10724 before attempting to convert it to the desired mode. */
10725 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10726 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10729 /* See the comment in expand_assignment for the rationale. */
10730 if (mode1
!= VOIDmode
10731 && maybe_ne (bitpos
, 0)
10732 && maybe_gt (bitsize
, 0)
10733 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10734 && multiple_p (bitpos
, bitsize
)
10735 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10736 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10738 op0
= adjust_address (op0
, mode1
, bytepos
);
10742 op0
= offset_address (op0
, offset_rtx
,
10743 highest_pow2_factor (offset
));
10746 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10747 record its alignment as BIGGEST_ALIGNMENT. */
10749 && known_eq (bitpos
, 0)
10751 && is_aligning_offset (offset
, tem
))
10752 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10754 /* Don't forget about volatility even if this is a bitfield. */
10755 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10757 if (op0
== orig_op0
)
10758 op0
= copy_rtx (op0
);
10760 MEM_VOLATILE_P (op0
) = 1;
10763 /* In cases where an aligned union has an unaligned object
10764 as a field, we might be extracting a BLKmode value from
10765 an integer-mode (e.g., SImode) object. Handle this case
10766 by doing the extract into an object as wide as the field
10767 (which we know to be the width of a basic mode), then
10768 storing into memory, and changing the mode to BLKmode. */
10769 if (mode1
== VOIDmode
10770 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10771 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10772 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10773 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10774 && modifier
!= EXPAND_CONST_ADDRESS
10775 && modifier
!= EXPAND_INITIALIZER
10776 && modifier
!= EXPAND_MEMORY
)
10777 /* If the bitfield is volatile and the bitsize
10778 is narrower than the access size of the bitfield,
10779 we need to extract bitfields from the access. */
10780 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10781 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10782 && mode1
!= BLKmode
10783 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10784 /* If the field isn't aligned enough to fetch as a memref,
10785 fetch it as a bit field. */
10786 || (mode1
!= BLKmode
10788 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10789 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10790 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10791 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10792 && modifier
!= EXPAND_MEMORY
10793 && ((modifier
== EXPAND_CONST_ADDRESS
10794 || modifier
== EXPAND_INITIALIZER
)
10796 : targetm
.slow_unaligned_access (mode1
,
10798 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10799 /* If the type and the field are a constant size and the
10800 size of the type isn't the same size as the bitfield,
10801 we must use bitfield operations. */
10802 || (known_size_p (bitsize
)
10803 && TYPE_SIZE (TREE_TYPE (exp
))
10804 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10805 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10808 machine_mode ext_mode
= mode
;
10810 if (ext_mode
== BLKmode
10811 && ! (target
!= 0 && MEM_P (op0
)
10813 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10814 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10816 if (ext_mode
== BLKmode
)
10819 target
= assign_temp (type
, 1, 1);
10821 /* ??? Unlike the similar test a few lines below, this one is
10822 very likely obsolete. */
10823 if (known_eq (bitsize
, 0))
10826 /* In this case, BITPOS must start at a byte boundary and
10827 TARGET, if specified, must be a MEM. */
10828 gcc_assert (MEM_P (op0
)
10829 && (!target
|| MEM_P (target
)));
10831 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
10832 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
10833 emit_block_move (target
,
10834 adjust_address (op0
, VOIDmode
, bytepos
),
10835 gen_int_mode (bytesize
, Pmode
),
10836 (modifier
== EXPAND_STACK_PARM
10837 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10842 /* If we have nothing to extract, the result will be 0 for targets
10843 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10844 return 0 for the sake of consistency, as reading a zero-sized
10845 bitfield is valid in Ada and the value is fully specified. */
10846 if (known_eq (bitsize
, 0))
10849 op0
= validize_mem (op0
);
10851 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10852 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10854 /* If the result has a record type and the extraction is done in
10855 an integral mode, then the field may be not aligned on a byte
10856 boundary; in this case, if it has reverse storage order, it
10857 needs to be extracted as a scalar field with reverse storage
10858 order and put back into memory order afterwards. */
10859 if (TREE_CODE (type
) == RECORD_TYPE
10860 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10861 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10863 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10864 (modifier
== EXPAND_STACK_PARM
10865 ? NULL_RTX
: target
),
10866 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10868 /* If the result has a record type and the mode of OP0 is an
10869 integral mode then, if BITSIZE is narrower than this mode
10870 and this is for big-endian data, we must put the field
10871 into the high-order bits. And we must also put it back
10872 into memory order if it has been previously reversed. */
10873 scalar_int_mode op0_mode
;
10874 if (TREE_CODE (type
) == RECORD_TYPE
10875 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10877 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10879 gcc_checking_assert (known_le (bitsize
, size
));
10880 if (maybe_lt (bitsize
, size
)
10881 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10882 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10883 size
- bitsize
, op0
, 1);
10886 op0
= flip_storage_order (op0_mode
, op0
);
10889 /* If the result type is BLKmode, store the data into a temporary
10890 of the appropriate type, but with the mode corresponding to the
10891 mode for the data we have (op0's mode). */
10892 if (mode
== BLKmode
)
10895 = assign_stack_temp_for_type (ext_mode
,
10896 GET_MODE_BITSIZE (ext_mode
),
10898 emit_move_insn (new_rtx
, op0
);
10899 op0
= copy_rtx (new_rtx
);
10900 PUT_MODE (op0
, BLKmode
);
10906 /* If the result is BLKmode, use that to access the object
10908 if (mode
== BLKmode
)
10911 /* Get a reference to just this component. */
10912 bytepos
= bits_to_bytes_round_down (bitpos
);
10913 if (modifier
== EXPAND_CONST_ADDRESS
10914 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10915 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
10917 op0
= adjust_address (op0
, mode1
, bytepos
);
10919 if (op0
== orig_op0
)
10920 op0
= copy_rtx (op0
);
10922 /* Don't set memory attributes if the base expression is
10923 SSA_NAME that got expanded as a MEM. In that case, we should
10924 just honor its original memory attributes. */
10925 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10926 set_mem_attributes (op0
, exp
, 0);
10928 if (REG_P (XEXP (op0
, 0)))
10929 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10931 /* If op0 is a temporary because the original expressions was forced
10932 to memory, clear MEM_EXPR so that the original expression cannot
10933 be marked as addressable through MEM_EXPR of the temporary. */
10934 if (clear_mem_expr
)
10935 set_mem_expr (op0
, NULL_TREE
);
10937 MEM_VOLATILE_P (op0
) |= volatilep
;
10940 && modifier
!= EXPAND_MEMORY
10941 && modifier
!= EXPAND_WRITE
)
10942 op0
= flip_storage_order (mode1
, op0
);
10944 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10945 || modifier
== EXPAND_CONST_ADDRESS
10946 || modifier
== EXPAND_INITIALIZER
)
10950 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10952 convert_move (target
, op0
, unsignedp
);
10957 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10960 /* All valid uses of __builtin_va_arg_pack () are removed during
10962 if (CALL_EXPR_VA_ARG_PACK (exp
))
10963 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10965 tree fndecl
= get_callee_fndecl (exp
), attr
;
10968 && (attr
= lookup_attribute ("error",
10969 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10970 error ("%Kcall to %qs declared with attribute error: %s",
10971 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10972 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10974 && (attr
= lookup_attribute ("warning",
10975 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10976 warning_at (tree_nonartificial_location (exp
),
10977 0, "%Kcall to %qs declared with attribute warning: %s",
10978 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10979 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10981 /* Check for a built-in function. */
10982 if (fndecl
&& DECL_BUILT_IN (fndecl
))
10984 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
10985 if (CALL_WITH_BOUNDS_P (exp
))
10986 return expand_builtin_with_bounds (exp
, target
, subtarget
,
10989 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
10992 return expand_call (exp
, target
, ignore
);
10994 case VIEW_CONVERT_EXPR
:
10997 /* If we are converting to BLKmode, try to avoid an intermediate
10998 temporary by fetching an inner memory reference. */
10999 if (mode
== BLKmode
11000 && poly_int_tree_p (TYPE_SIZE (type
))
11001 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11002 && handled_component_p (treeop0
))
11004 machine_mode mode1
;
11005 poly_int64 bitsize
, bitpos
, bytepos
;
11007 int unsignedp
, reversep
, volatilep
= 0;
11009 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11010 &unsignedp
, &reversep
, &volatilep
);
11013 /* ??? We should work harder and deal with non-zero offsets. */
11015 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11017 && known_size_p (bitsize
)
11018 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11020 /* See the normal_inner_ref case for the rationale. */
11022 = expand_expr_real (tem
,
11023 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11024 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11026 && modifier
!= EXPAND_STACK_PARM
11027 ? target
: NULL_RTX
),
11029 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11032 if (MEM_P (orig_op0
))
11036 /* Get a reference to just this component. */
11037 if (modifier
== EXPAND_CONST_ADDRESS
11038 || modifier
== EXPAND_SUM
11039 || modifier
== EXPAND_INITIALIZER
)
11040 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11042 op0
= adjust_address (op0
, mode
, bytepos
);
11044 if (op0
== orig_op0
)
11045 op0
= copy_rtx (op0
);
11047 set_mem_attributes (op0
, treeop0
, 0);
11048 if (REG_P (XEXP (op0
, 0)))
11049 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11051 MEM_VOLATILE_P (op0
) |= volatilep
;
11057 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11058 NULL
, inner_reference_p
);
11060 /* If the input and output modes are both the same, we are done. */
11061 if (mode
== GET_MODE (op0
))
11063 /* If neither mode is BLKmode, and both modes are the same size
11064 then we can use gen_lowpart. */
11065 else if (mode
!= BLKmode
11066 && GET_MODE (op0
) != BLKmode
11067 && known_eq (GET_MODE_PRECISION (mode
),
11068 GET_MODE_PRECISION (GET_MODE (op0
)))
11069 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11071 if (GET_CODE (op0
) == SUBREG
)
11072 op0
= force_reg (GET_MODE (op0
), op0
);
11073 temp
= gen_lowpart_common (mode
, op0
);
11078 if (!REG_P (op0
) && !MEM_P (op0
))
11079 op0
= force_reg (GET_MODE (op0
), op0
);
11080 op0
= gen_lowpart (mode
, op0
);
11083 /* If both types are integral, convert from one mode to the other. */
11084 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11085 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11086 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11087 /* If the output type is a bit-field type, do an extraction. */
11088 else if (reduce_bit_field
)
11089 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11090 TYPE_UNSIGNED (type
), NULL_RTX
,
11091 mode
, mode
, false, NULL
);
11092 /* As a last resort, spill op0 to memory, and reload it in a
11094 else if (!MEM_P (op0
))
11096 /* If the operand is not a MEM, force it into memory. Since we
11097 are going to be changing the mode of the MEM, don't call
11098 force_const_mem for constants because we don't allow pool
11099 constants to change mode. */
11100 tree inner_type
= TREE_TYPE (treeop0
);
11102 gcc_assert (!TREE_ADDRESSABLE (exp
));
11104 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11106 = assign_stack_temp_for_type
11107 (TYPE_MODE (inner_type
),
11108 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11110 emit_move_insn (target
, op0
);
11114 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11115 output type is such that the operand is known to be aligned, indicate
11116 that it is. Otherwise, we need only be concerned about alignment for
11117 non-BLKmode results. */
11120 enum insn_code icode
;
11122 if (modifier
!= EXPAND_WRITE
11123 && modifier
!= EXPAND_MEMORY
11124 && !inner_reference_p
11126 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11128 /* If the target does have special handling for unaligned
11129 loads of mode then use them. */
11130 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11131 != CODE_FOR_nothing
)
11135 op0
= adjust_address (op0
, mode
, 0);
11136 /* We've already validated the memory, and we're creating a
11137 new pseudo destination. The predicates really can't
11139 reg
= gen_reg_rtx (mode
);
11141 /* Nor can the insn generator. */
11142 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11146 else if (STRICT_ALIGNMENT
)
11148 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11149 poly_uint64 temp_size
= mode_size
;
11150 if (GET_MODE (op0
) != BLKmode
)
11151 temp_size
= upper_bound (temp_size
,
11152 GET_MODE_SIZE (GET_MODE (op0
)));
11154 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11155 rtx new_with_op0_mode
11156 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11158 gcc_assert (!TREE_ADDRESSABLE (exp
));
11160 if (GET_MODE (op0
) == BLKmode
)
11162 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11163 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11164 (modifier
== EXPAND_STACK_PARM
11165 ? BLOCK_OP_CALL_PARM
11166 : BLOCK_OP_NORMAL
));
11169 emit_move_insn (new_with_op0_mode
, op0
);
11175 op0
= adjust_address (op0
, mode
, 0);
11182 tree lhs
= treeop0
;
11183 tree rhs
= treeop1
;
11184 gcc_assert (ignore
);
11186 /* Check for |= or &= of a bitfield of size one into another bitfield
11187 of size 1. In this case, (unless we need the result of the
11188 assignment) we can do this more efficiently with a
11189 test followed by an assignment, if necessary.
11191 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11192 things change so we do, this code should be enhanced to
11194 if (TREE_CODE (lhs
) == COMPONENT_REF
11195 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11196 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11197 && TREE_OPERAND (rhs
, 0) == lhs
11198 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11199 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11200 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11202 rtx_code_label
*label
= gen_label_rtx ();
11203 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11204 do_jump (TREE_OPERAND (rhs
, 1),
11207 profile_probability::uninitialized ());
11208 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11210 do_pending_stack_adjust ();
11211 emit_label (label
);
11215 expand_assignment (lhs
, rhs
, false);
11220 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11222 case REALPART_EXPR
:
11223 op0
= expand_normal (treeop0
);
11224 return read_complex_part (op0
, false);
11226 case IMAGPART_EXPR
:
11227 op0
= expand_normal (treeop0
);
11228 return read_complex_part (op0
, true);
11235 /* Expanded in cfgexpand.c. */
11236 gcc_unreachable ();
11238 case TRY_CATCH_EXPR
:
11240 case EH_FILTER_EXPR
:
11241 case TRY_FINALLY_EXPR
:
11242 /* Lowered by tree-eh.c. */
11243 gcc_unreachable ();
11245 case WITH_CLEANUP_EXPR
:
11246 case CLEANUP_POINT_EXPR
:
11248 case CASE_LABEL_EXPR
:
11253 case COMPOUND_EXPR
:
11254 case PREINCREMENT_EXPR
:
11255 case PREDECREMENT_EXPR
:
11256 case POSTINCREMENT_EXPR
:
11257 case POSTDECREMENT_EXPR
:
11260 case COMPOUND_LITERAL_EXPR
:
11261 /* Lowered by gimplify.c. */
11262 gcc_unreachable ();
11265 /* Function descriptors are not valid except for as
11266 initialization constants, and should not be expanded. */
11267 gcc_unreachable ();
11269 case WITH_SIZE_EXPR
:
11270 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11271 have pulled out the size to use in whatever context it needed. */
11272 return expand_expr_real (treeop0
, original_target
, tmode
,
11273 modifier
, alt_rtl
, inner_reference_p
);
11276 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11280 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11281 signedness of TYPE), possibly returning the result in TARGET.
11282 TYPE is known to be a partial integer type. */
11284 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11286 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11287 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11289 /* For constant values, reduce using build_int_cst_type. */
11290 if (CONST_INT_P (exp
))
11292 HOST_WIDE_INT value
= INTVAL (exp
);
11293 tree t
= build_int_cst_type (type
, value
);
11294 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11296 else if (TYPE_UNSIGNED (type
))
11298 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11299 rtx mask
= immed_wide_int_const
11300 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11301 return expand_and (mode
, exp
, mask
, target
);
11305 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11306 int count
= GET_MODE_PRECISION (mode
) - prec
;
11307 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11308 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11312 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11313 when applied to the address of EXP produces an address known to be
11314 aligned more than BIGGEST_ALIGNMENT. */
11317 is_aligning_offset (const_tree offset
, const_tree exp
)
11319 /* Strip off any conversions. */
11320 while (CONVERT_EXPR_P (offset
))
11321 offset
= TREE_OPERAND (offset
, 0);
11323 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11324 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11325 if (TREE_CODE (offset
) != BIT_AND_EXPR
11326 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11327 || compare_tree_int (TREE_OPERAND (offset
, 1),
11328 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11329 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11332 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11333 It must be NEGATE_EXPR. Then strip any more conversions. */
11334 offset
= TREE_OPERAND (offset
, 0);
11335 while (CONVERT_EXPR_P (offset
))
11336 offset
= TREE_OPERAND (offset
, 0);
11338 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11341 offset
= TREE_OPERAND (offset
, 0);
11342 while (CONVERT_EXPR_P (offset
))
11343 offset
= TREE_OPERAND (offset
, 0);
11345 /* This must now be the address of EXP. */
11346 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11349 /* Return the tree node if an ARG corresponds to a string constant or zero
11350 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11351 in bytes within the string that ARG is accessing. The type of the
11352 offset will be `sizetype'. */
11355 string_constant (tree arg
, tree
*ptr_offset
)
11357 tree array
, offset
, lower_bound
;
11360 if (TREE_CODE (arg
) == ADDR_EXPR
)
11362 if (TREE_CODE (TREE_OPERAND (arg
, 0)) == STRING_CST
)
11364 *ptr_offset
= size_zero_node
;
11365 return TREE_OPERAND (arg
, 0);
11367 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == VAR_DECL
)
11369 array
= TREE_OPERAND (arg
, 0);
11370 offset
= size_zero_node
;
11372 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == ARRAY_REF
)
11374 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11375 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11376 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11379 /* Check if the array has a nonzero lower bound. */
11380 lower_bound
= array_ref_low_bound (TREE_OPERAND (arg
, 0));
11381 if (!integer_zerop (lower_bound
))
11383 /* If the offset and base aren't both constants, return 0. */
11384 if (TREE_CODE (lower_bound
) != INTEGER_CST
)
11386 if (TREE_CODE (offset
) != INTEGER_CST
)
11388 /* Adjust offset by the lower bound. */
11389 offset
= size_diffop (fold_convert (sizetype
, offset
),
11390 fold_convert (sizetype
, lower_bound
));
11393 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == MEM_REF
)
11395 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11396 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11397 if (TREE_CODE (array
) != ADDR_EXPR
)
11399 array
= TREE_OPERAND (array
, 0);
11400 if (TREE_CODE (array
) != STRING_CST
&& !VAR_P (array
))
11406 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11408 tree arg0
= TREE_OPERAND (arg
, 0);
11409 tree arg1
= TREE_OPERAND (arg
, 1);
11414 if (TREE_CODE (arg0
) == ADDR_EXPR
11415 && (TREE_CODE (TREE_OPERAND (arg0
, 0)) == STRING_CST
11416 || TREE_CODE (TREE_OPERAND (arg0
, 0)) == VAR_DECL
))
11418 array
= TREE_OPERAND (arg0
, 0);
11421 else if (TREE_CODE (arg1
) == ADDR_EXPR
11422 && (TREE_CODE (TREE_OPERAND (arg1
, 0)) == STRING_CST
11423 || TREE_CODE (TREE_OPERAND (arg1
, 0)) == VAR_DECL
))
11425 array
= TREE_OPERAND (arg1
, 0);
11434 if (TREE_CODE (array
) == STRING_CST
)
11436 *ptr_offset
= fold_convert (sizetype
, offset
);
11439 else if (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
11442 tree init
= ctor_for_folding (array
);
11444 /* Variables initialized to string literals can be handled too. */
11445 if (init
== error_mark_node
11447 || TREE_CODE (init
) != STRING_CST
)
11450 /* Avoid const char foo[4] = "abcde"; */
11451 if (DECL_SIZE_UNIT (array
) == NULL_TREE
11452 || TREE_CODE (DECL_SIZE_UNIT (array
)) != INTEGER_CST
11453 || (length
= TREE_STRING_LENGTH (init
)) <= 0
11454 || compare_tree_int (DECL_SIZE_UNIT (array
), length
) < 0)
11457 /* If variable is bigger than the string literal, OFFSET must be constant
11458 and inside of the bounds of the string literal. */
11459 offset
= fold_convert (sizetype
, offset
);
11460 if (compare_tree_int (DECL_SIZE_UNIT (array
), length
) > 0
11461 && (! tree_fits_uhwi_p (offset
)
11462 || compare_tree_int (offset
, length
) >= 0))
11465 *ptr_offset
= offset
;
11472 /* Generate code to calculate OPS, and exploded expression
11473 using a store-flag instruction and return an rtx for the result.
11474 OPS reflects a comparison.
11476 If TARGET is nonzero, store the result there if convenient.
11478 Return zero if there is no suitable set-flag instruction
11479 available on this machine.
11481 Once expand_expr has been called on the arguments of the comparison,
11482 we are committed to doing the store flag, since it is not safe to
11483 re-evaluate the expression. We emit the store-flag insn by calling
11484 emit_store_flag, but only expand the arguments if we have a reason
11485 to believe that emit_store_flag will be successful. If we think that
11486 it will, but it isn't, we have to simulate the store-flag with a
11487 set/jump/set sequence. */
11490 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11492 enum rtx_code code
;
11493 tree arg0
, arg1
, type
;
11494 machine_mode operand_mode
;
11497 rtx subtarget
= target
;
11498 location_t loc
= ops
->location
;
11503 /* Don't crash if the comparison was erroneous. */
11504 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11507 type
= TREE_TYPE (arg0
);
11508 operand_mode
= TYPE_MODE (type
);
11509 unsignedp
= TYPE_UNSIGNED (type
);
11511 /* We won't bother with BLKmode store-flag operations because it would mean
11512 passing a lot of information to emit_store_flag. */
11513 if (operand_mode
== BLKmode
)
11516 /* We won't bother with store-flag operations involving function pointers
11517 when function pointers must be canonicalized before comparisons. */
11518 if (targetm
.have_canonicalize_funcptr_for_compare ()
11519 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
11520 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
11522 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
11523 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
11524 == FUNCTION_TYPE
))))
11530 /* For vector typed comparisons emit code to generate the desired
11531 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11532 expander for this. */
11533 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
11535 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
11536 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
11537 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
11538 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
11541 tree if_true
= constant_boolean_node (true, ops
->type
);
11542 tree if_false
= constant_boolean_node (false, ops
->type
);
11543 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
11548 /* Get the rtx comparison code to use. We know that EXP is a comparison
11549 operation of some type. Some comparisons against 1 and -1 can be
11550 converted to comparisons with zero. Do so here so that the tests
11551 below will be aware that we have a comparison with zero. These
11552 tests will not catch constants in the first operand, but constants
11553 are rarely passed as the first operand. */
11564 if (integer_onep (arg1
))
11565 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
11567 code
= unsignedp
? LTU
: LT
;
11570 if (! unsignedp
&& integer_all_onesp (arg1
))
11571 arg1
= integer_zero_node
, code
= LT
;
11573 code
= unsignedp
? LEU
: LE
;
11576 if (! unsignedp
&& integer_all_onesp (arg1
))
11577 arg1
= integer_zero_node
, code
= GE
;
11579 code
= unsignedp
? GTU
: GT
;
11582 if (integer_onep (arg1
))
11583 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
11585 code
= unsignedp
? GEU
: GE
;
11588 case UNORDERED_EXPR
:
11614 gcc_unreachable ();
11617 /* Put a constant second. */
11618 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
11619 || TREE_CODE (arg0
) == FIXED_CST
)
11621 std::swap (arg0
, arg1
);
11622 code
= swap_condition (code
);
11625 /* If this is an equality or inequality test of a single bit, we can
11626 do this by shifting the bit being tested to the low-order bit and
11627 masking the result with the constant 1. If the condition was EQ,
11628 we xor it with 1. This does not require an scc insn and is faster
11629 than an scc insn even if we have it.
11631 The code to make this transformation was moved into fold_single_bit_test,
11632 so we just call into the folder and expand its result. */
11634 if ((code
== NE
|| code
== EQ
)
11635 && integer_zerop (arg1
)
11636 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
11638 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
11640 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
11642 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
11643 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
11644 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
11645 gimple_assign_rhs1 (srcstmt
),
11646 gimple_assign_rhs2 (srcstmt
));
11647 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
11649 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
11653 if (! get_subtarget (target
)
11654 || GET_MODE (subtarget
) != operand_mode
)
11657 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
11660 target
= gen_reg_rtx (mode
);
11662 /* Try a cstore if possible. */
11663 return emit_store_flag_force (target
, code
, op0
, op1
,
11664 operand_mode
, unsignedp
,
11665 (TYPE_PRECISION (ops
->type
) == 1
11666 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
11669 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11670 0 otherwise (i.e. if there is no casesi instruction).
11672 DEFAULT_PROBABILITY is the probability of jumping to the default
11675 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
11676 rtx table_label
, rtx default_label
, rtx fallback_label
,
11677 profile_probability default_probability
)
11679 struct expand_operand ops
[5];
11680 scalar_int_mode index_mode
= SImode
;
11681 rtx op1
, op2
, index
;
11683 if (! targetm
.have_casesi ())
11686 /* The index must be some form of integer. Convert it to SImode. */
11687 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
11688 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
11690 rtx rangertx
= expand_normal (range
);
11692 /* We must handle the endpoints in the original mode. */
11693 index_expr
= build2 (MINUS_EXPR
, index_type
,
11694 index_expr
, minval
);
11695 minval
= integer_zero_node
;
11696 index
= expand_normal (index_expr
);
11698 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
11699 omode
, 1, default_label
,
11700 default_probability
);
11701 /* Now we can safely truncate. */
11702 index
= convert_to_mode (index_mode
, index
, 0);
11706 if (omode
!= index_mode
)
11708 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
11709 index_expr
= fold_convert (index_type
, index_expr
);
11712 index
= expand_normal (index_expr
);
11715 do_pending_stack_adjust ();
11717 op1
= expand_normal (minval
);
11718 op2
= expand_normal (range
);
11720 create_input_operand (&ops
[0], index
, index_mode
);
11721 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
11722 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
11723 create_fixed_operand (&ops
[3], table_label
);
11724 create_fixed_operand (&ops
[4], (default_label
11726 : fallback_label
));
11727 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
11731 /* Attempt to generate a tablejump instruction; same concept. */
11732 /* Subroutine of the next function.
11734 INDEX is the value being switched on, with the lowest value
11735 in the table already subtracted.
11736 MODE is its expected mode (needed if INDEX is constant).
11737 RANGE is the length of the jump table.
11738 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11740 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11741 index value is out of range.
11742 DEFAULT_PROBABILITY is the probability of jumping to
11743 the default label. */
11746 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
11747 rtx default_label
, profile_probability default_probability
)
11751 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
11752 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
11754 /* Do an unsigned comparison (in the proper mode) between the index
11755 expression and the value which represents the length of the range.
11756 Since we just finished subtracting the lower bound of the range
11757 from the index expression, this comparison allows us to simultaneously
11758 check that the original index expression value is both greater than
11759 or equal to the minimum value of the range and less than or equal to
11760 the maximum value of the range. */
11763 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
11764 default_label
, default_probability
);
11767 /* If index is in range, it must fit in Pmode.
11768 Convert to Pmode so we can index with it. */
11770 index
= convert_to_mode (Pmode
, index
, 1);
11772 /* Don't let a MEM slip through, because then INDEX that comes
11773 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11774 and break_out_memory_refs will go to work on it and mess it up. */
11775 #ifdef PIC_CASE_VECTOR_ADDRESS
11776 if (flag_pic
&& !REG_P (index
))
11777 index
= copy_to_mode_reg (Pmode
, index
);
11780 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11781 GET_MODE_SIZE, because this indicates how large insns are. The other
11782 uses should all be Pmode, because they are addresses. This code
11783 could fail if addresses and insns are not the same size. */
11784 index
= simplify_gen_binary (MULT
, Pmode
, index
,
11785 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
11787 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
11788 gen_rtx_LABEL_REF (Pmode
, table_label
));
11790 #ifdef PIC_CASE_VECTOR_ADDRESS
11792 index
= PIC_CASE_VECTOR_ADDRESS (index
);
11795 index
= memory_address (CASE_VECTOR_MODE
, index
);
11796 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
11797 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
11798 convert_move (temp
, vector
, 0);
11800 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
11802 /* If we are generating PIC code or if the table is PC-relative, the
11803 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11804 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
11809 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
11810 rtx table_label
, rtx default_label
,
11811 profile_probability default_probability
)
11815 if (! targetm
.have_tablejump ())
11818 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
11819 fold_convert (index_type
, index_expr
),
11820 fold_convert (index_type
, minval
));
11821 index
= expand_normal (index_expr
);
11822 do_pending_stack_adjust ();
11824 do_tablejump (index
, TYPE_MODE (index_type
),
11825 convert_modes (TYPE_MODE (index_type
),
11826 TYPE_MODE (TREE_TYPE (range
)),
11827 expand_normal (range
),
11828 TYPE_UNSIGNED (TREE_TYPE (range
))),
11829 table_label
, default_label
, default_probability
);
11833 /* Return a CONST_VECTOR rtx representing vector mask for
11834 a VECTOR_CST of booleans. */
11836 const_vector_mask_from_tree (tree exp
)
11838 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11839 machine_mode inner
= GET_MODE_INNER (mode
);
11841 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
11842 VECTOR_CST_NELTS_PER_PATTERN (exp
));
11843 unsigned int count
= builder
.encoded_nelts ();
11844 for (unsigned int i
= 0; i
< count
; ++i
)
11846 tree elt
= VECTOR_CST_ELT (exp
, i
);
11847 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11848 if (integer_zerop (elt
))
11849 builder
.quick_push (CONST0_RTX (inner
));
11850 else if (integer_onep (elt
)
11851 || integer_minus_onep (elt
))
11852 builder
.quick_push (CONSTM1_RTX (inner
));
11854 gcc_unreachable ();
11856 return builder
.build ();
11859 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11860 Return a constant scalar rtx of mode MODE in which bit X is set if element
11861 X of EXP is nonzero. */
11863 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
11865 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
11868 /* The result has a fixed number of bits so the input must too. */
11869 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
11870 for (unsigned int i
= 0; i
< nunits
; ++i
)
11872 elt
= VECTOR_CST_ELT (exp
, i
);
11873 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11874 if (integer_all_onesp (elt
))
11875 res
= wi::set_bit (res
, i
);
11877 gcc_assert (integer_zerop (elt
));
11880 return immed_wide_int_const (res
, mode
);
11883 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11885 const_vector_from_tree (tree exp
)
11887 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11889 if (initializer_zerop (exp
))
11890 return CONST0_RTX (mode
);
11892 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
11893 return const_vector_mask_from_tree (exp
);
11895 machine_mode inner
= GET_MODE_INNER (mode
);
11897 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
11898 VECTOR_CST_NELTS_PER_PATTERN (exp
));
11899 unsigned int count
= builder
.encoded_nelts ();
11900 for (unsigned int i
= 0; i
< count
; ++i
)
11902 tree elt
= VECTOR_CST_ELT (exp
, i
);
11903 if (TREE_CODE (elt
) == REAL_CST
)
11904 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
11906 else if (TREE_CODE (elt
) == FIXED_CST
)
11907 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
11910 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
11913 return builder
.build ();
11916 /* Build a decl for a personality function given a language prefix. */
11919 build_personality_function (const char *lang
)
11921 const char *unwind_and_version
;
11925 switch (targetm_common
.except_unwind_info (&global_options
))
11930 unwind_and_version
= "_sj0";
11934 unwind_and_version
= "_v0";
11937 unwind_and_version
= "_seh0";
11940 gcc_unreachable ();
11943 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
11945 type
= build_function_type_list (integer_type_node
, integer_type_node
,
11946 long_long_unsigned_type_node
,
11947 ptr_type_node
, ptr_type_node
, NULL_TREE
);
11948 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
11949 get_identifier (name
), type
);
11950 DECL_ARTIFICIAL (decl
) = 1;
11951 DECL_EXTERNAL (decl
) = 1;
11952 TREE_PUBLIC (decl
) = 1;
11954 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11955 are the flags assigned by targetm.encode_section_info. */
11956 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
11961 /* Extracts the personality function of DECL and returns the corresponding
11965 get_personality_function (tree decl
)
11967 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
11968 enum eh_personality_kind pk
;
11970 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
11971 if (pk
== eh_personality_none
)
11975 && pk
== eh_personality_any
)
11976 personality
= lang_hooks
.eh_personality ();
11978 if (pk
== eh_personality_lang
)
11979 gcc_assert (personality
!= NULL_TREE
);
11981 return XEXP (DECL_RTL (personality
), 0);
11984 /* Returns a tree for the size of EXP in bytes. */
11987 tree_expr_size (const_tree exp
)
11990 && DECL_SIZE_UNIT (exp
) != 0)
11991 return DECL_SIZE_UNIT (exp
);
11993 return size_in_bytes (TREE_TYPE (exp
));
11996 /* Return an rtx for the size in bytes of the value of EXP. */
11999 expr_size (tree exp
)
12003 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12004 size
= TREE_OPERAND (exp
, 1);
12007 size
= tree_expr_size (exp
);
12009 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12012 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12015 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12016 if the size can vary or is larger than an integer. */
12018 static HOST_WIDE_INT
12019 int_expr_size (tree exp
)
12023 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12024 size
= TREE_OPERAND (exp
, 1);
12027 size
= tree_expr_size (exp
);
12031 if (size
== 0 || !tree_fits_shwi_p (size
))
12034 return tree_to_shwi (size
);