1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
50 #include "coretypes.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
60 #include "conditions.h"
63 #include "hard-reg-set.h"
70 #include "basic-block.h"
74 #include "cfglayout.h"
75 #include "tree-pass.h"
80 #ifdef XCOFF_DEBUGGING_INFO
81 #include "xcoffout.h" /* Needed for external data
82 declarations for e.g. AIX 4.x. */
85 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
86 #include "dwarf2out.h"
89 #ifdef DBX_DEBUGGING_INFO
93 #ifdef SDB_DEBUGGING_INFO
97 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
98 null default for it to save conditionalization later. */
99 #ifndef CC_STATUS_INIT
100 #define CC_STATUS_INIT
103 /* How to start an assembler comment. */
104 #ifndef ASM_COMMENT_START
105 #define ASM_COMMENT_START ";#"
108 /* Is the given character a logical line separator for the assembler? */
109 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
110 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
113 #ifndef JUMP_TABLES_IN_TEXT_SECTION
114 #define JUMP_TABLES_IN_TEXT_SECTION 0
117 /* Bitflags used by final_scan_insn. */
120 #define SEEN_EMITTED 4
122 /* Last insn processed by final_scan_insn. */
123 static rtx debug_insn
;
124 rtx current_output_insn
;
126 /* Line number of last NOTE. */
127 static int last_linenum
;
129 /* Highest line number in current block. */
130 static int high_block_linenum
;
132 /* Likewise for function. */
133 static int high_function_linenum
;
135 /* Filename of last NOTE. */
136 static const char *last_filename
;
138 /* Whether to force emission of a line note before the next insn. */
139 static bool force_source_line
= false;
141 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
143 /* Nonzero while outputting an `asm' with operands.
144 This means that inconsistencies are the user's fault, so don't die.
145 The precise value is the insn being output, to pass to error_for_asm. */
146 rtx this_is_asm_operands
;
148 /* Number of operands of this insn, for an `asm' with operands. */
149 static unsigned int insn_noperands
;
151 /* Compare optimization flag. */
153 static rtx last_ignored_compare
= 0;
155 /* Assign a unique number to each insn that is output.
156 This can be used to generate unique local labels. */
158 static int insn_counter
= 0;
161 /* This variable contains machine-dependent flags (defined in tm.h)
162 set and examined by output routines
163 that describe how to interpret the condition codes properly. */
167 /* During output of an insn, this contains a copy of cc_status
168 from before the insn. */
170 CC_STATUS cc_prev_status
;
173 /* Indexed by hardware reg number, is 1 if that register is ever
174 used in the current function.
176 In life_analysis, or in stupid_life_analysis, this is set
177 up to record the hard regs used explicitly. Reload adds
178 in the hard regs used for holding pseudo regs. Final uses
179 it to generate the code in the function prologue and epilogue
180 to save and restore registers as needed. */
182 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
184 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
185 Unlike regs_ever_live, elements of this array corresponding to
186 eliminable regs like the frame pointer are set if an asm sets them. */
188 char regs_asm_clobbered
[FIRST_PSEUDO_REGISTER
];
190 /* Nonzero means current function must be given a frame pointer.
191 Initialized in function.c to 0. Set only in reload1.c as per
192 the needs of the function. */
194 int frame_pointer_needed
;
196 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
198 static int block_depth
;
200 /* Nonzero if have enabled APP processing of our assembler output. */
204 /* If we are outputting an insn sequence, this contains the sequence rtx.
209 #ifdef ASSEMBLER_DIALECT
211 /* Number of the assembler dialect to use, starting at 0. */
212 static int dialect_number
;
215 #ifdef HAVE_conditional_execution
216 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
217 rtx current_insn_predicate
;
220 #ifdef HAVE_ATTR_length
221 static int asm_insn_count (rtx
);
223 static void profile_function (FILE *);
224 static void profile_after_prologue (FILE *);
225 static bool notice_source_line (rtx
);
226 static rtx
walk_alter_subreg (rtx
*);
227 static void output_asm_name (void);
228 static void output_alternate_entry_point (FILE *, rtx
);
229 static tree
get_mem_expr_from_op (rtx
, int *);
230 static void output_asm_operand_names (rtx
*, int *, int);
231 static void output_operand (rtx
, int);
232 #ifdef LEAF_REGISTERS
233 static void leaf_renumber_regs (rtx
);
236 static int alter_cond (rtx
);
238 #ifndef ADDR_VEC_ALIGN
239 static int final_addr_vec_align (rtx
);
241 #ifdef HAVE_ATTR_length
242 static int align_fuzz (rtx
, rtx
, int, unsigned);
245 /* Initialize data in final at the beginning of a compilation. */
248 init_final (const char *filename ATTRIBUTE_UNUSED
)
253 #ifdef ASSEMBLER_DIALECT
254 dialect_number
= ASSEMBLER_DIALECT
;
258 /* Default target function prologue and epilogue assembler output.
260 If not overridden for epilogue code, then the function body itself
261 contains return instructions wherever needed. */
263 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
264 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
268 /* Default target hook that outputs nothing to a stream. */
270 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
274 /* Enable APP processing of subsequent output.
275 Used before the output from an `asm' statement. */
282 fputs (ASM_APP_ON
, asm_out_file
);
287 /* Disable APP processing of subsequent output.
288 Called from varasm.c before most kinds of output. */
295 fputs (ASM_APP_OFF
, asm_out_file
);
300 /* Return the number of slots filled in the current
301 delayed branch sequence (we don't count the insn needing the
302 delay slot). Zero if not in a delayed branch sequence. */
306 dbr_sequence_length (void)
308 if (final_sequence
!= 0)
309 return XVECLEN (final_sequence
, 0) - 1;
315 /* The next two pages contain routines used to compute the length of an insn
316 and to shorten branches. */
318 /* Arrays for insn lengths, and addresses. The latter is referenced by
319 `insn_current_length'. */
321 static int *insn_lengths
;
323 varray_type insn_addresses_
;
325 /* Max uid for which the above arrays are valid. */
326 static int insn_lengths_max_uid
;
328 /* Address of insn being processed. Used by `insn_current_length'. */
329 int insn_current_address
;
331 /* Address of insn being processed in previous iteration. */
332 int insn_last_address
;
334 /* known invariant alignment of insn being processed. */
335 int insn_current_align
;
337 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
338 gives the next following alignment insn that increases the known
339 alignment, or NULL_RTX if there is no such insn.
340 For any alignment obtained this way, we can again index uid_align with
341 its uid to obtain the next following align that in turn increases the
342 alignment, till we reach NULL_RTX; the sequence obtained this way
343 for each insn we'll call the alignment chain of this insn in the following
346 struct label_alignment
352 static rtx
*uid_align
;
353 static int *uid_shuid
;
354 static struct label_alignment
*label_align
;
356 /* Indicate that branch shortening hasn't yet been done. */
359 init_insn_lengths (void)
370 insn_lengths_max_uid
= 0;
372 #ifdef HAVE_ATTR_length
373 INSN_ADDRESSES_FREE ();
382 /* Obtain the current length of an insn. If branch shortening has been done,
383 get its actual length. Otherwise, use FALLBACK_FN to calcualte the
386 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED
,
387 int (*fallback_fn
) (rtx
) ATTRIBUTE_UNUSED
)
389 #ifdef HAVE_ATTR_length
394 if (insn_lengths_max_uid
> INSN_UID (insn
))
395 return insn_lengths
[INSN_UID (insn
)];
397 switch (GET_CODE (insn
))
405 length
= fallback_fn (insn
);
409 body
= PATTERN (insn
);
410 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
412 /* Alignment is machine-dependent and should be handled by
416 length
= fallback_fn (insn
);
420 body
= PATTERN (insn
);
421 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
424 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
425 length
= asm_insn_count (body
) * fallback_fn (insn
);
426 else if (GET_CODE (body
) == SEQUENCE
)
427 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
428 length
+= get_attr_length (XVECEXP (body
, 0, i
));
430 length
= fallback_fn (insn
);
437 #ifdef ADJUST_INSN_LENGTH
438 ADJUST_INSN_LENGTH (insn
, length
);
441 #else /* not HAVE_ATTR_length */
443 #define insn_default_length 0
444 #define insn_min_length 0
445 #endif /* not HAVE_ATTR_length */
448 /* Obtain the current length of an insn. If branch shortening has been done,
449 get its actual length. Otherwise, get its maximum length. */
451 get_attr_length (rtx insn
)
453 return get_attr_length_1 (insn
, insn_default_length
);
456 /* Obtain the current length of an insn. If branch shortening has been done,
457 get its actual length. Otherwise, get its minimum length. */
459 get_attr_min_length (rtx insn
)
461 return get_attr_length_1 (insn
, insn_min_length
);
464 /* Code to handle alignment inside shorten_branches. */
466 /* Here is an explanation how the algorithm in align_fuzz can give
469 Call a sequence of instructions beginning with alignment point X
470 and continuing until the next alignment point `block X'. When `X'
471 is used in an expression, it means the alignment value of the
474 Call the distance between the start of the first insn of block X, and
475 the end of the last insn of block X `IX', for the `inner size of X'.
476 This is clearly the sum of the instruction lengths.
478 Likewise with the next alignment-delimited block following X, which we
481 Call the distance between the start of the first insn of block X, and
482 the start of the first insn of block Y `OX', for the `outer size of X'.
484 The estimated padding is then OX - IX.
486 OX can be safely estimated as
491 OX = round_up(IX, X) + Y - X
493 Clearly est(IX) >= real(IX), because that only depends on the
494 instruction lengths, and those being overestimated is a given.
496 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
497 we needn't worry about that when thinking about OX.
499 When X >= Y, the alignment provided by Y adds no uncertainty factor
500 for branch ranges starting before X, so we can just round what we have.
501 But when X < Y, we don't know anything about the, so to speak,
502 `middle bits', so we have to assume the worst when aligning up from an
503 address mod X to one mod Y, which is Y - X. */
506 #define LABEL_ALIGN(LABEL) align_labels_log
509 #ifndef LABEL_ALIGN_MAX_SKIP
510 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
514 #define LOOP_ALIGN(LABEL) align_loops_log
517 #ifndef LOOP_ALIGN_MAX_SKIP
518 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
521 #ifndef LABEL_ALIGN_AFTER_BARRIER
522 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
525 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
526 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
530 #define JUMP_ALIGN(LABEL) align_jumps_log
533 #ifndef JUMP_ALIGN_MAX_SKIP
534 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
537 #ifndef ADDR_VEC_ALIGN
539 final_addr_vec_align (rtx addr_vec
)
541 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
543 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
544 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
545 return exact_log2 (align
);
549 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
552 #ifndef INSN_LENGTH_ALIGNMENT
553 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
556 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
558 static int min_labelno
, max_labelno
;
560 #define LABEL_TO_ALIGNMENT(LABEL) \
561 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
563 #define LABEL_TO_MAX_SKIP(LABEL) \
564 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
566 /* For the benefit of port specific code do this also as a function. */
569 label_to_alignment (rtx label
)
571 return LABEL_TO_ALIGNMENT (label
);
574 #ifdef HAVE_ATTR_length
575 /* The differences in addresses
576 between a branch and its target might grow or shrink depending on
577 the alignment the start insn of the range (the branch for a forward
578 branch or the label for a backward branch) starts out on; if these
579 differences are used naively, they can even oscillate infinitely.
580 We therefore want to compute a 'worst case' address difference that
581 is independent of the alignment the start insn of the range end
582 up on, and that is at least as large as the actual difference.
583 The function align_fuzz calculates the amount we have to add to the
584 naively computed difference, by traversing the part of the alignment
585 chain of the start insn of the range that is in front of the end insn
586 of the range, and considering for each alignment the maximum amount
587 that it might contribute to a size increase.
589 For casesi tables, we also want to know worst case minimum amounts of
590 address difference, in case a machine description wants to introduce
591 some common offset that is added to all offsets in a table.
592 For this purpose, align_fuzz with a growth argument of 0 computes the
593 appropriate adjustment. */
595 /* Compute the maximum delta by which the difference of the addresses of
596 START and END might grow / shrink due to a different address for start
597 which changes the size of alignment insns between START and END.
598 KNOWN_ALIGN_LOG is the alignment known for START.
599 GROWTH should be ~0 if the objective is to compute potential code size
600 increase, and 0 if the objective is to compute potential shrink.
601 The return value is undefined for any other value of GROWTH. */
604 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
606 int uid
= INSN_UID (start
);
608 int known_align
= 1 << known_align_log
;
609 int end_shuid
= INSN_SHUID (end
);
612 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
614 int align_addr
, new_align
;
616 uid
= INSN_UID (align_label
);
617 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
618 if (uid_shuid
[uid
] > end_shuid
)
620 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
621 new_align
= 1 << known_align_log
;
622 if (new_align
< known_align
)
624 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
625 known_align
= new_align
;
630 /* Compute a worst-case reference address of a branch so that it
631 can be safely used in the presence of aligned labels. Since the
632 size of the branch itself is unknown, the size of the branch is
633 not included in the range. I.e. for a forward branch, the reference
634 address is the end address of the branch as known from the previous
635 branch shortening pass, minus a value to account for possible size
636 increase due to alignment. For a backward branch, it is the start
637 address of the branch as known from the current pass, plus a value
638 to account for possible size increase due to alignment.
639 NB.: Therefore, the maximum offset allowed for backward branches needs
640 to exclude the branch size. */
643 insn_current_reference_address (rtx branch
)
648 if (! INSN_ADDRESSES_SET_P ())
651 seq
= NEXT_INSN (PREV_INSN (branch
));
652 seq_uid
= INSN_UID (seq
);
653 if (!JUMP_P (branch
))
654 /* This can happen for example on the PA; the objective is to know the
655 offset to address something in front of the start of the function.
656 Thus, we can treat it like a backward branch.
657 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
658 any alignment we'd encounter, so we skip the call to align_fuzz. */
659 return insn_current_address
;
660 dest
= JUMP_LABEL (branch
);
662 /* BRANCH has no proper alignment chain set, so use SEQ.
663 BRANCH also has no INSN_SHUID. */
664 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
666 /* Forward branch. */
667 return (insn_last_address
+ insn_lengths
[seq_uid
]
668 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
672 /* Backward branch. */
673 return (insn_current_address
674 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
677 #endif /* HAVE_ATTR_length */
680 compute_alignments (void)
682 int log
, max_skip
, max_log
;
691 max_labelno
= max_label_num ();
692 min_labelno
= get_first_label_num ();
693 label_align
= xcalloc (max_labelno
- min_labelno
+ 1,
694 sizeof (struct label_alignment
));
696 /* If not optimizing or optimizing for size, don't assign any alignments. */
697 if (! optimize
|| optimize_size
)
702 rtx label
= BB_HEAD (bb
);
703 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
708 || probably_never_executed_bb_p (bb
))
710 max_log
= LABEL_ALIGN (label
);
711 max_skip
= LABEL_ALIGN_MAX_SKIP
;
713 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
715 if (e
->flags
& EDGE_FALLTHRU
)
716 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
718 branch_frequency
+= EDGE_FREQUENCY (e
);
721 /* There are two purposes to align block with no fallthru incoming edge:
722 1) to avoid fetch stalls when branch destination is near cache boundary
723 2) to improve cache efficiency in case the previous block is not executed
724 (so it does not need to be in the cache).
726 We to catch first case, we align frequently executed blocks.
727 To catch the second, we align blocks that are executed more frequently
728 than the predecessor and the predecessor is likely to not be executed
729 when function is called. */
732 && (branch_frequency
> BB_FREQ_MAX
/ 10
733 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
734 && (bb
->prev_bb
->frequency
735 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
737 log
= JUMP_ALIGN (label
);
741 max_skip
= JUMP_ALIGN_MAX_SKIP
;
744 /* In case block is frequent and reached mostly by non-fallthru edge,
745 align it. It is most likely a first block of loop. */
747 && maybe_hot_bb_p (bb
)
748 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
749 && branch_frequency
> fallthru_frequency
* 2)
751 log
= LOOP_ALIGN (label
);
755 max_skip
= LOOP_ALIGN_MAX_SKIP
;
758 LABEL_TO_ALIGNMENT (label
) = max_log
;
759 LABEL_TO_MAX_SKIP (label
) = max_skip
;
763 struct tree_opt_pass pass_compute_alignments
=
767 compute_alignments
, /* execute */
770 0, /* static_pass_number */
772 0, /* properties_required */
773 0, /* properties_provided */
774 0, /* properties_destroyed */
775 0, /* todo_flags_start */
776 0, /* todo_flags_finish */
781 /* Make a pass over all insns and compute their actual lengths by shortening
782 any branches of variable length if possible. */
784 /* shorten_branches might be called multiple times: for example, the SH
785 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
786 In order to do this, it needs proper length information, which it obtains
787 by calling shorten_branches. This cannot be collapsed with
788 shorten_branches itself into a single pass unless we also want to integrate
789 reorg.c, since the branch splitting exposes new instructions with delay
793 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
800 #ifdef HAVE_ATTR_length
801 #define MAX_CODE_ALIGN 16
803 int something_changed
= 1;
804 char *varying_length
;
807 rtx align_tab
[MAX_CODE_ALIGN
];
811 /* Compute maximum UID and allocate label_align / uid_shuid. */
812 max_uid
= get_max_uid ();
814 /* Free uid_shuid before reallocating it. */
817 uid_shuid
= xmalloc (max_uid
* sizeof *uid_shuid
);
819 if (max_labelno
!= max_label_num ())
821 int old
= max_labelno
;
825 max_labelno
= max_label_num ();
827 n_labels
= max_labelno
- min_labelno
+ 1;
828 n_old_labels
= old
- min_labelno
+ 1;
830 label_align
= xrealloc (label_align
,
831 n_labels
* sizeof (struct label_alignment
));
833 /* Range of labels grows monotonically in the function. Failing here
834 means that the initialization of array got lost. */
835 gcc_assert (n_old_labels
<= n_labels
);
837 memset (label_align
+ n_old_labels
, 0,
838 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
841 /* Initialize label_align and set up uid_shuid to be strictly
842 monotonically rising with insn order. */
843 /* We use max_log here to keep track of the maximum alignment we want to
844 impose on the next CODE_LABEL (or the current one if we are processing
845 the CODE_LABEL itself). */
850 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
854 INSN_SHUID (insn
) = i
++;
857 /* reorg might make the first insn of a loop being run once only,
858 and delete the label in front of it. Then we want to apply
859 the loop alignment to the new label created by reorg, which
860 is separated by the former loop start insn from the
861 NOTE_INSN_LOOP_BEG. */
863 else if (LABEL_P (insn
))
867 /* Merge in alignments computed by compute_alignments. */
868 log
= LABEL_TO_ALIGNMENT (insn
);
872 max_skip
= LABEL_TO_MAX_SKIP (insn
);
875 log
= LABEL_ALIGN (insn
);
879 max_skip
= LABEL_ALIGN_MAX_SKIP
;
881 next
= next_nonnote_insn (insn
);
882 /* ADDR_VECs only take room if read-only data goes into the text
884 if (JUMP_TABLES_IN_TEXT_SECTION
885 || readonly_data_section
== text_section
)
886 if (next
&& JUMP_P (next
))
888 rtx nextbody
= PATTERN (next
);
889 if (GET_CODE (nextbody
) == ADDR_VEC
890 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
892 log
= ADDR_VEC_ALIGN (next
);
896 max_skip
= LABEL_ALIGN_MAX_SKIP
;
900 LABEL_TO_ALIGNMENT (insn
) = max_log
;
901 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
905 else if (BARRIER_P (insn
))
909 for (label
= insn
; label
&& ! INSN_P (label
);
910 label
= NEXT_INSN (label
))
913 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
917 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
923 #ifdef HAVE_ATTR_length
925 /* Allocate the rest of the arrays. */
926 insn_lengths
= xmalloc (max_uid
* sizeof (*insn_lengths
));
927 insn_lengths_max_uid
= max_uid
;
928 /* Syntax errors can lead to labels being outside of the main insn stream.
929 Initialize insn_addresses, so that we get reproducible results. */
930 INSN_ADDRESSES_ALLOC (max_uid
);
932 varying_length
= xcalloc (max_uid
, sizeof (char));
934 /* Initialize uid_align. We scan instructions
935 from end to start, and keep in align_tab[n] the last seen insn
936 that does an alignment of at least n+1, i.e. the successor
937 in the alignment chain for an insn that does / has a known
939 uid_align
= xcalloc (max_uid
, sizeof *uid_align
);
941 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
942 align_tab
[i
] = NULL_RTX
;
943 seq
= get_last_insn ();
944 for (; seq
; seq
= PREV_INSN (seq
))
946 int uid
= INSN_UID (seq
);
948 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
949 uid_align
[uid
] = align_tab
[0];
952 /* Found an alignment label. */
953 uid_align
[uid
] = align_tab
[log
];
954 for (i
= log
- 1; i
>= 0; i
--)
958 #ifdef CASE_VECTOR_SHORTEN_MODE
961 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
964 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
965 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
968 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
970 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
971 int len
, i
, min
, max
, insn_shuid
;
973 addr_diff_vec_flags flags
;
976 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
978 pat
= PATTERN (insn
);
979 len
= XVECLEN (pat
, 1);
980 gcc_assert (len
> 0);
981 min_align
= MAX_CODE_ALIGN
;
982 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
984 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
985 int shuid
= INSN_SHUID (lab
);
996 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
997 min_align
= LABEL_TO_ALIGNMENT (lab
);
999 XEXP (pat
, 2) = gen_rtx_LABEL_REF (Pmode
, min_lab
);
1000 XEXP (pat
, 3) = gen_rtx_LABEL_REF (Pmode
, max_lab
);
1001 insn_shuid
= INSN_SHUID (insn
);
1002 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1003 memset (&flags
, 0, sizeof (flags
));
1004 flags
.min_align
= min_align
;
1005 flags
.base_after_vec
= rel
> insn_shuid
;
1006 flags
.min_after_vec
= min
> insn_shuid
;
1007 flags
.max_after_vec
= max
> insn_shuid
;
1008 flags
.min_after_base
= min
> rel
;
1009 flags
.max_after_base
= max
> rel
;
1010 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1013 #endif /* CASE_VECTOR_SHORTEN_MODE */
1015 /* Compute initial lengths, addresses, and varying flags for each insn. */
1016 for (insn_current_address
= 0, insn
= first
;
1018 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1020 uid
= INSN_UID (insn
);
1022 insn_lengths
[uid
] = 0;
1026 int log
= LABEL_TO_ALIGNMENT (insn
);
1029 int align
= 1 << log
;
1030 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1031 insn_lengths
[uid
] = new_address
- insn_current_address
;
1035 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
1037 if (NOTE_P (insn
) || BARRIER_P (insn
)
1040 if (INSN_DELETED_P (insn
))
1043 body
= PATTERN (insn
);
1044 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1046 /* This only takes room if read-only data goes into the text
1048 if (JUMP_TABLES_IN_TEXT_SECTION
1049 || readonly_data_section
== text_section
)
1050 insn_lengths
[uid
] = (XVECLEN (body
,
1051 GET_CODE (body
) == ADDR_DIFF_VEC
)
1052 * GET_MODE_SIZE (GET_MODE (body
)));
1053 /* Alignment is handled by ADDR_VEC_ALIGN. */
1055 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1056 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1057 else if (GET_CODE (body
) == SEQUENCE
)
1060 int const_delay_slots
;
1062 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1064 const_delay_slots
= 0;
1066 /* Inside a delay slot sequence, we do not do any branch shortening
1067 if the shortening could change the number of delay slots
1069 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1071 rtx inner_insn
= XVECEXP (body
, 0, i
);
1072 int inner_uid
= INSN_UID (inner_insn
);
1075 if (GET_CODE (body
) == ASM_INPUT
1076 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1077 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1078 * insn_default_length (inner_insn
));
1080 inner_length
= insn_default_length (inner_insn
);
1082 insn_lengths
[inner_uid
] = inner_length
;
1083 if (const_delay_slots
)
1085 if ((varying_length
[inner_uid
]
1086 = insn_variable_length_p (inner_insn
)) != 0)
1087 varying_length
[uid
] = 1;
1088 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1089 + insn_lengths
[uid
]);
1092 varying_length
[inner_uid
] = 0;
1093 insn_lengths
[uid
] += inner_length
;
1096 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1098 insn_lengths
[uid
] = insn_default_length (insn
);
1099 varying_length
[uid
] = insn_variable_length_p (insn
);
1102 /* If needed, do any adjustment. */
1103 #ifdef ADJUST_INSN_LENGTH
1104 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1105 if (insn_lengths
[uid
] < 0)
1106 fatal_insn ("negative insn length", insn
);
1110 /* Now loop over all the insns finding varying length insns. For each,
1111 get the current insn length. If it has changed, reflect the change.
1112 When nothing changes for a full pass, we are done. */
1114 while (something_changed
)
1116 something_changed
= 0;
1117 insn_current_align
= MAX_CODE_ALIGN
- 1;
1118 for (insn_current_address
= 0, insn
= first
;
1120 insn
= NEXT_INSN (insn
))
1123 #ifdef ADJUST_INSN_LENGTH
1128 uid
= INSN_UID (insn
);
1132 int log
= LABEL_TO_ALIGNMENT (insn
);
1133 if (log
> insn_current_align
)
1135 int align
= 1 << log
;
1136 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1137 insn_lengths
[uid
] = new_address
- insn_current_address
;
1138 insn_current_align
= log
;
1139 insn_current_address
= new_address
;
1142 insn_lengths
[uid
] = 0;
1143 INSN_ADDRESSES (uid
) = insn_current_address
;
1147 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1148 if (length_align
< insn_current_align
)
1149 insn_current_align
= length_align
;
1151 insn_last_address
= INSN_ADDRESSES (uid
);
1152 INSN_ADDRESSES (uid
) = insn_current_address
;
1154 #ifdef CASE_VECTOR_SHORTEN_MODE
1155 if (optimize
&& JUMP_P (insn
)
1156 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1158 rtx body
= PATTERN (insn
);
1159 int old_length
= insn_lengths
[uid
];
1160 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1161 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1162 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1163 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1164 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1165 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1168 addr_diff_vec_flags flags
;
1170 /* Avoid automatic aggregate initialization. */
1171 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1173 /* Try to find a known alignment for rel_lab. */
1174 for (prev
= rel_lab
;
1176 && ! insn_lengths
[INSN_UID (prev
)]
1177 && ! (varying_length
[INSN_UID (prev
)] & 1);
1178 prev
= PREV_INSN (prev
))
1179 if (varying_length
[INSN_UID (prev
)] & 2)
1181 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1185 /* See the comment on addr_diff_vec_flags in rtl.h for the
1186 meaning of the flags values. base: REL_LAB vec: INSN */
1187 /* Anything after INSN has still addresses from the last
1188 pass; adjust these so that they reflect our current
1189 estimate for this pass. */
1190 if (flags
.base_after_vec
)
1191 rel_addr
+= insn_current_address
- insn_last_address
;
1192 if (flags
.min_after_vec
)
1193 min_addr
+= insn_current_address
- insn_last_address
;
1194 if (flags
.max_after_vec
)
1195 max_addr
+= insn_current_address
- insn_last_address
;
1196 /* We want to know the worst case, i.e. lowest possible value
1197 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1198 its offset is positive, and we have to be wary of code shrink;
1199 otherwise, it is negative, and we have to be vary of code
1201 if (flags
.min_after_base
)
1203 /* If INSN is between REL_LAB and MIN_LAB, the size
1204 changes we are about to make can change the alignment
1205 within the observed offset, therefore we have to break
1206 it up into two parts that are independent. */
1207 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1209 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1210 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1213 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1217 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1219 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1220 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1223 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1225 /* Likewise, determine the highest lowest possible value
1226 for the offset of MAX_LAB. */
1227 if (flags
.max_after_base
)
1229 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1231 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1232 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1235 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1239 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1241 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1242 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1245 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1247 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1248 max_addr
- rel_addr
,
1250 if (JUMP_TABLES_IN_TEXT_SECTION
1251 || readonly_data_section
== text_section
)
1254 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1255 insn_current_address
+= insn_lengths
[uid
];
1256 if (insn_lengths
[uid
] != old_length
)
1257 something_changed
= 1;
1262 #endif /* CASE_VECTOR_SHORTEN_MODE */
1264 if (! (varying_length
[uid
]))
1266 if (NONJUMP_INSN_P (insn
)
1267 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1271 body
= PATTERN (insn
);
1272 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1274 rtx inner_insn
= XVECEXP (body
, 0, i
);
1275 int inner_uid
= INSN_UID (inner_insn
);
1277 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1279 insn_current_address
+= insn_lengths
[inner_uid
];
1283 insn_current_address
+= insn_lengths
[uid
];
1288 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1292 body
= PATTERN (insn
);
1294 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1296 rtx inner_insn
= XVECEXP (body
, 0, i
);
1297 int inner_uid
= INSN_UID (inner_insn
);
1300 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1302 /* insn_current_length returns 0 for insns with a
1303 non-varying length. */
1304 if (! varying_length
[inner_uid
])
1305 inner_length
= insn_lengths
[inner_uid
];
1307 inner_length
= insn_current_length (inner_insn
);
1309 if (inner_length
!= insn_lengths
[inner_uid
])
1311 insn_lengths
[inner_uid
] = inner_length
;
1312 something_changed
= 1;
1314 insn_current_address
+= insn_lengths
[inner_uid
];
1315 new_length
+= inner_length
;
1320 new_length
= insn_current_length (insn
);
1321 insn_current_address
+= new_length
;
1324 #ifdef ADJUST_INSN_LENGTH
1325 /* If needed, do any adjustment. */
1326 tmp_length
= new_length
;
1327 ADJUST_INSN_LENGTH (insn
, new_length
);
1328 insn_current_address
+= (new_length
- tmp_length
);
1331 if (new_length
!= insn_lengths
[uid
])
1333 insn_lengths
[uid
] = new_length
;
1334 something_changed
= 1;
1337 /* For a non-optimizing compile, do only a single pass. */
1342 free (varying_length
);
1344 #endif /* HAVE_ATTR_length */
1347 #ifdef HAVE_ATTR_length
1348 /* Given the body of an INSN known to be generated by an ASM statement, return
1349 the number of machine instructions likely to be generated for this insn.
1350 This is used to compute its length. */
1353 asm_insn_count (rtx body
)
1355 const char *template;
1358 if (GET_CODE (body
) == ASM_INPUT
)
1359 template = XSTR (body
, 0);
1361 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1363 for (; *template; template++)
1364 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1371 /* Output assembler code for the start of a function,
1372 and initialize some of the variables in this file
1373 for the new function. The label for the function and associated
1374 assembler pseudo-ops have already been output in `assemble_start_function'.
1376 FIRST is the first insn of the rtl for the function being compiled.
1377 FILE is the file to write assembler code to.
1378 OPTIMIZE is nonzero if we should eliminate redundant
1379 test and compare insns. */
1382 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1383 int optimize ATTRIBUTE_UNUSED
)
1387 this_is_asm_operands
= 0;
1389 last_filename
= locator_file (prologue_locator
);
1390 last_linenum
= locator_line (prologue_locator
);
1392 high_block_linenum
= high_function_linenum
= last_linenum
;
1394 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1396 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1397 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1398 dwarf2out_begin_prologue (0, NULL
);
1401 #ifdef LEAF_REG_REMAP
1402 if (current_function_uses_only_leaf_regs
)
1403 leaf_renumber_regs (first
);
1406 /* The Sun386i and perhaps other machines don't work right
1407 if the profiling code comes after the prologue. */
1408 #ifdef PROFILE_BEFORE_PROLOGUE
1409 if (current_function_profile
)
1410 profile_function (file
);
1411 #endif /* PROFILE_BEFORE_PROLOGUE */
1413 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1414 if (dwarf2out_do_frame ())
1415 dwarf2out_frame_debug (NULL_RTX
, false);
1418 /* If debugging, assign block numbers to all of the blocks in this
1422 remove_unnecessary_notes ();
1423 reemit_insn_block_notes ();
1424 number_blocks (current_function_decl
);
1425 /* We never actually put out begin/end notes for the top-level
1426 block in the function. But, conceptually, that block is
1428 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1431 /* First output the function prologue: code to set up the stack frame. */
1432 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1434 /* If the machine represents the prologue as RTL, the profiling code must
1435 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1436 #ifdef HAVE_prologue
1437 if (! HAVE_prologue
)
1439 profile_after_prologue (file
);
1443 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1445 #ifndef PROFILE_BEFORE_PROLOGUE
1446 if (current_function_profile
)
1447 profile_function (file
);
1448 #endif /* not PROFILE_BEFORE_PROLOGUE */
1452 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1454 #ifndef NO_PROFILE_COUNTERS
1455 # define NO_PROFILE_COUNTERS 0
1457 #if defined(ASM_OUTPUT_REG_PUSH)
1458 int sval
= current_function_returns_struct
;
1459 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1460 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1461 int cxt
= cfun
->static_chain_decl
!= NULL
;
1463 #endif /* ASM_OUTPUT_REG_PUSH */
1465 if (! NO_PROFILE_COUNTERS
)
1467 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1468 switch_to_section (data_section
);
1469 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1470 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1471 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1474 switch_to_section (current_function_section ());
1476 #if defined(ASM_OUTPUT_REG_PUSH)
1477 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1478 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1481 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1483 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1485 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1488 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1493 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1495 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1497 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1499 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1502 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1507 #if defined(ASM_OUTPUT_REG_PUSH)
1508 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1509 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1513 /* Output assembler code for the end of a function.
1514 For clarity, args are same as those of `final_start_function'
1515 even though not all of them are needed. */
1518 final_end_function (void)
1522 (*debug_hooks
->end_function
) (high_function_linenum
);
1524 /* Finally, output the function epilogue:
1525 code to restore the stack frame and return to the caller. */
1526 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1528 /* And debug output. */
1529 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1531 #if defined (DWARF2_UNWIND_INFO)
1532 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1533 && dwarf2out_do_frame ())
1534 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1538 /* Output assembler code for some insns: all or part of a function.
1539 For description of args, see `final_start_function', above. */
1542 final (rtx first
, FILE *file
, int optimize
)
1548 last_ignored_compare
= 0;
1550 #ifdef SDB_DEBUGGING_INFO
1551 /* When producing SDB debugging info, delete troublesome line number
1552 notes from inlined functions in other files as well as duplicate
1553 line number notes. */
1554 if (write_symbols
== SDB_DEBUG
)
1557 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1558 if (NOTE_P (insn
) && NOTE_LINE_NUMBER (insn
) > 0)
1561 #ifdef USE_MAPPED_LOCATION
1562 && NOTE_SOURCE_LOCATION (insn
) == NOTE_SOURCE_LOCATION (last
)
1564 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1565 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)
1569 delete_insn (insn
); /* Use delete_note. */
1577 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1579 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1580 max_uid
= INSN_UID (insn
);
1582 /* If CC tracking across branches is enabled, record the insn which
1583 jumps to each branch only reached from one place. */
1584 if (optimize
&& JUMP_P (insn
))
1586 rtx lab
= JUMP_LABEL (insn
);
1587 if (lab
&& LABEL_NUSES (lab
) == 1)
1589 LABEL_REFS (lab
) = insn
;
1599 /* Output the insns. */
1600 for (insn
= NEXT_INSN (first
); insn
;)
1602 #ifdef HAVE_ATTR_length
1603 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1605 /* This can be triggered by bugs elsewhere in the compiler if
1606 new insns are created after init_insn_lengths is called. */
1607 gcc_assert (NOTE_P (insn
));
1608 insn_current_address
= -1;
1611 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1612 #endif /* HAVE_ATTR_length */
1614 insn
= final_scan_insn (insn
, file
, optimize
, 0, &seen
);
1619 get_insn_template (int code
, rtx insn
)
1621 switch (insn_data
[code
].output_format
)
1623 case INSN_OUTPUT_FORMAT_SINGLE
:
1624 return insn_data
[code
].output
.single
;
1625 case INSN_OUTPUT_FORMAT_MULTI
:
1626 return insn_data
[code
].output
.multi
[which_alternative
];
1627 case INSN_OUTPUT_FORMAT_FUNCTION
:
1629 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1636 /* Emit the appropriate declaration for an alternate-entry-point
1637 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1638 LABEL_KIND != LABEL_NORMAL.
1640 The case fall-through in this function is intentional. */
1642 output_alternate_entry_point (FILE *file
, rtx insn
)
1644 const char *name
= LABEL_NAME (insn
);
1646 switch (LABEL_KIND (insn
))
1648 case LABEL_WEAK_ENTRY
:
1649 #ifdef ASM_WEAKEN_LABEL
1650 ASM_WEAKEN_LABEL (file
, name
);
1652 case LABEL_GLOBAL_ENTRY
:
1653 targetm
.asm_out
.globalize_label (file
, name
);
1654 case LABEL_STATIC_ENTRY
:
1655 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1656 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1658 ASM_OUTPUT_LABEL (file
, name
);
1667 /* The final scan for one insn, INSN.
1668 Args are same as in `final', except that INSN
1669 is the insn being scanned.
1670 Value returned is the next insn to be scanned.
1672 NOPEEPHOLES is the flag to disallow peephole processing (currently
1673 used for within delayed branch sequence output).
1675 SEEN is used to track the end of the prologue, for emitting
1676 debug information. We force the emission of a line note after
1677 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1678 at the beginning of the second basic block, whichever comes
1682 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1683 int nopeepholes ATTRIBUTE_UNUSED
, int *seen
)
1692 /* Ignore deleted insns. These can occur when we split insns (due to a
1693 template of "#") while not optimizing. */
1694 if (INSN_DELETED_P (insn
))
1695 return NEXT_INSN (insn
);
1697 switch (GET_CODE (insn
))
1700 switch (NOTE_LINE_NUMBER (insn
))
1702 case NOTE_INSN_DELETED
:
1703 case NOTE_INSN_LOOP_BEG
:
1704 case NOTE_INSN_LOOP_END
:
1705 case NOTE_INSN_FUNCTION_END
:
1706 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1707 case NOTE_INSN_EXPECTED_VALUE
:
1710 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
1712 /* The presence of this note indicates that this basic block
1713 belongs in the "cold" section of the .o file. If we are
1714 not already writing to the cold section we need to change
1717 if (last_text_section
== text_section
)
1719 (*debug_hooks
->switch_text_section
) ();
1720 switch_to_section (unlikely_text_section ());
1724 (*debug_hooks
->switch_text_section
) ();
1725 switch_to_section (text_section
);
1729 case NOTE_INSN_BASIC_BLOCK
:
1731 #ifdef TARGET_UNWIND_INFO
1732 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1736 fprintf (asm_out_file
, "\t%s basic block %d\n",
1737 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1739 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1741 *seen
|= SEEN_EMITTED
;
1742 force_source_line
= true;
1749 case NOTE_INSN_EH_REGION_BEG
:
1750 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1751 NOTE_EH_HANDLER (insn
));
1754 case NOTE_INSN_EH_REGION_END
:
1755 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1756 NOTE_EH_HANDLER (insn
));
1759 case NOTE_INSN_PROLOGUE_END
:
1760 targetm
.asm_out
.function_end_prologue (file
);
1761 profile_after_prologue (file
);
1763 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1765 *seen
|= SEEN_EMITTED
;
1766 force_source_line
= true;
1773 case NOTE_INSN_EPILOGUE_BEG
:
1774 targetm
.asm_out
.function_begin_epilogue (file
);
1777 case NOTE_INSN_FUNCTION_BEG
:
1779 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1781 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1783 *seen
|= SEEN_EMITTED
;
1784 force_source_line
= true;
1791 case NOTE_INSN_BLOCK_BEG
:
1792 if (debug_info_level
== DINFO_LEVEL_NORMAL
1793 || debug_info_level
== DINFO_LEVEL_VERBOSE
1794 || write_symbols
== DWARF2_DEBUG
1795 || write_symbols
== VMS_AND_DWARF2_DEBUG
1796 || write_symbols
== VMS_DEBUG
)
1798 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1802 high_block_linenum
= last_linenum
;
1804 /* Output debugging info about the symbol-block beginning. */
1805 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1807 /* Mark this block as output. */
1808 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1812 case NOTE_INSN_BLOCK_END
:
1813 if (debug_info_level
== DINFO_LEVEL_NORMAL
1814 || debug_info_level
== DINFO_LEVEL_VERBOSE
1815 || write_symbols
== DWARF2_DEBUG
1816 || write_symbols
== VMS_AND_DWARF2_DEBUG
1817 || write_symbols
== VMS_DEBUG
)
1819 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1823 /* End of a symbol-block. */
1825 gcc_assert (block_depth
>= 0);
1827 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1831 case NOTE_INSN_DELETED_LABEL
:
1832 /* Emit the label. We may have deleted the CODE_LABEL because
1833 the label could be proved to be unreachable, though still
1834 referenced (in the form of having its address taken. */
1835 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1838 case NOTE_INSN_VAR_LOCATION
:
1839 (*debug_hooks
->var_location
) (insn
);
1846 gcc_assert (NOTE_LINE_NUMBER (insn
) > 0);
1852 #if defined (DWARF2_UNWIND_INFO)
1853 if (dwarf2out_do_frame ())
1854 dwarf2out_frame_debug (insn
, false);
1859 /* The target port might emit labels in the output function for
1860 some insn, e.g. sh.c output_branchy_insn. */
1861 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1863 int align
= LABEL_TO_ALIGNMENT (insn
);
1864 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1865 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1868 if (align
&& NEXT_INSN (insn
))
1870 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1871 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1873 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1874 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1876 ASM_OUTPUT_ALIGN (file
, align
);
1883 /* If this label is reached from only one place, set the condition
1884 codes from the instruction just before the branch. */
1886 /* Disabled because some insns set cc_status in the C output code
1887 and NOTICE_UPDATE_CC alone can set incorrect status. */
1888 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1890 rtx jump
= LABEL_REFS (insn
);
1891 rtx barrier
= prev_nonnote_insn (insn
);
1893 /* If the LABEL_REFS field of this label has been set to point
1894 at a branch, the predecessor of the branch is a regular
1895 insn, and that branch is the only way to reach this label,
1896 set the condition codes based on the branch and its
1898 if (barrier
&& BARRIER_P (barrier
)
1899 && jump
&& JUMP_P (jump
)
1900 && (prev
= prev_nonnote_insn (jump
))
1901 && NONJUMP_INSN_P (prev
))
1903 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1904 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1909 if (LABEL_NAME (insn
))
1910 (*debug_hooks
->label
) (insn
);
1914 fputs (ASM_APP_OFF
, file
);
1918 next
= next_nonnote_insn (insn
);
1919 if (next
!= 0 && JUMP_P (next
))
1921 rtx nextbody
= PATTERN (next
);
1923 /* If this label is followed by a jump-table,
1924 make sure we put the label in the read-only section. Also
1925 possibly write the label and jump table together. */
1927 if (GET_CODE (nextbody
) == ADDR_VEC
1928 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1930 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1931 /* In this case, the case vector is being moved by the
1932 target, so don't output the label at all. Leave that
1933 to the back end macros. */
1935 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1939 switch_to_section (targetm
.asm_out
.function_rodata_section
1940 (current_function_decl
));
1942 #ifdef ADDR_VEC_ALIGN
1943 log_align
= ADDR_VEC_ALIGN (next
);
1945 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1947 ASM_OUTPUT_ALIGN (file
, log_align
);
1950 switch_to_section (current_function_section ());
1952 #ifdef ASM_OUTPUT_CASE_LABEL
1953 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1956 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1962 if (LABEL_ALT_ENTRY_P (insn
))
1963 output_alternate_entry_point (file
, insn
);
1965 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1970 rtx body
= PATTERN (insn
);
1971 int insn_code_number
;
1972 const char *template;
1974 /* An INSN, JUMP_INSN or CALL_INSN.
1975 First check for special kinds that recog doesn't recognize. */
1977 if (GET_CODE (body
) == USE
/* These are just declarations. */
1978 || GET_CODE (body
) == CLOBBER
)
1983 /* If there is a REG_CC_SETTER note on this insn, it means that
1984 the setting of the condition code was done in the delay slot
1985 of the insn that branched here. So recover the cc status
1986 from the insn that set it. */
1988 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
1991 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
1992 cc_prev_status
= cc_status
;
1997 /* Detect insns that are really jump-tables
1998 and output them as such. */
2000 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2002 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2006 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2007 switch_to_section (targetm
.asm_out
.function_rodata_section
2008 (current_function_decl
));
2010 switch_to_section (current_function_section ());
2014 fputs (ASM_APP_OFF
, file
);
2018 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2019 if (GET_CODE (body
) == ADDR_VEC
)
2021 #ifdef ASM_OUTPUT_ADDR_VEC
2022 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2029 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2030 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2036 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2037 for (idx
= 0; idx
< vlen
; idx
++)
2039 if (GET_CODE (body
) == ADDR_VEC
)
2041 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2042 ASM_OUTPUT_ADDR_VEC_ELT
2043 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2050 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2051 ASM_OUTPUT_ADDR_DIFF_ELT
2054 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2055 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2061 #ifdef ASM_OUTPUT_CASE_END
2062 ASM_OUTPUT_CASE_END (file
,
2063 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2068 switch_to_section (current_function_section ());
2072 /* Output this line note if it is the first or the last line
2074 if (notice_source_line (insn
))
2076 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2079 if (GET_CODE (body
) == ASM_INPUT
)
2081 const char *string
= XSTR (body
, 0);
2083 /* There's no telling what that did to the condition codes. */
2090 fputs (ASM_APP_ON
, file
);
2093 fprintf (asm_out_file
, "\t%s\n", string
);
2098 /* Detect `asm' construct with operands. */
2099 if (asm_noperands (body
) >= 0)
2101 unsigned int noperands
= asm_noperands (body
);
2102 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2105 /* There's no telling what that did to the condition codes. */
2108 /* Get out the operand values. */
2109 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2110 /* Inhibit dieing on what would otherwise be compiler bugs. */
2111 insn_noperands
= noperands
;
2112 this_is_asm_operands
= insn
;
2114 #ifdef FINAL_PRESCAN_INSN
2115 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2118 /* Output the insn using them. */
2123 fputs (ASM_APP_ON
, file
);
2126 output_asm_insn (string
, ops
);
2129 this_is_asm_operands
= 0;
2135 fputs (ASM_APP_OFF
, file
);
2139 if (GET_CODE (body
) == SEQUENCE
)
2141 /* A delayed-branch sequence */
2144 final_sequence
= body
;
2146 /* Record the delay slots' frame information before the branch.
2147 This is needed for delayed calls: see execute_cfa_program(). */
2148 #if defined (DWARF2_UNWIND_INFO)
2149 if (dwarf2out_do_frame ())
2150 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2151 dwarf2out_frame_debug (XVECEXP (body
, 0, i
), false);
2154 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2155 force the restoration of a comparison that was previously
2156 thought unnecessary. If that happens, cancel this sequence
2157 and cause that insn to be restored. */
2159 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, 1, seen
);
2160 if (next
!= XVECEXP (body
, 0, 1))
2166 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2168 rtx insn
= XVECEXP (body
, 0, i
);
2169 rtx next
= NEXT_INSN (insn
);
2170 /* We loop in case any instruction in a delay slot gets
2173 insn
= final_scan_insn (insn
, file
, 0, 1, seen
);
2174 while (insn
!= next
);
2176 #ifdef DBR_OUTPUT_SEQEND
2177 DBR_OUTPUT_SEQEND (file
);
2181 /* If the insn requiring the delay slot was a CALL_INSN, the
2182 insns in the delay slot are actually executed before the
2183 called function. Hence we don't preserve any CC-setting
2184 actions in these insns and the CC must be marked as being
2185 clobbered by the function. */
2186 if (CALL_P (XVECEXP (body
, 0, 0)))
2193 /* We have a real machine instruction as rtl. */
2195 body
= PATTERN (insn
);
2198 set
= single_set (insn
);
2200 /* Check for redundant test and compare instructions
2201 (when the condition codes are already set up as desired).
2202 This is done only when optimizing; if not optimizing,
2203 it should be possible for the user to alter a variable
2204 with the debugger in between statements
2205 and the next statement should reexamine the variable
2206 to compute the condition codes. */
2211 && GET_CODE (SET_DEST (set
)) == CC0
2212 && insn
!= last_ignored_compare
)
2214 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2215 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2216 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2218 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2219 XEXP (SET_SRC (set
), 0)
2220 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2221 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2222 XEXP (SET_SRC (set
), 1)
2223 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2225 if ((cc_status
.value1
!= 0
2226 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2227 || (cc_status
.value2
!= 0
2228 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2230 /* Don't delete insn if it has an addressing side-effect. */
2231 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2232 /* or if anything in it is volatile. */
2233 && ! volatile_refs_p (PATTERN (insn
)))
2235 /* We don't really delete the insn; just ignore it. */
2236 last_ignored_compare
= insn
;
2245 /* If this is a conditional branch, maybe modify it
2246 if the cc's are in a nonstandard state
2247 so that it accomplishes the same thing that it would
2248 do straightforwardly if the cc's were set up normally. */
2250 if (cc_status
.flags
!= 0
2252 && GET_CODE (body
) == SET
2253 && SET_DEST (body
) == pc_rtx
2254 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2255 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2256 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
)
2258 /* This function may alter the contents of its argument
2259 and clear some of the cc_status.flags bits.
2260 It may also return 1 meaning condition now always true
2261 or -1 meaning condition now always false
2262 or 2 meaning condition nontrivial but altered. */
2263 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2264 /* If condition now has fixed value, replace the IF_THEN_ELSE
2265 with its then-operand or its else-operand. */
2267 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2269 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2271 /* The jump is now either unconditional or a no-op.
2272 If it has become a no-op, don't try to output it.
2273 (It would not be recognized.) */
2274 if (SET_SRC (body
) == pc_rtx
)
2279 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2280 /* Replace (set (pc) (return)) with (return). */
2281 PATTERN (insn
) = body
= SET_SRC (body
);
2283 /* Rerecognize the instruction if it has changed. */
2285 INSN_CODE (insn
) = -1;
2288 /* Make same adjustments to instructions that examine the
2289 condition codes without jumping and instructions that
2290 handle conditional moves (if this machine has either one). */
2292 if (cc_status
.flags
!= 0
2295 rtx cond_rtx
, then_rtx
, else_rtx
;
2298 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2300 cond_rtx
= XEXP (SET_SRC (set
), 0);
2301 then_rtx
= XEXP (SET_SRC (set
), 1);
2302 else_rtx
= XEXP (SET_SRC (set
), 2);
2306 cond_rtx
= SET_SRC (set
);
2307 then_rtx
= const_true_rtx
;
2308 else_rtx
= const0_rtx
;
2311 switch (GET_CODE (cond_rtx
))
2325 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2327 result
= alter_cond (cond_rtx
);
2329 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2330 else if (result
== -1)
2331 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2332 else if (result
== 2)
2333 INSN_CODE (insn
) = -1;
2334 if (SET_DEST (set
) == SET_SRC (set
))
2346 #ifdef HAVE_peephole
2347 /* Do machine-specific peephole optimizations if desired. */
2349 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2351 rtx next
= peephole (insn
);
2352 /* When peepholing, if there were notes within the peephole,
2353 emit them before the peephole. */
2354 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2356 rtx note
, prev
= PREV_INSN (insn
);
2358 for (note
= NEXT_INSN (insn
); note
!= next
;
2359 note
= NEXT_INSN (note
))
2360 final_scan_insn (note
, file
, optimize
, nopeepholes
, seen
);
2362 /* Put the notes in the proper position for a later
2363 rescan. For example, the SH target can do this
2364 when generating a far jump in a delayed branch
2366 note
= NEXT_INSN (insn
);
2367 PREV_INSN (note
) = prev
;
2368 NEXT_INSN (prev
) = note
;
2369 NEXT_INSN (PREV_INSN (next
)) = insn
;
2370 PREV_INSN (insn
) = PREV_INSN (next
);
2371 NEXT_INSN (insn
) = next
;
2372 PREV_INSN (next
) = insn
;
2375 /* PEEPHOLE might have changed this. */
2376 body
= PATTERN (insn
);
2380 /* Try to recognize the instruction.
2381 If successful, verify that the operands satisfy the
2382 constraints for the instruction. Crash if they don't,
2383 since `reload' should have changed them so that they do. */
2385 insn_code_number
= recog_memoized (insn
);
2386 cleanup_subreg_operands (insn
);
2388 /* Dump the insn in the assembly for debugging. */
2389 if (flag_dump_rtl_in_asm
)
2391 print_rtx_head
= ASM_COMMENT_START
;
2392 print_rtl_single (asm_out_file
, insn
);
2393 print_rtx_head
= "";
2396 if (! constrain_operands_cached (1))
2397 fatal_insn_not_found (insn
);
2399 /* Some target machines need to prescan each insn before
2402 #ifdef FINAL_PRESCAN_INSN
2403 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2406 #ifdef HAVE_conditional_execution
2407 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2408 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2410 current_insn_predicate
= NULL_RTX
;
2414 cc_prev_status
= cc_status
;
2416 /* Update `cc_status' for this instruction.
2417 The instruction's output routine may change it further.
2418 If the output routine for a jump insn needs to depend
2419 on the cc status, it should look at cc_prev_status. */
2421 NOTICE_UPDATE_CC (body
, insn
);
2424 current_output_insn
= debug_insn
= insn
;
2426 #if defined (DWARF2_UNWIND_INFO)
2427 if (CALL_P (insn
) && dwarf2out_do_frame ())
2428 dwarf2out_frame_debug (insn
, false);
2431 /* Find the proper template for this insn. */
2432 template = get_insn_template (insn_code_number
, insn
);
2434 /* If the C code returns 0, it means that it is a jump insn
2435 which follows a deleted test insn, and that test insn
2436 needs to be reinserted. */
2441 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2443 /* We have already processed the notes between the setter and
2444 the user. Make sure we don't process them again, this is
2445 particularly important if one of the notes is a block
2446 scope note or an EH note. */
2448 prev
!= last_ignored_compare
;
2449 prev
= PREV_INSN (prev
))
2452 delete_insn (prev
); /* Use delete_note. */
2458 /* If the template is the string "#", it means that this insn must
2460 if (template[0] == '#' && template[1] == '\0')
2462 rtx
new = try_split (body
, insn
, 0);
2464 /* If we didn't split the insn, go away. */
2465 if (new == insn
&& PATTERN (new) == body
)
2466 fatal_insn ("could not split insn", insn
);
2468 #ifdef HAVE_ATTR_length
2469 /* This instruction should have been split in shorten_branches,
2470 to ensure that we would have valid length info for the
2478 #ifdef TARGET_UNWIND_INFO
2479 /* ??? This will put the directives in the wrong place if
2480 get_insn_template outputs assembly directly. However calling it
2481 before get_insn_template breaks if the insns is split. */
2482 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2485 /* Output assembler code from the template. */
2486 output_asm_insn (template, recog_data
.operand
);
2488 /* If necessary, report the effect that the instruction has on
2489 the unwind info. We've already done this for delay slots
2490 and call instructions. */
2491 #if defined (DWARF2_UNWIND_INFO)
2492 if (final_sequence
== 0
2493 #if !defined (HAVE_prologue)
2494 && !ACCUMULATE_OUTGOING_ARGS
2496 && dwarf2out_do_frame ())
2497 dwarf2out_frame_debug (insn
, true);
2500 current_output_insn
= debug_insn
= 0;
2503 return NEXT_INSN (insn
);
2506 /* Return whether a source line note needs to be emitted before INSN. */
2509 notice_source_line (rtx insn
)
2511 const char *filename
= insn_file (insn
);
2512 int linenum
= insn_line (insn
);
2515 && (force_source_line
2516 || filename
!= last_filename
2517 || last_linenum
!= linenum
))
2519 force_source_line
= false;
2520 last_filename
= filename
;
2521 last_linenum
= linenum
;
2522 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2523 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2529 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2530 directly to the desired hard register. */
2533 cleanup_subreg_operands (rtx insn
)
2536 extract_insn_cached (insn
);
2537 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2539 /* The following test cannot use recog_data.operand when testing
2540 for a SUBREG: the underlying object might have been changed
2541 already if we are inside a match_operator expression that
2542 matches the else clause. Instead we test the underlying
2543 expression directly. */
2544 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2545 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2546 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2547 || GET_CODE (recog_data
.operand
[i
]) == MULT
2548 || MEM_P (recog_data
.operand
[i
]))
2549 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2552 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2554 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2555 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2556 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2557 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2558 || MEM_P (*recog_data
.dup_loc
[i
]))
2559 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2563 /* If X is a SUBREG, replace it with a REG or a MEM,
2564 based on the thing it is a subreg of. */
2567 alter_subreg (rtx
*xp
)
2570 rtx y
= SUBREG_REG (x
);
2572 /* simplify_subreg does not remove subreg from volatile references.
2573 We are required to. */
2576 int offset
= SUBREG_BYTE (x
);
2578 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2579 contains 0 instead of the proper offset. See simplify_subreg. */
2581 && GET_MODE_SIZE (GET_MODE (y
)) < GET_MODE_SIZE (GET_MODE (x
)))
2583 int difference
= GET_MODE_SIZE (GET_MODE (y
))
2584 - GET_MODE_SIZE (GET_MODE (x
));
2585 if (WORDS_BIG_ENDIAN
)
2586 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
2587 if (BYTES_BIG_ENDIAN
)
2588 offset
+= difference
% UNITS_PER_WORD
;
2591 *xp
= adjust_address (y
, GET_MODE (x
), offset
);
2595 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2602 /* Simplify_subreg can't handle some REG cases, but we have to. */
2603 unsigned int regno
= subreg_regno (x
);
2604 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2611 /* Do alter_subreg on all the SUBREGs contained in X. */
2614 walk_alter_subreg (rtx
*xp
)
2617 switch (GET_CODE (x
))
2622 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2623 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2628 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2632 return alter_subreg (xp
);
2643 /* Given BODY, the body of a jump instruction, alter the jump condition
2644 as required by the bits that are set in cc_status.flags.
2645 Not all of the bits there can be handled at this level in all cases.
2647 The value is normally 0.
2648 1 means that the condition has become always true.
2649 -1 means that the condition has become always false.
2650 2 means that COND has been altered. */
2653 alter_cond (rtx cond
)
2657 if (cc_status
.flags
& CC_REVERSED
)
2660 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2663 if (cc_status
.flags
& CC_INVERTED
)
2666 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2669 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2670 switch (GET_CODE (cond
))
2675 /* Jump becomes unconditional. */
2681 /* Jump becomes no-op. */
2685 PUT_CODE (cond
, EQ
);
2690 PUT_CODE (cond
, NE
);
2698 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2699 switch (GET_CODE (cond
))
2703 /* Jump becomes unconditional. */
2708 /* Jump becomes no-op. */
2713 PUT_CODE (cond
, EQ
);
2719 PUT_CODE (cond
, NE
);
2727 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2728 switch (GET_CODE (cond
))
2731 /* Jump becomes unconditional. */
2735 PUT_CODE (cond
, EQ
);
2740 PUT_CODE (cond
, NE
);
2745 /* Jump becomes no-op. */
2752 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2753 switch (GET_CODE (cond
))
2759 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2764 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2769 if (cc_status
.flags
& CC_NOT_SIGNED
)
2770 /* The flags are valid if signed condition operators are converted
2772 switch (GET_CODE (cond
))
2775 PUT_CODE (cond
, LEU
);
2780 PUT_CODE (cond
, LTU
);
2785 PUT_CODE (cond
, GTU
);
2790 PUT_CODE (cond
, GEU
);
2802 /* Report inconsistency between the assembler template and the operands.
2803 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2806 output_operand_lossage (const char *cmsgid
, ...)
2810 const char *pfx_str
;
2813 va_start (ap
, cmsgid
);
2815 pfx_str
= this_is_asm_operands
? _("invalid 'asm': ") : "output_operand: ";
2816 asprintf (&fmt_string
, "%s%s", pfx_str
, _(cmsgid
));
2817 vasprintf (&new_message
, fmt_string
, ap
);
2819 if (this_is_asm_operands
)
2820 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2822 internal_error ("%s", new_message
);
2829 /* Output of assembler code from a template, and its subroutines. */
2831 /* Annotate the assembly with a comment describing the pattern and
2832 alternative used. */
2835 output_asm_name (void)
2839 int num
= INSN_CODE (debug_insn
);
2840 fprintf (asm_out_file
, "\t%s %d\t%s",
2841 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2842 insn_data
[num
].name
);
2843 if (insn_data
[num
].n_alternatives
> 1)
2844 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2845 #ifdef HAVE_ATTR_length
2846 fprintf (asm_out_file
, "\t[length = %d]",
2847 get_attr_length (debug_insn
));
2849 /* Clear this so only the first assembler insn
2850 of any rtl insn will get the special comment for -dp. */
2855 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2856 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2857 corresponds to the address of the object and 0 if to the object. */
2860 get_mem_expr_from_op (rtx op
, int *paddressp
)
2868 return REG_EXPR (op
);
2869 else if (!MEM_P (op
))
2872 if (MEM_EXPR (op
) != 0)
2873 return MEM_EXPR (op
);
2875 /* Otherwise we have an address, so indicate it and look at the address. */
2879 /* First check if we have a decl for the address, then look at the right side
2880 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2881 But don't allow the address to itself be indirect. */
2882 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2884 else if (GET_CODE (op
) == PLUS
2885 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2888 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
2889 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
2892 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2893 return inner_addressp
? 0 : expr
;
2896 /* Output operand names for assembler instructions. OPERANDS is the
2897 operand vector, OPORDER is the order to write the operands, and NOPS
2898 is the number of operands to write. */
2901 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
2906 for (i
= 0; i
< nops
; i
++)
2909 rtx op
= operands
[oporder
[i
]];
2910 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2912 fprintf (asm_out_file
, "%c%s",
2913 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2917 fprintf (asm_out_file
, "%s",
2918 addressp
? "*" : "");
2919 print_mem_expr (asm_out_file
, expr
);
2922 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2923 && ORIGINAL_REGNO (op
) != REGNO (op
))
2924 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2928 /* Output text from TEMPLATE to the assembler output file,
2929 obeying %-directions to substitute operands taken from
2930 the vector OPERANDS.
2932 %N (for N a digit) means print operand N in usual manner.
2933 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2934 and print the label name with no punctuation.
2935 %cN means require operand N to be a constant
2936 and print the constant expression with no punctuation.
2937 %aN means expect operand N to be a memory address
2938 (not a memory reference!) and print a reference
2940 %nN means expect operand N to be a constant
2941 and print a constant expression for minus the value
2942 of the operand, with no other punctuation. */
2945 output_asm_insn (const char *template, rtx
*operands
)
2949 #ifdef ASSEMBLER_DIALECT
2952 int oporder
[MAX_RECOG_OPERANDS
];
2953 char opoutput
[MAX_RECOG_OPERANDS
];
2956 /* An insn may return a null string template
2957 in a case where no assembler code is needed. */
2961 memset (opoutput
, 0, sizeof opoutput
);
2963 putc ('\t', asm_out_file
);
2965 #ifdef ASM_OUTPUT_OPCODE
2966 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2973 if (flag_verbose_asm
)
2974 output_asm_operand_names (operands
, oporder
, ops
);
2975 if (flag_print_asm_name
)
2979 memset (opoutput
, 0, sizeof opoutput
);
2981 putc (c
, asm_out_file
);
2982 #ifdef ASM_OUTPUT_OPCODE
2983 while ((c
= *p
) == '\t')
2985 putc (c
, asm_out_file
);
2988 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
2992 #ifdef ASSEMBLER_DIALECT
2998 output_operand_lossage ("nested assembly dialect alternatives");
3002 /* If we want the first dialect, do nothing. Otherwise, skip
3003 DIALECT_NUMBER of strings ending with '|'. */
3004 for (i
= 0; i
< dialect_number
; i
++)
3006 while (*p
&& *p
!= '}' && *p
++ != '|')
3015 output_operand_lossage ("unterminated assembly dialect alternative");
3022 /* Skip to close brace. */
3027 output_operand_lossage ("unterminated assembly dialect alternative");
3031 while (*p
++ != '}');
3035 putc (c
, asm_out_file
);
3040 putc (c
, asm_out_file
);
3046 /* %% outputs a single %. */
3050 putc (c
, asm_out_file
);
3052 /* %= outputs a number which is unique to each insn in the entire
3053 compilation. This is useful for making local labels that are
3054 referred to more than once in a given insn. */
3058 fprintf (asm_out_file
, "%d", insn_counter
);
3060 /* % followed by a letter and some digits
3061 outputs an operand in a special way depending on the letter.
3062 Letters `acln' are implemented directly.
3063 Other letters are passed to `output_operand' so that
3064 the PRINT_OPERAND macro can define them. */
3065 else if (ISALPHA (*p
))
3068 unsigned long opnum
;
3071 opnum
= strtoul (p
, &endptr
, 10);
3074 output_operand_lossage ("operand number missing "
3076 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3077 output_operand_lossage ("operand number out of range");
3078 else if (letter
== 'l')
3079 output_asm_label (operands
[opnum
]);
3080 else if (letter
== 'a')
3081 output_address (operands
[opnum
]);
3082 else if (letter
== 'c')
3084 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3085 output_addr_const (asm_out_file
, operands
[opnum
]);
3087 output_operand (operands
[opnum
], 'c');
3089 else if (letter
== 'n')
3091 if (GET_CODE (operands
[opnum
]) == CONST_INT
)
3092 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3093 - INTVAL (operands
[opnum
]));
3096 putc ('-', asm_out_file
);
3097 output_addr_const (asm_out_file
, operands
[opnum
]);
3101 output_operand (operands
[opnum
], letter
);
3103 if (!opoutput
[opnum
])
3104 oporder
[ops
++] = opnum
;
3105 opoutput
[opnum
] = 1;
3110 /* % followed by a digit outputs an operand the default way. */
3111 else if (ISDIGIT (*p
))
3113 unsigned long opnum
;
3116 opnum
= strtoul (p
, &endptr
, 10);
3117 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3118 output_operand_lossage ("operand number out of range");
3120 output_operand (operands
[opnum
], 0);
3122 if (!opoutput
[opnum
])
3123 oporder
[ops
++] = opnum
;
3124 opoutput
[opnum
] = 1;
3129 /* % followed by punctuation: output something for that
3130 punctuation character alone, with no operand.
3131 The PRINT_OPERAND macro decides what is actually done. */
3132 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3133 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3134 output_operand (NULL_RTX
, *p
++);
3137 output_operand_lossage ("invalid %%-code");
3141 putc (c
, asm_out_file
);
3144 /* Write out the variable names for operands, if we know them. */
3145 if (flag_verbose_asm
)
3146 output_asm_operand_names (operands
, oporder
, ops
);
3147 if (flag_print_asm_name
)
3150 putc ('\n', asm_out_file
);
3153 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3156 output_asm_label (rtx x
)
3160 if (GET_CODE (x
) == LABEL_REF
)
3164 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3165 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3167 output_operand_lossage ("'%%l' operand isn't a label");
3169 assemble_name (asm_out_file
, buf
);
3172 /* Print operand X using machine-dependent assembler syntax.
3173 The macro PRINT_OPERAND is defined just to control this function.
3174 CODE is a non-digit that preceded the operand-number in the % spec,
3175 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3176 between the % and the digits.
3177 When CODE is a non-letter, X is 0.
3179 The meanings of the letters are machine-dependent and controlled
3180 by PRINT_OPERAND. */
3183 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3185 if (x
&& GET_CODE (x
) == SUBREG
)
3186 x
= alter_subreg (&x
);
3188 /* X must not be a pseudo reg. */
3189 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3191 PRINT_OPERAND (asm_out_file
, x
, code
);
3194 /* Print a memory reference operand for address X
3195 using machine-dependent assembler syntax.
3196 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3199 output_address (rtx x
)
3201 walk_alter_subreg (&x
);
3202 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3205 /* Print an integer constant expression in assembler syntax.
3206 Addition and subtraction are the only arithmetic
3207 that may appear in these expressions. */
3210 output_addr_const (FILE *file
, rtx x
)
3215 switch (GET_CODE (x
))
3222 if (SYMBOL_REF_DECL (x
))
3223 mark_decl_referenced (SYMBOL_REF_DECL (x
));
3224 #ifdef ASM_OUTPUT_SYMBOL_REF
3225 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3227 assemble_name (file
, XSTR (x
, 0));
3235 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3236 #ifdef ASM_OUTPUT_LABEL_REF
3237 ASM_OUTPUT_LABEL_REF (file
, buf
);
3239 assemble_name (file
, buf
);
3244 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3248 /* This used to output parentheses around the expression,
3249 but that does not work on the 386 (either ATT or BSD assembler). */
3250 output_addr_const (file
, XEXP (x
, 0));
3254 if (GET_MODE (x
) == VOIDmode
)
3256 /* We can use %d if the number is one word and positive. */
3257 if (CONST_DOUBLE_HIGH (x
))
3258 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3259 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3260 else if (CONST_DOUBLE_LOW (x
) < 0)
3261 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3263 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3266 /* We can't handle floating point constants;
3267 PRINT_OPERAND must handle them. */
3268 output_operand_lossage ("floating constant misused");
3272 /* Some assemblers need integer constants to appear last (eg masm). */
3273 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3275 output_addr_const (file
, XEXP (x
, 1));
3276 if (INTVAL (XEXP (x
, 0)) >= 0)
3277 fprintf (file
, "+");
3278 output_addr_const (file
, XEXP (x
, 0));
3282 output_addr_const (file
, XEXP (x
, 0));
3283 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3284 || INTVAL (XEXP (x
, 1)) >= 0)
3285 fprintf (file
, "+");
3286 output_addr_const (file
, XEXP (x
, 1));
3291 /* Avoid outputting things like x-x or x+5-x,
3292 since some assemblers can't handle that. */
3293 x
= simplify_subtraction (x
);
3294 if (GET_CODE (x
) != MINUS
)
3297 output_addr_const (file
, XEXP (x
, 0));
3298 fprintf (file
, "-");
3299 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3300 || GET_CODE (XEXP (x
, 1)) == PC
3301 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3302 output_addr_const (file
, XEXP (x
, 1));
3305 fputs (targetm
.asm_out
.open_paren
, file
);
3306 output_addr_const (file
, XEXP (x
, 1));
3307 fputs (targetm
.asm_out
.close_paren
, file
);
3314 output_addr_const (file
, XEXP (x
, 0));
3318 #ifdef OUTPUT_ADDR_CONST_EXTRA
3319 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3324 output_operand_lossage ("invalid expression as operand");
3328 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3329 %R prints the value of REGISTER_PREFIX.
3330 %L prints the value of LOCAL_LABEL_PREFIX.
3331 %U prints the value of USER_LABEL_PREFIX.
3332 %I prints the value of IMMEDIATE_PREFIX.
3333 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3334 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3336 We handle alternate assembler dialects here, just like output_asm_insn. */
3339 asm_fprintf (FILE *file
, const char *p
, ...)
3345 va_start (argptr
, p
);
3352 #ifdef ASSEMBLER_DIALECT
3357 /* If we want the first dialect, do nothing. Otherwise, skip
3358 DIALECT_NUMBER of strings ending with '|'. */
3359 for (i
= 0; i
< dialect_number
; i
++)
3361 while (*p
&& *p
++ != '|')
3371 /* Skip to close brace. */
3372 while (*p
&& *p
++ != '}')
3383 while (strchr ("-+ #0", c
))
3388 while (ISDIGIT (c
) || c
== '.')
3399 case 'd': case 'i': case 'u':
3400 case 'x': case 'X': case 'o':
3404 fprintf (file
, buf
, va_arg (argptr
, int));
3408 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3409 'o' cases, but we do not check for those cases. It
3410 means that the value is a HOST_WIDE_INT, which may be
3411 either `long' or `long long'. */
3412 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3413 q
+= strlen (HOST_WIDE_INT_PRINT
);
3416 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3421 #ifdef HAVE_LONG_LONG
3427 fprintf (file
, buf
, va_arg (argptr
, long long));
3434 fprintf (file
, buf
, va_arg (argptr
, long));
3442 fprintf (file
, buf
, va_arg (argptr
, char *));
3446 #ifdef ASM_OUTPUT_OPCODE
3447 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3452 #ifdef REGISTER_PREFIX
3453 fprintf (file
, "%s", REGISTER_PREFIX
);
3458 #ifdef IMMEDIATE_PREFIX
3459 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3464 #ifdef LOCAL_LABEL_PREFIX
3465 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3470 fputs (user_label_prefix
, file
);
3473 #ifdef ASM_FPRINTF_EXTENSIONS
3474 /* Uppercase letters are reserved for general use by asm_fprintf
3475 and so are not available to target specific code. In order to
3476 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3477 they are defined here. As they get turned into real extensions
3478 to asm_fprintf they should be removed from this list. */
3479 case 'A': case 'B': case 'C': case 'D': case 'E':
3480 case 'F': case 'G': case 'H': case 'J': case 'K':
3481 case 'M': case 'N': case 'P': case 'Q': case 'S':
3482 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3485 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3498 /* Split up a CONST_DOUBLE or integer constant rtx
3499 into two rtx's for single words,
3500 storing in *FIRST the word that comes first in memory in the target
3501 and in *SECOND the other. */
3504 split_double (rtx value
, rtx
*first
, rtx
*second
)
3506 if (GET_CODE (value
) == CONST_INT
)
3508 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3510 /* In this case the CONST_INT holds both target words.
3511 Extract the bits from it into two word-sized pieces.
3512 Sign extend each half to HOST_WIDE_INT. */
3513 unsigned HOST_WIDE_INT low
, high
;
3514 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3516 /* Set sign_bit to the most significant bit of a word. */
3518 sign_bit
<<= BITS_PER_WORD
- 1;
3520 /* Set mask so that all bits of the word are set. We could
3521 have used 1 << BITS_PER_WORD instead of basing the
3522 calculation on sign_bit. However, on machines where
3523 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3524 compiler warning, even though the code would never be
3526 mask
= sign_bit
<< 1;
3529 /* Set sign_extend as any remaining bits. */
3530 sign_extend
= ~mask
;
3532 /* Pick the lower word and sign-extend it. */
3533 low
= INTVAL (value
);
3538 /* Pick the higher word, shifted to the least significant
3539 bits, and sign-extend it. */
3540 high
= INTVAL (value
);
3541 high
>>= BITS_PER_WORD
- 1;
3544 if (high
& sign_bit
)
3545 high
|= sign_extend
;
3547 /* Store the words in the target machine order. */
3548 if (WORDS_BIG_ENDIAN
)
3550 *first
= GEN_INT (high
);
3551 *second
= GEN_INT (low
);
3555 *first
= GEN_INT (low
);
3556 *second
= GEN_INT (high
);
3561 /* The rule for using CONST_INT for a wider mode
3562 is that we regard the value as signed.
3563 So sign-extend it. */
3564 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3565 if (WORDS_BIG_ENDIAN
)
3577 else if (GET_CODE (value
) != CONST_DOUBLE
)
3579 if (WORDS_BIG_ENDIAN
)
3581 *first
= const0_rtx
;
3587 *second
= const0_rtx
;
3590 else if (GET_MODE (value
) == VOIDmode
3591 /* This is the old way we did CONST_DOUBLE integers. */
3592 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3594 /* In an integer, the words are defined as most and least significant.
3595 So order them by the target's convention. */
3596 if (WORDS_BIG_ENDIAN
)
3598 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3599 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3603 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3604 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3611 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3613 /* Note, this converts the REAL_VALUE_TYPE to the target's
3614 format, splits up the floating point double and outputs
3615 exactly 32 bits of it into each of l[0] and l[1] --
3616 not necessarily BITS_PER_WORD bits. */
3617 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3619 /* If 32 bits is an entire word for the target, but not for the host,
3620 then sign-extend on the host so that the number will look the same
3621 way on the host that it would on the target. See for instance
3622 simplify_unary_operation. The #if is needed to avoid compiler
3625 #if HOST_BITS_PER_LONG > 32
3626 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3628 if (l
[0] & ((long) 1 << 31))
3629 l
[0] |= ((long) (-1) << 32);
3630 if (l
[1] & ((long) 1 << 31))
3631 l
[1] |= ((long) (-1) << 32);
3635 *first
= GEN_INT (l
[0]);
3636 *second
= GEN_INT (l
[1]);
3640 /* Return nonzero if this function has no function calls. */
3643 leaf_function_p (void)
3648 if (current_function_profile
|| profile_arc_flag
)
3651 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3654 && ! SIBLING_CALL_P (insn
))
3656 if (NONJUMP_INSN_P (insn
)
3657 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3658 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3659 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3662 for (link
= current_function_epilogue_delay_list
;
3664 link
= XEXP (link
, 1))
3666 insn
= XEXP (link
, 0);
3669 && ! SIBLING_CALL_P (insn
))
3671 if (NONJUMP_INSN_P (insn
)
3672 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3673 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3674 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3681 /* Return 1 if branch is a forward branch.
3682 Uses insn_shuid array, so it works only in the final pass. May be used by
3683 output templates to customary add branch prediction hints.
3686 final_forward_branch_p (rtx insn
)
3688 int insn_id
, label_id
;
3690 gcc_assert (uid_shuid
);
3691 insn_id
= INSN_SHUID (insn
);
3692 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3693 /* We've hit some insns that does not have id information available. */
3694 gcc_assert (insn_id
&& label_id
);
3695 return insn_id
< label_id
;
3698 /* On some machines, a function with no call insns
3699 can run faster if it doesn't create its own register window.
3700 When output, the leaf function should use only the "output"
3701 registers. Ordinarily, the function would be compiled to use
3702 the "input" registers to find its arguments; it is a candidate
3703 for leaf treatment if it uses only the "input" registers.
3704 Leaf function treatment means renumbering so the function
3705 uses the "output" registers instead. */
3707 #ifdef LEAF_REGISTERS
3709 /* Return 1 if this function uses only the registers that can be
3710 safely renumbered. */
3713 only_leaf_regs_used (void)
3716 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3718 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3719 if ((regs_ever_live
[i
] || global_regs
[i
])
3720 && ! permitted_reg_in_leaf_functions
[i
])
3723 if (current_function_uses_pic_offset_table
3724 && pic_offset_table_rtx
!= 0
3725 && REG_P (pic_offset_table_rtx
)
3726 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3732 /* Scan all instructions and renumber all registers into those
3733 available in leaf functions. */
3736 leaf_renumber_regs (rtx first
)
3740 /* Renumber only the actual patterns.
3741 The reg-notes can contain frame pointer refs,
3742 and renumbering them could crash, and should not be needed. */
3743 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3745 leaf_renumber_regs_insn (PATTERN (insn
));
3746 for (insn
= current_function_epilogue_delay_list
;
3748 insn
= XEXP (insn
, 1))
3749 if (INSN_P (XEXP (insn
, 0)))
3750 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3753 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3754 available in leaf functions. */
3757 leaf_renumber_regs_insn (rtx in_rtx
)
3760 const char *format_ptr
;
3765 /* Renumber all input-registers into output-registers.
3766 renumbered_regs would be 1 for an output-register;
3773 /* Don't renumber the same reg twice. */
3777 newreg
= REGNO (in_rtx
);
3778 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3779 to reach here as part of a REG_NOTE. */
3780 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3785 newreg
= LEAF_REG_REMAP (newreg
);
3786 gcc_assert (newreg
>= 0);
3787 regs_ever_live
[REGNO (in_rtx
)] = 0;
3788 regs_ever_live
[newreg
] = 1;
3789 REGNO (in_rtx
) = newreg
;
3793 if (INSN_P (in_rtx
))
3795 /* Inside a SEQUENCE, we find insns.
3796 Renumber just the patterns of these insns,
3797 just as we do for the top-level insns. */
3798 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3802 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3804 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3805 switch (*format_ptr
++)
3808 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3812 if (NULL
!= XVEC (in_rtx
, i
))
3814 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3815 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3835 /* When -gused is used, emit debug info for only used symbols. But in
3836 addition to the standard intercepted debug_hooks there are some direct
3837 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3838 Those routines may also be called from a higher level intercepted routine. So
3839 to prevent recording data for an inner call to one of these for an intercept,
3840 we maintain an intercept nesting counter (debug_nesting). We only save the
3841 intercepted arguments if the nesting is 1. */
3842 int debug_nesting
= 0;
3844 static tree
*symbol_queue
;
3845 int symbol_queue_index
= 0;
3846 static int symbol_queue_size
= 0;
3848 /* Generate the symbols for any queued up type symbols we encountered
3849 while generating the type info for some originally used symbol.
3850 This might generate additional entries in the queue. Only when
3851 the nesting depth goes to 0 is this routine called. */
3854 debug_flush_symbol_queue (void)
3858 /* Make sure that additionally queued items are not flushed
3863 for (i
= 0; i
< symbol_queue_index
; ++i
)
3865 /* If we pushed queued symbols then such symbols are must be
3866 output no matter what anyone else says. Specifically,
3867 we need to make sure dbxout_symbol() thinks the symbol was
3868 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3869 which may be set for outside reasons. */
3870 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3871 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3872 TREE_USED (symbol_queue
[i
]) = 1;
3873 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3875 #ifdef DBX_DEBUGGING_INFO
3876 dbxout_symbol (symbol_queue
[i
], 0);
3879 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3880 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3883 symbol_queue_index
= 0;
3887 /* Queue a type symbol needed as part of the definition of a decl
3888 symbol. These symbols are generated when debug_flush_symbol_queue()
3892 debug_queue_symbol (tree decl
)
3894 if (symbol_queue_index
>= symbol_queue_size
)
3896 symbol_queue_size
+= 10;
3897 symbol_queue
= xrealloc (symbol_queue
,
3898 symbol_queue_size
* sizeof (tree
));
3901 symbol_queue
[symbol_queue_index
++] = decl
;
3904 /* Free symbol queue. */
3906 debug_free_queue (void)
3910 free (symbol_queue
);
3911 symbol_queue
= NULL
;
3912 symbol_queue_size
= 0;
3916 /* Turn the RTL into assembly. */
3918 rest_of_handle_final (void)
3923 /* Get the function's name, as described by its RTL. This may be
3924 different from the DECL_NAME name used in the source file. */
3926 x
= DECL_RTL (current_function_decl
);
3927 gcc_assert (MEM_P (x
));
3929 gcc_assert (GET_CODE (x
) == SYMBOL_REF
);
3930 fnname
= XSTR (x
, 0);
3932 assemble_start_function (current_function_decl
, fnname
);
3933 final_start_function (get_insns (), asm_out_file
, optimize
);
3934 final (get_insns (), asm_out_file
, optimize
);
3935 final_end_function ();
3937 #ifdef TARGET_UNWIND_INFO
3938 /* ??? The IA-64 ".handlerdata" directive must be issued before
3939 the ".endp" directive that closes the procedure descriptor. */
3940 output_function_exception_table ();
3943 assemble_end_function (current_function_decl
, fnname
);
3945 #ifndef TARGET_UNWIND_INFO
3946 /* Otherwise, it feels unclean to switch sections in the middle. */
3947 output_function_exception_table ();
3950 user_defined_section_attribute
= false;
3953 fflush (asm_out_file
);
3955 /* Release all memory allocated by flow. */
3956 free_basic_block_vars ();
3958 /* Write DBX symbols if requested. */
3960 /* Note that for those inline functions where we don't initially
3961 know for certain that we will be generating an out-of-line copy,
3962 the first invocation of this routine (rest_of_compilation) will
3963 skip over this code by doing a `goto exit_rest_of_compilation;'.
3964 Later on, wrapup_global_declarations will (indirectly) call
3965 rest_of_compilation again for those inline functions that need
3966 to have out-of-line copies generated. During that call, we
3967 *will* be routed past here. */
3969 timevar_push (TV_SYMOUT
);
3970 (*debug_hooks
->function_decl
) (current_function_decl
);
3971 timevar_pop (TV_SYMOUT
);
3974 struct tree_opt_pass pass_final
=
3978 rest_of_handle_final
, /* execute */
3981 0, /* static_pass_number */
3982 TV_FINAL
, /* tv_id */
3983 0, /* properties_required */
3984 0, /* properties_provided */
3985 0, /* properties_destroyed */
3986 0, /* todo_flags_start */
3987 TODO_ggc_collect
, /* todo_flags_finish */
3993 rest_of_handle_shorten_branches (void)
3995 /* Shorten branches. */
3996 shorten_branches (get_insns ());
3999 struct tree_opt_pass pass_shorten_branches
=
4001 "shorten", /* name */
4003 rest_of_handle_shorten_branches
, /* execute */
4006 0, /* static_pass_number */
4007 TV_FINAL
, /* tv_id */
4008 0, /* properties_required */
4009 0, /* properties_provided */
4010 0, /* properties_destroyed */
4011 0, /* todo_flags_start */
4012 TODO_dump_func
, /* todo_flags_finish */
4018 rest_of_clean_state (void)
4022 /* It is very important to decompose the RTL instruction chain here:
4023 debug information keeps pointing into CODE_LABEL insns inside the function
4024 body. If these remain pointing to the other insns, we end up preserving
4025 whole RTL chain and attached detailed debug info in memory. */
4026 for (insn
= get_insns (); insn
; insn
= next
)
4028 next
= NEXT_INSN (insn
);
4029 NEXT_INSN (insn
) = NULL
;
4030 PREV_INSN (insn
) = NULL
;
4033 /* In case the function was not output,
4034 don't leave any temporary anonymous types
4035 queued up for sdb output. */
4036 #ifdef SDB_DEBUGGING_INFO
4037 if (write_symbols
== SDB_DEBUG
)
4038 sdbout_types (NULL_TREE
);
4041 reload_completed
= 0;
4042 epilogue_completed
= 0;
4043 flow2_completed
= 0;
4046 /* Clear out the insn_length contents now that they are no
4048 init_insn_lengths ();
4050 /* Show no temporary slots allocated. */
4053 free_basic_block_vars ();
4054 free_bb_for_insn ();
4057 if (targetm
.binds_local_p (current_function_decl
))
4059 int pref
= cfun
->preferred_stack_boundary
;
4060 if (cfun
->stack_alignment_needed
> cfun
->preferred_stack_boundary
)
4061 pref
= cfun
->stack_alignment_needed
;
4062 cgraph_rtl_info (current_function_decl
)->preferred_incoming_stack_boundary
4066 /* Make sure volatile mem refs aren't considered valid operands for
4067 arithmetic insns. We must call this here if this is a nested inline
4068 function, since the above code leaves us in the init_recog state,
4069 and the function context push/pop code does not save/restore volatile_ok.
4071 ??? Maybe it isn't necessary for expand_start_function to call this
4072 anymore if we do it here? */
4074 init_recog_no_volatile ();
4076 /* We're done with this function. Free up memory if we can. */
4077 free_after_parsing (cfun
);
4078 free_after_compilation (cfun
);
4081 struct tree_opt_pass pass_clean_state
=
4085 rest_of_clean_state
, /* execute */
4088 0, /* static_pass_number */
4089 TV_FINAL
, /* tv_id */
4090 0, /* properties_required */
4091 0, /* properties_provided */
4092 PROP_rtl
, /* properties_destroyed */
4093 0, /* todo_flags_start */
4094 0, /* todo_flags_finish */