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1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #include "system.h"
47 #include "coretypes.h"
48 #include "backend.h"
49 #include "cfghooks.h"
50 #include "tree.h"
51 #include "rtl.h"
52 #include "df.h"
53 #include "alias.h"
54 #include "varasm.h"
55 #include "tm_p.h"
56 #include "regs.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "output.h"
63 #include "except.h"
64 #include "rtl-error.h"
65 #include "toplev.h" /* exact_log2, floor_log2 */
66 #include "reload.h"
67 #include "intl.h"
68 #include "cfgrtl.h"
69 #include "target.h"
70 #include "targhooks.h"
71 #include "debug.h"
72 #include "expmed.h"
73 #include "dojump.h"
74 #include "explow.h"
75 #include "calls.h"
76 #include "emit-rtl.h"
77 #include "stmt.h"
78 #include "expr.h"
79 #include "tree-pass.h"
80 #include "cgraph.h"
81 #include "tree-ssa.h"
82 #include "coverage.h"
83 #include "cfgloop.h"
84 #include "params.h"
85 #include "tree-pretty-print.h" /* for dump_function_header */
86 #include "asan.h"
87 #include "wide-int-print.h"
88 #include "rtl-iter.h"
89 #include "print-rtl.h"
90
91 #ifdef XCOFF_DEBUGGING_INFO
92 #include "xcoffout.h" /* Needed for external data
93 declarations for e.g. AIX 4.x. */
94 #endif
95
96 #include "dwarf2out.h"
97
98 #ifdef DBX_DEBUGGING_INFO
99 #include "dbxout.h"
100 #endif
101
102 #ifdef SDB_DEBUGGING_INFO
103 #include "sdbout.h"
104 #endif
105
106 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
107 So define a null default for it to save conditionalization later. */
108 #ifndef CC_STATUS_INIT
109 #define CC_STATUS_INIT
110 #endif
111
112 /* Is the given character a logical line separator for the assembler? */
113 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
114 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
115 #endif
116
117 #ifndef JUMP_TABLES_IN_TEXT_SECTION
118 #define JUMP_TABLES_IN_TEXT_SECTION 0
119 #endif
120
121 /* Bitflags used by final_scan_insn. */
122 #define SEEN_NOTE 1
123 #define SEEN_EMITTED 2
124
125 /* Last insn processed by final_scan_insn. */
126 static rtx_insn *debug_insn;
127 rtx_insn *current_output_insn;
128
129 /* Line number of last NOTE. */
130 static int last_linenum;
131
132 /* Last discriminator written to assembly. */
133 static int last_discriminator;
134
135 /* Discriminator of current block. */
136 static int discriminator;
137
138 /* Highest line number in current block. */
139 static int high_block_linenum;
140
141 /* Likewise for function. */
142 static int high_function_linenum;
143
144 /* Filename of last NOTE. */
145 static const char *last_filename;
146
147 /* Override filename and line number. */
148 static const char *override_filename;
149 static int override_linenum;
150
151 /* Whether to force emission of a line note before the next insn. */
152 static bool force_source_line = false;
153
154 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
155
156 /* Nonzero while outputting an `asm' with operands.
157 This means that inconsistencies are the user's fault, so don't die.
158 The precise value is the insn being output, to pass to error_for_asm. */
159 const rtx_insn *this_is_asm_operands;
160
161 /* Number of operands of this insn, for an `asm' with operands. */
162 static unsigned int insn_noperands;
163
164 /* Compare optimization flag. */
165
166 static rtx last_ignored_compare = 0;
167
168 /* Assign a unique number to each insn that is output.
169 This can be used to generate unique local labels. */
170
171 static int insn_counter = 0;
172
173 /* This variable contains machine-dependent flags (defined in tm.h)
174 set and examined by output routines
175 that describe how to interpret the condition codes properly. */
176
177 CC_STATUS cc_status;
178
179 /* During output of an insn, this contains a copy of cc_status
180 from before the insn. */
181
182 CC_STATUS cc_prev_status;
183
184 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
185
186 static int block_depth;
187
188 /* Nonzero if have enabled APP processing of our assembler output. */
189
190 static int app_on;
191
192 /* If we are outputting an insn sequence, this contains the sequence rtx.
193 Zero otherwise. */
194
195 rtx_sequence *final_sequence;
196
197 #ifdef ASSEMBLER_DIALECT
198
199 /* Number of the assembler dialect to use, starting at 0. */
200 static int dialect_number;
201 #endif
202
203 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
204 rtx current_insn_predicate;
205
206 /* True if printing into -fdump-final-insns= dump. */
207 bool final_insns_dump_p;
208
209 /* True if profile_function should be called, but hasn't been called yet. */
210 static bool need_profile_function;
211
212 static int asm_insn_count (rtx);
213 static void profile_function (FILE *);
214 static void profile_after_prologue (FILE *);
215 static bool notice_source_line (rtx_insn *, bool *);
216 static rtx walk_alter_subreg (rtx *, bool *);
217 static void output_asm_name (void);
218 static void output_alternate_entry_point (FILE *, rtx_insn *);
219 static tree get_mem_expr_from_op (rtx, int *);
220 static void output_asm_operand_names (rtx *, int *, int);
221 #ifdef LEAF_REGISTERS
222 static void leaf_renumber_regs (rtx_insn *);
223 #endif
224 #if HAVE_cc0
225 static int alter_cond (rtx);
226 #endif
227 #ifndef ADDR_VEC_ALIGN
228 static int final_addr_vec_align (rtx);
229 #endif
230 static int align_fuzz (rtx, rtx, int, unsigned);
231 static void collect_fn_hard_reg_usage (void);
232 static tree get_call_fndecl (rtx_insn *);
233 \f
234 /* Initialize data in final at the beginning of a compilation. */
235
236 void
237 init_final (const char *filename ATTRIBUTE_UNUSED)
238 {
239 app_on = 0;
240 final_sequence = 0;
241
242 #ifdef ASSEMBLER_DIALECT
243 dialect_number = ASSEMBLER_DIALECT;
244 #endif
245 }
246
247 /* Default target function prologue and epilogue assembler output.
248
249 If not overridden for epilogue code, then the function body itself
250 contains return instructions wherever needed. */
251 void
252 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
253 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
254 {
255 }
256
257 void
258 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
259 tree decl ATTRIBUTE_UNUSED,
260 bool new_is_cold ATTRIBUTE_UNUSED)
261 {
262 }
263
264 /* Default target hook that outputs nothing to a stream. */
265 void
266 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
267 {
268 }
269
270 /* Enable APP processing of subsequent output.
271 Used before the output from an `asm' statement. */
272
273 void
274 app_enable (void)
275 {
276 if (! app_on)
277 {
278 fputs (ASM_APP_ON, asm_out_file);
279 app_on = 1;
280 }
281 }
282
283 /* Disable APP processing of subsequent output.
284 Called from varasm.c before most kinds of output. */
285
286 void
287 app_disable (void)
288 {
289 if (app_on)
290 {
291 fputs (ASM_APP_OFF, asm_out_file);
292 app_on = 0;
293 }
294 }
295 \f
296 /* Return the number of slots filled in the current
297 delayed branch sequence (we don't count the insn needing the
298 delay slot). Zero if not in a delayed branch sequence. */
299
300 #ifdef DELAY_SLOTS
301 int
302 dbr_sequence_length (void)
303 {
304 if (final_sequence != 0)
305 return XVECLEN (final_sequence, 0) - 1;
306 else
307 return 0;
308 }
309 #endif
310 \f
311 /* The next two pages contain routines used to compute the length of an insn
312 and to shorten branches. */
313
314 /* Arrays for insn lengths, and addresses. The latter is referenced by
315 `insn_current_length'. */
316
317 static int *insn_lengths;
318
319 vec<int> insn_addresses_;
320
321 /* Max uid for which the above arrays are valid. */
322 static int insn_lengths_max_uid;
323
324 /* Address of insn being processed. Used by `insn_current_length'. */
325 int insn_current_address;
326
327 /* Address of insn being processed in previous iteration. */
328 int insn_last_address;
329
330 /* known invariant alignment of insn being processed. */
331 int insn_current_align;
332
333 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
334 gives the next following alignment insn that increases the known
335 alignment, or NULL_RTX if there is no such insn.
336 For any alignment obtained this way, we can again index uid_align with
337 its uid to obtain the next following align that in turn increases the
338 alignment, till we reach NULL_RTX; the sequence obtained this way
339 for each insn we'll call the alignment chain of this insn in the following
340 comments. */
341
342 struct label_alignment
343 {
344 short alignment;
345 short max_skip;
346 };
347
348 static rtx *uid_align;
349 static int *uid_shuid;
350 static struct label_alignment *label_align;
351
352 /* Indicate that branch shortening hasn't yet been done. */
353
354 void
355 init_insn_lengths (void)
356 {
357 if (uid_shuid)
358 {
359 free (uid_shuid);
360 uid_shuid = 0;
361 }
362 if (insn_lengths)
363 {
364 free (insn_lengths);
365 insn_lengths = 0;
366 insn_lengths_max_uid = 0;
367 }
368 if (HAVE_ATTR_length)
369 INSN_ADDRESSES_FREE ();
370 if (uid_align)
371 {
372 free (uid_align);
373 uid_align = 0;
374 }
375 }
376
377 /* Obtain the current length of an insn. If branch shortening has been done,
378 get its actual length. Otherwise, use FALLBACK_FN to calculate the
379 length. */
380 static int
381 get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *))
382 {
383 rtx body;
384 int i;
385 int length = 0;
386
387 if (!HAVE_ATTR_length)
388 return 0;
389
390 if (insn_lengths_max_uid > INSN_UID (insn))
391 return insn_lengths[INSN_UID (insn)];
392 else
393 switch (GET_CODE (insn))
394 {
395 case NOTE:
396 case BARRIER:
397 case CODE_LABEL:
398 case DEBUG_INSN:
399 return 0;
400
401 case CALL_INSN:
402 case JUMP_INSN:
403 length = fallback_fn (insn);
404 break;
405
406 case INSN:
407 body = PATTERN (insn);
408 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
409 return 0;
410
411 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
412 length = asm_insn_count (body) * fallback_fn (insn);
413 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
414 for (i = 0; i < seq->len (); i++)
415 length += get_attr_length_1 (seq->insn (i), fallback_fn);
416 else
417 length = fallback_fn (insn);
418 break;
419
420 default:
421 break;
422 }
423
424 #ifdef ADJUST_INSN_LENGTH
425 ADJUST_INSN_LENGTH (insn, length);
426 #endif
427 return length;
428 }
429
430 /* Obtain the current length of an insn. If branch shortening has been done,
431 get its actual length. Otherwise, get its maximum length. */
432 int
433 get_attr_length (rtx_insn *insn)
434 {
435 return get_attr_length_1 (insn, insn_default_length);
436 }
437
438 /* Obtain the current length of an insn. If branch shortening has been done,
439 get its actual length. Otherwise, get its minimum length. */
440 int
441 get_attr_min_length (rtx_insn *insn)
442 {
443 return get_attr_length_1 (insn, insn_min_length);
444 }
445 \f
446 /* Code to handle alignment inside shorten_branches. */
447
448 /* Here is an explanation how the algorithm in align_fuzz can give
449 proper results:
450
451 Call a sequence of instructions beginning with alignment point X
452 and continuing until the next alignment point `block X'. When `X'
453 is used in an expression, it means the alignment value of the
454 alignment point.
455
456 Call the distance between the start of the first insn of block X, and
457 the end of the last insn of block X `IX', for the `inner size of X'.
458 This is clearly the sum of the instruction lengths.
459
460 Likewise with the next alignment-delimited block following X, which we
461 shall call block Y.
462
463 Call the distance between the start of the first insn of block X, and
464 the start of the first insn of block Y `OX', for the `outer size of X'.
465
466 The estimated padding is then OX - IX.
467
468 OX can be safely estimated as
469
470 if (X >= Y)
471 OX = round_up(IX, Y)
472 else
473 OX = round_up(IX, X) + Y - X
474
475 Clearly est(IX) >= real(IX), because that only depends on the
476 instruction lengths, and those being overestimated is a given.
477
478 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
479 we needn't worry about that when thinking about OX.
480
481 When X >= Y, the alignment provided by Y adds no uncertainty factor
482 for branch ranges starting before X, so we can just round what we have.
483 But when X < Y, we don't know anything about the, so to speak,
484 `middle bits', so we have to assume the worst when aligning up from an
485 address mod X to one mod Y, which is Y - X. */
486
487 #ifndef LABEL_ALIGN
488 #define LABEL_ALIGN(LABEL) align_labels_log
489 #endif
490
491 #ifndef LOOP_ALIGN
492 #define LOOP_ALIGN(LABEL) align_loops_log
493 #endif
494
495 #ifndef LABEL_ALIGN_AFTER_BARRIER
496 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
497 #endif
498
499 #ifndef JUMP_ALIGN
500 #define JUMP_ALIGN(LABEL) align_jumps_log
501 #endif
502
503 int
504 default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
505 {
506 return 0;
507 }
508
509 int
510 default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
511 {
512 return align_loops_max_skip;
513 }
514
515 int
516 default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
517 {
518 return align_labels_max_skip;
519 }
520
521 int
522 default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
523 {
524 return align_jumps_max_skip;
525 }
526
527 #ifndef ADDR_VEC_ALIGN
528 static int
529 final_addr_vec_align (rtx addr_vec)
530 {
531 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
532
533 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
534 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
535 return exact_log2 (align);
536
537 }
538
539 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
540 #endif
541
542 #ifndef INSN_LENGTH_ALIGNMENT
543 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
544 #endif
545
546 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
547
548 static int min_labelno, max_labelno;
549
550 #define LABEL_TO_ALIGNMENT(LABEL) \
551 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
552
553 #define LABEL_TO_MAX_SKIP(LABEL) \
554 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
555
556 /* For the benefit of port specific code do this also as a function. */
557
558 int
559 label_to_alignment (rtx label)
560 {
561 if (CODE_LABEL_NUMBER (label) <= max_labelno)
562 return LABEL_TO_ALIGNMENT (label);
563 return 0;
564 }
565
566 int
567 label_to_max_skip (rtx label)
568 {
569 if (CODE_LABEL_NUMBER (label) <= max_labelno)
570 return LABEL_TO_MAX_SKIP (label);
571 return 0;
572 }
573
574 /* The differences in addresses
575 between a branch and its target might grow or shrink depending on
576 the alignment the start insn of the range (the branch for a forward
577 branch or the label for a backward branch) starts out on; if these
578 differences are used naively, they can even oscillate infinitely.
579 We therefore want to compute a 'worst case' address difference that
580 is independent of the alignment the start insn of the range end
581 up on, and that is at least as large as the actual difference.
582 The function align_fuzz calculates the amount we have to add to the
583 naively computed difference, by traversing the part of the alignment
584 chain of the start insn of the range that is in front of the end insn
585 of the range, and considering for each alignment the maximum amount
586 that it might contribute to a size increase.
587
588 For casesi tables, we also want to know worst case minimum amounts of
589 address difference, in case a machine description wants to introduce
590 some common offset that is added to all offsets in a table.
591 For this purpose, align_fuzz with a growth argument of 0 computes the
592 appropriate adjustment. */
593
594 /* Compute the maximum delta by which the difference of the addresses of
595 START and END might grow / shrink due to a different address for start
596 which changes the size of alignment insns between START and END.
597 KNOWN_ALIGN_LOG is the alignment known for START.
598 GROWTH should be ~0 if the objective is to compute potential code size
599 increase, and 0 if the objective is to compute potential shrink.
600 The return value is undefined for any other value of GROWTH. */
601
602 static int
603 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
604 {
605 int uid = INSN_UID (start);
606 rtx align_label;
607 int known_align = 1 << known_align_log;
608 int end_shuid = INSN_SHUID (end);
609 int fuzz = 0;
610
611 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
612 {
613 int align_addr, new_align;
614
615 uid = INSN_UID (align_label);
616 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
617 if (uid_shuid[uid] > end_shuid)
618 break;
619 known_align_log = LABEL_TO_ALIGNMENT (align_label);
620 new_align = 1 << known_align_log;
621 if (new_align < known_align)
622 continue;
623 fuzz += (-align_addr ^ growth) & (new_align - known_align);
624 known_align = new_align;
625 }
626 return fuzz;
627 }
628
629 /* Compute a worst-case reference address of a branch so that it
630 can be safely used in the presence of aligned labels. Since the
631 size of the branch itself is unknown, the size of the branch is
632 not included in the range. I.e. for a forward branch, the reference
633 address is the end address of the branch as known from the previous
634 branch shortening pass, minus a value to account for possible size
635 increase due to alignment. For a backward branch, it is the start
636 address of the branch as known from the current pass, plus a value
637 to account for possible size increase due to alignment.
638 NB.: Therefore, the maximum offset allowed for backward branches needs
639 to exclude the branch size. */
640
641 int
642 insn_current_reference_address (rtx_insn *branch)
643 {
644 rtx dest;
645 int seq_uid;
646
647 if (! INSN_ADDRESSES_SET_P ())
648 return 0;
649
650 rtx_insn *seq = NEXT_INSN (PREV_INSN (branch));
651 seq_uid = INSN_UID (seq);
652 if (!JUMP_P (branch))
653 /* This can happen for example on the PA; the objective is to know the
654 offset to address something in front of the start of the function.
655 Thus, we can treat it like a backward branch.
656 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
657 any alignment we'd encounter, so we skip the call to align_fuzz. */
658 return insn_current_address;
659 dest = JUMP_LABEL (branch);
660
661 /* BRANCH has no proper alignment chain set, so use SEQ.
662 BRANCH also has no INSN_SHUID. */
663 if (INSN_SHUID (seq) < INSN_SHUID (dest))
664 {
665 /* Forward branch. */
666 return (insn_last_address + insn_lengths[seq_uid]
667 - align_fuzz (seq, dest, length_unit_log, ~0));
668 }
669 else
670 {
671 /* Backward branch. */
672 return (insn_current_address
673 + align_fuzz (dest, seq, length_unit_log, ~0));
674 }
675 }
676 \f
677 /* Compute branch alignments based on frequency information in the
678 CFG. */
679
680 unsigned int
681 compute_alignments (void)
682 {
683 int log, max_skip, max_log;
684 basic_block bb;
685 int freq_max = 0;
686 int freq_threshold = 0;
687
688 if (label_align)
689 {
690 free (label_align);
691 label_align = 0;
692 }
693
694 max_labelno = max_label_num ();
695 min_labelno = get_first_label_num ();
696 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
697
698 /* If not optimizing or optimizing for size, don't assign any alignments. */
699 if (! optimize || optimize_function_for_size_p (cfun))
700 return 0;
701
702 if (dump_file)
703 {
704 dump_reg_info (dump_file);
705 dump_flow_info (dump_file, TDF_DETAILS);
706 flow_loops_dump (dump_file, NULL, 1);
707 }
708 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
709 FOR_EACH_BB_FN (bb, cfun)
710 if (bb->frequency > freq_max)
711 freq_max = bb->frequency;
712 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
713
714 if (dump_file)
715 fprintf (dump_file, "freq_max: %i\n",freq_max);
716 FOR_EACH_BB_FN (bb, cfun)
717 {
718 rtx_insn *label = BB_HEAD (bb);
719 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
720 edge e;
721 edge_iterator ei;
722
723 if (!LABEL_P (label)
724 || optimize_bb_for_size_p (bb))
725 {
726 if (dump_file)
727 fprintf (dump_file,
728 "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
729 bb->index, bb->frequency, bb->loop_father->num,
730 bb_loop_depth (bb));
731 continue;
732 }
733 max_log = LABEL_ALIGN (label);
734 max_skip = targetm.asm_out.label_align_max_skip (label);
735
736 FOR_EACH_EDGE (e, ei, bb->preds)
737 {
738 if (e->flags & EDGE_FALLTHRU)
739 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
740 else
741 branch_frequency += EDGE_FREQUENCY (e);
742 }
743 if (dump_file)
744 {
745 fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth"
746 " %2i fall %4i branch %4i",
747 bb->index, bb->frequency, bb->loop_father->num,
748 bb_loop_depth (bb),
749 fallthru_frequency, branch_frequency);
750 if (!bb->loop_father->inner && bb->loop_father->num)
751 fprintf (dump_file, " inner_loop");
752 if (bb->loop_father->header == bb)
753 fprintf (dump_file, " loop_header");
754 fprintf (dump_file, "\n");
755 }
756
757 /* There are two purposes to align block with no fallthru incoming edge:
758 1) to avoid fetch stalls when branch destination is near cache boundary
759 2) to improve cache efficiency in case the previous block is not executed
760 (so it does not need to be in the cache).
761
762 We to catch first case, we align frequently executed blocks.
763 To catch the second, we align blocks that are executed more frequently
764 than the predecessor and the predecessor is likely to not be executed
765 when function is called. */
766
767 if (!has_fallthru
768 && (branch_frequency > freq_threshold
769 || (bb->frequency > bb->prev_bb->frequency * 10
770 && (bb->prev_bb->frequency
771 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2))))
772 {
773 log = JUMP_ALIGN (label);
774 if (dump_file)
775 fprintf (dump_file, " jump alignment added.\n");
776 if (max_log < log)
777 {
778 max_log = log;
779 max_skip = targetm.asm_out.jump_align_max_skip (label);
780 }
781 }
782 /* In case block is frequent and reached mostly by non-fallthru edge,
783 align it. It is most likely a first block of loop. */
784 if (has_fallthru
785 && !(single_succ_p (bb)
786 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
787 && optimize_bb_for_speed_p (bb)
788 && branch_frequency + fallthru_frequency > freq_threshold
789 && (branch_frequency
790 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
791 {
792 log = LOOP_ALIGN (label);
793 if (dump_file)
794 fprintf (dump_file, " internal loop alignment added.\n");
795 if (max_log < log)
796 {
797 max_log = log;
798 max_skip = targetm.asm_out.loop_align_max_skip (label);
799 }
800 }
801 LABEL_TO_ALIGNMENT (label) = max_log;
802 LABEL_TO_MAX_SKIP (label) = max_skip;
803 }
804
805 loop_optimizer_finalize ();
806 free_dominance_info (CDI_DOMINATORS);
807 return 0;
808 }
809
810 /* Grow the LABEL_ALIGN array after new labels are created. */
811
812 static void
813 grow_label_align (void)
814 {
815 int old = max_labelno;
816 int n_labels;
817 int n_old_labels;
818
819 max_labelno = max_label_num ();
820
821 n_labels = max_labelno - min_labelno + 1;
822 n_old_labels = old - min_labelno + 1;
823
824 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
825
826 /* Range of labels grows monotonically in the function. Failing here
827 means that the initialization of array got lost. */
828 gcc_assert (n_old_labels <= n_labels);
829
830 memset (label_align + n_old_labels, 0,
831 (n_labels - n_old_labels) * sizeof (struct label_alignment));
832 }
833
834 /* Update the already computed alignment information. LABEL_PAIRS is a vector
835 made up of pairs of labels for which the alignment information of the first
836 element will be copied from that of the second element. */
837
838 void
839 update_alignments (vec<rtx> &label_pairs)
840 {
841 unsigned int i = 0;
842 rtx iter, label = NULL_RTX;
843
844 if (max_labelno != max_label_num ())
845 grow_label_align ();
846
847 FOR_EACH_VEC_ELT (label_pairs, i, iter)
848 if (i & 1)
849 {
850 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
851 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
852 }
853 else
854 label = iter;
855 }
856
857 namespace {
858
859 const pass_data pass_data_compute_alignments =
860 {
861 RTL_PASS, /* type */
862 "alignments", /* name */
863 OPTGROUP_NONE, /* optinfo_flags */
864 TV_NONE, /* tv_id */
865 0, /* properties_required */
866 0, /* properties_provided */
867 0, /* properties_destroyed */
868 0, /* todo_flags_start */
869 0, /* todo_flags_finish */
870 };
871
872 class pass_compute_alignments : public rtl_opt_pass
873 {
874 public:
875 pass_compute_alignments (gcc::context *ctxt)
876 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
877 {}
878
879 /* opt_pass methods: */
880 virtual unsigned int execute (function *) { return compute_alignments (); }
881
882 }; // class pass_compute_alignments
883
884 } // anon namespace
885
886 rtl_opt_pass *
887 make_pass_compute_alignments (gcc::context *ctxt)
888 {
889 return new pass_compute_alignments (ctxt);
890 }
891
892 \f
893 /* Make a pass over all insns and compute their actual lengths by shortening
894 any branches of variable length if possible. */
895
896 /* shorten_branches might be called multiple times: for example, the SH
897 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
898 In order to do this, it needs proper length information, which it obtains
899 by calling shorten_branches. This cannot be collapsed with
900 shorten_branches itself into a single pass unless we also want to integrate
901 reorg.c, since the branch splitting exposes new instructions with delay
902 slots. */
903
904 void
905 shorten_branches (rtx_insn *first)
906 {
907 rtx_insn *insn;
908 int max_uid;
909 int i;
910 int max_log;
911 int max_skip;
912 #define MAX_CODE_ALIGN 16
913 rtx_insn *seq;
914 int something_changed = 1;
915 char *varying_length;
916 rtx body;
917 int uid;
918 rtx align_tab[MAX_CODE_ALIGN];
919
920 /* Compute maximum UID and allocate label_align / uid_shuid. */
921 max_uid = get_max_uid ();
922
923 /* Free uid_shuid before reallocating it. */
924 free (uid_shuid);
925
926 uid_shuid = XNEWVEC (int, max_uid);
927
928 if (max_labelno != max_label_num ())
929 grow_label_align ();
930
931 /* Initialize label_align and set up uid_shuid to be strictly
932 monotonically rising with insn order. */
933 /* We use max_log here to keep track of the maximum alignment we want to
934 impose on the next CODE_LABEL (or the current one if we are processing
935 the CODE_LABEL itself). */
936
937 max_log = 0;
938 max_skip = 0;
939
940 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
941 {
942 int log;
943
944 INSN_SHUID (insn) = i++;
945 if (INSN_P (insn))
946 continue;
947
948 if (LABEL_P (insn))
949 {
950 rtx_insn *next;
951 bool next_is_jumptable;
952
953 /* Merge in alignments computed by compute_alignments. */
954 log = LABEL_TO_ALIGNMENT (insn);
955 if (max_log < log)
956 {
957 max_log = log;
958 max_skip = LABEL_TO_MAX_SKIP (insn);
959 }
960
961 next = next_nonnote_insn (insn);
962 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
963 if (!next_is_jumptable)
964 {
965 log = LABEL_ALIGN (insn);
966 if (max_log < log)
967 {
968 max_log = log;
969 max_skip = targetm.asm_out.label_align_max_skip (insn);
970 }
971 }
972 /* ADDR_VECs only take room if read-only data goes into the text
973 section. */
974 if ((JUMP_TABLES_IN_TEXT_SECTION
975 || readonly_data_section == text_section)
976 && next_is_jumptable)
977 {
978 log = ADDR_VEC_ALIGN (next);
979 if (max_log < log)
980 {
981 max_log = log;
982 max_skip = targetm.asm_out.label_align_max_skip (insn);
983 }
984 }
985 LABEL_TO_ALIGNMENT (insn) = max_log;
986 LABEL_TO_MAX_SKIP (insn) = max_skip;
987 max_log = 0;
988 max_skip = 0;
989 }
990 else if (BARRIER_P (insn))
991 {
992 rtx_insn *label;
993
994 for (label = insn; label && ! INSN_P (label);
995 label = NEXT_INSN (label))
996 if (LABEL_P (label))
997 {
998 log = LABEL_ALIGN_AFTER_BARRIER (insn);
999 if (max_log < log)
1000 {
1001 max_log = log;
1002 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
1003 }
1004 break;
1005 }
1006 }
1007 }
1008 if (!HAVE_ATTR_length)
1009 return;
1010
1011 /* Allocate the rest of the arrays. */
1012 insn_lengths = XNEWVEC (int, max_uid);
1013 insn_lengths_max_uid = max_uid;
1014 /* Syntax errors can lead to labels being outside of the main insn stream.
1015 Initialize insn_addresses, so that we get reproducible results. */
1016 INSN_ADDRESSES_ALLOC (max_uid);
1017
1018 varying_length = XCNEWVEC (char, max_uid);
1019
1020 /* Initialize uid_align. We scan instructions
1021 from end to start, and keep in align_tab[n] the last seen insn
1022 that does an alignment of at least n+1, i.e. the successor
1023 in the alignment chain for an insn that does / has a known
1024 alignment of n. */
1025 uid_align = XCNEWVEC (rtx, max_uid);
1026
1027 for (i = MAX_CODE_ALIGN; --i >= 0;)
1028 align_tab[i] = NULL_RTX;
1029 seq = get_last_insn ();
1030 for (; seq; seq = PREV_INSN (seq))
1031 {
1032 int uid = INSN_UID (seq);
1033 int log;
1034 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1035 uid_align[uid] = align_tab[0];
1036 if (log)
1037 {
1038 /* Found an alignment label. */
1039 uid_align[uid] = align_tab[log];
1040 for (i = log - 1; i >= 0; i--)
1041 align_tab[i] = seq;
1042 }
1043 }
1044
1045 /* When optimizing, we start assuming minimum length, and keep increasing
1046 lengths as we find the need for this, till nothing changes.
1047 When not optimizing, we start assuming maximum lengths, and
1048 do a single pass to update the lengths. */
1049 bool increasing = optimize != 0;
1050
1051 #ifdef CASE_VECTOR_SHORTEN_MODE
1052 if (optimize)
1053 {
1054 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1055 label fields. */
1056
1057 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1058 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1059 int rel;
1060
1061 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1062 {
1063 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1064 int len, i, min, max, insn_shuid;
1065 int min_align;
1066 addr_diff_vec_flags flags;
1067
1068 if (! JUMP_TABLE_DATA_P (insn)
1069 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1070 continue;
1071 pat = PATTERN (insn);
1072 len = XVECLEN (pat, 1);
1073 gcc_assert (len > 0);
1074 min_align = MAX_CODE_ALIGN;
1075 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1076 {
1077 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1078 int shuid = INSN_SHUID (lab);
1079 if (shuid < min)
1080 {
1081 min = shuid;
1082 min_lab = lab;
1083 }
1084 if (shuid > max)
1085 {
1086 max = shuid;
1087 max_lab = lab;
1088 }
1089 if (min_align > LABEL_TO_ALIGNMENT (lab))
1090 min_align = LABEL_TO_ALIGNMENT (lab);
1091 }
1092 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1093 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1094 insn_shuid = INSN_SHUID (insn);
1095 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1096 memset (&flags, 0, sizeof (flags));
1097 flags.min_align = min_align;
1098 flags.base_after_vec = rel > insn_shuid;
1099 flags.min_after_vec = min > insn_shuid;
1100 flags.max_after_vec = max > insn_shuid;
1101 flags.min_after_base = min > rel;
1102 flags.max_after_base = max > rel;
1103 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1104
1105 if (increasing)
1106 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1107 }
1108 }
1109 #endif /* CASE_VECTOR_SHORTEN_MODE */
1110
1111 /* Compute initial lengths, addresses, and varying flags for each insn. */
1112 int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length;
1113
1114 for (insn_current_address = 0, insn = first;
1115 insn != 0;
1116 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1117 {
1118 uid = INSN_UID (insn);
1119
1120 insn_lengths[uid] = 0;
1121
1122 if (LABEL_P (insn))
1123 {
1124 int log = LABEL_TO_ALIGNMENT (insn);
1125 if (log)
1126 {
1127 int align = 1 << log;
1128 int new_address = (insn_current_address + align - 1) & -align;
1129 insn_lengths[uid] = new_address - insn_current_address;
1130 }
1131 }
1132
1133 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1134
1135 if (NOTE_P (insn) || BARRIER_P (insn)
1136 || LABEL_P (insn) || DEBUG_INSN_P (insn))
1137 continue;
1138 if (insn->deleted ())
1139 continue;
1140
1141 body = PATTERN (insn);
1142 if (JUMP_TABLE_DATA_P (insn))
1143 {
1144 /* This only takes room if read-only data goes into the text
1145 section. */
1146 if (JUMP_TABLES_IN_TEXT_SECTION
1147 || readonly_data_section == text_section)
1148 insn_lengths[uid] = (XVECLEN (body,
1149 GET_CODE (body) == ADDR_DIFF_VEC)
1150 * GET_MODE_SIZE (GET_MODE (body)));
1151 /* Alignment is handled by ADDR_VEC_ALIGN. */
1152 }
1153 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1154 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1155 else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body))
1156 {
1157 int i;
1158 int const_delay_slots;
1159 #ifdef DELAY_SLOTS
1160 const_delay_slots = const_num_delay_slots (body_seq->insn (0));
1161 #else
1162 const_delay_slots = 0;
1163 #endif
1164 int (*inner_length_fun) (rtx_insn *)
1165 = const_delay_slots ? length_fun : insn_default_length;
1166 /* Inside a delay slot sequence, we do not do any branch shortening
1167 if the shortening could change the number of delay slots
1168 of the branch. */
1169 for (i = 0; i < body_seq->len (); i++)
1170 {
1171 rtx_insn *inner_insn = body_seq->insn (i);
1172 int inner_uid = INSN_UID (inner_insn);
1173 int inner_length;
1174
1175 if (GET_CODE (body) == ASM_INPUT
1176 || asm_noperands (PATTERN (inner_insn)) >= 0)
1177 inner_length = (asm_insn_count (PATTERN (inner_insn))
1178 * insn_default_length (inner_insn));
1179 else
1180 inner_length = inner_length_fun (inner_insn);
1181
1182 insn_lengths[inner_uid] = inner_length;
1183 if (const_delay_slots)
1184 {
1185 if ((varying_length[inner_uid]
1186 = insn_variable_length_p (inner_insn)) != 0)
1187 varying_length[uid] = 1;
1188 INSN_ADDRESSES (inner_uid) = (insn_current_address
1189 + insn_lengths[uid]);
1190 }
1191 else
1192 varying_length[inner_uid] = 0;
1193 insn_lengths[uid] += inner_length;
1194 }
1195 }
1196 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1197 {
1198 insn_lengths[uid] = length_fun (insn);
1199 varying_length[uid] = insn_variable_length_p (insn);
1200 }
1201
1202 /* If needed, do any adjustment. */
1203 #ifdef ADJUST_INSN_LENGTH
1204 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1205 if (insn_lengths[uid] < 0)
1206 fatal_insn ("negative insn length", insn);
1207 #endif
1208 }
1209
1210 /* Now loop over all the insns finding varying length insns. For each,
1211 get the current insn length. If it has changed, reflect the change.
1212 When nothing changes for a full pass, we are done. */
1213
1214 while (something_changed)
1215 {
1216 something_changed = 0;
1217 insn_current_align = MAX_CODE_ALIGN - 1;
1218 for (insn_current_address = 0, insn = first;
1219 insn != 0;
1220 insn = NEXT_INSN (insn))
1221 {
1222 int new_length;
1223 #ifdef ADJUST_INSN_LENGTH
1224 int tmp_length;
1225 #endif
1226 int length_align;
1227
1228 uid = INSN_UID (insn);
1229
1230 if (LABEL_P (insn))
1231 {
1232 int log = LABEL_TO_ALIGNMENT (insn);
1233
1234 #ifdef CASE_VECTOR_SHORTEN_MODE
1235 /* If the mode of a following jump table was changed, we
1236 may need to update the alignment of this label. */
1237 rtx_insn *next;
1238 bool next_is_jumptable;
1239
1240 next = next_nonnote_insn (insn);
1241 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
1242 if ((JUMP_TABLES_IN_TEXT_SECTION
1243 || readonly_data_section == text_section)
1244 && next_is_jumptable)
1245 {
1246 int newlog = ADDR_VEC_ALIGN (next);
1247 if (newlog != log)
1248 {
1249 log = newlog;
1250 LABEL_TO_ALIGNMENT (insn) = log;
1251 something_changed = 1;
1252 }
1253 }
1254 #endif
1255
1256 if (log > insn_current_align)
1257 {
1258 int align = 1 << log;
1259 int new_address= (insn_current_address + align - 1) & -align;
1260 insn_lengths[uid] = new_address - insn_current_address;
1261 insn_current_align = log;
1262 insn_current_address = new_address;
1263 }
1264 else
1265 insn_lengths[uid] = 0;
1266 INSN_ADDRESSES (uid) = insn_current_address;
1267 continue;
1268 }
1269
1270 length_align = INSN_LENGTH_ALIGNMENT (insn);
1271 if (length_align < insn_current_align)
1272 insn_current_align = length_align;
1273
1274 insn_last_address = INSN_ADDRESSES (uid);
1275 INSN_ADDRESSES (uid) = insn_current_address;
1276
1277 #ifdef CASE_VECTOR_SHORTEN_MODE
1278 if (optimize
1279 && JUMP_TABLE_DATA_P (insn)
1280 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1281 {
1282 rtx body = PATTERN (insn);
1283 int old_length = insn_lengths[uid];
1284 rtx_insn *rel_lab =
1285 safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0));
1286 rtx min_lab = XEXP (XEXP (body, 2), 0);
1287 rtx max_lab = XEXP (XEXP (body, 3), 0);
1288 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1289 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1290 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1291 rtx_insn *prev;
1292 int rel_align = 0;
1293 addr_diff_vec_flags flags;
1294 machine_mode vec_mode;
1295
1296 /* Avoid automatic aggregate initialization. */
1297 flags = ADDR_DIFF_VEC_FLAGS (body);
1298
1299 /* Try to find a known alignment for rel_lab. */
1300 for (prev = rel_lab;
1301 prev
1302 && ! insn_lengths[INSN_UID (prev)]
1303 && ! (varying_length[INSN_UID (prev)] & 1);
1304 prev = PREV_INSN (prev))
1305 if (varying_length[INSN_UID (prev)] & 2)
1306 {
1307 rel_align = LABEL_TO_ALIGNMENT (prev);
1308 break;
1309 }
1310
1311 /* See the comment on addr_diff_vec_flags in rtl.h for the
1312 meaning of the flags values. base: REL_LAB vec: INSN */
1313 /* Anything after INSN has still addresses from the last
1314 pass; adjust these so that they reflect our current
1315 estimate for this pass. */
1316 if (flags.base_after_vec)
1317 rel_addr += insn_current_address - insn_last_address;
1318 if (flags.min_after_vec)
1319 min_addr += insn_current_address - insn_last_address;
1320 if (flags.max_after_vec)
1321 max_addr += insn_current_address - insn_last_address;
1322 /* We want to know the worst case, i.e. lowest possible value
1323 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1324 its offset is positive, and we have to be wary of code shrink;
1325 otherwise, it is negative, and we have to be vary of code
1326 size increase. */
1327 if (flags.min_after_base)
1328 {
1329 /* If INSN is between REL_LAB and MIN_LAB, the size
1330 changes we are about to make can change the alignment
1331 within the observed offset, therefore we have to break
1332 it up into two parts that are independent. */
1333 if (! flags.base_after_vec && flags.min_after_vec)
1334 {
1335 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1336 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1337 }
1338 else
1339 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1340 }
1341 else
1342 {
1343 if (flags.base_after_vec && ! flags.min_after_vec)
1344 {
1345 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1346 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1347 }
1348 else
1349 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1350 }
1351 /* Likewise, determine the highest lowest possible value
1352 for the offset of MAX_LAB. */
1353 if (flags.max_after_base)
1354 {
1355 if (! flags.base_after_vec && flags.max_after_vec)
1356 {
1357 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1358 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1359 }
1360 else
1361 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1362 }
1363 else
1364 {
1365 if (flags.base_after_vec && ! flags.max_after_vec)
1366 {
1367 max_addr += align_fuzz (max_lab, insn, 0, 0);
1368 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1369 }
1370 else
1371 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1372 }
1373 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1374 max_addr - rel_addr, body);
1375 if (!increasing
1376 || (GET_MODE_SIZE (vec_mode)
1377 >= GET_MODE_SIZE (GET_MODE (body))))
1378 PUT_MODE (body, vec_mode);
1379 if (JUMP_TABLES_IN_TEXT_SECTION
1380 || readonly_data_section == text_section)
1381 {
1382 insn_lengths[uid]
1383 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1384 insn_current_address += insn_lengths[uid];
1385 if (insn_lengths[uid] != old_length)
1386 something_changed = 1;
1387 }
1388
1389 continue;
1390 }
1391 #endif /* CASE_VECTOR_SHORTEN_MODE */
1392
1393 if (! (varying_length[uid]))
1394 {
1395 if (NONJUMP_INSN_P (insn)
1396 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1397 {
1398 int i;
1399
1400 body = PATTERN (insn);
1401 for (i = 0; i < XVECLEN (body, 0); i++)
1402 {
1403 rtx inner_insn = XVECEXP (body, 0, i);
1404 int inner_uid = INSN_UID (inner_insn);
1405
1406 INSN_ADDRESSES (inner_uid) = insn_current_address;
1407
1408 insn_current_address += insn_lengths[inner_uid];
1409 }
1410 }
1411 else
1412 insn_current_address += insn_lengths[uid];
1413
1414 continue;
1415 }
1416
1417 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1418 {
1419 rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn));
1420 int i;
1421
1422 body = PATTERN (insn);
1423 new_length = 0;
1424 for (i = 0; i < seqn->len (); i++)
1425 {
1426 rtx_insn *inner_insn = seqn->insn (i);
1427 int inner_uid = INSN_UID (inner_insn);
1428 int inner_length;
1429
1430 INSN_ADDRESSES (inner_uid) = insn_current_address;
1431
1432 /* insn_current_length returns 0 for insns with a
1433 non-varying length. */
1434 if (! varying_length[inner_uid])
1435 inner_length = insn_lengths[inner_uid];
1436 else
1437 inner_length = insn_current_length (inner_insn);
1438
1439 if (inner_length != insn_lengths[inner_uid])
1440 {
1441 if (!increasing || inner_length > insn_lengths[inner_uid])
1442 {
1443 insn_lengths[inner_uid] = inner_length;
1444 something_changed = 1;
1445 }
1446 else
1447 inner_length = insn_lengths[inner_uid];
1448 }
1449 insn_current_address += inner_length;
1450 new_length += inner_length;
1451 }
1452 }
1453 else
1454 {
1455 new_length = insn_current_length (insn);
1456 insn_current_address += new_length;
1457 }
1458
1459 #ifdef ADJUST_INSN_LENGTH
1460 /* If needed, do any adjustment. */
1461 tmp_length = new_length;
1462 ADJUST_INSN_LENGTH (insn, new_length);
1463 insn_current_address += (new_length - tmp_length);
1464 #endif
1465
1466 if (new_length != insn_lengths[uid]
1467 && (!increasing || new_length > insn_lengths[uid]))
1468 {
1469 insn_lengths[uid] = new_length;
1470 something_changed = 1;
1471 }
1472 else
1473 insn_current_address += insn_lengths[uid] - new_length;
1474 }
1475 /* For a non-optimizing compile, do only a single pass. */
1476 if (!increasing)
1477 break;
1478 }
1479
1480 free (varying_length);
1481 }
1482
1483 /* Given the body of an INSN known to be generated by an ASM statement, return
1484 the number of machine instructions likely to be generated for this insn.
1485 This is used to compute its length. */
1486
1487 static int
1488 asm_insn_count (rtx body)
1489 {
1490 const char *templ;
1491
1492 if (GET_CODE (body) == ASM_INPUT)
1493 templ = XSTR (body, 0);
1494 else
1495 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1496
1497 return asm_str_count (templ);
1498 }
1499
1500 /* Return the number of machine instructions likely to be generated for the
1501 inline-asm template. */
1502 int
1503 asm_str_count (const char *templ)
1504 {
1505 int count = 1;
1506
1507 if (!*templ)
1508 return 0;
1509
1510 for (; *templ; templ++)
1511 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1512 || *templ == '\n')
1513 count++;
1514
1515 return count;
1516 }
1517 \f
1518 /* ??? This is probably the wrong place for these. */
1519 /* Structure recording the mapping from source file and directory
1520 names at compile time to those to be embedded in debug
1521 information. */
1522 struct debug_prefix_map
1523 {
1524 const char *old_prefix;
1525 const char *new_prefix;
1526 size_t old_len;
1527 size_t new_len;
1528 struct debug_prefix_map *next;
1529 };
1530
1531 /* Linked list of such structures. */
1532 static debug_prefix_map *debug_prefix_maps;
1533
1534
1535 /* Record a debug file prefix mapping. ARG is the argument to
1536 -fdebug-prefix-map and must be of the form OLD=NEW. */
1537
1538 void
1539 add_debug_prefix_map (const char *arg)
1540 {
1541 debug_prefix_map *map;
1542 const char *p;
1543
1544 p = strchr (arg, '=');
1545 if (!p)
1546 {
1547 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1548 return;
1549 }
1550 map = XNEW (debug_prefix_map);
1551 map->old_prefix = xstrndup (arg, p - arg);
1552 map->old_len = p - arg;
1553 p++;
1554 map->new_prefix = xstrdup (p);
1555 map->new_len = strlen (p);
1556 map->next = debug_prefix_maps;
1557 debug_prefix_maps = map;
1558 }
1559
1560 /* Perform user-specified mapping of debug filename prefixes. Return
1561 the new name corresponding to FILENAME. */
1562
1563 const char *
1564 remap_debug_filename (const char *filename)
1565 {
1566 debug_prefix_map *map;
1567 char *s;
1568 const char *name;
1569 size_t name_len;
1570
1571 for (map = debug_prefix_maps; map; map = map->next)
1572 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1573 break;
1574 if (!map)
1575 return filename;
1576 name = filename + map->old_len;
1577 name_len = strlen (name) + 1;
1578 s = (char *) alloca (name_len + map->new_len);
1579 memcpy (s, map->new_prefix, map->new_len);
1580 memcpy (s + map->new_len, name, name_len);
1581 return ggc_strdup (s);
1582 }
1583 \f
1584 /* Return true if DWARF2 debug info can be emitted for DECL. */
1585
1586 static bool
1587 dwarf2_debug_info_emitted_p (tree decl)
1588 {
1589 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1590 return false;
1591
1592 if (DECL_IGNORED_P (decl))
1593 return false;
1594
1595 return true;
1596 }
1597
1598 /* Return scope resulting from combination of S1 and S2. */
1599 static tree
1600 choose_inner_scope (tree s1, tree s2)
1601 {
1602 if (!s1)
1603 return s2;
1604 if (!s2)
1605 return s1;
1606 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1607 return s1;
1608 return s2;
1609 }
1610
1611 /* Emit lexical block notes needed to change scope from S1 to S2. */
1612
1613 static void
1614 change_scope (rtx_insn *orig_insn, tree s1, tree s2)
1615 {
1616 rtx_insn *insn = orig_insn;
1617 tree com = NULL_TREE;
1618 tree ts1 = s1, ts2 = s2;
1619 tree s;
1620
1621 while (ts1 != ts2)
1622 {
1623 gcc_assert (ts1 && ts2);
1624 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1625 ts1 = BLOCK_SUPERCONTEXT (ts1);
1626 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1627 ts2 = BLOCK_SUPERCONTEXT (ts2);
1628 else
1629 {
1630 ts1 = BLOCK_SUPERCONTEXT (ts1);
1631 ts2 = BLOCK_SUPERCONTEXT (ts2);
1632 }
1633 }
1634 com = ts1;
1635
1636 /* Close scopes. */
1637 s = s1;
1638 while (s != com)
1639 {
1640 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1641 NOTE_BLOCK (note) = s;
1642 s = BLOCK_SUPERCONTEXT (s);
1643 }
1644
1645 /* Open scopes. */
1646 s = s2;
1647 while (s != com)
1648 {
1649 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1650 NOTE_BLOCK (insn) = s;
1651 s = BLOCK_SUPERCONTEXT (s);
1652 }
1653 }
1654
1655 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1656 on the scope tree and the newly reordered instructions. */
1657
1658 static void
1659 reemit_insn_block_notes (void)
1660 {
1661 tree cur_block = DECL_INITIAL (cfun->decl);
1662 rtx_insn *insn;
1663 rtx_note *note;
1664
1665 insn = get_insns ();
1666 for (; insn; insn = NEXT_INSN (insn))
1667 {
1668 tree this_block;
1669
1670 /* Prevent lexical blocks from straddling section boundaries. */
1671 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
1672 {
1673 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1674 s = BLOCK_SUPERCONTEXT (s))
1675 {
1676 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1677 NOTE_BLOCK (note) = s;
1678 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1679 NOTE_BLOCK (note) = s;
1680 }
1681 }
1682
1683 if (!active_insn_p (insn))
1684 continue;
1685
1686 /* Avoid putting scope notes between jump table and its label. */
1687 if (JUMP_TABLE_DATA_P (insn))
1688 continue;
1689
1690 this_block = insn_scope (insn);
1691 /* For sequences compute scope resulting from merging all scopes
1692 of instructions nested inside. */
1693 if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn)))
1694 {
1695 int i;
1696
1697 this_block = NULL;
1698 for (i = 0; i < body->len (); i++)
1699 this_block = choose_inner_scope (this_block,
1700 insn_scope (body->insn (i)));
1701 }
1702 if (! this_block)
1703 {
1704 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1705 continue;
1706 else
1707 this_block = DECL_INITIAL (cfun->decl);
1708 }
1709
1710 if (this_block != cur_block)
1711 {
1712 change_scope (insn, cur_block, this_block);
1713 cur_block = this_block;
1714 }
1715 }
1716
1717 /* change_scope emits before the insn, not after. */
1718 note = emit_note (NOTE_INSN_DELETED);
1719 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1720 delete_insn (note);
1721
1722 reorder_blocks ();
1723 }
1724
1725 static const char *some_local_dynamic_name;
1726
1727 /* Locate some local-dynamic symbol still in use by this function
1728 so that we can print its name in local-dynamic base patterns.
1729 Return null if there are no local-dynamic references. */
1730
1731 const char *
1732 get_some_local_dynamic_name ()
1733 {
1734 subrtx_iterator::array_type array;
1735 rtx_insn *insn;
1736
1737 if (some_local_dynamic_name)
1738 return some_local_dynamic_name;
1739
1740 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
1741 if (NONDEBUG_INSN_P (insn))
1742 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
1743 {
1744 const_rtx x = *iter;
1745 if (GET_CODE (x) == SYMBOL_REF)
1746 {
1747 if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC)
1748 return some_local_dynamic_name = XSTR (x, 0);
1749 if (CONSTANT_POOL_ADDRESS_P (x))
1750 iter.substitute (get_pool_constant (x));
1751 }
1752 }
1753
1754 return 0;
1755 }
1756
1757 /* Output assembler code for the start of a function,
1758 and initialize some of the variables in this file
1759 for the new function. The label for the function and associated
1760 assembler pseudo-ops have already been output in `assemble_start_function'.
1761
1762 FIRST is the first insn of the rtl for the function being compiled.
1763 FILE is the file to write assembler code to.
1764 OPTIMIZE_P is nonzero if we should eliminate redundant
1765 test and compare insns. */
1766
1767 void
1768 final_start_function (rtx_insn *first, FILE *file,
1769 int optimize_p ATTRIBUTE_UNUSED)
1770 {
1771 block_depth = 0;
1772
1773 this_is_asm_operands = 0;
1774
1775 need_profile_function = false;
1776
1777 last_filename = LOCATION_FILE (prologue_location);
1778 last_linenum = LOCATION_LINE (prologue_location);
1779 last_discriminator = discriminator = 0;
1780
1781 high_block_linenum = high_function_linenum = last_linenum;
1782
1783 if (flag_sanitize & SANITIZE_ADDRESS)
1784 asan_function_start ();
1785
1786 if (!DECL_IGNORED_P (current_function_decl))
1787 debug_hooks->begin_prologue (last_linenum, last_filename);
1788
1789 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1790 dwarf2out_begin_prologue (0, NULL);
1791
1792 #ifdef LEAF_REG_REMAP
1793 if (crtl->uses_only_leaf_regs)
1794 leaf_renumber_regs (first);
1795 #endif
1796
1797 /* The Sun386i and perhaps other machines don't work right
1798 if the profiling code comes after the prologue. */
1799 if (targetm.profile_before_prologue () && crtl->profile)
1800 {
1801 if (targetm.asm_out.function_prologue == default_function_pro_epilogue
1802 && targetm.have_prologue ())
1803 {
1804 rtx_insn *insn;
1805 for (insn = first; insn; insn = NEXT_INSN (insn))
1806 if (!NOTE_P (insn))
1807 {
1808 insn = NULL;
1809 break;
1810 }
1811 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1812 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1813 break;
1814 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1815 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1816 continue;
1817 else
1818 {
1819 insn = NULL;
1820 break;
1821 }
1822
1823 if (insn)
1824 need_profile_function = true;
1825 else
1826 profile_function (file);
1827 }
1828 else
1829 profile_function (file);
1830 }
1831
1832 /* If debugging, assign block numbers to all of the blocks in this
1833 function. */
1834 if (write_symbols)
1835 {
1836 reemit_insn_block_notes ();
1837 number_blocks (current_function_decl);
1838 /* We never actually put out begin/end notes for the top-level
1839 block in the function. But, conceptually, that block is
1840 always needed. */
1841 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1842 }
1843
1844 if (warn_frame_larger_than
1845 && get_frame_size () > frame_larger_than_size)
1846 {
1847 /* Issue a warning */
1848 warning (OPT_Wframe_larger_than_,
1849 "the frame size of %wd bytes is larger than %wd bytes",
1850 get_frame_size (), frame_larger_than_size);
1851 }
1852
1853 /* First output the function prologue: code to set up the stack frame. */
1854 targetm.asm_out.function_prologue (file, get_frame_size ());
1855
1856 /* If the machine represents the prologue as RTL, the profiling code must
1857 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1858 if (! targetm.have_prologue ())
1859 profile_after_prologue (file);
1860 }
1861
1862 static void
1863 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1864 {
1865 if (!targetm.profile_before_prologue () && crtl->profile)
1866 profile_function (file);
1867 }
1868
1869 static void
1870 profile_function (FILE *file ATTRIBUTE_UNUSED)
1871 {
1872 #ifndef NO_PROFILE_COUNTERS
1873 # define NO_PROFILE_COUNTERS 0
1874 #endif
1875 #ifdef ASM_OUTPUT_REG_PUSH
1876 rtx sval = NULL, chain = NULL;
1877
1878 if (cfun->returns_struct)
1879 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1880 true);
1881 if (cfun->static_chain_decl)
1882 chain = targetm.calls.static_chain (current_function_decl, true);
1883 #endif /* ASM_OUTPUT_REG_PUSH */
1884
1885 if (! NO_PROFILE_COUNTERS)
1886 {
1887 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1888 switch_to_section (data_section);
1889 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1890 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1891 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1892 }
1893
1894 switch_to_section (current_function_section ());
1895
1896 #ifdef ASM_OUTPUT_REG_PUSH
1897 if (sval && REG_P (sval))
1898 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1899 if (chain && REG_P (chain))
1900 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1901 #endif
1902
1903 FUNCTION_PROFILER (file, current_function_funcdef_no);
1904
1905 #ifdef ASM_OUTPUT_REG_PUSH
1906 if (chain && REG_P (chain))
1907 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1908 if (sval && REG_P (sval))
1909 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1910 #endif
1911 }
1912
1913 /* Output assembler code for the end of a function.
1914 For clarity, args are same as those of `final_start_function'
1915 even though not all of them are needed. */
1916
1917 void
1918 final_end_function (void)
1919 {
1920 app_disable ();
1921
1922 if (!DECL_IGNORED_P (current_function_decl))
1923 debug_hooks->end_function (high_function_linenum);
1924
1925 /* Finally, output the function epilogue:
1926 code to restore the stack frame and return to the caller. */
1927 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1928
1929 /* And debug output. */
1930 if (!DECL_IGNORED_P (current_function_decl))
1931 debug_hooks->end_epilogue (last_linenum, last_filename);
1932
1933 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1934 && dwarf2out_do_frame ())
1935 dwarf2out_end_epilogue (last_linenum, last_filename);
1936
1937 some_local_dynamic_name = 0;
1938 }
1939 \f
1940
1941 /* Dumper helper for basic block information. FILE is the assembly
1942 output file, and INSN is the instruction being emitted. */
1943
1944 static void
1945 dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
1946 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1947 {
1948 basic_block bb;
1949
1950 if (!flag_debug_asm)
1951 return;
1952
1953 if (INSN_UID (insn) < bb_map_size
1954 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1955 {
1956 edge e;
1957 edge_iterator ei;
1958
1959 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1960 if (bb->frequency)
1961 fprintf (file, " freq:%d", bb->frequency);
1962 if (bb->count)
1963 fprintf (file, " count:%" PRId64,
1964 bb->count);
1965 fprintf (file, " seq:%d", (*bb_seqn)++);
1966 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1967 FOR_EACH_EDGE (e, ei, bb->preds)
1968 {
1969 dump_edge_info (file, e, TDF_DETAILS, 0);
1970 }
1971 fprintf (file, "\n");
1972 }
1973 if (INSN_UID (insn) < bb_map_size
1974 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1975 {
1976 edge e;
1977 edge_iterator ei;
1978
1979 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1980 FOR_EACH_EDGE (e, ei, bb->succs)
1981 {
1982 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1983 }
1984 fprintf (file, "\n");
1985 }
1986 }
1987
1988 /* Output assembler code for some insns: all or part of a function.
1989 For description of args, see `final_start_function', above. */
1990
1991 void
1992 final (rtx_insn *first, FILE *file, int optimize_p)
1993 {
1994 rtx_insn *insn, *next;
1995 int seen = 0;
1996
1997 /* Used for -dA dump. */
1998 basic_block *start_to_bb = NULL;
1999 basic_block *end_to_bb = NULL;
2000 int bb_map_size = 0;
2001 int bb_seqn = 0;
2002
2003 last_ignored_compare = 0;
2004
2005 if (HAVE_cc0)
2006 for (insn = first; insn; insn = NEXT_INSN (insn))
2007 {
2008 /* If CC tracking across branches is enabled, record the insn which
2009 jumps to each branch only reached from one place. */
2010 if (optimize_p && JUMP_P (insn))
2011 {
2012 rtx lab = JUMP_LABEL (insn);
2013 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
2014 {
2015 LABEL_REFS (lab) = insn;
2016 }
2017 }
2018 }
2019
2020 init_recog ();
2021
2022 CC_STATUS_INIT;
2023
2024 if (flag_debug_asm)
2025 {
2026 basic_block bb;
2027
2028 bb_map_size = get_max_uid () + 1;
2029 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
2030 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
2031
2032 /* There is no cfg for a thunk. */
2033 if (!cfun->is_thunk)
2034 FOR_EACH_BB_REVERSE_FN (bb, cfun)
2035 {
2036 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
2037 end_to_bb[INSN_UID (BB_END (bb))] = bb;
2038 }
2039 }
2040
2041 /* Output the insns. */
2042 for (insn = first; insn;)
2043 {
2044 if (HAVE_ATTR_length)
2045 {
2046 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2047 {
2048 /* This can be triggered by bugs elsewhere in the compiler if
2049 new insns are created after init_insn_lengths is called. */
2050 gcc_assert (NOTE_P (insn));
2051 insn_current_address = -1;
2052 }
2053 else
2054 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2055 }
2056
2057 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2058 bb_map_size, &bb_seqn);
2059 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2060 }
2061
2062 if (flag_debug_asm)
2063 {
2064 free (start_to_bb);
2065 free (end_to_bb);
2066 }
2067
2068 /* Remove CFI notes, to avoid compare-debug failures. */
2069 for (insn = first; insn; insn = next)
2070 {
2071 next = NEXT_INSN (insn);
2072 if (NOTE_P (insn)
2073 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2074 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2075 delete_insn (insn);
2076 }
2077 }
2078 \f
2079 const char *
2080 get_insn_template (int code, rtx insn)
2081 {
2082 switch (insn_data[code].output_format)
2083 {
2084 case INSN_OUTPUT_FORMAT_SINGLE:
2085 return insn_data[code].output.single;
2086 case INSN_OUTPUT_FORMAT_MULTI:
2087 return insn_data[code].output.multi[which_alternative];
2088 case INSN_OUTPUT_FORMAT_FUNCTION:
2089 gcc_assert (insn);
2090 return (*insn_data[code].output.function) (recog_data.operand,
2091 as_a <rtx_insn *> (insn));
2092
2093 default:
2094 gcc_unreachable ();
2095 }
2096 }
2097
2098 /* Emit the appropriate declaration for an alternate-entry-point
2099 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2100 LABEL_KIND != LABEL_NORMAL.
2101
2102 The case fall-through in this function is intentional. */
2103 static void
2104 output_alternate_entry_point (FILE *file, rtx_insn *insn)
2105 {
2106 const char *name = LABEL_NAME (insn);
2107
2108 switch (LABEL_KIND (insn))
2109 {
2110 case LABEL_WEAK_ENTRY:
2111 #ifdef ASM_WEAKEN_LABEL
2112 ASM_WEAKEN_LABEL (file, name);
2113 #endif
2114 case LABEL_GLOBAL_ENTRY:
2115 targetm.asm_out.globalize_label (file, name);
2116 case LABEL_STATIC_ENTRY:
2117 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2118 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2119 #endif
2120 ASM_OUTPUT_LABEL (file, name);
2121 break;
2122
2123 case LABEL_NORMAL:
2124 default:
2125 gcc_unreachable ();
2126 }
2127 }
2128
2129 /* Given a CALL_INSN, find and return the nested CALL. */
2130 static rtx
2131 call_from_call_insn (rtx_call_insn *insn)
2132 {
2133 rtx x;
2134 gcc_assert (CALL_P (insn));
2135 x = PATTERN (insn);
2136
2137 while (GET_CODE (x) != CALL)
2138 {
2139 switch (GET_CODE (x))
2140 {
2141 default:
2142 gcc_unreachable ();
2143 case COND_EXEC:
2144 x = COND_EXEC_CODE (x);
2145 break;
2146 case PARALLEL:
2147 x = XVECEXP (x, 0, 0);
2148 break;
2149 case SET:
2150 x = XEXP (x, 1);
2151 break;
2152 }
2153 }
2154 return x;
2155 }
2156
2157 /* The final scan for one insn, INSN.
2158 Args are same as in `final', except that INSN
2159 is the insn being scanned.
2160 Value returned is the next insn to be scanned.
2161
2162 NOPEEPHOLES is the flag to disallow peephole processing (currently
2163 used for within delayed branch sequence output).
2164
2165 SEEN is used to track the end of the prologue, for emitting
2166 debug information. We force the emission of a line note after
2167 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
2168
2169 rtx_insn *
2170 final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2171 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2172 {
2173 #if HAVE_cc0
2174 rtx set;
2175 #endif
2176 rtx_insn *next;
2177
2178 insn_counter++;
2179
2180 /* Ignore deleted insns. These can occur when we split insns (due to a
2181 template of "#") while not optimizing. */
2182 if (insn->deleted ())
2183 return NEXT_INSN (insn);
2184
2185 switch (GET_CODE (insn))
2186 {
2187 case NOTE:
2188 switch (NOTE_KIND (insn))
2189 {
2190 case NOTE_INSN_DELETED:
2191 case NOTE_INSN_UPDATE_SJLJ_CONTEXT:
2192 break;
2193
2194 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2195 in_cold_section_p = !in_cold_section_p;
2196
2197 if (dwarf2out_do_frame ())
2198 dwarf2out_switch_text_section ();
2199 else if (!DECL_IGNORED_P (current_function_decl))
2200 debug_hooks->switch_text_section ();
2201
2202 switch_to_section (current_function_section ());
2203 targetm.asm_out.function_switched_text_sections (asm_out_file,
2204 current_function_decl,
2205 in_cold_section_p);
2206 /* Emit a label for the split cold section. Form label name by
2207 suffixing "cold" to the original function's name. */
2208 if (in_cold_section_p)
2209 {
2210 cold_function_name
2211 = clone_function_name (current_function_decl, "cold");
2212 #ifdef ASM_DECLARE_COLD_FUNCTION_NAME
2213 ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file,
2214 IDENTIFIER_POINTER
2215 (cold_function_name),
2216 current_function_decl);
2217 #else
2218 ASM_OUTPUT_LABEL (asm_out_file,
2219 IDENTIFIER_POINTER (cold_function_name));
2220 #endif
2221 }
2222 break;
2223
2224 case NOTE_INSN_BASIC_BLOCK:
2225 if (need_profile_function)
2226 {
2227 profile_function (asm_out_file);
2228 need_profile_function = false;
2229 }
2230
2231 if (targetm.asm_out.unwind_emit)
2232 targetm.asm_out.unwind_emit (asm_out_file, insn);
2233
2234 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2235
2236 break;
2237
2238 case NOTE_INSN_EH_REGION_BEG:
2239 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2240 NOTE_EH_HANDLER (insn));
2241 break;
2242
2243 case NOTE_INSN_EH_REGION_END:
2244 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2245 NOTE_EH_HANDLER (insn));
2246 break;
2247
2248 case NOTE_INSN_PROLOGUE_END:
2249 targetm.asm_out.function_end_prologue (file);
2250 profile_after_prologue (file);
2251
2252 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2253 {
2254 *seen |= SEEN_EMITTED;
2255 force_source_line = true;
2256 }
2257 else
2258 *seen |= SEEN_NOTE;
2259
2260 break;
2261
2262 case NOTE_INSN_EPILOGUE_BEG:
2263 if (!DECL_IGNORED_P (current_function_decl))
2264 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2265 targetm.asm_out.function_begin_epilogue (file);
2266 break;
2267
2268 case NOTE_INSN_CFI:
2269 dwarf2out_emit_cfi (NOTE_CFI (insn));
2270 break;
2271
2272 case NOTE_INSN_CFI_LABEL:
2273 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2274 NOTE_LABEL_NUMBER (insn));
2275 break;
2276
2277 case NOTE_INSN_FUNCTION_BEG:
2278 if (need_profile_function)
2279 {
2280 profile_function (asm_out_file);
2281 need_profile_function = false;
2282 }
2283
2284 app_disable ();
2285 if (!DECL_IGNORED_P (current_function_decl))
2286 debug_hooks->end_prologue (last_linenum, last_filename);
2287
2288 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2289 {
2290 *seen |= SEEN_EMITTED;
2291 force_source_line = true;
2292 }
2293 else
2294 *seen |= SEEN_NOTE;
2295
2296 break;
2297
2298 case NOTE_INSN_BLOCK_BEG:
2299 if (debug_info_level == DINFO_LEVEL_NORMAL
2300 || debug_info_level == DINFO_LEVEL_VERBOSE
2301 || write_symbols == DWARF2_DEBUG
2302 || write_symbols == VMS_AND_DWARF2_DEBUG
2303 || write_symbols == VMS_DEBUG)
2304 {
2305 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2306
2307 app_disable ();
2308 ++block_depth;
2309 high_block_linenum = last_linenum;
2310
2311 /* Output debugging info about the symbol-block beginning. */
2312 if (!DECL_IGNORED_P (current_function_decl))
2313 debug_hooks->begin_block (last_linenum, n);
2314
2315 /* Mark this block as output. */
2316 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2317 }
2318 if (write_symbols == DBX_DEBUG
2319 || write_symbols == SDB_DEBUG)
2320 {
2321 location_t *locus_ptr
2322 = block_nonartificial_location (NOTE_BLOCK (insn));
2323
2324 if (locus_ptr != NULL)
2325 {
2326 override_filename = LOCATION_FILE (*locus_ptr);
2327 override_linenum = LOCATION_LINE (*locus_ptr);
2328 }
2329 }
2330 break;
2331
2332 case NOTE_INSN_BLOCK_END:
2333 if (debug_info_level == DINFO_LEVEL_NORMAL
2334 || debug_info_level == DINFO_LEVEL_VERBOSE
2335 || write_symbols == DWARF2_DEBUG
2336 || write_symbols == VMS_AND_DWARF2_DEBUG
2337 || write_symbols == VMS_DEBUG)
2338 {
2339 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2340
2341 app_disable ();
2342
2343 /* End of a symbol-block. */
2344 --block_depth;
2345 gcc_assert (block_depth >= 0);
2346
2347 if (!DECL_IGNORED_P (current_function_decl))
2348 debug_hooks->end_block (high_block_linenum, n);
2349 }
2350 if (write_symbols == DBX_DEBUG
2351 || write_symbols == SDB_DEBUG)
2352 {
2353 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2354 location_t *locus_ptr
2355 = block_nonartificial_location (outer_block);
2356
2357 if (locus_ptr != NULL)
2358 {
2359 override_filename = LOCATION_FILE (*locus_ptr);
2360 override_linenum = LOCATION_LINE (*locus_ptr);
2361 }
2362 else
2363 {
2364 override_filename = NULL;
2365 override_linenum = 0;
2366 }
2367 }
2368 break;
2369
2370 case NOTE_INSN_DELETED_LABEL:
2371 /* Emit the label. We may have deleted the CODE_LABEL because
2372 the label could be proved to be unreachable, though still
2373 referenced (in the form of having its address taken. */
2374 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2375 break;
2376
2377 case NOTE_INSN_DELETED_DEBUG_LABEL:
2378 /* Similarly, but need to use different namespace for it. */
2379 if (CODE_LABEL_NUMBER (insn) != -1)
2380 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2381 break;
2382
2383 case NOTE_INSN_VAR_LOCATION:
2384 case NOTE_INSN_CALL_ARG_LOCATION:
2385 if (!DECL_IGNORED_P (current_function_decl))
2386 debug_hooks->var_location (insn);
2387 break;
2388
2389 default:
2390 gcc_unreachable ();
2391 break;
2392 }
2393 break;
2394
2395 case BARRIER:
2396 break;
2397
2398 case CODE_LABEL:
2399 /* The target port might emit labels in the output function for
2400 some insn, e.g. sh.c output_branchy_insn. */
2401 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2402 {
2403 int align = LABEL_TO_ALIGNMENT (insn);
2404 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2405 int max_skip = LABEL_TO_MAX_SKIP (insn);
2406 #endif
2407
2408 if (align && NEXT_INSN (insn))
2409 {
2410 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2411 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2412 #else
2413 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2414 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2415 #else
2416 ASM_OUTPUT_ALIGN (file, align);
2417 #endif
2418 #endif
2419 }
2420 }
2421 CC_STATUS_INIT;
2422
2423 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2424 debug_hooks->label (as_a <rtx_code_label *> (insn));
2425
2426 app_disable ();
2427
2428 next = next_nonnote_insn (insn);
2429 /* If this label is followed by a jump-table, make sure we put
2430 the label in the read-only section. Also possibly write the
2431 label and jump table together. */
2432 if (next != 0 && JUMP_TABLE_DATA_P (next))
2433 {
2434 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2435 /* In this case, the case vector is being moved by the
2436 target, so don't output the label at all. Leave that
2437 to the back end macros. */
2438 #else
2439 if (! JUMP_TABLES_IN_TEXT_SECTION)
2440 {
2441 int log_align;
2442
2443 switch_to_section (targetm.asm_out.function_rodata_section
2444 (current_function_decl));
2445
2446 #ifdef ADDR_VEC_ALIGN
2447 log_align = ADDR_VEC_ALIGN (next);
2448 #else
2449 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2450 #endif
2451 ASM_OUTPUT_ALIGN (file, log_align);
2452 }
2453 else
2454 switch_to_section (current_function_section ());
2455
2456 #ifdef ASM_OUTPUT_CASE_LABEL
2457 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2458 next);
2459 #else
2460 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2461 #endif
2462 #endif
2463 break;
2464 }
2465 if (LABEL_ALT_ENTRY_P (insn))
2466 output_alternate_entry_point (file, insn);
2467 else
2468 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2469 break;
2470
2471 default:
2472 {
2473 rtx body = PATTERN (insn);
2474 int insn_code_number;
2475 const char *templ;
2476 bool is_stmt;
2477
2478 /* Reset this early so it is correct for ASM statements. */
2479 current_insn_predicate = NULL_RTX;
2480
2481 /* An INSN, JUMP_INSN or CALL_INSN.
2482 First check for special kinds that recog doesn't recognize. */
2483
2484 if (GET_CODE (body) == USE /* These are just declarations. */
2485 || GET_CODE (body) == CLOBBER)
2486 break;
2487
2488 #if HAVE_cc0
2489 {
2490 /* If there is a REG_CC_SETTER note on this insn, it means that
2491 the setting of the condition code was done in the delay slot
2492 of the insn that branched here. So recover the cc status
2493 from the insn that set it. */
2494
2495 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2496 if (note)
2497 {
2498 rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0));
2499 NOTICE_UPDATE_CC (PATTERN (other), other);
2500 cc_prev_status = cc_status;
2501 }
2502 }
2503 #endif
2504
2505 /* Detect insns that are really jump-tables
2506 and output them as such. */
2507
2508 if (JUMP_TABLE_DATA_P (insn))
2509 {
2510 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2511 int vlen, idx;
2512 #endif
2513
2514 if (! JUMP_TABLES_IN_TEXT_SECTION)
2515 switch_to_section (targetm.asm_out.function_rodata_section
2516 (current_function_decl));
2517 else
2518 switch_to_section (current_function_section ());
2519
2520 app_disable ();
2521
2522 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2523 if (GET_CODE (body) == ADDR_VEC)
2524 {
2525 #ifdef ASM_OUTPUT_ADDR_VEC
2526 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2527 #else
2528 gcc_unreachable ();
2529 #endif
2530 }
2531 else
2532 {
2533 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2534 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2535 #else
2536 gcc_unreachable ();
2537 #endif
2538 }
2539 #else
2540 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2541 for (idx = 0; idx < vlen; idx++)
2542 {
2543 if (GET_CODE (body) == ADDR_VEC)
2544 {
2545 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2546 ASM_OUTPUT_ADDR_VEC_ELT
2547 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2548 #else
2549 gcc_unreachable ();
2550 #endif
2551 }
2552 else
2553 {
2554 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2555 ASM_OUTPUT_ADDR_DIFF_ELT
2556 (file,
2557 body,
2558 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2559 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2560 #else
2561 gcc_unreachable ();
2562 #endif
2563 }
2564 }
2565 #ifdef ASM_OUTPUT_CASE_END
2566 ASM_OUTPUT_CASE_END (file,
2567 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2568 insn);
2569 #endif
2570 #endif
2571
2572 switch_to_section (current_function_section ());
2573
2574 break;
2575 }
2576 /* Output this line note if it is the first or the last line
2577 note in a row. */
2578 if (!DECL_IGNORED_P (current_function_decl)
2579 && notice_source_line (insn, &is_stmt))
2580 (*debug_hooks->source_line) (last_linenum, last_filename,
2581 last_discriminator, is_stmt);
2582
2583 if (GET_CODE (body) == ASM_INPUT)
2584 {
2585 const char *string = XSTR (body, 0);
2586
2587 /* There's no telling what that did to the condition codes. */
2588 CC_STATUS_INIT;
2589
2590 if (string[0])
2591 {
2592 expanded_location loc;
2593
2594 app_enable ();
2595 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2596 if (*loc.file && loc.line)
2597 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2598 ASM_COMMENT_START, loc.line, loc.file);
2599 fprintf (asm_out_file, "\t%s\n", string);
2600 #if HAVE_AS_LINE_ZERO
2601 if (*loc.file && loc.line)
2602 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2603 #endif
2604 }
2605 break;
2606 }
2607
2608 /* Detect `asm' construct with operands. */
2609 if (asm_noperands (body) >= 0)
2610 {
2611 unsigned int noperands = asm_noperands (body);
2612 rtx *ops = XALLOCAVEC (rtx, noperands);
2613 const char *string;
2614 location_t loc;
2615 expanded_location expanded;
2616
2617 /* There's no telling what that did to the condition codes. */
2618 CC_STATUS_INIT;
2619
2620 /* Get out the operand values. */
2621 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2622 /* Inhibit dying on what would otherwise be compiler bugs. */
2623 insn_noperands = noperands;
2624 this_is_asm_operands = insn;
2625 expanded = expand_location (loc);
2626
2627 #ifdef FINAL_PRESCAN_INSN
2628 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2629 #endif
2630
2631 /* Output the insn using them. */
2632 if (string[0])
2633 {
2634 app_enable ();
2635 if (expanded.file && expanded.line)
2636 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2637 ASM_COMMENT_START, expanded.line, expanded.file);
2638 output_asm_insn (string, ops);
2639 #if HAVE_AS_LINE_ZERO
2640 if (expanded.file && expanded.line)
2641 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2642 #endif
2643 }
2644
2645 if (targetm.asm_out.final_postscan_insn)
2646 targetm.asm_out.final_postscan_insn (file, insn, ops,
2647 insn_noperands);
2648
2649 this_is_asm_operands = 0;
2650 break;
2651 }
2652
2653 app_disable ();
2654
2655 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
2656 {
2657 /* A delayed-branch sequence */
2658 int i;
2659
2660 final_sequence = seq;
2661
2662 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2663 force the restoration of a comparison that was previously
2664 thought unnecessary. If that happens, cancel this sequence
2665 and cause that insn to be restored. */
2666
2667 next = final_scan_insn (seq->insn (0), file, 0, 1, seen);
2668 if (next != seq->insn (1))
2669 {
2670 final_sequence = 0;
2671 return next;
2672 }
2673
2674 for (i = 1; i < seq->len (); i++)
2675 {
2676 rtx_insn *insn = seq->insn (i);
2677 rtx_insn *next = NEXT_INSN (insn);
2678 /* We loop in case any instruction in a delay slot gets
2679 split. */
2680 do
2681 insn = final_scan_insn (insn, file, 0, 1, seen);
2682 while (insn != next);
2683 }
2684 #ifdef DBR_OUTPUT_SEQEND
2685 DBR_OUTPUT_SEQEND (file);
2686 #endif
2687 final_sequence = 0;
2688
2689 /* If the insn requiring the delay slot was a CALL_INSN, the
2690 insns in the delay slot are actually executed before the
2691 called function. Hence we don't preserve any CC-setting
2692 actions in these insns and the CC must be marked as being
2693 clobbered by the function. */
2694 if (CALL_P (seq->insn (0)))
2695 {
2696 CC_STATUS_INIT;
2697 }
2698 break;
2699 }
2700
2701 /* We have a real machine instruction as rtl. */
2702
2703 body = PATTERN (insn);
2704
2705 #if HAVE_cc0
2706 set = single_set (insn);
2707
2708 /* Check for redundant test and compare instructions
2709 (when the condition codes are already set up as desired).
2710 This is done only when optimizing; if not optimizing,
2711 it should be possible for the user to alter a variable
2712 with the debugger in between statements
2713 and the next statement should reexamine the variable
2714 to compute the condition codes. */
2715
2716 if (optimize_p)
2717 {
2718 if (set
2719 && GET_CODE (SET_DEST (set)) == CC0
2720 && insn != last_ignored_compare)
2721 {
2722 rtx src1, src2;
2723 if (GET_CODE (SET_SRC (set)) == SUBREG)
2724 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2725
2726 src1 = SET_SRC (set);
2727 src2 = NULL_RTX;
2728 if (GET_CODE (SET_SRC (set)) == COMPARE)
2729 {
2730 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2731 XEXP (SET_SRC (set), 0)
2732 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2733 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2734 XEXP (SET_SRC (set), 1)
2735 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2736 if (XEXP (SET_SRC (set), 1)
2737 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2738 src2 = XEXP (SET_SRC (set), 0);
2739 }
2740 if ((cc_status.value1 != 0
2741 && rtx_equal_p (src1, cc_status.value1))
2742 || (cc_status.value2 != 0
2743 && rtx_equal_p (src1, cc_status.value2))
2744 || (src2 != 0 && cc_status.value1 != 0
2745 && rtx_equal_p (src2, cc_status.value1))
2746 || (src2 != 0 && cc_status.value2 != 0
2747 && rtx_equal_p (src2, cc_status.value2)))
2748 {
2749 /* Don't delete insn if it has an addressing side-effect. */
2750 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2751 /* or if anything in it is volatile. */
2752 && ! volatile_refs_p (PATTERN (insn)))
2753 {
2754 /* We don't really delete the insn; just ignore it. */
2755 last_ignored_compare = insn;
2756 break;
2757 }
2758 }
2759 }
2760 }
2761
2762 /* If this is a conditional branch, maybe modify it
2763 if the cc's are in a nonstandard state
2764 so that it accomplishes the same thing that it would
2765 do straightforwardly if the cc's were set up normally. */
2766
2767 if (cc_status.flags != 0
2768 && JUMP_P (insn)
2769 && GET_CODE (body) == SET
2770 && SET_DEST (body) == pc_rtx
2771 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2772 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2773 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2774 {
2775 /* This function may alter the contents of its argument
2776 and clear some of the cc_status.flags bits.
2777 It may also return 1 meaning condition now always true
2778 or -1 meaning condition now always false
2779 or 2 meaning condition nontrivial but altered. */
2780 int result = alter_cond (XEXP (SET_SRC (body), 0));
2781 /* If condition now has fixed value, replace the IF_THEN_ELSE
2782 with its then-operand or its else-operand. */
2783 if (result == 1)
2784 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2785 if (result == -1)
2786 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2787
2788 /* The jump is now either unconditional or a no-op.
2789 If it has become a no-op, don't try to output it.
2790 (It would not be recognized.) */
2791 if (SET_SRC (body) == pc_rtx)
2792 {
2793 delete_insn (insn);
2794 break;
2795 }
2796 else if (ANY_RETURN_P (SET_SRC (body)))
2797 /* Replace (set (pc) (return)) with (return). */
2798 PATTERN (insn) = body = SET_SRC (body);
2799
2800 /* Rerecognize the instruction if it has changed. */
2801 if (result != 0)
2802 INSN_CODE (insn) = -1;
2803 }
2804
2805 /* If this is a conditional trap, maybe modify it if the cc's
2806 are in a nonstandard state so that it accomplishes the same
2807 thing that it would do straightforwardly if the cc's were
2808 set up normally. */
2809 if (cc_status.flags != 0
2810 && NONJUMP_INSN_P (insn)
2811 && GET_CODE (body) == TRAP_IF
2812 && COMPARISON_P (TRAP_CONDITION (body))
2813 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2814 {
2815 /* This function may alter the contents of its argument
2816 and clear some of the cc_status.flags bits.
2817 It may also return 1 meaning condition now always true
2818 or -1 meaning condition now always false
2819 or 2 meaning condition nontrivial but altered. */
2820 int result = alter_cond (TRAP_CONDITION (body));
2821
2822 /* If TRAP_CONDITION has become always false, delete the
2823 instruction. */
2824 if (result == -1)
2825 {
2826 delete_insn (insn);
2827 break;
2828 }
2829
2830 /* If TRAP_CONDITION has become always true, replace
2831 TRAP_CONDITION with const_true_rtx. */
2832 if (result == 1)
2833 TRAP_CONDITION (body) = const_true_rtx;
2834
2835 /* Rerecognize the instruction if it has changed. */
2836 if (result != 0)
2837 INSN_CODE (insn) = -1;
2838 }
2839
2840 /* Make same adjustments to instructions that examine the
2841 condition codes without jumping and instructions that
2842 handle conditional moves (if this machine has either one). */
2843
2844 if (cc_status.flags != 0
2845 && set != 0)
2846 {
2847 rtx cond_rtx, then_rtx, else_rtx;
2848
2849 if (!JUMP_P (insn)
2850 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2851 {
2852 cond_rtx = XEXP (SET_SRC (set), 0);
2853 then_rtx = XEXP (SET_SRC (set), 1);
2854 else_rtx = XEXP (SET_SRC (set), 2);
2855 }
2856 else
2857 {
2858 cond_rtx = SET_SRC (set);
2859 then_rtx = const_true_rtx;
2860 else_rtx = const0_rtx;
2861 }
2862
2863 if (COMPARISON_P (cond_rtx)
2864 && XEXP (cond_rtx, 0) == cc0_rtx)
2865 {
2866 int result;
2867 result = alter_cond (cond_rtx);
2868 if (result == 1)
2869 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2870 else if (result == -1)
2871 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2872 else if (result == 2)
2873 INSN_CODE (insn) = -1;
2874 if (SET_DEST (set) == SET_SRC (set))
2875 delete_insn (insn);
2876 }
2877 }
2878
2879 #endif
2880
2881 /* Do machine-specific peephole optimizations if desired. */
2882
2883 if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes)
2884 {
2885 rtx_insn *next = peephole (insn);
2886 /* When peepholing, if there were notes within the peephole,
2887 emit them before the peephole. */
2888 if (next != 0 && next != NEXT_INSN (insn))
2889 {
2890 rtx_insn *note, *prev = PREV_INSN (insn);
2891
2892 for (note = NEXT_INSN (insn); note != next;
2893 note = NEXT_INSN (note))
2894 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2895
2896 /* Put the notes in the proper position for a later
2897 rescan. For example, the SH target can do this
2898 when generating a far jump in a delayed branch
2899 sequence. */
2900 note = NEXT_INSN (insn);
2901 SET_PREV_INSN (note) = prev;
2902 SET_NEXT_INSN (prev) = note;
2903 SET_NEXT_INSN (PREV_INSN (next)) = insn;
2904 SET_PREV_INSN (insn) = PREV_INSN (next);
2905 SET_NEXT_INSN (insn) = next;
2906 SET_PREV_INSN (next) = insn;
2907 }
2908
2909 /* PEEPHOLE might have changed this. */
2910 body = PATTERN (insn);
2911 }
2912
2913 /* Try to recognize the instruction.
2914 If successful, verify that the operands satisfy the
2915 constraints for the instruction. Crash if they don't,
2916 since `reload' should have changed them so that they do. */
2917
2918 insn_code_number = recog_memoized (insn);
2919 cleanup_subreg_operands (insn);
2920
2921 /* Dump the insn in the assembly for debugging (-dAP).
2922 If the final dump is requested as slim RTL, dump slim
2923 RTL to the assembly file also. */
2924 if (flag_dump_rtl_in_asm)
2925 {
2926 print_rtx_head = ASM_COMMENT_START;
2927 if (! (dump_flags & TDF_SLIM))
2928 print_rtl_single (asm_out_file, insn);
2929 else
2930 dump_insn_slim (asm_out_file, insn);
2931 print_rtx_head = "";
2932 }
2933
2934 if (! constrain_operands_cached (insn, 1))
2935 fatal_insn_not_found (insn);
2936
2937 /* Some target machines need to prescan each insn before
2938 it is output. */
2939
2940 #ifdef FINAL_PRESCAN_INSN
2941 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2942 #endif
2943
2944 if (targetm.have_conditional_execution ()
2945 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2946 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2947
2948 #if HAVE_cc0
2949 cc_prev_status = cc_status;
2950
2951 /* Update `cc_status' for this instruction.
2952 The instruction's output routine may change it further.
2953 If the output routine for a jump insn needs to depend
2954 on the cc status, it should look at cc_prev_status. */
2955
2956 NOTICE_UPDATE_CC (body, insn);
2957 #endif
2958
2959 current_output_insn = debug_insn = insn;
2960
2961 /* Find the proper template for this insn. */
2962 templ = get_insn_template (insn_code_number, insn);
2963
2964 /* If the C code returns 0, it means that it is a jump insn
2965 which follows a deleted test insn, and that test insn
2966 needs to be reinserted. */
2967 if (templ == 0)
2968 {
2969 rtx_insn *prev;
2970
2971 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2972
2973 /* We have already processed the notes between the setter and
2974 the user. Make sure we don't process them again, this is
2975 particularly important if one of the notes is a block
2976 scope note or an EH note. */
2977 for (prev = insn;
2978 prev != last_ignored_compare;
2979 prev = PREV_INSN (prev))
2980 {
2981 if (NOTE_P (prev))
2982 delete_insn (prev); /* Use delete_note. */
2983 }
2984
2985 return prev;
2986 }
2987
2988 /* If the template is the string "#", it means that this insn must
2989 be split. */
2990 if (templ[0] == '#' && templ[1] == '\0')
2991 {
2992 rtx_insn *new_rtx = try_split (body, insn, 0);
2993
2994 /* If we didn't split the insn, go away. */
2995 if (new_rtx == insn && PATTERN (new_rtx) == body)
2996 fatal_insn ("could not split insn", insn);
2997
2998 /* If we have a length attribute, this instruction should have
2999 been split in shorten_branches, to ensure that we would have
3000 valid length info for the splitees. */
3001 gcc_assert (!HAVE_ATTR_length);
3002
3003 return new_rtx;
3004 }
3005
3006 /* ??? This will put the directives in the wrong place if
3007 get_insn_template outputs assembly directly. However calling it
3008 before get_insn_template breaks if the insns is split. */
3009 if (targetm.asm_out.unwind_emit_before_insn
3010 && targetm.asm_out.unwind_emit)
3011 targetm.asm_out.unwind_emit (asm_out_file, insn);
3012
3013 if (rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn))
3014 {
3015 rtx x = call_from_call_insn (call_insn);
3016 x = XEXP (x, 0);
3017 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
3018 {
3019 tree t;
3020 x = XEXP (x, 0);
3021 t = SYMBOL_REF_DECL (x);
3022 if (t)
3023 assemble_external (t);
3024 }
3025 if (!DECL_IGNORED_P (current_function_decl))
3026 debug_hooks->var_location (insn);
3027 }
3028
3029 /* Output assembler code from the template. */
3030 output_asm_insn (templ, recog_data.operand);
3031
3032 /* Some target machines need to postscan each insn after
3033 it is output. */
3034 if (targetm.asm_out.final_postscan_insn)
3035 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
3036 recog_data.n_operands);
3037
3038 if (!targetm.asm_out.unwind_emit_before_insn
3039 && targetm.asm_out.unwind_emit)
3040 targetm.asm_out.unwind_emit (asm_out_file, insn);
3041
3042 current_output_insn = debug_insn = 0;
3043 }
3044 }
3045 return NEXT_INSN (insn);
3046 }
3047 \f
3048 /* Return whether a source line note needs to be emitted before INSN.
3049 Sets IS_STMT to TRUE if the line should be marked as a possible
3050 breakpoint location. */
3051
3052 static bool
3053 notice_source_line (rtx_insn *insn, bool *is_stmt)
3054 {
3055 const char *filename;
3056 int linenum;
3057
3058 if (override_filename)
3059 {
3060 filename = override_filename;
3061 linenum = override_linenum;
3062 }
3063 else if (INSN_HAS_LOCATION (insn))
3064 {
3065 expanded_location xloc = insn_location (insn);
3066 filename = xloc.file;
3067 linenum = xloc.line;
3068 }
3069 else
3070 {
3071 filename = NULL;
3072 linenum = 0;
3073 }
3074
3075 if (filename == NULL)
3076 return false;
3077
3078 if (force_source_line
3079 || filename != last_filename
3080 || last_linenum != linenum)
3081 {
3082 force_source_line = false;
3083 last_filename = filename;
3084 last_linenum = linenum;
3085 last_discriminator = discriminator;
3086 *is_stmt = true;
3087 high_block_linenum = MAX (last_linenum, high_block_linenum);
3088 high_function_linenum = MAX (last_linenum, high_function_linenum);
3089 return true;
3090 }
3091
3092 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3093 {
3094 /* If the discriminator changed, but the line number did not,
3095 output the line table entry with is_stmt false so the
3096 debugger does not treat this as a breakpoint location. */
3097 last_discriminator = discriminator;
3098 *is_stmt = false;
3099 return true;
3100 }
3101
3102 return false;
3103 }
3104 \f
3105 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3106 directly to the desired hard register. */
3107
3108 void
3109 cleanup_subreg_operands (rtx_insn *insn)
3110 {
3111 int i;
3112 bool changed = false;
3113 extract_insn_cached (insn);
3114 for (i = 0; i < recog_data.n_operands; i++)
3115 {
3116 /* The following test cannot use recog_data.operand when testing
3117 for a SUBREG: the underlying object might have been changed
3118 already if we are inside a match_operator expression that
3119 matches the else clause. Instead we test the underlying
3120 expression directly. */
3121 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3122 {
3123 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3124 changed = true;
3125 }
3126 else if (GET_CODE (recog_data.operand[i]) == PLUS
3127 || GET_CODE (recog_data.operand[i]) == MULT
3128 || MEM_P (recog_data.operand[i]))
3129 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3130 }
3131
3132 for (i = 0; i < recog_data.n_dups; i++)
3133 {
3134 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3135 {
3136 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3137 changed = true;
3138 }
3139 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3140 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3141 || MEM_P (*recog_data.dup_loc[i]))
3142 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3143 }
3144 if (changed)
3145 df_insn_rescan (insn);
3146 }
3147
3148 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3149 the thing it is a subreg of. Do it anyway if FINAL_P. */
3150
3151 rtx
3152 alter_subreg (rtx *xp, bool final_p)
3153 {
3154 rtx x = *xp;
3155 rtx y = SUBREG_REG (x);
3156
3157 /* simplify_subreg does not remove subreg from volatile references.
3158 We are required to. */
3159 if (MEM_P (y))
3160 {
3161 int offset = SUBREG_BYTE (x);
3162
3163 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3164 contains 0 instead of the proper offset. See simplify_subreg. */
3165 if (offset == 0
3166 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
3167 {
3168 int difference = GET_MODE_SIZE (GET_MODE (y))
3169 - GET_MODE_SIZE (GET_MODE (x));
3170 if (WORDS_BIG_ENDIAN)
3171 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3172 if (BYTES_BIG_ENDIAN)
3173 offset += difference % UNITS_PER_WORD;
3174 }
3175
3176 if (final_p)
3177 *xp = adjust_address (y, GET_MODE (x), offset);
3178 else
3179 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3180 }
3181 else if (REG_P (y) && HARD_REGISTER_P (y))
3182 {
3183 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3184 SUBREG_BYTE (x));
3185
3186 if (new_rtx != 0)
3187 *xp = new_rtx;
3188 else if (final_p && REG_P (y))
3189 {
3190 /* Simplify_subreg can't handle some REG cases, but we have to. */
3191 unsigned int regno;
3192 HOST_WIDE_INT offset;
3193
3194 regno = subreg_regno (x);
3195 if (subreg_lowpart_p (x))
3196 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3197 else
3198 offset = SUBREG_BYTE (x);
3199 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3200 }
3201 }
3202
3203 return *xp;
3204 }
3205
3206 /* Do alter_subreg on all the SUBREGs contained in X. */
3207
3208 static rtx
3209 walk_alter_subreg (rtx *xp, bool *changed)
3210 {
3211 rtx x = *xp;
3212 switch (GET_CODE (x))
3213 {
3214 case PLUS:
3215 case MULT:
3216 case AND:
3217 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3218 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3219 break;
3220
3221 case MEM:
3222 case ZERO_EXTEND:
3223 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3224 break;
3225
3226 case SUBREG:
3227 *changed = true;
3228 return alter_subreg (xp, true);
3229
3230 default:
3231 break;
3232 }
3233
3234 return *xp;
3235 }
3236 \f
3237 #if HAVE_cc0
3238
3239 /* Given BODY, the body of a jump instruction, alter the jump condition
3240 as required by the bits that are set in cc_status.flags.
3241 Not all of the bits there can be handled at this level in all cases.
3242
3243 The value is normally 0.
3244 1 means that the condition has become always true.
3245 -1 means that the condition has become always false.
3246 2 means that COND has been altered. */
3247
3248 static int
3249 alter_cond (rtx cond)
3250 {
3251 int value = 0;
3252
3253 if (cc_status.flags & CC_REVERSED)
3254 {
3255 value = 2;
3256 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3257 }
3258
3259 if (cc_status.flags & CC_INVERTED)
3260 {
3261 value = 2;
3262 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3263 }
3264
3265 if (cc_status.flags & CC_NOT_POSITIVE)
3266 switch (GET_CODE (cond))
3267 {
3268 case LE:
3269 case LEU:
3270 case GEU:
3271 /* Jump becomes unconditional. */
3272 return 1;
3273
3274 case GT:
3275 case GTU:
3276 case LTU:
3277 /* Jump becomes no-op. */
3278 return -1;
3279
3280 case GE:
3281 PUT_CODE (cond, EQ);
3282 value = 2;
3283 break;
3284
3285 case LT:
3286 PUT_CODE (cond, NE);
3287 value = 2;
3288 break;
3289
3290 default:
3291 break;
3292 }
3293
3294 if (cc_status.flags & CC_NOT_NEGATIVE)
3295 switch (GET_CODE (cond))
3296 {
3297 case GE:
3298 case GEU:
3299 /* Jump becomes unconditional. */
3300 return 1;
3301
3302 case LT:
3303 case LTU:
3304 /* Jump becomes no-op. */
3305 return -1;
3306
3307 case LE:
3308 case LEU:
3309 PUT_CODE (cond, EQ);
3310 value = 2;
3311 break;
3312
3313 case GT:
3314 case GTU:
3315 PUT_CODE (cond, NE);
3316 value = 2;
3317 break;
3318
3319 default:
3320 break;
3321 }
3322
3323 if (cc_status.flags & CC_NO_OVERFLOW)
3324 switch (GET_CODE (cond))
3325 {
3326 case GEU:
3327 /* Jump becomes unconditional. */
3328 return 1;
3329
3330 case LEU:
3331 PUT_CODE (cond, EQ);
3332 value = 2;
3333 break;
3334
3335 case GTU:
3336 PUT_CODE (cond, NE);
3337 value = 2;
3338 break;
3339
3340 case LTU:
3341 /* Jump becomes no-op. */
3342 return -1;
3343
3344 default:
3345 break;
3346 }
3347
3348 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3349 switch (GET_CODE (cond))
3350 {
3351 default:
3352 gcc_unreachable ();
3353
3354 case NE:
3355 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3356 value = 2;
3357 break;
3358
3359 case EQ:
3360 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3361 value = 2;
3362 break;
3363 }
3364
3365 if (cc_status.flags & CC_NOT_SIGNED)
3366 /* The flags are valid if signed condition operators are converted
3367 to unsigned. */
3368 switch (GET_CODE (cond))
3369 {
3370 case LE:
3371 PUT_CODE (cond, LEU);
3372 value = 2;
3373 break;
3374
3375 case LT:
3376 PUT_CODE (cond, LTU);
3377 value = 2;
3378 break;
3379
3380 case GT:
3381 PUT_CODE (cond, GTU);
3382 value = 2;
3383 break;
3384
3385 case GE:
3386 PUT_CODE (cond, GEU);
3387 value = 2;
3388 break;
3389
3390 default:
3391 break;
3392 }
3393
3394 return value;
3395 }
3396 #endif
3397 \f
3398 /* Report inconsistency between the assembler template and the operands.
3399 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3400
3401 void
3402 output_operand_lossage (const char *cmsgid, ...)
3403 {
3404 char *fmt_string;
3405 char *new_message;
3406 const char *pfx_str;
3407 va_list ap;
3408
3409 va_start (ap, cmsgid);
3410
3411 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3412 fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid));
3413 new_message = xvasprintf (fmt_string, ap);
3414
3415 if (this_is_asm_operands)
3416 error_for_asm (this_is_asm_operands, "%s", new_message);
3417 else
3418 internal_error ("%s", new_message);
3419
3420 free (fmt_string);
3421 free (new_message);
3422 va_end (ap);
3423 }
3424 \f
3425 /* Output of assembler code from a template, and its subroutines. */
3426
3427 /* Annotate the assembly with a comment describing the pattern and
3428 alternative used. */
3429
3430 static void
3431 output_asm_name (void)
3432 {
3433 if (debug_insn)
3434 {
3435 int num = INSN_CODE (debug_insn);
3436 fprintf (asm_out_file, "\t%s %d\t%s",
3437 ASM_COMMENT_START, INSN_UID (debug_insn),
3438 insn_data[num].name);
3439 if (insn_data[num].n_alternatives > 1)
3440 fprintf (asm_out_file, "/%d", which_alternative + 1);
3441
3442 if (HAVE_ATTR_length)
3443 fprintf (asm_out_file, "\t[length = %d]",
3444 get_attr_length (debug_insn));
3445
3446 /* Clear this so only the first assembler insn
3447 of any rtl insn will get the special comment for -dp. */
3448 debug_insn = 0;
3449 }
3450 }
3451
3452 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3453 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3454 corresponds to the address of the object and 0 if to the object. */
3455
3456 static tree
3457 get_mem_expr_from_op (rtx op, int *paddressp)
3458 {
3459 tree expr;
3460 int inner_addressp;
3461
3462 *paddressp = 0;
3463
3464 if (REG_P (op))
3465 return REG_EXPR (op);
3466 else if (!MEM_P (op))
3467 return 0;
3468
3469 if (MEM_EXPR (op) != 0)
3470 return MEM_EXPR (op);
3471
3472 /* Otherwise we have an address, so indicate it and look at the address. */
3473 *paddressp = 1;
3474 op = XEXP (op, 0);
3475
3476 /* First check if we have a decl for the address, then look at the right side
3477 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3478 But don't allow the address to itself be indirect. */
3479 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3480 return expr;
3481 else if (GET_CODE (op) == PLUS
3482 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3483 return expr;
3484
3485 while (UNARY_P (op)
3486 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3487 op = XEXP (op, 0);
3488
3489 expr = get_mem_expr_from_op (op, &inner_addressp);
3490 return inner_addressp ? 0 : expr;
3491 }
3492
3493 /* Output operand names for assembler instructions. OPERANDS is the
3494 operand vector, OPORDER is the order to write the operands, and NOPS
3495 is the number of operands to write. */
3496
3497 static void
3498 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3499 {
3500 int wrote = 0;
3501 int i;
3502
3503 for (i = 0; i < nops; i++)
3504 {
3505 int addressp;
3506 rtx op = operands[oporder[i]];
3507 tree expr = get_mem_expr_from_op (op, &addressp);
3508
3509 fprintf (asm_out_file, "%c%s",
3510 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3511 wrote = 1;
3512 if (expr)
3513 {
3514 fprintf (asm_out_file, "%s",
3515 addressp ? "*" : "");
3516 print_mem_expr (asm_out_file, expr);
3517 wrote = 1;
3518 }
3519 else if (REG_P (op) && ORIGINAL_REGNO (op)
3520 && ORIGINAL_REGNO (op) != REGNO (op))
3521 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3522 }
3523 }
3524
3525 #ifdef ASSEMBLER_DIALECT
3526 /* Helper function to parse assembler dialects in the asm string.
3527 This is called from output_asm_insn and asm_fprintf. */
3528 static const char *
3529 do_assembler_dialects (const char *p, int *dialect)
3530 {
3531 char c = *(p - 1);
3532
3533 switch (c)
3534 {
3535 case '{':
3536 {
3537 int i;
3538
3539 if (*dialect)
3540 output_operand_lossage ("nested assembly dialect alternatives");
3541 else
3542 *dialect = 1;
3543
3544 /* If we want the first dialect, do nothing. Otherwise, skip
3545 DIALECT_NUMBER of strings ending with '|'. */
3546 for (i = 0; i < dialect_number; i++)
3547 {
3548 while (*p && *p != '}')
3549 {
3550 if (*p == '|')
3551 {
3552 p++;
3553 break;
3554 }
3555
3556 /* Skip over any character after a percent sign. */
3557 if (*p == '%')
3558 p++;
3559 if (*p)
3560 p++;
3561 }
3562
3563 if (*p == '}')
3564 break;
3565 }
3566
3567 if (*p == '\0')
3568 output_operand_lossage ("unterminated assembly dialect alternative");
3569 }
3570 break;
3571
3572 case '|':
3573 if (*dialect)
3574 {
3575 /* Skip to close brace. */
3576 do
3577 {
3578 if (*p == '\0')
3579 {
3580 output_operand_lossage ("unterminated assembly dialect alternative");
3581 break;
3582 }
3583
3584 /* Skip over any character after a percent sign. */
3585 if (*p == '%' && p[1])
3586 {
3587 p += 2;
3588 continue;
3589 }
3590
3591 if (*p++ == '}')
3592 break;
3593 }
3594 while (1);
3595
3596 *dialect = 0;
3597 }
3598 else
3599 putc (c, asm_out_file);
3600 break;
3601
3602 case '}':
3603 if (! *dialect)
3604 putc (c, asm_out_file);
3605 *dialect = 0;
3606 break;
3607 default:
3608 gcc_unreachable ();
3609 }
3610
3611 return p;
3612 }
3613 #endif
3614
3615 /* Output text from TEMPLATE to the assembler output file,
3616 obeying %-directions to substitute operands taken from
3617 the vector OPERANDS.
3618
3619 %N (for N a digit) means print operand N in usual manner.
3620 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3621 and print the label name with no punctuation.
3622 %cN means require operand N to be a constant
3623 and print the constant expression with no punctuation.
3624 %aN means expect operand N to be a memory address
3625 (not a memory reference!) and print a reference
3626 to that address.
3627 %nN means expect operand N to be a constant
3628 and print a constant expression for minus the value
3629 of the operand, with no other punctuation. */
3630
3631 void
3632 output_asm_insn (const char *templ, rtx *operands)
3633 {
3634 const char *p;
3635 int c;
3636 #ifdef ASSEMBLER_DIALECT
3637 int dialect = 0;
3638 #endif
3639 int oporder[MAX_RECOG_OPERANDS];
3640 char opoutput[MAX_RECOG_OPERANDS];
3641 int ops = 0;
3642
3643 /* An insn may return a null string template
3644 in a case where no assembler code is needed. */
3645 if (*templ == 0)
3646 return;
3647
3648 memset (opoutput, 0, sizeof opoutput);
3649 p = templ;
3650 putc ('\t', asm_out_file);
3651
3652 #ifdef ASM_OUTPUT_OPCODE
3653 ASM_OUTPUT_OPCODE (asm_out_file, p);
3654 #endif
3655
3656 while ((c = *p++))
3657 switch (c)
3658 {
3659 case '\n':
3660 if (flag_verbose_asm)
3661 output_asm_operand_names (operands, oporder, ops);
3662 if (flag_print_asm_name)
3663 output_asm_name ();
3664
3665 ops = 0;
3666 memset (opoutput, 0, sizeof opoutput);
3667
3668 putc (c, asm_out_file);
3669 #ifdef ASM_OUTPUT_OPCODE
3670 while ((c = *p) == '\t')
3671 {
3672 putc (c, asm_out_file);
3673 p++;
3674 }
3675 ASM_OUTPUT_OPCODE (asm_out_file, p);
3676 #endif
3677 break;
3678
3679 #ifdef ASSEMBLER_DIALECT
3680 case '{':
3681 case '}':
3682 case '|':
3683 p = do_assembler_dialects (p, &dialect);
3684 break;
3685 #endif
3686
3687 case '%':
3688 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3689 if ASSEMBLER_DIALECT defined and these characters have a special
3690 meaning as dialect delimiters.*/
3691 if (*p == '%'
3692 #ifdef ASSEMBLER_DIALECT
3693 || *p == '{' || *p == '}' || *p == '|'
3694 #endif
3695 )
3696 {
3697 putc (*p, asm_out_file);
3698 p++;
3699 }
3700 /* %= outputs a number which is unique to each insn in the entire
3701 compilation. This is useful for making local labels that are
3702 referred to more than once in a given insn. */
3703 else if (*p == '=')
3704 {
3705 p++;
3706 fprintf (asm_out_file, "%d", insn_counter);
3707 }
3708 /* % followed by a letter and some digits
3709 outputs an operand in a special way depending on the letter.
3710 Letters `acln' are implemented directly.
3711 Other letters are passed to `output_operand' so that
3712 the TARGET_PRINT_OPERAND hook can define them. */
3713 else if (ISALPHA (*p))
3714 {
3715 int letter = *p++;
3716 unsigned long opnum;
3717 char *endptr;
3718
3719 opnum = strtoul (p, &endptr, 10);
3720
3721 if (endptr == p)
3722 output_operand_lossage ("operand number missing "
3723 "after %%-letter");
3724 else if (this_is_asm_operands && opnum >= insn_noperands)
3725 output_operand_lossage ("operand number out of range");
3726 else if (letter == 'l')
3727 output_asm_label (operands[opnum]);
3728 else if (letter == 'a')
3729 output_address (operands[opnum]);
3730 else if (letter == 'c')
3731 {
3732 if (CONSTANT_ADDRESS_P (operands[opnum]))
3733 output_addr_const (asm_out_file, operands[opnum]);
3734 else
3735 output_operand (operands[opnum], 'c');
3736 }
3737 else if (letter == 'n')
3738 {
3739 if (CONST_INT_P (operands[opnum]))
3740 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3741 - INTVAL (operands[opnum]));
3742 else
3743 {
3744 putc ('-', asm_out_file);
3745 output_addr_const (asm_out_file, operands[opnum]);
3746 }
3747 }
3748 else
3749 output_operand (operands[opnum], letter);
3750
3751 if (!opoutput[opnum])
3752 oporder[ops++] = opnum;
3753 opoutput[opnum] = 1;
3754
3755 p = endptr;
3756 c = *p;
3757 }
3758 /* % followed by a digit outputs an operand the default way. */
3759 else if (ISDIGIT (*p))
3760 {
3761 unsigned long opnum;
3762 char *endptr;
3763
3764 opnum = strtoul (p, &endptr, 10);
3765 if (this_is_asm_operands && opnum >= insn_noperands)
3766 output_operand_lossage ("operand number out of range");
3767 else
3768 output_operand (operands[opnum], 0);
3769
3770 if (!opoutput[opnum])
3771 oporder[ops++] = opnum;
3772 opoutput[opnum] = 1;
3773
3774 p = endptr;
3775 c = *p;
3776 }
3777 /* % followed by punctuation: output something for that
3778 punctuation character alone, with no operand. The
3779 TARGET_PRINT_OPERAND hook decides what is actually done. */
3780 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3781 output_operand (NULL_RTX, *p++);
3782 else
3783 output_operand_lossage ("invalid %%-code");
3784 break;
3785
3786 default:
3787 putc (c, asm_out_file);
3788 }
3789
3790 /* Write out the variable names for operands, if we know them. */
3791 if (flag_verbose_asm)
3792 output_asm_operand_names (operands, oporder, ops);
3793 if (flag_print_asm_name)
3794 output_asm_name ();
3795
3796 putc ('\n', asm_out_file);
3797 }
3798 \f
3799 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3800
3801 void
3802 output_asm_label (rtx x)
3803 {
3804 char buf[256];
3805
3806 if (GET_CODE (x) == LABEL_REF)
3807 x = LABEL_REF_LABEL (x);
3808 if (LABEL_P (x)
3809 || (NOTE_P (x)
3810 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3811 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3812 else
3813 output_operand_lossage ("'%%l' operand isn't a label");
3814
3815 assemble_name (asm_out_file, buf);
3816 }
3817
3818 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3819
3820 void
3821 mark_symbol_refs_as_used (rtx x)
3822 {
3823 subrtx_iterator::array_type array;
3824 FOR_EACH_SUBRTX (iter, array, x, ALL)
3825 {
3826 const_rtx x = *iter;
3827 if (GET_CODE (x) == SYMBOL_REF)
3828 if (tree t = SYMBOL_REF_DECL (x))
3829 assemble_external (t);
3830 }
3831 }
3832
3833 /* Print operand X using machine-dependent assembler syntax.
3834 CODE is a non-digit that preceded the operand-number in the % spec,
3835 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3836 between the % and the digits.
3837 When CODE is a non-letter, X is 0.
3838
3839 The meanings of the letters are machine-dependent and controlled
3840 by TARGET_PRINT_OPERAND. */
3841
3842 void
3843 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3844 {
3845 if (x && GET_CODE (x) == SUBREG)
3846 x = alter_subreg (&x, true);
3847
3848 /* X must not be a pseudo reg. */
3849 if (!targetm.no_register_allocation)
3850 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3851
3852 targetm.asm_out.print_operand (asm_out_file, x, code);
3853
3854 if (x == NULL_RTX)
3855 return;
3856
3857 mark_symbol_refs_as_used (x);
3858 }
3859
3860 /* Print a memory reference operand for address X using
3861 machine-dependent assembler syntax. */
3862
3863 void
3864 output_address (rtx x)
3865 {
3866 bool changed = false;
3867 walk_alter_subreg (&x, &changed);
3868 targetm.asm_out.print_operand_address (asm_out_file, x);
3869 }
3870 \f
3871 /* Print an integer constant expression in assembler syntax.
3872 Addition and subtraction are the only arithmetic
3873 that may appear in these expressions. */
3874
3875 void
3876 output_addr_const (FILE *file, rtx x)
3877 {
3878 char buf[256];
3879
3880 restart:
3881 switch (GET_CODE (x))
3882 {
3883 case PC:
3884 putc ('.', file);
3885 break;
3886
3887 case SYMBOL_REF:
3888 if (SYMBOL_REF_DECL (x))
3889 assemble_external (SYMBOL_REF_DECL (x));
3890 #ifdef ASM_OUTPUT_SYMBOL_REF
3891 ASM_OUTPUT_SYMBOL_REF (file, x);
3892 #else
3893 assemble_name (file, XSTR (x, 0));
3894 #endif
3895 break;
3896
3897 case LABEL_REF:
3898 x = LABEL_REF_LABEL (x);
3899 /* Fall through. */
3900 case CODE_LABEL:
3901 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3902 #ifdef ASM_OUTPUT_LABEL_REF
3903 ASM_OUTPUT_LABEL_REF (file, buf);
3904 #else
3905 assemble_name (file, buf);
3906 #endif
3907 break;
3908
3909 case CONST_INT:
3910 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3911 break;
3912
3913 case CONST:
3914 /* This used to output parentheses around the expression,
3915 but that does not work on the 386 (either ATT or BSD assembler). */
3916 output_addr_const (file, XEXP (x, 0));
3917 break;
3918
3919 case CONST_WIDE_INT:
3920 /* We do not know the mode here so we have to use a round about
3921 way to build a wide-int to get it printed properly. */
3922 {
3923 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
3924 CONST_WIDE_INT_NUNITS (x),
3925 CONST_WIDE_INT_NUNITS (x)
3926 * HOST_BITS_PER_WIDE_INT,
3927 false);
3928 print_decs (w, file);
3929 }
3930 break;
3931
3932 case CONST_DOUBLE:
3933 if (CONST_DOUBLE_AS_INT_P (x))
3934 {
3935 /* We can use %d if the number is one word and positive. */
3936 if (CONST_DOUBLE_HIGH (x))
3937 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3938 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3939 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3940 else if (CONST_DOUBLE_LOW (x) < 0)
3941 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3942 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3943 else
3944 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3945 }
3946 else
3947 /* We can't handle floating point constants;
3948 PRINT_OPERAND must handle them. */
3949 output_operand_lossage ("floating constant misused");
3950 break;
3951
3952 case CONST_FIXED:
3953 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3954 break;
3955
3956 case PLUS:
3957 /* Some assemblers need integer constants to appear last (eg masm). */
3958 if (CONST_INT_P (XEXP (x, 0)))
3959 {
3960 output_addr_const (file, XEXP (x, 1));
3961 if (INTVAL (XEXP (x, 0)) >= 0)
3962 fprintf (file, "+");
3963 output_addr_const (file, XEXP (x, 0));
3964 }
3965 else
3966 {
3967 output_addr_const (file, XEXP (x, 0));
3968 if (!CONST_INT_P (XEXP (x, 1))
3969 || INTVAL (XEXP (x, 1)) >= 0)
3970 fprintf (file, "+");
3971 output_addr_const (file, XEXP (x, 1));
3972 }
3973 break;
3974
3975 case MINUS:
3976 /* Avoid outputting things like x-x or x+5-x,
3977 since some assemblers can't handle that. */
3978 x = simplify_subtraction (x);
3979 if (GET_CODE (x) != MINUS)
3980 goto restart;
3981
3982 output_addr_const (file, XEXP (x, 0));
3983 fprintf (file, "-");
3984 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3985 || GET_CODE (XEXP (x, 1)) == PC
3986 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3987 output_addr_const (file, XEXP (x, 1));
3988 else
3989 {
3990 fputs (targetm.asm_out.open_paren, file);
3991 output_addr_const (file, XEXP (x, 1));
3992 fputs (targetm.asm_out.close_paren, file);
3993 }
3994 break;
3995
3996 case ZERO_EXTEND:
3997 case SIGN_EXTEND:
3998 case SUBREG:
3999 case TRUNCATE:
4000 output_addr_const (file, XEXP (x, 0));
4001 break;
4002
4003 default:
4004 if (targetm.asm_out.output_addr_const_extra (file, x))
4005 break;
4006
4007 output_operand_lossage ("invalid expression as operand");
4008 }
4009 }
4010 \f
4011 /* Output a quoted string. */
4012
4013 void
4014 output_quoted_string (FILE *asm_file, const char *string)
4015 {
4016 #ifdef OUTPUT_QUOTED_STRING
4017 OUTPUT_QUOTED_STRING (asm_file, string);
4018 #else
4019 char c;
4020
4021 putc ('\"', asm_file);
4022 while ((c = *string++) != 0)
4023 {
4024 if (ISPRINT (c))
4025 {
4026 if (c == '\"' || c == '\\')
4027 putc ('\\', asm_file);
4028 putc (c, asm_file);
4029 }
4030 else
4031 fprintf (asm_file, "\\%03o", (unsigned char) c);
4032 }
4033 putc ('\"', asm_file);
4034 #endif
4035 }
4036 \f
4037 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4038
4039 void
4040 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4041 {
4042 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4043 if (value == 0)
4044 putc ('0', f);
4045 else
4046 {
4047 char *p = buf + sizeof (buf);
4048 do
4049 *--p = "0123456789abcdef"[value % 16];
4050 while ((value /= 16) != 0);
4051 *--p = 'x';
4052 *--p = '0';
4053 fwrite (p, 1, buf + sizeof (buf) - p, f);
4054 }
4055 }
4056
4057 /* Internal function that prints an unsigned long in decimal in reverse.
4058 The output string IS NOT null-terminated. */
4059
4060 static int
4061 sprint_ul_rev (char *s, unsigned long value)
4062 {
4063 int i = 0;
4064 do
4065 {
4066 s[i] = "0123456789"[value % 10];
4067 value /= 10;
4068 i++;
4069 /* alternate version, without modulo */
4070 /* oldval = value; */
4071 /* value /= 10; */
4072 /* s[i] = "0123456789" [oldval - 10*value]; */
4073 /* i++ */
4074 }
4075 while (value != 0);
4076 return i;
4077 }
4078
4079 /* Write an unsigned long as decimal to a file, fast. */
4080
4081 void
4082 fprint_ul (FILE *f, unsigned long value)
4083 {
4084 /* python says: len(str(2**64)) == 20 */
4085 char s[20];
4086 int i;
4087
4088 i = sprint_ul_rev (s, value);
4089
4090 /* It's probably too small to bother with string reversal and fputs. */
4091 do
4092 {
4093 i--;
4094 putc (s[i], f);
4095 }
4096 while (i != 0);
4097 }
4098
4099 /* Write an unsigned long as decimal to a string, fast.
4100 s must be wide enough to not overflow, at least 21 chars.
4101 Returns the length of the string (without terminating '\0'). */
4102
4103 int
4104 sprint_ul (char *s, unsigned long value)
4105 {
4106 int len = sprint_ul_rev (s, value);
4107 s[len] = '\0';
4108
4109 std::reverse (s, s + len);
4110 return len;
4111 }
4112
4113 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4114 %R prints the value of REGISTER_PREFIX.
4115 %L prints the value of LOCAL_LABEL_PREFIX.
4116 %U prints the value of USER_LABEL_PREFIX.
4117 %I prints the value of IMMEDIATE_PREFIX.
4118 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4119 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4120
4121 We handle alternate assembler dialects here, just like output_asm_insn. */
4122
4123 void
4124 asm_fprintf (FILE *file, const char *p, ...)
4125 {
4126 char buf[10];
4127 char *q, c;
4128 #ifdef ASSEMBLER_DIALECT
4129 int dialect = 0;
4130 #endif
4131 va_list argptr;
4132
4133 va_start (argptr, p);
4134
4135 buf[0] = '%';
4136
4137 while ((c = *p++))
4138 switch (c)
4139 {
4140 #ifdef ASSEMBLER_DIALECT
4141 case '{':
4142 case '}':
4143 case '|':
4144 p = do_assembler_dialects (p, &dialect);
4145 break;
4146 #endif
4147
4148 case '%':
4149 c = *p++;
4150 q = &buf[1];
4151 while (strchr ("-+ #0", c))
4152 {
4153 *q++ = c;
4154 c = *p++;
4155 }
4156 while (ISDIGIT (c) || c == '.')
4157 {
4158 *q++ = c;
4159 c = *p++;
4160 }
4161 switch (c)
4162 {
4163 case '%':
4164 putc ('%', file);
4165 break;
4166
4167 case 'd': case 'i': case 'u':
4168 case 'x': case 'X': case 'o':
4169 case 'c':
4170 *q++ = c;
4171 *q = 0;
4172 fprintf (file, buf, va_arg (argptr, int));
4173 break;
4174
4175 case 'w':
4176 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4177 'o' cases, but we do not check for those cases. It
4178 means that the value is a HOST_WIDE_INT, which may be
4179 either `long' or `long long'. */
4180 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4181 q += strlen (HOST_WIDE_INT_PRINT);
4182 *q++ = *p++;
4183 *q = 0;
4184 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4185 break;
4186
4187 case 'l':
4188 *q++ = c;
4189 #ifdef HAVE_LONG_LONG
4190 if (*p == 'l')
4191 {
4192 *q++ = *p++;
4193 *q++ = *p++;
4194 *q = 0;
4195 fprintf (file, buf, va_arg (argptr, long long));
4196 }
4197 else
4198 #endif
4199 {
4200 *q++ = *p++;
4201 *q = 0;
4202 fprintf (file, buf, va_arg (argptr, long));
4203 }
4204
4205 break;
4206
4207 case 's':
4208 *q++ = c;
4209 *q = 0;
4210 fprintf (file, buf, va_arg (argptr, char *));
4211 break;
4212
4213 case 'O':
4214 #ifdef ASM_OUTPUT_OPCODE
4215 ASM_OUTPUT_OPCODE (asm_out_file, p);
4216 #endif
4217 break;
4218
4219 case 'R':
4220 #ifdef REGISTER_PREFIX
4221 fprintf (file, "%s", REGISTER_PREFIX);
4222 #endif
4223 break;
4224
4225 case 'I':
4226 #ifdef IMMEDIATE_PREFIX
4227 fprintf (file, "%s", IMMEDIATE_PREFIX);
4228 #endif
4229 break;
4230
4231 case 'L':
4232 #ifdef LOCAL_LABEL_PREFIX
4233 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4234 #endif
4235 break;
4236
4237 case 'U':
4238 fputs (user_label_prefix, file);
4239 break;
4240
4241 #ifdef ASM_FPRINTF_EXTENSIONS
4242 /* Uppercase letters are reserved for general use by asm_fprintf
4243 and so are not available to target specific code. In order to
4244 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4245 they are defined here. As they get turned into real extensions
4246 to asm_fprintf they should be removed from this list. */
4247 case 'A': case 'B': case 'C': case 'D': case 'E':
4248 case 'F': case 'G': case 'H': case 'J': case 'K':
4249 case 'M': case 'N': case 'P': case 'Q': case 'S':
4250 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4251 break;
4252
4253 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4254 #endif
4255 default:
4256 gcc_unreachable ();
4257 }
4258 break;
4259
4260 default:
4261 putc (c, file);
4262 }
4263 va_end (argptr);
4264 }
4265 \f
4266 /* Return nonzero if this function has no function calls. */
4267
4268 int
4269 leaf_function_p (void)
4270 {
4271 rtx_insn *insn;
4272
4273 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4274 functions even if they call mcount. */
4275 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
4276 return 0;
4277
4278 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4279 {
4280 if (CALL_P (insn)
4281 && ! SIBLING_CALL_P (insn))
4282 return 0;
4283 if (NONJUMP_INSN_P (insn)
4284 && GET_CODE (PATTERN (insn)) == SEQUENCE
4285 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4286 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4287 return 0;
4288 }
4289
4290 return 1;
4291 }
4292
4293 /* Return 1 if branch is a forward branch.
4294 Uses insn_shuid array, so it works only in the final pass. May be used by
4295 output templates to customary add branch prediction hints.
4296 */
4297 int
4298 final_forward_branch_p (rtx_insn *insn)
4299 {
4300 int insn_id, label_id;
4301
4302 gcc_assert (uid_shuid);
4303 insn_id = INSN_SHUID (insn);
4304 label_id = INSN_SHUID (JUMP_LABEL (insn));
4305 /* We've hit some insns that does not have id information available. */
4306 gcc_assert (insn_id && label_id);
4307 return insn_id < label_id;
4308 }
4309
4310 /* On some machines, a function with no call insns
4311 can run faster if it doesn't create its own register window.
4312 When output, the leaf function should use only the "output"
4313 registers. Ordinarily, the function would be compiled to use
4314 the "input" registers to find its arguments; it is a candidate
4315 for leaf treatment if it uses only the "input" registers.
4316 Leaf function treatment means renumbering so the function
4317 uses the "output" registers instead. */
4318
4319 #ifdef LEAF_REGISTERS
4320
4321 /* Return 1 if this function uses only the registers that can be
4322 safely renumbered. */
4323
4324 int
4325 only_leaf_regs_used (void)
4326 {
4327 int i;
4328 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4329
4330 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4331 if ((df_regs_ever_live_p (i) || global_regs[i])
4332 && ! permitted_reg_in_leaf_functions[i])
4333 return 0;
4334
4335 if (crtl->uses_pic_offset_table
4336 && pic_offset_table_rtx != 0
4337 && REG_P (pic_offset_table_rtx)
4338 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4339 return 0;
4340
4341 return 1;
4342 }
4343
4344 /* Scan all instructions and renumber all registers into those
4345 available in leaf functions. */
4346
4347 static void
4348 leaf_renumber_regs (rtx_insn *first)
4349 {
4350 rtx_insn *insn;
4351
4352 /* Renumber only the actual patterns.
4353 The reg-notes can contain frame pointer refs,
4354 and renumbering them could crash, and should not be needed. */
4355 for (insn = first; insn; insn = NEXT_INSN (insn))
4356 if (INSN_P (insn))
4357 leaf_renumber_regs_insn (PATTERN (insn));
4358 }
4359
4360 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4361 available in leaf functions. */
4362
4363 void
4364 leaf_renumber_regs_insn (rtx in_rtx)
4365 {
4366 int i, j;
4367 const char *format_ptr;
4368
4369 if (in_rtx == 0)
4370 return;
4371
4372 /* Renumber all input-registers into output-registers.
4373 renumbered_regs would be 1 for an output-register;
4374 they */
4375
4376 if (REG_P (in_rtx))
4377 {
4378 int newreg;
4379
4380 /* Don't renumber the same reg twice. */
4381 if (in_rtx->used)
4382 return;
4383
4384 newreg = REGNO (in_rtx);
4385 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4386 to reach here as part of a REG_NOTE. */
4387 if (newreg >= FIRST_PSEUDO_REGISTER)
4388 {
4389 in_rtx->used = 1;
4390 return;
4391 }
4392 newreg = LEAF_REG_REMAP (newreg);
4393 gcc_assert (newreg >= 0);
4394 df_set_regs_ever_live (REGNO (in_rtx), false);
4395 df_set_regs_ever_live (newreg, true);
4396 SET_REGNO (in_rtx, newreg);
4397 in_rtx->used = 1;
4398 return;
4399 }
4400
4401 if (INSN_P (in_rtx))
4402 {
4403 /* Inside a SEQUENCE, we find insns.
4404 Renumber just the patterns of these insns,
4405 just as we do for the top-level insns. */
4406 leaf_renumber_regs_insn (PATTERN (in_rtx));
4407 return;
4408 }
4409
4410 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4411
4412 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4413 switch (*format_ptr++)
4414 {
4415 case 'e':
4416 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4417 break;
4418
4419 case 'E':
4420 if (NULL != XVEC (in_rtx, i))
4421 {
4422 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4423 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4424 }
4425 break;
4426
4427 case 'S':
4428 case 's':
4429 case '0':
4430 case 'i':
4431 case 'w':
4432 case 'n':
4433 case 'u':
4434 break;
4435
4436 default:
4437 gcc_unreachable ();
4438 }
4439 }
4440 #endif
4441 \f
4442 /* Turn the RTL into assembly. */
4443 static unsigned int
4444 rest_of_handle_final (void)
4445 {
4446 const char *fnname = get_fnname_from_decl (current_function_decl);
4447
4448 assemble_start_function (current_function_decl, fnname);
4449 final_start_function (get_insns (), asm_out_file, optimize);
4450 final (get_insns (), asm_out_file, optimize);
4451 if (flag_ipa_ra)
4452 collect_fn_hard_reg_usage ();
4453 final_end_function ();
4454
4455 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4456 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4457 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4458 output_function_exception_table (fnname);
4459
4460 assemble_end_function (current_function_decl, fnname);
4461
4462 user_defined_section_attribute = false;
4463
4464 /* Free up reg info memory. */
4465 free_reg_info ();
4466
4467 if (! quiet_flag)
4468 fflush (asm_out_file);
4469
4470 /* Write DBX symbols if requested. */
4471
4472 /* Note that for those inline functions where we don't initially
4473 know for certain that we will be generating an out-of-line copy,
4474 the first invocation of this routine (rest_of_compilation) will
4475 skip over this code by doing a `goto exit_rest_of_compilation;'.
4476 Later on, wrapup_global_declarations will (indirectly) call
4477 rest_of_compilation again for those inline functions that need
4478 to have out-of-line copies generated. During that call, we
4479 *will* be routed past here. */
4480
4481 timevar_push (TV_SYMOUT);
4482 if (!DECL_IGNORED_P (current_function_decl))
4483 debug_hooks->function_decl (current_function_decl);
4484 timevar_pop (TV_SYMOUT);
4485
4486 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4487 DECL_INITIAL (current_function_decl) = error_mark_node;
4488
4489 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4490 && targetm.have_ctors_dtors)
4491 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4492 decl_init_priority_lookup
4493 (current_function_decl));
4494 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4495 && targetm.have_ctors_dtors)
4496 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4497 decl_fini_priority_lookup
4498 (current_function_decl));
4499 return 0;
4500 }
4501
4502 namespace {
4503
4504 const pass_data pass_data_final =
4505 {
4506 RTL_PASS, /* type */
4507 "final", /* name */
4508 OPTGROUP_NONE, /* optinfo_flags */
4509 TV_FINAL, /* tv_id */
4510 0, /* properties_required */
4511 0, /* properties_provided */
4512 0, /* properties_destroyed */
4513 0, /* todo_flags_start */
4514 0, /* todo_flags_finish */
4515 };
4516
4517 class pass_final : public rtl_opt_pass
4518 {
4519 public:
4520 pass_final (gcc::context *ctxt)
4521 : rtl_opt_pass (pass_data_final, ctxt)
4522 {}
4523
4524 /* opt_pass methods: */
4525 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
4526
4527 }; // class pass_final
4528
4529 } // anon namespace
4530
4531 rtl_opt_pass *
4532 make_pass_final (gcc::context *ctxt)
4533 {
4534 return new pass_final (ctxt);
4535 }
4536
4537
4538 static unsigned int
4539 rest_of_handle_shorten_branches (void)
4540 {
4541 /* Shorten branches. */
4542 shorten_branches (get_insns ());
4543 return 0;
4544 }
4545
4546 namespace {
4547
4548 const pass_data pass_data_shorten_branches =
4549 {
4550 RTL_PASS, /* type */
4551 "shorten", /* name */
4552 OPTGROUP_NONE, /* optinfo_flags */
4553 TV_SHORTEN_BRANCH, /* tv_id */
4554 0, /* properties_required */
4555 0, /* properties_provided */
4556 0, /* properties_destroyed */
4557 0, /* todo_flags_start */
4558 0, /* todo_flags_finish */
4559 };
4560
4561 class pass_shorten_branches : public rtl_opt_pass
4562 {
4563 public:
4564 pass_shorten_branches (gcc::context *ctxt)
4565 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
4566 {}
4567
4568 /* opt_pass methods: */
4569 virtual unsigned int execute (function *)
4570 {
4571 return rest_of_handle_shorten_branches ();
4572 }
4573
4574 }; // class pass_shorten_branches
4575
4576 } // anon namespace
4577
4578 rtl_opt_pass *
4579 make_pass_shorten_branches (gcc::context *ctxt)
4580 {
4581 return new pass_shorten_branches (ctxt);
4582 }
4583
4584
4585 static unsigned int
4586 rest_of_clean_state (void)
4587 {
4588 rtx_insn *insn, *next;
4589 FILE *final_output = NULL;
4590 int save_unnumbered = flag_dump_unnumbered;
4591 int save_noaddr = flag_dump_noaddr;
4592
4593 if (flag_dump_final_insns)
4594 {
4595 final_output = fopen (flag_dump_final_insns, "a");
4596 if (!final_output)
4597 {
4598 error ("could not open final insn dump file %qs: %m",
4599 flag_dump_final_insns);
4600 flag_dump_final_insns = NULL;
4601 }
4602 else
4603 {
4604 flag_dump_noaddr = flag_dump_unnumbered = 1;
4605 if (flag_compare_debug_opt || flag_compare_debug)
4606 dump_flags |= TDF_NOUID;
4607 dump_function_header (final_output, current_function_decl,
4608 dump_flags);
4609 final_insns_dump_p = true;
4610
4611 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4612 if (LABEL_P (insn))
4613 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4614 else
4615 {
4616 if (NOTE_P (insn))
4617 set_block_for_insn (insn, NULL);
4618 INSN_UID (insn) = 0;
4619 }
4620 }
4621 }
4622
4623 /* It is very important to decompose the RTL instruction chain here:
4624 debug information keeps pointing into CODE_LABEL insns inside the function
4625 body. If these remain pointing to the other insns, we end up preserving
4626 whole RTL chain and attached detailed debug info in memory. */
4627 for (insn = get_insns (); insn; insn = next)
4628 {
4629 next = NEXT_INSN (insn);
4630 SET_NEXT_INSN (insn) = NULL;
4631 SET_PREV_INSN (insn) = NULL;
4632
4633 if (final_output
4634 && (!NOTE_P (insn) ||
4635 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4636 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4637 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4638 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4639 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4640 print_rtl_single (final_output, insn);
4641 }
4642
4643 if (final_output)
4644 {
4645 flag_dump_noaddr = save_noaddr;
4646 flag_dump_unnumbered = save_unnumbered;
4647 final_insns_dump_p = false;
4648
4649 if (fclose (final_output))
4650 {
4651 error ("could not close final insn dump file %qs: %m",
4652 flag_dump_final_insns);
4653 flag_dump_final_insns = NULL;
4654 }
4655 }
4656
4657 /* In case the function was not output,
4658 don't leave any temporary anonymous types
4659 queued up for sdb output. */
4660 #ifdef SDB_DEBUGGING_INFO
4661 if (write_symbols == SDB_DEBUG)
4662 sdbout_types (NULL_TREE);
4663 #endif
4664
4665 flag_rerun_cse_after_global_opts = 0;
4666 reload_completed = 0;
4667 epilogue_completed = 0;
4668 #ifdef STACK_REGS
4669 regstack_completed = 0;
4670 #endif
4671
4672 /* Clear out the insn_length contents now that they are no
4673 longer valid. */
4674 init_insn_lengths ();
4675
4676 /* Show no temporary slots allocated. */
4677 init_temp_slots ();
4678
4679 free_bb_for_insn ();
4680
4681 delete_tree_ssa ();
4682
4683 /* We can reduce stack alignment on call site only when we are sure that
4684 the function body just produced will be actually used in the final
4685 executable. */
4686 if (decl_binds_to_current_def_p (current_function_decl))
4687 {
4688 unsigned int pref = crtl->preferred_stack_boundary;
4689 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4690 pref = crtl->stack_alignment_needed;
4691 cgraph_node::rtl_info (current_function_decl)
4692 ->preferred_incoming_stack_boundary = pref;
4693 }
4694
4695 /* Make sure volatile mem refs aren't considered valid operands for
4696 arithmetic insns. We must call this here if this is a nested inline
4697 function, since the above code leaves us in the init_recog state,
4698 and the function context push/pop code does not save/restore volatile_ok.
4699
4700 ??? Maybe it isn't necessary for expand_start_function to call this
4701 anymore if we do it here? */
4702
4703 init_recog_no_volatile ();
4704
4705 /* We're done with this function. Free up memory if we can. */
4706 free_after_parsing (cfun);
4707 free_after_compilation (cfun);
4708 return 0;
4709 }
4710
4711 namespace {
4712
4713 const pass_data pass_data_clean_state =
4714 {
4715 RTL_PASS, /* type */
4716 "*clean_state", /* name */
4717 OPTGROUP_NONE, /* optinfo_flags */
4718 TV_FINAL, /* tv_id */
4719 0, /* properties_required */
4720 0, /* properties_provided */
4721 PROP_rtl, /* properties_destroyed */
4722 0, /* todo_flags_start */
4723 0, /* todo_flags_finish */
4724 };
4725
4726 class pass_clean_state : public rtl_opt_pass
4727 {
4728 public:
4729 pass_clean_state (gcc::context *ctxt)
4730 : rtl_opt_pass (pass_data_clean_state, ctxt)
4731 {}
4732
4733 /* opt_pass methods: */
4734 virtual unsigned int execute (function *)
4735 {
4736 return rest_of_clean_state ();
4737 }
4738
4739 }; // class pass_clean_state
4740
4741 } // anon namespace
4742
4743 rtl_opt_pass *
4744 make_pass_clean_state (gcc::context *ctxt)
4745 {
4746 return new pass_clean_state (ctxt);
4747 }
4748
4749 /* Return true if INSN is a call to the current function. */
4750
4751 static bool
4752 self_recursive_call_p (rtx_insn *insn)
4753 {
4754 tree fndecl = get_call_fndecl (insn);
4755 return (fndecl == current_function_decl
4756 && decl_binds_to_current_def_p (fndecl));
4757 }
4758
4759 /* Collect hard register usage for the current function. */
4760
4761 static void
4762 collect_fn_hard_reg_usage (void)
4763 {
4764 rtx_insn *insn;
4765 #ifdef STACK_REGS
4766 int i;
4767 #endif
4768 struct cgraph_rtl_info *node;
4769 HARD_REG_SET function_used_regs;
4770
4771 /* ??? To be removed when all the ports have been fixed. */
4772 if (!targetm.call_fusage_contains_non_callee_clobbers)
4773 return;
4774
4775 CLEAR_HARD_REG_SET (function_used_regs);
4776
4777 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn))
4778 {
4779 HARD_REG_SET insn_used_regs;
4780
4781 if (!NONDEBUG_INSN_P (insn))
4782 continue;
4783
4784 if (CALL_P (insn)
4785 && !self_recursive_call_p (insn))
4786 {
4787 if (!get_call_reg_set_usage (insn, &insn_used_regs,
4788 call_used_reg_set))
4789 return;
4790
4791 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4792 }
4793
4794 find_all_hard_reg_sets (insn, &insn_used_regs, false);
4795 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4796 }
4797
4798 /* Be conservative - mark fixed and global registers as used. */
4799 IOR_HARD_REG_SET (function_used_regs, fixed_reg_set);
4800
4801 #ifdef STACK_REGS
4802 /* Handle STACK_REGS conservatively, since the df-framework does not
4803 provide accurate information for them. */
4804
4805 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
4806 SET_HARD_REG_BIT (function_used_regs, i);
4807 #endif
4808
4809 /* The information we have gathered is only interesting if it exposes a
4810 register from the call_used_regs that is not used in this function. */
4811 if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs))
4812 return;
4813
4814 node = cgraph_node::rtl_info (current_function_decl);
4815 gcc_assert (node != NULL);
4816
4817 COPY_HARD_REG_SET (node->function_used_regs, function_used_regs);
4818 node->function_used_regs_valid = 1;
4819 }
4820
4821 /* Get the declaration of the function called by INSN. */
4822
4823 static tree
4824 get_call_fndecl (rtx_insn *insn)
4825 {
4826 rtx note, datum;
4827
4828 note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX);
4829 if (note == NULL_RTX)
4830 return NULL_TREE;
4831
4832 datum = XEXP (note, 0);
4833 if (datum != NULL_RTX)
4834 return SYMBOL_REF_DECL (datum);
4835
4836 return NULL_TREE;
4837 }
4838
4839 /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for
4840 call targets that can be overwritten. */
4841
4842 static struct cgraph_rtl_info *
4843 get_call_cgraph_rtl_info (rtx_insn *insn)
4844 {
4845 tree fndecl;
4846
4847 if (insn == NULL_RTX)
4848 return NULL;
4849
4850 fndecl = get_call_fndecl (insn);
4851 if (fndecl == NULL_TREE
4852 || !decl_binds_to_current_def_p (fndecl))
4853 return NULL;
4854
4855 return cgraph_node::rtl_info (fndecl);
4856 }
4857
4858 /* Find hard registers used by function call instruction INSN, and return them
4859 in REG_SET. Return DEFAULT_SET in REG_SET if not found. */
4860
4861 bool
4862 get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
4863 HARD_REG_SET default_set)
4864 {
4865 if (flag_ipa_ra)
4866 {
4867 struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn);
4868 if (node != NULL
4869 && node->function_used_regs_valid)
4870 {
4871 COPY_HARD_REG_SET (*reg_set, node->function_used_regs);
4872 AND_HARD_REG_SET (*reg_set, default_set);
4873 return true;
4874 }
4875 }
4876
4877 COPY_HARD_REG_SET (*reg_set, default_set);
4878 return false;
4879 }