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1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
4 2010, 2011
5 Free Software Foundation, Inc.
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
12 version.
13
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
22
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
25
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
31
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
36
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
39
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
43
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
47
48 #include "config.h"
49 #include "system.h"
50 #include "coretypes.h"
51 #include "tm.h"
52
53 #include "tree.h"
54 #include "rtl.h"
55 #include "tm_p.h"
56 #include "regs.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "hard-reg-set.h"
63 #include "output.h"
64 #include "except.h"
65 #include "function.h"
66 #include "rtl-error.h"
67 #include "toplev.h" /* exact_log2, floor_log2 */
68 #include "reload.h"
69 #include "intl.h"
70 #include "basic-block.h"
71 #include "target.h"
72 #include "targhooks.h"
73 #include "debug.h"
74 #include "expr.h"
75 #include "tree-pass.h"
76 #include "tree-flow.h"
77 #include "cgraph.h"
78 #include "coverage.h"
79 #include "df.h"
80 #include "vecprim.h"
81 #include "ggc.h"
82 #include "cfgloop.h"
83 #include "params.h"
84 #include "tree-pretty-print.h" /* for dump_function_header */
85
86 #ifdef XCOFF_DEBUGGING_INFO
87 #include "xcoffout.h" /* Needed for external data
88 declarations for e.g. AIX 4.x. */
89 #endif
90
91 #include "dwarf2out.h"
92
93 #ifdef DBX_DEBUGGING_INFO
94 #include "dbxout.h"
95 #endif
96
97 #ifdef SDB_DEBUGGING_INFO
98 #include "sdbout.h"
99 #endif
100
101 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
102 So define a null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
105 #endif
106
107 /* Is the given character a logical line separator for the assembler? */
108 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
109 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
110 #endif
111
112 #ifndef JUMP_TABLES_IN_TEXT_SECTION
113 #define JUMP_TABLES_IN_TEXT_SECTION 0
114 #endif
115
116 /* Bitflags used by final_scan_insn. */
117 #define SEEN_BB 1
118 #define SEEN_NOTE 2
119 #define SEEN_EMITTED 4
120
121 /* Last insn processed by final_scan_insn. */
122 static rtx debug_insn;
123 rtx current_output_insn;
124
125 /* Line number of last NOTE. */
126 static int last_linenum;
127
128 /* Last discriminator written to assembly. */
129 static int last_discriminator;
130
131 /* Discriminator of current block. */
132 static int discriminator;
133
134 /* Highest line number in current block. */
135 static int high_block_linenum;
136
137 /* Likewise for function. */
138 static int high_function_linenum;
139
140 /* Filename of last NOTE. */
141 static const char *last_filename;
142
143 /* Override filename and line number. */
144 static const char *override_filename;
145 static int override_linenum;
146
147 /* Whether to force emission of a line note before the next insn. */
148 static bool force_source_line = false;
149
150 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
151
152 /* Nonzero while outputting an `asm' with operands.
153 This means that inconsistencies are the user's fault, so don't die.
154 The precise value is the insn being output, to pass to error_for_asm. */
155 rtx this_is_asm_operands;
156
157 /* Number of operands of this insn, for an `asm' with operands. */
158 static unsigned int insn_noperands;
159
160 /* Compare optimization flag. */
161
162 static rtx last_ignored_compare = 0;
163
164 /* Assign a unique number to each insn that is output.
165 This can be used to generate unique local labels. */
166
167 static int insn_counter = 0;
168
169 #ifdef HAVE_cc0
170 /* This variable contains machine-dependent flags (defined in tm.h)
171 set and examined by output routines
172 that describe how to interpret the condition codes properly. */
173
174 CC_STATUS cc_status;
175
176 /* During output of an insn, this contains a copy of cc_status
177 from before the insn. */
178
179 CC_STATUS cc_prev_status;
180 #endif
181
182 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
183
184 static int block_depth;
185
186 /* Nonzero if have enabled APP processing of our assembler output. */
187
188 static int app_on;
189
190 /* If we are outputting an insn sequence, this contains the sequence rtx.
191 Zero otherwise. */
192
193 rtx final_sequence;
194
195 #ifdef ASSEMBLER_DIALECT
196
197 /* Number of the assembler dialect to use, starting at 0. */
198 static int dialect_number;
199 #endif
200
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate;
203
204 /* True if printing into -fdump-final-insns= dump. */
205 bool final_insns_dump_p;
206
207 #ifdef HAVE_ATTR_length
208 static int asm_insn_count (rtx);
209 #endif
210 static void profile_function (FILE *);
211 static void profile_after_prologue (FILE *);
212 static bool notice_source_line (rtx, bool *);
213 static rtx walk_alter_subreg (rtx *, bool *);
214 static void output_asm_name (void);
215 static void output_alternate_entry_point (FILE *, rtx);
216 static tree get_mem_expr_from_op (rtx, int *);
217 static void output_asm_operand_names (rtx *, int *, int);
218 #ifdef LEAF_REGISTERS
219 static void leaf_renumber_regs (rtx);
220 #endif
221 #ifdef HAVE_cc0
222 static int alter_cond (rtx);
223 #endif
224 #ifndef ADDR_VEC_ALIGN
225 static int final_addr_vec_align (rtx);
226 #endif
227 #ifdef HAVE_ATTR_length
228 static int align_fuzz (rtx, rtx, int, unsigned);
229 #endif
230 \f
231 /* Initialize data in final at the beginning of a compilation. */
232
233 void
234 init_final (const char *filename ATTRIBUTE_UNUSED)
235 {
236 app_on = 0;
237 final_sequence = 0;
238
239 #ifdef ASSEMBLER_DIALECT
240 dialect_number = ASSEMBLER_DIALECT;
241 #endif
242 }
243
244 /* Default target function prologue and epilogue assembler output.
245
246 If not overridden for epilogue code, then the function body itself
247 contains return instructions wherever needed. */
248 void
249 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
250 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
251 {
252 }
253
254 void
255 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
256 tree decl ATTRIBUTE_UNUSED,
257 bool new_is_cold ATTRIBUTE_UNUSED)
258 {
259 }
260
261 /* Default target hook that outputs nothing to a stream. */
262 void
263 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
264 {
265 }
266
267 /* Enable APP processing of subsequent output.
268 Used before the output from an `asm' statement. */
269
270 void
271 app_enable (void)
272 {
273 if (! app_on)
274 {
275 fputs (ASM_APP_ON, asm_out_file);
276 app_on = 1;
277 }
278 }
279
280 /* Disable APP processing of subsequent output.
281 Called from varasm.c before most kinds of output. */
282
283 void
284 app_disable (void)
285 {
286 if (app_on)
287 {
288 fputs (ASM_APP_OFF, asm_out_file);
289 app_on = 0;
290 }
291 }
292 \f
293 /* Return the number of slots filled in the current
294 delayed branch sequence (we don't count the insn needing the
295 delay slot). Zero if not in a delayed branch sequence. */
296
297 #ifdef DELAY_SLOTS
298 int
299 dbr_sequence_length (void)
300 {
301 if (final_sequence != 0)
302 return XVECLEN (final_sequence, 0) - 1;
303 else
304 return 0;
305 }
306 #endif
307 \f
308 /* The next two pages contain routines used to compute the length of an insn
309 and to shorten branches. */
310
311 /* Arrays for insn lengths, and addresses. The latter is referenced by
312 `insn_current_length'. */
313
314 static int *insn_lengths;
315
316 VEC(int,heap) *insn_addresses_;
317
318 /* Max uid for which the above arrays are valid. */
319 static int insn_lengths_max_uid;
320
321 /* Address of insn being processed. Used by `insn_current_length'. */
322 int insn_current_address;
323
324 /* Address of insn being processed in previous iteration. */
325 int insn_last_address;
326
327 /* known invariant alignment of insn being processed. */
328 int insn_current_align;
329
330 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
331 gives the next following alignment insn that increases the known
332 alignment, or NULL_RTX if there is no such insn.
333 For any alignment obtained this way, we can again index uid_align with
334 its uid to obtain the next following align that in turn increases the
335 alignment, till we reach NULL_RTX; the sequence obtained this way
336 for each insn we'll call the alignment chain of this insn in the following
337 comments. */
338
339 struct label_alignment
340 {
341 short alignment;
342 short max_skip;
343 };
344
345 static rtx *uid_align;
346 static int *uid_shuid;
347 static struct label_alignment *label_align;
348
349 /* Indicate that branch shortening hasn't yet been done. */
350
351 void
352 init_insn_lengths (void)
353 {
354 if (uid_shuid)
355 {
356 free (uid_shuid);
357 uid_shuid = 0;
358 }
359 if (insn_lengths)
360 {
361 free (insn_lengths);
362 insn_lengths = 0;
363 insn_lengths_max_uid = 0;
364 }
365 #ifdef HAVE_ATTR_length
366 INSN_ADDRESSES_FREE ();
367 #endif
368 if (uid_align)
369 {
370 free (uid_align);
371 uid_align = 0;
372 }
373 }
374
375 /* Obtain the current length of an insn. If branch shortening has been done,
376 get its actual length. Otherwise, use FALLBACK_FN to calculate the
377 length. */
378 static inline int
379 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
380 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
381 {
382 #ifdef HAVE_ATTR_length
383 rtx body;
384 int i;
385 int length = 0;
386
387 if (insn_lengths_max_uid > INSN_UID (insn))
388 return insn_lengths[INSN_UID (insn)];
389 else
390 switch (GET_CODE (insn))
391 {
392 case NOTE:
393 case BARRIER:
394 case CODE_LABEL:
395 case DEBUG_INSN:
396 return 0;
397
398 case CALL_INSN:
399 length = fallback_fn (insn);
400 break;
401
402 case JUMP_INSN:
403 body = PATTERN (insn);
404 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
405 {
406 /* Alignment is machine-dependent and should be handled by
407 ADDR_VEC_ALIGN. */
408 }
409 else
410 length = fallback_fn (insn);
411 break;
412
413 case INSN:
414 body = PATTERN (insn);
415 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
416 return 0;
417
418 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
419 length = asm_insn_count (body) * fallback_fn (insn);
420 else if (GET_CODE (body) == SEQUENCE)
421 for (i = 0; i < XVECLEN (body, 0); i++)
422 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
423 else
424 length = fallback_fn (insn);
425 break;
426
427 default:
428 break;
429 }
430
431 #ifdef ADJUST_INSN_LENGTH
432 ADJUST_INSN_LENGTH (insn, length);
433 #endif
434 return length;
435 #else /* not HAVE_ATTR_length */
436 return 0;
437 #define insn_default_length 0
438 #define insn_min_length 0
439 #endif /* not HAVE_ATTR_length */
440 }
441
442 /* Obtain the current length of an insn. If branch shortening has been done,
443 get its actual length. Otherwise, get its maximum length. */
444 int
445 get_attr_length (rtx insn)
446 {
447 return get_attr_length_1 (insn, insn_default_length);
448 }
449
450 /* Obtain the current length of an insn. If branch shortening has been done,
451 get its actual length. Otherwise, get its minimum length. */
452 int
453 get_attr_min_length (rtx insn)
454 {
455 return get_attr_length_1 (insn, insn_min_length);
456 }
457 \f
458 /* Code to handle alignment inside shorten_branches. */
459
460 /* Here is an explanation how the algorithm in align_fuzz can give
461 proper results:
462
463 Call a sequence of instructions beginning with alignment point X
464 and continuing until the next alignment point `block X'. When `X'
465 is used in an expression, it means the alignment value of the
466 alignment point.
467
468 Call the distance between the start of the first insn of block X, and
469 the end of the last insn of block X `IX', for the `inner size of X'.
470 This is clearly the sum of the instruction lengths.
471
472 Likewise with the next alignment-delimited block following X, which we
473 shall call block Y.
474
475 Call the distance between the start of the first insn of block X, and
476 the start of the first insn of block Y `OX', for the `outer size of X'.
477
478 The estimated padding is then OX - IX.
479
480 OX can be safely estimated as
481
482 if (X >= Y)
483 OX = round_up(IX, Y)
484 else
485 OX = round_up(IX, X) + Y - X
486
487 Clearly est(IX) >= real(IX), because that only depends on the
488 instruction lengths, and those being overestimated is a given.
489
490 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
491 we needn't worry about that when thinking about OX.
492
493 When X >= Y, the alignment provided by Y adds no uncertainty factor
494 for branch ranges starting before X, so we can just round what we have.
495 But when X < Y, we don't know anything about the, so to speak,
496 `middle bits', so we have to assume the worst when aligning up from an
497 address mod X to one mod Y, which is Y - X. */
498
499 #ifndef LABEL_ALIGN
500 #define LABEL_ALIGN(LABEL) align_labels_log
501 #endif
502
503 #ifndef LOOP_ALIGN
504 #define LOOP_ALIGN(LABEL) align_loops_log
505 #endif
506
507 #ifndef LABEL_ALIGN_AFTER_BARRIER
508 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
509 #endif
510
511 #ifndef JUMP_ALIGN
512 #define JUMP_ALIGN(LABEL) align_jumps_log
513 #endif
514
515 int
516 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
517 {
518 return 0;
519 }
520
521 int
522 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
523 {
524 return align_loops_max_skip;
525 }
526
527 int
528 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
529 {
530 return align_labels_max_skip;
531 }
532
533 int
534 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
535 {
536 return align_jumps_max_skip;
537 }
538
539 #ifndef ADDR_VEC_ALIGN
540 static int
541 final_addr_vec_align (rtx addr_vec)
542 {
543 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
544
545 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
546 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
547 return exact_log2 (align);
548
549 }
550
551 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
552 #endif
553
554 #ifndef INSN_LENGTH_ALIGNMENT
555 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
556 #endif
557
558 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
559
560 static int min_labelno, max_labelno;
561
562 #define LABEL_TO_ALIGNMENT(LABEL) \
563 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
564
565 #define LABEL_TO_MAX_SKIP(LABEL) \
566 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
567
568 /* For the benefit of port specific code do this also as a function. */
569
570 int
571 label_to_alignment (rtx label)
572 {
573 if (CODE_LABEL_NUMBER (label) <= max_labelno)
574 return LABEL_TO_ALIGNMENT (label);
575 return 0;
576 }
577
578 int
579 label_to_max_skip (rtx label)
580 {
581 if (CODE_LABEL_NUMBER (label) <= max_labelno)
582 return LABEL_TO_MAX_SKIP (label);
583 return 0;
584 }
585
586 #ifdef HAVE_ATTR_length
587 /* The differences in addresses
588 between a branch and its target might grow or shrink depending on
589 the alignment the start insn of the range (the branch for a forward
590 branch or the label for a backward branch) starts out on; if these
591 differences are used naively, they can even oscillate infinitely.
592 We therefore want to compute a 'worst case' address difference that
593 is independent of the alignment the start insn of the range end
594 up on, and that is at least as large as the actual difference.
595 The function align_fuzz calculates the amount we have to add to the
596 naively computed difference, by traversing the part of the alignment
597 chain of the start insn of the range that is in front of the end insn
598 of the range, and considering for each alignment the maximum amount
599 that it might contribute to a size increase.
600
601 For casesi tables, we also want to know worst case minimum amounts of
602 address difference, in case a machine description wants to introduce
603 some common offset that is added to all offsets in a table.
604 For this purpose, align_fuzz with a growth argument of 0 computes the
605 appropriate adjustment. */
606
607 /* Compute the maximum delta by which the difference of the addresses of
608 START and END might grow / shrink due to a different address for start
609 which changes the size of alignment insns between START and END.
610 KNOWN_ALIGN_LOG is the alignment known for START.
611 GROWTH should be ~0 if the objective is to compute potential code size
612 increase, and 0 if the objective is to compute potential shrink.
613 The return value is undefined for any other value of GROWTH. */
614
615 static int
616 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
617 {
618 int uid = INSN_UID (start);
619 rtx align_label;
620 int known_align = 1 << known_align_log;
621 int end_shuid = INSN_SHUID (end);
622 int fuzz = 0;
623
624 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
625 {
626 int align_addr, new_align;
627
628 uid = INSN_UID (align_label);
629 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
630 if (uid_shuid[uid] > end_shuid)
631 break;
632 known_align_log = LABEL_TO_ALIGNMENT (align_label);
633 new_align = 1 << known_align_log;
634 if (new_align < known_align)
635 continue;
636 fuzz += (-align_addr ^ growth) & (new_align - known_align);
637 known_align = new_align;
638 }
639 return fuzz;
640 }
641
642 /* Compute a worst-case reference address of a branch so that it
643 can be safely used in the presence of aligned labels. Since the
644 size of the branch itself is unknown, the size of the branch is
645 not included in the range. I.e. for a forward branch, the reference
646 address is the end address of the branch as known from the previous
647 branch shortening pass, minus a value to account for possible size
648 increase due to alignment. For a backward branch, it is the start
649 address of the branch as known from the current pass, plus a value
650 to account for possible size increase due to alignment.
651 NB.: Therefore, the maximum offset allowed for backward branches needs
652 to exclude the branch size. */
653
654 int
655 insn_current_reference_address (rtx branch)
656 {
657 rtx dest, seq;
658 int seq_uid;
659
660 if (! INSN_ADDRESSES_SET_P ())
661 return 0;
662
663 seq = NEXT_INSN (PREV_INSN (branch));
664 seq_uid = INSN_UID (seq);
665 if (!JUMP_P (branch))
666 /* This can happen for example on the PA; the objective is to know the
667 offset to address something in front of the start of the function.
668 Thus, we can treat it like a backward branch.
669 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
670 any alignment we'd encounter, so we skip the call to align_fuzz. */
671 return insn_current_address;
672 dest = JUMP_LABEL (branch);
673
674 /* BRANCH has no proper alignment chain set, so use SEQ.
675 BRANCH also has no INSN_SHUID. */
676 if (INSN_SHUID (seq) < INSN_SHUID (dest))
677 {
678 /* Forward branch. */
679 return (insn_last_address + insn_lengths[seq_uid]
680 - align_fuzz (seq, dest, length_unit_log, ~0));
681 }
682 else
683 {
684 /* Backward branch. */
685 return (insn_current_address
686 + align_fuzz (dest, seq, length_unit_log, ~0));
687 }
688 }
689 #endif /* HAVE_ATTR_length */
690 \f
691 /* Compute branch alignments based on frequency information in the
692 CFG. */
693
694 unsigned int
695 compute_alignments (void)
696 {
697 int log, max_skip, max_log;
698 basic_block bb;
699 int freq_max = 0;
700 int freq_threshold = 0;
701
702 if (label_align)
703 {
704 free (label_align);
705 label_align = 0;
706 }
707
708 max_labelno = max_label_num ();
709 min_labelno = get_first_label_num ();
710 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
711
712 /* If not optimizing or optimizing for size, don't assign any alignments. */
713 if (! optimize || optimize_function_for_size_p (cfun))
714 return 0;
715
716 if (dump_file)
717 {
718 dump_reg_info (dump_file);
719 dump_flow_info (dump_file, TDF_DETAILS);
720 flow_loops_dump (dump_file, NULL, 1);
721 }
722 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
723 FOR_EACH_BB (bb)
724 if (bb->frequency > freq_max)
725 freq_max = bb->frequency;
726 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
727
728 if (dump_file)
729 fprintf(dump_file, "freq_max: %i\n",freq_max);
730 FOR_EACH_BB (bb)
731 {
732 rtx label = BB_HEAD (bb);
733 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
734 edge e;
735 edge_iterator ei;
736
737 if (!LABEL_P (label)
738 || optimize_bb_for_size_p (bb))
739 {
740 if (dump_file)
741 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
742 bb->index, bb->frequency, bb->loop_father->num,
743 bb_loop_depth (bb));
744 continue;
745 }
746 max_log = LABEL_ALIGN (label);
747 max_skip = targetm.asm_out.label_align_max_skip (label);
748
749 FOR_EACH_EDGE (e, ei, bb->preds)
750 {
751 if (e->flags & EDGE_FALLTHRU)
752 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
753 else
754 branch_frequency += EDGE_FREQUENCY (e);
755 }
756 if (dump_file)
757 {
758 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
759 bb->index, bb->frequency, bb->loop_father->num,
760 bb_loop_depth (bb),
761 fallthru_frequency, branch_frequency);
762 if (!bb->loop_father->inner && bb->loop_father->num)
763 fprintf (dump_file, " inner_loop");
764 if (bb->loop_father->header == bb)
765 fprintf (dump_file, " loop_header");
766 fprintf (dump_file, "\n");
767 }
768
769 /* There are two purposes to align block with no fallthru incoming edge:
770 1) to avoid fetch stalls when branch destination is near cache boundary
771 2) to improve cache efficiency in case the previous block is not executed
772 (so it does not need to be in the cache).
773
774 We to catch first case, we align frequently executed blocks.
775 To catch the second, we align blocks that are executed more frequently
776 than the predecessor and the predecessor is likely to not be executed
777 when function is called. */
778
779 if (!has_fallthru
780 && (branch_frequency > freq_threshold
781 || (bb->frequency > bb->prev_bb->frequency * 10
782 && (bb->prev_bb->frequency
783 <= ENTRY_BLOCK_PTR->frequency / 2))))
784 {
785 log = JUMP_ALIGN (label);
786 if (dump_file)
787 fprintf(dump_file, " jump alignment added.\n");
788 if (max_log < log)
789 {
790 max_log = log;
791 max_skip = targetm.asm_out.jump_align_max_skip (label);
792 }
793 }
794 /* In case block is frequent and reached mostly by non-fallthru edge,
795 align it. It is most likely a first block of loop. */
796 if (has_fallthru
797 && optimize_bb_for_speed_p (bb)
798 && branch_frequency + fallthru_frequency > freq_threshold
799 && (branch_frequency
800 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
801 {
802 log = LOOP_ALIGN (label);
803 if (dump_file)
804 fprintf(dump_file, " internal loop alignment added.\n");
805 if (max_log < log)
806 {
807 max_log = log;
808 max_skip = targetm.asm_out.loop_align_max_skip (label);
809 }
810 }
811 LABEL_TO_ALIGNMENT (label) = max_log;
812 LABEL_TO_MAX_SKIP (label) = max_skip;
813 }
814
815 loop_optimizer_finalize ();
816 free_dominance_info (CDI_DOMINATORS);
817 return 0;
818 }
819
820 struct rtl_opt_pass pass_compute_alignments =
821 {
822 {
823 RTL_PASS,
824 "alignments", /* name */
825 NULL, /* gate */
826 compute_alignments, /* execute */
827 NULL, /* sub */
828 NULL, /* next */
829 0, /* static_pass_number */
830 TV_NONE, /* tv_id */
831 0, /* properties_required */
832 0, /* properties_provided */
833 0, /* properties_destroyed */
834 0, /* todo_flags_start */
835 TODO_verify_rtl_sharing
836 | TODO_ggc_collect /* todo_flags_finish */
837 }
838 };
839
840 \f
841 /* Make a pass over all insns and compute their actual lengths by shortening
842 any branches of variable length if possible. */
843
844 /* shorten_branches might be called multiple times: for example, the SH
845 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
846 In order to do this, it needs proper length information, which it obtains
847 by calling shorten_branches. This cannot be collapsed with
848 shorten_branches itself into a single pass unless we also want to integrate
849 reorg.c, since the branch splitting exposes new instructions with delay
850 slots. */
851
852 void
853 shorten_branches (rtx first ATTRIBUTE_UNUSED)
854 {
855 rtx insn;
856 int max_uid;
857 int i;
858 int max_log;
859 int max_skip;
860 #ifdef HAVE_ATTR_length
861 #define MAX_CODE_ALIGN 16
862 rtx seq;
863 int something_changed = 1;
864 char *varying_length;
865 rtx body;
866 int uid;
867 rtx align_tab[MAX_CODE_ALIGN];
868
869 #endif
870
871 /* Compute maximum UID and allocate label_align / uid_shuid. */
872 max_uid = get_max_uid ();
873
874 /* Free uid_shuid before reallocating it. */
875 free (uid_shuid);
876
877 uid_shuid = XNEWVEC (int, max_uid);
878
879 if (max_labelno != max_label_num ())
880 {
881 int old = max_labelno;
882 int n_labels;
883 int n_old_labels;
884
885 max_labelno = max_label_num ();
886
887 n_labels = max_labelno - min_labelno + 1;
888 n_old_labels = old - min_labelno + 1;
889
890 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
891
892 /* Range of labels grows monotonically in the function. Failing here
893 means that the initialization of array got lost. */
894 gcc_assert (n_old_labels <= n_labels);
895
896 memset (label_align + n_old_labels, 0,
897 (n_labels - n_old_labels) * sizeof (struct label_alignment));
898 }
899
900 /* Initialize label_align and set up uid_shuid to be strictly
901 monotonically rising with insn order. */
902 /* We use max_log here to keep track of the maximum alignment we want to
903 impose on the next CODE_LABEL (or the current one if we are processing
904 the CODE_LABEL itself). */
905
906 max_log = 0;
907 max_skip = 0;
908
909 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
910 {
911 int log;
912
913 INSN_SHUID (insn) = i++;
914 if (INSN_P (insn))
915 continue;
916
917 if (LABEL_P (insn))
918 {
919 rtx next;
920 bool next_is_jumptable;
921
922 /* Merge in alignments computed by compute_alignments. */
923 log = LABEL_TO_ALIGNMENT (insn);
924 if (max_log < log)
925 {
926 max_log = log;
927 max_skip = LABEL_TO_MAX_SKIP (insn);
928 }
929
930 next = next_nonnote_insn (insn);
931 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
932 if (!next_is_jumptable)
933 {
934 log = LABEL_ALIGN (insn);
935 if (max_log < log)
936 {
937 max_log = log;
938 max_skip = targetm.asm_out.label_align_max_skip (insn);
939 }
940 }
941 /* ADDR_VECs only take room if read-only data goes into the text
942 section. */
943 if ((JUMP_TABLES_IN_TEXT_SECTION
944 || readonly_data_section == text_section)
945 && next_is_jumptable)
946 {
947 log = ADDR_VEC_ALIGN (next);
948 if (max_log < log)
949 {
950 max_log = log;
951 max_skip = targetm.asm_out.label_align_max_skip (insn);
952 }
953 }
954 LABEL_TO_ALIGNMENT (insn) = max_log;
955 LABEL_TO_MAX_SKIP (insn) = max_skip;
956 max_log = 0;
957 max_skip = 0;
958 }
959 else if (BARRIER_P (insn))
960 {
961 rtx label;
962
963 for (label = insn; label && ! INSN_P (label);
964 label = NEXT_INSN (label))
965 if (LABEL_P (label))
966 {
967 log = LABEL_ALIGN_AFTER_BARRIER (insn);
968 if (max_log < log)
969 {
970 max_log = log;
971 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
972 }
973 break;
974 }
975 }
976 }
977 #ifdef HAVE_ATTR_length
978
979 /* Allocate the rest of the arrays. */
980 insn_lengths = XNEWVEC (int, max_uid);
981 insn_lengths_max_uid = max_uid;
982 /* Syntax errors can lead to labels being outside of the main insn stream.
983 Initialize insn_addresses, so that we get reproducible results. */
984 INSN_ADDRESSES_ALLOC (max_uid);
985
986 varying_length = XCNEWVEC (char, max_uid);
987
988 /* Initialize uid_align. We scan instructions
989 from end to start, and keep in align_tab[n] the last seen insn
990 that does an alignment of at least n+1, i.e. the successor
991 in the alignment chain for an insn that does / has a known
992 alignment of n. */
993 uid_align = XCNEWVEC (rtx, max_uid);
994
995 for (i = MAX_CODE_ALIGN; --i >= 0;)
996 align_tab[i] = NULL_RTX;
997 seq = get_last_insn ();
998 for (; seq; seq = PREV_INSN (seq))
999 {
1000 int uid = INSN_UID (seq);
1001 int log;
1002 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1003 uid_align[uid] = align_tab[0];
1004 if (log)
1005 {
1006 /* Found an alignment label. */
1007 uid_align[uid] = align_tab[log];
1008 for (i = log - 1; i >= 0; i--)
1009 align_tab[i] = seq;
1010 }
1011 }
1012 #ifdef CASE_VECTOR_SHORTEN_MODE
1013 if (optimize)
1014 {
1015 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1016 label fields. */
1017
1018 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1019 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1020 int rel;
1021
1022 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1023 {
1024 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1025 int len, i, min, max, insn_shuid;
1026 int min_align;
1027 addr_diff_vec_flags flags;
1028
1029 if (!JUMP_P (insn)
1030 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1031 continue;
1032 pat = PATTERN (insn);
1033 len = XVECLEN (pat, 1);
1034 gcc_assert (len > 0);
1035 min_align = MAX_CODE_ALIGN;
1036 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1037 {
1038 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1039 int shuid = INSN_SHUID (lab);
1040 if (shuid < min)
1041 {
1042 min = shuid;
1043 min_lab = lab;
1044 }
1045 if (shuid > max)
1046 {
1047 max = shuid;
1048 max_lab = lab;
1049 }
1050 if (min_align > LABEL_TO_ALIGNMENT (lab))
1051 min_align = LABEL_TO_ALIGNMENT (lab);
1052 }
1053 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1054 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1055 insn_shuid = INSN_SHUID (insn);
1056 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1057 memset (&flags, 0, sizeof (flags));
1058 flags.min_align = min_align;
1059 flags.base_after_vec = rel > insn_shuid;
1060 flags.min_after_vec = min > insn_shuid;
1061 flags.max_after_vec = max > insn_shuid;
1062 flags.min_after_base = min > rel;
1063 flags.max_after_base = max > rel;
1064 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1065 }
1066 }
1067 #endif /* CASE_VECTOR_SHORTEN_MODE */
1068
1069 /* Compute initial lengths, addresses, and varying flags for each insn. */
1070 for (insn_current_address = 0, insn = first;
1071 insn != 0;
1072 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1073 {
1074 uid = INSN_UID (insn);
1075
1076 insn_lengths[uid] = 0;
1077
1078 if (LABEL_P (insn))
1079 {
1080 int log = LABEL_TO_ALIGNMENT (insn);
1081 if (log)
1082 {
1083 int align = 1 << log;
1084 int new_address = (insn_current_address + align - 1) & -align;
1085 insn_lengths[uid] = new_address - insn_current_address;
1086 }
1087 }
1088
1089 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1090
1091 if (NOTE_P (insn) || BARRIER_P (insn)
1092 || LABEL_P (insn) || DEBUG_INSN_P(insn))
1093 continue;
1094 if (INSN_DELETED_P (insn))
1095 continue;
1096
1097 body = PATTERN (insn);
1098 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1099 {
1100 /* This only takes room if read-only data goes into the text
1101 section. */
1102 if (JUMP_TABLES_IN_TEXT_SECTION
1103 || readonly_data_section == text_section)
1104 insn_lengths[uid] = (XVECLEN (body,
1105 GET_CODE (body) == ADDR_DIFF_VEC)
1106 * GET_MODE_SIZE (GET_MODE (body)));
1107 /* Alignment is handled by ADDR_VEC_ALIGN. */
1108 }
1109 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1110 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1111 else if (GET_CODE (body) == SEQUENCE)
1112 {
1113 int i;
1114 int const_delay_slots;
1115 #ifdef DELAY_SLOTS
1116 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1117 #else
1118 const_delay_slots = 0;
1119 #endif
1120 /* Inside a delay slot sequence, we do not do any branch shortening
1121 if the shortening could change the number of delay slots
1122 of the branch. */
1123 for (i = 0; i < XVECLEN (body, 0); i++)
1124 {
1125 rtx inner_insn = XVECEXP (body, 0, i);
1126 int inner_uid = INSN_UID (inner_insn);
1127 int inner_length;
1128
1129 if (GET_CODE (body) == ASM_INPUT
1130 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1131 inner_length = (asm_insn_count (PATTERN (inner_insn))
1132 * insn_default_length (inner_insn));
1133 else
1134 inner_length = insn_default_length (inner_insn);
1135
1136 insn_lengths[inner_uid] = inner_length;
1137 if (const_delay_slots)
1138 {
1139 if ((varying_length[inner_uid]
1140 = insn_variable_length_p (inner_insn)) != 0)
1141 varying_length[uid] = 1;
1142 INSN_ADDRESSES (inner_uid) = (insn_current_address
1143 + insn_lengths[uid]);
1144 }
1145 else
1146 varying_length[inner_uid] = 0;
1147 insn_lengths[uid] += inner_length;
1148 }
1149 }
1150 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1151 {
1152 insn_lengths[uid] = insn_default_length (insn);
1153 varying_length[uid] = insn_variable_length_p (insn);
1154 }
1155
1156 /* If needed, do any adjustment. */
1157 #ifdef ADJUST_INSN_LENGTH
1158 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1159 if (insn_lengths[uid] < 0)
1160 fatal_insn ("negative insn length", insn);
1161 #endif
1162 }
1163
1164 /* Now loop over all the insns finding varying length insns. For each,
1165 get the current insn length. If it has changed, reflect the change.
1166 When nothing changes for a full pass, we are done. */
1167
1168 while (something_changed)
1169 {
1170 something_changed = 0;
1171 insn_current_align = MAX_CODE_ALIGN - 1;
1172 for (insn_current_address = 0, insn = first;
1173 insn != 0;
1174 insn = NEXT_INSN (insn))
1175 {
1176 int new_length;
1177 #ifdef ADJUST_INSN_LENGTH
1178 int tmp_length;
1179 #endif
1180 int length_align;
1181
1182 uid = INSN_UID (insn);
1183
1184 if (LABEL_P (insn))
1185 {
1186 int log = LABEL_TO_ALIGNMENT (insn);
1187 if (log > insn_current_align)
1188 {
1189 int align = 1 << log;
1190 int new_address= (insn_current_address + align - 1) & -align;
1191 insn_lengths[uid] = new_address - insn_current_address;
1192 insn_current_align = log;
1193 insn_current_address = new_address;
1194 }
1195 else
1196 insn_lengths[uid] = 0;
1197 INSN_ADDRESSES (uid) = insn_current_address;
1198 continue;
1199 }
1200
1201 length_align = INSN_LENGTH_ALIGNMENT (insn);
1202 if (length_align < insn_current_align)
1203 insn_current_align = length_align;
1204
1205 insn_last_address = INSN_ADDRESSES (uid);
1206 INSN_ADDRESSES (uid) = insn_current_address;
1207
1208 #ifdef CASE_VECTOR_SHORTEN_MODE
1209 if (optimize && JUMP_P (insn)
1210 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1211 {
1212 rtx body = PATTERN (insn);
1213 int old_length = insn_lengths[uid];
1214 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1215 rtx min_lab = XEXP (XEXP (body, 2), 0);
1216 rtx max_lab = XEXP (XEXP (body, 3), 0);
1217 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1218 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1219 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1220 rtx prev;
1221 int rel_align = 0;
1222 addr_diff_vec_flags flags;
1223
1224 /* Avoid automatic aggregate initialization. */
1225 flags = ADDR_DIFF_VEC_FLAGS (body);
1226
1227 /* Try to find a known alignment for rel_lab. */
1228 for (prev = rel_lab;
1229 prev
1230 && ! insn_lengths[INSN_UID (prev)]
1231 && ! (varying_length[INSN_UID (prev)] & 1);
1232 prev = PREV_INSN (prev))
1233 if (varying_length[INSN_UID (prev)] & 2)
1234 {
1235 rel_align = LABEL_TO_ALIGNMENT (prev);
1236 break;
1237 }
1238
1239 /* See the comment on addr_diff_vec_flags in rtl.h for the
1240 meaning of the flags values. base: REL_LAB vec: INSN */
1241 /* Anything after INSN has still addresses from the last
1242 pass; adjust these so that they reflect our current
1243 estimate for this pass. */
1244 if (flags.base_after_vec)
1245 rel_addr += insn_current_address - insn_last_address;
1246 if (flags.min_after_vec)
1247 min_addr += insn_current_address - insn_last_address;
1248 if (flags.max_after_vec)
1249 max_addr += insn_current_address - insn_last_address;
1250 /* We want to know the worst case, i.e. lowest possible value
1251 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1252 its offset is positive, and we have to be wary of code shrink;
1253 otherwise, it is negative, and we have to be vary of code
1254 size increase. */
1255 if (flags.min_after_base)
1256 {
1257 /* If INSN is between REL_LAB and MIN_LAB, the size
1258 changes we are about to make can change the alignment
1259 within the observed offset, therefore we have to break
1260 it up into two parts that are independent. */
1261 if (! flags.base_after_vec && flags.min_after_vec)
1262 {
1263 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1264 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1265 }
1266 else
1267 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1268 }
1269 else
1270 {
1271 if (flags.base_after_vec && ! flags.min_after_vec)
1272 {
1273 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1274 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1275 }
1276 else
1277 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1278 }
1279 /* Likewise, determine the highest lowest possible value
1280 for the offset of MAX_LAB. */
1281 if (flags.max_after_base)
1282 {
1283 if (! flags.base_after_vec && flags.max_after_vec)
1284 {
1285 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1286 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1287 }
1288 else
1289 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1290 }
1291 else
1292 {
1293 if (flags.base_after_vec && ! flags.max_after_vec)
1294 {
1295 max_addr += align_fuzz (max_lab, insn, 0, 0);
1296 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1297 }
1298 else
1299 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1300 }
1301 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1302 max_addr - rel_addr,
1303 body));
1304 if (JUMP_TABLES_IN_TEXT_SECTION
1305 || readonly_data_section == text_section)
1306 {
1307 insn_lengths[uid]
1308 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1309 insn_current_address += insn_lengths[uid];
1310 if (insn_lengths[uid] != old_length)
1311 something_changed = 1;
1312 }
1313
1314 continue;
1315 }
1316 #endif /* CASE_VECTOR_SHORTEN_MODE */
1317
1318 if (! (varying_length[uid]))
1319 {
1320 if (NONJUMP_INSN_P (insn)
1321 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1322 {
1323 int i;
1324
1325 body = PATTERN (insn);
1326 for (i = 0; i < XVECLEN (body, 0); i++)
1327 {
1328 rtx inner_insn = XVECEXP (body, 0, i);
1329 int inner_uid = INSN_UID (inner_insn);
1330
1331 INSN_ADDRESSES (inner_uid) = insn_current_address;
1332
1333 insn_current_address += insn_lengths[inner_uid];
1334 }
1335 }
1336 else
1337 insn_current_address += insn_lengths[uid];
1338
1339 continue;
1340 }
1341
1342 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1343 {
1344 int i;
1345
1346 body = PATTERN (insn);
1347 new_length = 0;
1348 for (i = 0; i < XVECLEN (body, 0); i++)
1349 {
1350 rtx inner_insn = XVECEXP (body, 0, i);
1351 int inner_uid = INSN_UID (inner_insn);
1352 int inner_length;
1353
1354 INSN_ADDRESSES (inner_uid) = insn_current_address;
1355
1356 /* insn_current_length returns 0 for insns with a
1357 non-varying length. */
1358 if (! varying_length[inner_uid])
1359 inner_length = insn_lengths[inner_uid];
1360 else
1361 inner_length = insn_current_length (inner_insn);
1362
1363 if (inner_length != insn_lengths[inner_uid])
1364 {
1365 insn_lengths[inner_uid] = inner_length;
1366 something_changed = 1;
1367 }
1368 insn_current_address += insn_lengths[inner_uid];
1369 new_length += inner_length;
1370 }
1371 }
1372 else
1373 {
1374 new_length = insn_current_length (insn);
1375 insn_current_address += new_length;
1376 }
1377
1378 #ifdef ADJUST_INSN_LENGTH
1379 /* If needed, do any adjustment. */
1380 tmp_length = new_length;
1381 ADJUST_INSN_LENGTH (insn, new_length);
1382 insn_current_address += (new_length - tmp_length);
1383 #endif
1384
1385 if (new_length != insn_lengths[uid])
1386 {
1387 insn_lengths[uid] = new_length;
1388 something_changed = 1;
1389 }
1390 }
1391 /* For a non-optimizing compile, do only a single pass. */
1392 if (!optimize)
1393 break;
1394 }
1395
1396 free (varying_length);
1397
1398 #endif /* HAVE_ATTR_length */
1399 }
1400
1401 #ifdef HAVE_ATTR_length
1402 /* Given the body of an INSN known to be generated by an ASM statement, return
1403 the number of machine instructions likely to be generated for this insn.
1404 This is used to compute its length. */
1405
1406 static int
1407 asm_insn_count (rtx body)
1408 {
1409 const char *templ;
1410
1411 if (GET_CODE (body) == ASM_INPUT)
1412 templ = XSTR (body, 0);
1413 else
1414 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1415
1416 return asm_str_count (templ);
1417 }
1418 #endif
1419
1420 /* Return the number of machine instructions likely to be generated for the
1421 inline-asm template. */
1422 int
1423 asm_str_count (const char *templ)
1424 {
1425 int count = 1;
1426
1427 if (!*templ)
1428 return 0;
1429
1430 for (; *templ; templ++)
1431 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1432 || *templ == '\n')
1433 count++;
1434
1435 return count;
1436 }
1437 \f
1438 /* ??? This is probably the wrong place for these. */
1439 /* Structure recording the mapping from source file and directory
1440 names at compile time to those to be embedded in debug
1441 information. */
1442 typedef struct debug_prefix_map
1443 {
1444 const char *old_prefix;
1445 const char *new_prefix;
1446 size_t old_len;
1447 size_t new_len;
1448 struct debug_prefix_map *next;
1449 } debug_prefix_map;
1450
1451 /* Linked list of such structures. */
1452 debug_prefix_map *debug_prefix_maps;
1453
1454
1455 /* Record a debug file prefix mapping. ARG is the argument to
1456 -fdebug-prefix-map and must be of the form OLD=NEW. */
1457
1458 void
1459 add_debug_prefix_map (const char *arg)
1460 {
1461 debug_prefix_map *map;
1462 const char *p;
1463
1464 p = strchr (arg, '=');
1465 if (!p)
1466 {
1467 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1468 return;
1469 }
1470 map = XNEW (debug_prefix_map);
1471 map->old_prefix = xstrndup (arg, p - arg);
1472 map->old_len = p - arg;
1473 p++;
1474 map->new_prefix = xstrdup (p);
1475 map->new_len = strlen (p);
1476 map->next = debug_prefix_maps;
1477 debug_prefix_maps = map;
1478 }
1479
1480 /* Perform user-specified mapping of debug filename prefixes. Return
1481 the new name corresponding to FILENAME. */
1482
1483 const char *
1484 remap_debug_filename (const char *filename)
1485 {
1486 debug_prefix_map *map;
1487 char *s;
1488 const char *name;
1489 size_t name_len;
1490
1491 for (map = debug_prefix_maps; map; map = map->next)
1492 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1493 break;
1494 if (!map)
1495 return filename;
1496 name = filename + map->old_len;
1497 name_len = strlen (name) + 1;
1498 s = (char *) alloca (name_len + map->new_len);
1499 memcpy (s, map->new_prefix, map->new_len);
1500 memcpy (s + map->new_len, name, name_len);
1501 return ggc_strdup (s);
1502 }
1503 \f
1504 /* Return true if DWARF2 debug info can be emitted for DECL. */
1505
1506 static bool
1507 dwarf2_debug_info_emitted_p (tree decl)
1508 {
1509 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1510 return false;
1511
1512 if (DECL_IGNORED_P (decl))
1513 return false;
1514
1515 return true;
1516 }
1517
1518 /* Return scope resulting from combination of S1 and S2. */
1519 static tree
1520 choose_inner_scope (tree s1, tree s2)
1521 {
1522 if (!s1)
1523 return s2;
1524 if (!s2)
1525 return s1;
1526 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1527 return s1;
1528 return s2;
1529 }
1530
1531 /* Emit lexical block notes needed to change scope from S1 to S2. */
1532
1533 static void
1534 change_scope (rtx orig_insn, tree s1, tree s2)
1535 {
1536 rtx insn = orig_insn;
1537 tree com = NULL_TREE;
1538 tree ts1 = s1, ts2 = s2;
1539 tree s;
1540
1541 while (ts1 != ts2)
1542 {
1543 gcc_assert (ts1 && ts2);
1544 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1545 ts1 = BLOCK_SUPERCONTEXT (ts1);
1546 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1547 ts2 = BLOCK_SUPERCONTEXT (ts2);
1548 else
1549 {
1550 ts1 = BLOCK_SUPERCONTEXT (ts1);
1551 ts2 = BLOCK_SUPERCONTEXT (ts2);
1552 }
1553 }
1554 com = ts1;
1555
1556 /* Close scopes. */
1557 s = s1;
1558 while (s != com)
1559 {
1560 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1561 NOTE_BLOCK (note) = s;
1562 s = BLOCK_SUPERCONTEXT (s);
1563 }
1564
1565 /* Open scopes. */
1566 s = s2;
1567 while (s != com)
1568 {
1569 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1570 NOTE_BLOCK (insn) = s;
1571 s = BLOCK_SUPERCONTEXT (s);
1572 }
1573 }
1574
1575 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1576 on the scope tree and the newly reordered instructions. */
1577
1578 static void
1579 reemit_insn_block_notes (void)
1580 {
1581 tree cur_block = DECL_INITIAL (cfun->decl);
1582 rtx insn, note;
1583
1584 insn = get_insns ();
1585 if (!active_insn_p (insn))
1586 insn = next_active_insn (insn);
1587 for (; insn; insn = next_active_insn (insn))
1588 {
1589 tree this_block;
1590
1591 /* Avoid putting scope notes between jump table and its label. */
1592 if (JUMP_TABLE_DATA_P (insn))
1593 continue;
1594
1595 this_block = insn_scope (insn);
1596 /* For sequences compute scope resulting from merging all scopes
1597 of instructions nested inside. */
1598 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
1599 {
1600 int i;
1601 rtx body = PATTERN (insn);
1602
1603 this_block = NULL;
1604 for (i = 0; i < XVECLEN (body, 0); i++)
1605 this_block = choose_inner_scope (this_block,
1606 insn_scope (XVECEXP (body, 0, i)));
1607 }
1608 if (! this_block)
1609 continue;
1610
1611 if (this_block != cur_block)
1612 {
1613 change_scope (insn, cur_block, this_block);
1614 cur_block = this_block;
1615 }
1616 }
1617
1618 /* change_scope emits before the insn, not after. */
1619 note = emit_note (NOTE_INSN_DELETED);
1620 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1621 delete_insn (note);
1622
1623 reorder_blocks ();
1624 }
1625
1626 /* Output assembler code for the start of a function,
1627 and initialize some of the variables in this file
1628 for the new function. The label for the function and associated
1629 assembler pseudo-ops have already been output in `assemble_start_function'.
1630
1631 FIRST is the first insn of the rtl for the function being compiled.
1632 FILE is the file to write assembler code to.
1633 OPTIMIZE_P is nonzero if we should eliminate redundant
1634 test and compare insns. */
1635
1636 void
1637 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1638 int optimize_p ATTRIBUTE_UNUSED)
1639 {
1640 block_depth = 0;
1641
1642 this_is_asm_operands = 0;
1643
1644 last_filename = locator_file (prologue_locator);
1645 last_linenum = locator_line (prologue_locator);
1646 last_discriminator = discriminator = 0;
1647
1648 high_block_linenum = high_function_linenum = last_linenum;
1649
1650 if (!DECL_IGNORED_P (current_function_decl))
1651 debug_hooks->begin_prologue (last_linenum, last_filename);
1652
1653 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1654 dwarf2out_begin_prologue (0, NULL);
1655
1656 #ifdef LEAF_REG_REMAP
1657 if (crtl->uses_only_leaf_regs)
1658 leaf_renumber_regs (first);
1659 #endif
1660
1661 /* The Sun386i and perhaps other machines don't work right
1662 if the profiling code comes after the prologue. */
1663 if (targetm.profile_before_prologue () && crtl->profile)
1664 profile_function (file);
1665
1666 /* If debugging, assign block numbers to all of the blocks in this
1667 function. */
1668 if (write_symbols)
1669 {
1670 reemit_insn_block_notes ();
1671 number_blocks (current_function_decl);
1672 /* We never actually put out begin/end notes for the top-level
1673 block in the function. But, conceptually, that block is
1674 always needed. */
1675 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1676 }
1677
1678 if (warn_frame_larger_than
1679 && get_frame_size () > frame_larger_than_size)
1680 {
1681 /* Issue a warning */
1682 warning (OPT_Wframe_larger_than_,
1683 "the frame size of %wd bytes is larger than %wd bytes",
1684 get_frame_size (), frame_larger_than_size);
1685 }
1686
1687 /* First output the function prologue: code to set up the stack frame. */
1688 targetm.asm_out.function_prologue (file, get_frame_size ());
1689
1690 /* If the machine represents the prologue as RTL, the profiling code must
1691 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1692 #ifdef HAVE_prologue
1693 if (! HAVE_prologue)
1694 #endif
1695 profile_after_prologue (file);
1696 }
1697
1698 static void
1699 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1700 {
1701 if (!targetm.profile_before_prologue () && crtl->profile)
1702 profile_function (file);
1703 }
1704
1705 static void
1706 profile_function (FILE *file ATTRIBUTE_UNUSED)
1707 {
1708 #ifndef NO_PROFILE_COUNTERS
1709 # define NO_PROFILE_COUNTERS 0
1710 #endif
1711 #ifdef ASM_OUTPUT_REG_PUSH
1712 rtx sval = NULL, chain = NULL;
1713
1714 if (cfun->returns_struct)
1715 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1716 true);
1717 if (cfun->static_chain_decl)
1718 chain = targetm.calls.static_chain (current_function_decl, true);
1719 #endif /* ASM_OUTPUT_REG_PUSH */
1720
1721 if (! NO_PROFILE_COUNTERS)
1722 {
1723 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1724 switch_to_section (data_section);
1725 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1726 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1727 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1728 }
1729
1730 switch_to_section (current_function_section ());
1731
1732 #ifdef ASM_OUTPUT_REG_PUSH
1733 if (sval && REG_P (sval))
1734 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1735 if (chain && REG_P (chain))
1736 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1737 #endif
1738
1739 FUNCTION_PROFILER (file, current_function_funcdef_no);
1740
1741 #ifdef ASM_OUTPUT_REG_PUSH
1742 if (chain && REG_P (chain))
1743 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1744 if (sval && REG_P (sval))
1745 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1746 #endif
1747 }
1748
1749 /* Output assembler code for the end of a function.
1750 For clarity, args are same as those of `final_start_function'
1751 even though not all of them are needed. */
1752
1753 void
1754 final_end_function (void)
1755 {
1756 app_disable ();
1757
1758 if (!DECL_IGNORED_P (current_function_decl))
1759 debug_hooks->end_function (high_function_linenum);
1760
1761 /* Finally, output the function epilogue:
1762 code to restore the stack frame and return to the caller. */
1763 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1764
1765 /* And debug output. */
1766 if (!DECL_IGNORED_P (current_function_decl))
1767 debug_hooks->end_epilogue (last_linenum, last_filename);
1768
1769 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1770 && dwarf2out_do_frame ())
1771 dwarf2out_end_epilogue (last_linenum, last_filename);
1772 }
1773 \f
1774
1775 /* Dumper helper for basic block information. FILE is the assembly
1776 output file, and INSN is the instruction being emitted. */
1777
1778 static void
1779 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
1780 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1781 {
1782 basic_block bb;
1783
1784 if (!flag_debug_asm)
1785 return;
1786
1787 if (INSN_UID (insn) < bb_map_size
1788 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1789 {
1790 edge e;
1791 edge_iterator ei;
1792
1793 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1794 if (bb->frequency)
1795 fprintf (file, " freq:%d", bb->frequency);
1796 if (bb->count)
1797 fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC,
1798 bb->count);
1799 fprintf (file, " seq:%d", (*bb_seqn)++);
1800 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1801 FOR_EACH_EDGE (e, ei, bb->preds)
1802 {
1803 dump_edge_info (file, e, TDF_DETAILS, 0);
1804 }
1805 fprintf (file, "\n");
1806 }
1807 if (INSN_UID (insn) < bb_map_size
1808 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1809 {
1810 edge e;
1811 edge_iterator ei;
1812
1813 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1814 FOR_EACH_EDGE (e, ei, bb->succs)
1815 {
1816 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1817 }
1818 fprintf (file, "\n");
1819 }
1820 }
1821
1822 /* Output assembler code for some insns: all or part of a function.
1823 For description of args, see `final_start_function', above. */
1824
1825 void
1826 final (rtx first, FILE *file, int optimize_p)
1827 {
1828 rtx insn, next;
1829 int seen = 0;
1830
1831 /* Used for -dA dump. */
1832 basic_block *start_to_bb = NULL;
1833 basic_block *end_to_bb = NULL;
1834 int bb_map_size = 0;
1835 int bb_seqn = 0;
1836
1837 last_ignored_compare = 0;
1838
1839 #ifdef HAVE_cc0
1840 for (insn = first; insn; insn = NEXT_INSN (insn))
1841 {
1842 /* If CC tracking across branches is enabled, record the insn which
1843 jumps to each branch only reached from one place. */
1844 if (optimize_p && JUMP_P (insn))
1845 {
1846 rtx lab = JUMP_LABEL (insn);
1847 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
1848 {
1849 LABEL_REFS (lab) = insn;
1850 }
1851 }
1852 }
1853 #endif
1854
1855 init_recog ();
1856
1857 CC_STATUS_INIT;
1858
1859 if (flag_debug_asm)
1860 {
1861 basic_block bb;
1862
1863 bb_map_size = get_max_uid () + 1;
1864 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
1865 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
1866
1867 /* There is no cfg for a thunk. */
1868 if (!cfun->is_thunk)
1869 FOR_EACH_BB_REVERSE (bb)
1870 {
1871 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
1872 end_to_bb[INSN_UID (BB_END (bb))] = bb;
1873 }
1874 }
1875
1876 /* Output the insns. */
1877 for (insn = first; insn;)
1878 {
1879 #ifdef HAVE_ATTR_length
1880 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1881 {
1882 /* This can be triggered by bugs elsewhere in the compiler if
1883 new insns are created after init_insn_lengths is called. */
1884 gcc_assert (NOTE_P (insn));
1885 insn_current_address = -1;
1886 }
1887 else
1888 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1889 #endif /* HAVE_ATTR_length */
1890
1891 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
1892 bb_map_size, &bb_seqn);
1893 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
1894 }
1895
1896 if (flag_debug_asm)
1897 {
1898 free (start_to_bb);
1899 free (end_to_bb);
1900 }
1901
1902 /* Remove CFI notes, to avoid compare-debug failures. */
1903 for (insn = first; insn; insn = next)
1904 {
1905 next = NEXT_INSN (insn);
1906 if (NOTE_P (insn)
1907 && (NOTE_KIND (insn) == NOTE_INSN_CFI
1908 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
1909 delete_insn (insn);
1910 }
1911 }
1912 \f
1913 const char *
1914 get_insn_template (int code, rtx insn)
1915 {
1916 switch (insn_data[code].output_format)
1917 {
1918 case INSN_OUTPUT_FORMAT_SINGLE:
1919 return insn_data[code].output.single;
1920 case INSN_OUTPUT_FORMAT_MULTI:
1921 return insn_data[code].output.multi[which_alternative];
1922 case INSN_OUTPUT_FORMAT_FUNCTION:
1923 gcc_assert (insn);
1924 return (*insn_data[code].output.function) (recog_data.operand, insn);
1925
1926 default:
1927 gcc_unreachable ();
1928 }
1929 }
1930
1931 /* Emit the appropriate declaration for an alternate-entry-point
1932 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1933 LABEL_KIND != LABEL_NORMAL.
1934
1935 The case fall-through in this function is intentional. */
1936 static void
1937 output_alternate_entry_point (FILE *file, rtx insn)
1938 {
1939 const char *name = LABEL_NAME (insn);
1940
1941 switch (LABEL_KIND (insn))
1942 {
1943 case LABEL_WEAK_ENTRY:
1944 #ifdef ASM_WEAKEN_LABEL
1945 ASM_WEAKEN_LABEL (file, name);
1946 #endif
1947 case LABEL_GLOBAL_ENTRY:
1948 targetm.asm_out.globalize_label (file, name);
1949 case LABEL_STATIC_ENTRY:
1950 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1951 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1952 #endif
1953 ASM_OUTPUT_LABEL (file, name);
1954 break;
1955
1956 case LABEL_NORMAL:
1957 default:
1958 gcc_unreachable ();
1959 }
1960 }
1961
1962 /* Given a CALL_INSN, find and return the nested CALL. */
1963 static rtx
1964 call_from_call_insn (rtx insn)
1965 {
1966 rtx x;
1967 gcc_assert (CALL_P (insn));
1968 x = PATTERN (insn);
1969
1970 while (GET_CODE (x) != CALL)
1971 {
1972 switch (GET_CODE (x))
1973 {
1974 default:
1975 gcc_unreachable ();
1976 case COND_EXEC:
1977 x = COND_EXEC_CODE (x);
1978 break;
1979 case PARALLEL:
1980 x = XVECEXP (x, 0, 0);
1981 break;
1982 case SET:
1983 x = XEXP (x, 1);
1984 break;
1985 }
1986 }
1987 return x;
1988 }
1989
1990 /* The final scan for one insn, INSN.
1991 Args are same as in `final', except that INSN
1992 is the insn being scanned.
1993 Value returned is the next insn to be scanned.
1994
1995 NOPEEPHOLES is the flag to disallow peephole processing (currently
1996 used for within delayed branch sequence output).
1997
1998 SEEN is used to track the end of the prologue, for emitting
1999 debug information. We force the emission of a line note after
2000 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
2001 at the beginning of the second basic block, whichever comes
2002 first. */
2003
2004 rtx
2005 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2006 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2007 {
2008 #ifdef HAVE_cc0
2009 rtx set;
2010 #endif
2011 rtx next;
2012
2013 insn_counter++;
2014
2015 /* Ignore deleted insns. These can occur when we split insns (due to a
2016 template of "#") while not optimizing. */
2017 if (INSN_DELETED_P (insn))
2018 return NEXT_INSN (insn);
2019
2020 switch (GET_CODE (insn))
2021 {
2022 case NOTE:
2023 switch (NOTE_KIND (insn))
2024 {
2025 case NOTE_INSN_DELETED:
2026 break;
2027
2028 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2029 in_cold_section_p = !in_cold_section_p;
2030
2031 if (dwarf2out_do_frame ())
2032 dwarf2out_switch_text_section ();
2033 else if (!DECL_IGNORED_P (current_function_decl))
2034 debug_hooks->switch_text_section ();
2035
2036 switch_to_section (current_function_section ());
2037 targetm.asm_out.function_switched_text_sections (asm_out_file,
2038 current_function_decl,
2039 in_cold_section_p);
2040 break;
2041
2042 case NOTE_INSN_BASIC_BLOCK:
2043 if (targetm.asm_out.unwind_emit)
2044 targetm.asm_out.unwind_emit (asm_out_file, insn);
2045
2046 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
2047 {
2048 *seen |= SEEN_EMITTED;
2049 force_source_line = true;
2050 }
2051 else
2052 *seen |= SEEN_BB;
2053
2054 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2055
2056 break;
2057
2058 case NOTE_INSN_EH_REGION_BEG:
2059 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2060 NOTE_EH_HANDLER (insn));
2061 break;
2062
2063 case NOTE_INSN_EH_REGION_END:
2064 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2065 NOTE_EH_HANDLER (insn));
2066 break;
2067
2068 case NOTE_INSN_PROLOGUE_END:
2069 targetm.asm_out.function_end_prologue (file);
2070 profile_after_prologue (file);
2071
2072 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2073 {
2074 *seen |= SEEN_EMITTED;
2075 force_source_line = true;
2076 }
2077 else
2078 *seen |= SEEN_NOTE;
2079
2080 break;
2081
2082 case NOTE_INSN_EPILOGUE_BEG:
2083 if (!DECL_IGNORED_P (current_function_decl))
2084 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2085 targetm.asm_out.function_begin_epilogue (file);
2086 break;
2087
2088 case NOTE_INSN_CFI:
2089 dwarf2out_emit_cfi (NOTE_CFI (insn));
2090 break;
2091
2092 case NOTE_INSN_CFI_LABEL:
2093 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2094 NOTE_LABEL_NUMBER (insn));
2095 break;
2096
2097 case NOTE_INSN_FUNCTION_BEG:
2098 app_disable ();
2099 if (!DECL_IGNORED_P (current_function_decl))
2100 debug_hooks->end_prologue (last_linenum, last_filename);
2101
2102 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2103 {
2104 *seen |= SEEN_EMITTED;
2105 force_source_line = true;
2106 }
2107 else
2108 *seen |= SEEN_NOTE;
2109
2110 break;
2111
2112 case NOTE_INSN_BLOCK_BEG:
2113 if (debug_info_level == DINFO_LEVEL_NORMAL
2114 || debug_info_level == DINFO_LEVEL_VERBOSE
2115 || write_symbols == DWARF2_DEBUG
2116 || write_symbols == VMS_AND_DWARF2_DEBUG
2117 || write_symbols == VMS_DEBUG)
2118 {
2119 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2120
2121 app_disable ();
2122 ++block_depth;
2123 high_block_linenum = last_linenum;
2124
2125 /* Output debugging info about the symbol-block beginning. */
2126 if (!DECL_IGNORED_P (current_function_decl))
2127 debug_hooks->begin_block (last_linenum, n);
2128
2129 /* Mark this block as output. */
2130 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2131 }
2132 if (write_symbols == DBX_DEBUG
2133 || write_symbols == SDB_DEBUG)
2134 {
2135 location_t *locus_ptr
2136 = block_nonartificial_location (NOTE_BLOCK (insn));
2137
2138 if (locus_ptr != NULL)
2139 {
2140 override_filename = LOCATION_FILE (*locus_ptr);
2141 override_linenum = LOCATION_LINE (*locus_ptr);
2142 }
2143 }
2144 break;
2145
2146 case NOTE_INSN_BLOCK_END:
2147 if (debug_info_level == DINFO_LEVEL_NORMAL
2148 || debug_info_level == DINFO_LEVEL_VERBOSE
2149 || write_symbols == DWARF2_DEBUG
2150 || write_symbols == VMS_AND_DWARF2_DEBUG
2151 || write_symbols == VMS_DEBUG)
2152 {
2153 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2154
2155 app_disable ();
2156
2157 /* End of a symbol-block. */
2158 --block_depth;
2159 gcc_assert (block_depth >= 0);
2160
2161 if (!DECL_IGNORED_P (current_function_decl))
2162 debug_hooks->end_block (high_block_linenum, n);
2163 }
2164 if (write_symbols == DBX_DEBUG
2165 || write_symbols == SDB_DEBUG)
2166 {
2167 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2168 location_t *locus_ptr
2169 = block_nonartificial_location (outer_block);
2170
2171 if (locus_ptr != NULL)
2172 {
2173 override_filename = LOCATION_FILE (*locus_ptr);
2174 override_linenum = LOCATION_LINE (*locus_ptr);
2175 }
2176 else
2177 {
2178 override_filename = NULL;
2179 override_linenum = 0;
2180 }
2181 }
2182 break;
2183
2184 case NOTE_INSN_DELETED_LABEL:
2185 /* Emit the label. We may have deleted the CODE_LABEL because
2186 the label could be proved to be unreachable, though still
2187 referenced (in the form of having its address taken. */
2188 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2189 break;
2190
2191 case NOTE_INSN_DELETED_DEBUG_LABEL:
2192 /* Similarly, but need to use different namespace for it. */
2193 if (CODE_LABEL_NUMBER (insn) != -1)
2194 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2195 break;
2196
2197 case NOTE_INSN_VAR_LOCATION:
2198 case NOTE_INSN_CALL_ARG_LOCATION:
2199 if (!DECL_IGNORED_P (current_function_decl))
2200 debug_hooks->var_location (insn);
2201 break;
2202
2203 default:
2204 gcc_unreachable ();
2205 break;
2206 }
2207 break;
2208
2209 case BARRIER:
2210 break;
2211
2212 case CODE_LABEL:
2213 /* The target port might emit labels in the output function for
2214 some insn, e.g. sh.c output_branchy_insn. */
2215 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2216 {
2217 int align = LABEL_TO_ALIGNMENT (insn);
2218 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2219 int max_skip = LABEL_TO_MAX_SKIP (insn);
2220 #endif
2221
2222 if (align && NEXT_INSN (insn))
2223 {
2224 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2225 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2226 #else
2227 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2228 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2229 #else
2230 ASM_OUTPUT_ALIGN (file, align);
2231 #endif
2232 #endif
2233 }
2234 }
2235 CC_STATUS_INIT;
2236
2237 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2238 debug_hooks->label (insn);
2239
2240 app_disable ();
2241
2242 next = next_nonnote_insn (insn);
2243 /* If this label is followed by a jump-table, make sure we put
2244 the label in the read-only section. Also possibly write the
2245 label and jump table together. */
2246 if (next != 0 && JUMP_TABLE_DATA_P (next))
2247 {
2248 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2249 /* In this case, the case vector is being moved by the
2250 target, so don't output the label at all. Leave that
2251 to the back end macros. */
2252 #else
2253 if (! JUMP_TABLES_IN_TEXT_SECTION)
2254 {
2255 int log_align;
2256
2257 switch_to_section (targetm.asm_out.function_rodata_section
2258 (current_function_decl));
2259
2260 #ifdef ADDR_VEC_ALIGN
2261 log_align = ADDR_VEC_ALIGN (next);
2262 #else
2263 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2264 #endif
2265 ASM_OUTPUT_ALIGN (file, log_align);
2266 }
2267 else
2268 switch_to_section (current_function_section ());
2269
2270 #ifdef ASM_OUTPUT_CASE_LABEL
2271 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2272 next);
2273 #else
2274 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2275 #endif
2276 #endif
2277 break;
2278 }
2279 if (LABEL_ALT_ENTRY_P (insn))
2280 output_alternate_entry_point (file, insn);
2281 else
2282 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2283 break;
2284
2285 default:
2286 {
2287 rtx body = PATTERN (insn);
2288 int insn_code_number;
2289 const char *templ;
2290 bool is_stmt;
2291
2292 /* Reset this early so it is correct for ASM statements. */
2293 current_insn_predicate = NULL_RTX;
2294
2295 /* An INSN, JUMP_INSN or CALL_INSN.
2296 First check for special kinds that recog doesn't recognize. */
2297
2298 if (GET_CODE (body) == USE /* These are just declarations. */
2299 || GET_CODE (body) == CLOBBER)
2300 break;
2301
2302 #ifdef HAVE_cc0
2303 {
2304 /* If there is a REG_CC_SETTER note on this insn, it means that
2305 the setting of the condition code was done in the delay slot
2306 of the insn that branched here. So recover the cc status
2307 from the insn that set it. */
2308
2309 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2310 if (note)
2311 {
2312 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2313 cc_prev_status = cc_status;
2314 }
2315 }
2316 #endif
2317
2318 /* Detect insns that are really jump-tables
2319 and output them as such. */
2320
2321 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2322 {
2323 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2324 int vlen, idx;
2325 #endif
2326
2327 if (! JUMP_TABLES_IN_TEXT_SECTION)
2328 switch_to_section (targetm.asm_out.function_rodata_section
2329 (current_function_decl));
2330 else
2331 switch_to_section (current_function_section ());
2332
2333 app_disable ();
2334
2335 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2336 if (GET_CODE (body) == ADDR_VEC)
2337 {
2338 #ifdef ASM_OUTPUT_ADDR_VEC
2339 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2340 #else
2341 gcc_unreachable ();
2342 #endif
2343 }
2344 else
2345 {
2346 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2347 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2348 #else
2349 gcc_unreachable ();
2350 #endif
2351 }
2352 #else
2353 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2354 for (idx = 0; idx < vlen; idx++)
2355 {
2356 if (GET_CODE (body) == ADDR_VEC)
2357 {
2358 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2359 ASM_OUTPUT_ADDR_VEC_ELT
2360 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2361 #else
2362 gcc_unreachable ();
2363 #endif
2364 }
2365 else
2366 {
2367 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2368 ASM_OUTPUT_ADDR_DIFF_ELT
2369 (file,
2370 body,
2371 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2372 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2373 #else
2374 gcc_unreachable ();
2375 #endif
2376 }
2377 }
2378 #ifdef ASM_OUTPUT_CASE_END
2379 ASM_OUTPUT_CASE_END (file,
2380 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2381 insn);
2382 #endif
2383 #endif
2384
2385 switch_to_section (current_function_section ());
2386
2387 break;
2388 }
2389 /* Output this line note if it is the first or the last line
2390 note in a row. */
2391 if (!DECL_IGNORED_P (current_function_decl)
2392 && notice_source_line (insn, &is_stmt))
2393 (*debug_hooks->source_line) (last_linenum, last_filename,
2394 last_discriminator, is_stmt);
2395
2396 if (GET_CODE (body) == ASM_INPUT)
2397 {
2398 const char *string = XSTR (body, 0);
2399
2400 /* There's no telling what that did to the condition codes. */
2401 CC_STATUS_INIT;
2402
2403 if (string[0])
2404 {
2405 expanded_location loc;
2406
2407 app_enable ();
2408 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2409 if (*loc.file && loc.line)
2410 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2411 ASM_COMMENT_START, loc.line, loc.file);
2412 fprintf (asm_out_file, "\t%s\n", string);
2413 #if HAVE_AS_LINE_ZERO
2414 if (*loc.file && loc.line)
2415 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2416 #endif
2417 }
2418 break;
2419 }
2420
2421 /* Detect `asm' construct with operands. */
2422 if (asm_noperands (body) >= 0)
2423 {
2424 unsigned int noperands = asm_noperands (body);
2425 rtx *ops = XALLOCAVEC (rtx, noperands);
2426 const char *string;
2427 location_t loc;
2428 expanded_location expanded;
2429
2430 /* There's no telling what that did to the condition codes. */
2431 CC_STATUS_INIT;
2432
2433 /* Get out the operand values. */
2434 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2435 /* Inhibit dying on what would otherwise be compiler bugs. */
2436 insn_noperands = noperands;
2437 this_is_asm_operands = insn;
2438 expanded = expand_location (loc);
2439
2440 #ifdef FINAL_PRESCAN_INSN
2441 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2442 #endif
2443
2444 /* Output the insn using them. */
2445 if (string[0])
2446 {
2447 app_enable ();
2448 if (expanded.file && expanded.line)
2449 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2450 ASM_COMMENT_START, expanded.line, expanded.file);
2451 output_asm_insn (string, ops);
2452 #if HAVE_AS_LINE_ZERO
2453 if (expanded.file && expanded.line)
2454 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2455 #endif
2456 }
2457
2458 if (targetm.asm_out.final_postscan_insn)
2459 targetm.asm_out.final_postscan_insn (file, insn, ops,
2460 insn_noperands);
2461
2462 this_is_asm_operands = 0;
2463 break;
2464 }
2465
2466 app_disable ();
2467
2468 if (GET_CODE (body) == SEQUENCE)
2469 {
2470 /* A delayed-branch sequence */
2471 int i;
2472
2473 final_sequence = body;
2474
2475 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2476 force the restoration of a comparison that was previously
2477 thought unnecessary. If that happens, cancel this sequence
2478 and cause that insn to be restored. */
2479
2480 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2481 if (next != XVECEXP (body, 0, 1))
2482 {
2483 final_sequence = 0;
2484 return next;
2485 }
2486
2487 for (i = 1; i < XVECLEN (body, 0); i++)
2488 {
2489 rtx insn = XVECEXP (body, 0, i);
2490 rtx next = NEXT_INSN (insn);
2491 /* We loop in case any instruction in a delay slot gets
2492 split. */
2493 do
2494 insn = final_scan_insn (insn, file, 0, 1, seen);
2495 while (insn != next);
2496 }
2497 #ifdef DBR_OUTPUT_SEQEND
2498 DBR_OUTPUT_SEQEND (file);
2499 #endif
2500 final_sequence = 0;
2501
2502 /* If the insn requiring the delay slot was a CALL_INSN, the
2503 insns in the delay slot are actually executed before the
2504 called function. Hence we don't preserve any CC-setting
2505 actions in these insns and the CC must be marked as being
2506 clobbered by the function. */
2507 if (CALL_P (XVECEXP (body, 0, 0)))
2508 {
2509 CC_STATUS_INIT;
2510 }
2511 break;
2512 }
2513
2514 /* We have a real machine instruction as rtl. */
2515
2516 body = PATTERN (insn);
2517
2518 #ifdef HAVE_cc0
2519 set = single_set (insn);
2520
2521 /* Check for redundant test and compare instructions
2522 (when the condition codes are already set up as desired).
2523 This is done only when optimizing; if not optimizing,
2524 it should be possible for the user to alter a variable
2525 with the debugger in between statements
2526 and the next statement should reexamine the variable
2527 to compute the condition codes. */
2528
2529 if (optimize_p)
2530 {
2531 if (set
2532 && GET_CODE (SET_DEST (set)) == CC0
2533 && insn != last_ignored_compare)
2534 {
2535 rtx src1, src2;
2536 if (GET_CODE (SET_SRC (set)) == SUBREG)
2537 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2538
2539 src1 = SET_SRC (set);
2540 src2 = NULL_RTX;
2541 if (GET_CODE (SET_SRC (set)) == COMPARE)
2542 {
2543 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2544 XEXP (SET_SRC (set), 0)
2545 = alter_subreg (&XEXP (SET_SRC (set), 0));
2546 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2547 XEXP (SET_SRC (set), 1)
2548 = alter_subreg (&XEXP (SET_SRC (set), 1));
2549 if (XEXP (SET_SRC (set), 1)
2550 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2551 src2 = XEXP (SET_SRC (set), 0);
2552 }
2553 if ((cc_status.value1 != 0
2554 && rtx_equal_p (src1, cc_status.value1))
2555 || (cc_status.value2 != 0
2556 && rtx_equal_p (src1, cc_status.value2))
2557 || (src2 != 0 && cc_status.value1 != 0
2558 && rtx_equal_p (src2, cc_status.value1))
2559 || (src2 != 0 && cc_status.value2 != 0
2560 && rtx_equal_p (src2, cc_status.value2)))
2561 {
2562 /* Don't delete insn if it has an addressing side-effect. */
2563 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2564 /* or if anything in it is volatile. */
2565 && ! volatile_refs_p (PATTERN (insn)))
2566 {
2567 /* We don't really delete the insn; just ignore it. */
2568 last_ignored_compare = insn;
2569 break;
2570 }
2571 }
2572 }
2573 }
2574
2575 /* If this is a conditional branch, maybe modify it
2576 if the cc's are in a nonstandard state
2577 so that it accomplishes the same thing that it would
2578 do straightforwardly if the cc's were set up normally. */
2579
2580 if (cc_status.flags != 0
2581 && JUMP_P (insn)
2582 && GET_CODE (body) == SET
2583 && SET_DEST (body) == pc_rtx
2584 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2585 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2586 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2587 {
2588 /* This function may alter the contents of its argument
2589 and clear some of the cc_status.flags bits.
2590 It may also return 1 meaning condition now always true
2591 or -1 meaning condition now always false
2592 or 2 meaning condition nontrivial but altered. */
2593 int result = alter_cond (XEXP (SET_SRC (body), 0));
2594 /* If condition now has fixed value, replace the IF_THEN_ELSE
2595 with its then-operand or its else-operand. */
2596 if (result == 1)
2597 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2598 if (result == -1)
2599 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2600
2601 /* The jump is now either unconditional or a no-op.
2602 If it has become a no-op, don't try to output it.
2603 (It would not be recognized.) */
2604 if (SET_SRC (body) == pc_rtx)
2605 {
2606 delete_insn (insn);
2607 break;
2608 }
2609 else if (ANY_RETURN_P (SET_SRC (body)))
2610 /* Replace (set (pc) (return)) with (return). */
2611 PATTERN (insn) = body = SET_SRC (body);
2612
2613 /* Rerecognize the instruction if it has changed. */
2614 if (result != 0)
2615 INSN_CODE (insn) = -1;
2616 }
2617
2618 /* If this is a conditional trap, maybe modify it if the cc's
2619 are in a nonstandard state so that it accomplishes the same
2620 thing that it would do straightforwardly if the cc's were
2621 set up normally. */
2622 if (cc_status.flags != 0
2623 && NONJUMP_INSN_P (insn)
2624 && GET_CODE (body) == TRAP_IF
2625 && COMPARISON_P (TRAP_CONDITION (body))
2626 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2627 {
2628 /* This function may alter the contents of its argument
2629 and clear some of the cc_status.flags bits.
2630 It may also return 1 meaning condition now always true
2631 or -1 meaning condition now always false
2632 or 2 meaning condition nontrivial but altered. */
2633 int result = alter_cond (TRAP_CONDITION (body));
2634
2635 /* If TRAP_CONDITION has become always false, delete the
2636 instruction. */
2637 if (result == -1)
2638 {
2639 delete_insn (insn);
2640 break;
2641 }
2642
2643 /* If TRAP_CONDITION has become always true, replace
2644 TRAP_CONDITION with const_true_rtx. */
2645 if (result == 1)
2646 TRAP_CONDITION (body) = const_true_rtx;
2647
2648 /* Rerecognize the instruction if it has changed. */
2649 if (result != 0)
2650 INSN_CODE (insn) = -1;
2651 }
2652
2653 /* Make same adjustments to instructions that examine the
2654 condition codes without jumping and instructions that
2655 handle conditional moves (if this machine has either one). */
2656
2657 if (cc_status.flags != 0
2658 && set != 0)
2659 {
2660 rtx cond_rtx, then_rtx, else_rtx;
2661
2662 if (!JUMP_P (insn)
2663 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2664 {
2665 cond_rtx = XEXP (SET_SRC (set), 0);
2666 then_rtx = XEXP (SET_SRC (set), 1);
2667 else_rtx = XEXP (SET_SRC (set), 2);
2668 }
2669 else
2670 {
2671 cond_rtx = SET_SRC (set);
2672 then_rtx = const_true_rtx;
2673 else_rtx = const0_rtx;
2674 }
2675
2676 switch (GET_CODE (cond_rtx))
2677 {
2678 case GTU:
2679 case GT:
2680 case LTU:
2681 case LT:
2682 case GEU:
2683 case GE:
2684 case LEU:
2685 case LE:
2686 case EQ:
2687 case NE:
2688 {
2689 int result;
2690 if (XEXP (cond_rtx, 0) != cc0_rtx)
2691 break;
2692 result = alter_cond (cond_rtx);
2693 if (result == 1)
2694 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2695 else if (result == -1)
2696 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2697 else if (result == 2)
2698 INSN_CODE (insn) = -1;
2699 if (SET_DEST (set) == SET_SRC (set))
2700 delete_insn (insn);
2701 }
2702 break;
2703
2704 default:
2705 break;
2706 }
2707 }
2708
2709 #endif
2710
2711 #ifdef HAVE_peephole
2712 /* Do machine-specific peephole optimizations if desired. */
2713
2714 if (optimize_p && !flag_no_peephole && !nopeepholes)
2715 {
2716 rtx next = peephole (insn);
2717 /* When peepholing, if there were notes within the peephole,
2718 emit them before the peephole. */
2719 if (next != 0 && next != NEXT_INSN (insn))
2720 {
2721 rtx note, prev = PREV_INSN (insn);
2722
2723 for (note = NEXT_INSN (insn); note != next;
2724 note = NEXT_INSN (note))
2725 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2726
2727 /* Put the notes in the proper position for a later
2728 rescan. For example, the SH target can do this
2729 when generating a far jump in a delayed branch
2730 sequence. */
2731 note = NEXT_INSN (insn);
2732 PREV_INSN (note) = prev;
2733 NEXT_INSN (prev) = note;
2734 NEXT_INSN (PREV_INSN (next)) = insn;
2735 PREV_INSN (insn) = PREV_INSN (next);
2736 NEXT_INSN (insn) = next;
2737 PREV_INSN (next) = insn;
2738 }
2739
2740 /* PEEPHOLE might have changed this. */
2741 body = PATTERN (insn);
2742 }
2743 #endif
2744
2745 /* Try to recognize the instruction.
2746 If successful, verify that the operands satisfy the
2747 constraints for the instruction. Crash if they don't,
2748 since `reload' should have changed them so that they do. */
2749
2750 insn_code_number = recog_memoized (insn);
2751 cleanup_subreg_operands (insn);
2752
2753 /* Dump the insn in the assembly for debugging (-dAP).
2754 If the final dump is requested as slim RTL, dump slim
2755 RTL to the assembly file also. */
2756 if (flag_dump_rtl_in_asm)
2757 {
2758 print_rtx_head = ASM_COMMENT_START;
2759 if (! (dump_flags & TDF_SLIM))
2760 print_rtl_single (asm_out_file, insn);
2761 else
2762 dump_insn_slim (asm_out_file, insn);
2763 print_rtx_head = "";
2764 }
2765
2766 if (! constrain_operands_cached (1))
2767 fatal_insn_not_found (insn);
2768
2769 /* Some target machines need to prescan each insn before
2770 it is output. */
2771
2772 #ifdef FINAL_PRESCAN_INSN
2773 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2774 #endif
2775
2776 if (targetm.have_conditional_execution ()
2777 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2778 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2779
2780 #ifdef HAVE_cc0
2781 cc_prev_status = cc_status;
2782
2783 /* Update `cc_status' for this instruction.
2784 The instruction's output routine may change it further.
2785 If the output routine for a jump insn needs to depend
2786 on the cc status, it should look at cc_prev_status. */
2787
2788 NOTICE_UPDATE_CC (body, insn);
2789 #endif
2790
2791 current_output_insn = debug_insn = insn;
2792
2793 /* Find the proper template for this insn. */
2794 templ = get_insn_template (insn_code_number, insn);
2795
2796 /* If the C code returns 0, it means that it is a jump insn
2797 which follows a deleted test insn, and that test insn
2798 needs to be reinserted. */
2799 if (templ == 0)
2800 {
2801 rtx prev;
2802
2803 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2804
2805 /* We have already processed the notes between the setter and
2806 the user. Make sure we don't process them again, this is
2807 particularly important if one of the notes is a block
2808 scope note or an EH note. */
2809 for (prev = insn;
2810 prev != last_ignored_compare;
2811 prev = PREV_INSN (prev))
2812 {
2813 if (NOTE_P (prev))
2814 delete_insn (prev); /* Use delete_note. */
2815 }
2816
2817 return prev;
2818 }
2819
2820 /* If the template is the string "#", it means that this insn must
2821 be split. */
2822 if (templ[0] == '#' && templ[1] == '\0')
2823 {
2824 rtx new_rtx = try_split (body, insn, 0);
2825
2826 /* If we didn't split the insn, go away. */
2827 if (new_rtx == insn && PATTERN (new_rtx) == body)
2828 fatal_insn ("could not split insn", insn);
2829
2830 #ifdef HAVE_ATTR_length
2831 /* This instruction should have been split in shorten_branches,
2832 to ensure that we would have valid length info for the
2833 splitees. */
2834 gcc_unreachable ();
2835 #endif
2836
2837 return new_rtx;
2838 }
2839
2840 /* ??? This will put the directives in the wrong place if
2841 get_insn_template outputs assembly directly. However calling it
2842 before get_insn_template breaks if the insns is split. */
2843 if (targetm.asm_out.unwind_emit_before_insn
2844 && targetm.asm_out.unwind_emit)
2845 targetm.asm_out.unwind_emit (asm_out_file, insn);
2846
2847 if (CALL_P (insn))
2848 {
2849 rtx x = call_from_call_insn (insn);
2850 x = XEXP (x, 0);
2851 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
2852 {
2853 tree t;
2854 x = XEXP (x, 0);
2855 t = SYMBOL_REF_DECL (x);
2856 if (t)
2857 assemble_external (t);
2858 }
2859 if (!DECL_IGNORED_P (current_function_decl))
2860 debug_hooks->var_location (insn);
2861 }
2862
2863 /* Output assembler code from the template. */
2864 output_asm_insn (templ, recog_data.operand);
2865
2866 /* Some target machines need to postscan each insn after
2867 it is output. */
2868 if (targetm.asm_out.final_postscan_insn)
2869 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
2870 recog_data.n_operands);
2871
2872 if (!targetm.asm_out.unwind_emit_before_insn
2873 && targetm.asm_out.unwind_emit)
2874 targetm.asm_out.unwind_emit (asm_out_file, insn);
2875
2876 current_output_insn = debug_insn = 0;
2877 }
2878 }
2879 return NEXT_INSN (insn);
2880 }
2881 \f
2882 /* Return whether a source line note needs to be emitted before INSN.
2883 Sets IS_STMT to TRUE if the line should be marked as a possible
2884 breakpoint location. */
2885
2886 static bool
2887 notice_source_line (rtx insn, bool *is_stmt)
2888 {
2889 const char *filename;
2890 int linenum;
2891
2892 if (override_filename)
2893 {
2894 filename = override_filename;
2895 linenum = override_linenum;
2896 }
2897 else
2898 {
2899 filename = insn_file (insn);
2900 linenum = insn_line (insn);
2901 }
2902
2903 if (filename == NULL)
2904 return false;
2905
2906 if (force_source_line
2907 || filename != last_filename
2908 || last_linenum != linenum)
2909 {
2910 force_source_line = false;
2911 last_filename = filename;
2912 last_linenum = linenum;
2913 last_discriminator = discriminator;
2914 *is_stmt = true;
2915 high_block_linenum = MAX (last_linenum, high_block_linenum);
2916 high_function_linenum = MAX (last_linenum, high_function_linenum);
2917 return true;
2918 }
2919
2920 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
2921 {
2922 /* If the discriminator changed, but the line number did not,
2923 output the line table entry with is_stmt false so the
2924 debugger does not treat this as a breakpoint location. */
2925 last_discriminator = discriminator;
2926 *is_stmt = false;
2927 return true;
2928 }
2929
2930 return false;
2931 }
2932 \f
2933 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2934 directly to the desired hard register. */
2935
2936 void
2937 cleanup_subreg_operands (rtx insn)
2938 {
2939 int i;
2940 bool changed = false;
2941 extract_insn_cached (insn);
2942 for (i = 0; i < recog_data.n_operands; i++)
2943 {
2944 /* The following test cannot use recog_data.operand when testing
2945 for a SUBREG: the underlying object might have been changed
2946 already if we are inside a match_operator expression that
2947 matches the else clause. Instead we test the underlying
2948 expression directly. */
2949 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2950 {
2951 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2952 changed = true;
2953 }
2954 else if (GET_CODE (recog_data.operand[i]) == PLUS
2955 || GET_CODE (recog_data.operand[i]) == MULT
2956 || MEM_P (recog_data.operand[i]))
2957 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
2958 }
2959
2960 for (i = 0; i < recog_data.n_dups; i++)
2961 {
2962 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2963 {
2964 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2965 changed = true;
2966 }
2967 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2968 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2969 || MEM_P (*recog_data.dup_loc[i]))
2970 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
2971 }
2972 if (changed)
2973 df_insn_rescan (insn);
2974 }
2975
2976 /* If X is a SUBREG, replace it with a REG or a MEM,
2977 based on the thing it is a subreg of. */
2978
2979 rtx
2980 alter_subreg (rtx *xp)
2981 {
2982 rtx x = *xp;
2983 rtx y = SUBREG_REG (x);
2984
2985 /* simplify_subreg does not remove subreg from volatile references.
2986 We are required to. */
2987 if (MEM_P (y))
2988 {
2989 int offset = SUBREG_BYTE (x);
2990
2991 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2992 contains 0 instead of the proper offset. See simplify_subreg. */
2993 if (offset == 0
2994 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2995 {
2996 int difference = GET_MODE_SIZE (GET_MODE (y))
2997 - GET_MODE_SIZE (GET_MODE (x));
2998 if (WORDS_BIG_ENDIAN)
2999 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3000 if (BYTES_BIG_ENDIAN)
3001 offset += difference % UNITS_PER_WORD;
3002 }
3003
3004 *xp = adjust_address (y, GET_MODE (x), offset);
3005 }
3006 else
3007 {
3008 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3009 SUBREG_BYTE (x));
3010
3011 if (new_rtx != 0)
3012 *xp = new_rtx;
3013 else if (REG_P (y))
3014 {
3015 /* Simplify_subreg can't handle some REG cases, but we have to. */
3016 unsigned int regno;
3017 HOST_WIDE_INT offset;
3018
3019 regno = subreg_regno (x);
3020 if (subreg_lowpart_p (x))
3021 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3022 else
3023 offset = SUBREG_BYTE (x);
3024 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3025 }
3026 }
3027
3028 return *xp;
3029 }
3030
3031 /* Do alter_subreg on all the SUBREGs contained in X. */
3032
3033 static rtx
3034 walk_alter_subreg (rtx *xp, bool *changed)
3035 {
3036 rtx x = *xp;
3037 switch (GET_CODE (x))
3038 {
3039 case PLUS:
3040 case MULT:
3041 case AND:
3042 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3043 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3044 break;
3045
3046 case MEM:
3047 case ZERO_EXTEND:
3048 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3049 break;
3050
3051 case SUBREG:
3052 *changed = true;
3053 return alter_subreg (xp);
3054
3055 default:
3056 break;
3057 }
3058
3059 return *xp;
3060 }
3061 \f
3062 #ifdef HAVE_cc0
3063
3064 /* Given BODY, the body of a jump instruction, alter the jump condition
3065 as required by the bits that are set in cc_status.flags.
3066 Not all of the bits there can be handled at this level in all cases.
3067
3068 The value is normally 0.
3069 1 means that the condition has become always true.
3070 -1 means that the condition has become always false.
3071 2 means that COND has been altered. */
3072
3073 static int
3074 alter_cond (rtx cond)
3075 {
3076 int value = 0;
3077
3078 if (cc_status.flags & CC_REVERSED)
3079 {
3080 value = 2;
3081 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3082 }
3083
3084 if (cc_status.flags & CC_INVERTED)
3085 {
3086 value = 2;
3087 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3088 }
3089
3090 if (cc_status.flags & CC_NOT_POSITIVE)
3091 switch (GET_CODE (cond))
3092 {
3093 case LE:
3094 case LEU:
3095 case GEU:
3096 /* Jump becomes unconditional. */
3097 return 1;
3098
3099 case GT:
3100 case GTU:
3101 case LTU:
3102 /* Jump becomes no-op. */
3103 return -1;
3104
3105 case GE:
3106 PUT_CODE (cond, EQ);
3107 value = 2;
3108 break;
3109
3110 case LT:
3111 PUT_CODE (cond, NE);
3112 value = 2;
3113 break;
3114
3115 default:
3116 break;
3117 }
3118
3119 if (cc_status.flags & CC_NOT_NEGATIVE)
3120 switch (GET_CODE (cond))
3121 {
3122 case GE:
3123 case GEU:
3124 /* Jump becomes unconditional. */
3125 return 1;
3126
3127 case LT:
3128 case LTU:
3129 /* Jump becomes no-op. */
3130 return -1;
3131
3132 case LE:
3133 case LEU:
3134 PUT_CODE (cond, EQ);
3135 value = 2;
3136 break;
3137
3138 case GT:
3139 case GTU:
3140 PUT_CODE (cond, NE);
3141 value = 2;
3142 break;
3143
3144 default:
3145 break;
3146 }
3147
3148 if (cc_status.flags & CC_NO_OVERFLOW)
3149 switch (GET_CODE (cond))
3150 {
3151 case GEU:
3152 /* Jump becomes unconditional. */
3153 return 1;
3154
3155 case LEU:
3156 PUT_CODE (cond, EQ);
3157 value = 2;
3158 break;
3159
3160 case GTU:
3161 PUT_CODE (cond, NE);
3162 value = 2;
3163 break;
3164
3165 case LTU:
3166 /* Jump becomes no-op. */
3167 return -1;
3168
3169 default:
3170 break;
3171 }
3172
3173 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3174 switch (GET_CODE (cond))
3175 {
3176 default:
3177 gcc_unreachable ();
3178
3179 case NE:
3180 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3181 value = 2;
3182 break;
3183
3184 case EQ:
3185 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3186 value = 2;
3187 break;
3188 }
3189
3190 if (cc_status.flags & CC_NOT_SIGNED)
3191 /* The flags are valid if signed condition operators are converted
3192 to unsigned. */
3193 switch (GET_CODE (cond))
3194 {
3195 case LE:
3196 PUT_CODE (cond, LEU);
3197 value = 2;
3198 break;
3199
3200 case LT:
3201 PUT_CODE (cond, LTU);
3202 value = 2;
3203 break;
3204
3205 case GT:
3206 PUT_CODE (cond, GTU);
3207 value = 2;
3208 break;
3209
3210 case GE:
3211 PUT_CODE (cond, GEU);
3212 value = 2;
3213 break;
3214
3215 default:
3216 break;
3217 }
3218
3219 return value;
3220 }
3221 #endif
3222 \f
3223 /* Report inconsistency between the assembler template and the operands.
3224 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3225
3226 void
3227 output_operand_lossage (const char *cmsgid, ...)
3228 {
3229 char *fmt_string;
3230 char *new_message;
3231 const char *pfx_str;
3232 va_list ap;
3233
3234 va_start (ap, cmsgid);
3235
3236 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3237 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
3238 vasprintf (&new_message, fmt_string, ap);
3239
3240 if (this_is_asm_operands)
3241 error_for_asm (this_is_asm_operands, "%s", new_message);
3242 else
3243 internal_error ("%s", new_message);
3244
3245 free (fmt_string);
3246 free (new_message);
3247 va_end (ap);
3248 }
3249 \f
3250 /* Output of assembler code from a template, and its subroutines. */
3251
3252 /* Annotate the assembly with a comment describing the pattern and
3253 alternative used. */
3254
3255 static void
3256 output_asm_name (void)
3257 {
3258 if (debug_insn)
3259 {
3260 int num = INSN_CODE (debug_insn);
3261 fprintf (asm_out_file, "\t%s %d\t%s",
3262 ASM_COMMENT_START, INSN_UID (debug_insn),
3263 insn_data[num].name);
3264 if (insn_data[num].n_alternatives > 1)
3265 fprintf (asm_out_file, "/%d", which_alternative + 1);
3266 #ifdef HAVE_ATTR_length
3267 fprintf (asm_out_file, "\t[length = %d]",
3268 get_attr_length (debug_insn));
3269 #endif
3270 /* Clear this so only the first assembler insn
3271 of any rtl insn will get the special comment for -dp. */
3272 debug_insn = 0;
3273 }
3274 }
3275
3276 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3277 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3278 corresponds to the address of the object and 0 if to the object. */
3279
3280 static tree
3281 get_mem_expr_from_op (rtx op, int *paddressp)
3282 {
3283 tree expr;
3284 int inner_addressp;
3285
3286 *paddressp = 0;
3287
3288 if (REG_P (op))
3289 return REG_EXPR (op);
3290 else if (!MEM_P (op))
3291 return 0;
3292
3293 if (MEM_EXPR (op) != 0)
3294 return MEM_EXPR (op);
3295
3296 /* Otherwise we have an address, so indicate it and look at the address. */
3297 *paddressp = 1;
3298 op = XEXP (op, 0);
3299
3300 /* First check if we have a decl for the address, then look at the right side
3301 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3302 But don't allow the address to itself be indirect. */
3303 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3304 return expr;
3305 else if (GET_CODE (op) == PLUS
3306 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3307 return expr;
3308
3309 while (UNARY_P (op)
3310 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3311 op = XEXP (op, 0);
3312
3313 expr = get_mem_expr_from_op (op, &inner_addressp);
3314 return inner_addressp ? 0 : expr;
3315 }
3316
3317 /* Output operand names for assembler instructions. OPERANDS is the
3318 operand vector, OPORDER is the order to write the operands, and NOPS
3319 is the number of operands to write. */
3320
3321 static void
3322 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3323 {
3324 int wrote = 0;
3325 int i;
3326
3327 for (i = 0; i < nops; i++)
3328 {
3329 int addressp;
3330 rtx op = operands[oporder[i]];
3331 tree expr = get_mem_expr_from_op (op, &addressp);
3332
3333 fprintf (asm_out_file, "%c%s",
3334 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3335 wrote = 1;
3336 if (expr)
3337 {
3338 fprintf (asm_out_file, "%s",
3339 addressp ? "*" : "");
3340 print_mem_expr (asm_out_file, expr);
3341 wrote = 1;
3342 }
3343 else if (REG_P (op) && ORIGINAL_REGNO (op)
3344 && ORIGINAL_REGNO (op) != REGNO (op))
3345 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3346 }
3347 }
3348
3349 #ifdef ASSEMBLER_DIALECT
3350 /* Helper function to parse assembler dialects in the asm string.
3351 This is called from output_asm_insn and asm_fprintf. */
3352 static const char *
3353 do_assembler_dialects (const char *p, int *dialect)
3354 {
3355 char c = *(p - 1);
3356
3357 switch (c)
3358 {
3359 case '{':
3360 {
3361 int i;
3362
3363 if (*dialect)
3364 output_operand_lossage ("nested assembly dialect alternatives");
3365 else
3366 *dialect = 1;
3367
3368 /* If we want the first dialect, do nothing. Otherwise, skip
3369 DIALECT_NUMBER of strings ending with '|'. */
3370 for (i = 0; i < dialect_number; i++)
3371 {
3372 while (*p && *p != '}' && *p++ != '|')
3373 ;
3374 if (*p == '}')
3375 break;
3376 }
3377
3378 if (*p == '\0')
3379 output_operand_lossage ("unterminated assembly dialect alternative");
3380 }
3381 break;
3382
3383 case '|':
3384 if (*dialect)
3385 {
3386 /* Skip to close brace. */
3387 do
3388 {
3389 if (*p == '\0')
3390 {
3391 output_operand_lossage ("unterminated assembly dialect alternative");
3392 break;
3393 }
3394 }
3395 while (*p++ != '}');
3396 *dialect = 0;
3397 }
3398 else
3399 putc (c, asm_out_file);
3400 break;
3401
3402 case '}':
3403 if (! *dialect)
3404 putc (c, asm_out_file);
3405 *dialect = 0;
3406 break;
3407 default:
3408 gcc_unreachable ();
3409 }
3410
3411 return p;
3412 }
3413 #endif
3414
3415 /* Output text from TEMPLATE to the assembler output file,
3416 obeying %-directions to substitute operands taken from
3417 the vector OPERANDS.
3418
3419 %N (for N a digit) means print operand N in usual manner.
3420 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3421 and print the label name with no punctuation.
3422 %cN means require operand N to be a constant
3423 and print the constant expression with no punctuation.
3424 %aN means expect operand N to be a memory address
3425 (not a memory reference!) and print a reference
3426 to that address.
3427 %nN means expect operand N to be a constant
3428 and print a constant expression for minus the value
3429 of the operand, with no other punctuation. */
3430
3431 void
3432 output_asm_insn (const char *templ, rtx *operands)
3433 {
3434 const char *p;
3435 int c;
3436 #ifdef ASSEMBLER_DIALECT
3437 int dialect = 0;
3438 #endif
3439 int oporder[MAX_RECOG_OPERANDS];
3440 char opoutput[MAX_RECOG_OPERANDS];
3441 int ops = 0;
3442
3443 /* An insn may return a null string template
3444 in a case where no assembler code is needed. */
3445 if (*templ == 0)
3446 return;
3447
3448 memset (opoutput, 0, sizeof opoutput);
3449 p = templ;
3450 putc ('\t', asm_out_file);
3451
3452 #ifdef ASM_OUTPUT_OPCODE
3453 ASM_OUTPUT_OPCODE (asm_out_file, p);
3454 #endif
3455
3456 while ((c = *p++))
3457 switch (c)
3458 {
3459 case '\n':
3460 if (flag_verbose_asm)
3461 output_asm_operand_names (operands, oporder, ops);
3462 if (flag_print_asm_name)
3463 output_asm_name ();
3464
3465 ops = 0;
3466 memset (opoutput, 0, sizeof opoutput);
3467
3468 putc (c, asm_out_file);
3469 #ifdef ASM_OUTPUT_OPCODE
3470 while ((c = *p) == '\t')
3471 {
3472 putc (c, asm_out_file);
3473 p++;
3474 }
3475 ASM_OUTPUT_OPCODE (asm_out_file, p);
3476 #endif
3477 break;
3478
3479 #ifdef ASSEMBLER_DIALECT
3480 case '{':
3481 case '}':
3482 case '|':
3483 p = do_assembler_dialects (p, &dialect);
3484 break;
3485 #endif
3486
3487 case '%':
3488 /* %% outputs a single %. */
3489 if (*p == '%')
3490 {
3491 p++;
3492 putc (c, asm_out_file);
3493 }
3494 /* %= outputs a number which is unique to each insn in the entire
3495 compilation. This is useful for making local labels that are
3496 referred to more than once in a given insn. */
3497 else if (*p == '=')
3498 {
3499 p++;
3500 fprintf (asm_out_file, "%d", insn_counter);
3501 }
3502 /* % followed by a letter and some digits
3503 outputs an operand in a special way depending on the letter.
3504 Letters `acln' are implemented directly.
3505 Other letters are passed to `output_operand' so that
3506 the TARGET_PRINT_OPERAND hook can define them. */
3507 else if (ISALPHA (*p))
3508 {
3509 int letter = *p++;
3510 unsigned long opnum;
3511 char *endptr;
3512
3513 opnum = strtoul (p, &endptr, 10);
3514
3515 if (endptr == p)
3516 output_operand_lossage ("operand number missing "
3517 "after %%-letter");
3518 else if (this_is_asm_operands && opnum >= insn_noperands)
3519 output_operand_lossage ("operand number out of range");
3520 else if (letter == 'l')
3521 output_asm_label (operands[opnum]);
3522 else if (letter == 'a')
3523 output_address (operands[opnum]);
3524 else if (letter == 'c')
3525 {
3526 if (CONSTANT_ADDRESS_P (operands[opnum]))
3527 output_addr_const (asm_out_file, operands[opnum]);
3528 else
3529 output_operand (operands[opnum], 'c');
3530 }
3531 else if (letter == 'n')
3532 {
3533 if (CONST_INT_P (operands[opnum]))
3534 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3535 - INTVAL (operands[opnum]));
3536 else
3537 {
3538 putc ('-', asm_out_file);
3539 output_addr_const (asm_out_file, operands[opnum]);
3540 }
3541 }
3542 else
3543 output_operand (operands[opnum], letter);
3544
3545 if (!opoutput[opnum])
3546 oporder[ops++] = opnum;
3547 opoutput[opnum] = 1;
3548
3549 p = endptr;
3550 c = *p;
3551 }
3552 /* % followed by a digit outputs an operand the default way. */
3553 else if (ISDIGIT (*p))
3554 {
3555 unsigned long opnum;
3556 char *endptr;
3557
3558 opnum = strtoul (p, &endptr, 10);
3559 if (this_is_asm_operands && opnum >= insn_noperands)
3560 output_operand_lossage ("operand number out of range");
3561 else
3562 output_operand (operands[opnum], 0);
3563
3564 if (!opoutput[opnum])
3565 oporder[ops++] = opnum;
3566 opoutput[opnum] = 1;
3567
3568 p = endptr;
3569 c = *p;
3570 }
3571 /* % followed by punctuation: output something for that
3572 punctuation character alone, with no operand. The
3573 TARGET_PRINT_OPERAND hook decides what is actually done. */
3574 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3575 output_operand (NULL_RTX, *p++);
3576 else
3577 output_operand_lossage ("invalid %%-code");
3578 break;
3579
3580 default:
3581 putc (c, asm_out_file);
3582 }
3583
3584 /* Write out the variable names for operands, if we know them. */
3585 if (flag_verbose_asm)
3586 output_asm_operand_names (operands, oporder, ops);
3587 if (flag_print_asm_name)
3588 output_asm_name ();
3589
3590 putc ('\n', asm_out_file);
3591 }
3592 \f
3593 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3594
3595 void
3596 output_asm_label (rtx x)
3597 {
3598 char buf[256];
3599
3600 if (GET_CODE (x) == LABEL_REF)
3601 x = XEXP (x, 0);
3602 if (LABEL_P (x)
3603 || (NOTE_P (x)
3604 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3605 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3606 else
3607 output_operand_lossage ("'%%l' operand isn't a label");
3608
3609 assemble_name (asm_out_file, buf);
3610 }
3611
3612 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and
3613 output_operand. Marks SYMBOL_REFs as referenced through use of
3614 assemble_external. */
3615
3616 static int
3617 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
3618 {
3619 rtx x = *xp;
3620
3621 /* If we have a used symbol, we may have to emit assembly
3622 annotations corresponding to whether the symbol is external, weak
3623 or has non-default visibility. */
3624 if (GET_CODE (x) == SYMBOL_REF)
3625 {
3626 tree t;
3627
3628 t = SYMBOL_REF_DECL (x);
3629 if (t)
3630 assemble_external (t);
3631
3632 return -1;
3633 }
3634
3635 return 0;
3636 }
3637
3638 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3639
3640 void
3641 mark_symbol_refs_as_used (rtx x)
3642 {
3643 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3644 }
3645
3646 /* Print operand X using machine-dependent assembler syntax.
3647 CODE is a non-digit that preceded the operand-number in the % spec,
3648 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3649 between the % and the digits.
3650 When CODE is a non-letter, X is 0.
3651
3652 The meanings of the letters are machine-dependent and controlled
3653 by TARGET_PRINT_OPERAND. */
3654
3655 void
3656 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3657 {
3658 if (x && GET_CODE (x) == SUBREG)
3659 x = alter_subreg (&x);
3660
3661 /* X must not be a pseudo reg. */
3662 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3663
3664 targetm.asm_out.print_operand (asm_out_file, x, code);
3665
3666 if (x == NULL_RTX)
3667 return;
3668
3669 for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
3670 }
3671
3672 /* Print a memory reference operand for address X using
3673 machine-dependent assembler syntax. */
3674
3675 void
3676 output_address (rtx x)
3677 {
3678 bool changed = false;
3679 walk_alter_subreg (&x, &changed);
3680 targetm.asm_out.print_operand_address (asm_out_file, x);
3681 }
3682 \f
3683 /* Print an integer constant expression in assembler syntax.
3684 Addition and subtraction are the only arithmetic
3685 that may appear in these expressions. */
3686
3687 void
3688 output_addr_const (FILE *file, rtx x)
3689 {
3690 char buf[256];
3691
3692 restart:
3693 switch (GET_CODE (x))
3694 {
3695 case PC:
3696 putc ('.', file);
3697 break;
3698
3699 case SYMBOL_REF:
3700 if (SYMBOL_REF_DECL (x))
3701 assemble_external (SYMBOL_REF_DECL (x));
3702 #ifdef ASM_OUTPUT_SYMBOL_REF
3703 ASM_OUTPUT_SYMBOL_REF (file, x);
3704 #else
3705 assemble_name (file, XSTR (x, 0));
3706 #endif
3707 break;
3708
3709 case LABEL_REF:
3710 x = XEXP (x, 0);
3711 /* Fall through. */
3712 case CODE_LABEL:
3713 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3714 #ifdef ASM_OUTPUT_LABEL_REF
3715 ASM_OUTPUT_LABEL_REF (file, buf);
3716 #else
3717 assemble_name (file, buf);
3718 #endif
3719 break;
3720
3721 case CONST_INT:
3722 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3723 break;
3724
3725 case CONST:
3726 /* This used to output parentheses around the expression,
3727 but that does not work on the 386 (either ATT or BSD assembler). */
3728 output_addr_const (file, XEXP (x, 0));
3729 break;
3730
3731 case CONST_DOUBLE:
3732 if (GET_MODE (x) == VOIDmode)
3733 {
3734 /* We can use %d if the number is one word and positive. */
3735 if (CONST_DOUBLE_HIGH (x))
3736 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3737 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3738 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3739 else if (CONST_DOUBLE_LOW (x) < 0)
3740 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3741 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3742 else
3743 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3744 }
3745 else
3746 /* We can't handle floating point constants;
3747 PRINT_OPERAND must handle them. */
3748 output_operand_lossage ("floating constant misused");
3749 break;
3750
3751 case CONST_FIXED:
3752 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3753 break;
3754
3755 case PLUS:
3756 /* Some assemblers need integer constants to appear last (eg masm). */
3757 if (CONST_INT_P (XEXP (x, 0)))
3758 {
3759 output_addr_const (file, XEXP (x, 1));
3760 if (INTVAL (XEXP (x, 0)) >= 0)
3761 fprintf (file, "+");
3762 output_addr_const (file, XEXP (x, 0));
3763 }
3764 else
3765 {
3766 output_addr_const (file, XEXP (x, 0));
3767 if (!CONST_INT_P (XEXP (x, 1))
3768 || INTVAL (XEXP (x, 1)) >= 0)
3769 fprintf (file, "+");
3770 output_addr_const (file, XEXP (x, 1));
3771 }
3772 break;
3773
3774 case MINUS:
3775 /* Avoid outputting things like x-x or x+5-x,
3776 since some assemblers can't handle that. */
3777 x = simplify_subtraction (x);
3778 if (GET_CODE (x) != MINUS)
3779 goto restart;
3780
3781 output_addr_const (file, XEXP (x, 0));
3782 fprintf (file, "-");
3783 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3784 || GET_CODE (XEXP (x, 1)) == PC
3785 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3786 output_addr_const (file, XEXP (x, 1));
3787 else
3788 {
3789 fputs (targetm.asm_out.open_paren, file);
3790 output_addr_const (file, XEXP (x, 1));
3791 fputs (targetm.asm_out.close_paren, file);
3792 }
3793 break;
3794
3795 case ZERO_EXTEND:
3796 case SIGN_EXTEND:
3797 case SUBREG:
3798 case TRUNCATE:
3799 output_addr_const (file, XEXP (x, 0));
3800 break;
3801
3802 default:
3803 if (targetm.asm_out.output_addr_const_extra (file, x))
3804 break;
3805
3806 output_operand_lossage ("invalid expression as operand");
3807 }
3808 }
3809 \f
3810 /* Output a quoted string. */
3811
3812 void
3813 output_quoted_string (FILE *asm_file, const char *string)
3814 {
3815 #ifdef OUTPUT_QUOTED_STRING
3816 OUTPUT_QUOTED_STRING (asm_file, string);
3817 #else
3818 char c;
3819
3820 putc ('\"', asm_file);
3821 while ((c = *string++) != 0)
3822 {
3823 if (ISPRINT (c))
3824 {
3825 if (c == '\"' || c == '\\')
3826 putc ('\\', asm_file);
3827 putc (c, asm_file);
3828 }
3829 else
3830 fprintf (asm_file, "\\%03o", (unsigned char) c);
3831 }
3832 putc ('\"', asm_file);
3833 #endif
3834 }
3835 \f
3836 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
3837
3838 void
3839 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
3840 {
3841 char buf[2 + CHAR_BIT * sizeof (value) / 4];
3842 if (value == 0)
3843 putc ('0', f);
3844 else
3845 {
3846 char *p = buf + sizeof (buf);
3847 do
3848 *--p = "0123456789abcdef"[value % 16];
3849 while ((value /= 16) != 0);
3850 *--p = 'x';
3851 *--p = '0';
3852 fwrite (p, 1, buf + sizeof (buf) - p, f);
3853 }
3854 }
3855
3856 /* Internal function that prints an unsigned long in decimal in reverse.
3857 The output string IS NOT null-terminated. */
3858
3859 static int
3860 sprint_ul_rev (char *s, unsigned long value)
3861 {
3862 int i = 0;
3863 do
3864 {
3865 s[i] = "0123456789"[value % 10];
3866 value /= 10;
3867 i++;
3868 /* alternate version, without modulo */
3869 /* oldval = value; */
3870 /* value /= 10; */
3871 /* s[i] = "0123456789" [oldval - 10*value]; */
3872 /* i++ */
3873 }
3874 while (value != 0);
3875 return i;
3876 }
3877
3878 /* Write an unsigned long as decimal to a file, fast. */
3879
3880 void
3881 fprint_ul (FILE *f, unsigned long value)
3882 {
3883 /* python says: len(str(2**64)) == 20 */
3884 char s[20];
3885 int i;
3886
3887 i = sprint_ul_rev (s, value);
3888
3889 /* It's probably too small to bother with string reversal and fputs. */
3890 do
3891 {
3892 i--;
3893 putc (s[i], f);
3894 }
3895 while (i != 0);
3896 }
3897
3898 /* Write an unsigned long as decimal to a string, fast.
3899 s must be wide enough to not overflow, at least 21 chars.
3900 Returns the length of the string (without terminating '\0'). */
3901
3902 int
3903 sprint_ul (char *s, unsigned long value)
3904 {
3905 int len;
3906 char tmp_c;
3907 int i;
3908 int j;
3909
3910 len = sprint_ul_rev (s, value);
3911 s[len] = '\0';
3912
3913 /* Reverse the string. */
3914 i = 0;
3915 j = len - 1;
3916 while (i < j)
3917 {
3918 tmp_c = s[i];
3919 s[i] = s[j];
3920 s[j] = tmp_c;
3921 i++; j--;
3922 }
3923
3924 return len;
3925 }
3926
3927 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3928 %R prints the value of REGISTER_PREFIX.
3929 %L prints the value of LOCAL_LABEL_PREFIX.
3930 %U prints the value of USER_LABEL_PREFIX.
3931 %I prints the value of IMMEDIATE_PREFIX.
3932 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3933 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3934
3935 We handle alternate assembler dialects here, just like output_asm_insn. */
3936
3937 void
3938 asm_fprintf (FILE *file, const char *p, ...)
3939 {
3940 char buf[10];
3941 char *q, c;
3942 #ifdef ASSEMBLER_DIALECT
3943 int dialect = 0;
3944 #endif
3945 va_list argptr;
3946
3947 va_start (argptr, p);
3948
3949 buf[0] = '%';
3950
3951 while ((c = *p++))
3952 switch (c)
3953 {
3954 #ifdef ASSEMBLER_DIALECT
3955 case '{':
3956 case '}':
3957 case '|':
3958 p = do_assembler_dialects (p, &dialect);
3959 break;
3960 #endif
3961
3962 case '%':
3963 c = *p++;
3964 q = &buf[1];
3965 while (strchr ("-+ #0", c))
3966 {
3967 *q++ = c;
3968 c = *p++;
3969 }
3970 while (ISDIGIT (c) || c == '.')
3971 {
3972 *q++ = c;
3973 c = *p++;
3974 }
3975 switch (c)
3976 {
3977 case '%':
3978 putc ('%', file);
3979 break;
3980
3981 case 'd': case 'i': case 'u':
3982 case 'x': case 'X': case 'o':
3983 case 'c':
3984 *q++ = c;
3985 *q = 0;
3986 fprintf (file, buf, va_arg (argptr, int));
3987 break;
3988
3989 case 'w':
3990 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3991 'o' cases, but we do not check for those cases. It
3992 means that the value is a HOST_WIDE_INT, which may be
3993 either `long' or `long long'. */
3994 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3995 q += strlen (HOST_WIDE_INT_PRINT);
3996 *q++ = *p++;
3997 *q = 0;
3998 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3999 break;
4000
4001 case 'l':
4002 *q++ = c;
4003 #ifdef HAVE_LONG_LONG
4004 if (*p == 'l')
4005 {
4006 *q++ = *p++;
4007 *q++ = *p++;
4008 *q = 0;
4009 fprintf (file, buf, va_arg (argptr, long long));
4010 }
4011 else
4012 #endif
4013 {
4014 *q++ = *p++;
4015 *q = 0;
4016 fprintf (file, buf, va_arg (argptr, long));
4017 }
4018
4019 break;
4020
4021 case 's':
4022 *q++ = c;
4023 *q = 0;
4024 fprintf (file, buf, va_arg (argptr, char *));
4025 break;
4026
4027 case 'O':
4028 #ifdef ASM_OUTPUT_OPCODE
4029 ASM_OUTPUT_OPCODE (asm_out_file, p);
4030 #endif
4031 break;
4032
4033 case 'R':
4034 #ifdef REGISTER_PREFIX
4035 fprintf (file, "%s", REGISTER_PREFIX);
4036 #endif
4037 break;
4038
4039 case 'I':
4040 #ifdef IMMEDIATE_PREFIX
4041 fprintf (file, "%s", IMMEDIATE_PREFIX);
4042 #endif
4043 break;
4044
4045 case 'L':
4046 #ifdef LOCAL_LABEL_PREFIX
4047 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4048 #endif
4049 break;
4050
4051 case 'U':
4052 fputs (user_label_prefix, file);
4053 break;
4054
4055 #ifdef ASM_FPRINTF_EXTENSIONS
4056 /* Uppercase letters are reserved for general use by asm_fprintf
4057 and so are not available to target specific code. In order to
4058 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4059 they are defined here. As they get turned into real extensions
4060 to asm_fprintf they should be removed from this list. */
4061 case 'A': case 'B': case 'C': case 'D': case 'E':
4062 case 'F': case 'G': case 'H': case 'J': case 'K':
4063 case 'M': case 'N': case 'P': case 'Q': case 'S':
4064 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4065 break;
4066
4067 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4068 #endif
4069 default:
4070 gcc_unreachable ();
4071 }
4072 break;
4073
4074 default:
4075 putc (c, file);
4076 }
4077 va_end (argptr);
4078 }
4079 \f
4080 /* Return nonzero if this function has no function calls. */
4081
4082 int
4083 leaf_function_p (void)
4084 {
4085 rtx insn;
4086 rtx link;
4087
4088 if (crtl->profile || profile_arc_flag)
4089 return 0;
4090
4091 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4092 {
4093 if (CALL_P (insn)
4094 && ! SIBLING_CALL_P (insn))
4095 return 0;
4096 if (NONJUMP_INSN_P (insn)
4097 && GET_CODE (PATTERN (insn)) == SEQUENCE
4098 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4099 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4100 return 0;
4101 }
4102 for (link = crtl->epilogue_delay_list;
4103 link;
4104 link = XEXP (link, 1))
4105 {
4106 insn = XEXP (link, 0);
4107
4108 if (CALL_P (insn)
4109 && ! SIBLING_CALL_P (insn))
4110 return 0;
4111 if (NONJUMP_INSN_P (insn)
4112 && GET_CODE (PATTERN (insn)) == SEQUENCE
4113 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4114 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4115 return 0;
4116 }
4117
4118 return 1;
4119 }
4120
4121 /* Return 1 if branch is a forward branch.
4122 Uses insn_shuid array, so it works only in the final pass. May be used by
4123 output templates to customary add branch prediction hints.
4124 */
4125 int
4126 final_forward_branch_p (rtx insn)
4127 {
4128 int insn_id, label_id;
4129
4130 gcc_assert (uid_shuid);
4131 insn_id = INSN_SHUID (insn);
4132 label_id = INSN_SHUID (JUMP_LABEL (insn));
4133 /* We've hit some insns that does not have id information available. */
4134 gcc_assert (insn_id && label_id);
4135 return insn_id < label_id;
4136 }
4137
4138 /* On some machines, a function with no call insns
4139 can run faster if it doesn't create its own register window.
4140 When output, the leaf function should use only the "output"
4141 registers. Ordinarily, the function would be compiled to use
4142 the "input" registers to find its arguments; it is a candidate
4143 for leaf treatment if it uses only the "input" registers.
4144 Leaf function treatment means renumbering so the function
4145 uses the "output" registers instead. */
4146
4147 #ifdef LEAF_REGISTERS
4148
4149 /* Return 1 if this function uses only the registers that can be
4150 safely renumbered. */
4151
4152 int
4153 only_leaf_regs_used (void)
4154 {
4155 int i;
4156 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4157
4158 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4159 if ((df_regs_ever_live_p (i) || global_regs[i])
4160 && ! permitted_reg_in_leaf_functions[i])
4161 return 0;
4162
4163 if (crtl->uses_pic_offset_table
4164 && pic_offset_table_rtx != 0
4165 && REG_P (pic_offset_table_rtx)
4166 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4167 return 0;
4168
4169 return 1;
4170 }
4171
4172 /* Scan all instructions and renumber all registers into those
4173 available in leaf functions. */
4174
4175 static void
4176 leaf_renumber_regs (rtx first)
4177 {
4178 rtx insn;
4179
4180 /* Renumber only the actual patterns.
4181 The reg-notes can contain frame pointer refs,
4182 and renumbering them could crash, and should not be needed. */
4183 for (insn = first; insn; insn = NEXT_INSN (insn))
4184 if (INSN_P (insn))
4185 leaf_renumber_regs_insn (PATTERN (insn));
4186 for (insn = crtl->epilogue_delay_list;
4187 insn;
4188 insn = XEXP (insn, 1))
4189 if (INSN_P (XEXP (insn, 0)))
4190 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4191 }
4192
4193 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4194 available in leaf functions. */
4195
4196 void
4197 leaf_renumber_regs_insn (rtx in_rtx)
4198 {
4199 int i, j;
4200 const char *format_ptr;
4201
4202 if (in_rtx == 0)
4203 return;
4204
4205 /* Renumber all input-registers into output-registers.
4206 renumbered_regs would be 1 for an output-register;
4207 they */
4208
4209 if (REG_P (in_rtx))
4210 {
4211 int newreg;
4212
4213 /* Don't renumber the same reg twice. */
4214 if (in_rtx->used)
4215 return;
4216
4217 newreg = REGNO (in_rtx);
4218 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4219 to reach here as part of a REG_NOTE. */
4220 if (newreg >= FIRST_PSEUDO_REGISTER)
4221 {
4222 in_rtx->used = 1;
4223 return;
4224 }
4225 newreg = LEAF_REG_REMAP (newreg);
4226 gcc_assert (newreg >= 0);
4227 df_set_regs_ever_live (REGNO (in_rtx), false);
4228 df_set_regs_ever_live (newreg, true);
4229 SET_REGNO (in_rtx, newreg);
4230 in_rtx->used = 1;
4231 }
4232
4233 if (INSN_P (in_rtx))
4234 {
4235 /* Inside a SEQUENCE, we find insns.
4236 Renumber just the patterns of these insns,
4237 just as we do for the top-level insns. */
4238 leaf_renumber_regs_insn (PATTERN (in_rtx));
4239 return;
4240 }
4241
4242 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4243
4244 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4245 switch (*format_ptr++)
4246 {
4247 case 'e':
4248 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4249 break;
4250
4251 case 'E':
4252 if (NULL != XVEC (in_rtx, i))
4253 {
4254 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4255 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4256 }
4257 break;
4258
4259 case 'S':
4260 case 's':
4261 case '0':
4262 case 'i':
4263 case 'w':
4264 case 'n':
4265 case 'u':
4266 break;
4267
4268 default:
4269 gcc_unreachable ();
4270 }
4271 }
4272 #endif
4273 \f
4274 /* Turn the RTL into assembly. */
4275 static unsigned int
4276 rest_of_handle_final (void)
4277 {
4278 rtx x;
4279 const char *fnname;
4280
4281 /* Get the function's name, as described by its RTL. This may be
4282 different from the DECL_NAME name used in the source file. */
4283
4284 x = DECL_RTL (current_function_decl);
4285 gcc_assert (MEM_P (x));
4286 x = XEXP (x, 0);
4287 gcc_assert (GET_CODE (x) == SYMBOL_REF);
4288 fnname = XSTR (x, 0);
4289
4290 assemble_start_function (current_function_decl, fnname);
4291 final_start_function (get_insns (), asm_out_file, optimize);
4292 final (get_insns (), asm_out_file, optimize);
4293 final_end_function ();
4294
4295 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4296 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4297 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4298 output_function_exception_table (fnname);
4299
4300 assemble_end_function (current_function_decl, fnname);
4301
4302 user_defined_section_attribute = false;
4303
4304 /* Free up reg info memory. */
4305 free_reg_info ();
4306
4307 if (! quiet_flag)
4308 fflush (asm_out_file);
4309
4310 /* Write DBX symbols if requested. */
4311
4312 /* Note that for those inline functions where we don't initially
4313 know for certain that we will be generating an out-of-line copy,
4314 the first invocation of this routine (rest_of_compilation) will
4315 skip over this code by doing a `goto exit_rest_of_compilation;'.
4316 Later on, wrapup_global_declarations will (indirectly) call
4317 rest_of_compilation again for those inline functions that need
4318 to have out-of-line copies generated. During that call, we
4319 *will* be routed past here. */
4320
4321 timevar_push (TV_SYMOUT);
4322 if (!DECL_IGNORED_P (current_function_decl))
4323 debug_hooks->function_decl (current_function_decl);
4324 timevar_pop (TV_SYMOUT);
4325
4326 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4327 DECL_INITIAL (current_function_decl) = error_mark_node;
4328
4329 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4330 && targetm.have_ctors_dtors)
4331 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4332 decl_init_priority_lookup
4333 (current_function_decl));
4334 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4335 && targetm.have_ctors_dtors)
4336 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4337 decl_fini_priority_lookup
4338 (current_function_decl));
4339 return 0;
4340 }
4341
4342 struct rtl_opt_pass pass_final =
4343 {
4344 {
4345 RTL_PASS,
4346 "final", /* name */
4347 NULL, /* gate */
4348 rest_of_handle_final, /* execute */
4349 NULL, /* sub */
4350 NULL, /* next */
4351 0, /* static_pass_number */
4352 TV_FINAL, /* tv_id */
4353 0, /* properties_required */
4354 0, /* properties_provided */
4355 0, /* properties_destroyed */
4356 0, /* todo_flags_start */
4357 TODO_ggc_collect /* todo_flags_finish */
4358 }
4359 };
4360
4361
4362 static unsigned int
4363 rest_of_handle_shorten_branches (void)
4364 {
4365 /* Shorten branches. */
4366 shorten_branches (get_insns ());
4367 return 0;
4368 }
4369
4370 struct rtl_opt_pass pass_shorten_branches =
4371 {
4372 {
4373 RTL_PASS,
4374 "shorten", /* name */
4375 NULL, /* gate */
4376 rest_of_handle_shorten_branches, /* execute */
4377 NULL, /* sub */
4378 NULL, /* next */
4379 0, /* static_pass_number */
4380 TV_FINAL, /* tv_id */
4381 0, /* properties_required */
4382 0, /* properties_provided */
4383 0, /* properties_destroyed */
4384 0, /* todo_flags_start */
4385 0 /* todo_flags_finish */
4386 }
4387 };
4388
4389
4390 static unsigned int
4391 rest_of_clean_state (void)
4392 {
4393 rtx insn, next;
4394 FILE *final_output = NULL;
4395 int save_unnumbered = flag_dump_unnumbered;
4396 int save_noaddr = flag_dump_noaddr;
4397
4398 if (flag_dump_final_insns)
4399 {
4400 final_output = fopen (flag_dump_final_insns, "a");
4401 if (!final_output)
4402 {
4403 error ("could not open final insn dump file %qs: %m",
4404 flag_dump_final_insns);
4405 flag_dump_final_insns = NULL;
4406 }
4407 else
4408 {
4409 flag_dump_noaddr = flag_dump_unnumbered = 1;
4410 if (flag_compare_debug_opt || flag_compare_debug)
4411 dump_flags |= TDF_NOUID;
4412 dump_function_header (final_output, current_function_decl,
4413 dump_flags);
4414 final_insns_dump_p = true;
4415
4416 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4417 if (LABEL_P (insn))
4418 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4419 else
4420 {
4421 if (NOTE_P (insn))
4422 set_block_for_insn (insn, NULL);
4423 INSN_UID (insn) = 0;
4424 }
4425 }
4426 }
4427
4428 /* It is very important to decompose the RTL instruction chain here:
4429 debug information keeps pointing into CODE_LABEL insns inside the function
4430 body. If these remain pointing to the other insns, we end up preserving
4431 whole RTL chain and attached detailed debug info in memory. */
4432 for (insn = get_insns (); insn; insn = next)
4433 {
4434 next = NEXT_INSN (insn);
4435 NEXT_INSN (insn) = NULL;
4436 PREV_INSN (insn) = NULL;
4437
4438 if (final_output
4439 && (!NOTE_P (insn) ||
4440 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4441 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4442 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4443 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4444 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4445 print_rtl_single (final_output, insn);
4446 }
4447
4448 if (final_output)
4449 {
4450 flag_dump_noaddr = save_noaddr;
4451 flag_dump_unnumbered = save_unnumbered;
4452 final_insns_dump_p = false;
4453
4454 if (fclose (final_output))
4455 {
4456 error ("could not close final insn dump file %qs: %m",
4457 flag_dump_final_insns);
4458 flag_dump_final_insns = NULL;
4459 }
4460 }
4461
4462 /* In case the function was not output,
4463 don't leave any temporary anonymous types
4464 queued up for sdb output. */
4465 #ifdef SDB_DEBUGGING_INFO
4466 if (write_symbols == SDB_DEBUG)
4467 sdbout_types (NULL_TREE);
4468 #endif
4469
4470 flag_rerun_cse_after_global_opts = 0;
4471 reload_completed = 0;
4472 epilogue_completed = 0;
4473 #ifdef STACK_REGS
4474 regstack_completed = 0;
4475 #endif
4476
4477 /* Clear out the insn_length contents now that they are no
4478 longer valid. */
4479 init_insn_lengths ();
4480
4481 /* Show no temporary slots allocated. */
4482 init_temp_slots ();
4483
4484 free_bb_for_insn ();
4485
4486 delete_tree_ssa ();
4487
4488 /* We can reduce stack alignment on call site only when we are sure that
4489 the function body just produced will be actually used in the final
4490 executable. */
4491 if (decl_binds_to_current_def_p (current_function_decl))
4492 {
4493 unsigned int pref = crtl->preferred_stack_boundary;
4494 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4495 pref = crtl->stack_alignment_needed;
4496 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4497 = pref;
4498 }
4499
4500 /* Make sure volatile mem refs aren't considered valid operands for
4501 arithmetic insns. We must call this here if this is a nested inline
4502 function, since the above code leaves us in the init_recog state,
4503 and the function context push/pop code does not save/restore volatile_ok.
4504
4505 ??? Maybe it isn't necessary for expand_start_function to call this
4506 anymore if we do it here? */
4507
4508 init_recog_no_volatile ();
4509
4510 /* We're done with this function. Free up memory if we can. */
4511 free_after_parsing (cfun);
4512 free_after_compilation (cfun);
4513 return 0;
4514 }
4515
4516 struct rtl_opt_pass pass_clean_state =
4517 {
4518 {
4519 RTL_PASS,
4520 "*clean_state", /* name */
4521 NULL, /* gate */
4522 rest_of_clean_state, /* execute */
4523 NULL, /* sub */
4524 NULL, /* next */
4525 0, /* static_pass_number */
4526 TV_FINAL, /* tv_id */
4527 0, /* properties_required */
4528 0, /* properties_provided */
4529 PROP_rtl, /* properties_destroyed */
4530 0, /* todo_flags_start */
4531 0 /* todo_flags_finish */
4532 }
4533 };