]> git.ipfire.org Git - thirdparty/gcc.git/blob - gcc/final.c
* final.c (compute_alignments): Use counts rather than frequencies.
[thirdparty/gcc.git] / gcc / final.c
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #define INCLUDE_ALGORITHM /* reverse */
47 #include "system.h"
48 #include "coretypes.h"
49 #include "backend.h"
50 #include "target.h"
51 #include "rtl.h"
52 #include "tree.h"
53 #include "cfghooks.h"
54 #include "df.h"
55 #include "memmodel.h"
56 #include "tm_p.h"
57 #include "insn-config.h"
58 #include "regs.h"
59 #include "emit-rtl.h"
60 #include "recog.h"
61 #include "cgraph.h"
62 #include "tree-pretty-print.h" /* for dump_function_header */
63 #include "varasm.h"
64 #include "insn-attr.h"
65 #include "conditions.h"
66 #include "flags.h"
67 #include "output.h"
68 #include "except.h"
69 #include "rtl-error.h"
70 #include "toplev.h" /* exact_log2, floor_log2 */
71 #include "reload.h"
72 #include "intl.h"
73 #include "cfgrtl.h"
74 #include "debug.h"
75 #include "tree-pass.h"
76 #include "tree-ssa.h"
77 #include "cfgloop.h"
78 #include "params.h"
79 #include "stringpool.h"
80 #include "attribs.h"
81 #include "asan.h"
82 #include "rtl-iter.h"
83 #include "print-rtl.h"
84
85 #ifdef XCOFF_DEBUGGING_INFO
86 #include "xcoffout.h" /* Needed for external data declarations. */
87 #endif
88
89 #include "dwarf2out.h"
90
91 #ifdef DBX_DEBUGGING_INFO
92 #include "dbxout.h"
93 #endif
94
95 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
96 So define a null default for it to save conditionalization later. */
97 #ifndef CC_STATUS_INIT
98 #define CC_STATUS_INIT
99 #endif
100
101 /* Is the given character a logical line separator for the assembler? */
102 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
103 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
104 #endif
105
106 #ifndef JUMP_TABLES_IN_TEXT_SECTION
107 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #endif
109
110 /* Bitflags used by final_scan_insn. */
111 #define SEEN_NOTE 1
112 #define SEEN_EMITTED 2
113
114 /* Last insn processed by final_scan_insn. */
115 static rtx_insn *debug_insn;
116 rtx_insn *current_output_insn;
117
118 /* Line number of last NOTE. */
119 static int last_linenum;
120
121 /* Column number of last NOTE. */
122 static int last_columnnum;
123
124 /* Last discriminator written to assembly. */
125 static int last_discriminator;
126
127 /* Discriminator of current block. */
128 static int discriminator;
129
130 /* Highest line number in current block. */
131 static int high_block_linenum;
132
133 /* Likewise for function. */
134 static int high_function_linenum;
135
136 /* Filename of last NOTE. */
137 static const char *last_filename;
138
139 /* Override filename, line and column number. */
140 static const char *override_filename;
141 static int override_linenum;
142 static int override_columnnum;
143
144 /* Whether to force emission of a line note before the next insn. */
145 static bool force_source_line = false;
146
147 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
148
149 /* Nonzero while outputting an `asm' with operands.
150 This means that inconsistencies are the user's fault, so don't die.
151 The precise value is the insn being output, to pass to error_for_asm. */
152 const rtx_insn *this_is_asm_operands;
153
154 /* Number of operands of this insn, for an `asm' with operands. */
155 static unsigned int insn_noperands;
156
157 /* Compare optimization flag. */
158
159 static rtx last_ignored_compare = 0;
160
161 /* Assign a unique number to each insn that is output.
162 This can be used to generate unique local labels. */
163
164 static int insn_counter = 0;
165
166 /* This variable contains machine-dependent flags (defined in tm.h)
167 set and examined by output routines
168 that describe how to interpret the condition codes properly. */
169
170 CC_STATUS cc_status;
171
172 /* During output of an insn, this contains a copy of cc_status
173 from before the insn. */
174
175 CC_STATUS cc_prev_status;
176
177 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
178
179 static int block_depth;
180
181 /* Nonzero if have enabled APP processing of our assembler output. */
182
183 static int app_on;
184
185 /* If we are outputting an insn sequence, this contains the sequence rtx.
186 Zero otherwise. */
187
188 rtx_sequence *final_sequence;
189
190 #ifdef ASSEMBLER_DIALECT
191
192 /* Number of the assembler dialect to use, starting at 0. */
193 static int dialect_number;
194 #endif
195
196 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
197 rtx current_insn_predicate;
198
199 /* True if printing into -fdump-final-insns= dump. */
200 bool final_insns_dump_p;
201
202 /* True if profile_function should be called, but hasn't been called yet. */
203 static bool need_profile_function;
204
205 static int asm_insn_count (rtx);
206 static void profile_function (FILE *);
207 static void profile_after_prologue (FILE *);
208 static bool notice_source_line (rtx_insn *, bool *);
209 static rtx walk_alter_subreg (rtx *, bool *);
210 static void output_asm_name (void);
211 static void output_alternate_entry_point (FILE *, rtx_insn *);
212 static tree get_mem_expr_from_op (rtx, int *);
213 static void output_asm_operand_names (rtx *, int *, int);
214 #ifdef LEAF_REGISTERS
215 static void leaf_renumber_regs (rtx_insn *);
216 #endif
217 #if HAVE_cc0
218 static int alter_cond (rtx);
219 #endif
220 static int align_fuzz (rtx, rtx, int, unsigned);
221 static void collect_fn_hard_reg_usage (void);
222 static tree get_call_fndecl (rtx_insn *);
223 \f
224 /* Initialize data in final at the beginning of a compilation. */
225
226 void
227 init_final (const char *filename ATTRIBUTE_UNUSED)
228 {
229 app_on = 0;
230 final_sequence = 0;
231
232 #ifdef ASSEMBLER_DIALECT
233 dialect_number = ASSEMBLER_DIALECT;
234 #endif
235 }
236
237 /* Default target function prologue and epilogue assembler output.
238
239 If not overridden for epilogue code, then the function body itself
240 contains return instructions wherever needed. */
241 void
242 default_function_pro_epilogue (FILE *)
243 {
244 }
245
246 void
247 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
248 tree decl ATTRIBUTE_UNUSED,
249 bool new_is_cold ATTRIBUTE_UNUSED)
250 {
251 }
252
253 /* Default target hook that outputs nothing to a stream. */
254 void
255 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
256 {
257 }
258
259 /* Enable APP processing of subsequent output.
260 Used before the output from an `asm' statement. */
261
262 void
263 app_enable (void)
264 {
265 if (! app_on)
266 {
267 fputs (ASM_APP_ON, asm_out_file);
268 app_on = 1;
269 }
270 }
271
272 /* Disable APP processing of subsequent output.
273 Called from varasm.c before most kinds of output. */
274
275 void
276 app_disable (void)
277 {
278 if (app_on)
279 {
280 fputs (ASM_APP_OFF, asm_out_file);
281 app_on = 0;
282 }
283 }
284 \f
285 /* Return the number of slots filled in the current
286 delayed branch sequence (we don't count the insn needing the
287 delay slot). Zero if not in a delayed branch sequence. */
288
289 int
290 dbr_sequence_length (void)
291 {
292 if (final_sequence != 0)
293 return XVECLEN (final_sequence, 0) - 1;
294 else
295 return 0;
296 }
297 \f
298 /* The next two pages contain routines used to compute the length of an insn
299 and to shorten branches. */
300
301 /* Arrays for insn lengths, and addresses. The latter is referenced by
302 `insn_current_length'. */
303
304 static int *insn_lengths;
305
306 vec<int> insn_addresses_;
307
308 /* Max uid for which the above arrays are valid. */
309 static int insn_lengths_max_uid;
310
311 /* Address of insn being processed. Used by `insn_current_length'. */
312 int insn_current_address;
313
314 /* Address of insn being processed in previous iteration. */
315 int insn_last_address;
316
317 /* known invariant alignment of insn being processed. */
318 int insn_current_align;
319
320 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
321 gives the next following alignment insn that increases the known
322 alignment, or NULL_RTX if there is no such insn.
323 For any alignment obtained this way, we can again index uid_align with
324 its uid to obtain the next following align that in turn increases the
325 alignment, till we reach NULL_RTX; the sequence obtained this way
326 for each insn we'll call the alignment chain of this insn in the following
327 comments. */
328
329 struct label_alignment
330 {
331 short alignment;
332 short max_skip;
333 };
334
335 static rtx *uid_align;
336 static int *uid_shuid;
337 static struct label_alignment *label_align;
338
339 /* Indicate that branch shortening hasn't yet been done. */
340
341 void
342 init_insn_lengths (void)
343 {
344 if (uid_shuid)
345 {
346 free (uid_shuid);
347 uid_shuid = 0;
348 }
349 if (insn_lengths)
350 {
351 free (insn_lengths);
352 insn_lengths = 0;
353 insn_lengths_max_uid = 0;
354 }
355 if (HAVE_ATTR_length)
356 INSN_ADDRESSES_FREE ();
357 if (uid_align)
358 {
359 free (uid_align);
360 uid_align = 0;
361 }
362 }
363
364 /* Obtain the current length of an insn. If branch shortening has been done,
365 get its actual length. Otherwise, use FALLBACK_FN to calculate the
366 length. */
367 static int
368 get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *))
369 {
370 rtx body;
371 int i;
372 int length = 0;
373
374 if (!HAVE_ATTR_length)
375 return 0;
376
377 if (insn_lengths_max_uid > INSN_UID (insn))
378 return insn_lengths[INSN_UID (insn)];
379 else
380 switch (GET_CODE (insn))
381 {
382 case NOTE:
383 case BARRIER:
384 case CODE_LABEL:
385 case DEBUG_INSN:
386 return 0;
387
388 case CALL_INSN:
389 case JUMP_INSN:
390 length = fallback_fn (insn);
391 break;
392
393 case INSN:
394 body = PATTERN (insn);
395 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
396 return 0;
397
398 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
399 length = asm_insn_count (body) * fallback_fn (insn);
400 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
401 for (i = 0; i < seq->len (); i++)
402 length += get_attr_length_1 (seq->insn (i), fallback_fn);
403 else
404 length = fallback_fn (insn);
405 break;
406
407 default:
408 break;
409 }
410
411 #ifdef ADJUST_INSN_LENGTH
412 ADJUST_INSN_LENGTH (insn, length);
413 #endif
414 return length;
415 }
416
417 /* Obtain the current length of an insn. If branch shortening has been done,
418 get its actual length. Otherwise, get its maximum length. */
419 int
420 get_attr_length (rtx_insn *insn)
421 {
422 return get_attr_length_1 (insn, insn_default_length);
423 }
424
425 /* Obtain the current length of an insn. If branch shortening has been done,
426 get its actual length. Otherwise, get its minimum length. */
427 int
428 get_attr_min_length (rtx_insn *insn)
429 {
430 return get_attr_length_1 (insn, insn_min_length);
431 }
432 \f
433 /* Code to handle alignment inside shorten_branches. */
434
435 /* Here is an explanation how the algorithm in align_fuzz can give
436 proper results:
437
438 Call a sequence of instructions beginning with alignment point X
439 and continuing until the next alignment point `block X'. When `X'
440 is used in an expression, it means the alignment value of the
441 alignment point.
442
443 Call the distance between the start of the first insn of block X, and
444 the end of the last insn of block X `IX', for the `inner size of X'.
445 This is clearly the sum of the instruction lengths.
446
447 Likewise with the next alignment-delimited block following X, which we
448 shall call block Y.
449
450 Call the distance between the start of the first insn of block X, and
451 the start of the first insn of block Y `OX', for the `outer size of X'.
452
453 The estimated padding is then OX - IX.
454
455 OX can be safely estimated as
456
457 if (X >= Y)
458 OX = round_up(IX, Y)
459 else
460 OX = round_up(IX, X) + Y - X
461
462 Clearly est(IX) >= real(IX), because that only depends on the
463 instruction lengths, and those being overestimated is a given.
464
465 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
466 we needn't worry about that when thinking about OX.
467
468 When X >= Y, the alignment provided by Y adds no uncertainty factor
469 for branch ranges starting before X, so we can just round what we have.
470 But when X < Y, we don't know anything about the, so to speak,
471 `middle bits', so we have to assume the worst when aligning up from an
472 address mod X to one mod Y, which is Y - X. */
473
474 #ifndef LABEL_ALIGN
475 #define LABEL_ALIGN(LABEL) align_labels_log
476 #endif
477
478 #ifndef LOOP_ALIGN
479 #define LOOP_ALIGN(LABEL) align_loops_log
480 #endif
481
482 #ifndef LABEL_ALIGN_AFTER_BARRIER
483 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
484 #endif
485
486 #ifndef JUMP_ALIGN
487 #define JUMP_ALIGN(LABEL) align_jumps_log
488 #endif
489
490 int
491 default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
492 {
493 return 0;
494 }
495
496 int
497 default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
498 {
499 return align_loops_max_skip;
500 }
501
502 int
503 default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
504 {
505 return align_labels_max_skip;
506 }
507
508 int
509 default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
510 {
511 return align_jumps_max_skip;
512 }
513
514 #ifndef ADDR_VEC_ALIGN
515 static int
516 final_addr_vec_align (rtx_jump_table_data *addr_vec)
517 {
518 int align = GET_MODE_SIZE (addr_vec->get_data_mode ());
519
520 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
521 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
522 return exact_log2 (align);
523
524 }
525
526 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
527 #endif
528
529 #ifndef INSN_LENGTH_ALIGNMENT
530 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
531 #endif
532
533 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
534
535 static int min_labelno, max_labelno;
536
537 #define LABEL_TO_ALIGNMENT(LABEL) \
538 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
539
540 #define LABEL_TO_MAX_SKIP(LABEL) \
541 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
542
543 /* For the benefit of port specific code do this also as a function. */
544
545 int
546 label_to_alignment (rtx label)
547 {
548 if (CODE_LABEL_NUMBER (label) <= max_labelno)
549 return LABEL_TO_ALIGNMENT (label);
550 return 0;
551 }
552
553 int
554 label_to_max_skip (rtx label)
555 {
556 if (CODE_LABEL_NUMBER (label) <= max_labelno)
557 return LABEL_TO_MAX_SKIP (label);
558 return 0;
559 }
560
561 /* The differences in addresses
562 between a branch and its target might grow or shrink depending on
563 the alignment the start insn of the range (the branch for a forward
564 branch or the label for a backward branch) starts out on; if these
565 differences are used naively, they can even oscillate infinitely.
566 We therefore want to compute a 'worst case' address difference that
567 is independent of the alignment the start insn of the range end
568 up on, and that is at least as large as the actual difference.
569 The function align_fuzz calculates the amount we have to add to the
570 naively computed difference, by traversing the part of the alignment
571 chain of the start insn of the range that is in front of the end insn
572 of the range, and considering for each alignment the maximum amount
573 that it might contribute to a size increase.
574
575 For casesi tables, we also want to know worst case minimum amounts of
576 address difference, in case a machine description wants to introduce
577 some common offset that is added to all offsets in a table.
578 For this purpose, align_fuzz with a growth argument of 0 computes the
579 appropriate adjustment. */
580
581 /* Compute the maximum delta by which the difference of the addresses of
582 START and END might grow / shrink due to a different address for start
583 which changes the size of alignment insns between START and END.
584 KNOWN_ALIGN_LOG is the alignment known for START.
585 GROWTH should be ~0 if the objective is to compute potential code size
586 increase, and 0 if the objective is to compute potential shrink.
587 The return value is undefined for any other value of GROWTH. */
588
589 static int
590 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
591 {
592 int uid = INSN_UID (start);
593 rtx align_label;
594 int known_align = 1 << known_align_log;
595 int end_shuid = INSN_SHUID (end);
596 int fuzz = 0;
597
598 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
599 {
600 int align_addr, new_align;
601
602 uid = INSN_UID (align_label);
603 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
604 if (uid_shuid[uid] > end_shuid)
605 break;
606 known_align_log = LABEL_TO_ALIGNMENT (align_label);
607 new_align = 1 << known_align_log;
608 if (new_align < known_align)
609 continue;
610 fuzz += (-align_addr ^ growth) & (new_align - known_align);
611 known_align = new_align;
612 }
613 return fuzz;
614 }
615
616 /* Compute a worst-case reference address of a branch so that it
617 can be safely used in the presence of aligned labels. Since the
618 size of the branch itself is unknown, the size of the branch is
619 not included in the range. I.e. for a forward branch, the reference
620 address is the end address of the branch as known from the previous
621 branch shortening pass, minus a value to account for possible size
622 increase due to alignment. For a backward branch, it is the start
623 address of the branch as known from the current pass, plus a value
624 to account for possible size increase due to alignment.
625 NB.: Therefore, the maximum offset allowed for backward branches needs
626 to exclude the branch size. */
627
628 int
629 insn_current_reference_address (rtx_insn *branch)
630 {
631 rtx dest;
632 int seq_uid;
633
634 if (! INSN_ADDRESSES_SET_P ())
635 return 0;
636
637 rtx_insn *seq = NEXT_INSN (PREV_INSN (branch));
638 seq_uid = INSN_UID (seq);
639 if (!JUMP_P (branch))
640 /* This can happen for example on the PA; the objective is to know the
641 offset to address something in front of the start of the function.
642 Thus, we can treat it like a backward branch.
643 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
644 any alignment we'd encounter, so we skip the call to align_fuzz. */
645 return insn_current_address;
646 dest = JUMP_LABEL (branch);
647
648 /* BRANCH has no proper alignment chain set, so use SEQ.
649 BRANCH also has no INSN_SHUID. */
650 if (INSN_SHUID (seq) < INSN_SHUID (dest))
651 {
652 /* Forward branch. */
653 return (insn_last_address + insn_lengths[seq_uid]
654 - align_fuzz (seq, dest, length_unit_log, ~0));
655 }
656 else
657 {
658 /* Backward branch. */
659 return (insn_current_address
660 + align_fuzz (dest, seq, length_unit_log, ~0));
661 }
662 }
663 \f
664 /* Compute branch alignments based on CFG profile. */
665
666 unsigned int
667 compute_alignments (void)
668 {
669 int log, max_skip, max_log;
670 basic_block bb;
671
672 if (label_align)
673 {
674 free (label_align);
675 label_align = 0;
676 }
677
678 max_labelno = max_label_num ();
679 min_labelno = get_first_label_num ();
680 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
681
682 /* If not optimizing or optimizing for size, don't assign any alignments. */
683 if (! optimize || optimize_function_for_size_p (cfun))
684 return 0;
685
686 if (dump_file)
687 {
688 dump_reg_info (dump_file);
689 dump_flow_info (dump_file, TDF_DETAILS);
690 flow_loops_dump (dump_file, NULL, 1);
691 }
692 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
693 profile_count count_threshold = cfun->cfg->count_max.apply_scale
694 (1, PARAM_VALUE (PARAM_ALIGN_THRESHOLD));
695
696 if (dump_file)
697 {
698 fprintf (dump_file, "count_max: ");
699 cfun->cfg->count_max.dump (dump_file);
700 fprintf (dump_file, "\n");
701 }
702 FOR_EACH_BB_FN (bb, cfun)
703 {
704 rtx_insn *label = BB_HEAD (bb);
705 bool has_fallthru = 0;
706 edge e;
707 edge_iterator ei;
708
709 if (!LABEL_P (label)
710 || optimize_bb_for_size_p (bb))
711 {
712 if (dump_file)
713 fprintf (dump_file,
714 "BB %4i loop %2i loop_depth %2i skipped.\n",
715 bb->index,
716 bb->loop_father->num,
717 bb_loop_depth (bb));
718 continue;
719 }
720 max_log = LABEL_ALIGN (label);
721 max_skip = targetm.asm_out.label_align_max_skip (label);
722 profile_count fallthru_count = profile_count::zero ();
723 profile_count branch_count = profile_count::zero ();
724
725 FOR_EACH_EDGE (e, ei, bb->preds)
726 {
727 if (e->flags & EDGE_FALLTHRU)
728 has_fallthru = 1, fallthru_count += e->count ();
729 else
730 branch_count += e->count ();
731 }
732 if (dump_file)
733 {
734 fprintf (dump_file, "BB %4i loop %2i loop_depth"
735 " %2i fall ",
736 bb->index, bb->loop_father->num,
737 bb_loop_depth (bb));
738 fallthru_count.dump (dump_file);
739 fprintf (dump_file, " branch ");
740 branch_count.dump (dump_file);
741 if (!bb->loop_father->inner && bb->loop_father->num)
742 fprintf (dump_file, " inner_loop");
743 if (bb->loop_father->header == bb)
744 fprintf (dump_file, " loop_header");
745 fprintf (dump_file, "\n");
746 }
747 if (!fallthru_count.initialized_p () || !branch_count.initialized_p ())
748 continue;
749
750 /* There are two purposes to align block with no fallthru incoming edge:
751 1) to avoid fetch stalls when branch destination is near cache boundary
752 2) to improve cache efficiency in case the previous block is not executed
753 (so it does not need to be in the cache).
754
755 We to catch first case, we align frequently executed blocks.
756 To catch the second, we align blocks that are executed more frequently
757 than the predecessor and the predecessor is likely to not be executed
758 when function is called. */
759
760 if (!has_fallthru
761 && (branch_count > count_threshold
762 || (bb->count > bb->prev_bb->count.apply_scale (10, 1)
763 && (bb->prev_bb->count
764 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)
765 ->count.apply_scale (1, 2)))))
766 {
767 log = JUMP_ALIGN (label);
768 if (dump_file)
769 fprintf (dump_file, " jump alignment added.\n");
770 if (max_log < log)
771 {
772 max_log = log;
773 max_skip = targetm.asm_out.jump_align_max_skip (label);
774 }
775 }
776 /* In case block is frequent and reached mostly by non-fallthru edge,
777 align it. It is most likely a first block of loop. */
778 if (has_fallthru
779 && !(single_succ_p (bb)
780 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
781 && optimize_bb_for_speed_p (bb)
782 && branch_count + fallthru_count > count_threshold
783 && (branch_count
784 > fallthru_count.apply_scale
785 (PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS), 1)))
786 {
787 log = LOOP_ALIGN (label);
788 if (dump_file)
789 fprintf (dump_file, " internal loop alignment added.\n");
790 if (max_log < log)
791 {
792 max_log = log;
793 max_skip = targetm.asm_out.loop_align_max_skip (label);
794 }
795 }
796 LABEL_TO_ALIGNMENT (label) = max_log;
797 LABEL_TO_MAX_SKIP (label) = max_skip;
798 }
799
800 loop_optimizer_finalize ();
801 free_dominance_info (CDI_DOMINATORS);
802 return 0;
803 }
804
805 /* Grow the LABEL_ALIGN array after new labels are created. */
806
807 static void
808 grow_label_align (void)
809 {
810 int old = max_labelno;
811 int n_labels;
812 int n_old_labels;
813
814 max_labelno = max_label_num ();
815
816 n_labels = max_labelno - min_labelno + 1;
817 n_old_labels = old - min_labelno + 1;
818
819 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
820
821 /* Range of labels grows monotonically in the function. Failing here
822 means that the initialization of array got lost. */
823 gcc_assert (n_old_labels <= n_labels);
824
825 memset (label_align + n_old_labels, 0,
826 (n_labels - n_old_labels) * sizeof (struct label_alignment));
827 }
828
829 /* Update the already computed alignment information. LABEL_PAIRS is a vector
830 made up of pairs of labels for which the alignment information of the first
831 element will be copied from that of the second element. */
832
833 void
834 update_alignments (vec<rtx> &label_pairs)
835 {
836 unsigned int i = 0;
837 rtx iter, label = NULL_RTX;
838
839 if (max_labelno != max_label_num ())
840 grow_label_align ();
841
842 FOR_EACH_VEC_ELT (label_pairs, i, iter)
843 if (i & 1)
844 {
845 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
846 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
847 }
848 else
849 label = iter;
850 }
851
852 namespace {
853
854 const pass_data pass_data_compute_alignments =
855 {
856 RTL_PASS, /* type */
857 "alignments", /* name */
858 OPTGROUP_NONE, /* optinfo_flags */
859 TV_NONE, /* tv_id */
860 0, /* properties_required */
861 0, /* properties_provided */
862 0, /* properties_destroyed */
863 0, /* todo_flags_start */
864 0, /* todo_flags_finish */
865 };
866
867 class pass_compute_alignments : public rtl_opt_pass
868 {
869 public:
870 pass_compute_alignments (gcc::context *ctxt)
871 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
872 {}
873
874 /* opt_pass methods: */
875 virtual unsigned int execute (function *) { return compute_alignments (); }
876
877 }; // class pass_compute_alignments
878
879 } // anon namespace
880
881 rtl_opt_pass *
882 make_pass_compute_alignments (gcc::context *ctxt)
883 {
884 return new pass_compute_alignments (ctxt);
885 }
886
887 \f
888 /* Make a pass over all insns and compute their actual lengths by shortening
889 any branches of variable length if possible. */
890
891 /* shorten_branches might be called multiple times: for example, the SH
892 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
893 In order to do this, it needs proper length information, which it obtains
894 by calling shorten_branches. This cannot be collapsed with
895 shorten_branches itself into a single pass unless we also want to integrate
896 reorg.c, since the branch splitting exposes new instructions with delay
897 slots. */
898
899 void
900 shorten_branches (rtx_insn *first)
901 {
902 rtx_insn *insn;
903 int max_uid;
904 int i;
905 int max_log;
906 int max_skip;
907 #define MAX_CODE_ALIGN 16
908 rtx_insn *seq;
909 int something_changed = 1;
910 char *varying_length;
911 rtx body;
912 int uid;
913 rtx align_tab[MAX_CODE_ALIGN];
914
915 /* Compute maximum UID and allocate label_align / uid_shuid. */
916 max_uid = get_max_uid ();
917
918 /* Free uid_shuid before reallocating it. */
919 free (uid_shuid);
920
921 uid_shuid = XNEWVEC (int, max_uid);
922
923 if (max_labelno != max_label_num ())
924 grow_label_align ();
925
926 /* Initialize label_align and set up uid_shuid to be strictly
927 monotonically rising with insn order. */
928 /* We use max_log here to keep track of the maximum alignment we want to
929 impose on the next CODE_LABEL (or the current one if we are processing
930 the CODE_LABEL itself). */
931
932 max_log = 0;
933 max_skip = 0;
934
935 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
936 {
937 int log;
938
939 INSN_SHUID (insn) = i++;
940 if (INSN_P (insn))
941 continue;
942
943 if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn))
944 {
945 /* Merge in alignments computed by compute_alignments. */
946 log = LABEL_TO_ALIGNMENT (label);
947 if (max_log < log)
948 {
949 max_log = log;
950 max_skip = LABEL_TO_MAX_SKIP (label);
951 }
952
953 rtx_jump_table_data *table = jump_table_for_label (label);
954 if (!table)
955 {
956 log = LABEL_ALIGN (label);
957 if (max_log < log)
958 {
959 max_log = log;
960 max_skip = targetm.asm_out.label_align_max_skip (label);
961 }
962 }
963 /* ADDR_VECs only take room if read-only data goes into the text
964 section. */
965 if ((JUMP_TABLES_IN_TEXT_SECTION
966 || readonly_data_section == text_section)
967 && table)
968 {
969 log = ADDR_VEC_ALIGN (table);
970 if (max_log < log)
971 {
972 max_log = log;
973 max_skip = targetm.asm_out.label_align_max_skip (label);
974 }
975 }
976 LABEL_TO_ALIGNMENT (label) = max_log;
977 LABEL_TO_MAX_SKIP (label) = max_skip;
978 max_log = 0;
979 max_skip = 0;
980 }
981 else if (BARRIER_P (insn))
982 {
983 rtx_insn *label;
984
985 for (label = insn; label && ! INSN_P (label);
986 label = NEXT_INSN (label))
987 if (LABEL_P (label))
988 {
989 log = LABEL_ALIGN_AFTER_BARRIER (insn);
990 if (max_log < log)
991 {
992 max_log = log;
993 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
994 }
995 break;
996 }
997 }
998 }
999 if (!HAVE_ATTR_length)
1000 return;
1001
1002 /* Allocate the rest of the arrays. */
1003 insn_lengths = XNEWVEC (int, max_uid);
1004 insn_lengths_max_uid = max_uid;
1005 /* Syntax errors can lead to labels being outside of the main insn stream.
1006 Initialize insn_addresses, so that we get reproducible results. */
1007 INSN_ADDRESSES_ALLOC (max_uid);
1008
1009 varying_length = XCNEWVEC (char, max_uid);
1010
1011 /* Initialize uid_align. We scan instructions
1012 from end to start, and keep in align_tab[n] the last seen insn
1013 that does an alignment of at least n+1, i.e. the successor
1014 in the alignment chain for an insn that does / has a known
1015 alignment of n. */
1016 uid_align = XCNEWVEC (rtx, max_uid);
1017
1018 for (i = MAX_CODE_ALIGN; --i >= 0;)
1019 align_tab[i] = NULL_RTX;
1020 seq = get_last_insn ();
1021 for (; seq; seq = PREV_INSN (seq))
1022 {
1023 int uid = INSN_UID (seq);
1024 int log;
1025 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1026 uid_align[uid] = align_tab[0];
1027 if (log)
1028 {
1029 /* Found an alignment label. */
1030 uid_align[uid] = align_tab[log];
1031 for (i = log - 1; i >= 0; i--)
1032 align_tab[i] = seq;
1033 }
1034 }
1035
1036 /* When optimizing, we start assuming minimum length, and keep increasing
1037 lengths as we find the need for this, till nothing changes.
1038 When not optimizing, we start assuming maximum lengths, and
1039 do a single pass to update the lengths. */
1040 bool increasing = optimize != 0;
1041
1042 #ifdef CASE_VECTOR_SHORTEN_MODE
1043 if (optimize)
1044 {
1045 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1046 label fields. */
1047
1048 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1049 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1050 int rel;
1051
1052 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1053 {
1054 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1055 int len, i, min, max, insn_shuid;
1056 int min_align;
1057 addr_diff_vec_flags flags;
1058
1059 if (! JUMP_TABLE_DATA_P (insn)
1060 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1061 continue;
1062 pat = PATTERN (insn);
1063 len = XVECLEN (pat, 1);
1064 gcc_assert (len > 0);
1065 min_align = MAX_CODE_ALIGN;
1066 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1067 {
1068 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1069 int shuid = INSN_SHUID (lab);
1070 if (shuid < min)
1071 {
1072 min = shuid;
1073 min_lab = lab;
1074 }
1075 if (shuid > max)
1076 {
1077 max = shuid;
1078 max_lab = lab;
1079 }
1080 if (min_align > LABEL_TO_ALIGNMENT (lab))
1081 min_align = LABEL_TO_ALIGNMENT (lab);
1082 }
1083 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1084 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1085 insn_shuid = INSN_SHUID (insn);
1086 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1087 memset (&flags, 0, sizeof (flags));
1088 flags.min_align = min_align;
1089 flags.base_after_vec = rel > insn_shuid;
1090 flags.min_after_vec = min > insn_shuid;
1091 flags.max_after_vec = max > insn_shuid;
1092 flags.min_after_base = min > rel;
1093 flags.max_after_base = max > rel;
1094 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1095
1096 if (increasing)
1097 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1098 }
1099 }
1100 #endif /* CASE_VECTOR_SHORTEN_MODE */
1101
1102 /* Compute initial lengths, addresses, and varying flags for each insn. */
1103 int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length;
1104
1105 for (insn_current_address = 0, insn = first;
1106 insn != 0;
1107 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1108 {
1109 uid = INSN_UID (insn);
1110
1111 insn_lengths[uid] = 0;
1112
1113 if (LABEL_P (insn))
1114 {
1115 int log = LABEL_TO_ALIGNMENT (insn);
1116 if (log)
1117 {
1118 int align = 1 << log;
1119 int new_address = (insn_current_address + align - 1) & -align;
1120 insn_lengths[uid] = new_address - insn_current_address;
1121 }
1122 }
1123
1124 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1125
1126 if (NOTE_P (insn) || BARRIER_P (insn)
1127 || LABEL_P (insn) || DEBUG_INSN_P (insn))
1128 continue;
1129 if (insn->deleted ())
1130 continue;
1131
1132 body = PATTERN (insn);
1133 if (rtx_jump_table_data *table = dyn_cast <rtx_jump_table_data *> (insn))
1134 {
1135 /* This only takes room if read-only data goes into the text
1136 section. */
1137 if (JUMP_TABLES_IN_TEXT_SECTION
1138 || readonly_data_section == text_section)
1139 insn_lengths[uid] = (XVECLEN (body,
1140 GET_CODE (body) == ADDR_DIFF_VEC)
1141 * GET_MODE_SIZE (table->get_data_mode ()));
1142 /* Alignment is handled by ADDR_VEC_ALIGN. */
1143 }
1144 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1145 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1146 else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body))
1147 {
1148 int i;
1149 int const_delay_slots;
1150 if (DELAY_SLOTS)
1151 const_delay_slots = const_num_delay_slots (body_seq->insn (0));
1152 else
1153 const_delay_slots = 0;
1154
1155 int (*inner_length_fun) (rtx_insn *)
1156 = const_delay_slots ? length_fun : insn_default_length;
1157 /* Inside a delay slot sequence, we do not do any branch shortening
1158 if the shortening could change the number of delay slots
1159 of the branch. */
1160 for (i = 0; i < body_seq->len (); i++)
1161 {
1162 rtx_insn *inner_insn = body_seq->insn (i);
1163 int inner_uid = INSN_UID (inner_insn);
1164 int inner_length;
1165
1166 if (GET_CODE (PATTERN (inner_insn)) == ASM_INPUT
1167 || asm_noperands (PATTERN (inner_insn)) >= 0)
1168 inner_length = (asm_insn_count (PATTERN (inner_insn))
1169 * insn_default_length (inner_insn));
1170 else
1171 inner_length = inner_length_fun (inner_insn);
1172
1173 insn_lengths[inner_uid] = inner_length;
1174 if (const_delay_slots)
1175 {
1176 if ((varying_length[inner_uid]
1177 = insn_variable_length_p (inner_insn)) != 0)
1178 varying_length[uid] = 1;
1179 INSN_ADDRESSES (inner_uid) = (insn_current_address
1180 + insn_lengths[uid]);
1181 }
1182 else
1183 varying_length[inner_uid] = 0;
1184 insn_lengths[uid] += inner_length;
1185 }
1186 }
1187 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1188 {
1189 insn_lengths[uid] = length_fun (insn);
1190 varying_length[uid] = insn_variable_length_p (insn);
1191 }
1192
1193 /* If needed, do any adjustment. */
1194 #ifdef ADJUST_INSN_LENGTH
1195 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1196 if (insn_lengths[uid] < 0)
1197 fatal_insn ("negative insn length", insn);
1198 #endif
1199 }
1200
1201 /* Now loop over all the insns finding varying length insns. For each,
1202 get the current insn length. If it has changed, reflect the change.
1203 When nothing changes for a full pass, we are done. */
1204
1205 while (something_changed)
1206 {
1207 something_changed = 0;
1208 insn_current_align = MAX_CODE_ALIGN - 1;
1209 for (insn_current_address = 0, insn = first;
1210 insn != 0;
1211 insn = NEXT_INSN (insn))
1212 {
1213 int new_length;
1214 #ifdef ADJUST_INSN_LENGTH
1215 int tmp_length;
1216 #endif
1217 int length_align;
1218
1219 uid = INSN_UID (insn);
1220
1221 if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn))
1222 {
1223 int log = LABEL_TO_ALIGNMENT (label);
1224
1225 #ifdef CASE_VECTOR_SHORTEN_MODE
1226 /* If the mode of a following jump table was changed, we
1227 may need to update the alignment of this label. */
1228
1229 if (JUMP_TABLES_IN_TEXT_SECTION
1230 || readonly_data_section == text_section)
1231 {
1232 rtx_jump_table_data *table = jump_table_for_label (label);
1233 if (table)
1234 {
1235 int newlog = ADDR_VEC_ALIGN (table);
1236 if (newlog != log)
1237 {
1238 log = newlog;
1239 LABEL_TO_ALIGNMENT (insn) = log;
1240 something_changed = 1;
1241 }
1242 }
1243 }
1244 #endif
1245
1246 if (log > insn_current_align)
1247 {
1248 int align = 1 << log;
1249 int new_address= (insn_current_address + align - 1) & -align;
1250 insn_lengths[uid] = new_address - insn_current_address;
1251 insn_current_align = log;
1252 insn_current_address = new_address;
1253 }
1254 else
1255 insn_lengths[uid] = 0;
1256 INSN_ADDRESSES (uid) = insn_current_address;
1257 continue;
1258 }
1259
1260 length_align = INSN_LENGTH_ALIGNMENT (insn);
1261 if (length_align < insn_current_align)
1262 insn_current_align = length_align;
1263
1264 insn_last_address = INSN_ADDRESSES (uid);
1265 INSN_ADDRESSES (uid) = insn_current_address;
1266
1267 #ifdef CASE_VECTOR_SHORTEN_MODE
1268 if (optimize
1269 && JUMP_TABLE_DATA_P (insn)
1270 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1271 {
1272 rtx_jump_table_data *table = as_a <rtx_jump_table_data *> (insn);
1273 rtx body = PATTERN (insn);
1274 int old_length = insn_lengths[uid];
1275 rtx_insn *rel_lab =
1276 safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0));
1277 rtx min_lab = XEXP (XEXP (body, 2), 0);
1278 rtx max_lab = XEXP (XEXP (body, 3), 0);
1279 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1280 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1281 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1282 rtx_insn *prev;
1283 int rel_align = 0;
1284 addr_diff_vec_flags flags;
1285 scalar_int_mode vec_mode;
1286
1287 /* Avoid automatic aggregate initialization. */
1288 flags = ADDR_DIFF_VEC_FLAGS (body);
1289
1290 /* Try to find a known alignment for rel_lab. */
1291 for (prev = rel_lab;
1292 prev
1293 && ! insn_lengths[INSN_UID (prev)]
1294 && ! (varying_length[INSN_UID (prev)] & 1);
1295 prev = PREV_INSN (prev))
1296 if (varying_length[INSN_UID (prev)] & 2)
1297 {
1298 rel_align = LABEL_TO_ALIGNMENT (prev);
1299 break;
1300 }
1301
1302 /* See the comment on addr_diff_vec_flags in rtl.h for the
1303 meaning of the flags values. base: REL_LAB vec: INSN */
1304 /* Anything after INSN has still addresses from the last
1305 pass; adjust these so that they reflect our current
1306 estimate for this pass. */
1307 if (flags.base_after_vec)
1308 rel_addr += insn_current_address - insn_last_address;
1309 if (flags.min_after_vec)
1310 min_addr += insn_current_address - insn_last_address;
1311 if (flags.max_after_vec)
1312 max_addr += insn_current_address - insn_last_address;
1313 /* We want to know the worst case, i.e. lowest possible value
1314 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1315 its offset is positive, and we have to be wary of code shrink;
1316 otherwise, it is negative, and we have to be vary of code
1317 size increase. */
1318 if (flags.min_after_base)
1319 {
1320 /* If INSN is between REL_LAB and MIN_LAB, the size
1321 changes we are about to make can change the alignment
1322 within the observed offset, therefore we have to break
1323 it up into two parts that are independent. */
1324 if (! flags.base_after_vec && flags.min_after_vec)
1325 {
1326 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1327 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1328 }
1329 else
1330 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1331 }
1332 else
1333 {
1334 if (flags.base_after_vec && ! flags.min_after_vec)
1335 {
1336 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1337 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1338 }
1339 else
1340 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1341 }
1342 /* Likewise, determine the highest lowest possible value
1343 for the offset of MAX_LAB. */
1344 if (flags.max_after_base)
1345 {
1346 if (! flags.base_after_vec && flags.max_after_vec)
1347 {
1348 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1349 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1350 }
1351 else
1352 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1353 }
1354 else
1355 {
1356 if (flags.base_after_vec && ! flags.max_after_vec)
1357 {
1358 max_addr += align_fuzz (max_lab, insn, 0, 0);
1359 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1360 }
1361 else
1362 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1363 }
1364 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1365 max_addr - rel_addr, body);
1366 if (!increasing
1367 || (GET_MODE_SIZE (vec_mode)
1368 >= GET_MODE_SIZE (table->get_data_mode ())))
1369 PUT_MODE (body, vec_mode);
1370 if (JUMP_TABLES_IN_TEXT_SECTION
1371 || readonly_data_section == text_section)
1372 {
1373 insn_lengths[uid]
1374 = (XVECLEN (body, 1)
1375 * GET_MODE_SIZE (table->get_data_mode ()));
1376 insn_current_address += insn_lengths[uid];
1377 if (insn_lengths[uid] != old_length)
1378 something_changed = 1;
1379 }
1380
1381 continue;
1382 }
1383 #endif /* CASE_VECTOR_SHORTEN_MODE */
1384
1385 if (! (varying_length[uid]))
1386 {
1387 if (NONJUMP_INSN_P (insn)
1388 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1389 {
1390 int i;
1391
1392 body = PATTERN (insn);
1393 for (i = 0; i < XVECLEN (body, 0); i++)
1394 {
1395 rtx inner_insn = XVECEXP (body, 0, i);
1396 int inner_uid = INSN_UID (inner_insn);
1397
1398 INSN_ADDRESSES (inner_uid) = insn_current_address;
1399
1400 insn_current_address += insn_lengths[inner_uid];
1401 }
1402 }
1403 else
1404 insn_current_address += insn_lengths[uid];
1405
1406 continue;
1407 }
1408
1409 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1410 {
1411 rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn));
1412 int i;
1413
1414 body = PATTERN (insn);
1415 new_length = 0;
1416 for (i = 0; i < seqn->len (); i++)
1417 {
1418 rtx_insn *inner_insn = seqn->insn (i);
1419 int inner_uid = INSN_UID (inner_insn);
1420 int inner_length;
1421
1422 INSN_ADDRESSES (inner_uid) = insn_current_address;
1423
1424 /* insn_current_length returns 0 for insns with a
1425 non-varying length. */
1426 if (! varying_length[inner_uid])
1427 inner_length = insn_lengths[inner_uid];
1428 else
1429 inner_length = insn_current_length (inner_insn);
1430
1431 if (inner_length != insn_lengths[inner_uid])
1432 {
1433 if (!increasing || inner_length > insn_lengths[inner_uid])
1434 {
1435 insn_lengths[inner_uid] = inner_length;
1436 something_changed = 1;
1437 }
1438 else
1439 inner_length = insn_lengths[inner_uid];
1440 }
1441 insn_current_address += inner_length;
1442 new_length += inner_length;
1443 }
1444 }
1445 else
1446 {
1447 new_length = insn_current_length (insn);
1448 insn_current_address += new_length;
1449 }
1450
1451 #ifdef ADJUST_INSN_LENGTH
1452 /* If needed, do any adjustment. */
1453 tmp_length = new_length;
1454 ADJUST_INSN_LENGTH (insn, new_length);
1455 insn_current_address += (new_length - tmp_length);
1456 #endif
1457
1458 if (new_length != insn_lengths[uid]
1459 && (!increasing || new_length > insn_lengths[uid]))
1460 {
1461 insn_lengths[uid] = new_length;
1462 something_changed = 1;
1463 }
1464 else
1465 insn_current_address += insn_lengths[uid] - new_length;
1466 }
1467 /* For a non-optimizing compile, do only a single pass. */
1468 if (!increasing)
1469 break;
1470 }
1471 crtl->max_insn_address = insn_current_address;
1472 free (varying_length);
1473 }
1474
1475 /* Given the body of an INSN known to be generated by an ASM statement, return
1476 the number of machine instructions likely to be generated for this insn.
1477 This is used to compute its length. */
1478
1479 static int
1480 asm_insn_count (rtx body)
1481 {
1482 const char *templ;
1483
1484 if (GET_CODE (body) == ASM_INPUT)
1485 templ = XSTR (body, 0);
1486 else
1487 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1488
1489 return asm_str_count (templ);
1490 }
1491
1492 /* Return the number of machine instructions likely to be generated for the
1493 inline-asm template. */
1494 int
1495 asm_str_count (const char *templ)
1496 {
1497 int count = 1;
1498
1499 if (!*templ)
1500 return 0;
1501
1502 for (; *templ; templ++)
1503 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1504 || *templ == '\n')
1505 count++;
1506
1507 return count;
1508 }
1509 \f
1510 /* ??? This is probably the wrong place for these. */
1511 /* Structure recording the mapping from source file and directory
1512 names at compile time to those to be embedded in debug
1513 information. */
1514 struct debug_prefix_map
1515 {
1516 const char *old_prefix;
1517 const char *new_prefix;
1518 size_t old_len;
1519 size_t new_len;
1520 struct debug_prefix_map *next;
1521 };
1522
1523 /* Linked list of such structures. */
1524 static debug_prefix_map *debug_prefix_maps;
1525
1526
1527 /* Record a debug file prefix mapping. ARG is the argument to
1528 -fdebug-prefix-map and must be of the form OLD=NEW. */
1529
1530 void
1531 add_debug_prefix_map (const char *arg)
1532 {
1533 debug_prefix_map *map;
1534 const char *p;
1535
1536 p = strchr (arg, '=');
1537 if (!p)
1538 {
1539 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1540 return;
1541 }
1542 map = XNEW (debug_prefix_map);
1543 map->old_prefix = xstrndup (arg, p - arg);
1544 map->old_len = p - arg;
1545 p++;
1546 map->new_prefix = xstrdup (p);
1547 map->new_len = strlen (p);
1548 map->next = debug_prefix_maps;
1549 debug_prefix_maps = map;
1550 }
1551
1552 /* Perform user-specified mapping of debug filename prefixes. Return
1553 the new name corresponding to FILENAME. */
1554
1555 const char *
1556 remap_debug_filename (const char *filename)
1557 {
1558 debug_prefix_map *map;
1559 char *s;
1560 const char *name;
1561 size_t name_len;
1562
1563 for (map = debug_prefix_maps; map; map = map->next)
1564 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1565 break;
1566 if (!map)
1567 return filename;
1568 name = filename + map->old_len;
1569 name_len = strlen (name) + 1;
1570 s = (char *) alloca (name_len + map->new_len);
1571 memcpy (s, map->new_prefix, map->new_len);
1572 memcpy (s + map->new_len, name, name_len);
1573 return ggc_strdup (s);
1574 }
1575 \f
1576 /* Return true if DWARF2 debug info can be emitted for DECL. */
1577
1578 static bool
1579 dwarf2_debug_info_emitted_p (tree decl)
1580 {
1581 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1582 return false;
1583
1584 if (DECL_IGNORED_P (decl))
1585 return false;
1586
1587 return true;
1588 }
1589
1590 /* Return scope resulting from combination of S1 and S2. */
1591 static tree
1592 choose_inner_scope (tree s1, tree s2)
1593 {
1594 if (!s1)
1595 return s2;
1596 if (!s2)
1597 return s1;
1598 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1599 return s1;
1600 return s2;
1601 }
1602
1603 /* Emit lexical block notes needed to change scope from S1 to S2. */
1604
1605 static void
1606 change_scope (rtx_insn *orig_insn, tree s1, tree s2)
1607 {
1608 rtx_insn *insn = orig_insn;
1609 tree com = NULL_TREE;
1610 tree ts1 = s1, ts2 = s2;
1611 tree s;
1612
1613 while (ts1 != ts2)
1614 {
1615 gcc_assert (ts1 && ts2);
1616 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1617 ts1 = BLOCK_SUPERCONTEXT (ts1);
1618 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1619 ts2 = BLOCK_SUPERCONTEXT (ts2);
1620 else
1621 {
1622 ts1 = BLOCK_SUPERCONTEXT (ts1);
1623 ts2 = BLOCK_SUPERCONTEXT (ts2);
1624 }
1625 }
1626 com = ts1;
1627
1628 /* Close scopes. */
1629 s = s1;
1630 while (s != com)
1631 {
1632 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1633 NOTE_BLOCK (note) = s;
1634 s = BLOCK_SUPERCONTEXT (s);
1635 }
1636
1637 /* Open scopes. */
1638 s = s2;
1639 while (s != com)
1640 {
1641 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1642 NOTE_BLOCK (insn) = s;
1643 s = BLOCK_SUPERCONTEXT (s);
1644 }
1645 }
1646
1647 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1648 on the scope tree and the newly reordered instructions. */
1649
1650 static void
1651 reemit_insn_block_notes (void)
1652 {
1653 tree cur_block = DECL_INITIAL (cfun->decl);
1654 rtx_insn *insn;
1655 rtx_note *note;
1656
1657 insn = get_insns ();
1658 for (; insn; insn = NEXT_INSN (insn))
1659 {
1660 tree this_block;
1661
1662 /* Prevent lexical blocks from straddling section boundaries. */
1663 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
1664 {
1665 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1666 s = BLOCK_SUPERCONTEXT (s))
1667 {
1668 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1669 NOTE_BLOCK (note) = s;
1670 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1671 NOTE_BLOCK (note) = s;
1672 }
1673 }
1674
1675 if (!active_insn_p (insn))
1676 continue;
1677
1678 /* Avoid putting scope notes between jump table and its label. */
1679 if (JUMP_TABLE_DATA_P (insn))
1680 continue;
1681
1682 this_block = insn_scope (insn);
1683 /* For sequences compute scope resulting from merging all scopes
1684 of instructions nested inside. */
1685 if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn)))
1686 {
1687 int i;
1688
1689 this_block = NULL;
1690 for (i = 0; i < body->len (); i++)
1691 this_block = choose_inner_scope (this_block,
1692 insn_scope (body->insn (i)));
1693 }
1694 if (! this_block)
1695 {
1696 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1697 continue;
1698 else
1699 this_block = DECL_INITIAL (cfun->decl);
1700 }
1701
1702 if (this_block != cur_block)
1703 {
1704 change_scope (insn, cur_block, this_block);
1705 cur_block = this_block;
1706 }
1707 }
1708
1709 /* change_scope emits before the insn, not after. */
1710 note = emit_note (NOTE_INSN_DELETED);
1711 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1712 delete_insn (note);
1713
1714 reorder_blocks ();
1715 }
1716
1717 static const char *some_local_dynamic_name;
1718
1719 /* Locate some local-dynamic symbol still in use by this function
1720 so that we can print its name in local-dynamic base patterns.
1721 Return null if there are no local-dynamic references. */
1722
1723 const char *
1724 get_some_local_dynamic_name ()
1725 {
1726 subrtx_iterator::array_type array;
1727 rtx_insn *insn;
1728
1729 if (some_local_dynamic_name)
1730 return some_local_dynamic_name;
1731
1732 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
1733 if (NONDEBUG_INSN_P (insn))
1734 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
1735 {
1736 const_rtx x = *iter;
1737 if (GET_CODE (x) == SYMBOL_REF)
1738 {
1739 if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC)
1740 return some_local_dynamic_name = XSTR (x, 0);
1741 if (CONSTANT_POOL_ADDRESS_P (x))
1742 iter.substitute (get_pool_constant (x));
1743 }
1744 }
1745
1746 return 0;
1747 }
1748
1749 /* Output assembler code for the start of a function,
1750 and initialize some of the variables in this file
1751 for the new function. The label for the function and associated
1752 assembler pseudo-ops have already been output in `assemble_start_function'.
1753
1754 FIRST is the first insn of the rtl for the function being compiled.
1755 FILE is the file to write assembler code to.
1756 OPTIMIZE_P is nonzero if we should eliminate redundant
1757 test and compare insns. */
1758
1759 void
1760 final_start_function (rtx_insn *first, FILE *file,
1761 int optimize_p ATTRIBUTE_UNUSED)
1762 {
1763 block_depth = 0;
1764
1765 this_is_asm_operands = 0;
1766
1767 need_profile_function = false;
1768
1769 last_filename = LOCATION_FILE (prologue_location);
1770 last_linenum = LOCATION_LINE (prologue_location);
1771 last_columnnum = LOCATION_COLUMN (prologue_location);
1772 last_discriminator = discriminator = 0;
1773
1774 high_block_linenum = high_function_linenum = last_linenum;
1775
1776 if (flag_sanitize & SANITIZE_ADDRESS)
1777 asan_function_start ();
1778
1779 if (!DECL_IGNORED_P (current_function_decl))
1780 debug_hooks->begin_prologue (last_linenum, last_columnnum, last_filename);
1781
1782 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1783 dwarf2out_begin_prologue (0, 0, NULL);
1784
1785 #ifdef LEAF_REG_REMAP
1786 if (crtl->uses_only_leaf_regs)
1787 leaf_renumber_regs (first);
1788 #endif
1789
1790 /* The Sun386i and perhaps other machines don't work right
1791 if the profiling code comes after the prologue. */
1792 if (targetm.profile_before_prologue () && crtl->profile)
1793 {
1794 if (targetm.asm_out.function_prologue == default_function_pro_epilogue
1795 && targetm.have_prologue ())
1796 {
1797 rtx_insn *insn;
1798 for (insn = first; insn; insn = NEXT_INSN (insn))
1799 if (!NOTE_P (insn))
1800 {
1801 insn = NULL;
1802 break;
1803 }
1804 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1805 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1806 break;
1807 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1808 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1809 continue;
1810 else
1811 {
1812 insn = NULL;
1813 break;
1814 }
1815
1816 if (insn)
1817 need_profile_function = true;
1818 else
1819 profile_function (file);
1820 }
1821 else
1822 profile_function (file);
1823 }
1824
1825 /* If debugging, assign block numbers to all of the blocks in this
1826 function. */
1827 if (write_symbols)
1828 {
1829 reemit_insn_block_notes ();
1830 number_blocks (current_function_decl);
1831 /* We never actually put out begin/end notes for the top-level
1832 block in the function. But, conceptually, that block is
1833 always needed. */
1834 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1835 }
1836
1837 if (warn_frame_larger_than
1838 && get_frame_size () > frame_larger_than_size)
1839 {
1840 /* Issue a warning */
1841 warning (OPT_Wframe_larger_than_,
1842 "the frame size of %wd bytes is larger than %wd bytes",
1843 get_frame_size (), frame_larger_than_size);
1844 }
1845
1846 /* First output the function prologue: code to set up the stack frame. */
1847 targetm.asm_out.function_prologue (file);
1848
1849 /* If the machine represents the prologue as RTL, the profiling code must
1850 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1851 if (! targetm.have_prologue ())
1852 profile_after_prologue (file);
1853 }
1854
1855 static void
1856 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1857 {
1858 if (!targetm.profile_before_prologue () && crtl->profile)
1859 profile_function (file);
1860 }
1861
1862 static void
1863 profile_function (FILE *file ATTRIBUTE_UNUSED)
1864 {
1865 #ifndef NO_PROFILE_COUNTERS
1866 # define NO_PROFILE_COUNTERS 0
1867 #endif
1868 #ifdef ASM_OUTPUT_REG_PUSH
1869 rtx sval = NULL, chain = NULL;
1870
1871 if (cfun->returns_struct)
1872 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1873 true);
1874 if (cfun->static_chain_decl)
1875 chain = targetm.calls.static_chain (current_function_decl, true);
1876 #endif /* ASM_OUTPUT_REG_PUSH */
1877
1878 if (! NO_PROFILE_COUNTERS)
1879 {
1880 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1881 switch_to_section (data_section);
1882 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1883 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1884 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1885 }
1886
1887 switch_to_section (current_function_section ());
1888
1889 #ifdef ASM_OUTPUT_REG_PUSH
1890 if (sval && REG_P (sval))
1891 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1892 if (chain && REG_P (chain))
1893 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1894 #endif
1895
1896 FUNCTION_PROFILER (file, current_function_funcdef_no);
1897
1898 #ifdef ASM_OUTPUT_REG_PUSH
1899 if (chain && REG_P (chain))
1900 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1901 if (sval && REG_P (sval))
1902 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1903 #endif
1904 }
1905
1906 /* Output assembler code for the end of a function.
1907 For clarity, args are same as those of `final_start_function'
1908 even though not all of them are needed. */
1909
1910 void
1911 final_end_function (void)
1912 {
1913 app_disable ();
1914
1915 if (!DECL_IGNORED_P (current_function_decl))
1916 debug_hooks->end_function (high_function_linenum);
1917
1918 /* Finally, output the function epilogue:
1919 code to restore the stack frame and return to the caller. */
1920 targetm.asm_out.function_epilogue (asm_out_file);
1921
1922 /* And debug output. */
1923 if (!DECL_IGNORED_P (current_function_decl))
1924 debug_hooks->end_epilogue (last_linenum, last_filename);
1925
1926 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1927 && dwarf2out_do_frame ())
1928 dwarf2out_end_epilogue (last_linenum, last_filename);
1929
1930 some_local_dynamic_name = 0;
1931 }
1932 \f
1933
1934 /* Dumper helper for basic block information. FILE is the assembly
1935 output file, and INSN is the instruction being emitted. */
1936
1937 static void
1938 dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
1939 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1940 {
1941 basic_block bb;
1942
1943 if (!flag_debug_asm)
1944 return;
1945
1946 if (INSN_UID (insn) < bb_map_size
1947 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1948 {
1949 edge e;
1950 edge_iterator ei;
1951
1952 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1953 if (bb->count.initialized_p ())
1954 {
1955 fprintf (file, ", count:");
1956 bb->count.dump (file);
1957 }
1958 fprintf (file, " seq:%d", (*bb_seqn)++);
1959 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1960 FOR_EACH_EDGE (e, ei, bb->preds)
1961 {
1962 dump_edge_info (file, e, TDF_DETAILS, 0);
1963 }
1964 fprintf (file, "\n");
1965 }
1966 if (INSN_UID (insn) < bb_map_size
1967 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1968 {
1969 edge e;
1970 edge_iterator ei;
1971
1972 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1973 FOR_EACH_EDGE (e, ei, bb->succs)
1974 {
1975 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1976 }
1977 fprintf (file, "\n");
1978 }
1979 }
1980
1981 /* Output assembler code for some insns: all or part of a function.
1982 For description of args, see `final_start_function', above. */
1983
1984 void
1985 final (rtx_insn *first, FILE *file, int optimize_p)
1986 {
1987 rtx_insn *insn, *next;
1988 int seen = 0;
1989
1990 /* Used for -dA dump. */
1991 basic_block *start_to_bb = NULL;
1992 basic_block *end_to_bb = NULL;
1993 int bb_map_size = 0;
1994 int bb_seqn = 0;
1995
1996 last_ignored_compare = 0;
1997
1998 if (HAVE_cc0)
1999 for (insn = first; insn; insn = NEXT_INSN (insn))
2000 {
2001 /* If CC tracking across branches is enabled, record the insn which
2002 jumps to each branch only reached from one place. */
2003 if (optimize_p && JUMP_P (insn))
2004 {
2005 rtx lab = JUMP_LABEL (insn);
2006 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
2007 {
2008 LABEL_REFS (lab) = insn;
2009 }
2010 }
2011 }
2012
2013 init_recog ();
2014
2015 CC_STATUS_INIT;
2016
2017 if (flag_debug_asm)
2018 {
2019 basic_block bb;
2020
2021 bb_map_size = get_max_uid () + 1;
2022 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
2023 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
2024
2025 /* There is no cfg for a thunk. */
2026 if (!cfun->is_thunk)
2027 FOR_EACH_BB_REVERSE_FN (bb, cfun)
2028 {
2029 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
2030 end_to_bb[INSN_UID (BB_END (bb))] = bb;
2031 }
2032 }
2033
2034 /* Output the insns. */
2035 for (insn = first; insn;)
2036 {
2037 if (HAVE_ATTR_length)
2038 {
2039 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2040 {
2041 /* This can be triggered by bugs elsewhere in the compiler if
2042 new insns are created after init_insn_lengths is called. */
2043 gcc_assert (NOTE_P (insn));
2044 insn_current_address = -1;
2045 }
2046 else
2047 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2048 }
2049
2050 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2051 bb_map_size, &bb_seqn);
2052 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2053 }
2054
2055 if (flag_debug_asm)
2056 {
2057 free (start_to_bb);
2058 free (end_to_bb);
2059 }
2060
2061 /* Remove CFI notes, to avoid compare-debug failures. */
2062 for (insn = first; insn; insn = next)
2063 {
2064 next = NEXT_INSN (insn);
2065 if (NOTE_P (insn)
2066 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2067 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2068 delete_insn (insn);
2069 }
2070 }
2071 \f
2072 const char *
2073 get_insn_template (int code, rtx insn)
2074 {
2075 switch (insn_data[code].output_format)
2076 {
2077 case INSN_OUTPUT_FORMAT_SINGLE:
2078 return insn_data[code].output.single;
2079 case INSN_OUTPUT_FORMAT_MULTI:
2080 return insn_data[code].output.multi[which_alternative];
2081 case INSN_OUTPUT_FORMAT_FUNCTION:
2082 gcc_assert (insn);
2083 return (*insn_data[code].output.function) (recog_data.operand,
2084 as_a <rtx_insn *> (insn));
2085
2086 default:
2087 gcc_unreachable ();
2088 }
2089 }
2090
2091 /* Emit the appropriate declaration for an alternate-entry-point
2092 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2093 LABEL_KIND != LABEL_NORMAL.
2094
2095 The case fall-through in this function is intentional. */
2096 static void
2097 output_alternate_entry_point (FILE *file, rtx_insn *insn)
2098 {
2099 const char *name = LABEL_NAME (insn);
2100
2101 switch (LABEL_KIND (insn))
2102 {
2103 case LABEL_WEAK_ENTRY:
2104 #ifdef ASM_WEAKEN_LABEL
2105 ASM_WEAKEN_LABEL (file, name);
2106 gcc_fallthrough ();
2107 #endif
2108 case LABEL_GLOBAL_ENTRY:
2109 targetm.asm_out.globalize_label (file, name);
2110 gcc_fallthrough ();
2111 case LABEL_STATIC_ENTRY:
2112 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2113 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2114 #endif
2115 ASM_OUTPUT_LABEL (file, name);
2116 break;
2117
2118 case LABEL_NORMAL:
2119 default:
2120 gcc_unreachable ();
2121 }
2122 }
2123
2124 /* Given a CALL_INSN, find and return the nested CALL. */
2125 static rtx
2126 call_from_call_insn (rtx_call_insn *insn)
2127 {
2128 rtx x;
2129 gcc_assert (CALL_P (insn));
2130 x = PATTERN (insn);
2131
2132 while (GET_CODE (x) != CALL)
2133 {
2134 switch (GET_CODE (x))
2135 {
2136 default:
2137 gcc_unreachable ();
2138 case COND_EXEC:
2139 x = COND_EXEC_CODE (x);
2140 break;
2141 case PARALLEL:
2142 x = XVECEXP (x, 0, 0);
2143 break;
2144 case SET:
2145 x = XEXP (x, 1);
2146 break;
2147 }
2148 }
2149 return x;
2150 }
2151
2152 /* Print a comment into the asm showing FILENAME, LINENUM, and the
2153 corresponding source line, if available. */
2154
2155 static void
2156 asm_show_source (const char *filename, int linenum)
2157 {
2158 if (!filename)
2159 return;
2160
2161 int line_size;
2162 const char *line = location_get_source_line (filename, linenum, &line_size);
2163 if (!line)
2164 return;
2165
2166 fprintf (asm_out_file, "%s %s:%i: ", ASM_COMMENT_START, filename, linenum);
2167 /* "line" is not 0-terminated, so we must use line_size. */
2168 fwrite (line, 1, line_size, asm_out_file);
2169 fputc ('\n', asm_out_file);
2170 }
2171
2172 /* The final scan for one insn, INSN.
2173 Args are same as in `final', except that INSN
2174 is the insn being scanned.
2175 Value returned is the next insn to be scanned.
2176
2177 NOPEEPHOLES is the flag to disallow peephole processing (currently
2178 used for within delayed branch sequence output).
2179
2180 SEEN is used to track the end of the prologue, for emitting
2181 debug information. We force the emission of a line note after
2182 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
2183
2184 rtx_insn *
2185 final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2186 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2187 {
2188 #if HAVE_cc0
2189 rtx set;
2190 #endif
2191 rtx_insn *next;
2192 rtx_jump_table_data *table;
2193
2194 insn_counter++;
2195
2196 /* Ignore deleted insns. These can occur when we split insns (due to a
2197 template of "#") while not optimizing. */
2198 if (insn->deleted ())
2199 return NEXT_INSN (insn);
2200
2201 switch (GET_CODE (insn))
2202 {
2203 case NOTE:
2204 switch (NOTE_KIND (insn))
2205 {
2206 case NOTE_INSN_DELETED:
2207 case NOTE_INSN_UPDATE_SJLJ_CONTEXT:
2208 break;
2209
2210 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2211 in_cold_section_p = !in_cold_section_p;
2212
2213 if (dwarf2out_do_frame ())
2214 dwarf2out_switch_text_section ();
2215 else if (!DECL_IGNORED_P (current_function_decl))
2216 debug_hooks->switch_text_section ();
2217
2218 switch_to_section (current_function_section ());
2219 targetm.asm_out.function_switched_text_sections (asm_out_file,
2220 current_function_decl,
2221 in_cold_section_p);
2222 /* Emit a label for the split cold section. Form label name by
2223 suffixing "cold" to the original function's name. */
2224 if (in_cold_section_p)
2225 {
2226 cold_function_name
2227 = clone_function_name (current_function_decl, "cold");
2228 #ifdef ASM_DECLARE_COLD_FUNCTION_NAME
2229 ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file,
2230 IDENTIFIER_POINTER
2231 (cold_function_name),
2232 current_function_decl);
2233 #else
2234 ASM_OUTPUT_LABEL (asm_out_file,
2235 IDENTIFIER_POINTER (cold_function_name));
2236 #endif
2237 }
2238 break;
2239
2240 case NOTE_INSN_BASIC_BLOCK:
2241 if (need_profile_function)
2242 {
2243 profile_function (asm_out_file);
2244 need_profile_function = false;
2245 }
2246
2247 if (targetm.asm_out.unwind_emit)
2248 targetm.asm_out.unwind_emit (asm_out_file, insn);
2249
2250 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2251
2252 break;
2253
2254 case NOTE_INSN_EH_REGION_BEG:
2255 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2256 NOTE_EH_HANDLER (insn));
2257 break;
2258
2259 case NOTE_INSN_EH_REGION_END:
2260 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2261 NOTE_EH_HANDLER (insn));
2262 break;
2263
2264 case NOTE_INSN_PROLOGUE_END:
2265 targetm.asm_out.function_end_prologue (file);
2266 profile_after_prologue (file);
2267
2268 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2269 {
2270 *seen |= SEEN_EMITTED;
2271 force_source_line = true;
2272 }
2273 else
2274 *seen |= SEEN_NOTE;
2275
2276 break;
2277
2278 case NOTE_INSN_EPILOGUE_BEG:
2279 if (!DECL_IGNORED_P (current_function_decl))
2280 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2281 targetm.asm_out.function_begin_epilogue (file);
2282 break;
2283
2284 case NOTE_INSN_CFI:
2285 dwarf2out_emit_cfi (NOTE_CFI (insn));
2286 break;
2287
2288 case NOTE_INSN_CFI_LABEL:
2289 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2290 NOTE_LABEL_NUMBER (insn));
2291 break;
2292
2293 case NOTE_INSN_FUNCTION_BEG:
2294 if (need_profile_function)
2295 {
2296 profile_function (asm_out_file);
2297 need_profile_function = false;
2298 }
2299
2300 app_disable ();
2301 if (!DECL_IGNORED_P (current_function_decl))
2302 debug_hooks->end_prologue (last_linenum, last_filename);
2303
2304 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2305 {
2306 *seen |= SEEN_EMITTED;
2307 force_source_line = true;
2308 }
2309 else
2310 *seen |= SEEN_NOTE;
2311
2312 break;
2313
2314 case NOTE_INSN_BLOCK_BEG:
2315 if (debug_info_level == DINFO_LEVEL_NORMAL
2316 || debug_info_level == DINFO_LEVEL_VERBOSE
2317 || write_symbols == DWARF2_DEBUG
2318 || write_symbols == VMS_AND_DWARF2_DEBUG
2319 || write_symbols == VMS_DEBUG)
2320 {
2321 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2322
2323 app_disable ();
2324 ++block_depth;
2325 high_block_linenum = last_linenum;
2326
2327 /* Output debugging info about the symbol-block beginning. */
2328 if (!DECL_IGNORED_P (current_function_decl))
2329 debug_hooks->begin_block (last_linenum, n);
2330
2331 /* Mark this block as output. */
2332 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2333 BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) = in_cold_section_p;
2334 }
2335 if (write_symbols == DBX_DEBUG)
2336 {
2337 location_t *locus_ptr
2338 = block_nonartificial_location (NOTE_BLOCK (insn));
2339
2340 if (locus_ptr != NULL)
2341 {
2342 override_filename = LOCATION_FILE (*locus_ptr);
2343 override_linenum = LOCATION_LINE (*locus_ptr);
2344 override_columnnum = LOCATION_COLUMN (*locus_ptr);
2345 }
2346 }
2347 break;
2348
2349 case NOTE_INSN_BLOCK_END:
2350 if (debug_info_level == DINFO_LEVEL_NORMAL
2351 || debug_info_level == DINFO_LEVEL_VERBOSE
2352 || write_symbols == DWARF2_DEBUG
2353 || write_symbols == VMS_AND_DWARF2_DEBUG
2354 || write_symbols == VMS_DEBUG)
2355 {
2356 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2357
2358 app_disable ();
2359
2360 /* End of a symbol-block. */
2361 --block_depth;
2362 gcc_assert (block_depth >= 0);
2363
2364 if (!DECL_IGNORED_P (current_function_decl))
2365 debug_hooks->end_block (high_block_linenum, n);
2366 gcc_assert (BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn))
2367 == in_cold_section_p);
2368 }
2369 if (write_symbols == DBX_DEBUG)
2370 {
2371 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2372 location_t *locus_ptr
2373 = block_nonartificial_location (outer_block);
2374
2375 if (locus_ptr != NULL)
2376 {
2377 override_filename = LOCATION_FILE (*locus_ptr);
2378 override_linenum = LOCATION_LINE (*locus_ptr);
2379 override_columnnum = LOCATION_COLUMN (*locus_ptr);
2380 }
2381 else
2382 {
2383 override_filename = NULL;
2384 override_linenum = 0;
2385 override_columnnum = 0;
2386 }
2387 }
2388 break;
2389
2390 case NOTE_INSN_DELETED_LABEL:
2391 /* Emit the label. We may have deleted the CODE_LABEL because
2392 the label could be proved to be unreachable, though still
2393 referenced (in the form of having its address taken. */
2394 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2395 break;
2396
2397 case NOTE_INSN_DELETED_DEBUG_LABEL:
2398 /* Similarly, but need to use different namespace for it. */
2399 if (CODE_LABEL_NUMBER (insn) != -1)
2400 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2401 break;
2402
2403 case NOTE_INSN_VAR_LOCATION:
2404 case NOTE_INSN_CALL_ARG_LOCATION:
2405 if (!DECL_IGNORED_P (current_function_decl))
2406 debug_hooks->var_location (insn);
2407 break;
2408
2409 default:
2410 gcc_unreachable ();
2411 break;
2412 }
2413 break;
2414
2415 case BARRIER:
2416 break;
2417
2418 case CODE_LABEL:
2419 /* The target port might emit labels in the output function for
2420 some insn, e.g. sh.c output_branchy_insn. */
2421 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2422 {
2423 int align = LABEL_TO_ALIGNMENT (insn);
2424 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2425 int max_skip = LABEL_TO_MAX_SKIP (insn);
2426 #endif
2427
2428 if (align && NEXT_INSN (insn))
2429 {
2430 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2431 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2432 #else
2433 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2434 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2435 #else
2436 ASM_OUTPUT_ALIGN (file, align);
2437 #endif
2438 #endif
2439 }
2440 }
2441 CC_STATUS_INIT;
2442
2443 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2444 debug_hooks->label (as_a <rtx_code_label *> (insn));
2445
2446 app_disable ();
2447
2448 /* If this label is followed by a jump-table, make sure we put
2449 the label in the read-only section. Also possibly write the
2450 label and jump table together. */
2451 table = jump_table_for_label (as_a <rtx_code_label *> (insn));
2452 if (table)
2453 {
2454 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2455 /* In this case, the case vector is being moved by the
2456 target, so don't output the label at all. Leave that
2457 to the back end macros. */
2458 #else
2459 if (! JUMP_TABLES_IN_TEXT_SECTION)
2460 {
2461 int log_align;
2462
2463 switch_to_section (targetm.asm_out.function_rodata_section
2464 (current_function_decl));
2465
2466 #ifdef ADDR_VEC_ALIGN
2467 log_align = ADDR_VEC_ALIGN (table);
2468 #else
2469 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2470 #endif
2471 ASM_OUTPUT_ALIGN (file, log_align);
2472 }
2473 else
2474 switch_to_section (current_function_section ());
2475
2476 #ifdef ASM_OUTPUT_CASE_LABEL
2477 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), table);
2478 #else
2479 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2480 #endif
2481 #endif
2482 break;
2483 }
2484 if (LABEL_ALT_ENTRY_P (insn))
2485 output_alternate_entry_point (file, insn);
2486 else
2487 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2488 break;
2489
2490 default:
2491 {
2492 rtx body = PATTERN (insn);
2493 int insn_code_number;
2494 const char *templ;
2495 bool is_stmt;
2496
2497 /* Reset this early so it is correct for ASM statements. */
2498 current_insn_predicate = NULL_RTX;
2499
2500 /* An INSN, JUMP_INSN or CALL_INSN.
2501 First check for special kinds that recog doesn't recognize. */
2502
2503 if (GET_CODE (body) == USE /* These are just declarations. */
2504 || GET_CODE (body) == CLOBBER)
2505 break;
2506
2507 #if HAVE_cc0
2508 {
2509 /* If there is a REG_CC_SETTER note on this insn, it means that
2510 the setting of the condition code was done in the delay slot
2511 of the insn that branched here. So recover the cc status
2512 from the insn that set it. */
2513
2514 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2515 if (note)
2516 {
2517 rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0));
2518 NOTICE_UPDATE_CC (PATTERN (other), other);
2519 cc_prev_status = cc_status;
2520 }
2521 }
2522 #endif
2523
2524 /* Detect insns that are really jump-tables
2525 and output them as such. */
2526
2527 if (JUMP_TABLE_DATA_P (insn))
2528 {
2529 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2530 int vlen, idx;
2531 #endif
2532
2533 if (! JUMP_TABLES_IN_TEXT_SECTION)
2534 switch_to_section (targetm.asm_out.function_rodata_section
2535 (current_function_decl));
2536 else
2537 switch_to_section (current_function_section ());
2538
2539 app_disable ();
2540
2541 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2542 if (GET_CODE (body) == ADDR_VEC)
2543 {
2544 #ifdef ASM_OUTPUT_ADDR_VEC
2545 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2546 #else
2547 gcc_unreachable ();
2548 #endif
2549 }
2550 else
2551 {
2552 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2553 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2554 #else
2555 gcc_unreachable ();
2556 #endif
2557 }
2558 #else
2559 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2560 for (idx = 0; idx < vlen; idx++)
2561 {
2562 if (GET_CODE (body) == ADDR_VEC)
2563 {
2564 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2565 ASM_OUTPUT_ADDR_VEC_ELT
2566 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2567 #else
2568 gcc_unreachable ();
2569 #endif
2570 }
2571 else
2572 {
2573 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2574 ASM_OUTPUT_ADDR_DIFF_ELT
2575 (file,
2576 body,
2577 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2578 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2579 #else
2580 gcc_unreachable ();
2581 #endif
2582 }
2583 }
2584 #ifdef ASM_OUTPUT_CASE_END
2585 ASM_OUTPUT_CASE_END (file,
2586 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2587 insn);
2588 #endif
2589 #endif
2590
2591 switch_to_section (current_function_section ());
2592
2593 break;
2594 }
2595 /* Output this line note if it is the first or the last line
2596 note in a row. */
2597 if (!DECL_IGNORED_P (current_function_decl)
2598 && notice_source_line (insn, &is_stmt))
2599 {
2600 if (flag_verbose_asm)
2601 asm_show_source (last_filename, last_linenum);
2602 (*debug_hooks->source_line) (last_linenum, last_columnnum,
2603 last_filename, last_discriminator,
2604 is_stmt);
2605 }
2606
2607 if (GET_CODE (body) == PARALLEL
2608 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT)
2609 body = XVECEXP (body, 0, 0);
2610
2611 if (GET_CODE (body) == ASM_INPUT)
2612 {
2613 const char *string = XSTR (body, 0);
2614
2615 /* There's no telling what that did to the condition codes. */
2616 CC_STATUS_INIT;
2617
2618 if (string[0])
2619 {
2620 expanded_location loc;
2621
2622 app_enable ();
2623 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2624 if (*loc.file && loc.line)
2625 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2626 ASM_COMMENT_START, loc.line, loc.file);
2627 fprintf (asm_out_file, "\t%s\n", string);
2628 #if HAVE_AS_LINE_ZERO
2629 if (*loc.file && loc.line)
2630 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2631 #endif
2632 }
2633 break;
2634 }
2635
2636 /* Detect `asm' construct with operands. */
2637 if (asm_noperands (body) >= 0)
2638 {
2639 unsigned int noperands = asm_noperands (body);
2640 rtx *ops = XALLOCAVEC (rtx, noperands);
2641 const char *string;
2642 location_t loc;
2643 expanded_location expanded;
2644
2645 /* There's no telling what that did to the condition codes. */
2646 CC_STATUS_INIT;
2647
2648 /* Get out the operand values. */
2649 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2650 /* Inhibit dying on what would otherwise be compiler bugs. */
2651 insn_noperands = noperands;
2652 this_is_asm_operands = insn;
2653 expanded = expand_location (loc);
2654
2655 #ifdef FINAL_PRESCAN_INSN
2656 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2657 #endif
2658
2659 /* Output the insn using them. */
2660 if (string[0])
2661 {
2662 app_enable ();
2663 if (expanded.file && expanded.line)
2664 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2665 ASM_COMMENT_START, expanded.line, expanded.file);
2666 output_asm_insn (string, ops);
2667 #if HAVE_AS_LINE_ZERO
2668 if (expanded.file && expanded.line)
2669 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2670 #endif
2671 }
2672
2673 if (targetm.asm_out.final_postscan_insn)
2674 targetm.asm_out.final_postscan_insn (file, insn, ops,
2675 insn_noperands);
2676
2677 this_is_asm_operands = 0;
2678 break;
2679 }
2680
2681 app_disable ();
2682
2683 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
2684 {
2685 /* A delayed-branch sequence */
2686 int i;
2687
2688 final_sequence = seq;
2689
2690 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2691 force the restoration of a comparison that was previously
2692 thought unnecessary. If that happens, cancel this sequence
2693 and cause that insn to be restored. */
2694
2695 next = final_scan_insn (seq->insn (0), file, 0, 1, seen);
2696 if (next != seq->insn (1))
2697 {
2698 final_sequence = 0;
2699 return next;
2700 }
2701
2702 for (i = 1; i < seq->len (); i++)
2703 {
2704 rtx_insn *insn = seq->insn (i);
2705 rtx_insn *next = NEXT_INSN (insn);
2706 /* We loop in case any instruction in a delay slot gets
2707 split. */
2708 do
2709 insn = final_scan_insn (insn, file, 0, 1, seen);
2710 while (insn != next);
2711 }
2712 #ifdef DBR_OUTPUT_SEQEND
2713 DBR_OUTPUT_SEQEND (file);
2714 #endif
2715 final_sequence = 0;
2716
2717 /* If the insn requiring the delay slot was a CALL_INSN, the
2718 insns in the delay slot are actually executed before the
2719 called function. Hence we don't preserve any CC-setting
2720 actions in these insns and the CC must be marked as being
2721 clobbered by the function. */
2722 if (CALL_P (seq->insn (0)))
2723 {
2724 CC_STATUS_INIT;
2725 }
2726 break;
2727 }
2728
2729 /* We have a real machine instruction as rtl. */
2730
2731 body = PATTERN (insn);
2732
2733 #if HAVE_cc0
2734 set = single_set (insn);
2735
2736 /* Check for redundant test and compare instructions
2737 (when the condition codes are already set up as desired).
2738 This is done only when optimizing; if not optimizing,
2739 it should be possible for the user to alter a variable
2740 with the debugger in between statements
2741 and the next statement should reexamine the variable
2742 to compute the condition codes. */
2743
2744 if (optimize_p)
2745 {
2746 if (set
2747 && GET_CODE (SET_DEST (set)) == CC0
2748 && insn != last_ignored_compare)
2749 {
2750 rtx src1, src2;
2751 if (GET_CODE (SET_SRC (set)) == SUBREG)
2752 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2753
2754 src1 = SET_SRC (set);
2755 src2 = NULL_RTX;
2756 if (GET_CODE (SET_SRC (set)) == COMPARE)
2757 {
2758 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2759 XEXP (SET_SRC (set), 0)
2760 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2761 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2762 XEXP (SET_SRC (set), 1)
2763 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2764 if (XEXP (SET_SRC (set), 1)
2765 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2766 src2 = XEXP (SET_SRC (set), 0);
2767 }
2768 if ((cc_status.value1 != 0
2769 && rtx_equal_p (src1, cc_status.value1))
2770 || (cc_status.value2 != 0
2771 && rtx_equal_p (src1, cc_status.value2))
2772 || (src2 != 0 && cc_status.value1 != 0
2773 && rtx_equal_p (src2, cc_status.value1))
2774 || (src2 != 0 && cc_status.value2 != 0
2775 && rtx_equal_p (src2, cc_status.value2)))
2776 {
2777 /* Don't delete insn if it has an addressing side-effect. */
2778 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2779 /* or if anything in it is volatile. */
2780 && ! volatile_refs_p (PATTERN (insn)))
2781 {
2782 /* We don't really delete the insn; just ignore it. */
2783 last_ignored_compare = insn;
2784 break;
2785 }
2786 }
2787 }
2788 }
2789
2790 /* If this is a conditional branch, maybe modify it
2791 if the cc's are in a nonstandard state
2792 so that it accomplishes the same thing that it would
2793 do straightforwardly if the cc's were set up normally. */
2794
2795 if (cc_status.flags != 0
2796 && JUMP_P (insn)
2797 && GET_CODE (body) == SET
2798 && SET_DEST (body) == pc_rtx
2799 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2800 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2801 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2802 {
2803 /* This function may alter the contents of its argument
2804 and clear some of the cc_status.flags bits.
2805 It may also return 1 meaning condition now always true
2806 or -1 meaning condition now always false
2807 or 2 meaning condition nontrivial but altered. */
2808 int result = alter_cond (XEXP (SET_SRC (body), 0));
2809 /* If condition now has fixed value, replace the IF_THEN_ELSE
2810 with its then-operand or its else-operand. */
2811 if (result == 1)
2812 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2813 if (result == -1)
2814 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2815
2816 /* The jump is now either unconditional or a no-op.
2817 If it has become a no-op, don't try to output it.
2818 (It would not be recognized.) */
2819 if (SET_SRC (body) == pc_rtx)
2820 {
2821 delete_insn (insn);
2822 break;
2823 }
2824 else if (ANY_RETURN_P (SET_SRC (body)))
2825 /* Replace (set (pc) (return)) with (return). */
2826 PATTERN (insn) = body = SET_SRC (body);
2827
2828 /* Rerecognize the instruction if it has changed. */
2829 if (result != 0)
2830 INSN_CODE (insn) = -1;
2831 }
2832
2833 /* If this is a conditional trap, maybe modify it if the cc's
2834 are in a nonstandard state so that it accomplishes the same
2835 thing that it would do straightforwardly if the cc's were
2836 set up normally. */
2837 if (cc_status.flags != 0
2838 && NONJUMP_INSN_P (insn)
2839 && GET_CODE (body) == TRAP_IF
2840 && COMPARISON_P (TRAP_CONDITION (body))
2841 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2842 {
2843 /* This function may alter the contents of its argument
2844 and clear some of the cc_status.flags bits.
2845 It may also return 1 meaning condition now always true
2846 or -1 meaning condition now always false
2847 or 2 meaning condition nontrivial but altered. */
2848 int result = alter_cond (TRAP_CONDITION (body));
2849
2850 /* If TRAP_CONDITION has become always false, delete the
2851 instruction. */
2852 if (result == -1)
2853 {
2854 delete_insn (insn);
2855 break;
2856 }
2857
2858 /* If TRAP_CONDITION has become always true, replace
2859 TRAP_CONDITION with const_true_rtx. */
2860 if (result == 1)
2861 TRAP_CONDITION (body) = const_true_rtx;
2862
2863 /* Rerecognize the instruction if it has changed. */
2864 if (result != 0)
2865 INSN_CODE (insn) = -1;
2866 }
2867
2868 /* Make same adjustments to instructions that examine the
2869 condition codes without jumping and instructions that
2870 handle conditional moves (if this machine has either one). */
2871
2872 if (cc_status.flags != 0
2873 && set != 0)
2874 {
2875 rtx cond_rtx, then_rtx, else_rtx;
2876
2877 if (!JUMP_P (insn)
2878 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2879 {
2880 cond_rtx = XEXP (SET_SRC (set), 0);
2881 then_rtx = XEXP (SET_SRC (set), 1);
2882 else_rtx = XEXP (SET_SRC (set), 2);
2883 }
2884 else
2885 {
2886 cond_rtx = SET_SRC (set);
2887 then_rtx = const_true_rtx;
2888 else_rtx = const0_rtx;
2889 }
2890
2891 if (COMPARISON_P (cond_rtx)
2892 && XEXP (cond_rtx, 0) == cc0_rtx)
2893 {
2894 int result;
2895 result = alter_cond (cond_rtx);
2896 if (result == 1)
2897 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2898 else if (result == -1)
2899 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2900 else if (result == 2)
2901 INSN_CODE (insn) = -1;
2902 if (SET_DEST (set) == SET_SRC (set))
2903 delete_insn (insn);
2904 }
2905 }
2906
2907 #endif
2908
2909 /* Do machine-specific peephole optimizations if desired. */
2910
2911 if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes)
2912 {
2913 rtx_insn *next = peephole (insn);
2914 /* When peepholing, if there were notes within the peephole,
2915 emit them before the peephole. */
2916 if (next != 0 && next != NEXT_INSN (insn))
2917 {
2918 rtx_insn *note, *prev = PREV_INSN (insn);
2919
2920 for (note = NEXT_INSN (insn); note != next;
2921 note = NEXT_INSN (note))
2922 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2923
2924 /* Put the notes in the proper position for a later
2925 rescan. For example, the SH target can do this
2926 when generating a far jump in a delayed branch
2927 sequence. */
2928 note = NEXT_INSN (insn);
2929 SET_PREV_INSN (note) = prev;
2930 SET_NEXT_INSN (prev) = note;
2931 SET_NEXT_INSN (PREV_INSN (next)) = insn;
2932 SET_PREV_INSN (insn) = PREV_INSN (next);
2933 SET_NEXT_INSN (insn) = next;
2934 SET_PREV_INSN (next) = insn;
2935 }
2936
2937 /* PEEPHOLE might have changed this. */
2938 body = PATTERN (insn);
2939 }
2940
2941 /* Try to recognize the instruction.
2942 If successful, verify that the operands satisfy the
2943 constraints for the instruction. Crash if they don't,
2944 since `reload' should have changed them so that they do. */
2945
2946 insn_code_number = recog_memoized (insn);
2947 cleanup_subreg_operands (insn);
2948
2949 /* Dump the insn in the assembly for debugging (-dAP).
2950 If the final dump is requested as slim RTL, dump slim
2951 RTL to the assembly file also. */
2952 if (flag_dump_rtl_in_asm)
2953 {
2954 print_rtx_head = ASM_COMMENT_START;
2955 if (! (dump_flags & TDF_SLIM))
2956 print_rtl_single (asm_out_file, insn);
2957 else
2958 dump_insn_slim (asm_out_file, insn);
2959 print_rtx_head = "";
2960 }
2961
2962 if (! constrain_operands_cached (insn, 1))
2963 fatal_insn_not_found (insn);
2964
2965 /* Some target machines need to prescan each insn before
2966 it is output. */
2967
2968 #ifdef FINAL_PRESCAN_INSN
2969 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2970 #endif
2971
2972 if (targetm.have_conditional_execution ()
2973 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2974 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2975
2976 #if HAVE_cc0
2977 cc_prev_status = cc_status;
2978
2979 /* Update `cc_status' for this instruction.
2980 The instruction's output routine may change it further.
2981 If the output routine for a jump insn needs to depend
2982 on the cc status, it should look at cc_prev_status. */
2983
2984 NOTICE_UPDATE_CC (body, insn);
2985 #endif
2986
2987 current_output_insn = debug_insn = insn;
2988
2989 /* Find the proper template for this insn. */
2990 templ = get_insn_template (insn_code_number, insn);
2991
2992 /* If the C code returns 0, it means that it is a jump insn
2993 which follows a deleted test insn, and that test insn
2994 needs to be reinserted. */
2995 if (templ == 0)
2996 {
2997 rtx_insn *prev;
2998
2999 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
3000
3001 /* We have already processed the notes between the setter and
3002 the user. Make sure we don't process them again, this is
3003 particularly important if one of the notes is a block
3004 scope note or an EH note. */
3005 for (prev = insn;
3006 prev != last_ignored_compare;
3007 prev = PREV_INSN (prev))
3008 {
3009 if (NOTE_P (prev))
3010 delete_insn (prev); /* Use delete_note. */
3011 }
3012
3013 return prev;
3014 }
3015
3016 /* If the template is the string "#", it means that this insn must
3017 be split. */
3018 if (templ[0] == '#' && templ[1] == '\0')
3019 {
3020 rtx_insn *new_rtx = try_split (body, insn, 0);
3021
3022 /* If we didn't split the insn, go away. */
3023 if (new_rtx == insn && PATTERN (new_rtx) == body)
3024 fatal_insn ("could not split insn", insn);
3025
3026 /* If we have a length attribute, this instruction should have
3027 been split in shorten_branches, to ensure that we would have
3028 valid length info for the splitees. */
3029 gcc_assert (!HAVE_ATTR_length);
3030
3031 return new_rtx;
3032 }
3033
3034 /* ??? This will put the directives in the wrong place if
3035 get_insn_template outputs assembly directly. However calling it
3036 before get_insn_template breaks if the insns is split. */
3037 if (targetm.asm_out.unwind_emit_before_insn
3038 && targetm.asm_out.unwind_emit)
3039 targetm.asm_out.unwind_emit (asm_out_file, insn);
3040
3041 rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn);
3042 if (call_insn != NULL)
3043 {
3044 rtx x = call_from_call_insn (call_insn);
3045 x = XEXP (x, 0);
3046 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
3047 {
3048 tree t;
3049 x = XEXP (x, 0);
3050 t = SYMBOL_REF_DECL (x);
3051 if (t)
3052 assemble_external (t);
3053 }
3054 }
3055
3056 /* Output assembler code from the template. */
3057 output_asm_insn (templ, recog_data.operand);
3058
3059 /* Some target machines need to postscan each insn after
3060 it is output. */
3061 if (targetm.asm_out.final_postscan_insn)
3062 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
3063 recog_data.n_operands);
3064
3065 if (!targetm.asm_out.unwind_emit_before_insn
3066 && targetm.asm_out.unwind_emit)
3067 targetm.asm_out.unwind_emit (asm_out_file, insn);
3068
3069 /* Let the debug info back-end know about this call. We do this only
3070 after the instruction has been emitted because labels that may be
3071 created to reference the call instruction must appear after it. */
3072 if (call_insn != NULL && !DECL_IGNORED_P (current_function_decl))
3073 debug_hooks->var_location (insn);
3074
3075 current_output_insn = debug_insn = 0;
3076 }
3077 }
3078 return NEXT_INSN (insn);
3079 }
3080 \f
3081 /* Return whether a source line note needs to be emitted before INSN.
3082 Sets IS_STMT to TRUE if the line should be marked as a possible
3083 breakpoint location. */
3084
3085 static bool
3086 notice_source_line (rtx_insn *insn, bool *is_stmt)
3087 {
3088 const char *filename;
3089 int linenum, columnnum;
3090
3091 if (override_filename)
3092 {
3093 filename = override_filename;
3094 linenum = override_linenum;
3095 columnnum = override_columnnum;
3096 }
3097 else if (INSN_HAS_LOCATION (insn))
3098 {
3099 expanded_location xloc = insn_location (insn);
3100 filename = xloc.file;
3101 linenum = xloc.line;
3102 columnnum = xloc.column;
3103 }
3104 else
3105 {
3106 filename = NULL;
3107 linenum = 0;
3108 columnnum = 0;
3109 }
3110
3111 if (filename == NULL)
3112 return false;
3113
3114 if (force_source_line
3115 || filename != last_filename
3116 || last_linenum != linenum
3117 || (debug_column_info && last_columnnum != columnnum))
3118 {
3119 force_source_line = false;
3120 last_filename = filename;
3121 last_linenum = linenum;
3122 last_columnnum = columnnum;
3123 last_discriminator = discriminator;
3124 *is_stmt = true;
3125 high_block_linenum = MAX (last_linenum, high_block_linenum);
3126 high_function_linenum = MAX (last_linenum, high_function_linenum);
3127 return true;
3128 }
3129
3130 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3131 {
3132 /* If the discriminator changed, but the line number did not,
3133 output the line table entry with is_stmt false so the
3134 debugger does not treat this as a breakpoint location. */
3135 last_discriminator = discriminator;
3136 *is_stmt = false;
3137 return true;
3138 }
3139
3140 return false;
3141 }
3142 \f
3143 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3144 directly to the desired hard register. */
3145
3146 void
3147 cleanup_subreg_operands (rtx_insn *insn)
3148 {
3149 int i;
3150 bool changed = false;
3151 extract_insn_cached (insn);
3152 for (i = 0; i < recog_data.n_operands; i++)
3153 {
3154 /* The following test cannot use recog_data.operand when testing
3155 for a SUBREG: the underlying object might have been changed
3156 already if we are inside a match_operator expression that
3157 matches the else clause. Instead we test the underlying
3158 expression directly. */
3159 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3160 {
3161 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3162 changed = true;
3163 }
3164 else if (GET_CODE (recog_data.operand[i]) == PLUS
3165 || GET_CODE (recog_data.operand[i]) == MULT
3166 || MEM_P (recog_data.operand[i]))
3167 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3168 }
3169
3170 for (i = 0; i < recog_data.n_dups; i++)
3171 {
3172 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3173 {
3174 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3175 changed = true;
3176 }
3177 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3178 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3179 || MEM_P (*recog_data.dup_loc[i]))
3180 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3181 }
3182 if (changed)
3183 df_insn_rescan (insn);
3184 }
3185
3186 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3187 the thing it is a subreg of. Do it anyway if FINAL_P. */
3188
3189 rtx
3190 alter_subreg (rtx *xp, bool final_p)
3191 {
3192 rtx x = *xp;
3193 rtx y = SUBREG_REG (x);
3194
3195 /* simplify_subreg does not remove subreg from volatile references.
3196 We are required to. */
3197 if (MEM_P (y))
3198 {
3199 int offset = SUBREG_BYTE (x);
3200
3201 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3202 contains 0 instead of the proper offset. See simplify_subreg. */
3203 if (paradoxical_subreg_p (x))
3204 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3205
3206 if (final_p)
3207 *xp = adjust_address (y, GET_MODE (x), offset);
3208 else
3209 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3210 }
3211 else if (REG_P (y) && HARD_REGISTER_P (y))
3212 {
3213 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3214 SUBREG_BYTE (x));
3215
3216 if (new_rtx != 0)
3217 *xp = new_rtx;
3218 else if (final_p && REG_P (y))
3219 {
3220 /* Simplify_subreg can't handle some REG cases, but we have to. */
3221 unsigned int regno;
3222 HOST_WIDE_INT offset;
3223
3224 regno = subreg_regno (x);
3225 if (subreg_lowpart_p (x))
3226 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3227 else
3228 offset = SUBREG_BYTE (x);
3229 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3230 }
3231 }
3232
3233 return *xp;
3234 }
3235
3236 /* Do alter_subreg on all the SUBREGs contained in X. */
3237
3238 static rtx
3239 walk_alter_subreg (rtx *xp, bool *changed)
3240 {
3241 rtx x = *xp;
3242 switch (GET_CODE (x))
3243 {
3244 case PLUS:
3245 case MULT:
3246 case AND:
3247 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3248 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3249 break;
3250
3251 case MEM:
3252 case ZERO_EXTEND:
3253 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3254 break;
3255
3256 case SUBREG:
3257 *changed = true;
3258 return alter_subreg (xp, true);
3259
3260 default:
3261 break;
3262 }
3263
3264 return *xp;
3265 }
3266 \f
3267 #if HAVE_cc0
3268
3269 /* Given BODY, the body of a jump instruction, alter the jump condition
3270 as required by the bits that are set in cc_status.flags.
3271 Not all of the bits there can be handled at this level in all cases.
3272
3273 The value is normally 0.
3274 1 means that the condition has become always true.
3275 -1 means that the condition has become always false.
3276 2 means that COND has been altered. */
3277
3278 static int
3279 alter_cond (rtx cond)
3280 {
3281 int value = 0;
3282
3283 if (cc_status.flags & CC_REVERSED)
3284 {
3285 value = 2;
3286 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3287 }
3288
3289 if (cc_status.flags & CC_INVERTED)
3290 {
3291 value = 2;
3292 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3293 }
3294
3295 if (cc_status.flags & CC_NOT_POSITIVE)
3296 switch (GET_CODE (cond))
3297 {
3298 case LE:
3299 case LEU:
3300 case GEU:
3301 /* Jump becomes unconditional. */
3302 return 1;
3303
3304 case GT:
3305 case GTU:
3306 case LTU:
3307 /* Jump becomes no-op. */
3308 return -1;
3309
3310 case GE:
3311 PUT_CODE (cond, EQ);
3312 value = 2;
3313 break;
3314
3315 case LT:
3316 PUT_CODE (cond, NE);
3317 value = 2;
3318 break;
3319
3320 default:
3321 break;
3322 }
3323
3324 if (cc_status.flags & CC_NOT_NEGATIVE)
3325 switch (GET_CODE (cond))
3326 {
3327 case GE:
3328 case GEU:
3329 /* Jump becomes unconditional. */
3330 return 1;
3331
3332 case LT:
3333 case LTU:
3334 /* Jump becomes no-op. */
3335 return -1;
3336
3337 case LE:
3338 case LEU:
3339 PUT_CODE (cond, EQ);
3340 value = 2;
3341 break;
3342
3343 case GT:
3344 case GTU:
3345 PUT_CODE (cond, NE);
3346 value = 2;
3347 break;
3348
3349 default:
3350 break;
3351 }
3352
3353 if (cc_status.flags & CC_NO_OVERFLOW)
3354 switch (GET_CODE (cond))
3355 {
3356 case GEU:
3357 /* Jump becomes unconditional. */
3358 return 1;
3359
3360 case LEU:
3361 PUT_CODE (cond, EQ);
3362 value = 2;
3363 break;
3364
3365 case GTU:
3366 PUT_CODE (cond, NE);
3367 value = 2;
3368 break;
3369
3370 case LTU:
3371 /* Jump becomes no-op. */
3372 return -1;
3373
3374 default:
3375 break;
3376 }
3377
3378 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3379 switch (GET_CODE (cond))
3380 {
3381 default:
3382 gcc_unreachable ();
3383
3384 case NE:
3385 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3386 value = 2;
3387 break;
3388
3389 case EQ:
3390 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3391 value = 2;
3392 break;
3393 }
3394
3395 if (cc_status.flags & CC_NOT_SIGNED)
3396 /* The flags are valid if signed condition operators are converted
3397 to unsigned. */
3398 switch (GET_CODE (cond))
3399 {
3400 case LE:
3401 PUT_CODE (cond, LEU);
3402 value = 2;
3403 break;
3404
3405 case LT:
3406 PUT_CODE (cond, LTU);
3407 value = 2;
3408 break;
3409
3410 case GT:
3411 PUT_CODE (cond, GTU);
3412 value = 2;
3413 break;
3414
3415 case GE:
3416 PUT_CODE (cond, GEU);
3417 value = 2;
3418 break;
3419
3420 default:
3421 break;
3422 }
3423
3424 return value;
3425 }
3426 #endif
3427 \f
3428 /* Report inconsistency between the assembler template and the operands.
3429 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3430
3431 void
3432 output_operand_lossage (const char *cmsgid, ...)
3433 {
3434 char *fmt_string;
3435 char *new_message;
3436 const char *pfx_str;
3437 va_list ap;
3438
3439 va_start (ap, cmsgid);
3440
3441 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3442 fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid));
3443 new_message = xvasprintf (fmt_string, ap);
3444
3445 if (this_is_asm_operands)
3446 error_for_asm (this_is_asm_operands, "%s", new_message);
3447 else
3448 internal_error ("%s", new_message);
3449
3450 free (fmt_string);
3451 free (new_message);
3452 va_end (ap);
3453 }
3454 \f
3455 /* Output of assembler code from a template, and its subroutines. */
3456
3457 /* Annotate the assembly with a comment describing the pattern and
3458 alternative used. */
3459
3460 static void
3461 output_asm_name (void)
3462 {
3463 if (debug_insn)
3464 {
3465 int num = INSN_CODE (debug_insn);
3466 fprintf (asm_out_file, "\t%s %d\t%s",
3467 ASM_COMMENT_START, INSN_UID (debug_insn),
3468 insn_data[num].name);
3469 if (insn_data[num].n_alternatives > 1)
3470 fprintf (asm_out_file, "/%d", which_alternative + 1);
3471
3472 if (HAVE_ATTR_length)
3473 fprintf (asm_out_file, "\t[length = %d]",
3474 get_attr_length (debug_insn));
3475
3476 /* Clear this so only the first assembler insn
3477 of any rtl insn will get the special comment for -dp. */
3478 debug_insn = 0;
3479 }
3480 }
3481
3482 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3483 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3484 corresponds to the address of the object and 0 if to the object. */
3485
3486 static tree
3487 get_mem_expr_from_op (rtx op, int *paddressp)
3488 {
3489 tree expr;
3490 int inner_addressp;
3491
3492 *paddressp = 0;
3493
3494 if (REG_P (op))
3495 return REG_EXPR (op);
3496 else if (!MEM_P (op))
3497 return 0;
3498
3499 if (MEM_EXPR (op) != 0)
3500 return MEM_EXPR (op);
3501
3502 /* Otherwise we have an address, so indicate it and look at the address. */
3503 *paddressp = 1;
3504 op = XEXP (op, 0);
3505
3506 /* First check if we have a decl for the address, then look at the right side
3507 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3508 But don't allow the address to itself be indirect. */
3509 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3510 return expr;
3511 else if (GET_CODE (op) == PLUS
3512 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3513 return expr;
3514
3515 while (UNARY_P (op)
3516 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3517 op = XEXP (op, 0);
3518
3519 expr = get_mem_expr_from_op (op, &inner_addressp);
3520 return inner_addressp ? 0 : expr;
3521 }
3522
3523 /* Output operand names for assembler instructions. OPERANDS is the
3524 operand vector, OPORDER is the order to write the operands, and NOPS
3525 is the number of operands to write. */
3526
3527 static void
3528 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3529 {
3530 int wrote = 0;
3531 int i;
3532
3533 for (i = 0; i < nops; i++)
3534 {
3535 int addressp;
3536 rtx op = operands[oporder[i]];
3537 tree expr = get_mem_expr_from_op (op, &addressp);
3538
3539 fprintf (asm_out_file, "%c%s",
3540 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3541 wrote = 1;
3542 if (expr)
3543 {
3544 fprintf (asm_out_file, "%s",
3545 addressp ? "*" : "");
3546 print_mem_expr (asm_out_file, expr);
3547 wrote = 1;
3548 }
3549 else if (REG_P (op) && ORIGINAL_REGNO (op)
3550 && ORIGINAL_REGNO (op) != REGNO (op))
3551 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3552 }
3553 }
3554
3555 #ifdef ASSEMBLER_DIALECT
3556 /* Helper function to parse assembler dialects in the asm string.
3557 This is called from output_asm_insn and asm_fprintf. */
3558 static const char *
3559 do_assembler_dialects (const char *p, int *dialect)
3560 {
3561 char c = *(p - 1);
3562
3563 switch (c)
3564 {
3565 case '{':
3566 {
3567 int i;
3568
3569 if (*dialect)
3570 output_operand_lossage ("nested assembly dialect alternatives");
3571 else
3572 *dialect = 1;
3573
3574 /* If we want the first dialect, do nothing. Otherwise, skip
3575 DIALECT_NUMBER of strings ending with '|'. */
3576 for (i = 0; i < dialect_number; i++)
3577 {
3578 while (*p && *p != '}')
3579 {
3580 if (*p == '|')
3581 {
3582 p++;
3583 break;
3584 }
3585
3586 /* Skip over any character after a percent sign. */
3587 if (*p == '%')
3588 p++;
3589 if (*p)
3590 p++;
3591 }
3592
3593 if (*p == '}')
3594 break;
3595 }
3596
3597 if (*p == '\0')
3598 output_operand_lossage ("unterminated assembly dialect alternative");
3599 }
3600 break;
3601
3602 case '|':
3603 if (*dialect)
3604 {
3605 /* Skip to close brace. */
3606 do
3607 {
3608 if (*p == '\0')
3609 {
3610 output_operand_lossage ("unterminated assembly dialect alternative");
3611 break;
3612 }
3613
3614 /* Skip over any character after a percent sign. */
3615 if (*p == '%' && p[1])
3616 {
3617 p += 2;
3618 continue;
3619 }
3620
3621 if (*p++ == '}')
3622 break;
3623 }
3624 while (1);
3625
3626 *dialect = 0;
3627 }
3628 else
3629 putc (c, asm_out_file);
3630 break;
3631
3632 case '}':
3633 if (! *dialect)
3634 putc (c, asm_out_file);
3635 *dialect = 0;
3636 break;
3637 default:
3638 gcc_unreachable ();
3639 }
3640
3641 return p;
3642 }
3643 #endif
3644
3645 /* Output text from TEMPLATE to the assembler output file,
3646 obeying %-directions to substitute operands taken from
3647 the vector OPERANDS.
3648
3649 %N (for N a digit) means print operand N in usual manner.
3650 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3651 and print the label name with no punctuation.
3652 %cN means require operand N to be a constant
3653 and print the constant expression with no punctuation.
3654 %aN means expect operand N to be a memory address
3655 (not a memory reference!) and print a reference
3656 to that address.
3657 %nN means expect operand N to be a constant
3658 and print a constant expression for minus the value
3659 of the operand, with no other punctuation. */
3660
3661 void
3662 output_asm_insn (const char *templ, rtx *operands)
3663 {
3664 const char *p;
3665 int c;
3666 #ifdef ASSEMBLER_DIALECT
3667 int dialect = 0;
3668 #endif
3669 int oporder[MAX_RECOG_OPERANDS];
3670 char opoutput[MAX_RECOG_OPERANDS];
3671 int ops = 0;
3672
3673 /* An insn may return a null string template
3674 in a case where no assembler code is needed. */
3675 if (*templ == 0)
3676 return;
3677
3678 memset (opoutput, 0, sizeof opoutput);
3679 p = templ;
3680 putc ('\t', asm_out_file);
3681
3682 #ifdef ASM_OUTPUT_OPCODE
3683 ASM_OUTPUT_OPCODE (asm_out_file, p);
3684 #endif
3685
3686 while ((c = *p++))
3687 switch (c)
3688 {
3689 case '\n':
3690 if (flag_verbose_asm)
3691 output_asm_operand_names (operands, oporder, ops);
3692 if (flag_print_asm_name)
3693 output_asm_name ();
3694
3695 ops = 0;
3696 memset (opoutput, 0, sizeof opoutput);
3697
3698 putc (c, asm_out_file);
3699 #ifdef ASM_OUTPUT_OPCODE
3700 while ((c = *p) == '\t')
3701 {
3702 putc (c, asm_out_file);
3703 p++;
3704 }
3705 ASM_OUTPUT_OPCODE (asm_out_file, p);
3706 #endif
3707 break;
3708
3709 #ifdef ASSEMBLER_DIALECT
3710 case '{':
3711 case '}':
3712 case '|':
3713 p = do_assembler_dialects (p, &dialect);
3714 break;
3715 #endif
3716
3717 case '%':
3718 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3719 if ASSEMBLER_DIALECT defined and these characters have a special
3720 meaning as dialect delimiters.*/
3721 if (*p == '%'
3722 #ifdef ASSEMBLER_DIALECT
3723 || *p == '{' || *p == '}' || *p == '|'
3724 #endif
3725 )
3726 {
3727 putc (*p, asm_out_file);
3728 p++;
3729 }
3730 /* %= outputs a number which is unique to each insn in the entire
3731 compilation. This is useful for making local labels that are
3732 referred to more than once in a given insn. */
3733 else if (*p == '=')
3734 {
3735 p++;
3736 fprintf (asm_out_file, "%d", insn_counter);
3737 }
3738 /* % followed by a letter and some digits
3739 outputs an operand in a special way depending on the letter.
3740 Letters `acln' are implemented directly.
3741 Other letters are passed to `output_operand' so that
3742 the TARGET_PRINT_OPERAND hook can define them. */
3743 else if (ISALPHA (*p))
3744 {
3745 int letter = *p++;
3746 unsigned long opnum;
3747 char *endptr;
3748
3749 opnum = strtoul (p, &endptr, 10);
3750
3751 if (endptr == p)
3752 output_operand_lossage ("operand number missing "
3753 "after %%-letter");
3754 else if (this_is_asm_operands && opnum >= insn_noperands)
3755 output_operand_lossage ("operand number out of range");
3756 else if (letter == 'l')
3757 output_asm_label (operands[opnum]);
3758 else if (letter == 'a')
3759 output_address (VOIDmode, operands[opnum]);
3760 else if (letter == 'c')
3761 {
3762 if (CONSTANT_ADDRESS_P (operands[opnum]))
3763 output_addr_const (asm_out_file, operands[opnum]);
3764 else
3765 output_operand (operands[opnum], 'c');
3766 }
3767 else if (letter == 'n')
3768 {
3769 if (CONST_INT_P (operands[opnum]))
3770 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3771 - INTVAL (operands[opnum]));
3772 else
3773 {
3774 putc ('-', asm_out_file);
3775 output_addr_const (asm_out_file, operands[opnum]);
3776 }
3777 }
3778 else
3779 output_operand (operands[opnum], letter);
3780
3781 if (!opoutput[opnum])
3782 oporder[ops++] = opnum;
3783 opoutput[opnum] = 1;
3784
3785 p = endptr;
3786 c = *p;
3787 }
3788 /* % followed by a digit outputs an operand the default way. */
3789 else if (ISDIGIT (*p))
3790 {
3791 unsigned long opnum;
3792 char *endptr;
3793
3794 opnum = strtoul (p, &endptr, 10);
3795 if (this_is_asm_operands && opnum >= insn_noperands)
3796 output_operand_lossage ("operand number out of range");
3797 else
3798 output_operand (operands[opnum], 0);
3799
3800 if (!opoutput[opnum])
3801 oporder[ops++] = opnum;
3802 opoutput[opnum] = 1;
3803
3804 p = endptr;
3805 c = *p;
3806 }
3807 /* % followed by punctuation: output something for that
3808 punctuation character alone, with no operand. The
3809 TARGET_PRINT_OPERAND hook decides what is actually done. */
3810 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3811 output_operand (NULL_RTX, *p++);
3812 else
3813 output_operand_lossage ("invalid %%-code");
3814 break;
3815
3816 default:
3817 putc (c, asm_out_file);
3818 }
3819
3820 /* Write out the variable names for operands, if we know them. */
3821 if (flag_verbose_asm)
3822 output_asm_operand_names (operands, oporder, ops);
3823 if (flag_print_asm_name)
3824 output_asm_name ();
3825
3826 putc ('\n', asm_out_file);
3827 }
3828 \f
3829 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3830
3831 void
3832 output_asm_label (rtx x)
3833 {
3834 char buf[256];
3835
3836 if (GET_CODE (x) == LABEL_REF)
3837 x = label_ref_label (x);
3838 if (LABEL_P (x)
3839 || (NOTE_P (x)
3840 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3841 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3842 else
3843 output_operand_lossage ("'%%l' operand isn't a label");
3844
3845 assemble_name (asm_out_file, buf);
3846 }
3847
3848 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3849
3850 void
3851 mark_symbol_refs_as_used (rtx x)
3852 {
3853 subrtx_iterator::array_type array;
3854 FOR_EACH_SUBRTX (iter, array, x, ALL)
3855 {
3856 const_rtx x = *iter;
3857 if (GET_CODE (x) == SYMBOL_REF)
3858 if (tree t = SYMBOL_REF_DECL (x))
3859 assemble_external (t);
3860 }
3861 }
3862
3863 /* Print operand X using machine-dependent assembler syntax.
3864 CODE is a non-digit that preceded the operand-number in the % spec,
3865 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3866 between the % and the digits.
3867 When CODE is a non-letter, X is 0.
3868
3869 The meanings of the letters are machine-dependent and controlled
3870 by TARGET_PRINT_OPERAND. */
3871
3872 void
3873 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3874 {
3875 if (x && GET_CODE (x) == SUBREG)
3876 x = alter_subreg (&x, true);
3877
3878 /* X must not be a pseudo reg. */
3879 if (!targetm.no_register_allocation)
3880 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3881
3882 targetm.asm_out.print_operand (asm_out_file, x, code);
3883
3884 if (x == NULL_RTX)
3885 return;
3886
3887 mark_symbol_refs_as_used (x);
3888 }
3889
3890 /* Print a memory reference operand for address X using
3891 machine-dependent assembler syntax. */
3892
3893 void
3894 output_address (machine_mode mode, rtx x)
3895 {
3896 bool changed = false;
3897 walk_alter_subreg (&x, &changed);
3898 targetm.asm_out.print_operand_address (asm_out_file, mode, x);
3899 }
3900 \f
3901 /* Print an integer constant expression in assembler syntax.
3902 Addition and subtraction are the only arithmetic
3903 that may appear in these expressions. */
3904
3905 void
3906 output_addr_const (FILE *file, rtx x)
3907 {
3908 char buf[256];
3909
3910 restart:
3911 switch (GET_CODE (x))
3912 {
3913 case PC:
3914 putc ('.', file);
3915 break;
3916
3917 case SYMBOL_REF:
3918 if (SYMBOL_REF_DECL (x))
3919 assemble_external (SYMBOL_REF_DECL (x));
3920 #ifdef ASM_OUTPUT_SYMBOL_REF
3921 ASM_OUTPUT_SYMBOL_REF (file, x);
3922 #else
3923 assemble_name (file, XSTR (x, 0));
3924 #endif
3925 break;
3926
3927 case LABEL_REF:
3928 x = label_ref_label (x);
3929 /* Fall through. */
3930 case CODE_LABEL:
3931 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3932 #ifdef ASM_OUTPUT_LABEL_REF
3933 ASM_OUTPUT_LABEL_REF (file, buf);
3934 #else
3935 assemble_name (file, buf);
3936 #endif
3937 break;
3938
3939 case CONST_INT:
3940 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3941 break;
3942
3943 case CONST:
3944 /* This used to output parentheses around the expression,
3945 but that does not work on the 386 (either ATT or BSD assembler). */
3946 output_addr_const (file, XEXP (x, 0));
3947 break;
3948
3949 case CONST_WIDE_INT:
3950 /* We do not know the mode here so we have to use a round about
3951 way to build a wide-int to get it printed properly. */
3952 {
3953 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
3954 CONST_WIDE_INT_NUNITS (x),
3955 CONST_WIDE_INT_NUNITS (x)
3956 * HOST_BITS_PER_WIDE_INT,
3957 false);
3958 print_decs (w, file);
3959 }
3960 break;
3961
3962 case CONST_DOUBLE:
3963 if (CONST_DOUBLE_AS_INT_P (x))
3964 {
3965 /* We can use %d if the number is one word and positive. */
3966 if (CONST_DOUBLE_HIGH (x))
3967 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3968 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3969 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3970 else if (CONST_DOUBLE_LOW (x) < 0)
3971 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3972 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3973 else
3974 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3975 }
3976 else
3977 /* We can't handle floating point constants;
3978 PRINT_OPERAND must handle them. */
3979 output_operand_lossage ("floating constant misused");
3980 break;
3981
3982 case CONST_FIXED:
3983 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3984 break;
3985
3986 case PLUS:
3987 /* Some assemblers need integer constants to appear last (eg masm). */
3988 if (CONST_INT_P (XEXP (x, 0)))
3989 {
3990 output_addr_const (file, XEXP (x, 1));
3991 if (INTVAL (XEXP (x, 0)) >= 0)
3992 fprintf (file, "+");
3993 output_addr_const (file, XEXP (x, 0));
3994 }
3995 else
3996 {
3997 output_addr_const (file, XEXP (x, 0));
3998 if (!CONST_INT_P (XEXP (x, 1))
3999 || INTVAL (XEXP (x, 1)) >= 0)
4000 fprintf (file, "+");
4001 output_addr_const (file, XEXP (x, 1));
4002 }
4003 break;
4004
4005 case MINUS:
4006 /* Avoid outputting things like x-x or x+5-x,
4007 since some assemblers can't handle that. */
4008 x = simplify_subtraction (x);
4009 if (GET_CODE (x) != MINUS)
4010 goto restart;
4011
4012 output_addr_const (file, XEXP (x, 0));
4013 fprintf (file, "-");
4014 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
4015 || GET_CODE (XEXP (x, 1)) == PC
4016 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
4017 output_addr_const (file, XEXP (x, 1));
4018 else
4019 {
4020 fputs (targetm.asm_out.open_paren, file);
4021 output_addr_const (file, XEXP (x, 1));
4022 fputs (targetm.asm_out.close_paren, file);
4023 }
4024 break;
4025
4026 case ZERO_EXTEND:
4027 case SIGN_EXTEND:
4028 case SUBREG:
4029 case TRUNCATE:
4030 output_addr_const (file, XEXP (x, 0));
4031 break;
4032
4033 default:
4034 if (targetm.asm_out.output_addr_const_extra (file, x))
4035 break;
4036
4037 output_operand_lossage ("invalid expression as operand");
4038 }
4039 }
4040 \f
4041 /* Output a quoted string. */
4042
4043 void
4044 output_quoted_string (FILE *asm_file, const char *string)
4045 {
4046 #ifdef OUTPUT_QUOTED_STRING
4047 OUTPUT_QUOTED_STRING (asm_file, string);
4048 #else
4049 char c;
4050
4051 putc ('\"', asm_file);
4052 while ((c = *string++) != 0)
4053 {
4054 if (ISPRINT (c))
4055 {
4056 if (c == '\"' || c == '\\')
4057 putc ('\\', asm_file);
4058 putc (c, asm_file);
4059 }
4060 else
4061 fprintf (asm_file, "\\%03o", (unsigned char) c);
4062 }
4063 putc ('\"', asm_file);
4064 #endif
4065 }
4066 \f
4067 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4068
4069 void
4070 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4071 {
4072 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4073 if (value == 0)
4074 putc ('0', f);
4075 else
4076 {
4077 char *p = buf + sizeof (buf);
4078 do
4079 *--p = "0123456789abcdef"[value % 16];
4080 while ((value /= 16) != 0);
4081 *--p = 'x';
4082 *--p = '0';
4083 fwrite (p, 1, buf + sizeof (buf) - p, f);
4084 }
4085 }
4086
4087 /* Internal function that prints an unsigned long in decimal in reverse.
4088 The output string IS NOT null-terminated. */
4089
4090 static int
4091 sprint_ul_rev (char *s, unsigned long value)
4092 {
4093 int i = 0;
4094 do
4095 {
4096 s[i] = "0123456789"[value % 10];
4097 value /= 10;
4098 i++;
4099 /* alternate version, without modulo */
4100 /* oldval = value; */
4101 /* value /= 10; */
4102 /* s[i] = "0123456789" [oldval - 10*value]; */
4103 /* i++ */
4104 }
4105 while (value != 0);
4106 return i;
4107 }
4108
4109 /* Write an unsigned long as decimal to a file, fast. */
4110
4111 void
4112 fprint_ul (FILE *f, unsigned long value)
4113 {
4114 /* python says: len(str(2**64)) == 20 */
4115 char s[20];
4116 int i;
4117
4118 i = sprint_ul_rev (s, value);
4119
4120 /* It's probably too small to bother with string reversal and fputs. */
4121 do
4122 {
4123 i--;
4124 putc (s[i], f);
4125 }
4126 while (i != 0);
4127 }
4128
4129 /* Write an unsigned long as decimal to a string, fast.
4130 s must be wide enough to not overflow, at least 21 chars.
4131 Returns the length of the string (without terminating '\0'). */
4132
4133 int
4134 sprint_ul (char *s, unsigned long value)
4135 {
4136 int len = sprint_ul_rev (s, value);
4137 s[len] = '\0';
4138
4139 std::reverse (s, s + len);
4140 return len;
4141 }
4142
4143 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4144 %R prints the value of REGISTER_PREFIX.
4145 %L prints the value of LOCAL_LABEL_PREFIX.
4146 %U prints the value of USER_LABEL_PREFIX.
4147 %I prints the value of IMMEDIATE_PREFIX.
4148 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4149 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4150
4151 We handle alternate assembler dialects here, just like output_asm_insn. */
4152
4153 void
4154 asm_fprintf (FILE *file, const char *p, ...)
4155 {
4156 char buf[10];
4157 char *q, c;
4158 #ifdef ASSEMBLER_DIALECT
4159 int dialect = 0;
4160 #endif
4161 va_list argptr;
4162
4163 va_start (argptr, p);
4164
4165 buf[0] = '%';
4166
4167 while ((c = *p++))
4168 switch (c)
4169 {
4170 #ifdef ASSEMBLER_DIALECT
4171 case '{':
4172 case '}':
4173 case '|':
4174 p = do_assembler_dialects (p, &dialect);
4175 break;
4176 #endif
4177
4178 case '%':
4179 c = *p++;
4180 q = &buf[1];
4181 while (strchr ("-+ #0", c))
4182 {
4183 *q++ = c;
4184 c = *p++;
4185 }
4186 while (ISDIGIT (c) || c == '.')
4187 {
4188 *q++ = c;
4189 c = *p++;
4190 }
4191 switch (c)
4192 {
4193 case '%':
4194 putc ('%', file);
4195 break;
4196
4197 case 'd': case 'i': case 'u':
4198 case 'x': case 'X': case 'o':
4199 case 'c':
4200 *q++ = c;
4201 *q = 0;
4202 fprintf (file, buf, va_arg (argptr, int));
4203 break;
4204
4205 case 'w':
4206 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4207 'o' cases, but we do not check for those cases. It
4208 means that the value is a HOST_WIDE_INT, which may be
4209 either `long' or `long long'. */
4210 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4211 q += strlen (HOST_WIDE_INT_PRINT);
4212 *q++ = *p++;
4213 *q = 0;
4214 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4215 break;
4216
4217 case 'l':
4218 *q++ = c;
4219 #ifdef HAVE_LONG_LONG
4220 if (*p == 'l')
4221 {
4222 *q++ = *p++;
4223 *q++ = *p++;
4224 *q = 0;
4225 fprintf (file, buf, va_arg (argptr, long long));
4226 }
4227 else
4228 #endif
4229 {
4230 *q++ = *p++;
4231 *q = 0;
4232 fprintf (file, buf, va_arg (argptr, long));
4233 }
4234
4235 break;
4236
4237 case 's':
4238 *q++ = c;
4239 *q = 0;
4240 fprintf (file, buf, va_arg (argptr, char *));
4241 break;
4242
4243 case 'O':
4244 #ifdef ASM_OUTPUT_OPCODE
4245 ASM_OUTPUT_OPCODE (asm_out_file, p);
4246 #endif
4247 break;
4248
4249 case 'R':
4250 #ifdef REGISTER_PREFIX
4251 fprintf (file, "%s", REGISTER_PREFIX);
4252 #endif
4253 break;
4254
4255 case 'I':
4256 #ifdef IMMEDIATE_PREFIX
4257 fprintf (file, "%s", IMMEDIATE_PREFIX);
4258 #endif
4259 break;
4260
4261 case 'L':
4262 #ifdef LOCAL_LABEL_PREFIX
4263 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4264 #endif
4265 break;
4266
4267 case 'U':
4268 fputs (user_label_prefix, file);
4269 break;
4270
4271 #ifdef ASM_FPRINTF_EXTENSIONS
4272 /* Uppercase letters are reserved for general use by asm_fprintf
4273 and so are not available to target specific code. In order to
4274 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4275 they are defined here. As they get turned into real extensions
4276 to asm_fprintf they should be removed from this list. */
4277 case 'A': case 'B': case 'C': case 'D': case 'E':
4278 case 'F': case 'G': case 'H': case 'J': case 'K':
4279 case 'M': case 'N': case 'P': case 'Q': case 'S':
4280 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4281 break;
4282
4283 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4284 #endif
4285 default:
4286 gcc_unreachable ();
4287 }
4288 break;
4289
4290 default:
4291 putc (c, file);
4292 }
4293 va_end (argptr);
4294 }
4295 \f
4296 /* Return nonzero if this function has no function calls. */
4297
4298 int
4299 leaf_function_p (void)
4300 {
4301 rtx_insn *insn;
4302
4303 /* Ensure we walk the entire function body. */
4304 gcc_assert (!in_sequence_p ());
4305
4306 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4307 functions even if they call mcount. */
4308 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
4309 return 0;
4310
4311 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4312 {
4313 if (CALL_P (insn)
4314 && ! SIBLING_CALL_P (insn))
4315 return 0;
4316 if (NONJUMP_INSN_P (insn)
4317 && GET_CODE (PATTERN (insn)) == SEQUENCE
4318 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4319 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4320 return 0;
4321 }
4322
4323 return 1;
4324 }
4325
4326 /* Return 1 if branch is a forward branch.
4327 Uses insn_shuid array, so it works only in the final pass. May be used by
4328 output templates to customary add branch prediction hints.
4329 */
4330 int
4331 final_forward_branch_p (rtx_insn *insn)
4332 {
4333 int insn_id, label_id;
4334
4335 gcc_assert (uid_shuid);
4336 insn_id = INSN_SHUID (insn);
4337 label_id = INSN_SHUID (JUMP_LABEL (insn));
4338 /* We've hit some insns that does not have id information available. */
4339 gcc_assert (insn_id && label_id);
4340 return insn_id < label_id;
4341 }
4342
4343 /* On some machines, a function with no call insns
4344 can run faster if it doesn't create its own register window.
4345 When output, the leaf function should use only the "output"
4346 registers. Ordinarily, the function would be compiled to use
4347 the "input" registers to find its arguments; it is a candidate
4348 for leaf treatment if it uses only the "input" registers.
4349 Leaf function treatment means renumbering so the function
4350 uses the "output" registers instead. */
4351
4352 #ifdef LEAF_REGISTERS
4353
4354 /* Return 1 if this function uses only the registers that can be
4355 safely renumbered. */
4356
4357 int
4358 only_leaf_regs_used (void)
4359 {
4360 int i;
4361 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4362
4363 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4364 if ((df_regs_ever_live_p (i) || global_regs[i])
4365 && ! permitted_reg_in_leaf_functions[i])
4366 return 0;
4367
4368 if (crtl->uses_pic_offset_table
4369 && pic_offset_table_rtx != 0
4370 && REG_P (pic_offset_table_rtx)
4371 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4372 return 0;
4373
4374 return 1;
4375 }
4376
4377 /* Scan all instructions and renumber all registers into those
4378 available in leaf functions. */
4379
4380 static void
4381 leaf_renumber_regs (rtx_insn *first)
4382 {
4383 rtx_insn *insn;
4384
4385 /* Renumber only the actual patterns.
4386 The reg-notes can contain frame pointer refs,
4387 and renumbering them could crash, and should not be needed. */
4388 for (insn = first; insn; insn = NEXT_INSN (insn))
4389 if (INSN_P (insn))
4390 leaf_renumber_regs_insn (PATTERN (insn));
4391 }
4392
4393 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4394 available in leaf functions. */
4395
4396 void
4397 leaf_renumber_regs_insn (rtx in_rtx)
4398 {
4399 int i, j;
4400 const char *format_ptr;
4401
4402 if (in_rtx == 0)
4403 return;
4404
4405 /* Renumber all input-registers into output-registers.
4406 renumbered_regs would be 1 for an output-register;
4407 they */
4408
4409 if (REG_P (in_rtx))
4410 {
4411 int newreg;
4412
4413 /* Don't renumber the same reg twice. */
4414 if (in_rtx->used)
4415 return;
4416
4417 newreg = REGNO (in_rtx);
4418 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4419 to reach here as part of a REG_NOTE. */
4420 if (newreg >= FIRST_PSEUDO_REGISTER)
4421 {
4422 in_rtx->used = 1;
4423 return;
4424 }
4425 newreg = LEAF_REG_REMAP (newreg);
4426 gcc_assert (newreg >= 0);
4427 df_set_regs_ever_live (REGNO (in_rtx), false);
4428 df_set_regs_ever_live (newreg, true);
4429 SET_REGNO (in_rtx, newreg);
4430 in_rtx->used = 1;
4431 return;
4432 }
4433
4434 if (INSN_P (in_rtx))
4435 {
4436 /* Inside a SEQUENCE, we find insns.
4437 Renumber just the patterns of these insns,
4438 just as we do for the top-level insns. */
4439 leaf_renumber_regs_insn (PATTERN (in_rtx));
4440 return;
4441 }
4442
4443 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4444
4445 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4446 switch (*format_ptr++)
4447 {
4448 case 'e':
4449 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4450 break;
4451
4452 case 'E':
4453 if (NULL != XVEC (in_rtx, i))
4454 {
4455 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4456 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4457 }
4458 break;
4459
4460 case 'S':
4461 case 's':
4462 case '0':
4463 case 'i':
4464 case 'w':
4465 case 'n':
4466 case 'u':
4467 break;
4468
4469 default:
4470 gcc_unreachable ();
4471 }
4472 }
4473 #endif
4474 \f
4475 /* Turn the RTL into assembly. */
4476 static unsigned int
4477 rest_of_handle_final (void)
4478 {
4479 const char *fnname = get_fnname_from_decl (current_function_decl);
4480
4481 assemble_start_function (current_function_decl, fnname);
4482 final_start_function (get_insns (), asm_out_file, optimize);
4483 final (get_insns (), asm_out_file, optimize);
4484 if (flag_ipa_ra
4485 && !lookup_attribute ("noipa", DECL_ATTRIBUTES (current_function_decl)))
4486 collect_fn_hard_reg_usage ();
4487 final_end_function ();
4488
4489 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4490 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4491 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4492 output_function_exception_table (fnname);
4493
4494 assemble_end_function (current_function_decl, fnname);
4495
4496 /* Free up reg info memory. */
4497 free_reg_info ();
4498
4499 if (! quiet_flag)
4500 fflush (asm_out_file);
4501
4502 /* Write DBX symbols if requested. */
4503
4504 /* Note that for those inline functions where we don't initially
4505 know for certain that we will be generating an out-of-line copy,
4506 the first invocation of this routine (rest_of_compilation) will
4507 skip over this code by doing a `goto exit_rest_of_compilation;'.
4508 Later on, wrapup_global_declarations will (indirectly) call
4509 rest_of_compilation again for those inline functions that need
4510 to have out-of-line copies generated. During that call, we
4511 *will* be routed past here. */
4512
4513 timevar_push (TV_SYMOUT);
4514 if (!DECL_IGNORED_P (current_function_decl))
4515 debug_hooks->function_decl (current_function_decl);
4516 timevar_pop (TV_SYMOUT);
4517
4518 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4519 DECL_INITIAL (current_function_decl) = error_mark_node;
4520
4521 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4522 && targetm.have_ctors_dtors)
4523 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4524 decl_init_priority_lookup
4525 (current_function_decl));
4526 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4527 && targetm.have_ctors_dtors)
4528 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4529 decl_fini_priority_lookup
4530 (current_function_decl));
4531 return 0;
4532 }
4533
4534 namespace {
4535
4536 const pass_data pass_data_final =
4537 {
4538 RTL_PASS, /* type */
4539 "final", /* name */
4540 OPTGROUP_NONE, /* optinfo_flags */
4541 TV_FINAL, /* tv_id */
4542 0, /* properties_required */
4543 0, /* properties_provided */
4544 0, /* properties_destroyed */
4545 0, /* todo_flags_start */
4546 0, /* todo_flags_finish */
4547 };
4548
4549 class pass_final : public rtl_opt_pass
4550 {
4551 public:
4552 pass_final (gcc::context *ctxt)
4553 : rtl_opt_pass (pass_data_final, ctxt)
4554 {}
4555
4556 /* opt_pass methods: */
4557 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
4558
4559 }; // class pass_final
4560
4561 } // anon namespace
4562
4563 rtl_opt_pass *
4564 make_pass_final (gcc::context *ctxt)
4565 {
4566 return new pass_final (ctxt);
4567 }
4568
4569
4570 static unsigned int
4571 rest_of_handle_shorten_branches (void)
4572 {
4573 /* Shorten branches. */
4574 shorten_branches (get_insns ());
4575 return 0;
4576 }
4577
4578 namespace {
4579
4580 const pass_data pass_data_shorten_branches =
4581 {
4582 RTL_PASS, /* type */
4583 "shorten", /* name */
4584 OPTGROUP_NONE, /* optinfo_flags */
4585 TV_SHORTEN_BRANCH, /* tv_id */
4586 0, /* properties_required */
4587 0, /* properties_provided */
4588 0, /* properties_destroyed */
4589 0, /* todo_flags_start */
4590 0, /* todo_flags_finish */
4591 };
4592
4593 class pass_shorten_branches : public rtl_opt_pass
4594 {
4595 public:
4596 pass_shorten_branches (gcc::context *ctxt)
4597 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
4598 {}
4599
4600 /* opt_pass methods: */
4601 virtual unsigned int execute (function *)
4602 {
4603 return rest_of_handle_shorten_branches ();
4604 }
4605
4606 }; // class pass_shorten_branches
4607
4608 } // anon namespace
4609
4610 rtl_opt_pass *
4611 make_pass_shorten_branches (gcc::context *ctxt)
4612 {
4613 return new pass_shorten_branches (ctxt);
4614 }
4615
4616
4617 static unsigned int
4618 rest_of_clean_state (void)
4619 {
4620 rtx_insn *insn, *next;
4621 FILE *final_output = NULL;
4622 int save_unnumbered = flag_dump_unnumbered;
4623 int save_noaddr = flag_dump_noaddr;
4624
4625 if (flag_dump_final_insns)
4626 {
4627 final_output = fopen (flag_dump_final_insns, "a");
4628 if (!final_output)
4629 {
4630 error ("could not open final insn dump file %qs: %m",
4631 flag_dump_final_insns);
4632 flag_dump_final_insns = NULL;
4633 }
4634 else
4635 {
4636 flag_dump_noaddr = flag_dump_unnumbered = 1;
4637 if (flag_compare_debug_opt || flag_compare_debug)
4638 dump_flags |= TDF_NOUID | TDF_COMPARE_DEBUG;
4639 dump_function_header (final_output, current_function_decl,
4640 dump_flags);
4641 final_insns_dump_p = true;
4642
4643 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4644 if (LABEL_P (insn))
4645 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4646 else
4647 {
4648 if (NOTE_P (insn))
4649 set_block_for_insn (insn, NULL);
4650 INSN_UID (insn) = 0;
4651 }
4652 }
4653 }
4654
4655 /* It is very important to decompose the RTL instruction chain here:
4656 debug information keeps pointing into CODE_LABEL insns inside the function
4657 body. If these remain pointing to the other insns, we end up preserving
4658 whole RTL chain and attached detailed debug info in memory. */
4659 for (insn = get_insns (); insn; insn = next)
4660 {
4661 next = NEXT_INSN (insn);
4662 SET_NEXT_INSN (insn) = NULL;
4663 SET_PREV_INSN (insn) = NULL;
4664
4665 if (final_output
4666 && (!NOTE_P (insn) ||
4667 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4668 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4669 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4670 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4671 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4672 print_rtl_single (final_output, insn);
4673 }
4674
4675 if (final_output)
4676 {
4677 flag_dump_noaddr = save_noaddr;
4678 flag_dump_unnumbered = save_unnumbered;
4679 final_insns_dump_p = false;
4680
4681 if (fclose (final_output))
4682 {
4683 error ("could not close final insn dump file %qs: %m",
4684 flag_dump_final_insns);
4685 flag_dump_final_insns = NULL;
4686 }
4687 }
4688
4689 flag_rerun_cse_after_global_opts = 0;
4690 reload_completed = 0;
4691 epilogue_completed = 0;
4692 #ifdef STACK_REGS
4693 regstack_completed = 0;
4694 #endif
4695
4696 /* Clear out the insn_length contents now that they are no
4697 longer valid. */
4698 init_insn_lengths ();
4699
4700 /* Show no temporary slots allocated. */
4701 init_temp_slots ();
4702
4703 free_bb_for_insn ();
4704
4705 if (cfun->gimple_df)
4706 delete_tree_ssa (cfun);
4707
4708 /* We can reduce stack alignment on call site only when we are sure that
4709 the function body just produced will be actually used in the final
4710 executable. */
4711 if (decl_binds_to_current_def_p (current_function_decl))
4712 {
4713 unsigned int pref = crtl->preferred_stack_boundary;
4714 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4715 pref = crtl->stack_alignment_needed;
4716 cgraph_node::rtl_info (current_function_decl)
4717 ->preferred_incoming_stack_boundary = pref;
4718 }
4719
4720 /* Make sure volatile mem refs aren't considered valid operands for
4721 arithmetic insns. We must call this here if this is a nested inline
4722 function, since the above code leaves us in the init_recog state,
4723 and the function context push/pop code does not save/restore volatile_ok.
4724
4725 ??? Maybe it isn't necessary for expand_start_function to call this
4726 anymore if we do it here? */
4727
4728 init_recog_no_volatile ();
4729
4730 /* We're done with this function. Free up memory if we can. */
4731 free_after_parsing (cfun);
4732 free_after_compilation (cfun);
4733 return 0;
4734 }
4735
4736 namespace {
4737
4738 const pass_data pass_data_clean_state =
4739 {
4740 RTL_PASS, /* type */
4741 "*clean_state", /* name */
4742 OPTGROUP_NONE, /* optinfo_flags */
4743 TV_FINAL, /* tv_id */
4744 0, /* properties_required */
4745 0, /* properties_provided */
4746 PROP_rtl, /* properties_destroyed */
4747 0, /* todo_flags_start */
4748 0, /* todo_flags_finish */
4749 };
4750
4751 class pass_clean_state : public rtl_opt_pass
4752 {
4753 public:
4754 pass_clean_state (gcc::context *ctxt)
4755 : rtl_opt_pass (pass_data_clean_state, ctxt)
4756 {}
4757
4758 /* opt_pass methods: */
4759 virtual unsigned int execute (function *)
4760 {
4761 return rest_of_clean_state ();
4762 }
4763
4764 }; // class pass_clean_state
4765
4766 } // anon namespace
4767
4768 rtl_opt_pass *
4769 make_pass_clean_state (gcc::context *ctxt)
4770 {
4771 return new pass_clean_state (ctxt);
4772 }
4773
4774 /* Return true if INSN is a call to the current function. */
4775
4776 static bool
4777 self_recursive_call_p (rtx_insn *insn)
4778 {
4779 tree fndecl = get_call_fndecl (insn);
4780 return (fndecl == current_function_decl
4781 && decl_binds_to_current_def_p (fndecl));
4782 }
4783
4784 /* Collect hard register usage for the current function. */
4785
4786 static void
4787 collect_fn_hard_reg_usage (void)
4788 {
4789 rtx_insn *insn;
4790 #ifdef STACK_REGS
4791 int i;
4792 #endif
4793 struct cgraph_rtl_info *node;
4794 HARD_REG_SET function_used_regs;
4795
4796 /* ??? To be removed when all the ports have been fixed. */
4797 if (!targetm.call_fusage_contains_non_callee_clobbers)
4798 return;
4799
4800 CLEAR_HARD_REG_SET (function_used_regs);
4801
4802 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn))
4803 {
4804 HARD_REG_SET insn_used_regs;
4805
4806 if (!NONDEBUG_INSN_P (insn))
4807 continue;
4808
4809 if (CALL_P (insn)
4810 && !self_recursive_call_p (insn))
4811 {
4812 if (!get_call_reg_set_usage (insn, &insn_used_regs,
4813 call_used_reg_set))
4814 return;
4815
4816 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4817 }
4818
4819 find_all_hard_reg_sets (insn, &insn_used_regs, false);
4820 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4821 }
4822
4823 /* Be conservative - mark fixed and global registers as used. */
4824 IOR_HARD_REG_SET (function_used_regs, fixed_reg_set);
4825
4826 #ifdef STACK_REGS
4827 /* Handle STACK_REGS conservatively, since the df-framework does not
4828 provide accurate information for them. */
4829
4830 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
4831 SET_HARD_REG_BIT (function_used_regs, i);
4832 #endif
4833
4834 /* The information we have gathered is only interesting if it exposes a
4835 register from the call_used_regs that is not used in this function. */
4836 if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs))
4837 return;
4838
4839 node = cgraph_node::rtl_info (current_function_decl);
4840 gcc_assert (node != NULL);
4841
4842 COPY_HARD_REG_SET (node->function_used_regs, function_used_regs);
4843 node->function_used_regs_valid = 1;
4844 }
4845
4846 /* Get the declaration of the function called by INSN. */
4847
4848 static tree
4849 get_call_fndecl (rtx_insn *insn)
4850 {
4851 rtx note, datum;
4852
4853 note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX);
4854 if (note == NULL_RTX)
4855 return NULL_TREE;
4856
4857 datum = XEXP (note, 0);
4858 if (datum != NULL_RTX)
4859 return SYMBOL_REF_DECL (datum);
4860
4861 return NULL_TREE;
4862 }
4863
4864 /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for
4865 call targets that can be overwritten. */
4866
4867 static struct cgraph_rtl_info *
4868 get_call_cgraph_rtl_info (rtx_insn *insn)
4869 {
4870 tree fndecl;
4871
4872 if (insn == NULL_RTX)
4873 return NULL;
4874
4875 fndecl = get_call_fndecl (insn);
4876 if (fndecl == NULL_TREE
4877 || !decl_binds_to_current_def_p (fndecl))
4878 return NULL;
4879
4880 return cgraph_node::rtl_info (fndecl);
4881 }
4882
4883 /* Find hard registers used by function call instruction INSN, and return them
4884 in REG_SET. Return DEFAULT_SET in REG_SET if not found. */
4885
4886 bool
4887 get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
4888 HARD_REG_SET default_set)
4889 {
4890 if (flag_ipa_ra)
4891 {
4892 struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn);
4893 if (node != NULL
4894 && node->function_used_regs_valid)
4895 {
4896 COPY_HARD_REG_SET (*reg_set, node->function_used_regs);
4897 AND_HARD_REG_SET (*reg_set, default_set);
4898 return true;
4899 }
4900 }
4901
4902 COPY_HARD_REG_SET (*reg_set, default_set);
4903 return false;
4904 }