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1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This is the final pass of the compiler.
21 It looks at the rtl code for a function and outputs assembler code.
22
23 Call `final_start_function' to output the assembler code for function entry,
24 `final' to output assembler code for some RTL code,
25 `final_end_function' to output assembler code for function exit.
26 If a function is compiled in several pieces, each piece is
27 output separately with `final'.
28
29 Some optimizations are also done at this level.
30 Move instructions that were made unnecessary by good register allocation
31 are detected and omitted from the output. (Though most of these
32 are removed by the last jump pass.)
33
34 Instructions to set the condition codes are omitted when it can be
35 seen that the condition codes already had the desired values.
36
37 In some cases it is sufficient if the inherited condition codes
38 have related values, but this may require the following insn
39 (the one that tests the condition codes) to be modified.
40
41 The code for the function prologue and epilogue are generated
42 directly in assembler by the target functions function_prologue and
43 function_epilogue. Those instructions never exist as rtl. */
44
45 #include "config.h"
46 #include "system.h"
47 #include "coretypes.h"
48 #include "tm.h"
49 #include "alias.h"
50 #include "symtab.h"
51 #include "tree.h"
52 #include "varasm.h"
53 #include "hard-reg-set.h"
54 #include "rtl.h"
55 #include "tm_p.h"
56 #include "regs.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "output.h"
63 #include "except.h"
64 #include "function.h"
65 #include "rtl-error.h"
66 #include "toplev.h" /* exact_log2, floor_log2 */
67 #include "reload.h"
68 #include "intl.h"
69 #include "predict.h"
70 #include "dominance.h"
71 #include "cfg.h"
72 #include "cfgrtl.h"
73 #include "basic-block.h"
74 #include "target.h"
75 #include "targhooks.h"
76 #include "debug.h"
77 #include "expmed.h"
78 #include "dojump.h"
79 #include "explow.h"
80 #include "calls.h"
81 #include "emit-rtl.h"
82 #include "stmt.h"
83 #include "expr.h"
84 #include "tree-pass.h"
85 #include "cgraph.h"
86 #include "tree-ssa.h"
87 #include "coverage.h"
88 #include "df.h"
89 #include "cfgloop.h"
90 #include "params.h"
91 #include "tree-pretty-print.h" /* for dump_function_header */
92 #include "asan.h"
93 #include "wide-int-print.h"
94 #include "rtl-iter.h"
95
96 #ifdef XCOFF_DEBUGGING_INFO
97 #include "xcoffout.h" /* Needed for external data
98 declarations for e.g. AIX 4.x. */
99 #endif
100
101 #include "dwarf2out.h"
102
103 #ifdef DBX_DEBUGGING_INFO
104 #include "dbxout.h"
105 #endif
106
107 #ifdef SDB_DEBUGGING_INFO
108 #include "sdbout.h"
109 #endif
110
111 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
112 So define a null default for it to save conditionalization later. */
113 #ifndef CC_STATUS_INIT
114 #define CC_STATUS_INIT
115 #endif
116
117 /* Is the given character a logical line separator for the assembler? */
118 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
119 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
120 #endif
121
122 #ifndef JUMP_TABLES_IN_TEXT_SECTION
123 #define JUMP_TABLES_IN_TEXT_SECTION 0
124 #endif
125
126 /* Bitflags used by final_scan_insn. */
127 #define SEEN_NOTE 1
128 #define SEEN_EMITTED 2
129
130 /* Last insn processed by final_scan_insn. */
131 static rtx_insn *debug_insn;
132 rtx_insn *current_output_insn;
133
134 /* Line number of last NOTE. */
135 static int last_linenum;
136
137 /* Last discriminator written to assembly. */
138 static int last_discriminator;
139
140 /* Discriminator of current block. */
141 static int discriminator;
142
143 /* Highest line number in current block. */
144 static int high_block_linenum;
145
146 /* Likewise for function. */
147 static int high_function_linenum;
148
149 /* Filename of last NOTE. */
150 static const char *last_filename;
151
152 /* Override filename and line number. */
153 static const char *override_filename;
154 static int override_linenum;
155
156 /* Whether to force emission of a line note before the next insn. */
157 static bool force_source_line = false;
158
159 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
160
161 /* Nonzero while outputting an `asm' with operands.
162 This means that inconsistencies are the user's fault, so don't die.
163 The precise value is the insn being output, to pass to error_for_asm. */
164 const rtx_insn *this_is_asm_operands;
165
166 /* Number of operands of this insn, for an `asm' with operands. */
167 static unsigned int insn_noperands;
168
169 /* Compare optimization flag. */
170
171 static rtx last_ignored_compare = 0;
172
173 /* Assign a unique number to each insn that is output.
174 This can be used to generate unique local labels. */
175
176 static int insn_counter = 0;
177
178 /* This variable contains machine-dependent flags (defined in tm.h)
179 set and examined by output routines
180 that describe how to interpret the condition codes properly. */
181
182 CC_STATUS cc_status;
183
184 /* During output of an insn, this contains a copy of cc_status
185 from before the insn. */
186
187 CC_STATUS cc_prev_status;
188
189 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
190
191 static int block_depth;
192
193 /* Nonzero if have enabled APP processing of our assembler output. */
194
195 static int app_on;
196
197 /* If we are outputting an insn sequence, this contains the sequence rtx.
198 Zero otherwise. */
199
200 rtx_sequence *final_sequence;
201
202 #ifdef ASSEMBLER_DIALECT
203
204 /* Number of the assembler dialect to use, starting at 0. */
205 static int dialect_number;
206 #endif
207
208 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
209 rtx current_insn_predicate;
210
211 /* True if printing into -fdump-final-insns= dump. */
212 bool final_insns_dump_p;
213
214 /* True if profile_function should be called, but hasn't been called yet. */
215 static bool need_profile_function;
216
217 static int asm_insn_count (rtx);
218 static void profile_function (FILE *);
219 static void profile_after_prologue (FILE *);
220 static bool notice_source_line (rtx_insn *, bool *);
221 static rtx walk_alter_subreg (rtx *, bool *);
222 static void output_asm_name (void);
223 static void output_alternate_entry_point (FILE *, rtx_insn *);
224 static tree get_mem_expr_from_op (rtx, int *);
225 static void output_asm_operand_names (rtx *, int *, int);
226 #ifdef LEAF_REGISTERS
227 static void leaf_renumber_regs (rtx_insn *);
228 #endif
229 #if HAVE_cc0
230 static int alter_cond (rtx);
231 #endif
232 #ifndef ADDR_VEC_ALIGN
233 static int final_addr_vec_align (rtx);
234 #endif
235 static int align_fuzz (rtx, rtx, int, unsigned);
236 static void collect_fn_hard_reg_usage (void);
237 static tree get_call_fndecl (rtx_insn *);
238 \f
239 /* Initialize data in final at the beginning of a compilation. */
240
241 void
242 init_final (const char *filename ATTRIBUTE_UNUSED)
243 {
244 app_on = 0;
245 final_sequence = 0;
246
247 #ifdef ASSEMBLER_DIALECT
248 dialect_number = ASSEMBLER_DIALECT;
249 #endif
250 }
251
252 /* Default target function prologue and epilogue assembler output.
253
254 If not overridden for epilogue code, then the function body itself
255 contains return instructions wherever needed. */
256 void
257 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
258 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
259 {
260 }
261
262 void
263 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
264 tree decl ATTRIBUTE_UNUSED,
265 bool new_is_cold ATTRIBUTE_UNUSED)
266 {
267 }
268
269 /* Default target hook that outputs nothing to a stream. */
270 void
271 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
272 {
273 }
274
275 /* Enable APP processing of subsequent output.
276 Used before the output from an `asm' statement. */
277
278 void
279 app_enable (void)
280 {
281 if (! app_on)
282 {
283 fputs (ASM_APP_ON, asm_out_file);
284 app_on = 1;
285 }
286 }
287
288 /* Disable APP processing of subsequent output.
289 Called from varasm.c before most kinds of output. */
290
291 void
292 app_disable (void)
293 {
294 if (app_on)
295 {
296 fputs (ASM_APP_OFF, asm_out_file);
297 app_on = 0;
298 }
299 }
300 \f
301 /* Return the number of slots filled in the current
302 delayed branch sequence (we don't count the insn needing the
303 delay slot). Zero if not in a delayed branch sequence. */
304
305 #ifdef DELAY_SLOTS
306 int
307 dbr_sequence_length (void)
308 {
309 if (final_sequence != 0)
310 return XVECLEN (final_sequence, 0) - 1;
311 else
312 return 0;
313 }
314 #endif
315 \f
316 /* The next two pages contain routines used to compute the length of an insn
317 and to shorten branches. */
318
319 /* Arrays for insn lengths, and addresses. The latter is referenced by
320 `insn_current_length'. */
321
322 static int *insn_lengths;
323
324 vec<int> insn_addresses_;
325
326 /* Max uid for which the above arrays are valid. */
327 static int insn_lengths_max_uid;
328
329 /* Address of insn being processed. Used by `insn_current_length'. */
330 int insn_current_address;
331
332 /* Address of insn being processed in previous iteration. */
333 int insn_last_address;
334
335 /* known invariant alignment of insn being processed. */
336 int insn_current_align;
337
338 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
339 gives the next following alignment insn that increases the known
340 alignment, or NULL_RTX if there is no such insn.
341 For any alignment obtained this way, we can again index uid_align with
342 its uid to obtain the next following align that in turn increases the
343 alignment, till we reach NULL_RTX; the sequence obtained this way
344 for each insn we'll call the alignment chain of this insn in the following
345 comments. */
346
347 struct label_alignment
348 {
349 short alignment;
350 short max_skip;
351 };
352
353 static rtx *uid_align;
354 static int *uid_shuid;
355 static struct label_alignment *label_align;
356
357 /* Indicate that branch shortening hasn't yet been done. */
358
359 void
360 init_insn_lengths (void)
361 {
362 if (uid_shuid)
363 {
364 free (uid_shuid);
365 uid_shuid = 0;
366 }
367 if (insn_lengths)
368 {
369 free (insn_lengths);
370 insn_lengths = 0;
371 insn_lengths_max_uid = 0;
372 }
373 if (HAVE_ATTR_length)
374 INSN_ADDRESSES_FREE ();
375 if (uid_align)
376 {
377 free (uid_align);
378 uid_align = 0;
379 }
380 }
381
382 /* Obtain the current length of an insn. If branch shortening has been done,
383 get its actual length. Otherwise, use FALLBACK_FN to calculate the
384 length. */
385 static int
386 get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *))
387 {
388 rtx body;
389 int i;
390 int length = 0;
391
392 if (!HAVE_ATTR_length)
393 return 0;
394
395 if (insn_lengths_max_uid > INSN_UID (insn))
396 return insn_lengths[INSN_UID (insn)];
397 else
398 switch (GET_CODE (insn))
399 {
400 case NOTE:
401 case BARRIER:
402 case CODE_LABEL:
403 case DEBUG_INSN:
404 return 0;
405
406 case CALL_INSN:
407 case JUMP_INSN:
408 length = fallback_fn (insn);
409 break;
410
411 case INSN:
412 body = PATTERN (insn);
413 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
414 return 0;
415
416 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
417 length = asm_insn_count (body) * fallback_fn (insn);
418 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
419 for (i = 0; i < seq->len (); i++)
420 length += get_attr_length_1 (seq->insn (i), fallback_fn);
421 else
422 length = fallback_fn (insn);
423 break;
424
425 default:
426 break;
427 }
428
429 #ifdef ADJUST_INSN_LENGTH
430 ADJUST_INSN_LENGTH (insn, length);
431 #endif
432 return length;
433 }
434
435 /* Obtain the current length of an insn. If branch shortening has been done,
436 get its actual length. Otherwise, get its maximum length. */
437 int
438 get_attr_length (rtx_insn *insn)
439 {
440 return get_attr_length_1 (insn, insn_default_length);
441 }
442
443 /* Obtain the current length of an insn. If branch shortening has been done,
444 get its actual length. Otherwise, get its minimum length. */
445 int
446 get_attr_min_length (rtx_insn *insn)
447 {
448 return get_attr_length_1 (insn, insn_min_length);
449 }
450 \f
451 /* Code to handle alignment inside shorten_branches. */
452
453 /* Here is an explanation how the algorithm in align_fuzz can give
454 proper results:
455
456 Call a sequence of instructions beginning with alignment point X
457 and continuing until the next alignment point `block X'. When `X'
458 is used in an expression, it means the alignment value of the
459 alignment point.
460
461 Call the distance between the start of the first insn of block X, and
462 the end of the last insn of block X `IX', for the `inner size of X'.
463 This is clearly the sum of the instruction lengths.
464
465 Likewise with the next alignment-delimited block following X, which we
466 shall call block Y.
467
468 Call the distance between the start of the first insn of block X, and
469 the start of the first insn of block Y `OX', for the `outer size of X'.
470
471 The estimated padding is then OX - IX.
472
473 OX can be safely estimated as
474
475 if (X >= Y)
476 OX = round_up(IX, Y)
477 else
478 OX = round_up(IX, X) + Y - X
479
480 Clearly est(IX) >= real(IX), because that only depends on the
481 instruction lengths, and those being overestimated is a given.
482
483 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
484 we needn't worry about that when thinking about OX.
485
486 When X >= Y, the alignment provided by Y adds no uncertainty factor
487 for branch ranges starting before X, so we can just round what we have.
488 But when X < Y, we don't know anything about the, so to speak,
489 `middle bits', so we have to assume the worst when aligning up from an
490 address mod X to one mod Y, which is Y - X. */
491
492 #ifndef LABEL_ALIGN
493 #define LABEL_ALIGN(LABEL) align_labels_log
494 #endif
495
496 #ifndef LOOP_ALIGN
497 #define LOOP_ALIGN(LABEL) align_loops_log
498 #endif
499
500 #ifndef LABEL_ALIGN_AFTER_BARRIER
501 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
502 #endif
503
504 #ifndef JUMP_ALIGN
505 #define JUMP_ALIGN(LABEL) align_jumps_log
506 #endif
507
508 int
509 default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
510 {
511 return 0;
512 }
513
514 int
515 default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
516 {
517 return align_loops_max_skip;
518 }
519
520 int
521 default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
522 {
523 return align_labels_max_skip;
524 }
525
526 int
527 default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
528 {
529 return align_jumps_max_skip;
530 }
531
532 #ifndef ADDR_VEC_ALIGN
533 static int
534 final_addr_vec_align (rtx addr_vec)
535 {
536 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
537
538 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
539 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
540 return exact_log2 (align);
541
542 }
543
544 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
545 #endif
546
547 #ifndef INSN_LENGTH_ALIGNMENT
548 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
549 #endif
550
551 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
552
553 static int min_labelno, max_labelno;
554
555 #define LABEL_TO_ALIGNMENT(LABEL) \
556 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
557
558 #define LABEL_TO_MAX_SKIP(LABEL) \
559 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
560
561 /* For the benefit of port specific code do this also as a function. */
562
563 int
564 label_to_alignment (rtx label)
565 {
566 if (CODE_LABEL_NUMBER (label) <= max_labelno)
567 return LABEL_TO_ALIGNMENT (label);
568 return 0;
569 }
570
571 int
572 label_to_max_skip (rtx label)
573 {
574 if (CODE_LABEL_NUMBER (label) <= max_labelno)
575 return LABEL_TO_MAX_SKIP (label);
576 return 0;
577 }
578
579 /* The differences in addresses
580 between a branch and its target might grow or shrink depending on
581 the alignment the start insn of the range (the branch for a forward
582 branch or the label for a backward branch) starts out on; if these
583 differences are used naively, they can even oscillate infinitely.
584 We therefore want to compute a 'worst case' address difference that
585 is independent of the alignment the start insn of the range end
586 up on, and that is at least as large as the actual difference.
587 The function align_fuzz calculates the amount we have to add to the
588 naively computed difference, by traversing the part of the alignment
589 chain of the start insn of the range that is in front of the end insn
590 of the range, and considering for each alignment the maximum amount
591 that it might contribute to a size increase.
592
593 For casesi tables, we also want to know worst case minimum amounts of
594 address difference, in case a machine description wants to introduce
595 some common offset that is added to all offsets in a table.
596 For this purpose, align_fuzz with a growth argument of 0 computes the
597 appropriate adjustment. */
598
599 /* Compute the maximum delta by which the difference of the addresses of
600 START and END might grow / shrink due to a different address for start
601 which changes the size of alignment insns between START and END.
602 KNOWN_ALIGN_LOG is the alignment known for START.
603 GROWTH should be ~0 if the objective is to compute potential code size
604 increase, and 0 if the objective is to compute potential shrink.
605 The return value is undefined for any other value of GROWTH. */
606
607 static int
608 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
609 {
610 int uid = INSN_UID (start);
611 rtx align_label;
612 int known_align = 1 << known_align_log;
613 int end_shuid = INSN_SHUID (end);
614 int fuzz = 0;
615
616 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
617 {
618 int align_addr, new_align;
619
620 uid = INSN_UID (align_label);
621 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
622 if (uid_shuid[uid] > end_shuid)
623 break;
624 known_align_log = LABEL_TO_ALIGNMENT (align_label);
625 new_align = 1 << known_align_log;
626 if (new_align < known_align)
627 continue;
628 fuzz += (-align_addr ^ growth) & (new_align - known_align);
629 known_align = new_align;
630 }
631 return fuzz;
632 }
633
634 /* Compute a worst-case reference address of a branch so that it
635 can be safely used in the presence of aligned labels. Since the
636 size of the branch itself is unknown, the size of the branch is
637 not included in the range. I.e. for a forward branch, the reference
638 address is the end address of the branch as known from the previous
639 branch shortening pass, minus a value to account for possible size
640 increase due to alignment. For a backward branch, it is the start
641 address of the branch as known from the current pass, plus a value
642 to account for possible size increase due to alignment.
643 NB.: Therefore, the maximum offset allowed for backward branches needs
644 to exclude the branch size. */
645
646 int
647 insn_current_reference_address (rtx_insn *branch)
648 {
649 rtx dest;
650 int seq_uid;
651
652 if (! INSN_ADDRESSES_SET_P ())
653 return 0;
654
655 rtx_insn *seq = NEXT_INSN (PREV_INSN (branch));
656 seq_uid = INSN_UID (seq);
657 if (!JUMP_P (branch))
658 /* This can happen for example on the PA; the objective is to know the
659 offset to address something in front of the start of the function.
660 Thus, we can treat it like a backward branch.
661 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
662 any alignment we'd encounter, so we skip the call to align_fuzz. */
663 return insn_current_address;
664 dest = JUMP_LABEL (branch);
665
666 /* BRANCH has no proper alignment chain set, so use SEQ.
667 BRANCH also has no INSN_SHUID. */
668 if (INSN_SHUID (seq) < INSN_SHUID (dest))
669 {
670 /* Forward branch. */
671 return (insn_last_address + insn_lengths[seq_uid]
672 - align_fuzz (seq, dest, length_unit_log, ~0));
673 }
674 else
675 {
676 /* Backward branch. */
677 return (insn_current_address
678 + align_fuzz (dest, seq, length_unit_log, ~0));
679 }
680 }
681 \f
682 /* Compute branch alignments based on frequency information in the
683 CFG. */
684
685 unsigned int
686 compute_alignments (void)
687 {
688 int log, max_skip, max_log;
689 basic_block bb;
690 int freq_max = 0;
691 int freq_threshold = 0;
692
693 if (label_align)
694 {
695 free (label_align);
696 label_align = 0;
697 }
698
699 max_labelno = max_label_num ();
700 min_labelno = get_first_label_num ();
701 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
702
703 /* If not optimizing or optimizing for size, don't assign any alignments. */
704 if (! optimize || optimize_function_for_size_p (cfun))
705 return 0;
706
707 if (dump_file)
708 {
709 dump_reg_info (dump_file);
710 dump_flow_info (dump_file, TDF_DETAILS);
711 flow_loops_dump (dump_file, NULL, 1);
712 }
713 loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
714 FOR_EACH_BB_FN (bb, cfun)
715 if (bb->frequency > freq_max)
716 freq_max = bb->frequency;
717 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
718
719 if (dump_file)
720 fprintf (dump_file, "freq_max: %i\n",freq_max);
721 FOR_EACH_BB_FN (bb, cfun)
722 {
723 rtx_insn *label = BB_HEAD (bb);
724 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
725 edge e;
726 edge_iterator ei;
727
728 if (!LABEL_P (label)
729 || optimize_bb_for_size_p (bb))
730 {
731 if (dump_file)
732 fprintf (dump_file,
733 "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
734 bb->index, bb->frequency, bb->loop_father->num,
735 bb_loop_depth (bb));
736 continue;
737 }
738 max_log = LABEL_ALIGN (label);
739 max_skip = targetm.asm_out.label_align_max_skip (label);
740
741 FOR_EACH_EDGE (e, ei, bb->preds)
742 {
743 if (e->flags & EDGE_FALLTHRU)
744 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
745 else
746 branch_frequency += EDGE_FREQUENCY (e);
747 }
748 if (dump_file)
749 {
750 fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth"
751 " %2i fall %4i branch %4i",
752 bb->index, bb->frequency, bb->loop_father->num,
753 bb_loop_depth (bb),
754 fallthru_frequency, branch_frequency);
755 if (!bb->loop_father->inner && bb->loop_father->num)
756 fprintf (dump_file, " inner_loop");
757 if (bb->loop_father->header == bb)
758 fprintf (dump_file, " loop_header");
759 fprintf (dump_file, "\n");
760 }
761
762 /* There are two purposes to align block with no fallthru incoming edge:
763 1) to avoid fetch stalls when branch destination is near cache boundary
764 2) to improve cache efficiency in case the previous block is not executed
765 (so it does not need to be in the cache).
766
767 We to catch first case, we align frequently executed blocks.
768 To catch the second, we align blocks that are executed more frequently
769 than the predecessor and the predecessor is likely to not be executed
770 when function is called. */
771
772 if (!has_fallthru
773 && (branch_frequency > freq_threshold
774 || (bb->frequency > bb->prev_bb->frequency * 10
775 && (bb->prev_bb->frequency
776 <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2))))
777 {
778 log = JUMP_ALIGN (label);
779 if (dump_file)
780 fprintf (dump_file, " jump alignment added.\n");
781 if (max_log < log)
782 {
783 max_log = log;
784 max_skip = targetm.asm_out.jump_align_max_skip (label);
785 }
786 }
787 /* In case block is frequent and reached mostly by non-fallthru edge,
788 align it. It is most likely a first block of loop. */
789 if (has_fallthru
790 && !(single_succ_p (bb)
791 && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
792 && optimize_bb_for_speed_p (bb)
793 && branch_frequency + fallthru_frequency > freq_threshold
794 && (branch_frequency
795 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
796 {
797 log = LOOP_ALIGN (label);
798 if (dump_file)
799 fprintf (dump_file, " internal loop alignment added.\n");
800 if (max_log < log)
801 {
802 max_log = log;
803 max_skip = targetm.asm_out.loop_align_max_skip (label);
804 }
805 }
806 LABEL_TO_ALIGNMENT (label) = max_log;
807 LABEL_TO_MAX_SKIP (label) = max_skip;
808 }
809
810 loop_optimizer_finalize ();
811 free_dominance_info (CDI_DOMINATORS);
812 return 0;
813 }
814
815 /* Grow the LABEL_ALIGN array after new labels are created. */
816
817 static void
818 grow_label_align (void)
819 {
820 int old = max_labelno;
821 int n_labels;
822 int n_old_labels;
823
824 max_labelno = max_label_num ();
825
826 n_labels = max_labelno - min_labelno + 1;
827 n_old_labels = old - min_labelno + 1;
828
829 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
830
831 /* Range of labels grows monotonically in the function. Failing here
832 means that the initialization of array got lost. */
833 gcc_assert (n_old_labels <= n_labels);
834
835 memset (label_align + n_old_labels, 0,
836 (n_labels - n_old_labels) * sizeof (struct label_alignment));
837 }
838
839 /* Update the already computed alignment information. LABEL_PAIRS is a vector
840 made up of pairs of labels for which the alignment information of the first
841 element will be copied from that of the second element. */
842
843 void
844 update_alignments (vec<rtx> &label_pairs)
845 {
846 unsigned int i = 0;
847 rtx iter, label = NULL_RTX;
848
849 if (max_labelno != max_label_num ())
850 grow_label_align ();
851
852 FOR_EACH_VEC_ELT (label_pairs, i, iter)
853 if (i & 1)
854 {
855 LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter);
856 LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter);
857 }
858 else
859 label = iter;
860 }
861
862 namespace {
863
864 const pass_data pass_data_compute_alignments =
865 {
866 RTL_PASS, /* type */
867 "alignments", /* name */
868 OPTGROUP_NONE, /* optinfo_flags */
869 TV_NONE, /* tv_id */
870 0, /* properties_required */
871 0, /* properties_provided */
872 0, /* properties_destroyed */
873 0, /* todo_flags_start */
874 0, /* todo_flags_finish */
875 };
876
877 class pass_compute_alignments : public rtl_opt_pass
878 {
879 public:
880 pass_compute_alignments (gcc::context *ctxt)
881 : rtl_opt_pass (pass_data_compute_alignments, ctxt)
882 {}
883
884 /* opt_pass methods: */
885 virtual unsigned int execute (function *) { return compute_alignments (); }
886
887 }; // class pass_compute_alignments
888
889 } // anon namespace
890
891 rtl_opt_pass *
892 make_pass_compute_alignments (gcc::context *ctxt)
893 {
894 return new pass_compute_alignments (ctxt);
895 }
896
897 \f
898 /* Make a pass over all insns and compute their actual lengths by shortening
899 any branches of variable length if possible. */
900
901 /* shorten_branches might be called multiple times: for example, the SH
902 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
903 In order to do this, it needs proper length information, which it obtains
904 by calling shorten_branches. This cannot be collapsed with
905 shorten_branches itself into a single pass unless we also want to integrate
906 reorg.c, since the branch splitting exposes new instructions with delay
907 slots. */
908
909 void
910 shorten_branches (rtx_insn *first)
911 {
912 rtx_insn *insn;
913 int max_uid;
914 int i;
915 int max_log;
916 int max_skip;
917 #define MAX_CODE_ALIGN 16
918 rtx_insn *seq;
919 int something_changed = 1;
920 char *varying_length;
921 rtx body;
922 int uid;
923 rtx align_tab[MAX_CODE_ALIGN];
924
925 /* Compute maximum UID and allocate label_align / uid_shuid. */
926 max_uid = get_max_uid ();
927
928 /* Free uid_shuid before reallocating it. */
929 free (uid_shuid);
930
931 uid_shuid = XNEWVEC (int, max_uid);
932
933 if (max_labelno != max_label_num ())
934 grow_label_align ();
935
936 /* Initialize label_align and set up uid_shuid to be strictly
937 monotonically rising with insn order. */
938 /* We use max_log here to keep track of the maximum alignment we want to
939 impose on the next CODE_LABEL (or the current one if we are processing
940 the CODE_LABEL itself). */
941
942 max_log = 0;
943 max_skip = 0;
944
945 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
946 {
947 int log;
948
949 INSN_SHUID (insn) = i++;
950 if (INSN_P (insn))
951 continue;
952
953 if (LABEL_P (insn))
954 {
955 rtx_insn *next;
956 bool next_is_jumptable;
957
958 /* Merge in alignments computed by compute_alignments. */
959 log = LABEL_TO_ALIGNMENT (insn);
960 if (max_log < log)
961 {
962 max_log = log;
963 max_skip = LABEL_TO_MAX_SKIP (insn);
964 }
965
966 next = next_nonnote_insn (insn);
967 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
968 if (!next_is_jumptable)
969 {
970 log = LABEL_ALIGN (insn);
971 if (max_log < log)
972 {
973 max_log = log;
974 max_skip = targetm.asm_out.label_align_max_skip (insn);
975 }
976 }
977 /* ADDR_VECs only take room if read-only data goes into the text
978 section. */
979 if ((JUMP_TABLES_IN_TEXT_SECTION
980 || readonly_data_section == text_section)
981 && next_is_jumptable)
982 {
983 log = ADDR_VEC_ALIGN (next);
984 if (max_log < log)
985 {
986 max_log = log;
987 max_skip = targetm.asm_out.label_align_max_skip (insn);
988 }
989 }
990 LABEL_TO_ALIGNMENT (insn) = max_log;
991 LABEL_TO_MAX_SKIP (insn) = max_skip;
992 max_log = 0;
993 max_skip = 0;
994 }
995 else if (BARRIER_P (insn))
996 {
997 rtx_insn *label;
998
999 for (label = insn; label && ! INSN_P (label);
1000 label = NEXT_INSN (label))
1001 if (LABEL_P (label))
1002 {
1003 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1004 if (max_log < log)
1005 {
1006 max_log = log;
1007 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
1008 }
1009 break;
1010 }
1011 }
1012 }
1013 if (!HAVE_ATTR_length)
1014 return;
1015
1016 /* Allocate the rest of the arrays. */
1017 insn_lengths = XNEWVEC (int, max_uid);
1018 insn_lengths_max_uid = max_uid;
1019 /* Syntax errors can lead to labels being outside of the main insn stream.
1020 Initialize insn_addresses, so that we get reproducible results. */
1021 INSN_ADDRESSES_ALLOC (max_uid);
1022
1023 varying_length = XCNEWVEC (char, max_uid);
1024
1025 /* Initialize uid_align. We scan instructions
1026 from end to start, and keep in align_tab[n] the last seen insn
1027 that does an alignment of at least n+1, i.e. the successor
1028 in the alignment chain for an insn that does / has a known
1029 alignment of n. */
1030 uid_align = XCNEWVEC (rtx, max_uid);
1031
1032 for (i = MAX_CODE_ALIGN; --i >= 0;)
1033 align_tab[i] = NULL_RTX;
1034 seq = get_last_insn ();
1035 for (; seq; seq = PREV_INSN (seq))
1036 {
1037 int uid = INSN_UID (seq);
1038 int log;
1039 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
1040 uid_align[uid] = align_tab[0];
1041 if (log)
1042 {
1043 /* Found an alignment label. */
1044 uid_align[uid] = align_tab[log];
1045 for (i = log - 1; i >= 0; i--)
1046 align_tab[i] = seq;
1047 }
1048 }
1049
1050 /* When optimizing, we start assuming minimum length, and keep increasing
1051 lengths as we find the need for this, till nothing changes.
1052 When not optimizing, we start assuming maximum lengths, and
1053 do a single pass to update the lengths. */
1054 bool increasing = optimize != 0;
1055
1056 #ifdef CASE_VECTOR_SHORTEN_MODE
1057 if (optimize)
1058 {
1059 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1060 label fields. */
1061
1062 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1063 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1064 int rel;
1065
1066 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1067 {
1068 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1069 int len, i, min, max, insn_shuid;
1070 int min_align;
1071 addr_diff_vec_flags flags;
1072
1073 if (! JUMP_TABLE_DATA_P (insn)
1074 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1075 continue;
1076 pat = PATTERN (insn);
1077 len = XVECLEN (pat, 1);
1078 gcc_assert (len > 0);
1079 min_align = MAX_CODE_ALIGN;
1080 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1081 {
1082 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1083 int shuid = INSN_SHUID (lab);
1084 if (shuid < min)
1085 {
1086 min = shuid;
1087 min_lab = lab;
1088 }
1089 if (shuid > max)
1090 {
1091 max = shuid;
1092 max_lab = lab;
1093 }
1094 if (min_align > LABEL_TO_ALIGNMENT (lab))
1095 min_align = LABEL_TO_ALIGNMENT (lab);
1096 }
1097 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1098 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1099 insn_shuid = INSN_SHUID (insn);
1100 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1101 memset (&flags, 0, sizeof (flags));
1102 flags.min_align = min_align;
1103 flags.base_after_vec = rel > insn_shuid;
1104 flags.min_after_vec = min > insn_shuid;
1105 flags.max_after_vec = max > insn_shuid;
1106 flags.min_after_base = min > rel;
1107 flags.max_after_base = max > rel;
1108 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1109
1110 if (increasing)
1111 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat));
1112 }
1113 }
1114 #endif /* CASE_VECTOR_SHORTEN_MODE */
1115
1116 /* Compute initial lengths, addresses, and varying flags for each insn. */
1117 int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length;
1118
1119 for (insn_current_address = 0, insn = first;
1120 insn != 0;
1121 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1122 {
1123 uid = INSN_UID (insn);
1124
1125 insn_lengths[uid] = 0;
1126
1127 if (LABEL_P (insn))
1128 {
1129 int log = LABEL_TO_ALIGNMENT (insn);
1130 if (log)
1131 {
1132 int align = 1 << log;
1133 int new_address = (insn_current_address + align - 1) & -align;
1134 insn_lengths[uid] = new_address - insn_current_address;
1135 }
1136 }
1137
1138 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1139
1140 if (NOTE_P (insn) || BARRIER_P (insn)
1141 || LABEL_P (insn) || DEBUG_INSN_P (insn))
1142 continue;
1143 if (insn->deleted ())
1144 continue;
1145
1146 body = PATTERN (insn);
1147 if (JUMP_TABLE_DATA_P (insn))
1148 {
1149 /* This only takes room if read-only data goes into the text
1150 section. */
1151 if (JUMP_TABLES_IN_TEXT_SECTION
1152 || readonly_data_section == text_section)
1153 insn_lengths[uid] = (XVECLEN (body,
1154 GET_CODE (body) == ADDR_DIFF_VEC)
1155 * GET_MODE_SIZE (GET_MODE (body)));
1156 /* Alignment is handled by ADDR_VEC_ALIGN. */
1157 }
1158 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1159 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1160 else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body))
1161 {
1162 int i;
1163 int const_delay_slots;
1164 #ifdef DELAY_SLOTS
1165 const_delay_slots = const_num_delay_slots (body_seq->insn (0));
1166 #else
1167 const_delay_slots = 0;
1168 #endif
1169 int (*inner_length_fun) (rtx_insn *)
1170 = const_delay_slots ? length_fun : insn_default_length;
1171 /* Inside a delay slot sequence, we do not do any branch shortening
1172 if the shortening could change the number of delay slots
1173 of the branch. */
1174 for (i = 0; i < body_seq->len (); i++)
1175 {
1176 rtx_insn *inner_insn = body_seq->insn (i);
1177 int inner_uid = INSN_UID (inner_insn);
1178 int inner_length;
1179
1180 if (GET_CODE (body) == ASM_INPUT
1181 || asm_noperands (PATTERN (inner_insn)) >= 0)
1182 inner_length = (asm_insn_count (PATTERN (inner_insn))
1183 * insn_default_length (inner_insn));
1184 else
1185 inner_length = inner_length_fun (inner_insn);
1186
1187 insn_lengths[inner_uid] = inner_length;
1188 if (const_delay_slots)
1189 {
1190 if ((varying_length[inner_uid]
1191 = insn_variable_length_p (inner_insn)) != 0)
1192 varying_length[uid] = 1;
1193 INSN_ADDRESSES (inner_uid) = (insn_current_address
1194 + insn_lengths[uid]);
1195 }
1196 else
1197 varying_length[inner_uid] = 0;
1198 insn_lengths[uid] += inner_length;
1199 }
1200 }
1201 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1202 {
1203 insn_lengths[uid] = length_fun (insn);
1204 varying_length[uid] = insn_variable_length_p (insn);
1205 }
1206
1207 /* If needed, do any adjustment. */
1208 #ifdef ADJUST_INSN_LENGTH
1209 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1210 if (insn_lengths[uid] < 0)
1211 fatal_insn ("negative insn length", insn);
1212 #endif
1213 }
1214
1215 /* Now loop over all the insns finding varying length insns. For each,
1216 get the current insn length. If it has changed, reflect the change.
1217 When nothing changes for a full pass, we are done. */
1218
1219 while (something_changed)
1220 {
1221 something_changed = 0;
1222 insn_current_align = MAX_CODE_ALIGN - 1;
1223 for (insn_current_address = 0, insn = first;
1224 insn != 0;
1225 insn = NEXT_INSN (insn))
1226 {
1227 int new_length;
1228 #ifdef ADJUST_INSN_LENGTH
1229 int tmp_length;
1230 #endif
1231 int length_align;
1232
1233 uid = INSN_UID (insn);
1234
1235 if (LABEL_P (insn))
1236 {
1237 int log = LABEL_TO_ALIGNMENT (insn);
1238
1239 #ifdef CASE_VECTOR_SHORTEN_MODE
1240 /* If the mode of a following jump table was changed, we
1241 may need to update the alignment of this label. */
1242 rtx_insn *next;
1243 bool next_is_jumptable;
1244
1245 next = next_nonnote_insn (insn);
1246 next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
1247 if ((JUMP_TABLES_IN_TEXT_SECTION
1248 || readonly_data_section == text_section)
1249 && next_is_jumptable)
1250 {
1251 int newlog = ADDR_VEC_ALIGN (next);
1252 if (newlog != log)
1253 {
1254 log = newlog;
1255 LABEL_TO_ALIGNMENT (insn) = log;
1256 something_changed = 1;
1257 }
1258 }
1259 #endif
1260
1261 if (log > insn_current_align)
1262 {
1263 int align = 1 << log;
1264 int new_address= (insn_current_address + align - 1) & -align;
1265 insn_lengths[uid] = new_address - insn_current_address;
1266 insn_current_align = log;
1267 insn_current_address = new_address;
1268 }
1269 else
1270 insn_lengths[uid] = 0;
1271 INSN_ADDRESSES (uid) = insn_current_address;
1272 continue;
1273 }
1274
1275 length_align = INSN_LENGTH_ALIGNMENT (insn);
1276 if (length_align < insn_current_align)
1277 insn_current_align = length_align;
1278
1279 insn_last_address = INSN_ADDRESSES (uid);
1280 INSN_ADDRESSES (uid) = insn_current_address;
1281
1282 #ifdef CASE_VECTOR_SHORTEN_MODE
1283 if (optimize
1284 && JUMP_TABLE_DATA_P (insn)
1285 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1286 {
1287 rtx body = PATTERN (insn);
1288 int old_length = insn_lengths[uid];
1289 rtx_insn *rel_lab =
1290 safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0));
1291 rtx min_lab = XEXP (XEXP (body, 2), 0);
1292 rtx max_lab = XEXP (XEXP (body, 3), 0);
1293 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1294 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1295 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1296 rtx_insn *prev;
1297 int rel_align = 0;
1298 addr_diff_vec_flags flags;
1299 machine_mode vec_mode;
1300
1301 /* Avoid automatic aggregate initialization. */
1302 flags = ADDR_DIFF_VEC_FLAGS (body);
1303
1304 /* Try to find a known alignment for rel_lab. */
1305 for (prev = rel_lab;
1306 prev
1307 && ! insn_lengths[INSN_UID (prev)]
1308 && ! (varying_length[INSN_UID (prev)] & 1);
1309 prev = PREV_INSN (prev))
1310 if (varying_length[INSN_UID (prev)] & 2)
1311 {
1312 rel_align = LABEL_TO_ALIGNMENT (prev);
1313 break;
1314 }
1315
1316 /* See the comment on addr_diff_vec_flags in rtl.h for the
1317 meaning of the flags values. base: REL_LAB vec: INSN */
1318 /* Anything after INSN has still addresses from the last
1319 pass; adjust these so that they reflect our current
1320 estimate for this pass. */
1321 if (flags.base_after_vec)
1322 rel_addr += insn_current_address - insn_last_address;
1323 if (flags.min_after_vec)
1324 min_addr += insn_current_address - insn_last_address;
1325 if (flags.max_after_vec)
1326 max_addr += insn_current_address - insn_last_address;
1327 /* We want to know the worst case, i.e. lowest possible value
1328 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1329 its offset is positive, and we have to be wary of code shrink;
1330 otherwise, it is negative, and we have to be vary of code
1331 size increase. */
1332 if (flags.min_after_base)
1333 {
1334 /* If INSN is between REL_LAB and MIN_LAB, the size
1335 changes we are about to make can change the alignment
1336 within the observed offset, therefore we have to break
1337 it up into two parts that are independent. */
1338 if (! flags.base_after_vec && flags.min_after_vec)
1339 {
1340 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1341 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1342 }
1343 else
1344 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1345 }
1346 else
1347 {
1348 if (flags.base_after_vec && ! flags.min_after_vec)
1349 {
1350 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1351 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1352 }
1353 else
1354 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1355 }
1356 /* Likewise, determine the highest lowest possible value
1357 for the offset of MAX_LAB. */
1358 if (flags.max_after_base)
1359 {
1360 if (! flags.base_after_vec && flags.max_after_vec)
1361 {
1362 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1363 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1364 }
1365 else
1366 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1367 }
1368 else
1369 {
1370 if (flags.base_after_vec && ! flags.max_after_vec)
1371 {
1372 max_addr += align_fuzz (max_lab, insn, 0, 0);
1373 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1374 }
1375 else
1376 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1377 }
1378 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1379 max_addr - rel_addr, body);
1380 if (!increasing
1381 || (GET_MODE_SIZE (vec_mode)
1382 >= GET_MODE_SIZE (GET_MODE (body))))
1383 PUT_MODE (body, vec_mode);
1384 if (JUMP_TABLES_IN_TEXT_SECTION
1385 || readonly_data_section == text_section)
1386 {
1387 insn_lengths[uid]
1388 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1389 insn_current_address += insn_lengths[uid];
1390 if (insn_lengths[uid] != old_length)
1391 something_changed = 1;
1392 }
1393
1394 continue;
1395 }
1396 #endif /* CASE_VECTOR_SHORTEN_MODE */
1397
1398 if (! (varying_length[uid]))
1399 {
1400 if (NONJUMP_INSN_P (insn)
1401 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1402 {
1403 int i;
1404
1405 body = PATTERN (insn);
1406 for (i = 0; i < XVECLEN (body, 0); i++)
1407 {
1408 rtx inner_insn = XVECEXP (body, 0, i);
1409 int inner_uid = INSN_UID (inner_insn);
1410
1411 INSN_ADDRESSES (inner_uid) = insn_current_address;
1412
1413 insn_current_address += insn_lengths[inner_uid];
1414 }
1415 }
1416 else
1417 insn_current_address += insn_lengths[uid];
1418
1419 continue;
1420 }
1421
1422 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1423 {
1424 rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn));
1425 int i;
1426
1427 body = PATTERN (insn);
1428 new_length = 0;
1429 for (i = 0; i < seqn->len (); i++)
1430 {
1431 rtx_insn *inner_insn = seqn->insn (i);
1432 int inner_uid = INSN_UID (inner_insn);
1433 int inner_length;
1434
1435 INSN_ADDRESSES (inner_uid) = insn_current_address;
1436
1437 /* insn_current_length returns 0 for insns with a
1438 non-varying length. */
1439 if (! varying_length[inner_uid])
1440 inner_length = insn_lengths[inner_uid];
1441 else
1442 inner_length = insn_current_length (inner_insn);
1443
1444 if (inner_length != insn_lengths[inner_uid])
1445 {
1446 if (!increasing || inner_length > insn_lengths[inner_uid])
1447 {
1448 insn_lengths[inner_uid] = inner_length;
1449 something_changed = 1;
1450 }
1451 else
1452 inner_length = insn_lengths[inner_uid];
1453 }
1454 insn_current_address += inner_length;
1455 new_length += inner_length;
1456 }
1457 }
1458 else
1459 {
1460 new_length = insn_current_length (insn);
1461 insn_current_address += new_length;
1462 }
1463
1464 #ifdef ADJUST_INSN_LENGTH
1465 /* If needed, do any adjustment. */
1466 tmp_length = new_length;
1467 ADJUST_INSN_LENGTH (insn, new_length);
1468 insn_current_address += (new_length - tmp_length);
1469 #endif
1470
1471 if (new_length != insn_lengths[uid]
1472 && (!increasing || new_length > insn_lengths[uid]))
1473 {
1474 insn_lengths[uid] = new_length;
1475 something_changed = 1;
1476 }
1477 else
1478 insn_current_address += insn_lengths[uid] - new_length;
1479 }
1480 /* For a non-optimizing compile, do only a single pass. */
1481 if (!increasing)
1482 break;
1483 }
1484
1485 free (varying_length);
1486 }
1487
1488 /* Given the body of an INSN known to be generated by an ASM statement, return
1489 the number of machine instructions likely to be generated for this insn.
1490 This is used to compute its length. */
1491
1492 static int
1493 asm_insn_count (rtx body)
1494 {
1495 const char *templ;
1496
1497 if (GET_CODE (body) == ASM_INPUT)
1498 templ = XSTR (body, 0);
1499 else
1500 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
1501
1502 return asm_str_count (templ);
1503 }
1504
1505 /* Return the number of machine instructions likely to be generated for the
1506 inline-asm template. */
1507 int
1508 asm_str_count (const char *templ)
1509 {
1510 int count = 1;
1511
1512 if (!*templ)
1513 return 0;
1514
1515 for (; *templ; templ++)
1516 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
1517 || *templ == '\n')
1518 count++;
1519
1520 return count;
1521 }
1522 \f
1523 /* ??? This is probably the wrong place for these. */
1524 /* Structure recording the mapping from source file and directory
1525 names at compile time to those to be embedded in debug
1526 information. */
1527 typedef struct debug_prefix_map
1528 {
1529 const char *old_prefix;
1530 const char *new_prefix;
1531 size_t old_len;
1532 size_t new_len;
1533 struct debug_prefix_map *next;
1534 } debug_prefix_map;
1535
1536 /* Linked list of such structures. */
1537 static debug_prefix_map *debug_prefix_maps;
1538
1539
1540 /* Record a debug file prefix mapping. ARG is the argument to
1541 -fdebug-prefix-map and must be of the form OLD=NEW. */
1542
1543 void
1544 add_debug_prefix_map (const char *arg)
1545 {
1546 debug_prefix_map *map;
1547 const char *p;
1548
1549 p = strchr (arg, '=');
1550 if (!p)
1551 {
1552 error ("invalid argument %qs to -fdebug-prefix-map", arg);
1553 return;
1554 }
1555 map = XNEW (debug_prefix_map);
1556 map->old_prefix = xstrndup (arg, p - arg);
1557 map->old_len = p - arg;
1558 p++;
1559 map->new_prefix = xstrdup (p);
1560 map->new_len = strlen (p);
1561 map->next = debug_prefix_maps;
1562 debug_prefix_maps = map;
1563 }
1564
1565 /* Perform user-specified mapping of debug filename prefixes. Return
1566 the new name corresponding to FILENAME. */
1567
1568 const char *
1569 remap_debug_filename (const char *filename)
1570 {
1571 debug_prefix_map *map;
1572 char *s;
1573 const char *name;
1574 size_t name_len;
1575
1576 for (map = debug_prefix_maps; map; map = map->next)
1577 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
1578 break;
1579 if (!map)
1580 return filename;
1581 name = filename + map->old_len;
1582 name_len = strlen (name) + 1;
1583 s = (char *) alloca (name_len + map->new_len);
1584 memcpy (s, map->new_prefix, map->new_len);
1585 memcpy (s + map->new_len, name, name_len);
1586 return ggc_strdup (s);
1587 }
1588 \f
1589 /* Return true if DWARF2 debug info can be emitted for DECL. */
1590
1591 static bool
1592 dwarf2_debug_info_emitted_p (tree decl)
1593 {
1594 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1595 return false;
1596
1597 if (DECL_IGNORED_P (decl))
1598 return false;
1599
1600 return true;
1601 }
1602
1603 /* Return scope resulting from combination of S1 and S2. */
1604 static tree
1605 choose_inner_scope (tree s1, tree s2)
1606 {
1607 if (!s1)
1608 return s2;
1609 if (!s2)
1610 return s1;
1611 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
1612 return s1;
1613 return s2;
1614 }
1615
1616 /* Emit lexical block notes needed to change scope from S1 to S2. */
1617
1618 static void
1619 change_scope (rtx_insn *orig_insn, tree s1, tree s2)
1620 {
1621 rtx_insn *insn = orig_insn;
1622 tree com = NULL_TREE;
1623 tree ts1 = s1, ts2 = s2;
1624 tree s;
1625
1626 while (ts1 != ts2)
1627 {
1628 gcc_assert (ts1 && ts2);
1629 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
1630 ts1 = BLOCK_SUPERCONTEXT (ts1);
1631 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
1632 ts2 = BLOCK_SUPERCONTEXT (ts2);
1633 else
1634 {
1635 ts1 = BLOCK_SUPERCONTEXT (ts1);
1636 ts2 = BLOCK_SUPERCONTEXT (ts2);
1637 }
1638 }
1639 com = ts1;
1640
1641 /* Close scopes. */
1642 s = s1;
1643 while (s != com)
1644 {
1645 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1646 NOTE_BLOCK (note) = s;
1647 s = BLOCK_SUPERCONTEXT (s);
1648 }
1649
1650 /* Open scopes. */
1651 s = s2;
1652 while (s != com)
1653 {
1654 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
1655 NOTE_BLOCK (insn) = s;
1656 s = BLOCK_SUPERCONTEXT (s);
1657 }
1658 }
1659
1660 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
1661 on the scope tree and the newly reordered instructions. */
1662
1663 static void
1664 reemit_insn_block_notes (void)
1665 {
1666 tree cur_block = DECL_INITIAL (cfun->decl);
1667 rtx_insn *insn;
1668 rtx_note *note;
1669
1670 insn = get_insns ();
1671 for (; insn; insn = NEXT_INSN (insn))
1672 {
1673 tree this_block;
1674
1675 /* Prevent lexical blocks from straddling section boundaries. */
1676 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
1677 {
1678 for (tree s = cur_block; s != DECL_INITIAL (cfun->decl);
1679 s = BLOCK_SUPERCONTEXT (s))
1680 {
1681 rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
1682 NOTE_BLOCK (note) = s;
1683 note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn);
1684 NOTE_BLOCK (note) = s;
1685 }
1686 }
1687
1688 if (!active_insn_p (insn))
1689 continue;
1690
1691 /* Avoid putting scope notes between jump table and its label. */
1692 if (JUMP_TABLE_DATA_P (insn))
1693 continue;
1694
1695 this_block = insn_scope (insn);
1696 /* For sequences compute scope resulting from merging all scopes
1697 of instructions nested inside. */
1698 if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn)))
1699 {
1700 int i;
1701
1702 this_block = NULL;
1703 for (i = 0; i < body->len (); i++)
1704 this_block = choose_inner_scope (this_block,
1705 insn_scope (body->insn (i)));
1706 }
1707 if (! this_block)
1708 {
1709 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION)
1710 continue;
1711 else
1712 this_block = DECL_INITIAL (cfun->decl);
1713 }
1714
1715 if (this_block != cur_block)
1716 {
1717 change_scope (insn, cur_block, this_block);
1718 cur_block = this_block;
1719 }
1720 }
1721
1722 /* change_scope emits before the insn, not after. */
1723 note = emit_note (NOTE_INSN_DELETED);
1724 change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
1725 delete_insn (note);
1726
1727 reorder_blocks ();
1728 }
1729
1730 static const char *some_local_dynamic_name;
1731
1732 /* Locate some local-dynamic symbol still in use by this function
1733 so that we can print its name in local-dynamic base patterns.
1734 Return null if there are no local-dynamic references. */
1735
1736 const char *
1737 get_some_local_dynamic_name ()
1738 {
1739 subrtx_iterator::array_type array;
1740 rtx_insn *insn;
1741
1742 if (some_local_dynamic_name)
1743 return some_local_dynamic_name;
1744
1745 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
1746 if (NONDEBUG_INSN_P (insn))
1747 FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL)
1748 {
1749 const_rtx x = *iter;
1750 if (GET_CODE (x) == SYMBOL_REF)
1751 {
1752 if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC)
1753 return some_local_dynamic_name = XSTR (x, 0);
1754 if (CONSTANT_POOL_ADDRESS_P (x))
1755 iter.substitute (get_pool_constant (x));
1756 }
1757 }
1758
1759 return 0;
1760 }
1761
1762 /* Output assembler code for the start of a function,
1763 and initialize some of the variables in this file
1764 for the new function. The label for the function and associated
1765 assembler pseudo-ops have already been output in `assemble_start_function'.
1766
1767 FIRST is the first insn of the rtl for the function being compiled.
1768 FILE is the file to write assembler code to.
1769 OPTIMIZE_P is nonzero if we should eliminate redundant
1770 test and compare insns. */
1771
1772 void
1773 final_start_function (rtx_insn *first, FILE *file,
1774 int optimize_p ATTRIBUTE_UNUSED)
1775 {
1776 block_depth = 0;
1777
1778 this_is_asm_operands = 0;
1779
1780 need_profile_function = false;
1781
1782 last_filename = LOCATION_FILE (prologue_location);
1783 last_linenum = LOCATION_LINE (prologue_location);
1784 last_discriminator = discriminator = 0;
1785
1786 high_block_linenum = high_function_linenum = last_linenum;
1787
1788 if (flag_sanitize & SANITIZE_ADDRESS)
1789 asan_function_start ();
1790
1791 if (!DECL_IGNORED_P (current_function_decl))
1792 debug_hooks->begin_prologue (last_linenum, last_filename);
1793
1794 if (!dwarf2_debug_info_emitted_p (current_function_decl))
1795 dwarf2out_begin_prologue (0, NULL);
1796
1797 #ifdef LEAF_REG_REMAP
1798 if (crtl->uses_only_leaf_regs)
1799 leaf_renumber_regs (first);
1800 #endif
1801
1802 /* The Sun386i and perhaps other machines don't work right
1803 if the profiling code comes after the prologue. */
1804 if (targetm.profile_before_prologue () && crtl->profile)
1805 {
1806 if (targetm.asm_out.function_prologue
1807 == default_function_pro_epilogue
1808 #ifdef HAVE_prologue
1809 && HAVE_prologue
1810 #endif
1811 )
1812 {
1813 rtx_insn *insn;
1814 for (insn = first; insn; insn = NEXT_INSN (insn))
1815 if (!NOTE_P (insn))
1816 {
1817 insn = NULL;
1818 break;
1819 }
1820 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK
1821 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
1822 break;
1823 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED
1824 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION)
1825 continue;
1826 else
1827 {
1828 insn = NULL;
1829 break;
1830 }
1831
1832 if (insn)
1833 need_profile_function = true;
1834 else
1835 profile_function (file);
1836 }
1837 else
1838 profile_function (file);
1839 }
1840
1841 /* If debugging, assign block numbers to all of the blocks in this
1842 function. */
1843 if (write_symbols)
1844 {
1845 reemit_insn_block_notes ();
1846 number_blocks (current_function_decl);
1847 /* We never actually put out begin/end notes for the top-level
1848 block in the function. But, conceptually, that block is
1849 always needed. */
1850 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1851 }
1852
1853 if (warn_frame_larger_than
1854 && get_frame_size () > frame_larger_than_size)
1855 {
1856 /* Issue a warning */
1857 warning (OPT_Wframe_larger_than_,
1858 "the frame size of %wd bytes is larger than %wd bytes",
1859 get_frame_size (), frame_larger_than_size);
1860 }
1861
1862 /* First output the function prologue: code to set up the stack frame. */
1863 targetm.asm_out.function_prologue (file, get_frame_size ());
1864
1865 /* If the machine represents the prologue as RTL, the profiling code must
1866 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1867 #ifdef HAVE_prologue
1868 if (! HAVE_prologue)
1869 #endif
1870 profile_after_prologue (file);
1871 }
1872
1873 static void
1874 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1875 {
1876 if (!targetm.profile_before_prologue () && crtl->profile)
1877 profile_function (file);
1878 }
1879
1880 static void
1881 profile_function (FILE *file ATTRIBUTE_UNUSED)
1882 {
1883 #ifndef NO_PROFILE_COUNTERS
1884 # define NO_PROFILE_COUNTERS 0
1885 #endif
1886 #ifdef ASM_OUTPUT_REG_PUSH
1887 rtx sval = NULL, chain = NULL;
1888
1889 if (cfun->returns_struct)
1890 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
1891 true);
1892 if (cfun->static_chain_decl)
1893 chain = targetm.calls.static_chain (current_function_decl, true);
1894 #endif /* ASM_OUTPUT_REG_PUSH */
1895
1896 if (! NO_PROFILE_COUNTERS)
1897 {
1898 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1899 switch_to_section (data_section);
1900 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1901 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1902 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1903 }
1904
1905 switch_to_section (current_function_section ());
1906
1907 #ifdef ASM_OUTPUT_REG_PUSH
1908 if (sval && REG_P (sval))
1909 ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
1910 if (chain && REG_P (chain))
1911 ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
1912 #endif
1913
1914 FUNCTION_PROFILER (file, current_function_funcdef_no);
1915
1916 #ifdef ASM_OUTPUT_REG_PUSH
1917 if (chain && REG_P (chain))
1918 ASM_OUTPUT_REG_POP (file, REGNO (chain));
1919 if (sval && REG_P (sval))
1920 ASM_OUTPUT_REG_POP (file, REGNO (sval));
1921 #endif
1922 }
1923
1924 /* Output assembler code for the end of a function.
1925 For clarity, args are same as those of `final_start_function'
1926 even though not all of them are needed. */
1927
1928 void
1929 final_end_function (void)
1930 {
1931 app_disable ();
1932
1933 if (!DECL_IGNORED_P (current_function_decl))
1934 debug_hooks->end_function (high_function_linenum);
1935
1936 /* Finally, output the function epilogue:
1937 code to restore the stack frame and return to the caller. */
1938 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1939
1940 /* And debug output. */
1941 if (!DECL_IGNORED_P (current_function_decl))
1942 debug_hooks->end_epilogue (last_linenum, last_filename);
1943
1944 if (!dwarf2_debug_info_emitted_p (current_function_decl)
1945 && dwarf2out_do_frame ())
1946 dwarf2out_end_epilogue (last_linenum, last_filename);
1947
1948 some_local_dynamic_name = 0;
1949 }
1950 \f
1951
1952 /* Dumper helper for basic block information. FILE is the assembly
1953 output file, and INSN is the instruction being emitted. */
1954
1955 static void
1956 dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb,
1957 basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
1958 {
1959 basic_block bb;
1960
1961 if (!flag_debug_asm)
1962 return;
1963
1964 if (INSN_UID (insn) < bb_map_size
1965 && (bb = start_to_bb[INSN_UID (insn)]) != NULL)
1966 {
1967 edge e;
1968 edge_iterator ei;
1969
1970 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
1971 if (bb->frequency)
1972 fprintf (file, " freq:%d", bb->frequency);
1973 if (bb->count)
1974 fprintf (file, " count:%" PRId64,
1975 bb->count);
1976 fprintf (file, " seq:%d", (*bb_seqn)++);
1977 fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
1978 FOR_EACH_EDGE (e, ei, bb->preds)
1979 {
1980 dump_edge_info (file, e, TDF_DETAILS, 0);
1981 }
1982 fprintf (file, "\n");
1983 }
1984 if (INSN_UID (insn) < bb_map_size
1985 && (bb = end_to_bb[INSN_UID (insn)]) != NULL)
1986 {
1987 edge e;
1988 edge_iterator ei;
1989
1990 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
1991 FOR_EACH_EDGE (e, ei, bb->succs)
1992 {
1993 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
1994 }
1995 fprintf (file, "\n");
1996 }
1997 }
1998
1999 /* Output assembler code for some insns: all or part of a function.
2000 For description of args, see `final_start_function', above. */
2001
2002 void
2003 final (rtx_insn *first, FILE *file, int optimize_p)
2004 {
2005 rtx_insn *insn, *next;
2006 int seen = 0;
2007
2008 /* Used for -dA dump. */
2009 basic_block *start_to_bb = NULL;
2010 basic_block *end_to_bb = NULL;
2011 int bb_map_size = 0;
2012 int bb_seqn = 0;
2013
2014 last_ignored_compare = 0;
2015
2016 if (HAVE_cc0)
2017 for (insn = first; insn; insn = NEXT_INSN (insn))
2018 {
2019 /* If CC tracking across branches is enabled, record the insn which
2020 jumps to each branch only reached from one place. */
2021 if (optimize_p && JUMP_P (insn))
2022 {
2023 rtx lab = JUMP_LABEL (insn);
2024 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
2025 {
2026 LABEL_REFS (lab) = insn;
2027 }
2028 }
2029 }
2030
2031 init_recog ();
2032
2033 CC_STATUS_INIT;
2034
2035 if (flag_debug_asm)
2036 {
2037 basic_block bb;
2038
2039 bb_map_size = get_max_uid () + 1;
2040 start_to_bb = XCNEWVEC (basic_block, bb_map_size);
2041 end_to_bb = XCNEWVEC (basic_block, bb_map_size);
2042
2043 /* There is no cfg for a thunk. */
2044 if (!cfun->is_thunk)
2045 FOR_EACH_BB_REVERSE_FN (bb, cfun)
2046 {
2047 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
2048 end_to_bb[INSN_UID (BB_END (bb))] = bb;
2049 }
2050 }
2051
2052 /* Output the insns. */
2053 for (insn = first; insn;)
2054 {
2055 if (HAVE_ATTR_length)
2056 {
2057 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
2058 {
2059 /* This can be triggered by bugs elsewhere in the compiler if
2060 new insns are created after init_insn_lengths is called. */
2061 gcc_assert (NOTE_P (insn));
2062 insn_current_address = -1;
2063 }
2064 else
2065 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
2066 }
2067
2068 dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
2069 bb_map_size, &bb_seqn);
2070 insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
2071 }
2072
2073 if (flag_debug_asm)
2074 {
2075 free (start_to_bb);
2076 free (end_to_bb);
2077 }
2078
2079 /* Remove CFI notes, to avoid compare-debug failures. */
2080 for (insn = first; insn; insn = next)
2081 {
2082 next = NEXT_INSN (insn);
2083 if (NOTE_P (insn)
2084 && (NOTE_KIND (insn) == NOTE_INSN_CFI
2085 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
2086 delete_insn (insn);
2087 }
2088 }
2089 \f
2090 const char *
2091 get_insn_template (int code, rtx insn)
2092 {
2093 switch (insn_data[code].output_format)
2094 {
2095 case INSN_OUTPUT_FORMAT_SINGLE:
2096 return insn_data[code].output.single;
2097 case INSN_OUTPUT_FORMAT_MULTI:
2098 return insn_data[code].output.multi[which_alternative];
2099 case INSN_OUTPUT_FORMAT_FUNCTION:
2100 gcc_assert (insn);
2101 return (*insn_data[code].output.function) (recog_data.operand,
2102 as_a <rtx_insn *> (insn));
2103
2104 default:
2105 gcc_unreachable ();
2106 }
2107 }
2108
2109 /* Emit the appropriate declaration for an alternate-entry-point
2110 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
2111 LABEL_KIND != LABEL_NORMAL.
2112
2113 The case fall-through in this function is intentional. */
2114 static void
2115 output_alternate_entry_point (FILE *file, rtx_insn *insn)
2116 {
2117 const char *name = LABEL_NAME (insn);
2118
2119 switch (LABEL_KIND (insn))
2120 {
2121 case LABEL_WEAK_ENTRY:
2122 #ifdef ASM_WEAKEN_LABEL
2123 ASM_WEAKEN_LABEL (file, name);
2124 #endif
2125 case LABEL_GLOBAL_ENTRY:
2126 targetm.asm_out.globalize_label (file, name);
2127 case LABEL_STATIC_ENTRY:
2128 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
2129 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
2130 #endif
2131 ASM_OUTPUT_LABEL (file, name);
2132 break;
2133
2134 case LABEL_NORMAL:
2135 default:
2136 gcc_unreachable ();
2137 }
2138 }
2139
2140 /* Given a CALL_INSN, find and return the nested CALL. */
2141 static rtx
2142 call_from_call_insn (rtx_call_insn *insn)
2143 {
2144 rtx x;
2145 gcc_assert (CALL_P (insn));
2146 x = PATTERN (insn);
2147
2148 while (GET_CODE (x) != CALL)
2149 {
2150 switch (GET_CODE (x))
2151 {
2152 default:
2153 gcc_unreachable ();
2154 case COND_EXEC:
2155 x = COND_EXEC_CODE (x);
2156 break;
2157 case PARALLEL:
2158 x = XVECEXP (x, 0, 0);
2159 break;
2160 case SET:
2161 x = XEXP (x, 1);
2162 break;
2163 }
2164 }
2165 return x;
2166 }
2167
2168 /* The final scan for one insn, INSN.
2169 Args are same as in `final', except that INSN
2170 is the insn being scanned.
2171 Value returned is the next insn to be scanned.
2172
2173 NOPEEPHOLES is the flag to disallow peephole processing (currently
2174 used for within delayed branch sequence output).
2175
2176 SEEN is used to track the end of the prologue, for emitting
2177 debug information. We force the emission of a line note after
2178 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */
2179
2180 rtx_insn *
2181 final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
2182 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
2183 {
2184 #if HAVE_cc0
2185 rtx set;
2186 #endif
2187 rtx_insn *next;
2188
2189 insn_counter++;
2190
2191 /* Ignore deleted insns. These can occur when we split insns (due to a
2192 template of "#") while not optimizing. */
2193 if (insn->deleted ())
2194 return NEXT_INSN (insn);
2195
2196 switch (GET_CODE (insn))
2197 {
2198 case NOTE:
2199 switch (NOTE_KIND (insn))
2200 {
2201 case NOTE_INSN_DELETED:
2202 case NOTE_INSN_UPDATE_SJLJ_CONTEXT:
2203 break;
2204
2205 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
2206 in_cold_section_p = !in_cold_section_p;
2207
2208 if (dwarf2out_do_frame ())
2209 dwarf2out_switch_text_section ();
2210 else if (!DECL_IGNORED_P (current_function_decl))
2211 debug_hooks->switch_text_section ();
2212
2213 switch_to_section (current_function_section ());
2214 targetm.asm_out.function_switched_text_sections (asm_out_file,
2215 current_function_decl,
2216 in_cold_section_p);
2217 /* Emit a label for the split cold section. Form label name by
2218 suffixing "cold" to the original function's name. */
2219 if (in_cold_section_p)
2220 {
2221 cold_function_name
2222 = clone_function_name (current_function_decl, "cold");
2223 #ifdef ASM_DECLARE_COLD_FUNCTION_NAME
2224 ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file,
2225 IDENTIFIER_POINTER
2226 (cold_function_name),
2227 current_function_decl);
2228 #else
2229 ASM_OUTPUT_LABEL (asm_out_file,
2230 IDENTIFIER_POINTER (cold_function_name));
2231 #endif
2232 }
2233 break;
2234
2235 case NOTE_INSN_BASIC_BLOCK:
2236 if (need_profile_function)
2237 {
2238 profile_function (asm_out_file);
2239 need_profile_function = false;
2240 }
2241
2242 if (targetm.asm_out.unwind_emit)
2243 targetm.asm_out.unwind_emit (asm_out_file, insn);
2244
2245 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
2246
2247 break;
2248
2249 case NOTE_INSN_EH_REGION_BEG:
2250 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2251 NOTE_EH_HANDLER (insn));
2252 break;
2253
2254 case NOTE_INSN_EH_REGION_END:
2255 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2256 NOTE_EH_HANDLER (insn));
2257 break;
2258
2259 case NOTE_INSN_PROLOGUE_END:
2260 targetm.asm_out.function_end_prologue (file);
2261 profile_after_prologue (file);
2262
2263 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2264 {
2265 *seen |= SEEN_EMITTED;
2266 force_source_line = true;
2267 }
2268 else
2269 *seen |= SEEN_NOTE;
2270
2271 break;
2272
2273 case NOTE_INSN_EPILOGUE_BEG:
2274 if (!DECL_IGNORED_P (current_function_decl))
2275 (*debug_hooks->begin_epilogue) (last_linenum, last_filename);
2276 targetm.asm_out.function_begin_epilogue (file);
2277 break;
2278
2279 case NOTE_INSN_CFI:
2280 dwarf2out_emit_cfi (NOTE_CFI (insn));
2281 break;
2282
2283 case NOTE_INSN_CFI_LABEL:
2284 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
2285 NOTE_LABEL_NUMBER (insn));
2286 break;
2287
2288 case NOTE_INSN_FUNCTION_BEG:
2289 if (need_profile_function)
2290 {
2291 profile_function (asm_out_file);
2292 need_profile_function = false;
2293 }
2294
2295 app_disable ();
2296 if (!DECL_IGNORED_P (current_function_decl))
2297 debug_hooks->end_prologue (last_linenum, last_filename);
2298
2299 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
2300 {
2301 *seen |= SEEN_EMITTED;
2302 force_source_line = true;
2303 }
2304 else
2305 *seen |= SEEN_NOTE;
2306
2307 break;
2308
2309 case NOTE_INSN_BLOCK_BEG:
2310 if (debug_info_level == DINFO_LEVEL_NORMAL
2311 || debug_info_level == DINFO_LEVEL_VERBOSE
2312 || write_symbols == DWARF2_DEBUG
2313 || write_symbols == VMS_AND_DWARF2_DEBUG
2314 || write_symbols == VMS_DEBUG)
2315 {
2316 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2317
2318 app_disable ();
2319 ++block_depth;
2320 high_block_linenum = last_linenum;
2321
2322 /* Output debugging info about the symbol-block beginning. */
2323 if (!DECL_IGNORED_P (current_function_decl))
2324 debug_hooks->begin_block (last_linenum, n);
2325
2326 /* Mark this block as output. */
2327 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2328 }
2329 if (write_symbols == DBX_DEBUG
2330 || write_symbols == SDB_DEBUG)
2331 {
2332 location_t *locus_ptr
2333 = block_nonartificial_location (NOTE_BLOCK (insn));
2334
2335 if (locus_ptr != NULL)
2336 {
2337 override_filename = LOCATION_FILE (*locus_ptr);
2338 override_linenum = LOCATION_LINE (*locus_ptr);
2339 }
2340 }
2341 break;
2342
2343 case NOTE_INSN_BLOCK_END:
2344 if (debug_info_level == DINFO_LEVEL_NORMAL
2345 || debug_info_level == DINFO_LEVEL_VERBOSE
2346 || write_symbols == DWARF2_DEBUG
2347 || write_symbols == VMS_AND_DWARF2_DEBUG
2348 || write_symbols == VMS_DEBUG)
2349 {
2350 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2351
2352 app_disable ();
2353
2354 /* End of a symbol-block. */
2355 --block_depth;
2356 gcc_assert (block_depth >= 0);
2357
2358 if (!DECL_IGNORED_P (current_function_decl))
2359 debug_hooks->end_block (high_block_linenum, n);
2360 }
2361 if (write_symbols == DBX_DEBUG
2362 || write_symbols == SDB_DEBUG)
2363 {
2364 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
2365 location_t *locus_ptr
2366 = block_nonartificial_location (outer_block);
2367
2368 if (locus_ptr != NULL)
2369 {
2370 override_filename = LOCATION_FILE (*locus_ptr);
2371 override_linenum = LOCATION_LINE (*locus_ptr);
2372 }
2373 else
2374 {
2375 override_filename = NULL;
2376 override_linenum = 0;
2377 }
2378 }
2379 break;
2380
2381 case NOTE_INSN_DELETED_LABEL:
2382 /* Emit the label. We may have deleted the CODE_LABEL because
2383 the label could be proved to be unreachable, though still
2384 referenced (in the form of having its address taken. */
2385 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2386 break;
2387
2388 case NOTE_INSN_DELETED_DEBUG_LABEL:
2389 /* Similarly, but need to use different namespace for it. */
2390 if (CODE_LABEL_NUMBER (insn) != -1)
2391 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
2392 break;
2393
2394 case NOTE_INSN_VAR_LOCATION:
2395 case NOTE_INSN_CALL_ARG_LOCATION:
2396 if (!DECL_IGNORED_P (current_function_decl))
2397 debug_hooks->var_location (insn);
2398 break;
2399
2400 default:
2401 gcc_unreachable ();
2402 break;
2403 }
2404 break;
2405
2406 case BARRIER:
2407 break;
2408
2409 case CODE_LABEL:
2410 /* The target port might emit labels in the output function for
2411 some insn, e.g. sh.c output_branchy_insn. */
2412 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2413 {
2414 int align = LABEL_TO_ALIGNMENT (insn);
2415 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2416 int max_skip = LABEL_TO_MAX_SKIP (insn);
2417 #endif
2418
2419 if (align && NEXT_INSN (insn))
2420 {
2421 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2422 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2423 #else
2424 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
2425 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
2426 #else
2427 ASM_OUTPUT_ALIGN (file, align);
2428 #endif
2429 #endif
2430 }
2431 }
2432 CC_STATUS_INIT;
2433
2434 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
2435 debug_hooks->label (as_a <rtx_code_label *> (insn));
2436
2437 app_disable ();
2438
2439 next = next_nonnote_insn (insn);
2440 /* If this label is followed by a jump-table, make sure we put
2441 the label in the read-only section. Also possibly write the
2442 label and jump table together. */
2443 if (next != 0 && JUMP_TABLE_DATA_P (next))
2444 {
2445 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2446 /* In this case, the case vector is being moved by the
2447 target, so don't output the label at all. Leave that
2448 to the back end macros. */
2449 #else
2450 if (! JUMP_TABLES_IN_TEXT_SECTION)
2451 {
2452 int log_align;
2453
2454 switch_to_section (targetm.asm_out.function_rodata_section
2455 (current_function_decl));
2456
2457 #ifdef ADDR_VEC_ALIGN
2458 log_align = ADDR_VEC_ALIGN (next);
2459 #else
2460 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2461 #endif
2462 ASM_OUTPUT_ALIGN (file, log_align);
2463 }
2464 else
2465 switch_to_section (current_function_section ());
2466
2467 #ifdef ASM_OUTPUT_CASE_LABEL
2468 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2469 next);
2470 #else
2471 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2472 #endif
2473 #endif
2474 break;
2475 }
2476 if (LABEL_ALT_ENTRY_P (insn))
2477 output_alternate_entry_point (file, insn);
2478 else
2479 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
2480 break;
2481
2482 default:
2483 {
2484 rtx body = PATTERN (insn);
2485 int insn_code_number;
2486 const char *templ;
2487 bool is_stmt;
2488
2489 /* Reset this early so it is correct for ASM statements. */
2490 current_insn_predicate = NULL_RTX;
2491
2492 /* An INSN, JUMP_INSN or CALL_INSN.
2493 First check for special kinds that recog doesn't recognize. */
2494
2495 if (GET_CODE (body) == USE /* These are just declarations. */
2496 || GET_CODE (body) == CLOBBER)
2497 break;
2498
2499 #if HAVE_cc0
2500 {
2501 /* If there is a REG_CC_SETTER note on this insn, it means that
2502 the setting of the condition code was done in the delay slot
2503 of the insn that branched here. So recover the cc status
2504 from the insn that set it. */
2505
2506 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2507 if (note)
2508 {
2509 rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0));
2510 NOTICE_UPDATE_CC (PATTERN (other), other);
2511 cc_prev_status = cc_status;
2512 }
2513 }
2514 #endif
2515
2516 /* Detect insns that are really jump-tables
2517 and output them as such. */
2518
2519 if (JUMP_TABLE_DATA_P (insn))
2520 {
2521 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2522 int vlen, idx;
2523 #endif
2524
2525 if (! JUMP_TABLES_IN_TEXT_SECTION)
2526 switch_to_section (targetm.asm_out.function_rodata_section
2527 (current_function_decl));
2528 else
2529 switch_to_section (current_function_section ());
2530
2531 app_disable ();
2532
2533 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2534 if (GET_CODE (body) == ADDR_VEC)
2535 {
2536 #ifdef ASM_OUTPUT_ADDR_VEC
2537 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2538 #else
2539 gcc_unreachable ();
2540 #endif
2541 }
2542 else
2543 {
2544 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2545 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2546 #else
2547 gcc_unreachable ();
2548 #endif
2549 }
2550 #else
2551 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2552 for (idx = 0; idx < vlen; idx++)
2553 {
2554 if (GET_CODE (body) == ADDR_VEC)
2555 {
2556 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2557 ASM_OUTPUT_ADDR_VEC_ELT
2558 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2559 #else
2560 gcc_unreachable ();
2561 #endif
2562 }
2563 else
2564 {
2565 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2566 ASM_OUTPUT_ADDR_DIFF_ELT
2567 (file,
2568 body,
2569 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2570 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2571 #else
2572 gcc_unreachable ();
2573 #endif
2574 }
2575 }
2576 #ifdef ASM_OUTPUT_CASE_END
2577 ASM_OUTPUT_CASE_END (file,
2578 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2579 insn);
2580 #endif
2581 #endif
2582
2583 switch_to_section (current_function_section ());
2584
2585 break;
2586 }
2587 /* Output this line note if it is the first or the last line
2588 note in a row. */
2589 if (!DECL_IGNORED_P (current_function_decl)
2590 && notice_source_line (insn, &is_stmt))
2591 (*debug_hooks->source_line) (last_linenum, last_filename,
2592 last_discriminator, is_stmt);
2593
2594 if (GET_CODE (body) == ASM_INPUT)
2595 {
2596 const char *string = XSTR (body, 0);
2597
2598 /* There's no telling what that did to the condition codes. */
2599 CC_STATUS_INIT;
2600
2601 if (string[0])
2602 {
2603 expanded_location loc;
2604
2605 app_enable ();
2606 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
2607 if (*loc.file && loc.line)
2608 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2609 ASM_COMMENT_START, loc.line, loc.file);
2610 fprintf (asm_out_file, "\t%s\n", string);
2611 #if HAVE_AS_LINE_ZERO
2612 if (*loc.file && loc.line)
2613 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2614 #endif
2615 }
2616 break;
2617 }
2618
2619 /* Detect `asm' construct with operands. */
2620 if (asm_noperands (body) >= 0)
2621 {
2622 unsigned int noperands = asm_noperands (body);
2623 rtx *ops = XALLOCAVEC (rtx, noperands);
2624 const char *string;
2625 location_t loc;
2626 expanded_location expanded;
2627
2628 /* There's no telling what that did to the condition codes. */
2629 CC_STATUS_INIT;
2630
2631 /* Get out the operand values. */
2632 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
2633 /* Inhibit dying on what would otherwise be compiler bugs. */
2634 insn_noperands = noperands;
2635 this_is_asm_operands = insn;
2636 expanded = expand_location (loc);
2637
2638 #ifdef FINAL_PRESCAN_INSN
2639 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2640 #endif
2641
2642 /* Output the insn using them. */
2643 if (string[0])
2644 {
2645 app_enable ();
2646 if (expanded.file && expanded.line)
2647 fprintf (asm_out_file, "%s %i \"%s\" 1\n",
2648 ASM_COMMENT_START, expanded.line, expanded.file);
2649 output_asm_insn (string, ops);
2650 #if HAVE_AS_LINE_ZERO
2651 if (expanded.file && expanded.line)
2652 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
2653 #endif
2654 }
2655
2656 if (targetm.asm_out.final_postscan_insn)
2657 targetm.asm_out.final_postscan_insn (file, insn, ops,
2658 insn_noperands);
2659
2660 this_is_asm_operands = 0;
2661 break;
2662 }
2663
2664 app_disable ();
2665
2666 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body))
2667 {
2668 /* A delayed-branch sequence */
2669 int i;
2670
2671 final_sequence = seq;
2672
2673 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2674 force the restoration of a comparison that was previously
2675 thought unnecessary. If that happens, cancel this sequence
2676 and cause that insn to be restored. */
2677
2678 next = final_scan_insn (seq->insn (0), file, 0, 1, seen);
2679 if (next != seq->insn (1))
2680 {
2681 final_sequence = 0;
2682 return next;
2683 }
2684
2685 for (i = 1; i < seq->len (); i++)
2686 {
2687 rtx_insn *insn = seq->insn (i);
2688 rtx_insn *next = NEXT_INSN (insn);
2689 /* We loop in case any instruction in a delay slot gets
2690 split. */
2691 do
2692 insn = final_scan_insn (insn, file, 0, 1, seen);
2693 while (insn != next);
2694 }
2695 #ifdef DBR_OUTPUT_SEQEND
2696 DBR_OUTPUT_SEQEND (file);
2697 #endif
2698 final_sequence = 0;
2699
2700 /* If the insn requiring the delay slot was a CALL_INSN, the
2701 insns in the delay slot are actually executed before the
2702 called function. Hence we don't preserve any CC-setting
2703 actions in these insns and the CC must be marked as being
2704 clobbered by the function. */
2705 if (CALL_P (seq->insn (0)))
2706 {
2707 CC_STATUS_INIT;
2708 }
2709 break;
2710 }
2711
2712 /* We have a real machine instruction as rtl. */
2713
2714 body = PATTERN (insn);
2715
2716 #if HAVE_cc0
2717 set = single_set (insn);
2718
2719 /* Check for redundant test and compare instructions
2720 (when the condition codes are already set up as desired).
2721 This is done only when optimizing; if not optimizing,
2722 it should be possible for the user to alter a variable
2723 with the debugger in between statements
2724 and the next statement should reexamine the variable
2725 to compute the condition codes. */
2726
2727 if (optimize_p)
2728 {
2729 if (set
2730 && GET_CODE (SET_DEST (set)) == CC0
2731 && insn != last_ignored_compare)
2732 {
2733 rtx src1, src2;
2734 if (GET_CODE (SET_SRC (set)) == SUBREG)
2735 SET_SRC (set) = alter_subreg (&SET_SRC (set), true);
2736
2737 src1 = SET_SRC (set);
2738 src2 = NULL_RTX;
2739 if (GET_CODE (SET_SRC (set)) == COMPARE)
2740 {
2741 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2742 XEXP (SET_SRC (set), 0)
2743 = alter_subreg (&XEXP (SET_SRC (set), 0), true);
2744 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2745 XEXP (SET_SRC (set), 1)
2746 = alter_subreg (&XEXP (SET_SRC (set), 1), true);
2747 if (XEXP (SET_SRC (set), 1)
2748 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
2749 src2 = XEXP (SET_SRC (set), 0);
2750 }
2751 if ((cc_status.value1 != 0
2752 && rtx_equal_p (src1, cc_status.value1))
2753 || (cc_status.value2 != 0
2754 && rtx_equal_p (src1, cc_status.value2))
2755 || (src2 != 0 && cc_status.value1 != 0
2756 && rtx_equal_p (src2, cc_status.value1))
2757 || (src2 != 0 && cc_status.value2 != 0
2758 && rtx_equal_p (src2, cc_status.value2)))
2759 {
2760 /* Don't delete insn if it has an addressing side-effect. */
2761 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2762 /* or if anything in it is volatile. */
2763 && ! volatile_refs_p (PATTERN (insn)))
2764 {
2765 /* We don't really delete the insn; just ignore it. */
2766 last_ignored_compare = insn;
2767 break;
2768 }
2769 }
2770 }
2771 }
2772
2773 /* If this is a conditional branch, maybe modify it
2774 if the cc's are in a nonstandard state
2775 so that it accomplishes the same thing that it would
2776 do straightforwardly if the cc's were set up normally. */
2777
2778 if (cc_status.flags != 0
2779 && JUMP_P (insn)
2780 && GET_CODE (body) == SET
2781 && SET_DEST (body) == pc_rtx
2782 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2783 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2784 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2785 {
2786 /* This function may alter the contents of its argument
2787 and clear some of the cc_status.flags bits.
2788 It may also return 1 meaning condition now always true
2789 or -1 meaning condition now always false
2790 or 2 meaning condition nontrivial but altered. */
2791 int result = alter_cond (XEXP (SET_SRC (body), 0));
2792 /* If condition now has fixed value, replace the IF_THEN_ELSE
2793 with its then-operand or its else-operand. */
2794 if (result == 1)
2795 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2796 if (result == -1)
2797 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2798
2799 /* The jump is now either unconditional or a no-op.
2800 If it has become a no-op, don't try to output it.
2801 (It would not be recognized.) */
2802 if (SET_SRC (body) == pc_rtx)
2803 {
2804 delete_insn (insn);
2805 break;
2806 }
2807 else if (ANY_RETURN_P (SET_SRC (body)))
2808 /* Replace (set (pc) (return)) with (return). */
2809 PATTERN (insn) = body = SET_SRC (body);
2810
2811 /* Rerecognize the instruction if it has changed. */
2812 if (result != 0)
2813 INSN_CODE (insn) = -1;
2814 }
2815
2816 /* If this is a conditional trap, maybe modify it if the cc's
2817 are in a nonstandard state so that it accomplishes the same
2818 thing that it would do straightforwardly if the cc's were
2819 set up normally. */
2820 if (cc_status.flags != 0
2821 && NONJUMP_INSN_P (insn)
2822 && GET_CODE (body) == TRAP_IF
2823 && COMPARISON_P (TRAP_CONDITION (body))
2824 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
2825 {
2826 /* This function may alter the contents of its argument
2827 and clear some of the cc_status.flags bits.
2828 It may also return 1 meaning condition now always true
2829 or -1 meaning condition now always false
2830 or 2 meaning condition nontrivial but altered. */
2831 int result = alter_cond (TRAP_CONDITION (body));
2832
2833 /* If TRAP_CONDITION has become always false, delete the
2834 instruction. */
2835 if (result == -1)
2836 {
2837 delete_insn (insn);
2838 break;
2839 }
2840
2841 /* If TRAP_CONDITION has become always true, replace
2842 TRAP_CONDITION with const_true_rtx. */
2843 if (result == 1)
2844 TRAP_CONDITION (body) = const_true_rtx;
2845
2846 /* Rerecognize the instruction if it has changed. */
2847 if (result != 0)
2848 INSN_CODE (insn) = -1;
2849 }
2850
2851 /* Make same adjustments to instructions that examine the
2852 condition codes without jumping and instructions that
2853 handle conditional moves (if this machine has either one). */
2854
2855 if (cc_status.flags != 0
2856 && set != 0)
2857 {
2858 rtx cond_rtx, then_rtx, else_rtx;
2859
2860 if (!JUMP_P (insn)
2861 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2862 {
2863 cond_rtx = XEXP (SET_SRC (set), 0);
2864 then_rtx = XEXP (SET_SRC (set), 1);
2865 else_rtx = XEXP (SET_SRC (set), 2);
2866 }
2867 else
2868 {
2869 cond_rtx = SET_SRC (set);
2870 then_rtx = const_true_rtx;
2871 else_rtx = const0_rtx;
2872 }
2873
2874 if (COMPARISON_P (cond_rtx)
2875 && XEXP (cond_rtx, 0) == cc0_rtx)
2876 {
2877 int result;
2878 result = alter_cond (cond_rtx);
2879 if (result == 1)
2880 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2881 else if (result == -1)
2882 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2883 else if (result == 2)
2884 INSN_CODE (insn) = -1;
2885 if (SET_DEST (set) == SET_SRC (set))
2886 delete_insn (insn);
2887 }
2888 }
2889
2890 #endif
2891
2892 /* Do machine-specific peephole optimizations if desired. */
2893
2894 if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes)
2895 {
2896 rtx_insn *next = peephole (insn);
2897 /* When peepholing, if there were notes within the peephole,
2898 emit them before the peephole. */
2899 if (next != 0 && next != NEXT_INSN (insn))
2900 {
2901 rtx_insn *note, *prev = PREV_INSN (insn);
2902
2903 for (note = NEXT_INSN (insn); note != next;
2904 note = NEXT_INSN (note))
2905 final_scan_insn (note, file, optimize_p, nopeepholes, seen);
2906
2907 /* Put the notes in the proper position for a later
2908 rescan. For example, the SH target can do this
2909 when generating a far jump in a delayed branch
2910 sequence. */
2911 note = NEXT_INSN (insn);
2912 SET_PREV_INSN (note) = prev;
2913 SET_NEXT_INSN (prev) = note;
2914 SET_NEXT_INSN (PREV_INSN (next)) = insn;
2915 SET_PREV_INSN (insn) = PREV_INSN (next);
2916 SET_NEXT_INSN (insn) = next;
2917 SET_PREV_INSN (next) = insn;
2918 }
2919
2920 /* PEEPHOLE might have changed this. */
2921 body = PATTERN (insn);
2922 }
2923
2924 /* Try to recognize the instruction.
2925 If successful, verify that the operands satisfy the
2926 constraints for the instruction. Crash if they don't,
2927 since `reload' should have changed them so that they do. */
2928
2929 insn_code_number = recog_memoized (insn);
2930 cleanup_subreg_operands (insn);
2931
2932 /* Dump the insn in the assembly for debugging (-dAP).
2933 If the final dump is requested as slim RTL, dump slim
2934 RTL to the assembly file also. */
2935 if (flag_dump_rtl_in_asm)
2936 {
2937 print_rtx_head = ASM_COMMENT_START;
2938 if (! (dump_flags & TDF_SLIM))
2939 print_rtl_single (asm_out_file, insn);
2940 else
2941 dump_insn_slim (asm_out_file, insn);
2942 print_rtx_head = "";
2943 }
2944
2945 if (! constrain_operands_cached (insn, 1))
2946 fatal_insn_not_found (insn);
2947
2948 /* Some target machines need to prescan each insn before
2949 it is output. */
2950
2951 #ifdef FINAL_PRESCAN_INSN
2952 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2953 #endif
2954
2955 if (targetm.have_conditional_execution ()
2956 && GET_CODE (PATTERN (insn)) == COND_EXEC)
2957 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2958
2959 #if HAVE_cc0
2960 cc_prev_status = cc_status;
2961
2962 /* Update `cc_status' for this instruction.
2963 The instruction's output routine may change it further.
2964 If the output routine for a jump insn needs to depend
2965 on the cc status, it should look at cc_prev_status. */
2966
2967 NOTICE_UPDATE_CC (body, insn);
2968 #endif
2969
2970 current_output_insn = debug_insn = insn;
2971
2972 /* Find the proper template for this insn. */
2973 templ = get_insn_template (insn_code_number, insn);
2974
2975 /* If the C code returns 0, it means that it is a jump insn
2976 which follows a deleted test insn, and that test insn
2977 needs to be reinserted. */
2978 if (templ == 0)
2979 {
2980 rtx_insn *prev;
2981
2982 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2983
2984 /* We have already processed the notes between the setter and
2985 the user. Make sure we don't process them again, this is
2986 particularly important if one of the notes is a block
2987 scope note or an EH note. */
2988 for (prev = insn;
2989 prev != last_ignored_compare;
2990 prev = PREV_INSN (prev))
2991 {
2992 if (NOTE_P (prev))
2993 delete_insn (prev); /* Use delete_note. */
2994 }
2995
2996 return prev;
2997 }
2998
2999 /* If the template is the string "#", it means that this insn must
3000 be split. */
3001 if (templ[0] == '#' && templ[1] == '\0')
3002 {
3003 rtx_insn *new_rtx = try_split (body, insn, 0);
3004
3005 /* If we didn't split the insn, go away. */
3006 if (new_rtx == insn && PATTERN (new_rtx) == body)
3007 fatal_insn ("could not split insn", insn);
3008
3009 /* If we have a length attribute, this instruction should have
3010 been split in shorten_branches, to ensure that we would have
3011 valid length info for the splitees. */
3012 gcc_assert (!HAVE_ATTR_length);
3013
3014 return new_rtx;
3015 }
3016
3017 /* ??? This will put the directives in the wrong place if
3018 get_insn_template outputs assembly directly. However calling it
3019 before get_insn_template breaks if the insns is split. */
3020 if (targetm.asm_out.unwind_emit_before_insn
3021 && targetm.asm_out.unwind_emit)
3022 targetm.asm_out.unwind_emit (asm_out_file, insn);
3023
3024 if (rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn))
3025 {
3026 rtx x = call_from_call_insn (call_insn);
3027 x = XEXP (x, 0);
3028 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
3029 {
3030 tree t;
3031 x = XEXP (x, 0);
3032 t = SYMBOL_REF_DECL (x);
3033 if (t)
3034 assemble_external (t);
3035 }
3036 if (!DECL_IGNORED_P (current_function_decl))
3037 debug_hooks->var_location (insn);
3038 }
3039
3040 /* Output assembler code from the template. */
3041 output_asm_insn (templ, recog_data.operand);
3042
3043 /* Some target machines need to postscan each insn after
3044 it is output. */
3045 if (targetm.asm_out.final_postscan_insn)
3046 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
3047 recog_data.n_operands);
3048
3049 if (!targetm.asm_out.unwind_emit_before_insn
3050 && targetm.asm_out.unwind_emit)
3051 targetm.asm_out.unwind_emit (asm_out_file, insn);
3052
3053 current_output_insn = debug_insn = 0;
3054 }
3055 }
3056 return NEXT_INSN (insn);
3057 }
3058 \f
3059 /* Return whether a source line note needs to be emitted before INSN.
3060 Sets IS_STMT to TRUE if the line should be marked as a possible
3061 breakpoint location. */
3062
3063 static bool
3064 notice_source_line (rtx_insn *insn, bool *is_stmt)
3065 {
3066 const char *filename;
3067 int linenum;
3068
3069 if (override_filename)
3070 {
3071 filename = override_filename;
3072 linenum = override_linenum;
3073 }
3074 else if (INSN_HAS_LOCATION (insn))
3075 {
3076 expanded_location xloc = insn_location (insn);
3077 filename = xloc.file;
3078 linenum = xloc.line;
3079 }
3080 else
3081 {
3082 filename = NULL;
3083 linenum = 0;
3084 }
3085
3086 if (filename == NULL)
3087 return false;
3088
3089 if (force_source_line
3090 || filename != last_filename
3091 || last_linenum != linenum)
3092 {
3093 force_source_line = false;
3094 last_filename = filename;
3095 last_linenum = linenum;
3096 last_discriminator = discriminator;
3097 *is_stmt = true;
3098 high_block_linenum = MAX (last_linenum, high_block_linenum);
3099 high_function_linenum = MAX (last_linenum, high_function_linenum);
3100 return true;
3101 }
3102
3103 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
3104 {
3105 /* If the discriminator changed, but the line number did not,
3106 output the line table entry with is_stmt false so the
3107 debugger does not treat this as a breakpoint location. */
3108 last_discriminator = discriminator;
3109 *is_stmt = false;
3110 return true;
3111 }
3112
3113 return false;
3114 }
3115 \f
3116 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
3117 directly to the desired hard register. */
3118
3119 void
3120 cleanup_subreg_operands (rtx_insn *insn)
3121 {
3122 int i;
3123 bool changed = false;
3124 extract_insn_cached (insn);
3125 for (i = 0; i < recog_data.n_operands; i++)
3126 {
3127 /* The following test cannot use recog_data.operand when testing
3128 for a SUBREG: the underlying object might have been changed
3129 already if we are inside a match_operator expression that
3130 matches the else clause. Instead we test the underlying
3131 expression directly. */
3132 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
3133 {
3134 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true);
3135 changed = true;
3136 }
3137 else if (GET_CODE (recog_data.operand[i]) == PLUS
3138 || GET_CODE (recog_data.operand[i]) == MULT
3139 || MEM_P (recog_data.operand[i]))
3140 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
3141 }
3142
3143 for (i = 0; i < recog_data.n_dups; i++)
3144 {
3145 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
3146 {
3147 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true);
3148 changed = true;
3149 }
3150 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
3151 || GET_CODE (*recog_data.dup_loc[i]) == MULT
3152 || MEM_P (*recog_data.dup_loc[i]))
3153 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
3154 }
3155 if (changed)
3156 df_insn_rescan (insn);
3157 }
3158
3159 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on
3160 the thing it is a subreg of. Do it anyway if FINAL_P. */
3161
3162 rtx
3163 alter_subreg (rtx *xp, bool final_p)
3164 {
3165 rtx x = *xp;
3166 rtx y = SUBREG_REG (x);
3167
3168 /* simplify_subreg does not remove subreg from volatile references.
3169 We are required to. */
3170 if (MEM_P (y))
3171 {
3172 int offset = SUBREG_BYTE (x);
3173
3174 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
3175 contains 0 instead of the proper offset. See simplify_subreg. */
3176 if (offset == 0
3177 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
3178 {
3179 int difference = GET_MODE_SIZE (GET_MODE (y))
3180 - GET_MODE_SIZE (GET_MODE (x));
3181 if (WORDS_BIG_ENDIAN)
3182 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3183 if (BYTES_BIG_ENDIAN)
3184 offset += difference % UNITS_PER_WORD;
3185 }
3186
3187 if (final_p)
3188 *xp = adjust_address (y, GET_MODE (x), offset);
3189 else
3190 *xp = adjust_address_nv (y, GET_MODE (x), offset);
3191 }
3192 else if (REG_P (y) && HARD_REGISTER_P (y))
3193 {
3194 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
3195 SUBREG_BYTE (x));
3196
3197 if (new_rtx != 0)
3198 *xp = new_rtx;
3199 else if (final_p && REG_P (y))
3200 {
3201 /* Simplify_subreg can't handle some REG cases, but we have to. */
3202 unsigned int regno;
3203 HOST_WIDE_INT offset;
3204
3205 regno = subreg_regno (x);
3206 if (subreg_lowpart_p (x))
3207 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
3208 else
3209 offset = SUBREG_BYTE (x);
3210 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
3211 }
3212 }
3213
3214 return *xp;
3215 }
3216
3217 /* Do alter_subreg on all the SUBREGs contained in X. */
3218
3219 static rtx
3220 walk_alter_subreg (rtx *xp, bool *changed)
3221 {
3222 rtx x = *xp;
3223 switch (GET_CODE (x))
3224 {
3225 case PLUS:
3226 case MULT:
3227 case AND:
3228 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3229 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
3230 break;
3231
3232 case MEM:
3233 case ZERO_EXTEND:
3234 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
3235 break;
3236
3237 case SUBREG:
3238 *changed = true;
3239 return alter_subreg (xp, true);
3240
3241 default:
3242 break;
3243 }
3244
3245 return *xp;
3246 }
3247 \f
3248 #if HAVE_cc0
3249
3250 /* Given BODY, the body of a jump instruction, alter the jump condition
3251 as required by the bits that are set in cc_status.flags.
3252 Not all of the bits there can be handled at this level in all cases.
3253
3254 The value is normally 0.
3255 1 means that the condition has become always true.
3256 -1 means that the condition has become always false.
3257 2 means that COND has been altered. */
3258
3259 static int
3260 alter_cond (rtx cond)
3261 {
3262 int value = 0;
3263
3264 if (cc_status.flags & CC_REVERSED)
3265 {
3266 value = 2;
3267 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
3268 }
3269
3270 if (cc_status.flags & CC_INVERTED)
3271 {
3272 value = 2;
3273 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
3274 }
3275
3276 if (cc_status.flags & CC_NOT_POSITIVE)
3277 switch (GET_CODE (cond))
3278 {
3279 case LE:
3280 case LEU:
3281 case GEU:
3282 /* Jump becomes unconditional. */
3283 return 1;
3284
3285 case GT:
3286 case GTU:
3287 case LTU:
3288 /* Jump becomes no-op. */
3289 return -1;
3290
3291 case GE:
3292 PUT_CODE (cond, EQ);
3293 value = 2;
3294 break;
3295
3296 case LT:
3297 PUT_CODE (cond, NE);
3298 value = 2;
3299 break;
3300
3301 default:
3302 break;
3303 }
3304
3305 if (cc_status.flags & CC_NOT_NEGATIVE)
3306 switch (GET_CODE (cond))
3307 {
3308 case GE:
3309 case GEU:
3310 /* Jump becomes unconditional. */
3311 return 1;
3312
3313 case LT:
3314 case LTU:
3315 /* Jump becomes no-op. */
3316 return -1;
3317
3318 case LE:
3319 case LEU:
3320 PUT_CODE (cond, EQ);
3321 value = 2;
3322 break;
3323
3324 case GT:
3325 case GTU:
3326 PUT_CODE (cond, NE);
3327 value = 2;
3328 break;
3329
3330 default:
3331 break;
3332 }
3333
3334 if (cc_status.flags & CC_NO_OVERFLOW)
3335 switch (GET_CODE (cond))
3336 {
3337 case GEU:
3338 /* Jump becomes unconditional. */
3339 return 1;
3340
3341 case LEU:
3342 PUT_CODE (cond, EQ);
3343 value = 2;
3344 break;
3345
3346 case GTU:
3347 PUT_CODE (cond, NE);
3348 value = 2;
3349 break;
3350
3351 case LTU:
3352 /* Jump becomes no-op. */
3353 return -1;
3354
3355 default:
3356 break;
3357 }
3358
3359 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3360 switch (GET_CODE (cond))
3361 {
3362 default:
3363 gcc_unreachable ();
3364
3365 case NE:
3366 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3367 value = 2;
3368 break;
3369
3370 case EQ:
3371 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3372 value = 2;
3373 break;
3374 }
3375
3376 if (cc_status.flags & CC_NOT_SIGNED)
3377 /* The flags are valid if signed condition operators are converted
3378 to unsigned. */
3379 switch (GET_CODE (cond))
3380 {
3381 case LE:
3382 PUT_CODE (cond, LEU);
3383 value = 2;
3384 break;
3385
3386 case LT:
3387 PUT_CODE (cond, LTU);
3388 value = 2;
3389 break;
3390
3391 case GT:
3392 PUT_CODE (cond, GTU);
3393 value = 2;
3394 break;
3395
3396 case GE:
3397 PUT_CODE (cond, GEU);
3398 value = 2;
3399 break;
3400
3401 default:
3402 break;
3403 }
3404
3405 return value;
3406 }
3407 #endif
3408 \f
3409 /* Report inconsistency between the assembler template and the operands.
3410 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3411
3412 void
3413 output_operand_lossage (const char *cmsgid, ...)
3414 {
3415 char *fmt_string;
3416 char *new_message;
3417 const char *pfx_str;
3418 va_list ap;
3419
3420 va_start (ap, cmsgid);
3421
3422 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
3423 fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid));
3424 new_message = xvasprintf (fmt_string, ap);
3425
3426 if (this_is_asm_operands)
3427 error_for_asm (this_is_asm_operands, "%s", new_message);
3428 else
3429 internal_error ("%s", new_message);
3430
3431 free (fmt_string);
3432 free (new_message);
3433 va_end (ap);
3434 }
3435 \f
3436 /* Output of assembler code from a template, and its subroutines. */
3437
3438 /* Annotate the assembly with a comment describing the pattern and
3439 alternative used. */
3440
3441 static void
3442 output_asm_name (void)
3443 {
3444 if (debug_insn)
3445 {
3446 int num = INSN_CODE (debug_insn);
3447 fprintf (asm_out_file, "\t%s %d\t%s",
3448 ASM_COMMENT_START, INSN_UID (debug_insn),
3449 insn_data[num].name);
3450 if (insn_data[num].n_alternatives > 1)
3451 fprintf (asm_out_file, "/%d", which_alternative + 1);
3452
3453 if (HAVE_ATTR_length)
3454 fprintf (asm_out_file, "\t[length = %d]",
3455 get_attr_length (debug_insn));
3456
3457 /* Clear this so only the first assembler insn
3458 of any rtl insn will get the special comment for -dp. */
3459 debug_insn = 0;
3460 }
3461 }
3462
3463 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3464 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3465 corresponds to the address of the object and 0 if to the object. */
3466
3467 static tree
3468 get_mem_expr_from_op (rtx op, int *paddressp)
3469 {
3470 tree expr;
3471 int inner_addressp;
3472
3473 *paddressp = 0;
3474
3475 if (REG_P (op))
3476 return REG_EXPR (op);
3477 else if (!MEM_P (op))
3478 return 0;
3479
3480 if (MEM_EXPR (op) != 0)
3481 return MEM_EXPR (op);
3482
3483 /* Otherwise we have an address, so indicate it and look at the address. */
3484 *paddressp = 1;
3485 op = XEXP (op, 0);
3486
3487 /* First check if we have a decl for the address, then look at the right side
3488 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3489 But don't allow the address to itself be indirect. */
3490 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3491 return expr;
3492 else if (GET_CODE (op) == PLUS
3493 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3494 return expr;
3495
3496 while (UNARY_P (op)
3497 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
3498 op = XEXP (op, 0);
3499
3500 expr = get_mem_expr_from_op (op, &inner_addressp);
3501 return inner_addressp ? 0 : expr;
3502 }
3503
3504 /* Output operand names for assembler instructions. OPERANDS is the
3505 operand vector, OPORDER is the order to write the operands, and NOPS
3506 is the number of operands to write. */
3507
3508 static void
3509 output_asm_operand_names (rtx *operands, int *oporder, int nops)
3510 {
3511 int wrote = 0;
3512 int i;
3513
3514 for (i = 0; i < nops; i++)
3515 {
3516 int addressp;
3517 rtx op = operands[oporder[i]];
3518 tree expr = get_mem_expr_from_op (op, &addressp);
3519
3520 fprintf (asm_out_file, "%c%s",
3521 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
3522 wrote = 1;
3523 if (expr)
3524 {
3525 fprintf (asm_out_file, "%s",
3526 addressp ? "*" : "");
3527 print_mem_expr (asm_out_file, expr);
3528 wrote = 1;
3529 }
3530 else if (REG_P (op) && ORIGINAL_REGNO (op)
3531 && ORIGINAL_REGNO (op) != REGNO (op))
3532 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
3533 }
3534 }
3535
3536 #ifdef ASSEMBLER_DIALECT
3537 /* Helper function to parse assembler dialects in the asm string.
3538 This is called from output_asm_insn and asm_fprintf. */
3539 static const char *
3540 do_assembler_dialects (const char *p, int *dialect)
3541 {
3542 char c = *(p - 1);
3543
3544 switch (c)
3545 {
3546 case '{':
3547 {
3548 int i;
3549
3550 if (*dialect)
3551 output_operand_lossage ("nested assembly dialect alternatives");
3552 else
3553 *dialect = 1;
3554
3555 /* If we want the first dialect, do nothing. Otherwise, skip
3556 DIALECT_NUMBER of strings ending with '|'. */
3557 for (i = 0; i < dialect_number; i++)
3558 {
3559 while (*p && *p != '}')
3560 {
3561 if (*p == '|')
3562 {
3563 p++;
3564 break;
3565 }
3566
3567 /* Skip over any character after a percent sign. */
3568 if (*p == '%')
3569 p++;
3570 if (*p)
3571 p++;
3572 }
3573
3574 if (*p == '}')
3575 break;
3576 }
3577
3578 if (*p == '\0')
3579 output_operand_lossage ("unterminated assembly dialect alternative");
3580 }
3581 break;
3582
3583 case '|':
3584 if (*dialect)
3585 {
3586 /* Skip to close brace. */
3587 do
3588 {
3589 if (*p == '\0')
3590 {
3591 output_operand_lossage ("unterminated assembly dialect alternative");
3592 break;
3593 }
3594
3595 /* Skip over any character after a percent sign. */
3596 if (*p == '%' && p[1])
3597 {
3598 p += 2;
3599 continue;
3600 }
3601
3602 if (*p++ == '}')
3603 break;
3604 }
3605 while (1);
3606
3607 *dialect = 0;
3608 }
3609 else
3610 putc (c, asm_out_file);
3611 break;
3612
3613 case '}':
3614 if (! *dialect)
3615 putc (c, asm_out_file);
3616 *dialect = 0;
3617 break;
3618 default:
3619 gcc_unreachable ();
3620 }
3621
3622 return p;
3623 }
3624 #endif
3625
3626 /* Output text from TEMPLATE to the assembler output file,
3627 obeying %-directions to substitute operands taken from
3628 the vector OPERANDS.
3629
3630 %N (for N a digit) means print operand N in usual manner.
3631 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3632 and print the label name with no punctuation.
3633 %cN means require operand N to be a constant
3634 and print the constant expression with no punctuation.
3635 %aN means expect operand N to be a memory address
3636 (not a memory reference!) and print a reference
3637 to that address.
3638 %nN means expect operand N to be a constant
3639 and print a constant expression for minus the value
3640 of the operand, with no other punctuation. */
3641
3642 void
3643 output_asm_insn (const char *templ, rtx *operands)
3644 {
3645 const char *p;
3646 int c;
3647 #ifdef ASSEMBLER_DIALECT
3648 int dialect = 0;
3649 #endif
3650 int oporder[MAX_RECOG_OPERANDS];
3651 char opoutput[MAX_RECOG_OPERANDS];
3652 int ops = 0;
3653
3654 /* An insn may return a null string template
3655 in a case where no assembler code is needed. */
3656 if (*templ == 0)
3657 return;
3658
3659 memset (opoutput, 0, sizeof opoutput);
3660 p = templ;
3661 putc ('\t', asm_out_file);
3662
3663 #ifdef ASM_OUTPUT_OPCODE
3664 ASM_OUTPUT_OPCODE (asm_out_file, p);
3665 #endif
3666
3667 while ((c = *p++))
3668 switch (c)
3669 {
3670 case '\n':
3671 if (flag_verbose_asm)
3672 output_asm_operand_names (operands, oporder, ops);
3673 if (flag_print_asm_name)
3674 output_asm_name ();
3675
3676 ops = 0;
3677 memset (opoutput, 0, sizeof opoutput);
3678
3679 putc (c, asm_out_file);
3680 #ifdef ASM_OUTPUT_OPCODE
3681 while ((c = *p) == '\t')
3682 {
3683 putc (c, asm_out_file);
3684 p++;
3685 }
3686 ASM_OUTPUT_OPCODE (asm_out_file, p);
3687 #endif
3688 break;
3689
3690 #ifdef ASSEMBLER_DIALECT
3691 case '{':
3692 case '}':
3693 case '|':
3694 p = do_assembler_dialects (p, &dialect);
3695 break;
3696 #endif
3697
3698 case '%':
3699 /* %% outputs a single %. %{, %} and %| print {, } and | respectively
3700 if ASSEMBLER_DIALECT defined and these characters have a special
3701 meaning as dialect delimiters.*/
3702 if (*p == '%'
3703 #ifdef ASSEMBLER_DIALECT
3704 || *p == '{' || *p == '}' || *p == '|'
3705 #endif
3706 )
3707 {
3708 putc (*p, asm_out_file);
3709 p++;
3710 }
3711 /* %= outputs a number which is unique to each insn in the entire
3712 compilation. This is useful for making local labels that are
3713 referred to more than once in a given insn. */
3714 else if (*p == '=')
3715 {
3716 p++;
3717 fprintf (asm_out_file, "%d", insn_counter);
3718 }
3719 /* % followed by a letter and some digits
3720 outputs an operand in a special way depending on the letter.
3721 Letters `acln' are implemented directly.
3722 Other letters are passed to `output_operand' so that
3723 the TARGET_PRINT_OPERAND hook can define them. */
3724 else if (ISALPHA (*p))
3725 {
3726 int letter = *p++;
3727 unsigned long opnum;
3728 char *endptr;
3729
3730 opnum = strtoul (p, &endptr, 10);
3731
3732 if (endptr == p)
3733 output_operand_lossage ("operand number missing "
3734 "after %%-letter");
3735 else if (this_is_asm_operands && opnum >= insn_noperands)
3736 output_operand_lossage ("operand number out of range");
3737 else if (letter == 'l')
3738 output_asm_label (operands[opnum]);
3739 else if (letter == 'a')
3740 output_address (operands[opnum]);
3741 else if (letter == 'c')
3742 {
3743 if (CONSTANT_ADDRESS_P (operands[opnum]))
3744 output_addr_const (asm_out_file, operands[opnum]);
3745 else
3746 output_operand (operands[opnum], 'c');
3747 }
3748 else if (letter == 'n')
3749 {
3750 if (CONST_INT_P (operands[opnum]))
3751 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3752 - INTVAL (operands[opnum]));
3753 else
3754 {
3755 putc ('-', asm_out_file);
3756 output_addr_const (asm_out_file, operands[opnum]);
3757 }
3758 }
3759 else
3760 output_operand (operands[opnum], letter);
3761
3762 if (!opoutput[opnum])
3763 oporder[ops++] = opnum;
3764 opoutput[opnum] = 1;
3765
3766 p = endptr;
3767 c = *p;
3768 }
3769 /* % followed by a digit outputs an operand the default way. */
3770 else if (ISDIGIT (*p))
3771 {
3772 unsigned long opnum;
3773 char *endptr;
3774
3775 opnum = strtoul (p, &endptr, 10);
3776 if (this_is_asm_operands && opnum >= insn_noperands)
3777 output_operand_lossage ("operand number out of range");
3778 else
3779 output_operand (operands[opnum], 0);
3780
3781 if (!opoutput[opnum])
3782 oporder[ops++] = opnum;
3783 opoutput[opnum] = 1;
3784
3785 p = endptr;
3786 c = *p;
3787 }
3788 /* % followed by punctuation: output something for that
3789 punctuation character alone, with no operand. The
3790 TARGET_PRINT_OPERAND hook decides what is actually done. */
3791 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
3792 output_operand (NULL_RTX, *p++);
3793 else
3794 output_operand_lossage ("invalid %%-code");
3795 break;
3796
3797 default:
3798 putc (c, asm_out_file);
3799 }
3800
3801 /* Write out the variable names for operands, if we know them. */
3802 if (flag_verbose_asm)
3803 output_asm_operand_names (operands, oporder, ops);
3804 if (flag_print_asm_name)
3805 output_asm_name ();
3806
3807 putc ('\n', asm_out_file);
3808 }
3809 \f
3810 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3811
3812 void
3813 output_asm_label (rtx x)
3814 {
3815 char buf[256];
3816
3817 if (GET_CODE (x) == LABEL_REF)
3818 x = LABEL_REF_LABEL (x);
3819 if (LABEL_P (x)
3820 || (NOTE_P (x)
3821 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
3822 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3823 else
3824 output_operand_lossage ("'%%l' operand isn't a label");
3825
3826 assemble_name (asm_out_file, buf);
3827 }
3828
3829 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
3830
3831 void
3832 mark_symbol_refs_as_used (rtx x)
3833 {
3834 subrtx_iterator::array_type array;
3835 FOR_EACH_SUBRTX (iter, array, x, ALL)
3836 {
3837 const_rtx x = *iter;
3838 if (GET_CODE (x) == SYMBOL_REF)
3839 if (tree t = SYMBOL_REF_DECL (x))
3840 assemble_external (t);
3841 }
3842 }
3843
3844 /* Print operand X using machine-dependent assembler syntax.
3845 CODE is a non-digit that preceded the operand-number in the % spec,
3846 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3847 between the % and the digits.
3848 When CODE is a non-letter, X is 0.
3849
3850 The meanings of the letters are machine-dependent and controlled
3851 by TARGET_PRINT_OPERAND. */
3852
3853 void
3854 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3855 {
3856 if (x && GET_CODE (x) == SUBREG)
3857 x = alter_subreg (&x, true);
3858
3859 /* X must not be a pseudo reg. */
3860 if (!targetm.no_register_allocation)
3861 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3862
3863 targetm.asm_out.print_operand (asm_out_file, x, code);
3864
3865 if (x == NULL_RTX)
3866 return;
3867
3868 mark_symbol_refs_as_used (x);
3869 }
3870
3871 /* Print a memory reference operand for address X using
3872 machine-dependent assembler syntax. */
3873
3874 void
3875 output_address (rtx x)
3876 {
3877 bool changed = false;
3878 walk_alter_subreg (&x, &changed);
3879 targetm.asm_out.print_operand_address (asm_out_file, x);
3880 }
3881 \f
3882 /* Print an integer constant expression in assembler syntax.
3883 Addition and subtraction are the only arithmetic
3884 that may appear in these expressions. */
3885
3886 void
3887 output_addr_const (FILE *file, rtx x)
3888 {
3889 char buf[256];
3890
3891 restart:
3892 switch (GET_CODE (x))
3893 {
3894 case PC:
3895 putc ('.', file);
3896 break;
3897
3898 case SYMBOL_REF:
3899 if (SYMBOL_REF_DECL (x))
3900 assemble_external (SYMBOL_REF_DECL (x));
3901 #ifdef ASM_OUTPUT_SYMBOL_REF
3902 ASM_OUTPUT_SYMBOL_REF (file, x);
3903 #else
3904 assemble_name (file, XSTR (x, 0));
3905 #endif
3906 break;
3907
3908 case LABEL_REF:
3909 x = LABEL_REF_LABEL (x);
3910 /* Fall through. */
3911 case CODE_LABEL:
3912 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3913 #ifdef ASM_OUTPUT_LABEL_REF
3914 ASM_OUTPUT_LABEL_REF (file, buf);
3915 #else
3916 assemble_name (file, buf);
3917 #endif
3918 break;
3919
3920 case CONST_INT:
3921 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3922 break;
3923
3924 case CONST:
3925 /* This used to output parentheses around the expression,
3926 but that does not work on the 386 (either ATT or BSD assembler). */
3927 output_addr_const (file, XEXP (x, 0));
3928 break;
3929
3930 case CONST_WIDE_INT:
3931 /* We do not know the mode here so we have to use a round about
3932 way to build a wide-int to get it printed properly. */
3933 {
3934 wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0),
3935 CONST_WIDE_INT_NUNITS (x),
3936 CONST_WIDE_INT_NUNITS (x)
3937 * HOST_BITS_PER_WIDE_INT,
3938 false);
3939 print_decs (w, file);
3940 }
3941 break;
3942
3943 case CONST_DOUBLE:
3944 if (CONST_DOUBLE_AS_INT_P (x))
3945 {
3946 /* We can use %d if the number is one word and positive. */
3947 if (CONST_DOUBLE_HIGH (x))
3948 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3949 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
3950 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3951 else if (CONST_DOUBLE_LOW (x) < 0)
3952 fprintf (file, HOST_WIDE_INT_PRINT_HEX,
3953 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
3954 else
3955 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3956 }
3957 else
3958 /* We can't handle floating point constants;
3959 PRINT_OPERAND must handle them. */
3960 output_operand_lossage ("floating constant misused");
3961 break;
3962
3963 case CONST_FIXED:
3964 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
3965 break;
3966
3967 case PLUS:
3968 /* Some assemblers need integer constants to appear last (eg masm). */
3969 if (CONST_INT_P (XEXP (x, 0)))
3970 {
3971 output_addr_const (file, XEXP (x, 1));
3972 if (INTVAL (XEXP (x, 0)) >= 0)
3973 fprintf (file, "+");
3974 output_addr_const (file, XEXP (x, 0));
3975 }
3976 else
3977 {
3978 output_addr_const (file, XEXP (x, 0));
3979 if (!CONST_INT_P (XEXP (x, 1))
3980 || INTVAL (XEXP (x, 1)) >= 0)
3981 fprintf (file, "+");
3982 output_addr_const (file, XEXP (x, 1));
3983 }
3984 break;
3985
3986 case MINUS:
3987 /* Avoid outputting things like x-x or x+5-x,
3988 since some assemblers can't handle that. */
3989 x = simplify_subtraction (x);
3990 if (GET_CODE (x) != MINUS)
3991 goto restart;
3992
3993 output_addr_const (file, XEXP (x, 0));
3994 fprintf (file, "-");
3995 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
3996 || GET_CODE (XEXP (x, 1)) == PC
3997 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3998 output_addr_const (file, XEXP (x, 1));
3999 else
4000 {
4001 fputs (targetm.asm_out.open_paren, file);
4002 output_addr_const (file, XEXP (x, 1));
4003 fputs (targetm.asm_out.close_paren, file);
4004 }
4005 break;
4006
4007 case ZERO_EXTEND:
4008 case SIGN_EXTEND:
4009 case SUBREG:
4010 case TRUNCATE:
4011 output_addr_const (file, XEXP (x, 0));
4012 break;
4013
4014 default:
4015 if (targetm.asm_out.output_addr_const_extra (file, x))
4016 break;
4017
4018 output_operand_lossage ("invalid expression as operand");
4019 }
4020 }
4021 \f
4022 /* Output a quoted string. */
4023
4024 void
4025 output_quoted_string (FILE *asm_file, const char *string)
4026 {
4027 #ifdef OUTPUT_QUOTED_STRING
4028 OUTPUT_QUOTED_STRING (asm_file, string);
4029 #else
4030 char c;
4031
4032 putc ('\"', asm_file);
4033 while ((c = *string++) != 0)
4034 {
4035 if (ISPRINT (c))
4036 {
4037 if (c == '\"' || c == '\\')
4038 putc ('\\', asm_file);
4039 putc (c, asm_file);
4040 }
4041 else
4042 fprintf (asm_file, "\\%03o", (unsigned char) c);
4043 }
4044 putc ('\"', asm_file);
4045 #endif
4046 }
4047 \f
4048 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
4049
4050 void
4051 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
4052 {
4053 char buf[2 + CHAR_BIT * sizeof (value) / 4];
4054 if (value == 0)
4055 putc ('0', f);
4056 else
4057 {
4058 char *p = buf + sizeof (buf);
4059 do
4060 *--p = "0123456789abcdef"[value % 16];
4061 while ((value /= 16) != 0);
4062 *--p = 'x';
4063 *--p = '0';
4064 fwrite (p, 1, buf + sizeof (buf) - p, f);
4065 }
4066 }
4067
4068 /* Internal function that prints an unsigned long in decimal in reverse.
4069 The output string IS NOT null-terminated. */
4070
4071 static int
4072 sprint_ul_rev (char *s, unsigned long value)
4073 {
4074 int i = 0;
4075 do
4076 {
4077 s[i] = "0123456789"[value % 10];
4078 value /= 10;
4079 i++;
4080 /* alternate version, without modulo */
4081 /* oldval = value; */
4082 /* value /= 10; */
4083 /* s[i] = "0123456789" [oldval - 10*value]; */
4084 /* i++ */
4085 }
4086 while (value != 0);
4087 return i;
4088 }
4089
4090 /* Write an unsigned long as decimal to a file, fast. */
4091
4092 void
4093 fprint_ul (FILE *f, unsigned long value)
4094 {
4095 /* python says: len(str(2**64)) == 20 */
4096 char s[20];
4097 int i;
4098
4099 i = sprint_ul_rev (s, value);
4100
4101 /* It's probably too small to bother with string reversal and fputs. */
4102 do
4103 {
4104 i--;
4105 putc (s[i], f);
4106 }
4107 while (i != 0);
4108 }
4109
4110 /* Write an unsigned long as decimal to a string, fast.
4111 s must be wide enough to not overflow, at least 21 chars.
4112 Returns the length of the string (without terminating '\0'). */
4113
4114 int
4115 sprint_ul (char *s, unsigned long value)
4116 {
4117 int len = sprint_ul_rev (s, value);
4118 s[len] = '\0';
4119
4120 std::reverse (s, s + len);
4121 return len;
4122 }
4123
4124 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
4125 %R prints the value of REGISTER_PREFIX.
4126 %L prints the value of LOCAL_LABEL_PREFIX.
4127 %U prints the value of USER_LABEL_PREFIX.
4128 %I prints the value of IMMEDIATE_PREFIX.
4129 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
4130 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
4131
4132 We handle alternate assembler dialects here, just like output_asm_insn. */
4133
4134 void
4135 asm_fprintf (FILE *file, const char *p, ...)
4136 {
4137 char buf[10];
4138 char *q, c;
4139 #ifdef ASSEMBLER_DIALECT
4140 int dialect = 0;
4141 #endif
4142 va_list argptr;
4143
4144 va_start (argptr, p);
4145
4146 buf[0] = '%';
4147
4148 while ((c = *p++))
4149 switch (c)
4150 {
4151 #ifdef ASSEMBLER_DIALECT
4152 case '{':
4153 case '}':
4154 case '|':
4155 p = do_assembler_dialects (p, &dialect);
4156 break;
4157 #endif
4158
4159 case '%':
4160 c = *p++;
4161 q = &buf[1];
4162 while (strchr ("-+ #0", c))
4163 {
4164 *q++ = c;
4165 c = *p++;
4166 }
4167 while (ISDIGIT (c) || c == '.')
4168 {
4169 *q++ = c;
4170 c = *p++;
4171 }
4172 switch (c)
4173 {
4174 case '%':
4175 putc ('%', file);
4176 break;
4177
4178 case 'd': case 'i': case 'u':
4179 case 'x': case 'X': case 'o':
4180 case 'c':
4181 *q++ = c;
4182 *q = 0;
4183 fprintf (file, buf, va_arg (argptr, int));
4184 break;
4185
4186 case 'w':
4187 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
4188 'o' cases, but we do not check for those cases. It
4189 means that the value is a HOST_WIDE_INT, which may be
4190 either `long' or `long long'. */
4191 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
4192 q += strlen (HOST_WIDE_INT_PRINT);
4193 *q++ = *p++;
4194 *q = 0;
4195 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
4196 break;
4197
4198 case 'l':
4199 *q++ = c;
4200 #ifdef HAVE_LONG_LONG
4201 if (*p == 'l')
4202 {
4203 *q++ = *p++;
4204 *q++ = *p++;
4205 *q = 0;
4206 fprintf (file, buf, va_arg (argptr, long long));
4207 }
4208 else
4209 #endif
4210 {
4211 *q++ = *p++;
4212 *q = 0;
4213 fprintf (file, buf, va_arg (argptr, long));
4214 }
4215
4216 break;
4217
4218 case 's':
4219 *q++ = c;
4220 *q = 0;
4221 fprintf (file, buf, va_arg (argptr, char *));
4222 break;
4223
4224 case 'O':
4225 #ifdef ASM_OUTPUT_OPCODE
4226 ASM_OUTPUT_OPCODE (asm_out_file, p);
4227 #endif
4228 break;
4229
4230 case 'R':
4231 #ifdef REGISTER_PREFIX
4232 fprintf (file, "%s", REGISTER_PREFIX);
4233 #endif
4234 break;
4235
4236 case 'I':
4237 #ifdef IMMEDIATE_PREFIX
4238 fprintf (file, "%s", IMMEDIATE_PREFIX);
4239 #endif
4240 break;
4241
4242 case 'L':
4243 #ifdef LOCAL_LABEL_PREFIX
4244 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
4245 #endif
4246 break;
4247
4248 case 'U':
4249 fputs (user_label_prefix, file);
4250 break;
4251
4252 #ifdef ASM_FPRINTF_EXTENSIONS
4253 /* Uppercase letters are reserved for general use by asm_fprintf
4254 and so are not available to target specific code. In order to
4255 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
4256 they are defined here. As they get turned into real extensions
4257 to asm_fprintf they should be removed from this list. */
4258 case 'A': case 'B': case 'C': case 'D': case 'E':
4259 case 'F': case 'G': case 'H': case 'J': case 'K':
4260 case 'M': case 'N': case 'P': case 'Q': case 'S':
4261 case 'T': case 'V': case 'W': case 'Y': case 'Z':
4262 break;
4263
4264 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
4265 #endif
4266 default:
4267 gcc_unreachable ();
4268 }
4269 break;
4270
4271 default:
4272 putc (c, file);
4273 }
4274 va_end (argptr);
4275 }
4276 \f
4277 /* Return nonzero if this function has no function calls. */
4278
4279 int
4280 leaf_function_p (void)
4281 {
4282 rtx_insn *insn;
4283
4284 /* Some back-ends (e.g. s390) want leaf functions to stay leaf
4285 functions even if they call mcount. */
4286 if (crtl->profile && !targetm.keep_leaf_when_profiled ())
4287 return 0;
4288
4289 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4290 {
4291 if (CALL_P (insn)
4292 && ! SIBLING_CALL_P (insn))
4293 return 0;
4294 if (NONJUMP_INSN_P (insn)
4295 && GET_CODE (PATTERN (insn)) == SEQUENCE
4296 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
4297 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
4298 return 0;
4299 }
4300
4301 return 1;
4302 }
4303
4304 /* Return 1 if branch is a forward branch.
4305 Uses insn_shuid array, so it works only in the final pass. May be used by
4306 output templates to customary add branch prediction hints.
4307 */
4308 int
4309 final_forward_branch_p (rtx_insn *insn)
4310 {
4311 int insn_id, label_id;
4312
4313 gcc_assert (uid_shuid);
4314 insn_id = INSN_SHUID (insn);
4315 label_id = INSN_SHUID (JUMP_LABEL (insn));
4316 /* We've hit some insns that does not have id information available. */
4317 gcc_assert (insn_id && label_id);
4318 return insn_id < label_id;
4319 }
4320
4321 /* On some machines, a function with no call insns
4322 can run faster if it doesn't create its own register window.
4323 When output, the leaf function should use only the "output"
4324 registers. Ordinarily, the function would be compiled to use
4325 the "input" registers to find its arguments; it is a candidate
4326 for leaf treatment if it uses only the "input" registers.
4327 Leaf function treatment means renumbering so the function
4328 uses the "output" registers instead. */
4329
4330 #ifdef LEAF_REGISTERS
4331
4332 /* Return 1 if this function uses only the registers that can be
4333 safely renumbered. */
4334
4335 int
4336 only_leaf_regs_used (void)
4337 {
4338 int i;
4339 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4340
4341 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4342 if ((df_regs_ever_live_p (i) || global_regs[i])
4343 && ! permitted_reg_in_leaf_functions[i])
4344 return 0;
4345
4346 if (crtl->uses_pic_offset_table
4347 && pic_offset_table_rtx != 0
4348 && REG_P (pic_offset_table_rtx)
4349 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4350 return 0;
4351
4352 return 1;
4353 }
4354
4355 /* Scan all instructions and renumber all registers into those
4356 available in leaf functions. */
4357
4358 static void
4359 leaf_renumber_regs (rtx_insn *first)
4360 {
4361 rtx_insn *insn;
4362
4363 /* Renumber only the actual patterns.
4364 The reg-notes can contain frame pointer refs,
4365 and renumbering them could crash, and should not be needed. */
4366 for (insn = first; insn; insn = NEXT_INSN (insn))
4367 if (INSN_P (insn))
4368 leaf_renumber_regs_insn (PATTERN (insn));
4369 }
4370
4371 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4372 available in leaf functions. */
4373
4374 void
4375 leaf_renumber_regs_insn (rtx in_rtx)
4376 {
4377 int i, j;
4378 const char *format_ptr;
4379
4380 if (in_rtx == 0)
4381 return;
4382
4383 /* Renumber all input-registers into output-registers.
4384 renumbered_regs would be 1 for an output-register;
4385 they */
4386
4387 if (REG_P (in_rtx))
4388 {
4389 int newreg;
4390
4391 /* Don't renumber the same reg twice. */
4392 if (in_rtx->used)
4393 return;
4394
4395 newreg = REGNO (in_rtx);
4396 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4397 to reach here as part of a REG_NOTE. */
4398 if (newreg >= FIRST_PSEUDO_REGISTER)
4399 {
4400 in_rtx->used = 1;
4401 return;
4402 }
4403 newreg = LEAF_REG_REMAP (newreg);
4404 gcc_assert (newreg >= 0);
4405 df_set_regs_ever_live (REGNO (in_rtx), false);
4406 df_set_regs_ever_live (newreg, true);
4407 SET_REGNO (in_rtx, newreg);
4408 in_rtx->used = 1;
4409 return;
4410 }
4411
4412 if (INSN_P (in_rtx))
4413 {
4414 /* Inside a SEQUENCE, we find insns.
4415 Renumber just the patterns of these insns,
4416 just as we do for the top-level insns. */
4417 leaf_renumber_regs_insn (PATTERN (in_rtx));
4418 return;
4419 }
4420
4421 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4422
4423 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4424 switch (*format_ptr++)
4425 {
4426 case 'e':
4427 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4428 break;
4429
4430 case 'E':
4431 if (NULL != XVEC (in_rtx, i))
4432 {
4433 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4434 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
4435 }
4436 break;
4437
4438 case 'S':
4439 case 's':
4440 case '0':
4441 case 'i':
4442 case 'w':
4443 case 'n':
4444 case 'u':
4445 break;
4446
4447 default:
4448 gcc_unreachable ();
4449 }
4450 }
4451 #endif
4452 \f
4453 /* Turn the RTL into assembly. */
4454 static unsigned int
4455 rest_of_handle_final (void)
4456 {
4457 const char *fnname = get_fnname_from_decl (current_function_decl);
4458
4459 assemble_start_function (current_function_decl, fnname);
4460 final_start_function (get_insns (), asm_out_file, optimize);
4461 final (get_insns (), asm_out_file, optimize);
4462 if (flag_ipa_ra)
4463 collect_fn_hard_reg_usage ();
4464 final_end_function ();
4465
4466 /* The IA-64 ".handlerdata" directive must be issued before the ".endp"
4467 directive that closes the procedure descriptor. Similarly, for x64 SEH.
4468 Otherwise it's not strictly necessary, but it doesn't hurt either. */
4469 output_function_exception_table (fnname);
4470
4471 assemble_end_function (current_function_decl, fnname);
4472
4473 user_defined_section_attribute = false;
4474
4475 /* Free up reg info memory. */
4476 free_reg_info ();
4477
4478 if (! quiet_flag)
4479 fflush (asm_out_file);
4480
4481 /* Write DBX symbols if requested. */
4482
4483 /* Note that for those inline functions where we don't initially
4484 know for certain that we will be generating an out-of-line copy,
4485 the first invocation of this routine (rest_of_compilation) will
4486 skip over this code by doing a `goto exit_rest_of_compilation;'.
4487 Later on, wrapup_global_declarations will (indirectly) call
4488 rest_of_compilation again for those inline functions that need
4489 to have out-of-line copies generated. During that call, we
4490 *will* be routed past here. */
4491
4492 timevar_push (TV_SYMOUT);
4493 if (!DECL_IGNORED_P (current_function_decl))
4494 debug_hooks->function_decl (current_function_decl);
4495 timevar_pop (TV_SYMOUT);
4496
4497 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
4498 DECL_INITIAL (current_function_decl) = error_mark_node;
4499
4500 if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
4501 && targetm.have_ctors_dtors)
4502 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
4503 decl_init_priority_lookup
4504 (current_function_decl));
4505 if (DECL_STATIC_DESTRUCTOR (current_function_decl)
4506 && targetm.have_ctors_dtors)
4507 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
4508 decl_fini_priority_lookup
4509 (current_function_decl));
4510 return 0;
4511 }
4512
4513 namespace {
4514
4515 const pass_data pass_data_final =
4516 {
4517 RTL_PASS, /* type */
4518 "final", /* name */
4519 OPTGROUP_NONE, /* optinfo_flags */
4520 TV_FINAL, /* tv_id */
4521 0, /* properties_required */
4522 0, /* properties_provided */
4523 0, /* properties_destroyed */
4524 0, /* todo_flags_start */
4525 0, /* todo_flags_finish */
4526 };
4527
4528 class pass_final : public rtl_opt_pass
4529 {
4530 public:
4531 pass_final (gcc::context *ctxt)
4532 : rtl_opt_pass (pass_data_final, ctxt)
4533 {}
4534
4535 /* opt_pass methods: */
4536 virtual unsigned int execute (function *) { return rest_of_handle_final (); }
4537
4538 }; // class pass_final
4539
4540 } // anon namespace
4541
4542 rtl_opt_pass *
4543 make_pass_final (gcc::context *ctxt)
4544 {
4545 return new pass_final (ctxt);
4546 }
4547
4548
4549 static unsigned int
4550 rest_of_handle_shorten_branches (void)
4551 {
4552 /* Shorten branches. */
4553 shorten_branches (get_insns ());
4554 return 0;
4555 }
4556
4557 namespace {
4558
4559 const pass_data pass_data_shorten_branches =
4560 {
4561 RTL_PASS, /* type */
4562 "shorten", /* name */
4563 OPTGROUP_NONE, /* optinfo_flags */
4564 TV_SHORTEN_BRANCH, /* tv_id */
4565 0, /* properties_required */
4566 0, /* properties_provided */
4567 0, /* properties_destroyed */
4568 0, /* todo_flags_start */
4569 0, /* todo_flags_finish */
4570 };
4571
4572 class pass_shorten_branches : public rtl_opt_pass
4573 {
4574 public:
4575 pass_shorten_branches (gcc::context *ctxt)
4576 : rtl_opt_pass (pass_data_shorten_branches, ctxt)
4577 {}
4578
4579 /* opt_pass methods: */
4580 virtual unsigned int execute (function *)
4581 {
4582 return rest_of_handle_shorten_branches ();
4583 }
4584
4585 }; // class pass_shorten_branches
4586
4587 } // anon namespace
4588
4589 rtl_opt_pass *
4590 make_pass_shorten_branches (gcc::context *ctxt)
4591 {
4592 return new pass_shorten_branches (ctxt);
4593 }
4594
4595
4596 static unsigned int
4597 rest_of_clean_state (void)
4598 {
4599 rtx_insn *insn, *next;
4600 FILE *final_output = NULL;
4601 int save_unnumbered = flag_dump_unnumbered;
4602 int save_noaddr = flag_dump_noaddr;
4603
4604 if (flag_dump_final_insns)
4605 {
4606 final_output = fopen (flag_dump_final_insns, "a");
4607 if (!final_output)
4608 {
4609 error ("could not open final insn dump file %qs: %m",
4610 flag_dump_final_insns);
4611 flag_dump_final_insns = NULL;
4612 }
4613 else
4614 {
4615 flag_dump_noaddr = flag_dump_unnumbered = 1;
4616 if (flag_compare_debug_opt || flag_compare_debug)
4617 dump_flags |= TDF_NOUID;
4618 dump_function_header (final_output, current_function_decl,
4619 dump_flags);
4620 final_insns_dump_p = true;
4621
4622 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4623 if (LABEL_P (insn))
4624 INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
4625 else
4626 {
4627 if (NOTE_P (insn))
4628 set_block_for_insn (insn, NULL);
4629 INSN_UID (insn) = 0;
4630 }
4631 }
4632 }
4633
4634 /* It is very important to decompose the RTL instruction chain here:
4635 debug information keeps pointing into CODE_LABEL insns inside the function
4636 body. If these remain pointing to the other insns, we end up preserving
4637 whole RTL chain and attached detailed debug info in memory. */
4638 for (insn = get_insns (); insn; insn = next)
4639 {
4640 next = NEXT_INSN (insn);
4641 SET_NEXT_INSN (insn) = NULL;
4642 SET_PREV_INSN (insn) = NULL;
4643
4644 if (final_output
4645 && (!NOTE_P (insn) ||
4646 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
4647 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
4648 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
4649 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
4650 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
4651 print_rtl_single (final_output, insn);
4652 }
4653
4654 if (final_output)
4655 {
4656 flag_dump_noaddr = save_noaddr;
4657 flag_dump_unnumbered = save_unnumbered;
4658 final_insns_dump_p = false;
4659
4660 if (fclose (final_output))
4661 {
4662 error ("could not close final insn dump file %qs: %m",
4663 flag_dump_final_insns);
4664 flag_dump_final_insns = NULL;
4665 }
4666 }
4667
4668 /* In case the function was not output,
4669 don't leave any temporary anonymous types
4670 queued up for sdb output. */
4671 #ifdef SDB_DEBUGGING_INFO
4672 if (write_symbols == SDB_DEBUG)
4673 sdbout_types (NULL_TREE);
4674 #endif
4675
4676 flag_rerun_cse_after_global_opts = 0;
4677 reload_completed = 0;
4678 epilogue_completed = 0;
4679 #ifdef STACK_REGS
4680 regstack_completed = 0;
4681 #endif
4682
4683 /* Clear out the insn_length contents now that they are no
4684 longer valid. */
4685 init_insn_lengths ();
4686
4687 /* Show no temporary slots allocated. */
4688 init_temp_slots ();
4689
4690 free_bb_for_insn ();
4691
4692 delete_tree_ssa ();
4693
4694 /* We can reduce stack alignment on call site only when we are sure that
4695 the function body just produced will be actually used in the final
4696 executable. */
4697 if (decl_binds_to_current_def_p (current_function_decl))
4698 {
4699 unsigned int pref = crtl->preferred_stack_boundary;
4700 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
4701 pref = crtl->stack_alignment_needed;
4702 cgraph_node::rtl_info (current_function_decl)
4703 ->preferred_incoming_stack_boundary = pref;
4704 }
4705
4706 /* Make sure volatile mem refs aren't considered valid operands for
4707 arithmetic insns. We must call this here if this is a nested inline
4708 function, since the above code leaves us in the init_recog state,
4709 and the function context push/pop code does not save/restore volatile_ok.
4710
4711 ??? Maybe it isn't necessary for expand_start_function to call this
4712 anymore if we do it here? */
4713
4714 init_recog_no_volatile ();
4715
4716 /* We're done with this function. Free up memory if we can. */
4717 free_after_parsing (cfun);
4718 free_after_compilation (cfun);
4719 return 0;
4720 }
4721
4722 namespace {
4723
4724 const pass_data pass_data_clean_state =
4725 {
4726 RTL_PASS, /* type */
4727 "*clean_state", /* name */
4728 OPTGROUP_NONE, /* optinfo_flags */
4729 TV_FINAL, /* tv_id */
4730 0, /* properties_required */
4731 0, /* properties_provided */
4732 PROP_rtl, /* properties_destroyed */
4733 0, /* todo_flags_start */
4734 0, /* todo_flags_finish */
4735 };
4736
4737 class pass_clean_state : public rtl_opt_pass
4738 {
4739 public:
4740 pass_clean_state (gcc::context *ctxt)
4741 : rtl_opt_pass (pass_data_clean_state, ctxt)
4742 {}
4743
4744 /* opt_pass methods: */
4745 virtual unsigned int execute (function *)
4746 {
4747 return rest_of_clean_state ();
4748 }
4749
4750 }; // class pass_clean_state
4751
4752 } // anon namespace
4753
4754 rtl_opt_pass *
4755 make_pass_clean_state (gcc::context *ctxt)
4756 {
4757 return new pass_clean_state (ctxt);
4758 }
4759
4760 /* Return true if INSN is a call to the the current function. */
4761
4762 static bool
4763 self_recursive_call_p (rtx_insn *insn)
4764 {
4765 tree fndecl = get_call_fndecl (insn);
4766 return (fndecl == current_function_decl
4767 && decl_binds_to_current_def_p (fndecl));
4768 }
4769
4770 /* Collect hard register usage for the current function. */
4771
4772 static void
4773 collect_fn_hard_reg_usage (void)
4774 {
4775 rtx_insn *insn;
4776 #ifdef STACK_REGS
4777 int i;
4778 #endif
4779 struct cgraph_rtl_info *node;
4780 HARD_REG_SET function_used_regs;
4781
4782 /* ??? To be removed when all the ports have been fixed. */
4783 if (!targetm.call_fusage_contains_non_callee_clobbers)
4784 return;
4785
4786 CLEAR_HARD_REG_SET (function_used_regs);
4787
4788 for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn))
4789 {
4790 HARD_REG_SET insn_used_regs;
4791
4792 if (!NONDEBUG_INSN_P (insn))
4793 continue;
4794
4795 if (CALL_P (insn)
4796 && !self_recursive_call_p (insn))
4797 {
4798 if (!get_call_reg_set_usage (insn, &insn_used_regs,
4799 call_used_reg_set))
4800 return;
4801
4802 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4803 }
4804
4805 find_all_hard_reg_sets (insn, &insn_used_regs, false);
4806 IOR_HARD_REG_SET (function_used_regs, insn_used_regs);
4807 }
4808
4809 /* Be conservative - mark fixed and global registers as used. */
4810 IOR_HARD_REG_SET (function_used_regs, fixed_reg_set);
4811
4812 #ifdef STACK_REGS
4813 /* Handle STACK_REGS conservatively, since the df-framework does not
4814 provide accurate information for them. */
4815
4816 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
4817 SET_HARD_REG_BIT (function_used_regs, i);
4818 #endif
4819
4820 /* The information we have gathered is only interesting if it exposes a
4821 register from the call_used_regs that is not used in this function. */
4822 if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs))
4823 return;
4824
4825 node = cgraph_node::rtl_info (current_function_decl);
4826 gcc_assert (node != NULL);
4827
4828 COPY_HARD_REG_SET (node->function_used_regs, function_used_regs);
4829 node->function_used_regs_valid = 1;
4830 }
4831
4832 /* Get the declaration of the function called by INSN. */
4833
4834 static tree
4835 get_call_fndecl (rtx_insn *insn)
4836 {
4837 rtx note, datum;
4838
4839 note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX);
4840 if (note == NULL_RTX)
4841 return NULL_TREE;
4842
4843 datum = XEXP (note, 0);
4844 if (datum != NULL_RTX)
4845 return SYMBOL_REF_DECL (datum);
4846
4847 return NULL_TREE;
4848 }
4849
4850 /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for
4851 call targets that can be overwritten. */
4852
4853 static struct cgraph_rtl_info *
4854 get_call_cgraph_rtl_info (rtx_insn *insn)
4855 {
4856 tree fndecl;
4857
4858 if (insn == NULL_RTX)
4859 return NULL;
4860
4861 fndecl = get_call_fndecl (insn);
4862 if (fndecl == NULL_TREE
4863 || !decl_binds_to_current_def_p (fndecl))
4864 return NULL;
4865
4866 return cgraph_node::rtl_info (fndecl);
4867 }
4868
4869 /* Find hard registers used by function call instruction INSN, and return them
4870 in REG_SET. Return DEFAULT_SET in REG_SET if not found. */
4871
4872 bool
4873 get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set,
4874 HARD_REG_SET default_set)
4875 {
4876 if (flag_ipa_ra)
4877 {
4878 struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn);
4879 if (node != NULL
4880 && node->function_used_regs_valid)
4881 {
4882 COPY_HARD_REG_SET (*reg_set, node->function_used_regs);
4883 AND_HARD_REG_SET (*reg_set, default_set);
4884 return true;
4885 }
4886 }
4887
4888 COPY_HARD_REG_SET (*reg_set, default_set);
4889 return false;
4890 }