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1 /* Global common subexpression elimination/Partial redundancy elimination
2 and global constant/copy propagation for GNU compiler.
3 Copyright (C) 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /* TODO
23 - reordering of memory allocation and freeing to be more space efficient
24 - do rough calc of how many regs are needed in each block, and a rough
25 calc of how many regs are available in each class and use that to
26 throttle back the code in cases where RTX_COST is minimal.
27 - dead store elimination
28 - a store to the same address as a load does not kill the load if the
29 source of the store is also the destination of the load. Handling this
30 allows more load motion, particularly out of loops.
31 - ability to realloc sbitmap vectors would allow one initial computation
32 of reg_set_in_block with only subsequent additions, rather than
33 recomputing it for each pass
34
35 */
36
37 /* References searched while implementing this.
38
39 Compilers Principles, Techniques and Tools
40 Aho, Sethi, Ullman
41 Addison-Wesley, 1988
42
43 Global Optimization by Suppression of Partial Redundancies
44 E. Morel, C. Renvoise
45 communications of the acm, Vol. 22, Num. 2, Feb. 1979
46
47 A Portable Machine-Independent Global Optimizer - Design and Measurements
48 Frederick Chow
49 Stanford Ph.D. thesis, Dec. 1983
50
51 A Fast Algorithm for Code Movement Optimization
52 D.M. Dhamdhere
53 SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988
54
55 A Solution to a Problem with Morel and Renvoise's
56 Global Optimization by Suppression of Partial Redundancies
57 K-H Drechsler, M.P. Stadel
58 ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988
59
60 Practical Adaptation of the Global Optimization
61 Algorithm of Morel and Renvoise
62 D.M. Dhamdhere
63 ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991
64
65 Efficiently Computing Static Single Assignment Form and the Control
66 Dependence Graph
67 R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck
68 ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991
69
70 Lazy Code Motion
71 J. Knoop, O. Ruthing, B. Steffen
72 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
73
74 What's In a Region? Or Computing Control Dependence Regions in Near-Linear
75 Time for Reducible Flow Control
76 Thomas Ball
77 ACM Letters on Programming Languages and Systems,
78 Vol. 2, Num. 1-4, Mar-Dec 1993
79
80 An Efficient Representation for Sparse Sets
81 Preston Briggs, Linda Torczon
82 ACM Letters on Programming Languages and Systems,
83 Vol. 2, Num. 1-4, Mar-Dec 1993
84
85 A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion
86 K-H Drechsler, M.P. Stadel
87 ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993
88
89 Partial Dead Code Elimination
90 J. Knoop, O. Ruthing, B. Steffen
91 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
92
93 Effective Partial Redundancy Elimination
94 P. Briggs, K.D. Cooper
95 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
96
97 The Program Structure Tree: Computing Control Regions in Linear Time
98 R. Johnson, D. Pearson, K. Pingali
99 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
100
101 Optimal Code Motion: Theory and Practice
102 J. Knoop, O. Ruthing, B. Steffen
103 ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994
104
105 The power of assignment motion
106 J. Knoop, O. Ruthing, B. Steffen
107 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
108
109 Global code motion / global value numbering
110 C. Click
111 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
112
113 Value Driven Redundancy Elimination
114 L.T. Simpson
115 Rice University Ph.D. thesis, Apr. 1996
116
117 Value Numbering
118 L.T. Simpson
119 Massively Scalar Compiler Project, Rice University, Sep. 1996
120
121 High Performance Compilers for Parallel Computing
122 Michael Wolfe
123 Addison-Wesley, 1996
124
125 Advanced Compiler Design and Implementation
126 Steven Muchnick
127 Morgan Kaufmann, 1997
128
129 Building an Optimizing Compiler
130 Robert Morgan
131 Digital Press, 1998
132
133 People wishing to speed up the code here should read:
134 Elimination Algorithms for Data Flow Analysis
135 B.G. Ryder, M.C. Paull
136 ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986
137
138 How to Analyze Large Programs Efficiently and Informatively
139 D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck
140 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
141
142 People wishing to do something different can find various possibilities
143 in the above papers and elsewhere.
144 */
145
146 #include "config.h"
147 #include "system.h"
148 #include "toplev.h"
149
150 #include "rtl.h"
151 #include "tm_p.h"
152 #include "regs.h"
153 #include "hard-reg-set.h"
154 #include "flags.h"
155 #include "real.h"
156 #include "insn-config.h"
157 #include "recog.h"
158 #include "basic-block.h"
159 #include "output.h"
160 #include "function.h"
161 #include "expr.h"
162 #include "ggc.h"
163 #include "params.h"
164
165 #include "obstack.h"
166 #define obstack_chunk_alloc gmalloc
167 #define obstack_chunk_free free
168
169 /* Maximum number of passes to perform. */
170 #define MAX_PASSES 1
171
172 /* Propagate flow information through back edges and thus enable PRE's
173 moving loop invariant calculations out of loops.
174
175 Originally this tended to create worse overall code, but several
176 improvements during the development of PRE seem to have made following
177 back edges generally a win.
178
179 Note much of the loop invariant code motion done here would normally
180 be done by loop.c, which has more heuristics for when to move invariants
181 out of loops. At some point we might need to move some of those
182 heuristics into gcse.c. */
183 #define FOLLOW_BACK_EDGES 1
184
185 /* We support GCSE via Partial Redundancy Elimination. PRE optimizations
186 are a superset of those done by GCSE.
187
188 We perform the following steps:
189
190 1) Compute basic block information.
191
192 2) Compute table of places where registers are set.
193
194 3) Perform copy/constant propagation.
195
196 4) Perform global cse.
197
198 5) Perform another pass of copy/constant propagation.
199
200 Two passes of copy/constant propagation are done because the first one
201 enables more GCSE and the second one helps to clean up the copies that
202 GCSE creates. This is needed more for PRE than for Classic because Classic
203 GCSE will try to use an existing register containing the common
204 subexpression rather than create a new one. This is harder to do for PRE
205 because of the code motion (which Classic GCSE doesn't do).
206
207 Expressions we are interested in GCSE-ing are of the form
208 (set (pseudo-reg) (expression)).
209 Function want_to_gcse_p says what these are.
210
211 PRE handles moving invariant expressions out of loops (by treating them as
212 partially redundant).
213
214 Eventually it would be nice to replace cse.c/gcse.c with SSA (static single
215 assignment) based GVN (global value numbering). L. T. Simpson's paper
216 (Rice University) on value numbering is a useful reference for this.
217
218 **********************
219
220 We used to support multiple passes but there are diminishing returns in
221 doing so. The first pass usually makes 90% of the changes that are doable.
222 A second pass can make a few more changes made possible by the first pass.
223 Experiments show any further passes don't make enough changes to justify
224 the expense.
225
226 A study of spec92 using an unlimited number of passes:
227 [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83,
228 [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2,
229 [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1
230
231 It was found doing copy propagation between each pass enables further
232 substitutions.
233
234 PRE is quite expensive in complicated functions because the DFA can take
235 awhile to converge. Hence we only perform one pass. Macro MAX_PASSES can
236 be modified if one wants to experiment.
237
238 **********************
239
240 The steps for PRE are:
241
242 1) Build the hash table of expressions we wish to GCSE (expr_hash_table).
243
244 2) Perform the data flow analysis for PRE.
245
246 3) Delete the redundant instructions
247
248 4) Insert the required copies [if any] that make the partially
249 redundant instructions fully redundant.
250
251 5) For other reaching expressions, insert an instruction to copy the value
252 to a newly created pseudo that will reach the redundant instruction.
253
254 The deletion is done first so that when we do insertions we
255 know which pseudo reg to use.
256
257 Various papers have argued that PRE DFA is expensive (O(n^2)) and others
258 argue it is not. The number of iterations for the algorithm to converge
259 is typically 2-4 so I don't view it as that expensive (relatively speaking).
260
261 PRE GCSE depends heavily on the second CSE pass to clean up the copies
262 we create. To make an expression reach the place where it's redundant,
263 the result of the expression is copied to a new register, and the redundant
264 expression is deleted by replacing it with this new register. Classic GCSE
265 doesn't have this problem as much as it computes the reaching defs of
266 each register in each block and thus can try to use an existing register.
267
268 **********************
269
270 A fair bit of simplicity is created by creating small functions for simple
271 tasks, even when the function is only called in one place. This may
272 measurably slow things down [or may not] by creating more function call
273 overhead than is necessary. The source is laid out so that it's trivial
274 to make the affected functions inline so that one can measure what speed
275 up, if any, can be achieved, and maybe later when things settle things can
276 be rearranged.
277
278 Help stamp out big monolithic functions! */
279 \f
280 /* GCSE global vars. */
281
282 /* -dG dump file. */
283 static FILE *gcse_file;
284
285 /* Note whether or not we should run jump optimization after gcse. We
286 want to do this for two cases.
287
288 * If we changed any jumps via cprop.
289
290 * If we added any labels via edge splitting. */
291
292 static int run_jump_opt_after_gcse;
293
294 /* Bitmaps are normally not included in debugging dumps.
295 However it's useful to be able to print them from GDB.
296 We could create special functions for this, but it's simpler to
297 just allow passing stderr to the dump_foo fns. Since stderr can
298 be a macro, we store a copy here. */
299 static FILE *debug_stderr;
300
301 /* An obstack for our working variables. */
302 static struct obstack gcse_obstack;
303
304 /* Non-zero for each mode that supports (set (reg) (reg)).
305 This is trivially true for integer and floating point values.
306 It may or may not be true for condition codes. */
307 static char can_copy_p[(int) NUM_MACHINE_MODES];
308
309 /* Non-zero if can_copy_p has been initialized. */
310 static int can_copy_init_p;
311
312 struct reg_use {rtx reg_rtx; };
313
314 /* Hash table of expressions. */
315
316 struct expr
317 {
318 /* The expression (SET_SRC for expressions, PATTERN for assignments). */
319 rtx expr;
320 /* Index in the available expression bitmaps. */
321 int bitmap_index;
322 /* Next entry with the same hash. */
323 struct expr *next_same_hash;
324 /* List of anticipatable occurrences in basic blocks in the function.
325 An "anticipatable occurrence" is one that is the first occurrence in the
326 basic block, the operands are not modified in the basic block prior
327 to the occurrence and the output is not used between the start of
328 the block and the occurrence. */
329 struct occr *antic_occr;
330 /* List of available occurrence in basic blocks in the function.
331 An "available occurrence" is one that is the last occurrence in the
332 basic block and the operands are not modified by following statements in
333 the basic block [including this insn]. */
334 struct occr *avail_occr;
335 /* Non-null if the computation is PRE redundant.
336 The value is the newly created pseudo-reg to record a copy of the
337 expression in all the places that reach the redundant copy. */
338 rtx reaching_reg;
339 };
340
341 /* Occurrence of an expression.
342 There is one per basic block. If a pattern appears more than once the
343 last appearance is used [or first for anticipatable expressions]. */
344
345 struct occr
346 {
347 /* Next occurrence of this expression. */
348 struct occr *next;
349 /* The insn that computes the expression. */
350 rtx insn;
351 /* Non-zero if this [anticipatable] occurrence has been deleted. */
352 char deleted_p;
353 /* Non-zero if this [available] occurrence has been copied to
354 reaching_reg. */
355 /* ??? This is mutually exclusive with deleted_p, so they could share
356 the same byte. */
357 char copied_p;
358 };
359
360 /* Expression and copy propagation hash tables.
361 Each hash table is an array of buckets.
362 ??? It is known that if it were an array of entries, structure elements
363 `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is
364 not clear whether in the final analysis a sufficient amount of memory would
365 be saved as the size of the available expression bitmaps would be larger
366 [one could build a mapping table without holes afterwards though].
367 Someday I'll perform the computation and figure it out. */
368
369 /* Total size of the expression hash table, in elements. */
370 static unsigned int expr_hash_table_size;
371
372 /* The table itself.
373 This is an array of `expr_hash_table_size' elements. */
374 static struct expr **expr_hash_table;
375
376 /* Total size of the copy propagation hash table, in elements. */
377 static unsigned int set_hash_table_size;
378
379 /* The table itself.
380 This is an array of `set_hash_table_size' elements. */
381 static struct expr **set_hash_table;
382
383 /* Mapping of uids to cuids.
384 Only real insns get cuids. */
385 static int *uid_cuid;
386
387 /* Highest UID in UID_CUID. */
388 static int max_uid;
389
390 /* Get the cuid of an insn. */
391 #ifdef ENABLE_CHECKING
392 #define INSN_CUID(INSN) (INSN_UID (INSN) > max_uid ? (abort (), 0) : uid_cuid[INSN_UID (INSN)])
393 #else
394 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
395 #endif
396
397 /* Number of cuids. */
398 static int max_cuid;
399
400 /* Mapping of cuids to insns. */
401 static rtx *cuid_insn;
402
403 /* Get insn from cuid. */
404 #define CUID_INSN(CUID) (cuid_insn[CUID])
405
406 /* Maximum register number in function prior to doing gcse + 1.
407 Registers created during this pass have regno >= max_gcse_regno.
408 This is named with "gcse" to not collide with global of same name. */
409 static unsigned int max_gcse_regno;
410
411 /* Maximum number of cse-able expressions found. */
412 static int n_exprs;
413
414 /* Maximum number of assignments for copy propagation found. */
415 static int n_sets;
416
417 /* Table of registers that are modified.
418
419 For each register, each element is a list of places where the pseudo-reg
420 is set.
421
422 For simplicity, GCSE is done on sets of pseudo-regs only. PRE GCSE only
423 requires knowledge of which blocks kill which regs [and thus could use
424 a bitmap instead of the lists `reg_set_table' uses].
425
426 `reg_set_table' and could be turned into an array of bitmaps (num-bbs x
427 num-regs) [however perhaps it may be useful to keep the data as is]. One
428 advantage of recording things this way is that `reg_set_table' is fairly
429 sparse with respect to pseudo regs but for hard regs could be fairly dense
430 [relatively speaking]. And recording sets of pseudo-regs in lists speeds
431 up functions like compute_transp since in the case of pseudo-regs we only
432 need to iterate over the number of times a pseudo-reg is set, not over the
433 number of basic blocks [clearly there is a bit of a slow down in the cases
434 where a pseudo is set more than once in a block, however it is believed
435 that the net effect is to speed things up]. This isn't done for hard-regs
436 because recording call-clobbered hard-regs in `reg_set_table' at each
437 function call can consume a fair bit of memory, and iterating over
438 hard-regs stored this way in compute_transp will be more expensive. */
439
440 typedef struct reg_set
441 {
442 /* The next setting of this register. */
443 struct reg_set *next;
444 /* The insn where it was set. */
445 rtx insn;
446 } reg_set;
447
448 static reg_set **reg_set_table;
449
450 /* Size of `reg_set_table'.
451 The table starts out at max_gcse_regno + slop, and is enlarged as
452 necessary. */
453 static int reg_set_table_size;
454
455 /* Amount to grow `reg_set_table' by when it's full. */
456 #define REG_SET_TABLE_SLOP 100
457
458 /* This is a list of expressions which are MEMs and will be used by load
459 or store motion.
460 Load motion tracks MEMs which aren't killed by
461 anything except itself. (ie, loads and stores to a single location).
462 We can then allow movement of these MEM refs with a little special
463 allowance. (all stores copy the same value to the reaching reg used
464 for the loads). This means all values used to store into memory must have
465 no side effects so we can re-issue the setter value.
466 Store Motion uses this structure as an expression table to track stores
467 which look interesting, and might be moveable towards the exit block. */
468
469 struct ls_expr
470 {
471 struct expr * expr; /* Gcse expression reference for LM. */
472 rtx pattern; /* Pattern of this mem. */
473 rtx loads; /* INSN list of loads seen. */
474 rtx stores; /* INSN list of stores seen. */
475 struct ls_expr * next; /* Next in the list. */
476 int invalid; /* Invalid for some reason. */
477 int index; /* If it maps to a bitmap index. */
478 int hash_index; /* Index when in a hash table. */
479 rtx reaching_reg; /* Register to use when re-writing. */
480 };
481
482 /* Head of the list of load/store memory refs. */
483 static struct ls_expr * pre_ldst_mems = NULL;
484
485 /* Bitmap containing one bit for each register in the program.
486 Used when performing GCSE to track which registers have been set since
487 the start of the basic block. */
488 static sbitmap reg_set_bitmap;
489
490 /* For each block, a bitmap of registers set in the block.
491 This is used by expr_killed_p and compute_transp.
492 It is computed during hash table computation and not by compute_sets
493 as it includes registers added since the last pass (or between cprop and
494 gcse) and it's currently not easy to realloc sbitmap vectors. */
495 static sbitmap *reg_set_in_block;
496
497 /* Array, indexed by basic block number for a list of insns which modify
498 memory within that block. */
499 static rtx * modify_mem_list;
500
501 /* This array parallels modify_mem_list, but is kept canonicalized. */
502 static rtx * canon_modify_mem_list;
503
504 /* For each block, non-zero if memory is set in that block.
505 This is computed during hash table computation and is used by
506 expr_killed_p and compute_transp.
507 ??? Handling of memory is very simple, we don't make any attempt
508 to optimize things (later).
509 ??? This can be computed by compute_sets since the information
510 doesn't change. */
511 static char *mem_set_in_block;
512
513 /* Various variables for statistics gathering. */
514
515 /* Memory used in a pass.
516 This isn't intended to be absolutely precise. Its intent is only
517 to keep an eye on memory usage. */
518 static int bytes_used;
519
520 /* GCSE substitutions made. */
521 static int gcse_subst_count;
522 /* Number of copy instructions created. */
523 static int gcse_create_count;
524 /* Number of constants propagated. */
525 static int const_prop_count;
526 /* Number of copys propagated. */
527 static int copy_prop_count;
528 \f
529 /* These variables are used by classic GCSE.
530 Normally they'd be defined a bit later, but `rd_gen' needs to
531 be declared sooner. */
532
533 /* Each block has a bitmap of each type.
534 The length of each blocks bitmap is:
535
536 max_cuid - for reaching definitions
537 n_exprs - for available expressions
538
539 Thus we view the bitmaps as 2 dimensional arrays. i.e.
540 rd_kill[block_num][cuid_num]
541 ae_kill[block_num][expr_num] */
542
543 /* For reaching defs */
544 static sbitmap *rd_kill, *rd_gen, *reaching_defs, *rd_out;
545
546 /* for available exprs */
547 static sbitmap *ae_kill, *ae_gen, *ae_in, *ae_out;
548
549 /* Objects of this type are passed around by the null-pointer check
550 removal routines. */
551 struct null_pointer_info
552 {
553 /* The basic block being processed. */
554 int current_block;
555 /* The first register to be handled in this pass. */
556 unsigned int min_reg;
557 /* One greater than the last register to be handled in this pass. */
558 unsigned int max_reg;
559 sbitmap *nonnull_local;
560 sbitmap *nonnull_killed;
561 };
562 \f
563 static void compute_can_copy PARAMS ((void));
564 static char *gmalloc PARAMS ((unsigned int));
565 static char *grealloc PARAMS ((char *, unsigned int));
566 static char *gcse_alloc PARAMS ((unsigned long));
567 static void alloc_gcse_mem PARAMS ((rtx));
568 static void free_gcse_mem PARAMS ((void));
569 static void alloc_reg_set_mem PARAMS ((int));
570 static void free_reg_set_mem PARAMS ((void));
571 static int get_bitmap_width PARAMS ((int, int, int));
572 static void record_one_set PARAMS ((int, rtx));
573 static void record_set_info PARAMS ((rtx, rtx, void *));
574 static void compute_sets PARAMS ((rtx));
575 static void hash_scan_insn PARAMS ((rtx, int, int));
576 static void hash_scan_set PARAMS ((rtx, rtx, int));
577 static void hash_scan_clobber PARAMS ((rtx, rtx));
578 static void hash_scan_call PARAMS ((rtx, rtx));
579 static int want_to_gcse_p PARAMS ((rtx));
580 static int oprs_unchanged_p PARAMS ((rtx, rtx, int));
581 static int oprs_anticipatable_p PARAMS ((rtx, rtx));
582 static int oprs_available_p PARAMS ((rtx, rtx));
583 static void insert_expr_in_table PARAMS ((rtx, enum machine_mode, rtx,
584 int, int));
585 static void insert_set_in_table PARAMS ((rtx, rtx));
586 static unsigned int hash_expr PARAMS ((rtx, enum machine_mode, int *, int));
587 static unsigned int hash_expr_1 PARAMS ((rtx, enum machine_mode, int *));
588 static unsigned int hash_string_1 PARAMS ((const char *));
589 static unsigned int hash_set PARAMS ((int, int));
590 static int expr_equiv_p PARAMS ((rtx, rtx));
591 static void record_last_reg_set_info PARAMS ((rtx, int));
592 static void record_last_mem_set_info PARAMS ((rtx));
593 static void record_last_set_info PARAMS ((rtx, rtx, void *));
594 static void compute_hash_table PARAMS ((int));
595 static void alloc_set_hash_table PARAMS ((int));
596 static void free_set_hash_table PARAMS ((void));
597 static void compute_set_hash_table PARAMS ((void));
598 static void alloc_expr_hash_table PARAMS ((unsigned int));
599 static void free_expr_hash_table PARAMS ((void));
600 static void compute_expr_hash_table PARAMS ((void));
601 static void dump_hash_table PARAMS ((FILE *, const char *, struct expr **,
602 int, int));
603 static struct expr *lookup_expr PARAMS ((rtx));
604 static struct expr *lookup_set PARAMS ((unsigned int, rtx));
605 static struct expr *next_set PARAMS ((unsigned int, struct expr *));
606 static void reset_opr_set_tables PARAMS ((void));
607 static int oprs_not_set_p PARAMS ((rtx, rtx));
608 static void mark_call PARAMS ((rtx));
609 static void mark_set PARAMS ((rtx, rtx));
610 static void mark_clobber PARAMS ((rtx, rtx));
611 static void mark_oprs_set PARAMS ((rtx));
612 static void alloc_cprop_mem PARAMS ((int, int));
613 static void free_cprop_mem PARAMS ((void));
614 static void compute_transp PARAMS ((rtx, int, sbitmap *, int));
615 static void compute_transpout PARAMS ((void));
616 static void compute_local_properties PARAMS ((sbitmap *, sbitmap *, sbitmap *,
617 int));
618 static void compute_cprop_data PARAMS ((void));
619 static void find_used_regs PARAMS ((rtx));
620 static int try_replace_reg PARAMS ((rtx, rtx, rtx));
621 static struct expr *find_avail_set PARAMS ((int, rtx));
622 static int cprop_jump PARAMS ((rtx, rtx, rtx));
623 #ifdef HAVE_cc0
624 static int cprop_cc0_jump PARAMS ((rtx, struct reg_use *, rtx));
625 #endif
626 static void mems_conflict_for_gcse_p PARAMS ((rtx, rtx, void *));
627 static int load_killed_in_block_p PARAMS ((basic_block, int, rtx, int));
628 static void canon_list_insert PARAMS ((rtx, rtx, void *));
629 static int cprop_insn PARAMS ((rtx, int));
630 static int cprop PARAMS ((int));
631 static int one_cprop_pass PARAMS ((int, int));
632 static void alloc_pre_mem PARAMS ((int, int));
633 static void free_pre_mem PARAMS ((void));
634 static void compute_pre_data PARAMS ((void));
635 static int pre_expr_reaches_here_p PARAMS ((basic_block, struct expr *,
636 basic_block));
637 static void insert_insn_end_bb PARAMS ((struct expr *, basic_block, int));
638 static void pre_insert_copy_insn PARAMS ((struct expr *, rtx));
639 static void pre_insert_copies PARAMS ((void));
640 static int pre_delete PARAMS ((void));
641 static int pre_gcse PARAMS ((void));
642 static int one_pre_gcse_pass PARAMS ((int));
643 static void add_label_notes PARAMS ((rtx, rtx));
644 static void alloc_code_hoist_mem PARAMS ((int, int));
645 static void free_code_hoist_mem PARAMS ((void));
646 static void compute_code_hoist_vbeinout PARAMS ((void));
647 static void compute_code_hoist_data PARAMS ((void));
648 static int hoist_expr_reaches_here_p PARAMS ((basic_block, int, basic_block,
649 char *));
650 static void hoist_code PARAMS ((void));
651 static int one_code_hoisting_pass PARAMS ((void));
652 static void alloc_rd_mem PARAMS ((int, int));
653 static void free_rd_mem PARAMS ((void));
654 static void handle_rd_kill_set PARAMS ((rtx, int, basic_block));
655 static void compute_kill_rd PARAMS ((void));
656 static void compute_rd PARAMS ((void));
657 static void alloc_avail_expr_mem PARAMS ((int, int));
658 static void free_avail_expr_mem PARAMS ((void));
659 static void compute_ae_gen PARAMS ((void));
660 static int expr_killed_p PARAMS ((rtx, basic_block));
661 static void compute_ae_kill PARAMS ((sbitmap *, sbitmap *));
662 static int expr_reaches_here_p PARAMS ((struct occr *, struct expr *,
663 basic_block, int));
664 static rtx computing_insn PARAMS ((struct expr *, rtx));
665 static int def_reaches_here_p PARAMS ((rtx, rtx));
666 static int can_disregard_other_sets PARAMS ((struct reg_set **, rtx, int));
667 static int handle_avail_expr PARAMS ((rtx, struct expr *));
668 static int classic_gcse PARAMS ((void));
669 static int one_classic_gcse_pass PARAMS ((int));
670 static void invalidate_nonnull_info PARAMS ((rtx, rtx, void *));
671 static void delete_null_pointer_checks_1 PARAMS ((varray_type *, unsigned int *,
672 sbitmap *, sbitmap *,
673 struct null_pointer_info *));
674 static rtx process_insert_insn PARAMS ((struct expr *));
675 static int pre_edge_insert PARAMS ((struct edge_list *, struct expr **));
676 static int expr_reaches_here_p_work PARAMS ((struct occr *, struct expr *,
677 basic_block, int, char *));
678 static int pre_expr_reaches_here_p_work PARAMS ((basic_block, struct expr *,
679 basic_block, char *));
680 static struct ls_expr * ldst_entry PARAMS ((rtx));
681 static void free_ldst_entry PARAMS ((struct ls_expr *));
682 static void free_ldst_mems PARAMS ((void));
683 static void print_ldst_list PARAMS ((FILE *));
684 static struct ls_expr * find_rtx_in_ldst PARAMS ((rtx));
685 static int enumerate_ldsts PARAMS ((void));
686 static inline struct ls_expr * first_ls_expr PARAMS ((void));
687 static inline struct ls_expr * next_ls_expr PARAMS ((struct ls_expr *));
688 static int simple_mem PARAMS ((rtx));
689 static void invalidate_any_buried_refs PARAMS ((rtx));
690 static void compute_ld_motion_mems PARAMS ((void));
691 static void trim_ld_motion_mems PARAMS ((void));
692 static void update_ld_motion_stores PARAMS ((struct expr *));
693 static void reg_set_info PARAMS ((rtx, rtx, void *));
694 static int store_ops_ok PARAMS ((rtx, basic_block));
695 static void find_moveable_store PARAMS ((rtx));
696 static int compute_store_table PARAMS ((void));
697 static int load_kills_store PARAMS ((rtx, rtx));
698 static int find_loads PARAMS ((rtx, rtx));
699 static int store_killed_in_insn PARAMS ((rtx, rtx));
700 static int store_killed_after PARAMS ((rtx, rtx, basic_block));
701 static int store_killed_before PARAMS ((rtx, rtx, basic_block));
702 static void build_store_vectors PARAMS ((void));
703 static void insert_insn_start_bb PARAMS ((rtx, basic_block));
704 static int insert_store PARAMS ((struct ls_expr *, edge));
705 static void replace_store_insn PARAMS ((rtx, rtx, basic_block));
706 static void delete_store PARAMS ((struct ls_expr *,
707 basic_block));
708 static void free_store_memory PARAMS ((void));
709 static void store_motion PARAMS ((void));
710 \f
711 /* Entry point for global common subexpression elimination.
712 F is the first instruction in the function. */
713
714 int
715 gcse_main (f, file)
716 rtx f;
717 FILE *file;
718 {
719 int changed, pass;
720 /* Bytes used at start of pass. */
721 int initial_bytes_used;
722 /* Maximum number of bytes used by a pass. */
723 int max_pass_bytes;
724 /* Point to release obstack data from for each pass. */
725 char *gcse_obstack_bottom;
726
727 /* Insertion of instructions on edges can create new basic blocks; we
728 need the original basic block count so that we can properly deallocate
729 arrays sized on the number of basic blocks originally in the cfg. */
730 int orig_bb_count;
731 /* We do not construct an accurate cfg in functions which call
732 setjmp, so just punt to be safe. */
733 if (current_function_calls_setjmp)
734 return 0;
735
736 /* Assume that we do not need to run jump optimizations after gcse. */
737 run_jump_opt_after_gcse = 0;
738
739 /* For calling dump_foo fns from gdb. */
740 debug_stderr = stderr;
741 gcse_file = file;
742
743 /* Identify the basic block information for this function, including
744 successors and predecessors. */
745 max_gcse_regno = max_reg_num ();
746
747 if (file)
748 dump_flow_info (file);
749
750 orig_bb_count = n_basic_blocks;
751 /* Return if there's nothing to do. */
752 if (n_basic_blocks <= 1)
753 return 0;
754
755 /* Trying to perform global optimizations on flow graphs which have
756 a high connectivity will take a long time and is unlikely to be
757 particularly useful.
758
759 In normal circumstances a cfg should have about twice has many edges
760 as blocks. But we do not want to punish small functions which have
761 a couple switch statements. So we require a relatively large number
762 of basic blocks and the ratio of edges to blocks to be high. */
763 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
764 {
765 if (warn_disabled_optimization)
766 warning ("GCSE disabled: %d > 1000 basic blocks and %d >= 20 edges/basic block",
767 n_basic_blocks, n_edges / n_basic_blocks);
768 return 0;
769 }
770
771 /* If allocating memory for the cprop bitmap would take up too much
772 storage it's better just to disable the optimization. */
773 if ((n_basic_blocks
774 * SBITMAP_SET_SIZE (max_gcse_regno)
775 * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY)
776 {
777 if (warn_disabled_optimization)
778 warning ("GCSE disabled: %d basic blocks and %d registers",
779 n_basic_blocks, max_gcse_regno);
780
781 return 0;
782 }
783
784 /* See what modes support reg/reg copy operations. */
785 if (! can_copy_init_p)
786 {
787 compute_can_copy ();
788 can_copy_init_p = 1;
789 }
790
791 gcc_obstack_init (&gcse_obstack);
792 bytes_used = 0;
793
794 /* We need alias. */
795 init_alias_analysis ();
796 /* Record where pseudo-registers are set. This data is kept accurate
797 during each pass. ??? We could also record hard-reg information here
798 [since it's unchanging], however it is currently done during hash table
799 computation.
800
801 It may be tempting to compute MEM set information here too, but MEM sets
802 will be subject to code motion one day and thus we need to compute
803 information about memory sets when we build the hash tables. */
804
805 alloc_reg_set_mem (max_gcse_regno);
806 compute_sets (f);
807
808 pass = 0;
809 initial_bytes_used = bytes_used;
810 max_pass_bytes = 0;
811 gcse_obstack_bottom = gcse_alloc (1);
812 changed = 1;
813 while (changed && pass < MAX_PASSES)
814 {
815 changed = 0;
816 if (file)
817 fprintf (file, "GCSE pass %d\n\n", pass + 1);
818
819 /* Initialize bytes_used to the space for the pred/succ lists,
820 and the reg_set_table data. */
821 bytes_used = initial_bytes_used;
822
823 /* Each pass may create new registers, so recalculate each time. */
824 max_gcse_regno = max_reg_num ();
825
826 alloc_gcse_mem (f);
827
828 /* Don't allow constant propagation to modify jumps
829 during this pass. */
830 changed = one_cprop_pass (pass + 1, 0);
831
832 if (optimize_size)
833 changed |= one_classic_gcse_pass (pass + 1);
834 else
835 {
836 changed |= one_pre_gcse_pass (pass + 1);
837 /* We may have just created new basic blocks. Release and
838 recompute various things which are sized on the number of
839 basic blocks. */
840 if (changed)
841 {
842 int i;
843
844 for (i = 0; i < orig_bb_count; i++)
845 {
846 if (modify_mem_list[i])
847 free_INSN_LIST_list (modify_mem_list + i);
848 if (canon_modify_mem_list[i])
849 free_INSN_LIST_list (canon_modify_mem_list + i);
850 }
851 modify_mem_list
852 = (rtx *) gmalloc (n_basic_blocks * sizeof (rtx *));
853 canon_modify_mem_list
854 = (rtx *) gmalloc (n_basic_blocks * sizeof (rtx *));
855 memset ((char *) modify_mem_list, 0, n_basic_blocks * sizeof (rtx *));
856 memset ((char *) canon_modify_mem_list, 0, n_basic_blocks * sizeof (rtx *));
857 orig_bb_count = n_basic_blocks;
858 }
859 free_reg_set_mem ();
860 alloc_reg_set_mem (max_reg_num ());
861 compute_sets (f);
862 run_jump_opt_after_gcse = 1;
863 }
864
865 if (max_pass_bytes < bytes_used)
866 max_pass_bytes = bytes_used;
867
868 /* Free up memory, then reallocate for code hoisting. We can
869 not re-use the existing allocated memory because the tables
870 will not have info for the insns or registers created by
871 partial redundancy elimination. */
872 free_gcse_mem ();
873
874 /* It does not make sense to run code hoisting unless we optimizing
875 for code size -- it rarely makes programs faster, and can make
876 them bigger if we did partial redundancy elimination (when optimizing
877 for space, we use a classic gcse algorithm instead of partial
878 redundancy algorithms). */
879 if (optimize_size)
880 {
881 max_gcse_regno = max_reg_num ();
882 alloc_gcse_mem (f);
883 changed |= one_code_hoisting_pass ();
884 free_gcse_mem ();
885
886 if (max_pass_bytes < bytes_used)
887 max_pass_bytes = bytes_used;
888 }
889
890 if (file)
891 {
892 fprintf (file, "\n");
893 fflush (file);
894 }
895
896 obstack_free (&gcse_obstack, gcse_obstack_bottom);
897 pass++;
898 }
899
900 /* Do one last pass of copy propagation, including cprop into
901 conditional jumps. */
902
903 max_gcse_regno = max_reg_num ();
904 alloc_gcse_mem (f);
905 /* This time, go ahead and allow cprop to alter jumps. */
906 one_cprop_pass (pass + 1, 1);
907 free_gcse_mem ();
908
909 if (file)
910 {
911 fprintf (file, "GCSE of %s: %d basic blocks, ",
912 current_function_name, n_basic_blocks);
913 fprintf (file, "%d pass%s, %d bytes\n\n",
914 pass, pass > 1 ? "es" : "", max_pass_bytes);
915 }
916
917 obstack_free (&gcse_obstack, NULL_PTR);
918 free_reg_set_mem ();
919 /* We are finished with alias. */
920 end_alias_analysis ();
921 allocate_reg_info (max_reg_num (), FALSE, FALSE);
922
923 if (!optimize_size && flag_gcse_sm)
924 store_motion ();
925 /* Record where pseudo-registers are set. */
926 return run_jump_opt_after_gcse;
927 }
928 \f
929 /* Misc. utilities. */
930
931 /* Compute which modes support reg/reg copy operations. */
932
933 static void
934 compute_can_copy ()
935 {
936 int i;
937 #ifndef AVOID_CCMODE_COPIES
938 rtx reg,insn;
939 #endif
940 memset (can_copy_p, 0, NUM_MACHINE_MODES);
941
942 start_sequence ();
943 for (i = 0; i < NUM_MACHINE_MODES; i++)
944 if (GET_MODE_CLASS (i) == MODE_CC)
945 {
946 #ifdef AVOID_CCMODE_COPIES
947 can_copy_p[i] = 0;
948 #else
949 reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1);
950 insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg));
951 if (recog (PATTERN (insn), insn, NULL_PTR) >= 0)
952 can_copy_p[i] = 1;
953 #endif
954 }
955 else
956 can_copy_p[i] = 1;
957
958 end_sequence ();
959 }
960 \f
961 /* Cover function to xmalloc to record bytes allocated. */
962
963 static char *
964 gmalloc (size)
965 unsigned int size;
966 {
967 bytes_used += size;
968 return xmalloc (size);
969 }
970
971 /* Cover function to xrealloc.
972 We don't record the additional size since we don't know it.
973 It won't affect memory usage stats much anyway. */
974
975 static char *
976 grealloc (ptr, size)
977 char *ptr;
978 unsigned int size;
979 {
980 return xrealloc (ptr, size);
981 }
982
983 /* Cover function to obstack_alloc.
984 We don't need to record the bytes allocated here since
985 obstack_chunk_alloc is set to gmalloc. */
986
987 static char *
988 gcse_alloc (size)
989 unsigned long size;
990 {
991 return (char *) obstack_alloc (&gcse_obstack, size);
992 }
993
994 /* Allocate memory for the cuid mapping array,
995 and reg/memory set tracking tables.
996
997 This is called at the start of each pass. */
998
999 static void
1000 alloc_gcse_mem (f)
1001 rtx f;
1002 {
1003 int i,n;
1004 rtx insn;
1005
1006 /* Find the largest UID and create a mapping from UIDs to CUIDs.
1007 CUIDs are like UIDs except they increase monotonically, have no gaps,
1008 and only apply to real insns. */
1009
1010 max_uid = get_max_uid ();
1011 n = (max_uid + 1) * sizeof (int);
1012 uid_cuid = (int *) gmalloc (n);
1013 memset ((char *) uid_cuid, 0, n);
1014 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
1015 {
1016 if (INSN_P (insn))
1017 uid_cuid[INSN_UID (insn)] = i++;
1018 else
1019 uid_cuid[INSN_UID (insn)] = i;
1020 }
1021
1022 /* Create a table mapping cuids to insns. */
1023
1024 max_cuid = i;
1025 n = (max_cuid + 1) * sizeof (rtx);
1026 cuid_insn = (rtx *) gmalloc (n);
1027 memset ((char *) cuid_insn, 0, n);
1028 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
1029 if (INSN_P (insn))
1030 CUID_INSN (i++) = insn;
1031
1032 /* Allocate vars to track sets of regs. */
1033 reg_set_bitmap = (sbitmap) sbitmap_alloc (max_gcse_regno);
1034
1035 /* Allocate vars to track sets of regs, memory per block. */
1036 reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks,
1037 max_gcse_regno);
1038 mem_set_in_block = (char *) gmalloc (n_basic_blocks);
1039 /* Allocate array to keep a list of insns which modify memory in each
1040 basic block. */
1041 modify_mem_list = (rtx *) gmalloc (n_basic_blocks * sizeof (rtx *));
1042 canon_modify_mem_list = (rtx *) gmalloc (n_basic_blocks * sizeof (rtx *));
1043 memset ((char *) modify_mem_list, 0, n_basic_blocks * sizeof (rtx *));
1044 memset ((char *) canon_modify_mem_list, 0, n_basic_blocks * sizeof (rtx *));
1045 }
1046
1047 /* Free memory allocated by alloc_gcse_mem. */
1048
1049 static void
1050 free_gcse_mem ()
1051 {
1052 free (uid_cuid);
1053 free (cuid_insn);
1054
1055 free (reg_set_bitmap);
1056
1057 free (reg_set_in_block);
1058 free (mem_set_in_block);
1059 /* re-Cache any INSN_LIST nodes we have allocated. */
1060 {
1061 int i;
1062
1063 for (i = 0; i < n_basic_blocks; i++)
1064 {
1065 if (modify_mem_list[i])
1066 free_INSN_LIST_list (modify_mem_list + i);
1067 if (canon_modify_mem_list[i])
1068 free_INSN_LIST_list (canon_modify_mem_list + i);
1069 }
1070
1071 free (modify_mem_list);
1072 free (canon_modify_mem_list);
1073 modify_mem_list = 0;
1074 canon_modify_mem_list = 0;
1075 }
1076 }
1077
1078 /* Many of the global optimization algorithms work by solving dataflow
1079 equations for various expressions. Initially, some local value is
1080 computed for each expression in each block. Then, the values across the
1081 various blocks are combined (by following flow graph edges) to arrive at
1082 global values. Conceptually, each set of equations is independent. We
1083 may therefore solve all the equations in parallel, solve them one at a
1084 time, or pick any intermediate approach.
1085
1086 When you're going to need N two-dimensional bitmaps, each X (say, the
1087 number of blocks) by Y (say, the number of expressions), call this
1088 function. It's not important what X and Y represent; only that Y
1089 correspond to the things that can be done in parallel. This function will
1090 return an appropriate chunking factor C; you should solve C sets of
1091 equations in parallel. By going through this function, we can easily
1092 trade space against time; by solving fewer equations in parallel we use
1093 less space. */
1094
1095 static int
1096 get_bitmap_width (n, x, y)
1097 int n;
1098 int x;
1099 int y;
1100 {
1101 /* It's not really worth figuring out *exactly* how much memory will
1102 be used by a particular choice. The important thing is to get
1103 something approximately right. */
1104 size_t max_bitmap_memory = 10 * 1024 * 1024;
1105
1106 /* The number of bytes we'd use for a single column of minimum
1107 width. */
1108 size_t column_size = n * x * sizeof (SBITMAP_ELT_TYPE);
1109
1110 /* Often, it's reasonable just to solve all the equations in
1111 parallel. */
1112 if (column_size * SBITMAP_SET_SIZE (y) <= max_bitmap_memory)
1113 return y;
1114
1115 /* Otherwise, pick the largest width we can, without going over the
1116 limit. */
1117 return SBITMAP_ELT_BITS * ((max_bitmap_memory + column_size - 1)
1118 / column_size);
1119 }
1120 \f
1121 /* Compute the local properties of each recorded expression.
1122
1123 Local properties are those that are defined by the block, irrespective of
1124 other blocks.
1125
1126 An expression is transparent in a block if its operands are not modified
1127 in the block.
1128
1129 An expression is computed (locally available) in a block if it is computed
1130 at least once and expression would contain the same value if the
1131 computation was moved to the end of the block.
1132
1133 An expression is locally anticipatable in a block if it is computed at
1134 least once and expression would contain the same value if the computation
1135 was moved to the beginning of the block.
1136
1137 We call this routine for cprop, pre and code hoisting. They all compute
1138 basically the same information and thus can easily share this code.
1139
1140 TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local
1141 properties. If NULL, then it is not necessary to compute or record that
1142 particular property.
1143
1144 SETP controls which hash table to look at. If zero, this routine looks at
1145 the expr hash table; if nonzero this routine looks at the set hash table.
1146 Additionally, TRANSP is computed as ~TRANSP, since this is really cprop's
1147 ABSALTERED. */
1148
1149 static void
1150 compute_local_properties (transp, comp, antloc, setp)
1151 sbitmap *transp;
1152 sbitmap *comp;
1153 sbitmap *antloc;
1154 int setp;
1155 {
1156 unsigned int i, hash_table_size;
1157 struct expr **hash_table;
1158
1159 /* Initialize any bitmaps that were passed in. */
1160 if (transp)
1161 {
1162 if (setp)
1163 sbitmap_vector_zero (transp, n_basic_blocks);
1164 else
1165 sbitmap_vector_ones (transp, n_basic_blocks);
1166 }
1167
1168 if (comp)
1169 sbitmap_vector_zero (comp, n_basic_blocks);
1170 if (antloc)
1171 sbitmap_vector_zero (antloc, n_basic_blocks);
1172
1173 /* We use the same code for cprop, pre and hoisting. For cprop
1174 we care about the set hash table, for pre and hoisting we
1175 care about the expr hash table. */
1176 hash_table_size = setp ? set_hash_table_size : expr_hash_table_size;
1177 hash_table = setp ? set_hash_table : expr_hash_table;
1178
1179 for (i = 0; i < hash_table_size; i++)
1180 {
1181 struct expr *expr;
1182
1183 for (expr = hash_table[i]; expr != NULL; expr = expr->next_same_hash)
1184 {
1185 int indx = expr->bitmap_index;
1186 struct occr *occr;
1187
1188 /* The expression is transparent in this block if it is not killed.
1189 We start by assuming all are transparent [none are killed], and
1190 then reset the bits for those that are. */
1191 if (transp)
1192 compute_transp (expr->expr, indx, transp, setp);
1193
1194 /* The occurrences recorded in antic_occr are exactly those that
1195 we want to set to non-zero in ANTLOC. */
1196 if (antloc)
1197 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
1198 {
1199 SET_BIT (antloc[BLOCK_NUM (occr->insn)], indx);
1200
1201 /* While we're scanning the table, this is a good place to
1202 initialize this. */
1203 occr->deleted_p = 0;
1204 }
1205
1206 /* The occurrences recorded in avail_occr are exactly those that
1207 we want to set to non-zero in COMP. */
1208 if (comp)
1209 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
1210 {
1211 SET_BIT (comp[BLOCK_NUM (occr->insn)], indx);
1212
1213 /* While we're scanning the table, this is a good place to
1214 initialize this. */
1215 occr->copied_p = 0;
1216 }
1217
1218 /* While we're scanning the table, this is a good place to
1219 initialize this. */
1220 expr->reaching_reg = 0;
1221 }
1222 }
1223 }
1224 \f
1225 /* Register set information.
1226
1227 `reg_set_table' records where each register is set or otherwise
1228 modified. */
1229
1230 static struct obstack reg_set_obstack;
1231
1232 static void
1233 alloc_reg_set_mem (n_regs)
1234 int n_regs;
1235 {
1236 unsigned int n;
1237
1238 reg_set_table_size = n_regs + REG_SET_TABLE_SLOP;
1239 n = reg_set_table_size * sizeof (struct reg_set *);
1240 reg_set_table = (struct reg_set **) gmalloc (n);
1241 memset ((char *) reg_set_table, 0, n);
1242
1243 gcc_obstack_init (&reg_set_obstack);
1244 }
1245
1246 static void
1247 free_reg_set_mem ()
1248 {
1249 free (reg_set_table);
1250 obstack_free (&reg_set_obstack, NULL_PTR);
1251 }
1252
1253 /* Record REGNO in the reg_set table. */
1254
1255 static void
1256 record_one_set (regno, insn)
1257 int regno;
1258 rtx insn;
1259 {
1260 /* Allocate a new reg_set element and link it onto the list. */
1261 struct reg_set *new_reg_info;
1262
1263 /* If the table isn't big enough, enlarge it. */
1264 if (regno >= reg_set_table_size)
1265 {
1266 int new_size = regno + REG_SET_TABLE_SLOP;
1267
1268 reg_set_table
1269 = (struct reg_set **) grealloc ((char *) reg_set_table,
1270 new_size * sizeof (struct reg_set *));
1271 memset ((char *) (reg_set_table + reg_set_table_size), 0,
1272 (new_size - reg_set_table_size) * sizeof (struct reg_set *));
1273 reg_set_table_size = new_size;
1274 }
1275
1276 new_reg_info = (struct reg_set *) obstack_alloc (&reg_set_obstack,
1277 sizeof (struct reg_set));
1278 bytes_used += sizeof (struct reg_set);
1279 new_reg_info->insn = insn;
1280 new_reg_info->next = reg_set_table[regno];
1281 reg_set_table[regno] = new_reg_info;
1282 }
1283
1284 /* Called from compute_sets via note_stores to handle one SET or CLOBBER in
1285 an insn. The DATA is really the instruction in which the SET is
1286 occurring. */
1287
1288 static void
1289 record_set_info (dest, setter, data)
1290 rtx dest, setter ATTRIBUTE_UNUSED;
1291 void *data;
1292 {
1293 rtx record_set_insn = (rtx) data;
1294
1295 if (GET_CODE (dest) == REG && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
1296 record_one_set (REGNO (dest), record_set_insn);
1297 }
1298
1299 /* Scan the function and record each set of each pseudo-register.
1300
1301 This is called once, at the start of the gcse pass. See the comments for
1302 `reg_set_table' for further documenation. */
1303
1304 static void
1305 compute_sets (f)
1306 rtx f;
1307 {
1308 rtx insn;
1309
1310 for (insn = f; insn != 0; insn = NEXT_INSN (insn))
1311 if (INSN_P (insn))
1312 note_stores (PATTERN (insn), record_set_info, insn);
1313 }
1314 \f
1315 /* Hash table support. */
1316
1317 /* For each register, the cuid of the first/last insn in the block to set it,
1318 or -1 if not set. */
1319 #define NEVER_SET -1
1320 static int *reg_first_set;
1321 static int *reg_last_set;
1322
1323 /* While computing "first/last set" info, this is the CUID of first/last insn
1324 to set memory or -1 if not set. `mem_last_set' is also used when
1325 performing GCSE to record whether memory has been set since the beginning
1326 of the block.
1327
1328 Note that handling of memory is very simple, we don't make any attempt
1329 to optimize things (later). */
1330 static int mem_first_set;
1331 static int mem_last_set;
1332
1333 /* See whether X, the source of a set, is something we want to consider for
1334 GCSE. */
1335
1336 static int
1337 want_to_gcse_p (x)
1338 rtx x;
1339 {
1340 static rtx test_insn = 0;
1341 int num_clobbers = 0;
1342 int icode;
1343
1344 switch (GET_CODE (x))
1345 {
1346 case REG:
1347 case SUBREG:
1348 case CONST_INT:
1349 case CONST_DOUBLE:
1350 case CALL:
1351 return 0;
1352
1353 default:
1354 break;
1355 }
1356
1357 /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */
1358 if (general_operand (x, GET_MODE (x)))
1359 return 1;
1360 else if (GET_MODE (x) == VOIDmode)
1361 return 0;
1362
1363 /* Otherwise, check if we can make a valid insn from it. First initialize
1364 our test insn if we haven't already. */
1365 if (test_insn == 0)
1366 {
1367 test_insn
1368 = make_insn_raw (gen_rtx_SET (VOIDmode,
1369 gen_rtx_REG (word_mode,
1370 FIRST_PSEUDO_REGISTER * 2),
1371 const0_rtx));
1372 NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0;
1373 ggc_add_rtx_root (&test_insn, 1);
1374 }
1375
1376 /* Now make an insn like the one we would make when GCSE'ing and see if
1377 valid. */
1378 PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x));
1379 SET_SRC (PATTERN (test_insn)) = x;
1380 return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0
1381 && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode)));
1382 }
1383
1384 /* Return non-zero if the operands of expression X are unchanged from the
1385 start of INSN's basic block up to but not including INSN (if AVAIL_P == 0),
1386 or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */
1387
1388 static int
1389 oprs_unchanged_p (x, insn, avail_p)
1390 rtx x, insn;
1391 int avail_p;
1392 {
1393 int i, j;
1394 enum rtx_code code;
1395 const char *fmt;
1396
1397 if (x == 0)
1398 return 1;
1399
1400 code = GET_CODE (x);
1401 switch (code)
1402 {
1403 case REG:
1404 if (avail_p)
1405 return (reg_last_set[REGNO (x)] == NEVER_SET
1406 || reg_last_set[REGNO (x)] < INSN_CUID (insn));
1407 else
1408 return (reg_first_set[REGNO (x)] == NEVER_SET
1409 || reg_first_set[REGNO (x)] >= INSN_CUID (insn));
1410
1411 case MEM:
1412 if (load_killed_in_block_p (BLOCK_FOR_INSN (insn), INSN_CUID (insn),
1413 x, avail_p))
1414 return 0;
1415 if (avail_p && mem_last_set != NEVER_SET
1416 && mem_last_set >= INSN_CUID (insn))
1417 return 0;
1418 else if (! avail_p && mem_first_set != NEVER_SET
1419 && mem_first_set < INSN_CUID (insn))
1420 return 0;
1421 else
1422 return oprs_unchanged_p (XEXP (x, 0), insn, avail_p);
1423
1424 case PRE_DEC:
1425 case PRE_INC:
1426 case POST_DEC:
1427 case POST_INC:
1428 case PRE_MODIFY:
1429 case POST_MODIFY:
1430 return 0;
1431
1432 case PC:
1433 case CC0: /*FIXME*/
1434 case CONST:
1435 case CONST_INT:
1436 case CONST_DOUBLE:
1437 case SYMBOL_REF:
1438 case LABEL_REF:
1439 case ADDR_VEC:
1440 case ADDR_DIFF_VEC:
1441 return 1;
1442
1443 default:
1444 break;
1445 }
1446
1447 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
1448 {
1449 if (fmt[i] == 'e')
1450 {
1451 /* If we are about to do the last recursive call needed at this
1452 level, change it into iteration. This function is called enough
1453 to be worth it. */
1454 if (i == 0)
1455 return oprs_unchanged_p (XEXP (x, i), insn, avail_p);
1456
1457 else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p))
1458 return 0;
1459 }
1460 else if (fmt[i] == 'E')
1461 for (j = 0; j < XVECLEN (x, i); j++)
1462 if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p))
1463 return 0;
1464 }
1465
1466 return 1;
1467 }
1468
1469 /* Used for communication between mems_conflict_for_gcse_p and
1470 load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a
1471 conflict between two memory references. */
1472 static int gcse_mems_conflict_p;
1473
1474 /* Used for communication between mems_conflict_for_gcse_p and
1475 load_killed_in_block_p. A memory reference for a load instruction,
1476 mems_conflict_for_gcse_p will see if a memory store conflicts with
1477 this memory load. */
1478 static rtx gcse_mem_operand;
1479
1480 /* DEST is the output of an instruction. If it is a memory reference, and
1481 possibly conflicts with the load found in gcse_mem_operand, then set
1482 gcse_mems_conflict_p to a nonzero value. */
1483
1484 static void
1485 mems_conflict_for_gcse_p (dest, setter, data)
1486 rtx dest, setter ATTRIBUTE_UNUSED;
1487 void *data ATTRIBUTE_UNUSED;
1488 {
1489 while (GET_CODE (dest) == SUBREG
1490 || GET_CODE (dest) == ZERO_EXTRACT
1491 || GET_CODE (dest) == SIGN_EXTRACT
1492 || GET_CODE (dest) == STRICT_LOW_PART)
1493 dest = XEXP (dest, 0);
1494
1495 /* If DEST is not a MEM, then it will not conflict with the load. Note
1496 that function calls are assumed to clobber memory, but are handled
1497 elsewhere. */
1498 if (GET_CODE (dest) != MEM)
1499 return;
1500
1501 /* If we are setting a MEM in our list of specially recognized MEMs,
1502 don't mark as killed this time. */
1503
1504 if (dest == gcse_mem_operand && pre_ldst_mems != NULL)
1505 {
1506 if (!find_rtx_in_ldst (dest))
1507 gcse_mems_conflict_p = 1;
1508 return;
1509 }
1510
1511 if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand,
1512 rtx_addr_varies_p))
1513 gcse_mems_conflict_p = 1;
1514 }
1515
1516 /* Return nonzero if the expression in X (a memory reference) is killed
1517 in block BB before or after the insn with the CUID in UID_LIMIT.
1518 AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills
1519 before UID_LIMIT.
1520
1521 To check the entire block, set UID_LIMIT to max_uid + 1 and
1522 AVAIL_P to 0. */
1523
1524 static int
1525 load_killed_in_block_p (bb, uid_limit, x, avail_p)
1526 basic_block bb;
1527 int uid_limit;
1528 rtx x;
1529 int avail_p;
1530 {
1531 rtx list_entry = modify_mem_list[bb->index];
1532 while (list_entry)
1533 {
1534 rtx setter;
1535 /* Ignore entries in the list that do not apply. */
1536 if ((avail_p
1537 && INSN_CUID (XEXP (list_entry, 0)) < uid_limit)
1538 || (! avail_p
1539 && INSN_CUID (XEXP (list_entry, 0)) > uid_limit))
1540 {
1541 list_entry = XEXP (list_entry, 1);
1542 continue;
1543 }
1544
1545 setter = XEXP (list_entry, 0);
1546
1547 /* If SETTER is a call everything is clobbered. Note that calls
1548 to pure functions are never put on the list, so we need not
1549 worry about them. */
1550 if (GET_CODE (setter) == CALL_INSN)
1551 return 1;
1552
1553 /* SETTER must be an INSN of some kind that sets memory. Call
1554 note_stores to examine each hunk of memory that is modified.
1555
1556 The note_stores interface is pretty limited, so we have to
1557 communicate via global variables. Yuk. */
1558 gcse_mem_operand = x;
1559 gcse_mems_conflict_p = 0;
1560 note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL);
1561 if (gcse_mems_conflict_p)
1562 return 1;
1563 list_entry = XEXP (list_entry, 1);
1564 }
1565 return 0;
1566 }
1567
1568 /* Return non-zero if the operands of expression X are unchanged from
1569 the start of INSN's basic block up to but not including INSN. */
1570
1571 static int
1572 oprs_anticipatable_p (x, insn)
1573 rtx x, insn;
1574 {
1575 return oprs_unchanged_p (x, insn, 0);
1576 }
1577
1578 /* Return non-zero if the operands of expression X are unchanged from
1579 INSN to the end of INSN's basic block. */
1580
1581 static int
1582 oprs_available_p (x, insn)
1583 rtx x, insn;
1584 {
1585 return oprs_unchanged_p (x, insn, 1);
1586 }
1587
1588 /* Hash expression X.
1589
1590 MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean
1591 indicating if a volatile operand is found or if the expression contains
1592 something we don't want to insert in the table.
1593
1594 ??? One might want to merge this with canon_hash. Later. */
1595
1596 static unsigned int
1597 hash_expr (x, mode, do_not_record_p, hash_table_size)
1598 rtx x;
1599 enum machine_mode mode;
1600 int *do_not_record_p;
1601 int hash_table_size;
1602 {
1603 unsigned int hash;
1604
1605 *do_not_record_p = 0;
1606
1607 hash = hash_expr_1 (x, mode, do_not_record_p);
1608 return hash % hash_table_size;
1609 }
1610
1611 /* Hash a string. Just add its bytes up. */
1612
1613 static inline unsigned
1614 hash_string_1 (ps)
1615 const char *ps;
1616 {
1617 unsigned hash = 0;
1618 const unsigned char *p = (const unsigned char *)ps;
1619
1620 if (p)
1621 while (*p)
1622 hash += *p++;
1623
1624 return hash;
1625 }
1626
1627 /* Subroutine of hash_expr to do the actual work. */
1628
1629 static unsigned int
1630 hash_expr_1 (x, mode, do_not_record_p)
1631 rtx x;
1632 enum machine_mode mode;
1633 int *do_not_record_p;
1634 {
1635 int i, j;
1636 unsigned hash = 0;
1637 enum rtx_code code;
1638 const char *fmt;
1639
1640 /* Used to turn recursion into iteration. We can't rely on GCC's
1641 tail-recursion eliminatio since we need to keep accumulating values
1642 in HASH. */
1643
1644 if (x == 0)
1645 return hash;
1646
1647 repeat:
1648 code = GET_CODE (x);
1649 switch (code)
1650 {
1651 case REG:
1652 hash += ((unsigned int) REG << 7) + REGNO (x);
1653 return hash;
1654
1655 case CONST_INT:
1656 hash += (((unsigned int) CONST_INT << 7) + (unsigned int) mode
1657 + (unsigned int) INTVAL (x));
1658 return hash;
1659
1660 case CONST_DOUBLE:
1661 /* This is like the general case, except that it only counts
1662 the integers representing the constant. */
1663 hash += (unsigned int) code + (unsigned int) GET_MODE (x);
1664 if (GET_MODE (x) != VOIDmode)
1665 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1666 hash += (unsigned int) XWINT (x, i);
1667 else
1668 hash += ((unsigned int) CONST_DOUBLE_LOW (x)
1669 + (unsigned int) CONST_DOUBLE_HIGH (x));
1670 return hash;
1671
1672 /* Assume there is only one rtx object for any given label. */
1673 case LABEL_REF:
1674 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
1675 differences and differences between each stage's debugging dumps. */
1676 hash += (((unsigned int) LABEL_REF << 7)
1677 + CODE_LABEL_NUMBER (XEXP (x, 0)));
1678 return hash;
1679
1680 case SYMBOL_REF:
1681 {
1682 /* Don't hash on the symbol's address to avoid bootstrap differences.
1683 Different hash values may cause expressions to be recorded in
1684 different orders and thus different registers to be used in the
1685 final assembler. This also avoids differences in the dump files
1686 between various stages. */
1687 unsigned int h = 0;
1688 const unsigned char *p = (const unsigned char *) XSTR (x, 0);
1689
1690 while (*p)
1691 h += (h << 7) + *p++; /* ??? revisit */
1692
1693 hash += ((unsigned int) SYMBOL_REF << 7) + h;
1694 return hash;
1695 }
1696
1697 case MEM:
1698 if (MEM_VOLATILE_P (x))
1699 {
1700 *do_not_record_p = 1;
1701 return 0;
1702 }
1703
1704 hash += (unsigned int) MEM;
1705 hash += MEM_ALIAS_SET (x);
1706 x = XEXP (x, 0);
1707 goto repeat;
1708
1709 case PRE_DEC:
1710 case PRE_INC:
1711 case POST_DEC:
1712 case POST_INC:
1713 case PC:
1714 case CC0:
1715 case CALL:
1716 case UNSPEC_VOLATILE:
1717 *do_not_record_p = 1;
1718 return 0;
1719
1720 case ASM_OPERANDS:
1721 if (MEM_VOLATILE_P (x))
1722 {
1723 *do_not_record_p = 1;
1724 return 0;
1725 }
1726 else
1727 {
1728 /* We don't want to take the filename and line into account. */
1729 hash += (unsigned) code + (unsigned) GET_MODE (x)
1730 + hash_string_1 (ASM_OPERANDS_TEMPLATE (x))
1731 + hash_string_1 (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
1732 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
1733
1734 if (ASM_OPERANDS_INPUT_LENGTH (x))
1735 {
1736 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
1737 {
1738 hash += (hash_expr_1 (ASM_OPERANDS_INPUT (x, i),
1739 GET_MODE (ASM_OPERANDS_INPUT (x, i)),
1740 do_not_record_p)
1741 + hash_string_1 (ASM_OPERANDS_INPUT_CONSTRAINT
1742 (x, i)));
1743 }
1744
1745 hash += hash_string_1 (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
1746 x = ASM_OPERANDS_INPUT (x, 0);
1747 mode = GET_MODE (x);
1748 goto repeat;
1749 }
1750 return hash;
1751 }
1752
1753 default:
1754 break;
1755 }
1756
1757 hash += (unsigned) code + (unsigned) GET_MODE (x);
1758 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
1759 {
1760 if (fmt[i] == 'e')
1761 {
1762 /* If we are about to do the last recursive call
1763 needed at this level, change it into iteration.
1764 This function is called enough to be worth it. */
1765 if (i == 0)
1766 {
1767 x = XEXP (x, i);
1768 goto repeat;
1769 }
1770
1771 hash += hash_expr_1 (XEXP (x, i), 0, do_not_record_p);
1772 if (*do_not_record_p)
1773 return 0;
1774 }
1775
1776 else if (fmt[i] == 'E')
1777 for (j = 0; j < XVECLEN (x, i); j++)
1778 {
1779 hash += hash_expr_1 (XVECEXP (x, i, j), 0, do_not_record_p);
1780 if (*do_not_record_p)
1781 return 0;
1782 }
1783
1784 else if (fmt[i] == 's')
1785 hash += hash_string_1 (XSTR (x, i));
1786 else if (fmt[i] == 'i')
1787 hash += (unsigned int) XINT (x, i);
1788 else
1789 abort ();
1790 }
1791
1792 return hash;
1793 }
1794
1795 /* Hash a set of register REGNO.
1796
1797 Sets are hashed on the register that is set. This simplifies the PRE copy
1798 propagation code.
1799
1800 ??? May need to make things more elaborate. Later, as necessary. */
1801
1802 static unsigned int
1803 hash_set (regno, hash_table_size)
1804 int regno;
1805 int hash_table_size;
1806 {
1807 unsigned int hash;
1808
1809 hash = regno;
1810 return hash % hash_table_size;
1811 }
1812
1813 /* Return non-zero if exp1 is equivalent to exp2.
1814 ??? Borrowed from cse.c. Might want to remerge with cse.c. Later. */
1815
1816 static int
1817 expr_equiv_p (x, y)
1818 rtx x, y;
1819 {
1820 register int i, j;
1821 register enum rtx_code code;
1822 register const char *fmt;
1823
1824 if (x == y)
1825 return 1;
1826
1827 if (x == 0 || y == 0)
1828 return x == y;
1829
1830 code = GET_CODE (x);
1831 if (code != GET_CODE (y))
1832 return 0;
1833
1834 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1835 if (GET_MODE (x) != GET_MODE (y))
1836 return 0;
1837
1838 switch (code)
1839 {
1840 case PC:
1841 case CC0:
1842 return x == y;
1843
1844 case CONST_INT:
1845 return INTVAL (x) == INTVAL (y);
1846
1847 case LABEL_REF:
1848 return XEXP (x, 0) == XEXP (y, 0);
1849
1850 case SYMBOL_REF:
1851 return XSTR (x, 0) == XSTR (y, 0);
1852
1853 case REG:
1854 return REGNO (x) == REGNO (y);
1855
1856 case MEM:
1857 /* Can't merge two expressions in different alias sets, since we can
1858 decide that the expression is transparent in a block when it isn't,
1859 due to it being set with the different alias set. */
1860 if (MEM_ALIAS_SET (x) != MEM_ALIAS_SET (y))
1861 return 0;
1862 break;
1863
1864 /* For commutative operations, check both orders. */
1865 case PLUS:
1866 case MULT:
1867 case AND:
1868 case IOR:
1869 case XOR:
1870 case NE:
1871 case EQ:
1872 return ((expr_equiv_p (XEXP (x, 0), XEXP (y, 0))
1873 && expr_equiv_p (XEXP (x, 1), XEXP (y, 1)))
1874 || (expr_equiv_p (XEXP (x, 0), XEXP (y, 1))
1875 && expr_equiv_p (XEXP (x, 1), XEXP (y, 0))));
1876
1877 case ASM_OPERANDS:
1878 /* We don't use the generic code below because we want to
1879 disregard filename and line numbers. */
1880
1881 /* A volatile asm isn't equivalent to any other. */
1882 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
1883 return 0;
1884
1885 if (GET_MODE (x) != GET_MODE (y)
1886 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
1887 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
1888 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
1889 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
1890 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
1891 return 0;
1892
1893 if (ASM_OPERANDS_INPUT_LENGTH (x))
1894 {
1895 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
1896 if (! expr_equiv_p (ASM_OPERANDS_INPUT (x, i),
1897 ASM_OPERANDS_INPUT (y, i))
1898 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
1899 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
1900 return 0;
1901 }
1902
1903 return 1;
1904
1905 default:
1906 break;
1907 }
1908
1909 /* Compare the elements. If any pair of corresponding elements
1910 fail to match, return 0 for the whole thing. */
1911
1912 fmt = GET_RTX_FORMAT (code);
1913 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1914 {
1915 switch (fmt[i])
1916 {
1917 case 'e':
1918 if (! expr_equiv_p (XEXP (x, i), XEXP (y, i)))
1919 return 0;
1920 break;
1921
1922 case 'E':
1923 if (XVECLEN (x, i) != XVECLEN (y, i))
1924 return 0;
1925 for (j = 0; j < XVECLEN (x, i); j++)
1926 if (! expr_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
1927 return 0;
1928 break;
1929
1930 case 's':
1931 if (strcmp (XSTR (x, i), XSTR (y, i)))
1932 return 0;
1933 break;
1934
1935 case 'i':
1936 if (XINT (x, i) != XINT (y, i))
1937 return 0;
1938 break;
1939
1940 case 'w':
1941 if (XWINT (x, i) != XWINT (y, i))
1942 return 0;
1943 break;
1944
1945 case '0':
1946 break;
1947
1948 default:
1949 abort ();
1950 }
1951 }
1952
1953 return 1;
1954 }
1955
1956 /* Insert expression X in INSN in the hash table.
1957 If it is already present, record it as the last occurrence in INSN's
1958 basic block.
1959
1960 MODE is the mode of the value X is being stored into.
1961 It is only used if X is a CONST_INT.
1962
1963 ANTIC_P is non-zero if X is an anticipatable expression.
1964 AVAIL_P is non-zero if X is an available expression. */
1965
1966 static void
1967 insert_expr_in_table (x, mode, insn, antic_p, avail_p)
1968 rtx x;
1969 enum machine_mode mode;
1970 rtx insn;
1971 int antic_p, avail_p;
1972 {
1973 int found, do_not_record_p;
1974 unsigned int hash;
1975 struct expr *cur_expr, *last_expr = NULL;
1976 struct occr *antic_occr, *avail_occr;
1977 struct occr *last_occr = NULL;
1978
1979 hash = hash_expr (x, mode, &do_not_record_p, expr_hash_table_size);
1980
1981 /* Do not insert expression in table if it contains volatile operands,
1982 or if hash_expr determines the expression is something we don't want
1983 to or can't handle. */
1984 if (do_not_record_p)
1985 return;
1986
1987 cur_expr = expr_hash_table[hash];
1988 found = 0;
1989
1990 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
1991 {
1992 /* If the expression isn't found, save a pointer to the end of
1993 the list. */
1994 last_expr = cur_expr;
1995 cur_expr = cur_expr->next_same_hash;
1996 }
1997
1998 if (! found)
1999 {
2000 cur_expr = (struct expr *) gcse_alloc (sizeof (struct expr));
2001 bytes_used += sizeof (struct expr);
2002 if (expr_hash_table[hash] == NULL)
2003 /* This is the first pattern that hashed to this index. */
2004 expr_hash_table[hash] = cur_expr;
2005 else
2006 /* Add EXPR to end of this hash chain. */
2007 last_expr->next_same_hash = cur_expr;
2008
2009 /* Set the fields of the expr element. */
2010 cur_expr->expr = x;
2011 cur_expr->bitmap_index = n_exprs++;
2012 cur_expr->next_same_hash = NULL;
2013 cur_expr->antic_occr = NULL;
2014 cur_expr->avail_occr = NULL;
2015 }
2016
2017 /* Now record the occurrence(s). */
2018 if (antic_p)
2019 {
2020 antic_occr = cur_expr->antic_occr;
2021
2022 /* Search for another occurrence in the same basic block. */
2023 while (antic_occr && BLOCK_NUM (antic_occr->insn) != BLOCK_NUM (insn))
2024 {
2025 /* If an occurrence isn't found, save a pointer to the end of
2026 the list. */
2027 last_occr = antic_occr;
2028 antic_occr = antic_occr->next;
2029 }
2030
2031 if (antic_occr)
2032 /* Found another instance of the expression in the same basic block.
2033 Prefer the currently recorded one. We want the first one in the
2034 block and the block is scanned from start to end. */
2035 ; /* nothing to do */
2036 else
2037 {
2038 /* First occurrence of this expression in this basic block. */
2039 antic_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2040 bytes_used += sizeof (struct occr);
2041 /* First occurrence of this expression in any block? */
2042 if (cur_expr->antic_occr == NULL)
2043 cur_expr->antic_occr = antic_occr;
2044 else
2045 last_occr->next = antic_occr;
2046
2047 antic_occr->insn = insn;
2048 antic_occr->next = NULL;
2049 }
2050 }
2051
2052 if (avail_p)
2053 {
2054 avail_occr = cur_expr->avail_occr;
2055
2056 /* Search for another occurrence in the same basic block. */
2057 while (avail_occr && BLOCK_NUM (avail_occr->insn) != BLOCK_NUM (insn))
2058 {
2059 /* If an occurrence isn't found, save a pointer to the end of
2060 the list. */
2061 last_occr = avail_occr;
2062 avail_occr = avail_occr->next;
2063 }
2064
2065 if (avail_occr)
2066 /* Found another instance of the expression in the same basic block.
2067 Prefer this occurrence to the currently recorded one. We want
2068 the last one in the block and the block is scanned from start
2069 to end. */
2070 avail_occr->insn = insn;
2071 else
2072 {
2073 /* First occurrence of this expression in this basic block. */
2074 avail_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2075 bytes_used += sizeof (struct occr);
2076
2077 /* First occurrence of this expression in any block? */
2078 if (cur_expr->avail_occr == NULL)
2079 cur_expr->avail_occr = avail_occr;
2080 else
2081 last_occr->next = avail_occr;
2082
2083 avail_occr->insn = insn;
2084 avail_occr->next = NULL;
2085 }
2086 }
2087 }
2088
2089 /* Insert pattern X in INSN in the hash table.
2090 X is a SET of a reg to either another reg or a constant.
2091 If it is already present, record it as the last occurrence in INSN's
2092 basic block. */
2093
2094 static void
2095 insert_set_in_table (x, insn)
2096 rtx x;
2097 rtx insn;
2098 {
2099 int found;
2100 unsigned int hash;
2101 struct expr *cur_expr, *last_expr = NULL;
2102 struct occr *cur_occr, *last_occr = NULL;
2103
2104 if (GET_CODE (x) != SET
2105 || GET_CODE (SET_DEST (x)) != REG)
2106 abort ();
2107
2108 hash = hash_set (REGNO (SET_DEST (x)), set_hash_table_size);
2109
2110 cur_expr = set_hash_table[hash];
2111 found = 0;
2112
2113 while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x)))
2114 {
2115 /* If the expression isn't found, save a pointer to the end of
2116 the list. */
2117 last_expr = cur_expr;
2118 cur_expr = cur_expr->next_same_hash;
2119 }
2120
2121 if (! found)
2122 {
2123 cur_expr = (struct expr *) gcse_alloc (sizeof (struct expr));
2124 bytes_used += sizeof (struct expr);
2125 if (set_hash_table[hash] == NULL)
2126 /* This is the first pattern that hashed to this index. */
2127 set_hash_table[hash] = cur_expr;
2128 else
2129 /* Add EXPR to end of this hash chain. */
2130 last_expr->next_same_hash = cur_expr;
2131
2132 /* Set the fields of the expr element.
2133 We must copy X because it can be modified when copy propagation is
2134 performed on its operands. */
2135 cur_expr->expr = copy_rtx (x);
2136 cur_expr->bitmap_index = n_sets++;
2137 cur_expr->next_same_hash = NULL;
2138 cur_expr->antic_occr = NULL;
2139 cur_expr->avail_occr = NULL;
2140 }
2141
2142 /* Now record the occurrence. */
2143 cur_occr = cur_expr->avail_occr;
2144
2145 /* Search for another occurrence in the same basic block. */
2146 while (cur_occr && BLOCK_NUM (cur_occr->insn) != BLOCK_NUM (insn))
2147 {
2148 /* If an occurrence isn't found, save a pointer to the end of
2149 the list. */
2150 last_occr = cur_occr;
2151 cur_occr = cur_occr->next;
2152 }
2153
2154 if (cur_occr)
2155 /* Found another instance of the expression in the same basic block.
2156 Prefer this occurrence to the currently recorded one. We want the
2157 last one in the block and the block is scanned from start to end. */
2158 cur_occr->insn = insn;
2159 else
2160 {
2161 /* First occurrence of this expression in this basic block. */
2162 cur_occr = (struct occr *) gcse_alloc (sizeof (struct occr));
2163 bytes_used += sizeof (struct occr);
2164
2165 /* First occurrence of this expression in any block? */
2166 if (cur_expr->avail_occr == NULL)
2167 cur_expr->avail_occr = cur_occr;
2168 else
2169 last_occr->next = cur_occr;
2170
2171 cur_occr->insn = insn;
2172 cur_occr->next = NULL;
2173 }
2174 }
2175
2176 /* Scan pattern PAT of INSN and add an entry to the hash table. If SET_P is
2177 non-zero, this is for the assignment hash table, otherwise it is for the
2178 expression hash table. */
2179
2180 static void
2181 hash_scan_set (pat, insn, set_p)
2182 rtx pat, insn;
2183 int set_p;
2184 {
2185 rtx src = SET_SRC (pat);
2186 rtx dest = SET_DEST (pat);
2187 rtx note;
2188
2189 if (GET_CODE (src) == CALL)
2190 hash_scan_call (src, insn);
2191
2192 else if (GET_CODE (dest) == REG)
2193 {
2194 unsigned int regno = REGNO (dest);
2195 rtx tmp;
2196
2197 /* If this is a single set and we are doing constant propagation,
2198 see if a REG_NOTE shows this equivalent to a constant. */
2199 if (set_p && (note = find_reg_equal_equiv_note (insn)) != 0
2200 && CONSTANT_P (XEXP (note, 0)))
2201 src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src);
2202
2203 /* Only record sets of pseudo-regs in the hash table. */
2204 if (! set_p
2205 && regno >= FIRST_PSEUDO_REGISTER
2206 /* Don't GCSE something if we can't do a reg/reg copy. */
2207 && can_copy_p [GET_MODE (dest)]
2208 /* Is SET_SRC something we want to gcse? */
2209 && want_to_gcse_p (src)
2210 /* Don't CSE a nop. */
2211 && ! set_noop_p (pat))
2212 {
2213 /* An expression is not anticipatable if its operands are
2214 modified before this insn or if this is not the only SET in
2215 this insn. */
2216 int antic_p = oprs_anticipatable_p (src, insn) && single_set (insn);
2217 /* An expression is not available if its operands are
2218 subsequently modified, including this insn. */
2219 int avail_p = oprs_available_p (src, insn);
2220
2221 insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p);
2222 }
2223
2224 /* Record sets for constant/copy propagation. */
2225 else if (set_p
2226 && regno >= FIRST_PSEUDO_REGISTER
2227 && ((GET_CODE (src) == REG
2228 && REGNO (src) >= FIRST_PSEUDO_REGISTER
2229 && can_copy_p [GET_MODE (dest)]
2230 && REGNO (src) != regno)
2231 || GET_CODE (src) == CONST_INT
2232 || GET_CODE (src) == SYMBOL_REF
2233 || GET_CODE (src) == CONST_DOUBLE)
2234 /* A copy is not available if its src or dest is subsequently
2235 modified. Here we want to search from INSN+1 on, but
2236 oprs_available_p searches from INSN on. */
2237 && (insn == BLOCK_END (BLOCK_NUM (insn))
2238 || ((tmp = next_nonnote_insn (insn)) != NULL_RTX
2239 && oprs_available_p (pat, tmp))))
2240 insert_set_in_table (pat, insn);
2241 }
2242 }
2243
2244 static void
2245 hash_scan_clobber (x, insn)
2246 rtx x ATTRIBUTE_UNUSED, insn ATTRIBUTE_UNUSED;
2247 {
2248 /* Currently nothing to do. */
2249 }
2250
2251 static void
2252 hash_scan_call (x, insn)
2253 rtx x ATTRIBUTE_UNUSED, insn ATTRIBUTE_UNUSED;
2254 {
2255 /* Currently nothing to do. */
2256 }
2257
2258 /* Process INSN and add hash table entries as appropriate.
2259
2260 Only available expressions that set a single pseudo-reg are recorded.
2261
2262 Single sets in a PARALLEL could be handled, but it's an extra complication
2263 that isn't dealt with right now. The trick is handling the CLOBBERs that
2264 are also in the PARALLEL. Later.
2265
2266 If SET_P is non-zero, this is for the assignment hash table,
2267 otherwise it is for the expression hash table.
2268 If IN_LIBCALL_BLOCK nonzero, we are in a libcall block, and should
2269 not record any expressions. */
2270
2271 static void
2272 hash_scan_insn (insn, set_p, in_libcall_block)
2273 rtx insn;
2274 int set_p;
2275 int in_libcall_block;
2276 {
2277 rtx pat = PATTERN (insn);
2278 int i;
2279
2280 if (in_libcall_block)
2281 return;
2282
2283 /* Pick out the sets of INSN and for other forms of instructions record
2284 what's been modified. */
2285
2286 if (GET_CODE (pat) == SET)
2287 hash_scan_set (pat, insn, set_p);
2288 else if (GET_CODE (pat) == PARALLEL)
2289 for (i = 0; i < XVECLEN (pat, 0); i++)
2290 {
2291 rtx x = XVECEXP (pat, 0, i);
2292
2293 if (GET_CODE (x) == SET)
2294 hash_scan_set (x, insn, set_p);
2295 else if (GET_CODE (x) == CLOBBER)
2296 hash_scan_clobber (x, insn);
2297 else if (GET_CODE (x) == CALL)
2298 hash_scan_call (x, insn);
2299 }
2300
2301 else if (GET_CODE (pat) == CLOBBER)
2302 hash_scan_clobber (pat, insn);
2303 else if (GET_CODE (pat) == CALL)
2304 hash_scan_call (pat, insn);
2305 }
2306
2307 static void
2308 dump_hash_table (file, name, table, table_size, total_size)
2309 FILE *file;
2310 const char *name;
2311 struct expr **table;
2312 int table_size, total_size;
2313 {
2314 int i;
2315 /* Flattened out table, so it's printed in proper order. */
2316 struct expr **flat_table;
2317 unsigned int *hash_val;
2318 struct expr *expr;
2319
2320 flat_table
2321 = (struct expr **) xcalloc (total_size, sizeof (struct expr *));
2322 hash_val = (unsigned int *) xmalloc (total_size * sizeof (unsigned int));
2323
2324 for (i = 0; i < table_size; i++)
2325 for (expr = table[i]; expr != NULL; expr = expr->next_same_hash)
2326 {
2327 flat_table[expr->bitmap_index] = expr;
2328 hash_val[expr->bitmap_index] = i;
2329 }
2330
2331 fprintf (file, "%s hash table (%d buckets, %d entries)\n",
2332 name, table_size, total_size);
2333
2334 for (i = 0; i < total_size; i++)
2335 if (flat_table[i] != 0)
2336 {
2337 expr = flat_table[i];
2338 fprintf (file, "Index %d (hash value %d)\n ",
2339 expr->bitmap_index, hash_val[i]);
2340 print_rtl (file, expr->expr);
2341 fprintf (file, "\n");
2342 }
2343
2344 fprintf (file, "\n");
2345
2346 free (flat_table);
2347 free (hash_val);
2348 }
2349
2350 /* Record register first/last/block set information for REGNO in INSN.
2351
2352 reg_first_set records the first place in the block where the register
2353 is set and is used to compute "anticipatability".
2354
2355 reg_last_set records the last place in the block where the register
2356 is set and is used to compute "availability".
2357
2358 reg_set_in_block records whether the register is set in the block
2359 and is used to compute "transparency". */
2360
2361 static void
2362 record_last_reg_set_info (insn, regno)
2363 rtx insn;
2364 int regno;
2365 {
2366 if (reg_first_set[regno] == NEVER_SET)
2367 reg_first_set[regno] = INSN_CUID (insn);
2368
2369 reg_last_set[regno] = INSN_CUID (insn);
2370 SET_BIT (reg_set_in_block[BLOCK_NUM (insn)], regno);
2371 }
2372
2373
2374 /* Record all of the canonicalized MEMs of record_last_mem_set_info's insn.
2375 Note we store a pair of elements in the list, so they have to be
2376 taken off pairwise. */
2377
2378 static void
2379 canon_list_insert (dest, unused1, v_insn)
2380 rtx dest ATTRIBUTE_UNUSED;
2381 rtx unused1 ATTRIBUTE_UNUSED;
2382 void * v_insn;
2383 {
2384 rtx dest_addr, insn;
2385
2386 while (GET_CODE (dest) == SUBREG
2387 || GET_CODE (dest) == ZERO_EXTRACT
2388 || GET_CODE (dest) == SIGN_EXTRACT
2389 || GET_CODE (dest) == STRICT_LOW_PART)
2390 dest = XEXP (dest, 0);
2391
2392 /* If DEST is not a MEM, then it will not conflict with a load. Note
2393 that function calls are assumed to clobber memory, but are handled
2394 elsewhere. */
2395
2396 if (GET_CODE (dest) != MEM)
2397 return;
2398
2399 dest_addr = get_addr (XEXP (dest, 0));
2400 dest_addr = canon_rtx (dest_addr);
2401 insn = (rtx) v_insn;
2402
2403 canon_modify_mem_list[BLOCK_NUM (insn)] =
2404 alloc_INSN_LIST (dest_addr, canon_modify_mem_list[BLOCK_NUM (insn)]);
2405 canon_modify_mem_list[BLOCK_NUM (insn)] =
2406 alloc_INSN_LIST (dest, canon_modify_mem_list[BLOCK_NUM (insn)]);
2407 }
2408
2409 /* Record memory first/last/block set information for INSN. */
2410 /* Record memory modification information for INSN. We do not actually care
2411 about the memory location(s) that are set, or even how they are set (consider
2412 a CALL_INSN). We merely need to record which insns modify memory. */
2413
2414 static void
2415 record_last_mem_set_info (insn)
2416 rtx insn;
2417 {
2418 if (mem_first_set == NEVER_SET)
2419 mem_first_set = INSN_CUID (insn);
2420
2421 mem_last_set = INSN_CUID (insn);
2422 mem_set_in_block[BLOCK_NUM (insn)] = 1;
2423 modify_mem_list[BLOCK_NUM (insn)] =
2424 alloc_INSN_LIST (insn, modify_mem_list[BLOCK_NUM (insn)]);
2425
2426 if (GET_CODE (insn) == CALL_INSN)
2427 {
2428 /* Note that traversals of this loop (other than for free-ing)
2429 will break after encountering a CALL_INSN. So, there's no
2430 need to insert a pair of items, as canon_list_insert does. */
2431 canon_modify_mem_list[BLOCK_NUM (insn)] =
2432 alloc_INSN_LIST (insn, canon_modify_mem_list[BLOCK_NUM (insn)]);
2433 }
2434 else
2435 note_stores (PATTERN (insn), canon_list_insert, (void*)insn );
2436 }
2437
2438 /* Called from compute_hash_table via note_stores to handle one
2439 SET or CLOBBER in an insn. DATA is really the instruction in which
2440 the SET is taking place. */
2441
2442 static void
2443 record_last_set_info (dest, setter, data)
2444 rtx dest, setter ATTRIBUTE_UNUSED;
2445 void *data;
2446 {
2447 rtx last_set_insn = (rtx) data;
2448
2449 if (GET_CODE (dest) == SUBREG)
2450 dest = SUBREG_REG (dest);
2451
2452 if (GET_CODE (dest) == REG)
2453 record_last_reg_set_info (last_set_insn, REGNO (dest));
2454 else if (GET_CODE (dest) == MEM
2455 /* Ignore pushes, they clobber nothing. */
2456 && ! push_operand (dest, GET_MODE (dest)))
2457 record_last_mem_set_info (last_set_insn);
2458 }
2459
2460 /* Top level function to create an expression or assignment hash table.
2461
2462 Expression entries are placed in the hash table if
2463 - they are of the form (set (pseudo-reg) src),
2464 - src is something we want to perform GCSE on,
2465 - none of the operands are subsequently modified in the block
2466
2467 Assignment entries are placed in the hash table if
2468 - they are of the form (set (pseudo-reg) src),
2469 - src is something we want to perform const/copy propagation on,
2470 - none of the operands or target are subsequently modified in the block
2471
2472 Currently src must be a pseudo-reg or a const_int.
2473
2474 F is the first insn.
2475 SET_P is non-zero for computing the assignment hash table. */
2476
2477 static void
2478 compute_hash_table (set_p)
2479 int set_p;
2480 {
2481 int bb;
2482
2483 /* While we compute the hash table we also compute a bit array of which
2484 registers are set in which blocks.
2485 We also compute which blocks set memory, in the absence of aliasing
2486 support [which is TODO].
2487 ??? This isn't needed during const/copy propagation, but it's cheap to
2488 compute. Later. */
2489 sbitmap_vector_zero (reg_set_in_block, n_basic_blocks);
2490 memset ((char *) mem_set_in_block, 0, n_basic_blocks);
2491
2492 /* re-Cache any INSN_LIST nodes we have allocated. */
2493 {
2494 int i;
2495 for (i = 0; i < n_basic_blocks; i++)
2496 {
2497 if (modify_mem_list[i])
2498 free_INSN_LIST_list (modify_mem_list + i);
2499 if (canon_modify_mem_list[i])
2500 free_INSN_LIST_list (canon_modify_mem_list + i);
2501 }
2502 }
2503 /* Some working arrays used to track first and last set in each block. */
2504 /* ??? One could use alloca here, but at some size a threshold is crossed
2505 beyond which one should use malloc. Are we at that threshold here? */
2506 reg_first_set = (int *) gmalloc (max_gcse_regno * sizeof (int));
2507 reg_last_set = (int *) gmalloc (max_gcse_regno * sizeof (int));
2508
2509 for (bb = 0; bb < n_basic_blocks; bb++)
2510 {
2511 rtx insn;
2512 unsigned int regno;
2513 int in_libcall_block;
2514 unsigned int i;
2515
2516 /* First pass over the instructions records information used to
2517 determine when registers and memory are first and last set.
2518 ??? The mem_set_in_block and hard-reg reg_set_in_block computation
2519 could be moved to compute_sets since they currently don't change. */
2520
2521 for (i = 0; i < max_gcse_regno; i++)
2522 reg_first_set[i] = reg_last_set[i] = NEVER_SET;
2523
2524 mem_first_set = NEVER_SET;
2525 mem_last_set = NEVER_SET;
2526
2527 for (insn = BLOCK_HEAD (bb);
2528 insn && insn != NEXT_INSN (BLOCK_END (bb));
2529 insn = NEXT_INSN (insn))
2530 {
2531 #ifdef NON_SAVING_SETJMP
2532 if (NON_SAVING_SETJMP && GET_CODE (insn) == NOTE
2533 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
2534 {
2535 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2536 record_last_reg_set_info (insn, regno);
2537 continue;
2538 }
2539 #endif
2540
2541 if (! INSN_P (insn))
2542 continue;
2543
2544 if (GET_CODE (insn) == CALL_INSN)
2545 {
2546 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2547 if ((call_used_regs[regno]
2548 && regno != STACK_POINTER_REGNUM
2549 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2550 && regno != HARD_FRAME_POINTER_REGNUM
2551 #endif
2552 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
2553 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2554 #endif
2555 #if !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
2556 && ! (regno == PIC_OFFSET_TABLE_REGNUM && flag_pic)
2557 #endif
2558
2559 && regno != FRAME_POINTER_REGNUM)
2560 || global_regs[regno])
2561 record_last_reg_set_info (insn, regno);
2562
2563 if (! CONST_CALL_P (insn))
2564 record_last_mem_set_info (insn);
2565 }
2566
2567 note_stores (PATTERN (insn), record_last_set_info, insn);
2568 }
2569
2570 /* The next pass builds the hash table. */
2571
2572 for (insn = BLOCK_HEAD (bb), in_libcall_block = 0;
2573 insn && insn != NEXT_INSN (BLOCK_END (bb));
2574 insn = NEXT_INSN (insn))
2575 if (INSN_P (insn))
2576 {
2577 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
2578 in_libcall_block = 1;
2579 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
2580 in_libcall_block = 0;
2581 hash_scan_insn (insn, set_p, in_libcall_block);
2582 }
2583 }
2584
2585 free (reg_first_set);
2586 free (reg_last_set);
2587
2588 /* Catch bugs early. */
2589 reg_first_set = reg_last_set = 0;
2590 }
2591
2592 /* Allocate space for the set hash table.
2593 N_INSNS is the number of instructions in the function.
2594 It is used to determine the number of buckets to use. */
2595
2596 static void
2597 alloc_set_hash_table (n_insns)
2598 int n_insns;
2599 {
2600 int n;
2601
2602 set_hash_table_size = n_insns / 4;
2603 if (set_hash_table_size < 11)
2604 set_hash_table_size = 11;
2605
2606 /* Attempt to maintain efficient use of hash table.
2607 Making it an odd number is simplest for now.
2608 ??? Later take some measurements. */
2609 set_hash_table_size |= 1;
2610 n = set_hash_table_size * sizeof (struct expr *);
2611 set_hash_table = (struct expr **) gmalloc (n);
2612 }
2613
2614 /* Free things allocated by alloc_set_hash_table. */
2615
2616 static void
2617 free_set_hash_table ()
2618 {
2619 free (set_hash_table);
2620 }
2621
2622 /* Compute the hash table for doing copy/const propagation. */
2623
2624 static void
2625 compute_set_hash_table ()
2626 {
2627 /* Initialize count of number of entries in hash table. */
2628 n_sets = 0;
2629 memset ((char *) set_hash_table, 0,
2630 set_hash_table_size * sizeof (struct expr *));
2631
2632 compute_hash_table (1);
2633 }
2634
2635 /* Allocate space for the expression hash table.
2636 N_INSNS is the number of instructions in the function.
2637 It is used to determine the number of buckets to use. */
2638
2639 static void
2640 alloc_expr_hash_table (n_insns)
2641 unsigned int n_insns;
2642 {
2643 int n;
2644
2645 expr_hash_table_size = n_insns / 2;
2646 /* Make sure the amount is usable. */
2647 if (expr_hash_table_size < 11)
2648 expr_hash_table_size = 11;
2649
2650 /* Attempt to maintain efficient use of hash table.
2651 Making it an odd number is simplest for now.
2652 ??? Later take some measurements. */
2653 expr_hash_table_size |= 1;
2654 n = expr_hash_table_size * sizeof (struct expr *);
2655 expr_hash_table = (struct expr **) gmalloc (n);
2656 }
2657
2658 /* Free things allocated by alloc_expr_hash_table. */
2659
2660 static void
2661 free_expr_hash_table ()
2662 {
2663 free (expr_hash_table);
2664 }
2665
2666 /* Compute the hash table for doing GCSE. */
2667
2668 static void
2669 compute_expr_hash_table ()
2670 {
2671 /* Initialize count of number of entries in hash table. */
2672 n_exprs = 0;
2673 memset ((char *) expr_hash_table, 0,
2674 expr_hash_table_size * sizeof (struct expr *));
2675
2676 compute_hash_table (0);
2677 }
2678 \f
2679 /* Expression tracking support. */
2680
2681 /* Lookup pattern PAT in the expression table.
2682 The result is a pointer to the table entry, or NULL if not found. */
2683
2684 static struct expr *
2685 lookup_expr (pat)
2686 rtx pat;
2687 {
2688 int do_not_record_p;
2689 unsigned int hash = hash_expr (pat, GET_MODE (pat), &do_not_record_p,
2690 expr_hash_table_size);
2691 struct expr *expr;
2692
2693 if (do_not_record_p)
2694 return NULL;
2695
2696 expr = expr_hash_table[hash];
2697
2698 while (expr && ! expr_equiv_p (expr->expr, pat))
2699 expr = expr->next_same_hash;
2700
2701 return expr;
2702 }
2703
2704 /* Lookup REGNO in the set table. If PAT is non-NULL look for the entry that
2705 matches it, otherwise return the first entry for REGNO. The result is a
2706 pointer to the table entry, or NULL if not found. */
2707
2708 static struct expr *
2709 lookup_set (regno, pat)
2710 unsigned int regno;
2711 rtx pat;
2712 {
2713 unsigned int hash = hash_set (regno, set_hash_table_size);
2714 struct expr *expr;
2715
2716 expr = set_hash_table[hash];
2717
2718 if (pat)
2719 {
2720 while (expr && ! expr_equiv_p (expr->expr, pat))
2721 expr = expr->next_same_hash;
2722 }
2723 else
2724 {
2725 while (expr && REGNO (SET_DEST (expr->expr)) != regno)
2726 expr = expr->next_same_hash;
2727 }
2728
2729 return expr;
2730 }
2731
2732 /* Return the next entry for REGNO in list EXPR. */
2733
2734 static struct expr *
2735 next_set (regno, expr)
2736 unsigned int regno;
2737 struct expr *expr;
2738 {
2739 do
2740 expr = expr->next_same_hash;
2741 while (expr && REGNO (SET_DEST (expr->expr)) != regno);
2742
2743 return expr;
2744 }
2745
2746 /* Reset tables used to keep track of what's still available [since the
2747 start of the block]. */
2748
2749 static void
2750 reset_opr_set_tables ()
2751 {
2752 /* Maintain a bitmap of which regs have been set since beginning of
2753 the block. */
2754 sbitmap_zero (reg_set_bitmap);
2755
2756 /* Also keep a record of the last instruction to modify memory.
2757 For now this is very trivial, we only record whether any memory
2758 location has been modified. */
2759 mem_last_set = 0;
2760 {
2761 int i;
2762
2763 /* re-Cache any INSN_LIST nodes we have allocated. */
2764 for (i = 0; i < n_basic_blocks; i++)
2765 {
2766 if (modify_mem_list[i])
2767 free_INSN_LIST_list (modify_mem_list + i);
2768 if (canon_modify_mem_list[i])
2769 free_INSN_LIST_list (canon_modify_mem_list + i);
2770 }
2771 }
2772 }
2773
2774 /* Return non-zero if the operands of X are not set before INSN in
2775 INSN's basic block. */
2776
2777 static int
2778 oprs_not_set_p (x, insn)
2779 rtx x, insn;
2780 {
2781 int i, j;
2782 enum rtx_code code;
2783 const char *fmt;
2784
2785 if (x == 0)
2786 return 1;
2787
2788 code = GET_CODE (x);
2789 switch (code)
2790 {
2791 case PC:
2792 case CC0:
2793 case CONST:
2794 case CONST_INT:
2795 case CONST_DOUBLE:
2796 case SYMBOL_REF:
2797 case LABEL_REF:
2798 case ADDR_VEC:
2799 case ADDR_DIFF_VEC:
2800 return 1;
2801
2802 case MEM:
2803 if (load_killed_in_block_p (BLOCK_FOR_INSN (insn),
2804 INSN_CUID (insn), x, 0))
2805 return 0;
2806 if (mem_last_set != 0)
2807 return 0;
2808 else
2809 return oprs_not_set_p (XEXP (x, 0), insn);
2810
2811 case REG:
2812 return ! TEST_BIT (reg_set_bitmap, REGNO (x));
2813
2814 default:
2815 break;
2816 }
2817
2818 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
2819 {
2820 if (fmt[i] == 'e')
2821 {
2822 /* If we are about to do the last recursive call
2823 needed at this level, change it into iteration.
2824 This function is called enough to be worth it. */
2825 if (i == 0)
2826 return oprs_not_set_p (XEXP (x, i), insn);
2827
2828 if (! oprs_not_set_p (XEXP (x, i), insn))
2829 return 0;
2830 }
2831 else if (fmt[i] == 'E')
2832 for (j = 0; j < XVECLEN (x, i); j++)
2833 if (! oprs_not_set_p (XVECEXP (x, i, j), insn))
2834 return 0;
2835 }
2836
2837 return 1;
2838 }
2839
2840 /* Mark things set by a CALL. */
2841
2842 static void
2843 mark_call (insn)
2844 rtx insn;
2845 {
2846 mem_last_set = INSN_CUID (insn);
2847 if (! CONST_CALL_P (insn))
2848 record_last_mem_set_info (insn);
2849 }
2850
2851 /* Mark things set by a SET. */
2852
2853 static void
2854 mark_set (pat, insn)
2855 rtx pat, insn;
2856 {
2857 rtx dest = SET_DEST (pat);
2858
2859 while (GET_CODE (dest) == SUBREG
2860 || GET_CODE (dest) == ZERO_EXTRACT
2861 || GET_CODE (dest) == SIGN_EXTRACT
2862 || GET_CODE (dest) == STRICT_LOW_PART)
2863 dest = XEXP (dest, 0);
2864
2865 if (GET_CODE (dest) == REG)
2866 SET_BIT (reg_set_bitmap, REGNO (dest));
2867 else if (GET_CODE (dest) == MEM)
2868 record_last_mem_set_info (insn);
2869
2870 if (GET_CODE (dest) == REG)
2871 SET_BIT (reg_set_bitmap, REGNO (dest));
2872 else if (GET_CODE (dest) == MEM)
2873 mem_last_set = INSN_CUID (insn);
2874
2875 if (GET_CODE (SET_SRC (pat)) == CALL)
2876 mark_call (insn);
2877 }
2878
2879 /* Record things set by a CLOBBER. */
2880
2881 static void
2882 mark_clobber (pat, insn)
2883 rtx pat, insn;
2884 {
2885 rtx clob = XEXP (pat, 0);
2886
2887 while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART)
2888 clob = XEXP (clob, 0);
2889
2890 if (GET_CODE (clob) == REG)
2891 SET_BIT (reg_set_bitmap, REGNO (clob));
2892 else
2893 mem_last_set = INSN_CUID (insn);
2894 if (GET_CODE (clob) == REG)
2895 SET_BIT (reg_set_bitmap, REGNO (clob));
2896 else
2897 record_last_mem_set_info (insn);
2898 }
2899
2900 /* Record things set by INSN.
2901 This data is used by oprs_not_set_p. */
2902
2903 static void
2904 mark_oprs_set (insn)
2905 rtx insn;
2906 {
2907 rtx pat = PATTERN (insn);
2908 int i;
2909
2910 if (GET_CODE (pat) == SET)
2911 mark_set (pat, insn);
2912 else if (GET_CODE (pat) == PARALLEL)
2913 for (i = 0; i < XVECLEN (pat, 0); i++)
2914 {
2915 rtx x = XVECEXP (pat, 0, i);
2916
2917 if (GET_CODE (x) == SET)
2918 mark_set (x, insn);
2919 else if (GET_CODE (x) == CLOBBER)
2920 mark_clobber (x, insn);
2921 else if (GET_CODE (x) == CALL)
2922 mark_call (insn);
2923 }
2924
2925 else if (GET_CODE (pat) == CLOBBER)
2926 mark_clobber (pat, insn);
2927 else if (GET_CODE (pat) == CALL)
2928 mark_call (insn);
2929 }
2930
2931 \f
2932 /* Classic GCSE reaching definition support. */
2933
2934 /* Allocate reaching def variables. */
2935
2936 static void
2937 alloc_rd_mem (n_blocks, n_insns)
2938 int n_blocks, n_insns;
2939 {
2940 rd_kill = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
2941 sbitmap_vector_zero (rd_kill, n_basic_blocks);
2942
2943 rd_gen = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
2944 sbitmap_vector_zero (rd_gen, n_basic_blocks);
2945
2946 reaching_defs = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
2947 sbitmap_vector_zero (reaching_defs, n_basic_blocks);
2948
2949 rd_out = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_insns);
2950 sbitmap_vector_zero (rd_out, n_basic_blocks);
2951 }
2952
2953 /* Free reaching def variables. */
2954
2955 static void
2956 free_rd_mem ()
2957 {
2958 free (rd_kill);
2959 free (rd_gen);
2960 free (reaching_defs);
2961 free (rd_out);
2962 }
2963
2964 /* Add INSN to the kills of BB. REGNO, set in BB, is killed by INSN. */
2965
2966 static void
2967 handle_rd_kill_set (insn, regno, bb)
2968 rtx insn;
2969 int regno;
2970 basic_block bb;
2971 {
2972 struct reg_set *this_reg;
2973
2974 for (this_reg = reg_set_table[regno]; this_reg; this_reg = this_reg ->next)
2975 if (BLOCK_NUM (this_reg->insn) != BLOCK_NUM (insn))
2976 SET_BIT (rd_kill[bb->index], INSN_CUID (this_reg->insn));
2977 }
2978
2979 /* Compute the set of kill's for reaching definitions. */
2980
2981 static void
2982 compute_kill_rd ()
2983 {
2984 int bb, cuid;
2985 unsigned int regno;
2986 int i;
2987
2988 /* For each block
2989 For each set bit in `gen' of the block (i.e each insn which
2990 generates a definition in the block)
2991 Call the reg set by the insn corresponding to that bit regx
2992 Look at the linked list starting at reg_set_table[regx]
2993 For each setting of regx in the linked list, which is not in
2994 this block
2995 Set the bit in `kill' corresponding to that insn. */
2996 for (bb = 0; bb < n_basic_blocks; bb++)
2997 for (cuid = 0; cuid < max_cuid; cuid++)
2998 if (TEST_BIT (rd_gen[bb], cuid))
2999 {
3000 rtx insn = CUID_INSN (cuid);
3001 rtx pat = PATTERN (insn);
3002
3003 if (GET_CODE (insn) == CALL_INSN)
3004 {
3005 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
3006 {
3007 if ((call_used_regs[regno]
3008 && regno != STACK_POINTER_REGNUM
3009 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3010 && regno != HARD_FRAME_POINTER_REGNUM
3011 #endif
3012 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
3013 && ! (regno == ARG_POINTER_REGNUM
3014 && fixed_regs[regno])
3015 #endif
3016 #if !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
3017 && ! (regno == PIC_OFFSET_TABLE_REGNUM && flag_pic)
3018 #endif
3019 && regno != FRAME_POINTER_REGNUM)
3020 || global_regs[regno])
3021 handle_rd_kill_set (insn, regno, BASIC_BLOCK (bb));
3022 }
3023 }
3024
3025 if (GET_CODE (pat) == PARALLEL)
3026 {
3027 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
3028 {
3029 enum rtx_code code = GET_CODE (XVECEXP (pat, 0, i));
3030
3031 if ((code == SET || code == CLOBBER)
3032 && GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) == REG)
3033 handle_rd_kill_set (insn,
3034 REGNO (XEXP (XVECEXP (pat, 0, i), 0)),
3035 BASIC_BLOCK (bb));
3036 }
3037 }
3038 else if (GET_CODE (pat) == SET && GET_CODE (SET_DEST (pat)) == REG)
3039 /* Each setting of this register outside of this block
3040 must be marked in the set of kills in this block. */
3041 handle_rd_kill_set (insn, REGNO (SET_DEST (pat)), BASIC_BLOCK (bb));
3042 }
3043 }
3044
3045 /* Compute the reaching definitions as in
3046 Compilers Principles, Techniques, and Tools. Aho, Sethi, Ullman,
3047 Chapter 10. It is the same algorithm as used for computing available
3048 expressions but applied to the gens and kills of reaching definitions. */
3049
3050 static void
3051 compute_rd ()
3052 {
3053 int bb, changed, passes;
3054
3055 for (bb = 0; bb < n_basic_blocks; bb++)
3056 sbitmap_copy (rd_out[bb] /*dst*/, rd_gen[bb] /*src*/);
3057
3058 passes = 0;
3059 changed = 1;
3060 while (changed)
3061 {
3062 changed = 0;
3063 for (bb = 0; bb < n_basic_blocks; bb++)
3064 {
3065 sbitmap_union_of_preds (reaching_defs[bb], rd_out, bb);
3066 changed |= sbitmap_union_of_diff (rd_out[bb], rd_gen[bb],
3067 reaching_defs[bb], rd_kill[bb]);
3068 }
3069 passes++;
3070 }
3071
3072 if (gcse_file)
3073 fprintf (gcse_file, "reaching def computation: %d passes\n", passes);
3074 }
3075 \f
3076 /* Classic GCSE available expression support. */
3077
3078 /* Allocate memory for available expression computation. */
3079
3080 static void
3081 alloc_avail_expr_mem (n_blocks, n_exprs)
3082 int n_blocks, n_exprs;
3083 {
3084 ae_kill = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
3085 sbitmap_vector_zero (ae_kill, n_basic_blocks);
3086
3087 ae_gen = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
3088 sbitmap_vector_zero (ae_gen, n_basic_blocks);
3089
3090 ae_in = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
3091 sbitmap_vector_zero (ae_in, n_basic_blocks);
3092
3093 ae_out = (sbitmap *) sbitmap_vector_alloc (n_blocks, n_exprs);
3094 sbitmap_vector_zero (ae_out, n_basic_blocks);
3095 }
3096
3097 static void
3098 free_avail_expr_mem ()
3099 {
3100 free (ae_kill);
3101 free (ae_gen);
3102 free (ae_in);
3103 free (ae_out);
3104 }
3105
3106 /* Compute the set of available expressions generated in each basic block. */
3107
3108 static void
3109 compute_ae_gen ()
3110 {
3111 unsigned int i;
3112 struct expr *expr;
3113 struct occr *occr;
3114
3115 /* For each recorded occurrence of each expression, set ae_gen[bb][expr].
3116 This is all we have to do because an expression is not recorded if it
3117 is not available, and the only expressions we want to work with are the
3118 ones that are recorded. */
3119 for (i = 0; i < expr_hash_table_size; i++)
3120 for (expr = expr_hash_table[i]; expr != 0; expr = expr->next_same_hash)
3121 for (occr = expr->avail_occr; occr != 0; occr = occr->next)
3122 SET_BIT (ae_gen[BLOCK_NUM (occr->insn)], expr->bitmap_index);
3123 }
3124
3125 /* Return non-zero if expression X is killed in BB. */
3126
3127 static int
3128 expr_killed_p (x, bb)
3129 rtx x;
3130 basic_block bb;
3131 {
3132 int i, j;
3133 enum rtx_code code;
3134 const char *fmt;
3135
3136 if (x == 0)
3137 return 1;
3138
3139 code = GET_CODE (x);
3140 switch (code)
3141 {
3142 case REG:
3143 return TEST_BIT (reg_set_in_block[bb->index], REGNO (x));
3144
3145 case MEM:
3146 if (load_killed_in_block_p (bb, get_max_uid () + 1, x, 0))
3147 return 1;
3148 if (mem_set_in_block[bb->index])
3149 return 1;
3150 else
3151 return expr_killed_p (XEXP (x, 0), bb);
3152
3153 case PC:
3154 case CC0: /*FIXME*/
3155 case CONST:
3156 case CONST_INT:
3157 case CONST_DOUBLE:
3158 case SYMBOL_REF:
3159 case LABEL_REF:
3160 case ADDR_VEC:
3161 case ADDR_DIFF_VEC:
3162 return 0;
3163
3164 default:
3165 break;
3166 }
3167
3168 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
3169 {
3170 if (fmt[i] == 'e')
3171 {
3172 /* If we are about to do the last recursive call
3173 needed at this level, change it into iteration.
3174 This function is called enough to be worth it. */
3175 if (i == 0)
3176 return expr_killed_p (XEXP (x, i), bb);
3177 else if (expr_killed_p (XEXP (x, i), bb))
3178 return 1;
3179 }
3180 else if (fmt[i] == 'E')
3181 for (j = 0; j < XVECLEN (x, i); j++)
3182 if (expr_killed_p (XVECEXP (x, i, j), bb))
3183 return 1;
3184 }
3185
3186 return 0;
3187 }
3188
3189 /* Compute the set of available expressions killed in each basic block. */
3190
3191 static void
3192 compute_ae_kill (ae_gen, ae_kill)
3193 sbitmap *ae_gen, *ae_kill;
3194 {
3195 int bb;
3196 unsigned int i;
3197 struct expr *expr;
3198
3199 for (bb = 0; bb < n_basic_blocks; bb++)
3200 for (i = 0; i < expr_hash_table_size; i++)
3201 for (expr = expr_hash_table[i]; expr; expr = expr->next_same_hash)
3202 {
3203 /* Skip EXPR if generated in this block. */
3204 if (TEST_BIT (ae_gen[bb], expr->bitmap_index))
3205 continue;
3206
3207 if (expr_killed_p (expr->expr, BASIC_BLOCK (bb)))
3208 SET_BIT (ae_kill[bb], expr->bitmap_index);
3209 }
3210 }
3211 \f
3212 /* Actually perform the Classic GCSE optimizations. */
3213
3214 /* Return non-zero if occurrence OCCR of expression EXPR reaches block BB.
3215
3216 CHECK_SELF_LOOP is non-zero if we should consider a block reaching itself
3217 as a positive reach. We want to do this when there are two computations
3218 of the expression in the block.
3219
3220 VISITED is a pointer to a working buffer for tracking which BB's have
3221 been visited. It is NULL for the top-level call.
3222
3223 We treat reaching expressions that go through blocks containing the same
3224 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
3225 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
3226 2 as not reaching. The intent is to improve the probability of finding
3227 only one reaching expression and to reduce register lifetimes by picking
3228 the closest such expression. */
3229
3230 static int
3231 expr_reaches_here_p_work (occr, expr, bb, check_self_loop, visited)
3232 struct occr *occr;
3233 struct expr *expr;
3234 basic_block bb;
3235 int check_self_loop;
3236 char *visited;
3237 {
3238 edge pred;
3239
3240 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
3241 {
3242 basic_block pred_bb = pred->src;
3243
3244 if (visited[pred_bb->index])
3245 /* This predecessor has already been visited. Nothing to do. */
3246 ;
3247 else if (pred_bb == bb)
3248 {
3249 /* BB loops on itself. */
3250 if (check_self_loop
3251 && TEST_BIT (ae_gen[pred_bb->index], expr->bitmap_index)
3252 && BLOCK_NUM (occr->insn) == pred_bb->index)
3253 return 1;
3254
3255 visited[pred_bb->index] = 1;
3256 }
3257
3258 /* Ignore this predecessor if it kills the expression. */
3259 else if (TEST_BIT (ae_kill[pred_bb->index], expr->bitmap_index))
3260 visited[pred_bb->index] = 1;
3261
3262 /* Does this predecessor generate this expression? */
3263 else if (TEST_BIT (ae_gen[pred_bb->index], expr->bitmap_index))
3264 {
3265 /* Is this the occurrence we're looking for?
3266 Note that there's only one generating occurrence per block
3267 so we just need to check the block number. */
3268 if (BLOCK_NUM (occr->insn) == pred_bb->index)
3269 return 1;
3270
3271 visited[pred_bb->index] = 1;
3272 }
3273
3274 /* Neither gen nor kill. */
3275 else
3276 {
3277 visited[pred_bb->index] = 1;
3278 if (expr_reaches_here_p_work (occr, expr, pred_bb, check_self_loop,
3279 visited))
3280
3281 return 1;
3282 }
3283 }
3284
3285 /* All paths have been checked. */
3286 return 0;
3287 }
3288
3289 /* This wrapper for expr_reaches_here_p_work() is to ensure that any
3290 memory allocated for that function is returned. */
3291
3292 static int
3293 expr_reaches_here_p (occr, expr, bb, check_self_loop)
3294 struct occr *occr;
3295 struct expr *expr;
3296 basic_block bb;
3297 int check_self_loop;
3298 {
3299 int rval;
3300 char *visited = (char *) xcalloc (n_basic_blocks, 1);
3301
3302 rval = expr_reaches_here_p_work (occr, expr, bb, check_self_loop, visited);
3303
3304 free (visited);
3305 return rval;
3306 }
3307
3308 /* Return the instruction that computes EXPR that reaches INSN's basic block.
3309 If there is more than one such instruction, return NULL.
3310
3311 Called only by handle_avail_expr. */
3312
3313 static rtx
3314 computing_insn (expr, insn)
3315 struct expr *expr;
3316 rtx insn;
3317 {
3318 basic_block bb = BLOCK_FOR_INSN (insn);
3319
3320 if (expr->avail_occr->next == NULL)
3321 {
3322 if (BLOCK_FOR_INSN (expr->avail_occr->insn) == bb)
3323 /* The available expression is actually itself
3324 (i.e. a loop in the flow graph) so do nothing. */
3325 return NULL;
3326
3327 /* (FIXME) Case that we found a pattern that was created by
3328 a substitution that took place. */
3329 return expr->avail_occr->insn;
3330 }
3331 else
3332 {
3333 /* Pattern is computed more than once.
3334 Search backwards from this insn to see how many of these
3335 computations actually reach this insn. */
3336 struct occr *occr;
3337 rtx insn_computes_expr = NULL;
3338 int can_reach = 0;
3339
3340 for (occr = expr->avail_occr; occr != NULL; occr = occr->next)
3341 {
3342 if (BLOCK_FOR_INSN (occr->insn) == bb)
3343 {
3344 /* The expression is generated in this block.
3345 The only time we care about this is when the expression
3346 is generated later in the block [and thus there's a loop].
3347 We let the normal cse pass handle the other cases. */
3348 if (INSN_CUID (insn) < INSN_CUID (occr->insn)
3349 && expr_reaches_here_p (occr, expr, bb, 1))
3350 {
3351 can_reach++;
3352 if (can_reach > 1)
3353 return NULL;
3354
3355 insn_computes_expr = occr->insn;
3356 }
3357 }
3358 else if (expr_reaches_here_p (occr, expr, bb, 0))
3359 {
3360 can_reach++;
3361 if (can_reach > 1)
3362 return NULL;
3363
3364 insn_computes_expr = occr->insn;
3365 }
3366 }
3367
3368 if (insn_computes_expr == NULL)
3369 abort ();
3370
3371 return insn_computes_expr;
3372 }
3373 }
3374
3375 /* Return non-zero if the definition in DEF_INSN can reach INSN.
3376 Only called by can_disregard_other_sets. */
3377
3378 static int
3379 def_reaches_here_p (insn, def_insn)
3380 rtx insn, def_insn;
3381 {
3382 rtx reg;
3383
3384 if (TEST_BIT (reaching_defs[BLOCK_NUM (insn)], INSN_CUID (def_insn)))
3385 return 1;
3386
3387 if (BLOCK_NUM (insn) == BLOCK_NUM (def_insn))
3388 {
3389 if (INSN_CUID (def_insn) < INSN_CUID (insn))
3390 {
3391 if (GET_CODE (PATTERN (def_insn)) == PARALLEL)
3392 return 1;
3393 else if (GET_CODE (PATTERN (def_insn)) == CLOBBER)
3394 reg = XEXP (PATTERN (def_insn), 0);
3395 else if (GET_CODE (PATTERN (def_insn)) == SET)
3396 reg = SET_DEST (PATTERN (def_insn));
3397 else
3398 abort ();
3399
3400 return ! reg_set_between_p (reg, NEXT_INSN (def_insn), insn);
3401 }
3402 else
3403 return 0;
3404 }
3405
3406 return 0;
3407 }
3408
3409 /* Return non-zero if *ADDR_THIS_REG can only have one value at INSN. The
3410 value returned is the number of definitions that reach INSN. Returning a
3411 value of zero means that [maybe] more than one definition reaches INSN and
3412 the caller can't perform whatever optimization it is trying. i.e. it is
3413 always safe to return zero. */
3414
3415 static int
3416 can_disregard_other_sets (addr_this_reg, insn, for_combine)
3417 struct reg_set **addr_this_reg;
3418 rtx insn;
3419 int for_combine;
3420 {
3421 int number_of_reaching_defs = 0;
3422 struct reg_set *this_reg;
3423
3424 for (this_reg = *addr_this_reg; this_reg != 0; this_reg = this_reg->next)
3425 if (def_reaches_here_p (insn, this_reg->insn))
3426 {
3427 number_of_reaching_defs++;
3428 /* Ignore parallels for now. */
3429 if (GET_CODE (PATTERN (this_reg->insn)) == PARALLEL)
3430 return 0;
3431
3432 if (!for_combine
3433 && (GET_CODE (PATTERN (this_reg->insn)) == CLOBBER
3434 || ! rtx_equal_p (SET_SRC (PATTERN (this_reg->insn)),
3435 SET_SRC (PATTERN (insn)))))
3436 /* A setting of the reg to a different value reaches INSN. */
3437 return 0;
3438
3439 if (number_of_reaching_defs > 1)
3440 {
3441 /* If in this setting the value the register is being set to is
3442 equal to the previous value the register was set to and this
3443 setting reaches the insn we are trying to do the substitution
3444 on then we are ok. */
3445 if (GET_CODE (PATTERN (this_reg->insn)) == CLOBBER)
3446 return 0;
3447 else if (! rtx_equal_p (SET_SRC (PATTERN (this_reg->insn)),
3448 SET_SRC (PATTERN (insn))))
3449 return 0;
3450 }
3451
3452 *addr_this_reg = this_reg;
3453 }
3454
3455 return number_of_reaching_defs;
3456 }
3457
3458 /* Expression computed by insn is available and the substitution is legal,
3459 so try to perform the substitution.
3460
3461 The result is non-zero if any changes were made. */
3462
3463 static int
3464 handle_avail_expr (insn, expr)
3465 rtx insn;
3466 struct expr *expr;
3467 {
3468 rtx pat, insn_computes_expr;
3469 rtx to;
3470 struct reg_set *this_reg;
3471 int found_setting, use_src;
3472 int changed = 0;
3473
3474 /* We only handle the case where one computation of the expression
3475 reaches this instruction. */
3476 insn_computes_expr = computing_insn (expr, insn);
3477 if (insn_computes_expr == NULL)
3478 return 0;
3479
3480 found_setting = 0;
3481 use_src = 0;
3482
3483 /* At this point we know only one computation of EXPR outside of this
3484 block reaches this insn. Now try to find a register that the
3485 expression is computed into. */
3486 if (GET_CODE (SET_SRC (PATTERN (insn_computes_expr))) == REG)
3487 {
3488 /* This is the case when the available expression that reaches
3489 here has already been handled as an available expression. */
3490 unsigned int regnum_for_replacing
3491 = REGNO (SET_SRC (PATTERN (insn_computes_expr)));
3492
3493 /* If the register was created by GCSE we can't use `reg_set_table',
3494 however we know it's set only once. */
3495 if (regnum_for_replacing >= max_gcse_regno
3496 /* If the register the expression is computed into is set only once,
3497 or only one set reaches this insn, we can use it. */
3498 || (((this_reg = reg_set_table[regnum_for_replacing]),
3499 this_reg->next == NULL)
3500 || can_disregard_other_sets (&this_reg, insn, 0)))
3501 {
3502 use_src = 1;
3503 found_setting = 1;
3504 }
3505 }
3506
3507 if (!found_setting)
3508 {
3509 unsigned int regnum_for_replacing
3510 = REGNO (SET_DEST (PATTERN (insn_computes_expr)));
3511
3512 /* This shouldn't happen. */
3513 if (regnum_for_replacing >= max_gcse_regno)
3514 abort ();
3515
3516 this_reg = reg_set_table[regnum_for_replacing];
3517
3518 /* If the register the expression is computed into is set only once,
3519 or only one set reaches this insn, use it. */
3520 if (this_reg->next == NULL
3521 || can_disregard_other_sets (&this_reg, insn, 0))
3522 found_setting = 1;
3523 }
3524
3525 if (found_setting)
3526 {
3527 pat = PATTERN (insn);
3528 if (use_src)
3529 to = SET_SRC (PATTERN (insn_computes_expr));
3530 else
3531 to = SET_DEST (PATTERN (insn_computes_expr));
3532 changed = validate_change (insn, &SET_SRC (pat), to, 0);
3533
3534 /* We should be able to ignore the return code from validate_change but
3535 to play it safe we check. */
3536 if (changed)
3537 {
3538 gcse_subst_count++;
3539 if (gcse_file != NULL)
3540 {
3541 fprintf (gcse_file, "GCSE: Replacing the source in insn %d with",
3542 INSN_UID (insn));
3543 fprintf (gcse_file, " reg %d %s insn %d\n",
3544 REGNO (to), use_src ? "from" : "set in",
3545 INSN_UID (insn_computes_expr));
3546 }
3547 }
3548 }
3549
3550 /* The register that the expr is computed into is set more than once. */
3551 else if (1 /*expensive_op(this_pattrn->op) && do_expensive_gcse)*/)
3552 {
3553 /* Insert an insn after insnx that copies the reg set in insnx
3554 into a new pseudo register call this new register REGN.
3555 From insnb until end of basic block or until REGB is set
3556 replace all uses of REGB with REGN. */
3557 rtx new_insn;
3558
3559 to = gen_reg_rtx (GET_MODE (SET_DEST (PATTERN (insn_computes_expr))));
3560
3561 /* Generate the new insn. */
3562 /* ??? If the change fails, we return 0, even though we created
3563 an insn. I think this is ok. */
3564 new_insn
3565 = emit_insn_after (gen_rtx_SET (VOIDmode, to,
3566 SET_DEST (PATTERN
3567 (insn_computes_expr))),
3568 insn_computes_expr);
3569
3570 /* Keep block number table up to date. */
3571 set_block_for_new_insns (new_insn, BLOCK_FOR_INSN (insn_computes_expr));
3572
3573 /* Keep register set table up to date. */
3574 record_one_set (REGNO (to), new_insn);
3575
3576 gcse_create_count++;
3577 if (gcse_file != NULL)
3578 {
3579 fprintf (gcse_file, "GCSE: Creating insn %d to copy value of reg %d",
3580 INSN_UID (NEXT_INSN (insn_computes_expr)),
3581 REGNO (SET_SRC (PATTERN (NEXT_INSN (insn_computes_expr)))));
3582 fprintf (gcse_file, ", computed in insn %d,\n",
3583 INSN_UID (insn_computes_expr));
3584 fprintf (gcse_file, " into newly allocated reg %d\n",
3585 REGNO (to));
3586 }
3587
3588 pat = PATTERN (insn);
3589
3590 /* Do register replacement for INSN. */
3591 changed = validate_change (insn, &SET_SRC (pat),
3592 SET_DEST (PATTERN
3593 (NEXT_INSN (insn_computes_expr))),
3594 0);
3595
3596 /* We should be able to ignore the return code from validate_change but
3597 to play it safe we check. */
3598 if (changed)
3599 {
3600 gcse_subst_count++;
3601 if (gcse_file != NULL)
3602 {
3603 fprintf (gcse_file,
3604 "GCSE: Replacing the source in insn %d with reg %d ",
3605 INSN_UID (insn),
3606 REGNO (SET_DEST (PATTERN (NEXT_INSN
3607 (insn_computes_expr)))));
3608 fprintf (gcse_file, "set in insn %d\n",
3609 INSN_UID (insn_computes_expr));
3610 }
3611 }
3612 }
3613
3614 return changed;
3615 }
3616
3617 /* Perform classic GCSE. This is called by one_classic_gcse_pass after all
3618 the dataflow analysis has been done.
3619
3620 The result is non-zero if a change was made. */
3621
3622 static int
3623 classic_gcse ()
3624 {
3625 int bb, changed;
3626 rtx insn;
3627
3628 /* Note we start at block 1. */
3629
3630 changed = 0;
3631 for (bb = 1; bb < n_basic_blocks; bb++)
3632 {
3633 /* Reset tables used to keep track of what's still valid [since the
3634 start of the block]. */
3635 reset_opr_set_tables ();
3636
3637 for (insn = BLOCK_HEAD (bb);
3638 insn != NULL && insn != NEXT_INSN (BLOCK_END (bb));
3639 insn = NEXT_INSN (insn))
3640 {
3641 /* Is insn of form (set (pseudo-reg) ...)? */
3642 if (GET_CODE (insn) == INSN
3643 && GET_CODE (PATTERN (insn)) == SET
3644 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
3645 && REGNO (SET_DEST (PATTERN (insn))) >= FIRST_PSEUDO_REGISTER)
3646 {
3647 rtx pat = PATTERN (insn);
3648 rtx src = SET_SRC (pat);
3649 struct expr *expr;
3650
3651 if (want_to_gcse_p (src)
3652 /* Is the expression recorded? */
3653 && ((expr = lookup_expr (src)) != NULL)
3654 /* Is the expression available [at the start of the
3655 block]? */
3656 && TEST_BIT (ae_in[bb], expr->bitmap_index)
3657 /* Are the operands unchanged since the start of the
3658 block? */
3659 && oprs_not_set_p (src, insn))
3660 changed |= handle_avail_expr (insn, expr);
3661 }
3662
3663 /* Keep track of everything modified by this insn. */
3664 /* ??? Need to be careful w.r.t. mods done to INSN. */
3665 if (INSN_P (insn))
3666 mark_oprs_set (insn);
3667 }
3668 }
3669
3670 return changed;
3671 }
3672
3673 /* Top level routine to perform one classic GCSE pass.
3674
3675 Return non-zero if a change was made. */
3676
3677 static int
3678 one_classic_gcse_pass (pass)
3679 int pass;
3680 {
3681 int changed = 0;
3682
3683 gcse_subst_count = 0;
3684 gcse_create_count = 0;
3685
3686 alloc_expr_hash_table (max_cuid);
3687 alloc_rd_mem (n_basic_blocks, max_cuid);
3688 compute_expr_hash_table ();
3689 if (gcse_file)
3690 dump_hash_table (gcse_file, "Expression", expr_hash_table,
3691 expr_hash_table_size, n_exprs);
3692
3693 if (n_exprs > 0)
3694 {
3695 compute_kill_rd ();
3696 compute_rd ();
3697 alloc_avail_expr_mem (n_basic_blocks, n_exprs);
3698 compute_ae_gen ();
3699 compute_ae_kill (ae_gen, ae_kill);
3700 compute_available (ae_gen, ae_kill, ae_out, ae_in);
3701 changed = classic_gcse ();
3702 free_avail_expr_mem ();
3703 }
3704
3705 free_rd_mem ();
3706 free_expr_hash_table ();
3707
3708 if (gcse_file)
3709 {
3710 fprintf (gcse_file, "\n");
3711 fprintf (gcse_file, "GCSE of %s, pass %d: %d bytes needed, %d substs,",
3712 current_function_name, pass, bytes_used, gcse_subst_count);
3713 fprintf (gcse_file, "%d insns created\n", gcse_create_count);
3714 }
3715
3716 return changed;
3717 }
3718 \f
3719 /* Compute copy/constant propagation working variables. */
3720
3721 /* Local properties of assignments. */
3722 static sbitmap *cprop_pavloc;
3723 static sbitmap *cprop_absaltered;
3724
3725 /* Global properties of assignments (computed from the local properties). */
3726 static sbitmap *cprop_avin;
3727 static sbitmap *cprop_avout;
3728
3729 /* Allocate vars used for copy/const propagation. N_BLOCKS is the number of
3730 basic blocks. N_SETS is the number of sets. */
3731
3732 static void
3733 alloc_cprop_mem (n_blocks, n_sets)
3734 int n_blocks, n_sets;
3735 {
3736 cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets);
3737 cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets);
3738
3739 cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets);
3740 cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets);
3741 }
3742
3743 /* Free vars used by copy/const propagation. */
3744
3745 static void
3746 free_cprop_mem ()
3747 {
3748 free (cprop_pavloc);
3749 free (cprop_absaltered);
3750 free (cprop_avin);
3751 free (cprop_avout);
3752 }
3753
3754 /* For each block, compute whether X is transparent. X is either an
3755 expression or an assignment [though we don't care which, for this context
3756 an assignment is treated as an expression]. For each block where an
3757 element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX
3758 bit in BMAP. */
3759
3760 static void
3761 compute_transp (x, indx, bmap, set_p)
3762 rtx x;
3763 int indx;
3764 sbitmap *bmap;
3765 int set_p;
3766 {
3767 int bb, i, j;
3768 enum rtx_code code;
3769 reg_set *r;
3770 const char *fmt;
3771
3772 /* repeat is used to turn tail-recursion into iteration since GCC
3773 can't do it when there's no return value. */
3774 repeat:
3775
3776 if (x == 0)
3777 return;
3778
3779 code = GET_CODE (x);
3780 switch (code)
3781 {
3782 case REG:
3783 if (set_p)
3784 {
3785 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
3786 {
3787 for (bb = 0; bb < n_basic_blocks; bb++)
3788 if (TEST_BIT (reg_set_in_block[bb], REGNO (x)))
3789 SET_BIT (bmap[bb], indx);
3790 }
3791 else
3792 {
3793 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
3794 SET_BIT (bmap[BLOCK_NUM (r->insn)], indx);
3795 }
3796 }
3797 else
3798 {
3799 if (REGNO (x) < FIRST_PSEUDO_REGISTER)
3800 {
3801 for (bb = 0; bb < n_basic_blocks; bb++)
3802 if (TEST_BIT (reg_set_in_block[bb], REGNO (x)))
3803 RESET_BIT (bmap[bb], indx);
3804 }
3805 else
3806 {
3807 for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next)
3808 RESET_BIT (bmap[BLOCK_NUM (r->insn)], indx);
3809 }
3810 }
3811
3812 return;
3813
3814 case MEM:
3815 for (bb = 0; bb < n_basic_blocks; bb++)
3816 {
3817 rtx list_entry = canon_modify_mem_list[bb];
3818
3819 while (list_entry)
3820 {
3821 rtx dest, dest_addr;
3822
3823 if (GET_CODE (XEXP (list_entry, 0)) == CALL_INSN)
3824 {
3825 if (set_p)
3826 SET_BIT (bmap[bb], indx);
3827 else
3828 RESET_BIT (bmap[bb], indx);
3829 break;
3830 }
3831 /* LIST_ENTRY must be an INSN of some kind that sets memory.
3832 Examine each hunk of memory that is modified. */
3833
3834 dest = XEXP (list_entry, 0);
3835 list_entry = XEXP (list_entry, 1);
3836 dest_addr = XEXP (list_entry, 0);
3837
3838 if (canon_true_dependence (dest, GET_MODE (dest), dest_addr,
3839 x, rtx_addr_varies_p))
3840 {
3841 if (set_p)
3842 SET_BIT (bmap[bb], indx);
3843 else
3844 RESET_BIT (bmap[bb], indx);
3845 break;
3846 }
3847 list_entry = XEXP (list_entry, 1);
3848 }
3849 }
3850 if (set_p)
3851 {
3852 for (bb = 0; bb < n_basic_blocks; bb++)
3853 if (mem_set_in_block[bb])
3854 SET_BIT (bmap[bb], indx);
3855 }
3856 else
3857 {
3858 for (bb = 0; bb < n_basic_blocks; bb++)
3859 if (mem_set_in_block[bb])
3860 RESET_BIT (bmap[bb], indx);
3861 }
3862
3863 x = XEXP (x, 0);
3864 goto repeat;
3865
3866 case PC:
3867 case CC0: /*FIXME*/
3868 case CONST:
3869 case CONST_INT:
3870 case CONST_DOUBLE:
3871 case SYMBOL_REF:
3872 case LABEL_REF:
3873 case ADDR_VEC:
3874 case ADDR_DIFF_VEC:
3875 return;
3876
3877 default:
3878 break;
3879 }
3880
3881 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
3882 {
3883 if (fmt[i] == 'e')
3884 {
3885 /* If we are about to do the last recursive call
3886 needed at this level, change it into iteration.
3887 This function is called enough to be worth it. */
3888 if (i == 0)
3889 {
3890 x = XEXP (x, i);
3891 goto repeat;
3892 }
3893
3894 compute_transp (XEXP (x, i), indx, bmap, set_p);
3895 }
3896 else if (fmt[i] == 'E')
3897 for (j = 0; j < XVECLEN (x, i); j++)
3898 compute_transp (XVECEXP (x, i, j), indx, bmap, set_p);
3899 }
3900 }
3901
3902 /* Top level routine to do the dataflow analysis needed by copy/const
3903 propagation. */
3904
3905 static void
3906 compute_cprop_data ()
3907 {
3908 compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, 1);
3909 compute_available (cprop_pavloc, cprop_absaltered,
3910 cprop_avout, cprop_avin);
3911 }
3912 \f
3913 /* Copy/constant propagation. */
3914
3915 /* Maximum number of register uses in an insn that we handle. */
3916 #define MAX_USES 8
3917
3918 /* Table of uses found in an insn.
3919 Allocated statically to avoid alloc/free complexity and overhead. */
3920 static struct reg_use reg_use_table[MAX_USES];
3921
3922 /* Index into `reg_use_table' while building it. */
3923 static int reg_use_count;
3924
3925 /* Set up a list of register numbers used in INSN. The found uses are stored
3926 in `reg_use_table'. `reg_use_count' is initialized to zero before entry,
3927 and contains the number of uses in the table upon exit.
3928
3929 ??? If a register appears multiple times we will record it multiple times.
3930 This doesn't hurt anything but it will slow things down. */
3931
3932 static void
3933 find_used_regs (x)
3934 rtx x;
3935 {
3936 int i, j;
3937 enum rtx_code code;
3938 const char *fmt;
3939
3940 /* repeat is used to turn tail-recursion into iteration since GCC
3941 can't do it when there's no return value. */
3942 repeat:
3943
3944 if (x == 0)
3945 return;
3946
3947 code = GET_CODE (x);
3948 switch (code)
3949 {
3950 case REG:
3951 if (reg_use_count == MAX_USES)
3952 return;
3953
3954 reg_use_table[reg_use_count].reg_rtx = x;
3955 reg_use_count++;
3956 return;
3957
3958 case MEM:
3959 x = XEXP (x, 0);
3960 goto repeat;
3961
3962 case PC:
3963 case CC0:
3964 case CONST:
3965 case CONST_INT:
3966 case CONST_DOUBLE:
3967 case SYMBOL_REF:
3968 case LABEL_REF:
3969 case CLOBBER:
3970 case ADDR_VEC:
3971 case ADDR_DIFF_VEC:
3972 case ASM_INPUT: /*FIXME*/
3973 return;
3974
3975 case SET:
3976 if (GET_CODE (SET_DEST (x)) == MEM)
3977 find_used_regs (SET_DEST (x));
3978 x = SET_SRC (x);
3979 goto repeat;
3980
3981 default:
3982 break;
3983 }
3984
3985 /* Recursively scan the operands of this expression. */
3986
3987 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
3988 {
3989 if (fmt[i] == 'e')
3990 {
3991 /* If we are about to do the last recursive call
3992 needed at this level, change it into iteration.
3993 This function is called enough to be worth it. */
3994 if (i == 0)
3995 {
3996 x = XEXP (x, 0);
3997 goto repeat;
3998 }
3999
4000 find_used_regs (XEXP (x, i));
4001 }
4002 else if (fmt[i] == 'E')
4003 for (j = 0; j < XVECLEN (x, i); j++)
4004 find_used_regs (XVECEXP (x, i, j));
4005 }
4006 }
4007
4008 /* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO.
4009 Returns non-zero is successful. */
4010
4011 static int
4012 try_replace_reg (from, to, insn)
4013 rtx from, to, insn;
4014 {
4015 rtx note = find_reg_equal_equiv_note (insn);
4016 rtx src = 0;
4017 int success = 0;
4018 rtx set = single_set (insn);
4019
4020 /* If this is a single set, try to simplify the source of the set given
4021 our substitution. We could perhaps try this for multiple SETs, but
4022 it probably won't buy us anything. */
4023 if (set != 0)
4024 {
4025 src = simplify_replace_rtx (SET_SRC (set), from, to);
4026
4027 /* Try this two ways: first just replace SET_SRC. If that doesn't
4028 work and this is a PARALLEL, try to replace the whole pattern
4029 with a new SET. */
4030 if (validate_change (insn, &SET_SRC (set), src, 0))
4031 success = 1;
4032 else if (GET_CODE (PATTERN (insn)) == PARALLEL
4033 && validate_change (insn, &PATTERN (insn),
4034 gen_rtx_SET (VOIDmode, SET_DEST (set),
4035 src),
4036 0))
4037 success = 1;
4038 }
4039
4040 /* Otherwise, try to do a global replacement within the insn. */
4041 if (!success)
4042 success = validate_replace_src (from, to, insn);
4043
4044 /* If we've failed to do replacement, have a single SET, and don't already
4045 have a note, add a REG_EQUAL note to not lose information. */
4046 if (!success && note == 0 && set != 0)
4047 note = REG_NOTES (insn)
4048 = gen_rtx_EXPR_LIST (REG_EQUAL, src, REG_NOTES (insn));
4049
4050 /* If there is already a NOTE, update the expression in it with our
4051 replacement. */
4052 else if (note != 0)
4053 XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), from, to);
4054
4055 /* REG_EQUAL may get simplified into register.
4056 We don't allow that. Remove that note. This code ought
4057 not to hapen, because previous code ought to syntetize
4058 reg-reg move, but be on the safe side. */
4059 if (note && REG_P (XEXP (note, 0)))
4060 remove_note (insn, note);
4061
4062 return success;
4063 }
4064
4065 /* Find a set of REGNOs that are available on entry to INSN's block. Returns
4066 NULL no such set is found. */
4067
4068 static struct expr *
4069 find_avail_set (regno, insn)
4070 int regno;
4071 rtx insn;
4072 {
4073 /* SET1 contains the last set found that can be returned to the caller for
4074 use in a substitution. */
4075 struct expr *set1 = 0;
4076
4077 /* Loops are not possible here. To get a loop we would need two sets
4078 available at the start of the block containing INSN. ie we would
4079 need two sets like this available at the start of the block:
4080
4081 (set (reg X) (reg Y))
4082 (set (reg Y) (reg X))
4083
4084 This can not happen since the set of (reg Y) would have killed the
4085 set of (reg X) making it unavailable at the start of this block. */
4086 while (1)
4087 {
4088 rtx src;
4089 struct expr *set = lookup_set (regno, NULL_RTX);
4090
4091 /* Find a set that is available at the start of the block
4092 which contains INSN. */
4093 while (set)
4094 {
4095 if (TEST_BIT (cprop_avin[BLOCK_NUM (insn)], set->bitmap_index))
4096 break;
4097 set = next_set (regno, set);
4098 }
4099
4100 /* If no available set was found we've reached the end of the
4101 (possibly empty) copy chain. */
4102 if (set == 0)
4103 break;
4104
4105 if (GET_CODE (set->expr) != SET)
4106 abort ();
4107
4108 src = SET_SRC (set->expr);
4109
4110 /* We know the set is available.
4111 Now check that SRC is ANTLOC (i.e. none of the source operands
4112 have changed since the start of the block).
4113
4114 If the source operand changed, we may still use it for the next
4115 iteration of this loop, but we may not use it for substitutions. */
4116
4117 if (CONSTANT_P (src) || oprs_not_set_p (src, insn))
4118 set1 = set;
4119
4120 /* If the source of the set is anything except a register, then
4121 we have reached the end of the copy chain. */
4122 if (GET_CODE (src) != REG)
4123 break;
4124
4125 /* Follow the copy chain, ie start another iteration of the loop
4126 and see if we have an available copy into SRC. */
4127 regno = REGNO (src);
4128 }
4129
4130 /* SET1 holds the last set that was available and anticipatable at
4131 INSN. */
4132 return set1;
4133 }
4134
4135 /* Subroutine of cprop_insn that tries to propagate constants into
4136 JUMP_INSNS. INSN must be a conditional jump. FROM is what we will try to
4137 replace, SRC is the constant we will try to substitute for it. Returns
4138 nonzero if a change was made. We know INSN has just a SET. */
4139
4140 static int
4141 cprop_jump (insn, from, src)
4142 rtx insn;
4143 rtx from;
4144 rtx src;
4145 {
4146 rtx set = PATTERN (insn);
4147 rtx new = simplify_replace_rtx (SET_SRC (set), from, src);
4148
4149 /* If no simplification can be made, then try the next
4150 register. */
4151 if (rtx_equal_p (new, SET_SRC (set)))
4152 return 0;
4153
4154 /* If this is now a no-op leave it that way, but update LABEL_NUSED if
4155 necessary. */
4156 if (new == pc_rtx)
4157 {
4158 SET_SRC (set) = new;
4159
4160 if (JUMP_LABEL (insn) != 0)
4161 --LABEL_NUSES (JUMP_LABEL (insn));
4162 }
4163
4164 /* Otherwise, this must be a valid instruction. */
4165 else if (! validate_change (insn, &SET_SRC (set), new, 0))
4166 return 0;
4167
4168 /* If this has turned into an unconditional jump,
4169 then put a barrier after it so that the unreachable
4170 code will be deleted. */
4171 if (GET_CODE (SET_SRC (set)) == LABEL_REF)
4172 emit_barrier_after (insn);
4173
4174 run_jump_opt_after_gcse = 1;
4175
4176 const_prop_count++;
4177 if (gcse_file != NULL)
4178 {
4179 fprintf (gcse_file,
4180 "CONST-PROP: Replacing reg %d in insn %d with constant ",
4181 REGNO (from), INSN_UID (insn));
4182 print_rtl (gcse_file, src);
4183 fprintf (gcse_file, "\n");
4184 }
4185
4186 return 1;
4187 }
4188
4189 #ifdef HAVE_cc0
4190
4191 /* Subroutine of cprop_insn that tries to propagate constants into JUMP_INSNS
4192 for machines that have CC0. INSN is a single set that stores into CC0;
4193 the insn following it is a conditional jump. REG_USED is the use we will
4194 try to replace, SRC is the constant we will try to substitute for it.
4195 Returns nonzero if a change was made. */
4196
4197 static int
4198 cprop_cc0_jump (insn, reg_used, src)
4199 rtx insn;
4200 struct reg_use *reg_used;
4201 rtx src;
4202 {
4203 /* First substitute in the SET_SRC of INSN, then substitute that for
4204 CC0 in JUMP. */
4205 rtx jump = NEXT_INSN (insn);
4206 rtx new_src = simplify_replace_rtx (SET_SRC (PATTERN (insn)),
4207 reg_used->reg_rtx, src);
4208
4209 if (! cprop_jump (jump, cc0_rtx, new_src))
4210 return 0;
4211
4212 /* If we succeeded, delete the cc0 setter. */
4213 PUT_CODE (insn, NOTE);
4214 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
4215 NOTE_SOURCE_FILE (insn) = 0;
4216
4217 return 1;
4218 }
4219 #endif
4220
4221 /* Perform constant and copy propagation on INSN.
4222 The result is non-zero if a change was made. */
4223
4224 static int
4225 cprop_insn (insn, alter_jumps)
4226 rtx insn;
4227 int alter_jumps;
4228 {
4229 struct reg_use *reg_used;
4230 int changed = 0;
4231 rtx note;
4232
4233 /* Only propagate into SETs. Note that a conditional jump is a
4234 SET with pc_rtx as the destination. */
4235 if (GET_CODE (insn) != INSN && GET_CODE (insn) != JUMP_INSN)
4236 return 0;
4237
4238 reg_use_count = 0;
4239 find_used_regs (PATTERN (insn));
4240
4241 note = find_reg_equal_equiv_note (insn);
4242
4243 /* We may win even when propagating constants into notes. */
4244 if (note)
4245 find_used_regs (XEXP (note, 0));
4246
4247 for (reg_used = &reg_use_table[0]; reg_use_count > 0;
4248 reg_used++, reg_use_count--)
4249 {
4250 unsigned int regno = REGNO (reg_used->reg_rtx);
4251 rtx pat, src;
4252 struct expr *set;
4253
4254 /* Ignore registers created by GCSE.
4255 We do this because ... */
4256 if (regno >= max_gcse_regno)
4257 continue;
4258
4259 /* If the register has already been set in this block, there's
4260 nothing we can do. */
4261 if (! oprs_not_set_p (reg_used->reg_rtx, insn))
4262 continue;
4263
4264 /* Find an assignment that sets reg_used and is available
4265 at the start of the block. */
4266 set = find_avail_set (regno, insn);
4267 if (! set)
4268 continue;
4269
4270 pat = set->expr;
4271 /* ??? We might be able to handle PARALLELs. Later. */
4272 if (GET_CODE (pat) != SET)
4273 abort ();
4274
4275 src = SET_SRC (pat);
4276
4277 /* Constant propagation. */
4278 if (GET_CODE (src) == CONST_INT || GET_CODE (src) == CONST_DOUBLE
4279 || GET_CODE (src) == SYMBOL_REF)
4280 {
4281 /* Handle normal insns first. */
4282 if (GET_CODE (insn) == INSN
4283 && try_replace_reg (reg_used->reg_rtx, src, insn))
4284 {
4285 changed = 1;
4286 const_prop_count++;
4287 if (gcse_file != NULL)
4288 {
4289 fprintf (gcse_file, "CONST-PROP: Replacing reg %d in ",
4290 regno);
4291 fprintf (gcse_file, "insn %d with constant ",
4292 INSN_UID (insn));
4293 print_rtl (gcse_file, src);
4294 fprintf (gcse_file, "\n");
4295 }
4296
4297 /* The original insn setting reg_used may or may not now be
4298 deletable. We leave the deletion to flow. */
4299 }
4300
4301 /* Try to propagate a CONST_INT into a conditional jump.
4302 We're pretty specific about what we will handle in this
4303 code, we can extend this as necessary over time.
4304
4305 Right now the insn in question must look like
4306 (set (pc) (if_then_else ...)) */
4307 else if (alter_jumps
4308 && GET_CODE (insn) == JUMP_INSN
4309 && condjump_p (insn)
4310 && ! simplejump_p (insn))
4311 changed |= cprop_jump (insn, reg_used->reg_rtx, src);
4312
4313 #ifdef HAVE_cc0
4314 /* Similar code for machines that use a pair of CC0 setter and
4315 conditional jump insn. */
4316 else if (alter_jumps
4317 && GET_CODE (PATTERN (insn)) == SET
4318 && SET_DEST (PATTERN (insn)) == cc0_rtx
4319 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
4320 && condjump_p (NEXT_INSN (insn))
4321 && ! simplejump_p (NEXT_INSN (insn))
4322 && cprop_cc0_jump (insn, reg_used, src))
4323 {
4324 changed = 1;
4325 break;
4326 }
4327 #endif
4328 }
4329 else if (GET_CODE (src) == REG
4330 && REGNO (src) >= FIRST_PSEUDO_REGISTER
4331 && REGNO (src) != regno)
4332 {
4333 if (try_replace_reg (reg_used->reg_rtx, src, insn))
4334 {
4335 changed = 1;
4336 copy_prop_count++;
4337 if (gcse_file != NULL)
4338 {
4339 fprintf (gcse_file, "COPY-PROP: Replacing reg %d in insn %d",
4340 regno, INSN_UID (insn));
4341 fprintf (gcse_file, " with reg %d\n", REGNO (src));
4342 }
4343
4344 /* The original insn setting reg_used may or may not now be
4345 deletable. We leave the deletion to flow. */
4346 /* FIXME: If it turns out that the insn isn't deletable,
4347 then we may have unnecessarily extended register lifetimes
4348 and made things worse. */
4349 }
4350 }
4351 }
4352
4353 return changed;
4354 }
4355
4356 /* Forward propagate copies. This includes copies and constants. Return
4357 non-zero if a change was made. */
4358
4359 static int
4360 cprop (alter_jumps)
4361 int alter_jumps;
4362 {
4363 int bb, changed;
4364 rtx insn;
4365
4366 /* Note we start at block 1. */
4367
4368 changed = 0;
4369 for (bb = 1; bb < n_basic_blocks; bb++)
4370 {
4371 /* Reset tables used to keep track of what's still valid [since the
4372 start of the block]. */
4373 reset_opr_set_tables ();
4374
4375 for (insn = BLOCK_HEAD (bb);
4376 insn != NULL && insn != NEXT_INSN (BLOCK_END (bb));
4377 insn = NEXT_INSN (insn))
4378 if (INSN_P (insn))
4379 {
4380 changed |= cprop_insn (insn, alter_jumps);
4381
4382 /* Keep track of everything modified by this insn. */
4383 /* ??? Need to be careful w.r.t. mods done to INSN. Don't
4384 call mark_oprs_set if we turned the insn into a NOTE. */
4385 if (GET_CODE (insn) != NOTE)
4386 mark_oprs_set (insn);
4387 }
4388 }
4389
4390 if (gcse_file != NULL)
4391 fprintf (gcse_file, "\n");
4392
4393 return changed;
4394 }
4395
4396 /* Perform one copy/constant propagation pass.
4397 F is the first insn in the function.
4398 PASS is the pass count. */
4399
4400 static int
4401 one_cprop_pass (pass, alter_jumps)
4402 int pass;
4403 int alter_jumps;
4404 {
4405 int changed = 0;
4406
4407 const_prop_count = 0;
4408 copy_prop_count = 0;
4409
4410 alloc_set_hash_table (max_cuid);
4411 compute_set_hash_table ();
4412 if (gcse_file)
4413 dump_hash_table (gcse_file, "SET", set_hash_table, set_hash_table_size,
4414 n_sets);
4415 if (n_sets > 0)
4416 {
4417 alloc_cprop_mem (n_basic_blocks, n_sets);
4418 compute_cprop_data ();
4419 changed = cprop (alter_jumps);
4420 free_cprop_mem ();
4421 }
4422
4423 free_set_hash_table ();
4424
4425 if (gcse_file)
4426 {
4427 fprintf (gcse_file, "CPROP of %s, pass %d: %d bytes needed, ",
4428 current_function_name, pass, bytes_used);
4429 fprintf (gcse_file, "%d const props, %d copy props\n\n",
4430 const_prop_count, copy_prop_count);
4431 }
4432
4433 return changed;
4434 }
4435 \f
4436 /* Compute PRE+LCM working variables. */
4437
4438 /* Local properties of expressions. */
4439 /* Nonzero for expressions that are transparent in the block. */
4440 static sbitmap *transp;
4441
4442 /* Nonzero for expressions that are transparent at the end of the block.
4443 This is only zero for expressions killed by abnormal critical edge
4444 created by a calls. */
4445 static sbitmap *transpout;
4446
4447 /* Nonzero for expressions that are computed (available) in the block. */
4448 static sbitmap *comp;
4449
4450 /* Nonzero for expressions that are locally anticipatable in the block. */
4451 static sbitmap *antloc;
4452
4453 /* Nonzero for expressions where this block is an optimal computation
4454 point. */
4455 static sbitmap *pre_optimal;
4456
4457 /* Nonzero for expressions which are redundant in a particular block. */
4458 static sbitmap *pre_redundant;
4459
4460 /* Nonzero for expressions which should be inserted on a specific edge. */
4461 static sbitmap *pre_insert_map;
4462
4463 /* Nonzero for expressions which should be deleted in a specific block. */
4464 static sbitmap *pre_delete_map;
4465
4466 /* Contains the edge_list returned by pre_edge_lcm. */
4467 static struct edge_list *edge_list;
4468
4469 /* Redundant insns. */
4470 static sbitmap pre_redundant_insns;
4471
4472 /* Allocate vars used for PRE analysis. */
4473
4474 static void
4475 alloc_pre_mem (n_blocks, n_exprs)
4476 int n_blocks, n_exprs;
4477 {
4478 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
4479 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
4480 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
4481
4482 pre_optimal = NULL;
4483 pre_redundant = NULL;
4484 pre_insert_map = NULL;
4485 pre_delete_map = NULL;
4486 ae_in = NULL;
4487 ae_out = NULL;
4488 ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs);
4489
4490 /* pre_insert and pre_delete are allocated later. */
4491 }
4492
4493 /* Free vars used for PRE analysis. */
4494
4495 static void
4496 free_pre_mem ()
4497 {
4498 free (transp);
4499 free (comp);
4500
4501 /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */
4502
4503 if (pre_optimal)
4504 free (pre_optimal);
4505 if (pre_redundant)
4506 free (pre_redundant);
4507 if (pre_insert_map)
4508 free (pre_insert_map);
4509 if (pre_delete_map)
4510 free (pre_delete_map);
4511
4512 if (ae_in)
4513 free (ae_in);
4514 if (ae_out)
4515 free (ae_out);
4516
4517 transp = comp = NULL;
4518 pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL;
4519 ae_in = ae_out = NULL;
4520 }
4521
4522 /* Top level routine to do the dataflow analysis needed by PRE. */
4523
4524 static void
4525 compute_pre_data ()
4526 {
4527 sbitmap trapping_expr;
4528 int i;
4529 unsigned int ui;
4530
4531 compute_local_properties (transp, comp, antloc, 0);
4532 sbitmap_vector_zero (ae_kill, n_basic_blocks);
4533
4534 /* Collect expressions which might trap. */
4535 trapping_expr = sbitmap_alloc (n_exprs);
4536 sbitmap_zero (trapping_expr);
4537 for (ui = 0; ui < expr_hash_table_size; ui++)
4538 {
4539 struct expr *e;
4540 for (e = expr_hash_table[ui]; e != NULL; e = e->next_same_hash)
4541 if (may_trap_p (e->expr))
4542 SET_BIT (trapping_expr, e->bitmap_index);
4543 }
4544
4545 /* Compute ae_kill for each basic block using:
4546
4547 ~(TRANSP | COMP)
4548
4549 This is significantly faster than compute_ae_kill. */
4550
4551 for (i = 0; i < n_basic_blocks; i++)
4552 {
4553 edge e;
4554
4555 /* If the current block is the destination of an abnormal edge, we
4556 kill all trapping expressions because we won't be able to properly
4557 place the instruction on the edge. So make them neither
4558 anticipatable nor transparent. This is fairly conservative. */
4559 for (e = BASIC_BLOCK (i)->pred; e ; e = e->pred_next)
4560 if (e->flags & EDGE_ABNORMAL)
4561 {
4562 sbitmap_difference (antloc[i], antloc[i], trapping_expr);
4563 sbitmap_difference (transp[i], transp[i], trapping_expr);
4564 break;
4565 }
4566
4567 sbitmap_a_or_b (ae_kill[i], transp[i], comp[i]);
4568 sbitmap_not (ae_kill[i], ae_kill[i]);
4569 }
4570
4571 edge_list = pre_edge_lcm (gcse_file, n_exprs, transp, comp, antloc,
4572 ae_kill, &pre_insert_map, &pre_delete_map);
4573 free (antloc);
4574 antloc = NULL;
4575 free (ae_kill);
4576 ae_kill = NULL;
4577 free (trapping_expr);
4578 }
4579 \f
4580 /* PRE utilities */
4581
4582 /* Return non-zero if an occurrence of expression EXPR in OCCR_BB would reach
4583 block BB.
4584
4585 VISITED is a pointer to a working buffer for tracking which BB's have
4586 been visited. It is NULL for the top-level call.
4587
4588 We treat reaching expressions that go through blocks containing the same
4589 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
4590 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
4591 2 as not reaching. The intent is to improve the probability of finding
4592 only one reaching expression and to reduce register lifetimes by picking
4593 the closest such expression. */
4594
4595 static int
4596 pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited)
4597 basic_block occr_bb;
4598 struct expr *expr;
4599 basic_block bb;
4600 char *visited;
4601 {
4602 edge pred;
4603
4604 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
4605 {
4606 basic_block pred_bb = pred->src;
4607
4608 if (pred->src == ENTRY_BLOCK_PTR
4609 /* Has predecessor has already been visited? */
4610 || visited[pred_bb->index])
4611 ;/* Nothing to do. */
4612
4613 /* Does this predecessor generate this expression? */
4614 else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index))
4615 {
4616 /* Is this the occurrence we're looking for?
4617 Note that there's only one generating occurrence per block
4618 so we just need to check the block number. */
4619 if (occr_bb == pred_bb)
4620 return 1;
4621
4622 visited[pred_bb->index] = 1;
4623 }
4624 /* Ignore this predecessor if it kills the expression. */
4625 else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index))
4626 visited[pred_bb->index] = 1;
4627
4628 /* Neither gen nor kill. */
4629 else
4630 {
4631 visited[pred_bb->index] = 1;
4632 if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited))
4633 return 1;
4634 }
4635 }
4636
4637 /* All paths have been checked. */
4638 return 0;
4639 }
4640
4641 /* The wrapper for pre_expr_reaches_here_work that ensures that any
4642 memory allocated for that function is returned. */
4643
4644 static int
4645 pre_expr_reaches_here_p (occr_bb, expr, bb)
4646 basic_block occr_bb;
4647 struct expr *expr;
4648 basic_block bb;
4649 {
4650 int rval;
4651 char *visited = (char *) xcalloc (n_basic_blocks, 1);
4652
4653 rval = pre_expr_reaches_here_p_work(occr_bb, expr, bb, visited);
4654
4655 free (visited);
4656 return rval;
4657 }
4658 \f
4659
4660 /* Given an expr, generate RTL which we can insert at the end of a BB,
4661 or on an edge. Set the block number of any insns generated to
4662 the value of BB. */
4663
4664 static rtx
4665 process_insert_insn (expr)
4666 struct expr *expr;
4667 {
4668 rtx reg = expr->reaching_reg;
4669 rtx exp = copy_rtx (expr->expr);
4670 rtx pat;
4671
4672 start_sequence ();
4673
4674 /* If the expression is something that's an operand, like a constant,
4675 just copy it to a register. */
4676 if (general_operand (exp, GET_MODE (reg)))
4677 emit_move_insn (reg, exp);
4678
4679 /* Otherwise, make a new insn to compute this expression and make sure the
4680 insn will be recognized (this also adds any needed CLOBBERs). Copy the
4681 expression to make sure we don't have any sharing issues. */
4682 else if (insn_invalid_p (emit_insn (gen_rtx_SET (VOIDmode, reg, exp))))
4683 abort ();
4684
4685 pat = gen_sequence ();
4686 end_sequence ();
4687
4688 return pat;
4689 }
4690
4691 /* Add EXPR to the end of basic block BB.
4692
4693 This is used by both the PRE and code hoisting.
4694
4695 For PRE, we want to verify that the expr is either transparent
4696 or locally anticipatable in the target block. This check makes
4697 no sense for code hoisting. */
4698
4699 static void
4700 insert_insn_end_bb (expr, bb, pre)
4701 struct expr *expr;
4702 basic_block bb;
4703 int pre;
4704 {
4705 rtx insn = bb->end;
4706 rtx new_insn;
4707 rtx reg = expr->reaching_reg;
4708 int regno = REGNO (reg);
4709 rtx pat;
4710 int i;
4711
4712 pat = process_insert_insn (expr);
4713
4714 /* If the last insn is a jump, insert EXPR in front [taking care to
4715 handle cc0, etc. properly]. */
4716
4717 if (GET_CODE (insn) == JUMP_INSN)
4718 {
4719 #ifdef HAVE_cc0
4720 rtx note;
4721 #endif
4722
4723 /* If this is a jump table, then we can't insert stuff here. Since
4724 we know the previous real insn must be the tablejump, we insert
4725 the new instruction just before the tablejump. */
4726 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
4727 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
4728 insn = prev_real_insn (insn);
4729
4730 #ifdef HAVE_cc0
4731 /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts
4732 if cc0 isn't set. */
4733 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
4734 if (note)
4735 insn = XEXP (note, 0);
4736 else
4737 {
4738 rtx maybe_cc0_setter = prev_nonnote_insn (insn);
4739 if (maybe_cc0_setter
4740 && INSN_P (maybe_cc0_setter)
4741 && sets_cc0_p (PATTERN (maybe_cc0_setter)))
4742 insn = maybe_cc0_setter;
4743 }
4744 #endif
4745 /* FIXME: What if something in cc0/jump uses value set in new insn? */
4746 new_insn = emit_block_insn_before (pat, insn, bb);
4747 }
4748
4749 /* Likewise if the last insn is a call, as will happen in the presence
4750 of exception handling. */
4751 else if (GET_CODE (insn) == CALL_INSN)
4752 {
4753 HARD_REG_SET parm_regs;
4754 int nparm_regs;
4755 rtx p;
4756
4757 /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers,
4758 we search backward and place the instructions before the first
4759 parameter is loaded. Do this for everyone for consistency and a
4760 presumtion that we'll get better code elsewhere as well.
4761
4762 It should always be the case that we can put these instructions
4763 anywhere in the basic block with performing PRE optimizations.
4764 Check this. */
4765
4766 if (pre
4767 && !TEST_BIT (antloc[bb->index], expr->bitmap_index)
4768 && !TEST_BIT (transp[bb->index], expr->bitmap_index))
4769 abort ();
4770
4771 /* Since different machines initialize their parameter registers
4772 in different orders, assume nothing. Collect the set of all
4773 parameter registers. */
4774 CLEAR_HARD_REG_SET (parm_regs);
4775 nparm_regs = 0;
4776 for (p = CALL_INSN_FUNCTION_USAGE (insn); p ; p = XEXP (p, 1))
4777 if (GET_CODE (XEXP (p, 0)) == USE
4778 && GET_CODE (XEXP (XEXP (p, 0), 0)) == REG)
4779 {
4780 if (REGNO (XEXP (XEXP (p, 0), 0)) >= FIRST_PSEUDO_REGISTER)
4781 abort ();
4782
4783 SET_HARD_REG_BIT (parm_regs, REGNO (XEXP (XEXP (p, 0), 0)));
4784 nparm_regs++;
4785 }
4786
4787 /* Search backward for the first set of a register in this set. */
4788 while (nparm_regs && bb->head != insn)
4789 {
4790 insn = PREV_INSN (insn);
4791 p = single_set (insn);
4792 if (p && GET_CODE (SET_DEST (p)) == REG
4793 && REGNO (SET_DEST (p)) < FIRST_PSEUDO_REGISTER
4794 && TEST_HARD_REG_BIT (parm_regs, REGNO (SET_DEST (p))))
4795 {
4796 CLEAR_HARD_REG_BIT (parm_regs, REGNO (SET_DEST (p)));
4797 nparm_regs--;
4798 }
4799 }
4800
4801 /* If we found all the parameter loads, then we want to insert
4802 before the first parameter load.
4803
4804 If we did not find all the parameter loads, then we might have
4805 stopped on the head of the block, which could be a CODE_LABEL.
4806 If we inserted before the CODE_LABEL, then we would be putting
4807 the insn in the wrong basic block. In that case, put the insn
4808 after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */
4809 while (GET_CODE (insn) == CODE_LABEL
4810 || NOTE_INSN_BASIC_BLOCK_P (insn))
4811 insn = NEXT_INSN (insn);
4812
4813 new_insn = emit_block_insn_before (pat, insn, bb);
4814 }
4815 else
4816 {
4817 new_insn = emit_insn_after (pat, insn);
4818 bb->end = new_insn;
4819 }
4820
4821 /* Keep block number table up to date.
4822 Note, PAT could be a multiple insn sequence, we have to make
4823 sure that each insn in the sequence is handled. */
4824 if (GET_CODE (pat) == SEQUENCE)
4825 {
4826 for (i = 0; i < XVECLEN (pat, 0); i++)
4827 {
4828 rtx insn = XVECEXP (pat, 0, i);
4829
4830 set_block_for_insn (insn, bb);
4831 if (INSN_P (insn))
4832 add_label_notes (PATTERN (insn), new_insn);
4833
4834 note_stores (PATTERN (insn), record_set_info, insn);
4835 }
4836 }
4837 else
4838 {
4839 add_label_notes (SET_SRC (pat), new_insn);
4840 set_block_for_new_insns (new_insn, bb);
4841
4842 /* Keep register set table up to date. */
4843 record_one_set (regno, new_insn);
4844 }
4845
4846 gcse_create_count++;
4847
4848 if (gcse_file)
4849 {
4850 fprintf (gcse_file, "PRE/HOIST: end of bb %d, insn %d, ",
4851 bb->index, INSN_UID (new_insn));
4852 fprintf (gcse_file, "copying expression %d to reg %d\n",
4853 expr->bitmap_index, regno);
4854 }
4855 }
4856
4857 /* Insert partially redundant expressions on edges in the CFG to make
4858 the expressions fully redundant. */
4859
4860 static int
4861 pre_edge_insert (edge_list, index_map)
4862 struct edge_list *edge_list;
4863 struct expr **index_map;
4864 {
4865 int e, i, j, num_edges, set_size, did_insert = 0;
4866 sbitmap *inserted;
4867
4868 /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge
4869 if it reaches any of the deleted expressions. */
4870
4871 set_size = pre_insert_map[0]->size;
4872 num_edges = NUM_EDGES (edge_list);
4873 inserted = sbitmap_vector_alloc (num_edges, n_exprs);
4874 sbitmap_vector_zero (inserted, num_edges);
4875
4876 for (e = 0; e < num_edges; e++)
4877 {
4878 int indx;
4879 basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e);
4880
4881 for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS)
4882 {
4883 SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i];
4884
4885 for (j = indx; insert && j < n_exprs; j++, insert >>= 1)
4886 if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX)
4887 {
4888 struct expr *expr = index_map[j];
4889 struct occr *occr;
4890
4891 /* Now look at each deleted occurence of this expression. */
4892 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
4893 {
4894 if (! occr->deleted_p)
4895 continue;
4896
4897 /* Insert this expression on this edge if if it would
4898 reach the deleted occurence in BB. */
4899 if (!TEST_BIT (inserted[e], j))
4900 {
4901 rtx insn;
4902 edge eg = INDEX_EDGE (edge_list, e);
4903
4904 /* We can't insert anything on an abnormal and
4905 critical edge, so we insert the insn at the end of
4906 the previous block. There are several alternatives
4907 detailed in Morgans book P277 (sec 10.5) for
4908 handling this situation. This one is easiest for
4909 now. */
4910
4911 if ((eg->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
4912 insert_insn_end_bb (index_map[j], bb, 0);
4913 else
4914 {
4915 insn = process_insert_insn (index_map[j]);
4916 insert_insn_on_edge (insn, eg);
4917 }
4918
4919 if (gcse_file)
4920 {
4921 fprintf (gcse_file, "PRE/HOIST: edge (%d,%d), ",
4922 bb->index,
4923 INDEX_EDGE_SUCC_BB (edge_list, e)->index);
4924 fprintf (gcse_file, "copy expression %d\n",
4925 expr->bitmap_index);
4926 }
4927
4928 update_ld_motion_stores (expr);
4929 SET_BIT (inserted[e], j);
4930 did_insert = 1;
4931 gcse_create_count++;
4932 }
4933 }
4934 }
4935 }
4936 }
4937
4938 free (inserted);
4939 return did_insert;
4940 }
4941
4942 /* Copy the result of INSN to REG. INDX is the expression number. */
4943
4944 static void
4945 pre_insert_copy_insn (expr, insn)
4946 struct expr *expr;
4947 rtx insn;
4948 {
4949 rtx reg = expr->reaching_reg;
4950 int regno = REGNO (reg);
4951 int indx = expr->bitmap_index;
4952 rtx set = single_set (insn);
4953 rtx new_insn;
4954 basic_block bb = BLOCK_FOR_INSN (insn);
4955
4956 if (!set)
4957 abort ();
4958
4959 new_insn = emit_insn_after (gen_rtx_SET (VOIDmode, reg, SET_DEST (set)),
4960 insn);
4961
4962 /* Keep block number table up to date. */
4963 set_block_for_new_insns (new_insn, bb);
4964
4965 /* Keep register set table up to date. */
4966 record_one_set (regno, new_insn);
4967 if (insn == bb->end)
4968 bb->end = new_insn;
4969
4970 gcse_create_count++;
4971
4972 if (gcse_file)
4973 fprintf (gcse_file,
4974 "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n",
4975 BLOCK_NUM (insn), INSN_UID (new_insn), indx,
4976 INSN_UID (insn), regno);
4977 }
4978
4979 /* Copy available expressions that reach the redundant expression
4980 to `reaching_reg'. */
4981
4982 static void
4983 pre_insert_copies ()
4984 {
4985 unsigned int i;
4986 struct expr *expr;
4987 struct occr *occr;
4988 struct occr *avail;
4989
4990 /* For each available expression in the table, copy the result to
4991 `reaching_reg' if the expression reaches a deleted one.
4992
4993 ??? The current algorithm is rather brute force.
4994 Need to do some profiling. */
4995
4996 for (i = 0; i < expr_hash_table_size; i++)
4997 for (expr = expr_hash_table[i]; expr != NULL; expr = expr->next_same_hash)
4998 {
4999 /* If the basic block isn't reachable, PPOUT will be TRUE. However,
5000 we don't want to insert a copy here because the expression may not
5001 really be redundant. So only insert an insn if the expression was
5002 deleted. This test also avoids further processing if the
5003 expression wasn't deleted anywhere. */
5004 if (expr->reaching_reg == NULL)
5005 continue;
5006
5007 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5008 {
5009 if (! occr->deleted_p)
5010 continue;
5011
5012 for (avail = expr->avail_occr; avail != NULL; avail = avail->next)
5013 {
5014 rtx insn = avail->insn;
5015
5016 /* No need to handle this one if handled already. */
5017 if (avail->copied_p)
5018 continue;
5019
5020 /* Don't handle this one if it's a redundant one. */
5021 if (TEST_BIT (pre_redundant_insns, INSN_CUID (insn)))
5022 continue;
5023
5024 /* Or if the expression doesn't reach the deleted one. */
5025 if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn),
5026 expr,
5027 BLOCK_FOR_INSN (occr->insn)))
5028 continue;
5029
5030 /* Copy the result of avail to reaching_reg. */
5031 pre_insert_copy_insn (expr, insn);
5032 avail->copied_p = 1;
5033 }
5034 }
5035 }
5036 }
5037
5038 /* Delete redundant computations.
5039 Deletion is done by changing the insn to copy the `reaching_reg' of
5040 the expression into the result of the SET. It is left to later passes
5041 (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it.
5042
5043 Returns non-zero if a change is made. */
5044
5045 static int
5046 pre_delete ()
5047 {
5048 unsigned int i;
5049 int changed;
5050 struct expr *expr;
5051 struct occr *occr;
5052
5053 changed = 0;
5054 for (i = 0; i < expr_hash_table_size; i++)
5055 for (expr = expr_hash_table[i]; expr != NULL; expr = expr->next_same_hash)
5056 {
5057 int indx = expr->bitmap_index;
5058
5059 /* We only need to search antic_occr since we require
5060 ANTLOC != 0. */
5061
5062 for (occr = expr->antic_occr; occr != NULL; occr = occr->next)
5063 {
5064 rtx insn = occr->insn;
5065 rtx set;
5066 basic_block bb = BLOCK_FOR_INSN (insn);
5067
5068 if (TEST_BIT (pre_delete_map[bb->index], indx))
5069 {
5070 set = single_set (insn);
5071 if (! set)
5072 abort ();
5073
5074 /* Create a pseudo-reg to store the result of reaching
5075 expressions into. Get the mode for the new pseudo from
5076 the mode of the original destination pseudo. */
5077 if (expr->reaching_reg == NULL)
5078 expr->reaching_reg
5079 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
5080
5081 /* In theory this should never fail since we're creating
5082 a reg->reg copy.
5083
5084 However, on the x86 some of the movXX patterns actually
5085 contain clobbers of scratch regs. This may cause the
5086 insn created by validate_change to not match any pattern
5087 and thus cause validate_change to fail. */
5088 if (validate_change (insn, &SET_SRC (set),
5089 expr->reaching_reg, 0))
5090 {
5091 occr->deleted_p = 1;
5092 SET_BIT (pre_redundant_insns, INSN_CUID (insn));
5093 changed = 1;
5094 gcse_subst_count++;
5095 }
5096
5097 if (gcse_file)
5098 {
5099 fprintf (gcse_file,
5100 "PRE: redundant insn %d (expression %d) in ",
5101 INSN_UID (insn), indx);
5102 fprintf (gcse_file, "bb %d, reaching reg is %d\n",
5103 bb->index, REGNO (expr->reaching_reg));
5104 }
5105 }
5106 }
5107 }
5108
5109 return changed;
5110 }
5111
5112 /* Perform GCSE optimizations using PRE.
5113 This is called by one_pre_gcse_pass after all the dataflow analysis
5114 has been done.
5115
5116 This is based on the original Morel-Renvoise paper Fred Chow's thesis, and
5117 lazy code motion from Knoop, Ruthing and Steffen as described in Advanced
5118 Compiler Design and Implementation.
5119
5120 ??? A new pseudo reg is created to hold the reaching expression. The nice
5121 thing about the classical approach is that it would try to use an existing
5122 reg. If the register can't be adequately optimized [i.e. we introduce
5123 reload problems], one could add a pass here to propagate the new register
5124 through the block.
5125
5126 ??? We don't handle single sets in PARALLELs because we're [currently] not
5127 able to copy the rest of the parallel when we insert copies to create full
5128 redundancies from partial redundancies. However, there's no reason why we
5129 can't handle PARALLELs in the cases where there are no partial
5130 redundancies. */
5131
5132 static int
5133 pre_gcse ()
5134 {
5135 unsigned int i;
5136 int did_insert, changed;
5137 struct expr **index_map;
5138 struct expr *expr;
5139
5140 /* Compute a mapping from expression number (`bitmap_index') to
5141 hash table entry. */
5142
5143 index_map = (struct expr **) xcalloc (n_exprs, sizeof (struct expr *));
5144 for (i = 0; i < expr_hash_table_size; i++)
5145 for (expr = expr_hash_table[i]; expr != NULL; expr = expr->next_same_hash)
5146 index_map[expr->bitmap_index] = expr;
5147
5148 /* Reset bitmap used to track which insns are redundant. */
5149 pre_redundant_insns = sbitmap_alloc (max_cuid);
5150 sbitmap_zero (pre_redundant_insns);
5151
5152 /* Delete the redundant insns first so that
5153 - we know what register to use for the new insns and for the other
5154 ones with reaching expressions
5155 - we know which insns are redundant when we go to create copies */
5156
5157 changed = pre_delete ();
5158
5159 did_insert = pre_edge_insert (edge_list, index_map);
5160
5161 /* In other places with reaching expressions, copy the expression to the
5162 specially allocated pseudo-reg that reaches the redundant expr. */
5163 pre_insert_copies ();
5164 if (did_insert)
5165 {
5166 commit_edge_insertions ();
5167 changed = 1;
5168 }
5169
5170 free (index_map);
5171 free (pre_redundant_insns);
5172 return changed;
5173 }
5174
5175 /* Top level routine to perform one PRE GCSE pass.
5176
5177 Return non-zero if a change was made. */
5178
5179 static int
5180 one_pre_gcse_pass (pass)
5181 int pass;
5182 {
5183 int changed = 0;
5184
5185 gcse_subst_count = 0;
5186 gcse_create_count = 0;
5187
5188 alloc_expr_hash_table (max_cuid);
5189 add_noreturn_fake_exit_edges ();
5190 if (flag_gcse_lm)
5191 compute_ld_motion_mems ();
5192
5193 compute_expr_hash_table ();
5194 trim_ld_motion_mems ();
5195 if (gcse_file)
5196 dump_hash_table (gcse_file, "Expression", expr_hash_table,
5197 expr_hash_table_size, n_exprs);
5198
5199 if (n_exprs > 0)
5200 {
5201 alloc_pre_mem (n_basic_blocks, n_exprs);
5202 compute_pre_data ();
5203 changed |= pre_gcse ();
5204 free_edge_list (edge_list);
5205 free_pre_mem ();
5206 }
5207
5208 free_ldst_mems ();
5209 remove_fake_edges ();
5210 free_expr_hash_table ();
5211
5212 if (gcse_file)
5213 {
5214 fprintf (gcse_file, "\nPRE GCSE of %s, pass %d: %d bytes needed, ",
5215 current_function_name, pass, bytes_used);
5216 fprintf (gcse_file, "%d substs, %d insns created\n",
5217 gcse_subst_count, gcse_create_count);
5218 }
5219
5220 return changed;
5221 }
5222 \f
5223 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to INSN.
5224 If notes are added to an insn which references a CODE_LABEL, the
5225 LABEL_NUSES count is incremented. We have to add REG_LABEL notes,
5226 because the following loop optimization pass requires them. */
5227
5228 /* ??? This is very similar to the loop.c add_label_notes function. We
5229 could probably share code here. */
5230
5231 /* ??? If there was a jump optimization pass after gcse and before loop,
5232 then we would not need to do this here, because jump would add the
5233 necessary REG_LABEL notes. */
5234
5235 static void
5236 add_label_notes (x, insn)
5237 rtx x;
5238 rtx insn;
5239 {
5240 enum rtx_code code = GET_CODE (x);
5241 int i, j;
5242 const char *fmt;
5243
5244 if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x))
5245 {
5246 /* This code used to ignore labels that referred to dispatch tables to
5247 avoid flow generating (slighly) worse code.
5248
5249 We no longer ignore such label references (see LABEL_REF handling in
5250 mark_jump_label for additional information). */
5251
5252 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, XEXP (x, 0),
5253 REG_NOTES (insn));
5254 if (LABEL_P (XEXP (x, 0)))
5255 LABEL_NUSES (XEXP (x, 0))++;
5256 return;
5257 }
5258
5259 for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--)
5260 {
5261 if (fmt[i] == 'e')
5262 add_label_notes (XEXP (x, i), insn);
5263 else if (fmt[i] == 'E')
5264 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5265 add_label_notes (XVECEXP (x, i, j), insn);
5266 }
5267 }
5268
5269 /* Compute transparent outgoing information for each block.
5270
5271 An expression is transparent to an edge unless it is killed by
5272 the edge itself. This can only happen with abnormal control flow,
5273 when the edge is traversed through a call. This happens with
5274 non-local labels and exceptions.
5275
5276 This would not be necessary if we split the edge. While this is
5277 normally impossible for abnormal critical edges, with some effort
5278 it should be possible with exception handling, since we still have
5279 control over which handler should be invoked. But due to increased
5280 EH table sizes, this may not be worthwhile. */
5281
5282 static void
5283 compute_transpout ()
5284 {
5285 int bb;
5286 unsigned int i;
5287 struct expr *expr;
5288
5289 sbitmap_vector_ones (transpout, n_basic_blocks);
5290
5291 for (bb = 0; bb < n_basic_blocks; ++bb)
5292 {
5293 /* Note that flow inserted a nop a the end of basic blocks that
5294 end in call instructions for reasons other than abnormal
5295 control flow. */
5296 if (GET_CODE (BLOCK_END (bb)) != CALL_INSN)
5297 continue;
5298
5299 for (i = 0; i < expr_hash_table_size; i++)
5300 for (expr = expr_hash_table[i]; expr ; expr = expr->next_same_hash)
5301 if (GET_CODE (expr->expr) == MEM)
5302 {
5303 if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF
5304 && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0)))
5305 continue;
5306
5307 /* ??? Optimally, we would use interprocedural alias
5308 analysis to determine if this mem is actually killed
5309 by this call. */
5310 RESET_BIT (transpout[bb], expr->bitmap_index);
5311 }
5312 }
5313 }
5314
5315 /* Removal of useless null pointer checks */
5316
5317 /* Called via note_stores. X is set by SETTER. If X is a register we must
5318 invalidate nonnull_local and set nonnull_killed. DATA is really a
5319 `null_pointer_info *'.
5320
5321 We ignore hard registers. */
5322
5323 static void
5324 invalidate_nonnull_info (x, setter, data)
5325 rtx x;
5326 rtx setter ATTRIBUTE_UNUSED;
5327 void *data;
5328 {
5329 unsigned int regno;
5330 struct null_pointer_info *npi = (struct null_pointer_info *) data;
5331
5332 while (GET_CODE (x) == SUBREG)
5333 x = SUBREG_REG (x);
5334
5335 /* Ignore anything that is not a register or is a hard register. */
5336 if (GET_CODE (x) != REG
5337 || REGNO (x) < npi->min_reg
5338 || REGNO (x) >= npi->max_reg)
5339 return;
5340
5341 regno = REGNO (x) - npi->min_reg;
5342
5343 RESET_BIT (npi->nonnull_local[npi->current_block], regno);
5344 SET_BIT (npi->nonnull_killed[npi->current_block], regno);
5345 }
5346
5347 /* Do null-pointer check elimination for the registers indicated in
5348 NPI. NONNULL_AVIN and NONNULL_AVOUT are pre-allocated sbitmaps;
5349 they are not our responsibility to free. */
5350
5351 static void
5352 delete_null_pointer_checks_1 (delete_list, block_reg, nonnull_avin,
5353 nonnull_avout, npi)
5354 varray_type *delete_list;
5355 unsigned int *block_reg;
5356 sbitmap *nonnull_avin;
5357 sbitmap *nonnull_avout;
5358 struct null_pointer_info *npi;
5359 {
5360 int bb;
5361 int current_block;
5362 sbitmap *nonnull_local = npi->nonnull_local;
5363 sbitmap *nonnull_killed = npi->nonnull_killed;
5364
5365 /* Compute local properties, nonnull and killed. A register will have
5366 the nonnull property if at the end of the current block its value is
5367 known to be nonnull. The killed property indicates that somewhere in
5368 the block any information we had about the register is killed.
5369
5370 Note that a register can have both properties in a single block. That
5371 indicates that it's killed, then later in the block a new value is
5372 computed. */
5373 sbitmap_vector_zero (nonnull_local, n_basic_blocks);
5374 sbitmap_vector_zero (nonnull_killed, n_basic_blocks);
5375
5376 for (current_block = 0; current_block < n_basic_blocks; current_block++)
5377 {
5378 rtx insn, stop_insn;
5379
5380 /* Set the current block for invalidate_nonnull_info. */
5381 npi->current_block = current_block;
5382
5383 /* Scan each insn in the basic block looking for memory references and
5384 register sets. */
5385 stop_insn = NEXT_INSN (BLOCK_END (current_block));
5386 for (insn = BLOCK_HEAD (current_block);
5387 insn != stop_insn;
5388 insn = NEXT_INSN (insn))
5389 {
5390 rtx set;
5391 rtx reg;
5392
5393 /* Ignore anything that is not a normal insn. */
5394 if (! INSN_P (insn))
5395 continue;
5396
5397 /* Basically ignore anything that is not a simple SET. We do have
5398 to make sure to invalidate nonnull_local and set nonnull_killed
5399 for such insns though. */
5400 set = single_set (insn);
5401 if (!set)
5402 {
5403 note_stores (PATTERN (insn), invalidate_nonnull_info, npi);
5404 continue;
5405 }
5406
5407 /* See if we've got a useable memory load. We handle it first
5408 in case it uses its address register as a dest (which kills
5409 the nonnull property). */
5410 if (GET_CODE (SET_SRC (set)) == MEM
5411 && GET_CODE ((reg = XEXP (SET_SRC (set), 0))) == REG
5412 && REGNO (reg) >= npi->min_reg
5413 && REGNO (reg) < npi->max_reg)
5414 SET_BIT (nonnull_local[current_block],
5415 REGNO (reg) - npi->min_reg);
5416
5417 /* Now invalidate stuff clobbered by this insn. */
5418 note_stores (PATTERN (insn), invalidate_nonnull_info, npi);
5419
5420 /* And handle stores, we do these last since any sets in INSN can
5421 not kill the nonnull property if it is derived from a MEM
5422 appearing in a SET_DEST. */
5423 if (GET_CODE (SET_DEST (set)) == MEM
5424 && GET_CODE ((reg = XEXP (SET_DEST (set), 0))) == REG
5425 && REGNO (reg) >= npi->min_reg
5426 && REGNO (reg) < npi->max_reg)
5427 SET_BIT (nonnull_local[current_block],
5428 REGNO (reg) - npi->min_reg);
5429 }
5430 }
5431
5432 /* Now compute global properties based on the local properties. This
5433 is a classic global availablity algorithm. */
5434 compute_available (nonnull_local, nonnull_killed,
5435 nonnull_avout, nonnull_avin);
5436
5437 /* Now look at each bb and see if it ends with a compare of a value
5438 against zero. */
5439 for (bb = 0; bb < n_basic_blocks; bb++)
5440 {
5441 rtx last_insn = BLOCK_END (bb);
5442 rtx condition, earliest;
5443 int compare_and_branch;
5444
5445 /* Since MIN_REG is always at least FIRST_PSEUDO_REGISTER, and
5446 since BLOCK_REG[BB] is zero if this block did not end with a
5447 comparison against zero, this condition works. */
5448 if (block_reg[bb] < npi->min_reg
5449 || block_reg[bb] >= npi->max_reg)
5450 continue;
5451
5452 /* LAST_INSN is a conditional jump. Get its condition. */
5453 condition = get_condition (last_insn, &earliest);
5454
5455 /* If we can't determine the condition then skip. */
5456 if (! condition)
5457 continue;
5458
5459 /* Is the register known to have a nonzero value? */
5460 if (!TEST_BIT (nonnull_avout[bb], block_reg[bb] - npi->min_reg))
5461 continue;
5462
5463 /* Try to compute whether the compare/branch at the loop end is one or
5464 two instructions. */
5465 if (earliest == last_insn)
5466 compare_and_branch = 1;
5467 else if (earliest == prev_nonnote_insn (last_insn))
5468 compare_and_branch = 2;
5469 else
5470 continue;
5471
5472 /* We know the register in this comparison is nonnull at exit from
5473 this block. We can optimize this comparison. */
5474 if (GET_CODE (condition) == NE)
5475 {
5476 rtx new_jump;
5477
5478 new_jump = emit_jump_insn_before (gen_jump (JUMP_LABEL (last_insn)),
5479 last_insn);
5480 JUMP_LABEL (new_jump) = JUMP_LABEL (last_insn);
5481 LABEL_NUSES (JUMP_LABEL (new_jump))++;
5482 emit_barrier_after (new_jump);
5483 }
5484 if (!*delete_list)
5485 VARRAY_RTX_INIT (*delete_list, 10, "delete_list");
5486
5487 VARRAY_PUSH_RTX (*delete_list, last_insn);
5488 if (compare_and_branch == 2)
5489 VARRAY_PUSH_RTX (*delete_list, earliest);
5490
5491 /* Don't check this block again. (Note that BLOCK_END is
5492 invalid here; we deleted the last instruction in the
5493 block.) */
5494 block_reg[bb] = 0;
5495 }
5496 }
5497
5498 /* Find EQ/NE comparisons against zero which can be (indirectly) evaluated
5499 at compile time.
5500
5501 This is conceptually similar to global constant/copy propagation and
5502 classic global CSE (it even uses the same dataflow equations as cprop).
5503
5504 If a register is used as memory address with the form (mem (reg)), then we
5505 know that REG can not be zero at that point in the program. Any instruction
5506 which sets REG "kills" this property.
5507
5508 So, if every path leading to a conditional branch has an available memory
5509 reference of that form, then we know the register can not have the value
5510 zero at the conditional branch.
5511
5512 So we merely need to compute the local properies and propagate that data
5513 around the cfg, then optimize where possible.
5514
5515 We run this pass two times. Once before CSE, then again after CSE. This
5516 has proven to be the most profitable approach. It is rare for new
5517 optimization opportunities of this nature to appear after the first CSE
5518 pass.
5519
5520 This could probably be integrated with global cprop with a little work. */
5521
5522 void
5523 delete_null_pointer_checks (f)
5524 rtx f ATTRIBUTE_UNUSED;
5525 {
5526 sbitmap *nonnull_avin, *nonnull_avout;
5527 unsigned int *block_reg;
5528 varray_type delete_list = NULL;
5529 int bb;
5530 int reg;
5531 int regs_per_pass;
5532 int max_reg;
5533 unsigned int i;
5534 struct null_pointer_info npi;
5535
5536 /* If we have only a single block, then there's nothing to do. */
5537 if (n_basic_blocks <= 1)
5538 return;
5539
5540 /* Trying to perform global optimizations on flow graphs which have
5541 a high connectivity will take a long time and is unlikely to be
5542 particularly useful.
5543
5544 In normal circumstances a cfg should have about twice has many edges
5545 as blocks. But we do not want to punish small functions which have
5546 a couple switch statements. So we require a relatively large number
5547 of basic blocks and the ratio of edges to blocks to be high. */
5548 if (n_basic_blocks > 1000 && n_edges / n_basic_blocks >= 20)
5549 return;
5550
5551 /* We need four bitmaps, each with a bit for each register in each
5552 basic block. */
5553 max_reg = max_reg_num ();
5554 regs_per_pass = get_bitmap_width (4, n_basic_blocks, max_reg);
5555
5556 /* Allocate bitmaps to hold local and global properties. */
5557 npi.nonnull_local = sbitmap_vector_alloc (n_basic_blocks, regs_per_pass);
5558 npi.nonnull_killed = sbitmap_vector_alloc (n_basic_blocks, regs_per_pass);
5559 nonnull_avin = sbitmap_vector_alloc (n_basic_blocks, regs_per_pass);
5560 nonnull_avout = sbitmap_vector_alloc (n_basic_blocks, regs_per_pass);
5561
5562 /* Go through the basic blocks, seeing whether or not each block
5563 ends with a conditional branch whose condition is a comparison
5564 against zero. Record the register compared in BLOCK_REG. */
5565 block_reg = (unsigned int *) xcalloc (n_basic_blocks, sizeof (int));
5566 for (bb = 0; bb < n_basic_blocks; bb++)
5567 {
5568 rtx last_insn = BLOCK_END (bb);
5569 rtx condition, earliest, reg;
5570
5571 /* We only want conditional branches. */
5572 if (GET_CODE (last_insn) != JUMP_INSN
5573 || !any_condjump_p (last_insn)
5574 || !onlyjump_p (last_insn))
5575 continue;
5576
5577 /* LAST_INSN is a conditional jump. Get its condition. */
5578 condition = get_condition (last_insn, &earliest);
5579
5580 /* If we were unable to get the condition, or it is not a equality
5581 comparison against zero then there's nothing we can do. */
5582 if (!condition
5583 || (GET_CODE (condition) != NE && GET_CODE (condition) != EQ)
5584 || GET_CODE (XEXP (condition, 1)) != CONST_INT
5585 || (XEXP (condition, 1)
5586 != CONST0_RTX (GET_MODE (XEXP (condition, 0)))))
5587 continue;
5588
5589 /* We must be checking a register against zero. */
5590 reg = XEXP (condition, 0);
5591 if (GET_CODE (reg) != REG)
5592 continue;
5593
5594 block_reg[bb] = REGNO (reg);
5595 }
5596
5597 /* Go through the algorithm for each block of registers. */
5598 for (reg = FIRST_PSEUDO_REGISTER; reg < max_reg; reg += regs_per_pass)
5599 {
5600 npi.min_reg = reg;
5601 npi.max_reg = MIN (reg + regs_per_pass, max_reg);
5602 delete_null_pointer_checks_1 (&delete_list, block_reg, nonnull_avin,
5603 nonnull_avout, &npi);
5604 }
5605
5606 /* Now delete the instructions all at once. This breaks the CFG. */
5607 if (delete_list)
5608 {
5609 for (i = 0; i < VARRAY_ACTIVE_SIZE (delete_list); i++)
5610 delete_insn (VARRAY_RTX (delete_list, i));
5611 VARRAY_FREE (delete_list);
5612 }
5613
5614 /* Free the table of registers compared at the end of every block. */
5615 free (block_reg);
5616
5617 /* Free bitmaps. */
5618 free (npi.nonnull_local);
5619 free (npi.nonnull_killed);
5620 free (nonnull_avin);
5621 free (nonnull_avout);
5622 }
5623
5624 /* Code Hoisting variables and subroutines. */
5625
5626 /* Very busy expressions. */
5627 static sbitmap *hoist_vbein;
5628 static sbitmap *hoist_vbeout;
5629
5630 /* Hoistable expressions. */
5631 static sbitmap *hoist_exprs;
5632
5633 /* Dominator bitmaps. */
5634 static sbitmap *dominators;
5635
5636 /* ??? We could compute post dominators and run this algorithm in
5637 reverse to to perform tail merging, doing so would probably be
5638 more effective than the tail merging code in jump.c.
5639
5640 It's unclear if tail merging could be run in parallel with
5641 code hoisting. It would be nice. */
5642
5643 /* Allocate vars used for code hoisting analysis. */
5644
5645 static void
5646 alloc_code_hoist_mem (n_blocks, n_exprs)
5647 int n_blocks, n_exprs;
5648 {
5649 antloc = sbitmap_vector_alloc (n_blocks, n_exprs);
5650 transp = sbitmap_vector_alloc (n_blocks, n_exprs);
5651 comp = sbitmap_vector_alloc (n_blocks, n_exprs);
5652
5653 hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs);
5654 hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs);
5655 hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs);
5656 transpout = sbitmap_vector_alloc (n_blocks, n_exprs);
5657
5658 dominators = sbitmap_vector_alloc (n_blocks, n_blocks);
5659 }
5660
5661 /* Free vars used for code hoisting analysis. */
5662
5663 static void
5664 free_code_hoist_mem ()
5665 {
5666 free (antloc);
5667 free (transp);
5668 free (comp);
5669
5670 free (hoist_vbein);
5671 free (hoist_vbeout);
5672 free (hoist_exprs);
5673 free (transpout);
5674
5675 free (dominators);
5676 }
5677
5678 /* Compute the very busy expressions at entry/exit from each block.
5679
5680 An expression is very busy if all paths from a given point
5681 compute the expression. */
5682
5683 static void
5684 compute_code_hoist_vbeinout ()
5685 {
5686 int bb, changed, passes;
5687
5688 sbitmap_vector_zero (hoist_vbeout, n_basic_blocks);
5689 sbitmap_vector_zero (hoist_vbein, n_basic_blocks);
5690
5691 passes = 0;
5692 changed = 1;
5693
5694 while (changed)
5695 {
5696 changed = 0;
5697
5698 /* We scan the blocks in the reverse order to speed up
5699 the convergence. */
5700 for (bb = n_basic_blocks - 1; bb >= 0; bb--)
5701 {
5702 changed |= sbitmap_a_or_b_and_c (hoist_vbein[bb], antloc[bb],
5703 hoist_vbeout[bb], transp[bb]);
5704 if (bb != n_basic_blocks - 1)
5705 sbitmap_intersection_of_succs (hoist_vbeout[bb], hoist_vbein, bb);
5706 }
5707
5708 passes++;
5709 }
5710
5711 if (gcse_file)
5712 fprintf (gcse_file, "hoisting vbeinout computation: %d passes\n", passes);
5713 }
5714
5715 /* Top level routine to do the dataflow analysis needed by code hoisting. */
5716
5717 static void
5718 compute_code_hoist_data ()
5719 {
5720 compute_local_properties (transp, comp, antloc, 0);
5721 compute_transpout ();
5722 compute_code_hoist_vbeinout ();
5723 calculate_dominance_info (NULL, dominators, CDI_DOMINATORS);
5724 if (gcse_file)
5725 fprintf (gcse_file, "\n");
5726 }
5727
5728 /* Determine if the expression identified by EXPR_INDEX would
5729 reach BB unimpared if it was placed at the end of EXPR_BB.
5730
5731 It's unclear exactly what Muchnick meant by "unimpared". It seems
5732 to me that the expression must either be computed or transparent in
5733 *every* block in the path(s) from EXPR_BB to BB. Any other definition
5734 would allow the expression to be hoisted out of loops, even if
5735 the expression wasn't a loop invariant.
5736
5737 Contrast this to reachability for PRE where an expression is
5738 considered reachable if *any* path reaches instead of *all*
5739 paths. */
5740
5741 static int
5742 hoist_expr_reaches_here_p (expr_bb, expr_index, bb, visited)
5743 basic_block expr_bb;
5744 int expr_index;
5745 basic_block bb;
5746 char *visited;
5747 {
5748 edge pred;
5749 int visited_allocated_locally = 0;
5750
5751
5752 if (visited == NULL)
5753 {
5754 visited_allocated_locally = 1;
5755 visited = xcalloc (n_basic_blocks, 1);
5756 }
5757
5758 for (pred = bb->pred; pred != NULL; pred = pred->pred_next)
5759 {
5760 basic_block pred_bb = pred->src;
5761
5762 if (pred->src == ENTRY_BLOCK_PTR)
5763 break;
5764 else if (visited[pred_bb->index])
5765 continue;
5766
5767 /* Does this predecessor generate this expression? */
5768 else if (TEST_BIT (comp[pred_bb->index], expr_index))
5769 break;
5770 else if (! TEST_BIT (transp[pred_bb->index], expr_index))
5771 break;
5772
5773 /* Not killed. */
5774 else
5775 {
5776 visited[pred_bb->index] = 1;
5777 if (! hoist_expr_reaches_here_p (expr_bb, expr_index,
5778 pred_bb, visited))
5779 break;
5780 }
5781 }
5782 if (visited_allocated_locally)
5783 free (visited);
5784
5785 return (pred == NULL);
5786 }
5787 \f
5788 /* Actually perform code hoisting. */
5789
5790 static void
5791 hoist_code ()
5792 {
5793 int bb, dominated;
5794 unsigned int i;
5795 struct expr **index_map;
5796 struct expr *expr;
5797
5798 sbitmap_vector_zero (hoist_exprs, n_basic_blocks);
5799
5800 /* Compute a mapping from expression number (`bitmap_index') to
5801 hash table entry. */
5802
5803 index_map = (struct expr **) xcalloc (n_exprs, sizeof (struct expr *));
5804 for (i = 0; i < expr_hash_table_size; i++)
5805 for (expr = expr_hash_table[i]; expr != NULL; expr = expr->next_same_hash)
5806 index_map[expr->bitmap_index] = expr;
5807
5808 /* Walk over each basic block looking for potentially hoistable
5809 expressions, nothing gets hoisted from the entry block. */
5810 for (bb = 0; bb < n_basic_blocks; bb++)
5811 {
5812 int found = 0;
5813 int insn_inserted_p;
5814
5815 /* Examine each expression that is very busy at the exit of this
5816 block. These are the potentially hoistable expressions. */
5817 for (i = 0; i < hoist_vbeout[bb]->n_bits; i++)
5818 {
5819 int hoistable = 0;
5820
5821 if (TEST_BIT (hoist_vbeout[bb], i) && TEST_BIT (transpout[bb], i))
5822 {
5823 /* We've found a potentially hoistable expression, now
5824 we look at every block BB dominates to see if it
5825 computes the expression. */
5826 for (dominated = 0; dominated < n_basic_blocks; dominated++)
5827 {
5828 /* Ignore self dominance. */
5829 if (bb == dominated
5830 || ! TEST_BIT (dominators[dominated], bb))
5831 continue;
5832
5833 /* We've found a dominated block, now see if it computes
5834 the busy expression and whether or not moving that
5835 expression to the "beginning" of that block is safe. */
5836 if (!TEST_BIT (antloc[dominated], i))
5837 continue;
5838
5839 /* Note if the expression would reach the dominated block
5840 unimpared if it was placed at the end of BB.
5841
5842 Keep track of how many times this expression is hoistable
5843 from a dominated block into BB. */
5844 if (hoist_expr_reaches_here_p (BASIC_BLOCK (bb), i,
5845 BASIC_BLOCK (dominated), NULL))
5846 hoistable++;
5847 }
5848
5849 /* If we found more than one hoistable occurence of this
5850 expression, then note it in the bitmap of expressions to
5851 hoist. It makes no sense to hoist things which are computed
5852 in only one BB, and doing so tends to pessimize register
5853 allocation. One could increase this value to try harder
5854 to avoid any possible code expansion due to register
5855 allocation issues; however experiments have shown that
5856 the vast majority of hoistable expressions are only movable
5857 from two successors, so raising this threshhold is likely
5858 to nullify any benefit we get from code hoisting. */
5859 if (hoistable > 1)
5860 {
5861 SET_BIT (hoist_exprs[bb], i);
5862 found = 1;
5863 }
5864 }
5865 }
5866
5867 /* If we found nothing to hoist, then quit now. */
5868 if (! found)
5869 continue;
5870
5871 /* Loop over all the hoistable expressions. */
5872 for (i = 0; i < hoist_exprs[bb]->n_bits; i++)
5873 {
5874 /* We want to insert the expression into BB only once, so
5875 note when we've inserted it. */
5876 insn_inserted_p = 0;
5877
5878 /* These tests should be the same as the tests above. */
5879 if (TEST_BIT (hoist_vbeout[bb], i))
5880 {
5881 /* We've found a potentially hoistable expression, now
5882 we look at every block BB dominates to see if it
5883 computes the expression. */
5884 for (dominated = 0; dominated < n_basic_blocks; dominated++)
5885 {
5886 /* Ignore self dominance. */
5887 if (bb == dominated
5888 || ! TEST_BIT (dominators[dominated], bb))
5889 continue;
5890
5891 /* We've found a dominated block, now see if it computes
5892 the busy expression and whether or not moving that
5893 expression to the "beginning" of that block is safe. */
5894 if (!TEST_BIT (antloc[dominated], i))
5895 continue;
5896
5897 /* The expression is computed in the dominated block and
5898 it would be safe to compute it at the start of the
5899 dominated block. Now we have to determine if the
5900 expresion would reach the dominated block if it was
5901 placed at the end of BB. */
5902 if (hoist_expr_reaches_here_p (BASIC_BLOCK (bb), i,
5903 BASIC_BLOCK (dominated), NULL))
5904 {
5905 struct expr *expr = index_map[i];
5906 struct occr *occr = expr->antic_occr;
5907 rtx insn;
5908 rtx set;
5909
5910 /* Find the right occurence of this expression. */
5911 while (BLOCK_NUM (occr->insn) != dominated && occr)
5912 occr = occr->next;
5913
5914 /* Should never happen. */
5915 if (!occr)
5916 abort ();
5917
5918 insn = occr->insn;
5919
5920 set = single_set (insn);
5921 if (! set)
5922 abort ();
5923
5924 /* Create a pseudo-reg to store the result of reaching
5925 expressions into. Get the mode for the new pseudo
5926 from the mode of the original destination pseudo. */
5927 if (expr->reaching_reg == NULL)
5928 expr->reaching_reg
5929 = gen_reg_rtx (GET_MODE (SET_DEST (set)));
5930
5931 /* In theory this should never fail since we're creating
5932 a reg->reg copy.
5933
5934 However, on the x86 some of the movXX patterns
5935 actually contain clobbers of scratch regs. This may
5936 cause the insn created by validate_change to not
5937 match any pattern and thus cause validate_change to
5938 fail. */
5939 if (validate_change (insn, &SET_SRC (set),
5940 expr->reaching_reg, 0))
5941 {
5942 occr->deleted_p = 1;
5943 if (!insn_inserted_p)
5944 {
5945 insert_insn_end_bb (index_map[i],
5946 BASIC_BLOCK (bb), 0);
5947 insn_inserted_p = 1;
5948 }
5949 }
5950 }
5951 }
5952 }
5953 }
5954 }
5955
5956 free (index_map);
5957 }
5958
5959 /* Top level routine to perform one code hoisting (aka unification) pass
5960
5961 Return non-zero if a change was made. */
5962
5963 static int
5964 one_code_hoisting_pass ()
5965 {
5966 int changed = 0;
5967
5968 alloc_expr_hash_table (max_cuid);
5969 compute_expr_hash_table ();
5970 if (gcse_file)
5971 dump_hash_table (gcse_file, "Code Hosting Expressions", expr_hash_table,
5972 expr_hash_table_size, n_exprs);
5973
5974 if (n_exprs > 0)
5975 {
5976 alloc_code_hoist_mem (n_basic_blocks, n_exprs);
5977 compute_code_hoist_data ();
5978 hoist_code ();
5979 free_code_hoist_mem ();
5980 }
5981
5982 free_expr_hash_table ();
5983
5984 return changed;
5985 }
5986 \f
5987 /* Here we provide the things required to do store motion towards
5988 the exit. In order for this to be effective, gcse also needed to
5989 be taught how to move a load when it is kill only by a store to itself.
5990
5991 int i;
5992 float a[10];
5993
5994 void foo(float scale)
5995 {
5996 for (i=0; i<10; i++)
5997 a[i] *= scale;
5998 }
5999
6000 'i' is both loaded and stored to in the loop. Normally, gcse cannot move
6001 the load out since its live around the loop, and stored at the bottom
6002 of the loop.
6003
6004 The 'Load Motion' referred to and implemented in this file is
6005 an enhancement to gcse which when using edge based lcm, recognizes
6006 this situation and allows gcse to move the load out of the loop.
6007
6008 Once gcse has hoisted the load, store motion can then push this
6009 load towards the exit, and we end up with no loads or stores of 'i'
6010 in the loop. */
6011
6012 /* This will search the ldst list for a matching expresion. If it
6013 doesn't find one, we create one and initialize it. */
6014
6015 static struct ls_expr *
6016 ldst_entry (x)
6017 rtx x;
6018 {
6019 struct ls_expr * ptr;
6020
6021 for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr))
6022 if (expr_equiv_p (ptr->pattern, x))
6023 break;
6024
6025 if (!ptr)
6026 {
6027 ptr = (struct ls_expr *) xmalloc (sizeof (struct ls_expr));
6028
6029 ptr->next = pre_ldst_mems;
6030 ptr->expr = NULL;
6031 ptr->pattern = x;
6032 ptr->loads = NULL_RTX;
6033 ptr->stores = NULL_RTX;
6034 ptr->reaching_reg = NULL_RTX;
6035 ptr->invalid = 0;
6036 ptr->index = 0;
6037 ptr->hash_index = 0;
6038 pre_ldst_mems = ptr;
6039 }
6040
6041 return ptr;
6042 }
6043
6044 /* Free up an individual ldst entry. */
6045
6046 static void
6047 free_ldst_entry (ptr)
6048 struct ls_expr * ptr;
6049 {
6050 free_INSN_LIST_list (& ptr->loads);
6051 free_INSN_LIST_list (& ptr->stores);
6052
6053 free (ptr);
6054 }
6055
6056 /* Free up all memory associated with the ldst list. */
6057
6058 static void
6059 free_ldst_mems ()
6060 {
6061 while (pre_ldst_mems)
6062 {
6063 struct ls_expr * tmp = pre_ldst_mems;
6064
6065 pre_ldst_mems = pre_ldst_mems->next;
6066
6067 free_ldst_entry (tmp);
6068 }
6069
6070 pre_ldst_mems = NULL;
6071 }
6072
6073 /* Dump debugging info about the ldst list. */
6074
6075 static void
6076 print_ldst_list (file)
6077 FILE * file;
6078 {
6079 struct ls_expr * ptr;
6080
6081 fprintf (file, "LDST list: \n");
6082
6083 for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr))
6084 {
6085 fprintf (file, " Pattern (%3d): ", ptr->index);
6086
6087 print_rtl (file, ptr->pattern);
6088
6089 fprintf (file, "\n Loads : ");
6090
6091 if (ptr->loads)
6092 print_rtl (file, ptr->loads);
6093 else
6094 fprintf (file, "(nil)");
6095
6096 fprintf (file, "\n Stores : ");
6097
6098 if (ptr->stores)
6099 print_rtl (file, ptr->stores);
6100 else
6101 fprintf (file, "(nil)");
6102
6103 fprintf (file, "\n\n");
6104 }
6105
6106 fprintf (file, "\n");
6107 }
6108
6109 /* Returns 1 if X is in the list of ldst only expressions. */
6110
6111 static struct ls_expr *
6112 find_rtx_in_ldst (x)
6113 rtx x;
6114 {
6115 struct ls_expr * ptr;
6116
6117 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
6118 if (expr_equiv_p (ptr->pattern, x) && ! ptr->invalid)
6119 return ptr;
6120
6121 return NULL;
6122 }
6123
6124 /* Assign each element of the list of mems a monotonically increasing value. */
6125
6126 static int
6127 enumerate_ldsts ()
6128 {
6129 struct ls_expr * ptr;
6130 int n = 0;
6131
6132 for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next)
6133 ptr->index = n++;
6134
6135 return n;
6136 }
6137
6138 /* Return first item in the list. */
6139
6140 static inline struct ls_expr *
6141 first_ls_expr ()
6142 {
6143 return pre_ldst_mems;
6144 }
6145
6146 /* Return the next item in ther list after the specified one. */
6147
6148 static inline struct ls_expr *
6149 next_ls_expr (ptr)
6150 struct ls_expr * ptr;
6151 {
6152 return ptr->next;
6153 }
6154 \f
6155 /* Load Motion for loads which only kill themselves. */
6156
6157 /* Return true if x is a simple MEM operation, with no registers or
6158 side effects. These are the types of loads we consider for the
6159 ld_motion list, otherwise we let the usual aliasing take care of it. */
6160
6161 static int
6162 simple_mem (x)
6163 rtx x;
6164 {
6165 if (GET_CODE (x) != MEM)
6166 return 0;
6167
6168 if (MEM_VOLATILE_P (x))
6169 return 0;
6170
6171 if (GET_MODE (x) == BLKmode)
6172 return 0;
6173
6174 if (!rtx_varies_p (XEXP (x, 0), 0))
6175 return 1;
6176
6177 return 0;
6178 }
6179
6180 /* Make sure there isn't a buried reference in this pattern anywhere.
6181 If there is, invalidate the entry for it since we're not capable
6182 of fixing it up just yet.. We have to be sure we know about ALL
6183 loads since the aliasing code will allow all entries in the
6184 ld_motion list to not-alias itself. If we miss a load, we will get
6185 the wrong value since gcse might common it and we won't know to
6186 fix it up. */
6187
6188 static void
6189 invalidate_any_buried_refs (x)
6190 rtx x;
6191 {
6192 const char * fmt;
6193 int i,j;
6194 struct ls_expr * ptr;
6195
6196 /* Invalidate it in the list. */
6197 if (GET_CODE (x) == MEM && simple_mem (x))
6198 {
6199 ptr = ldst_entry (x);
6200 ptr->invalid = 1;
6201 }
6202
6203 /* Recursively process the insn. */
6204 fmt = GET_RTX_FORMAT (GET_CODE (x));
6205
6206 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6207 {
6208 if (fmt[i] == 'e')
6209 invalidate_any_buried_refs (XEXP (x, i));
6210 else if (fmt[i] == 'E')
6211 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6212 invalidate_any_buried_refs (XVECEXP (x, i, j));
6213 }
6214 }
6215
6216 /* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple
6217 being defined as MEM loads and stores to symbols, with no
6218 side effects and no registers in the expression. If there are any
6219 uses/defs which dont match this criteria, it is invalidated and
6220 trimmed out later. */
6221
6222 static void
6223 compute_ld_motion_mems ()
6224 {
6225 struct ls_expr * ptr;
6226 int bb;
6227 rtx insn;
6228
6229 pre_ldst_mems = NULL;
6230
6231 for (bb = 0; bb < n_basic_blocks; bb++)
6232 {
6233 for (insn = BLOCK_HEAD (bb);
6234 insn && insn != NEXT_INSN (BLOCK_END (bb));
6235 insn = NEXT_INSN (insn))
6236 {
6237 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
6238 {
6239 if (GET_CODE (PATTERN (insn)) == SET)
6240 {
6241 rtx src = SET_SRC (PATTERN (insn));
6242 rtx dest = SET_DEST (PATTERN (insn));
6243
6244 /* Check for a simple LOAD... */
6245 if (GET_CODE (src) == MEM && simple_mem (src))
6246 {
6247 ptr = ldst_entry (src);
6248 if (GET_CODE (dest) == REG)
6249 ptr->loads = alloc_INSN_LIST (insn, ptr->loads);
6250 else
6251 ptr->invalid = 1;
6252 }
6253 else
6254 {
6255 /* Make sure there isn't a buried load somewhere. */
6256 invalidate_any_buried_refs (src);
6257 }
6258
6259 /* Check for stores. Don't worry about aliased ones, they
6260 will block any movement we might do later. We only care
6261 about this exact pattern since those are the only
6262 circumstance that we will ignore the aliasing info. */
6263 if (GET_CODE (dest) == MEM && simple_mem (dest))
6264 {
6265 ptr = ldst_entry (dest);
6266
6267 if (GET_CODE (src) != MEM)
6268 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
6269 else
6270 ptr->invalid = 1;
6271 }
6272 }
6273 else
6274 invalidate_any_buried_refs (PATTERN (insn));
6275 }
6276 }
6277 }
6278 }
6279
6280 /* Remove any references that have been either invalidated or are not in the
6281 expression list for pre gcse. */
6282
6283 static void
6284 trim_ld_motion_mems ()
6285 {
6286 struct ls_expr * last = NULL;
6287 struct ls_expr * ptr = first_ls_expr ();
6288
6289 while (ptr != NULL)
6290 {
6291 int del = ptr->invalid;
6292 struct expr * expr = NULL;
6293
6294 /* Delete if entry has been made invalid. */
6295 if (!del)
6296 {
6297 unsigned int i;
6298
6299 del = 1;
6300 /* Delete if we cannot find this mem in the expression list. */
6301 for (i = 0; i < expr_hash_table_size && del; i++)
6302 {
6303 for (expr = expr_hash_table[i];
6304 expr != NULL;
6305 expr = expr->next_same_hash)
6306 if (expr_equiv_p (expr->expr, ptr->pattern))
6307 {
6308 del = 0;
6309 break;
6310 }
6311 }
6312 }
6313
6314 if (del)
6315 {
6316 if (last != NULL)
6317 {
6318 last->next = ptr->next;
6319 free_ldst_entry (ptr);
6320 ptr = last->next;
6321 }
6322 else
6323 {
6324 pre_ldst_mems = pre_ldst_mems->next;
6325 free_ldst_entry (ptr);
6326 ptr = pre_ldst_mems;
6327 }
6328 }
6329 else
6330 {
6331 /* Set the expression field if we are keeping it. */
6332 last = ptr;
6333 ptr->expr = expr;
6334 ptr = ptr->next;
6335 }
6336 }
6337
6338 /* Show the world what we've found. */
6339 if (gcse_file && pre_ldst_mems != NULL)
6340 print_ldst_list (gcse_file);
6341 }
6342
6343 /* This routine will take an expression which we are replacing with
6344 a reaching register, and update any stores that are needed if
6345 that expression is in the ld_motion list. Stores are updated by
6346 copying their SRC to the reaching register, and then storeing
6347 the reaching register into the store location. These keeps the
6348 correct value in the reaching register for the loads. */
6349
6350 static void
6351 update_ld_motion_stores (expr)
6352 struct expr * expr;
6353 {
6354 struct ls_expr * mem_ptr;
6355
6356 if ((mem_ptr = find_rtx_in_ldst (expr->expr)))
6357 {
6358 /* We can try to find just the REACHED stores, but is shouldn't
6359 matter to set the reaching reg everywhere... some might be
6360 dead and should be eliminated later. */
6361
6362 /* We replace SET mem = expr with
6363 SET reg = expr
6364 SET mem = reg , where reg is the
6365 reaching reg used in the load. */
6366 rtx list = mem_ptr->stores;
6367
6368 for ( ; list != NULL_RTX; list = XEXP (list, 1))
6369 {
6370 rtx insn = XEXP (list, 0);
6371 rtx pat = PATTERN (insn);
6372 rtx src = SET_SRC (pat);
6373 rtx reg = expr->reaching_reg;
6374 rtx copy, new;
6375
6376 /* If we've already copied it, continue. */
6377 if (expr->reaching_reg == src)
6378 continue;
6379
6380 if (gcse_file)
6381 {
6382 fprintf (gcse_file, "PRE: store updated with reaching reg ");
6383 print_rtl (gcse_file, expr->reaching_reg);
6384 fprintf (gcse_file, ":\n ");
6385 print_inline_rtx (gcse_file, insn, 8);
6386 fprintf (gcse_file, "\n");
6387 }
6388
6389 copy = gen_move_insn ( reg, SET_SRC (pat));
6390 new = emit_insn_before (copy, insn);
6391 record_one_set (REGNO (reg), new);
6392 set_block_for_new_insns (new, BLOCK_FOR_INSN (insn));
6393 SET_SRC (pat) = reg;
6394
6395 /* un-recognize this pattern since it's probably different now. */
6396 INSN_CODE (insn) = -1;
6397 gcse_create_count++;
6398 }
6399 }
6400 }
6401 \f
6402 /* Store motion code. */
6403
6404 /* This is used to communicate the target bitvector we want to use in the
6405 reg_set_info routine when called via the note_stores mechanism. */
6406 static sbitmap * regvec;
6407
6408 /* Used in computing the reverse edge graph bit vectors. */
6409 static sbitmap * st_antloc;
6410
6411 /* Global holding the number of store expressions we are dealing with. */
6412 static int num_stores;
6413
6414 /* Checks to set if we need to mark a register set. Called from note_stores. */
6415
6416 static void
6417 reg_set_info (dest, setter, data)
6418 rtx dest, setter ATTRIBUTE_UNUSED;
6419 void * data ATTRIBUTE_UNUSED;
6420 {
6421 if (GET_CODE (dest) == SUBREG)
6422 dest = SUBREG_REG (dest);
6423
6424 if (GET_CODE (dest) == REG)
6425 SET_BIT (*regvec, REGNO (dest));
6426 }
6427
6428 /* Return non-zero if the register operands of expression X are killed
6429 anywhere in basic block BB. */
6430
6431 static int
6432 store_ops_ok (x, bb)
6433 rtx x;
6434 basic_block bb;
6435 {
6436 int i;
6437 enum rtx_code code;
6438 const char * fmt;
6439
6440 /* Repeat is used to turn tail-recursion into iteration. */
6441 repeat:
6442
6443 if (x == 0)
6444 return 1;
6445
6446 code = GET_CODE (x);
6447 switch (code)
6448 {
6449 case REG:
6450 /* If a reg has changed after us in this
6451 block, the operand has been killed. */
6452 return TEST_BIT (reg_set_in_block[bb->index], REGNO (x));
6453
6454 case MEM:
6455 x = XEXP (x, 0);
6456 goto repeat;
6457
6458 case PRE_DEC:
6459 case PRE_INC:
6460 case POST_DEC:
6461 case POST_INC:
6462 return 0;
6463
6464 case PC:
6465 case CC0: /*FIXME*/
6466 case CONST:
6467 case CONST_INT:
6468 case CONST_DOUBLE:
6469 case SYMBOL_REF:
6470 case LABEL_REF:
6471 case ADDR_VEC:
6472 case ADDR_DIFF_VEC:
6473 return 1;
6474
6475 default:
6476 break;
6477 }
6478
6479 i = GET_RTX_LENGTH (code) - 1;
6480 fmt = GET_RTX_FORMAT (code);
6481
6482 for (; i >= 0; i--)
6483 {
6484 if (fmt[i] == 'e')
6485 {
6486 rtx tem = XEXP (x, i);
6487
6488 /* If we are about to do the last recursive call
6489 needed at this level, change it into iteration.
6490 This function is called enough to be worth it. */
6491 if (i == 0)
6492 {
6493 x = tem;
6494 goto repeat;
6495 }
6496
6497 if (! store_ops_ok (tem, bb))
6498 return 0;
6499 }
6500 else if (fmt[i] == 'E')
6501 {
6502 int j;
6503
6504 for (j = 0; j < XVECLEN (x, i); j++)
6505 {
6506 if (! store_ops_ok (XVECEXP (x, i, j), bb))
6507 return 0;
6508 }
6509 }
6510 }
6511
6512 return 1;
6513 }
6514
6515 /* Determine whether insn is MEM store pattern that we will consider moving. */
6516
6517 static void
6518 find_moveable_store (insn)
6519 rtx insn;
6520 {
6521 struct ls_expr * ptr;
6522 rtx dest = PATTERN (insn);
6523
6524 if (GET_CODE (dest) != SET)
6525 return;
6526
6527 dest = SET_DEST (dest);
6528
6529 if (GET_CODE (dest) != MEM || MEM_VOLATILE_P (dest)
6530 || GET_MODE (dest) == BLKmode)
6531 return;
6532
6533 if (GET_CODE (XEXP (dest, 0)) != SYMBOL_REF)
6534 return;
6535
6536 if (rtx_varies_p (XEXP (dest, 0), 0))
6537 return;
6538
6539 ptr = ldst_entry (dest);
6540 ptr->stores = alloc_INSN_LIST (insn, ptr->stores);
6541 }
6542
6543 /* Perform store motion. Much like gcse, except we move expressions the
6544 other way by looking at the flowgraph in reverse. */
6545
6546 static int
6547 compute_store_table ()
6548 {
6549 int bb, ret;
6550 unsigned regno;
6551 rtx insn, pat;
6552
6553 max_gcse_regno = max_reg_num ();
6554
6555 reg_set_in_block = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks,
6556 max_gcse_regno);
6557 sbitmap_vector_zero (reg_set_in_block, n_basic_blocks);
6558 pre_ldst_mems = 0;
6559
6560 /* Find all the stores we care about. */
6561 for (bb = 0; bb < n_basic_blocks; bb++)
6562 {
6563 regvec = & (reg_set_in_block[bb]);
6564 for (insn = BLOCK_END (bb);
6565 insn && insn != PREV_INSN (BLOCK_HEAD (bb));
6566 insn = PREV_INSN (insn))
6567 {
6568 #ifdef NON_SAVING_SETJMP
6569 if (NON_SAVING_SETJMP && GET_CODE (insn) == NOTE
6570 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
6571 {
6572 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
6573 SET_BIT (reg_set_in_block[bb], regno);
6574 continue;
6575 }
6576 #endif
6577 /* Ignore anything that is not a normal insn. */
6578 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
6579 continue;
6580
6581 if (GET_CODE (insn) == CALL_INSN)
6582 {
6583 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
6584 if ((call_used_regs[regno]
6585 && regno != STACK_POINTER_REGNUM
6586 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6587 && regno != HARD_FRAME_POINTER_REGNUM
6588 #endif
6589 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
6590 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
6591 #endif
6592 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
6593 && ! (regno == PIC_OFFSET_TABLE_REGNUM && flag_pic)
6594 #endif
6595
6596 && regno != FRAME_POINTER_REGNUM)
6597 || global_regs[regno])
6598 SET_BIT (reg_set_in_block[bb], regno);
6599 }
6600
6601 pat = PATTERN (insn);
6602 note_stores (pat, reg_set_info, NULL);
6603
6604 /* Now that we've marked regs, look for stores. */
6605 if (GET_CODE (pat) == SET)
6606 find_moveable_store (insn);
6607 }
6608 }
6609
6610 ret = enumerate_ldsts ();
6611
6612 if (gcse_file)
6613 {
6614 fprintf (gcse_file, "Store Motion Expressions.\n");
6615 print_ldst_list (gcse_file);
6616 }
6617
6618 return ret;
6619 }
6620
6621 /* Check to see if the load X is aliased with STORE_PATTERN. */
6622
6623 static int
6624 load_kills_store (x, store_pattern)
6625 rtx x, store_pattern;
6626 {
6627 if (true_dependence (x, GET_MODE (x), store_pattern, rtx_addr_varies_p))
6628 return 1;
6629 return 0;
6630 }
6631
6632 /* Go through the entire insn X, looking for any loads which might alias
6633 STORE_PATTERN. Return 1 if found. */
6634
6635 static int
6636 find_loads (x, store_pattern)
6637 rtx x, store_pattern;
6638 {
6639 const char * fmt;
6640 int i,j;
6641 int ret = 0;
6642
6643 if (GET_CODE (x) == SET)
6644 x = SET_SRC (x);
6645
6646 if (GET_CODE (x) == MEM)
6647 {
6648 if (load_kills_store (x, store_pattern))
6649 return 1;
6650 }
6651
6652 /* Recursively process the insn. */
6653 fmt = GET_RTX_FORMAT (GET_CODE (x));
6654
6655 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
6656 {
6657 if (fmt[i] == 'e')
6658 ret |= find_loads (XEXP (x, i), store_pattern);
6659 else if (fmt[i] == 'E')
6660 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6661 ret |= find_loads (XVECEXP (x, i, j), store_pattern);
6662 }
6663 return ret;
6664 }
6665
6666 /* Check if INSN kills the store pattern X (is aliased with it).
6667 Return 1 if it it does. */
6668
6669 static int
6670 store_killed_in_insn (x, insn)
6671 rtx x, insn;
6672 {
6673 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
6674 return 0;
6675
6676 if (GET_CODE (insn) == CALL_INSN)
6677 {
6678 if (CONST_CALL_P (insn))
6679 return 0;
6680 else
6681 return 1;
6682 }
6683
6684 if (GET_CODE (PATTERN (insn)) == SET)
6685 {
6686 rtx pat = PATTERN (insn);
6687 /* Check for memory stores to aliased objects. */
6688 if (GET_CODE (SET_DEST (pat)) == MEM && !expr_equiv_p (SET_DEST (pat), x))
6689 /* pretend its a load and check for aliasing. */
6690 if (find_loads (SET_DEST (pat), x))
6691 return 1;
6692 return find_loads (SET_SRC (pat), x);
6693 }
6694 else
6695 return find_loads (PATTERN (insn), x);
6696 }
6697
6698 /* Returns 1 if the expression X is loaded or clobbered on or after INSN
6699 within basic block BB. */
6700
6701 static int
6702 store_killed_after (x, insn, bb)
6703 rtx x, insn;
6704 basic_block bb;
6705 {
6706 rtx last = bb->end;
6707
6708 if (insn == last)
6709 return 0;
6710
6711 /* Check if the register operands of the store are OK in this block.
6712 Note that if registers are changed ANYWHERE in the block, we'll
6713 decide we can't move it, regardless of whether it changed above
6714 or below the store. This could be improved by checking the register
6715 operands while lookinng for aliasing in each insn. */
6716 if (!store_ops_ok (XEXP (x, 0), bb))
6717 return 1;
6718
6719 for ( ; insn && insn != NEXT_INSN (last); insn = NEXT_INSN (insn))
6720 if (store_killed_in_insn (x, insn))
6721 return 1;
6722
6723 return 0;
6724 }
6725
6726 /* Returns 1 if the expression X is loaded or clobbered on or before INSN
6727 within basic block BB. */
6728 static int
6729 store_killed_before (x, insn, bb)
6730 rtx x, insn;
6731 basic_block bb;
6732 {
6733 rtx first = bb->head;
6734
6735 if (insn == first)
6736 return store_killed_in_insn (x, insn);
6737
6738 /* Check if the register operands of the store are OK in this block.
6739 Note that if registers are changed ANYWHERE in the block, we'll
6740 decide we can't move it, regardless of whether it changed above
6741 or below the store. This could be improved by checking the register
6742 operands while lookinng for aliasing in each insn. */
6743 if (!store_ops_ok (XEXP (x, 0), bb))
6744 return 1;
6745
6746 for ( ; insn && insn != PREV_INSN (first); insn = PREV_INSN (insn))
6747 if (store_killed_in_insn (x, insn))
6748 return 1;
6749
6750 return 0;
6751 }
6752
6753 #define ANTIC_STORE_LIST(x) ((x)->loads)
6754 #define AVAIL_STORE_LIST(x) ((x)->stores)
6755
6756 /* Given the table of available store insns at the end of blocks,
6757 determine which ones are not killed by aliasing, and generate
6758 the appropriate vectors for gen and killed. */
6759 static void
6760 build_store_vectors ()
6761 {
6762 basic_block bb;
6763 int b;
6764 rtx insn, st;
6765 struct ls_expr * ptr;
6766
6767 /* Build the gen_vector. This is any store in the table which is not killed
6768 by aliasing later in its block. */
6769 ae_gen = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks, num_stores);
6770 sbitmap_vector_zero (ae_gen, n_basic_blocks);
6771
6772 st_antloc = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks, num_stores);
6773 sbitmap_vector_zero (st_antloc, n_basic_blocks);
6774
6775 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6776 {
6777 /* Put all the stores into either the antic list, or the avail list,
6778 or both. */
6779 rtx store_list = ptr->stores;
6780 ptr->stores = NULL_RTX;
6781
6782 for (st = store_list; st != NULL; st = XEXP (st, 1))
6783 {
6784 insn = XEXP (st, 0);
6785 bb = BLOCK_FOR_INSN (insn);
6786
6787 if (!store_killed_after (ptr->pattern, insn, bb))
6788 {
6789 /* If we've already seen an availale expression in this block,
6790 we can delete the one we saw already (It occurs earlier in
6791 the block), and replace it with this one). We'll copy the
6792 old SRC expression to an unused register in case there
6793 are any side effects. */
6794 if (TEST_BIT (ae_gen[bb->index], ptr->index))
6795 {
6796 /* Find previous store. */
6797 rtx st;
6798 for (st = AVAIL_STORE_LIST (ptr); st ; st = XEXP (st, 1))
6799 if (BLOCK_FOR_INSN (XEXP (st, 0)) == bb)
6800 break;
6801 if (st)
6802 {
6803 rtx r = gen_reg_rtx (GET_MODE (ptr->pattern));
6804 if (gcse_file)
6805 fprintf(gcse_file, "Removing redundant store:\n");
6806 replace_store_insn (r, XEXP (st, 0), bb);
6807 XEXP (st, 0) = insn;
6808 continue;
6809 }
6810 }
6811 SET_BIT (ae_gen[bb->index], ptr->index);
6812 AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn,
6813 AVAIL_STORE_LIST (ptr));
6814 }
6815
6816 if (!store_killed_before (ptr->pattern, insn, bb))
6817 {
6818 SET_BIT (st_antloc[BLOCK_NUM (insn)], ptr->index);
6819 ANTIC_STORE_LIST (ptr) = alloc_INSN_LIST (insn,
6820 ANTIC_STORE_LIST (ptr));
6821 }
6822 }
6823
6824 /* Free the original list of store insns. */
6825 free_INSN_LIST_list (&store_list);
6826 }
6827
6828 ae_kill = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks, num_stores);
6829 sbitmap_vector_zero (ae_kill, n_basic_blocks);
6830
6831 transp = (sbitmap *) sbitmap_vector_alloc (n_basic_blocks, num_stores);
6832 sbitmap_vector_zero (transp, n_basic_blocks);
6833
6834 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
6835 for (b = 0; b < n_basic_blocks; b++)
6836 {
6837 if (store_killed_after (ptr->pattern, BLOCK_HEAD (b), BASIC_BLOCK (b)))
6838 {
6839 /* The anticipatable expression is not killed if it's gen'd. */
6840 /*
6841 We leave this check out for now. If we have a code sequence
6842 in a block which looks like:
6843 ST MEMa = x
6844 L y = MEMa
6845 ST MEMa = z
6846 We should flag this as having an ANTIC expression, NOT
6847 transparent, NOT killed, and AVAIL.
6848 Unfortunately, since we haven't re-written all loads to
6849 use the reaching reg, we'll end up doing an incorrect
6850 Load in the middle here if we push the store down. It happens in
6851 gcc.c-torture/execute/960311-1.c with -O3
6852 If we always kill it in this case, we'll sometimes do
6853 uneccessary work, but it shouldn't actually hurt anything.
6854 if (!TEST_BIT (ae_gen[b], ptr->index)). */
6855 SET_BIT (ae_kill[b], ptr->index);
6856 }
6857 else
6858 SET_BIT (transp[b], ptr->index);
6859 }
6860
6861 /* Any block with no exits calls some non-returning function, so
6862 we better mark the store killed here, or we might not store to
6863 it at all. If we knew it was abort, we wouldn't have to store,
6864 but we don't know that for sure. */
6865 if (gcse_file)
6866 {
6867 fprintf (gcse_file, "ST_avail and ST_antic (shown under loads..)\n");
6868 print_ldst_list (gcse_file);
6869 dump_sbitmap_vector (gcse_file, "st_antloc", "", st_antloc, n_basic_blocks);
6870 dump_sbitmap_vector (gcse_file, "st_kill", "", ae_kill, n_basic_blocks);
6871 dump_sbitmap_vector (gcse_file, "Transpt", "", transp, n_basic_blocks);
6872 dump_sbitmap_vector (gcse_file, "st_avloc", "", ae_gen, n_basic_blocks);
6873 }
6874 }
6875
6876 /* Insert an instruction at the begining of a basic block, and update
6877 the BLOCK_HEAD if needed. */
6878
6879 static void
6880 insert_insn_start_bb (insn, bb)
6881 rtx insn;
6882 basic_block bb;
6883 {
6884 /* Insert at start of successor block. */
6885 rtx prev = PREV_INSN (bb->head);
6886 rtx before = bb->head;
6887 while (before != 0)
6888 {
6889 if (GET_CODE (before) != CODE_LABEL
6890 && (GET_CODE (before) != NOTE
6891 || NOTE_LINE_NUMBER (before) != NOTE_INSN_BASIC_BLOCK))
6892 break;
6893 prev = before;
6894 if (prev == bb->end)
6895 break;
6896 before = NEXT_INSN (before);
6897 }
6898
6899 insn = emit_insn_after (insn, prev);
6900
6901 if (prev == bb->end)
6902 bb->end = insn;
6903
6904 set_block_for_new_insns (insn, bb);
6905
6906 if (gcse_file)
6907 {
6908 fprintf (gcse_file, "STORE_MOTION insert store at start of BB %d:\n",
6909 bb->index);
6910 print_inline_rtx (gcse_file, insn, 6);
6911 fprintf (gcse_file, "\n");
6912 }
6913 }
6914
6915 /* This routine will insert a store on an edge. EXPR is the ldst entry for
6916 the memory reference, and E is the edge to insert it on. Returns non-zero
6917 if an edge insertion was performed. */
6918
6919 static int
6920 insert_store (expr, e)
6921 struct ls_expr * expr;
6922 edge e;
6923 {
6924 rtx reg, insn;
6925 basic_block bb;
6926 edge tmp;
6927
6928 /* We did all the deleted before this insert, so if we didn't delete a
6929 store, then we haven't set the reaching reg yet either. */
6930 if (expr->reaching_reg == NULL_RTX)
6931 return 0;
6932
6933 reg = expr->reaching_reg;
6934 insn = gen_move_insn (expr->pattern, reg);
6935
6936 /* If we are inserting this expression on ALL predecessor edges of a BB,
6937 insert it at the start of the BB, and reset the insert bits on the other
6938 edges so we don;t try to insert it on the other edges. */
6939 bb = e->dest;
6940 for (tmp = e->dest->pred; tmp ; tmp = tmp->pred_next)
6941 {
6942 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
6943 if (index == EDGE_INDEX_NO_EDGE)
6944 abort ();
6945 if (! TEST_BIT (pre_insert_map[index], expr->index))
6946 break;
6947 }
6948
6949 /* If tmp is NULL, we found an insertion on every edge, blank the
6950 insertion vector for these edges, and insert at the start of the BB. */
6951 if (!tmp && bb != EXIT_BLOCK_PTR)
6952 {
6953 for (tmp = e->dest->pred; tmp ; tmp = tmp->pred_next)
6954 {
6955 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
6956 RESET_BIT (pre_insert_map[index], expr->index);
6957 }
6958 insert_insn_start_bb (insn, bb);
6959 return 0;
6960 }
6961
6962 /* We can't insert on this edge, so we'll insert at the head of the
6963 successors block. See Morgan, sec 10.5. */
6964 if ((e->flags & EDGE_ABNORMAL) == EDGE_ABNORMAL)
6965 {
6966 insert_insn_start_bb (insn, bb);
6967 return 0;
6968 }
6969
6970 insert_insn_on_edge (insn, e);
6971
6972 if (gcse_file)
6973 {
6974 fprintf (gcse_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
6975 e->src->index, e->dest->index);
6976 print_inline_rtx (gcse_file, insn, 6);
6977 fprintf (gcse_file, "\n");
6978 }
6979
6980 return 1;
6981 }
6982
6983 /* This routine will replace a store with a SET to a specified register. */
6984
6985 static void
6986 replace_store_insn (reg, del, bb)
6987 rtx reg, del;
6988 basic_block bb;
6989 {
6990 rtx insn;
6991
6992 insn = gen_move_insn (reg, SET_SRC (PATTERN (del)));
6993 insn = emit_insn_after (insn, del);
6994 set_block_for_new_insns (insn, bb);
6995
6996 if (gcse_file)
6997 {
6998 fprintf (gcse_file,
6999 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
7000 print_inline_rtx (gcse_file, del, 6);
7001 fprintf(gcse_file, "\nSTORE MOTION replaced with insn:\n ");
7002 print_inline_rtx (gcse_file, insn, 6);
7003 fprintf(gcse_file, "\n");
7004 }
7005
7006 if (bb->end == del)
7007 bb->end = insn;
7008
7009 if (bb->head == del)
7010 bb->head = insn;
7011
7012 delete_insn (del);
7013 }
7014
7015
7016 /* Delete a store, but copy the value that would have been stored into
7017 the reaching_reg for later storing. */
7018
7019 static void
7020 delete_store (expr, bb)
7021 struct ls_expr * expr;
7022 basic_block bb;
7023 {
7024 rtx reg, i, del;
7025
7026 if (expr->reaching_reg == NULL_RTX)
7027 expr->reaching_reg = gen_reg_rtx (GET_MODE (expr->pattern));
7028
7029
7030 /* If there is more than 1 store, the earlier ones will be dead,
7031 but it doesn't hurt to replace them here. */
7032 reg = expr->reaching_reg;
7033
7034 for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1))
7035 {
7036 del = XEXP (i, 0);
7037 if (BLOCK_FOR_INSN (del) == bb)
7038 {
7039 /* We know there is only one since we deleted redundant
7040 ones during the available computation. */
7041 replace_store_insn (reg, del, bb);
7042 break;
7043 }
7044 }
7045 }
7046
7047 /* Free memory used by store motion. */
7048
7049 static void
7050 free_store_memory ()
7051 {
7052 free_ldst_mems ();
7053
7054 if (ae_gen)
7055 free (ae_gen);
7056 if (ae_kill)
7057 free (ae_kill);
7058 if (transp)
7059 free (transp);
7060 if (st_antloc)
7061 free (st_antloc);
7062 if (pre_insert_map)
7063 free (pre_insert_map);
7064 if (pre_delete_map)
7065 free (pre_delete_map);
7066 if (reg_set_in_block)
7067 free (reg_set_in_block);
7068
7069 ae_gen = ae_kill = transp = st_antloc = NULL;
7070 pre_insert_map = pre_delete_map = reg_set_in_block = NULL;
7071 }
7072
7073 /* Perform store motion. Much like gcse, except we move expressions the
7074 other way by looking at the flowgraph in reverse. */
7075
7076 static void
7077 store_motion ()
7078 {
7079 int x;
7080 struct ls_expr * ptr;
7081 int update_flow = 0;
7082
7083 if (gcse_file)
7084 {
7085 fprintf (gcse_file, "before store motion\n");
7086 print_rtl (gcse_file, get_insns ());
7087 }
7088
7089
7090 init_alias_analysis ();
7091
7092 /* Find all the stores that are live to the end of their block. */
7093 num_stores = compute_store_table ();
7094 if (num_stores == 0)
7095 {
7096 free (reg_set_in_block);
7097 end_alias_analysis ();
7098 return;
7099 }
7100
7101 /* Now compute whats actually available to move. */
7102 add_noreturn_fake_exit_edges ();
7103 build_store_vectors ();
7104
7105 edge_list = pre_edge_rev_lcm (gcse_file, num_stores, transp, ae_gen,
7106 st_antloc, ae_kill, &pre_insert_map,
7107 &pre_delete_map);
7108
7109 /* Now we want to insert the new stores which are going to be needed. */
7110 for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr))
7111 {
7112 for (x = 0; x < n_basic_blocks; x++)
7113 if (TEST_BIT (pre_delete_map[x], ptr->index))
7114 delete_store (ptr, BASIC_BLOCK (x));
7115
7116 for (x = 0; x < NUM_EDGES (edge_list); x++)
7117 if (TEST_BIT (pre_insert_map[x], ptr->index))
7118 update_flow |= insert_store (ptr, INDEX_EDGE (edge_list, x));
7119 }
7120
7121 if (update_flow)
7122 commit_edge_insertions ();
7123
7124 free_store_memory ();
7125 free_edge_list (edge_list);
7126 remove_fake_edges ();
7127 end_alias_analysis ();
7128 }