1 /* Generate from machine description:
2 - some #define configuration flags.
3 Copyright (C) 1987, 1991, 1997, 1998, 1999 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
29 static struct obstack obstack
;
30 struct obstack
*rtl_obstack
= &obstack
;
32 #define obstack_chunk_alloc xmalloc
33 #define obstack_chunk_free free
35 /* flags to determine output of machine description dependent #define's. */
36 static int max_recog_operands
; /* Largest operand number seen. */
37 static int max_dup_operands
; /* Largest number of match_dup in any insn. */
38 static int max_clobbers_per_insn
;
39 static int register_constraint_flag
;
40 static int have_cc0_flag
;
41 static int have_cmove_flag
;
42 static int have_cond_arith_flag
;
43 static int have_lo_sum_flag
;
44 static int have_peephole_flag
;
45 static int have_peephole2_flag
;
47 /* Maximum number of insns seen in a split. */
48 static int max_insns_per_split
= 1;
50 static int clobbers_seen_this_insn
;
51 static int dup_operands_seen_this_insn
;
53 static void walk_insn_part
PROTO((rtx
, int, int));
54 static void gen_insn
PROTO((rtx
));
55 static void gen_expand
PROTO((rtx
));
56 static void gen_split
PROTO((rtx
));
57 static void gen_peephole
PROTO((rtx
));
59 /* RECOG_P will be non-zero if this pattern was seen in a context where it will
60 be used to recognize, rather than just generate an insn.
62 NON_PC_SET_SRC will be non-zero if this pattern was seen in a SET_SRC
63 of a SET whose destination is not (pc). */
66 walk_insn_part (part
, recog_p
, non_pc_set_src
)
72 register RTX_CODE code
;
73 register const char *format_ptr
;
78 code
= GET_CODE (part
);
82 clobbers_seen_this_insn
++;
86 if (XINT (part
, 0) > max_recog_operands
)
87 max_recog_operands
= XINT (part
, 0);
88 if (XSTR (part
, 2) && *XSTR (part
, 2))
89 register_constraint_flag
= 1;
94 ++dup_operands_seen_this_insn
;
98 if (XINT (part
, 0) > max_recog_operands
)
99 max_recog_operands
= XINT (part
, 0);
100 /* Now scan the rtl's in the vector inside the MATCH_OPERATOR or
105 if (GET_CODE (XEXP (part
, 0)) == MATCH_OPERAND
)
110 ++dup_operands_seen_this_insn
;
111 if (XINT (part
, 0) > max_recog_operands
)
112 max_recog_operands
= XINT (part
, 0);
122 have_lo_sum_flag
= 1;
126 walk_insn_part (SET_DEST (part
), 0, recog_p
);
127 walk_insn_part (SET_SRC (part
), recog_p
,
128 GET_CODE (SET_DEST (part
)) != PC
);
132 /* Only consider this machine as having a conditional move if the
133 two arms of the IF_THEN_ELSE are both MATCH_OPERAND. Otherwise,
134 we have some specific IF_THEN_ELSE construct (like the doz
135 instruction on the RS/6000) that can't be used in the general
136 context we want it for. If the first operand is an arithmetic
137 operation and the second is a MATCH_OPERNAND, show we have
138 conditional arithmetic. */
140 if (recog_p
&& non_pc_set_src
141 && GET_CODE (XEXP (part
, 1)) == MATCH_OPERAND
142 && GET_CODE (XEXP (part
, 2)) == MATCH_OPERAND
)
144 else if (recog_p
&& non_pc_set_src
145 && (GET_RTX_CLASS (GET_CODE (XEXP (part
, 1))) == '1'
146 || GET_RTX_CLASS (GET_CODE (XEXP (part
, 1))) == '2'
147 || GET_RTX_CLASS (GET_CODE (XEXP (part
, 1))) == 'c')
148 && GET_CODE (XEXP (XEXP (part
, 1), 0)) == MATCH_OPERAND
149 && GET_CODE (XEXP (part
, 2)) == MATCH_OPERAND
)
150 have_cond_arith_flag
= 1;
153 case REG
: case CONST_INT
: case SYMBOL_REF
:
161 format_ptr
= GET_RTX_FORMAT (GET_CODE (part
));
163 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (part
)); i
++)
164 switch (*format_ptr
++)
168 walk_insn_part (XEXP (part
, i
), recog_p
, non_pc_set_src
);
171 if (XVEC (part
, i
) != NULL
)
172 for (j
= 0; j
< XVECLEN (part
, i
); j
++)
173 walk_insn_part (XVECEXP (part
, i
, j
), recog_p
, non_pc_set_src
);
184 /* Walk the insn pattern to gather the #define's status. */
185 clobbers_seen_this_insn
= 0;
186 dup_operands_seen_this_insn
= 0;
187 if (XVEC (insn
, 1) != 0)
188 for (i
= 0; i
< XVECLEN (insn
, 1); i
++)
189 walk_insn_part (XVECEXP (insn
, 1, i
), 1, 0);
191 if (clobbers_seen_this_insn
> max_clobbers_per_insn
)
192 max_clobbers_per_insn
= clobbers_seen_this_insn
;
193 if (dup_operands_seen_this_insn
> max_dup_operands
)
194 max_dup_operands
= dup_operands_seen_this_insn
;
197 /* Similar but scan a define_expand. */
205 /* Walk the insn pattern to gather the #define's status. */
207 /* Note that we don't bother recording the number of MATCH_DUPs
208 that occur in a gen_expand, because only reload cares about that. */
209 if (XVEC (insn
, 1) != 0)
210 for (i
= 0; i
< XVECLEN (insn
, 1); i
++)
212 /* Compute the maximum SETs and CLOBBERS
213 in any one of the sub-insns;
214 don't sum across all of them. */
215 clobbers_seen_this_insn
= 0;
217 walk_insn_part (XVECEXP (insn
, 1, i
), 0, 0);
219 if (clobbers_seen_this_insn
> max_clobbers_per_insn
)
220 max_clobbers_per_insn
= clobbers_seen_this_insn
;
224 /* Similar but scan a define_split. */
232 /* Look through the patterns that are matched
233 to compute the maximum operand number. */
234 for (i
= 0; i
< XVECLEN (split
, 0); i
++)
235 walk_insn_part (XVECEXP (split
, 0, i
), 1, 0);
236 /* Look at the number of insns this insn could split into. */
237 if (XVECLEN (split
, 2) > max_insns_per_split
)
238 max_insns_per_split
= XVECLEN (split
, 2);
247 /* Look through the patterns that are matched
248 to compute the maximum operand number. */
249 for (i
= 0; i
< XVECLEN (peep
, 0); i
++)
250 walk_insn_part (XVECEXP (peep
, 0, i
), 1, 0);
257 register PTR val
= (PTR
) malloc (size
);
260 fatal ("virtual memory exhausted");
272 ptr
= (PTR
) realloc (old
, size
);
274 ptr
= (PTR
) malloc (size
);
276 fatal ("virtual memory exhausted");
289 progname
= "genconfig";
290 obstack_init (rtl_obstack
);
293 fatal ("No input file name.");
295 infile
= fopen (argv
[1], "r");
299 exit (FATAL_EXIT_CODE
);
302 printf ("/* Generated automatically by the program `genconfig'\n\
303 from the machine description file `md'. */\n\n");
305 /* Allow at least 10 operands for the sake of asm constructs. */
306 max_recog_operands
= 9; /* We will add 1 later. */
307 max_dup_operands
= 1;
309 /* Read the machine description. */
313 c
= read_skip_spaces (infile
);
318 desc
= read_rtx (infile
);
319 if (GET_CODE (desc
) == DEFINE_INSN
)
321 if (GET_CODE (desc
) == DEFINE_EXPAND
)
323 if (GET_CODE (desc
) == DEFINE_SPLIT
)
325 if (GET_CODE (desc
) == DEFINE_PEEPHOLE2
)
327 have_peephole2_flag
= 1;
330 if (GET_CODE (desc
) == DEFINE_PEEPHOLE
)
332 have_peephole_flag
= 1;
337 printf ("\n#define MAX_RECOG_OPERANDS %d\n", max_recog_operands
+ 1);
339 printf ("\n#define MAX_DUP_OPERANDS %d\n", max_dup_operands
);
341 /* This is conditionally defined, in case the user writes code which emits
342 more splits than we can readily see (and knows s/he does it). */
343 printf ("#ifndef MAX_INSNS_PER_SPLIT\n#define MAX_INSNS_PER_SPLIT %d\n#endif\n",
344 max_insns_per_split
);
346 if (register_constraint_flag
)
347 printf ("#define REGISTER_CONSTRAINTS\n");
350 printf ("#define HAVE_cc0\n");
353 printf ("#define HAVE_conditional_move\n");
355 if (have_cond_arith_flag
)
356 printf ("#define HAVE_conditional_arithmetic\n");
358 if (have_lo_sum_flag
)
359 printf ("#define HAVE_lo_sum\n");
361 if (have_peephole_flag
)
362 printf ("#define HAVE_peephole\n");
364 if (have_peephole2_flag
)
365 printf ("#define HAVE_peephole2\n");
368 exit (ferror (stdout
) != 0 ? FATAL_EXIT_CODE
: SUCCESS_EXIT_CODE
);
373 /* Define this so we can link with print-rtl.o to get debug_rtx function. */