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1 /* Generate code from machine description to emit insns as rtl.
2 Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22
23 #include "hconfig.h"
24 #include "system.h"
25 #include "rtl.h"
26 #include "errors.h"
27 #include "gensupport.h"
28
29
30 static int max_opno;
31 static int max_dup_opno;
32 static int max_scratch_opno;
33 static int register_constraints;
34 static int insn_code_number;
35 static int insn_index_number;
36
37 /* Data structure for recording the patterns of insns that have CLOBBERs.
38 We use this to output a function that adds these CLOBBERs to a
39 previously-allocated PARALLEL expression. */
40
41 struct clobber_pat
42 {
43 struct clobber_ent *insns;
44 rtx pattern;
45 int first_clobber;
46 struct clobber_pat *next;
47 int has_hard_reg;
48 } *clobber_list;
49
50 /* Records one insn that uses the clobber list. */
51
52 struct clobber_ent
53 {
54 int code_number; /* Counts only insns. */
55 struct clobber_ent *next;
56 };
57
58 static void max_operand_1 PARAMS ((rtx));
59 static int max_operand_vec PARAMS ((rtx, int));
60 static void print_code PARAMS ((RTX_CODE));
61 static void gen_exp PARAMS ((rtx, enum rtx_code));
62 static void gen_insn PARAMS ((rtx));
63 static void gen_expand PARAMS ((rtx));
64 static void gen_split PARAMS ((rtx));
65 static void output_add_clobbers PARAMS ((void));
66 static void output_added_clobbers_hard_reg_p PARAMS ((void));
67 static void gen_rtx_scratch PARAMS ((rtx, enum rtx_code));
68 static void output_peephole2_scratches PARAMS ((rtx));
69
70 \f
71 static void
72 max_operand_1 (x)
73 rtx x;
74 {
75 register RTX_CODE code;
76 register int i;
77 register int len;
78 register const char *fmt;
79
80 if (x == 0)
81 return;
82
83 code = GET_CODE (x);
84
85 if (code == MATCH_OPERAND && XSTR (x, 2) != 0 && *XSTR (x, 2) != '\0')
86 register_constraints = 1;
87 if (code == MATCH_SCRATCH && XSTR (x, 1) != 0 && *XSTR (x, 1) != '\0')
88 register_constraints = 1;
89 if (code == MATCH_OPERAND || code == MATCH_OPERATOR
90 || code == MATCH_PARALLEL)
91 max_opno = MAX (max_opno, XINT (x, 0));
92 if (code == MATCH_DUP || code == MATCH_OP_DUP || code == MATCH_PAR_DUP)
93 max_dup_opno = MAX (max_dup_opno, XINT (x, 0));
94 if (code == MATCH_SCRATCH)
95 max_scratch_opno = MAX (max_scratch_opno, XINT (x, 0));
96
97 fmt = GET_RTX_FORMAT (code);
98 len = GET_RTX_LENGTH (code);
99 for (i = 0; i < len; i++)
100 {
101 if (fmt[i] == 'e' || fmt[i] == 'u')
102 max_operand_1 (XEXP (x, i));
103 else if (fmt[i] == 'E')
104 {
105 int j;
106 for (j = 0; j < XVECLEN (x, i); j++)
107 max_operand_1 (XVECEXP (x, i, j));
108 }
109 }
110 }
111
112 static int
113 max_operand_vec (insn, arg)
114 rtx insn;
115 int arg;
116 {
117 register int len = XVECLEN (insn, arg);
118 register int i;
119
120 max_opno = -1;
121 max_dup_opno = -1;
122 max_scratch_opno = -1;
123
124 for (i = 0; i < len; i++)
125 max_operand_1 (XVECEXP (insn, arg, i));
126
127 return max_opno + 1;
128 }
129 \f
130 static void
131 print_code (code)
132 RTX_CODE code;
133 {
134 register const char *p1;
135 for (p1 = GET_RTX_NAME (code); *p1; p1++)
136 putchar (TOUPPER(*p1));
137 }
138
139 static void
140 gen_rtx_scratch (x, subroutine_type)
141 rtx x;
142 enum rtx_code subroutine_type;
143 {
144 if (subroutine_type == DEFINE_PEEPHOLE2)
145 {
146 printf ("operand%d", XINT (x, 0));
147 }
148 else
149 {
150 printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x)));
151 }
152 }
153
154 /* Print a C expression to construct an RTX just like X,
155 substituting any operand references appearing within. */
156
157 static void
158 gen_exp (x, subroutine_type)
159 rtx x;
160 enum rtx_code subroutine_type;
161 {
162 register RTX_CODE code;
163 register int i;
164 register int len;
165 register const char *fmt;
166
167 if (x == 0)
168 {
169 printf ("NULL_RTX");
170 return;
171 }
172
173 code = GET_CODE (x);
174
175 switch (code)
176 {
177 case MATCH_OPERAND:
178 case MATCH_DUP:
179 printf ("operand%d", XINT (x, 0));
180 return;
181
182 case MATCH_OP_DUP:
183 printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x, 0));
184 if (GET_MODE (x) == VOIDmode)
185 printf ("GET_MODE (operand%d)", XINT (x, 0));
186 else
187 printf ("%smode", GET_MODE_NAME (GET_MODE (x)));
188 for (i = 0; i < XVECLEN (x, 1); i++)
189 {
190 printf (",\n\t\t");
191 gen_exp (XVECEXP (x, 1, i), subroutine_type);
192 }
193 printf (")");
194 return;
195
196 case MATCH_OPERATOR:
197 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x, 0));
198 printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
199 for (i = 0; i < XVECLEN (x, 2); i++)
200 {
201 printf (",\n\t\t");
202 gen_exp (XVECEXP (x, 2, i), subroutine_type);
203 }
204 printf (")");
205 return;
206
207 case MATCH_PARALLEL:
208 case MATCH_PAR_DUP:
209 printf ("operand%d", XINT (x, 0));
210 return;
211
212 case MATCH_SCRATCH:
213 gen_rtx_scratch (x, subroutine_type);
214 return;
215
216 case ADDRESS:
217 fatal ("ADDRESS expression code used in named instruction pattern");
218
219 case PC:
220 printf ("pc_rtx");
221 return;
222
223 case CC0:
224 printf ("cc0_rtx");
225 return;
226
227 case CONST_INT:
228 if (INTVAL (x) == 0)
229 printf ("const0_rtx");
230 else if (INTVAL (x) == 1)
231 printf ("const1_rtx");
232 else if (INTVAL (x) == -1)
233 printf ("constm1_rtx");
234 else if (INTVAL (x) == STORE_FLAG_VALUE)
235 printf ("const_true_rtx");
236 else
237 {
238 printf ("GEN_INT (");
239 printf (HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
240 printf (")");
241 }
242 return;
243
244 case CONST_DOUBLE:
245 /* These shouldn't be written in MD files. Instead, the appropriate
246 routines in varasm.c should be called. */
247 abort ();
248
249 default:
250 break;
251 }
252
253 printf ("gen_rtx_");
254 print_code (code);
255 printf (" (%smode", GET_MODE_NAME (GET_MODE (x)));
256
257 fmt = GET_RTX_FORMAT (code);
258 len = GET_RTX_LENGTH (code);
259 for (i = 0; i < len; i++)
260 {
261 if (fmt[i] == '0')
262 break;
263 printf (",\n\t");
264 if (fmt[i] == 'e' || fmt[i] == 'u')
265 gen_exp (XEXP (x, i), subroutine_type);
266 else if (fmt[i] == 'i')
267 printf ("%u", XINT (x, i));
268 else if (fmt[i] == 's')
269 printf ("\"%s\"", XSTR (x, i));
270 else if (fmt[i] == 'E')
271 {
272 int j;
273 printf ("gen_rtvec (%d", XVECLEN (x, i));
274 for (j = 0; j < XVECLEN (x, i); j++)
275 {
276 printf (",\n\t\t");
277 gen_exp (XVECEXP (x, i, j), subroutine_type);
278 }
279 printf (")");
280 }
281 else
282 abort ();
283 }
284 printf (")");
285 }
286 \f
287 /* Generate the `gen_...' function for a DEFINE_INSN. */
288
289 static void
290 gen_insn (insn)
291 rtx insn;
292 {
293 int operands;
294 register int i;
295
296 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
297 registers or MATCH_SCRATCHes. If so, store away the information for
298 later. */
299
300 if (XVEC (insn, 1))
301 {
302 int has_hard_reg = 0;
303
304 for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
305 {
306 if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER)
307 break;
308
309 if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) == REG)
310 has_hard_reg = 1;
311 else if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH)
312 break;
313 }
314
315 if (i != XVECLEN (insn, 1) - 1)
316 {
317 register struct clobber_pat *p;
318 register struct clobber_ent *link
319 = (struct clobber_ent *) xmalloc (sizeof (struct clobber_ent));
320 register int j;
321
322 link->code_number = insn_code_number;
323
324 /* See if any previous CLOBBER_LIST entry is the same as this
325 one. */
326
327 for (p = clobber_list; p; p = p->next)
328 {
329 if (p->first_clobber != i + 1
330 || XVECLEN (p->pattern, 1) != XVECLEN (insn, 1))
331 continue;
332
333 for (j = i + 1; j < XVECLEN (insn, 1); j++)
334 {
335 rtx old = XEXP (XVECEXP (p->pattern, 1, j), 0);
336 rtx new = XEXP (XVECEXP (insn, 1, j), 0);
337
338 /* OLD and NEW are the same if both are to be a SCRATCH
339 of the same mode,
340 or if both are registers of the same mode and number. */
341 if (! (GET_MODE (old) == GET_MODE (new)
342 && ((GET_CODE (old) == MATCH_SCRATCH
343 && GET_CODE (new) == MATCH_SCRATCH)
344 || (GET_CODE (old) == REG && GET_CODE (new) == REG
345 && REGNO (old) == REGNO (new)))))
346 break;
347 }
348
349 if (j == XVECLEN (insn, 1))
350 break;
351 }
352
353 if (p == 0)
354 {
355 p = (struct clobber_pat *) xmalloc (sizeof (struct clobber_pat));
356
357 p->insns = 0;
358 p->pattern = insn;
359 p->first_clobber = i + 1;
360 p->next = clobber_list;
361 p->has_hard_reg = has_hard_reg;
362 clobber_list = p;
363 }
364
365 link->next = p->insns;
366 p->insns = link;
367 }
368 }
369
370 /* Don't mention instructions whose names are the null string
371 or begin with '*'. They are in the machine description just
372 to be recognized. */
373 if (XSTR (insn, 0)[0] == 0 || XSTR (insn, 0)[0] == '*')
374 return;
375
376 /* Find out how many operands this function has,
377 and also whether any of them have register constraints. */
378 register_constraints = 0;
379 operands = max_operand_vec (insn, 1);
380 if (max_dup_opno >= operands)
381 fatal ("match_dup operand number has no match_operand");
382
383 /* Output the function name and argument declarations. */
384 printf ("rtx\ngen_%s (", XSTR (insn, 0));
385 for (i = 0; i < operands; i++)
386 if (i)
387 printf (", operand%d", i);
388 else
389 printf ("operand%d", i);
390 printf (")\n");
391 for (i = 0; i < operands; i++)
392 printf (" rtx operand%d;\n", i);
393 printf ("{\n");
394
395 /* Output code to construct and return the rtl for the instruction body */
396
397 if (XVECLEN (insn, 1) == 1)
398 {
399 printf (" return ");
400 gen_exp (XVECEXP (insn, 1, 0), DEFINE_INSN);
401 printf (";\n}\n\n");
402 }
403 else
404 {
405 printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
406 XVECLEN (insn, 1));
407
408 for (i = 0; i < XVECLEN (insn, 1); i++)
409 {
410 printf (",\n\t\t");
411 gen_exp (XVECEXP (insn, 1, i), DEFINE_INSN);
412 }
413 printf ("));\n}\n\n");
414 }
415 }
416 \f
417 /* Generate the `gen_...' function for a DEFINE_EXPAND. */
418
419 static void
420 gen_expand (expand)
421 rtx expand;
422 {
423 int operands;
424 register int i;
425
426 if (strlen (XSTR (expand, 0)) == 0)
427 fatal ("define_expand lacks a name");
428 if (XVEC (expand, 1) == 0)
429 fatal ("define_expand for %s lacks a pattern", XSTR (expand, 0));
430
431 /* Find out how many operands this function has,
432 and also whether any of them have register constraints. */
433 register_constraints = 0;
434
435 operands = max_operand_vec (expand, 1);
436
437 /* Output the function name and argument declarations. */
438 printf ("rtx\ngen_%s (", XSTR (expand, 0));
439 for (i = 0; i < operands; i++)
440 if (i)
441 printf (", operand%d", i);
442 else
443 printf ("operand%d", i);
444 printf (")\n");
445 for (i = 0; i < operands; i++)
446 printf (" rtx operand%d;\n", i);
447 printf ("{\n");
448
449 /* If we don't have any C code to write, only one insn is being written,
450 and no MATCH_DUPs are present, we can just return the desired insn
451 like we do for a DEFINE_INSN. This saves memory. */
452 if ((XSTR (expand, 3) == 0 || *XSTR (expand, 3) == '\0')
453 && operands > max_dup_opno
454 && XVECLEN (expand, 1) == 1)
455 {
456 printf (" return ");
457 gen_exp (XVECEXP (expand, 1, 0), DEFINE_EXPAND);
458 printf (";\n}\n\n");
459 return;
460 }
461
462 /* For each operand referred to only with MATCH_DUPs,
463 make a local variable. */
464 for (i = operands; i <= max_dup_opno; i++)
465 printf (" rtx operand%d;\n", i);
466 for (; i <= max_scratch_opno; i++)
467 printf (" rtx operand%d;\n", i);
468 printf (" rtx _val = 0;\n");
469 printf (" start_sequence ();\n");
470
471 /* The fourth operand of DEFINE_EXPAND is some code to be executed
472 before the actual construction.
473 This code expects to refer to `operands'
474 just as the output-code in a DEFINE_INSN does,
475 but here `operands' is an automatic array.
476 So copy the operand values there before executing it. */
477 if (XSTR (expand, 3) && *XSTR (expand, 3))
478 {
479 printf (" {\n");
480 if (operands > 0 || max_dup_opno >= 0 || max_scratch_opno >= 0)
481 printf (" rtx operands[%d];\n",
482 MAX (operands, MAX (max_scratch_opno, max_dup_opno) + 1));
483 /* Output code to copy the arguments into `operands'. */
484 for (i = 0; i < operands; i++)
485 printf (" operands[%d] = operand%d;\n", i, i);
486
487 /* Output the special code to be executed before the sequence
488 is generated. */
489 printf ("%s\n", XSTR (expand, 3));
490
491 /* Output code to copy the arguments back out of `operands'
492 (unless we aren't going to use them at all). */
493 if (XVEC (expand, 1) != 0)
494 {
495 for (i = 0; i < operands; i++)
496 printf (" operand%d = operands[%d];\n", i, i);
497 for (; i <= max_dup_opno; i++)
498 printf (" operand%d = operands[%d];\n", i, i);
499 for (; i <= max_scratch_opno; i++)
500 printf (" operand%d = operands[%d];\n", i, i);
501 }
502 printf (" }\n");
503 }
504
505 /* Output code to construct the rtl for the instruction bodies.
506 Use emit_insn to add them to the sequence being accumulated.
507 But don't do this if the user's code has set `no_more' nonzero. */
508
509 for (i = 0; i < XVECLEN (expand, 1); i++)
510 {
511 rtx next = XVECEXP (expand, 1, i);
512 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
513 || (GET_CODE (next) == PARALLEL
514 && GET_CODE (XVECEXP (next, 0, 0)) == SET
515 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
516 || GET_CODE (next) == RETURN)
517 printf (" emit_jump_insn (");
518 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
519 || GET_CODE (next) == CALL
520 || (GET_CODE (next) == PARALLEL
521 && GET_CODE (XVECEXP (next, 0, 0)) == SET
522 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
523 || (GET_CODE (next) == PARALLEL
524 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
525 printf (" emit_call_insn (");
526 else if (GET_CODE (next) == CODE_LABEL)
527 printf (" emit_label (");
528 else if (GET_CODE (next) == MATCH_OPERAND
529 || GET_CODE (next) == MATCH_DUP
530 || GET_CODE (next) == MATCH_OPERATOR
531 || GET_CODE (next) == MATCH_OP_DUP
532 || GET_CODE (next) == MATCH_PARALLEL
533 || GET_CODE (next) == MATCH_PAR_DUP
534 || GET_CODE (next) == PARALLEL)
535 printf (" emit (");
536 else
537 printf (" emit_insn (");
538 gen_exp (next, DEFINE_EXPAND);
539 printf (");\n");
540 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
541 && GET_CODE (SET_SRC (next)) == LABEL_REF)
542 printf (" emit_barrier ();");
543 }
544
545 /* Call `gen_sequence' to make a SEQUENCE out of all the
546 insns emitted within this gen_... function. */
547
548 printf (" _val = gen_sequence ();\n");
549 printf (" end_sequence ();\n");
550 printf (" return _val;\n}\n\n");
551 }
552
553 /* Like gen_expand, but generates a SEQUENCE. */
554
555 static void
556 gen_split (split)
557 rtx split;
558 {
559 register int i;
560 int operands;
561 const char *name = "split";
562 const char *unused;
563
564 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
565 name = "peephole2";
566
567 if (XVEC (split, 0) == 0)
568 fatal ("define_%s (definition %d) lacks a pattern", name,
569 insn_index_number);
570 else if (XVEC (split, 2) == 0)
571 fatal ("define_%s (definition %d) lacks a replacement pattern", name,
572 insn_index_number);
573
574 /* Find out how many operands this function has. */
575
576 max_operand_vec (split, 2);
577 operands = MAX (max_opno, MAX (max_dup_opno, max_scratch_opno)) + 1;
578 unused = (operands == 0 ? " ATTRIBUTE_UNUSED" : "");
579
580 /* Output the prototype, function name and argument declarations. */
581 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
582 {
583 printf ("extern rtx gen_%s_%d PARAMS ((rtx, rtx *));\n",
584 name, insn_code_number);
585 printf ("rtx\ngen_%s_%d (curr_insn, operands)\n",
586 name, insn_code_number);
587 printf (" rtx curr_insn ATTRIBUTE_UNUSED;\n");
588 printf (" rtx *operands%s;\n", unused);
589 }
590 else
591 {
592 printf ("extern rtx gen_split_%d PARAMS ((rtx *));\n", insn_code_number);
593 printf ("rtx\ngen_%s_%d (operands)\n", name, insn_code_number);
594 printf (" rtx *operands%s;\n", unused);
595 }
596 printf ("{\n");
597
598 /* Declare all local variables. */
599 for (i = 0; i < operands; i++)
600 printf (" rtx operand%d;\n", i);
601 printf (" rtx _val = 0;\n");
602
603 if (GET_CODE (split) == DEFINE_PEEPHOLE2)
604 output_peephole2_scratches (split);
605
606 printf (" start_sequence ();\n");
607
608 /* The fourth operand of DEFINE_SPLIT is some code to be executed
609 before the actual construction. */
610
611 if (XSTR (split, 3))
612 printf ("%s\n", XSTR (split, 3));
613
614 /* Output code to copy the arguments back out of `operands' */
615 for (i = 0; i < operands; i++)
616 printf (" operand%d = operands[%d];\n", i, i);
617
618 /* Output code to construct the rtl for the instruction bodies.
619 Use emit_insn to add them to the sequence being accumulated.
620 But don't do this if the user's code has set `no_more' nonzero. */
621
622 for (i = 0; i < XVECLEN (split, 2); i++)
623 {
624 rtx next = XVECEXP (split, 2, i);
625 if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
626 || (GET_CODE (next) == PARALLEL
627 && GET_CODE (XVECEXP (next, 0, 0)) == SET
628 && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
629 || GET_CODE (next) == RETURN)
630 printf (" emit_jump_insn (");
631 else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
632 || GET_CODE (next) == CALL
633 || (GET_CODE (next) == PARALLEL
634 && GET_CODE (XVECEXP (next, 0, 0)) == SET
635 && GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
636 || (GET_CODE (next) == PARALLEL
637 && GET_CODE (XVECEXP (next, 0, 0)) == CALL))
638 printf (" emit_call_insn (");
639 else if (GET_CODE (next) == CODE_LABEL)
640 printf (" emit_label (");
641 else if (GET_CODE (next) == MATCH_OPERAND
642 || GET_CODE (next) == MATCH_OPERATOR
643 || GET_CODE (next) == MATCH_PARALLEL
644 || GET_CODE (next) == MATCH_OP_DUP
645 || GET_CODE (next) == MATCH_DUP
646 || GET_CODE (next) == PARALLEL)
647 printf (" emit (");
648 else
649 printf (" emit_insn (");
650 gen_exp (next, GET_CODE (split));
651 printf (");\n");
652 if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
653 && GET_CODE (SET_SRC (next)) == LABEL_REF)
654 printf (" emit_barrier ();");
655 }
656
657 /* Call `gen_sequence' to make a SEQUENCE out of all the
658 insns emitted within this gen_... function. */
659
660 printf (" _val = gen_sequence ();\n");
661 printf (" end_sequence ();\n");
662 printf (" return _val;\n}\n\n");
663 }
664 \f
665 /* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
666 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
667 the end of the vector. */
668
669 static void
670 output_add_clobbers ()
671 {
672 struct clobber_pat *clobber;
673 struct clobber_ent *ent;
674 int i;
675
676 printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
677 printf (" rtx pattern;\n int insn_code_number;\n");
678 printf ("{\n");
679 printf (" switch (insn_code_number)\n");
680 printf (" {\n");
681
682 for (clobber = clobber_list; clobber; clobber = clobber->next)
683 {
684 for (ent = clobber->insns; ent; ent = ent->next)
685 printf (" case %d:\n", ent->code_number);
686
687 for (i = clobber->first_clobber; i < XVECLEN (clobber->pattern, 1); i++)
688 {
689 printf (" XVECEXP (pattern, 0, %d) = ", i);
690 gen_exp (XVECEXP (clobber->pattern, 1, i),
691 GET_CODE (clobber->pattern));
692 printf (";\n");
693 }
694
695 printf (" break;\n\n");
696 }
697
698 printf (" default:\n");
699 printf (" abort ();\n");
700 printf (" }\n");
701 printf ("}\n");
702 }
703 \f
704 /* Write a function, `added_clobbers_hard_reg_p' this is given an insn_code
705 number that needs clobbers and returns 1 if they include a clobber of a
706 hard reg and 0 if they just clobber SCRATCH. */
707
708 static void
709 output_added_clobbers_hard_reg_p ()
710 {
711 struct clobber_pat *clobber;
712 struct clobber_ent *ent;
713 int clobber_p;
714
715 printf ("\n\nint\nadded_clobbers_hard_reg_p (insn_code_number)\n");
716 printf (" int insn_code_number;\n");
717 printf ("{\n");
718 printf (" switch (insn_code_number)\n");
719 printf (" {\n");
720
721 for (clobber_p = 0; clobber_p <= 1; clobber_p++)
722 {
723 for (clobber = clobber_list; clobber; clobber = clobber->next)
724 if (clobber->has_hard_reg == clobber_p)
725 for (ent = clobber->insns; ent; ent = ent->next)
726 printf (" case %d:\n", ent->code_number);
727
728 printf (" return %d;\n\n", clobber_p);
729 }
730
731 printf (" default:\n");
732 printf (" abort ();\n");
733 printf (" }\n");
734 printf ("}\n");
735 }
736 \f
737 /* Generate code to invoke find_free_register () as needed for the
738 scratch registers used by the peephole2 pattern in SPLIT. */
739
740 static void
741 output_peephole2_scratches (split)
742 rtx split;
743 {
744 int i;
745 int insn_nr = 0;
746
747 printf (" HARD_REG_SET _regs_allocated;\n");
748 printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
749
750 for (i = 0; i < XVECLEN (split, 0); i++)
751 {
752 rtx elt = XVECEXP (split, 0, i);
753 if (GET_CODE (elt) == MATCH_SCRATCH)
754 {
755 int last_insn_nr = insn_nr;
756 int cur_insn_nr = insn_nr;
757 int j;
758 for (j = i + 1; j < XVECLEN (split, 0); j++)
759 if (GET_CODE (XVECEXP (split, 0, j)) == MATCH_DUP)
760 {
761 if (XINT (XVECEXP (split, 0, j), 0) == XINT (elt, 0))
762 last_insn_nr = cur_insn_nr;
763 }
764 else if (GET_CODE (XVECEXP (split, 0, j)) != MATCH_SCRATCH)
765 cur_insn_nr++;
766
767 printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
768 return NULL;\n",
769 XINT (elt, 0),
770 insn_nr, last_insn_nr,
771 XSTR (elt, 1),
772 GET_MODE_NAME (GET_MODE (elt)));
773
774 }
775 else if (GET_CODE (elt) != MATCH_DUP)
776 insn_nr++;
777 }
778 }
779
780 extern int main PARAMS ((int, char **));
781
782 int
783 main (argc, argv)
784 int argc;
785 char **argv;
786 {
787 rtx desc;
788
789 progname = "genemit";
790
791 if (argc <= 1)
792 fatal ("No input file name.");
793
794 if (init_md_reader (argv[1]) != SUCCESS_EXIT_CODE)
795 return (FATAL_EXIT_CODE);
796
797 /* Assign sequential codes to all entries in the machine description
798 in parallel with the tables in insn-output.c. */
799
800 insn_code_number = 0;
801 insn_index_number = 0;
802
803 printf ("/* Generated automatically by the program `genemit'\n\
804 from the machine description file `md'. */\n\n");
805
806 printf ("#include \"config.h\"\n");
807 printf ("#include \"system.h\"\n");
808 printf ("#include \"rtl.h\"\n");
809 printf ("#include \"tm_p.h\"\n");
810 printf ("#include \"function.h\"\n");
811 printf ("#include \"expr.h\"\n");
812 printf ("#include \"optabs.h\"\n");
813 printf ("#include \"real.h\"\n");
814 printf ("#include \"flags.h\"\n");
815 printf ("#include \"output.h\"\n");
816 printf ("#include \"insn-config.h\"\n");
817 printf ("#include \"hard-reg-set.h\"\n");
818 printf ("#include \"recog.h\"\n");
819 printf ("#include \"resource.h\"\n");
820 printf ("#include \"reload.h\"\n");
821 printf ("#include \"toplev.h\"\n");
822 printf ("#include \"ggc.h\"\n\n");
823 printf ("#define FAIL return (end_sequence (), _val)\n");
824 printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n");
825
826 /* Read the machine description. */
827
828 while (1)
829 {
830 int line_no;
831
832 desc = read_md_rtx (&line_no, &insn_code_number);
833 if (desc == NULL)
834 break;
835
836 switch (GET_CODE (desc))
837 {
838 case DEFINE_INSN:
839 gen_insn (desc);
840 break;
841
842 case DEFINE_EXPAND:
843 gen_expand (desc);
844 break;
845
846 case DEFINE_SPLIT:
847 gen_split (desc);
848 break;
849
850 case DEFINE_PEEPHOLE2:
851 gen_split (desc);
852 break;
853
854 default:
855 break;
856 }
857 ++insn_index_number;
858 }
859
860 /* Write out the routines to add CLOBBERs to a pattern and say whether they
861 clobber a hard reg. */
862 output_add_clobbers ();
863 output_added_clobbers_hard_reg_p ();
864
865 fflush (stdout);
866 return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
867 }
868
869 /* Define this so we can link with print-rtl.o to get debug_rtx function. */
870 const char *
871 get_insn_name (code)
872 int code ATTRIBUTE_UNUSED;
873 {
874 return NULL;
875 }