1 /* If-conversion support.
2 Copyright (C) 2000-2016 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "cfgcleanup.h"
42 #include "tree-pass.h"
44 #include "shrink-wrap.h"
49 #ifndef MAX_CONDITIONAL_EXECUTE
50 #define MAX_CONDITIONAL_EXECUTE \
51 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
55 #define IFCVT_MULTIPLE_DUMPS 1
57 #define NULL_BLOCK ((basic_block) NULL)
59 /* True if after combine pass. */
60 static bool ifcvt_after_combine
;
62 /* True if the target has the cbranchcc4 optab. */
63 static bool have_cbranchcc4
;
65 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
66 static int num_possible_if_blocks
;
68 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
70 static int num_updated_if_blocks
;
72 /* # of changes made. */
73 static int num_true_changes
;
75 /* Whether conditional execution changes were made. */
76 static int cond_exec_changed_p
;
78 /* Forward references. */
79 static int count_bb_insns (const_basic_block
);
80 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
81 static rtx_insn
*first_active_insn (basic_block
);
82 static rtx_insn
*last_active_insn (basic_block
, int);
83 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
84 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
85 static basic_block
block_fallthru (basic_block
);
86 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
88 static rtx
cond_exec_get_condition (rtx_insn
*);
89 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
90 static int noce_operand_ok (const_rtx
);
91 static void merge_if_block (ce_if_block
*);
92 static int find_cond_trap (basic_block
, edge
, edge
);
93 static basic_block
find_if_header (basic_block
, int);
94 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
95 static int noce_find_if_block (basic_block
, edge
, edge
, int);
96 static int cond_exec_find_if_block (ce_if_block
*);
97 static int find_if_case_1 (basic_block
, edge
, edge
);
98 static int find_if_case_2 (basic_block
, edge
, edge
);
99 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
101 static void noce_emit_move_insn (rtx
, rtx
);
102 static rtx_insn
*block_has_only_trap (basic_block
);
104 /* Count the number of non-jump active insns in BB. */
107 count_bb_insns (const_basic_block bb
)
110 rtx_insn
*insn
= BB_HEAD (bb
);
114 if (active_insn_p (insn
) && !JUMP_P (insn
))
117 if (insn
== BB_END (bb
))
119 insn
= NEXT_INSN (insn
);
125 /* Determine whether the total insn_rtx_cost on non-jump insns in
126 basic block BB is less than MAX_COST. This function returns
127 false if the cost of any instruction could not be estimated.
129 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
130 as those insns are being speculated. MAX_COST is scaled with SCALE
131 plus a small fudge factor. */
134 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
137 rtx_insn
*insn
= BB_HEAD (bb
);
138 bool speed
= optimize_bb_for_speed_p (bb
);
140 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
141 applied to insn_rtx_cost when optimizing for size. Only do
142 this after combine because if-conversion might interfere with
143 passes before combine.
145 Use optimize_function_for_speed_p instead of the pre-defined
146 variable speed to make sure it is set to same value for all
147 basic blocks in one if-conversion transformation. */
148 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
149 scale
= REG_BR_PROB_BASE
;
150 /* Our branch probability/scaling factors are just estimates and don't
151 account for cases where we can get speculation for free and other
152 secondary benefits. So we fudge the scale factor to make speculating
153 appear a little more profitable when optimizing for performance. */
155 scale
+= REG_BR_PROB_BASE
/ 8;
162 if (NONJUMP_INSN_P (insn
))
164 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
168 /* If this instruction is the load or set of a "stack" register,
169 such as a floating point register on x87, then the cost of
170 speculatively executing this insn may need to include
171 the additional cost of popping its result off of the
172 register stack. Unfortunately, correctly recognizing and
173 accounting for this additional overhead is tricky, so for
174 now we simply prohibit such speculative execution. */
177 rtx set
= single_set (insn
);
178 if (set
&& STACK_REG_P (SET_DEST (set
)))
184 if (count
>= max_cost
)
187 else if (CALL_P (insn
))
190 if (insn
== BB_END (bb
))
192 insn
= NEXT_INSN (insn
);
198 /* Return the first non-jump active insn in the basic block. */
201 first_active_insn (basic_block bb
)
203 rtx_insn
*insn
= BB_HEAD (bb
);
207 if (insn
== BB_END (bb
))
209 insn
= NEXT_INSN (insn
);
212 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
214 if (insn
== BB_END (bb
))
216 insn
= NEXT_INSN (insn
);
225 /* Return the last non-jump active (non-jump) insn in the basic block. */
228 last_active_insn (basic_block bb
, int skip_use_p
)
230 rtx_insn
*insn
= BB_END (bb
);
231 rtx_insn
*head
= BB_HEAD (bb
);
235 || DEBUG_INSN_P (insn
)
237 && NONJUMP_INSN_P (insn
)
238 && GET_CODE (PATTERN (insn
)) == USE
))
242 insn
= PREV_INSN (insn
);
251 /* Return the active insn before INSN inside basic block CURR_BB. */
254 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
256 if (!insn
|| insn
== BB_HEAD (curr_bb
))
259 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
261 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
264 /* No other active insn all the way to the start of the basic block. */
265 if (insn
== BB_HEAD (curr_bb
))
272 /* Return the active insn after INSN inside basic block CURR_BB. */
275 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
277 if (!insn
|| insn
== BB_END (curr_bb
))
280 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
282 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
285 /* No other active insn all the way to the end of the basic block. */
286 if (insn
== BB_END (curr_bb
))
293 /* Return the basic block reached by falling though the basic block BB. */
296 block_fallthru (basic_block bb
)
298 edge e
= find_fallthru_edge (bb
->succs
);
300 return (e
) ? e
->dest
: NULL_BLOCK
;
303 /* Return true if RTXs A and B can be safely interchanged. */
306 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
308 if (!rtx_equal_p (a
, b
))
311 if (GET_CODE (a
) != MEM
)
314 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
315 reference is not. Interchanging a dead type-unsafe memory reference with
316 a live type-safe one creates a live type-unsafe memory reference, in other
317 words, it makes the program illegal.
318 We check here conservatively whether the two memory references have equal
319 memory attributes. */
321 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
325 /* Go through a bunch of insns, converting them to conditional
326 execution format if possible. Return TRUE if all of the non-note
327 insns were processed. */
330 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
331 /* if block information */rtx_insn
*start
,
332 /* first insn to look at */rtx end
,
333 /* last insn to look at */rtx test
,
334 /* conditional execution test */int prob_val
,
335 /* probability of branch taken. */int mod_ok
)
337 int must_be_last
= FALSE
;
345 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
347 /* dwarf2out can't cope with conditional prologues. */
348 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
351 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
354 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
356 /* dwarf2out can't cope with conditional unwind info. */
357 if (RTX_FRAME_RELATED_P (insn
))
360 /* Remove USE insns that get in the way. */
361 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
363 /* ??? Ug. Actually unlinking the thing is problematic,
364 given what we'd have to coordinate with our callers. */
365 SET_INSN_DELETED (insn
);
369 /* Last insn wasn't last? */
373 if (modified_in_p (test
, insn
))
380 /* Now build the conditional form of the instruction. */
381 pattern
= PATTERN (insn
);
382 xtest
= copy_rtx (test
);
384 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
386 if (GET_CODE (pattern
) == COND_EXEC
)
388 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
391 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
392 COND_EXEC_TEST (pattern
));
393 pattern
= COND_EXEC_CODE (pattern
);
396 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
398 /* If the machine needs to modify the insn being conditionally executed,
399 say for example to force a constant integer operand into a temp
400 register, do so here. */
401 #ifdef IFCVT_MODIFY_INSN
402 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
407 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
409 if (CALL_P (insn
) && prob_val
>= 0)
410 validate_change (insn
, ®_NOTES (insn
),
411 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
412 prob_val
, REG_NOTES (insn
)), 1);
422 /* Return the condition for a jump. Do not do any special processing. */
425 cond_exec_get_condition (rtx_insn
*jump
)
429 if (any_condjump_p (jump
))
430 test_if
= SET_SRC (pc_set (jump
));
433 cond
= XEXP (test_if
, 0);
435 /* If this branches to JUMP_LABEL when the condition is false,
436 reverse the condition. */
437 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
438 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
440 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
444 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
451 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
452 to conditional execution. Return TRUE if we were successful at
453 converting the block. */
456 cond_exec_process_if_block (ce_if_block
* ce_info
,
457 /* if block information */int do_multiple_p
)
459 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
460 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
461 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
462 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
463 rtx_insn
*then_start
; /* first insn in THEN block */
464 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
465 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
466 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
467 int max
; /* max # of insns to convert. */
468 int then_mod_ok
; /* whether conditional mods are ok in THEN */
469 rtx true_expr
; /* test for else block insns */
470 rtx false_expr
; /* test for then block insns */
471 int true_prob_val
; /* probability of else block */
472 int false_prob_val
; /* probability of then block */
473 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
474 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
475 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
476 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
477 int then_n_insns
, else_n_insns
, n_insns
;
478 enum rtx_code false_code
;
481 /* If test is comprised of && or || elements, and we've failed at handling
482 all of them together, just use the last test if it is the special case of
483 && elements without an ELSE block. */
484 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
486 if (else_bb
|| ! ce_info
->and_and_p
)
489 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
490 ce_info
->num_multiple_test_blocks
= 0;
491 ce_info
->num_and_and_blocks
= 0;
492 ce_info
->num_or_or_blocks
= 0;
495 /* Find the conditional jump to the ELSE or JOIN part, and isolate
497 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
501 /* If the conditional jump is more than just a conditional jump,
502 then we can not do conditional execution conversion on this block. */
503 if (! onlyjump_p (BB_END (test_bb
)))
506 /* Collect the bounds of where we're to search, skipping any labels, jumps
507 and notes at the beginning and end of the block. Then count the total
508 number of insns and see if it is small enough to convert. */
509 then_start
= first_active_insn (then_bb
);
510 then_end
= last_active_insn (then_bb
, TRUE
);
511 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
512 n_insns
= then_n_insns
;
513 max
= MAX_CONDITIONAL_EXECUTE
;
520 else_start
= first_active_insn (else_bb
);
521 else_end
= last_active_insn (else_bb
, TRUE
);
522 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
523 n_insns
+= else_n_insns
;
525 /* Look for matching sequences at the head and tail of the two blocks,
526 and limit the range of insns to be converted if possible. */
527 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
528 &then_first_tail
, &else_first_tail
,
530 if (then_first_tail
== BB_HEAD (then_bb
))
531 then_start
= then_end
= NULL
;
532 if (else_first_tail
== BB_HEAD (else_bb
))
533 else_start
= else_end
= NULL
;
538 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
540 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
541 n_insns
-= 2 * n_matching
;
546 && then_n_insns
> n_matching
547 && else_n_insns
> n_matching
)
549 int longest_match
= MIN (then_n_insns
- n_matching
,
550 else_n_insns
- n_matching
);
552 = flow_find_head_matching_sequence (then_bb
, else_bb
,
561 /* We won't pass the insns in the head sequence to
562 cond_exec_process_insns, so we need to test them here
563 to make sure that they don't clobber the condition. */
564 for (insn
= BB_HEAD (then_bb
);
565 insn
!= NEXT_INSN (then_last_head
);
566 insn
= NEXT_INSN (insn
))
567 if (!LABEL_P (insn
) && !NOTE_P (insn
)
568 && !DEBUG_INSN_P (insn
)
569 && modified_in_p (test_expr
, insn
))
573 if (then_last_head
== then_end
)
574 then_start
= then_end
= NULL
;
575 if (else_last_head
== else_end
)
576 else_start
= else_end
= NULL
;
581 then_start
= find_active_insn_after (then_bb
, then_last_head
);
583 else_start
= find_active_insn_after (else_bb
, else_last_head
);
584 n_insns
-= 2 * n_matching
;
592 /* Map test_expr/test_jump into the appropriate MD tests to use on
593 the conditionally executed code. */
595 true_expr
= test_expr
;
597 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
598 if (false_code
!= UNKNOWN
)
599 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
600 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
602 false_expr
= NULL_RTX
;
604 #ifdef IFCVT_MODIFY_TESTS
605 /* If the machine description needs to modify the tests, such as setting a
606 conditional execution register from a comparison, it can do so here. */
607 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
609 /* See if the conversion failed. */
610 if (!true_expr
|| !false_expr
)
614 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
617 true_prob_val
= XINT (note
, 0);
618 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
626 /* If we have && or || tests, do them here. These tests are in the adjacent
627 blocks after the first block containing the test. */
628 if (ce_info
->num_multiple_test_blocks
> 0)
630 basic_block bb
= test_bb
;
631 basic_block last_test_bb
= ce_info
->last_test_bb
;
638 rtx_insn
*start
, *end
;
640 enum rtx_code f_code
;
642 bb
= block_fallthru (bb
);
643 start
= first_active_insn (bb
);
644 end
= last_active_insn (bb
, TRUE
);
646 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
647 false_prob_val
, FALSE
))
650 /* If the conditional jump is more than just a conditional jump, then
651 we can not do conditional execution conversion on this block. */
652 if (! onlyjump_p (BB_END (bb
)))
655 /* Find the conditional jump and isolate the test. */
656 t
= cond_exec_get_condition (BB_END (bb
));
660 f_code
= reversed_comparison_code (t
, BB_END (bb
));
661 if (f_code
== UNKNOWN
)
664 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
665 if (ce_info
->and_and_p
)
667 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
668 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
672 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
673 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
676 /* If the machine description needs to modify the tests, such as
677 setting a conditional execution register from a comparison, it can
679 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
680 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
682 /* See if the conversion failed. */
690 while (bb
!= last_test_bb
);
693 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
694 on then THEN block. */
695 then_mod_ok
= (else_bb
== NULL_BLOCK
);
697 /* Go through the THEN and ELSE blocks converting the insns if possible
698 to conditional execution. */
702 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
703 false_expr
, false_prob_val
,
707 if (else_bb
&& else_end
708 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
709 true_expr
, true_prob_val
, TRUE
))
712 /* If we cannot apply the changes, fail. Do not go through the normal fail
713 processing, since apply_change_group will call cancel_changes. */
714 if (! apply_change_group ())
716 #ifdef IFCVT_MODIFY_CANCEL
717 /* Cancel any machine dependent changes. */
718 IFCVT_MODIFY_CANCEL (ce_info
);
723 #ifdef IFCVT_MODIFY_FINAL
724 /* Do any machine dependent final modifications. */
725 IFCVT_MODIFY_FINAL (ce_info
);
728 /* Conversion succeeded. */
730 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
731 n_insns
, (n_insns
== 1) ? " was" : "s were");
733 /* Merge the blocks! If we had matching sequences, make sure to delete one
734 copy at the appropriate location first: delete the copy in the THEN branch
735 for a tail sequence so that the remaining one is executed last for both
736 branches, and delete the copy in the ELSE branch for a head sequence so
737 that the remaining one is executed first for both branches. */
740 rtx_insn
*from
= then_first_tail
;
742 from
= find_active_insn_after (then_bb
, from
);
743 delete_insn_chain (from
, get_last_bb_insn (then_bb
), false);
746 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
748 merge_if_block (ce_info
);
749 cond_exec_changed_p
= TRUE
;
753 #ifdef IFCVT_MODIFY_CANCEL
754 /* Cancel any machine dependent changes. */
755 IFCVT_MODIFY_CANCEL (ce_info
);
762 /* Used by noce_process_if_block to communicate with its subroutines.
764 The subroutines know that A and B may be evaluated freely. They
765 know that X is a register. They should insert new instructions
766 before cond_earliest. */
770 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
771 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
773 /* The jump that ends TEST_BB. */
776 /* The jump condition. */
779 /* New insns should be inserted before this one. */
780 rtx_insn
*cond_earliest
;
782 /* Insns in the THEN and ELSE block. There is always just this
783 one insns in those blocks. The insns are single_set insns.
784 If there was no ELSE block, INSN_B is the last insn before
785 COND_EARLIEST, or NULL_RTX. In the former case, the insn
786 operands are still valid, as if INSN_B was moved down below
788 rtx_insn
*insn_a
, *insn_b
;
790 /* The SET_SRC of INSN_A and INSN_B. */
793 /* The SET_DEST of INSN_A. */
796 /* The original set destination that the THEN and ELSE basic blocks finally
797 write their result to. */
799 /* True if this if block is not canonical. In the canonical form of
800 if blocks, the THEN_BB is the block reached via the fallthru edge
801 from TEST_BB. For the noce transformations, we allow the symmetric
803 bool then_else_reversed
;
805 /* True if the contents of then_bb and else_bb are a
806 simple single set instruction. */
810 /* The total rtx cost of the instructions in then_bb and else_bb. */
811 unsigned int then_cost
;
812 unsigned int else_cost
;
814 /* Estimated cost of the particular branch instruction. */
815 unsigned int branch_cost
;
818 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
819 static int noce_try_move (struct noce_if_info
*);
820 static int noce_try_store_flag (struct noce_if_info
*);
821 static int noce_try_addcc (struct noce_if_info
*);
822 static int noce_try_store_flag_constants (struct noce_if_info
*);
823 static int noce_try_store_flag_mask (struct noce_if_info
*);
824 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
826 static int noce_try_cmove (struct noce_if_info
*);
827 static int noce_try_cmove_arith (struct noce_if_info
*);
828 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
829 static int noce_try_minmax (struct noce_if_info
*);
830 static int noce_try_abs (struct noce_if_info
*);
831 static int noce_try_sign_mask (struct noce_if_info
*);
833 /* Helper function for noce_try_store_flag*. */
836 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
839 rtx cond
= if_info
->cond
;
843 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
844 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
846 /* If earliest == jump, or when the condition is complex, try to
847 build the store_flag insn directly. */
851 rtx set
= pc_set (if_info
->jump
);
852 cond
= XEXP (SET_SRC (set
), 0);
853 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
854 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
855 reversep
= !reversep
;
856 if (if_info
->then_else_reversed
)
857 reversep
= !reversep
;
861 code
= reversed_comparison_code (cond
, if_info
->jump
);
863 code
= GET_CODE (cond
);
865 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
866 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
868 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
870 rtx set
= gen_rtx_SET (x
, src
);
873 rtx_insn
*insn
= emit_insn (set
);
875 if (recog_memoized (insn
) >= 0)
877 rtx_insn
*seq
= get_insns ();
881 if_info
->cond_earliest
= if_info
->jump
;
889 /* Don't even try if the comparison operands or the mode of X are weird. */
890 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
893 return emit_store_flag (x
, code
, XEXP (cond
, 0),
894 XEXP (cond
, 1), VOIDmode
,
895 (code
== LTU
|| code
== LEU
896 || code
== GEU
|| code
== GTU
), normalize
);
899 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
900 X is the destination/target and Y is the value to copy. */
903 noce_emit_move_insn (rtx x
, rtx y
)
905 machine_mode outmode
;
909 if (GET_CODE (x
) != STRICT_LOW_PART
)
911 rtx_insn
*seq
, *insn
;
916 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
917 otherwise construct a suitable SET pattern ourselves. */
918 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
919 ? emit_move_insn (x
, y
)
920 : emit_insn (gen_rtx_SET (x
, y
));
924 if (recog_memoized (insn
) <= 0)
926 if (GET_CODE (x
) == ZERO_EXTRACT
)
928 rtx op
= XEXP (x
, 0);
929 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
930 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
932 /* store_bit_field expects START to be relative to
933 BYTES_BIG_ENDIAN and adjusts this value for machines with
934 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
935 invoke store_bit_field again it is necessary to have the START
936 value from the first call. */
937 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
940 start
= BITS_PER_UNIT
- start
- size
;
943 gcc_assert (REG_P (op
));
944 start
= BITS_PER_WORD
- start
- size
;
948 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
949 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
953 switch (GET_RTX_CLASS (GET_CODE (y
)))
956 ot
= code_to_optab (GET_CODE (y
));
960 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
961 if (target
!= NULL_RTX
)
964 emit_move_insn (x
, target
);
973 ot
= code_to_optab (GET_CODE (y
));
977 target
= expand_binop (GET_MODE (y
), ot
,
978 XEXP (y
, 0), XEXP (y
, 1),
980 if (target
!= NULL_RTX
)
983 emit_move_insn (x
, target
);
1000 inner
= XEXP (outer
, 0);
1001 outmode
= GET_MODE (outer
);
1002 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1003 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1004 0, 0, outmode
, y
, false);
1007 /* Return the CC reg if it is used in COND. */
1010 cc_in_cond (rtx cond
)
1012 if (have_cbranchcc4
&& cond
1013 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1014 return XEXP (cond
, 0);
1019 /* Return sequence of instructions generated by if conversion. This
1020 function calls end_sequence() to end the current stream, ensures
1021 that the instructions are unshared, recognizable non-jump insns.
1022 On failure, this function returns a NULL_RTX. */
1025 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1028 rtx_insn
*seq
= get_insns ();
1029 rtx cc
= cc_in_cond (if_info
->cond
);
1031 set_used_flags (if_info
->x
);
1032 set_used_flags (if_info
->cond
);
1033 set_used_flags (if_info
->a
);
1034 set_used_flags (if_info
->b
);
1036 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1037 set_used_flags (insn
);
1039 unshare_all_rtl_in_chain (seq
);
1042 /* Make sure that all of the instructions emitted are recognizable,
1043 and that we haven't introduced a new jump instruction.
1044 As an exercise for the reader, build a general mechanism that
1045 allows proper placement of required clobbers. */
1046 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1048 || recog_memoized (insn
) == -1
1049 /* Make sure new generated code does not clobber CC. */
1050 || (cc
&& set_of (cc
, insn
)))
1056 /* Return true iff the then and else basic block (if it exists)
1057 consist of a single simple set instruction. */
1060 noce_simple_bbs (struct noce_if_info
*if_info
)
1062 if (!if_info
->then_simple
)
1065 if (if_info
->else_bb
)
1066 return if_info
->else_simple
;
1071 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1072 "if (a == b) x = a; else x = b" into "x = b". */
1075 noce_try_move (struct noce_if_info
*if_info
)
1077 rtx cond
= if_info
->cond
;
1078 enum rtx_code code
= GET_CODE (cond
);
1082 if (code
!= NE
&& code
!= EQ
)
1085 if (!noce_simple_bbs (if_info
))
1088 /* This optimization isn't valid if either A or B could be a NaN
1089 or a signed zero. */
1090 if (HONOR_NANS (if_info
->x
)
1091 || HONOR_SIGNED_ZEROS (if_info
->x
))
1094 /* Check whether the operands of the comparison are A and in
1096 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1097 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1098 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1099 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1101 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1104 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1106 /* Avoid generating the move if the source is the destination. */
1107 if (! rtx_equal_p (if_info
->x
, y
))
1110 noce_emit_move_insn (if_info
->x
, y
);
1111 seq
= end_ifcvt_sequence (if_info
);
1115 emit_insn_before_setloc (seq
, if_info
->jump
,
1116 INSN_LOCATION (if_info
->insn_a
));
1123 /* Convert "if (test) x = 1; else x = 0".
1125 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1126 tried in noce_try_store_flag_constants after noce_try_cmove has had
1127 a go at the conversion. */
1130 noce_try_store_flag (struct noce_if_info
*if_info
)
1136 if (!noce_simple_bbs (if_info
))
1139 if (CONST_INT_P (if_info
->b
)
1140 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1141 && if_info
->a
== const0_rtx
)
1143 else if (if_info
->b
== const0_rtx
1144 && CONST_INT_P (if_info
->a
)
1145 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1146 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1154 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1157 if (target
!= if_info
->x
)
1158 noce_emit_move_insn (if_info
->x
, target
);
1160 seq
= end_ifcvt_sequence (if_info
);
1164 emit_insn_before_setloc (seq
, if_info
->jump
,
1165 INSN_LOCATION (if_info
->insn_a
));
1176 /* Convert "if (test) x = -A; else x = A" into
1177 x = A; if (test) x = -x if the machine can do the
1178 conditional negate form of this cheaply.
1179 Try this before noce_try_cmove that will just load the
1180 immediates into two registers and do a conditional select
1181 between them. If the target has a conditional negate or
1182 conditional invert operation we can save a potentially
1183 expensive constant synthesis. */
1186 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1188 if (!noce_simple_bbs (if_info
))
1191 if (!CONST_INT_P (if_info
->a
)
1192 || !CONST_INT_P (if_info
->b
)
1193 || !REG_P (if_info
->x
))
1196 machine_mode mode
= GET_MODE (if_info
->x
);
1198 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1199 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1201 rtx cond
= if_info
->cond
;
1209 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1211 else if (val_a
== ~val_b
)
1219 rtx tmp
= gen_reg_rtx (mode
);
1220 noce_emit_move_insn (tmp
, if_info
->a
);
1222 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1226 rtx_insn
*seq
= get_insns ();
1234 if (target
!= if_info
->x
)
1235 noce_emit_move_insn (if_info
->x
, target
);
1237 seq
= end_ifcvt_sequence (if_info
);
1242 emit_insn_before_setloc (seq
, if_info
->jump
,
1243 INSN_LOCATION (if_info
->insn_a
));
1252 /* Convert "if (test) x = a; else x = b", for A and B constant.
1253 Also allow A = y + c1, B = y + c2, with a common y between A
1257 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1262 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1265 machine_mode mode
= GET_MODE (if_info
->x
);;
1266 rtx common
= NULL_RTX
;
1271 /* Handle cases like x := test ? y + 3 : y + 4. */
1272 if (GET_CODE (a
) == PLUS
1273 && GET_CODE (b
) == PLUS
1274 && CONST_INT_P (XEXP (a
, 1))
1275 && CONST_INT_P (XEXP (b
, 1))
1276 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1277 /* Allow expressions that are not using the result or plain
1278 registers where we handle overlap below. */
1279 && (REG_P (XEXP (a
, 0))
1280 || (noce_operand_ok (XEXP (a
, 0))
1281 && ! reg_overlap_mentioned_p (if_info
->x
, XEXP (a
, 0))))
1282 && if_info
->branch_cost
>= 2)
1284 common
= XEXP (a
, 0);
1289 if (!noce_simple_bbs (if_info
))
1295 ifalse
= INTVAL (a
);
1297 bool subtract_flag_p
= false;
1299 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1300 /* Make sure we can represent the difference between the two values. */
1302 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1305 diff
= trunc_int_for_mode (diff
, mode
);
1307 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1311 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1314 /* We could collapse these cases but it is easier to follow the
1315 diff/STORE_FLAG_VALUE combinations when they are listed
1319 => 4 + (test != 0). */
1320 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1323 => can_reverse | 4 + (test == 0)
1324 !can_reverse | 3 - (test != 0). */
1325 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1327 reversep
= can_reverse
;
1328 subtract_flag_p
= !can_reverse
;
1329 /* If we need to subtract the flag and we have PLUS-immediate
1330 A and B then it is unlikely to be beneficial to play tricks
1332 if (subtract_flag_p
&& common
)
1336 => can_reverse | 3 + (test == 0)
1337 !can_reverse | 4 - (test != 0). */
1338 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1340 reversep
= can_reverse
;
1341 subtract_flag_p
= !can_reverse
;
1342 /* If we need to subtract the flag and we have PLUS-immediate
1343 A and B then it is unlikely to be beneficial to play tricks
1345 if (subtract_flag_p
&& common
)
1349 => 4 + (test != 0). */
1350 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1355 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1356 && (STORE_FLAG_VALUE
== 1
1357 || if_info
->branch_cost
>= 2))
1359 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1360 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1365 else if (itrue
== -1
1366 && (STORE_FLAG_VALUE
== -1
1367 || if_info
->branch_cost
>= 2))
1369 else if (ifalse
== -1 && can_reverse
1370 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1380 std::swap (itrue
, ifalse
);
1381 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1386 /* If we have x := test ? x + 3 : x + 4 then move the original
1387 x out of the way while we store flags. */
1388 if (common
&& rtx_equal_p (common
, if_info
->x
))
1390 common
= gen_reg_rtx (mode
);
1391 noce_emit_move_insn (common
, if_info
->x
);
1394 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1401 /* if (test) x = 3; else x = 4;
1402 => x = 3 + (test == 0); */
1403 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1405 /* Add the common part now. This may allow combine to merge this
1406 with the store flag operation earlier into some sort of conditional
1407 increment/decrement if the target allows it. */
1409 target
= expand_simple_binop (mode
, PLUS
,
1411 target
, 0, OPTAB_WIDEN
);
1413 /* Always use ifalse here. It should have been swapped with itrue
1414 when appropriate when reversep is true. */
1415 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1416 gen_int_mode (ifalse
, mode
), target
,
1417 if_info
->x
, 0, OPTAB_WIDEN
);
1419 /* Other cases are not beneficial when the original A and B are PLUS
1426 /* if (test) x = 8; else x = 0;
1427 => x = (test != 0) << 3; */
1428 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1430 target
= expand_simple_binop (mode
, ASHIFT
,
1431 target
, GEN_INT (tmp
), if_info
->x
, 0,
1435 /* if (test) x = -1; else x = b;
1436 => x = -(test != 0) | b; */
1437 else if (itrue
== -1)
1439 target
= expand_simple_binop (mode
, IOR
,
1440 target
, gen_int_mode (ifalse
, mode
),
1441 if_info
->x
, 0, OPTAB_WIDEN
);
1455 if (target
!= if_info
->x
)
1456 noce_emit_move_insn (if_info
->x
, target
);
1458 seq
= end_ifcvt_sequence (if_info
);
1462 emit_insn_before_setloc (seq
, if_info
->jump
,
1463 INSN_LOCATION (if_info
->insn_a
));
1470 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1471 similarly for "foo--". */
1474 noce_try_addcc (struct noce_if_info
*if_info
)
1478 int subtract
, normalize
;
1480 if (!noce_simple_bbs (if_info
))
1483 if (GET_CODE (if_info
->a
) == PLUS
1484 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1485 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1488 rtx cond
= if_info
->cond
;
1489 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1491 /* First try to use addcc pattern. */
1492 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1493 && general_operand (XEXP (cond
, 1), VOIDmode
))
1496 target
= emit_conditional_add (if_info
->x
, code
,
1501 XEXP (if_info
->a
, 1),
1502 GET_MODE (if_info
->x
),
1503 (code
== LTU
|| code
== GEU
1504 || code
== LEU
|| code
== GTU
));
1507 if (target
!= if_info
->x
)
1508 noce_emit_move_insn (if_info
->x
, target
);
1510 seq
= end_ifcvt_sequence (if_info
);
1514 emit_insn_before_setloc (seq
, if_info
->jump
,
1515 INSN_LOCATION (if_info
->insn_a
));
1521 /* If that fails, construct conditional increment or decrement using
1523 if (if_info
->branch_cost
>= 2
1524 && (XEXP (if_info
->a
, 1) == const1_rtx
1525 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1528 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1529 subtract
= 0, normalize
= 0;
1530 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1531 subtract
= 1, normalize
= 0;
1533 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1536 target
= noce_emit_store_flag (if_info
,
1537 gen_reg_rtx (GET_MODE (if_info
->x
)),
1541 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1542 subtract
? MINUS
: PLUS
,
1543 if_info
->b
, target
, if_info
->x
,
1547 if (target
!= if_info
->x
)
1548 noce_emit_move_insn (if_info
->x
, target
);
1550 seq
= end_ifcvt_sequence (if_info
);
1554 emit_insn_before_setloc (seq
, if_info
->jump
,
1555 INSN_LOCATION (if_info
->insn_a
));
1565 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1568 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1574 if (!noce_simple_bbs (if_info
))
1578 if ((if_info
->branch_cost
>= 2
1579 || STORE_FLAG_VALUE
== -1)
1580 && ((if_info
->a
== const0_rtx
1581 && rtx_equal_p (if_info
->b
, if_info
->x
))
1582 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1585 && if_info
->b
== const0_rtx
1586 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1589 target
= noce_emit_store_flag (if_info
,
1590 gen_reg_rtx (GET_MODE (if_info
->x
)),
1593 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1595 target
, if_info
->x
, 0,
1600 int old_cost
, new_cost
, insn_cost
;
1603 if (target
!= if_info
->x
)
1604 noce_emit_move_insn (if_info
->x
, target
);
1606 seq
= end_ifcvt_sequence (if_info
);
1610 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1611 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1612 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1613 new_cost
= seq_cost (seq
, speed_p
);
1615 if (new_cost
> old_cost
)
1618 emit_insn_before_setloc (seq
, if_info
->jump
,
1619 INSN_LOCATION (if_info
->insn_a
));
1629 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1632 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1633 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1635 rtx target ATTRIBUTE_UNUSED
;
1636 int unsignedp ATTRIBUTE_UNUSED
;
1638 /* If earliest == jump, try to build the cmove insn directly.
1639 This is helpful when combine has created some complex condition
1640 (like for alpha's cmovlbs) that we can't hope to regenerate
1641 through the normal interface. */
1643 if (if_info
->cond_earliest
== if_info
->jump
)
1645 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1646 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1647 cond
, vtrue
, vfalse
);
1648 rtx set
= gen_rtx_SET (x
, if_then_else
);
1651 rtx_insn
*insn
= emit_insn (set
);
1653 if (recog_memoized (insn
) >= 0)
1655 rtx_insn
*seq
= get_insns ();
1665 /* Don't even try if the comparison operands are weird
1666 except that the target supports cbranchcc4. */
1667 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1668 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1670 if (!have_cbranchcc4
1671 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1672 || cmp_b
!= const0_rtx
)
1676 unsignedp
= (code
== LTU
|| code
== GEU
1677 || code
== LEU
|| code
== GTU
);
1679 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1680 vtrue
, vfalse
, GET_MODE (x
),
1685 /* We might be faced with a situation like:
1688 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1689 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1691 We can't do a conditional move in mode M, but it's possible that we
1692 could do a conditional move in mode N instead and take a subreg of
1695 If we can't create new pseudos, though, don't bother. */
1696 if (reload_completed
)
1699 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1701 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1702 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1703 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1704 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1705 rtx promoted_target
;
1707 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1708 || byte_vtrue
!= byte_vfalse
1709 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1710 != SUBREG_PROMOTED_VAR_P (vfalse
))
1711 || (SUBREG_PROMOTED_GET (vtrue
)
1712 != SUBREG_PROMOTED_GET (vfalse
)))
1715 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1717 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1718 VOIDmode
, reg_vtrue
, reg_vfalse
,
1719 GET_MODE (reg_vtrue
), unsignedp
);
1720 /* Nope, couldn't do it in that mode either. */
1724 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1725 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1726 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1727 emit_move_insn (x
, target
);
1734 /* Try only simple constants and registers here. More complex cases
1735 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1736 has had a go at it. */
1739 noce_try_cmove (struct noce_if_info
*if_info
)
1745 if (!noce_simple_bbs (if_info
))
1748 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1749 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1753 code
= GET_CODE (if_info
->cond
);
1754 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1755 XEXP (if_info
->cond
, 0),
1756 XEXP (if_info
->cond
, 1),
1757 if_info
->a
, if_info
->b
);
1761 if (target
!= if_info
->x
)
1762 noce_emit_move_insn (if_info
->x
, target
);
1764 seq
= end_ifcvt_sequence (if_info
);
1768 emit_insn_before_setloc (seq
, if_info
->jump
,
1769 INSN_LOCATION (if_info
->insn_a
));
1772 /* If both a and b are constants try a last-ditch transformation:
1773 if (test) x = a; else x = b;
1774 => x = (-(test != 0) & (b - a)) + a;
1775 Try this only if the target-specific expansion above has failed.
1776 The target-specific expander may want to generate sequences that
1777 we don't know about, so give them a chance before trying this
1779 else if (!targetm
.have_conditional_execution ()
1780 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1781 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1782 || if_info
->branch_cost
>= 3))
1784 machine_mode mode
= GET_MODE (if_info
->x
);
1785 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1786 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1787 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1794 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1795 /* Make sure we can represent the difference
1796 between the two values. */
1798 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1804 diff
= trunc_int_for_mode (diff
, mode
);
1805 target
= expand_simple_binop (mode
, AND
,
1806 target
, gen_int_mode (diff
, mode
),
1807 if_info
->x
, 0, OPTAB_WIDEN
);
1809 target
= expand_simple_binop (mode
, PLUS
,
1810 target
, gen_int_mode (ifalse
, mode
),
1811 if_info
->x
, 0, OPTAB_WIDEN
);
1814 if (target
!= if_info
->x
)
1815 noce_emit_move_insn (if_info
->x
, target
);
1817 seq
= end_ifcvt_sequence (if_info
);
1821 emit_insn_before_setloc (seq
, if_info
->jump
,
1822 INSN_LOCATION (if_info
->insn_a
));
1838 /* Return true if X contains a conditional code mode rtx. */
1841 contains_ccmode_rtx_p (rtx x
)
1843 subrtx_iterator::array_type array
;
1844 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1845 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1851 /* Helper for bb_valid_for_noce_process_p. Validate that
1852 the rtx insn INSN is a single set that does not set
1853 the conditional register CC and is in general valid for
1857 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1860 || !NONJUMP_INSN_P (insn
)
1861 || (cc
&& set_of (cc
, insn
)))
1864 rtx sset
= single_set (insn
);
1866 /* Currently support only simple single sets in test_bb. */
1868 || !noce_operand_ok (SET_DEST (sset
))
1869 || contains_ccmode_rtx_p (SET_DEST (sset
))
1870 || !noce_operand_ok (SET_SRC (sset
)))
1877 /* Return true iff the registers that the insns in BB_A set do not get
1878 used in BB_B. If TO_RENAME is non-NULL then it is a location that will be
1879 renamed later by the caller and so conflicts on it should be ignored
1880 in this function. */
1883 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
, rtx to_rename
)
1886 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1891 FOR_BB_INSNS (bb_a
, a_insn
)
1893 if (!active_insn_p (a_insn
))
1896 rtx sset_a
= single_set (a_insn
);
1900 BITMAP_FREE (bba_sets
);
1903 /* Record all registers that BB_A sets. */
1904 FOR_EACH_INSN_DEF (def
, a_insn
)
1905 if (!(to_rename
&& DF_REF_REG (def
) == to_rename
))
1906 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1911 FOR_BB_INSNS (bb_b
, b_insn
)
1913 if (!active_insn_p (b_insn
))
1916 rtx sset_b
= single_set (b_insn
);
1920 BITMAP_FREE (bba_sets
);
1924 /* Make sure this is a REG and not some instance
1925 of ZERO_EXTRACT or SUBREG or other dangerous stuff.
1926 If we have a memory destination then we have a pair of simple
1927 basic blocks performing an operation of the form [addr] = c ? a : b.
1928 bb_valid_for_noce_process_p will have ensured that these are
1929 the only stores present. In that case [addr] should be the location
1930 to be renamed. Assert that the callers set this up properly. */
1931 if (MEM_P (SET_DEST (sset_b
)))
1932 gcc_assert (rtx_equal_p (SET_DEST (sset_b
), to_rename
));
1933 else if (!REG_P (SET_DEST (sset_b
)))
1935 BITMAP_FREE (bba_sets
);
1939 /* If the insn uses a reg set in BB_A return false. */
1940 FOR_EACH_INSN_USE (use
, b_insn
)
1942 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1944 BITMAP_FREE (bba_sets
);
1951 BITMAP_FREE (bba_sets
);
1955 /* Emit copies of all the active instructions in BB except the last.
1956 This is a helper for noce_try_cmove_arith. */
1959 noce_emit_all_but_last (basic_block bb
)
1961 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
1963 FOR_BB_INSNS (bb
, insn
)
1965 if (insn
!= last
&& active_insn_p (insn
))
1967 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
1969 emit_insn (PATTERN (to_emit
));
1974 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
1975 the resulting insn or NULL if it's not a valid insn. */
1978 noce_emit_insn (rtx to_emit
)
1980 gcc_assert (to_emit
);
1981 rtx_insn
*insn
= emit_insn (to_emit
);
1983 if (recog_memoized (insn
) < 0)
1989 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
1990 and including the penultimate one in BB if it is not simple
1991 (as indicated by SIMPLE). Then emit LAST_INSN as the last
1992 insn in the block. The reason for that is that LAST_INSN may
1993 have been modified by the preparation in noce_try_cmove_arith. */
1996 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
1999 noce_emit_all_but_last (bb
);
2001 if (last_insn
&& !noce_emit_insn (last_insn
))
2007 /* Try more complex cases involving conditional_move. */
2010 noce_try_cmove_arith (struct noce_if_info
*if_info
)
2016 rtx_insn
*insn_a
, *insn_b
;
2017 bool a_simple
= if_info
->then_simple
;
2018 bool b_simple
= if_info
->else_simple
;
2019 basic_block then_bb
= if_info
->then_bb
;
2020 basic_block else_bb
= if_info
->else_bb
;
2024 rtx_insn
*ifcvt_seq
;
2026 /* A conditional move from two memory sources is equivalent to a
2027 conditional on their addresses followed by a load. Don't do this
2028 early because it'll screw alias analysis. Note that we've
2029 already checked for no side effects. */
2030 /* ??? FIXME: Magic number 5. */
2031 if (cse_not_expected
2032 && MEM_P (a
) && MEM_P (b
)
2033 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
2034 && if_info
->branch_cost
>= 5)
2036 machine_mode address_mode
= get_address_mode (a
);
2040 x
= gen_reg_rtx (address_mode
);
2044 /* ??? We could handle this if we knew that a load from A or B could
2045 not trap or fault. This is also true if we've already loaded
2046 from the address along the path from ENTRY. */
2047 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2050 /* if (test) x = a + b; else x = c - d;
2057 code
= GET_CODE (if_info
->cond
);
2058 insn_a
= if_info
->insn_a
;
2059 insn_b
= if_info
->insn_b
;
2061 machine_mode x_mode
= GET_MODE (x
);
2063 if (!can_conditionally_move_p (x_mode
))
2066 unsigned int then_cost
;
2067 unsigned int else_cost
;
2069 then_cost
= if_info
->then_cost
;
2074 else_cost
= if_info
->else_cost
;
2078 /* We're going to execute one of the basic blocks anyway, so
2079 bail out if the most expensive of the two blocks is unacceptable. */
2080 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
2083 /* Possibly rearrange operands to make things come out more natural. */
2084 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
2087 if (rtx_equal_p (b
, x
))
2089 else if (general_operand (b
, GET_MODE (b
)))
2094 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2096 std::swap (insn_a
, insn_b
);
2097 std::swap (a_simple
, b_simple
);
2098 std::swap (then_bb
, else_bb
);
2102 if (then_bb
&& else_bb
2103 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
, if_info
->orig_x
)
2104 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
, if_info
->orig_x
)))
2109 /* If one of the blocks is empty then the corresponding B or A value
2110 came from the test block. The non-empty complex block that we will
2111 emit might clobber the register used by B or A, so move it to a pseudo
2114 rtx tmp_a
= NULL_RTX
;
2115 rtx tmp_b
= NULL_RTX
;
2117 if (b_simple
|| !else_bb
)
2118 tmp_b
= gen_reg_rtx (x_mode
);
2120 if (a_simple
|| !then_bb
)
2121 tmp_a
= gen_reg_rtx (x_mode
);
2126 rtx emit_a
= NULL_RTX
;
2127 rtx emit_b
= NULL_RTX
;
2128 rtx_insn
*tmp_insn
= NULL
;
2129 bool modified_in_a
= false;
2130 bool modified_in_b
= false;
2131 /* If either operand is complex, load it into a register first.
2132 The best way to do this is to copy the original insn. In this
2133 way we preserve any clobbers etc that the insn may have had.
2134 This is of course not possible in the IS_MEM case. */
2136 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2141 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2142 emit_a
= gen_rtx_SET (reg
, a
);
2148 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2150 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2151 rtx set
= single_set (copy_of_a
);
2154 emit_a
= PATTERN (copy_of_a
);
2158 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2159 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2165 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2169 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2170 emit_b
= gen_rtx_SET (reg
, b
);
2176 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2177 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2178 rtx set
= single_set (copy_of_b
);
2181 emit_b
= PATTERN (copy_of_b
);
2185 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2186 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2192 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2193 if (tmp_b
&& then_bb
)
2195 FOR_BB_INSNS (then_bb
, tmp_insn
)
2196 /* Don't check inside insn_a. We will have changed it to emit_a
2197 with a destination that doesn't conflict. */
2198 if (!(insn_a
&& tmp_insn
== insn_a
)
2199 && modified_in_p (orig_b
, tmp_insn
))
2201 modified_in_a
= true;
2207 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2208 if (tmp_a
&& else_bb
)
2210 FOR_BB_INSNS (else_bb
, tmp_insn
)
2211 /* Don't check inside insn_b. We will have changed it to emit_b
2212 with a destination that doesn't conflict. */
2213 if (!(insn_b
&& tmp_insn
== insn_b
)
2214 && modified_in_p (orig_a
, tmp_insn
))
2216 modified_in_b
= true;
2221 /* If insn to set up A clobbers any registers B depends on, try to
2222 swap insn that sets up A with the one that sets up B. If even
2223 that doesn't help, punt. */
2224 if (modified_in_a
&& !modified_in_b
)
2226 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2227 goto end_seq_and_fail
;
2229 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2230 goto end_seq_and_fail
;
2232 else if (!modified_in_a
)
2234 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2235 goto end_seq_and_fail
;
2237 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2238 goto end_seq_and_fail
;
2241 goto end_seq_and_fail
;
2243 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2244 XEXP (if_info
->cond
, 1), a
, b
);
2247 goto end_seq_and_fail
;
2249 /* If we're handling a memory for above, emit the load now. */
2252 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2254 /* Copy over flags as appropriate. */
2255 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2256 MEM_VOLATILE_P (mem
) = 1;
2257 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2258 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2260 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2262 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2263 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2265 noce_emit_move_insn (if_info
->x
, mem
);
2267 else if (target
!= x
)
2268 noce_emit_move_insn (x
, target
);
2270 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2274 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2275 INSN_LOCATION (if_info
->insn_a
));
2283 /* For most cases, the simplified condition we found is the best
2284 choice, but this is not the case for the min/max/abs transforms.
2285 For these we wish to know that it is A or B in the condition. */
2288 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2289 rtx_insn
**earliest
)
2295 /* If target is already mentioned in the known condition, return it. */
2296 if (reg_mentioned_p (target
, if_info
->cond
))
2298 *earliest
= if_info
->cond_earliest
;
2299 return if_info
->cond
;
2302 set
= pc_set (if_info
->jump
);
2303 cond
= XEXP (SET_SRC (set
), 0);
2305 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2306 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2307 if (if_info
->then_else_reversed
)
2310 /* If we're looking for a constant, try to make the conditional
2311 have that constant in it. There are two reasons why it may
2312 not have the constant we want:
2314 1. GCC may have needed to put the constant in a register, because
2315 the target can't compare directly against that constant. For
2316 this case, we look for a SET immediately before the comparison
2317 that puts a constant in that register.
2319 2. GCC may have canonicalized the conditional, for example
2320 replacing "if x < 4" with "if x <= 3". We can undo that (or
2321 make equivalent types of changes) to get the constants we need
2322 if they're off by one in the right direction. */
2324 if (CONST_INT_P (target
))
2326 enum rtx_code code
= GET_CODE (if_info
->cond
);
2327 rtx op_a
= XEXP (if_info
->cond
, 0);
2328 rtx op_b
= XEXP (if_info
->cond
, 1);
2329 rtx_insn
*prev_insn
;
2331 /* First, look to see if we put a constant in a register. */
2332 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2334 && BLOCK_FOR_INSN (prev_insn
)
2335 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2336 && INSN_P (prev_insn
)
2337 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2339 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2341 src
= SET_SRC (PATTERN (prev_insn
));
2342 if (CONST_INT_P (src
))
2344 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2346 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2349 if (CONST_INT_P (op_a
))
2351 std::swap (op_a
, op_b
);
2352 code
= swap_condition (code
);
2357 /* Now, look to see if we can get the right constant by
2358 adjusting the conditional. */
2359 if (CONST_INT_P (op_b
))
2361 HOST_WIDE_INT desired_val
= INTVAL (target
);
2362 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2367 if (desired_val
!= HOST_WIDE_INT_MAX
2368 && actual_val
== desired_val
+ 1)
2371 op_b
= GEN_INT (desired_val
);
2375 if (desired_val
!= HOST_WIDE_INT_MIN
2376 && actual_val
== desired_val
- 1)
2379 op_b
= GEN_INT (desired_val
);
2383 if (desired_val
!= HOST_WIDE_INT_MIN
2384 && actual_val
== desired_val
- 1)
2387 op_b
= GEN_INT (desired_val
);
2391 if (desired_val
!= HOST_WIDE_INT_MAX
2392 && actual_val
== desired_val
+ 1)
2395 op_b
= GEN_INT (desired_val
);
2403 /* If we made any changes, generate a new conditional that is
2404 equivalent to what we started with, but has the right
2406 if (code
!= GET_CODE (if_info
->cond
)
2407 || op_a
!= XEXP (if_info
->cond
, 0)
2408 || op_b
!= XEXP (if_info
->cond
, 1))
2410 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2411 *earliest
= if_info
->cond_earliest
;
2416 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2417 earliest
, target
, have_cbranchcc4
, true);
2418 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2421 /* We almost certainly searched back to a different place.
2422 Need to re-verify correct lifetimes. */
2424 /* X may not be mentioned in the range (cond_earliest, jump]. */
2425 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2426 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2429 /* A and B may not be modified in the range [cond_earliest, jump). */
2430 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2432 && (modified_in_p (if_info
->a
, insn
)
2433 || modified_in_p (if_info
->b
, insn
)))
2439 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2442 noce_try_minmax (struct noce_if_info
*if_info
)
2445 rtx_insn
*earliest
, *seq
;
2446 enum rtx_code code
, op
;
2449 if (!noce_simple_bbs (if_info
))
2452 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2453 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2454 to get the target to tell us... */
2455 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2456 || HONOR_NANS (if_info
->x
))
2459 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2463 /* Verify the condition is of the form we expect, and canonicalize
2464 the comparison code. */
2465 code
= GET_CODE (cond
);
2466 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2468 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2471 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2473 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2475 code
= swap_condition (code
);
2480 /* Determine what sort of operation this is. Note that the code is for
2481 a taken branch, so the code->operation mapping appears backwards. */
2514 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2515 if_info
->a
, if_info
->b
,
2516 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2522 if (target
!= if_info
->x
)
2523 noce_emit_move_insn (if_info
->x
, target
);
2525 seq
= end_ifcvt_sequence (if_info
);
2529 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2530 if_info
->cond
= cond
;
2531 if_info
->cond_earliest
= earliest
;
2536 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2537 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2541 noce_try_abs (struct noce_if_info
*if_info
)
2543 rtx cond
, target
, a
, b
, c
;
2544 rtx_insn
*earliest
, *seq
;
2546 bool one_cmpl
= false;
2548 if (!noce_simple_bbs (if_info
))
2551 /* Reject modes with signed zeros. */
2552 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2555 /* Recognize A and B as constituting an ABS or NABS. The canonical
2556 form is a branch around the negation, taken when the object is the
2557 first operand of a comparison against 0 that evaluates to true. */
2560 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2562 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2567 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2572 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2581 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2585 /* Verify the condition is of the form we expect. */
2586 if (rtx_equal_p (XEXP (cond
, 0), b
))
2588 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2596 /* Verify that C is zero. Search one step backward for a
2597 REG_EQUAL note or a simple source if necessary. */
2601 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2603 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2604 && (set
= single_set (insn
))
2605 && rtx_equal_p (SET_DEST (set
), c
))
2607 rtx note
= find_reg_equal_equiv_note (insn
);
2617 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2618 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2619 c
= get_pool_constant (XEXP (c
, 0));
2621 /* Work around funny ideas get_condition has wrt canonicalization.
2622 Note that these rtx constants are known to be CONST_INT, and
2623 therefore imply integer comparisons.
2624 The one_cmpl case is more complicated, as we want to handle
2625 only x < 0 ? ~x : x or x >= 0 ? x : ~x to one_cmpl_abs (x)
2626 and x < 0 ? x : ~x or x >= 0 ? ~x : x to ~one_cmpl_abs (x),
2627 but not other cases (x > -1 is equivalent of x >= 0). */
2628 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2630 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2635 else if (c
== CONST0_RTX (GET_MODE (b
)))
2638 && GET_CODE (cond
) != GE
2639 && GET_CODE (cond
) != LT
)
2645 /* Determine what sort of operation this is. */
2646 switch (GET_CODE (cond
))
2665 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2668 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2670 /* ??? It's a quandary whether cmove would be better here, especially
2671 for integers. Perhaps combine will clean things up. */
2672 if (target
&& negate
)
2675 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2678 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2688 if (target
!= if_info
->x
)
2689 noce_emit_move_insn (if_info
->x
, target
);
2691 seq
= end_ifcvt_sequence (if_info
);
2695 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2696 if_info
->cond
= cond
;
2697 if_info
->cond_earliest
= earliest
;
2702 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2705 noce_try_sign_mask (struct noce_if_info
*if_info
)
2711 bool t_unconditional
;
2713 if (!noce_simple_bbs (if_info
))
2716 cond
= if_info
->cond
;
2717 code
= GET_CODE (cond
);
2722 if (if_info
->a
== const0_rtx
)
2724 if ((code
== LT
&& c
== const0_rtx
)
2725 || (code
== LE
&& c
== constm1_rtx
))
2728 else if (if_info
->b
== const0_rtx
)
2730 if ((code
== GE
&& c
== const0_rtx
)
2731 || (code
== GT
&& c
== constm1_rtx
))
2735 if (! t
|| side_effects_p (t
))
2738 /* We currently don't handle different modes. */
2739 mode
= GET_MODE (t
);
2740 if (GET_MODE (m
) != mode
)
2743 /* This is only profitable if T is unconditionally executed/evaluated in the
2744 original insn sequence or T is cheap. The former happens if B is the
2745 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2746 INSN_B which can happen for e.g. conditional stores to memory. For the
2747 cost computation use the block TEST_BB where the evaluation will end up
2748 after the transformation. */
2751 && (if_info
->insn_b
== NULL_RTX
2752 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2753 if (!(t_unconditional
2754 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2755 < COSTS_N_INSNS (2))))
2759 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2760 "(signed) m >> 31" directly. This benefits targets with specialized
2761 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2762 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2763 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2772 noce_emit_move_insn (if_info
->x
, t
);
2774 seq
= end_ifcvt_sequence (if_info
);
2778 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2783 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2787 noce_try_bitop (struct noce_if_info
*if_info
)
2789 rtx cond
, x
, a
, result
;
2796 cond
= if_info
->cond
;
2797 code
= GET_CODE (cond
);
2799 if (!noce_simple_bbs (if_info
))
2802 /* Check for no else condition. */
2803 if (! rtx_equal_p (x
, if_info
->b
))
2806 /* Check for a suitable condition. */
2807 if (code
!= NE
&& code
!= EQ
)
2809 if (XEXP (cond
, 1) != const0_rtx
)
2811 cond
= XEXP (cond
, 0);
2813 /* ??? We could also handle AND here. */
2814 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2816 if (XEXP (cond
, 1) != const1_rtx
2817 || !CONST_INT_P (XEXP (cond
, 2))
2818 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2820 bitnum
= INTVAL (XEXP (cond
, 2));
2821 mode
= GET_MODE (x
);
2822 if (BITS_BIG_ENDIAN
)
2823 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2824 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2831 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2833 /* Check for "if (X & C) x = x op C". */
2834 if (! rtx_equal_p (x
, XEXP (a
, 0))
2835 || !CONST_INT_P (XEXP (a
, 1))
2836 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2837 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2840 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2841 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2842 if (GET_CODE (a
) == IOR
)
2843 result
= (code
== NE
) ? a
: NULL_RTX
;
2844 else if (code
== NE
)
2846 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2847 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2848 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2852 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2853 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2854 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2857 else if (GET_CODE (a
) == AND
)
2859 /* Check for "if (X & C) x &= ~C". */
2860 if (! rtx_equal_p (x
, XEXP (a
, 0))
2861 || !CONST_INT_P (XEXP (a
, 1))
2862 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2863 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2866 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2867 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2868 result
= (code
== EQ
) ? a
: NULL_RTX
;
2876 noce_emit_move_insn (x
, result
);
2877 seq
= end_ifcvt_sequence (if_info
);
2881 emit_insn_before_setloc (seq
, if_info
->jump
,
2882 INSN_LOCATION (if_info
->insn_a
));
2888 /* Similar to get_condition, only the resulting condition must be
2889 valid at JUMP, instead of at EARLIEST.
2891 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2892 THEN block of the caller, and we have to reverse the condition. */
2895 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2900 if (! any_condjump_p (jump
))
2903 set
= pc_set (jump
);
2905 /* If this branches to JUMP_LABEL when the condition is false,
2906 reverse the condition. */
2907 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2908 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2910 /* We may have to reverse because the caller's if block is not canonical,
2911 i.e. the THEN block isn't the fallthrough block for the TEST block
2912 (see find_if_header). */
2913 if (then_else_reversed
)
2916 /* If the condition variable is a register and is MODE_INT, accept it. */
2918 cond
= XEXP (SET_SRC (set
), 0);
2919 tmp
= XEXP (cond
, 0);
2920 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2921 && (GET_MODE (tmp
) != BImode
2922 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2927 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2928 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2932 /* Otherwise, fall back on canonicalize_condition to do the dirty
2933 work of manipulating MODE_CC values and COMPARE rtx codes. */
2934 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2935 NULL_RTX
, have_cbranchcc4
, true);
2937 /* We don't handle side-effects in the condition, like handling
2938 REG_INC notes and making sure no duplicate conditions are emitted. */
2939 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2945 /* Return true if OP is ok for if-then-else processing. */
2948 noce_operand_ok (const_rtx op
)
2950 if (side_effects_p (op
))
2953 /* We special-case memories, so handle any of them with
2954 no address side effects. */
2956 return ! side_effects_p (XEXP (op
, 0));
2958 return ! may_trap_p (op
);
2961 /* Return true if X contains a MEM subrtx. */
2964 contains_mem_rtx_p (rtx x
)
2966 subrtx_iterator::array_type array
;
2967 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
2974 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
2975 The condition used in this if-conversion is in COND.
2976 In practice, check that TEST_BB ends with a single set
2977 x := a and all previous computations
2978 in TEST_BB don't produce any values that are live after TEST_BB.
2979 In other words, all the insns in TEST_BB are there only
2980 to compute a value for x. Put the rtx cost of the insns
2981 in TEST_BB into COST. Record whether TEST_BB is a single simple
2982 set instruction in SIMPLE_P. */
2985 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
2986 unsigned int *cost
, bool *simple_p
)
2991 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
2992 rtx last_set
= NULL_RTX
;
2994 rtx cc
= cc_in_cond (cond
);
2996 if (!insn_valid_noce_process_p (last_insn
, cc
))
2998 last_set
= single_set (last_insn
);
3000 rtx x
= SET_DEST (last_set
);
3001 rtx_insn
*first_insn
= first_active_insn (test_bb
);
3002 rtx first_set
= single_set (first_insn
);
3007 /* We have a single simple set, that's okay. */
3008 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3010 if (first_insn
== last_insn
)
3012 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3013 *cost
= insn_rtx_cost (first_set
, speed_p
);
3017 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3018 gcc_assert (prev_last_insn
);
3020 /* For now, disallow setting x multiple times in test_bb. */
3021 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3024 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3026 /* The regs that are live out of test_bb. */
3027 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3029 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
3031 FOR_BB_INSNS (test_bb
, insn
)
3033 if (insn
!= last_insn
)
3035 if (!active_insn_p (insn
))
3038 if (!insn_valid_noce_process_p (insn
, cc
))
3039 goto free_bitmap_and_fail
;
3041 rtx sset
= single_set (insn
);
3044 if (contains_mem_rtx_p (SET_SRC (sset
))
3045 || !REG_P (SET_DEST (sset
))
3046 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3047 goto free_bitmap_and_fail
;
3049 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3050 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3054 /* If any of the intermediate results in test_bb are live after test_bb
3056 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3057 goto free_bitmap_and_fail
;
3059 BITMAP_FREE (test_bb_temps
);
3060 *cost
= potential_cost
;
3064 free_bitmap_and_fail
:
3065 BITMAP_FREE (test_bb_temps
);
3069 /* We have something like:
3072 { i = a; j = b; k = c; }
3076 tmp_i = (x > y) ? a : i;
3077 tmp_j = (x > y) ? b : j;
3078 tmp_k = (x > y) ? c : k;
3083 Subsequent passes are expected to clean up the extra moves.
3085 Look for special cases such as writes to one register which are
3086 read back in another SET, as might occur in a swap idiom or
3095 Which we want to rewrite to:
3097 tmp_i = (x > y) ? a : i;
3098 tmp_j = (x > y) ? tmp_i : j;
3102 We can catch these when looking at (SET x y) by keeping a list of the
3103 registers we would have targeted before if-conversion and looking back
3104 through it for an overlap with Y. If we find one, we rewire the
3105 conditional set to use the temporary we introduced earlier.
3107 IF_INFO contains the useful information about the block structure and
3108 jump instructions. */
3111 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3113 basic_block test_bb
= if_info
->test_bb
;
3114 basic_block then_bb
= if_info
->then_bb
;
3115 basic_block join_bb
= if_info
->join_bb
;
3116 rtx_insn
*jump
= if_info
->jump
;
3117 rtx_insn
*cond_earliest
;
3122 /* Decompose the condition attached to the jump. */
3123 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3124 rtx x
= XEXP (cond
, 0);
3125 rtx y
= XEXP (cond
, 1);
3126 rtx_code cond_code
= GET_CODE (cond
);
3128 /* The true targets for a conditional move. */
3129 auto_vec
<rtx
> targets
;
3130 /* The temporaries introduced to allow us to not consider register
3132 auto_vec
<rtx
> temporaries
;
3133 /* The insns we've emitted. */
3134 auto_vec
<rtx_insn
*> unmodified_insns
;
3137 FOR_BB_INSNS (then_bb
, insn
)
3139 /* Skip over non-insns. */
3140 if (!active_insn_p (insn
))
3143 rtx set
= single_set (insn
);
3144 gcc_checking_assert (set
);
3146 rtx target
= SET_DEST (set
);
3147 rtx temp
= gen_reg_rtx (GET_MODE (target
));
3148 rtx new_val
= SET_SRC (set
);
3149 rtx old_val
= target
;
3151 /* If we were supposed to read from an earlier write in this block,
3152 we've changed the register allocation. Rewire the read. While
3153 we are looking, also try to catch a swap idiom. */
3154 for (int i
= count
- 1; i
>= 0; --i
)
3155 if (reg_overlap_mentioned_p (new_val
, targets
[i
]))
3157 /* Catch a "swap" style idiom. */
3158 if (find_reg_note (insn
, REG_DEAD
, new_val
) != NULL_RTX
)
3159 /* The write to targets[i] is only live until the read
3160 here. As the condition codes match, we can propagate
3162 new_val
= SET_SRC (single_set (unmodified_insns
[i
]));
3164 new_val
= temporaries
[i
];
3168 /* If we had a non-canonical conditional jump (i.e. one where
3169 the fallthrough is to the "else" case) we need to reverse
3170 the conditional select. */
3171 if (if_info
->then_else_reversed
)
3172 std::swap (old_val
, new_val
);
3174 /* Actually emit the conditional move. */
3175 rtx temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3176 x
, y
, new_val
, old_val
);
3178 /* If we failed to expand the conditional move, drop out and don't
3180 if (temp_dest
== NULL_RTX
)
3188 targets
.safe_push (target
);
3189 temporaries
.safe_push (temp_dest
);
3190 unmodified_insns
.safe_push (insn
);
3193 /* We must have seen some sort of insn to insert, otherwise we were
3194 given an empty BB to convert, and we can't handle that. */
3195 gcc_assert (!unmodified_insns
.is_empty ());
3197 /* Now fixup the assignments. */
3198 for (int i
= 0; i
< count
; i
++)
3199 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3201 /* Actually emit the sequence. */
3202 rtx_insn
*seq
= get_insns ();
3204 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3205 set_used_flags (insn
);
3207 /* Mark all our temporaries and targets as used. */
3208 for (int i
= 0; i
< count
; i
++)
3210 set_used_flags (temporaries
[i
]);
3211 set_used_flags (targets
[i
]);
3214 set_used_flags (cond
);
3218 unshare_all_rtl_in_chain (seq
);
3224 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3226 || recog_memoized (insn
) == -1)
3229 emit_insn_before_setloc (seq
, if_info
->jump
,
3230 INSN_LOCATION (unmodified_insns
.last ()));
3232 /* Clean up THEN_BB and the edges in and out of it. */
3233 remove_edge (find_edge (test_bb
, join_bb
));
3234 remove_edge (find_edge (then_bb
, join_bb
));
3235 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3236 delete_basic_block (then_bb
);
3239 /* Maybe merge blocks now the jump is simple enough. */
3240 if (can_merge_blocks_p (test_bb
, join_bb
))
3242 merge_blocks (test_bb
, join_bb
);
3246 num_updated_if_blocks
++;
3250 /* Return true iff basic block TEST_BB is comprised of only
3251 (SET (REG) (REG)) insns suitable for conversion to a series
3252 of conditional moves. FORNOW: Use II to find the expected cost of
3253 the branch into/over TEST_BB.
3255 TODO: This creates an implicit "magic number" for branch_cost.
3256 II->branch_cost now guides the maximum number of set instructions in
3257 a basic block which is considered profitable to completely
3261 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
,
3262 struct noce_if_info
*ii
)
3266 unsigned param
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3267 unsigned limit
= MIN (ii
->branch_cost
, param
);
3269 FOR_BB_INSNS (test_bb
, insn
)
3271 /* Skip over notes etc. */
3272 if (!active_insn_p (insn
))
3275 /* We only handle SET insns. */
3276 rtx set
= single_set (insn
);
3277 if (set
== NULL_RTX
)
3280 rtx dest
= SET_DEST (set
);
3281 rtx src
= SET_SRC (set
);
3283 /* We can possibly relax this, but for now only handle REG to REG
3284 moves. This avoids any issues that might come from introducing
3285 loads/stores that might violate data-race-freedom guarantees. */
3286 if (!(REG_P (src
) && REG_P (dest
)))
3289 /* Destination must be appropriate for a conditional write. */
3290 if (!noce_operand_ok (dest
))
3293 /* We must be able to conditionally move in this mode. */
3294 if (!can_conditionally_move_p (GET_MODE (dest
)))
3297 /* FORNOW: Our cost model is a count of the number of instructions we
3298 would if-convert. This is suboptimal, and should be improved as part
3299 of a wider rework of branch_cost. */
3300 if (++count
> limit
)
3307 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3308 it without using conditional execution. Return TRUE if we were successful
3309 at converting the block. */
3312 noce_process_if_block (struct noce_if_info
*if_info
)
3314 basic_block test_bb
= if_info
->test_bb
; /* test block */
3315 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3316 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3317 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3318 rtx_insn
*jump
= if_info
->jump
;
3319 rtx cond
= if_info
->cond
;
3320 rtx_insn
*insn_a
, *insn_b
;
3322 rtx orig_x
, x
, a
, b
;
3324 /* We're looking for patterns of the form
3326 (1) if (...) x = a; else x = b;
3327 (2) x = b; if (...) x = a;
3328 (3) if (...) x = a; // as if with an initial x = x.
3329 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3330 The later patterns require jumps to be more expensive.
3331 For the if (...) x = a; else x = b; case we allow multiple insns
3332 inside the then and else blocks as long as their only effect is
3333 to calculate a value for x.
3334 ??? For future expansion, further expand the "multiple X" rules. */
3336 /* First look for multiple SETS. */
3338 && HAVE_conditional_move
3340 && bb_ok_for_noce_convert_multiple_sets (then_bb
, if_info
))
3342 if (noce_convert_multiple_sets (if_info
))
3346 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3347 &if_info
->then_simple
))
3351 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3352 &if_info
->else_simple
))
3355 insn_a
= last_active_insn (then_bb
, FALSE
);
3356 set_a
= single_set (insn_a
);
3359 x
= SET_DEST (set_a
);
3360 a
= SET_SRC (set_a
);
3362 /* Look for the other potential set. Make sure we've got equivalent
3364 /* ??? This is overconservative. Storing to two different mems is
3365 as easy as conditionally computing the address. Storing to a
3366 single mem merely requires a scratch memory to use as one of the
3367 destination addresses; often the memory immediately below the
3368 stack pointer is available for this. */
3372 insn_b
= last_active_insn (else_bb
, FALSE
);
3373 set_b
= single_set (insn_b
);
3376 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3381 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3382 /* We're going to be moving the evaluation of B down from above
3383 COND_EARLIEST to JUMP. Make sure the relevant data is still
3386 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3387 || !NONJUMP_INSN_P (insn_b
)
3388 || (set_b
= single_set (insn_b
)) == NULL_RTX
3389 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3390 || ! noce_operand_ok (SET_SRC (set_b
))
3391 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3392 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3393 /* Avoid extending the lifetime of hard registers on small
3394 register class machines. */
3395 || (REG_P (SET_SRC (set_b
))
3396 && HARD_REGISTER_P (SET_SRC (set_b
))
3397 && targetm
.small_register_classes_for_mode_p
3398 (GET_MODE (SET_SRC (set_b
))))
3399 /* Likewise with X. In particular this can happen when
3400 noce_get_condition looks farther back in the instruction
3401 stream than one might expect. */
3402 || reg_overlap_mentioned_p (x
, cond
)
3403 || reg_overlap_mentioned_p (x
, a
)
3404 || modified_between_p (x
, insn_b
, jump
))
3411 /* If x has side effects then only the if-then-else form is safe to
3412 convert. But even in that case we would need to restore any notes
3413 (such as REG_INC) at then end. That can be tricky if
3414 noce_emit_move_insn expands to more than one insn, so disable the
3415 optimization entirely for now if there are side effects. */
3416 if (side_effects_p (x
))
3419 b
= (set_b
? SET_SRC (set_b
) : x
);
3421 /* Only operate on register destinations, and even then avoid extending
3422 the lifetime of hard registers on small register class machines. */
3424 if_info
->orig_x
= orig_x
;
3426 || (HARD_REGISTER_P (x
)
3427 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3429 if (GET_MODE (x
) == BLKmode
)
3432 if (GET_CODE (x
) == ZERO_EXTRACT
3433 && (!CONST_INT_P (XEXP (x
, 1))
3434 || !CONST_INT_P (XEXP (x
, 2))))
3437 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3438 ? XEXP (x
, 0) : x
));
3441 /* Don't operate on sources that may trap or are volatile. */
3442 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3446 /* Set up the info block for our subroutines. */
3447 if_info
->insn_a
= insn_a
;
3448 if_info
->insn_b
= insn_b
;
3453 /* Try optimizations in some approximation of a useful order. */
3454 /* ??? Should first look to see if X is live incoming at all. If it
3455 isn't, we don't need anything but an unconditional set. */
3457 /* Look and see if A and B are really the same. Avoid creating silly
3458 cmove constructs that no one will fix up later. */
3459 if (noce_simple_bbs (if_info
)
3460 && rtx_interchangeable_p (a
, b
))
3462 /* If we have an INSN_B, we don't have to create any new rtl. Just
3463 move the instruction that we already have. If we don't have an
3464 INSN_B, that means that A == X, and we've got a noop move. In
3465 that case don't do anything and let the code below delete INSN_A. */
3466 if (insn_b
&& else_bb
)
3470 if (else_bb
&& insn_b
== BB_END (else_bb
))
3471 BB_END (else_bb
) = PREV_INSN (insn_b
);
3472 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3474 /* If there was a REG_EQUAL note, delete it since it may have been
3475 true due to this insn being after a jump. */
3476 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3477 remove_note (insn_b
, note
);
3481 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3482 x must be executed twice. */
3483 else if (insn_b
&& side_effects_p (orig_x
))
3490 if (!set_b
&& MEM_P (orig_x
))
3491 /* We want to avoid store speculation to avoid cases like
3492 if (pthread_mutex_trylock(mutex))
3494 Rather than go to much effort here, we rely on the SSA optimizers,
3495 which do a good enough job these days. */
3498 if (noce_try_move (if_info
))
3500 if (noce_try_store_flag (if_info
))
3502 if (noce_try_bitop (if_info
))
3504 if (noce_try_minmax (if_info
))
3506 if (noce_try_abs (if_info
))
3508 if (noce_try_inverse_constants (if_info
))
3510 if (!targetm
.have_conditional_execution ()
3511 && noce_try_store_flag_constants (if_info
))
3513 if (HAVE_conditional_move
3514 && noce_try_cmove (if_info
))
3516 if (! targetm
.have_conditional_execution ())
3518 if (noce_try_addcc (if_info
))
3520 if (noce_try_store_flag_mask (if_info
))
3522 if (HAVE_conditional_move
3523 && noce_try_cmove_arith (if_info
))
3525 if (noce_try_sign_mask (if_info
))
3529 if (!else_bb
&& set_b
)
3541 /* If we used a temporary, fix it up now. */
3547 noce_emit_move_insn (orig_x
, x
);
3549 set_used_flags (orig_x
);
3550 unshare_all_rtl_in_chain (seq
);
3553 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3556 /* The original THEN and ELSE blocks may now be removed. The test block
3557 must now jump to the join block. If the test block and the join block
3558 can be merged, do so. */
3561 delete_basic_block (else_bb
);
3565 remove_edge (find_edge (test_bb
, join_bb
));
3567 remove_edge (find_edge (then_bb
, join_bb
));
3568 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3569 delete_basic_block (then_bb
);
3572 if (can_merge_blocks_p (test_bb
, join_bb
))
3574 merge_blocks (test_bb
, join_bb
);
3578 num_updated_if_blocks
++;
3582 /* Check whether a block is suitable for conditional move conversion.
3583 Every insn must be a simple set of a register to a constant or a
3584 register. For each assignment, store the value in the pointer map
3585 VALS, keyed indexed by register pointer, then store the register
3586 pointer in REGS. COND is the condition we will test. */
3589 check_cond_move_block (basic_block bb
,
3590 hash_map
<rtx
, rtx
> *vals
,
3595 rtx cc
= cc_in_cond (cond
);
3597 /* We can only handle simple jumps at the end of the basic block.
3598 It is almost impossible to update the CFG otherwise. */
3600 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3603 FOR_BB_INSNS (bb
, insn
)
3607 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3609 set
= single_set (insn
);
3613 dest
= SET_DEST (set
);
3614 src
= SET_SRC (set
);
3616 || (HARD_REGISTER_P (dest
)
3617 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3620 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3623 if (side_effects_p (src
) || side_effects_p (dest
))
3626 if (may_trap_p (src
) || may_trap_p (dest
))
3629 /* Don't try to handle this if the source register was
3630 modified earlier in the block. */
3633 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3634 && vals
->get (SUBREG_REG (src
))))
3637 /* Don't try to handle this if the destination register was
3638 modified earlier in the block. */
3639 if (vals
->get (dest
))
3642 /* Don't try to handle this if the condition uses the
3643 destination register. */
3644 if (reg_overlap_mentioned_p (dest
, cond
))
3647 /* Don't try to handle this if the source register is modified
3648 later in the block. */
3649 if (!CONSTANT_P (src
)
3650 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3653 /* Skip it if the instruction to be moved might clobber CC. */
3654 if (cc
&& set_of (cc
, insn
))
3657 vals
->put (dest
, src
);
3659 regs
->safe_push (dest
);
3665 /* Given a basic block BB suitable for conditional move conversion,
3666 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3667 the register values depending on COND, emit the insns in the block as
3668 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3669 processed. The caller has started a sequence for the conversion.
3670 Return true if successful, false if something goes wrong. */
3673 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3674 basic_block bb
, rtx cond
,
3675 hash_map
<rtx
, rtx
> *then_vals
,
3676 hash_map
<rtx
, rtx
> *else_vals
,
3681 rtx cond_arg0
, cond_arg1
;
3683 code
= GET_CODE (cond
);
3684 cond_arg0
= XEXP (cond
, 0);
3685 cond_arg1
= XEXP (cond
, 1);
3687 FOR_BB_INSNS (bb
, insn
)
3689 rtx set
, target
, dest
, t
, e
;
3691 /* ??? Maybe emit conditional debug insn? */
3692 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3694 set
= single_set (insn
);
3695 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3697 dest
= SET_DEST (set
);
3699 rtx
*then_slot
= then_vals
->get (dest
);
3700 rtx
*else_slot
= else_vals
->get (dest
);
3701 t
= then_slot
? *then_slot
: NULL_RTX
;
3702 e
= else_slot
? *else_slot
: NULL_RTX
;
3706 /* If this register was set in the then block, we already
3707 handled this case there. */
3720 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3726 noce_emit_move_insn (dest
, target
);
3732 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3733 it using only conditional moves. Return TRUE if we were successful at
3734 converting the block. */
3737 cond_move_process_if_block (struct noce_if_info
*if_info
)
3739 basic_block test_bb
= if_info
->test_bb
;
3740 basic_block then_bb
= if_info
->then_bb
;
3741 basic_block else_bb
= if_info
->else_bb
;
3742 basic_block join_bb
= if_info
->join_bb
;
3743 rtx_insn
*jump
= if_info
->jump
;
3744 rtx cond
= if_info
->cond
;
3745 rtx_insn
*seq
, *loc_insn
;
3748 vec
<rtx
> then_regs
= vNULL
;
3749 vec
<rtx
> else_regs
= vNULL
;
3751 int success_p
= FALSE
;
3752 int limit
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3754 /* Build a mapping for each block to the value used for each
3756 hash_map
<rtx
, rtx
> then_vals
;
3757 hash_map
<rtx
, rtx
> else_vals
;
3759 /* Make sure the blocks are suitable. */
3760 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3762 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3765 /* Make sure the blocks can be used together. If the same register
3766 is set in both blocks, and is not set to a constant in both
3767 cases, then both blocks must set it to the same register. We
3768 have already verified that if it is set to a register, that the
3769 source register does not change after the assignment. Also count
3770 the number of registers set in only one of the blocks. */
3772 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3774 rtx
*then_slot
= then_vals
.get (reg
);
3775 rtx
*else_slot
= else_vals
.get (reg
);
3777 gcc_checking_assert (then_slot
);
3782 rtx then_val
= *then_slot
;
3783 rtx else_val
= *else_slot
;
3784 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3785 && !rtx_equal_p (then_val
, else_val
))
3790 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3791 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3793 gcc_checking_assert (else_vals
.get (reg
));
3794 if (!then_vals
.get (reg
))
3798 /* Make sure it is reasonable to convert this block. What matters
3799 is the number of assignments currently made in only one of the
3800 branches, since if we convert we are going to always execute
3802 if (c
> MAX_CONDITIONAL_EXECUTE
3806 /* Try to emit the conditional moves. First do the then block,
3807 then do anything left in the else blocks. */
3809 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3810 &then_vals
, &else_vals
, false)
3812 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3813 &then_vals
, &else_vals
, true)))
3818 seq
= end_ifcvt_sequence (if_info
);
3822 loc_insn
= first_active_insn (then_bb
);
3825 loc_insn
= first_active_insn (else_bb
);
3826 gcc_assert (loc_insn
);
3828 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3832 delete_basic_block (else_bb
);
3836 remove_edge (find_edge (test_bb
, join_bb
));
3838 remove_edge (find_edge (then_bb
, join_bb
));
3839 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3840 delete_basic_block (then_bb
);
3843 if (can_merge_blocks_p (test_bb
, join_bb
))
3845 merge_blocks (test_bb
, join_bb
);
3849 num_updated_if_blocks
++;
3853 then_regs
.release ();
3854 else_regs
.release ();
3859 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3860 IF-THEN-ELSE-JOIN block.
3862 If so, we'll try to convert the insns to not require the branch,
3863 using only transformations that do not require conditional execution.
3865 Return TRUE if we were successful at converting the block. */
3868 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3871 basic_block then_bb
, else_bb
, join_bb
;
3872 bool then_else_reversed
= false;
3875 rtx_insn
*cond_earliest
;
3876 struct noce_if_info if_info
;
3878 /* We only ever should get here before reload. */
3879 gcc_assert (!reload_completed
);
3881 /* Recognize an IF-THEN-ELSE-JOIN block. */
3882 if (single_pred_p (then_edge
->dest
)
3883 && single_succ_p (then_edge
->dest
)
3884 && single_pred_p (else_edge
->dest
)
3885 && single_succ_p (else_edge
->dest
)
3886 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3888 then_bb
= then_edge
->dest
;
3889 else_bb
= else_edge
->dest
;
3890 join_bb
= single_succ (then_bb
);
3892 /* Recognize an IF-THEN-JOIN block. */
3893 else if (single_pred_p (then_edge
->dest
)
3894 && single_succ_p (then_edge
->dest
)
3895 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3897 then_bb
= then_edge
->dest
;
3898 else_bb
= NULL_BLOCK
;
3899 join_bb
= else_edge
->dest
;
3901 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3902 of basic blocks in cfglayout mode does not matter, so the fallthrough
3903 edge can go to any basic block (and not just to bb->next_bb, like in
3905 else if (single_pred_p (else_edge
->dest
)
3906 && single_succ_p (else_edge
->dest
)
3907 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3909 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3910 To make this work, we have to invert the THEN and ELSE blocks
3911 and reverse the jump condition. */
3912 then_bb
= else_edge
->dest
;
3913 else_bb
= NULL_BLOCK
;
3914 join_bb
= single_succ (then_bb
);
3915 then_else_reversed
= true;
3918 /* Not a form we can handle. */
3921 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3922 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3925 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3928 num_possible_if_blocks
++;
3933 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3934 (else_bb
) ? "-ELSE" : "",
3935 pass
, test_bb
->index
, then_bb
->index
);
3938 fprintf (dump_file
, ", else %d", else_bb
->index
);
3940 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3943 /* If the conditional jump is more than just a conditional
3944 jump, then we can not do if-conversion on this block. */
3945 jump
= BB_END (test_bb
);
3946 if (! onlyjump_p (jump
))
3949 /* If this is not a standard conditional jump, we can't parse it. */
3950 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3954 /* We must be comparing objects whose modes imply the size. */
3955 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3958 /* Initialize an IF_INFO struct to pass around. */
3959 memset (&if_info
, 0, sizeof if_info
);
3960 if_info
.test_bb
= test_bb
;
3961 if_info
.then_bb
= then_bb
;
3962 if_info
.else_bb
= else_bb
;
3963 if_info
.join_bb
= join_bb
;
3964 if_info
.cond
= cond
;
3965 if_info
.cond_earliest
= cond_earliest
;
3966 if_info
.jump
= jump
;
3967 if_info
.then_else_reversed
= then_else_reversed
;
3968 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3969 predictable_edge_p (then_edge
));
3971 /* Do the real work. */
3973 if (noce_process_if_block (&if_info
))
3976 if (HAVE_conditional_move
3977 && cond_move_process_if_block (&if_info
))
3984 /* Merge the blocks and mark for local life update. */
3987 merge_if_block (struct ce_if_block
* ce_info
)
3989 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3990 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3991 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3992 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3993 basic_block combo_bb
;
3995 /* All block merging is done into the lower block numbers. */
3998 df_set_bb_dirty (test_bb
);
4000 /* Merge any basic blocks to handle && and || subtests. Each of
4001 the blocks are on the fallthru path from the predecessor block. */
4002 if (ce_info
->num_multiple_test_blocks
> 0)
4004 basic_block bb
= test_bb
;
4005 basic_block last_test_bb
= ce_info
->last_test_bb
;
4006 basic_block fallthru
= block_fallthru (bb
);
4011 fallthru
= block_fallthru (bb
);
4012 merge_blocks (combo_bb
, bb
);
4015 while (bb
!= last_test_bb
);
4018 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4019 label, but it might if there were || tests. That label's count should be
4020 zero, and it normally should be removed. */
4024 /* If THEN_BB has no successors, then there's a BARRIER after it.
4025 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4026 is no longer needed, and in fact it is incorrect to leave it in
4028 if (EDGE_COUNT (then_bb
->succs
) == 0
4029 && EDGE_COUNT (combo_bb
->succs
) > 1)
4031 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4032 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4033 end
= NEXT_INSN (end
);
4035 if (end
&& BARRIER_P (end
))
4038 merge_blocks (combo_bb
, then_bb
);
4042 /* The ELSE block, if it existed, had a label. That label count
4043 will almost always be zero, but odd things can happen when labels
4044 get their addresses taken. */
4047 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4048 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4049 is no longer needed, and in fact it is incorrect to leave it in
4051 if (EDGE_COUNT (else_bb
->succs
) == 0
4052 && EDGE_COUNT (combo_bb
->succs
) > 1)
4054 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4055 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4056 end
= NEXT_INSN (end
);
4058 if (end
&& BARRIER_P (end
))
4061 merge_blocks (combo_bb
, else_bb
);
4065 /* If there was no join block reported, that means it was not adjacent
4066 to the others, and so we cannot merge them. */
4070 rtx_insn
*last
= BB_END (combo_bb
);
4072 /* The outgoing edge for the current COMBO block should already
4073 be correct. Verify this. */
4074 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4075 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4076 || (NONJUMP_INSN_P (last
)
4077 && GET_CODE (PATTERN (last
)) == TRAP_IF
4078 && (TRAP_CONDITION (PATTERN (last
))
4079 == const_true_rtx
)));
4082 /* There should still be something at the end of the THEN or ELSE
4083 blocks taking us to our final destination. */
4084 gcc_assert (JUMP_P (last
)
4085 || (EDGE_SUCC (combo_bb
, 0)->dest
4086 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4088 && SIBLING_CALL_P (last
))
4089 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4090 && can_throw_internal (last
)));
4093 /* The JOIN block may have had quite a number of other predecessors too.
4094 Since we've already merged the TEST, THEN and ELSE blocks, we should
4095 have only one remaining edge from our if-then-else diamond. If there
4096 is more than one remaining edge, it must come from elsewhere. There
4097 may be zero incoming edges if the THEN block didn't actually join
4098 back up (as with a call to a non-return function). */
4099 else if (EDGE_COUNT (join_bb
->preds
) < 2
4100 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4102 /* We can merge the JOIN cleanly and update the dataflow try
4103 again on this pass.*/
4104 merge_blocks (combo_bb
, join_bb
);
4109 /* We cannot merge the JOIN. */
4111 /* The outgoing edge for the current COMBO block should already
4112 be correct. Verify this. */
4113 gcc_assert (single_succ_p (combo_bb
)
4114 && single_succ (combo_bb
) == join_bb
);
4116 /* Remove the jump and cruft from the end of the COMBO block. */
4117 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4118 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4121 num_updated_if_blocks
++;
4124 /* Find a block ending in a simple IF condition and try to transform it
4125 in some way. When converting a multi-block condition, put the new code
4126 in the first such block and delete the rest. Return a pointer to this
4127 first block if some transformation was done. Return NULL otherwise. */
4130 find_if_header (basic_block test_bb
, int pass
)
4132 ce_if_block ce_info
;
4136 /* The kind of block we're looking for has exactly two successors. */
4137 if (EDGE_COUNT (test_bb
->succs
) != 2)
4140 then_edge
= EDGE_SUCC (test_bb
, 0);
4141 else_edge
= EDGE_SUCC (test_bb
, 1);
4143 if (df_get_bb_dirty (then_edge
->dest
))
4145 if (df_get_bb_dirty (else_edge
->dest
))
4148 /* Neither edge should be abnormal. */
4149 if ((then_edge
->flags
& EDGE_COMPLEX
)
4150 || (else_edge
->flags
& EDGE_COMPLEX
))
4153 /* Nor exit the loop. */
4154 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4155 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4158 /* The THEN edge is canonically the one that falls through. */
4159 if (then_edge
->flags
& EDGE_FALLTHRU
)
4161 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4162 std::swap (then_edge
, else_edge
);
4164 /* Otherwise this must be a multiway branch of some sort. */
4167 memset (&ce_info
, 0, sizeof (ce_info
));
4168 ce_info
.test_bb
= test_bb
;
4169 ce_info
.then_bb
= then_edge
->dest
;
4170 ce_info
.else_bb
= else_edge
->dest
;
4171 ce_info
.pass
= pass
;
4173 #ifdef IFCVT_MACHDEP_INIT
4174 IFCVT_MACHDEP_INIT (&ce_info
);
4177 if (!reload_completed
4178 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4181 if (reload_completed
4182 && targetm
.have_conditional_execution ()
4183 && cond_exec_find_if_block (&ce_info
))
4186 if (targetm
.have_trap ()
4187 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4188 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4191 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4192 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4194 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4196 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4204 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4205 /* Set this so we continue looking. */
4206 cond_exec_changed_p
= TRUE
;
4207 return ce_info
.test_bb
;
4210 /* Return true if a block has two edges, one of which falls through to the next
4211 block, and the other jumps to a specific block, so that we can tell if the
4212 block is part of an && test or an || test. Returns either -1 or the number
4213 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4216 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4219 int fallthru_p
= FALSE
;
4226 if (!cur_bb
|| !target_bb
)
4229 /* If no edges, obviously it doesn't jump or fallthru. */
4230 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4233 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4235 if (cur_edge
->flags
& EDGE_COMPLEX
)
4236 /* Anything complex isn't what we want. */
4239 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4242 else if (cur_edge
->dest
== target_bb
)
4249 if ((jump_p
& fallthru_p
) == 0)
4252 /* Don't allow calls in the block, since this is used to group && and ||
4253 together for conditional execution support. ??? we should support
4254 conditional execution support across calls for IA-64 some day, but
4255 for now it makes the code simpler. */
4256 end
= BB_END (cur_bb
);
4257 insn
= BB_HEAD (cur_bb
);
4259 while (insn
!= NULL_RTX
)
4266 && !DEBUG_INSN_P (insn
)
4267 && GET_CODE (PATTERN (insn
)) != USE
4268 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4274 insn
= NEXT_INSN (insn
);
4280 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4281 block. If so, we'll try to convert the insns to not require the branch.
4282 Return TRUE if we were successful at converting the block. */
4285 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4287 basic_block test_bb
= ce_info
->test_bb
;
4288 basic_block then_bb
= ce_info
->then_bb
;
4289 basic_block else_bb
= ce_info
->else_bb
;
4290 basic_block join_bb
= NULL_BLOCK
;
4295 ce_info
->last_test_bb
= test_bb
;
4297 /* We only ever should get here after reload,
4298 and if we have conditional execution. */
4299 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4301 /* Discover if any fall through predecessors of the current test basic block
4302 were && tests (which jump to the else block) or || tests (which jump to
4304 if (single_pred_p (test_bb
)
4305 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4307 basic_block bb
= single_pred (test_bb
);
4308 basic_block target_bb
;
4309 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4312 /* Determine if the preceding block is an && or || block. */
4313 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4315 ce_info
->and_and_p
= TRUE
;
4316 target_bb
= else_bb
;
4318 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4320 ce_info
->and_and_p
= FALSE
;
4321 target_bb
= then_bb
;
4324 target_bb
= NULL_BLOCK
;
4326 if (target_bb
&& n_insns
<= max_insns
)
4328 int total_insns
= 0;
4331 ce_info
->last_test_bb
= test_bb
;
4333 /* Found at least one && or || block, look for more. */
4336 ce_info
->test_bb
= test_bb
= bb
;
4337 total_insns
+= n_insns
;
4340 if (!single_pred_p (bb
))
4343 bb
= single_pred (bb
);
4344 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4346 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4348 ce_info
->num_multiple_test_blocks
= blocks
;
4349 ce_info
->num_multiple_test_insns
= total_insns
;
4351 if (ce_info
->and_and_p
)
4352 ce_info
->num_and_and_blocks
= blocks
;
4354 ce_info
->num_or_or_blocks
= blocks
;
4358 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4359 other than any || blocks which jump to the THEN block. */
4360 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4363 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4364 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4366 if (cur_edge
->flags
& EDGE_COMPLEX
)
4370 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4372 if (cur_edge
->flags
& EDGE_COMPLEX
)
4376 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4377 if (EDGE_COUNT (then_bb
->succs
) > 0
4378 && (!single_succ_p (then_bb
)
4379 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4380 || (epilogue_completed
4381 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4384 /* If the THEN block has no successors, conditional execution can still
4385 make a conditional call. Don't do this unless the ELSE block has
4386 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4387 Check for the last insn of the THEN block being an indirect jump, which
4388 is listed as not having any successors, but confuses the rest of the CE
4389 code processing. ??? we should fix this in the future. */
4390 if (EDGE_COUNT (then_bb
->succs
) == 0)
4392 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4394 rtx_insn
*last_insn
= BB_END (then_bb
);
4397 && NOTE_P (last_insn
)
4398 && last_insn
!= BB_HEAD (then_bb
))
4399 last_insn
= PREV_INSN (last_insn
);
4402 && JUMP_P (last_insn
)
4403 && ! simplejump_p (last_insn
))
4407 else_bb
= NULL_BLOCK
;
4413 /* If the THEN block's successor is the other edge out of the TEST block,
4414 then we have an IF-THEN combo without an ELSE. */
4415 else if (single_succ (then_bb
) == else_bb
)
4418 else_bb
= NULL_BLOCK
;
4421 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4422 has exactly one predecessor and one successor, and the outgoing edge
4423 is not complex, then we have an IF-THEN-ELSE combo. */
4424 else if (single_succ_p (else_bb
)
4425 && single_succ (then_bb
) == single_succ (else_bb
)
4426 && single_pred_p (else_bb
)
4427 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4428 && !(epilogue_completed
4429 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4430 join_bb
= single_succ (else_bb
);
4432 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4436 num_possible_if_blocks
++;
4441 "\nIF-THEN%s block found, pass %d, start block %d "
4442 "[insn %d], then %d [%d]",
4443 (else_bb
) ? "-ELSE" : "",
4446 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4448 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4451 fprintf (dump_file
, ", else %d [%d]",
4453 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4455 fprintf (dump_file
, ", join %d [%d]",
4457 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4459 if (ce_info
->num_multiple_test_blocks
> 0)
4460 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4461 ce_info
->num_multiple_test_blocks
,
4462 (ce_info
->and_and_p
) ? "&&" : "||",
4463 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4464 ce_info
->last_test_bb
->index
,
4465 ((BB_HEAD (ce_info
->last_test_bb
))
4466 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4469 fputc ('\n', dump_file
);
4472 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4473 first condition for free, since we've already asserted that there's a
4474 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4475 we checked the FALLTHRU flag, those are already adjacent to the last IF
4477 /* ??? As an enhancement, move the ELSE block. Have to deal with
4478 BLOCK notes, if by no other means than backing out the merge if they
4479 exist. Sticky enough I don't want to think about it now. */
4481 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4483 if ((next
= next
->next_bb
) != join_bb
4484 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4492 /* Do the real work. */
4494 ce_info
->else_bb
= else_bb
;
4495 ce_info
->join_bb
= join_bb
;
4497 /* If we have && and || tests, try to first handle combining the && and ||
4498 tests into the conditional code, and if that fails, go back and handle
4499 it without the && and ||, which at present handles the && case if there
4500 was no ELSE block. */
4501 if (cond_exec_process_if_block (ce_info
, TRUE
))
4504 if (ce_info
->num_multiple_test_blocks
)
4508 if (cond_exec_process_if_block (ce_info
, FALSE
))
4515 /* Convert a branch over a trap, or a branch
4516 to a trap, into a conditional trap. */
4519 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4521 basic_block then_bb
= then_edge
->dest
;
4522 basic_block else_bb
= else_edge
->dest
;
4523 basic_block other_bb
, trap_bb
;
4524 rtx_insn
*trap
, *jump
;
4526 rtx_insn
*cond_earliest
;
4529 /* Locate the block with the trap instruction. */
4530 /* ??? While we look for no successors, we really ought to allow
4531 EH successors. Need to fix merge_if_block for that to work. */
4532 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4533 trap_bb
= then_bb
, other_bb
= else_bb
;
4534 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4535 trap_bb
= else_bb
, other_bb
= then_bb
;
4541 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4542 test_bb
->index
, trap_bb
->index
);
4545 /* If this is not a standard conditional jump, we can't parse it. */
4546 jump
= BB_END (test_bb
);
4547 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4551 /* If the conditional jump is more than just a conditional jump, then
4552 we can not do if-conversion on this block. Give up for returnjump_p,
4553 changing a conditional return followed by unconditional trap for
4554 conditional trap followed by unconditional return is likely not
4555 beneficial and harder to handle. */
4556 if (! onlyjump_p (jump
) || returnjump_p (jump
))
4559 /* We must be comparing objects whose modes imply the size. */
4560 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4563 /* Reverse the comparison code, if necessary. */
4564 code
= GET_CODE (cond
);
4565 if (then_bb
== trap_bb
)
4567 code
= reversed_comparison_code (cond
, jump
);
4568 if (code
== UNKNOWN
)
4572 /* Attempt to generate the conditional trap. */
4573 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4574 copy_rtx (XEXP (cond
, 1)),
4575 TRAP_CODE (PATTERN (trap
)));
4579 /* Emit the new insns before cond_earliest. */
4580 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4582 /* Delete the trap block if possible. */
4583 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4584 df_set_bb_dirty (test_bb
);
4585 df_set_bb_dirty (then_bb
);
4586 df_set_bb_dirty (else_bb
);
4588 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4590 delete_basic_block (trap_bb
);
4594 /* Wire together the blocks again. */
4595 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4596 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4597 else if (trap_bb
== then_bb
)
4599 rtx lab
= JUMP_LABEL (jump
);
4600 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4601 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4602 LABEL_NUSES (lab
) += 1;
4603 JUMP_LABEL (newjump
) = lab
;
4604 emit_barrier_after (newjump
);
4608 if (can_merge_blocks_p (test_bb
, other_bb
))
4610 merge_blocks (test_bb
, other_bb
);
4614 num_updated_if_blocks
++;
4618 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4622 block_has_only_trap (basic_block bb
)
4626 /* We're not the exit block. */
4627 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4630 /* The block must have no successors. */
4631 if (EDGE_COUNT (bb
->succs
) > 0)
4634 /* The only instruction in the THEN block must be the trap. */
4635 trap
= first_active_insn (bb
);
4636 if (! (trap
== BB_END (bb
)
4637 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4638 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4644 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4645 transformable, but not necessarily the other. There need be no
4648 Return TRUE if we were successful at converting the block.
4650 Cases we'd like to look at:
4653 if (test) goto over; // x not live
4661 if (! test) goto label;
4664 if (test) goto E; // x not live
4678 (3) // This one's really only interesting for targets that can do
4679 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4680 // it results in multiple branches on a cache line, which often
4681 // does not sit well with predictors.
4683 if (test1) goto E; // predicted not taken
4699 (A) Don't do (2) if the branch is predicted against the block we're
4700 eliminating. Do it anyway if we can eliminate a branch; this requires
4701 that the sole successor of the eliminated block postdominate the other
4704 (B) With CE, on (3) we can steal from both sides of the if, creating
4713 Again, this is most useful if J postdominates.
4715 (C) CE substitutes for helpful life information.
4717 (D) These heuristics need a lot of work. */
4719 /* Tests for case 1 above. */
4722 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4724 basic_block then_bb
= then_edge
->dest
;
4725 basic_block else_bb
= else_edge
->dest
;
4727 int then_bb_index
, then_prob
;
4728 rtx else_target
= NULL_RTX
;
4730 /* If we are partitioning hot/cold basic blocks, we don't want to
4731 mess up unconditional or indirect jumps that cross between hot
4734 Basic block partitioning may result in some jumps that appear to
4735 be optimizable (or blocks that appear to be mergeable), but which really
4736 must be left untouched (they are required to make it safely across
4737 partition boundaries). See the comments at the top of
4738 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4740 if ((BB_END (then_bb
)
4741 && JUMP_P (BB_END (then_bb
))
4742 && CROSSING_JUMP_P (BB_END (then_bb
)))
4743 || (BB_END (test_bb
)
4744 && JUMP_P (BB_END (test_bb
))
4745 && CROSSING_JUMP_P (BB_END (test_bb
)))
4746 || (BB_END (else_bb
)
4747 && JUMP_P (BB_END (else_bb
))
4748 && CROSSING_JUMP_P (BB_END (else_bb
))))
4751 /* THEN has one successor. */
4752 if (!single_succ_p (then_bb
))
4755 /* THEN does not fall through, but is not strange either. */
4756 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4759 /* THEN has one predecessor. */
4760 if (!single_pred_p (then_bb
))
4763 /* THEN must do something. */
4764 if (forwarder_block_p (then_bb
))
4767 num_possible_if_blocks
++;
4770 "\nIF-CASE-1 found, start %d, then %d\n",
4771 test_bb
->index
, then_bb
->index
);
4773 if (then_edge
->probability
)
4774 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4776 then_prob
= REG_BR_PROB_BASE
/ 2;
4778 /* We're speculating from the THEN path, we want to make sure the cost
4779 of speculation is within reason. */
4780 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4781 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4782 predictable_edge_p (then_edge
)))))
4785 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4787 rtx_insn
*jump
= BB_END (else_edge
->src
);
4788 gcc_assert (JUMP_P (jump
));
4789 else_target
= JUMP_LABEL (jump
);
4792 /* Registers set are dead, or are predicable. */
4793 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4794 single_succ_edge (then_bb
), 1))
4797 /* Conversion went ok, including moving the insns and fixing up the
4798 jump. Adjust the CFG to match. */
4800 /* We can avoid creating a new basic block if then_bb is immediately
4801 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4802 through to else_bb. */
4804 if (then_bb
->next_bb
== else_bb
4805 && then_bb
->prev_bb
== test_bb
4806 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4808 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4811 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4812 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4813 else_bb
, else_target
);
4815 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4818 df_set_bb_dirty (test_bb
);
4819 df_set_bb_dirty (else_bb
);
4821 then_bb_index
= then_bb
->index
;
4822 delete_basic_block (then_bb
);
4824 /* Make rest of code believe that the newly created block is the THEN_BB
4825 block we removed. */
4828 df_bb_replace (then_bb_index
, new_bb
);
4829 /* This should have been done above via force_nonfallthru_and_redirect
4830 (possibly called from redirect_edge_and_branch_force). */
4831 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4835 num_updated_if_blocks
++;
4839 /* Test for case 2 above. */
4842 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4844 basic_block then_bb
= then_edge
->dest
;
4845 basic_block else_bb
= else_edge
->dest
;
4847 int then_prob
, else_prob
;
4849 /* We do not want to speculate (empty) loop latches. */
4851 && else_bb
->loop_father
->latch
== else_bb
)
4854 /* If we are partitioning hot/cold basic blocks, we don't want to
4855 mess up unconditional or indirect jumps that cross between hot
4858 Basic block partitioning may result in some jumps that appear to
4859 be optimizable (or blocks that appear to be mergeable), but which really
4860 must be left untouched (they are required to make it safely across
4861 partition boundaries). See the comments at the top of
4862 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4864 if ((BB_END (then_bb
)
4865 && JUMP_P (BB_END (then_bb
))
4866 && CROSSING_JUMP_P (BB_END (then_bb
)))
4867 || (BB_END (test_bb
)
4868 && JUMP_P (BB_END (test_bb
))
4869 && CROSSING_JUMP_P (BB_END (test_bb
)))
4870 || (BB_END (else_bb
)
4871 && JUMP_P (BB_END (else_bb
))
4872 && CROSSING_JUMP_P (BB_END (else_bb
))))
4875 /* ELSE has one successor. */
4876 if (!single_succ_p (else_bb
))
4879 else_succ
= single_succ_edge (else_bb
);
4881 /* ELSE outgoing edge is not complex. */
4882 if (else_succ
->flags
& EDGE_COMPLEX
)
4885 /* ELSE has one predecessor. */
4886 if (!single_pred_p (else_bb
))
4889 /* THEN is not EXIT. */
4890 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4893 if (else_edge
->probability
)
4895 else_prob
= else_edge
->probability
;
4896 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4900 else_prob
= REG_BR_PROB_BASE
/ 2;
4901 then_prob
= REG_BR_PROB_BASE
/ 2;
4904 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4905 if (else_prob
> then_prob
)
4907 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4908 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4914 num_possible_if_blocks
++;
4917 "\nIF-CASE-2 found, start %d, else %d\n",
4918 test_bb
->index
, else_bb
->index
);
4920 /* We're speculating from the ELSE path, we want to make sure the cost
4921 of speculation is within reason. */
4922 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4923 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4924 predictable_edge_p (else_edge
)))))
4927 /* Registers set are dead, or are predicable. */
4928 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4931 /* Conversion went ok, including moving the insns and fixing up the
4932 jump. Adjust the CFG to match. */
4934 df_set_bb_dirty (test_bb
);
4935 df_set_bb_dirty (then_bb
);
4936 delete_basic_block (else_bb
);
4939 num_updated_if_blocks
++;
4941 /* ??? We may now fallthru from one of THEN's successors into a join
4942 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4947 /* Used by the code above to perform the actual rtl transformations.
4948 Return TRUE if successful.
4950 TEST_BB is the block containing the conditional branch. MERGE_BB
4951 is the block containing the code to manipulate. DEST_EDGE is an
4952 edge representing a jump to the join block; after the conversion,
4953 TEST_BB should be branching to its destination.
4954 REVERSEP is true if the sense of the branch should be reversed. */
4957 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4958 basic_block other_bb
, edge dest_edge
, int reversep
)
4960 basic_block new_dest
= dest_edge
->dest
;
4961 rtx_insn
*head
, *end
, *jump
;
4962 rtx_insn
*earliest
= NULL
;
4964 bitmap merge_set
= NULL
;
4965 /* Number of pending changes. */
4966 int n_validated_changes
= 0;
4967 rtx new_dest_label
= NULL_RTX
;
4969 jump
= BB_END (test_bb
);
4971 /* Find the extent of the real code in the merge block. */
4972 head
= BB_HEAD (merge_bb
);
4973 end
= BB_END (merge_bb
);
4975 while (DEBUG_INSN_P (end
) && end
!= head
)
4976 end
= PREV_INSN (end
);
4978 /* If merge_bb ends with a tablejump, predicating/moving insn's
4979 into test_bb and then deleting merge_bb will result in the jumptable
4980 that follows merge_bb being removed along with merge_bb and then we
4981 get an unresolved reference to the jumptable. */
4982 if (tablejump_p (end
, NULL
, NULL
))
4986 head
= NEXT_INSN (head
);
4987 while (DEBUG_INSN_P (head
) && head
!= end
)
4988 head
= NEXT_INSN (head
);
4996 head
= NEXT_INSN (head
);
4997 while (DEBUG_INSN_P (head
) && head
!= end
)
4998 head
= NEXT_INSN (head
);
5003 if (!onlyjump_p (end
))
5010 end
= PREV_INSN (end
);
5011 while (DEBUG_INSN_P (end
) && end
!= head
)
5012 end
= PREV_INSN (end
);
5015 /* Don't move frame-related insn across the conditional branch. This
5016 can lead to one of the paths of the branch having wrong unwind info. */
5017 if (epilogue_completed
)
5019 rtx_insn
*insn
= head
;
5022 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5026 insn
= NEXT_INSN (insn
);
5030 /* Disable handling dead code by conditional execution if the machine needs
5031 to do anything funny with the tests, etc. */
5032 #ifndef IFCVT_MODIFY_TESTS
5033 if (targetm
.have_conditional_execution ())
5035 /* In the conditional execution case, we have things easy. We know
5036 the condition is reversible. We don't have to check life info
5037 because we're going to conditionally execute the code anyway.
5038 All that's left is making sure the insns involved can actually
5043 cond
= cond_exec_get_condition (jump
);
5047 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5048 int prob_val
= (note
? XINT (note
, 0) : -1);
5052 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5055 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5058 prob_val
= REG_BR_PROB_BASE
- prob_val
;
5061 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5062 && verify_changes (0))
5063 n_validated_changes
= num_validated_changes ();
5071 /* If we allocated new pseudos (e.g. in the conditional move
5072 expander called from noce_emit_cmove), we must resize the
5074 if (max_regno
< max_reg_num ())
5075 max_regno
= max_reg_num ();
5077 /* Try the NCE path if the CE path did not result in any changes. */
5078 if (n_validated_changes
== 0)
5085 /* In the non-conditional execution case, we have to verify that there
5086 are no trapping operations, no calls, no references to memory, and
5087 that any registers modified are dead at the branch site. */
5089 if (!any_condjump_p (jump
))
5092 /* Find the extent of the conditional. */
5093 cond
= noce_get_condition (jump
, &earliest
, false);
5097 live
= BITMAP_ALLOC (®_obstack
);
5098 simulate_backwards_to_point (merge_bb
, live
, end
);
5099 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5101 df_get_live_in (other_bb
), NULL
);
5106 /* Collect the set of registers set in MERGE_BB. */
5107 merge_set
= BITMAP_ALLOC (®_obstack
);
5109 FOR_BB_INSNS (merge_bb
, insn
)
5110 if (NONDEBUG_INSN_P (insn
))
5111 df_simulate_find_defs (insn
, merge_set
);
5113 /* If shrink-wrapping, disable this optimization when test_bb is
5114 the first basic block and merge_bb exits. The idea is to not
5115 move code setting up a return register as that may clobber a
5116 register used to pass function parameters, which then must be
5117 saved in caller-saved regs. A caller-saved reg requires the
5118 prologue, killing a shrink-wrap opportunity. */
5119 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5120 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5121 && single_succ_p (new_dest
)
5122 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5123 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5128 return_regs
= BITMAP_ALLOC (®_obstack
);
5130 /* Start off with the intersection of regs used to pass
5131 params and regs used to return values. */
5132 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5133 if (FUNCTION_ARG_REGNO_P (i
)
5134 && targetm
.calls
.function_value_regno_p (i
))
5135 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5137 bitmap_and_into (return_regs
,
5138 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5139 bitmap_and_into (return_regs
,
5140 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5141 if (!bitmap_empty_p (return_regs
))
5143 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5144 if (NONDEBUG_INSN_P (insn
))
5148 /* If this insn sets any reg in return_regs, add all
5149 reg uses to the set of regs we're interested in. */
5150 FOR_EACH_INSN_DEF (def
, insn
)
5151 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5153 df_simulate_uses (insn
, return_regs
);
5157 if (bitmap_intersect_p (merge_set
, return_regs
))
5159 BITMAP_FREE (return_regs
);
5160 BITMAP_FREE (merge_set
);
5164 BITMAP_FREE (return_regs
);
5169 /* We don't want to use normal invert_jump or redirect_jump because
5170 we don't want to delete_insn called. Also, we want to do our own
5171 change group management. */
5173 old_dest
= JUMP_LABEL (jump
);
5174 if (other_bb
!= new_dest
)
5176 if (!any_condjump_p (jump
))
5179 if (JUMP_P (BB_END (dest_edge
->src
)))
5180 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5181 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5182 new_dest_label
= ret_rtx
;
5184 new_dest_label
= block_label (new_dest
);
5186 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5188 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5189 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5193 if (verify_changes (n_validated_changes
))
5194 confirm_change_group ();
5198 if (other_bb
!= new_dest
)
5200 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5203 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5206 std::swap (BRANCH_EDGE (test_bb
)->count
,
5207 FALLTHRU_EDGE (test_bb
)->count
);
5208 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5209 FALLTHRU_EDGE (test_bb
)->probability
);
5210 update_br_prob_note (test_bb
);
5214 /* Move the insns out of MERGE_BB to before the branch. */
5219 if (end
== BB_END (merge_bb
))
5220 BB_END (merge_bb
) = PREV_INSN (head
);
5222 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5223 notes being moved might become invalid. */
5229 if (! INSN_P (insn
))
5231 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5234 remove_note (insn
, note
);
5235 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5237 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5238 notes referring to the registers being set might become invalid. */
5244 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5245 remove_reg_equal_equiv_notes_for_regno (i
);
5247 BITMAP_FREE (merge_set
);
5250 reorder_insns (head
, end
, PREV_INSN (earliest
));
5253 /* Remove the jump and edge if we can. */
5254 if (other_bb
== new_dest
)
5257 remove_edge (BRANCH_EDGE (test_bb
));
5258 /* ??? Can't merge blocks here, as then_bb is still in use.
5259 At minimum, the merge will get done just before bb-reorder. */
5268 BITMAP_FREE (merge_set
);
5273 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5274 we are after combine pass. */
5277 if_convert (bool after_combine
)
5284 df_live_add_problem ();
5285 df_live_set_all_dirty ();
5288 /* Record whether we are after combine pass. */
5289 ifcvt_after_combine
= after_combine
;
5290 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5291 != CODE_FOR_nothing
);
5292 num_possible_if_blocks
= 0;
5293 num_updated_if_blocks
= 0;
5294 num_true_changes
= 0;
5296 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5297 mark_loop_exit_edges ();
5298 loop_optimizer_finalize ();
5299 free_dominance_info (CDI_DOMINATORS
);
5301 /* Compute postdominators. */
5302 calculate_dominance_info (CDI_POST_DOMINATORS
);
5304 df_set_flags (DF_LR_RUN_DCE
);
5306 /* Go through each of the basic blocks looking for things to convert. If we
5307 have conditional execution, we make multiple passes to allow us to handle
5308 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5313 /* Only need to do dce on the first pass. */
5314 df_clear_flags (DF_LR_RUN_DCE
);
5315 cond_exec_changed_p
= FALSE
;
5318 #ifdef IFCVT_MULTIPLE_DUMPS
5319 if (dump_file
&& pass
> 1)
5320 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5323 FOR_EACH_BB_FN (bb
, cfun
)
5326 while (!df_get_bb_dirty (bb
)
5327 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5331 #ifdef IFCVT_MULTIPLE_DUMPS
5332 if (dump_file
&& cond_exec_changed_p
)
5333 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5336 while (cond_exec_changed_p
);
5338 #ifdef IFCVT_MULTIPLE_DUMPS
5340 fprintf (dump_file
, "\n\n========== no more changes\n");
5343 free_dominance_info (CDI_POST_DOMINATORS
);
5348 clear_aux_for_blocks ();
5350 /* If we allocated new pseudos, we must resize the array for sched1. */
5351 if (max_regno
< max_reg_num ())
5352 max_regno
= max_reg_num ();
5354 /* Write the final stats. */
5355 if (dump_file
&& num_possible_if_blocks
> 0)
5358 "\n%d possible IF blocks searched.\n",
5359 num_possible_if_blocks
);
5361 "%d IF blocks converted.\n",
5362 num_updated_if_blocks
);
5364 "%d true changes made.\n\n\n",
5369 df_remove_problem (df_live
);
5371 checking_verify_flow_info ();
5374 /* If-conversion and CFG cleanup. */
5376 rest_of_handle_if_conversion (void)
5378 if (flag_if_conversion
)
5382 dump_reg_info (dump_file
);
5383 dump_flow_info (dump_file
, dump_flags
);
5385 cleanup_cfg (CLEANUP_EXPENSIVE
);
5395 const pass_data pass_data_rtl_ifcvt
=
5397 RTL_PASS
, /* type */
5399 OPTGROUP_NONE
, /* optinfo_flags */
5400 TV_IFCVT
, /* tv_id */
5401 0, /* properties_required */
5402 0, /* properties_provided */
5403 0, /* properties_destroyed */
5404 0, /* todo_flags_start */
5405 TODO_df_finish
, /* todo_flags_finish */
5408 class pass_rtl_ifcvt
: public rtl_opt_pass
5411 pass_rtl_ifcvt (gcc::context
*ctxt
)
5412 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5415 /* opt_pass methods: */
5416 virtual bool gate (function
*)
5418 return (optimize
> 0) && dbg_cnt (if_conversion
);
5421 virtual unsigned int execute (function
*)
5423 return rest_of_handle_if_conversion ();
5426 }; // class pass_rtl_ifcvt
5431 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5433 return new pass_rtl_ifcvt (ctxt
);
5437 /* Rerun if-conversion, as combine may have simplified things enough
5438 to now meet sequence length restrictions. */
5442 const pass_data pass_data_if_after_combine
=
5444 RTL_PASS
, /* type */
5446 OPTGROUP_NONE
, /* optinfo_flags */
5447 TV_IFCVT
, /* tv_id */
5448 0, /* properties_required */
5449 0, /* properties_provided */
5450 0, /* properties_destroyed */
5451 0, /* todo_flags_start */
5452 TODO_df_finish
, /* todo_flags_finish */
5455 class pass_if_after_combine
: public rtl_opt_pass
5458 pass_if_after_combine (gcc::context
*ctxt
)
5459 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5462 /* opt_pass methods: */
5463 virtual bool gate (function
*)
5465 return optimize
> 0 && flag_if_conversion
5466 && dbg_cnt (if_after_combine
);
5469 virtual unsigned int execute (function
*)
5475 }; // class pass_if_after_combine
5480 make_pass_if_after_combine (gcc::context
*ctxt
)
5482 return new pass_if_after_combine (ctxt
);
5488 const pass_data pass_data_if_after_reload
=
5490 RTL_PASS
, /* type */
5492 OPTGROUP_NONE
, /* optinfo_flags */
5493 TV_IFCVT2
, /* tv_id */
5494 0, /* properties_required */
5495 0, /* properties_provided */
5496 0, /* properties_destroyed */
5497 0, /* todo_flags_start */
5498 TODO_df_finish
, /* todo_flags_finish */
5501 class pass_if_after_reload
: public rtl_opt_pass
5504 pass_if_after_reload (gcc::context
*ctxt
)
5505 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5508 /* opt_pass methods: */
5509 virtual bool gate (function
*)
5511 return optimize
> 0 && flag_if_conversion2
5512 && dbg_cnt (if_after_reload
);
5515 virtual unsigned int execute (function
*)
5521 }; // class pass_if_after_reload
5526 make_pass_if_after_reload (gcc::context
*ctxt
)
5528 return new pass_if_after_reload (ctxt
);