1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "cfgcleanup.h"
42 #include "tree-pass.h"
44 #include "shrink-wrap.h"
48 #ifndef MAX_CONDITIONAL_EXECUTE
49 #define MAX_CONDITIONAL_EXECUTE \
50 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
54 #define IFCVT_MULTIPLE_DUMPS 1
56 #define NULL_BLOCK ((basic_block) NULL)
58 /* True if after combine pass. */
59 static bool ifcvt_after_combine
;
61 /* True if the target has the cbranchcc4 optab. */
62 static bool have_cbranchcc4
;
64 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
65 static int num_possible_if_blocks
;
67 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
69 static int num_updated_if_blocks
;
71 /* # of changes made. */
72 static int num_true_changes
;
74 /* Whether conditional execution changes were made. */
75 static int cond_exec_changed_p
;
77 /* Forward references. */
78 static int count_bb_insns (const_basic_block
);
79 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
80 static rtx_insn
*first_active_insn (basic_block
);
81 static rtx_insn
*last_active_insn (basic_block
, int);
82 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
83 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
84 static basic_block
block_fallthru (basic_block
);
85 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
87 static rtx
cond_exec_get_condition (rtx_insn
*);
88 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
89 static int noce_operand_ok (const_rtx
);
90 static void merge_if_block (ce_if_block
*);
91 static int find_cond_trap (basic_block
, edge
, edge
);
92 static basic_block
find_if_header (basic_block
, int);
93 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
94 static int noce_find_if_block (basic_block
, edge
, edge
, int);
95 static int cond_exec_find_if_block (ce_if_block
*);
96 static int find_if_case_1 (basic_block
, edge
, edge
);
97 static int find_if_case_2 (basic_block
, edge
, edge
);
98 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
100 static void noce_emit_move_insn (rtx
, rtx
);
101 static rtx_insn
*block_has_only_trap (basic_block
);
103 /* Count the number of non-jump active insns in BB. */
106 count_bb_insns (const_basic_block bb
)
109 rtx_insn
*insn
= BB_HEAD (bb
);
113 if (active_insn_p (insn
) && !JUMP_P (insn
))
116 if (insn
== BB_END (bb
))
118 insn
= NEXT_INSN (insn
);
124 /* Determine whether the total insn_rtx_cost on non-jump insns in
125 basic block BB is less than MAX_COST. This function returns
126 false if the cost of any instruction could not be estimated.
128 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
129 as those insns are being speculated. MAX_COST is scaled with SCALE
130 plus a small fudge factor. */
133 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
136 rtx_insn
*insn
= BB_HEAD (bb
);
137 bool speed
= optimize_bb_for_speed_p (bb
);
139 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
140 applied to insn_rtx_cost when optimizing for size. Only do
141 this after combine because if-conversion might interfere with
142 passes before combine.
144 Use optimize_function_for_speed_p instead of the pre-defined
145 variable speed to make sure it is set to same value for all
146 basic blocks in one if-conversion transformation. */
147 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
148 scale
= REG_BR_PROB_BASE
;
149 /* Our branch probability/scaling factors are just estimates and don't
150 account for cases where we can get speculation for free and other
151 secondary benefits. So we fudge the scale factor to make speculating
152 appear a little more profitable when optimizing for performance. */
154 scale
+= REG_BR_PROB_BASE
/ 8;
161 if (NONJUMP_INSN_P (insn
))
163 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
167 /* If this instruction is the load or set of a "stack" register,
168 such as a floating point register on x87, then the cost of
169 speculatively executing this insn may need to include
170 the additional cost of popping its result off of the
171 register stack. Unfortunately, correctly recognizing and
172 accounting for this additional overhead is tricky, so for
173 now we simply prohibit such speculative execution. */
176 rtx set
= single_set (insn
);
177 if (set
&& STACK_REG_P (SET_DEST (set
)))
183 if (count
>= max_cost
)
186 else if (CALL_P (insn
))
189 if (insn
== BB_END (bb
))
191 insn
= NEXT_INSN (insn
);
197 /* Return the first non-jump active insn in the basic block. */
200 first_active_insn (basic_block bb
)
202 rtx_insn
*insn
= BB_HEAD (bb
);
206 if (insn
== BB_END (bb
))
208 insn
= NEXT_INSN (insn
);
211 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
213 if (insn
== BB_END (bb
))
215 insn
= NEXT_INSN (insn
);
224 /* Return the last non-jump active (non-jump) insn in the basic block. */
227 last_active_insn (basic_block bb
, int skip_use_p
)
229 rtx_insn
*insn
= BB_END (bb
);
230 rtx_insn
*head
= BB_HEAD (bb
);
234 || DEBUG_INSN_P (insn
)
236 && NONJUMP_INSN_P (insn
)
237 && GET_CODE (PATTERN (insn
)) == USE
))
241 insn
= PREV_INSN (insn
);
250 /* Return the active insn before INSN inside basic block CURR_BB. */
253 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
255 if (!insn
|| insn
== BB_HEAD (curr_bb
))
258 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
260 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
263 /* No other active insn all the way to the start of the basic block. */
264 if (insn
== BB_HEAD (curr_bb
))
271 /* Return the active insn after INSN inside basic block CURR_BB. */
274 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
276 if (!insn
|| insn
== BB_END (curr_bb
))
279 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
281 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
284 /* No other active insn all the way to the end of the basic block. */
285 if (insn
== BB_END (curr_bb
))
292 /* Return the basic block reached by falling though the basic block BB. */
295 block_fallthru (basic_block bb
)
297 edge e
= find_fallthru_edge (bb
->succs
);
299 return (e
) ? e
->dest
: NULL_BLOCK
;
302 /* Return true if RTXs A and B can be safely interchanged. */
305 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
307 if (!rtx_equal_p (a
, b
))
310 if (GET_CODE (a
) != MEM
)
313 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
314 reference is not. Interchanging a dead type-unsafe memory reference with
315 a live type-safe one creates a live type-unsafe memory reference, in other
316 words, it makes the program illegal.
317 We check here conservatively whether the two memory references have equal
318 memory attributes. */
320 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
324 /* Go through a bunch of insns, converting them to conditional
325 execution format if possible. Return TRUE if all of the non-note
326 insns were processed. */
329 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
330 /* if block information */rtx_insn
*start
,
331 /* first insn to look at */rtx end
,
332 /* last insn to look at */rtx test
,
333 /* conditional execution test */int prob_val
,
334 /* probability of branch taken. */int mod_ok
)
336 int must_be_last
= FALSE
;
344 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
346 /* dwarf2out can't cope with conditional prologues. */
347 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
350 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
353 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
355 /* dwarf2out can't cope with conditional unwind info. */
356 if (RTX_FRAME_RELATED_P (insn
))
359 /* Remove USE insns that get in the way. */
360 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
362 /* ??? Ug. Actually unlinking the thing is problematic,
363 given what we'd have to coordinate with our callers. */
364 SET_INSN_DELETED (insn
);
368 /* Last insn wasn't last? */
372 if (modified_in_p (test
, insn
))
379 /* Now build the conditional form of the instruction. */
380 pattern
= PATTERN (insn
);
381 xtest
= copy_rtx (test
);
383 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
385 if (GET_CODE (pattern
) == COND_EXEC
)
387 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
390 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
391 COND_EXEC_TEST (pattern
));
392 pattern
= COND_EXEC_CODE (pattern
);
395 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
397 /* If the machine needs to modify the insn being conditionally executed,
398 say for example to force a constant integer operand into a temp
399 register, do so here. */
400 #ifdef IFCVT_MODIFY_INSN
401 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
406 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
408 if (CALL_P (insn
) && prob_val
>= 0)
409 validate_change (insn
, ®_NOTES (insn
),
410 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
411 prob_val
, REG_NOTES (insn
)), 1);
421 /* Return the condition for a jump. Do not do any special processing. */
424 cond_exec_get_condition (rtx_insn
*jump
)
428 if (any_condjump_p (jump
))
429 test_if
= SET_SRC (pc_set (jump
));
432 cond
= XEXP (test_if
, 0);
434 /* If this branches to JUMP_LABEL when the condition is false,
435 reverse the condition. */
436 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
437 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
439 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
443 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
450 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
451 to conditional execution. Return TRUE if we were successful at
452 converting the block. */
455 cond_exec_process_if_block (ce_if_block
* ce_info
,
456 /* if block information */int do_multiple_p
)
458 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
459 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
460 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
461 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
462 rtx_insn
*then_start
; /* first insn in THEN block */
463 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
464 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
465 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
466 int max
; /* max # of insns to convert. */
467 int then_mod_ok
; /* whether conditional mods are ok in THEN */
468 rtx true_expr
; /* test for else block insns */
469 rtx false_expr
; /* test for then block insns */
470 int true_prob_val
; /* probability of else block */
471 int false_prob_val
; /* probability of then block */
472 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
473 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
474 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
475 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
476 int then_n_insns
, else_n_insns
, n_insns
;
477 enum rtx_code false_code
;
480 /* If test is comprised of && or || elements, and we've failed at handling
481 all of them together, just use the last test if it is the special case of
482 && elements without an ELSE block. */
483 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
485 if (else_bb
|| ! ce_info
->and_and_p
)
488 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
489 ce_info
->num_multiple_test_blocks
= 0;
490 ce_info
->num_and_and_blocks
= 0;
491 ce_info
->num_or_or_blocks
= 0;
494 /* Find the conditional jump to the ELSE or JOIN part, and isolate
496 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
500 /* If the conditional jump is more than just a conditional jump,
501 then we can not do conditional execution conversion on this block. */
502 if (! onlyjump_p (BB_END (test_bb
)))
505 /* Collect the bounds of where we're to search, skipping any labels, jumps
506 and notes at the beginning and end of the block. Then count the total
507 number of insns and see if it is small enough to convert. */
508 then_start
= first_active_insn (then_bb
);
509 then_end
= last_active_insn (then_bb
, TRUE
);
510 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
511 n_insns
= then_n_insns
;
512 max
= MAX_CONDITIONAL_EXECUTE
;
519 else_start
= first_active_insn (else_bb
);
520 else_end
= last_active_insn (else_bb
, TRUE
);
521 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
522 n_insns
+= else_n_insns
;
524 /* Look for matching sequences at the head and tail of the two blocks,
525 and limit the range of insns to be converted if possible. */
526 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
527 &then_first_tail
, &else_first_tail
,
529 if (then_first_tail
== BB_HEAD (then_bb
))
530 then_start
= then_end
= NULL
;
531 if (else_first_tail
== BB_HEAD (else_bb
))
532 else_start
= else_end
= NULL
;
537 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
539 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
540 n_insns
-= 2 * n_matching
;
545 && then_n_insns
> n_matching
546 && else_n_insns
> n_matching
)
548 int longest_match
= MIN (then_n_insns
- n_matching
,
549 else_n_insns
- n_matching
);
551 = flow_find_head_matching_sequence (then_bb
, else_bb
,
560 /* We won't pass the insns in the head sequence to
561 cond_exec_process_insns, so we need to test them here
562 to make sure that they don't clobber the condition. */
563 for (insn
= BB_HEAD (then_bb
);
564 insn
!= NEXT_INSN (then_last_head
);
565 insn
= NEXT_INSN (insn
))
566 if (!LABEL_P (insn
) && !NOTE_P (insn
)
567 && !DEBUG_INSN_P (insn
)
568 && modified_in_p (test_expr
, insn
))
572 if (then_last_head
== then_end
)
573 then_start
= then_end
= NULL
;
574 if (else_last_head
== else_end
)
575 else_start
= else_end
= NULL
;
580 then_start
= find_active_insn_after (then_bb
, then_last_head
);
582 else_start
= find_active_insn_after (else_bb
, else_last_head
);
583 n_insns
-= 2 * n_matching
;
591 /* Map test_expr/test_jump into the appropriate MD tests to use on
592 the conditionally executed code. */
594 true_expr
= test_expr
;
596 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
597 if (false_code
!= UNKNOWN
)
598 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
599 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
601 false_expr
= NULL_RTX
;
603 #ifdef IFCVT_MODIFY_TESTS
604 /* If the machine description needs to modify the tests, such as setting a
605 conditional execution register from a comparison, it can do so here. */
606 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
608 /* See if the conversion failed. */
609 if (!true_expr
|| !false_expr
)
613 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
616 true_prob_val
= XINT (note
, 0);
617 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
625 /* If we have && or || tests, do them here. These tests are in the adjacent
626 blocks after the first block containing the test. */
627 if (ce_info
->num_multiple_test_blocks
> 0)
629 basic_block bb
= test_bb
;
630 basic_block last_test_bb
= ce_info
->last_test_bb
;
637 rtx_insn
*start
, *end
;
639 enum rtx_code f_code
;
641 bb
= block_fallthru (bb
);
642 start
= first_active_insn (bb
);
643 end
= last_active_insn (bb
, TRUE
);
645 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
646 false_prob_val
, FALSE
))
649 /* If the conditional jump is more than just a conditional jump, then
650 we can not do conditional execution conversion on this block. */
651 if (! onlyjump_p (BB_END (bb
)))
654 /* Find the conditional jump and isolate the test. */
655 t
= cond_exec_get_condition (BB_END (bb
));
659 f_code
= reversed_comparison_code (t
, BB_END (bb
));
660 if (f_code
== UNKNOWN
)
663 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
664 if (ce_info
->and_and_p
)
666 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
667 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
671 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
672 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
675 /* If the machine description needs to modify the tests, such as
676 setting a conditional execution register from a comparison, it can
678 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
679 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
681 /* See if the conversion failed. */
689 while (bb
!= last_test_bb
);
692 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
693 on then THEN block. */
694 then_mod_ok
= (else_bb
== NULL_BLOCK
);
696 /* Go through the THEN and ELSE blocks converting the insns if possible
697 to conditional execution. */
701 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
702 false_expr
, false_prob_val
,
706 if (else_bb
&& else_end
707 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
708 true_expr
, true_prob_val
, TRUE
))
711 /* If we cannot apply the changes, fail. Do not go through the normal fail
712 processing, since apply_change_group will call cancel_changes. */
713 if (! apply_change_group ())
715 #ifdef IFCVT_MODIFY_CANCEL
716 /* Cancel any machine dependent changes. */
717 IFCVT_MODIFY_CANCEL (ce_info
);
722 #ifdef IFCVT_MODIFY_FINAL
723 /* Do any machine dependent final modifications. */
724 IFCVT_MODIFY_FINAL (ce_info
);
727 /* Conversion succeeded. */
729 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
730 n_insns
, (n_insns
== 1) ? " was" : "s were");
732 /* Merge the blocks! If we had matching sequences, make sure to delete one
733 copy at the appropriate location first: delete the copy in the THEN branch
734 for a tail sequence so that the remaining one is executed last for both
735 branches, and delete the copy in the ELSE branch for a head sequence so
736 that the remaining one is executed first for both branches. */
739 rtx_insn
*from
= then_first_tail
;
741 from
= find_active_insn_after (then_bb
, from
);
742 delete_insn_chain (from
, BB_END (then_bb
), false);
745 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
747 merge_if_block (ce_info
);
748 cond_exec_changed_p
= TRUE
;
752 #ifdef IFCVT_MODIFY_CANCEL
753 /* Cancel any machine dependent changes. */
754 IFCVT_MODIFY_CANCEL (ce_info
);
761 /* Used by noce_process_if_block to communicate with its subroutines.
763 The subroutines know that A and B may be evaluated freely. They
764 know that X is a register. They should insert new instructions
765 before cond_earliest. */
769 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
770 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
772 /* The jump that ends TEST_BB. */
775 /* The jump condition. */
778 /* New insns should be inserted before this one. */
779 rtx_insn
*cond_earliest
;
781 /* Insns in the THEN and ELSE block. There is always just this
782 one insns in those blocks. The insns are single_set insns.
783 If there was no ELSE block, INSN_B is the last insn before
784 COND_EARLIEST, or NULL_RTX. In the former case, the insn
785 operands are still valid, as if INSN_B was moved down below
787 rtx_insn
*insn_a
, *insn_b
;
789 /* The SET_SRC of INSN_A and INSN_B. */
792 /* The SET_DEST of INSN_A. */
795 /* True if this if block is not canonical. In the canonical form of
796 if blocks, the THEN_BB is the block reached via the fallthru edge
797 from TEST_BB. For the noce transformations, we allow the symmetric
799 bool then_else_reversed
;
801 /* True if the contents of then_bb and else_bb are a
802 simple single set instruction. */
806 /* The total rtx cost of the instructions in then_bb and else_bb. */
807 unsigned int then_cost
;
808 unsigned int else_cost
;
810 /* Estimated cost of the particular branch instruction. */
811 unsigned int branch_cost
;
814 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
815 static int noce_try_move (struct noce_if_info
*);
816 static int noce_try_store_flag (struct noce_if_info
*);
817 static int noce_try_addcc (struct noce_if_info
*);
818 static int noce_try_store_flag_constants (struct noce_if_info
*);
819 static int noce_try_store_flag_mask (struct noce_if_info
*);
820 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
822 static int noce_try_cmove (struct noce_if_info
*);
823 static int noce_try_cmove_arith (struct noce_if_info
*);
824 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
825 static int noce_try_minmax (struct noce_if_info
*);
826 static int noce_try_abs (struct noce_if_info
*);
827 static int noce_try_sign_mask (struct noce_if_info
*);
829 /* Helper function for noce_try_store_flag*. */
832 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
835 rtx cond
= if_info
->cond
;
839 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
840 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
842 /* If earliest == jump, or when the condition is complex, try to
843 build the store_flag insn directly. */
847 rtx set
= pc_set (if_info
->jump
);
848 cond
= XEXP (SET_SRC (set
), 0);
849 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
850 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
851 reversep
= !reversep
;
852 if (if_info
->then_else_reversed
)
853 reversep
= !reversep
;
857 code
= reversed_comparison_code (cond
, if_info
->jump
);
859 code
= GET_CODE (cond
);
861 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
862 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
864 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
866 rtx set
= gen_rtx_SET (x
, src
);
869 rtx_insn
*insn
= emit_insn (set
);
871 if (recog_memoized (insn
) >= 0)
873 rtx_insn
*seq
= get_insns ();
877 if_info
->cond_earliest
= if_info
->jump
;
885 /* Don't even try if the comparison operands or the mode of X are weird. */
886 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
889 return emit_store_flag (x
, code
, XEXP (cond
, 0),
890 XEXP (cond
, 1), VOIDmode
,
891 (code
== LTU
|| code
== LEU
892 || code
== GEU
|| code
== GTU
), normalize
);
895 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
896 X is the destination/target and Y is the value to copy. */
899 noce_emit_move_insn (rtx x
, rtx y
)
901 machine_mode outmode
;
905 if (GET_CODE (x
) != STRICT_LOW_PART
)
907 rtx_insn
*seq
, *insn
;
912 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
913 otherwise construct a suitable SET pattern ourselves. */
914 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
915 ? emit_move_insn (x
, y
)
916 : emit_insn (gen_rtx_SET (x
, y
));
920 if (recog_memoized (insn
) <= 0)
922 if (GET_CODE (x
) == ZERO_EXTRACT
)
924 rtx op
= XEXP (x
, 0);
925 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
926 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
928 /* store_bit_field expects START to be relative to
929 BYTES_BIG_ENDIAN and adjusts this value for machines with
930 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
931 invoke store_bit_field again it is necessary to have the START
932 value from the first call. */
933 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
936 start
= BITS_PER_UNIT
- start
- size
;
939 gcc_assert (REG_P (op
));
940 start
= BITS_PER_WORD
- start
- size
;
944 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
945 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
);
949 switch (GET_RTX_CLASS (GET_CODE (y
)))
952 ot
= code_to_optab (GET_CODE (y
));
956 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
957 if (target
!= NULL_RTX
)
960 emit_move_insn (x
, target
);
969 ot
= code_to_optab (GET_CODE (y
));
973 target
= expand_binop (GET_MODE (y
), ot
,
974 XEXP (y
, 0), XEXP (y
, 1),
976 if (target
!= NULL_RTX
)
979 emit_move_insn (x
, target
);
996 inner
= XEXP (outer
, 0);
997 outmode
= GET_MODE (outer
);
998 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
999 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1003 /* Return the CC reg if it is used in COND. */
1006 cc_in_cond (rtx cond
)
1008 if (have_cbranchcc4
&& cond
1009 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1010 return XEXP (cond
, 0);
1015 /* Return sequence of instructions generated by if conversion. This
1016 function calls end_sequence() to end the current stream, ensures
1017 that the instructions are unshared, recognizable non-jump insns.
1018 On failure, this function returns a NULL_RTX. */
1021 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1024 rtx_insn
*seq
= get_insns ();
1025 rtx cc
= cc_in_cond (if_info
->cond
);
1027 set_used_flags (if_info
->x
);
1028 set_used_flags (if_info
->cond
);
1029 set_used_flags (if_info
->a
);
1030 set_used_flags (if_info
->b
);
1032 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1033 set_used_flags (insn
);
1035 unshare_all_rtl_in_chain (seq
);
1038 /* Make sure that all of the instructions emitted are recognizable,
1039 and that we haven't introduced a new jump instruction.
1040 As an exercise for the reader, build a general mechanism that
1041 allows proper placement of required clobbers. */
1042 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1044 || recog_memoized (insn
) == -1
1045 /* Make sure new generated code does not clobber CC. */
1046 || (cc
&& set_of (cc
, insn
)))
1052 /* Return true iff the then and else basic block (if it exists)
1053 consist of a single simple set instruction. */
1056 noce_simple_bbs (struct noce_if_info
*if_info
)
1058 if (!if_info
->then_simple
)
1061 if (if_info
->else_bb
)
1062 return if_info
->else_simple
;
1067 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1068 "if (a == b) x = a; else x = b" into "x = b". */
1071 noce_try_move (struct noce_if_info
*if_info
)
1073 rtx cond
= if_info
->cond
;
1074 enum rtx_code code
= GET_CODE (cond
);
1078 if (code
!= NE
&& code
!= EQ
)
1081 if (!noce_simple_bbs (if_info
))
1084 /* This optimization isn't valid if either A or B could be a NaN
1085 or a signed zero. */
1086 if (HONOR_NANS (if_info
->x
)
1087 || HONOR_SIGNED_ZEROS (if_info
->x
))
1090 /* Check whether the operands of the comparison are A and in
1092 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1093 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1094 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1095 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1097 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1100 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1102 /* Avoid generating the move if the source is the destination. */
1103 if (! rtx_equal_p (if_info
->x
, y
))
1106 noce_emit_move_insn (if_info
->x
, y
);
1107 seq
= end_ifcvt_sequence (if_info
);
1111 emit_insn_before_setloc (seq
, if_info
->jump
,
1112 INSN_LOCATION (if_info
->insn_a
));
1119 /* Convert "if (test) x = 1; else x = 0".
1121 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1122 tried in noce_try_store_flag_constants after noce_try_cmove has had
1123 a go at the conversion. */
1126 noce_try_store_flag (struct noce_if_info
*if_info
)
1132 if (!noce_simple_bbs (if_info
))
1135 if (CONST_INT_P (if_info
->b
)
1136 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1137 && if_info
->a
== const0_rtx
)
1139 else if (if_info
->b
== const0_rtx
1140 && CONST_INT_P (if_info
->a
)
1141 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1142 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1150 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1153 if (target
!= if_info
->x
)
1154 noce_emit_move_insn (if_info
->x
, target
);
1156 seq
= end_ifcvt_sequence (if_info
);
1160 emit_insn_before_setloc (seq
, if_info
->jump
,
1161 INSN_LOCATION (if_info
->insn_a
));
1171 /* Convert "if (test) x = a; else x = b", for A and B constant.
1172 Also allow A = y + c1, B = y + c2, with a common y between A
1176 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1181 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1184 machine_mode mode
= GET_MODE (if_info
->x
);;
1185 rtx common
= NULL_RTX
;
1190 /* Handle cases like x := test ? y + 3 : y + 4. */
1191 if (GET_CODE (a
) == PLUS
1192 && GET_CODE (b
) == PLUS
1193 && CONST_INT_P (XEXP (a
, 1))
1194 && CONST_INT_P (XEXP (b
, 1))
1195 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1196 && noce_operand_ok (XEXP (a
, 0))
1197 && if_info
->branch_cost
>= 2)
1199 common
= XEXP (a
, 0);
1204 if (!noce_simple_bbs (if_info
))
1210 ifalse
= INTVAL (a
);
1212 bool subtract_flag_p
= false;
1214 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1215 /* Make sure we can represent the difference between the two values. */
1217 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1220 diff
= trunc_int_for_mode (diff
, mode
);
1222 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1226 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1229 /* We could collapse these cases but it is easier to follow the
1230 diff/STORE_FLAG_VALUE combinations when they are listed
1234 => 4 + (test != 0). */
1235 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1238 => can_reverse | 4 + (test == 0)
1239 !can_reverse | 3 - (test != 0). */
1240 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1242 reversep
= can_reverse
;
1243 subtract_flag_p
= !can_reverse
;
1244 /* If we need to subtract the flag and we have PLUS-immediate
1245 A and B then it is unlikely to be beneficial to play tricks
1247 if (subtract_flag_p
&& common
)
1251 => can_reverse | 3 + (test == 0)
1252 !can_reverse | 4 - (test != 0). */
1253 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1255 reversep
= can_reverse
;
1256 subtract_flag_p
= !can_reverse
;
1257 /* If we need to subtract the flag and we have PLUS-immediate
1258 A and B then it is unlikely to be beneficial to play tricks
1260 if (subtract_flag_p
&& common
)
1264 => 4 + (test != 0). */
1265 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1270 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1271 && (STORE_FLAG_VALUE
== 1
1272 || if_info
->branch_cost
>= 2))
1274 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1275 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1280 else if (itrue
== -1
1281 && (STORE_FLAG_VALUE
== -1
1282 || if_info
->branch_cost
>= 2))
1284 else if (ifalse
== -1 && can_reverse
1285 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1295 std::swap (itrue
, ifalse
);
1296 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1301 /* If we have x := test ? x + 3 : x + 4 then move the original
1302 x out of the way while we store flags. */
1303 if (common
&& rtx_equal_p (common
, if_info
->x
))
1305 common
= gen_reg_rtx (mode
);
1306 noce_emit_move_insn (common
, if_info
->x
);
1309 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1316 /* if (test) x = 3; else x = 4;
1317 => x = 3 + (test == 0); */
1318 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1320 /* Add the common part now. This may allow combine to merge this
1321 with the store flag operation earlier into some sort of conditional
1322 increment/decrement if the target allows it. */
1324 target
= expand_simple_binop (mode
, PLUS
,
1326 target
, 0, OPTAB_WIDEN
);
1328 /* Always use ifalse here. It should have been swapped with itrue
1329 when appropriate when reversep is true. */
1330 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1331 gen_int_mode (ifalse
, mode
), target
,
1332 if_info
->x
, 0, OPTAB_WIDEN
);
1334 /* Other cases are not beneficial when the original A and B are PLUS
1341 /* if (test) x = 8; else x = 0;
1342 => x = (test != 0) << 3; */
1343 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1345 target
= expand_simple_binop (mode
, ASHIFT
,
1346 target
, GEN_INT (tmp
), if_info
->x
, 0,
1350 /* if (test) x = -1; else x = b;
1351 => x = -(test != 0) | b; */
1352 else if (itrue
== -1)
1354 target
= expand_simple_binop (mode
, IOR
,
1355 target
, gen_int_mode (ifalse
, mode
),
1356 if_info
->x
, 0, OPTAB_WIDEN
);
1370 if (target
!= if_info
->x
)
1371 noce_emit_move_insn (if_info
->x
, target
);
1373 seq
= end_ifcvt_sequence (if_info
);
1377 emit_insn_before_setloc (seq
, if_info
->jump
,
1378 INSN_LOCATION (if_info
->insn_a
));
1385 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1386 similarly for "foo--". */
1389 noce_try_addcc (struct noce_if_info
*if_info
)
1393 int subtract
, normalize
;
1395 if (!noce_simple_bbs (if_info
))
1398 if (GET_CODE (if_info
->a
) == PLUS
1399 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1400 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1403 rtx cond
= if_info
->cond
;
1404 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1406 /* First try to use addcc pattern. */
1407 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1408 && general_operand (XEXP (cond
, 1), VOIDmode
))
1411 target
= emit_conditional_add (if_info
->x
, code
,
1416 XEXP (if_info
->a
, 1),
1417 GET_MODE (if_info
->x
),
1418 (code
== LTU
|| code
== GEU
1419 || code
== LEU
|| code
== GTU
));
1422 if (target
!= if_info
->x
)
1423 noce_emit_move_insn (if_info
->x
, target
);
1425 seq
= end_ifcvt_sequence (if_info
);
1429 emit_insn_before_setloc (seq
, if_info
->jump
,
1430 INSN_LOCATION (if_info
->insn_a
));
1436 /* If that fails, construct conditional increment or decrement using
1438 if (if_info
->branch_cost
>= 2
1439 && (XEXP (if_info
->a
, 1) == const1_rtx
1440 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1443 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1444 subtract
= 0, normalize
= 0;
1445 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1446 subtract
= 1, normalize
= 0;
1448 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1451 target
= noce_emit_store_flag (if_info
,
1452 gen_reg_rtx (GET_MODE (if_info
->x
)),
1456 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1457 subtract
? MINUS
: PLUS
,
1458 if_info
->b
, target
, if_info
->x
,
1462 if (target
!= if_info
->x
)
1463 noce_emit_move_insn (if_info
->x
, target
);
1465 seq
= end_ifcvt_sequence (if_info
);
1469 emit_insn_before_setloc (seq
, if_info
->jump
,
1470 INSN_LOCATION (if_info
->insn_a
));
1480 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1483 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1489 if (!noce_simple_bbs (if_info
))
1493 if ((if_info
->branch_cost
>= 2
1494 || STORE_FLAG_VALUE
== -1)
1495 && ((if_info
->a
== const0_rtx
1496 && rtx_equal_p (if_info
->b
, if_info
->x
))
1497 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1500 && if_info
->b
== const0_rtx
1501 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1504 target
= noce_emit_store_flag (if_info
,
1505 gen_reg_rtx (GET_MODE (if_info
->x
)),
1508 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1510 target
, if_info
->x
, 0,
1515 int old_cost
, new_cost
, insn_cost
;
1518 if (target
!= if_info
->x
)
1519 noce_emit_move_insn (if_info
->x
, target
);
1521 seq
= end_ifcvt_sequence (if_info
);
1525 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1526 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1527 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1528 new_cost
= seq_cost (seq
, speed_p
);
1530 if (new_cost
> old_cost
)
1533 emit_insn_before_setloc (seq
, if_info
->jump
,
1534 INSN_LOCATION (if_info
->insn_a
));
1544 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1547 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1548 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1550 rtx target ATTRIBUTE_UNUSED
;
1551 int unsignedp ATTRIBUTE_UNUSED
;
1553 /* If earliest == jump, try to build the cmove insn directly.
1554 This is helpful when combine has created some complex condition
1555 (like for alpha's cmovlbs) that we can't hope to regenerate
1556 through the normal interface. */
1558 if (if_info
->cond_earliest
== if_info
->jump
)
1560 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1561 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1562 cond
, vtrue
, vfalse
);
1563 rtx set
= gen_rtx_SET (x
, if_then_else
);
1566 rtx_insn
*insn
= emit_insn (set
);
1568 if (recog_memoized (insn
) >= 0)
1570 rtx_insn
*seq
= get_insns ();
1580 /* Don't even try if the comparison operands are weird
1581 except that the target supports cbranchcc4. */
1582 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1583 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1585 if (!have_cbranchcc4
1586 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1587 || cmp_b
!= const0_rtx
)
1591 unsignedp
= (code
== LTU
|| code
== GEU
1592 || code
== LEU
|| code
== GTU
);
1594 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1595 vtrue
, vfalse
, GET_MODE (x
),
1600 /* We might be faced with a situation like:
1603 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1604 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1606 We can't do a conditional move in mode M, but it's possible that we
1607 could do a conditional move in mode N instead and take a subreg of
1610 If we can't create new pseudos, though, don't bother. */
1611 if (reload_completed
)
1614 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1616 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1617 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1618 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1619 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1620 rtx promoted_target
;
1622 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1623 || byte_vtrue
!= byte_vfalse
1624 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1625 != SUBREG_PROMOTED_VAR_P (vfalse
))
1626 || (SUBREG_PROMOTED_GET (vtrue
)
1627 != SUBREG_PROMOTED_GET (vfalse
)))
1630 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1632 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1633 VOIDmode
, reg_vtrue
, reg_vfalse
,
1634 GET_MODE (reg_vtrue
), unsignedp
);
1635 /* Nope, couldn't do it in that mode either. */
1639 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1640 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1641 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1642 emit_move_insn (x
, target
);
1649 /* Try only simple constants and registers here. More complex cases
1650 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1651 has had a go at it. */
1654 noce_try_cmove (struct noce_if_info
*if_info
)
1660 if (!noce_simple_bbs (if_info
))
1663 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1664 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1668 code
= GET_CODE (if_info
->cond
);
1669 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1670 XEXP (if_info
->cond
, 0),
1671 XEXP (if_info
->cond
, 1),
1672 if_info
->a
, if_info
->b
);
1676 if (target
!= if_info
->x
)
1677 noce_emit_move_insn (if_info
->x
, target
);
1679 seq
= end_ifcvt_sequence (if_info
);
1683 emit_insn_before_setloc (seq
, if_info
->jump
,
1684 INSN_LOCATION (if_info
->insn_a
));
1687 /* If both a and b are constants try a last-ditch transformation:
1688 if (test) x = a; else x = b;
1689 => x = (-(test != 0) & (b - a)) + a;
1690 Try this only if the target-specific expansion above has failed.
1691 The target-specific expander may want to generate sequences that
1692 we don't know about, so give them a chance before trying this
1694 else if (!targetm
.have_conditional_execution ()
1695 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1696 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1697 || if_info
->branch_cost
>= 3))
1699 machine_mode mode
= GET_MODE (if_info
->x
);
1700 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1701 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1702 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1709 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1710 /* Make sure we can represent the difference
1711 between the two values. */
1713 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1719 diff
= trunc_int_for_mode (diff
, mode
);
1720 target
= expand_simple_binop (mode
, AND
,
1721 target
, gen_int_mode (diff
, mode
),
1722 if_info
->x
, 0, OPTAB_WIDEN
);
1724 target
= expand_simple_binop (mode
, PLUS
,
1725 target
, gen_int_mode (ifalse
, mode
),
1726 if_info
->x
, 0, OPTAB_WIDEN
);
1729 if (target
!= if_info
->x
)
1730 noce_emit_move_insn (if_info
->x
, target
);
1732 seq
= end_ifcvt_sequence (if_info
);
1736 emit_insn_before_setloc (seq
, if_info
->jump
,
1737 INSN_LOCATION (if_info
->insn_a
));
1753 /* Return true if X contains a conditional code mode rtx. */
1756 contains_ccmode_rtx_p (rtx x
)
1758 subrtx_iterator::array_type array
;
1759 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1760 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1766 /* Helper for bb_valid_for_noce_process_p. Validate that
1767 the rtx insn INSN is a single set that does not set
1768 the conditional register CC and is in general valid for
1772 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1775 || !NONJUMP_INSN_P (insn
)
1776 || (cc
&& set_of (cc
, insn
)))
1779 rtx sset
= single_set (insn
);
1781 /* Currently support only simple single sets in test_bb. */
1783 || !noce_operand_ok (SET_DEST (sset
))
1784 || contains_ccmode_rtx_p (SET_DEST (sset
))
1785 || !noce_operand_ok (SET_SRC (sset
)))
1792 /* Return true iff the registers that the insns in BB_A set do not
1793 get used in BB_B. */
1796 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
)
1799 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1804 FOR_BB_INSNS (bb_a
, a_insn
)
1806 if (!active_insn_p (a_insn
))
1809 rtx sset_a
= single_set (a_insn
);
1813 BITMAP_FREE (bba_sets
);
1817 /* Record all registers that BB_A sets. */
1818 FOR_EACH_INSN_DEF (def
, a_insn
)
1819 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1824 FOR_BB_INSNS (bb_b
, b_insn
)
1826 if (!active_insn_p (b_insn
))
1829 rtx sset_b
= single_set (b_insn
);
1833 BITMAP_FREE (bba_sets
);
1837 /* Make sure this is a REG and not some instance
1838 of ZERO_EXTRACT or SUBREG or other dangerous stuff. */
1839 if (!REG_P (SET_DEST (sset_b
)))
1841 BITMAP_FREE (bba_sets
);
1845 /* If the insn uses a reg set in BB_A return false. */
1846 FOR_EACH_INSN_USE (use
, b_insn
)
1848 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1850 BITMAP_FREE (bba_sets
);
1857 BITMAP_FREE (bba_sets
);
1861 /* Emit copies of all the active instructions in BB except the last.
1862 This is a helper for noce_try_cmove_arith. */
1865 noce_emit_all_but_last (basic_block bb
)
1867 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
1869 FOR_BB_INSNS (bb
, insn
)
1871 if (insn
!= last
&& active_insn_p (insn
))
1873 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
1875 emit_insn (PATTERN (to_emit
));
1880 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
1881 the resulting insn or NULL if it's not a valid insn. */
1884 noce_emit_insn (rtx to_emit
)
1886 gcc_assert (to_emit
);
1887 rtx_insn
*insn
= emit_insn (to_emit
);
1889 if (recog_memoized (insn
) < 0)
1895 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
1896 and including the penultimate one in BB if it is not simple
1897 (as indicated by SIMPLE). Then emit LAST_INSN as the last
1898 insn in the block. The reason for that is that LAST_INSN may
1899 have been modified by the preparation in noce_try_cmove_arith. */
1902 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
1905 noce_emit_all_but_last (bb
);
1907 if (last_insn
&& !noce_emit_insn (last_insn
))
1913 /* Try more complex cases involving conditional_move. */
1916 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1922 rtx_insn
*insn_a
, *insn_b
;
1923 bool a_simple
= if_info
->then_simple
;
1924 bool b_simple
= if_info
->else_simple
;
1925 basic_block then_bb
= if_info
->then_bb
;
1926 basic_block else_bb
= if_info
->else_bb
;
1930 rtx_insn
*ifcvt_seq
;
1932 /* A conditional move from two memory sources is equivalent to a
1933 conditional on their addresses followed by a load. Don't do this
1934 early because it'll screw alias analysis. Note that we've
1935 already checked for no side effects. */
1936 /* ??? FIXME: Magic number 5. */
1937 if (cse_not_expected
1938 && MEM_P (a
) && MEM_P (b
)
1939 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
1940 && if_info
->branch_cost
>= 5)
1942 machine_mode address_mode
= get_address_mode (a
);
1946 x
= gen_reg_rtx (address_mode
);
1950 /* ??? We could handle this if we knew that a load from A or B could
1951 not trap or fault. This is also true if we've already loaded
1952 from the address along the path from ENTRY. */
1953 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
1956 /* if (test) x = a + b; else x = c - d;
1963 code
= GET_CODE (if_info
->cond
);
1964 insn_a
= if_info
->insn_a
;
1965 insn_b
= if_info
->insn_b
;
1967 machine_mode x_mode
= GET_MODE (x
);
1969 if (!can_conditionally_move_p (x_mode
))
1972 unsigned int then_cost
;
1973 unsigned int else_cost
;
1975 then_cost
= if_info
->then_cost
;
1980 else_cost
= if_info
->else_cost
;
1984 /* We're going to execute one of the basic blocks anyway, so
1985 bail out if the most expensive of the two blocks is unacceptable. */
1986 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
1989 /* Possibly rearrange operands to make things come out more natural. */
1990 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
1993 if (rtx_equal_p (b
, x
))
1995 else if (general_operand (b
, GET_MODE (b
)))
2000 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2002 std::swap (insn_a
, insn_b
);
2003 std::swap (a_simple
, b_simple
);
2004 std::swap (then_bb
, else_bb
);
2008 if (then_bb
&& else_bb
&& !a_simple
&& !b_simple
2009 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
)
2010 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
)))
2015 /* If one of the blocks is empty then the corresponding B or A value
2016 came from the test block. The non-empty complex block that we will
2017 emit might clobber the register used by B or A, so move it to a pseudo
2020 if (b_simple
|| !else_bb
)
2022 rtx tmp_b
= gen_reg_rtx (x_mode
);
2023 /* Perform the simplest kind of set. The register allocator
2024 should remove it if it's not actually needed. If this set is not
2025 a valid insn (can happen on the is_mem path) then end_ifcvt_sequence
2026 will cancel the whole sequence. Don't try any of the fallback paths
2027 from noce_emit_move_insn since we want this to be the simplest kind
2029 emit_insn (gen_rtx_SET (tmp_b
, b
));
2033 if (a_simple
|| !then_bb
)
2035 rtx tmp_a
= gen_reg_rtx (x_mode
);
2036 emit_insn (gen_rtx_SET (tmp_a
, a
));
2043 rtx emit_a
= NULL_RTX
;
2044 rtx emit_b
= NULL_RTX
;
2046 /* If either operand is complex, load it into a register first.
2047 The best way to do this is to copy the original insn. In this
2048 way we preserve any clobbers etc that the insn may have had.
2049 This is of course not possible in the IS_MEM case. */
2051 if (! general_operand (a
, GET_MODE (a
)))
2056 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2057 emit_a
= gen_rtx_SET (reg
, a
);
2060 goto end_seq_and_fail
;
2063 a
= gen_reg_rtx (GET_MODE (a
));
2064 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2065 rtx set
= single_set (copy_of_a
);
2068 emit_a
= PATTERN (copy_of_a
);
2072 if (! general_operand (b
, GET_MODE (b
)))
2076 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2077 emit_b
= gen_rtx_SET (reg
, b
);
2080 goto end_seq_and_fail
;
2083 b
= gen_reg_rtx (GET_MODE (b
));
2084 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2085 rtx set
= single_set (copy_of_b
);
2088 emit_b
= PATTERN (copy_of_b
);
2092 /* If insn to set up A clobbers any registers B depends on, try to
2093 swap insn that sets up A with the one that sets up B. If even
2094 that doesn't help, punt. */
2096 if (emit_a
&& modified_in_p (orig_b
, emit_a
))
2098 if (modified_in_p (orig_a
, emit_b
))
2099 goto end_seq_and_fail
;
2101 if (else_bb
&& !b_simple
)
2103 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2104 goto end_seq_and_fail
;
2107 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2108 goto end_seq_and_fail
;
2112 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2113 goto end_seq_and_fail
;
2115 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2116 goto end_seq_and_fail
;
2120 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2121 XEXP (if_info
->cond
, 1), a
, b
);
2124 goto end_seq_and_fail
;
2126 /* If we're handling a memory for above, emit the load now. */
2129 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2131 /* Copy over flags as appropriate. */
2132 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2133 MEM_VOLATILE_P (mem
) = 1;
2134 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2135 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2137 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2139 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2140 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2142 noce_emit_move_insn (if_info
->x
, mem
);
2144 else if (target
!= x
)
2145 noce_emit_move_insn (x
, target
);
2147 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2151 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2152 INSN_LOCATION (if_info
->insn_a
));
2160 /* For most cases, the simplified condition we found is the best
2161 choice, but this is not the case for the min/max/abs transforms.
2162 For these we wish to know that it is A or B in the condition. */
2165 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2166 rtx_insn
**earliest
)
2172 /* If target is already mentioned in the known condition, return it. */
2173 if (reg_mentioned_p (target
, if_info
->cond
))
2175 *earliest
= if_info
->cond_earliest
;
2176 return if_info
->cond
;
2179 set
= pc_set (if_info
->jump
);
2180 cond
= XEXP (SET_SRC (set
), 0);
2182 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2183 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2184 if (if_info
->then_else_reversed
)
2187 /* If we're looking for a constant, try to make the conditional
2188 have that constant in it. There are two reasons why it may
2189 not have the constant we want:
2191 1. GCC may have needed to put the constant in a register, because
2192 the target can't compare directly against that constant. For
2193 this case, we look for a SET immediately before the comparison
2194 that puts a constant in that register.
2196 2. GCC may have canonicalized the conditional, for example
2197 replacing "if x < 4" with "if x <= 3". We can undo that (or
2198 make equivalent types of changes) to get the constants we need
2199 if they're off by one in the right direction. */
2201 if (CONST_INT_P (target
))
2203 enum rtx_code code
= GET_CODE (if_info
->cond
);
2204 rtx op_a
= XEXP (if_info
->cond
, 0);
2205 rtx op_b
= XEXP (if_info
->cond
, 1);
2206 rtx_insn
*prev_insn
;
2208 /* First, look to see if we put a constant in a register. */
2209 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2211 && BLOCK_FOR_INSN (prev_insn
)
2212 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2213 && INSN_P (prev_insn
)
2214 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2216 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2218 src
= SET_SRC (PATTERN (prev_insn
));
2219 if (CONST_INT_P (src
))
2221 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2223 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2226 if (CONST_INT_P (op_a
))
2228 std::swap (op_a
, op_b
);
2229 code
= swap_condition (code
);
2234 /* Now, look to see if we can get the right constant by
2235 adjusting the conditional. */
2236 if (CONST_INT_P (op_b
))
2238 HOST_WIDE_INT desired_val
= INTVAL (target
);
2239 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2244 if (actual_val
== desired_val
+ 1)
2247 op_b
= GEN_INT (desired_val
);
2251 if (actual_val
== desired_val
- 1)
2254 op_b
= GEN_INT (desired_val
);
2258 if (actual_val
== desired_val
- 1)
2261 op_b
= GEN_INT (desired_val
);
2265 if (actual_val
== desired_val
+ 1)
2268 op_b
= GEN_INT (desired_val
);
2276 /* If we made any changes, generate a new conditional that is
2277 equivalent to what we started with, but has the right
2279 if (code
!= GET_CODE (if_info
->cond
)
2280 || op_a
!= XEXP (if_info
->cond
, 0)
2281 || op_b
!= XEXP (if_info
->cond
, 1))
2283 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2284 *earliest
= if_info
->cond_earliest
;
2289 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2290 earliest
, target
, have_cbranchcc4
, true);
2291 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2294 /* We almost certainly searched back to a different place.
2295 Need to re-verify correct lifetimes. */
2297 /* X may not be mentioned in the range (cond_earliest, jump]. */
2298 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2299 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2302 /* A and B may not be modified in the range [cond_earliest, jump). */
2303 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2305 && (modified_in_p (if_info
->a
, insn
)
2306 || modified_in_p (if_info
->b
, insn
)))
2312 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2315 noce_try_minmax (struct noce_if_info
*if_info
)
2318 rtx_insn
*earliest
, *seq
;
2319 enum rtx_code code
, op
;
2322 if (!noce_simple_bbs (if_info
))
2325 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2326 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2327 to get the target to tell us... */
2328 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2329 || HONOR_NANS (if_info
->x
))
2332 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2336 /* Verify the condition is of the form we expect, and canonicalize
2337 the comparison code. */
2338 code
= GET_CODE (cond
);
2339 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2341 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2344 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2346 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2348 code
= swap_condition (code
);
2353 /* Determine what sort of operation this is. Note that the code is for
2354 a taken branch, so the code->operation mapping appears backwards. */
2387 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2388 if_info
->a
, if_info
->b
,
2389 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2395 if (target
!= if_info
->x
)
2396 noce_emit_move_insn (if_info
->x
, target
);
2398 seq
= end_ifcvt_sequence (if_info
);
2402 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2403 if_info
->cond
= cond
;
2404 if_info
->cond_earliest
= earliest
;
2409 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2410 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2414 noce_try_abs (struct noce_if_info
*if_info
)
2416 rtx cond
, target
, a
, b
, c
;
2417 rtx_insn
*earliest
, *seq
;
2419 bool one_cmpl
= false;
2421 if (!noce_simple_bbs (if_info
))
2424 /* Reject modes with signed zeros. */
2425 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2428 /* Recognize A and B as constituting an ABS or NABS. The canonical
2429 form is a branch around the negation, taken when the object is the
2430 first operand of a comparison against 0 that evaluates to true. */
2433 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2435 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2440 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2445 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2454 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2458 /* Verify the condition is of the form we expect. */
2459 if (rtx_equal_p (XEXP (cond
, 0), b
))
2461 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2469 /* Verify that C is zero. Search one step backward for a
2470 REG_EQUAL note or a simple source if necessary. */
2474 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2476 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2477 && (set
= single_set (insn
))
2478 && rtx_equal_p (SET_DEST (set
), c
))
2480 rtx note
= find_reg_equal_equiv_note (insn
);
2490 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2491 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2492 c
= get_pool_constant (XEXP (c
, 0));
2494 /* Work around funny ideas get_condition has wrt canonicalization.
2495 Note that these rtx constants are known to be CONST_INT, and
2496 therefore imply integer comparisons. */
2497 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2499 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2501 else if (c
!= CONST0_RTX (GET_MODE (b
)))
2504 /* Determine what sort of operation this is. */
2505 switch (GET_CODE (cond
))
2524 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2527 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2529 /* ??? It's a quandary whether cmove would be better here, especially
2530 for integers. Perhaps combine will clean things up. */
2531 if (target
&& negate
)
2534 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2537 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2547 if (target
!= if_info
->x
)
2548 noce_emit_move_insn (if_info
->x
, target
);
2550 seq
= end_ifcvt_sequence (if_info
);
2554 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2555 if_info
->cond
= cond
;
2556 if_info
->cond_earliest
= earliest
;
2561 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2564 noce_try_sign_mask (struct noce_if_info
*if_info
)
2570 bool t_unconditional
;
2572 if (!noce_simple_bbs (if_info
))
2575 cond
= if_info
->cond
;
2576 code
= GET_CODE (cond
);
2581 if (if_info
->a
== const0_rtx
)
2583 if ((code
== LT
&& c
== const0_rtx
)
2584 || (code
== LE
&& c
== constm1_rtx
))
2587 else if (if_info
->b
== const0_rtx
)
2589 if ((code
== GE
&& c
== const0_rtx
)
2590 || (code
== GT
&& c
== constm1_rtx
))
2594 if (! t
|| side_effects_p (t
))
2597 /* We currently don't handle different modes. */
2598 mode
= GET_MODE (t
);
2599 if (GET_MODE (m
) != mode
)
2602 /* This is only profitable if T is unconditionally executed/evaluated in the
2603 original insn sequence or T is cheap. The former happens if B is the
2604 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2605 INSN_B which can happen for e.g. conditional stores to memory. For the
2606 cost computation use the block TEST_BB where the evaluation will end up
2607 after the transformation. */
2610 && (if_info
->insn_b
== NULL_RTX
2611 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2612 if (!(t_unconditional
2613 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2614 < COSTS_N_INSNS (2))))
2618 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2619 "(signed) m >> 31" directly. This benefits targets with specialized
2620 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2621 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2622 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2631 noce_emit_move_insn (if_info
->x
, t
);
2633 seq
= end_ifcvt_sequence (if_info
);
2637 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2642 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2646 noce_try_bitop (struct noce_if_info
*if_info
)
2648 rtx cond
, x
, a
, result
;
2655 cond
= if_info
->cond
;
2656 code
= GET_CODE (cond
);
2658 if (!noce_simple_bbs (if_info
))
2661 /* Check for no else condition. */
2662 if (! rtx_equal_p (x
, if_info
->b
))
2665 /* Check for a suitable condition. */
2666 if (code
!= NE
&& code
!= EQ
)
2668 if (XEXP (cond
, 1) != const0_rtx
)
2670 cond
= XEXP (cond
, 0);
2672 /* ??? We could also handle AND here. */
2673 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2675 if (XEXP (cond
, 1) != const1_rtx
2676 || !CONST_INT_P (XEXP (cond
, 2))
2677 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2679 bitnum
= INTVAL (XEXP (cond
, 2));
2680 mode
= GET_MODE (x
);
2681 if (BITS_BIG_ENDIAN
)
2682 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2683 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2690 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2692 /* Check for "if (X & C) x = x op C". */
2693 if (! rtx_equal_p (x
, XEXP (a
, 0))
2694 || !CONST_INT_P (XEXP (a
, 1))
2695 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2696 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2699 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2700 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2701 if (GET_CODE (a
) == IOR
)
2702 result
= (code
== NE
) ? a
: NULL_RTX
;
2703 else if (code
== NE
)
2705 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2706 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2707 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2711 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2712 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2713 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2716 else if (GET_CODE (a
) == AND
)
2718 /* Check for "if (X & C) x &= ~C". */
2719 if (! rtx_equal_p (x
, XEXP (a
, 0))
2720 || !CONST_INT_P (XEXP (a
, 1))
2721 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2722 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2725 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2726 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2727 result
= (code
== EQ
) ? a
: NULL_RTX
;
2735 noce_emit_move_insn (x
, result
);
2736 seq
= end_ifcvt_sequence (if_info
);
2740 emit_insn_before_setloc (seq
, if_info
->jump
,
2741 INSN_LOCATION (if_info
->insn_a
));
2747 /* Similar to get_condition, only the resulting condition must be
2748 valid at JUMP, instead of at EARLIEST.
2750 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2751 THEN block of the caller, and we have to reverse the condition. */
2754 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2759 if (! any_condjump_p (jump
))
2762 set
= pc_set (jump
);
2764 /* If this branches to JUMP_LABEL when the condition is false,
2765 reverse the condition. */
2766 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2767 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2769 /* We may have to reverse because the caller's if block is not canonical,
2770 i.e. the THEN block isn't the fallthrough block for the TEST block
2771 (see find_if_header). */
2772 if (then_else_reversed
)
2775 /* If the condition variable is a register and is MODE_INT, accept it. */
2777 cond
= XEXP (SET_SRC (set
), 0);
2778 tmp
= XEXP (cond
, 0);
2779 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2780 && (GET_MODE (tmp
) != BImode
2781 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2786 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2787 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2791 /* Otherwise, fall back on canonicalize_condition to do the dirty
2792 work of manipulating MODE_CC values and COMPARE rtx codes. */
2793 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2794 NULL_RTX
, have_cbranchcc4
, true);
2796 /* We don't handle side-effects in the condition, like handling
2797 REG_INC notes and making sure no duplicate conditions are emitted. */
2798 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2804 /* Return true if OP is ok for if-then-else processing. */
2807 noce_operand_ok (const_rtx op
)
2809 if (side_effects_p (op
))
2812 /* We special-case memories, so handle any of them with
2813 no address side effects. */
2815 return ! side_effects_p (XEXP (op
, 0));
2817 return ! may_trap_p (op
);
2820 /* Return true if a write into MEM may trap or fault. */
2823 noce_mem_write_may_trap_or_fault_p (const_rtx mem
)
2827 if (MEM_READONLY_P (mem
))
2830 if (may_trap_or_fault_p (mem
))
2833 addr
= XEXP (mem
, 0);
2835 /* Call target hook to avoid the effects of -fpic etc.... */
2836 addr
= targetm
.delegitimize_address (addr
);
2839 switch (GET_CODE (addr
))
2847 addr
= XEXP (addr
, 0);
2851 addr
= XEXP (addr
, 1);
2854 if (CONST_INT_P (XEXP (addr
, 1)))
2855 addr
= XEXP (addr
, 0);
2862 if (SYMBOL_REF_DECL (addr
)
2863 && decl_readonly_section (SYMBOL_REF_DECL (addr
), 0))
2873 /* Return whether we can use store speculation for MEM. TOP_BB is the
2874 basic block above the conditional block where we are considering
2875 doing the speculative store. We look for whether MEM is set
2876 unconditionally later in the function. */
2879 noce_can_store_speculate_p (basic_block top_bb
, const_rtx mem
)
2881 basic_block dominator
;
2883 for (dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, top_bb
);
2885 dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, dominator
))
2889 FOR_BB_INSNS (dominator
, insn
)
2891 /* If we see something that might be a memory barrier, we
2892 have to stop looking. Even if the MEM is set later in
2893 the function, we still don't want to set it
2894 unconditionally before the barrier. */
2896 && (volatile_insn_p (PATTERN (insn
))
2897 || (CALL_P (insn
) && (!RTL_CONST_CALL_P (insn
)))))
2900 if (memory_must_be_modified_in_insn_p (mem
, insn
))
2902 if (modified_in_p (XEXP (mem
, 0), insn
))
2911 /* Return true if X contains a MEM subrtx. */
2914 contains_mem_rtx_p (rtx x
)
2916 subrtx_iterator::array_type array
;
2917 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
2924 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
2925 The condition used in this if-conversion is in COND.
2926 In practice, check that TEST_BB ends with a single set
2927 x := a and all previous computations
2928 in TEST_BB don't produce any values that are live after TEST_BB.
2929 In other words, all the insns in TEST_BB are there only
2930 to compute a value for x. Put the rtx cost of the insns
2931 in TEST_BB into COST. Record whether TEST_BB is a single simple
2932 set instruction in SIMPLE_P. */
2935 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
2936 unsigned int *cost
, bool *simple_p
)
2941 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
2942 rtx last_set
= NULL_RTX
;
2944 rtx cc
= cc_in_cond (cond
);
2946 if (!insn_valid_noce_process_p (last_insn
, cc
))
2948 last_set
= single_set (last_insn
);
2950 rtx x
= SET_DEST (last_set
);
2951 rtx_insn
*first_insn
= first_active_insn (test_bb
);
2952 rtx first_set
= single_set (first_insn
);
2957 /* We have a single simple set, that's okay. */
2958 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
2960 if (first_insn
== last_insn
)
2962 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
2963 *cost
= insn_rtx_cost (first_set
, speed_p
);
2967 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
2968 gcc_assert (prev_last_insn
);
2970 /* For now, disallow setting x multiple times in test_bb. */
2971 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
2974 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
2976 /* The regs that are live out of test_bb. */
2977 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
2979 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
2981 FOR_BB_INSNS (test_bb
, insn
)
2983 if (insn
!= last_insn
)
2985 if (!active_insn_p (insn
))
2988 if (!insn_valid_noce_process_p (insn
, cc
))
2989 goto free_bitmap_and_fail
;
2991 rtx sset
= single_set (insn
);
2994 if (contains_mem_rtx_p (SET_SRC (sset
))
2995 || !REG_P (SET_DEST (sset
))
2996 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
2997 goto free_bitmap_and_fail
;
2999 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3000 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3004 /* If any of the intermediate results in test_bb are live after test_bb
3006 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3007 goto free_bitmap_and_fail
;
3009 BITMAP_FREE (test_bb_temps
);
3010 *cost
= potential_cost
;
3014 free_bitmap_and_fail
:
3015 BITMAP_FREE (test_bb_temps
);
3019 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3020 it without using conditional execution. Return TRUE if we were successful
3021 at converting the block. */
3024 noce_process_if_block (struct noce_if_info
*if_info
)
3026 basic_block test_bb
= if_info
->test_bb
; /* test block */
3027 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3028 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3029 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3030 rtx_insn
*jump
= if_info
->jump
;
3031 rtx cond
= if_info
->cond
;
3032 rtx_insn
*insn_a
, *insn_b
;
3034 rtx orig_x
, x
, a
, b
;
3036 /* We're looking for patterns of the form
3038 (1) if (...) x = a; else x = b;
3039 (2) x = b; if (...) x = a;
3040 (3) if (...) x = a; // as if with an initial x = x.
3042 The later patterns require jumps to be more expensive.
3043 For the if (...) x = a; else x = b; case we allow multiple insns
3044 inside the then and else blocks as long as their only effect is
3045 to calculate a value for x.
3046 ??? For future expansion, look for multiple X in such patterns. */
3048 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3049 &if_info
->then_simple
))
3053 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3054 &if_info
->else_simple
))
3057 insn_a
= last_active_insn (then_bb
, FALSE
);
3058 set_a
= single_set (insn_a
);
3061 x
= SET_DEST (set_a
);
3062 a
= SET_SRC (set_a
);
3064 /* Look for the other potential set. Make sure we've got equivalent
3066 /* ??? This is overconservative. Storing to two different mems is
3067 as easy as conditionally computing the address. Storing to a
3068 single mem merely requires a scratch memory to use as one of the
3069 destination addresses; often the memory immediately below the
3070 stack pointer is available for this. */
3074 insn_b
= last_active_insn (else_bb
, FALSE
);
3075 set_b
= single_set (insn_b
);
3078 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3083 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3084 /* We're going to be moving the evaluation of B down from above
3085 COND_EARLIEST to JUMP. Make sure the relevant data is still
3088 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3089 || !NONJUMP_INSN_P (insn_b
)
3090 || (set_b
= single_set (insn_b
)) == NULL_RTX
3091 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3092 || ! noce_operand_ok (SET_SRC (set_b
))
3093 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3094 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3095 /* Avoid extending the lifetime of hard registers on small
3096 register class machines. */
3097 || (REG_P (SET_SRC (set_b
))
3098 && HARD_REGISTER_P (SET_SRC (set_b
))
3099 && targetm
.small_register_classes_for_mode_p
3100 (GET_MODE (SET_SRC (set_b
))))
3101 /* Likewise with X. In particular this can happen when
3102 noce_get_condition looks farther back in the instruction
3103 stream than one might expect. */
3104 || reg_overlap_mentioned_p (x
, cond
)
3105 || reg_overlap_mentioned_p (x
, a
)
3106 || modified_between_p (x
, insn_b
, jump
))
3113 /* If x has side effects then only the if-then-else form is safe to
3114 convert. But even in that case we would need to restore any notes
3115 (such as REG_INC) at then end. That can be tricky if
3116 noce_emit_move_insn expands to more than one insn, so disable the
3117 optimization entirely for now if there are side effects. */
3118 if (side_effects_p (x
))
3121 b
= (set_b
? SET_SRC (set_b
) : x
);
3123 /* Only operate on register destinations, and even then avoid extending
3124 the lifetime of hard registers on small register class machines. */
3127 || (HARD_REGISTER_P (x
)
3128 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3130 if (GET_MODE (x
) == BLKmode
)
3133 if (GET_CODE (x
) == ZERO_EXTRACT
3134 && (!CONST_INT_P (XEXP (x
, 1))
3135 || !CONST_INT_P (XEXP (x
, 2))))
3138 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3139 ? XEXP (x
, 0) : x
));
3142 /* Don't operate on sources that may trap or are volatile. */
3143 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3147 /* Set up the info block for our subroutines. */
3148 if_info
->insn_a
= insn_a
;
3149 if_info
->insn_b
= insn_b
;
3154 /* Try optimizations in some approximation of a useful order. */
3155 /* ??? Should first look to see if X is live incoming at all. If it
3156 isn't, we don't need anything but an unconditional set. */
3158 /* Look and see if A and B are really the same. Avoid creating silly
3159 cmove constructs that no one will fix up later. */
3160 if (noce_simple_bbs (if_info
)
3161 && rtx_interchangeable_p (a
, b
))
3163 /* If we have an INSN_B, we don't have to create any new rtl. Just
3164 move the instruction that we already have. If we don't have an
3165 INSN_B, that means that A == X, and we've got a noop move. In
3166 that case don't do anything and let the code below delete INSN_A. */
3167 if (insn_b
&& else_bb
)
3171 if (else_bb
&& insn_b
== BB_END (else_bb
))
3172 BB_END (else_bb
) = PREV_INSN (insn_b
);
3173 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3175 /* If there was a REG_EQUAL note, delete it since it may have been
3176 true due to this insn being after a jump. */
3177 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3178 remove_note (insn_b
, note
);
3182 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3183 x must be executed twice. */
3184 else if (insn_b
&& side_effects_p (orig_x
))
3191 if (!set_b
&& MEM_P (orig_x
))
3193 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
3194 for optimizations if writing to x may trap or fault,
3195 i.e. it's a memory other than a static var or a stack slot,
3196 is misaligned on strict aligned machines or is read-only. If
3197 x is a read-only memory, then the program is valid only if we
3198 avoid the store into it. If there are stores on both the
3199 THEN and ELSE arms, then we can go ahead with the conversion;
3200 either the program is broken, or the condition is always
3201 false such that the other memory is selected. */
3202 if (noce_mem_write_may_trap_or_fault_p (orig_x
))
3205 /* Avoid store speculation: given "if (...) x = a" where x is a
3206 MEM, we only want to do the store if x is always set
3207 somewhere in the function. This avoids cases like
3208 if (pthread_mutex_trylock(mutex))
3210 where we only want global_variable to be changed if the mutex
3211 is held. FIXME: This should ideally be expressed directly in
3213 if (!noce_can_store_speculate_p (test_bb
, orig_x
))
3217 if (noce_try_move (if_info
))
3219 if (noce_try_store_flag (if_info
))
3221 if (noce_try_bitop (if_info
))
3223 if (noce_try_minmax (if_info
))
3225 if (noce_try_abs (if_info
))
3227 if (!targetm
.have_conditional_execution ()
3228 && noce_try_store_flag_constants (if_info
))
3230 if (HAVE_conditional_move
3231 && noce_try_cmove (if_info
))
3233 if (! targetm
.have_conditional_execution ())
3235 if (noce_try_addcc (if_info
))
3237 if (noce_try_store_flag_mask (if_info
))
3239 if (HAVE_conditional_move
3240 && noce_try_cmove_arith (if_info
))
3242 if (noce_try_sign_mask (if_info
))
3246 if (!else_bb
&& set_b
)
3258 /* If we used a temporary, fix it up now. */
3264 noce_emit_move_insn (orig_x
, x
);
3266 set_used_flags (orig_x
);
3267 unshare_all_rtl_in_chain (seq
);
3270 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3273 /* The original THEN and ELSE blocks may now be removed. The test block
3274 must now jump to the join block. If the test block and the join block
3275 can be merged, do so. */
3278 delete_basic_block (else_bb
);
3282 remove_edge (find_edge (test_bb
, join_bb
));
3284 remove_edge (find_edge (then_bb
, join_bb
));
3285 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3286 delete_basic_block (then_bb
);
3289 if (can_merge_blocks_p (test_bb
, join_bb
))
3291 merge_blocks (test_bb
, join_bb
);
3295 num_updated_if_blocks
++;
3299 /* Check whether a block is suitable for conditional move conversion.
3300 Every insn must be a simple set of a register to a constant or a
3301 register. For each assignment, store the value in the pointer map
3302 VALS, keyed indexed by register pointer, then store the register
3303 pointer in REGS. COND is the condition we will test. */
3306 check_cond_move_block (basic_block bb
,
3307 hash_map
<rtx
, rtx
> *vals
,
3312 rtx cc
= cc_in_cond (cond
);
3314 /* We can only handle simple jumps at the end of the basic block.
3315 It is almost impossible to update the CFG otherwise. */
3317 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3320 FOR_BB_INSNS (bb
, insn
)
3324 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3326 set
= single_set (insn
);
3330 dest
= SET_DEST (set
);
3331 src
= SET_SRC (set
);
3333 || (HARD_REGISTER_P (dest
)
3334 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3337 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3340 if (side_effects_p (src
) || side_effects_p (dest
))
3343 if (may_trap_p (src
) || may_trap_p (dest
))
3346 /* Don't try to handle this if the source register was
3347 modified earlier in the block. */
3350 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3351 && vals
->get (SUBREG_REG (src
))))
3354 /* Don't try to handle this if the destination register was
3355 modified earlier in the block. */
3356 if (vals
->get (dest
))
3359 /* Don't try to handle this if the condition uses the
3360 destination register. */
3361 if (reg_overlap_mentioned_p (dest
, cond
))
3364 /* Don't try to handle this if the source register is modified
3365 later in the block. */
3366 if (!CONSTANT_P (src
)
3367 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3370 /* Skip it if the instruction to be moved might clobber CC. */
3371 if (cc
&& set_of (cc
, insn
))
3374 vals
->put (dest
, src
);
3376 regs
->safe_push (dest
);
3382 /* Given a basic block BB suitable for conditional move conversion,
3383 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3384 the register values depending on COND, emit the insns in the block as
3385 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3386 processed. The caller has started a sequence for the conversion.
3387 Return true if successful, false if something goes wrong. */
3390 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3391 basic_block bb
, rtx cond
,
3392 hash_map
<rtx
, rtx
> *then_vals
,
3393 hash_map
<rtx
, rtx
> *else_vals
,
3398 rtx cond_arg0
, cond_arg1
;
3400 code
= GET_CODE (cond
);
3401 cond_arg0
= XEXP (cond
, 0);
3402 cond_arg1
= XEXP (cond
, 1);
3404 FOR_BB_INSNS (bb
, insn
)
3406 rtx set
, target
, dest
, t
, e
;
3408 /* ??? Maybe emit conditional debug insn? */
3409 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3411 set
= single_set (insn
);
3412 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3414 dest
= SET_DEST (set
);
3416 rtx
*then_slot
= then_vals
->get (dest
);
3417 rtx
*else_slot
= else_vals
->get (dest
);
3418 t
= then_slot
? *then_slot
: NULL_RTX
;
3419 e
= else_slot
? *else_slot
: NULL_RTX
;
3423 /* If this register was set in the then block, we already
3424 handled this case there. */
3437 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3443 noce_emit_move_insn (dest
, target
);
3449 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3450 it using only conditional moves. Return TRUE if we were successful at
3451 converting the block. */
3454 cond_move_process_if_block (struct noce_if_info
*if_info
)
3456 basic_block test_bb
= if_info
->test_bb
;
3457 basic_block then_bb
= if_info
->then_bb
;
3458 basic_block else_bb
= if_info
->else_bb
;
3459 basic_block join_bb
= if_info
->join_bb
;
3460 rtx_insn
*jump
= if_info
->jump
;
3461 rtx cond
= if_info
->cond
;
3462 rtx_insn
*seq
, *loc_insn
;
3465 vec
<rtx
> then_regs
= vNULL
;
3466 vec
<rtx
> else_regs
= vNULL
;
3468 int success_p
= FALSE
;
3470 /* Build a mapping for each block to the value used for each
3472 hash_map
<rtx
, rtx
> then_vals
;
3473 hash_map
<rtx
, rtx
> else_vals
;
3475 /* Make sure the blocks are suitable. */
3476 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3478 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3481 /* Make sure the blocks can be used together. If the same register
3482 is set in both blocks, and is not set to a constant in both
3483 cases, then both blocks must set it to the same register. We
3484 have already verified that if it is set to a register, that the
3485 source register does not change after the assignment. Also count
3486 the number of registers set in only one of the blocks. */
3488 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3490 rtx
*then_slot
= then_vals
.get (reg
);
3491 rtx
*else_slot
= else_vals
.get (reg
);
3493 gcc_checking_assert (then_slot
);
3498 rtx then_val
= *then_slot
;
3499 rtx else_val
= *else_slot
;
3500 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3501 && !rtx_equal_p (then_val
, else_val
))
3506 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3507 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3509 gcc_checking_assert (else_vals
.get (reg
));
3510 if (!then_vals
.get (reg
))
3514 /* Make sure it is reasonable to convert this block. What matters
3515 is the number of assignments currently made in only one of the
3516 branches, since if we convert we are going to always execute
3518 if (c
> MAX_CONDITIONAL_EXECUTE
)
3521 /* Try to emit the conditional moves. First do the then block,
3522 then do anything left in the else blocks. */
3524 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3525 &then_vals
, &else_vals
, false)
3527 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3528 &then_vals
, &else_vals
, true)))
3533 seq
= end_ifcvt_sequence (if_info
);
3537 loc_insn
= first_active_insn (then_bb
);
3540 loc_insn
= first_active_insn (else_bb
);
3541 gcc_assert (loc_insn
);
3543 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3547 delete_basic_block (else_bb
);
3551 remove_edge (find_edge (test_bb
, join_bb
));
3553 remove_edge (find_edge (then_bb
, join_bb
));
3554 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3555 delete_basic_block (then_bb
);
3558 if (can_merge_blocks_p (test_bb
, join_bb
))
3560 merge_blocks (test_bb
, join_bb
);
3564 num_updated_if_blocks
++;
3569 then_regs
.release ();
3570 else_regs
.release ();
3575 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3576 IF-THEN-ELSE-JOIN block.
3578 If so, we'll try to convert the insns to not require the branch,
3579 using only transformations that do not require conditional execution.
3581 Return TRUE if we were successful at converting the block. */
3584 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3587 basic_block then_bb
, else_bb
, join_bb
;
3588 bool then_else_reversed
= false;
3591 rtx_insn
*cond_earliest
;
3592 struct noce_if_info if_info
;
3594 /* We only ever should get here before reload. */
3595 gcc_assert (!reload_completed
);
3597 /* Recognize an IF-THEN-ELSE-JOIN block. */
3598 if (single_pred_p (then_edge
->dest
)
3599 && single_succ_p (then_edge
->dest
)
3600 && single_pred_p (else_edge
->dest
)
3601 && single_succ_p (else_edge
->dest
)
3602 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3604 then_bb
= then_edge
->dest
;
3605 else_bb
= else_edge
->dest
;
3606 join_bb
= single_succ (then_bb
);
3608 /* Recognize an IF-THEN-JOIN block. */
3609 else if (single_pred_p (then_edge
->dest
)
3610 && single_succ_p (then_edge
->dest
)
3611 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3613 then_bb
= then_edge
->dest
;
3614 else_bb
= NULL_BLOCK
;
3615 join_bb
= else_edge
->dest
;
3617 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3618 of basic blocks in cfglayout mode does not matter, so the fallthrough
3619 edge can go to any basic block (and not just to bb->next_bb, like in
3621 else if (single_pred_p (else_edge
->dest
)
3622 && single_succ_p (else_edge
->dest
)
3623 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3625 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3626 To make this work, we have to invert the THEN and ELSE blocks
3627 and reverse the jump condition. */
3628 then_bb
= else_edge
->dest
;
3629 else_bb
= NULL_BLOCK
;
3630 join_bb
= single_succ (then_bb
);
3631 then_else_reversed
= true;
3634 /* Not a form we can handle. */
3637 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3638 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3641 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3644 num_possible_if_blocks
++;
3649 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3650 (else_bb
) ? "-ELSE" : "",
3651 pass
, test_bb
->index
, then_bb
->index
);
3654 fprintf (dump_file
, ", else %d", else_bb
->index
);
3656 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3659 /* If the conditional jump is more than just a conditional
3660 jump, then we can not do if-conversion on this block. */
3661 jump
= BB_END (test_bb
);
3662 if (! onlyjump_p (jump
))
3665 /* If this is not a standard conditional jump, we can't parse it. */
3666 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3670 /* We must be comparing objects whose modes imply the size. */
3671 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3674 /* Initialize an IF_INFO struct to pass around. */
3675 memset (&if_info
, 0, sizeof if_info
);
3676 if_info
.test_bb
= test_bb
;
3677 if_info
.then_bb
= then_bb
;
3678 if_info
.else_bb
= else_bb
;
3679 if_info
.join_bb
= join_bb
;
3680 if_info
.cond
= cond
;
3681 if_info
.cond_earliest
= cond_earliest
;
3682 if_info
.jump
= jump
;
3683 if_info
.then_else_reversed
= then_else_reversed
;
3684 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3685 predictable_edge_p (then_edge
));
3687 /* Do the real work. */
3689 if (noce_process_if_block (&if_info
))
3692 if (HAVE_conditional_move
3693 && cond_move_process_if_block (&if_info
))
3700 /* Merge the blocks and mark for local life update. */
3703 merge_if_block (struct ce_if_block
* ce_info
)
3705 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3706 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3707 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3708 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3709 basic_block combo_bb
;
3711 /* All block merging is done into the lower block numbers. */
3714 df_set_bb_dirty (test_bb
);
3716 /* Merge any basic blocks to handle && and || subtests. Each of
3717 the blocks are on the fallthru path from the predecessor block. */
3718 if (ce_info
->num_multiple_test_blocks
> 0)
3720 basic_block bb
= test_bb
;
3721 basic_block last_test_bb
= ce_info
->last_test_bb
;
3722 basic_block fallthru
= block_fallthru (bb
);
3727 fallthru
= block_fallthru (bb
);
3728 merge_blocks (combo_bb
, bb
);
3731 while (bb
!= last_test_bb
);
3734 /* Merge TEST block into THEN block. Normally the THEN block won't have a
3735 label, but it might if there were || tests. That label's count should be
3736 zero, and it normally should be removed. */
3740 /* If THEN_BB has no successors, then there's a BARRIER after it.
3741 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
3742 is no longer needed, and in fact it is incorrect to leave it in
3744 if (EDGE_COUNT (then_bb
->succs
) == 0
3745 && EDGE_COUNT (combo_bb
->succs
) > 1)
3747 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
3748 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3749 end
= NEXT_INSN (end
);
3751 if (end
&& BARRIER_P (end
))
3754 merge_blocks (combo_bb
, then_bb
);
3758 /* The ELSE block, if it existed, had a label. That label count
3759 will almost always be zero, but odd things can happen when labels
3760 get their addresses taken. */
3763 /* If ELSE_BB has no successors, then there's a BARRIER after it.
3764 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
3765 is no longer needed, and in fact it is incorrect to leave it in
3767 if (EDGE_COUNT (else_bb
->succs
) == 0
3768 && EDGE_COUNT (combo_bb
->succs
) > 1)
3770 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
3771 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3772 end
= NEXT_INSN (end
);
3774 if (end
&& BARRIER_P (end
))
3777 merge_blocks (combo_bb
, else_bb
);
3781 /* If there was no join block reported, that means it was not adjacent
3782 to the others, and so we cannot merge them. */
3786 rtx_insn
*last
= BB_END (combo_bb
);
3788 /* The outgoing edge for the current COMBO block should already
3789 be correct. Verify this. */
3790 if (EDGE_COUNT (combo_bb
->succs
) == 0)
3791 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
3792 || (NONJUMP_INSN_P (last
)
3793 && GET_CODE (PATTERN (last
)) == TRAP_IF
3794 && (TRAP_CONDITION (PATTERN (last
))
3795 == const_true_rtx
)));
3798 /* There should still be something at the end of the THEN or ELSE
3799 blocks taking us to our final destination. */
3800 gcc_assert (JUMP_P (last
)
3801 || (EDGE_SUCC (combo_bb
, 0)->dest
3802 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
3804 && SIBLING_CALL_P (last
))
3805 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
3806 && can_throw_internal (last
)));
3809 /* The JOIN block may have had quite a number of other predecessors too.
3810 Since we've already merged the TEST, THEN and ELSE blocks, we should
3811 have only one remaining edge from our if-then-else diamond. If there
3812 is more than one remaining edge, it must come from elsewhere. There
3813 may be zero incoming edges if the THEN block didn't actually join
3814 back up (as with a call to a non-return function). */
3815 else if (EDGE_COUNT (join_bb
->preds
) < 2
3816 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3818 /* We can merge the JOIN cleanly and update the dataflow try
3819 again on this pass.*/
3820 merge_blocks (combo_bb
, join_bb
);
3825 /* We cannot merge the JOIN. */
3827 /* The outgoing edge for the current COMBO block should already
3828 be correct. Verify this. */
3829 gcc_assert (single_succ_p (combo_bb
)
3830 && single_succ (combo_bb
) == join_bb
);
3832 /* Remove the jump and cruft from the end of the COMBO block. */
3833 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3834 tidy_fallthru_edge (single_succ_edge (combo_bb
));
3837 num_updated_if_blocks
++;
3840 /* Find a block ending in a simple IF condition and try to transform it
3841 in some way. When converting a multi-block condition, put the new code
3842 in the first such block and delete the rest. Return a pointer to this
3843 first block if some transformation was done. Return NULL otherwise. */
3846 find_if_header (basic_block test_bb
, int pass
)
3848 ce_if_block ce_info
;
3852 /* The kind of block we're looking for has exactly two successors. */
3853 if (EDGE_COUNT (test_bb
->succs
) != 2)
3856 then_edge
= EDGE_SUCC (test_bb
, 0);
3857 else_edge
= EDGE_SUCC (test_bb
, 1);
3859 if (df_get_bb_dirty (then_edge
->dest
))
3861 if (df_get_bb_dirty (else_edge
->dest
))
3864 /* Neither edge should be abnormal. */
3865 if ((then_edge
->flags
& EDGE_COMPLEX
)
3866 || (else_edge
->flags
& EDGE_COMPLEX
))
3869 /* Nor exit the loop. */
3870 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
3871 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
3874 /* The THEN edge is canonically the one that falls through. */
3875 if (then_edge
->flags
& EDGE_FALLTHRU
)
3877 else if (else_edge
->flags
& EDGE_FALLTHRU
)
3878 std::swap (then_edge
, else_edge
);
3880 /* Otherwise this must be a multiway branch of some sort. */
3883 memset (&ce_info
, 0, sizeof (ce_info
));
3884 ce_info
.test_bb
= test_bb
;
3885 ce_info
.then_bb
= then_edge
->dest
;
3886 ce_info
.else_bb
= else_edge
->dest
;
3887 ce_info
.pass
= pass
;
3889 #ifdef IFCVT_MACHDEP_INIT
3890 IFCVT_MACHDEP_INIT (&ce_info
);
3893 if (!reload_completed
3894 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
3897 if (reload_completed
3898 && targetm
.have_conditional_execution ()
3899 && cond_exec_find_if_block (&ce_info
))
3902 if (targetm
.have_trap ()
3903 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
3904 && find_cond_trap (test_bb
, then_edge
, else_edge
))
3907 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
3908 && (reload_completed
|| !targetm
.have_conditional_execution ()))
3910 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
3912 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
3920 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
3921 /* Set this so we continue looking. */
3922 cond_exec_changed_p
= TRUE
;
3923 return ce_info
.test_bb
;
3926 /* Return true if a block has two edges, one of which falls through to the next
3927 block, and the other jumps to a specific block, so that we can tell if the
3928 block is part of an && test or an || test. Returns either -1 or the number
3929 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
3932 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
3935 int fallthru_p
= FALSE
;
3942 if (!cur_bb
|| !target_bb
)
3945 /* If no edges, obviously it doesn't jump or fallthru. */
3946 if (EDGE_COUNT (cur_bb
->succs
) == 0)
3949 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
3951 if (cur_edge
->flags
& EDGE_COMPLEX
)
3952 /* Anything complex isn't what we want. */
3955 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
3958 else if (cur_edge
->dest
== target_bb
)
3965 if ((jump_p
& fallthru_p
) == 0)
3968 /* Don't allow calls in the block, since this is used to group && and ||
3969 together for conditional execution support. ??? we should support
3970 conditional execution support across calls for IA-64 some day, but
3971 for now it makes the code simpler. */
3972 end
= BB_END (cur_bb
);
3973 insn
= BB_HEAD (cur_bb
);
3975 while (insn
!= NULL_RTX
)
3982 && !DEBUG_INSN_P (insn
)
3983 && GET_CODE (PATTERN (insn
)) != USE
3984 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3990 insn
= NEXT_INSN (insn
);
3996 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
3997 block. If so, we'll try to convert the insns to not require the branch.
3998 Return TRUE if we were successful at converting the block. */
4001 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4003 basic_block test_bb
= ce_info
->test_bb
;
4004 basic_block then_bb
= ce_info
->then_bb
;
4005 basic_block else_bb
= ce_info
->else_bb
;
4006 basic_block join_bb
= NULL_BLOCK
;
4011 ce_info
->last_test_bb
= test_bb
;
4013 /* We only ever should get here after reload,
4014 and if we have conditional execution. */
4015 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4017 /* Discover if any fall through predecessors of the current test basic block
4018 were && tests (which jump to the else block) or || tests (which jump to
4020 if (single_pred_p (test_bb
)
4021 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4023 basic_block bb
= single_pred (test_bb
);
4024 basic_block target_bb
;
4025 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4028 /* Determine if the preceding block is an && or || block. */
4029 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4031 ce_info
->and_and_p
= TRUE
;
4032 target_bb
= else_bb
;
4034 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4036 ce_info
->and_and_p
= FALSE
;
4037 target_bb
= then_bb
;
4040 target_bb
= NULL_BLOCK
;
4042 if (target_bb
&& n_insns
<= max_insns
)
4044 int total_insns
= 0;
4047 ce_info
->last_test_bb
= test_bb
;
4049 /* Found at least one && or || block, look for more. */
4052 ce_info
->test_bb
= test_bb
= bb
;
4053 total_insns
+= n_insns
;
4056 if (!single_pred_p (bb
))
4059 bb
= single_pred (bb
);
4060 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4062 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4064 ce_info
->num_multiple_test_blocks
= blocks
;
4065 ce_info
->num_multiple_test_insns
= total_insns
;
4067 if (ce_info
->and_and_p
)
4068 ce_info
->num_and_and_blocks
= blocks
;
4070 ce_info
->num_or_or_blocks
= blocks
;
4074 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4075 other than any || blocks which jump to the THEN block. */
4076 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4079 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4080 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4082 if (cur_edge
->flags
& EDGE_COMPLEX
)
4086 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4088 if (cur_edge
->flags
& EDGE_COMPLEX
)
4092 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4093 if (EDGE_COUNT (then_bb
->succs
) > 0
4094 && (!single_succ_p (then_bb
)
4095 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4096 || (epilogue_completed
4097 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4100 /* If the THEN block has no successors, conditional execution can still
4101 make a conditional call. Don't do this unless the ELSE block has
4102 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4103 Check for the last insn of the THEN block being an indirect jump, which
4104 is listed as not having any successors, but confuses the rest of the CE
4105 code processing. ??? we should fix this in the future. */
4106 if (EDGE_COUNT (then_bb
->succs
) == 0)
4108 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4110 rtx_insn
*last_insn
= BB_END (then_bb
);
4113 && NOTE_P (last_insn
)
4114 && last_insn
!= BB_HEAD (then_bb
))
4115 last_insn
= PREV_INSN (last_insn
);
4118 && JUMP_P (last_insn
)
4119 && ! simplejump_p (last_insn
))
4123 else_bb
= NULL_BLOCK
;
4129 /* If the THEN block's successor is the other edge out of the TEST block,
4130 then we have an IF-THEN combo without an ELSE. */
4131 else if (single_succ (then_bb
) == else_bb
)
4134 else_bb
= NULL_BLOCK
;
4137 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4138 has exactly one predecessor and one successor, and the outgoing edge
4139 is not complex, then we have an IF-THEN-ELSE combo. */
4140 else if (single_succ_p (else_bb
)
4141 && single_succ (then_bb
) == single_succ (else_bb
)
4142 && single_pred_p (else_bb
)
4143 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4144 && !(epilogue_completed
4145 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4146 join_bb
= single_succ (else_bb
);
4148 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4152 num_possible_if_blocks
++;
4157 "\nIF-THEN%s block found, pass %d, start block %d "
4158 "[insn %d], then %d [%d]",
4159 (else_bb
) ? "-ELSE" : "",
4162 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4164 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4167 fprintf (dump_file
, ", else %d [%d]",
4169 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4171 fprintf (dump_file
, ", join %d [%d]",
4173 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4175 if (ce_info
->num_multiple_test_blocks
> 0)
4176 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4177 ce_info
->num_multiple_test_blocks
,
4178 (ce_info
->and_and_p
) ? "&&" : "||",
4179 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4180 ce_info
->last_test_bb
->index
,
4181 ((BB_HEAD (ce_info
->last_test_bb
))
4182 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4185 fputc ('\n', dump_file
);
4188 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4189 first condition for free, since we've already asserted that there's a
4190 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4191 we checked the FALLTHRU flag, those are already adjacent to the last IF
4193 /* ??? As an enhancement, move the ELSE block. Have to deal with
4194 BLOCK notes, if by no other means than backing out the merge if they
4195 exist. Sticky enough I don't want to think about it now. */
4197 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4199 if ((next
= next
->next_bb
) != join_bb
4200 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4208 /* Do the real work. */
4210 ce_info
->else_bb
= else_bb
;
4211 ce_info
->join_bb
= join_bb
;
4213 /* If we have && and || tests, try to first handle combining the && and ||
4214 tests into the conditional code, and if that fails, go back and handle
4215 it without the && and ||, which at present handles the && case if there
4216 was no ELSE block. */
4217 if (cond_exec_process_if_block (ce_info
, TRUE
))
4220 if (ce_info
->num_multiple_test_blocks
)
4224 if (cond_exec_process_if_block (ce_info
, FALSE
))
4231 /* Convert a branch over a trap, or a branch
4232 to a trap, into a conditional trap. */
4235 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4237 basic_block then_bb
= then_edge
->dest
;
4238 basic_block else_bb
= else_edge
->dest
;
4239 basic_block other_bb
, trap_bb
;
4240 rtx_insn
*trap
, *jump
;
4242 rtx_insn
*cond_earliest
;
4245 /* Locate the block with the trap instruction. */
4246 /* ??? While we look for no successors, we really ought to allow
4247 EH successors. Need to fix merge_if_block for that to work. */
4248 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4249 trap_bb
= then_bb
, other_bb
= else_bb
;
4250 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4251 trap_bb
= else_bb
, other_bb
= then_bb
;
4257 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4258 test_bb
->index
, trap_bb
->index
);
4261 /* If this is not a standard conditional jump, we can't parse it. */
4262 jump
= BB_END (test_bb
);
4263 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4267 /* If the conditional jump is more than just a conditional jump, then
4268 we can not do if-conversion on this block. */
4269 if (! onlyjump_p (jump
))
4272 /* We must be comparing objects whose modes imply the size. */
4273 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4276 /* Reverse the comparison code, if necessary. */
4277 code
= GET_CODE (cond
);
4278 if (then_bb
== trap_bb
)
4280 code
= reversed_comparison_code (cond
, jump
);
4281 if (code
== UNKNOWN
)
4285 /* Attempt to generate the conditional trap. */
4286 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4287 copy_rtx (XEXP (cond
, 1)),
4288 TRAP_CODE (PATTERN (trap
)));
4292 /* Emit the new insns before cond_earliest. */
4293 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4295 /* Delete the trap block if possible. */
4296 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4297 df_set_bb_dirty (test_bb
);
4298 df_set_bb_dirty (then_bb
);
4299 df_set_bb_dirty (else_bb
);
4301 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4303 delete_basic_block (trap_bb
);
4307 /* Wire together the blocks again. */
4308 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4309 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4310 else if (trap_bb
== then_bb
)
4312 rtx lab
= JUMP_LABEL (jump
);
4313 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4314 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4315 LABEL_NUSES (lab
) += 1;
4316 JUMP_LABEL (newjump
) = lab
;
4317 emit_barrier_after (newjump
);
4321 if (can_merge_blocks_p (test_bb
, other_bb
))
4323 merge_blocks (test_bb
, other_bb
);
4327 num_updated_if_blocks
++;
4331 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4335 block_has_only_trap (basic_block bb
)
4339 /* We're not the exit block. */
4340 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4343 /* The block must have no successors. */
4344 if (EDGE_COUNT (bb
->succs
) > 0)
4347 /* The only instruction in the THEN block must be the trap. */
4348 trap
= first_active_insn (bb
);
4349 if (! (trap
== BB_END (bb
)
4350 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4351 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4357 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4358 transformable, but not necessarily the other. There need be no
4361 Return TRUE if we were successful at converting the block.
4363 Cases we'd like to look at:
4366 if (test) goto over; // x not live
4374 if (! test) goto label;
4377 if (test) goto E; // x not live
4391 (3) // This one's really only interesting for targets that can do
4392 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4393 // it results in multiple branches on a cache line, which often
4394 // does not sit well with predictors.
4396 if (test1) goto E; // predicted not taken
4412 (A) Don't do (2) if the branch is predicted against the block we're
4413 eliminating. Do it anyway if we can eliminate a branch; this requires
4414 that the sole successor of the eliminated block postdominate the other
4417 (B) With CE, on (3) we can steal from both sides of the if, creating
4426 Again, this is most useful if J postdominates.
4428 (C) CE substitutes for helpful life information.
4430 (D) These heuristics need a lot of work. */
4432 /* Tests for case 1 above. */
4435 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4437 basic_block then_bb
= then_edge
->dest
;
4438 basic_block else_bb
= else_edge
->dest
;
4440 int then_bb_index
, then_prob
;
4441 rtx else_target
= NULL_RTX
;
4443 /* If we are partitioning hot/cold basic blocks, we don't want to
4444 mess up unconditional or indirect jumps that cross between hot
4447 Basic block partitioning may result in some jumps that appear to
4448 be optimizable (or blocks that appear to be mergeable), but which really
4449 must be left untouched (they are required to make it safely across
4450 partition boundaries). See the comments at the top of
4451 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4453 if ((BB_END (then_bb
)
4454 && JUMP_P (BB_END (then_bb
))
4455 && CROSSING_JUMP_P (BB_END (then_bb
)))
4456 || (BB_END (test_bb
)
4457 && JUMP_P (BB_END (test_bb
))
4458 && CROSSING_JUMP_P (BB_END (test_bb
)))
4459 || (BB_END (else_bb
)
4460 && JUMP_P (BB_END (else_bb
))
4461 && CROSSING_JUMP_P (BB_END (else_bb
))))
4464 /* THEN has one successor. */
4465 if (!single_succ_p (then_bb
))
4468 /* THEN does not fall through, but is not strange either. */
4469 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4472 /* THEN has one predecessor. */
4473 if (!single_pred_p (then_bb
))
4476 /* THEN must do something. */
4477 if (forwarder_block_p (then_bb
))
4480 num_possible_if_blocks
++;
4483 "\nIF-CASE-1 found, start %d, then %d\n",
4484 test_bb
->index
, then_bb
->index
);
4486 if (then_edge
->probability
)
4487 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4489 then_prob
= REG_BR_PROB_BASE
/ 2;
4491 /* We're speculating from the THEN path, we want to make sure the cost
4492 of speculation is within reason. */
4493 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4494 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4495 predictable_edge_p (then_edge
)))))
4498 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4500 rtx_insn
*jump
= BB_END (else_edge
->src
);
4501 gcc_assert (JUMP_P (jump
));
4502 else_target
= JUMP_LABEL (jump
);
4505 /* Registers set are dead, or are predicable. */
4506 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4507 single_succ_edge (then_bb
), 1))
4510 /* Conversion went ok, including moving the insns and fixing up the
4511 jump. Adjust the CFG to match. */
4513 /* We can avoid creating a new basic block if then_bb is immediately
4514 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4515 through to else_bb. */
4517 if (then_bb
->next_bb
== else_bb
4518 && then_bb
->prev_bb
== test_bb
4519 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4521 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4524 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4525 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4526 else_bb
, else_target
);
4528 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4531 df_set_bb_dirty (test_bb
);
4532 df_set_bb_dirty (else_bb
);
4534 then_bb_index
= then_bb
->index
;
4535 delete_basic_block (then_bb
);
4537 /* Make rest of code believe that the newly created block is the THEN_BB
4538 block we removed. */
4541 df_bb_replace (then_bb_index
, new_bb
);
4542 /* This should have been done above via force_nonfallthru_and_redirect
4543 (possibly called from redirect_edge_and_branch_force). */
4544 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4548 num_updated_if_blocks
++;
4553 /* Test for case 2 above. */
4556 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4558 basic_block then_bb
= then_edge
->dest
;
4559 basic_block else_bb
= else_edge
->dest
;
4561 int then_prob
, else_prob
;
4563 /* We do not want to speculate (empty) loop latches. */
4565 && else_bb
->loop_father
->latch
== else_bb
)
4568 /* If we are partitioning hot/cold basic blocks, we don't want to
4569 mess up unconditional or indirect jumps that cross between hot
4572 Basic block partitioning may result in some jumps that appear to
4573 be optimizable (or blocks that appear to be mergeable), but which really
4574 must be left untouched (they are required to make it safely across
4575 partition boundaries). See the comments at the top of
4576 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4578 if ((BB_END (then_bb
)
4579 && JUMP_P (BB_END (then_bb
))
4580 && CROSSING_JUMP_P (BB_END (then_bb
)))
4581 || (BB_END (test_bb
)
4582 && JUMP_P (BB_END (test_bb
))
4583 && CROSSING_JUMP_P (BB_END (test_bb
)))
4584 || (BB_END (else_bb
)
4585 && JUMP_P (BB_END (else_bb
))
4586 && CROSSING_JUMP_P (BB_END (else_bb
))))
4589 /* ELSE has one successor. */
4590 if (!single_succ_p (else_bb
))
4593 else_succ
= single_succ_edge (else_bb
);
4595 /* ELSE outgoing edge is not complex. */
4596 if (else_succ
->flags
& EDGE_COMPLEX
)
4599 /* ELSE has one predecessor. */
4600 if (!single_pred_p (else_bb
))
4603 /* THEN is not EXIT. */
4604 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4607 if (else_edge
->probability
)
4609 else_prob
= else_edge
->probability
;
4610 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4614 else_prob
= REG_BR_PROB_BASE
/ 2;
4615 then_prob
= REG_BR_PROB_BASE
/ 2;
4618 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4619 if (else_prob
> then_prob
)
4621 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4622 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4628 num_possible_if_blocks
++;
4631 "\nIF-CASE-2 found, start %d, else %d\n",
4632 test_bb
->index
, else_bb
->index
);
4634 /* We're speculating from the ELSE path, we want to make sure the cost
4635 of speculation is within reason. */
4636 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4637 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4638 predictable_edge_p (else_edge
)))))
4641 /* Registers set are dead, or are predicable. */
4642 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4645 /* Conversion went ok, including moving the insns and fixing up the
4646 jump. Adjust the CFG to match. */
4648 df_set_bb_dirty (test_bb
);
4649 df_set_bb_dirty (then_bb
);
4650 delete_basic_block (else_bb
);
4653 num_updated_if_blocks
++;
4655 /* ??? We may now fallthru from one of THEN's successors into a join
4656 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4661 /* Used by the code above to perform the actual rtl transformations.
4662 Return TRUE if successful.
4664 TEST_BB is the block containing the conditional branch. MERGE_BB
4665 is the block containing the code to manipulate. DEST_EDGE is an
4666 edge representing a jump to the join block; after the conversion,
4667 TEST_BB should be branching to its destination.
4668 REVERSEP is true if the sense of the branch should be reversed. */
4671 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4672 basic_block other_bb
, edge dest_edge
, int reversep
)
4674 basic_block new_dest
= dest_edge
->dest
;
4675 rtx_insn
*head
, *end
, *jump
;
4676 rtx_insn
*earliest
= NULL
;
4678 bitmap merge_set
= NULL
;
4679 /* Number of pending changes. */
4680 int n_validated_changes
= 0;
4681 rtx new_dest_label
= NULL_RTX
;
4683 jump
= BB_END (test_bb
);
4685 /* Find the extent of the real code in the merge block. */
4686 head
= BB_HEAD (merge_bb
);
4687 end
= BB_END (merge_bb
);
4689 while (DEBUG_INSN_P (end
) && end
!= head
)
4690 end
= PREV_INSN (end
);
4692 /* If merge_bb ends with a tablejump, predicating/moving insn's
4693 into test_bb and then deleting merge_bb will result in the jumptable
4694 that follows merge_bb being removed along with merge_bb and then we
4695 get an unresolved reference to the jumptable. */
4696 if (tablejump_p (end
, NULL
, NULL
))
4700 head
= NEXT_INSN (head
);
4701 while (DEBUG_INSN_P (head
) && head
!= end
)
4702 head
= NEXT_INSN (head
);
4710 head
= NEXT_INSN (head
);
4711 while (DEBUG_INSN_P (head
) && head
!= end
)
4712 head
= NEXT_INSN (head
);
4717 if (!onlyjump_p (end
))
4724 end
= PREV_INSN (end
);
4725 while (DEBUG_INSN_P (end
) && end
!= head
)
4726 end
= PREV_INSN (end
);
4729 /* Don't move frame-related insn across the conditional branch. This
4730 can lead to one of the paths of the branch having wrong unwind info. */
4731 if (epilogue_completed
)
4733 rtx_insn
*insn
= head
;
4736 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
4740 insn
= NEXT_INSN (insn
);
4744 /* Disable handling dead code by conditional execution if the machine needs
4745 to do anything funny with the tests, etc. */
4746 #ifndef IFCVT_MODIFY_TESTS
4747 if (targetm
.have_conditional_execution ())
4749 /* In the conditional execution case, we have things easy. We know
4750 the condition is reversible. We don't have to check life info
4751 because we're going to conditionally execute the code anyway.
4752 All that's left is making sure the insns involved can actually
4757 cond
= cond_exec_get_condition (jump
);
4761 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
4762 int prob_val
= (note
? XINT (note
, 0) : -1);
4766 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
4769 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
4772 prob_val
= REG_BR_PROB_BASE
- prob_val
;
4775 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
4776 && verify_changes (0))
4777 n_validated_changes
= num_validated_changes ();
4785 /* If we allocated new pseudos (e.g. in the conditional move
4786 expander called from noce_emit_cmove), we must resize the
4788 if (max_regno
< max_reg_num ())
4789 max_regno
= max_reg_num ();
4791 /* Try the NCE path if the CE path did not result in any changes. */
4792 if (n_validated_changes
== 0)
4799 /* In the non-conditional execution case, we have to verify that there
4800 are no trapping operations, no calls, no references to memory, and
4801 that any registers modified are dead at the branch site. */
4803 if (!any_condjump_p (jump
))
4806 /* Find the extent of the conditional. */
4807 cond
= noce_get_condition (jump
, &earliest
, false);
4811 live
= BITMAP_ALLOC (®_obstack
);
4812 simulate_backwards_to_point (merge_bb
, live
, end
);
4813 success
= can_move_insns_across (head
, end
, earliest
, jump
,
4815 df_get_live_in (other_bb
), NULL
);
4820 /* Collect the set of registers set in MERGE_BB. */
4821 merge_set
= BITMAP_ALLOC (®_obstack
);
4823 FOR_BB_INSNS (merge_bb
, insn
)
4824 if (NONDEBUG_INSN_P (insn
))
4825 df_simulate_find_defs (insn
, merge_set
);
4827 /* If shrink-wrapping, disable this optimization when test_bb is
4828 the first basic block and merge_bb exits. The idea is to not
4829 move code setting up a return register as that may clobber a
4830 register used to pass function parameters, which then must be
4831 saved in caller-saved regs. A caller-saved reg requires the
4832 prologue, killing a shrink-wrap opportunity. */
4833 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
4834 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
4835 && single_succ_p (new_dest
)
4836 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4837 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
4842 return_regs
= BITMAP_ALLOC (®_obstack
);
4844 /* Start off with the intersection of regs used to pass
4845 params and regs used to return values. */
4846 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4847 if (FUNCTION_ARG_REGNO_P (i
)
4848 && targetm
.calls
.function_value_regno_p (i
))
4849 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
4851 bitmap_and_into (return_regs
,
4852 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
4853 bitmap_and_into (return_regs
,
4854 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
4855 if (!bitmap_empty_p (return_regs
))
4857 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
4858 if (NONDEBUG_INSN_P (insn
))
4862 /* If this insn sets any reg in return_regs, add all
4863 reg uses to the set of regs we're interested in. */
4864 FOR_EACH_INSN_DEF (def
, insn
)
4865 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
4867 df_simulate_uses (insn
, return_regs
);
4871 if (bitmap_intersect_p (merge_set
, return_regs
))
4873 BITMAP_FREE (return_regs
);
4874 BITMAP_FREE (merge_set
);
4878 BITMAP_FREE (return_regs
);
4883 /* We don't want to use normal invert_jump or redirect_jump because
4884 we don't want to delete_insn called. Also, we want to do our own
4885 change group management. */
4887 old_dest
= JUMP_LABEL (jump
);
4888 if (other_bb
!= new_dest
)
4890 if (!any_condjump_p (jump
))
4893 if (JUMP_P (BB_END (dest_edge
->src
)))
4894 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
4895 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4896 new_dest_label
= ret_rtx
;
4898 new_dest_label
= block_label (new_dest
);
4900 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
4902 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
4903 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
4907 if (verify_changes (n_validated_changes
))
4908 confirm_change_group ();
4912 if (other_bb
!= new_dest
)
4914 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
4917 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
4920 std::swap (BRANCH_EDGE (test_bb
)->count
,
4921 FALLTHRU_EDGE (test_bb
)->count
);
4922 std::swap (BRANCH_EDGE (test_bb
)->probability
,
4923 FALLTHRU_EDGE (test_bb
)->probability
);
4924 update_br_prob_note (test_bb
);
4928 /* Move the insns out of MERGE_BB to before the branch. */
4933 if (end
== BB_END (merge_bb
))
4934 BB_END (merge_bb
) = PREV_INSN (head
);
4936 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
4937 notes being moved might become invalid. */
4943 if (! INSN_P (insn
))
4945 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4948 remove_note (insn
, note
);
4949 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
4951 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
4952 notes referring to the registers being set might become invalid. */
4958 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
4959 remove_reg_equal_equiv_notes_for_regno (i
);
4961 BITMAP_FREE (merge_set
);
4964 reorder_insns (head
, end
, PREV_INSN (earliest
));
4967 /* Remove the jump and edge if we can. */
4968 if (other_bb
== new_dest
)
4971 remove_edge (BRANCH_EDGE (test_bb
));
4972 /* ??? Can't merge blocks here, as then_bb is still in use.
4973 At minimum, the merge will get done just before bb-reorder. */
4982 BITMAP_FREE (merge_set
);
4987 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
4988 we are after combine pass. */
4991 if_convert (bool after_combine
)
4998 df_live_add_problem ();
4999 df_live_set_all_dirty ();
5002 /* Record whether we are after combine pass. */
5003 ifcvt_after_combine
= after_combine
;
5004 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5005 != CODE_FOR_nothing
);
5006 num_possible_if_blocks
= 0;
5007 num_updated_if_blocks
= 0;
5008 num_true_changes
= 0;
5010 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5011 mark_loop_exit_edges ();
5012 loop_optimizer_finalize ();
5013 free_dominance_info (CDI_DOMINATORS
);
5015 /* Compute postdominators. */
5016 calculate_dominance_info (CDI_POST_DOMINATORS
);
5018 df_set_flags (DF_LR_RUN_DCE
);
5020 /* Go through each of the basic blocks looking for things to convert. If we
5021 have conditional execution, we make multiple passes to allow us to handle
5022 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5027 /* Only need to do dce on the first pass. */
5028 df_clear_flags (DF_LR_RUN_DCE
);
5029 cond_exec_changed_p
= FALSE
;
5032 #ifdef IFCVT_MULTIPLE_DUMPS
5033 if (dump_file
&& pass
> 1)
5034 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5037 FOR_EACH_BB_FN (bb
, cfun
)
5040 while (!df_get_bb_dirty (bb
)
5041 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5045 #ifdef IFCVT_MULTIPLE_DUMPS
5046 if (dump_file
&& cond_exec_changed_p
)
5047 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5050 while (cond_exec_changed_p
);
5052 #ifdef IFCVT_MULTIPLE_DUMPS
5054 fprintf (dump_file
, "\n\n========== no more changes\n");
5057 free_dominance_info (CDI_POST_DOMINATORS
);
5062 clear_aux_for_blocks ();
5064 /* If we allocated new pseudos, we must resize the array for sched1. */
5065 if (max_regno
< max_reg_num ())
5066 max_regno
= max_reg_num ();
5068 /* Write the final stats. */
5069 if (dump_file
&& num_possible_if_blocks
> 0)
5072 "\n%d possible IF blocks searched.\n",
5073 num_possible_if_blocks
);
5075 "%d IF blocks converted.\n",
5076 num_updated_if_blocks
);
5078 "%d true changes made.\n\n\n",
5083 df_remove_problem (df_live
);
5085 checking_verify_flow_info ();
5088 /* If-conversion and CFG cleanup. */
5090 rest_of_handle_if_conversion (void)
5092 if (flag_if_conversion
)
5096 dump_reg_info (dump_file
);
5097 dump_flow_info (dump_file
, dump_flags
);
5099 cleanup_cfg (CLEANUP_EXPENSIVE
);
5109 const pass_data pass_data_rtl_ifcvt
=
5111 RTL_PASS
, /* type */
5113 OPTGROUP_NONE
, /* optinfo_flags */
5114 TV_IFCVT
, /* tv_id */
5115 0, /* properties_required */
5116 0, /* properties_provided */
5117 0, /* properties_destroyed */
5118 0, /* todo_flags_start */
5119 TODO_df_finish
, /* todo_flags_finish */
5122 class pass_rtl_ifcvt
: public rtl_opt_pass
5125 pass_rtl_ifcvt (gcc::context
*ctxt
)
5126 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5129 /* opt_pass methods: */
5130 virtual bool gate (function
*)
5132 return (optimize
> 0) && dbg_cnt (if_conversion
);
5135 virtual unsigned int execute (function
*)
5137 return rest_of_handle_if_conversion ();
5140 }; // class pass_rtl_ifcvt
5145 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5147 return new pass_rtl_ifcvt (ctxt
);
5151 /* Rerun if-conversion, as combine may have simplified things enough
5152 to now meet sequence length restrictions. */
5156 const pass_data pass_data_if_after_combine
=
5158 RTL_PASS
, /* type */
5160 OPTGROUP_NONE
, /* optinfo_flags */
5161 TV_IFCVT
, /* tv_id */
5162 0, /* properties_required */
5163 0, /* properties_provided */
5164 0, /* properties_destroyed */
5165 0, /* todo_flags_start */
5166 TODO_df_finish
, /* todo_flags_finish */
5169 class pass_if_after_combine
: public rtl_opt_pass
5172 pass_if_after_combine (gcc::context
*ctxt
)
5173 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5176 /* opt_pass methods: */
5177 virtual bool gate (function
*)
5179 return optimize
> 0 && flag_if_conversion
5180 && dbg_cnt (if_after_combine
);
5183 virtual unsigned int execute (function
*)
5189 }; // class pass_if_after_combine
5194 make_pass_if_after_combine (gcc::context
*ctxt
)
5196 return new pass_if_after_combine (ctxt
);
5202 const pass_data pass_data_if_after_reload
=
5204 RTL_PASS
, /* type */
5206 OPTGROUP_NONE
, /* optinfo_flags */
5207 TV_IFCVT2
, /* tv_id */
5208 0, /* properties_required */
5209 0, /* properties_provided */
5210 0, /* properties_destroyed */
5211 0, /* todo_flags_start */
5212 TODO_df_finish
, /* todo_flags_finish */
5215 class pass_if_after_reload
: public rtl_opt_pass
5218 pass_if_after_reload (gcc::context
*ctxt
)
5219 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5222 /* opt_pass methods: */
5223 virtual bool gate (function
*)
5225 return optimize
> 0 && flag_if_conversion2
5226 && dbg_cnt (if_after_reload
);
5229 virtual unsigned int execute (function
*)
5235 }; // class pass_if_after_reload
5240 make_pass_if_after_reload (gcc::context
*ctxt
)
5242 return new pass_if_after_reload (ctxt
);