1 /* Rtl-level induction variable analysis.
2 Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009
3 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by the
9 Free Software Foundation; either version 3, or (at your option) any
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 /* This is a simple analysis of induction variables of the loop. The major use
22 is for determining the number of iterations of a loop for loop unrolling,
23 doloop optimization and branch prediction. The iv information is computed
26 Induction variables are analyzed by walking the use-def chains. When
27 a basic induction variable (biv) is found, it is cached in the bivs
28 hash table. When register is proved to be a biv, its description
29 is stored to DF_REF_DATA of the def reference.
31 The analysis works always with one loop -- you must call
32 iv_analysis_loop_init (loop) for it. All the other functions then work with
33 this loop. When you need to work with another loop, just call
34 iv_analysis_loop_init for it. When you no longer need iv analysis, call
35 iv_analysis_done () to clean up the memory.
37 The available functions are:
39 iv_analyze (insn, reg, iv): Stores the description of the induction variable
40 corresponding to the use of register REG in INSN to IV. Returns true if
41 REG is an induction variable in INSN. false otherwise.
42 If use of REG is not found in INSN, following insns are scanned (so that
43 we may call this function on insn returned by get_condition).
44 iv_analyze_result (insn, def, iv): Stores to IV the description of the iv
45 corresponding to DEF, which is a register defined in INSN.
46 iv_analyze_expr (insn, rhs, mode, iv): Stores to IV the description of iv
47 corresponding to expression EXPR evaluated at INSN. All registers used bu
48 EXPR must also be used in INSN.
53 #include "coretypes.h"
56 #include "hard-reg-set.h"
58 #include "basic-block.h"
67 /* Possible return values of iv_get_reaching_def. */
71 /* More than one reaching def, or reaching def that does not
75 /* The use is trivial invariant of the loop, i.e. is not changed
79 /* The use is reached by initial value and a value from the
80 previous iteration. */
83 /* The use has single dominating def. */
87 /* Information about a biv. */
91 unsigned regno
; /* The register of the biv. */
92 struct rtx_iv iv
; /* Value of the biv. */
95 static bool clean_slate
= true;
97 static unsigned int iv_ref_table_size
= 0;
99 /* Table of rtx_ivs indexed by the df_ref uid field. */
100 static struct rtx_iv
** iv_ref_table
;
102 /* Induction variable stored at the reference. */
103 #define DF_REF_IV(REF) iv_ref_table[DF_REF_ID(REF)]
104 #define DF_REF_IV_SET(REF, IV) iv_ref_table[DF_REF_ID(REF)] = (IV)
106 /* The current loop. */
108 static struct loop
*current_loop
;
110 /* Bivs of the current loop. */
114 static bool iv_analyze_op (rtx
, rtx
, struct rtx_iv
*);
116 /* Dumps information about IV to FILE. */
118 extern void dump_iv_info (FILE *, struct rtx_iv
*);
120 dump_iv_info (FILE *file
, struct rtx_iv
*iv
)
124 fprintf (file
, "not simple");
128 if (iv
->step
== const0_rtx
129 && !iv
->first_special
)
130 fprintf (file
, "invariant ");
132 print_rtl (file
, iv
->base
);
133 if (iv
->step
!= const0_rtx
)
135 fprintf (file
, " + ");
136 print_rtl (file
, iv
->step
);
137 fprintf (file
, " * iteration");
139 fprintf (file
, " (in %s)", GET_MODE_NAME (iv
->mode
));
141 if (iv
->mode
!= iv
->extend_mode
)
142 fprintf (file
, " %s to %s",
143 rtx_name
[iv
->extend
],
144 GET_MODE_NAME (iv
->extend_mode
));
146 if (iv
->mult
!= const1_rtx
)
148 fprintf (file
, " * ");
149 print_rtl (file
, iv
->mult
);
151 if (iv
->delta
!= const0_rtx
)
153 fprintf (file
, " + ");
154 print_rtl (file
, iv
->delta
);
156 if (iv
->first_special
)
157 fprintf (file
, " (first special)");
160 /* Generates a subreg to get the least significant part of EXPR (in mode
161 INNER_MODE) to OUTER_MODE. */
164 lowpart_subreg (enum machine_mode outer_mode
, rtx expr
,
165 enum machine_mode inner_mode
)
167 return simplify_gen_subreg (outer_mode
, expr
, inner_mode
,
168 subreg_lowpart_offset (outer_mode
, inner_mode
));
172 check_iv_ref_table_size (void)
174 if (iv_ref_table_size
< DF_DEFS_TABLE_SIZE())
176 unsigned int new_size
= DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4);
177 iv_ref_table
= XRESIZEVEC (struct rtx_iv
*, iv_ref_table
, new_size
);
178 memset (&iv_ref_table
[iv_ref_table_size
], 0,
179 (new_size
- iv_ref_table_size
) * sizeof (struct rtx_iv
*));
180 iv_ref_table_size
= new_size
;
185 /* Checks whether REG is a well-behaved register. */
188 simple_reg_p (rtx reg
)
192 if (GET_CODE (reg
) == SUBREG
)
194 if (!subreg_lowpart_p (reg
))
196 reg
= SUBREG_REG (reg
);
203 if (HARD_REGISTER_NUM_P (r
))
206 if (GET_MODE_CLASS (GET_MODE (reg
)) != MODE_INT
)
212 /* Clears the information about ivs stored in df. */
217 unsigned i
, n_defs
= DF_DEFS_TABLE_SIZE ();
220 check_iv_ref_table_size ();
221 for (i
= 0; i
< n_defs
; i
++)
223 iv
= iv_ref_table
[i
];
227 iv_ref_table
[i
] = NULL
;
234 /* Returns hash value for biv B. */
237 biv_hash (const void *b
)
239 return ((const struct biv_entry
*) b
)->regno
;
242 /* Compares biv B and register R. */
245 biv_eq (const void *b
, const void *r
)
247 return ((const struct biv_entry
*) b
)->regno
== REGNO ((const_rtx
) r
);
250 /* Prepare the data for an induction variable analysis of a LOOP. */
253 iv_analysis_loop_init (struct loop
*loop
)
255 basic_block
*body
= get_loop_body_in_dom_order (loop
), bb
;
256 bitmap blocks
= BITMAP_ALLOC (NULL
);
261 /* Clear the information from the analysis of the previous loop. */
264 df_set_flags (DF_EQ_NOTES
+ DF_DEFER_INSN_RESCAN
);
265 bivs
= htab_create (10, biv_hash
, biv_eq
, free
);
271 for (i
= 0; i
< loop
->num_nodes
; i
++)
274 bitmap_set_bit (blocks
, bb
->index
);
276 /* Get rid of the ud chains before processing the rescans. Then add
278 df_remove_problem (df_chain
);
279 df_process_deferred_rescans ();
280 df_chain_add_problem (DF_UD_CHAIN
);
281 df_set_blocks (blocks
);
284 df_dump_region (dump_file
);
286 check_iv_ref_table_size ();
287 BITMAP_FREE (blocks
);
291 /* Finds the definition of REG that dominates loop latch and stores
292 it to DEF. Returns false if there is not a single definition
293 dominating the latch. If REG has no definition in loop, DEF
294 is set to NULL and true is returned. */
297 latch_dominating_def (rtx reg
, df_ref
*def
)
299 df_ref single_rd
= NULL
, adef
;
300 unsigned regno
= REGNO (reg
);
301 struct df_rd_bb_info
*bb_info
= DF_RD_BB_INFO (current_loop
->latch
);
303 for (adef
= DF_REG_DEF_CHAIN (regno
); adef
; adef
= DF_REF_NEXT_REG (adef
))
305 if (!bitmap_bit_p (df
->blocks_to_analyze
, DF_REF_BBNO (adef
))
306 || !bitmap_bit_p (bb_info
->out
, DF_REF_ID (adef
)))
309 /* More than one reaching definition. */
313 if (!just_once_each_iteration_p (current_loop
, DF_REF_BB (adef
)))
323 /* Gets definition of REG reaching its use in INSN and stores it to DEF. */
325 static enum iv_grd_result
326 iv_get_reaching_def (rtx insn
, rtx reg
, df_ref
*def
)
329 basic_block def_bb
, use_bb
;
334 if (!simple_reg_p (reg
))
336 if (GET_CODE (reg
) == SUBREG
)
337 reg
= SUBREG_REG (reg
);
338 gcc_assert (REG_P (reg
));
340 use
= df_find_use (insn
, reg
);
341 gcc_assert (use
!= NULL
);
343 if (!DF_REF_CHAIN (use
))
344 return GRD_INVARIANT
;
346 /* More than one reaching def. */
347 if (DF_REF_CHAIN (use
)->next
)
350 adef
= DF_REF_CHAIN (use
)->ref
;
352 /* We do not handle setting only part of the register. */
353 if (DF_REF_FLAGS (adef
) & DF_REF_READ_WRITE
)
356 def_insn
= DF_REF_INSN (adef
);
357 def_bb
= DF_REF_BB (adef
);
358 use_bb
= BLOCK_FOR_INSN (insn
);
360 if (use_bb
== def_bb
)
361 dom_p
= (DF_INSN_LUID (def_insn
) < DF_INSN_LUID (insn
));
363 dom_p
= dominated_by_p (CDI_DOMINATORS
, use_bb
, def_bb
);
368 return GRD_SINGLE_DOM
;
371 /* The definition does not dominate the use. This is still OK if
372 this may be a use of a biv, i.e. if the def_bb dominates loop
374 if (just_once_each_iteration_p (current_loop
, def_bb
))
375 return GRD_MAYBE_BIV
;
380 /* Sets IV to invariant CST in MODE. Always returns true (just for
381 consistency with other iv manipulation functions that may fail). */
384 iv_constant (struct rtx_iv
*iv
, rtx cst
, enum machine_mode mode
)
386 if (mode
== VOIDmode
)
387 mode
= GET_MODE (cst
);
391 iv
->step
= const0_rtx
;
392 iv
->first_special
= false;
393 iv
->extend
= UNKNOWN
;
394 iv
->extend_mode
= iv
->mode
;
395 iv
->delta
= const0_rtx
;
396 iv
->mult
= const1_rtx
;
401 /* Evaluates application of subreg to MODE on IV. */
404 iv_subreg (struct rtx_iv
*iv
, enum machine_mode mode
)
406 /* If iv is invariant, just calculate the new value. */
407 if (iv
->step
== const0_rtx
408 && !iv
->first_special
)
410 rtx val
= get_iv_value (iv
, const0_rtx
);
411 val
= lowpart_subreg (mode
, val
, iv
->extend_mode
);
414 iv
->extend
= UNKNOWN
;
415 iv
->mode
= iv
->extend_mode
= mode
;
416 iv
->delta
= const0_rtx
;
417 iv
->mult
= const1_rtx
;
421 if (iv
->extend_mode
== mode
)
424 if (GET_MODE_BITSIZE (mode
) > GET_MODE_BITSIZE (iv
->mode
))
427 iv
->extend
= UNKNOWN
;
430 iv
->base
= simplify_gen_binary (PLUS
, iv
->extend_mode
, iv
->delta
,
431 simplify_gen_binary (MULT
, iv
->extend_mode
,
432 iv
->base
, iv
->mult
));
433 iv
->step
= simplify_gen_binary (MULT
, iv
->extend_mode
, iv
->step
, iv
->mult
);
434 iv
->mult
= const1_rtx
;
435 iv
->delta
= const0_rtx
;
436 iv
->first_special
= false;
441 /* Evaluates application of EXTEND to MODE on IV. */
444 iv_extend (struct rtx_iv
*iv
, enum rtx_code extend
, enum machine_mode mode
)
446 /* If iv is invariant, just calculate the new value. */
447 if (iv
->step
== const0_rtx
448 && !iv
->first_special
)
450 rtx val
= get_iv_value (iv
, const0_rtx
);
451 val
= simplify_gen_unary (extend
, mode
, val
, iv
->extend_mode
);
454 iv
->extend
= UNKNOWN
;
455 iv
->mode
= iv
->extend_mode
= mode
;
456 iv
->delta
= const0_rtx
;
457 iv
->mult
= const1_rtx
;
461 if (mode
!= iv
->extend_mode
)
464 if (iv
->extend
!= UNKNOWN
465 && iv
->extend
!= extend
)
473 /* Evaluates negation of IV. */
476 iv_neg (struct rtx_iv
*iv
)
478 if (iv
->extend
== UNKNOWN
)
480 iv
->base
= simplify_gen_unary (NEG
, iv
->extend_mode
,
481 iv
->base
, iv
->extend_mode
);
482 iv
->step
= simplify_gen_unary (NEG
, iv
->extend_mode
,
483 iv
->step
, iv
->extend_mode
);
487 iv
->delta
= simplify_gen_unary (NEG
, iv
->extend_mode
,
488 iv
->delta
, iv
->extend_mode
);
489 iv
->mult
= simplify_gen_unary (NEG
, iv
->extend_mode
,
490 iv
->mult
, iv
->extend_mode
);
496 /* Evaluates addition or subtraction (according to OP) of IV1 to IV0. */
499 iv_add (struct rtx_iv
*iv0
, struct rtx_iv
*iv1
, enum rtx_code op
)
501 enum machine_mode mode
;
504 /* Extend the constant to extend_mode of the other operand if necessary. */
505 if (iv0
->extend
== UNKNOWN
506 && iv0
->mode
== iv0
->extend_mode
507 && iv0
->step
== const0_rtx
508 && GET_MODE_SIZE (iv0
->extend_mode
) < GET_MODE_SIZE (iv1
->extend_mode
))
510 iv0
->extend_mode
= iv1
->extend_mode
;
511 iv0
->base
= simplify_gen_unary (ZERO_EXTEND
, iv0
->extend_mode
,
512 iv0
->base
, iv0
->mode
);
514 if (iv1
->extend
== UNKNOWN
515 && iv1
->mode
== iv1
->extend_mode
516 && iv1
->step
== const0_rtx
517 && GET_MODE_SIZE (iv1
->extend_mode
) < GET_MODE_SIZE (iv0
->extend_mode
))
519 iv1
->extend_mode
= iv0
->extend_mode
;
520 iv1
->base
= simplify_gen_unary (ZERO_EXTEND
, iv1
->extend_mode
,
521 iv1
->base
, iv1
->mode
);
524 mode
= iv0
->extend_mode
;
525 if (mode
!= iv1
->extend_mode
)
528 if (iv0
->extend
== UNKNOWN
&& iv1
->extend
== UNKNOWN
)
530 if (iv0
->mode
!= iv1
->mode
)
533 iv0
->base
= simplify_gen_binary (op
, mode
, iv0
->base
, iv1
->base
);
534 iv0
->step
= simplify_gen_binary (op
, mode
, iv0
->step
, iv1
->step
);
539 /* Handle addition of constant. */
540 if (iv1
->extend
== UNKNOWN
542 && iv1
->step
== const0_rtx
)
544 iv0
->delta
= simplify_gen_binary (op
, mode
, iv0
->delta
, iv1
->base
);
548 if (iv0
->extend
== UNKNOWN
550 && iv0
->step
== const0_rtx
)
558 iv0
->delta
= simplify_gen_binary (PLUS
, mode
, iv0
->delta
, arg
);
565 /* Evaluates multiplication of IV by constant CST. */
568 iv_mult (struct rtx_iv
*iv
, rtx mby
)
570 enum machine_mode mode
= iv
->extend_mode
;
572 if (GET_MODE (mby
) != VOIDmode
573 && GET_MODE (mby
) != mode
)
576 if (iv
->extend
== UNKNOWN
)
578 iv
->base
= simplify_gen_binary (MULT
, mode
, iv
->base
, mby
);
579 iv
->step
= simplify_gen_binary (MULT
, mode
, iv
->step
, mby
);
583 iv
->delta
= simplify_gen_binary (MULT
, mode
, iv
->delta
, mby
);
584 iv
->mult
= simplify_gen_binary (MULT
, mode
, iv
->mult
, mby
);
590 /* Evaluates shift of IV by constant CST. */
593 iv_shift (struct rtx_iv
*iv
, rtx mby
)
595 enum machine_mode mode
= iv
->extend_mode
;
597 if (GET_MODE (mby
) != VOIDmode
598 && GET_MODE (mby
) != mode
)
601 if (iv
->extend
== UNKNOWN
)
603 iv
->base
= simplify_gen_binary (ASHIFT
, mode
, iv
->base
, mby
);
604 iv
->step
= simplify_gen_binary (ASHIFT
, mode
, iv
->step
, mby
);
608 iv
->delta
= simplify_gen_binary (ASHIFT
, mode
, iv
->delta
, mby
);
609 iv
->mult
= simplify_gen_binary (ASHIFT
, mode
, iv
->mult
, mby
);
615 /* The recursive part of get_biv_step. Gets the value of the single value
616 defined by DEF wrto initial value of REG inside loop, in shape described
620 get_biv_step_1 (df_ref def
, rtx reg
,
621 rtx
*inner_step
, enum machine_mode
*inner_mode
,
622 enum rtx_code
*extend
, enum machine_mode outer_mode
,
625 rtx set
, rhs
, op0
= NULL_RTX
, op1
= NULL_RTX
;
626 rtx next
, nextr
, tmp
;
628 rtx insn
= DF_REF_INSN (def
);
630 enum iv_grd_result res
;
632 set
= single_set (insn
);
636 rhs
= find_reg_equal_equiv_note (insn
);
642 code
= GET_CODE (rhs
);
655 if (code
== PLUS
&& CONSTANT_P (op0
))
657 tmp
= op0
; op0
= op1
; op1
= tmp
;
660 if (!simple_reg_p (op0
)
661 || !CONSTANT_P (op1
))
664 if (GET_MODE (rhs
) != outer_mode
)
666 /* ppc64 uses expressions like
668 (set x:SI (plus:SI (subreg:SI y:DI) 1)).
670 this is equivalent to
672 (set x':DI (plus:DI y:DI 1))
673 (set x:SI (subreg:SI (x':DI)). */
674 if (GET_CODE (op0
) != SUBREG
)
676 if (GET_MODE (SUBREG_REG (op0
)) != outer_mode
)
685 if (GET_MODE (rhs
) != outer_mode
)
689 if (!simple_reg_p (op0
))
699 if (GET_CODE (next
) == SUBREG
)
701 if (!subreg_lowpart_p (next
))
704 nextr
= SUBREG_REG (next
);
705 if (GET_MODE (nextr
) != outer_mode
)
711 res
= iv_get_reaching_def (insn
, nextr
, &next_def
);
713 if (res
== GRD_INVALID
|| res
== GRD_INVARIANT
)
716 if (res
== GRD_MAYBE_BIV
)
718 if (!rtx_equal_p (nextr
, reg
))
721 *inner_step
= const0_rtx
;
723 *inner_mode
= outer_mode
;
724 *outer_step
= const0_rtx
;
726 else if (!get_biv_step_1 (next_def
, reg
,
727 inner_step
, inner_mode
, extend
, outer_mode
,
731 if (GET_CODE (next
) == SUBREG
)
733 enum machine_mode amode
= GET_MODE (next
);
735 if (GET_MODE_SIZE (amode
) > GET_MODE_SIZE (*inner_mode
))
739 *inner_step
= simplify_gen_binary (PLUS
, outer_mode
,
740 *inner_step
, *outer_step
);
741 *outer_step
= const0_rtx
;
753 if (*inner_mode
== outer_mode
754 /* See comment in previous switch. */
755 || GET_MODE (rhs
) != outer_mode
)
756 *inner_step
= simplify_gen_binary (code
, outer_mode
,
759 *outer_step
= simplify_gen_binary (code
, outer_mode
,
765 gcc_assert (GET_MODE (op0
) == *inner_mode
766 && *extend
== UNKNOWN
767 && *outer_step
== const0_rtx
);
779 /* Gets the operation on register REG inside loop, in shape
781 OUTER_STEP + EXTEND_{OUTER_MODE} (SUBREG_{INNER_MODE} (REG + INNER_STEP))
783 If the operation cannot be described in this shape, return false.
784 LAST_DEF is the definition of REG that dominates loop latch. */
787 get_biv_step (df_ref last_def
, rtx reg
, rtx
*inner_step
,
788 enum machine_mode
*inner_mode
, enum rtx_code
*extend
,
789 enum machine_mode
*outer_mode
, rtx
*outer_step
)
791 *outer_mode
= GET_MODE (reg
);
793 if (!get_biv_step_1 (last_def
, reg
,
794 inner_step
, inner_mode
, extend
, *outer_mode
,
798 gcc_assert ((*inner_mode
== *outer_mode
) != (*extend
!= UNKNOWN
));
799 gcc_assert (*inner_mode
!= *outer_mode
|| *outer_step
== const0_rtx
);
804 /* Records information that DEF is induction variable IV. */
807 record_iv (df_ref def
, struct rtx_iv
*iv
)
809 struct rtx_iv
*recorded_iv
= XNEW (struct rtx_iv
);
812 check_iv_ref_table_size ();
813 DF_REF_IV_SET (def
, recorded_iv
);
816 /* If DEF was already analyzed for bivness, store the description of the biv to
817 IV and return true. Otherwise return false. */
820 analyzed_for_bivness_p (rtx def
, struct rtx_iv
*iv
)
822 struct biv_entry
*biv
=
823 (struct biv_entry
*) htab_find_with_hash (bivs
, def
, REGNO (def
));
833 record_biv (rtx def
, struct rtx_iv
*iv
)
835 struct biv_entry
*biv
= XNEW (struct biv_entry
);
836 void **slot
= htab_find_slot_with_hash (bivs
, def
, REGNO (def
), INSERT
);
838 biv
->regno
= REGNO (def
);
844 /* Determines whether DEF is a biv and if so, stores its description
848 iv_analyze_biv (rtx def
, struct rtx_iv
*iv
)
850 rtx inner_step
, outer_step
;
851 enum machine_mode inner_mode
, outer_mode
;
852 enum rtx_code extend
;
857 fprintf (dump_file
, "Analyzing ");
858 print_rtl (dump_file
, def
);
859 fprintf (dump_file
, " for bivness.\n");
864 if (!CONSTANT_P (def
))
867 return iv_constant (iv
, def
, VOIDmode
);
870 if (!latch_dominating_def (def
, &last_def
))
873 fprintf (dump_file
, " not simple.\n");
878 return iv_constant (iv
, def
, VOIDmode
);
880 if (analyzed_for_bivness_p (def
, iv
))
883 fprintf (dump_file
, " already analysed.\n");
884 return iv
->base
!= NULL_RTX
;
887 if (!get_biv_step (last_def
, def
, &inner_step
, &inner_mode
, &extend
,
888 &outer_mode
, &outer_step
))
894 /* Loop transforms base to es (base + inner_step) + outer_step,
895 where es means extend of subreg between inner_mode and outer_mode.
896 The corresponding induction variable is
898 es ((base - outer_step) + i * (inner_step + outer_step)) + outer_step */
900 iv
->base
= simplify_gen_binary (MINUS
, outer_mode
, def
, outer_step
);
901 iv
->step
= simplify_gen_binary (PLUS
, outer_mode
, inner_step
, outer_step
);
902 iv
->mode
= inner_mode
;
903 iv
->extend_mode
= outer_mode
;
905 iv
->mult
= const1_rtx
;
906 iv
->delta
= outer_step
;
907 iv
->first_special
= inner_mode
!= outer_mode
;
912 fprintf (dump_file
, " ");
913 dump_iv_info (dump_file
, iv
);
914 fprintf (dump_file
, "\n");
917 record_biv (def
, iv
);
918 return iv
->base
!= NULL_RTX
;
921 /* Analyzes expression RHS used at INSN and stores the result to *IV.
922 The mode of the induction variable is MODE. */
925 iv_analyze_expr (rtx insn
, rtx rhs
, enum machine_mode mode
, struct rtx_iv
*iv
)
927 rtx mby
= NULL_RTX
, tmp
;
928 rtx op0
= NULL_RTX
, op1
= NULL_RTX
;
929 struct rtx_iv iv0
, iv1
;
930 enum rtx_code code
= GET_CODE (rhs
);
931 enum machine_mode omode
= mode
;
937 gcc_assert (GET_MODE (rhs
) == mode
|| GET_MODE (rhs
) == VOIDmode
);
943 if (!iv_analyze_op (insn
, rhs
, iv
))
946 if (iv
->mode
== VOIDmode
)
949 iv
->extend_mode
= mode
;
965 omode
= GET_MODE (op0
);
977 if (!CONSTANT_P (mby
))
983 if (!CONSTANT_P (mby
))
990 if (!CONSTANT_P (mby
))
999 && !iv_analyze_expr (insn
, op0
, omode
, &iv0
))
1003 && !iv_analyze_expr (insn
, op1
, omode
, &iv1
))
1010 if (!iv_extend (&iv0
, code
, mode
))
1021 if (!iv_add (&iv0
, &iv1
, code
))
1026 if (!iv_mult (&iv0
, mby
))
1031 if (!iv_shift (&iv0
, mby
))
1040 return iv
->base
!= NULL_RTX
;
1043 /* Analyzes iv DEF and stores the result to *IV. */
1046 iv_analyze_def (df_ref def
, struct rtx_iv
*iv
)
1048 rtx insn
= DF_REF_INSN (def
);
1049 rtx reg
= DF_REF_REG (def
);
1054 fprintf (dump_file
, "Analyzing def of ");
1055 print_rtl (dump_file
, reg
);
1056 fprintf (dump_file
, " in insn ");
1057 print_rtl_single (dump_file
, insn
);
1060 check_iv_ref_table_size ();
1061 if (DF_REF_IV (def
))
1064 fprintf (dump_file
, " already analysed.\n");
1065 *iv
= *DF_REF_IV (def
);
1066 return iv
->base
!= NULL_RTX
;
1069 iv
->mode
= VOIDmode
;
1070 iv
->base
= NULL_RTX
;
1071 iv
->step
= NULL_RTX
;
1076 set
= single_set (insn
);
1080 if (!REG_P (SET_DEST (set
)))
1083 gcc_assert (SET_DEST (set
) == reg
);
1084 rhs
= find_reg_equal_equiv_note (insn
);
1086 rhs
= XEXP (rhs
, 0);
1088 rhs
= SET_SRC (set
);
1090 iv_analyze_expr (insn
, rhs
, GET_MODE (reg
), iv
);
1091 record_iv (def
, iv
);
1095 print_rtl (dump_file
, reg
);
1096 fprintf (dump_file
, " in insn ");
1097 print_rtl_single (dump_file
, insn
);
1098 fprintf (dump_file
, " is ");
1099 dump_iv_info (dump_file
, iv
);
1100 fprintf (dump_file
, "\n");
1103 return iv
->base
!= NULL_RTX
;
1106 /* Analyzes operand OP of INSN and stores the result to *IV. */
1109 iv_analyze_op (rtx insn
, rtx op
, struct rtx_iv
*iv
)
1112 enum iv_grd_result res
;
1116 fprintf (dump_file
, "Analyzing operand ");
1117 print_rtl (dump_file
, op
);
1118 fprintf (dump_file
, " of insn ");
1119 print_rtl_single (dump_file
, insn
);
1122 if (CONSTANT_P (op
))
1123 res
= GRD_INVARIANT
;
1124 else if (GET_CODE (op
) == SUBREG
)
1126 if (!subreg_lowpart_p (op
))
1129 if (!iv_analyze_op (insn
, SUBREG_REG (op
), iv
))
1132 return iv_subreg (iv
, GET_MODE (op
));
1136 res
= iv_get_reaching_def (insn
, op
, &def
);
1137 if (res
== GRD_INVALID
)
1140 fprintf (dump_file
, " not simple.\n");
1145 if (res
== GRD_INVARIANT
)
1147 iv_constant (iv
, op
, VOIDmode
);
1151 fprintf (dump_file
, " ");
1152 dump_iv_info (dump_file
, iv
);
1153 fprintf (dump_file
, "\n");
1158 if (res
== GRD_MAYBE_BIV
)
1159 return iv_analyze_biv (op
, iv
);
1161 return iv_analyze_def (def
, iv
);
1164 /* Analyzes value VAL at INSN and stores the result to *IV. */
1167 iv_analyze (rtx insn
, rtx val
, struct rtx_iv
*iv
)
1171 /* We must find the insn in that val is used, so that we get to UD chains.
1172 Since the function is sometimes called on result of get_condition,
1173 this does not necessarily have to be directly INSN; scan also the
1175 if (simple_reg_p (val
))
1177 if (GET_CODE (val
) == SUBREG
)
1178 reg
= SUBREG_REG (val
);
1182 while (!df_find_use (insn
, reg
))
1183 insn
= NEXT_INSN (insn
);
1186 return iv_analyze_op (insn
, val
, iv
);
1189 /* Analyzes definition of DEF in INSN and stores the result to IV. */
1192 iv_analyze_result (rtx insn
, rtx def
, struct rtx_iv
*iv
)
1196 adef
= df_find_def (insn
, def
);
1200 return iv_analyze_def (adef
, iv
);
1203 /* Checks whether definition of register REG in INSN is a basic induction
1204 variable. IV analysis must have been initialized (via a call to
1205 iv_analysis_loop_init) for this function to produce a result. */
1208 biv_p (rtx insn
, rtx reg
)
1211 df_ref def
, last_def
;
1213 if (!simple_reg_p (reg
))
1216 def
= df_find_def (insn
, reg
);
1217 gcc_assert (def
!= NULL
);
1218 if (!latch_dominating_def (reg
, &last_def
))
1220 if (last_def
!= def
)
1223 if (!iv_analyze_biv (reg
, &iv
))
1226 return iv
.step
!= const0_rtx
;
1229 /* Calculates value of IV at ITERATION-th iteration. */
1232 get_iv_value (struct rtx_iv
*iv
, rtx iteration
)
1236 /* We would need to generate some if_then_else patterns, and so far
1237 it is not needed anywhere. */
1238 gcc_assert (!iv
->first_special
);
1240 if (iv
->step
!= const0_rtx
&& iteration
!= const0_rtx
)
1241 val
= simplify_gen_binary (PLUS
, iv
->extend_mode
, iv
->base
,
1242 simplify_gen_binary (MULT
, iv
->extend_mode
,
1243 iv
->step
, iteration
));
1247 if (iv
->extend_mode
== iv
->mode
)
1250 val
= lowpart_subreg (iv
->mode
, val
, iv
->extend_mode
);
1252 if (iv
->extend
== UNKNOWN
)
1255 val
= simplify_gen_unary (iv
->extend
, iv
->extend_mode
, val
, iv
->mode
);
1256 val
= simplify_gen_binary (PLUS
, iv
->extend_mode
, iv
->delta
,
1257 simplify_gen_binary (MULT
, iv
->extend_mode
,
1263 /* Free the data for an induction variable analysis. */
1266 iv_analysis_done (void)
1272 df_finish_pass (true);
1274 free (iv_ref_table
);
1275 iv_ref_table
= NULL
;
1276 iv_ref_table_size
= 0;
1281 /* Computes inverse to X modulo (1 << MOD). */
1283 static unsigned HOST_WIDEST_INT
1284 inverse (unsigned HOST_WIDEST_INT x
, int mod
)
1286 unsigned HOST_WIDEST_INT mask
=
1287 ((unsigned HOST_WIDEST_INT
) 1 << (mod
- 1) << 1) - 1;
1288 unsigned HOST_WIDEST_INT rslt
= 1;
1291 for (i
= 0; i
< mod
- 1; i
++)
1293 rslt
= (rslt
* x
) & mask
;
1300 /* Checks whether register *REG is in set ALT. Callback for for_each_rtx. */
1303 altered_reg_used (rtx
*reg
, void *alt
)
1308 return REGNO_REG_SET_P ((bitmap
) alt
, REGNO (*reg
));
1311 /* Marks registers altered by EXPR in set ALT. */
1314 mark_altered (rtx expr
, const_rtx by ATTRIBUTE_UNUSED
, void *alt
)
1316 if (GET_CODE (expr
) == SUBREG
)
1317 expr
= SUBREG_REG (expr
);
1321 SET_REGNO_REG_SET ((bitmap
) alt
, REGNO (expr
));
1324 /* Checks whether RHS is simple enough to process. */
1327 simple_rhs_p (rtx rhs
)
1331 if (CONSTANT_P (rhs
)
1332 || (REG_P (rhs
) && !HARD_REGISTER_P (rhs
)))
1335 switch (GET_CODE (rhs
))
1339 op0
= XEXP (rhs
, 0);
1340 op1
= XEXP (rhs
, 1);
1341 /* Allow reg + const and reg + reg. */
1342 if (!(REG_P (op0
) && !HARD_REGISTER_P (op0
))
1343 && !CONSTANT_P (op0
))
1345 if (!(REG_P (op1
) && !HARD_REGISTER_P (op1
))
1346 && !CONSTANT_P (op1
))
1352 op0
= XEXP (rhs
, 0);
1353 op1
= XEXP (rhs
, 1);
1354 /* Allow reg << const. */
1355 if (!(REG_P (op0
) && !HARD_REGISTER_P (op0
)))
1357 if (!CONSTANT_P (op1
))
1367 /* A subroutine of simplify_using_initial_values, this function examines INSN
1368 to see if it contains a suitable set that we can use to make a replacement.
1369 If it is suitable, return true and set DEST and SRC to the lhs and rhs of
1370 the set; return false otherwise. */
1373 suitable_set_for_replacement (rtx insn
, rtx
*dest
, rtx
*src
)
1375 rtx set
= single_set (insn
);
1376 rtx lhs
= NULL_RTX
, rhs
;
1381 lhs
= SET_DEST (set
);
1385 rhs
= find_reg_equal_equiv_note (insn
);
1387 rhs
= XEXP (rhs
, 0);
1389 rhs
= SET_SRC (set
);
1391 if (!simple_rhs_p (rhs
))
1399 /* Checks whether A implies B. */
1402 implies_p (rtx a
, rtx b
)
1404 rtx op0
, op1
, opb0
, opb1
, r
;
1405 enum machine_mode mode
;
1407 if (GET_CODE (a
) == EQ
)
1414 r
= simplify_replace_rtx (b
, op0
, op1
);
1415 if (r
== const_true_rtx
)
1421 r
= simplify_replace_rtx (b
, op1
, op0
);
1422 if (r
== const_true_rtx
)
1427 if (b
== const_true_rtx
)
1430 if ((GET_RTX_CLASS (GET_CODE (a
)) != RTX_COMM_COMPARE
1431 && GET_RTX_CLASS (GET_CODE (a
)) != RTX_COMPARE
)
1432 || (GET_RTX_CLASS (GET_CODE (b
)) != RTX_COMM_COMPARE
1433 && GET_RTX_CLASS (GET_CODE (b
)) != RTX_COMPARE
))
1441 mode
= GET_MODE (op0
);
1442 if (mode
!= GET_MODE (opb0
))
1444 else if (mode
== VOIDmode
)
1446 mode
= GET_MODE (op1
);
1447 if (mode
!= GET_MODE (opb1
))
1451 /* A < B implies A + 1 <= B. */
1452 if ((GET_CODE (a
) == GT
|| GET_CODE (a
) == LT
)
1453 && (GET_CODE (b
) == GE
|| GET_CODE (b
) == LE
))
1456 if (GET_CODE (a
) == GT
)
1463 if (GET_CODE (b
) == GE
)
1470 if (SCALAR_INT_MODE_P (mode
)
1471 && rtx_equal_p (op1
, opb1
)
1472 && simplify_gen_binary (MINUS
, mode
, opb0
, op0
) == const1_rtx
)
1477 /* A < B or A > B imply A != B. TODO: Likewise
1478 A + n < B implies A != B + n if neither wraps. */
1479 if (GET_CODE (b
) == NE
1480 && (GET_CODE (a
) == GT
|| GET_CODE (a
) == GTU
1481 || GET_CODE (a
) == LT
|| GET_CODE (a
) == LTU
))
1483 if (rtx_equal_p (op0
, opb0
)
1484 && rtx_equal_p (op1
, opb1
))
1488 /* For unsigned comparisons, A != 0 implies A > 0 and A >= 1. */
1489 if (GET_CODE (a
) == NE
1490 && op1
== const0_rtx
)
1492 if ((GET_CODE (b
) == GTU
1493 && opb1
== const0_rtx
)
1494 || (GET_CODE (b
) == GEU
1495 && opb1
== const1_rtx
))
1496 return rtx_equal_p (op0
, opb0
);
1499 /* A != N is equivalent to A - (N + 1) <u -1. */
1500 if (GET_CODE (a
) == NE
1501 && GET_CODE (op1
) == CONST_INT
1502 && GET_CODE (b
) == LTU
1503 && opb1
== constm1_rtx
1504 && GET_CODE (opb0
) == PLUS
1505 && GET_CODE (XEXP (opb0
, 1)) == CONST_INT
1506 /* Avoid overflows. */
1507 && ((unsigned HOST_WIDE_INT
) INTVAL (XEXP (opb0
, 1))
1508 != ((unsigned HOST_WIDE_INT
)1
1509 << (HOST_BITS_PER_WIDE_INT
- 1)) - 1)
1510 && INTVAL (XEXP (opb0
, 1)) + 1 == -INTVAL (op1
))
1511 return rtx_equal_p (op0
, XEXP (opb0
, 0));
1513 /* Likewise, A != N implies A - N > 0. */
1514 if (GET_CODE (a
) == NE
1515 && GET_CODE (op1
) == CONST_INT
)
1517 if (GET_CODE (b
) == GTU
1518 && GET_CODE (opb0
) == PLUS
1519 && opb1
== const0_rtx
1520 && GET_CODE (XEXP (opb0
, 1)) == CONST_INT
1521 /* Avoid overflows. */
1522 && ((unsigned HOST_WIDE_INT
) INTVAL (XEXP (opb0
, 1))
1523 != ((unsigned HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1)))
1524 && rtx_equal_p (XEXP (opb0
, 0), op0
))
1525 return INTVAL (op1
) == -INTVAL (XEXP (opb0
, 1));
1526 if (GET_CODE (b
) == GEU
1527 && GET_CODE (opb0
) == PLUS
1528 && opb1
== const1_rtx
1529 && GET_CODE (XEXP (opb0
, 1)) == CONST_INT
1530 /* Avoid overflows. */
1531 && ((unsigned HOST_WIDE_INT
) INTVAL (XEXP (opb0
, 1))
1532 != ((unsigned HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1)))
1533 && rtx_equal_p (XEXP (opb0
, 0), op0
))
1534 return INTVAL (op1
) == -INTVAL (XEXP (opb0
, 1));
1537 /* A >s X, where X is positive, implies A <u Y, if Y is negative. */
1538 if ((GET_CODE (a
) == GT
|| GET_CODE (a
) == GE
)
1539 && GET_CODE (op1
) == CONST_INT
1540 && ((GET_CODE (a
) == GT
&& op1
== constm1_rtx
)
1541 || INTVAL (op1
) >= 0)
1542 && GET_CODE (b
) == LTU
1543 && GET_CODE (opb1
) == CONST_INT
1544 && rtx_equal_p (op0
, opb0
))
1545 return INTVAL (opb1
) < 0;
1550 /* Canonicalizes COND so that
1552 (1) Ensure that operands are ordered according to
1553 swap_commutative_operands_p.
1554 (2) (LE x const) will be replaced with (LT x <const+1>) and similarly
1555 for GE, GEU, and LEU. */
1558 canon_condition (rtx cond
)
1563 enum machine_mode mode
;
1565 code
= GET_CODE (cond
);
1566 op0
= XEXP (cond
, 0);
1567 op1
= XEXP (cond
, 1);
1569 if (swap_commutative_operands_p (op0
, op1
))
1571 code
= swap_condition (code
);
1577 mode
= GET_MODE (op0
);
1578 if (mode
== VOIDmode
)
1579 mode
= GET_MODE (op1
);
1580 gcc_assert (mode
!= VOIDmode
);
1582 if (GET_CODE (op1
) == CONST_INT
1583 && GET_MODE_CLASS (mode
) != MODE_CC
1584 && GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
1586 HOST_WIDE_INT const_val
= INTVAL (op1
);
1587 unsigned HOST_WIDE_INT uconst_val
= const_val
;
1588 unsigned HOST_WIDE_INT max_val
1589 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (mode
);
1594 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
1595 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
1598 /* When cross-compiling, const_val might be sign-extended from
1599 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
1601 if ((HOST_WIDE_INT
) (const_val
& max_val
)
1602 != (((HOST_WIDE_INT
) 1
1603 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
1604 code
= GT
, op1
= gen_int_mode (const_val
- 1, mode
);
1608 if (uconst_val
< max_val
)
1609 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, mode
);
1613 if (uconst_val
!= 0)
1614 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, mode
);
1622 if (op0
!= XEXP (cond
, 0)
1623 || op1
!= XEXP (cond
, 1)
1624 || code
!= GET_CODE (cond
)
1625 || GET_MODE (cond
) != SImode
)
1626 cond
= gen_rtx_fmt_ee (code
, SImode
, op0
, op1
);
1631 /* Tries to use the fact that COND holds to simplify EXPR. ALTERED is the
1632 set of altered regs. */
1635 simplify_using_condition (rtx cond
, rtx
*expr
, regset altered
)
1637 rtx rev
, reve
, exp
= *expr
;
1639 /* If some register gets altered later, we do not really speak about its
1640 value at the time of comparison. */
1642 && for_each_rtx (&cond
, altered_reg_used
, altered
))
1645 if (GET_CODE (cond
) == EQ
1646 && REG_P (XEXP (cond
, 0)) && CONSTANT_P (XEXP (cond
, 1)))
1648 *expr
= simplify_replace_rtx (*expr
, XEXP (cond
, 0), XEXP (cond
, 1));
1652 if (!COMPARISON_P (exp
))
1655 rev
= reversed_condition (cond
);
1656 reve
= reversed_condition (exp
);
1658 cond
= canon_condition (cond
);
1659 exp
= canon_condition (exp
);
1661 rev
= canon_condition (rev
);
1663 reve
= canon_condition (reve
);
1665 if (rtx_equal_p (exp
, cond
))
1667 *expr
= const_true_rtx
;
1671 if (rev
&& rtx_equal_p (exp
, rev
))
1677 if (implies_p (cond
, exp
))
1679 *expr
= const_true_rtx
;
1683 if (reve
&& implies_p (cond
, reve
))
1689 /* A proof by contradiction. If *EXPR implies (not cond), *EXPR must
1691 if (rev
&& implies_p (exp
, rev
))
1697 /* Similarly, If (not *EXPR) implies (not cond), *EXPR must be true. */
1698 if (rev
&& reve
&& implies_p (reve
, rev
))
1700 *expr
= const_true_rtx
;
1704 /* We would like to have some other tests here. TODO. */
1709 /* Use relationship between A and *B to eventually eliminate *B.
1710 OP is the operation we consider. */
1713 eliminate_implied_condition (enum rtx_code op
, rtx a
, rtx
*b
)
1718 /* If A implies *B, we may replace *B by true. */
1719 if (implies_p (a
, *b
))
1720 *b
= const_true_rtx
;
1724 /* If *B implies A, we may replace *B by false. */
1725 if (implies_p (*b
, a
))
1734 /* Eliminates the conditions in TAIL that are implied by HEAD. OP is the
1735 operation we consider. */
1738 eliminate_implied_conditions (enum rtx_code op
, rtx
*head
, rtx tail
)
1742 for (elt
= tail
; elt
; elt
= XEXP (elt
, 1))
1743 eliminate_implied_condition (op
, *head
, &XEXP (elt
, 0));
1744 for (elt
= tail
; elt
; elt
= XEXP (elt
, 1))
1745 eliminate_implied_condition (op
, XEXP (elt
, 0), head
);
1748 /* Simplifies *EXPR using initial values at the start of the LOOP. If *EXPR
1749 is a list, its elements are assumed to be combined using OP. */
1752 simplify_using_initial_values (struct loop
*loop
, enum rtx_code op
, rtx
*expr
)
1754 bool expression_valid
;
1755 rtx head
, tail
, insn
, cond_list
, last_valid_expr
;
1757 regset altered
, this_altered
;
1763 if (CONSTANT_P (*expr
))
1766 if (GET_CODE (*expr
) == EXPR_LIST
)
1768 head
= XEXP (*expr
, 0);
1769 tail
= XEXP (*expr
, 1);
1771 eliminate_implied_conditions (op
, &head
, tail
);
1776 neutral
= const_true_rtx
;
1781 neutral
= const0_rtx
;
1782 aggr
= const_true_rtx
;
1789 simplify_using_initial_values (loop
, UNKNOWN
, &head
);
1792 XEXP (*expr
, 0) = aggr
;
1793 XEXP (*expr
, 1) = NULL_RTX
;
1796 else if (head
== neutral
)
1799 simplify_using_initial_values (loop
, op
, expr
);
1802 simplify_using_initial_values (loop
, op
, &tail
);
1804 if (tail
&& XEXP (tail
, 0) == aggr
)
1810 XEXP (*expr
, 0) = head
;
1811 XEXP (*expr
, 1) = tail
;
1815 gcc_assert (op
== UNKNOWN
);
1817 e
= loop_preheader_edge (loop
);
1818 if (e
->src
== ENTRY_BLOCK_PTR
)
1821 altered
= ALLOC_REG_SET (®_obstack
);
1822 this_altered
= ALLOC_REG_SET (®_obstack
);
1824 expression_valid
= true;
1825 last_valid_expr
= *expr
;
1826 cond_list
= NULL_RTX
;
1829 insn
= BB_END (e
->src
);
1830 if (any_condjump_p (insn
))
1832 rtx cond
= get_condition (BB_END (e
->src
), NULL
, false, true);
1834 if (cond
&& (e
->flags
& EDGE_FALLTHRU
))
1835 cond
= reversed_condition (cond
);
1839 simplify_using_condition (cond
, expr
, altered
);
1843 if (CONSTANT_P (*expr
))
1845 for (note
= cond_list
; note
; note
= XEXP (note
, 1))
1847 simplify_using_condition (XEXP (note
, 0), expr
, altered
);
1848 if (CONSTANT_P (*expr
))
1852 cond_list
= alloc_EXPR_LIST (0, cond
, cond_list
);
1856 FOR_BB_INSNS_REVERSE (e
->src
, insn
)
1864 CLEAR_REG_SET (this_altered
);
1865 note_stores (PATTERN (insn
), mark_altered
, this_altered
);
1870 /* Kill all call clobbered registers. */
1871 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1872 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
1873 SET_REGNO_REG_SET (this_altered
, i
);
1876 if (suitable_set_for_replacement (insn
, &dest
, &src
))
1878 rtx
*pnote
, *pnote_next
;
1880 *expr
= simplify_replace_rtx (*expr
, dest
, src
);
1881 if (CONSTANT_P (*expr
))
1884 for (pnote
= &cond_list
; *pnote
; pnote
= pnote_next
)
1887 rtx old_cond
= XEXP (note
, 0);
1889 pnote_next
= &XEXP (note
, 1);
1890 XEXP (note
, 0) = simplify_replace_rtx (XEXP (note
, 0), dest
,
1892 /* We can no longer use a condition that has been simplified
1893 to a constant, and simplify_using_condition will abort if
1895 if (CONSTANT_P (XEXP (note
, 0)))
1897 *pnote
= *pnote_next
;
1899 free_EXPR_LIST_node (note
);
1901 /* Retry simplifications with this condition if either the
1902 expression or the condition changed. */
1903 else if (old_cond
!= XEXP (note
, 0) || old
!= *expr
)
1904 simplify_using_condition (XEXP (note
, 0), expr
, altered
);
1908 /* If we did not use this insn to make a replacement, any overlap
1909 between stores in this insn and our expression will cause the
1910 expression to become invalid. */
1911 if (for_each_rtx (expr
, altered_reg_used
, this_altered
))
1914 if (CONSTANT_P (*expr
))
1917 IOR_REG_SET (altered
, this_altered
);
1919 /* If the expression now contains regs that have been altered, we
1920 can't return it to the caller. However, it is still valid for
1921 further simplification, so keep searching to see if we can
1922 eventually turn it into a constant. */
1923 if (for_each_rtx (expr
, altered_reg_used
, altered
))
1924 expression_valid
= false;
1925 if (expression_valid
)
1926 last_valid_expr
= *expr
;
1929 if (!single_pred_p (e
->src
)
1930 || single_pred (e
->src
) == ENTRY_BLOCK_PTR
)
1932 e
= single_pred_edge (e
->src
);
1936 free_EXPR_LIST_list (&cond_list
);
1937 if (!CONSTANT_P (*expr
))
1938 *expr
= last_valid_expr
;
1939 FREE_REG_SET (altered
);
1940 FREE_REG_SET (this_altered
);
1943 /* Transforms invariant IV into MODE. Adds assumptions based on the fact
1944 that IV occurs as left operands of comparison COND and its signedness
1945 is SIGNED_P to DESC. */
1948 shorten_into_mode (struct rtx_iv
*iv
, enum machine_mode mode
,
1949 enum rtx_code cond
, bool signed_p
, struct niter_desc
*desc
)
1951 rtx mmin
, mmax
, cond_over
, cond_under
;
1953 get_mode_bounds (mode
, signed_p
, iv
->extend_mode
, &mmin
, &mmax
);
1954 cond_under
= simplify_gen_relational (LT
, SImode
, iv
->extend_mode
,
1956 cond_over
= simplify_gen_relational (GT
, SImode
, iv
->extend_mode
,
1965 if (cond_under
!= const0_rtx
)
1967 alloc_EXPR_LIST (0, cond_under
, desc
->infinite
);
1968 if (cond_over
!= const0_rtx
)
1969 desc
->noloop_assumptions
=
1970 alloc_EXPR_LIST (0, cond_over
, desc
->noloop_assumptions
);
1977 if (cond_over
!= const0_rtx
)
1979 alloc_EXPR_LIST (0, cond_over
, desc
->infinite
);
1980 if (cond_under
!= const0_rtx
)
1981 desc
->noloop_assumptions
=
1982 alloc_EXPR_LIST (0, cond_under
, desc
->noloop_assumptions
);
1986 if (cond_over
!= const0_rtx
)
1988 alloc_EXPR_LIST (0, cond_over
, desc
->infinite
);
1989 if (cond_under
!= const0_rtx
)
1991 alloc_EXPR_LIST (0, cond_under
, desc
->infinite
);
1999 iv
->extend
= signed_p
? SIGN_EXTEND
: ZERO_EXTEND
;
2002 /* Transforms IV0 and IV1 compared by COND so that they are both compared as
2003 subregs of the same mode if possible (sometimes it is necessary to add
2004 some assumptions to DESC). */
2007 canonicalize_iv_subregs (struct rtx_iv
*iv0
, struct rtx_iv
*iv1
,
2008 enum rtx_code cond
, struct niter_desc
*desc
)
2010 enum machine_mode comp_mode
;
2013 /* If the ivs behave specially in the first iteration, or are
2014 added/multiplied after extending, we ignore them. */
2015 if (iv0
->first_special
|| iv0
->mult
!= const1_rtx
|| iv0
->delta
!= const0_rtx
)
2017 if (iv1
->first_special
|| iv1
->mult
!= const1_rtx
|| iv1
->delta
!= const0_rtx
)
2020 /* If there is some extend, it must match signedness of the comparison. */
2025 if (iv0
->extend
== ZERO_EXTEND
2026 || iv1
->extend
== ZERO_EXTEND
)
2033 if (iv0
->extend
== SIGN_EXTEND
2034 || iv1
->extend
== SIGN_EXTEND
)
2040 if (iv0
->extend
!= UNKNOWN
2041 && iv1
->extend
!= UNKNOWN
2042 && iv0
->extend
!= iv1
->extend
)
2046 if (iv0
->extend
!= UNKNOWN
)
2047 signed_p
= iv0
->extend
== SIGN_EXTEND
;
2048 if (iv1
->extend
!= UNKNOWN
)
2049 signed_p
= iv1
->extend
== SIGN_EXTEND
;
2056 /* Values of both variables should be computed in the same mode. These
2057 might indeed be different, if we have comparison like
2059 (compare (subreg:SI (iv0)) (subreg:SI (iv1)))
2061 and iv0 and iv1 are both ivs iterating in SI mode, but calculated
2062 in different modes. This does not seem impossible to handle, but
2063 it hardly ever occurs in practice.
2065 The only exception is the case when one of operands is invariant.
2066 For example pentium 3 generates comparisons like
2067 (lt (subreg:HI (reg:SI)) 100). Here we assign HImode to 100, but we
2068 definitely do not want this prevent the optimization. */
2069 comp_mode
= iv0
->extend_mode
;
2070 if (GET_MODE_BITSIZE (comp_mode
) < GET_MODE_BITSIZE (iv1
->extend_mode
))
2071 comp_mode
= iv1
->extend_mode
;
2073 if (iv0
->extend_mode
!= comp_mode
)
2075 if (iv0
->mode
!= iv0
->extend_mode
2076 || iv0
->step
!= const0_rtx
)
2079 iv0
->base
= simplify_gen_unary (signed_p
? SIGN_EXTEND
: ZERO_EXTEND
,
2080 comp_mode
, iv0
->base
, iv0
->mode
);
2081 iv0
->extend_mode
= comp_mode
;
2084 if (iv1
->extend_mode
!= comp_mode
)
2086 if (iv1
->mode
!= iv1
->extend_mode
2087 || iv1
->step
!= const0_rtx
)
2090 iv1
->base
= simplify_gen_unary (signed_p
? SIGN_EXTEND
: ZERO_EXTEND
,
2091 comp_mode
, iv1
->base
, iv1
->mode
);
2092 iv1
->extend_mode
= comp_mode
;
2095 /* Check that both ivs belong to a range of a single mode. If one of the
2096 operands is an invariant, we may need to shorten it into the common
2098 if (iv0
->mode
== iv0
->extend_mode
2099 && iv0
->step
== const0_rtx
2100 && iv0
->mode
!= iv1
->mode
)
2101 shorten_into_mode (iv0
, iv1
->mode
, cond
, signed_p
, desc
);
2103 if (iv1
->mode
== iv1
->extend_mode
2104 && iv1
->step
== const0_rtx
2105 && iv0
->mode
!= iv1
->mode
)
2106 shorten_into_mode (iv1
, iv0
->mode
, swap_condition (cond
), signed_p
, desc
);
2108 if (iv0
->mode
!= iv1
->mode
)
2111 desc
->mode
= iv0
->mode
;
2112 desc
->signed_p
= signed_p
;
2117 /* Tries to estimate the maximum number of iterations. */
2119 static unsigned HOST_WIDEST_INT
2120 determine_max_iter (struct loop
*loop
, struct niter_desc
*desc
)
2122 rtx niter
= desc
->niter_expr
;
2123 rtx mmin
, mmax
, cmp
;
2124 unsigned HOST_WIDEST_INT nmax
, inc
;
2126 if (GET_CODE (niter
) == AND
2127 && GET_CODE (XEXP (niter
, 0)) == CONST_INT
)
2129 nmax
= INTVAL (XEXP (niter
, 0));
2130 if (!(nmax
& (nmax
+ 1)))
2132 desc
->niter_max
= nmax
;
2137 get_mode_bounds (desc
->mode
, desc
->signed_p
, desc
->mode
, &mmin
, &mmax
);
2138 nmax
= INTVAL (mmax
) - INTVAL (mmin
);
2140 if (GET_CODE (niter
) == UDIV
)
2142 if (GET_CODE (XEXP (niter
, 1)) != CONST_INT
)
2144 desc
->niter_max
= nmax
;
2147 inc
= INTVAL (XEXP (niter
, 1));
2148 niter
= XEXP (niter
, 0);
2153 /* We could use a binary search here, but for now improving the upper
2154 bound by just one eliminates one important corner case. */
2155 cmp
= gen_rtx_fmt_ee (desc
->signed_p
? LT
: LTU
, VOIDmode
, niter
, mmax
);
2156 simplify_using_initial_values (loop
, UNKNOWN
, &cmp
);
2157 if (cmp
== const_true_rtx
)
2162 fprintf (dump_file
, ";; improved upper bound by one.\n");
2164 desc
->niter_max
= nmax
/ inc
;
2168 /* Computes number of iterations of the CONDITION in INSN in LOOP and stores
2169 the result into DESC. Very similar to determine_number_of_iterations
2170 (basically its rtl version), complicated by things like subregs. */
2173 iv_number_of_iterations (struct loop
*loop
, rtx insn
, rtx condition
,
2174 struct niter_desc
*desc
)
2176 rtx op0
, op1
, delta
, step
, bound
, may_xform
, tmp
, tmp0
, tmp1
;
2177 struct rtx_iv iv0
, iv1
, tmp_iv
;
2178 rtx assumption
, may_not_xform
;
2180 enum machine_mode mode
, comp_mode
;
2181 rtx mmin
, mmax
, mode_mmin
, mode_mmax
;
2182 unsigned HOST_WIDEST_INT s
, size
, d
, inv
;
2183 HOST_WIDEST_INT up
, down
, inc
, step_val
;
2184 int was_sharp
= false;
2188 /* The meaning of these assumptions is this:
2190 then the rest of information does not have to be valid
2191 if noloop_assumptions then the loop does not roll
2192 if infinite then this exit is never used */
2194 desc
->assumptions
= NULL_RTX
;
2195 desc
->noloop_assumptions
= NULL_RTX
;
2196 desc
->infinite
= NULL_RTX
;
2197 desc
->simple_p
= true;
2199 desc
->const_iter
= false;
2200 desc
->niter_expr
= NULL_RTX
;
2201 desc
->niter_max
= 0;
2203 cond
= GET_CODE (condition
);
2204 gcc_assert (COMPARISON_P (condition
));
2206 mode
= GET_MODE (XEXP (condition
, 0));
2207 if (mode
== VOIDmode
)
2208 mode
= GET_MODE (XEXP (condition
, 1));
2209 /* The constant comparisons should be folded. */
2210 gcc_assert (mode
!= VOIDmode
);
2212 /* We only handle integers or pointers. */
2213 if (GET_MODE_CLASS (mode
) != MODE_INT
2214 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
)
2217 op0
= XEXP (condition
, 0);
2218 if (!iv_analyze (insn
, op0
, &iv0
))
2220 if (iv0
.extend_mode
== VOIDmode
)
2221 iv0
.mode
= iv0
.extend_mode
= mode
;
2223 op1
= XEXP (condition
, 1);
2224 if (!iv_analyze (insn
, op1
, &iv1
))
2226 if (iv1
.extend_mode
== VOIDmode
)
2227 iv1
.mode
= iv1
.extend_mode
= mode
;
2229 if (GET_MODE_BITSIZE (iv0
.extend_mode
) > HOST_BITS_PER_WIDE_INT
2230 || GET_MODE_BITSIZE (iv1
.extend_mode
) > HOST_BITS_PER_WIDE_INT
)
2233 /* Check condition and normalize it. */
2241 tmp_iv
= iv0
; iv0
= iv1
; iv1
= tmp_iv
;
2242 cond
= swap_condition (cond
);
2254 /* Handle extends. This is relatively nontrivial, so we only try in some
2255 easy cases, when we can canonicalize the ivs (possibly by adding some
2256 assumptions) to shape subreg (base + i * step). This function also fills
2257 in desc->mode and desc->signed_p. */
2259 if (!canonicalize_iv_subregs (&iv0
, &iv1
, cond
, desc
))
2262 comp_mode
= iv0
.extend_mode
;
2264 size
= GET_MODE_BITSIZE (mode
);
2265 get_mode_bounds (mode
, (cond
== LE
|| cond
== LT
), comp_mode
, &mmin
, &mmax
);
2266 mode_mmin
= lowpart_subreg (mode
, mmin
, comp_mode
);
2267 mode_mmax
= lowpart_subreg (mode
, mmax
, comp_mode
);
2269 if (GET_CODE (iv0
.step
) != CONST_INT
|| GET_CODE (iv1
.step
) != CONST_INT
)
2272 /* We can take care of the case of two induction variables chasing each other
2273 if the test is NE. I have never seen a loop using it, but still it is
2275 if (iv0
.step
!= const0_rtx
&& iv1
.step
!= const0_rtx
)
2280 iv0
.step
= simplify_gen_binary (MINUS
, comp_mode
, iv0
.step
, iv1
.step
);
2281 iv1
.step
= const0_rtx
;
2284 /* This is either infinite loop or the one that ends immediately, depending
2285 on initial values. Unswitching should remove this kind of conditions. */
2286 if (iv0
.step
== const0_rtx
&& iv1
.step
== const0_rtx
)
2291 if (iv0
.step
== const0_rtx
)
2292 step_val
= -INTVAL (iv1
.step
);
2294 step_val
= INTVAL (iv0
.step
);
2296 /* Ignore loops of while (i-- < 10) type. */
2300 step_is_pow2
= !(step_val
& (step_val
- 1));
2304 /* We do not care about whether the step is power of two in this
2306 step_is_pow2
= false;
2310 /* Some more condition normalization. We must record some assumptions
2311 due to overflows. */
2316 /* We want to take care only of non-sharp relationals; this is easy,
2317 as in cases the overflow would make the transformation unsafe
2318 the loop does not roll. Seemingly it would make more sense to want
2319 to take care of sharp relationals instead, as NE is more similar to
2320 them, but the problem is that here the transformation would be more
2321 difficult due to possibly infinite loops. */
2322 if (iv0
.step
== const0_rtx
)
2324 tmp
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2325 assumption
= simplify_gen_relational (EQ
, SImode
, mode
, tmp
,
2327 if (assumption
== const_true_rtx
)
2328 goto zero_iter_simplify
;
2329 iv0
.base
= simplify_gen_binary (PLUS
, comp_mode
,
2330 iv0
.base
, const1_rtx
);
2334 tmp
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2335 assumption
= simplify_gen_relational (EQ
, SImode
, mode
, tmp
,
2337 if (assumption
== const_true_rtx
)
2338 goto zero_iter_simplify
;
2339 iv1
.base
= simplify_gen_binary (PLUS
, comp_mode
,
2340 iv1
.base
, constm1_rtx
);
2343 if (assumption
!= const0_rtx
)
2344 desc
->noloop_assumptions
=
2345 alloc_EXPR_LIST (0, assumption
, desc
->noloop_assumptions
);
2346 cond
= (cond
== LT
) ? LE
: LEU
;
2348 /* It will be useful to be able to tell the difference once more in
2349 LE -> NE reduction. */
2355 /* Take care of trivially infinite loops. */
2358 if (iv0
.step
== const0_rtx
)
2360 tmp
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2361 if (rtx_equal_p (tmp
, mode_mmin
))
2364 alloc_EXPR_LIST (0, const_true_rtx
, NULL_RTX
);
2365 /* Fill in the remaining fields somehow. */
2366 goto zero_iter_simplify
;
2371 tmp
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2372 if (rtx_equal_p (tmp
, mode_mmax
))
2375 alloc_EXPR_LIST (0, const_true_rtx
, NULL_RTX
);
2376 /* Fill in the remaining fields somehow. */
2377 goto zero_iter_simplify
;
2382 /* If we can we want to take care of NE conditions instead of size
2383 comparisons, as they are much more friendly (most importantly
2384 this takes care of special handling of loops with step 1). We can
2385 do it if we first check that upper bound is greater or equal to
2386 lower bound, their difference is constant c modulo step and that
2387 there is not an overflow. */
2390 if (iv0
.step
== const0_rtx
)
2391 step
= simplify_gen_unary (NEG
, comp_mode
, iv1
.step
, comp_mode
);
2394 delta
= simplify_gen_binary (MINUS
, comp_mode
, iv1
.base
, iv0
.base
);
2395 delta
= lowpart_subreg (mode
, delta
, comp_mode
);
2396 delta
= simplify_gen_binary (UMOD
, mode
, delta
, step
);
2397 may_xform
= const0_rtx
;
2398 may_not_xform
= const_true_rtx
;
2400 if (GET_CODE (delta
) == CONST_INT
)
2402 if (was_sharp
&& INTVAL (delta
) == INTVAL (step
) - 1)
2404 /* A special case. We have transformed condition of type
2405 for (i = 0; i < 4; i += 4)
2407 for (i = 0; i <= 3; i += 4)
2408 obviously if the test for overflow during that transformation
2409 passed, we cannot overflow here. Most importantly any
2410 loop with sharp end condition and step 1 falls into this
2411 category, so handling this case specially is definitely
2412 worth the troubles. */
2413 may_xform
= const_true_rtx
;
2415 else if (iv0
.step
== const0_rtx
)
2417 bound
= simplify_gen_binary (PLUS
, comp_mode
, mmin
, step
);
2418 bound
= simplify_gen_binary (MINUS
, comp_mode
, bound
, delta
);
2419 bound
= lowpart_subreg (mode
, bound
, comp_mode
);
2420 tmp
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2421 may_xform
= simplify_gen_relational (cond
, SImode
, mode
,
2423 may_not_xform
= simplify_gen_relational (reverse_condition (cond
),
2429 bound
= simplify_gen_binary (MINUS
, comp_mode
, mmax
, step
);
2430 bound
= simplify_gen_binary (PLUS
, comp_mode
, bound
, delta
);
2431 bound
= lowpart_subreg (mode
, bound
, comp_mode
);
2432 tmp
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2433 may_xform
= simplify_gen_relational (cond
, SImode
, mode
,
2435 may_not_xform
= simplify_gen_relational (reverse_condition (cond
),
2441 if (may_xform
!= const0_rtx
)
2443 /* We perform the transformation always provided that it is not
2444 completely senseless. This is OK, as we would need this assumption
2445 to determine the number of iterations anyway. */
2446 if (may_xform
!= const_true_rtx
)
2448 /* If the step is a power of two and the final value we have
2449 computed overflows, the cycle is infinite. Otherwise it
2450 is nontrivial to compute the number of iterations. */
2452 desc
->infinite
= alloc_EXPR_LIST (0, may_not_xform
,
2455 desc
->assumptions
= alloc_EXPR_LIST (0, may_xform
,
2459 /* We are going to lose some information about upper bound on
2460 number of iterations in this step, so record the information
2462 inc
= INTVAL (iv0
.step
) - INTVAL (iv1
.step
);
2463 if (GET_CODE (iv1
.base
) == CONST_INT
)
2464 up
= INTVAL (iv1
.base
);
2466 up
= INTVAL (mode_mmax
) - inc
;
2467 down
= INTVAL (GET_CODE (iv0
.base
) == CONST_INT
2470 desc
->niter_max
= (up
- down
) / inc
+ 1;
2472 if (iv0
.step
== const0_rtx
)
2474 iv0
.base
= simplify_gen_binary (PLUS
, comp_mode
, iv0
.base
, delta
);
2475 iv0
.base
= simplify_gen_binary (MINUS
, comp_mode
, iv0
.base
, step
);
2479 iv1
.base
= simplify_gen_binary (MINUS
, comp_mode
, iv1
.base
, delta
);
2480 iv1
.base
= simplify_gen_binary (PLUS
, comp_mode
, iv1
.base
, step
);
2483 tmp0
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2484 tmp1
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2485 assumption
= simplify_gen_relational (reverse_condition (cond
),
2486 SImode
, mode
, tmp0
, tmp1
);
2487 if (assumption
== const_true_rtx
)
2488 goto zero_iter_simplify
;
2489 else if (assumption
!= const0_rtx
)
2490 desc
->noloop_assumptions
=
2491 alloc_EXPR_LIST (0, assumption
, desc
->noloop_assumptions
);
2496 /* Count the number of iterations. */
2499 /* Everything we do here is just arithmetics modulo size of mode. This
2500 makes us able to do more involved computations of number of iterations
2501 than in other cases. First transform the condition into shape
2502 s * i <> c, with s positive. */
2503 iv1
.base
= simplify_gen_binary (MINUS
, comp_mode
, iv1
.base
, iv0
.base
);
2504 iv0
.base
= const0_rtx
;
2505 iv0
.step
= simplify_gen_binary (MINUS
, comp_mode
, iv0
.step
, iv1
.step
);
2506 iv1
.step
= const0_rtx
;
2507 if (INTVAL (iv0
.step
) < 0)
2509 iv0
.step
= simplify_gen_unary (NEG
, comp_mode
, iv0
.step
, mode
);
2510 iv1
.base
= simplify_gen_unary (NEG
, comp_mode
, iv1
.base
, mode
);
2512 iv0
.step
= lowpart_subreg (mode
, iv0
.step
, comp_mode
);
2514 /* Let nsd (s, size of mode) = d. If d does not divide c, the loop
2515 is infinite. Otherwise, the number of iterations is
2516 (inverse(s/d) * (c/d)) mod (size of mode/d). */
2517 s
= INTVAL (iv0
.step
); d
= 1;
2524 bound
= GEN_INT (((unsigned HOST_WIDEST_INT
) 1 << (size
- 1 ) << 1) - 1);
2526 tmp1
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2527 tmp
= simplify_gen_binary (UMOD
, mode
, tmp1
, GEN_INT (d
));
2528 assumption
= simplify_gen_relational (NE
, SImode
, mode
, tmp
, const0_rtx
);
2529 desc
->infinite
= alloc_EXPR_LIST (0, assumption
, desc
->infinite
);
2531 tmp
= simplify_gen_binary (UDIV
, mode
, tmp1
, GEN_INT (d
));
2532 inv
= inverse (s
, size
);
2533 tmp
= simplify_gen_binary (MULT
, mode
, tmp
, gen_int_mode (inv
, mode
));
2534 desc
->niter_expr
= simplify_gen_binary (AND
, mode
, tmp
, bound
);
2538 if (iv1
.step
== const0_rtx
)
2539 /* Condition in shape a + s * i <= b
2540 We must know that b + s does not overflow and a <= b + s and then we
2541 can compute number of iterations as (b + s - a) / s. (It might
2542 seem that we in fact could be more clever about testing the b + s
2543 overflow condition using some information about b - a mod s,
2544 but it was already taken into account during LE -> NE transform). */
2547 tmp0
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2548 tmp1
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2550 bound
= simplify_gen_binary (MINUS
, mode
, mode_mmax
,
2551 lowpart_subreg (mode
, step
,
2557 /* If s is power of 2, we know that the loop is infinite if
2558 a % s <= b % s and b + s overflows. */
2559 assumption
= simplify_gen_relational (reverse_condition (cond
),
2563 t0
= simplify_gen_binary (UMOD
, mode
, copy_rtx (tmp0
), step
);
2564 t1
= simplify_gen_binary (UMOD
, mode
, copy_rtx (tmp1
), step
);
2565 tmp
= simplify_gen_relational (cond
, SImode
, mode
, t0
, t1
);
2566 assumption
= simplify_gen_binary (AND
, SImode
, assumption
, tmp
);
2568 alloc_EXPR_LIST (0, assumption
, desc
->infinite
);
2572 assumption
= simplify_gen_relational (cond
, SImode
, mode
,
2575 alloc_EXPR_LIST (0, assumption
, desc
->assumptions
);
2578 tmp
= simplify_gen_binary (PLUS
, comp_mode
, iv1
.base
, iv0
.step
);
2579 tmp
= lowpart_subreg (mode
, tmp
, comp_mode
);
2580 assumption
= simplify_gen_relational (reverse_condition (cond
),
2581 SImode
, mode
, tmp0
, tmp
);
2583 delta
= simplify_gen_binary (PLUS
, mode
, tmp1
, step
);
2584 delta
= simplify_gen_binary (MINUS
, mode
, delta
, tmp0
);
2588 /* Condition in shape a <= b - s * i
2589 We must know that a - s does not overflow and a - s <= b and then
2590 we can again compute number of iterations as (b - (a - s)) / s. */
2591 step
= simplify_gen_unary (NEG
, mode
, iv1
.step
, mode
);
2592 tmp0
= lowpart_subreg (mode
, iv0
.base
, comp_mode
);
2593 tmp1
= lowpart_subreg (mode
, iv1
.base
, comp_mode
);
2595 bound
= simplify_gen_binary (PLUS
, mode
, mode_mmin
,
2596 lowpart_subreg (mode
, step
, comp_mode
));
2601 /* If s is power of 2, we know that the loop is infinite if
2602 a % s <= b % s and a - s overflows. */
2603 assumption
= simplify_gen_relational (reverse_condition (cond
),
2607 t0
= simplify_gen_binary (UMOD
, mode
, copy_rtx (tmp0
), step
);
2608 t1
= simplify_gen_binary (UMOD
, mode
, copy_rtx (tmp1
), step
);
2609 tmp
= simplify_gen_relational (cond
, SImode
, mode
, t0
, t1
);
2610 assumption
= simplify_gen_binary (AND
, SImode
, assumption
, tmp
);
2612 alloc_EXPR_LIST (0, assumption
, desc
->infinite
);
2616 assumption
= simplify_gen_relational (cond
, SImode
, mode
,
2619 alloc_EXPR_LIST (0, assumption
, desc
->assumptions
);
2622 tmp
= simplify_gen_binary (PLUS
, comp_mode
, iv0
.base
, iv1
.step
);
2623 tmp
= lowpart_subreg (mode
, tmp
, comp_mode
);
2624 assumption
= simplify_gen_relational (reverse_condition (cond
),
2627 delta
= simplify_gen_binary (MINUS
, mode
, tmp0
, step
);
2628 delta
= simplify_gen_binary (MINUS
, mode
, tmp1
, delta
);
2630 if (assumption
== const_true_rtx
)
2631 goto zero_iter_simplify
;
2632 else if (assumption
!= const0_rtx
)
2633 desc
->noloop_assumptions
=
2634 alloc_EXPR_LIST (0, assumption
, desc
->noloop_assumptions
);
2635 delta
= simplify_gen_binary (UDIV
, mode
, delta
, step
);
2636 desc
->niter_expr
= delta
;
2639 old_niter
= desc
->niter_expr
;
2641 simplify_using_initial_values (loop
, AND
, &desc
->assumptions
);
2642 if (desc
->assumptions
2643 && XEXP (desc
->assumptions
, 0) == const0_rtx
)
2645 simplify_using_initial_values (loop
, IOR
, &desc
->noloop_assumptions
);
2646 simplify_using_initial_values (loop
, IOR
, &desc
->infinite
);
2647 simplify_using_initial_values (loop
, UNKNOWN
, &desc
->niter_expr
);
2649 /* Rerun the simplification. Consider code (created by copying loop headers)
2661 The first pass determines that i = 0, the second pass uses it to eliminate
2662 noloop assumption. */
2664 simplify_using_initial_values (loop
, AND
, &desc
->assumptions
);
2665 if (desc
->assumptions
2666 && XEXP (desc
->assumptions
, 0) == const0_rtx
)
2668 simplify_using_initial_values (loop
, IOR
, &desc
->noloop_assumptions
);
2669 simplify_using_initial_values (loop
, IOR
, &desc
->infinite
);
2670 simplify_using_initial_values (loop
, UNKNOWN
, &desc
->niter_expr
);
2672 if (desc
->noloop_assumptions
2673 && XEXP (desc
->noloop_assumptions
, 0) == const_true_rtx
)
2676 if (GET_CODE (desc
->niter_expr
) == CONST_INT
)
2678 unsigned HOST_WIDEST_INT val
= INTVAL (desc
->niter_expr
);
2680 desc
->const_iter
= true;
2681 desc
->niter_max
= desc
->niter
= val
& GET_MODE_MASK (desc
->mode
);
2685 if (!desc
->niter_max
)
2686 desc
->niter_max
= determine_max_iter (loop
, desc
);
2688 /* simplify_using_initial_values does a copy propagation on the registers
2689 in the expression for the number of iterations. This prolongs life
2690 ranges of registers and increases register pressure, and usually
2691 brings no gain (and if it happens to do, the cse pass will take care
2692 of it anyway). So prevent this behavior, unless it enabled us to
2693 derive that the number of iterations is a constant. */
2694 desc
->niter_expr
= old_niter
;
2700 /* Simplify the assumptions. */
2701 simplify_using_initial_values (loop
, AND
, &desc
->assumptions
);
2702 if (desc
->assumptions
2703 && XEXP (desc
->assumptions
, 0) == const0_rtx
)
2705 simplify_using_initial_values (loop
, IOR
, &desc
->infinite
);
2709 desc
->const_iter
= true;
2711 desc
->niter_max
= 0;
2712 desc
->noloop_assumptions
= NULL_RTX
;
2713 desc
->niter_expr
= const0_rtx
;
2717 desc
->simple_p
= false;
2721 /* Checks whether E is a simple exit from LOOP and stores its description
2725 check_simple_exit (struct loop
*loop
, edge e
, struct niter_desc
*desc
)
2727 basic_block exit_bb
;
2732 desc
->simple_p
= false;
2734 /* It must belong directly to the loop. */
2735 if (exit_bb
->loop_father
!= loop
)
2738 /* It must be tested (at least) once during any iteration. */
2739 if (!dominated_by_p (CDI_DOMINATORS
, loop
->latch
, exit_bb
))
2742 /* It must end in a simple conditional jump. */
2743 if (!any_condjump_p (BB_END (exit_bb
)))
2746 ein
= EDGE_SUCC (exit_bb
, 0);
2748 ein
= EDGE_SUCC (exit_bb
, 1);
2751 desc
->in_edge
= ein
;
2753 /* Test whether the condition is suitable. */
2754 if (!(condition
= get_condition (BB_END (ein
->src
), &at
, false, false)))
2757 if (ein
->flags
& EDGE_FALLTHRU
)
2759 condition
= reversed_condition (condition
);
2764 /* Check that we are able to determine number of iterations and fill
2765 in information about it. */
2766 iv_number_of_iterations (loop
, at
, condition
, desc
);
2769 /* Finds a simple exit of LOOP and stores its description into DESC. */
2772 find_simple_exit (struct loop
*loop
, struct niter_desc
*desc
)
2777 struct niter_desc act
;
2781 desc
->simple_p
= false;
2782 body
= get_loop_body (loop
);
2784 for (i
= 0; i
< loop
->num_nodes
; i
++)
2786 FOR_EACH_EDGE (e
, ei
, body
[i
]->succs
)
2788 if (flow_bb_inside_loop_p (loop
, e
->dest
))
2791 check_simple_exit (loop
, e
, &act
);
2799 /* Prefer constant iterations; the less the better. */
2801 || (desc
->const_iter
&& act
.niter
>= desc
->niter
))
2804 /* Also if the actual exit may be infinite, while the old one
2805 not, prefer the old one. */
2806 if (act
.infinite
&& !desc
->infinite
)
2818 fprintf (dump_file
, "Loop %d is simple:\n", loop
->num
);
2819 fprintf (dump_file
, " simple exit %d -> %d\n",
2820 desc
->out_edge
->src
->index
,
2821 desc
->out_edge
->dest
->index
);
2822 if (desc
->assumptions
)
2824 fprintf (dump_file
, " assumptions: ");
2825 print_rtl (dump_file
, desc
->assumptions
);
2826 fprintf (dump_file
, "\n");
2828 if (desc
->noloop_assumptions
)
2830 fprintf (dump_file
, " does not roll if: ");
2831 print_rtl (dump_file
, desc
->noloop_assumptions
);
2832 fprintf (dump_file
, "\n");
2836 fprintf (dump_file
, " infinite if: ");
2837 print_rtl (dump_file
, desc
->infinite
);
2838 fprintf (dump_file
, "\n");
2841 fprintf (dump_file
, " number of iterations: ");
2842 print_rtl (dump_file
, desc
->niter_expr
);
2843 fprintf (dump_file
, "\n");
2845 fprintf (dump_file
, " upper bound: ");
2846 fprintf (dump_file
, HOST_WIDEST_INT_PRINT_DEC
, desc
->niter_max
);
2847 fprintf (dump_file
, "\n");
2850 fprintf (dump_file
, "Loop %d is not simple.\n", loop
->num
);
2856 /* Creates a simple loop description of LOOP if it was not computed
2860 get_simple_loop_desc (struct loop
*loop
)
2862 struct niter_desc
*desc
= simple_loop_desc (loop
);
2867 /* At least desc->infinite is not always initialized by
2868 find_simple_loop_exit. */
2869 desc
= XCNEW (struct niter_desc
);
2870 iv_analysis_loop_init (loop
);
2871 find_simple_exit (loop
, desc
);
2874 if (desc
->simple_p
&& (desc
->assumptions
|| desc
->infinite
))
2876 const char *wording
;
2878 /* Assume that no overflow happens and that the loop is finite.
2879 We already warned at the tree level if we ran optimizations there. */
2880 if (!flag_tree_loop_optimize
&& warn_unsafe_loop_optimizations
)
2885 flag_unsafe_loop_optimizations
2886 ? N_("assuming that the loop is not infinite")
2887 : N_("cannot optimize possibly infinite loops");
2888 warning (OPT_Wunsafe_loop_optimizations
, "%s",
2891 if (desc
->assumptions
)
2894 flag_unsafe_loop_optimizations
2895 ? N_("assuming that the loop counter does not overflow")
2896 : N_("cannot optimize loop, the loop counter may overflow");
2897 warning (OPT_Wunsafe_loop_optimizations
, "%s",
2902 if (flag_unsafe_loop_optimizations
)
2904 desc
->assumptions
= NULL_RTX
;
2905 desc
->infinite
= NULL_RTX
;
2912 /* Releases simple loop description for LOOP. */
2915 free_simple_loop_desc (struct loop
*loop
)
2917 struct niter_desc
*desc
= simple_loop_desc (loop
);