1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-99, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "basic-block.h"
45 #include "insn-config.h"
46 #include "insn-flags.h"
48 #include "hard-reg-set.h"
56 /* Information about the current loop being processed used to compute
57 the number of loop iterations for loop unrolling and doloop
59 static struct loop_info
*current_loop_info
;
61 /* Vector mapping INSN_UIDs to luids.
62 The luids are like uids but increase monotonically always.
63 We use them to see whether a jump comes from outside a given loop. */
67 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
68 number the insn is contained in. */
70 struct loop
**uid_loop
;
72 /* 1 + largest uid of any insn. */
76 /* 1 + luid of last insn. */
80 /* Number of loops detected in current function. Used as index to the
83 static int max_loop_num
;
85 /* Indexed by register number, contains the number of times the reg
86 is set during the loop being scanned.
87 During code motion, a negative value indicates a reg that has been
88 made a candidate; in particular -2 means that it is an candidate that
89 we know is equal to a constant and -1 means that it is an candidate
90 not known equal to a constant.
91 After code motion, regs moved have 0 (which is accurate now)
92 while the failed candidates have the original number of times set.
94 Therefore, at all times, == 0 indicates an invariant register;
95 < 0 a conditionally invariant one. */
97 static varray_type set_in_loop
;
99 /* Original value of set_in_loop; same except that this value
100 is not set negative for a reg whose sets have been made candidates
101 and not set to 0 for a reg that is moved. */
103 static varray_type n_times_set
;
105 /* Index by register number, 1 indicates that the register
106 cannot be moved or strength reduced. */
108 static varray_type may_not_optimize
;
110 /* Contains the insn in which a register was used if it was used
111 exactly once; contains const0_rtx if it was used more than once. */
113 static varray_type reg_single_usage
;
115 /* Nonzero means reg N has already been moved out of one loop.
116 This reduces the desire to move it out of another. */
118 static char *moved_once
;
120 /* List of MEMs that are stored in this loop. */
122 static rtx loop_store_mems
;
124 /* The insn where the first of these was found. */
125 static rtx first_loop_store_insn
;
127 typedef struct loop_mem_info
{
128 rtx mem
; /* The MEM itself. */
129 rtx reg
; /* Corresponding pseudo, if any. */
130 int optimize
; /* Nonzero if we can optimize access to this MEM. */
133 /* Array of MEMs that are used (read or written) in this loop, but
134 cannot be aliased by anything in this loop, except perhaps
135 themselves. In other words, if loop_mems[i] is altered during the
136 loop, it is altered by an expression that is rtx_equal_p to it. */
138 static loop_mem_info
*loop_mems
;
140 /* The index of the next available slot in LOOP_MEMS. */
142 static int loop_mems_idx
;
144 /* The number of elements allocated in LOOP_MEMs. */
146 static int loop_mems_allocated
;
148 /* Nonzero if we don't know what MEMs were changed in the current
149 loop. This happens if the loop contains a call (in which case
150 `loop_info->has_call' will also be set) or if we store into more
151 than NUM_STORES MEMs. */
153 static int unknown_address_altered
;
155 /* The above doesn't count any readonly memory locations that are stored.
158 static int unknown_constant_address_altered
;
160 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
161 static int num_movables
;
163 /* Count of memory write instructions discovered in the loop. */
164 static int num_mem_sets
;
166 /* Bound on pseudo register number before loop optimization.
167 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
168 int max_reg_before_loop
;
170 /* The value to pass to the next call of reg_scan_update. */
171 static int loop_max_reg
;
173 /* This obstack is used in product_cheap_p to allocate its rtl. It
174 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
175 If we used the same obstack that it did, we would be deallocating
178 static struct obstack temp_obstack
;
180 /* This is where the pointer to the obstack being used for RTL is stored. */
182 extern struct obstack
*rtl_obstack
;
184 #define obstack_chunk_alloc xmalloc
185 #define obstack_chunk_free free
187 /* During the analysis of a loop, a chain of `struct movable's
188 is made to record all the movable insns found.
189 Then the entire chain can be scanned to decide which to move. */
193 rtx insn
; /* A movable insn */
194 rtx set_src
; /* The expression this reg is set from. */
195 rtx set_dest
; /* The destination of this SET. */
196 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
197 of any registers used within the LIBCALL. */
198 int consec
; /* Number of consecutive following insns
199 that must be moved with this one. */
200 int regno
; /* The register it sets */
201 short lifetime
; /* lifetime of that register;
202 may be adjusted when matching movables
203 that load the same value are found. */
204 short savings
; /* Number of insns we can move for this reg,
205 including other movables that force this
206 or match this one. */
207 unsigned int cond
: 1; /* 1 if only conditionally movable */
208 unsigned int force
: 1; /* 1 means MUST move this insn */
209 unsigned int global
: 1; /* 1 means reg is live outside this loop */
210 /* If PARTIAL is 1, GLOBAL means something different:
211 that the reg is live outside the range from where it is set
212 to the following label. */
213 unsigned int done
: 1; /* 1 inhibits further processing of this */
215 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
216 In particular, moving it does not make it
218 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
219 load SRC, rather than copying INSN. */
220 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
221 first insn of a consecutive sets group. */
222 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
223 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
224 that we should avoid changing when clearing
225 the rest of the reg. */
226 struct movable
*match
; /* First entry for same value */
227 struct movable
*forces
; /* An insn that must be moved if this is */
228 struct movable
*next
;
231 static struct movable
*the_movables
;
233 FILE *loop_dump_stream
;
235 /* Forward declarations. */
237 static void verify_dominator
PARAMS ((struct loop
*));
238 static void find_and_verify_loops
PARAMS ((rtx
, struct loops
*));
239 static void mark_loop_jump
PARAMS ((rtx
, struct loop
*));
240 static void prescan_loop
PARAMS ((struct loop
*));
241 static int reg_in_basic_block_p
PARAMS ((rtx
, rtx
));
242 static int consec_sets_invariant_p
PARAMS ((rtx
, int, rtx
));
243 static int labels_in_range_p
PARAMS ((rtx
, int));
244 static void count_one_set
PARAMS ((rtx
, rtx
, varray_type
, rtx
*));
246 static void count_loop_regs_set
PARAMS ((rtx
, rtx
, varray_type
, varray_type
,
248 static void note_addr_stored
PARAMS ((rtx
, rtx
, void *));
249 static void note_set_pseudo_multiple_uses
PARAMS ((rtx
, rtx
, void *));
250 static int loop_reg_used_before_p
PARAMS ((const struct loop
*, rtx
, rtx
));
251 static void scan_loop
PARAMS ((struct loop
*, int, int));
253 static void replace_call_address
PARAMS ((rtx
, rtx
, rtx
));
255 static rtx skip_consec_insns
PARAMS ((rtx
, int));
256 static int libcall_benefit
PARAMS ((rtx
));
257 static void ignore_some_movables
PARAMS ((struct movable
*));
258 static void force_movables
PARAMS ((struct movable
*));
259 static void combine_movables
PARAMS ((struct movable
*, int));
260 static int regs_match_p
PARAMS ((rtx
, rtx
, struct movable
*));
261 static int rtx_equal_for_loop_p
PARAMS ((rtx
, rtx
, struct movable
*));
262 static void add_label_notes
PARAMS ((rtx
, rtx
));
263 static void move_movables
PARAMS ((struct movable
*, int, int, rtx
, rtx
, int));
264 static int count_nonfixed_reads
PARAMS ((rtx
));
265 static void strength_reduce
PARAMS ((struct loop
*, int, int, int));
266 static void find_single_use_in_loop
PARAMS ((rtx
, rtx
, varray_type
));
267 static int valid_initial_value_p
PARAMS ((rtx
, rtx
, int, rtx
));
268 static void find_mem_givs
PARAMS ((rtx
, rtx
, int, int, rtx
, rtx
));
269 static void record_biv
PARAMS ((struct induction
*, rtx
, rtx
, rtx
, rtx
, rtx
*, int, int, int));
270 static void check_final_value
PARAMS ((struct induction
*, rtx
, rtx
,
271 unsigned HOST_WIDE_INT
));
272 static void record_giv
PARAMS ((struct induction
*, rtx
, rtx
, rtx
, rtx
, rtx
, int, enum g_types
, int, int, rtx
*, rtx
, rtx
));
273 static void update_giv_derive
PARAMS ((rtx
));
274 static int basic_induction_var
PARAMS ((rtx
, enum machine_mode
, rtx
, rtx
, int, rtx
*, rtx
*, rtx
**, int *));
275 static rtx simplify_giv_expr
PARAMS ((rtx
, int *));
276 static int general_induction_var
PARAMS ((rtx
, rtx
*, rtx
*, rtx
*, int, int *));
277 static int consec_sets_giv
PARAMS ((int, rtx
, rtx
, rtx
, rtx
*, rtx
*, rtx
*));
278 static int check_dbra_loop
PARAMS ((struct loop
*, int));
279 static rtx express_from_1
PARAMS ((rtx
, rtx
, rtx
));
280 static rtx combine_givs_p
PARAMS ((struct induction
*, struct induction
*));
281 static void combine_givs
PARAMS ((struct iv_class
*));
282 struct recombine_givs_stats
;
283 static int find_life_end
PARAMS ((rtx
, struct recombine_givs_stats
*, rtx
, rtx
));
284 static void recombine_givs
PARAMS ((struct iv_class
*, rtx
, rtx
, int));
285 static int product_cheap_p
PARAMS ((rtx
, rtx
));
286 static int maybe_eliminate_biv
PARAMS ((struct iv_class
*, rtx
, rtx
, int, int, int));
287 static int maybe_eliminate_biv_1
PARAMS ((rtx
, rtx
, struct iv_class
*, int, rtx
));
288 static int last_use_this_basic_block
PARAMS ((rtx
, rtx
));
289 static void record_initial
PARAMS ((rtx
, rtx
, void *));
290 static void update_reg_last_use
PARAMS ((rtx
, rtx
));
291 static rtx next_insn_in_loop
PARAMS ((const struct loop
*, rtx
));
292 static void load_mems_and_recount_loop_regs_set
PARAMS ((const struct loop
*,
294 static void load_mems
PARAMS ((const struct loop
*));
295 static int insert_loop_mem
PARAMS ((rtx
*, void *));
296 static int replace_loop_mem
PARAMS ((rtx
*, void *));
297 static int replace_loop_reg
PARAMS ((rtx
*, void *));
298 static void note_reg_stored
PARAMS ((rtx
, rtx
, void *));
299 static void try_copy_prop
PARAMS ((const struct loop
*, rtx
, int));
300 static int replace_label
PARAMS ((rtx
*, void *));
302 typedef struct rtx_and_int
{
307 typedef struct rtx_pair
{
312 /* Nonzero iff INSN is between START and END, inclusive. */
313 #define INSN_IN_RANGE_P(INSN, START, END) \
314 (INSN_UID (INSN) < max_uid_for_loop \
315 && INSN_LUID (INSN) >= INSN_LUID (START) \
316 && INSN_LUID (INSN) <= INSN_LUID (END))
318 #ifdef HAVE_decrement_and_branch_on_count
319 /* Test whether BCT applicable and safe. */
320 static void insert_bct
PARAMS ((struct loop
*));
322 /* Auxiliary function that inserts the BCT pattern into the loop. */
323 static void instrument_loop_bct
PARAMS ((rtx
, rtx
, rtx
));
324 #endif /* HAVE_decrement_and_branch_on_count */
326 /* Indirect_jump_in_function is computed once per function. */
327 int indirect_jump_in_function
= 0;
328 static int indirect_jump_in_function_p
PARAMS ((rtx
));
330 static int compute_luids
PARAMS ((rtx
, rtx
, int));
332 static int biv_elimination_giv_has_0_offset
PARAMS ((struct induction
*,
333 struct induction
*, rtx
));
335 /* Relative gain of eliminating various kinds of operations. */
338 static int shift_cost
;
339 static int mult_cost
;
342 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
343 copy the value of the strength reduced giv to its original register. */
344 static int copy_cost
;
346 /* Cost of using a register, to normalize the benefits of a giv. */
347 static int reg_address_cost
;
353 char *free_point
= (char *) oballoc (1);
354 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
356 add_cost
= rtx_cost (gen_rtx_PLUS (word_mode
, reg
, reg
), SET
);
359 reg_address_cost
= ADDRESS_COST (reg
);
361 reg_address_cost
= rtx_cost (reg
, MEM
);
364 /* We multiply by 2 to reconcile the difference in scale between
365 these two ways of computing costs. Otherwise the cost of a copy
366 will be far less than the cost of an add. */
370 /* Free the objects we just allocated. */
373 /* Initialize the obstack used for rtl in product_cheap_p. */
374 gcc_obstack_init (&temp_obstack
);
377 /* Compute the mapping from uids to luids.
378 LUIDs are numbers assigned to insns, like uids,
379 except that luids increase monotonically through the code.
380 Start at insn START and stop just before END. Assign LUIDs
381 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
383 compute_luids (start
, end
, prev_luid
)
390 for (insn
= start
, i
= prev_luid
; insn
!= end
; insn
= NEXT_INSN (insn
))
392 if (INSN_UID (insn
) >= max_uid_for_loop
)
394 /* Don't assign luids to line-number NOTEs, so that the distance in
395 luids between two insns is not affected by -g. */
396 if (GET_CODE (insn
) != NOTE
397 || NOTE_LINE_NUMBER (insn
) <= 0)
398 uid_luid
[INSN_UID (insn
)] = ++i
;
400 /* Give a line number note the same luid as preceding insn. */
401 uid_luid
[INSN_UID (insn
)] = i
;
406 /* Entry point of this file. Perform loop optimization
407 on the current function. F is the first insn of the function
408 and DUMPFILE is a stream for output of a trace of actions taken
409 (or 0 if none should be output). */
412 loop_optimize (f
, dumpfile
, unroll_p
, bct_p
)
413 /* f is the first instruction of a chain of insns for one function */
420 struct loops loops_data
;
421 struct loops
*loops
= &loops_data
;
422 struct loop_info
*loops_info
;
424 loop_dump_stream
= dumpfile
;
426 init_recog_no_volatile ();
428 max_reg_before_loop
= max_reg_num ();
429 loop_max_reg
= max_reg_before_loop
;
433 /* Count the number of loops. */
436 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
438 if (GET_CODE (insn
) == NOTE
439 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
443 /* Don't waste time if no loops. */
444 if (max_loop_num
== 0)
447 loops
->num
= max_loop_num
;
449 moved_once
= (char *) xcalloc (max_reg_before_loop
, sizeof (char));
451 /* Get size to use for tables indexed by uids.
452 Leave some space for labels allocated by find_and_verify_loops. */
453 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
455 uid_luid
= (int *) xcalloc (max_uid_for_loop
, sizeof (int));
456 uid_loop
= (struct loop
**) xcalloc (max_uid_for_loop
,
457 sizeof (struct loop
*));
459 /* Allocate storage for array of loops. */
460 loops
->array
= (struct loop
*)
461 xcalloc (loops
->num
, sizeof (struct loop
));
463 /* Find and process each loop.
464 First, find them, and record them in order of their beginnings. */
465 find_and_verify_loops (f
, loops
);
467 /* Allocate and initialize auxiliary loop information. */
468 loops_info
= xcalloc (loops
->num
, sizeof (struct loop_info
));
469 for (i
= 0; i
< loops
->num
; i
++)
470 loops
->array
[i
].info
= loops_info
+ i
;
472 /* Now find all register lifetimes. This must be done after
473 find_and_verify_loops, because it might reorder the insns in the
475 reg_scan (f
, max_reg_before_loop
, 1);
477 /* This must occur after reg_scan so that registers created by gcse
478 will have entries in the register tables.
480 We could have added a call to reg_scan after gcse_main in toplev.c,
481 but moving this call to init_alias_analysis is more efficient. */
482 init_alias_analysis ();
484 /* See if we went too far. Note that get_max_uid already returns
485 one more that the maximum uid of all insn. */
486 if (get_max_uid () > max_uid_for_loop
)
488 /* Now reset it to the actual size we need. See above. */
489 max_uid_for_loop
= get_max_uid ();
491 /* find_and_verify_loops has already called compute_luids, but it
492 might have rearranged code afterwards, so we need to recompute
494 max_luid
= compute_luids (f
, NULL_RTX
, 0);
496 /* Don't leave gaps in uid_luid for insns that have been
497 deleted. It is possible that the first or last insn
498 using some register has been deleted by cross-jumping.
499 Make sure that uid_luid for that former insn's uid
500 points to the general area where that insn used to be. */
501 for (i
= 0; i
< max_uid_for_loop
; i
++)
503 uid_luid
[0] = uid_luid
[i
];
504 if (uid_luid
[0] != 0)
507 for (i
= 0; i
< max_uid_for_loop
; i
++)
508 if (uid_luid
[i
] == 0)
509 uid_luid
[i
] = uid_luid
[i
- 1];
511 /* If debugging and unrolling loops, we must replicate the tree
512 nodes corresponding to the BLOCKs inside the loop, so that the
513 original one to one mapping will remain. We sometimes unroll
514 loops even when unroll_p is false, so we must always do this when
516 if (write_symbols
!= NO_DEBUG
)
517 find_loop_tree_blocks ();
519 /* Determine if the function has indirect jump. On some systems
520 this prevents low overhead loop instructions from being used. */
521 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
523 /* Now scan the loops, last ones first, since this means inner ones are done
524 before outer ones. */
525 for (i
= max_loop_num
- 1; i
>= 0; i
--)
527 struct loop
*loop
= &loops
->array
[i
];
529 if (! loop
->invalid
&& loop
->end
)
530 scan_loop (loop
, unroll_p
, bct_p
);
533 /* Replicate the BLOCKs. */
534 if (write_symbols
!= NO_DEBUG
)
535 unroll_block_trees ();
537 end_alias_analysis ();
547 /* Returns the next insn, in execution order, after INSN. START and
548 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
549 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
550 insn-stream; it is used with loops that are entered near the
554 next_insn_in_loop (loop
, insn
)
555 const struct loop
*loop
;
558 insn
= NEXT_INSN (insn
);
560 if (insn
== loop
->end
)
563 /* Go to the top of the loop, and continue there. */
570 if (insn
== loop
->scan_start
)
577 /* Optimize one loop described by LOOP. */
579 /* ??? Could also move memory writes out of loops if the destination address
580 is invariant, the source is invariant, the memory write is not volatile,
581 and if we can prove that no read inside the loop can read this address
582 before the write occurs. If there is a read of this address after the
583 write, then we can also mark the memory read as invariant. */
586 scan_loop (loop
, unroll_p
, bct_p
)
591 rtx loop_start
= loop
->start
;
592 rtx loop_end
= loop
->end
;
593 struct loop_info
*loop_info
= loop
->info
;
595 /* 1 if we are scanning insns that could be executed zero times. */
597 /* 1 if we are scanning insns that might never be executed
598 due to a subroutine call which might exit before they are reached. */
600 /* Jump insn that enters the loop, or 0 if control drops in. */
601 rtx loop_entry_jump
= 0;
602 /* Number of insns in the loop. */
606 rtx temp
, update_start
, update_end
;
607 /* The SET from an insn, if it is the only SET in the insn. */
609 /* Chain describing insns movable in current loop. */
610 struct movable
*movables
= 0;
611 /* Last element in `movables' -- so we can add elements at the end. */
612 struct movable
*last_movable
= 0;
613 /* Ratio of extra register life span we can justify
614 for saving an instruction. More if loop doesn't call subroutines
615 since in that case saving an insn makes more difference
616 and more registers are available. */
618 /* Nonzero if we are scanning instructions in a sub-loop. */
622 current_loop_info
= loop_info
;
625 /* Determine whether this loop starts with a jump down to a test at
626 the end. This will occur for a small number of loops with a test
627 that is too complex to duplicate in front of the loop.
629 We search for the first insn or label in the loop, skipping NOTEs.
630 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
631 (because we might have a loop executed only once that contains a
632 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
633 (in case we have a degenerate loop).
635 Note that if we mistakenly think that a loop is entered at the top
636 when, in fact, it is entered at the exit test, the only effect will be
637 slightly poorer optimization. Making the opposite error can generate
638 incorrect code. Since very few loops now start with a jump to the
639 exit test, the code here to detect that case is very conservative. */
641 for (p
= NEXT_INSN (loop_start
);
643 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
644 && (GET_CODE (p
) != NOTE
645 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
646 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
650 loop
->scan_start
= p
;
652 /* Set up variables describing this loop. */
654 threshold
= (loop_info
->has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
656 /* If loop has a jump before the first label,
657 the true entry is the target of that jump.
658 Start scan from there.
659 But record in LOOP->TOP the place where the end-test jumps
660 back to so we can scan that after the end of the loop. */
661 if (GET_CODE (p
) == JUMP_INSN
)
665 /* Loop entry must be unconditional jump (and not a RETURN) */
667 && JUMP_LABEL (p
) != 0
668 /* Check to see whether the jump actually
669 jumps out of the loop (meaning it's no loop).
670 This case can happen for things like
671 do {..} while (0). If this label was generated previously
672 by loop, we can't tell anything about it and have to reject
674 && INSN_IN_RANGE_P (JUMP_LABEL (p
), loop_start
, loop_end
))
676 loop
->top
= next_label (loop
->scan_start
);
677 loop
->scan_start
= JUMP_LABEL (p
);
681 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
682 as required by loop_reg_used_before_p. So skip such loops. (This
683 test may never be true, but it's best to play it safe.)
685 Also, skip loops where we do not start scanning at a label. This
686 test also rejects loops starting with a JUMP_INSN that failed the
689 if (INSN_UID (loop
->scan_start
) >= max_uid_for_loop
690 || GET_CODE (loop
->scan_start
) != CODE_LABEL
)
692 if (loop_dump_stream
)
693 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
694 INSN_UID (loop_start
), INSN_UID (loop_end
));
698 /* Count number of times each reg is set during this loop.
699 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
700 the setting of register I. Set VARRAY_RTX (reg_single_usage, I). */
702 /* Allocate extra space for REGS that might be created by
703 load_mems. We allocate a little extra slop as well, in the hopes
704 that even after the moving of movables creates some new registers
705 we won't have to reallocate these arrays. However, we do grow
706 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
707 nregs
= max_reg_num () + loop_mems_idx
+ 16;
708 VARRAY_INT_INIT (set_in_loop
, nregs
, "set_in_loop");
709 VARRAY_INT_INIT (n_times_set
, nregs
, "n_times_set");
710 VARRAY_CHAR_INIT (may_not_optimize
, nregs
, "may_not_optimize");
711 VARRAY_RTX_INIT (reg_single_usage
, nregs
, "reg_single_usage");
713 count_loop_regs_set (loop
->top
? loop
->top
: loop
->start
, loop
->end
,
714 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
716 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
718 VARRAY_CHAR (may_not_optimize
, i
) = 1;
719 VARRAY_INT (set_in_loop
, i
) = 1;
722 #ifdef AVOID_CCMODE_COPIES
723 /* Don't try to move insns which set CC registers if we should not
724 create CCmode register copies. */
725 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
726 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
727 VARRAY_CHAR (may_not_optimize
, i
) = 1;
730 bcopy ((char *) &set_in_loop
->data
,
731 (char *) &n_times_set
->data
, nregs
* sizeof (int));
733 if (loop_dump_stream
)
735 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
736 INSN_UID (loop_start
), INSN_UID (loop_end
), insn_count
);
738 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
739 INSN_UID (loop
->cont
));
742 /* Scan through the loop finding insns that are safe to move.
743 Set set_in_loop negative for the reg being set, so that
744 this reg will be considered invariant for subsequent insns.
745 We consider whether subsequent insns use the reg
746 in deciding whether it is worth actually moving.
748 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
749 and therefore it is possible that the insns we are scanning
750 would never be executed. At such times, we must make sure
751 that it is safe to execute the insn once instead of zero times.
752 When MAYBE_NEVER is 0, all insns will be executed at least once
753 so that is not a problem. */
755 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
757 p
= next_insn_in_loop (loop
, p
))
759 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
760 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
762 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
763 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
766 if (GET_CODE (p
) == INSN
767 && (set
= single_set (p
))
768 && GET_CODE (SET_DEST (set
)) == REG
769 && ! VARRAY_CHAR (may_not_optimize
, REGNO (SET_DEST (set
))))
774 rtx src
= SET_SRC (set
);
775 rtx dependencies
= 0;
777 /* Figure out what to use as a source of this insn. If a REG_EQUIV
778 note is given or if a REG_EQUAL note with a constant operand is
779 specified, use it as the source and mark that we should move
780 this insn by calling emit_move_insn rather that duplicating the
783 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
785 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
787 src
= XEXP (temp
, 0), move_insn
= 1;
790 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
791 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
792 src
= XEXP (temp
, 0), move_insn
= 1;
793 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
795 src
= XEXP (temp
, 0);
796 /* A libcall block can use regs that don't appear in
797 the equivalent expression. To move the libcall,
798 we must move those regs too. */
799 dependencies
= libcall_other_reg (p
, src
);
803 /* Don't try to optimize a register that was made
804 by loop-optimization for an inner loop.
805 We don't know its life-span, so we can't compute the benefit. */
806 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
808 else if (/* The register is used in basic blocks other
809 than the one where it is set (meaning that
810 something after this point in the loop might
811 depend on its value before the set). */
812 ! reg_in_basic_block_p (p
, SET_DEST (set
))
813 /* And the set is not guaranteed to be executed one
814 the loop starts, or the value before the set is
815 needed before the set occurs...
817 ??? Note we have quadratic behaviour here, mitigated
818 by the fact that the previous test will often fail for
819 large loops. Rather than re-scanning the entire loop
820 each time for register usage, we should build tables
821 of the register usage and use them here instead. */
823 || loop_reg_used_before_p (loop
, set
, p
)))
824 /* It is unsafe to move the set.
826 This code used to consider it OK to move a set of a variable
827 which was not created by the user and not used in an exit test.
828 That behavior is incorrect and was removed. */
830 else if ((tem
= invariant_p (src
))
831 && (dependencies
== 0
832 || (tem2
= invariant_p (dependencies
)) != 0)
833 && (VARRAY_INT (set_in_loop
,
834 REGNO (SET_DEST (set
))) == 1
836 = consec_sets_invariant_p
838 VARRAY_INT (set_in_loop
, REGNO (SET_DEST (set
))),
840 /* If the insn can cause a trap (such as divide by zero),
841 can't move it unless it's guaranteed to be executed
842 once loop is entered. Even a function call might
843 prevent the trap insn from being reached
844 (since it might exit!) */
845 && ! ((maybe_never
|| call_passed
)
846 && may_trap_p (src
)))
848 register struct movable
*m
;
849 register int regno
= REGNO (SET_DEST (set
));
851 /* A potential lossage is where we have a case where two insns
852 can be combined as long as they are both in the loop, but
853 we move one of them outside the loop. For large loops,
854 this can lose. The most common case of this is the address
855 of a function being called.
857 Therefore, if this register is marked as being used exactly
858 once if we are in a loop with calls (a "large loop"), see if
859 we can replace the usage of this register with the source
860 of this SET. If we can, delete this insn.
862 Don't do this if P has a REG_RETVAL note or if we have
863 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
865 if (loop_info
->has_call
866 && VARRAY_RTX (reg_single_usage
, regno
) != 0
867 && VARRAY_RTX (reg_single_usage
, regno
) != const0_rtx
868 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
869 && (REGNO_LAST_UID (regno
)
870 == INSN_UID (VARRAY_RTX (reg_single_usage
, regno
)))
871 && VARRAY_INT (set_in_loop
, regno
) == 1
872 && ! side_effects_p (SET_SRC (set
))
873 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
874 && (! SMALL_REGISTER_CLASSES
875 || (! (GET_CODE (SET_SRC (set
)) == REG
876 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)))
877 /* This test is not redundant; SET_SRC (set) might be
878 a call-clobbered register and the life of REGNO
879 might span a call. */
880 && ! modified_between_p (SET_SRC (set
), p
,
882 (reg_single_usage
, regno
))
883 && no_labels_between_p (p
, VARRAY_RTX (reg_single_usage
, regno
))
884 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
886 (reg_single_usage
, regno
)))
888 /* Replace any usage in a REG_EQUAL note. Must copy the
889 new source, so that we don't get rtx sharing between the
890 SET_SOURCE and REG_NOTES of insn p. */
891 REG_NOTES (VARRAY_RTX (reg_single_usage
, regno
))
892 = replace_rtx (REG_NOTES (VARRAY_RTX
893 (reg_single_usage
, regno
)),
894 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
897 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
898 NOTE_SOURCE_FILE (p
) = 0;
899 VARRAY_INT (set_in_loop
, regno
) = 0;
903 m
= (struct movable
*) alloca (sizeof (struct movable
));
907 m
->dependencies
= dependencies
;
908 m
->set_dest
= SET_DEST (set
);
910 m
->consec
= VARRAY_INT (set_in_loop
,
911 REGNO (SET_DEST (set
))) - 1;
915 m
->move_insn
= move_insn
;
916 m
->move_insn_first
= 0;
917 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
918 m
->savemode
= VOIDmode
;
920 /* Set M->cond if either invariant_p or consec_sets_invariant_p
921 returned 2 (only conditionally invariant). */
922 m
->cond
= ((tem
| tem1
| tem2
) > 1);
923 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)]
924 > INSN_LUID (loop_end
)
925 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
927 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
928 - uid_luid
[REGNO_FIRST_UID (regno
)]);
929 m
->savings
= VARRAY_INT (n_times_set
, regno
);
930 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
931 m
->savings
+= libcall_benefit (p
);
932 VARRAY_INT (set_in_loop
, regno
) = move_insn
? -2 : -1;
933 /* Add M to the end of the chain MOVABLES. */
937 last_movable
->next
= m
;
942 /* It is possible for the first instruction to have a
943 REG_EQUAL note but a non-invariant SET_SRC, so we must
944 remember the status of the first instruction in case
945 the last instruction doesn't have a REG_EQUAL note. */
946 m
->move_insn_first
= m
->move_insn
;
948 /* Skip this insn, not checking REG_LIBCALL notes. */
949 p
= next_nonnote_insn (p
);
950 /* Skip the consecutive insns, if there are any. */
951 p
= skip_consec_insns (p
, m
->consec
);
952 /* Back up to the last insn of the consecutive group. */
953 p
= prev_nonnote_insn (p
);
955 /* We must now reset m->move_insn, m->is_equiv, and possibly
956 m->set_src to correspond to the effects of all the
958 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
960 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
963 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
964 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
965 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
970 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
973 /* If this register is always set within a STRICT_LOW_PART
974 or set to zero, then its high bytes are constant.
975 So clear them outside the loop and within the loop
976 just load the low bytes.
977 We must check that the machine has an instruction to do so.
978 Also, if the value loaded into the register
979 depends on the same register, this cannot be done. */
980 else if (SET_SRC (set
) == const0_rtx
981 && GET_CODE (NEXT_INSN (p
)) == INSN
982 && (set1
= single_set (NEXT_INSN (p
)))
983 && GET_CODE (set1
) == SET
984 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
985 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
986 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
988 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
990 register int regno
= REGNO (SET_DEST (set
));
991 if (VARRAY_INT (set_in_loop
, regno
) == 2)
993 register struct movable
*m
;
994 m
= (struct movable
*) alloca (sizeof (struct movable
));
997 m
->set_dest
= SET_DEST (set
);
1004 m
->move_insn_first
= 0;
1006 /* If the insn may not be executed on some cycles,
1007 we can't clear the whole reg; clear just high part.
1008 Not even if the reg is used only within this loop.
1015 Clearing x before the inner loop could clobber a value
1016 being saved from the last time around the outer loop.
1017 However, if the reg is not used outside this loop
1018 and all uses of the register are in the same
1019 basic block as the store, there is no problem.
1021 If this insn was made by loop, we don't know its
1022 INSN_LUID and hence must make a conservative
1024 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
1025 || (uid_luid
[REGNO_LAST_UID (regno
)]
1026 > INSN_LUID (loop_end
))
1027 || (uid_luid
[REGNO_FIRST_UID (regno
)]
1029 || (labels_in_range_p
1030 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
1031 if (maybe_never
&& m
->global
)
1032 m
->savemode
= GET_MODE (SET_SRC (set1
));
1034 m
->savemode
= VOIDmode
;
1038 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
1039 - uid_luid
[REGNO_FIRST_UID (regno
)]);
1041 VARRAY_INT (set_in_loop
, regno
) = -1;
1042 /* Add M to the end of the chain MOVABLES. */
1046 last_movable
->next
= m
;
1051 /* Past a call insn, we get to insns which might not be executed
1052 because the call might exit. This matters for insns that trap.
1053 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1054 so they don't count. */
1055 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
1057 /* Past a label or a jump, we get to insns for which we
1058 can't count on whether or how many times they will be
1059 executed during each iteration. Therefore, we can
1060 only move out sets of trivial variables
1061 (those not used after the loop). */
1062 /* Similar code appears twice in strength_reduce. */
1063 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1064 /* If we enter the loop in the middle, and scan around to the
1065 beginning, don't set maybe_never for that. This must be an
1066 unconditional jump, otherwise the code at the top of the
1067 loop might never be executed. Unconditional jumps are
1068 followed a by barrier then loop end. */
1069 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop
->top
1070 && NEXT_INSN (NEXT_INSN (p
)) == loop_end
1071 && simplejump_p (p
)))
1073 else if (GET_CODE (p
) == NOTE
)
1075 /* At the virtual top of a converted loop, insns are again known to
1076 be executed: logically, the loop begins here even though the exit
1077 code has been duplicated. */
1078 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1079 maybe_never
= call_passed
= 0;
1080 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1082 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1087 /* If one movable subsumes another, ignore that other. */
1089 ignore_some_movables (movables
);
1091 /* For each movable insn, see if the reg that it loads
1092 leads when it dies right into another conditionally movable insn.
1093 If so, record that the second insn "forces" the first one,
1094 since the second can be moved only if the first is. */
1096 force_movables (movables
);
1098 /* See if there are multiple movable insns that load the same value.
1099 If there are, make all but the first point at the first one
1100 through the `match' field, and add the priorities of them
1101 all together as the priority of the first. */
1103 combine_movables (movables
, nregs
);
1105 /* Now consider each movable insn to decide whether it is worth moving.
1106 Store 0 in set_in_loop for each reg that is moved.
1108 Generally this increases code size, so do not move moveables when
1109 optimizing for code size. */
1111 if (! optimize_size
)
1112 move_movables (movables
, threshold
,
1113 insn_count
, loop_start
, loop_end
, nregs
);
1115 /* Now candidates that still are negative are those not moved.
1116 Change set_in_loop to indicate that those are not actually invariant. */
1117 for (i
= 0; i
< nregs
; i
++)
1118 if (VARRAY_INT (set_in_loop
, i
) < 0)
1119 VARRAY_INT (set_in_loop
, i
) = VARRAY_INT (n_times_set
, i
);
1121 /* Now that we've moved some things out of the loop, we might be able to
1122 hoist even more memory references. */
1123 load_mems_and_recount_loop_regs_set (loop
, &insn_count
);
1125 for (update_start
= loop_start
;
1126 PREV_INSN (update_start
) && GET_CODE (PREV_INSN (update_start
)) != CODE_LABEL
;
1127 update_start
= PREV_INSN (update_start
))
1129 update_end
= NEXT_INSN (loop_end
);
1131 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1132 loop_max_reg
= max_reg_num ();
1134 if (flag_strength_reduce
)
1136 the_movables
= movables
;
1137 strength_reduce (loop
, insn_count
, unroll_p
, bct_p
);
1139 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1140 loop_max_reg
= max_reg_num ();
1143 VARRAY_FREE (reg_single_usage
);
1144 VARRAY_FREE (set_in_loop
);
1145 VARRAY_FREE (n_times_set
);
1146 VARRAY_FREE (may_not_optimize
);
1149 /* Add elements to *OUTPUT to record all the pseudo-regs
1150 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1153 record_excess_regs (in_this
, not_in_this
, output
)
1154 rtx in_this
, not_in_this
;
1161 code
= GET_CODE (in_this
);
1175 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1176 && ! reg_mentioned_p (in_this
, not_in_this
))
1177 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1184 fmt
= GET_RTX_FORMAT (code
);
1185 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1192 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1193 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1197 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1203 /* Check what regs are referred to in the libcall block ending with INSN,
1204 aside from those mentioned in the equivalent value.
1205 If there are none, return 0.
1206 If there are one or more, return an EXPR_LIST containing all of them. */
1209 libcall_other_reg (insn
, equiv
)
1212 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1213 rtx p
= XEXP (note
, 0);
1216 /* First, find all the regs used in the libcall block
1217 that are not mentioned as inputs to the result. */
1221 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1222 || GET_CODE (p
) == CALL_INSN
)
1223 record_excess_regs (PATTERN (p
), equiv
, &output
);
1230 /* Return 1 if all uses of REG
1231 are between INSN and the end of the basic block. */
1234 reg_in_basic_block_p (insn
, reg
)
1237 int regno
= REGNO (reg
);
1240 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1243 /* Search this basic block for the already recorded last use of the reg. */
1244 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1246 switch (GET_CODE (p
))
1253 /* Ordinary insn: if this is the last use, we win. */
1254 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1259 /* Jump insn: if this is the last use, we win. */
1260 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1262 /* Otherwise, it's the end of the basic block, so we lose. */
1267 /* It's the end of the basic block, so we lose. */
1275 /* The "last use" doesn't follow the "first use"?? */
1279 /* Compute the benefit of eliminating the insns in the block whose
1280 last insn is LAST. This may be a group of insns used to compute a
1281 value directly or can contain a library call. */
1284 libcall_benefit (last
)
1290 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1291 insn
!= last
; insn
= NEXT_INSN (insn
))
1293 if (GET_CODE (insn
) == CALL_INSN
)
1294 benefit
+= 10; /* Assume at least this many insns in a library
1296 else if (GET_CODE (insn
) == INSN
1297 && GET_CODE (PATTERN (insn
)) != USE
1298 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1305 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1308 skip_consec_insns (insn
, count
)
1312 for (; count
> 0; count
--)
1316 /* If first insn of libcall sequence, skip to end. */
1317 /* Do this at start of loop, since INSN is guaranteed to
1319 if (GET_CODE (insn
) != NOTE
1320 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1321 insn
= XEXP (temp
, 0);
1323 do insn
= NEXT_INSN (insn
);
1324 while (GET_CODE (insn
) == NOTE
);
1330 /* Ignore any movable whose insn falls within a libcall
1331 which is part of another movable.
1332 We make use of the fact that the movable for the libcall value
1333 was made later and so appears later on the chain. */
1336 ignore_some_movables (movables
)
1337 struct movable
*movables
;
1339 register struct movable
*m
, *m1
;
1341 for (m
= movables
; m
; m
= m
->next
)
1343 /* Is this a movable for the value of a libcall? */
1344 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1348 /* Check for earlier movables inside that range,
1349 and mark them invalid. We cannot use LUIDs here because
1350 insns created by loop.c for prior loops don't have LUIDs.
1351 Rather than reject all such insns from movables, we just
1352 explicitly check each insn in the libcall (since invariant
1353 libcalls aren't that common). */
1354 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1355 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1356 if (m1
->insn
== insn
)
1362 /* For each movable insn, see if the reg that it loads
1363 leads when it dies right into another conditionally movable insn.
1364 If so, record that the second insn "forces" the first one,
1365 since the second can be moved only if the first is. */
1368 force_movables (movables
)
1369 struct movable
*movables
;
1371 register struct movable
*m
, *m1
;
1372 for (m1
= movables
; m1
; m1
= m1
->next
)
1373 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1374 if (!m1
->partial
&& !m1
->done
)
1376 int regno
= m1
->regno
;
1377 for (m
= m1
->next
; m
; m
= m
->next
)
1378 /* ??? Could this be a bug? What if CSE caused the
1379 register of M1 to be used after this insn?
1380 Since CSE does not update regno_last_uid,
1381 this insn M->insn might not be where it dies.
1382 But very likely this doesn't matter; what matters is
1383 that M's reg is computed from M1's reg. */
1384 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1387 if (m
!= 0 && m
->set_src
== m1
->set_dest
1388 /* If m->consec, m->set_src isn't valid. */
1392 /* Increase the priority of the moving the first insn
1393 since it permits the second to be moved as well. */
1397 m1
->lifetime
+= m
->lifetime
;
1398 m1
->savings
+= m
->savings
;
1403 /* Find invariant expressions that are equal and can be combined into
1407 combine_movables (movables
, nregs
)
1408 struct movable
*movables
;
1411 register struct movable
*m
;
1412 char *matched_regs
= (char *) xmalloc (nregs
);
1413 enum machine_mode mode
;
1415 /* Regs that are set more than once are not allowed to match
1416 or be matched. I'm no longer sure why not. */
1417 /* Perhaps testing m->consec_sets would be more appropriate here? */
1419 for (m
= movables
; m
; m
= m
->next
)
1420 if (m
->match
== 0 && VARRAY_INT (n_times_set
, m
->regno
) == 1 && !m
->partial
)
1422 register struct movable
*m1
;
1423 int regno
= m
->regno
;
1425 bzero (matched_regs
, nregs
);
1426 matched_regs
[regno
] = 1;
1428 /* We want later insns to match the first one. Don't make the first
1429 one match any later ones. So start this loop at m->next. */
1430 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1431 if (m
!= m1
&& m1
->match
== 0 && VARRAY_INT (n_times_set
, m1
->regno
) == 1
1432 /* A reg used outside the loop mustn't be eliminated. */
1434 /* A reg used for zero-extending mustn't be eliminated. */
1436 && (matched_regs
[m1
->regno
]
1439 /* Can combine regs with different modes loaded from the
1440 same constant only if the modes are the same or
1441 if both are integer modes with M wider or the same
1442 width as M1. The check for integer is redundant, but
1443 safe, since the only case of differing destination
1444 modes with equal sources is when both sources are
1445 VOIDmode, i.e., CONST_INT. */
1446 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1447 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1448 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1449 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1450 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1451 /* See if the source of M1 says it matches M. */
1452 && ((GET_CODE (m1
->set_src
) == REG
1453 && matched_regs
[REGNO (m1
->set_src
)])
1454 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1456 && ((m
->dependencies
== m1
->dependencies
)
1457 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1459 m
->lifetime
+= m1
->lifetime
;
1460 m
->savings
+= m1
->savings
;
1463 matched_regs
[m1
->regno
] = 1;
1467 /* Now combine the regs used for zero-extension.
1468 This can be done for those not marked `global'
1469 provided their lives don't overlap. */
1471 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1472 mode
= GET_MODE_WIDER_MODE (mode
))
1474 register struct movable
*m0
= 0;
1476 /* Combine all the registers for extension from mode MODE.
1477 Don't combine any that are used outside this loop. */
1478 for (m
= movables
; m
; m
= m
->next
)
1479 if (m
->partial
&& ! m
->global
1480 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1482 register struct movable
*m1
;
1483 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1484 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1488 /* First one: don't check for overlap, just record it. */
1493 /* Make sure they extend to the same mode.
1494 (Almost always true.) */
1495 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1498 /* We already have one: check for overlap with those
1499 already combined together. */
1500 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1501 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1502 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1503 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1506 /* No overlap: we can combine this with the others. */
1507 m0
->lifetime
+= m
->lifetime
;
1508 m0
->savings
+= m
->savings
;
1517 free (matched_regs
);
1520 /* Return 1 if regs X and Y will become the same if moved. */
1523 regs_match_p (x
, y
, movables
)
1525 struct movable
*movables
;
1529 struct movable
*mx
, *my
;
1531 for (mx
= movables
; mx
; mx
= mx
->next
)
1532 if (mx
->regno
== xn
)
1535 for (my
= movables
; my
; my
= my
->next
)
1536 if (my
->regno
== yn
)
1540 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1542 || mx
== my
->match
));
1545 /* Return 1 if X and Y are identical-looking rtx's.
1546 This is the Lisp function EQUAL for rtx arguments.
1548 If two registers are matching movables or a movable register and an
1549 equivalent constant, consider them equal. */
1552 rtx_equal_for_loop_p (x
, y
, movables
)
1554 struct movable
*movables
;
1558 register struct movable
*m
;
1559 register enum rtx_code code
;
1560 register const char *fmt
;
1564 if (x
== 0 || y
== 0)
1567 code
= GET_CODE (x
);
1569 /* If we have a register and a constant, they may sometimes be
1571 if (GET_CODE (x
) == REG
&& VARRAY_INT (set_in_loop
, REGNO (x
)) == -2
1574 for (m
= movables
; m
; m
= m
->next
)
1575 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1576 && rtx_equal_p (m
->set_src
, y
))
1579 else if (GET_CODE (y
) == REG
&& VARRAY_INT (set_in_loop
, REGNO (y
)) == -2
1582 for (m
= movables
; m
; m
= m
->next
)
1583 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1584 && rtx_equal_p (m
->set_src
, x
))
1588 /* Otherwise, rtx's of different codes cannot be equal. */
1589 if (code
!= GET_CODE (y
))
1592 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1593 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1595 if (GET_MODE (x
) != GET_MODE (y
))
1598 /* These three types of rtx's can be compared nonrecursively. */
1600 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1602 if (code
== LABEL_REF
)
1603 return XEXP (x
, 0) == XEXP (y
, 0);
1604 if (code
== SYMBOL_REF
)
1605 return XSTR (x
, 0) == XSTR (y
, 0);
1607 /* Compare the elements. If any pair of corresponding elements
1608 fail to match, return 0 for the whole things. */
1610 fmt
= GET_RTX_FORMAT (code
);
1611 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1616 if (XWINT (x
, i
) != XWINT (y
, i
))
1621 if (XINT (x
, i
) != XINT (y
, i
))
1626 /* Two vectors must have the same length. */
1627 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1630 /* And the corresponding elements must match. */
1631 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1632 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1637 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1642 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1647 /* These are just backpointers, so they don't matter. */
1653 /* It is believed that rtx's at this level will never
1654 contain anything but integers and other rtx's,
1655 except for within LABEL_REFs and SYMBOL_REFs. */
1663 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1664 insns in INSNS which use the reference. */
1667 add_label_notes (x
, insns
)
1671 enum rtx_code code
= GET_CODE (x
);
1676 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1678 /* This code used to ignore labels that referred to dispatch tables to
1679 avoid flow generating (slighly) worse code.
1681 We no longer ignore such label references (see LABEL_REF handling in
1682 mark_jump_label for additional information). */
1683 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1684 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1685 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
, XEXP (x
, 0),
1689 fmt
= GET_RTX_FORMAT (code
);
1690 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1693 add_label_notes (XEXP (x
, i
), insns
);
1694 else if (fmt
[i
] == 'E')
1695 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1696 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1700 /* Scan MOVABLES, and move the insns that deserve to be moved.
1701 If two matching movables are combined, replace one reg with the
1702 other throughout. */
1705 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1706 struct movable
*movables
;
1714 register struct movable
*m
;
1716 /* Map of pseudo-register replacements to handle combining
1717 when we move several insns that load the same value
1718 into different pseudo-registers. */
1719 rtx
*reg_map
= (rtx
*) xcalloc (nregs
, sizeof (rtx
));
1720 char *already_moved
= (char *) xcalloc (nregs
, sizeof (char));
1724 for (m
= movables
; m
; m
= m
->next
)
1726 /* Describe this movable insn. */
1728 if (loop_dump_stream
)
1730 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1731 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1733 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1735 fprintf (loop_dump_stream
, "cond ");
1737 fprintf (loop_dump_stream
, "force ");
1739 fprintf (loop_dump_stream
, "global ");
1741 fprintf (loop_dump_stream
, "done ");
1743 fprintf (loop_dump_stream
, "move-insn ");
1745 fprintf (loop_dump_stream
, "matches %d ",
1746 INSN_UID (m
->match
->insn
));
1748 fprintf (loop_dump_stream
, "forces %d ",
1749 INSN_UID (m
->forces
->insn
));
1752 /* Count movables. Value used in heuristics in strength_reduce. */
1755 /* Ignore the insn if it's already done (it matched something else).
1756 Otherwise, see if it is now safe to move. */
1760 || (1 == invariant_p (m
->set_src
)
1761 && (m
->dependencies
== 0
1762 || 1 == invariant_p (m
->dependencies
))
1764 || 1 == consec_sets_invariant_p (m
->set_dest
,
1767 && (! m
->forces
|| m
->forces
->done
))
1771 int savings
= m
->savings
;
1773 /* We have an insn that is safe to move.
1774 Compute its desirability. */
1779 if (loop_dump_stream
)
1780 fprintf (loop_dump_stream
, "savings %d ", savings
);
1782 if (moved_once
[regno
] && loop_dump_stream
)
1783 fprintf (loop_dump_stream
, "halved since already moved ");
1785 /* An insn MUST be moved if we already moved something else
1786 which is safe only if this one is moved too: that is,
1787 if already_moved[REGNO] is nonzero. */
1789 /* An insn is desirable to move if the new lifetime of the
1790 register is no more than THRESHOLD times the old lifetime.
1791 If it's not desirable, it means the loop is so big
1792 that moving won't speed things up much,
1793 and it is liable to make register usage worse. */
1795 /* It is also desirable to move if it can be moved at no
1796 extra cost because something else was already moved. */
1798 if (already_moved
[regno
]
1799 || flag_move_all_movables
1800 || (threshold
* savings
* m
->lifetime
) >=
1801 (moved_once
[regno
] ? insn_count
* 2 : insn_count
)
1802 || (m
->forces
&& m
->forces
->done
1803 && VARRAY_INT (n_times_set
, m
->forces
->regno
) == 1))
1806 register struct movable
*m1
;
1807 rtx first
= NULL_RTX
;
1809 /* Now move the insns that set the reg. */
1811 if (m
->partial
&& m
->match
)
1815 /* Find the end of this chain of matching regs.
1816 Thus, we load each reg in the chain from that one reg.
1817 And that reg is loaded with 0 directly,
1818 since it has ->match == 0. */
1819 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1820 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1821 SET_DEST (PATTERN (m1
->insn
)));
1822 i1
= emit_insn_before (newpat
, loop_start
);
1824 /* Mark the moved, invariant reg as being allowed to
1825 share a hard reg with the other matching invariant. */
1826 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1827 r1
= SET_DEST (PATTERN (m
->insn
));
1828 r2
= SET_DEST (PATTERN (m1
->insn
));
1830 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1831 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1833 delete_insn (m
->insn
);
1838 if (loop_dump_stream
)
1839 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1841 /* If we are to re-generate the item being moved with a
1842 new move insn, first delete what we have and then emit
1843 the move insn before the loop. */
1844 else if (m
->move_insn
)
1848 for (count
= m
->consec
; count
>= 0; count
--)
1850 /* If this is the first insn of a library call sequence,
1852 if (GET_CODE (p
) != NOTE
1853 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1856 /* If this is the last insn of a libcall sequence, then
1857 delete every insn in the sequence except the last.
1858 The last insn is handled in the normal manner. */
1859 if (GET_CODE (p
) != NOTE
1860 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1862 temp
= XEXP (temp
, 0);
1864 temp
= delete_insn (temp
);
1868 p
= delete_insn (p
);
1870 /* simplify_giv_expr expects that it can walk the insns
1871 at m->insn forwards and see this old sequence we are
1872 tossing here. delete_insn does preserve the next
1873 pointers, but when we skip over a NOTE we must fix
1874 it up. Otherwise that code walks into the non-deleted
1876 while (p
&& GET_CODE (p
) == NOTE
)
1877 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
1881 emit_move_insn (m
->set_dest
, m
->set_src
);
1882 temp
= get_insns ();
1885 add_label_notes (m
->set_src
, temp
);
1887 i1
= emit_insns_before (temp
, loop_start
);
1888 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1890 = gen_rtx_EXPR_LIST (m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1891 m
->set_src
, REG_NOTES (i1
));
1893 if (loop_dump_stream
)
1894 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1896 /* The more regs we move, the less we like moving them. */
1901 for (count
= m
->consec
; count
>= 0; count
--)
1905 /* If first insn of libcall sequence, skip to end. */
1906 /* Do this at start of loop, since p is guaranteed to
1908 if (GET_CODE (p
) != NOTE
1909 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1912 /* If last insn of libcall sequence, move all
1913 insns except the last before the loop. The last
1914 insn is handled in the normal manner. */
1915 if (GET_CODE (p
) != NOTE
1916 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1920 rtx fn_address_insn
= 0;
1923 for (temp
= XEXP (temp
, 0); temp
!= p
;
1924 temp
= NEXT_INSN (temp
))
1930 if (GET_CODE (temp
) == NOTE
)
1933 body
= PATTERN (temp
);
1935 /* Find the next insn after TEMP,
1936 not counting USE or NOTE insns. */
1937 for (next
= NEXT_INSN (temp
); next
!= p
;
1938 next
= NEXT_INSN (next
))
1939 if (! (GET_CODE (next
) == INSN
1940 && GET_CODE (PATTERN (next
)) == USE
)
1941 && GET_CODE (next
) != NOTE
)
1944 /* If that is the call, this may be the insn
1945 that loads the function address.
1947 Extract the function address from the insn
1948 that loads it into a register.
1949 If this insn was cse'd, we get incorrect code.
1951 So emit a new move insn that copies the
1952 function address into the register that the
1953 call insn will use. flow.c will delete any
1954 redundant stores that we have created. */
1955 if (GET_CODE (next
) == CALL_INSN
1956 && GET_CODE (body
) == SET
1957 && GET_CODE (SET_DEST (body
)) == REG
1958 && (n
= find_reg_note (temp
, REG_EQUAL
,
1961 fn_reg
= SET_SRC (body
);
1962 if (GET_CODE (fn_reg
) != REG
)
1963 fn_reg
= SET_DEST (body
);
1964 fn_address
= XEXP (n
, 0);
1965 fn_address_insn
= temp
;
1967 /* We have the call insn.
1968 If it uses the register we suspect it might,
1969 load it with the correct address directly. */
1970 if (GET_CODE (temp
) == CALL_INSN
1972 && reg_referenced_p (fn_reg
, body
))
1973 emit_insn_after (gen_move_insn (fn_reg
,
1977 if (GET_CODE (temp
) == CALL_INSN
)
1979 i1
= emit_call_insn_before (body
, loop_start
);
1980 /* Because the USAGE information potentially
1981 contains objects other than hard registers
1982 we need to copy it. */
1983 if (CALL_INSN_FUNCTION_USAGE (temp
))
1984 CALL_INSN_FUNCTION_USAGE (i1
)
1985 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1988 i1
= emit_insn_before (body
, loop_start
);
1991 if (temp
== fn_address_insn
)
1992 fn_address_insn
= i1
;
1993 REG_NOTES (i1
) = REG_NOTES (temp
);
1999 if (m
->savemode
!= VOIDmode
)
2001 /* P sets REG to zero; but we should clear only
2002 the bits that are not covered by the mode
2004 rtx reg
= m
->set_dest
;
2010 (GET_MODE (reg
), and_optab
, reg
,
2011 GEN_INT ((((HOST_WIDE_INT
) 1
2012 << GET_MODE_BITSIZE (m
->savemode
)))
2014 reg
, 1, OPTAB_LIB_WIDEN
);
2018 emit_move_insn (reg
, tem
);
2019 sequence
= gen_sequence ();
2021 i1
= emit_insn_before (sequence
, loop_start
);
2023 else if (GET_CODE (p
) == CALL_INSN
)
2025 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
2026 /* Because the USAGE information potentially
2027 contains objects other than hard registers
2028 we need to copy it. */
2029 if (CALL_INSN_FUNCTION_USAGE (p
))
2030 CALL_INSN_FUNCTION_USAGE (i1
)
2031 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
2033 else if (count
== m
->consec
&& m
->move_insn_first
)
2035 /* The SET_SRC might not be invariant, so we must
2036 use the REG_EQUAL note. */
2038 emit_move_insn (m
->set_dest
, m
->set_src
);
2039 temp
= get_insns ();
2042 add_label_notes (m
->set_src
, temp
);
2044 i1
= emit_insns_before (temp
, loop_start
);
2045 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2047 = gen_rtx_EXPR_LIST ((m
->is_equiv
? REG_EQUIV
2049 m
->set_src
, REG_NOTES (i1
));
2052 i1
= emit_insn_before (PATTERN (p
), loop_start
);
2054 if (REG_NOTES (i1
) == 0)
2056 REG_NOTES (i1
) = REG_NOTES (p
);
2058 /* If there is a REG_EQUAL note present whose value
2059 is not loop invariant, then delete it, since it
2060 may cause problems with later optimization passes.
2061 It is possible for cse to create such notes
2062 like this as a result of record_jump_cond. */
2064 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2065 && ! invariant_p (XEXP (temp
, 0)))
2066 remove_note (i1
, temp
);
2072 if (loop_dump_stream
)
2073 fprintf (loop_dump_stream
, " moved to %d",
2076 /* If library call, now fix the REG_NOTES that contain
2077 insn pointers, namely REG_LIBCALL on FIRST
2078 and REG_RETVAL on I1. */
2079 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
2081 XEXP (temp
, 0) = first
;
2082 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2083 XEXP (temp
, 0) = i1
;
2090 /* simplify_giv_expr expects that it can walk the insns
2091 at m->insn forwards and see this old sequence we are
2092 tossing here. delete_insn does preserve the next
2093 pointers, but when we skip over a NOTE we must fix
2094 it up. Otherwise that code walks into the non-deleted
2096 while (p
&& GET_CODE (p
) == NOTE
)
2097 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
2100 /* The more regs we move, the less we like moving them. */
2104 /* Any other movable that loads the same register
2106 already_moved
[regno
] = 1;
2108 /* This reg has been moved out of one loop. */
2109 moved_once
[regno
] = 1;
2111 /* The reg set here is now invariant. */
2113 VARRAY_INT (set_in_loop
, regno
) = 0;
2117 /* Change the length-of-life info for the register
2118 to say it lives at least the full length of this loop.
2119 This will help guide optimizations in outer loops. */
2121 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2122 /* This is the old insn before all the moved insns.
2123 We can't use the moved insn because it is out of range
2124 in uid_luid. Only the old insns have luids. */
2125 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2126 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2127 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2129 /* Combine with this moved insn any other matching movables. */
2132 for (m1
= movables
; m1
; m1
= m1
->next
)
2137 /* Schedule the reg loaded by M1
2138 for replacement so that shares the reg of M.
2139 If the modes differ (only possible in restricted
2140 circumstances, make a SUBREG.
2142 Note this assumes that the target dependent files
2143 treat REG and SUBREG equally, including within
2144 GO_IF_LEGITIMATE_ADDRESS and in all the
2145 predicates since we never verify that replacing the
2146 original register with a SUBREG results in a
2147 recognizable insn. */
2148 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2149 reg_map
[m1
->regno
] = m
->set_dest
;
2152 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2155 /* Get rid of the matching insn
2156 and prevent further processing of it. */
2159 /* if library call, delete all insn except last, which
2161 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2164 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2165 temp
= NEXT_INSN (temp
))
2168 delete_insn (m1
->insn
);
2170 /* Any other movable that loads the same register
2172 already_moved
[m1
->regno
] = 1;
2174 /* The reg merged here is now invariant,
2175 if the reg it matches is invariant. */
2177 VARRAY_INT (set_in_loop
, m1
->regno
) = 0;
2180 else if (loop_dump_stream
)
2181 fprintf (loop_dump_stream
, "not desirable");
2183 else if (loop_dump_stream
&& !m
->match
)
2184 fprintf (loop_dump_stream
, "not safe");
2186 if (loop_dump_stream
)
2187 fprintf (loop_dump_stream
, "\n");
2191 new_start
= loop_start
;
2193 /* Go through all the instructions in the loop, making
2194 all the register substitutions scheduled in REG_MAP. */
2195 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2196 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2197 || GET_CODE (p
) == CALL_INSN
)
2199 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2200 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2206 free (already_moved
);
2210 /* Scan X and replace the address of any MEM in it with ADDR.
2211 REG is the address that MEM should have before the replacement. */
2214 replace_call_address (x
, reg
, addr
)
2217 register enum rtx_code code
;
2219 register const char *fmt
;
2223 code
= GET_CODE (x
);
2237 /* Short cut for very common case. */
2238 replace_call_address (XEXP (x
, 1), reg
, addr
);
2242 /* Short cut for very common case. */
2243 replace_call_address (XEXP (x
, 0), reg
, addr
);
2247 /* If this MEM uses a reg other than the one we expected,
2248 something is wrong. */
2249 if (XEXP (x
, 0) != reg
)
2258 fmt
= GET_RTX_FORMAT (code
);
2259 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2262 replace_call_address (XEXP (x
, i
), reg
, addr
);
2263 else if (fmt
[i
] == 'E')
2266 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2267 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2273 /* Return the number of memory refs to addresses that vary
2277 count_nonfixed_reads (x
)
2280 register enum rtx_code code
;
2282 register const char *fmt
;
2288 code
= GET_CODE (x
);
2302 return ((invariant_p (XEXP (x
, 0)) != 1)
2303 + count_nonfixed_reads (XEXP (x
, 0)));
2310 fmt
= GET_RTX_FORMAT (code
);
2311 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2314 value
+= count_nonfixed_reads (XEXP (x
, i
));
2315 else if (fmt
[i
] == 'E')
2318 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2319 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2327 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2328 Replace it with an instruction to load just the low bytes
2329 if the machine supports such an instruction,
2330 and insert above LOOP_START an instruction to clear the register. */
2333 constant_high_bytes (p
, loop_start
)
2337 register int insn_code_number
;
2339 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2340 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2345 gen_rtx_STRICT_LOW_PART
2347 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2348 SET_DEST (PATTERN (p
)), 0)),
2349 XEXP (SET_SRC (PATTERN (p
)), 0));
2351 insn_code_number
= recog (new, p
);
2353 if (insn_code_number
)
2357 /* Clear destination register before the loop. */
2358 emit_insn_before (gen_rtx_SET (VOIDmode
,
2359 SET_DEST (PATTERN (p
)), const0_rtx
),
2362 /* Inside the loop, just load the low part. */
2368 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2369 `has_call', `has_volatile', and `has_tablejump' within LOOP_INFO.
2370 Set the global variables `unknown_address_altered',
2371 `unknown_constant_address_altered', and `num_mem_sets'. Also, fill
2372 in the array `loop_mems' and the list `loop_store_mems'. */
2378 register int level
= 1;
2380 struct loop_info
*loop_info
= loop
->info
;
2381 rtx start
= loop
->start
;
2382 rtx end
= loop
->end
;
2383 /* The label after END. Jumping here is just like falling off the
2384 end of the loop. We use next_nonnote_insn instead of next_label
2385 as a hedge against the (pathological) case where some actual insn
2386 might end up between the two. */
2387 rtx exit_target
= next_nonnote_insn (end
);
2389 loop_info
->has_indirect_jump
= indirect_jump_in_function
;
2390 loop_info
->has_call
= 0;
2391 loop_info
->has_volatile
= 0;
2392 loop_info
->has_tablejump
= 0;
2393 loop_info
->has_multiple_exit_targets
= 0;
2398 unknown_address_altered
= 0;
2399 unknown_constant_address_altered
= 0;
2400 loop_store_mems
= NULL_RTX
;
2401 first_loop_store_insn
= NULL_RTX
;
2405 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2406 insn
= NEXT_INSN (insn
))
2408 if (GET_CODE (insn
) == NOTE
)
2410 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2413 /* Count number of loops contained in this one. */
2416 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2425 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2430 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_VTOP
)
2432 /* If there is a NOTE_INSN_LOOP_VTOP, then this is a for
2433 or while style loop, with a loop exit test at the
2434 start. Thus, we can assume that the loop condition
2435 was true when the loop was entered. */
2440 else if (GET_CODE (insn
) == CALL_INSN
)
2442 if (! CONST_CALL_P (insn
))
2443 unknown_address_altered
= 1;
2444 loop_info
->has_call
= 1;
2446 else if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2448 rtx label1
= NULL_RTX
;
2449 rtx label2
= NULL_RTX
;
2451 if (volatile_refs_p (PATTERN (insn
)))
2452 loop_info
->has_volatile
= 1;
2454 if (GET_CODE (insn
) == JUMP_INSN
2455 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
2456 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
))
2457 loop_info
->has_tablejump
= 1;
2459 note_stores (PATTERN (insn
), note_addr_stored
, NULL
);
2460 if (! first_loop_store_insn
&& loop_store_mems
)
2461 first_loop_store_insn
= insn
;
2463 if (! loop_info
->has_multiple_exit_targets
2464 && GET_CODE (insn
) == JUMP_INSN
2465 && GET_CODE (PATTERN (insn
)) == SET
2466 && SET_DEST (PATTERN (insn
)) == pc_rtx
)
2468 if (GET_CODE (SET_SRC (PATTERN (insn
))) == IF_THEN_ELSE
)
2470 label1
= XEXP (SET_SRC (PATTERN (insn
)), 1);
2471 label2
= XEXP (SET_SRC (PATTERN (insn
)), 2);
2475 label1
= SET_SRC (PATTERN (insn
));
2479 if (label1
&& label1
!= pc_rtx
)
2481 if (GET_CODE (label1
) != LABEL_REF
)
2483 /* Something tricky. */
2484 loop_info
->has_multiple_exit_targets
= 1;
2487 else if (XEXP (label1
, 0) != exit_target
2488 && LABEL_OUTSIDE_LOOP_P (label1
))
2490 /* A jump outside the current loop. */
2491 loop_info
->has_multiple_exit_targets
= 1;
2501 else if (GET_CODE (insn
) == RETURN
)
2502 loop_info
->has_multiple_exit_targets
= 1;
2505 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2506 if (/* We can't tell what MEMs are aliased by what. */
2507 ! unknown_address_altered
2508 /* An exception thrown by a called function might land us
2510 && ! loop_info
->has_call
2511 /* We don't want loads for MEMs moved to a location before the
2512 one at which their stack memory becomes allocated. (Note
2513 that this is not a problem for malloc, etc., since those
2514 require actual function calls. */
2515 && ! current_function_calls_alloca
2516 /* There are ways to leave the loop other than falling off the
2518 && ! loop_info
->has_multiple_exit_targets
)
2519 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2520 insn
= NEXT_INSN (insn
))
2521 for_each_rtx (&insn
, insert_loop_mem
, 0);
2524 /* LOOP->CONT_DOMINATOR is now the last label between the loop start
2525 and the continue note that is a the destination of a (cond)jump after
2526 the continue note. If there is any (cond)jump between the loop start
2527 and what we have so far as LOOP->CONT_DOMINATOR that has a
2528 target between LOOP->DOMINATOR and the continue note, move
2529 LOOP->CONT_DOMINATOR forward to that label; if a jump's
2530 destination cannot be determined, clear LOOP->CONT_DOMINATOR. */
2533 verify_dominator (loop
)
2538 if (! loop
->cont_dominator
)
2539 /* This can happen for an empty loop, e.g. in
2540 gcc.c-torture/compile/920410-2.c */
2542 if (loop
->cont_dominator
== const0_rtx
)
2544 loop
->cont_dominator
= 0;
2547 for (insn
= loop
->start
; insn
!= loop
->cont_dominator
;
2548 insn
= NEXT_INSN (insn
))
2550 if (GET_CODE (insn
) == JUMP_INSN
2551 && GET_CODE (PATTERN (insn
)) != RETURN
)
2553 rtx label
= JUMP_LABEL (insn
);
2556 /* If it is not a jump we can easily understand or for
2557 which we do not have jump target information in the JUMP_LABEL
2558 field (consider ADDR_VEC and ADDR_DIFF_VEC insns), then clear
2559 LOOP->CONT_DOMINATOR. */
2560 if ((! condjump_p (insn
)
2561 && ! condjump_in_parallel_p (insn
))
2562 || label
== NULL_RTX
)
2564 loop
->cont_dominator
= NULL_RTX
;
2568 label_luid
= INSN_LUID (label
);
2569 if (label_luid
< INSN_LUID (loop
->cont
)
2571 > INSN_LUID (loop
->cont
)))
2572 loop
->cont_dominator
= label
;
2577 /* Scan the function looking for loops. Record the start and end of each loop.
2578 Also mark as invalid loops any loops that contain a setjmp or are branched
2579 to from outside the loop. */
2582 find_and_verify_loops (f
, loops
)
2584 struct loops
*loops
;
2589 struct loop
*current_loop
;
2590 struct loop
*next_loop
;
2593 num_loops
= loops
->num
;
2595 compute_luids (f
, NULL_RTX
, 0);
2597 /* If there are jumps to undefined labels,
2598 treat them as jumps out of any/all loops.
2599 This also avoids writing past end of tables when there are no loops. */
2602 /* Find boundaries of loops, mark which loops are contained within
2603 loops, and invalidate loops that have setjmp. */
2606 current_loop
= NULL
;
2607 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2609 if (GET_CODE (insn
) == NOTE
)
2610 switch (NOTE_LINE_NUMBER (insn
))
2612 case NOTE_INSN_LOOP_BEG
:
2613 next_loop
= loops
->array
+ num_loops
;
2614 next_loop
->num
= num_loops
;
2616 next_loop
->start
= insn
;
2617 next_loop
->outer
= current_loop
;
2618 current_loop
= next_loop
;
2621 case NOTE_INSN_SETJMP
:
2622 /* In this case, we must invalidate our current loop and any
2624 for (loop
= current_loop
; loop
; loop
= loop
->outer
)
2627 if (loop_dump_stream
)
2628 fprintf (loop_dump_stream
,
2629 "\nLoop at %d ignored due to setjmp.\n",
2630 INSN_UID (loop
->start
));
2634 case NOTE_INSN_LOOP_CONT
:
2635 current_loop
->cont
= insn
;
2637 case NOTE_INSN_LOOP_END
:
2641 current_loop
->end
= insn
;
2642 verify_dominator (current_loop
);
2643 current_loop
= current_loop
->outer
;
2649 /* If for any loop, this is a jump insn between the NOTE_INSN_LOOP_CONT
2650 and NOTE_INSN_LOOP_END notes, update loop->dominator. */
2651 else if (GET_CODE (insn
) == JUMP_INSN
2652 && GET_CODE (PATTERN (insn
)) != RETURN
2655 rtx label
= JUMP_LABEL (insn
);
2657 if (! condjump_p (insn
) && ! condjump_in_parallel_p (insn
))
2660 loop
= current_loop
;
2663 /* First see if we care about this loop. */
2664 if (loop
->cont
&& loop
->cont_dominator
!= const0_rtx
)
2666 /* If the jump destination is not known, invalidate
2667 loop->const_dominator. */
2669 loop
->cont_dominator
= const0_rtx
;
2671 /* Check if the destination is between loop start and
2673 if ((INSN_LUID (label
)
2674 < INSN_LUID (loop
->cont
))
2675 && (INSN_LUID (label
)
2676 > INSN_LUID (loop
->start
))
2677 /* And if there is no later destination already
2679 && (! loop
->cont_dominator
2680 || (INSN_LUID (label
)
2681 > INSN_LUID (loop
->cont_dominator
))))
2682 loop
->cont_dominator
= label
;
2689 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2690 enclosing loop, but this doesn't matter. */
2691 uid_loop
[INSN_UID (insn
)] = current_loop
;
2694 /* Any loop containing a label used in an initializer must be invalidated,
2695 because it can be jumped into from anywhere. */
2697 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2699 for (loop
= uid_loop
[INSN_UID (XEXP (label
, 0))];
2700 loop
; loop
= loop
->outer
)
2704 /* Any loop containing a label used for an exception handler must be
2705 invalidated, because it can be jumped into from anywhere. */
2707 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2709 for (loop
= uid_loop
[INSN_UID (XEXP (label
, 0))];
2710 loop
; loop
= loop
->outer
)
2714 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2715 loop that it is not contained within, that loop is marked invalid.
2716 If any INSN or CALL_INSN uses a label's address, then the loop containing
2717 that label is marked invalid, because it could be jumped into from
2720 Also look for blocks of code ending in an unconditional branch that
2721 exits the loop. If such a block is surrounded by a conditional
2722 branch around the block, move the block elsewhere (see below) and
2723 invert the jump to point to the code block. This may eliminate a
2724 label in our loop and will simplify processing by both us and a
2725 possible second cse pass. */
2727 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2728 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2730 struct loop
*this_loop
= uid_loop
[INSN_UID (insn
)];
2732 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2734 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2737 for (loop
= uid_loop
[INSN_UID (XEXP (note
, 0))];
2738 loop
; loop
= loop
->outer
)
2743 if (GET_CODE (insn
) != JUMP_INSN
)
2746 mark_loop_jump (PATTERN (insn
), this_loop
);
2748 /* See if this is an unconditional branch outside the loop. */
2750 && (GET_CODE (PATTERN (insn
)) == RETURN
2751 || (simplejump_p (insn
)
2752 && (uid_loop
[INSN_UID (JUMP_LABEL (insn
))]
2754 && get_max_uid () < max_uid_for_loop
)
2757 rtx our_next
= next_real_insn (insn
);
2758 rtx last_insn_to_move
= NEXT_INSN (insn
);
2759 struct loop
*dest_loop
;
2760 struct loop
*outer_loop
= NULL
;
2762 /* Go backwards until we reach the start of the loop, a label,
2764 for (p
= PREV_INSN (insn
);
2765 GET_CODE (p
) != CODE_LABEL
2766 && ! (GET_CODE (p
) == NOTE
2767 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2768 && GET_CODE (p
) != JUMP_INSN
;
2772 /* Check for the case where we have a jump to an inner nested
2773 loop, and do not perform the optimization in that case. */
2775 if (JUMP_LABEL (insn
))
2777 dest_loop
= uid_loop
[INSN_UID (JUMP_LABEL (insn
))];
2780 for (outer_loop
= dest_loop
; outer_loop
;
2781 outer_loop
= outer_loop
->outer
)
2782 if (outer_loop
== this_loop
)
2787 /* Make sure that the target of P is within the current loop. */
2789 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2790 && uid_loop
[INSN_UID (JUMP_LABEL (p
))] != this_loop
)
2791 outer_loop
= this_loop
;
2793 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2794 we have a block of code to try to move.
2796 We look backward and then forward from the target of INSN
2797 to find a BARRIER at the same loop depth as the target.
2798 If we find such a BARRIER, we make a new label for the start
2799 of the block, invert the jump in P and point it to that label,
2800 and move the block of code to the spot we found. */
2803 && GET_CODE (p
) == JUMP_INSN
2804 && JUMP_LABEL (p
) != 0
2805 /* Just ignore jumps to labels that were never emitted.
2806 These always indicate compilation errors. */
2807 && INSN_UID (JUMP_LABEL (p
)) != 0
2809 && ! simplejump_p (p
)
2810 && next_real_insn (JUMP_LABEL (p
)) == our_next
2811 /* If it's not safe to move the sequence, then we
2813 && insns_safe_to_move_p (p
, NEXT_INSN (insn
),
2814 &last_insn_to_move
))
2817 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2818 struct loop
*target_loop
= uid_loop
[INSN_UID (target
)];
2821 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2822 if (GET_CODE (loc
) == BARRIER
2823 /* Don't move things inside a tablejump. */
2824 && ((loc2
= next_nonnote_insn (loc
)) == 0
2825 || GET_CODE (loc2
) != CODE_LABEL
2826 || (loc2
= next_nonnote_insn (loc2
)) == 0
2827 || GET_CODE (loc2
) != JUMP_INSN
2828 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
2829 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
2830 && uid_loop
[INSN_UID (loc
)] == target_loop
)
2834 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2835 if (GET_CODE (loc
) == BARRIER
2836 /* Don't move things inside a tablejump. */
2837 && ((loc2
= next_nonnote_insn (loc
)) == 0
2838 || GET_CODE (loc2
) != CODE_LABEL
2839 || (loc2
= next_nonnote_insn (loc2
)) == 0
2840 || GET_CODE (loc2
) != JUMP_INSN
2841 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
2842 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
2843 && uid_loop
[INSN_UID (loc
)] == target_loop
)
2848 rtx cond_label
= JUMP_LABEL (p
);
2849 rtx new_label
= get_label_after (p
);
2851 /* Ensure our label doesn't go away. */
2852 LABEL_NUSES (cond_label
)++;
2854 /* Verify that uid_loop is large enough and that
2856 if (invert_jump (p
, new_label
))
2860 /* If no suitable BARRIER was found, create a suitable
2861 one before TARGET. Since TARGET is a fall through
2862 path, we'll need to insert an jump around our block
2863 and a add a BARRIER before TARGET.
2865 This creates an extra unconditional jump outside
2866 the loop. However, the benefits of removing rarely
2867 executed instructions from inside the loop usually
2868 outweighs the cost of the extra unconditional jump
2869 outside the loop. */
2874 temp
= gen_jump (JUMP_LABEL (insn
));
2875 temp
= emit_jump_insn_before (temp
, target
);
2876 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2877 LABEL_NUSES (JUMP_LABEL (insn
))++;
2878 loc
= emit_barrier_before (target
);
2881 /* Include the BARRIER after INSN and copy the
2883 new_label
= squeeze_notes (new_label
,
2885 reorder_insns (new_label
, last_insn_to_move
, loc
);
2887 /* All those insns are now in TARGET_LOOP. */
2889 q
!= NEXT_INSN (last_insn_to_move
);
2891 uid_loop
[INSN_UID (q
)] = target_loop
;
2893 /* The label jumped to by INSN is no longer a loop exit.
2894 Unless INSN does not have a label (e.g., it is a
2895 RETURN insn), search loop->exit_labels to find
2896 its label_ref, and remove it. Also turn off
2897 LABEL_OUTSIDE_LOOP_P bit. */
2898 if (JUMP_LABEL (insn
))
2901 r
= this_loop
->exit_labels
;
2902 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2903 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2905 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2907 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2909 this_loop
->exit_labels
= LABEL_NEXTREF (r
);
2913 for (loop
= this_loop
; loop
&& loop
!= target_loop
;
2917 /* If we didn't find it, then something is
2923 /* P is now a jump outside the loop, so it must be put
2924 in loop->exit_labels, and marked as such.
2925 The easiest way to do this is to just call
2926 mark_loop_jump again for P. */
2927 mark_loop_jump (PATTERN (p
), this_loop
);
2929 /* If INSN now jumps to the insn after it,
2931 if (JUMP_LABEL (insn
) != 0
2932 && (next_real_insn (JUMP_LABEL (insn
))
2933 == next_real_insn (insn
)))
2937 /* Continue the loop after where the conditional
2938 branch used to jump, since the only branch insn
2939 in the block (if it still remains) is an inter-loop
2940 branch and hence needs no processing. */
2941 insn
= NEXT_INSN (cond_label
);
2943 if (--LABEL_NUSES (cond_label
) == 0)
2944 delete_insn (cond_label
);
2946 /* This loop will be continued with NEXT_INSN (insn). */
2947 insn
= PREV_INSN (insn
);
2954 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2955 loops it is contained in, mark the target loop invalid.
2957 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2960 mark_loop_jump (x
, loop
)
2964 struct loop
*dest_loop
;
2965 struct loop
*outer_loop
;
2968 switch (GET_CODE (x
))
2981 /* There could be a label reference in here. */
2982 mark_loop_jump (XEXP (x
, 0), loop
);
2988 mark_loop_jump (XEXP (x
, 0), loop
);
2989 mark_loop_jump (XEXP (x
, 1), loop
);
2993 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2994 mark_loop_jump (XEXP (x
, 1), loop
);
2999 mark_loop_jump (XEXP (x
, 0), loop
);
3003 dest_loop
= uid_loop
[INSN_UID (XEXP (x
, 0))];
3005 /* Link together all labels that branch outside the loop. This
3006 is used by final_[bg]iv_value and the loop unrolling code. Also
3007 mark this LABEL_REF so we know that this branch should predict
3010 /* A check to make sure the label is not in an inner nested loop,
3011 since this does not count as a loop exit. */
3014 for (outer_loop
= dest_loop
; outer_loop
;
3015 outer_loop
= outer_loop
->outer
)
3016 if (outer_loop
== loop
)
3022 if (loop
&& ! outer_loop
)
3024 LABEL_OUTSIDE_LOOP_P (x
) = 1;
3025 LABEL_NEXTREF (x
) = loop
->exit_labels
;
3026 loop
->exit_labels
= x
;
3028 for (outer_loop
= loop
;
3029 outer_loop
&& outer_loop
!= dest_loop
;
3030 outer_loop
= outer_loop
->outer
)
3031 outer_loop
->exit_count
++;
3034 /* If this is inside a loop, but not in the current loop or one enclosed
3035 by it, it invalidates at least one loop. */
3040 /* We must invalidate every nested loop containing the target of this
3041 label, except those that also contain the jump insn. */
3043 for (; dest_loop
; dest_loop
= dest_loop
->outer
)
3045 /* Stop when we reach a loop that also contains the jump insn. */
3046 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
3047 if (dest_loop
== outer_loop
)
3050 /* If we get here, we know we need to invalidate a loop. */
3051 if (loop_dump_stream
&& ! dest_loop
->invalid
)
3052 fprintf (loop_dump_stream
,
3053 "\nLoop at %d ignored due to multiple entry points.\n",
3054 INSN_UID (dest_loop
->start
));
3056 dest_loop
->invalid
= 1;
3061 /* If this is not setting pc, ignore. */
3062 if (SET_DEST (x
) == pc_rtx
)
3063 mark_loop_jump (SET_SRC (x
), loop
);
3067 mark_loop_jump (XEXP (x
, 1), loop
);
3068 mark_loop_jump (XEXP (x
, 2), loop
);
3073 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
3074 mark_loop_jump (XVECEXP (x
, 0, i
), loop
);
3078 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
3079 mark_loop_jump (XVECEXP (x
, 1, i
), loop
);
3083 /* Strictly speaking this is not a jump into the loop, only a possible
3084 jump out of the loop. However, we have no way to link the destination
3085 of this jump onto the list of exit labels. To be safe we mark this
3086 loop and any containing loops as invalid. */
3089 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
3091 if (loop_dump_stream
&& ! outer_loop
->invalid
)
3092 fprintf (loop_dump_stream
,
3093 "\nLoop at %d ignored due to unknown exit jump.\n",
3094 INSN_UID (outer_loop
->start
));
3095 outer_loop
->invalid
= 1;
3102 /* Return nonzero if there is a label in the range from
3103 insn INSN to and including the insn whose luid is END
3104 INSN must have an assigned luid (i.e., it must not have
3105 been previously created by loop.c). */
3108 labels_in_range_p (insn
, end
)
3112 while (insn
&& INSN_LUID (insn
) <= end
)
3114 if (GET_CODE (insn
) == CODE_LABEL
)
3116 insn
= NEXT_INSN (insn
);
3122 /* Record that a memory reference X is being set. */
3125 note_addr_stored (x
, y
, data
)
3127 rtx y ATTRIBUTE_UNUSED
;
3128 void *data ATTRIBUTE_UNUSED
;
3130 if (x
== 0 || GET_CODE (x
) != MEM
)
3133 /* Count number of memory writes.
3134 This affects heuristics in strength_reduce. */
3137 /* BLKmode MEM means all memory is clobbered. */
3138 if (GET_MODE (x
) == BLKmode
)
3140 if (RTX_UNCHANGING_P (x
))
3141 unknown_constant_address_altered
= 1;
3143 unknown_address_altered
= 1;
3148 loop_store_mems
= gen_rtx_EXPR_LIST (VOIDmode
, x
, loop_store_mems
);
3151 /* X is a value modified by an INSN that references a biv inside a loop
3152 exit test (ie, X is somehow related to the value of the biv). If X
3153 is a pseudo that is used more than once, then the biv is (effectively)
3154 used more than once. DATA is really an `int *', and is set if the
3155 biv is used more than once. */
3158 note_set_pseudo_multiple_uses (x
, y
, data
)
3160 rtx y ATTRIBUTE_UNUSED
;
3166 while (GET_CODE (x
) == STRICT_LOW_PART
3167 || GET_CODE (x
) == SIGN_EXTRACT
3168 || GET_CODE (x
) == ZERO_EXTRACT
3169 || GET_CODE (x
) == SUBREG
)
3172 if (GET_CODE (x
) != REG
|| REGNO (x
) < FIRST_PSEUDO_REGISTER
)
3175 /* If we do not have usage information, or if we know the register
3176 is used more than once, note that fact for check_dbra_loop. */
3177 if (REGNO (x
) >= max_reg_before_loop
3178 || ! VARRAY_RTX (reg_single_usage
, REGNO (x
))
3179 || VARRAY_RTX (reg_single_usage
, REGNO (x
)) == const0_rtx
)
3180 *((int *) data
) = 1;
3183 /* Return nonzero if the rtx X is invariant over the current loop.
3185 The value is 2 if we refer to something only conditionally invariant.
3187 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3188 Otherwise, a memory ref is invariant if it does not conflict with
3189 anything stored in `loop_store_mems'. */
3196 register enum rtx_code code
;
3197 register const char *fmt
;
3198 int conditional
= 0;
3203 code
= GET_CODE (x
);
3213 /* A LABEL_REF is normally invariant, however, if we are unrolling
3214 loops, and this label is inside the loop, then it isn't invariant.
3215 This is because each unrolled copy of the loop body will have
3216 a copy of this label. If this was invariant, then an insn loading
3217 the address of this label into a register might get moved outside
3218 the loop, and then each loop body would end up using the same label.
3220 We don't know the loop bounds here though, so just fail for all
3222 if (flag_unroll_loops
)
3229 case UNSPEC_VOLATILE
:
3233 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3234 since the reg might be set by initialization within the loop. */
3236 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
3237 || x
== arg_pointer_rtx
)
3238 && ! current_function_has_nonlocal_goto
)
3241 if (current_loop_info
->has_call
3242 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
3245 if (VARRAY_INT (set_in_loop
, REGNO (x
)) < 0)
3248 return VARRAY_INT (set_in_loop
, REGNO (x
)) == 0;
3251 /* Volatile memory references must be rejected. Do this before
3252 checking for read-only items, so that volatile read-only items
3253 will be rejected also. */
3254 if (MEM_VOLATILE_P (x
))
3257 /* If we had a subroutine call, any location in memory could
3258 have been clobbered. We used to test here for volatile and
3259 readonly, but true_dependence knows how to do that better
3261 if (RTX_UNCHANGING_P (x
)
3262 ? unknown_constant_address_altered
: unknown_address_altered
)
3265 /* See if there is any dependence between a store and this load. */
3266 mem_list_entry
= loop_store_mems
;
3267 while (mem_list_entry
)
3269 if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
3273 mem_list_entry
= XEXP (mem_list_entry
, 1);
3276 /* It's not invalidated by a store in memory
3277 but we must still verify the address is invariant. */
3281 /* Don't mess with insns declared volatile. */
3282 if (MEM_VOLATILE_P (x
))
3290 fmt
= GET_RTX_FORMAT (code
);
3291 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3295 int tem
= invariant_p (XEXP (x
, i
));
3301 else if (fmt
[i
] == 'E')
3304 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3306 int tem
= invariant_p (XVECEXP (x
, i
, j
));
3316 return 1 + conditional
;
3320 /* Return nonzero if all the insns in the loop that set REG
3321 are INSN and the immediately following insns,
3322 and if each of those insns sets REG in an invariant way
3323 (not counting uses of REG in them).
3325 The value is 2 if some of these insns are only conditionally invariant.
3327 We assume that INSN itself is the first set of REG
3328 and that its source is invariant. */
3331 consec_sets_invariant_p (reg
, n_sets
, insn
)
3335 register rtx p
= insn
;
3336 register int regno
= REGNO (reg
);
3338 /* Number of sets we have to insist on finding after INSN. */
3339 int count
= n_sets
- 1;
3340 int old
= VARRAY_INT (set_in_loop
, regno
);
3344 /* If N_SETS hit the limit, we can't rely on its value. */
3348 VARRAY_INT (set_in_loop
, regno
) = 0;
3352 register enum rtx_code code
;
3356 code
= GET_CODE (p
);
3358 /* If library call, skip to end of it. */
3359 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3364 && (set
= single_set (p
))
3365 && GET_CODE (SET_DEST (set
)) == REG
3366 && REGNO (SET_DEST (set
)) == regno
)
3368 this = invariant_p (SET_SRC (set
));
3371 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3373 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3374 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3376 this = (CONSTANT_P (XEXP (temp
, 0))
3377 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3378 && invariant_p (XEXP (temp
, 0))));
3385 else if (code
!= NOTE
)
3387 VARRAY_INT (set_in_loop
, regno
) = old
;
3392 VARRAY_INT (set_in_loop
, regno
) = old
;
3393 /* If invariant_p ever returned 2, we return 2. */
3394 return 1 + (value
& 2);
3398 /* I don't think this condition is sufficient to allow INSN
3399 to be moved, so we no longer test it. */
3401 /* Return 1 if all insns in the basic block of INSN and following INSN
3402 that set REG are invariant according to TABLE. */
3405 all_sets_invariant_p (reg
, insn
, table
)
3409 register rtx p
= insn
;
3410 register int regno
= REGNO (reg
);
3414 register enum rtx_code code
;
3416 code
= GET_CODE (p
);
3417 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3419 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3420 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3421 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3423 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3430 /* Look at all uses (not sets) of registers in X. For each, if it is
3431 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3432 a different insn, set USAGE[REGNO] to const0_rtx. */
3435 find_single_use_in_loop (insn
, x
, usage
)
3440 enum rtx_code code
= GET_CODE (x
);
3441 const char *fmt
= GET_RTX_FORMAT (code
);
3445 VARRAY_RTX (usage
, REGNO (x
))
3446 = (VARRAY_RTX (usage
, REGNO (x
)) != 0
3447 && VARRAY_RTX (usage
, REGNO (x
)) != insn
)
3448 ? const0_rtx
: insn
;
3450 else if (code
== SET
)
3452 /* Don't count SET_DEST if it is a REG; otherwise count things
3453 in SET_DEST because if a register is partially modified, it won't
3454 show up as a potential movable so we don't care how USAGE is set
3456 if (GET_CODE (SET_DEST (x
)) != REG
)
3457 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3458 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3461 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3463 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3464 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3465 else if (fmt
[i
] == 'E')
3466 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3467 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3471 /* Count and record any set in X which is contained in INSN. Update
3472 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3475 count_one_set (insn
, x
, may_not_move
, last_set
)
3477 varray_type may_not_move
;
3480 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3481 /* Don't move a reg that has an explicit clobber.
3482 It's not worth the pain to try to do it correctly. */
3483 VARRAY_CHAR (may_not_move
, REGNO (XEXP (x
, 0))) = 1;
3485 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3487 rtx dest
= SET_DEST (x
);
3488 while (GET_CODE (dest
) == SUBREG
3489 || GET_CODE (dest
) == ZERO_EXTRACT
3490 || GET_CODE (dest
) == SIGN_EXTRACT
3491 || GET_CODE (dest
) == STRICT_LOW_PART
)
3492 dest
= XEXP (dest
, 0);
3493 if (GET_CODE (dest
) == REG
)
3495 register int regno
= REGNO (dest
);
3496 /* If this is the first setting of this reg
3497 in current basic block, and it was set before,
3498 it must be set in two basic blocks, so it cannot
3499 be moved out of the loop. */
3500 if (VARRAY_INT (set_in_loop
, regno
) > 0
3501 && last_set
[regno
] == 0)
3502 VARRAY_CHAR (may_not_move
, regno
) = 1;
3503 /* If this is not first setting in current basic block,
3504 see if reg was used in between previous one and this.
3505 If so, neither one can be moved. */
3506 if (last_set
[regno
] != 0
3507 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3508 VARRAY_CHAR (may_not_move
, regno
) = 1;
3509 if (VARRAY_INT (set_in_loop
, regno
) < 127)
3510 ++VARRAY_INT (set_in_loop
, regno
);
3511 last_set
[regno
] = insn
;
3516 /* Increment SET_IN_LOOP at the index of each register
3517 that is modified by an insn between FROM and TO.
3518 If the value of an element of SET_IN_LOOP becomes 127 or more,
3519 stop incrementing it, to avoid overflow.
3521 Store in SINGLE_USAGE[I] the single insn in which register I is
3522 used, if it is only used once. Otherwise, it is set to 0 (for no
3523 uses) or const0_rtx for more than one use. This parameter may be zero,
3524 in which case this processing is not done.
3526 Store in *COUNT_PTR the number of actual instruction
3527 in the loop. We use this to decide what is worth moving out. */
3529 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3530 In that case, it is the insn that last set reg n. */
3533 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3534 register rtx from
, to
;
3535 varray_type may_not_move
;
3536 varray_type single_usage
;
3540 register rtx
*last_set
= (rtx
*) xcalloc (nregs
, sizeof (rtx
));
3542 register int count
= 0;
3544 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3546 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3550 /* Record registers that have exactly one use. */
3551 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3553 /* Include uses in REG_EQUAL notes. */
3554 if (REG_NOTES (insn
))
3555 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3557 if (GET_CODE (PATTERN (insn
)) == SET
3558 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3559 count_one_set (insn
, PATTERN (insn
), may_not_move
, last_set
);
3560 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3563 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3564 count_one_set (insn
, XVECEXP (PATTERN (insn
), 0, i
),
3565 may_not_move
, last_set
);
3569 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3570 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3578 /* Given a loop that is bounded by LOOP_START and LOOP_END
3579 and that is entered at LOOP_SCAN_START,
3580 return 1 if the register set in SET contained in insn INSN is used by
3581 any insn that precedes INSN in cyclic order starting
3582 from the loop entry point.
3584 We don't want to use INSN_LUID here because if we restrict INSN to those
3585 that have a valid INSN_LUID, it means we cannot move an invariant out
3586 from an inner loop past two loops. */
3589 loop_reg_used_before_p (loop
, set
, insn
)
3590 const struct loop
*loop
;
3593 rtx reg
= SET_DEST (set
);
3596 /* Scan forward checking for register usage. If we hit INSN, we
3597 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3598 for (p
= loop
->scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3600 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3601 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3611 /* A "basic induction variable" or biv is a pseudo reg that is set
3612 (within this loop) only by incrementing or decrementing it. */
3613 /* A "general induction variable" or giv is a pseudo reg whose
3614 value is a linear function of a biv. */
3616 /* Bivs are recognized by `basic_induction_var';
3617 Givs by `general_induction_var'. */
3619 /* Indexed by register number, indicates whether or not register is an
3620 induction variable, and if so what type. */
3622 varray_type reg_iv_type
;
3624 /* Indexed by register number, contains pointer to `struct induction'
3625 if register is an induction variable. This holds general info for
3626 all induction variables. */
3628 varray_type reg_iv_info
;
3630 /* Indexed by register number, contains pointer to `struct iv_class'
3631 if register is a basic induction variable. This holds info describing
3632 the class (a related group) of induction variables that the biv belongs
3635 struct iv_class
**reg_biv_class
;
3637 /* The head of a list which links together (via the next field)
3638 every iv class for the current loop. */
3640 struct iv_class
*loop_iv_list
;
3642 /* Givs made from biv increments are always splittable for loop unrolling.
3643 Since there is no regscan info for them, we have to keep track of them
3645 int first_increment_giv
, last_increment_giv
;
3647 /* Communication with routines called via `note_stores'. */
3649 static rtx note_insn
;
3651 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3653 static rtx addr_placeholder
;
3655 /* ??? Unfinished optimizations, and possible future optimizations,
3656 for the strength reduction code. */
3658 /* ??? The interaction of biv elimination, and recognition of 'constant'
3659 bivs, may cause problems. */
3661 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3662 performance problems.
3664 Perhaps don't eliminate things that can be combined with an addressing
3665 mode. Find all givs that have the same biv, mult_val, and add_val;
3666 then for each giv, check to see if its only use dies in a following
3667 memory address. If so, generate a new memory address and check to see
3668 if it is valid. If it is valid, then store the modified memory address,
3669 otherwise, mark the giv as not done so that it will get its own iv. */
3671 /* ??? Could try to optimize branches when it is known that a biv is always
3674 /* ??? When replace a biv in a compare insn, we should replace with closest
3675 giv so that an optimized branch can still be recognized by the combiner,
3676 e.g. the VAX acb insn. */
3678 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3679 was rerun in loop_optimize whenever a register was added or moved.
3680 Also, some of the optimizations could be a little less conservative. */
3682 /* Perform strength reduction and induction variable elimination.
3684 Pseudo registers created during this function will be beyond the last
3685 valid index in several tables including n_times_set and regno_last_uid.
3686 This does not cause a problem here, because the added registers cannot be
3687 givs outside of their loop, and hence will never be reconsidered.
3688 But scan_loop must check regnos to make sure they are in bounds.
3690 LOOP_SCAN_START is the first instruction in the loop, as the loop would
3691 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3692 the first instruction in the loop, as it is layed out in the
3693 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG.
3694 LOOP_CONT is the NOTE_INSN_LOOP_CONT. */
3697 strength_reduce (loop
, insn_count
, unroll_p
, bct_p
)
3700 int unroll_p
, bct_p ATTRIBUTE_UNUSED
;
3708 /* This is 1 if current insn is not executed at least once for every loop
3710 int not_every_iteration
= 0;
3711 /* This is 1 if current insn may be executed more than once for every
3713 int maybe_multiple
= 0;
3714 /* This is 1 if we have past a branch back to the top of the loop
3715 (aka a loop latch). */
3716 int past_loop_latch
= 0;
3717 /* Temporary list pointers for traversing loop_iv_list. */
3718 struct iv_class
*bl
, **backbl
;
3719 struct loop_info
*loop_info
= loop
->info
;
3720 /* Ratio of extra register life span we can justify
3721 for saving an instruction. More if loop doesn't call subroutines
3722 since in that case saving an insn makes more difference
3723 and more registers are available. */
3724 /* ??? could set this to last value of threshold in move_movables */
3725 int threshold
= (loop_info
->has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3726 /* Map of pseudo-register replacements. */
3727 rtx
*reg_map
= NULL
;
3731 rtx end_insert_before
;
3733 int n_extra_increment
;
3734 int unrolled_insn_copies
= 0;
3735 rtx loop_start
= loop
->start
;
3736 rtx loop_end
= loop
->end
;
3737 rtx loop_scan_start
= loop
->scan_start
;
3738 rtx loop_top
= loop
->top
;
3739 rtx loop_cont
= loop
->cont
;
3741 /* If loop_scan_start points to the loop exit test, we have to be wary of
3742 subversive use of gotos inside expression statements. */
3743 if (prev_nonnote_insn (loop_scan_start
) != prev_nonnote_insn (loop_start
))
3744 maybe_multiple
= back_branch_in_range_p (loop_scan_start
, loop_start
, loop_end
);
3746 VARRAY_INT_INIT (reg_iv_type
, max_reg_before_loop
, "reg_iv_type");
3747 VARRAY_GENERIC_PTR_INIT (reg_iv_info
, max_reg_before_loop
, "reg_iv_info");
3748 reg_biv_class
= (struct iv_class
**)
3749 xcalloc (max_reg_before_loop
, sizeof (struct iv_class
*));
3752 addr_placeholder
= gen_reg_rtx (Pmode
);
3754 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3755 must be put before this insn, so that they will appear in the right
3756 order (i.e. loop order).
3758 If loop_end is the end of the current function, then emit a
3759 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3761 if (NEXT_INSN (loop_end
) != 0)
3762 end_insert_before
= NEXT_INSN (loop_end
);
3764 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3766 /* Scan through loop to find all possible bivs. */
3768 for (p
= next_insn_in_loop (loop
, loop_scan_start
);
3770 p
= next_insn_in_loop (loop
, p
))
3772 if (GET_CODE (p
) == INSN
3773 && (set
= single_set (p
))
3774 && GET_CODE (SET_DEST (set
)) == REG
)
3776 dest_reg
= SET_DEST (set
);
3777 if (REGNO (dest_reg
) < max_reg_before_loop
3778 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3779 && REG_IV_TYPE (REGNO (dest_reg
)) != NOT_BASIC_INDUCT
)
3781 int multi_insn_incr
= 0;
3783 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3784 dest_reg
, p
, loop
->level
,
3785 &inc_val
, &mult_val
,
3786 &location
, &multi_insn_incr
))
3788 /* It is a possible basic induction variable.
3789 Create and initialize an induction structure for it. */
3792 = (struct induction
*) alloca (sizeof (struct induction
));
3794 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
, location
,
3795 not_every_iteration
, maybe_multiple
,
3797 REG_IV_TYPE (REGNO (dest_reg
)) = BASIC_INDUCT
;
3799 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3800 REG_IV_TYPE (REGNO (dest_reg
)) = NOT_BASIC_INDUCT
;
3804 /* Past CODE_LABEL, we get to insns that may be executed multiple
3805 times. The only way we can be sure that they can't is if every
3806 jump insn between here and the end of the loop either
3807 returns, exits the loop, is a jump to a location that is still
3808 behind the label, or is a jump to the loop start. */
3810 if (GET_CODE (p
) == CODE_LABEL
)
3818 insn
= NEXT_INSN (insn
);
3819 if (insn
== loop_scan_start
)
3821 if (insn
== loop_end
)
3827 if (insn
== loop_scan_start
)
3831 if (GET_CODE (insn
) == JUMP_INSN
3832 && GET_CODE (PATTERN (insn
)) != RETURN
3833 && (! condjump_p (insn
)
3834 || (JUMP_LABEL (insn
) != 0
3835 && JUMP_LABEL (insn
) != loop_scan_start
3836 && ! loop_insn_first_p (p
, JUMP_LABEL (insn
)))))
3844 /* Past a jump, we get to insns for which we can't count
3845 on whether they will be executed during each iteration. */
3846 /* This code appears twice in strength_reduce. There is also similar
3847 code in scan_loop. */
3848 if (GET_CODE (p
) == JUMP_INSN
3849 /* If we enter the loop in the middle, and scan around to the
3850 beginning, don't set not_every_iteration for that.
3851 This can be any kind of jump, since we want to know if insns
3852 will be executed if the loop is executed. */
3853 && ! (JUMP_LABEL (p
) == loop_top
3854 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3855 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3859 /* If this is a jump outside the loop, then it also doesn't
3860 matter. Check to see if the target of this branch is on the
3861 loop->exits_labels list. */
3863 for (label
= uid_loop
[INSN_UID (loop_start
)]->exit_labels
;
3865 label
= LABEL_NEXTREF (label
))
3866 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3870 not_every_iteration
= 1;
3873 else if (GET_CODE (p
) == NOTE
)
3875 /* At the virtual top of a converted loop, insns are again known to
3876 be executed each iteration: logically, the loop begins here
3877 even though the exit code has been duplicated.
3879 Insns are also again known to be executed each iteration at
3880 the LOOP_CONT note. */
3881 if ((NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
3882 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_CONT
)
3884 not_every_iteration
= 0;
3885 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3887 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3891 /* Note if we pass a loop latch. If we do, then we can not clear
3892 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3893 a loop since a jump before the last CODE_LABEL may have started
3894 a new loop iteration.
3896 Note that LOOP_TOP is only set for rotated loops and we need
3897 this check for all loops, so compare against the CODE_LABEL
3898 which immediately follows LOOP_START. */
3899 if (GET_CODE (p
) == JUMP_INSN
3900 && JUMP_LABEL (p
) == NEXT_INSN (loop_start
))
3901 past_loop_latch
= 1;
3903 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3904 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3905 or not an insn is known to be executed each iteration of the
3906 loop, whether or not any iterations are known to occur.
3908 Therefore, if we have just passed a label and have no more labels
3909 between here and the test insn of the loop, and we have not passed
3910 a jump to the top of the loop, then we know these insns will be
3911 executed each iteration. */
3913 if (not_every_iteration
3914 && ! past_loop_latch
3915 && GET_CODE (p
) == CODE_LABEL
3916 && no_labels_between_p (p
, loop_end
)
3917 && loop_insn_first_p (p
, loop_cont
))
3918 not_every_iteration
= 0;
3921 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3922 Make a sanity check against n_times_set. */
3923 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3927 if (REG_IV_TYPE (bl
->regno
) != BASIC_INDUCT
3928 /* Above happens if register modified by subreg, etc. */
3929 /* Make sure it is not recognized as a basic induction var: */
3930 || VARRAY_INT (n_times_set
, bl
->regno
) != bl
->biv_count
3931 /* If never incremented, it is invariant that we decided not to
3932 move. So leave it alone. */
3933 || ! bl
->incremented
)
3935 else if (bl
->biv_count
> 1)
3937 /* ??? If we have multiple increments for this BIV, and any of
3938 them take multiple insns to perform the increment, drop the
3939 BIV, since the bit below that converts the extra increments
3940 into GIVs can't handle the multiple insn increment. */
3942 struct induction
*v
;
3943 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
3944 if (v
->multi_insn_incr
)
3950 if (loop_dump_stream
)
3951 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3953 (REG_IV_TYPE (bl
->regno
) != BASIC_INDUCT
3954 ? "not induction variable"
3955 : (! bl
->incremented
? "never incremented"
3958 REG_IV_TYPE (bl
->regno
) = NOT_BASIC_INDUCT
;
3965 if (loop_dump_stream
)
3966 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3970 /* Exit if there are no bivs. */
3973 /* Can still unroll the loop anyways, but indicate that there is no
3974 strength reduction info available. */
3976 unroll_loop (loop
, insn_count
, end_insert_before
, 0);
3981 /* Find initial value for each biv by searching backwards from loop_start,
3982 halting at first label. Also record any test condition. */
3985 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3989 if (GET_CODE (p
) == CALL_INSN
)
3992 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3993 || GET_CODE (p
) == CALL_INSN
)
3994 note_stores (PATTERN (p
), record_initial
, NULL
);
3996 /* Record any test of a biv that branches around the loop if no store
3997 between it and the start of loop. We only care about tests with
3998 constants and registers and only certain of those. */
3999 if (GET_CODE (p
) == JUMP_INSN
4000 && JUMP_LABEL (p
) != 0
4001 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
4002 && (test
= get_condition_for_loop (p
)) != 0
4003 && GET_CODE (XEXP (test
, 0)) == REG
4004 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
4005 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
4006 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
4007 && bl
->init_insn
== 0)
4009 /* If an NE test, we have an initial value! */
4010 if (GET_CODE (test
) == NE
)
4013 bl
->init_set
= gen_rtx_SET (VOIDmode
,
4014 XEXP (test
, 0), XEXP (test
, 1));
4017 bl
->initial_test
= test
;
4021 /* Look at the each biv and see if we can say anything better about its
4022 initial value from any initializing insns set up above. (This is done
4023 in two passes to avoid missing SETs in a PARALLEL.) */
4024 for (backbl
= &loop_iv_list
; (bl
= *backbl
); backbl
= &bl
->next
)
4029 if (! bl
->init_insn
)
4032 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4033 is a constant, use the value of that. */
4034 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
4035 && CONSTANT_P (XEXP (note
, 0)))
4036 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
4037 && CONSTANT_P (XEXP (note
, 0))))
4038 src
= XEXP (note
, 0);
4040 src
= SET_SRC (bl
->init_set
);
4042 if (loop_dump_stream
)
4043 fprintf (loop_dump_stream
,
4044 "Biv %d initialized at insn %d: initial value ",
4045 bl
->regno
, INSN_UID (bl
->init_insn
));
4047 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
4048 || GET_MODE (src
) == VOIDmode
)
4049 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
4051 bl
->initial_value
= src
;
4053 if (loop_dump_stream
)
4055 if (GET_CODE (src
) == CONST_INT
)
4057 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (src
));
4058 fputc ('\n', loop_dump_stream
);
4062 print_rtl (loop_dump_stream
, src
);
4063 fprintf (loop_dump_stream
, "\n");
4069 struct iv_class
*bl2
= 0;
4070 rtx increment
= NULL_RTX
;
4072 /* Biv initial value is not a simple move. If it is the sum of
4073 another biv and a constant, check if both bivs are incremented
4074 in lockstep. Then we are actually looking at a giv.
4075 For simplicity, we only handle the case where there is but a
4076 single increment, and the register is not used elsewhere. */
4077 if (bl
->biv_count
== 1
4078 && bl
->regno
< max_reg_before_loop
4079 && uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
4080 && GET_CODE (src
) == PLUS
4081 && GET_CODE (XEXP (src
, 0)) == REG
4082 && CONSTANT_P (XEXP (src
, 1))
4083 && ((increment
= biv_total_increment (bl
, loop_start
, loop_end
))
4086 int regno
= REGNO (XEXP (src
, 0));
4088 for (bl2
= loop_iv_list
; bl2
; bl2
= bl2
->next
)
4089 if (bl2
->regno
== regno
)
4093 /* Now, can we transform this biv into a giv? */
4095 && bl2
->biv_count
== 1
4096 && rtx_equal_p (increment
,
4097 biv_total_increment (bl2
, loop_start
, loop_end
))
4098 /* init_insn is only set to insns that are before loop_start
4099 without any intervening labels. */
4100 && ! reg_set_between_p (bl2
->biv
->src_reg
,
4101 PREV_INSN (bl
->init_insn
), loop_start
)
4102 /* The register from BL2 must be set before the register from
4103 BL is set, or we must be able to move the latter set after
4104 the former set. Currently there can't be any labels
4105 in-between when biv_total_increment returns nonzero both times
4106 but we test it here in case some day some real cfg analysis
4107 gets used to set always_computable. */
4108 && (loop_insn_first_p (bl2
->biv
->insn
, bl
->biv
->insn
)
4109 ? no_labels_between_p (bl2
->biv
->insn
, bl
->biv
->insn
)
4110 : (! reg_used_between_p (bl
->biv
->src_reg
, bl
->biv
->insn
,
4112 && no_jumps_between_p (bl
->biv
->insn
, bl2
->biv
->insn
)))
4113 && validate_change (bl
->biv
->insn
,
4114 &SET_SRC (single_set (bl
->biv
->insn
)),
4117 rtx dominator
= uid_loop
[INSN_UID (loop_start
)]->cont_dominator
;
4118 rtx giv
= bl
->biv
->src_reg
;
4119 rtx giv_insn
= bl
->biv
->insn
;
4120 rtx after_giv
= NEXT_INSN (giv_insn
);
4122 if (loop_dump_stream
)
4123 fprintf (loop_dump_stream
, "is giv of biv %d\n", bl2
->regno
);
4124 /* Let this giv be discovered by the generic code. */
4125 REG_IV_TYPE (bl
->regno
) = UNKNOWN_INDUCT
;
4126 reg_biv_class
[bl
->regno
] = (struct iv_class
*) NULL_PTR
;
4127 /* We can get better optimization if we can move the giv setting
4128 before the first giv use. */
4130 && ! loop_insn_first_p (dominator
, loop_scan_start
)
4131 && ! reg_set_between_p (bl2
->biv
->src_reg
, loop_start
,
4133 && ! reg_used_between_p (giv
, loop_start
, dominator
)
4134 && ! reg_used_between_p (giv
, giv_insn
, loop_end
))
4139 for (next
= NEXT_INSN (dominator
); ; next
= NEXT_INSN (next
))
4141 if ((GET_RTX_CLASS (GET_CODE (next
)) == 'i'
4142 && (reg_mentioned_p (giv
, PATTERN (next
))
4143 || reg_set_p (bl2
->biv
->src_reg
, next
)))
4144 || GET_CODE (next
) == JUMP_INSN
)
4147 if (GET_RTX_CLASS (GET_CODE (next
)) != 'i'
4148 || ! sets_cc0_p (PATTERN (next
)))
4152 if (loop_dump_stream
)
4153 fprintf (loop_dump_stream
, "move after insn %d\n",
4154 INSN_UID (dominator
));
4155 /* Avoid problems with luids by actually moving the insn
4156 and adjusting all luids in the range. */
4157 reorder_insns (giv_insn
, giv_insn
, dominator
);
4158 for (p
= dominator
; INSN_UID (p
) >= max_uid_for_loop
; )
4160 compute_luids (giv_insn
, after_giv
, INSN_LUID (p
));
4161 /* If the only purpose of the init insn is to initialize
4162 this giv, delete it. */
4163 if (single_set (bl
->init_insn
)
4164 && ! reg_used_between_p (giv
, bl
->init_insn
, loop_start
))
4165 delete_insn (bl
->init_insn
);
4167 else if (! loop_insn_first_p (bl2
->biv
->insn
, bl
->biv
->insn
))
4169 rtx p
= PREV_INSN (giv_insn
);
4170 while (INSN_UID (p
) >= max_uid_for_loop
)
4172 reorder_insns (giv_insn
, giv_insn
, bl2
->biv
->insn
);
4173 compute_luids (after_giv
, NEXT_INSN (giv_insn
),
4176 /* Remove this biv from the chain. */
4179 /* We move the following giv from *bl->next into *bl.
4180 We have to update reg_biv_class for that moved biv
4181 to point to its new address. */
4183 reg_biv_class
[bl
->regno
] = bl
;
4192 /* If we can't make it a giv,
4193 let biv keep initial value of "itself". */
4194 else if (loop_dump_stream
)
4195 fprintf (loop_dump_stream
, "is complex\n");
4199 /* If a biv is unconditionally incremented several times in a row, convert
4200 all but the last increment into a giv. */
4202 /* Get an upper bound for the number of registers
4203 we might have after all bivs have been processed. */
4204 first_increment_giv
= max_reg_num ();
4205 for (n_extra_increment
= 0, bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4206 n_extra_increment
+= bl
->biv_count
- 1;
4208 /* If the loop contains volatile memory references do not allow any
4209 replacements to take place, since this could loose the volatile
4211 if (n_extra_increment
&& ! loop_info
->has_volatile
)
4213 int nregs
= first_increment_giv
+ n_extra_increment
;
4215 /* Reallocate reg_iv_type and reg_iv_info. */
4216 VARRAY_GROW (reg_iv_type
, nregs
);
4217 VARRAY_GROW (reg_iv_info
, nregs
);
4219 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4221 struct induction
**vp
, *v
, *next
;
4222 int biv_dead_after_loop
= 0;
4224 /* The biv increments lists are in reverse order. Fix this
4226 for (v
= bl
->biv
, bl
->biv
= 0; v
; v
= next
)
4229 v
->next_iv
= bl
->biv
;
4233 /* We must guard against the case that an early exit between v->insn
4234 and next->insn leaves the biv live after the loop, since that
4235 would mean that we'd be missing an increment for the final
4236 value. The following test to set biv_dead_after_loop is like
4237 the first part of the test to set bl->eliminable.
4238 We don't check here if we can calculate the final value, since
4239 this can't succeed if we already know that there is a jump
4240 between v->insn and next->insn, yet next->always_executed is
4241 set and next->maybe_multiple is cleared. Such a combination
4242 implies that the jump destination is outside the loop.
4243 If we want to make this check more sophisticated, we should
4244 check each branch between v->insn and next->insn individually
4245 to see if the biv is dead at its destination. */
4247 if (uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
4249 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
4250 && (uid_luid
[REGNO_FIRST_UID (bl
->regno
)]
4251 >= INSN_LUID (bl
->init_insn
))
4252 #ifdef HAVE_decrement_and_branch_until_zero
4255 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
4256 biv_dead_after_loop
= 1;
4258 for (vp
= &bl
->biv
, next
= *vp
; v
= next
, next
= v
->next_iv
;)
4260 HOST_WIDE_INT offset
;
4261 rtx set
, add_val
, old_reg
, dest_reg
, last_use_insn
, note
;
4262 int old_regno
, new_regno
;
4264 if (! v
->always_executed
4265 || v
->maybe_multiple
4266 || GET_CODE (v
->add_val
) != CONST_INT
4267 || ! next
->always_executed
4268 || next
->maybe_multiple
4269 || ! CONSTANT_P (next
->add_val
)
4270 || v
->mult_val
!= const1_rtx
4271 || next
->mult_val
!= const1_rtx
4272 || ! (biv_dead_after_loop
4273 || no_jumps_between_p (v
->insn
, next
->insn
)))
4278 offset
= INTVAL (v
->add_val
);
4279 set
= single_set (v
->insn
);
4280 add_val
= plus_constant (next
->add_val
, offset
);
4281 old_reg
= v
->dest_reg
;
4282 dest_reg
= gen_reg_rtx (v
->mode
);
4284 /* Unlike reg_iv_type / reg_iv_info, the other three arrays
4285 have been allocated with some slop space, so we may not
4286 actually need to reallocate them. If we do, the following
4287 if statement will be executed just once in this loop. */
4288 if ((unsigned) max_reg_num () > n_times_set
->num_elements
)
4290 /* Grow all the remaining arrays. */
4291 VARRAY_GROW (set_in_loop
, nregs
);
4292 VARRAY_GROW (n_times_set
, nregs
);
4293 VARRAY_GROW (may_not_optimize
, nregs
);
4294 VARRAY_GROW (reg_single_usage
, nregs
);
4297 if (! validate_change (next
->insn
, next
->location
, add_val
, 0))
4303 /* Here we can try to eliminate the increment by combining
4304 it into the uses. */
4306 /* Set last_use_insn so that we can check against it. */
4308 for (last_use_insn
= v
->insn
, p
= NEXT_INSN (v
->insn
);
4310 p
= next_insn_in_loop (loop
, p
))
4312 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
4314 if (reg_mentioned_p (old_reg
, PATTERN (p
)))
4320 /* If we can't get the LUIDs for the insns, we can't
4321 calculate the lifetime. This is likely from unrolling
4322 of an inner loop, so there is little point in making this
4323 a DEST_REG giv anyways. */
4324 if (INSN_UID (v
->insn
) >= max_uid_for_loop
4325 || INSN_UID (last_use_insn
) >= max_uid_for_loop
4326 || ! validate_change (v
->insn
, &SET_DEST (set
), dest_reg
, 0))
4328 /* Change the increment at NEXT back to what it was. */
4329 if (! validate_change (next
->insn
, next
->location
,
4335 next
->add_val
= add_val
;
4336 v
->dest_reg
= dest_reg
;
4337 v
->giv_type
= DEST_REG
;
4338 v
->location
= &SET_SRC (set
);
4340 v
->combined_with
= 0;
4342 v
->derive_adjustment
= 0;
4348 v
->auto_inc_opt
= 0;
4351 v
->derived_from
= 0;
4352 v
->always_computable
= 1;
4353 v
->always_executed
= 1;
4355 v
->no_const_addval
= 0;
4357 old_regno
= REGNO (old_reg
);
4358 new_regno
= REGNO (dest_reg
);
4359 VARRAY_INT (set_in_loop
, old_regno
)--;
4360 VARRAY_INT (set_in_loop
, new_regno
) = 1;
4361 VARRAY_INT (n_times_set
, old_regno
)--;
4362 VARRAY_INT (n_times_set
, new_regno
) = 1;
4363 VARRAY_CHAR (may_not_optimize
, new_regno
) = 0;
4365 REG_IV_TYPE (new_regno
) = GENERAL_INDUCT
;
4366 REG_IV_INFO (new_regno
) = v
;
4368 /* If next_insn has a REG_EQUAL note that mentiones OLD_REG,
4369 it must be replaced. */
4370 note
= find_reg_note (next
->insn
, REG_EQUAL
, NULL_RTX
);
4371 if (note
&& reg_mentioned_p (old_reg
, XEXP (note
, 0)))
4372 XEXP (note
, 0) = copy_rtx (SET_SRC (single_set (next
->insn
)));
4374 /* Remove the increment from the list of biv increments,
4375 and record it as a giv. */
4378 v
->next_iv
= bl
->giv
;
4381 v
->benefit
= rtx_cost (SET_SRC (set
), SET
);
4382 bl
->total_benefit
+= v
->benefit
;
4384 /* Now replace the biv with DEST_REG in all insns between
4385 the replaced increment and the next increment, and
4386 remember the last insn that needed a replacement. */
4387 for (last_use_insn
= v
->insn
, p
= NEXT_INSN (v
->insn
);
4389 p
= next_insn_in_loop (loop
, p
))
4393 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
4395 if (reg_mentioned_p (old_reg
, PATTERN (p
)))
4398 if (! validate_replace_rtx (old_reg
, dest_reg
, p
))
4401 for (note
= REG_NOTES (p
); note
; note
= XEXP (note
, 1))
4403 if (GET_CODE (note
) == EXPR_LIST
)
4405 = replace_rtx (XEXP (note
, 0), old_reg
, dest_reg
);
4409 v
->last_use
= last_use_insn
;
4410 v
->lifetime
= INSN_LUID (last_use_insn
) - INSN_LUID (v
->insn
);
4411 /* If the lifetime is zero, it means that this register is really
4412 a dead store. So mark this as a giv that can be ignored.
4413 This will not prevent the biv from being eliminated. */
4414 if (v
->lifetime
== 0)
4417 if (loop_dump_stream
)
4418 fprintf (loop_dump_stream
,
4419 "Increment %d of biv %d converted to giv %d.\n",
4420 INSN_UID (v
->insn
), old_regno
, new_regno
);
4424 last_increment_giv
= max_reg_num () - 1;
4426 /* Search the loop for general induction variables. */
4428 /* A register is a giv if: it is only set once, it is a function of a
4429 biv and a constant (or invariant), and it is not a biv. */
4431 not_every_iteration
= 0;
4434 p
= loop_scan_start
;
4438 /* At end of a straight-in loop, we are done.
4439 At end of a loop entered at the bottom, scan the top. */
4440 if (p
== loop_scan_start
)
4448 if (p
== loop_scan_start
)
4452 /* Look for a general induction variable in a register. */
4453 if (GET_CODE (p
) == INSN
4454 && (set
= single_set (p
))
4455 && GET_CODE (SET_DEST (set
)) == REG
4456 && ! VARRAY_CHAR (may_not_optimize
, REGNO (SET_DEST (set
))))
4463 rtx last_consec_insn
;
4465 dest_reg
= SET_DEST (set
);
4466 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
4469 if (/* SET_SRC is a giv. */
4470 (general_induction_var (SET_SRC (set
), &src_reg
, &add_val
,
4471 &mult_val
, 0, &benefit
)
4472 /* Equivalent expression is a giv. */
4473 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
4474 && general_induction_var (XEXP (regnote
, 0), &src_reg
,
4475 &add_val
, &mult_val
, 0,
4477 /* Don't try to handle any regs made by loop optimization.
4478 We have nothing on them in regno_first_uid, etc. */
4479 && REGNO (dest_reg
) < max_reg_before_loop
4480 /* Don't recognize a BASIC_INDUCT_VAR here. */
4481 && dest_reg
!= src_reg
4482 /* This must be the only place where the register is set. */
4483 && (VARRAY_INT (n_times_set
, REGNO (dest_reg
)) == 1
4484 /* or all sets must be consecutive and make a giv. */
4485 || (benefit
= consec_sets_giv (benefit
, p
,
4487 &add_val
, &mult_val
,
4488 &last_consec_insn
))))
4491 = (struct induction
*) alloca (sizeof (struct induction
));
4493 /* If this is a library call, increase benefit. */
4494 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
4495 benefit
+= libcall_benefit (p
);
4497 /* Skip the consecutive insns, if there are any. */
4498 if (VARRAY_INT (n_times_set
, REGNO (dest_reg
)) != 1)
4499 p
= last_consec_insn
;
4501 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4502 DEST_REG
, not_every_iteration
, maybe_multiple
,
4503 NULL_PTR
, loop_start
, loop_end
);
4508 #ifndef DONT_REDUCE_ADDR
4509 /* Look for givs which are memory addresses. */
4510 /* This resulted in worse code on a VAX 8600. I wonder if it
4512 if (GET_CODE (p
) == INSN
)
4513 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, maybe_multiple
,
4514 loop_start
, loop_end
);
4517 /* Update the status of whether giv can derive other givs. This can
4518 change when we pass a label or an insn that updates a biv. */
4519 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4520 || GET_CODE (p
) == CODE_LABEL
)
4521 update_giv_derive (p
);
4523 /* Past CODE_LABEL, we get to insns that may be executed multiple
4524 times. The only way we can be sure that they can't is if every
4525 every jump insn between here and the end of the loop either
4526 returns, exits the loop, is a forward jump, or is a jump
4527 to the loop start. */
4529 if (GET_CODE (p
) == CODE_LABEL
)
4537 insn
= NEXT_INSN (insn
);
4538 if (insn
== loop_scan_start
)
4540 if (insn
== loop_end
)
4546 if (insn
== loop_scan_start
)
4550 if (GET_CODE (insn
) == JUMP_INSN
4551 && GET_CODE (PATTERN (insn
)) != RETURN
4552 && (! condjump_p (insn
)
4553 || (JUMP_LABEL (insn
) != 0
4554 && JUMP_LABEL (insn
) != loop_scan_start
4555 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
4556 || INSN_UID (insn
) >= max_uid_for_loop
4557 || (INSN_LUID (JUMP_LABEL (insn
))
4558 < INSN_LUID (insn
))))))
4566 /* Past a jump, we get to insns for which we can't count
4567 on whether they will be executed during each iteration. */
4568 /* This code appears twice in strength_reduce. There is also similar
4569 code in scan_loop. */
4570 if (GET_CODE (p
) == JUMP_INSN
4571 /* If we enter the loop in the middle, and scan around to the
4572 beginning, don't set not_every_iteration for that.
4573 This can be any kind of jump, since we want to know if insns
4574 will be executed if the loop is executed. */
4575 && ! (JUMP_LABEL (p
) == loop_top
4576 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
4577 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
4581 /* If this is a jump outside the loop, then it also doesn't
4582 matter. Check to see if the target of this branch is on the
4583 loop->exits_labels list. */
4585 for (label
= uid_loop
[INSN_UID (loop_start
)]->exit_labels
;
4587 label
= LABEL_NEXTREF (label
))
4588 if (XEXP (label
, 0) == JUMP_LABEL (p
))
4592 not_every_iteration
= 1;
4595 else if (GET_CODE (p
) == NOTE
)
4597 /* At the virtual top of a converted loop, insns are again known to
4598 be executed each iteration: logically, the loop begins here
4599 even though the exit code has been duplicated.
4601 Insns are also again known to be executed each iteration at
4602 the LOOP_CONT note. */
4603 if ((NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
4604 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_CONT
)
4606 not_every_iteration
= 0;
4607 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
4609 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
4613 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4614 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4615 or not an insn is known to be executed each iteration of the
4616 loop, whether or not any iterations are known to occur.
4618 Therefore, if we have just passed a label and have no more labels
4619 between here and the test insn of the loop, we know these insns
4620 will be executed each iteration. */
4622 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
4623 && no_labels_between_p (p
, loop_end
)
4624 && loop_insn_first_p (p
, loop_cont
))
4625 not_every_iteration
= 0;
4628 /* Try to calculate and save the number of loop iterations. This is
4629 set to zero if the actual number can not be calculated. This must
4630 be called after all giv's have been identified, since otherwise it may
4631 fail if the iteration variable is a giv. */
4633 loop_iterations (loop
);
4635 /* Now for each giv for which we still don't know whether or not it is
4636 replaceable, check to see if it is replaceable because its final value
4637 can be calculated. This must be done after loop_iterations is called,
4638 so that final_giv_value will work correctly. */
4640 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4642 struct induction
*v
;
4644 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4645 if (! v
->replaceable
&& ! v
->not_replaceable
)
4646 check_final_value (v
, loop_start
, loop_end
, loop_info
->n_iterations
);
4649 /* Try to prove that the loop counter variable (if any) is always
4650 nonnegative; if so, record that fact with a REG_NONNEG note
4651 so that "decrement and branch until zero" insn can be used. */
4652 check_dbra_loop (loop
, insn_count
);
4654 /* Create reg_map to hold substitutions for replaceable giv regs.
4655 Some givs might have been made from biv increments, so look at
4656 reg_iv_type for a suitable size. */
4657 reg_map_size
= reg_iv_type
->num_elements
;
4658 reg_map
= (rtx
*) xcalloc (reg_map_size
, sizeof (rtx
));
4660 /* Examine each iv class for feasibility of strength reduction/induction
4661 variable elimination. */
4663 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4665 struct induction
*v
;
4668 rtx final_value
= 0;
4671 /* Test whether it will be possible to eliminate this biv
4672 provided all givs are reduced. This is possible if either
4673 the reg is not used outside the loop, or we can compute
4674 what its final value will be.
4676 For architectures with a decrement_and_branch_until_zero insn,
4677 don't do this if we put a REG_NONNEG note on the endtest for
4680 /* Compare against bl->init_insn rather than loop_start.
4681 We aren't concerned with any uses of the biv between
4682 init_insn and loop_start since these won't be affected
4683 by the value of the biv elsewhere in the function, so
4684 long as init_insn doesn't use the biv itself.
4685 March 14, 1989 -- self@bayes.arc.nasa.gov */
4687 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
4689 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
4690 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
4691 #ifdef HAVE_decrement_and_branch_until_zero
4694 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
4695 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
,
4696 loop_info
->n_iterations
))
4697 #ifdef HAVE_decrement_and_branch_until_zero
4701 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, loop_end
, 0,
4702 threshold
, insn_count
);
4705 if (loop_dump_stream
)
4707 fprintf (loop_dump_stream
,
4708 "Cannot eliminate biv %d.\n",
4710 fprintf (loop_dump_stream
,
4711 "First use: insn %d, last use: insn %d.\n",
4712 REGNO_FIRST_UID (bl
->regno
),
4713 REGNO_LAST_UID (bl
->regno
));
4717 /* Combine all giv's for this iv_class. */
4720 /* This will be true at the end, if all givs which depend on this
4721 biv have been strength reduced.
4722 We can't (currently) eliminate the biv unless this is so. */
4725 /* Check each giv in this class to see if we will benefit by reducing
4726 it. Skip giv's combined with others. */
4727 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4729 struct induction
*tv
;
4731 if (v
->ignore
|| v
->same
)
4734 benefit
= v
->benefit
;
4736 /* Reduce benefit if not replaceable, since we will insert
4737 a move-insn to replace the insn that calculates this giv.
4738 Don't do this unless the giv is a user variable, since it
4739 will often be marked non-replaceable because of the duplication
4740 of the exit code outside the loop. In such a case, the copies
4741 we insert are dead and will be deleted. So they don't have
4742 a cost. Similar situations exist. */
4743 /* ??? The new final_[bg]iv_value code does a much better job
4744 of finding replaceable giv's, and hence this code may no longer
4746 if (! v
->replaceable
&& ! bl
->eliminable
4747 && REG_USERVAR_P (v
->dest_reg
))
4748 benefit
-= copy_cost
;
4750 /* Decrease the benefit to count the add-insns that we will
4751 insert to increment the reduced reg for the giv. */
4752 benefit
-= add_cost
* bl
->biv_count
;
4754 /* Decide whether to strength-reduce this giv or to leave the code
4755 unchanged (recompute it from the biv each time it is used).
4756 This decision can be made independently for each giv. */
4759 /* Attempt to guess whether autoincrement will handle some of the
4760 new add insns; if so, increase BENEFIT (undo the subtraction of
4761 add_cost that was done above). */
4762 if (v
->giv_type
== DEST_ADDR
4763 && GET_CODE (v
->mult_val
) == CONST_INT
)
4765 if (HAVE_POST_INCREMENT
4766 && INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4767 benefit
+= add_cost
* bl
->biv_count
;
4768 else if (HAVE_PRE_INCREMENT
4769 && INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4770 benefit
+= add_cost
* bl
->biv_count
;
4771 else if (HAVE_POST_DECREMENT
4772 && -INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4773 benefit
+= add_cost
* bl
->biv_count
;
4774 else if (HAVE_PRE_DECREMENT
4775 && -INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4776 benefit
+= add_cost
* bl
->biv_count
;
4780 /* If an insn is not to be strength reduced, then set its ignore
4781 flag, and clear all_reduced. */
4783 /* A giv that depends on a reversed biv must be reduced if it is
4784 used after the loop exit, otherwise, it would have the wrong
4785 value after the loop exit. To make it simple, just reduce all
4786 of such giv's whether or not we know they are used after the loop
4789 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
4792 if (loop_dump_stream
)
4793 fprintf (loop_dump_stream
,
4794 "giv of insn %d not worth while, %d vs %d.\n",
4796 v
->lifetime
* threshold
* benefit
, insn_count
);
4802 /* Check that we can increment the reduced giv without a
4803 multiply insn. If not, reject it. */
4805 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4806 if (tv
->mult_val
== const1_rtx
4807 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4809 if (loop_dump_stream
)
4810 fprintf (loop_dump_stream
,
4811 "giv of insn %d: would need a multiply.\n",
4812 INSN_UID (v
->insn
));
4820 /* Check for givs whose first use is their definition and whose
4821 last use is the definition of another giv. If so, it is likely
4822 dead and should not be used to derive another giv nor to
4824 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4827 || (v
->same
&& v
->same
->ignore
))
4832 struct induction
*v1
;
4834 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4835 if (v
->last_use
== v1
->insn
)
4838 else if (v
->giv_type
== DEST_REG
4839 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4841 struct induction
*v1
;
4843 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4844 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4849 /* Now that we know which givs will be reduced, try to rearrange the
4850 combinations to reduce register pressure.
4851 recombine_givs calls find_life_end, which needs reg_iv_type and
4852 reg_iv_info to be valid for all pseudos. We do the necessary
4853 reallocation here since it allows to check if there are still
4854 more bivs to process. */
4855 nregs
= max_reg_num ();
4856 if (nregs
> reg_iv_type
->num_elements
)
4858 /* If there are still more bivs to process, allocate some slack
4859 space so that we're not constantly reallocating these arrays. */
4862 /* Reallocate reg_iv_type and reg_iv_info. */
4863 VARRAY_GROW (reg_iv_type
, nregs
);
4864 VARRAY_GROW (reg_iv_info
, nregs
);
4866 recombine_givs (bl
, loop_start
, loop_end
, unroll_p
);
4868 /* Reduce each giv that we decided to reduce. */
4870 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4872 struct induction
*tv
;
4873 if (! v
->ignore
&& v
->same
== 0)
4875 int auto_inc_opt
= 0;
4877 /* If the code for derived givs immediately below has already
4878 allocated a new_reg, we must keep it. */
4880 v
->new_reg
= gen_reg_rtx (v
->mode
);
4882 if (v
->derived_from
)
4884 struct induction
*d
= v
->derived_from
;
4886 /* In case d->dest_reg is not replaceable, we have
4887 to replace it in v->insn now. */
4889 d
->new_reg
= gen_reg_rtx (d
->mode
);
4891 = replace_rtx (PATTERN (v
->insn
), d
->dest_reg
, d
->new_reg
);
4893 = replace_rtx (PATTERN (v
->insn
), v
->dest_reg
, v
->new_reg
);
4894 /* For each place where the biv is incremented, add an
4895 insn to set the new, reduced reg for the giv.
4896 We used to do this only for biv_count != 1, but
4897 this fails when there is a giv after a single biv
4898 increment, e.g. when the last giv was expressed as
4900 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4902 /* We always emit reduced giv increments before the
4903 biv increment when bl->biv_count != 1. So by
4904 emitting the add insns for derived givs after the
4905 biv increment, they pick up the updated value of
4907 If the reduced giv is processed with
4908 auto_inc_opt == 1, then it is incremented earlier
4909 than the biv, hence we'll still pick up the right
4911 If it's processed with auto_inc_opt == -1,
4912 that implies that the biv increment is before the
4913 first reduced giv's use. The derived giv's lifetime
4914 is after the reduced giv's lifetime, hence in this
4915 case, the biv increment doesn't matter. */
4916 emit_insn_after (copy_rtx (PATTERN (v
->insn
)), tv
->insn
);
4922 /* If the target has auto-increment addressing modes, and
4923 this is an address giv, then try to put the increment
4924 immediately after its use, so that flow can create an
4925 auto-increment addressing mode. */
4926 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4927 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4928 /* We don't handle reversed biv's because bl->biv->insn
4929 does not have a valid INSN_LUID. */
4931 && v
->always_executed
&& ! v
->maybe_multiple
4932 && INSN_UID (v
->insn
) < max_uid_for_loop
)
4934 /* If other giv's have been combined with this one, then
4935 this will work only if all uses of the other giv's occur
4936 before this giv's insn. This is difficult to check.
4938 We simplify this by looking for the common case where
4939 there is one DEST_REG giv, and this giv's insn is the
4940 last use of the dest_reg of that DEST_REG giv. If the
4941 increment occurs after the address giv, then we can
4942 perform the optimization. (Otherwise, the increment
4943 would have to go before other_giv, and we would not be
4944 able to combine it with the address giv to get an
4945 auto-inc address.) */
4946 if (v
->combined_with
)
4948 struct induction
*other_giv
= 0;
4950 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4958 if (! tv
&& other_giv
4959 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4960 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4961 == INSN_UID (v
->insn
))
4962 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4965 /* Check for case where increment is before the address
4966 giv. Do this test in "loop order". */
4967 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
4968 && (INSN_LUID (v
->insn
) < INSN_LUID (loop_scan_start
)
4969 || (INSN_LUID (bl
->biv
->insn
)
4970 > INSN_LUID (loop_scan_start
))))
4971 || (INSN_LUID (v
->insn
) < INSN_LUID (loop_scan_start
)
4972 && (INSN_LUID (loop_scan_start
)
4973 < INSN_LUID (bl
->biv
->insn
))))
4982 /* We can't put an insn immediately after one setting
4983 cc0, or immediately before one using cc0. */
4984 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4985 || (auto_inc_opt
== -1
4986 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4987 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4988 && sets_cc0_p (PATTERN (prev
))))
4994 v
->auto_inc_opt
= 1;
4998 /* For each place where the biv is incremented, add an insn
4999 to increment the new, reduced reg for the giv. */
5000 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
5005 insert_before
= tv
->insn
;
5006 else if (auto_inc_opt
== 1)
5007 insert_before
= NEXT_INSN (v
->insn
);
5009 insert_before
= v
->insn
;
5011 if (tv
->mult_val
== const1_rtx
)
5012 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
5013 v
->new_reg
, v
->new_reg
, insert_before
);
5014 else /* tv->mult_val == const0_rtx */
5015 /* A multiply is acceptable here
5016 since this is presumed to be seldom executed. */
5017 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
5018 v
->add_val
, v
->new_reg
, insert_before
);
5021 /* Add code at loop start to initialize giv's reduced reg. */
5023 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
5024 v
->add_val
, v
->new_reg
, loop_start
);
5028 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5031 For each giv register that can be reduced now: if replaceable,
5032 substitute reduced reg wherever the old giv occurs;
5033 else add new move insn "giv_reg = reduced_reg". */
5035 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5037 if (v
->same
&& v
->same
->ignore
)
5043 /* Update expression if this was combined, in case other giv was
5046 v
->new_reg
= replace_rtx (v
->new_reg
,
5047 v
->same
->dest_reg
, v
->same
->new_reg
);
5049 if (v
->giv_type
== DEST_ADDR
)
5050 /* Store reduced reg as the address in the memref where we found
5052 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
5053 else if (v
->replaceable
)
5055 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
5058 /* I can no longer duplicate the original problem. Perhaps
5059 this is unnecessary now? */
5061 /* Replaceable; it isn't strictly necessary to delete the old
5062 insn and emit a new one, because v->dest_reg is now dead.
5064 However, especially when unrolling loops, the special
5065 handling for (set REG0 REG1) in the second cse pass may
5066 make v->dest_reg live again. To avoid this problem, emit
5067 an insn to set the original giv reg from the reduced giv.
5068 We can not delete the original insn, since it may be part
5069 of a LIBCALL, and the code in flow that eliminates dead
5070 libcalls will fail if it is deleted. */
5071 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
5077 /* Not replaceable; emit an insn to set the original giv reg from
5078 the reduced giv, same as above. */
5079 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
5083 /* When a loop is reversed, givs which depend on the reversed
5084 biv, and which are live outside the loop, must be set to their
5085 correct final value. This insn is only needed if the giv is
5086 not replaceable. The correct final value is the same as the
5087 value that the giv starts the reversed loop with. */
5088 if (bl
->reversed
&& ! v
->replaceable
)
5089 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
5090 v
->add_val
, v
->dest_reg
, end_insert_before
);
5091 else if (v
->final_value
)
5095 /* If the loop has multiple exits, emit the insn before the
5096 loop to ensure that it will always be executed no matter
5097 how the loop exits. Otherwise, emit the insn after the loop,
5098 since this is slightly more efficient. */
5099 if (uid_loop
[INSN_UID (loop_start
)]->exit_count
)
5100 insert_before
= loop_start
;
5102 insert_before
= end_insert_before
;
5103 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
5107 /* If the insn to set the final value of the giv was emitted
5108 before the loop, then we must delete the insn inside the loop
5109 that sets it. If this is a LIBCALL, then we must delete
5110 every insn in the libcall. Note, however, that
5111 final_giv_value will only succeed when there are multiple
5112 exits if the giv is dead at each exit, hence it does not
5113 matter that the original insn remains because it is dead
5115 /* Delete the insn inside the loop that sets the giv since
5116 the giv is now set before (or after) the loop. */
5117 delete_insn (v
->insn
);
5121 if (loop_dump_stream
)
5123 fprintf (loop_dump_stream
, "giv at %d reduced to ",
5124 INSN_UID (v
->insn
));
5125 print_rtl (loop_dump_stream
, v
->new_reg
);
5126 fprintf (loop_dump_stream
, "\n");
5130 /* All the givs based on the biv bl have been reduced if they
5133 /* For each giv not marked as maybe dead that has been combined with a
5134 second giv, clear any "maybe dead" mark on that second giv.
5135 v->new_reg will either be or refer to the register of the giv it
5138 Doing this clearing avoids problems in biv elimination where a
5139 giv's new_reg is a complex value that can't be put in the insn but
5140 the giv combined with (with a reg as new_reg) is marked maybe_dead.
5141 Since the register will be used in either case, we'd prefer it be
5142 used from the simpler giv. */
5144 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5145 if (! v
->maybe_dead
&& v
->same
)
5146 v
->same
->maybe_dead
= 0;
5148 /* Try to eliminate the biv, if it is a candidate.
5149 This won't work if ! all_reduced,
5150 since the givs we planned to use might not have been reduced.
5152 We have to be careful that we didn't initially think we could eliminate
5153 this biv because of a giv that we now think may be dead and shouldn't
5154 be used as a biv replacement.
5156 Also, there is the possibility that we may have a giv that looks
5157 like it can be used to eliminate a biv, but the resulting insn
5158 isn't valid. This can happen, for example, on the 88k, where a
5159 JUMP_INSN can compare a register only with zero. Attempts to
5160 replace it with a compare with a constant will fail.
5162 Note that in cases where this call fails, we may have replaced some
5163 of the occurrences of the biv with a giv, but no harm was done in
5164 doing so in the rare cases where it can occur. */
5166 if (all_reduced
== 1 && bl
->eliminable
5167 && maybe_eliminate_biv (bl
, loop_start
, loop_end
, 1,
5168 threshold
, insn_count
))
5171 /* ?? If we created a new test to bypass the loop entirely,
5172 or otherwise drop straight in, based on this test, then
5173 we might want to rewrite it also. This way some later
5174 pass has more hope of removing the initialization of this
5177 /* If final_value != 0, then the biv may be used after loop end
5178 and we must emit an insn to set it just in case.
5180 Reversed bivs already have an insn after the loop setting their
5181 value, so we don't need another one. We can't calculate the
5182 proper final value for such a biv here anyways. */
5183 if (final_value
!= 0 && ! bl
->reversed
)
5187 /* If the loop has multiple exits, emit the insn before the
5188 loop to ensure that it will always be executed no matter
5189 how the loop exits. Otherwise, emit the insn after the
5190 loop, since this is slightly more efficient. */
5191 if (uid_loop
[INSN_UID (loop_start
)]->exit_count
)
5192 insert_before
= loop_start
;
5194 insert_before
= end_insert_before
;
5196 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
5201 /* Delete all of the instructions inside the loop which set
5202 the biv, as they are all dead. If is safe to delete them,
5203 because an insn setting a biv will never be part of a libcall. */
5204 /* However, deleting them will invalidate the regno_last_uid info,
5205 so keeping them around is more convenient. Final_biv_value
5206 will only succeed when there are multiple exits if the biv
5207 is dead at each exit, hence it does not matter that the original
5208 insn remains, because it is dead anyways. */
5209 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
5210 delete_insn (v
->insn
);
5213 if (loop_dump_stream
)
5214 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
5219 /* Go through all the instructions in the loop, making all the
5220 register substitutions scheduled in REG_MAP. */
5222 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
5223 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5224 || GET_CODE (p
) == CALL_INSN
)
5226 replace_regs (PATTERN (p
), reg_map
, reg_map_size
, 0);
5227 replace_regs (REG_NOTES (p
), reg_map
, reg_map_size
, 0);
5231 if (loop_info
->n_iterations
> 0)
5233 /* When we completely unroll a loop we will likely not need the increment
5234 of the loop BIV and we will not need the conditional branch at the
5236 unrolled_insn_copies
= insn_count
- 2;
5239 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5240 need the comparison before the conditional branch at the end of the
5242 unrolled_insn_copies
-= 1;
5245 /* We'll need one copy for each loop iteration. */
5246 unrolled_insn_copies
*= loop_info
->n_iterations
;
5248 /* A little slop to account for the ability to remove initialization
5249 code, better CSE, and other secondary benefits of completely
5250 unrolling some loops. */
5251 unrolled_insn_copies
-= 1;
5253 /* Clamp the value. */
5254 if (unrolled_insn_copies
< 0)
5255 unrolled_insn_copies
= 0;
5258 /* Unroll loops from within strength reduction so that we can use the
5259 induction variable information that strength_reduce has already
5260 collected. Always unroll loops that would be as small or smaller
5261 unrolled than when rolled. */
5263 || (loop_info
->n_iterations
> 0
5264 && unrolled_insn_copies
<= insn_count
))
5265 unroll_loop (loop
, insn_count
, end_insert_before
, 1);
5267 #ifdef HAVE_decrement_and_branch_on_count
5268 /* Instrument the loop with BCT insn. */
5269 if (HAVE_decrement_and_branch_on_count
&& bct_p
5270 && flag_branch_on_count_reg
)
5272 #endif /* HAVE_decrement_and_branch_on_count */
5274 if (loop_dump_stream
)
5275 fprintf (loop_dump_stream
, "\n");
5278 VARRAY_FREE (reg_iv_type
);
5279 VARRAY_FREE (reg_iv_info
);
5280 free (reg_biv_class
);
5285 /* Return 1 if X is a valid source for an initial value (or as value being
5286 compared against in an initial test).
5288 X must be either a register or constant and must not be clobbered between
5289 the current insn and the start of the loop.
5291 INSN is the insn containing X. */
5294 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
5303 /* Only consider pseudos we know about initialized in insns whose luids
5305 if (GET_CODE (x
) != REG
5306 || REGNO (x
) >= max_reg_before_loop
)
5309 /* Don't use call-clobbered registers across a call which clobbers it. On
5310 some machines, don't use any hard registers at all. */
5311 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
5312 && (SMALL_REGISTER_CLASSES
5313 || (call_used_regs
[REGNO (x
)] && call_seen
)))
5316 /* Don't use registers that have been clobbered before the start of the
5318 if (reg_set_between_p (x
, insn
, loop_start
))
5324 /* Scan X for memory refs and check each memory address
5325 as a possible giv. INSN is the insn whose pattern X comes from.
5326 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5327 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5328 more thanonce in each loop iteration. */
5331 find_mem_givs (x
, insn
, not_every_iteration
, maybe_multiple
, loop_start
,
5335 int not_every_iteration
, maybe_multiple
;
5336 rtx loop_start
, loop_end
;
5339 register enum rtx_code code
;
5340 register const char *fmt
;
5345 code
= GET_CODE (x
);
5369 /* This code used to disable creating GIVs with mult_val == 1 and
5370 add_val == 0. However, this leads to lost optimizations when
5371 it comes time to combine a set of related DEST_ADDR GIVs, since
5372 this one would not be seen. */
5374 if (general_induction_var (XEXP (x
, 0), &src_reg
, &add_val
,
5375 &mult_val
, 1, &benefit
))
5377 /* Found one; record it. */
5379 = (struct induction
*) oballoc (sizeof (struct induction
));
5381 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
5382 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
5383 maybe_multiple
, &XEXP (x
, 0), loop_start
, loop_end
);
5385 v
->mem_mode
= GET_MODE (x
);
5394 /* Recursively scan the subexpressions for other mem refs. */
5396 fmt
= GET_RTX_FORMAT (code
);
5397 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5399 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, maybe_multiple
,
5400 loop_start
, loop_end
);
5401 else if (fmt
[i
] == 'E')
5402 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
5403 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
5404 maybe_multiple
, loop_start
, loop_end
);
5407 /* Fill in the data about one biv update.
5408 V is the `struct induction' in which we record the biv. (It is
5409 allocated by the caller, with alloca.)
5410 INSN is the insn that sets it.
5411 DEST_REG is the biv's reg.
5413 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5414 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5415 being set to INC_VAL.
5417 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5418 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5419 can be executed more than once per iteration. If MAYBE_MULTIPLE
5420 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5421 executed exactly once per iteration. */
5424 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
, location
,
5425 not_every_iteration
, maybe_multiple
, multi_insn_incr
)
5426 struct induction
*v
;
5432 int not_every_iteration
;
5434 int multi_insn_incr
;
5436 struct iv_class
*bl
;
5439 v
->src_reg
= dest_reg
;
5440 v
->dest_reg
= dest_reg
;
5441 v
->mult_val
= mult_val
;
5442 v
->add_val
= inc_val
;
5443 v
->location
= location
;
5444 v
->mode
= GET_MODE (dest_reg
);
5445 v
->always_computable
= ! not_every_iteration
;
5446 v
->always_executed
= ! not_every_iteration
;
5447 v
->maybe_multiple
= maybe_multiple
;
5448 v
->multi_insn_incr
= multi_insn_incr
;
5450 /* Add this to the reg's iv_class, creating a class
5451 if this is the first incrementation of the reg. */
5453 bl
= reg_biv_class
[REGNO (dest_reg
)];
5456 /* Create and initialize new iv_class. */
5458 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
5460 bl
->regno
= REGNO (dest_reg
);
5466 /* Set initial value to the reg itself. */
5467 bl
->initial_value
= dest_reg
;
5468 /* We haven't seen the initializing insn yet */
5471 bl
->initial_test
= 0;
5472 bl
->incremented
= 0;
5476 bl
->total_benefit
= 0;
5478 /* Add this class to loop_iv_list. */
5479 bl
->next
= loop_iv_list
;
5482 /* Put it in the array of biv register classes. */
5483 reg_biv_class
[REGNO (dest_reg
)] = bl
;
5486 /* Update IV_CLASS entry for this biv. */
5487 v
->next_iv
= bl
->biv
;
5490 if (mult_val
== const1_rtx
)
5491 bl
->incremented
= 1;
5493 if (loop_dump_stream
)
5495 fprintf (loop_dump_stream
,
5496 "Insn %d: possible biv, reg %d,",
5497 INSN_UID (insn
), REGNO (dest_reg
));
5498 if (GET_CODE (inc_val
) == CONST_INT
)
5500 fprintf (loop_dump_stream
, " const =");
5501 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (inc_val
));
5502 fputc ('\n', loop_dump_stream
);
5506 fprintf (loop_dump_stream
, " const = ");
5507 print_rtl (loop_dump_stream
, inc_val
);
5508 fprintf (loop_dump_stream
, "\n");
5513 /* Fill in the data about one giv.
5514 V is the `struct induction' in which we record the giv. (It is
5515 allocated by the caller, with alloca.)
5516 INSN is the insn that sets it.
5517 BENEFIT estimates the savings from deleting this insn.
5518 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5519 into a register or is used as a memory address.
5521 SRC_REG is the biv reg which the giv is computed from.
5522 DEST_REG is the giv's reg (if the giv is stored in a reg).
5523 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5524 LOCATION points to the place where this giv's value appears in INSN. */
5527 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
5528 type
, not_every_iteration
, maybe_multiple
, location
, loop_start
,
5530 struct induction
*v
;
5534 rtx mult_val
, add_val
;
5537 int not_every_iteration
, maybe_multiple
;
5539 rtx loop_start
, loop_end
;
5541 struct induction
*b
;
5542 struct iv_class
*bl
;
5543 rtx set
= single_set (insn
);
5546 v
->src_reg
= src_reg
;
5548 v
->dest_reg
= dest_reg
;
5549 v
->mult_val
= mult_val
;
5550 v
->add_val
= add_val
;
5551 v
->benefit
= benefit
;
5552 v
->location
= location
;
5554 v
->combined_with
= 0;
5555 v
->maybe_multiple
= maybe_multiple
;
5556 v
->multi_insn_incr
= 0;
5558 v
->derive_adjustment
= 0;
5564 v
->auto_inc_opt
= 0;
5567 v
->derived_from
= 0;
5570 /* The v->always_computable field is used in update_giv_derive, to
5571 determine whether a giv can be used to derive another giv. For a
5572 DEST_REG giv, INSN computes a new value for the giv, so its value
5573 isn't computable if INSN insn't executed every iteration.
5574 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5575 it does not compute a new value. Hence the value is always computable
5576 regardless of whether INSN is executed each iteration. */
5578 if (type
== DEST_ADDR
)
5579 v
->always_computable
= 1;
5581 v
->always_computable
= ! not_every_iteration
;
5583 v
->always_executed
= ! not_every_iteration
;
5585 if (type
== DEST_ADDR
)
5587 v
->mode
= GET_MODE (*location
);
5590 else /* type == DEST_REG */
5592 v
->mode
= GET_MODE (SET_DEST (set
));
5594 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
5595 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
5597 /* If the lifetime is zero, it means that this register is
5598 really a dead store. So mark this as a giv that can be
5599 ignored. This will not prevent the biv from being eliminated. */
5600 if (v
->lifetime
== 0)
5603 REG_IV_TYPE (REGNO (dest_reg
)) = GENERAL_INDUCT
;
5604 REG_IV_INFO (REGNO (dest_reg
)) = v
;
5607 /* Add the giv to the class of givs computed from one biv. */
5609 bl
= reg_biv_class
[REGNO (src_reg
)];
5612 v
->next_iv
= bl
->giv
;
5614 /* Don't count DEST_ADDR. This is supposed to count the number of
5615 insns that calculate givs. */
5616 if (type
== DEST_REG
)
5618 bl
->total_benefit
+= benefit
;
5621 /* Fatal error, biv missing for this giv? */
5624 if (type
== DEST_ADDR
)
5628 /* The giv can be replaced outright by the reduced register only if all
5629 of the following conditions are true:
5630 - the insn that sets the giv is always executed on any iteration
5631 on which the giv is used at all
5632 (there are two ways to deduce this:
5633 either the insn is executed on every iteration,
5634 or all uses follow that insn in the same basic block),
5635 - the giv is not used outside the loop
5636 - no assignments to the biv occur during the giv's lifetime. */
5638 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
5639 /* Previous line always fails if INSN was moved by loop opt. */
5640 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
5641 && (! not_every_iteration
5642 || last_use_this_basic_block (dest_reg
, insn
)))
5644 /* Now check that there are no assignments to the biv within the
5645 giv's lifetime. This requires two separate checks. */
5647 /* Check each biv update, and fail if any are between the first
5648 and last use of the giv.
5650 If this loop contains an inner loop that was unrolled, then
5651 the insn modifying the biv may have been emitted by the loop
5652 unrolling code, and hence does not have a valid luid. Just
5653 mark the biv as not replaceable in this case. It is not very
5654 useful as a biv, because it is used in two different loops.
5655 It is very unlikely that we would be able to optimize the giv
5656 using this biv anyways. */
5659 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5661 if (INSN_UID (b
->insn
) >= max_uid_for_loop
5662 || ((uid_luid
[INSN_UID (b
->insn
)]
5663 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
5664 && (uid_luid
[INSN_UID (b
->insn
)]
5665 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
5668 v
->not_replaceable
= 1;
5673 /* If there are any backwards branches that go from after the
5674 biv update to before it, then this giv is not replaceable. */
5676 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5677 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
5680 v
->not_replaceable
= 1;
5686 /* May still be replaceable, we don't have enough info here to
5689 v
->not_replaceable
= 0;
5693 /* Record whether the add_val contains a const_int, for later use by
5698 v
->no_const_addval
= 1;
5699 if (tem
== const0_rtx
)
5701 else if (GET_CODE (tem
) == CONST_INT
)
5702 v
->no_const_addval
= 0;
5703 else if (GET_CODE (tem
) == PLUS
)
5707 if (GET_CODE (XEXP (tem
, 0)) == PLUS
)
5708 tem
= XEXP (tem
, 0);
5709 else if (GET_CODE (XEXP (tem
, 1)) == PLUS
)
5710 tem
= XEXP (tem
, 1);
5714 if (GET_CODE (XEXP (tem
, 1)) == CONST_INT
)
5715 v
->no_const_addval
= 0;
5719 if (loop_dump_stream
)
5721 if (type
== DEST_REG
)
5722 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
5723 INSN_UID (insn
), REGNO (dest_reg
));
5725 fprintf (loop_dump_stream
, "Insn %d: dest address",
5728 fprintf (loop_dump_stream
, " src reg %d benefit %d",
5729 REGNO (src_reg
), v
->benefit
);
5730 fprintf (loop_dump_stream
, " lifetime %d",
5734 fprintf (loop_dump_stream
, " replaceable");
5736 if (v
->no_const_addval
)
5737 fprintf (loop_dump_stream
, " ncav");
5739 if (GET_CODE (mult_val
) == CONST_INT
)
5741 fprintf (loop_dump_stream
, " mult ");
5742 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (mult_val
));
5746 fprintf (loop_dump_stream
, " mult ");
5747 print_rtl (loop_dump_stream
, mult_val
);
5750 if (GET_CODE (add_val
) == CONST_INT
)
5752 fprintf (loop_dump_stream
, " add ");
5753 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (add_val
));
5757 fprintf (loop_dump_stream
, " add ");
5758 print_rtl (loop_dump_stream
, add_val
);
5762 if (loop_dump_stream
)
5763 fprintf (loop_dump_stream
, "\n");
5768 /* All this does is determine whether a giv can be made replaceable because
5769 its final value can be calculated. This code can not be part of record_giv
5770 above, because final_giv_value requires that the number of loop iterations
5771 be known, and that can not be accurately calculated until after all givs
5772 have been identified. */
5775 check_final_value (v
, loop_start
, loop_end
, n_iterations
)
5776 struct induction
*v
;
5777 rtx loop_start
, loop_end
;
5778 unsigned HOST_WIDE_INT n_iterations
;
5780 struct iv_class
*bl
;
5781 rtx final_value
= 0;
5783 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
5785 /* DEST_ADDR givs will never reach here, because they are always marked
5786 replaceable above in record_giv. */
5788 /* The giv can be replaced outright by the reduced register only if all
5789 of the following conditions are true:
5790 - the insn that sets the giv is always executed on any iteration
5791 on which the giv is used at all
5792 (there are two ways to deduce this:
5793 either the insn is executed on every iteration,
5794 or all uses follow that insn in the same basic block),
5795 - its final value can be calculated (this condition is different
5796 than the one above in record_giv)
5797 - no assignments to the biv occur during the giv's lifetime. */
5800 /* This is only called now when replaceable is known to be false. */
5801 /* Clear replaceable, so that it won't confuse final_giv_value. */
5805 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
, n_iterations
))
5806 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
5808 int biv_increment_seen
= 0;
5814 /* When trying to determine whether or not a biv increment occurs
5815 during the lifetime of the giv, we can ignore uses of the variable
5816 outside the loop because final_value is true. Hence we can not
5817 use regno_last_uid and regno_first_uid as above in record_giv. */
5819 /* Search the loop to determine whether any assignments to the
5820 biv occur during the giv's lifetime. Start with the insn
5821 that sets the giv, and search around the loop until we come
5822 back to that insn again.
5824 Also fail if there is a jump within the giv's lifetime that jumps
5825 to somewhere outside the lifetime but still within the loop. This
5826 catches spaghetti code where the execution order is not linear, and
5827 hence the above test fails. Here we assume that the giv lifetime
5828 does not extend from one iteration of the loop to the next, so as
5829 to make the test easier. Since the lifetime isn't known yet,
5830 this requires two loops. See also record_giv above. */
5832 last_giv_use
= v
->insn
;
5838 p
= NEXT_INSN (loop_start
);
5842 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5843 || GET_CODE (p
) == CALL_INSN
)
5845 if (biv_increment_seen
)
5847 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5850 v
->not_replaceable
= 1;
5854 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
5855 biv_increment_seen
= 1;
5856 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5861 /* Now that the lifetime of the giv is known, check for branches
5862 from within the lifetime to outside the lifetime if it is still
5872 p
= NEXT_INSN (loop_start
);
5873 if (p
== last_giv_use
)
5876 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
5877 && LABEL_NAME (JUMP_LABEL (p
))
5878 && ((loop_insn_first_p (JUMP_LABEL (p
), v
->insn
)
5879 && loop_insn_first_p (loop_start
, JUMP_LABEL (p
)))
5880 || (loop_insn_first_p (last_giv_use
, JUMP_LABEL (p
))
5881 && loop_insn_first_p (JUMP_LABEL (p
), loop_end
))))
5884 v
->not_replaceable
= 1;
5886 if (loop_dump_stream
)
5887 fprintf (loop_dump_stream
,
5888 "Found branch outside giv lifetime.\n");
5895 /* If it is replaceable, then save the final value. */
5897 v
->final_value
= final_value
;
5900 if (loop_dump_stream
&& v
->replaceable
)
5901 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
5902 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
5905 /* Update the status of whether a giv can derive other givs.
5907 We need to do something special if there is or may be an update to the biv
5908 between the time the giv is defined and the time it is used to derive
5911 In addition, a giv that is only conditionally set is not allowed to
5912 derive another giv once a label has been passed.
5914 The cases we look at are when a label or an update to a biv is passed. */
5917 update_giv_derive (p
)
5920 struct iv_class
*bl
;
5921 struct induction
*biv
, *giv
;
5925 /* Search all IV classes, then all bivs, and finally all givs.
5927 There are three cases we are concerned with. First we have the situation
5928 of a giv that is only updated conditionally. In that case, it may not
5929 derive any givs after a label is passed.
5931 The second case is when a biv update occurs, or may occur, after the
5932 definition of a giv. For certain biv updates (see below) that are
5933 known to occur between the giv definition and use, we can adjust the
5934 giv definition. For others, or when the biv update is conditional,
5935 we must prevent the giv from deriving any other givs. There are two
5936 sub-cases within this case.
5938 If this is a label, we are concerned with any biv update that is done
5939 conditionally, since it may be done after the giv is defined followed by
5940 a branch here (actually, we need to pass both a jump and a label, but
5941 this extra tracking doesn't seem worth it).
5943 If this is a jump, we are concerned about any biv update that may be
5944 executed multiple times. We are actually only concerned about
5945 backward jumps, but it is probably not worth performing the test
5946 on the jump again here.
5948 If this is a biv update, we must adjust the giv status to show that a
5949 subsequent biv update was performed. If this adjustment cannot be done,
5950 the giv cannot derive further givs. */
5952 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5953 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5954 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5957 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5959 /* If cant_derive is already true, there is no point in
5960 checking all of these conditions again. */
5961 if (giv
->cant_derive
)
5964 /* If this giv is conditionally set and we have passed a label,
5965 it cannot derive anything. */
5966 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5967 giv
->cant_derive
= 1;
5969 /* Skip givs that have mult_val == 0, since
5970 they are really invariants. Also skip those that are
5971 replaceable, since we know their lifetime doesn't contain
5973 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5976 /* The only way we can allow this giv to derive another
5977 is if this is a biv increment and we can form the product
5978 of biv->add_val and giv->mult_val. In this case, we will
5979 be able to compute a compensation. */
5980 else if (biv
->insn
== p
)
5984 if (biv
->mult_val
== const1_rtx
)
5985 tem
= simplify_giv_expr (gen_rtx_MULT (giv
->mode
,
5990 if (tem
&& giv
->derive_adjustment
)
5991 tem
= simplify_giv_expr
5992 (gen_rtx_PLUS (giv
->mode
, tem
, giv
->derive_adjustment
),
5996 giv
->derive_adjustment
= tem
;
5998 giv
->cant_derive
= 1;
6000 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
6001 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
6002 giv
->cant_derive
= 1;
6007 /* Check whether an insn is an increment legitimate for a basic induction var.
6008 X is the source of insn P, or a part of it.
6009 MODE is the mode in which X should be interpreted.
6011 DEST_REG is the putative biv, also the destination of the insn.
6012 We accept patterns of these forms:
6013 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6014 REG = INVARIANT + REG
6016 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6017 store the additive term into *INC_VAL, and store the place where
6018 we found the additive term into *LOCATION.
6020 If X is an assignment of an invariant into DEST_REG, we set
6021 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6023 We also want to detect a BIV when it corresponds to a variable
6024 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6025 of the variable may be a PLUS that adds a SUBREG of that variable to
6026 an invariant and then sign- or zero-extends the result of the PLUS
6029 Most GIVs in such cases will be in the promoted mode, since that is the
6030 probably the natural computation mode (and almost certainly the mode
6031 used for addresses) on the machine. So we view the pseudo-reg containing
6032 the variable as the BIV, as if it were simply incremented.
6034 Note that treating the entire pseudo as a BIV will result in making
6035 simple increments to any GIVs based on it. However, if the variable
6036 overflows in its declared mode but not its promoted mode, the result will
6037 be incorrect. This is acceptable if the variable is signed, since
6038 overflows in such cases are undefined, but not if it is unsigned, since
6039 those overflows are defined. So we only check for SIGN_EXTEND and
6042 If we cannot find a biv, we return 0. */
6045 basic_induction_var (x
, mode
, dest_reg
, p
, level
, inc_val
, mult_val
,
6046 location
, multi_insn_incr
)
6048 enum machine_mode mode
;
6055 int *multi_insn_incr
;
6057 register enum rtx_code code
;
6061 code
= GET_CODE (x
);
6066 if (rtx_equal_p (XEXP (x
, 0), dest_reg
)
6067 || (GET_CODE (XEXP (x
, 0)) == SUBREG
6068 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
6069 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
6071 argp
= &XEXP (x
, 1);
6073 else if (rtx_equal_p (XEXP (x
, 1), dest_reg
)
6074 || (GET_CODE (XEXP (x
, 1)) == SUBREG
6075 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
6076 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
6078 argp
= &XEXP (x
, 0);
6084 if (invariant_p (arg
) != 1)
6087 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
6088 *mult_val
= const1_rtx
;
6093 /* If this is a SUBREG for a promoted variable, check the inner
6095 if (SUBREG_PROMOTED_VAR_P (x
))
6096 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
6098 inc_val
, mult_val
, location
,
6103 /* If this register is assigned in a previous insn, look at its
6104 source, but don't go outside the loop or past a label. */
6110 insn
= PREV_INSN (insn
);
6111 } while (insn
&& GET_CODE (insn
) == NOTE
6112 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
6116 set
= single_set (insn
);
6120 if ((SET_DEST (set
) == x
6121 || (GET_CODE (SET_DEST (set
)) == SUBREG
6122 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
6124 && (GET_MODE_CLASS (GET_MODE (SET_DEST (set
)))
6126 && SUBREG_REG (SET_DEST (set
)) == x
))
6127 && basic_induction_var (SET_SRC (set
),
6128 (GET_MODE (SET_SRC (set
)) == VOIDmode
6130 : GET_MODE (SET_SRC (set
))),
6131 dest_reg
, insn
, level
,
6132 inc_val
, mult_val
, location
,
6135 *multi_insn_incr
= 1;
6139 /* ... fall through ... */
6141 /* Can accept constant setting of biv only when inside inner most loop.
6142 Otherwise, a biv of an inner loop may be incorrectly recognized
6143 as a biv of the outer loop,
6144 causing code to be moved INTO the inner loop. */
6146 if (invariant_p (x
) != 1)
6151 /* convert_modes aborts if we try to convert to or from CCmode, so just
6152 exclude that case. It is very unlikely that a condition code value
6153 would be a useful iterator anyways. */
6155 && GET_MODE_CLASS (mode
) != MODE_CC
6156 && GET_MODE_CLASS (GET_MODE (dest_reg
)) != MODE_CC
)
6158 /* Possible bug here? Perhaps we don't know the mode of X. */
6159 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
6160 *mult_val
= const0_rtx
;
6167 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
6168 dest_reg
, p
, level
, inc_val
, mult_val
,
6169 location
, multi_insn_incr
);
6172 /* Similar, since this can be a sign extension. */
6173 for (insn
= PREV_INSN (p
);
6174 (insn
&& GET_CODE (insn
) == NOTE
6175 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
6176 insn
= PREV_INSN (insn
))
6180 set
= single_set (insn
);
6182 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
6183 && GET_CODE (XEXP (x
, 1)) == CONST_INT
6184 && INTVAL (XEXP (x
, 1)) >= 0
6185 && GET_CODE (SET_SRC (set
)) == ASHIFT
6186 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1)
6187 && basic_induction_var (XEXP (SET_SRC (set
), 0),
6188 GET_MODE (XEXP (x
, 0)),
6189 dest_reg
, insn
, level
, inc_val
, mult_val
,
6190 location
, multi_insn_incr
))
6192 *multi_insn_incr
= 1;
6202 /* A general induction variable (giv) is any quantity that is a linear
6203 function of a basic induction variable,
6204 i.e. giv = biv * mult_val + add_val.
6205 The coefficients can be any loop invariant quantity.
6206 A giv need not be computed directly from the biv;
6207 it can be computed by way of other givs. */
6209 /* Determine whether X computes a giv.
6210 If it does, return a nonzero value
6211 which is the benefit from eliminating the computation of X;
6212 set *SRC_REG to the register of the biv that it is computed from;
6213 set *ADD_VAL and *MULT_VAL to the coefficients,
6214 such that the value of X is biv * mult + add; */
6217 general_induction_var (x
, src_reg
, add_val
, mult_val
, is_addr
, pbenefit
)
6228 /* If this is an invariant, forget it, it isn't a giv. */
6229 if (invariant_p (x
) == 1)
6232 /* See if the expression could be a giv and get its form.
6233 Mark our place on the obstack in case we don't find a giv. */
6234 storage
= (char *) oballoc (0);
6236 x
= simplify_giv_expr (x
, pbenefit
);
6243 switch (GET_CODE (x
))
6247 /* Since this is now an invariant and wasn't before, it must be a giv
6248 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6250 *src_reg
= loop_iv_list
->biv
->dest_reg
;
6251 *mult_val
= const0_rtx
;
6256 /* This is equivalent to a BIV. */
6258 *mult_val
= const1_rtx
;
6259 *add_val
= const0_rtx
;
6263 /* Either (plus (biv) (invar)) or
6264 (plus (mult (biv) (invar_1)) (invar_2)). */
6265 if (GET_CODE (XEXP (x
, 0)) == MULT
)
6267 *src_reg
= XEXP (XEXP (x
, 0), 0);
6268 *mult_val
= XEXP (XEXP (x
, 0), 1);
6272 *src_reg
= XEXP (x
, 0);
6273 *mult_val
= const1_rtx
;
6275 *add_val
= XEXP (x
, 1);
6279 /* ADD_VAL is zero. */
6280 *src_reg
= XEXP (x
, 0);
6281 *mult_val
= XEXP (x
, 1);
6282 *add_val
= const0_rtx
;
6289 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6290 unless they are CONST_INT). */
6291 if (GET_CODE (*add_val
) == USE
)
6292 *add_val
= XEXP (*add_val
, 0);
6293 if (GET_CODE (*mult_val
) == USE
)
6294 *mult_val
= XEXP (*mult_val
, 0);
6299 *pbenefit
+= ADDRESS_COST (orig_x
) - reg_address_cost
;
6301 *pbenefit
+= rtx_cost (orig_x
, MEM
) - reg_address_cost
;
6305 *pbenefit
+= rtx_cost (orig_x
, SET
);
6307 /* Always return true if this is a giv so it will be detected as such,
6308 even if the benefit is zero or negative. This allows elimination
6309 of bivs that might otherwise not be eliminated. */
6313 /* Given an expression, X, try to form it as a linear function of a biv.
6314 We will canonicalize it to be of the form
6315 (plus (mult (BIV) (invar_1))
6317 with possible degeneracies.
6319 The invariant expressions must each be of a form that can be used as a
6320 machine operand. We surround then with a USE rtx (a hack, but localized
6321 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6322 routine; it is the caller's responsibility to strip them.
6324 If no such canonicalization is possible (i.e., two biv's are used or an
6325 expression that is neither invariant nor a biv or giv), this routine
6328 For a non-zero return, the result will have a code of CONST_INT, USE,
6329 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6331 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6333 static rtx sge_plus
PARAMS ((enum machine_mode
, rtx
, rtx
));
6334 static rtx sge_plus_constant
PARAMS ((rtx
, rtx
));
6335 static int cmp_combine_givs_stats
PARAMS ((const PTR
, const PTR
));
6336 static int cmp_recombine_givs_stats
PARAMS ((const PTR
, const PTR
));
6339 simplify_giv_expr (x
, benefit
)
6343 enum machine_mode mode
= GET_MODE (x
);
6347 /* If this is not an integer mode, or if we cannot do arithmetic in this
6348 mode, this can't be a giv. */
6349 if (mode
!= VOIDmode
6350 && (GET_MODE_CLASS (mode
) != MODE_INT
6351 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
6354 switch (GET_CODE (x
))
6357 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
6358 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
6359 if (arg0
== 0 || arg1
== 0)
6362 /* Put constant last, CONST_INT last if both constant. */
6363 if ((GET_CODE (arg0
) == USE
6364 || GET_CODE (arg0
) == CONST_INT
)
6365 && ! ((GET_CODE (arg0
) == USE
6366 && GET_CODE (arg1
) == USE
)
6367 || GET_CODE (arg1
) == CONST_INT
))
6368 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6370 /* Handle addition of zero, then addition of an invariant. */
6371 if (arg1
== const0_rtx
)
6373 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
6374 switch (GET_CODE (arg0
))
6378 /* Adding two invariants must result in an invariant, so enclose
6379 addition operation inside a USE and return it. */
6380 if (GET_CODE (arg0
) == USE
)
6381 arg0
= XEXP (arg0
, 0);
6382 if (GET_CODE (arg1
) == USE
)
6383 arg1
= XEXP (arg1
, 0);
6385 if (GET_CODE (arg0
) == CONST_INT
)
6386 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6387 if (GET_CODE (arg1
) == CONST_INT
)
6388 tem
= sge_plus_constant (arg0
, arg1
);
6390 tem
= sge_plus (mode
, arg0
, arg1
);
6392 if (GET_CODE (tem
) != CONST_INT
)
6393 tem
= gen_rtx_USE (mode
, tem
);
6398 /* biv + invar or mult + invar. Return sum. */
6399 return gen_rtx_PLUS (mode
, arg0
, arg1
);
6402 /* (a + invar_1) + invar_2. Associate. */
6404 simplify_giv_expr (gen_rtx_PLUS (mode
,
6415 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6416 MULT to reduce cases. */
6417 if (GET_CODE (arg0
) == REG
)
6418 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
6419 if (GET_CODE (arg1
) == REG
)
6420 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
6422 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6423 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6424 Recurse to associate the second PLUS. */
6425 if (GET_CODE (arg1
) == MULT
)
6426 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6428 if (GET_CODE (arg1
) == PLUS
)
6430 simplify_giv_expr (gen_rtx_PLUS (mode
,
6431 gen_rtx_PLUS (mode
, arg0
,
6436 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6437 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
6440 if (!rtx_equal_p (arg0
, arg1
))
6443 return simplify_giv_expr (gen_rtx_MULT (mode
,
6451 /* Handle "a - b" as "a + b * (-1)". */
6452 return simplify_giv_expr (gen_rtx_PLUS (mode
,
6460 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
6461 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
6462 if (arg0
== 0 || arg1
== 0)
6465 /* Put constant last, CONST_INT last if both constant. */
6466 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
6467 && GET_CODE (arg1
) != CONST_INT
)
6468 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6470 /* If second argument is not now constant, not giv. */
6471 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
6474 /* Handle multiply by 0 or 1. */
6475 if (arg1
== const0_rtx
)
6478 else if (arg1
== const1_rtx
)
6481 switch (GET_CODE (arg0
))
6484 /* biv * invar. Done. */
6485 return gen_rtx_MULT (mode
, arg0
, arg1
);
6488 /* Product of two constants. */
6489 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
6492 /* invar * invar. It is a giv, but very few of these will
6493 actually pay off, so limit to simple registers. */
6494 if (GET_CODE (arg1
) != CONST_INT
)
6497 arg0
= XEXP (arg0
, 0);
6498 if (GET_CODE (arg0
) == REG
)
6499 tem
= gen_rtx_MULT (mode
, arg0
, arg1
);
6500 else if (GET_CODE (arg0
) == MULT
6501 && GET_CODE (XEXP (arg0
, 0)) == REG
6502 && GET_CODE (XEXP (arg0
, 1)) == CONST_INT
)
6504 tem
= gen_rtx_MULT (mode
, XEXP (arg0
, 0),
6505 GEN_INT (INTVAL (XEXP (arg0
, 1))
6510 return gen_rtx_USE (mode
, tem
);
6513 /* (a * invar_1) * invar_2. Associate. */
6514 return simplify_giv_expr (gen_rtx_MULT (mode
,
6522 /* (a + invar_1) * invar_2. Distribute. */
6523 return simplify_giv_expr (gen_rtx_PLUS (mode
,
6537 /* Shift by constant is multiply by power of two. */
6538 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
6542 simplify_giv_expr (gen_rtx_MULT (mode
,
6544 GEN_INT ((HOST_WIDE_INT
) 1
6545 << INTVAL (XEXP (x
, 1)))),
6549 /* "-a" is "a * (-1)" */
6550 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
6554 /* "~a" is "-a - 1". Silly, but easy. */
6555 return simplify_giv_expr (gen_rtx_MINUS (mode
,
6556 gen_rtx_NEG (mode
, XEXP (x
, 0)),
6561 /* Already in proper form for invariant. */
6565 /* If this is a new register, we can't deal with it. */
6566 if (REGNO (x
) >= max_reg_before_loop
)
6569 /* Check for biv or giv. */
6570 switch (REG_IV_TYPE (REGNO (x
)))
6574 case GENERAL_INDUCT
:
6576 struct induction
*v
= REG_IV_INFO (REGNO (x
));
6578 /* Form expression from giv and add benefit. Ensure this giv
6579 can derive another and subtract any needed adjustment if so. */
6580 *benefit
+= v
->benefit
;
6584 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
,
6585 v
->src_reg
, v
->mult_val
),
6588 if (v
->derive_adjustment
)
6589 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
6590 return simplify_giv_expr (tem
, benefit
);
6594 /* If it isn't an induction variable, and it is invariant, we
6595 may be able to simplify things further by looking through
6596 the bits we just moved outside the loop. */
6597 if (invariant_p (x
) == 1)
6601 for (m
= the_movables
; m
; m
= m
->next
)
6602 if (rtx_equal_p (x
, m
->set_dest
))
6604 /* Ok, we found a match. Substitute and simplify. */
6606 /* If we match another movable, we must use that, as
6607 this one is going away. */
6609 return simplify_giv_expr (m
->match
->set_dest
, benefit
);
6611 /* If consec is non-zero, this is a member of a group of
6612 instructions that were moved together. We handle this
6613 case only to the point of seeking to the last insn and
6614 looking for a REG_EQUAL. Fail if we don't find one. */
6619 do { tem
= NEXT_INSN (tem
); } while (--i
> 0);
6621 tem
= find_reg_note (tem
, REG_EQUAL
, NULL_RTX
);
6623 tem
= XEXP (tem
, 0);
6627 tem
= single_set (m
->insn
);
6629 tem
= SET_SRC (tem
);
6634 /* What we are most interested in is pointer
6635 arithmetic on invariants -- only take
6636 patterns we may be able to do something with. */
6637 if (GET_CODE (tem
) == PLUS
6638 || GET_CODE (tem
) == MULT
6639 || GET_CODE (tem
) == ASHIFT
6640 || GET_CODE (tem
) == CONST_INT
6641 || GET_CODE (tem
) == SYMBOL_REF
)
6643 tem
= simplify_giv_expr (tem
, benefit
);
6647 else if (GET_CODE (tem
) == CONST
6648 && GET_CODE (XEXP (tem
, 0)) == PLUS
6649 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == SYMBOL_REF
6650 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)
6652 tem
= simplify_giv_expr (XEXP (tem
, 0), benefit
);
6663 /* Fall through to general case. */
6665 /* If invariant, return as USE (unless CONST_INT).
6666 Otherwise, not giv. */
6667 if (GET_CODE (x
) == USE
)
6670 if (invariant_p (x
) == 1)
6672 if (GET_CODE (x
) == CONST_INT
)
6674 if (GET_CODE (x
) == CONST
6675 && GET_CODE (XEXP (x
, 0)) == PLUS
6676 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
6677 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
6679 return gen_rtx_USE (mode
, x
);
6686 /* This routine folds invariants such that there is only ever one
6687 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6690 sge_plus_constant (x
, c
)
6693 if (GET_CODE (x
) == CONST_INT
)
6694 return GEN_INT (INTVAL (x
) + INTVAL (c
));
6695 else if (GET_CODE (x
) != PLUS
)
6696 return gen_rtx_PLUS (GET_MODE (x
), x
, c
);
6697 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
6699 return gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0),
6700 GEN_INT (INTVAL (XEXP (x
, 1)) + INTVAL (c
)));
6702 else if (GET_CODE (XEXP (x
, 0)) == PLUS
6703 || GET_CODE (XEXP (x
, 1)) != PLUS
)
6705 return gen_rtx_PLUS (GET_MODE (x
),
6706 sge_plus_constant (XEXP (x
, 0), c
), XEXP (x
, 1));
6710 return gen_rtx_PLUS (GET_MODE (x
),
6711 sge_plus_constant (XEXP (x
, 1), c
), XEXP (x
, 0));
6716 sge_plus (mode
, x
, y
)
6717 enum machine_mode mode
;
6720 while (GET_CODE (y
) == PLUS
)
6722 rtx a
= XEXP (y
, 0);
6723 if (GET_CODE (a
) == CONST_INT
)
6724 x
= sge_plus_constant (x
, a
);
6726 x
= gen_rtx_PLUS (mode
, x
, a
);
6729 if (GET_CODE (y
) == CONST_INT
)
6730 x
= sge_plus_constant (x
, y
);
6732 x
= gen_rtx_PLUS (mode
, x
, y
);
6736 /* Help detect a giv that is calculated by several consecutive insns;
6740 The caller has already identified the first insn P as having a giv as dest;
6741 we check that all other insns that set the same register follow
6742 immediately after P, that they alter nothing else,
6743 and that the result of the last is still a giv.
6745 The value is 0 if the reg set in P is not really a giv.
6746 Otherwise, the value is the amount gained by eliminating
6747 all the consecutive insns that compute the value.
6749 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6750 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6752 The coefficients of the ultimate giv value are stored in
6753 *MULT_VAL and *ADD_VAL. */
6756 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
6757 add_val
, mult_val
, last_consec_insn
)
6764 rtx
*last_consec_insn
;
6772 /* Indicate that this is a giv so that we can update the value produced in
6773 each insn of the multi-insn sequence.
6775 This induction structure will be used only by the call to
6776 general_induction_var below, so we can allocate it on our stack.
6777 If this is a giv, our caller will replace the induct var entry with
6778 a new induction structure. */
6780 = (struct induction
*) alloca (sizeof (struct induction
));
6781 v
->src_reg
= src_reg
;
6782 v
->mult_val
= *mult_val
;
6783 v
->add_val
= *add_val
;
6784 v
->benefit
= first_benefit
;
6786 v
->derive_adjustment
= 0;
6788 REG_IV_TYPE (REGNO (dest_reg
)) = GENERAL_INDUCT
;
6789 REG_IV_INFO (REGNO (dest_reg
)) = v
;
6791 count
= VARRAY_INT (n_times_set
, REGNO (dest_reg
)) - 1;
6796 code
= GET_CODE (p
);
6798 /* If libcall, skip to end of call sequence. */
6799 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
6803 && (set
= single_set (p
))
6804 && GET_CODE (SET_DEST (set
)) == REG
6805 && SET_DEST (set
) == dest_reg
6806 && (general_induction_var (SET_SRC (set
), &src_reg
,
6807 add_val
, mult_val
, 0, &benefit
)
6808 /* Giv created by equivalent expression. */
6809 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
6810 && general_induction_var (XEXP (temp
, 0), &src_reg
,
6811 add_val
, mult_val
, 0, &benefit
)))
6812 && src_reg
== v
->src_reg
)
6814 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
6815 benefit
+= libcall_benefit (p
);
6818 v
->mult_val
= *mult_val
;
6819 v
->add_val
= *add_val
;
6820 v
->benefit
= benefit
;
6822 else if (code
!= NOTE
)
6824 /* Allow insns that set something other than this giv to a
6825 constant. Such insns are needed on machines which cannot
6826 include long constants and should not disqualify a giv. */
6828 && (set
= single_set (p
))
6829 && SET_DEST (set
) != dest_reg
6830 && CONSTANT_P (SET_SRC (set
)))
6833 REG_IV_TYPE (REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
6838 *last_consec_insn
= p
;
6842 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6843 represented by G1. If no such expression can be found, or it is clear that
6844 it cannot possibly be a valid address, 0 is returned.
6846 To perform the computation, we note that
6849 where `v' is the biv.
6851 So G2 = (y/b) * G1 + (b - a*y/x).
6853 Note that MULT = y/x.
6855 Update: A and B are now allowed to be additive expressions such that
6856 B contains all variables in A. That is, computing B-A will not require
6857 subtracting variables. */
6860 express_from_1 (a
, b
, mult
)
6863 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6865 if (mult
== const0_rtx
)
6868 /* If MULT is not 1, we cannot handle A with non-constants, since we
6869 would then be required to subtract multiples of the registers in A.
6870 This is theoretically possible, and may even apply to some Fortran
6871 constructs, but it is a lot of work and we do not attempt it here. */
6873 if (mult
!= const1_rtx
&& GET_CODE (a
) != CONST_INT
)
6876 /* In general these structures are sorted top to bottom (down the PLUS
6877 chain), but not left to right across the PLUS. If B is a higher
6878 order giv than A, we can strip one level and recurse. If A is higher
6879 order, we'll eventually bail out, but won't know that until the end.
6880 If they are the same, we'll strip one level around this loop. */
6882 while (GET_CODE (a
) == PLUS
&& GET_CODE (b
) == PLUS
)
6884 rtx ra
, rb
, oa
, ob
, tmp
;
6886 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6887 if (GET_CODE (ra
) == PLUS
)
6888 tmp
= ra
, ra
= oa
, oa
= tmp
;
6890 rb
= XEXP (b
, 0), ob
= XEXP (b
, 1);
6891 if (GET_CODE (rb
) == PLUS
)
6892 tmp
= rb
, rb
= ob
, ob
= tmp
;
6894 if (rtx_equal_p (ra
, rb
))
6895 /* We matched: remove one reg completely. */
6897 else if (GET_CODE (ob
) != PLUS
&& rtx_equal_p (ra
, ob
))
6898 /* An alternate match. */
6900 else if (GET_CODE (oa
) != PLUS
&& rtx_equal_p (oa
, rb
))
6901 /* An alternate match. */
6905 /* Indicates an extra register in B. Strip one level from B and
6906 recurse, hoping B was the higher order expression. */
6907 ob
= express_from_1 (a
, ob
, mult
);
6910 return gen_rtx_PLUS (GET_MODE (b
), rb
, ob
);
6914 /* Here we are at the last level of A, go through the cases hoping to
6915 get rid of everything but a constant. */
6917 if (GET_CODE (a
) == PLUS
)
6921 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6922 if (rtx_equal_p (oa
, b
))
6924 else if (!rtx_equal_p (ra
, b
))
6927 if (GET_CODE (oa
) != CONST_INT
)
6930 return GEN_INT (-INTVAL (oa
) * INTVAL (mult
));
6932 else if (GET_CODE (a
) == CONST_INT
)
6934 return plus_constant (b
, -INTVAL (a
) * INTVAL (mult
));
6936 else if (GET_CODE (b
) == PLUS
)
6938 if (rtx_equal_p (a
, XEXP (b
, 0)))
6940 else if (rtx_equal_p (a
, XEXP (b
, 1)))
6945 else if (rtx_equal_p (a
, b
))
6952 express_from (g1
, g2
)
6953 struct induction
*g1
, *g2
;
6957 /* The value that G1 will be multiplied by must be a constant integer. Also,
6958 the only chance we have of getting a valid address is if b*c/a (see above
6959 for notation) is also an integer. */
6960 if (GET_CODE (g1
->mult_val
) == CONST_INT
6961 && GET_CODE (g2
->mult_val
) == CONST_INT
)
6963 if (g1
->mult_val
== const0_rtx
6964 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
6966 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
6968 else if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
))
6972 /* ??? Find out if the one is a multiple of the other? */
6976 add
= express_from_1 (g1
->add_val
, g2
->add_val
, mult
);
6977 if (add
== NULL_RTX
)
6979 /* Failed. If we've got a multiplication factor between G1 and G2,
6980 scale G1's addend and try again. */
6981 if (INTVAL (mult
) > 1)
6983 rtx g1_add_val
= g1
->add_val
;
6984 if (GET_CODE (g1_add_val
) == MULT
6985 && GET_CODE (XEXP (g1_add_val
, 1)) == CONST_INT
)
6988 m
= INTVAL (mult
) * INTVAL (XEXP (g1_add_val
, 1));
6989 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
),
6990 XEXP (g1_add_val
, 0), GEN_INT (m
));
6994 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
), g1_add_val
,
6998 add
= express_from_1 (g1_add_val
, g2
->add_val
, const1_rtx
);
7001 if (add
== NULL_RTX
)
7004 /* Form simplified final result. */
7005 if (mult
== const0_rtx
)
7007 else if (mult
== const1_rtx
)
7008 mult
= g1
->dest_reg
;
7010 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
7012 if (add
== const0_rtx
)
7016 if (GET_CODE (add
) == PLUS
7017 && CONSTANT_P (XEXP (add
, 1)))
7019 rtx tem
= XEXP (add
, 1);
7020 mult
= gen_rtx_PLUS (g2
->mode
, mult
, XEXP (add
, 0));
7024 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
7029 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7030 represented by G1. This indicates that G2 should be combined with G1 and
7031 that G2 can use (either directly or via an address expression) a register
7032 used to represent G1. */
7035 combine_givs_p (g1
, g2
)
7036 struct induction
*g1
, *g2
;
7038 rtx tem
= express_from (g1
, g2
);
7040 /* If these givs are identical, they can be combined. We use the results
7041 of express_from because the addends are not in a canonical form, so
7042 rtx_equal_p is a weaker test. */
7043 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7044 combination to be the other way round. */
7045 if (tem
== g1
->dest_reg
7046 && (g1
->giv_type
== DEST_REG
|| g2
->giv_type
== DEST_ADDR
))
7048 return g1
->dest_reg
;
7051 /* If G2 can be expressed as a function of G1 and that function is valid
7052 as an address and no more expensive than using a register for G2,
7053 the expression of G2 in terms of G1 can be used. */
7055 && g2
->giv_type
== DEST_ADDR
7056 && memory_address_p (g2
->mem_mode
, tem
)
7057 /* ??? Looses, especially with -fforce-addr, where *g2->location
7058 will always be a register, and so anything more complicated
7062 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
)
7064 && rtx_cost (tem
, MEM
) <= rtx_cost (*g2
->location
, MEM
)
7075 struct combine_givs_stats
7082 cmp_combine_givs_stats (xp
, yp
)
7086 const struct combine_givs_stats
* const x
=
7087 (const struct combine_givs_stats
*) xp
;
7088 const struct combine_givs_stats
* const y
=
7089 (const struct combine_givs_stats
*) yp
;
7091 d
= y
->total_benefit
- x
->total_benefit
;
7092 /* Stabilize the sort. */
7094 d
= x
->giv_number
- y
->giv_number
;
7098 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7099 any other. If so, point SAME to the giv combined with and set NEW_REG to
7100 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7101 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7105 struct iv_class
*bl
;
7107 /* Additional benefit to add for being combined multiple times. */
7108 const int extra_benefit
= 3;
7110 struct induction
*g1
, *g2
, **giv_array
;
7111 int i
, j
, k
, giv_count
;
7112 struct combine_givs_stats
*stats
;
7115 /* Count givs, because bl->giv_count is incorrect here. */
7117 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
7122 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
7124 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
7126 giv_array
[i
++] = g1
;
7128 stats
= (struct combine_givs_stats
*) xcalloc (giv_count
, sizeof (*stats
));
7129 can_combine
= (rtx
*) xcalloc (giv_count
, giv_count
* sizeof(rtx
));
7131 for (i
= 0; i
< giv_count
; i
++)
7137 stats
[i
].giv_number
= i
;
7139 /* If a DEST_REG GIV is used only once, do not allow it to combine
7140 with anything, for in doing so we will gain nothing that cannot
7141 be had by simply letting the GIV with which we would have combined
7142 to be reduced on its own. The losage shows up in particular with
7143 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7144 be seen elsewhere as well. */
7145 if (g1
->giv_type
== DEST_REG
7146 && (single_use
= VARRAY_RTX (reg_single_usage
, REGNO (g1
->dest_reg
)))
7147 && single_use
!= const0_rtx
)
7150 this_benefit
= g1
->benefit
;
7151 /* Add an additional weight for zero addends. */
7152 if (g1
->no_const_addval
)
7155 for (j
= 0; j
< giv_count
; j
++)
7161 && (this_combine
= combine_givs_p (g1
, g2
)) != NULL_RTX
)
7163 can_combine
[i
*giv_count
+ j
] = this_combine
;
7164 this_benefit
+= g2
->benefit
+ extra_benefit
;
7167 stats
[i
].total_benefit
= this_benefit
;
7170 /* Iterate, combining until we can't. */
7172 qsort (stats
, giv_count
, sizeof(*stats
), cmp_combine_givs_stats
);
7174 if (loop_dump_stream
)
7176 fprintf (loop_dump_stream
, "Sorted combine statistics:\n");
7177 for (k
= 0; k
< giv_count
; k
++)
7179 g1
= giv_array
[stats
[k
].giv_number
];
7180 if (!g1
->combined_with
&& !g1
->same
)
7181 fprintf (loop_dump_stream
, " {%d, %d}",
7182 INSN_UID (giv_array
[stats
[k
].giv_number
]->insn
),
7183 stats
[k
].total_benefit
);
7185 putc ('\n', loop_dump_stream
);
7188 for (k
= 0; k
< giv_count
; k
++)
7190 int g1_add_benefit
= 0;
7192 i
= stats
[k
].giv_number
;
7195 /* If it has already been combined, skip. */
7196 if (g1
->combined_with
|| g1
->same
)
7199 for (j
= 0; j
< giv_count
; j
++)
7202 if (g1
!= g2
&& can_combine
[i
*giv_count
+ j
]
7203 /* If it has already been combined, skip. */
7204 && ! g2
->same
&& ! g2
->combined_with
)
7208 g2
->new_reg
= can_combine
[i
*giv_count
+ j
];
7210 g1
->combined_with
++;
7211 g1
->lifetime
+= g2
->lifetime
;
7213 g1_add_benefit
+= g2
->benefit
;
7215 /* ??? The new final_[bg]iv_value code does a much better job
7216 of finding replaceable giv's, and hence this code may no
7217 longer be necessary. */
7218 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
7219 g1_add_benefit
-= copy_cost
;
7221 /* To help optimize the next set of combinations, remove
7222 this giv from the benefits of other potential mates. */
7223 for (l
= 0; l
< giv_count
; ++l
)
7225 int m
= stats
[l
].giv_number
;
7226 if (can_combine
[m
*giv_count
+ j
])
7227 stats
[l
].total_benefit
-= g2
->benefit
+ extra_benefit
;
7230 if (loop_dump_stream
)
7231 fprintf (loop_dump_stream
,
7232 "giv at %d combined with giv at %d\n",
7233 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
7237 /* To help optimize the next set of combinations, remove
7238 this giv from the benefits of other potential mates. */
7239 if (g1
->combined_with
)
7241 for (j
= 0; j
< giv_count
; ++j
)
7243 int m
= stats
[j
].giv_number
;
7244 if (can_combine
[m
*giv_count
+ i
])
7245 stats
[j
].total_benefit
-= g1
->benefit
+ extra_benefit
;
7248 g1
->benefit
+= g1_add_benefit
;
7250 /* We've finished with this giv, and everything it touched.
7251 Restart the combination so that proper weights for the
7252 rest of the givs are properly taken into account. */
7253 /* ??? Ideally we would compact the arrays at this point, so
7254 as to not cover old ground. But sanely compacting
7255 can_combine is tricky. */
7265 struct recombine_givs_stats
7268 int start_luid
, end_luid
;
7271 /* Used below as comparison function for qsort. We want a ascending luid
7272 when scanning the array starting at the end, thus the arguments are
7275 cmp_recombine_givs_stats (xp
, yp
)
7279 const struct recombine_givs_stats
* const x
=
7280 (const struct recombine_givs_stats
*) xp
;
7281 const struct recombine_givs_stats
* const y
=
7282 (const struct recombine_givs_stats
*) yp
;
7284 d
= y
->start_luid
- x
->start_luid
;
7285 /* Stabilize the sort. */
7287 d
= y
->giv_number
- x
->giv_number
;
7291 /* Scan X, which is a part of INSN, for the end of life of a giv. Also
7292 look for the start of life of a giv where the start has not been seen
7293 yet to unlock the search for the end of its life.
7294 Only consider givs that belong to BIV.
7295 Return the total number of lifetime ends that have been found. */
7297 find_life_end (x
, stats
, insn
, biv
)
7299 struct recombine_givs_stats
*stats
;
7306 code
= GET_CODE (x
);
7311 rtx reg
= SET_DEST (x
);
7312 if (GET_CODE (reg
) == REG
)
7314 int regno
= REGNO (reg
);
7315 struct induction
*v
= REG_IV_INFO (regno
);
7317 if (REG_IV_TYPE (regno
) == GENERAL_INDUCT
7319 && v
->src_reg
== biv
7320 && stats
[v
->ix
].end_luid
<= 0)
7322 /* If we see a 0 here for end_luid, it means that we have
7323 scanned the entire loop without finding any use at all.
7324 We must not predicate this code on a start_luid match
7325 since that would make the test fail for givs that have
7326 been hoisted out of inner loops. */
7327 if (stats
[v
->ix
].end_luid
== 0)
7329 stats
[v
->ix
].end_luid
= stats
[v
->ix
].start_luid
;
7330 return 1 + find_life_end (SET_SRC (x
), stats
, insn
, biv
);
7332 else if (stats
[v
->ix
].start_luid
== INSN_LUID (insn
))
7333 stats
[v
->ix
].end_luid
= 0;
7335 return find_life_end (SET_SRC (x
), stats
, insn
, biv
);
7341 int regno
= REGNO (x
);
7342 struct induction
*v
= REG_IV_INFO (regno
);
7344 if (REG_IV_TYPE (regno
) == GENERAL_INDUCT
7346 && v
->src_reg
== biv
7347 && stats
[v
->ix
].end_luid
== 0)
7349 while (INSN_UID (insn
) >= max_uid_for_loop
)
7350 insn
= NEXT_INSN (insn
);
7351 stats
[v
->ix
].end_luid
= INSN_LUID (insn
);
7364 fmt
= GET_RTX_FORMAT (code
);
7366 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7369 retval
+= find_life_end (XEXP (x
, i
), stats
, insn
, biv
);
7371 else if (fmt
[i
] == 'E')
7372 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7373 retval
+= find_life_end (XVECEXP (x
, i
, j
), stats
, insn
, biv
);
7378 /* For each giv that has been combined with another, look if
7379 we can combine it with the most recently used one instead.
7380 This tends to shorten giv lifetimes, and helps the next step:
7381 try to derive givs from other givs. */
7383 recombine_givs (bl
, loop_start
, loop_end
, unroll_p
)
7384 struct iv_class
*bl
;
7385 rtx loop_start
, loop_end
;
7388 struct induction
*v
, **giv_array
, *last_giv
;
7389 struct recombine_givs_stats
*stats
;
7392 int ends_need_computing
;
7394 for (giv_count
= 0, v
= bl
->giv
; v
; v
= v
->next_iv
)
7400 = (struct induction
**) xmalloc (giv_count
* sizeof (struct induction
*));
7401 stats
= (struct recombine_givs_stats
*) xmalloc (giv_count
* sizeof *stats
);
7403 /* Initialize stats and set up the ix field for each giv in stats to name
7404 the corresponding index into stats. */
7405 for (i
= 0, v
= bl
->giv
; v
; v
= v
->next_iv
)
7412 stats
[i
].giv_number
= i
;
7413 /* If this giv has been hoisted out of an inner loop, use the luid of
7414 the previous insn. */
7415 for (p
= v
->insn
; INSN_UID (p
) >= max_uid_for_loop
; )
7417 stats
[i
].start_luid
= INSN_LUID (p
);
7421 qsort (stats
, giv_count
, sizeof(*stats
), cmp_recombine_givs_stats
);
7423 /* Set up the ix field for each giv in stats to name
7424 the corresponding index into stats, and
7425 do the actual most-recently-used recombination. */
7426 for (last_giv
= 0, i
= giv_count
- 1; i
>= 0; i
--)
7428 v
= giv_array
[stats
[i
].giv_number
];
7432 struct induction
*old_same
= v
->same
;
7435 /* combine_givs_p actually says if we can make this transformation.
7436 The other tests are here only to avoid keeping a giv alive
7437 that could otherwise be eliminated. */
7439 && ((old_same
->maybe_dead
&& ! old_same
->combined_with
)
7440 || ! last_giv
->maybe_dead
7441 || last_giv
->combined_with
)
7442 && (new_combine
= combine_givs_p (last_giv
, v
)))
7444 old_same
->combined_with
--;
7445 v
->new_reg
= new_combine
;
7447 last_giv
->combined_with
++;
7448 /* No need to update lifetimes / benefits here since we have
7449 already decided what to reduce. */
7451 if (loop_dump_stream
)
7453 fprintf (loop_dump_stream
,
7454 "giv at %d recombined with giv at %d as ",
7455 INSN_UID (v
->insn
), INSN_UID (last_giv
->insn
));
7456 print_rtl (loop_dump_stream
, v
->new_reg
);
7457 putc ('\n', loop_dump_stream
);
7463 else if (v
->giv_type
!= DEST_REG
)
7466 || (last_giv
->maybe_dead
&& ! last_giv
->combined_with
)
7468 || v
->combined_with
)
7472 ends_need_computing
= 0;
7473 /* For each DEST_REG giv, compute lifetime starts, and try to compute
7474 lifetime ends from regscan info. */
7475 for (i
= giv_count
- 1; i
>= 0; i
--)
7477 v
= giv_array
[stats
[i
].giv_number
];
7480 if (v
->giv_type
== DEST_ADDR
)
7482 /* Loop unrolling of an inner loop can even create new DEST_REG
7485 for (p
= v
->insn
; INSN_UID (p
) >= max_uid_for_loop
; )
7487 stats
[i
].start_luid
= stats
[i
].end_luid
= INSN_LUID (p
);
7489 stats
[i
].end_luid
++;
7491 else /* v->giv_type == DEST_REG */
7495 stats
[i
].start_luid
= INSN_LUID (v
->insn
);
7496 stats
[i
].end_luid
= INSN_LUID (v
->last_use
);
7498 else if (INSN_UID (v
->insn
) >= max_uid_for_loop
)
7501 /* This insn has been created by loop optimization on an inner
7502 loop. We don't have a proper start_luid that will match
7503 when we see the first set. But we do know that there will
7504 be no use before the set, so we can set end_luid to 0 so that
7505 we'll start looking for the last use right away. */
7506 for (p
= PREV_INSN (v
->insn
); INSN_UID (p
) >= max_uid_for_loop
; )
7508 stats
[i
].start_luid
= INSN_LUID (p
);
7509 stats
[i
].end_luid
= 0;
7510 ends_need_computing
++;
7514 int regno
= REGNO (v
->dest_reg
);
7515 int count
= VARRAY_INT (n_times_set
, regno
) - 1;
7518 /* Find the first insn that sets the giv, so that we can verify
7519 if this giv's lifetime wraps around the loop. We also need
7520 the luid of the first setting insn in order to detect the
7521 last use properly. */
7524 p
= prev_nonnote_insn (p
);
7525 if (reg_set_p (v
->dest_reg
, p
))
7529 stats
[i
].start_luid
= INSN_LUID (p
);
7530 if (stats
[i
].start_luid
> uid_luid
[REGNO_FIRST_UID (regno
)])
7532 stats
[i
].end_luid
= -1;
7533 ends_need_computing
++;
7537 stats
[i
].end_luid
= uid_luid
[REGNO_LAST_UID (regno
)];
7538 if (stats
[i
].end_luid
> INSN_LUID (loop_end
))
7540 stats
[i
].end_luid
= -1;
7541 ends_need_computing
++;
7548 /* If the regscan information was unconclusive for one or more DEST_REG
7549 givs, scan the all insn in the loop to find out lifetime ends. */
7550 if (ends_need_computing
)
7552 rtx biv
= bl
->biv
->src_reg
;
7557 if (p
== loop_start
)
7560 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
7562 ends_need_computing
-= find_life_end (PATTERN (p
), stats
, p
, biv
);
7564 while (ends_need_computing
);
7567 /* Set start_luid back to the last insn that sets the giv. This allows
7568 more combinations. */
7569 for (i
= giv_count
- 1; i
>= 0; i
--)
7571 v
= giv_array
[stats
[i
].giv_number
];
7574 if (INSN_UID (v
->insn
) < max_uid_for_loop
)
7575 stats
[i
].start_luid
= INSN_LUID (v
->insn
);
7578 /* Now adjust lifetime ends by taking combined givs into account. */
7579 for (i
= giv_count
- 1; i
>= 0; i
--)
7584 v
= giv_array
[stats
[i
].giv_number
];
7587 if (v
->same
&& ! v
->same
->ignore
)
7590 luid
= stats
[i
].start_luid
;
7591 /* Use unsigned arithmetic to model loop wrap-around. */
7592 if (luid
- stats
[j
].start_luid
7593 > (unsigned) stats
[j
].end_luid
- stats
[j
].start_luid
)
7594 stats
[j
].end_luid
= luid
;
7598 qsort (stats
, giv_count
, sizeof(*stats
), cmp_recombine_givs_stats
);
7600 /* Try to derive DEST_REG givs from previous DEST_REG givs with the
7601 same mult_val and non-overlapping lifetime. This reduces register
7603 Once we find a DEST_REG giv that is suitable to derive others from,
7604 we set last_giv to this giv, and try to derive as many other DEST_REG
7605 givs from it without joining overlapping lifetimes. If we then
7606 encounter a DEST_REG giv that we can't derive, we set rescan to the
7607 index for this giv (unless rescan is already set).
7608 When we are finished with the current LAST_GIV (i.e. the inner loop
7609 terminates), we start again with rescan, which then becomes the new
7611 for (i
= giv_count
- 1; i
>= 0; i
= rescan
)
7613 int life_start
= 0, life_end
= 0;
7615 for (last_giv
= 0, rescan
= -1; i
>= 0; i
--)
7619 v
= giv_array
[stats
[i
].giv_number
];
7620 if (v
->giv_type
!= DEST_REG
|| v
->derived_from
|| v
->same
)
7624 /* Don't use a giv that's likely to be dead to derive
7625 others - that would be likely to keep that giv alive. */
7626 if (! v
->maybe_dead
|| v
->combined_with
)
7629 life_start
= stats
[i
].start_luid
;
7630 life_end
= stats
[i
].end_luid
;
7634 /* Use unsigned arithmetic to model loop wrap around. */
7635 if (((unsigned) stats
[i
].start_luid
- life_start
7636 >= (unsigned) life_end
- life_start
)
7637 && ((unsigned) stats
[i
].end_luid
- life_start
7638 > (unsigned) life_end
- life_start
)
7639 /* Check that the giv insn we're about to use for deriving
7640 precedes all uses of that giv. Note that initializing the
7641 derived giv would defeat the purpose of reducing register
7643 ??? We could arrange to move the insn. */
7644 && ((unsigned) stats
[i
].end_luid
- INSN_LUID (loop_start
)
7645 > (unsigned) stats
[i
].start_luid
- INSN_LUID (loop_start
))
7646 && rtx_equal_p (last_giv
->mult_val
, v
->mult_val
)
7647 /* ??? Could handle libcalls, but would need more logic. */
7648 && ! find_reg_note (v
->insn
, REG_RETVAL
, NULL_RTX
)
7649 /* We would really like to know if for any giv that v
7650 is combined with, v->insn or any intervening biv increment
7651 dominates that combined giv. However, we
7652 don't have this detailed control flow information.
7653 N.B. since last_giv will be reduced, it is valid
7654 anywhere in the loop, so we don't need to check the
7655 validity of last_giv.
7656 We rely here on the fact that v->always_executed implies that
7657 there is no jump to someplace else in the loop before the
7658 giv insn, and hence any insn that is executed before the
7659 giv insn in the loop will have a lower luid. */
7660 && (v
->always_executed
|| ! v
->combined_with
)
7661 && (sum
= express_from (last_giv
, v
))
7662 /* Make sure we don't make the add more expensive. ADD_COST
7663 doesn't take different costs of registers and constants into
7664 account, so compare the cost of the actual SET_SRCs. */
7665 && (rtx_cost (sum
, SET
)
7666 <= rtx_cost (SET_SRC (single_set (v
->insn
)), SET
))
7667 /* ??? unroll can't understand anything but reg + const_int
7668 sums. It would be cleaner to fix unroll. */
7669 && ((GET_CODE (sum
) == PLUS
7670 && GET_CODE (XEXP (sum
, 0)) == REG
7671 && GET_CODE (XEXP (sum
, 1)) == CONST_INT
)
7673 && validate_change (v
->insn
, &PATTERN (v
->insn
),
7674 gen_rtx_SET (VOIDmode
, v
->dest_reg
, sum
), 0))
7676 v
->derived_from
= last_giv
;
7677 life_end
= stats
[i
].end_luid
;
7679 if (loop_dump_stream
)
7681 fprintf (loop_dump_stream
,
7682 "giv at %d derived from %d as ",
7683 INSN_UID (v
->insn
), INSN_UID (last_giv
->insn
));
7684 print_rtl (loop_dump_stream
, sum
);
7685 putc ('\n', loop_dump_stream
);
7688 else if (rescan
< 0)
7698 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
7701 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
7702 rtx b
; /* initial value of basic induction variable */
7703 rtx m
; /* multiplicative constant */
7704 rtx a
; /* additive constant */
7705 rtx reg
; /* destination register */
7711 /* Prevent unexpected sharing of these rtx. */
7715 /* Increase the lifetime of any invariants moved further in code. */
7716 update_reg_last_use (a
, insert_before
);
7717 update_reg_last_use (b
, insert_before
);
7718 update_reg_last_use (m
, insert_before
);
7721 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
7723 emit_move_insn (reg
, result
);
7724 seq
= gen_sequence ();
7727 emit_insn_before (seq
, insert_before
);
7729 /* It is entirely possible that the expansion created lots of new
7730 registers. Iterate over the sequence we just created and
7733 if (GET_CODE (seq
) == SEQUENCE
)
7736 for (i
= 0; i
< XVECLEN (seq
, 0); ++i
)
7738 rtx set
= single_set (XVECEXP (seq
, 0, i
));
7739 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
7740 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
7743 else if (GET_CODE (seq
) == SET
7744 && GET_CODE (SET_DEST (seq
)) == REG
)
7745 record_base_value (REGNO (SET_DEST (seq
)), SET_SRC (seq
), 0);
7748 /* Test whether A * B can be computed without
7749 an actual multiply insn. Value is 1 if so. */
7752 product_cheap_p (a
, b
)
7758 struct obstack
*old_rtl_obstack
= rtl_obstack
;
7759 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
7762 /* If only one is constant, make it B. */
7763 if (GET_CODE (a
) == CONST_INT
)
7764 tmp
= a
, a
= b
, b
= tmp
;
7766 /* If first constant, both constant, so don't need multiply. */
7767 if (GET_CODE (a
) == CONST_INT
)
7770 /* If second not constant, neither is constant, so would need multiply. */
7771 if (GET_CODE (b
) != CONST_INT
)
7774 /* One operand is constant, so might not need multiply insn. Generate the
7775 code for the multiply and see if a call or multiply, or long sequence
7776 of insns is generated. */
7778 rtl_obstack
= &temp_obstack
;
7780 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
7781 tmp
= gen_sequence ();
7784 if (GET_CODE (tmp
) == SEQUENCE
)
7786 if (XVEC (tmp
, 0) == 0)
7788 else if (XVECLEN (tmp
, 0) > 3)
7791 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
7793 rtx insn
= XVECEXP (tmp
, 0, i
);
7795 if (GET_CODE (insn
) != INSN
7796 || (GET_CODE (PATTERN (insn
)) == SET
7797 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
7798 || (GET_CODE (PATTERN (insn
)) == PARALLEL
7799 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
7800 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
7807 else if (GET_CODE (tmp
) == SET
7808 && GET_CODE (SET_SRC (tmp
)) == MULT
)
7810 else if (GET_CODE (tmp
) == PARALLEL
7811 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
7812 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
7815 /* Free any storage we obtained in generating this multiply and restore rtl
7816 allocation to its normal obstack. */
7817 obstack_free (&temp_obstack
, storage
);
7818 rtl_obstack
= old_rtl_obstack
;
7823 /* Check to see if loop can be terminated by a "decrement and branch until
7824 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7825 Also try reversing an increment loop to a decrement loop
7826 to see if the optimization can be performed.
7827 Value is nonzero if optimization was performed. */
7829 /* This is useful even if the architecture doesn't have such an insn,
7830 because it might change a loops which increments from 0 to n to a loop
7831 which decrements from n to 0. A loop that decrements to zero is usually
7832 faster than one that increments from zero. */
7834 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7835 such as approx_final_value, biv_total_increment, loop_iterations, and
7836 final_[bg]iv_value. */
7839 check_dbra_loop (loop
, insn_count
)
7843 struct iv_class
*bl
;
7850 rtx before_comparison
;
7854 int compare_and_branch
;
7855 rtx loop_start
= loop
->start
;
7856 rtx loop_end
= loop
->end
;
7857 struct loop_info
*loop_info
= loop
->info
;
7859 /* If last insn is a conditional branch, and the insn before tests a
7860 register value, try to optimize it. Otherwise, we can't do anything. */
7862 jump
= PREV_INSN (loop_end
);
7863 comparison
= get_condition_for_loop (jump
);
7864 if (comparison
== 0)
7867 /* Try to compute whether the compare/branch at the loop end is one or
7868 two instructions. */
7869 get_condition (jump
, &first_compare
);
7870 if (first_compare
== jump
)
7871 compare_and_branch
= 1;
7872 else if (first_compare
== prev_nonnote_insn (jump
))
7873 compare_and_branch
= 2;
7877 /* Check all of the bivs to see if the compare uses one of them.
7878 Skip biv's set more than once because we can't guarantee that
7879 it will be zero on the last iteration. Also skip if the biv is
7880 used between its update and the test insn. */
7882 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
7884 if (bl
->biv_count
== 1
7885 && ! bl
->biv
->maybe_multiple
7886 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
7887 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
7895 /* Look for the case where the basic induction variable is always
7896 nonnegative, and equals zero on the last iteration.
7897 In this case, add a reg_note REG_NONNEG, which allows the
7898 m68k DBRA instruction to be used. */
7900 if (((GET_CODE (comparison
) == GT
7901 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
7902 && INTVAL (XEXP (comparison
, 1)) == -1)
7903 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
7904 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
7905 && INTVAL (bl
->biv
->add_val
) < 0)
7907 /* Initial value must be greater than 0,
7908 init_val % -dec_value == 0 to ensure that it equals zero on
7909 the last iteration */
7911 if (GET_CODE (bl
->initial_value
) == CONST_INT
7912 && INTVAL (bl
->initial_value
) > 0
7913 && (INTVAL (bl
->initial_value
)
7914 % (-INTVAL (bl
->biv
->add_val
))) == 0)
7916 /* register always nonnegative, add REG_NOTE to branch */
7917 REG_NOTES (PREV_INSN (loop_end
))
7918 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
7919 REG_NOTES (PREV_INSN (loop_end
)));
7925 /* If the decrement is 1 and the value was tested as >= 0 before
7926 the loop, then we can safely optimize. */
7927 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
7929 if (GET_CODE (p
) == CODE_LABEL
)
7931 if (GET_CODE (p
) != JUMP_INSN
)
7934 before_comparison
= get_condition_for_loop (p
);
7935 if (before_comparison
7936 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
7937 && GET_CODE (before_comparison
) == LT
7938 && XEXP (before_comparison
, 1) == const0_rtx
7939 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
7940 && INTVAL (bl
->biv
->add_val
) == -1)
7942 REG_NOTES (PREV_INSN (loop_end
))
7943 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
7944 REG_NOTES (PREV_INSN (loop_end
)));
7951 else if (GET_CODE (bl
->biv
->add_val
) == CONST_INT
7952 && INTVAL (bl
->biv
->add_val
) > 0)
7954 /* Try to change inc to dec, so can apply above optimization. */
7956 all registers modified are induction variables or invariant,
7957 all memory references have non-overlapping addresses
7958 (obviously true if only one write)
7959 allow 2 insns for the compare/jump at the end of the loop. */
7960 /* Also, we must avoid any instructions which use both the reversed
7961 biv and another biv. Such instructions will fail if the loop is
7962 reversed. We meet this condition by requiring that either
7963 no_use_except_counting is true, or else that there is only
7965 int num_nonfixed_reads
= 0;
7966 /* 1 if the iteration var is used only to count iterations. */
7967 int no_use_except_counting
= 0;
7968 /* 1 if the loop has no memory store, or it has a single memory store
7969 which is reversible. */
7970 int reversible_mem_store
= 1;
7972 if (bl
->giv_count
== 0
7973 && ! uid_loop
[INSN_UID (loop_start
)]->exit_count
)
7975 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
7977 /* If there are no givs for this biv, and the only exit is the
7978 fall through at the end of the loop, then
7979 see if perhaps there are no uses except to count. */
7980 no_use_except_counting
= 1;
7981 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
7982 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
7984 rtx set
= single_set (p
);
7986 if (set
&& GET_CODE (SET_DEST (set
)) == REG
7987 && REGNO (SET_DEST (set
)) == bl
->regno
)
7988 /* An insn that sets the biv is okay. */
7990 else if ((p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
7991 || p
== prev_nonnote_insn (loop_end
))
7992 && reg_mentioned_p (bivreg
, PATTERN (p
)))
7994 /* If either of these insns uses the biv and sets a pseudo
7995 that has more than one usage, then the biv has uses
7996 other than counting since it's used to derive a value
7997 that is used more than one time. */
7998 int note_set_pseudo_multiple_uses_retval
= 0;
7999 note_stores (PATTERN (p
), note_set_pseudo_multiple_uses
,
8000 ¬e_set_pseudo_multiple_uses_retval
);
8001 if (note_set_pseudo_multiple_uses_retval
)
8003 no_use_except_counting
= 0;
8007 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
8009 no_use_except_counting
= 0;
8015 if (no_use_except_counting
)
8016 ; /* no need to worry about MEMs. */
8017 else if (num_mem_sets
<= 1)
8019 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8020 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
8021 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
8023 /* If the loop has a single store, and the destination address is
8024 invariant, then we can't reverse the loop, because this address
8025 might then have the wrong value at loop exit.
8026 This would work if the source was invariant also, however, in that
8027 case, the insn should have been moved out of the loop. */
8029 if (num_mem_sets
== 1)
8031 struct induction
*v
;
8033 reversible_mem_store
8034 = (! unknown_address_altered
8035 && ! unknown_constant_address_altered
8036 && ! invariant_p (XEXP (XEXP (loop_store_mems
, 0), 0)));
8038 /* If the store depends on a register that is set after the
8039 store, it depends on the initial value, and is thus not
8041 for (v
= bl
->giv
; reversible_mem_store
&& v
; v
= v
->next_iv
)
8043 if (v
->giv_type
== DEST_REG
8044 && reg_mentioned_p (v
->dest_reg
,
8045 PATTERN (first_loop_store_insn
))
8046 && loop_insn_first_p (first_loop_store_insn
, v
->insn
))
8047 reversible_mem_store
= 0;
8054 /* This code only acts for innermost loops. Also it simplifies
8055 the memory address check by only reversing loops with
8056 zero or one memory access.
8057 Two memory accesses could involve parts of the same array,
8058 and that can't be reversed.
8059 If the biv is used only for counting, than we don't need to worry
8060 about all these things. */
8062 if ((num_nonfixed_reads
<= 1
8063 && ! loop_info
->has_call
8064 && ! loop_info
->has_volatile
8065 && reversible_mem_store
8066 && (bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
8067 + num_movables
+ compare_and_branch
== insn_count
)
8068 && (bl
== loop_iv_list
&& bl
->next
== 0))
8069 || no_use_except_counting
)
8073 /* Loop can be reversed. */
8074 if (loop_dump_stream
)
8075 fprintf (loop_dump_stream
, "Can reverse loop\n");
8077 /* Now check other conditions:
8079 The increment must be a constant, as must the initial value,
8080 and the comparison code must be LT.
8082 This test can probably be improved since +/- 1 in the constant
8083 can be obtained by changing LT to LE and vice versa; this is
8087 /* for constants, LE gets turned into LT */
8088 && (GET_CODE (comparison
) == LT
8089 || (GET_CODE (comparison
) == LE
8090 && no_use_except_counting
)))
8092 HOST_WIDE_INT add_val
, add_adjust
, comparison_val
= 0;
8093 rtx initial_value
, comparison_value
;
8095 enum rtx_code cmp_code
;
8096 int comparison_const_width
;
8097 unsigned HOST_WIDE_INT comparison_sign_mask
;
8099 add_val
= INTVAL (bl
->biv
->add_val
);
8100 comparison_value
= XEXP (comparison
, 1);
8101 if (GET_MODE (comparison_value
) == VOIDmode
)
8102 comparison_const_width
8103 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison
, 0)));
8105 comparison_const_width
8106 = GET_MODE_BITSIZE (GET_MODE (comparison_value
));
8107 if (comparison_const_width
> HOST_BITS_PER_WIDE_INT
)
8108 comparison_const_width
= HOST_BITS_PER_WIDE_INT
;
8109 comparison_sign_mask
8110 = (unsigned HOST_WIDE_INT
)1 << (comparison_const_width
- 1);
8112 /* If the comparison value is not a loop invariant, then we
8113 can not reverse this loop.
8115 ??? If the insns which initialize the comparison value as
8116 a whole compute an invariant result, then we could move
8117 them out of the loop and proceed with loop reversal. */
8118 if (!invariant_p (comparison_value
))
8121 if (GET_CODE (comparison_value
) == CONST_INT
)
8122 comparison_val
= INTVAL (comparison_value
);
8123 initial_value
= bl
->initial_value
;
8125 /* Normalize the initial value if it is an integer and
8126 has no other use except as a counter. This will allow
8127 a few more loops to be reversed. */
8128 if (no_use_except_counting
8129 && GET_CODE (comparison_value
) == CONST_INT
8130 && GET_CODE (initial_value
) == CONST_INT
)
8132 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
8133 /* The code below requires comparison_val to be a multiple
8134 of add_val in order to do the loop reversal, so
8135 round up comparison_val to a multiple of add_val.
8136 Since comparison_value is constant, we know that the
8137 current comparison code is LT. */
8138 comparison_val
= comparison_val
+ add_val
- 1;
8140 -= (unsigned HOST_WIDE_INT
) comparison_val
% add_val
;
8141 /* We postpone overflow checks for COMPARISON_VAL here;
8142 even if there is an overflow, we might still be able to
8143 reverse the loop, if converting the loop exit test to
8145 initial_value
= const0_rtx
;
8148 /* First check if we can do a vanilla loop reversal. */
8149 if (initial_value
== const0_rtx
8150 /* If we have a decrement_and_branch_on_count,
8151 prefer the NE test, since this will allow that
8152 instruction to be generated. Note that we must
8153 use a vanilla loop reversal if the biv is used to
8154 calculate a giv or has a non-counting use. */
8155 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8156 && defined (HAVE_decrement_and_branch_on_count)
8157 && (! (add_val
== 1 && loop
->vtop
8158 && (bl
->biv_count
== 0
8159 || no_use_except_counting
)))
8161 && GET_CODE (comparison_value
) == CONST_INT
8162 /* Now do postponed overflow checks on COMPARISON_VAL. */
8163 && ! (((comparison_val
- add_val
) ^ INTVAL (comparison_value
))
8164 & comparison_sign_mask
))
8166 /* Register will always be nonnegative, with value
8167 0 on last iteration */
8168 add_adjust
= add_val
;
8172 else if (add_val
== 1 && loop
->vtop
8173 && (bl
->biv_count
== 0
8174 || no_use_except_counting
))
8182 if (GET_CODE (comparison
) == LE
)
8183 add_adjust
-= add_val
;
8185 /* If the initial value is not zero, or if the comparison
8186 value is not an exact multiple of the increment, then we
8187 can not reverse this loop. */
8188 if (initial_value
== const0_rtx
8189 && GET_CODE (comparison_value
) == CONST_INT
)
8191 if (((unsigned HOST_WIDE_INT
) comparison_val
% add_val
) != 0)
8196 if (! no_use_except_counting
|| add_val
!= 1)
8200 final_value
= comparison_value
;
8202 /* Reset these in case we normalized the initial value
8203 and comparison value above. */
8204 if (GET_CODE (comparison_value
) == CONST_INT
8205 && GET_CODE (initial_value
) == CONST_INT
)
8207 comparison_value
= GEN_INT (comparison_val
);
8209 = GEN_INT (comparison_val
+ INTVAL (bl
->initial_value
));
8211 bl
->initial_value
= initial_value
;
8213 /* Save some info needed to produce the new insns. */
8214 reg
= bl
->biv
->dest_reg
;
8215 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
8216 if (jump_label
== pc_rtx
)
8217 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
8218 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
8220 /* Set start_value; if this is not a CONST_INT, we need
8222 Initialize biv to start_value before loop start.
8223 The old initializing insn will be deleted as a
8224 dead store by flow.c. */
8225 if (initial_value
== const0_rtx
8226 && GET_CODE (comparison_value
) == CONST_INT
)
8228 start_value
= GEN_INT (comparison_val
- add_adjust
);
8229 emit_insn_before (gen_move_insn (reg
, start_value
),
8232 else if (GET_CODE (initial_value
) == CONST_INT
)
8234 rtx offset
= GEN_INT (-INTVAL (initial_value
) - add_adjust
);
8235 enum machine_mode mode
= GET_MODE (reg
);
8236 enum insn_code icode
8237 = add_optab
->handlers
[(int) mode
].insn_code
;
8239 if (! (*insn_data
[icode
].operand
[0].predicate
) (reg
, mode
)
8240 || ! ((*insn_data
[icode
].operand
[1].predicate
)
8241 (comparison_value
, mode
))
8242 || ! ((*insn_data
[icode
].operand
[2].predicate
)
8246 = gen_rtx_PLUS (mode
, comparison_value
, offset
);
8247 emit_insn_before ((GEN_FCN (icode
)
8248 (reg
, comparison_value
, offset
)),
8250 if (GET_CODE (comparison
) == LE
)
8251 final_value
= gen_rtx_PLUS (mode
, comparison_value
,
8254 else if (! add_adjust
)
8256 enum machine_mode mode
= GET_MODE (reg
);
8257 enum insn_code icode
8258 = sub_optab
->handlers
[(int) mode
].insn_code
;
8259 if (! (*insn_data
[icode
].operand
[0].predicate
) (reg
, mode
)
8260 || ! ((*insn_data
[icode
].operand
[1].predicate
)
8261 (comparison_value
, mode
))
8262 || ! ((*insn_data
[icode
].operand
[2].predicate
)
8263 (initial_value
, mode
)))
8266 = gen_rtx_MINUS (mode
, comparison_value
, initial_value
);
8267 emit_insn_before ((GEN_FCN (icode
)
8268 (reg
, comparison_value
, initial_value
)),
8272 /* We could handle the other cases too, but it'll be
8273 better to have a testcase first. */
8276 /* We may not have a single insn which can increment a reg, so
8277 create a sequence to hold all the insns from expand_inc. */
8279 expand_inc (reg
, new_add_val
);
8280 tem
= gen_sequence ();
8283 p
= emit_insn_before (tem
, bl
->biv
->insn
);
8284 delete_insn (bl
->biv
->insn
);
8286 /* Update biv info to reflect its new status. */
8288 bl
->initial_value
= start_value
;
8289 bl
->biv
->add_val
= new_add_val
;
8291 /* Update loop info. */
8292 loop_info
->initial_value
= reg
;
8293 loop_info
->initial_equiv_value
= reg
;
8294 loop_info
->final_value
= const0_rtx
;
8295 loop_info
->final_equiv_value
= const0_rtx
;
8296 loop_info
->comparison_value
= const0_rtx
;
8297 loop_info
->comparison_code
= cmp_code
;
8298 loop_info
->increment
= new_add_val
;
8300 /* Inc LABEL_NUSES so that delete_insn will
8301 not delete the label. */
8302 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
8304 /* Emit an insn after the end of the loop to set the biv's
8305 proper exit value if it is used anywhere outside the loop. */
8306 if ((REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
8308 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
8309 emit_insn_after (gen_move_insn (reg
, final_value
),
8312 /* Delete compare/branch at end of loop. */
8313 delete_insn (PREV_INSN (loop_end
));
8314 if (compare_and_branch
== 2)
8315 delete_insn (first_compare
);
8317 /* Add new compare/branch insn at end of loop. */
8319 emit_cmp_and_jump_insns (reg
, const0_rtx
, cmp_code
, NULL_RTX
,
8320 GET_MODE (reg
), 0, 0,
8321 XEXP (jump_label
, 0));
8322 tem
= gen_sequence ();
8324 emit_jump_insn_before (tem
, loop_end
);
8326 for (tem
= PREV_INSN (loop_end
);
8327 tem
&& GET_CODE (tem
) != JUMP_INSN
;
8328 tem
= PREV_INSN (tem
))
8332 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
8338 /* Increment of LABEL_NUSES done above. */
8339 /* Register is now always nonnegative,
8340 so add REG_NONNEG note to the branch. */
8341 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
8347 /* No insn may reference both the reversed and another biv or it
8348 will fail (see comment near the top of the loop reversal
8350 Earlier on, we have verified that the biv has no use except
8351 counting, or it is the only biv in this function.
8352 However, the code that computes no_use_except_counting does
8353 not verify reg notes. It's possible to have an insn that
8354 references another biv, and has a REG_EQUAL note with an
8355 expression based on the reversed biv. To avoid this case,
8356 remove all REG_EQUAL notes based on the reversed biv
8358 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8359 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
8362 rtx set
= single_set (p
);
8363 /* If this is a set of a GIV based on the reversed biv, any
8364 REG_EQUAL notes should still be correct. */
8366 || GET_CODE (SET_DEST (set
)) != REG
8367 || (size_t) REGNO (SET_DEST (set
)) >= reg_iv_type
->num_elements
8368 || REG_IV_TYPE (REGNO (SET_DEST (set
))) != GENERAL_INDUCT
8369 || REG_IV_INFO (REGNO (SET_DEST (set
)))->src_reg
!= bl
->biv
->src_reg
)
8370 for (pnote
= ®_NOTES (p
); *pnote
;)
8372 if (REG_NOTE_KIND (*pnote
) == REG_EQUAL
8373 && reg_mentioned_p (regno_reg_rtx
[bl
->regno
],
8375 *pnote
= XEXP (*pnote
, 1);
8377 pnote
= &XEXP (*pnote
, 1);
8381 /* Mark that this biv has been reversed. Each giv which depends
8382 on this biv, and which is also live past the end of the loop
8383 will have to be fixed up. */
8387 if (loop_dump_stream
)
8389 fprintf (loop_dump_stream
, "Reversed loop");
8391 fprintf (loop_dump_stream
, " and added reg_nonneg\n");
8393 fprintf (loop_dump_stream
, "\n");
8404 /* Verify whether the biv BL appears to be eliminable,
8405 based on the insns in the loop that refer to it.
8406 LOOP_START is the first insn of the loop, and END is the end insn.
8408 If ELIMINATE_P is non-zero, actually do the elimination.
8410 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8411 determine whether invariant insns should be placed inside or at the
8412 start of the loop. */
8415 maybe_eliminate_biv (bl
, loop_start
, loop_end
, eliminate_p
, threshold
,
8417 struct iv_class
*bl
;
8421 int threshold
, insn_count
;
8423 rtx reg
= bl
->biv
->dest_reg
;
8426 /* Scan all insns in the loop, stopping if we find one that uses the
8427 biv in a way that we cannot eliminate. */
8429 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8431 enum rtx_code code
= GET_CODE (p
);
8432 rtx where
= threshold
>= insn_count
? loop_start
: p
;
8434 /* If this is a libcall that sets a giv, skip ahead to its end. */
8435 if (GET_RTX_CLASS (code
) == 'i')
8437 rtx note
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
8441 rtx last
= XEXP (note
, 0);
8442 rtx set
= single_set (last
);
8444 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
8446 int regno
= REGNO (SET_DEST (set
));
8448 if (regno
< max_reg_before_loop
8449 && REG_IV_TYPE (regno
) == GENERAL_INDUCT
8450 && REG_IV_INFO (regno
)->src_reg
== bl
->biv
->src_reg
)
8455 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
8456 && reg_mentioned_p (reg
, PATTERN (p
))
8457 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
8459 if (loop_dump_stream
)
8460 fprintf (loop_dump_stream
,
8461 "Cannot eliminate biv %d: biv used in insn %d.\n",
8462 bl
->regno
, INSN_UID (p
));
8469 if (loop_dump_stream
)
8470 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
8471 bl
->regno
, eliminate_p
? "was" : "can be");
8478 /* INSN and REFERENCE are instructions in the same insn chain.
8479 Return non-zero if INSN is first. */
8482 loop_insn_first_p (insn
, reference
)
8483 rtx insn
, reference
;
8487 for (p
= insn
, q
= reference
; ;)
8489 /* Start with test for not first so that INSN == REFERENCE yields not
8491 if (q
== insn
|| ! p
)
8493 if (p
== reference
|| ! q
)
8496 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8497 previous insn, hence the <= comparison below does not work if
8499 if (INSN_UID (p
) < max_uid_for_loop
8500 && INSN_UID (q
) < max_uid_for_loop
8501 && GET_CODE (p
) != NOTE
)
8502 return INSN_LUID (p
) <= INSN_LUID (q
);
8504 if (INSN_UID (p
) >= max_uid_for_loop
8505 || GET_CODE (p
) == NOTE
)
8507 if (INSN_UID (q
) >= max_uid_for_loop
)
8512 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
8513 the offset that we have to take into account due to auto-increment /
8514 div derivation is zero. */
8516 biv_elimination_giv_has_0_offset (biv
, giv
, insn
)
8517 struct induction
*biv
, *giv
;
8520 /* If the giv V had the auto-inc address optimization applied
8521 to it, and INSN occurs between the giv insn and the biv
8522 insn, then we'd have to adjust the value used here.
8523 This is rare, so we don't bother to make this possible. */
8524 if (giv
->auto_inc_opt
8525 && ((loop_insn_first_p (giv
->insn
, insn
)
8526 && loop_insn_first_p (insn
, biv
->insn
))
8527 || (loop_insn_first_p (biv
->insn
, insn
)
8528 && loop_insn_first_p (insn
, giv
->insn
))))
8531 /* If the giv V was derived from another giv, and INSN does
8532 not occur between the giv insn and the biv insn, then we'd
8533 have to adjust the value used here. This is rare, so we don't
8534 bother to make this possible. */
8535 if (giv
->derived_from
8536 && ! (giv
->always_executed
8537 && loop_insn_first_p (giv
->insn
, insn
)
8538 && loop_insn_first_p (insn
, biv
->insn
)))
8541 && giv
->same
->derived_from
8542 && ! (giv
->same
->always_executed
8543 && loop_insn_first_p (giv
->same
->insn
, insn
)
8544 && loop_insn_first_p (insn
, biv
->insn
)))
8550 /* If BL appears in X (part of the pattern of INSN), see if we can
8551 eliminate its use. If so, return 1. If not, return 0.
8553 If BIV does not appear in X, return 1.
8555 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
8556 where extra insns should be added. Depending on how many items have been
8557 moved out of the loop, it will either be before INSN or at the start of
8561 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
8563 struct iv_class
*bl
;
8567 enum rtx_code code
= GET_CODE (x
);
8568 rtx reg
= bl
->biv
->dest_reg
;
8569 enum machine_mode mode
= GET_MODE (reg
);
8570 struct induction
*v
;
8582 /* If we haven't already been able to do something with this BIV,
8583 we can't eliminate it. */
8589 /* If this sets the BIV, it is not a problem. */
8590 if (SET_DEST (x
) == reg
)
8593 /* If this is an insn that defines a giv, it is also ok because
8594 it will go away when the giv is reduced. */
8595 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8596 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
8600 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
8602 /* Can replace with any giv that was reduced and
8603 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8604 Require a constant for MULT_VAL, so we know it's nonzero.
8605 ??? We disable this optimization to avoid potential
8608 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8609 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
8610 && v
->add_val
== const0_rtx
8611 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8615 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8621 /* If the giv has the opposite direction of change,
8622 then reverse the comparison. */
8623 if (INTVAL (v
->mult_val
) < 0)
8624 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
8625 const0_rtx
, v
->new_reg
);
8629 /* We can probably test that giv's reduced reg. */
8630 if (validate_change (insn
, &SET_SRC (x
), new, 0))
8634 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8635 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8636 Require a constant for MULT_VAL, so we know it's nonzero.
8637 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8638 overflow problem. */
8640 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8641 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
8642 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8644 && (GET_CODE (v
->add_val
) == SYMBOL_REF
8645 || GET_CODE (v
->add_val
) == LABEL_REF
8646 || GET_CODE (v
->add_val
) == CONST
8647 || (GET_CODE (v
->add_val
) == REG
8648 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
8650 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8656 /* If the giv has the opposite direction of change,
8657 then reverse the comparison. */
8658 if (INTVAL (v
->mult_val
) < 0)
8659 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
8662 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
8663 copy_rtx (v
->add_val
));
8665 /* Replace biv with the giv's reduced register. */
8666 update_reg_last_use (v
->add_val
, insn
);
8667 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
8670 /* Insn doesn't support that constant or invariant. Copy it
8671 into a register (it will be a loop invariant.) */
8672 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
8674 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
8677 /* Substitute the new register for its invariant value in
8678 the compare expression. */
8679 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
8680 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
8689 case GT
: case GE
: case GTU
: case GEU
:
8690 case LT
: case LE
: case LTU
: case LEU
:
8691 /* See if either argument is the biv. */
8692 if (XEXP (x
, 0) == reg
)
8693 arg
= XEXP (x
, 1), arg_operand
= 1;
8694 else if (XEXP (x
, 1) == reg
)
8695 arg
= XEXP (x
, 0), arg_operand
= 0;
8699 if (CONSTANT_P (arg
))
8701 /* First try to replace with any giv that has constant positive
8702 mult_val and constant add_val. We might be able to support
8703 negative mult_val, but it seems complex to do it in general. */
8705 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8706 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
8707 && (GET_CODE (v
->add_val
) == SYMBOL_REF
8708 || GET_CODE (v
->add_val
) == LABEL_REF
8709 || GET_CODE (v
->add_val
) == CONST
8710 || (GET_CODE (v
->add_val
) == REG
8711 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
8712 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8715 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8721 /* Replace biv with the giv's reduced reg. */
8722 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
8724 /* If all constants are actually constant integers and
8725 the derived constant can be directly placed in the COMPARE,
8727 if (GET_CODE (arg
) == CONST_INT
8728 && GET_CODE (v
->mult_val
) == CONST_INT
8729 && GET_CODE (v
->add_val
) == CONST_INT
8730 && validate_change (insn
, &XEXP (x
, arg_operand
),
8731 GEN_INT (INTVAL (arg
)
8732 * INTVAL (v
->mult_val
)
8733 + INTVAL (v
->add_val
)), 0))
8736 /* Otherwise, load it into a register. */
8737 tem
= gen_reg_rtx (mode
);
8738 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
8739 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
8742 /* If that failed, put back the change we made above. */
8743 XEXP (x
, 1-arg_operand
) = reg
;
8746 /* Look for giv with positive constant mult_val and nonconst add_val.
8747 Insert insns to calculate new compare value.
8748 ??? Turn this off due to possible overflow. */
8750 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8751 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
8752 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8758 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8764 tem
= gen_reg_rtx (mode
);
8766 /* Replace biv with giv's reduced register. */
8767 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
8770 /* Compute value to compare against. */
8771 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
8772 /* Use it in this insn. */
8773 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8774 if (apply_change_group ())
8778 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
8780 if (invariant_p (arg
) == 1)
8782 /* Look for giv with constant positive mult_val and nonconst
8783 add_val. Insert insns to compute new compare value.
8784 ??? Turn this off due to possible overflow. */
8786 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8787 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
8788 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8794 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8800 tem
= gen_reg_rtx (mode
);
8802 /* Replace biv with giv's reduced register. */
8803 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
8806 /* Compute value to compare against. */
8807 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
8809 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8810 if (apply_change_group ())
8815 /* This code has problems. Basically, you can't know when
8816 seeing if we will eliminate BL, whether a particular giv
8817 of ARG will be reduced. If it isn't going to be reduced,
8818 we can't eliminate BL. We can try forcing it to be reduced,
8819 but that can generate poor code.
8821 The problem is that the benefit of reducing TV, below should
8822 be increased if BL can actually be eliminated, but this means
8823 we might have to do a topological sort of the order in which
8824 we try to process biv. It doesn't seem worthwhile to do
8825 this sort of thing now. */
8828 /* Otherwise the reg compared with had better be a biv. */
8829 if (GET_CODE (arg
) != REG
8830 || REG_IV_TYPE (REGNO (arg
)) != BASIC_INDUCT
)
8833 /* Look for a pair of givs, one for each biv,
8834 with identical coefficients. */
8835 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8837 struct induction
*tv
;
8839 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
8842 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
8843 if (! tv
->ignore
&& ! tv
->maybe_dead
8844 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
8845 && rtx_equal_p (tv
->add_val
, v
->add_val
)
8846 && tv
->mode
== mode
)
8848 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8854 /* Replace biv with its giv's reduced reg. */
8855 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
8856 /* Replace other operand with the other giv's
8858 XEXP (x
, arg_operand
) = tv
->new_reg
;
8865 /* If we get here, the biv can't be eliminated. */
8869 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8870 biv is used in it, since it will be replaced. */
8871 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8872 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
8880 /* See if any subexpression fails elimination. */
8881 fmt
= GET_RTX_FORMAT (code
);
8882 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8887 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
8888 eliminate_p
, where
))
8893 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8894 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
8895 eliminate_p
, where
))
8904 /* Return nonzero if the last use of REG
8905 is in an insn following INSN in the same basic block. */
8908 last_use_this_basic_block (reg
, insn
)
8914 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
8917 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
8923 /* Called via `note_stores' to record the initial value of a biv. Here we
8924 just record the location of the set and process it later. */
8927 record_initial (dest
, set
, data
)
8930 void *data ATTRIBUTE_UNUSED
;
8932 struct iv_class
*bl
;
8934 if (GET_CODE (dest
) != REG
8935 || REGNO (dest
) >= max_reg_before_loop
8936 || REG_IV_TYPE (REGNO (dest
)) != BASIC_INDUCT
)
8939 bl
= reg_biv_class
[REGNO (dest
)];
8941 /* If this is the first set found, record it. */
8942 if (bl
->init_insn
== 0)
8944 bl
->init_insn
= note_insn
;
8949 /* If any of the registers in X are "old" and currently have a last use earlier
8950 than INSN, update them to have a last use of INSN. Their actual last use
8951 will be the previous insn but it will not have a valid uid_luid so we can't
8955 update_reg_last_use (x
, insn
)
8959 /* Check for the case where INSN does not have a valid luid. In this case,
8960 there is no need to modify the regno_last_uid, as this can only happen
8961 when code is inserted after the loop_end to set a pseudo's final value,
8962 and hence this insn will never be the last use of x. */
8963 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
8964 && INSN_UID (insn
) < max_uid_for_loop
8965 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
8966 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
8970 register const char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
8971 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
8974 update_reg_last_use (XEXP (x
, i
), insn
);
8975 else if (fmt
[i
] == 'E')
8976 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8977 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
8982 /* Given a jump insn JUMP, return the condition that will cause it to branch
8983 to its JUMP_LABEL. If the condition cannot be understood, or is an
8984 inequality floating-point comparison which needs to be reversed, 0 will
8987 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8988 insn used in locating the condition was found. If a replacement test
8989 of the condition is desired, it should be placed in front of that
8990 insn and we will be sure that the inputs are still valid.
8992 The condition will be returned in a canonical form to simplify testing by
8993 callers. Specifically:
8995 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8996 (2) Both operands will be machine operands; (cc0) will have been replaced.
8997 (3) If an operand is a constant, it will be the second operand.
8998 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8999 for GE, GEU, and LEU. */
9002 get_condition (jump
, earliest
)
9011 int reverse_code
= 0;
9012 int did_reverse_condition
= 0;
9013 enum machine_mode mode
;
9015 /* If this is not a standard conditional jump, we can't parse it. */
9016 if (GET_CODE (jump
) != JUMP_INSN
9017 || ! condjump_p (jump
) || simplejump_p (jump
))
9020 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
9021 mode
= GET_MODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
9022 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
9023 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
9028 /* If this branches to JUMP_LABEL when the condition is false, reverse
9030 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
9031 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
9032 code
= reverse_condition (code
), did_reverse_condition
^= 1;
9034 /* If we are comparing a register with zero, see if the register is set
9035 in the previous insn to a COMPARE or a comparison operation. Perform
9036 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9039 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
9041 /* Set non-zero when we find something of interest. */
9045 /* If comparison with cc0, import actual comparison from compare
9049 if ((prev
= prev_nonnote_insn (prev
)) == 0
9050 || GET_CODE (prev
) != INSN
9051 || (set
= single_set (prev
)) == 0
9052 || SET_DEST (set
) != cc0_rtx
)
9055 op0
= SET_SRC (set
);
9056 op1
= CONST0_RTX (GET_MODE (op0
));
9062 /* If this is a COMPARE, pick up the two things being compared. */
9063 if (GET_CODE (op0
) == COMPARE
)
9065 op1
= XEXP (op0
, 1);
9066 op0
= XEXP (op0
, 0);
9069 else if (GET_CODE (op0
) != REG
)
9072 /* Go back to the previous insn. Stop if it is not an INSN. We also
9073 stop if it isn't a single set or if it has a REG_INC note because
9074 we don't want to bother dealing with it. */
9076 if ((prev
= prev_nonnote_insn (prev
)) == 0
9077 || GET_CODE (prev
) != INSN
9078 || FIND_REG_INC_NOTE (prev
, 0)
9079 || (set
= single_set (prev
)) == 0)
9082 /* If this is setting OP0, get what it sets it to if it looks
9084 if (rtx_equal_p (SET_DEST (set
), op0
))
9086 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
9088 /* ??? We may not combine comparisons done in a CCmode with
9089 comparisons not done in a CCmode. This is to aid targets
9090 like Alpha that have an IEEE compliant EQ instruction, and
9091 a non-IEEE compliant BEQ instruction. The use of CCmode is
9092 actually artificial, simply to prevent the combination, but
9093 should not affect other platforms.
9095 However, we must allow VOIDmode comparisons to match either
9096 CCmode or non-CCmode comparison, because some ports have
9097 modeless comparisons inside branch patterns.
9099 ??? This mode check should perhaps look more like the mode check
9100 in simplify_comparison in combine. */
9102 if ((GET_CODE (SET_SRC (set
)) == COMPARE
9105 && GET_MODE_CLASS (inner_mode
) == MODE_INT
9106 && (GET_MODE_BITSIZE (inner_mode
)
9107 <= HOST_BITS_PER_WIDE_INT
)
9108 && (STORE_FLAG_VALUE
9109 & ((HOST_WIDE_INT
) 1
9110 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
9111 #ifdef FLOAT_STORE_FLAG_VALUE
9113 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
9114 && (REAL_VALUE_NEGATIVE
9115 (FLOAT_STORE_FLAG_VALUE (inner_mode
))))
9118 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'))
9119 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
9120 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
9121 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
9123 else if (((code
== EQ
9125 && (GET_MODE_BITSIZE (inner_mode
)
9126 <= HOST_BITS_PER_WIDE_INT
)
9127 && GET_MODE_CLASS (inner_mode
) == MODE_INT
9128 && (STORE_FLAG_VALUE
9129 & ((HOST_WIDE_INT
) 1
9130 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
9131 #ifdef FLOAT_STORE_FLAG_VALUE
9133 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
9134 && (REAL_VALUE_NEGATIVE
9135 (FLOAT_STORE_FLAG_VALUE (inner_mode
))))
9138 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'
9139 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
9140 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
9141 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
9144 /* We might have reversed a LT to get a GE here. But this wasn't
9145 actually the comparison of data, so we don't flag that we
9146 have had to reverse the condition. */
9147 did_reverse_condition
^= 1;
9155 else if (reg_set_p (op0
, prev
))
9156 /* If this sets OP0, but not directly, we have to give up. */
9161 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
9162 code
= GET_CODE (x
);
9165 code
= reverse_condition (code
);
9166 if (code
== UNKNOWN
)
9168 did_reverse_condition
^= 1;
9172 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
9178 /* If constant is first, put it last. */
9179 if (CONSTANT_P (op0
))
9180 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
9182 /* If OP0 is the result of a comparison, we weren't able to find what
9183 was really being compared, so fail. */
9184 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
9187 /* Canonicalize any ordered comparison with integers involving equality
9188 if we can do computations in the relevant mode and we do not
9191 if (GET_CODE (op1
) == CONST_INT
9192 && GET_MODE (op0
) != VOIDmode
9193 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
9195 HOST_WIDE_INT const_val
= INTVAL (op1
);
9196 unsigned HOST_WIDE_INT uconst_val
= const_val
;
9197 unsigned HOST_WIDE_INT max_val
9198 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
9203 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
9204 code
= LT
, op1
= GEN_INT (const_val
+ 1);
9207 /* When cross-compiling, const_val might be sign-extended from
9208 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9210 if ((HOST_WIDE_INT
) (const_val
& max_val
)
9211 != (((HOST_WIDE_INT
) 1
9212 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
9213 code
= GT
, op1
= GEN_INT (const_val
- 1);
9217 if (uconst_val
< max_val
)
9218 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
9222 if (uconst_val
!= 0)
9223 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
9231 /* If this was floating-point and we reversed anything other than an
9232 EQ or NE or (UN)ORDERED, return zero. */
9233 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
9234 && did_reverse_condition
9235 && code
!= NE
&& code
!= EQ
&& code
!= UNORDERED
&& code
!= ORDERED
9237 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
9241 /* Never return CC0; return zero instead. */
9246 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
9249 /* Similar to above routine, except that we also put an invariant last
9250 unless both operands are invariants. */
9253 get_condition_for_loop (x
)
9256 rtx comparison
= get_condition (x
, NULL_PTR
);
9259 || ! invariant_p (XEXP (comparison
, 0))
9260 || invariant_p (XEXP (comparison
, 1)))
9263 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
9264 XEXP (comparison
, 1), XEXP (comparison
, 0));
9267 #ifdef HAVE_decrement_and_branch_on_count
9268 /* Instrument loop for insertion of bct instruction. We distinguish between
9269 loops with compile-time bounds and those with run-time bounds.
9270 Information from loop_iterations() is used to compute compile-time bounds.
9271 Run-time bounds should use loop preconditioning, but currently ignored.
9278 unsigned HOST_WIDE_INT n_iterations
;
9279 rtx loop_start
= loop
->start
;
9280 rtx loop_end
= loop
->end
;
9281 struct loop_info
*loop_info
= loop
->info
;
9282 int loop_num
= loop
->num
;
9285 int increment_direction
, compare_direction
;
9286 /* If the loop condition is <= or >=, the number of iteration
9287 is 1 more than the range of the bounds of the loop. */
9288 int add_iteration
= 0;
9289 enum machine_mode loop_var_mode
= word_mode
;
9292 /* It's impossible to instrument a competely unrolled loop. */
9293 if (loop_info
->unroll_number
== loop_info
->n_iterations
)
9296 /* Make sure that the count register is not in use. */
9297 if (loop_info
->used_count_register
)
9299 if (loop_dump_stream
)
9300 fprintf (loop_dump_stream
,
9301 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
9306 /* Make sure that the function has no indirect jumps. */
9307 if (indirect_jump_in_function
)
9309 if (loop_dump_stream
)
9310 fprintf (loop_dump_stream
,
9311 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
9316 /* Make sure that the last loop insn is a conditional jump. */
9317 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
9318 || ! condjump_p (PREV_INSN (loop_end
))
9319 || simplejump_p (PREV_INSN (loop_end
)))
9321 if (loop_dump_stream
)
9322 fprintf (loop_dump_stream
,
9323 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
9328 /* Make sure that the loop does not contain a function call
9329 (the count register might be altered by the called function). */
9330 if (loop_info
->has_call
)
9332 if (loop_dump_stream
)
9333 fprintf (loop_dump_stream
,
9334 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
9339 /* Make sure that the loop does not jump via a table.
9340 (the count register might be used to perform the branch on table). */
9341 if (loop_info
->has_tablejump
)
9343 if (loop_dump_stream
)
9344 fprintf (loop_dump_stream
,
9345 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
9350 /* Account for loop unrolling in instrumented iteration count. */
9351 if (loop_info
->unroll_number
> 1)
9352 n_iterations
= loop_info
->n_iterations
/ loop_info
->unroll_number
;
9354 n_iterations
= loop_info
->n_iterations
;
9356 if (n_iterations
!= 0 && n_iterations
< 3)
9358 /* Allow an enclosing outer loop to benefit if possible. */
9359 if (loop_dump_stream
)
9360 fprintf (loop_dump_stream
,
9361 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
9366 /* Try to instrument the loop. */
9368 /* Handle the simpler case, where the bounds are known at compile time. */
9369 if (n_iterations
> 0)
9371 struct loop
*outer_loop
;
9372 struct loop_info
*outer_loop_info
;
9374 /* Mark all enclosing loops that they cannot use count register. */
9375 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
9377 outer_loop_info
= outer_loop
->info
;
9378 outer_loop_info
->used_count_register
= 1;
9380 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
9384 /* Handle the more complex case, that the bounds are NOT known
9385 at compile time. In this case we generate run_time calculation
9386 of the number of iterations. */
9388 if (loop_info
->iteration_var
== 0)
9390 if (loop_dump_stream
)
9391 fprintf (loop_dump_stream
,
9392 "insert_bct %d: BCT Runtime Instrumentation failed: no loop iteration variable found\n",
9397 if (GET_MODE_CLASS (GET_MODE (loop_info
->iteration_var
)) != MODE_INT
9398 || GET_MODE_SIZE (GET_MODE (loop_info
->iteration_var
)) != UNITS_PER_WORD
)
9400 if (loop_dump_stream
)
9401 fprintf (loop_dump_stream
,
9402 "insert_bct %d: BCT Runtime Instrumentation failed: loop variable not integer\n",
9407 /* With runtime bounds, if the compare is of the form '!=' we give up */
9408 if (loop_info
->comparison_code
== NE
)
9410 if (loop_dump_stream
)
9411 fprintf (loop_dump_stream
,
9412 "insert_bct %d: BCT Runtime Instrumentation failed: runtime bounds with != comparison\n",
9416 /* Use common loop preconditioning code instead. */
9420 /* We rely on the existence of run-time guard to ensure that the
9421 loop executes at least once. */
9423 rtx iterations_num_reg
;
9425 unsigned HOST_WIDE_INT increment_value_abs
9426 = INTVAL (increment
) * increment_direction
;
9428 /* make sure that the increment is a power of two, otherwise (an
9429 expensive) divide is needed. */
9430 if (exact_log2 (increment_value_abs
) == -1)
9432 if (loop_dump_stream
)
9433 fprintf (loop_dump_stream
,
9434 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
9438 /* compute the number of iterations */
9443 /* Again, the number of iterations is calculated by:
9445 ; compare-val - initial-val + (increment -1) + additional-iteration
9446 ; num_iterations = -----------------------------------------------------------------
9449 /* ??? Do we have to call copy_rtx here before passing rtx to
9451 if (compare_direction
> 0)
9453 /* <, <= :the loop variable is increasing */
9454 temp_reg
= expand_binop (loop_var_mode
, sub_optab
,
9455 comparison_value
, initial_value
,
9456 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
9460 temp_reg
= expand_binop (loop_var_mode
, sub_optab
,
9461 initial_value
, comparison_value
,
9462 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
9465 if (increment_value_abs
- 1 + add_iteration
!= 0)
9466 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
9467 GEN_INT (increment_value_abs
- 1
9469 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
9471 if (increment_value_abs
!= 1)
9472 iterations_num_reg
= expand_binop (loop_var_mode
, asr_optab
,
9474 GEN_INT (exact_log2 (increment_value_abs
)),
9475 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
9477 iterations_num_reg
= temp_reg
;
9479 sequence
= gen_sequence ();
9481 emit_insn_before (sequence
, loop_start
);
9482 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
9486 #endif /* Complex case */
9489 /* Instrument loop by inserting a bct in it as follows:
9490 1. A new counter register is created.
9491 2. In the head of the loop the new variable is initialized to the value
9492 passed in the loop_num_iterations parameter.
9493 3. At the end of the loop, comparison of the register with 0 is generated.
9494 The created comparison follows the pattern defined for the
9495 decrement_and_branch_on_count insn, so this insn will be generated.
9496 4. The branch on the old variable are deleted. The compare must remain
9497 because it might be used elsewhere. If the loop-variable or condition
9498 register are used elsewhere, they will be eliminated by flow. */
9501 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
9502 rtx loop_start
, loop_end
;
9503 rtx loop_num_iterations
;
9509 if (HAVE_decrement_and_branch_on_count
)
9511 if (loop_dump_stream
)
9513 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream
);
9514 if (GET_CODE (loop_num_iterations
) == CONST_INT
)
9515 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
,
9516 INTVAL (loop_num_iterations
));
9518 fputs ("runtime", loop_dump_stream
);
9519 fputs (" iterations)", loop_dump_stream
);
9522 /* Discard original jump to continue loop. Original compare result
9523 may still be live, so it cannot be discarded explicitly. */
9524 delete_insn (PREV_INSN (loop_end
));
9526 /* Insert the label which will delimit the start of the loop. */
9527 start_label
= gen_label_rtx ();
9528 emit_label_after (start_label
, loop_start
);
9530 /* Insert initialization of the count register into the loop header. */
9532 counter_reg
= gen_reg_rtx (word_mode
);
9533 emit_insn (gen_move_insn (counter_reg
, loop_num_iterations
));
9534 sequence
= gen_sequence ();
9536 emit_insn_before (sequence
, loop_start
);
9538 /* Insert new comparison on the count register instead of the
9539 old one, generating the needed BCT pattern (that will be
9540 later recognized by assembly generation phase). */
9541 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg
,
9544 LABEL_NUSES (start_label
)++;
9548 #endif /* HAVE_decrement_and_branch_on_count */
9550 /* Scan the function and determine whether it has indirect (computed) jumps.
9552 This is taken mostly from flow.c; similar code exists elsewhere
9553 in the compiler. It may be useful to put this into rtlanal.c. */
9555 indirect_jump_in_function_p (start
)
9560 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
9561 if (computed_jump_p (insn
))
9567 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9568 documentation for LOOP_MEMS for the definition of `appropriate'.
9569 This function is called from prescan_loop via for_each_rtx. */
9572 insert_loop_mem (mem
, data
)
9574 void *data ATTRIBUTE_UNUSED
;
9582 switch (GET_CODE (m
))
9588 /* We're not interested in MEMs that are only clobbered. */
9592 /* We're not interested in the MEM associated with a
9593 CONST_DOUBLE, so there's no need to traverse into this. */
9597 /* We're not interested in any MEMs that only appear in notes. */
9601 /* This is not a MEM. */
9605 /* See if we've already seen this MEM. */
9606 for (i
= 0; i
< loop_mems_idx
; ++i
)
9607 if (rtx_equal_p (m
, loop_mems
[i
].mem
))
9609 if (GET_MODE (m
) != GET_MODE (loop_mems
[i
].mem
))
9610 /* The modes of the two memory accesses are different. If
9611 this happens, something tricky is going on, and we just
9612 don't optimize accesses to this MEM. */
9613 loop_mems
[i
].optimize
= 0;
9618 /* Resize the array, if necessary. */
9619 if (loop_mems_idx
== loop_mems_allocated
)
9621 if (loop_mems_allocated
!= 0)
9622 loop_mems_allocated
*= 2;
9624 loop_mems_allocated
= 32;
9626 loop_mems
= (loop_mem_info
*)
9627 xrealloc (loop_mems
,
9628 loop_mems_allocated
* sizeof (loop_mem_info
));
9631 /* Actually insert the MEM. */
9632 loop_mems
[loop_mems_idx
].mem
= m
;
9633 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9634 because we can't put it in a register. We still store it in the
9635 table, though, so that if we see the same address later, but in a
9636 non-BLK mode, we'll not think we can optimize it at that point. */
9637 loop_mems
[loop_mems_idx
].optimize
= (GET_MODE (m
) != BLKmode
);
9638 loop_mems
[loop_mems_idx
].reg
= NULL_RTX
;
9644 /* Like load_mems, but also ensures that SET_IN_LOOP,
9645 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
9646 values after load_mems. */
9649 load_mems_and_recount_loop_regs_set (loop
, insn_count
)
9650 const struct loop
*loop
;
9653 int nregs
= max_reg_num ();
9657 /* Recalculate set_in_loop and friends since load_mems may have
9658 created new registers. */
9659 if (max_reg_num () > nregs
)
9665 nregs
= max_reg_num ();
9667 if ((unsigned) nregs
> set_in_loop
->num_elements
)
9669 /* Grow all the arrays. */
9670 VARRAY_GROW (set_in_loop
, nregs
);
9671 VARRAY_GROW (n_times_set
, nregs
);
9672 VARRAY_GROW (may_not_optimize
, nregs
);
9673 VARRAY_GROW (reg_single_usage
, nregs
);
9675 /* Clear the arrays */
9676 bzero ((char *) &set_in_loop
->data
, nregs
* sizeof (int));
9677 bzero ((char *) &may_not_optimize
->data
, nregs
* sizeof (char));
9678 bzero ((char *) ®_single_usage
->data
, nregs
* sizeof (rtx
));
9680 count_loop_regs_set (loop
->top
? loop
->top
: loop
->start
, loop
->end
,
9681 may_not_optimize
, reg_single_usage
,
9684 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
9686 VARRAY_CHAR (may_not_optimize
, i
) = 1;
9687 VARRAY_INT (set_in_loop
, i
) = 1;
9690 #ifdef AVOID_CCMODE_COPIES
9691 /* Don't try to move insns which set CC registers if we should not
9692 create CCmode register copies. */
9693 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
9694 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
9695 VARRAY_CHAR (may_not_optimize
, i
) = 1;
9698 /* Set n_times_set for the new registers. */
9699 bcopy ((char *) (&set_in_loop
->data
.i
[0] + old_nregs
),
9700 (char *) (&n_times_set
->data
.i
[0] + old_nregs
),
9701 (nregs
- old_nregs
) * sizeof (int));
9705 /* Move MEMs into registers for the duration of the loop. */
9709 const struct loop
*loop
;
9711 int maybe_never
= 0;
9714 rtx label
= NULL_RTX
;
9715 rtx end_label
= NULL_RTX
;
9716 /* Nonzero if the next instruction may never be executed. */
9717 int next_maybe_never
= 0;
9718 int last_max_reg
= max_reg_num ();
9720 if (loop_mems_idx
== 0)
9723 /* Check to see if it's possible that some instructions in the
9724 loop are never executed. */
9725 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
9726 p
!= NULL_RTX
&& ! maybe_never
;
9727 p
= next_insn_in_loop (loop
, p
))
9729 if (GET_CODE (p
) == CODE_LABEL
)
9731 else if (GET_CODE (p
) == JUMP_INSN
9732 /* If we enter the loop in the middle, and scan
9733 around to the beginning, don't set maybe_never
9734 for that. This must be an unconditional jump,
9735 otherwise the code at the top of the loop might
9736 never be executed. Unconditional jumps are
9737 followed a by barrier then loop end. */
9738 && ! (GET_CODE (p
) == JUMP_INSN
9739 && JUMP_LABEL (p
) == loop
->top
9740 && NEXT_INSN (NEXT_INSN (p
)) == loop
->end
9741 && simplejump_p (p
)))
9743 if (!condjump_p (p
))
9744 /* Something complicated. */
9747 /* If there are any more instructions in the loop, they
9748 might not be reached. */
9749 next_maybe_never
= 1;
9751 else if (next_maybe_never
)
9755 /* Actually move the MEMs. */
9756 for (i
= 0; i
< loop_mems_idx
; ++i
)
9761 rtx mem
= loop_mems
[i
].mem
;
9764 if (MEM_VOLATILE_P (mem
)
9765 || invariant_p (XEXP (mem
, 0)) != 1)
9766 /* There's no telling whether or not MEM is modified. */
9767 loop_mems
[i
].optimize
= 0;
9769 /* Go through the MEMs written to in the loop to see if this
9770 one is aliased by one of them. */
9771 mem_list_entry
= loop_store_mems
;
9772 while (mem_list_entry
)
9774 if (rtx_equal_p (mem
, XEXP (mem_list_entry
, 0)))
9776 else if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
9779 /* MEM is indeed aliased by this store. */
9780 loop_mems
[i
].optimize
= 0;
9783 mem_list_entry
= XEXP (mem_list_entry
, 1);
9786 if (flag_float_store
&& written
9787 && GET_MODE_CLASS (GET_MODE (mem
)) == MODE_FLOAT
)
9788 loop_mems
[i
].optimize
= 0;
9790 /* If this MEM is written to, we must be sure that there
9791 are no reads from another MEM that aliases this one. */
9792 if (loop_mems
[i
].optimize
&& written
)
9796 for (j
= 0; j
< loop_mems_idx
; ++j
)
9800 else if (true_dependence (mem
,
9805 /* It's not safe to hoist loop_mems[i] out of
9806 the loop because writes to it might not be
9807 seen by reads from loop_mems[j]. */
9808 loop_mems
[i
].optimize
= 0;
9814 if (maybe_never
&& may_trap_p (mem
))
9815 /* We can't access the MEM outside the loop; it might
9816 cause a trap that wouldn't have happened otherwise. */
9817 loop_mems
[i
].optimize
= 0;
9819 if (!loop_mems
[i
].optimize
)
9820 /* We thought we were going to lift this MEM out of the
9821 loop, but later discovered that we could not. */
9824 INIT_REG_SET (&copies
);
9826 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9827 order to keep scan_loop from moving stores to this MEM
9828 out of the loop just because this REG is neither a
9829 user-variable nor used in the loop test. */
9830 reg
= gen_reg_rtx (GET_MODE (mem
));
9831 REG_USERVAR_P (reg
) = 1;
9832 loop_mems
[i
].reg
= reg
;
9834 /* Now, replace all references to the MEM with the
9835 corresponding pesudos. */
9837 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
9839 p
= next_insn_in_loop (loop
, p
))
9844 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
9846 /* See if this copies the mem into a register that isn't
9847 modified afterwards. We'll try to do copy propagation
9848 a little further on. */
9849 set
= single_set (p
);
9851 /* @@@ This test is _way_ too conservative. */
9853 && GET_CODE (SET_DEST (set
)) == REG
9854 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
9855 && REGNO (SET_DEST (set
)) < last_max_reg
9856 && VARRAY_INT (n_times_set
, REGNO (SET_DEST (set
))) == 1
9857 && rtx_equal_p (SET_SRC (set
), loop_mems
[i
].mem
))
9858 SET_REGNO_REG_SET (&copies
, REGNO (SET_DEST (set
)));
9861 for_each_rtx (&p
, replace_loop_mem
, &ri
);
9864 if (GET_CODE (p
) == CODE_LABEL
9865 || GET_CODE (p
) == JUMP_INSN
)
9869 if (! apply_change_group ())
9870 /* We couldn't replace all occurrences of the MEM. */
9871 loop_mems
[i
].optimize
= 0;
9877 /* Load the memory immediately before START, which is
9878 the NOTE_LOOP_BEG. */
9879 set
= gen_move_insn (reg
, mem
);
9880 emit_insn_before (set
, loop
->start
);
9884 if (label
== NULL_RTX
)
9886 /* We must compute the former
9887 right-after-the-end label before we insert
9889 end_label
= next_label (loop
->end
);
9890 label
= gen_label_rtx ();
9891 emit_label_after (label
, loop
->end
);
9894 /* Store the memory immediately after END, which is
9895 the NOTE_LOOP_END. */
9896 set
= gen_move_insn (copy_rtx (mem
), reg
);
9897 emit_insn_after (set
, label
);
9900 if (loop_dump_stream
)
9902 fprintf (loop_dump_stream
, "Hoisted regno %d %s from ",
9903 REGNO (reg
), (written
? "r/w" : "r/o"));
9904 print_rtl (loop_dump_stream
, mem
);
9905 fputc ('\n', loop_dump_stream
);
9908 /* Attempt a bit of copy propagation. This helps untangle the
9909 data flow, and enables {basic,general}_induction_var to find
9911 EXECUTE_IF_SET_IN_REG_SET
9912 (&copies
, FIRST_PSEUDO_REGISTER
, j
,
9914 try_copy_prop (loop
, loop_mems
[i
].reg
, j
);
9916 CLEAR_REG_SET (&copies
);
9920 if (label
!= NULL_RTX
)
9922 /* Now, we need to replace all references to the previous exit
9923 label with the new one. */
9928 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
9930 for_each_rtx (&p
, replace_label
, &rr
);
9932 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9933 field. This is not handled by for_each_rtx because it doesn't
9934 handle unprinted ('0') fields. We need to update JUMP_LABEL
9935 because the immediately following unroll pass will use it.
9936 replace_label would not work anyways, because that only handles
9938 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == end_label
)
9939 JUMP_LABEL (p
) = label
;
9944 /* For communication between note_reg_stored and its caller. */
9945 struct note_reg_stored_arg
9951 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9954 note_reg_stored (x
, setter
, arg
)
9955 rtx x
, setter ATTRIBUTE_UNUSED
;
9958 struct note_reg_stored_arg
*t
= (struct note_reg_stored_arg
*)arg
;
9963 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9964 There must be exactly one insn that sets this pseudo; it will be
9965 deleted if all replacements succeed and we can prove that the register
9966 is not used after the loop.
9967 The arguments SCAN_START, LOOP_TOP and END are as in load_mems. */
9969 try_copy_prop (loop
, replacement
, regno
)
9970 const struct loop
*loop
;
9974 /* This is the reg that we are copying from. */
9975 rtx reg_rtx
= regno_reg_rtx
[regno
];
9978 /* These help keep track of whether we replaced all uses of the reg. */
9979 int replaced_last
= 0;
9980 int store_is_first
= 0;
9982 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
9984 insn
= next_insn_in_loop (loop
, insn
))
9988 /* Only substitute within one extended basic block from the initializing
9990 if (GET_CODE (insn
) == CODE_LABEL
&& init_insn
)
9993 if (GET_RTX_CLASS (GET_CODE (insn
)) != 'i')
9996 /* Is this the initializing insn? */
9997 set
= single_set (insn
);
9999 && GET_CODE (SET_DEST (set
)) == REG
10000 && REGNO (SET_DEST (set
)) == regno
)
10006 if (REGNO_FIRST_UID (regno
) == INSN_UID (insn
))
10007 store_is_first
= 1;
10010 /* Only substitute after seeing the initializing insn. */
10011 if (init_insn
&& insn
!= init_insn
)
10013 struct note_reg_stored_arg arg
;
10015 array
[0] = reg_rtx
;
10016 array
[1] = replacement
;
10019 for_each_rtx (&insn
, replace_loop_reg
, array
);
10020 if (REGNO_LAST_UID (regno
) == INSN_UID (insn
))
10023 /* Stop replacing when REPLACEMENT is modified. */
10024 arg
.reg
= replacement
;
10026 note_stores (PATTERN (insn
), note_reg_stored
, &arg
);
10033 if (apply_change_group ())
10035 if (loop_dump_stream
)
10036 fprintf (loop_dump_stream
, " Replaced reg %d", regno
);
10037 if (store_is_first
&& replaced_last
)
10039 PUT_CODE (init_insn
, NOTE
);
10040 NOTE_LINE_NUMBER (init_insn
) = NOTE_INSN_DELETED
;
10041 if (loop_dump_stream
)
10042 fprintf (loop_dump_stream
, ", deleting init_insn (%d)",
10043 INSN_UID (init_insn
));
10045 if (loop_dump_stream
)
10046 fprintf (loop_dump_stream
, ".\n");
10050 /* Replace MEM with its associated pseudo register. This function is
10051 called from load_mems via for_each_rtx. DATA is actually an
10052 rtx_and_int * describing the instruction currently being scanned
10053 and the MEM we are currently replacing. */
10056 replace_loop_mem (mem
, data
)
10068 switch (GET_CODE (m
))
10074 /* We're not interested in the MEM associated with a
10075 CONST_DOUBLE, so there's no need to traverse into one. */
10079 /* This is not a MEM. */
10083 ri
= (rtx_and_int
*) data
;
10086 if (!rtx_equal_p (loop_mems
[i
].mem
, m
))
10087 /* This is not the MEM we are currently replacing. */
10092 /* Actually replace the MEM. */
10093 validate_change (insn
, mem
, loop_mems
[i
].reg
, 1);
10098 /* Replace one register with another. Called through for_each_rtx; PX points
10099 to the rtx being scanned. DATA is actually an array of three rtx's; the
10100 first one is the one to be replaced, and the second one the replacement.
10101 The third one is the current insn. */
10104 replace_loop_reg (px
, data
)
10109 rtx
*array
= (rtx
*)data
;
10115 validate_change (array
[2], px
, array
[1], 1);
10120 /* Replace occurrences of the old exit label for the loop with the new
10121 one. DATA is an rtx_pair containing the old and new labels,
10125 replace_label (x
, data
)
10130 rtx old_label
= ((rtx_pair
*) data
)->r1
;
10131 rtx new_label
= ((rtx_pair
*) data
)->r2
;
10136 if (GET_CODE (l
) != LABEL_REF
)
10139 if (XEXP (l
, 0) != old_label
)
10142 XEXP (l
, 0) = new_label
;
10143 ++LABEL_NUSES (new_label
);
10144 --LABEL_NUSES (old_label
);