]> git.ipfire.org Git - thirdparty/gcc.git/blob - gcc/lra-eliminations.c
* cfgbuild.c (inside_basic_block_p): Use JUMP_TABLE_DATA_P in lieu
[thirdparty/gcc.git] / gcc / lra-eliminations.c
1 /* Code for RTL register eliminations.
2 Copyright (C) 2010-2013 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 /* Eliminable registers (like a soft argument or frame pointer) are
22 widely used in RTL. These eliminable registers should be replaced
23 by real hard registers (like the stack pointer or hard frame
24 pointer) plus some offset. The offsets usually change whenever the
25 stack is expanded. We know the final offsets only at the very end
26 of LRA.
27
28 Within LRA, we usually keep the RTL in such a state that the
29 eliminable registers can be replaced by just the corresponding hard
30 register (without any offset). To achieve this we should add the
31 initial elimination offset at the beginning of LRA and update the
32 offsets whenever the stack is expanded. We need to do this before
33 every constraint pass because the choice of offset often affects
34 whether a particular address or memory constraint is satisfied.
35
36 We keep RTL code at most time in such state that the virtual
37 registers can be changed by just the corresponding hard registers
38 (with zero offsets) and we have the right RTL code. To achieve this
39 we should add initial offset at the beginning of LRA work and update
40 offsets after each stack expanding. But actually we update virtual
41 registers to the same virtual registers + corresponding offsets
42 before every constraint pass because it affects constraint
43 satisfaction (e.g. an address displacement became too big for some
44 target).
45
46 The final change of eliminable registers to the corresponding hard
47 registers are done at the very end of LRA when there were no change
48 in offsets anymore:
49
50 fp + 42 => sp + 42
51
52 */
53
54 #include "config.h"
55 #include "system.h"
56 #include "coretypes.h"
57 #include "tm.h"
58 #include "hard-reg-set.h"
59 #include "rtl.h"
60 #include "tm_p.h"
61 #include "regs.h"
62 #include "insn-config.h"
63 #include "insn-codes.h"
64 #include "recog.h"
65 #include "output.h"
66 #include "addresses.h"
67 #include "target.h"
68 #include "function.h"
69 #include "expr.h"
70 #include "basic-block.h"
71 #include "except.h"
72 #include "optabs.h"
73 #include "df.h"
74 #include "ira.h"
75 #include "rtl-error.h"
76 #include "lra-int.h"
77
78 /* This structure is used to record information about hard register
79 eliminations. */
80 struct elim_table
81 {
82 /* Hard register number to be eliminated. */
83 int from;
84 /* Hard register number used as replacement. */
85 int to;
86 /* Difference between values of the two hard registers above on
87 previous iteration. */
88 HOST_WIDE_INT previous_offset;
89 /* Difference between the values on the current iteration. */
90 HOST_WIDE_INT offset;
91 /* Nonzero if this elimination can be done. */
92 bool can_eliminate;
93 /* CAN_ELIMINATE since the last check. */
94 bool prev_can_eliminate;
95 /* REG rtx for the register to be eliminated. We cannot simply
96 compare the number since we might then spuriously replace a hard
97 register corresponding to a pseudo assigned to the reg to be
98 eliminated. */
99 rtx from_rtx;
100 /* REG rtx for the replacement. */
101 rtx to_rtx;
102 };
103
104 /* The elimination table. Each array entry describes one possible way
105 of eliminating a register in favor of another. If there is more
106 than one way of eliminating a particular register, the most
107 preferred should be specified first. */
108 static struct elim_table *reg_eliminate = 0;
109
110 /* This is an intermediate structure to initialize the table. It has
111 exactly the members provided by ELIMINABLE_REGS. */
112 static const struct elim_table_1
113 {
114 const int from;
115 const int to;
116 } reg_eliminate_1[] =
117
118 /* If a set of eliminable hard registers was specified, define the
119 table from it. Otherwise, default to the normal case of the frame
120 pointer being replaced by the stack pointer. */
121
122 #ifdef ELIMINABLE_REGS
123 ELIMINABLE_REGS;
124 #else
125 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}};
126 #endif
127
128 #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
129
130 /* Print info about elimination table to file F. */
131 static void
132 print_elim_table (FILE *f)
133 {
134 struct elim_table *ep;
135
136 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
137 fprintf (f, "%s eliminate %d to %d (offset=" HOST_WIDE_INT_PRINT_DEC
138 ", prev_offset=" HOST_WIDE_INT_PRINT_DEC ")\n",
139 ep->can_eliminate ? "Can" : "Can't",
140 ep->from, ep->to, ep->offset, ep->previous_offset);
141 }
142
143 /* Print info about elimination table to stderr. */
144 void
145 lra_debug_elim_table (void)
146 {
147 print_elim_table (stderr);
148 }
149
150 /* Setup possibility of elimination in elimination table element EP to
151 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
152 pointer to stack pointer is not possible anymore. */
153 static void
154 setup_can_eliminate (struct elim_table *ep, bool value)
155 {
156 ep->can_eliminate = ep->prev_can_eliminate = value;
157 if (! value
158 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
159 frame_pointer_needed = 1;
160 }
161
162 /* Map: eliminable "from" register -> its current elimination,
163 or NULL if none. The elimination table may contain more than
164 one elimination for the same hard register, but this map specifies
165 the one that we are currently using. */
166 static struct elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
167
168 /* When an eliminable hard register becomes not eliminable, we use the
169 following special structure to restore original offsets for the
170 register. */
171 static struct elim_table self_elim_table;
172
173 /* Offsets should be used to restore original offsets for eliminable
174 hard register which just became not eliminable. Zero,
175 otherwise. */
176 static HOST_WIDE_INT self_elim_offsets[FIRST_PSEUDO_REGISTER];
177
178 /* Map: hard regno -> RTL presentation. RTL presentations of all
179 potentially eliminable hard registers are stored in the map. */
180 static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
181
182 /* Set up ELIMINATION_MAP of the currently used eliminations. */
183 static void
184 setup_elimination_map (void)
185 {
186 int i;
187 struct elim_table *ep;
188
189 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
190 elimination_map[i] = NULL;
191 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
192 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
193 elimination_map[ep->from] = ep;
194 }
195
196 \f
197
198 /* Compute the sum of X and Y, making canonicalizations assumed in an
199 address, namely: sum constant integers, surround the sum of two
200 constants with a CONST, put the constant as the second operand, and
201 group the constant on the outermost sum.
202
203 This routine assumes both inputs are already in canonical form. */
204 static rtx
205 form_sum (rtx x, rtx y)
206 {
207 rtx tem;
208 enum machine_mode mode = GET_MODE (x);
209
210 if (mode == VOIDmode)
211 mode = GET_MODE (y);
212
213 if (mode == VOIDmode)
214 mode = Pmode;
215
216 if (CONST_INT_P (x))
217 return plus_constant (mode, y, INTVAL (x));
218 else if (CONST_INT_P (y))
219 return plus_constant (mode, x, INTVAL (y));
220 else if (CONSTANT_P (x))
221 tem = x, x = y, y = tem;
222
223 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
224 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
225
226 /* Note that if the operands of Y are specified in the opposite
227 order in the recursive calls below, infinite recursion will
228 occur. */
229 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
230 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
231
232 /* If both constant, encapsulate sum. Otherwise, just form sum. A
233 constant will have been placed second. */
234 if (CONSTANT_P (x) && CONSTANT_P (y))
235 {
236 if (GET_CODE (x) == CONST)
237 x = XEXP (x, 0);
238 if (GET_CODE (y) == CONST)
239 y = XEXP (y, 0);
240
241 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
242 }
243
244 return gen_rtx_PLUS (mode, x, y);
245 }
246
247 /* Return the current substitution hard register of the elimination of
248 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
249 int
250 lra_get_elimination_hard_regno (int hard_regno)
251 {
252 struct elim_table *ep;
253
254 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
255 return hard_regno;
256 if ((ep = elimination_map[hard_regno]) == NULL)
257 return hard_regno;
258 return ep->to;
259 }
260
261 /* Return elimination which will be used for hard reg REG, NULL
262 otherwise. */
263 static struct elim_table *
264 get_elimination (rtx reg)
265 {
266 int hard_regno;
267 struct elim_table *ep;
268 HOST_WIDE_INT offset;
269
270 lra_assert (REG_P (reg));
271 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
272 return NULL;
273 if ((ep = elimination_map[hard_regno]) != NULL)
274 return ep->from_rtx != reg ? NULL : ep;
275 if ((offset = self_elim_offsets[hard_regno]) == 0)
276 return NULL;
277 /* This is an iteration to restore offsets just after HARD_REGNO
278 stopped to be eliminable. */
279 self_elim_table.from = self_elim_table.to = hard_regno;
280 self_elim_table.from_rtx
281 = self_elim_table.to_rtx
282 = eliminable_reg_rtx[hard_regno];
283 lra_assert (self_elim_table.from_rtx != NULL);
284 self_elim_table.offset = offset;
285 return &self_elim_table;
286 }
287
288 /* Scan X and replace any eliminable registers (such as fp) with a
289 replacement (such as sp) if SUBST_P, plus an offset. The offset is
290 a change in the offset between the eliminable register and its
291 substitution if UPDATE_P, or the full offset if FULL_P, or
292 otherwise zero.
293
294 MEM_MODE is the mode of an enclosing MEM. We need this to know how
295 much to adjust a register for, e.g., PRE_DEC. Also, if we are
296 inside a MEM, we are allowed to replace a sum of a hard register
297 and the constant zero with the hard register, which we cannot do
298 outside a MEM. In addition, we need to record the fact that a
299 hard register is referenced outside a MEM.
300
301 Alternatively, INSN may be a note (an EXPR_LIST or INSN_LIST).
302 That's used when we eliminate in expressions stored in notes. */
303 rtx
304 lra_eliminate_regs_1 (rtx x, enum machine_mode mem_mode,
305 bool subst_p, bool update_p, bool full_p)
306 {
307 enum rtx_code code = GET_CODE (x);
308 struct elim_table *ep;
309 rtx new_rtx;
310 int i, j;
311 const char *fmt;
312 int copied = 0;
313
314 if (! current_function_decl)
315 return x;
316
317 switch (code)
318 {
319 CASE_CONST_ANY:
320 case CONST:
321 case SYMBOL_REF:
322 case CODE_LABEL:
323 case PC:
324 case CC0:
325 case ASM_INPUT:
326 case ADDR_VEC:
327 case ADDR_DIFF_VEC:
328 case RETURN:
329 return x;
330
331 case REG:
332 /* First handle the case where we encounter a bare hard register
333 that is eliminable. Replace it with a PLUS. */
334 if ((ep = get_elimination (x)) != NULL)
335 {
336 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
337
338 if (update_p)
339 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
340 else if (full_p)
341 return plus_constant (Pmode, to, ep->offset);
342 else
343 return to;
344 }
345 return x;
346
347 case PLUS:
348 /* If this is the sum of an eliminable register and a constant, rework
349 the sum. */
350 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
351 {
352 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
353 {
354 HOST_WIDE_INT offset;
355 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
356
357 if (! update_p && ! full_p)
358 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
359
360 offset = (update_p
361 ? ep->offset - ep->previous_offset : ep->offset);
362 if (CONST_INT_P (XEXP (x, 1))
363 && INTVAL (XEXP (x, 1)) == -offset)
364 return to;
365 else
366 return gen_rtx_PLUS (Pmode, to,
367 plus_constant (Pmode,
368 XEXP (x, 1), offset));
369 }
370
371 /* If the hard register is not eliminable, we are done since
372 the other operand is a constant. */
373 return x;
374 }
375
376 /* If this is part of an address, we want to bring any constant
377 to the outermost PLUS. We will do this by doing hard
378 register replacement in our operands and seeing if a constant
379 shows up in one of them.
380
381 Note that there is no risk of modifying the structure of the
382 insn, since we only get called for its operands, thus we are
383 either modifying the address inside a MEM, or something like
384 an address operand of a load-address insn. */
385
386 {
387 rtx new0 = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
388 subst_p, update_p, full_p);
389 rtx new1 = lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
390 subst_p, update_p, full_p);
391
392 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
393 return form_sum (new0, new1);
394 }
395 return x;
396
397 case MULT:
398 /* If this is the product of an eliminable hard register and a
399 constant, apply the distribute law and move the constant out
400 so that we have (plus (mult ..) ..). This is needed in order
401 to keep load-address insns valid. This case is pathological.
402 We ignore the possibility of overflow here. */
403 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
404 && (ep = get_elimination (XEXP (x, 0))) != NULL)
405 {
406 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
407
408 if (update_p)
409 return
410 plus_constant (Pmode,
411 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
412 (ep->offset - ep->previous_offset)
413 * INTVAL (XEXP (x, 1)));
414 else if (full_p)
415 return
416 plus_constant (Pmode,
417 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
418 ep->offset * INTVAL (XEXP (x, 1)));
419 else
420 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
421 }
422
423 /* ... fall through ... */
424
425 case CALL:
426 case COMPARE:
427 /* See comments before PLUS about handling MINUS. */
428 case MINUS:
429 case DIV: case UDIV:
430 case MOD: case UMOD:
431 case AND: case IOR: case XOR:
432 case ROTATERT: case ROTATE:
433 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
434 case NE: case EQ:
435 case GE: case GT: case GEU: case GTU:
436 case LE: case LT: case LEU: case LTU:
437 {
438 rtx new0 = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
439 subst_p, update_p, full_p);
440 rtx new1 = XEXP (x, 1)
441 ? lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
442 subst_p, update_p, full_p) : 0;
443
444 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
445 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
446 }
447 return x;
448
449 case EXPR_LIST:
450 /* If we have something in XEXP (x, 0), the usual case,
451 eliminate it. */
452 if (XEXP (x, 0))
453 {
454 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
455 subst_p, update_p, full_p);
456 if (new_rtx != XEXP (x, 0))
457 {
458 /* If this is a REG_DEAD note, it is not valid anymore.
459 Using the eliminated version could result in creating a
460 REG_DEAD note for the stack or frame pointer. */
461 if (REG_NOTE_KIND (x) == REG_DEAD)
462 return (XEXP (x, 1)
463 ? lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
464 subst_p, update_p, full_p)
465 : NULL_RTX);
466
467 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
468 }
469 }
470
471 /* ... fall through ... */
472
473 case INSN_LIST:
474 /* Now do eliminations in the rest of the chain. If this was
475 an EXPR_LIST, this might result in allocating more memory than is
476 strictly needed, but it simplifies the code. */
477 if (XEXP (x, 1))
478 {
479 new_rtx = lra_eliminate_regs_1 (XEXP (x, 1), mem_mode,
480 subst_p, update_p, full_p);
481 if (new_rtx != XEXP (x, 1))
482 return
483 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
484 XEXP (x, 0), new_rtx);
485 }
486 return x;
487
488 case PRE_INC:
489 case POST_INC:
490 case PRE_DEC:
491 case POST_DEC:
492 /* We do not support elimination of a register that is modified.
493 elimination_effects has already make sure that this does not
494 happen. */
495 return x;
496
497 case PRE_MODIFY:
498 case POST_MODIFY:
499 /* We do not support elimination of a hard register that is
500 modified. LRA has already make sure that this does not
501 happen. The only remaining case we need to consider here is
502 that the increment value may be an eliminable register. */
503 if (GET_CODE (XEXP (x, 1)) == PLUS
504 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
505 {
506 rtx new_rtx = lra_eliminate_regs_1 (XEXP (XEXP (x, 1), 1), mem_mode,
507 subst_p, update_p, full_p);
508
509 if (new_rtx != XEXP (XEXP (x, 1), 1))
510 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
511 gen_rtx_PLUS (GET_MODE (x),
512 XEXP (x, 0), new_rtx));
513 }
514 return x;
515
516 case STRICT_LOW_PART:
517 case NEG: case NOT:
518 case SIGN_EXTEND: case ZERO_EXTEND:
519 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
520 case FLOAT: case FIX:
521 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
522 case ABS:
523 case SQRT:
524 case FFS:
525 case CLZ:
526 case CTZ:
527 case POPCOUNT:
528 case PARITY:
529 case BSWAP:
530 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), mem_mode,
531 subst_p, update_p, full_p);
532 if (new_rtx != XEXP (x, 0))
533 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
534 return x;
535
536 case SUBREG:
537 new_rtx = lra_eliminate_regs_1 (SUBREG_REG (x), mem_mode,
538 subst_p, update_p, full_p);
539
540 if (new_rtx != SUBREG_REG (x))
541 {
542 int x_size = GET_MODE_SIZE (GET_MODE (x));
543 int new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
544
545 if (MEM_P (new_rtx) && x_size <= new_size)
546 {
547 SUBREG_REG (x) = new_rtx;
548 alter_subreg (&x, false);
549 return x;
550 }
551 else
552 return simplify_gen_subreg (GET_MODE (x), new_rtx,
553 GET_MODE (new_rtx), SUBREG_BYTE (x));
554 }
555
556 return x;
557
558 case MEM:
559 /* Our only special processing is to pass the mode of the MEM to our
560 recursive call and copy the flags. While we are here, handle this
561 case more efficiently. */
562 return
563 replace_equiv_address_nv
564 (x,
565 lra_eliminate_regs_1 (XEXP (x, 0), GET_MODE (x),
566 subst_p, update_p, full_p));
567
568 case USE:
569 /* Handle insn_list USE that a call to a pure function may generate. */
570 new_rtx = lra_eliminate_regs_1 (XEXP (x, 0), VOIDmode,
571 subst_p, update_p, full_p);
572 if (new_rtx != XEXP (x, 0))
573 return gen_rtx_USE (GET_MODE (x), new_rtx);
574 return x;
575
576 case CLOBBER:
577 case SET:
578 gcc_unreachable ();
579
580 default:
581 break;
582 }
583
584 /* Process each of our operands recursively. If any have changed, make a
585 copy of the rtx. */
586 fmt = GET_RTX_FORMAT (code);
587 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
588 {
589 if (*fmt == 'e')
590 {
591 new_rtx = lra_eliminate_regs_1 (XEXP (x, i), mem_mode,
592 subst_p, update_p, full_p);
593 if (new_rtx != XEXP (x, i) && ! copied)
594 {
595 x = shallow_copy_rtx (x);
596 copied = 1;
597 }
598 XEXP (x, i) = new_rtx;
599 }
600 else if (*fmt == 'E')
601 {
602 int copied_vec = 0;
603 for (j = 0; j < XVECLEN (x, i); j++)
604 {
605 new_rtx = lra_eliminate_regs_1 (XVECEXP (x, i, j), mem_mode,
606 subst_p, update_p, full_p);
607 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
608 {
609 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
610 XVEC (x, i)->elem);
611 if (! copied)
612 {
613 x = shallow_copy_rtx (x);
614 copied = 1;
615 }
616 XVEC (x, i) = new_v;
617 copied_vec = 1;
618 }
619 XVECEXP (x, i, j) = new_rtx;
620 }
621 }
622 }
623
624 return x;
625 }
626
627 /* This function is used externally in subsequent passes of GCC. It
628 always does a full elimination of X. */
629 rtx
630 lra_eliminate_regs (rtx x, enum machine_mode mem_mode,
631 rtx insn ATTRIBUTE_UNUSED)
632 {
633 return lra_eliminate_regs_1 (x, mem_mode, true, false, true);
634 }
635
636 /* Scan rtx X for references to elimination source or target registers
637 in contexts that would prevent the elimination from happening.
638 Update the table of eliminables to reflect the changed state.
639 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
640 within a MEM. */
641 static void
642 mark_not_eliminable (rtx x)
643 {
644 enum rtx_code code = GET_CODE (x);
645 struct elim_table *ep;
646 int i, j;
647 const char *fmt;
648
649 switch (code)
650 {
651 case PRE_INC:
652 case POST_INC:
653 case PRE_DEC:
654 case POST_DEC:
655 case POST_MODIFY:
656 case PRE_MODIFY:
657 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
658 /* If we modify the source of an elimination rule, disable
659 it. Do the same if it is the source and not the hard frame
660 register. */
661 for (ep = reg_eliminate;
662 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
663 ep++)
664 if (ep->from_rtx == XEXP (x, 0)
665 || (ep->to_rtx == XEXP (x, 0)
666 && ep->to_rtx != hard_frame_pointer_rtx))
667 setup_can_eliminate (ep, false);
668 return;
669
670 case USE:
671 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
672 /* If using a hard register that is the source of an eliminate
673 we still think can be performed, note it cannot be
674 performed since we don't know how this hard register is
675 used. */
676 for (ep = reg_eliminate;
677 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
678 ep++)
679 if (ep->from_rtx == XEXP (x, 0)
680 && ep->to_rtx != hard_frame_pointer_rtx)
681 setup_can_eliminate (ep, false);
682 return;
683
684 case CLOBBER:
685 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
686 /* If clobbering a hard register that is the replacement
687 register for an elimination we still think can be
688 performed, note that it cannot be performed. Otherwise, we
689 need not be concerned about it. */
690 for (ep = reg_eliminate;
691 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
692 ep++)
693 if (ep->to_rtx == XEXP (x, 0)
694 && ep->to_rtx != hard_frame_pointer_rtx)
695 setup_can_eliminate (ep, false);
696 return;
697
698 case SET:
699 /* Check for setting a hard register that we know about. */
700 if (REG_P (SET_DEST (x)) && REGNO (SET_DEST (x)) < FIRST_PSEUDO_REGISTER)
701 {
702 /* See if this is setting the replacement hard register for
703 an elimination.
704
705 If DEST is the hard frame pointer, we do nothing because
706 we assume that all assignments to the frame pointer are
707 for non-local gotos and are being done at a time when
708 they are valid and do not disturb anything else. Some
709 machines want to eliminate a fake argument pointer (or
710 even a fake frame pointer) with either the real frame
711 pointer or the stack pointer. Assignments to the hard
712 frame pointer must not prevent this elimination. */
713
714 for (ep = reg_eliminate;
715 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
716 ep++)
717 if (ep->to_rtx == SET_DEST (x)
718 && SET_DEST (x) != hard_frame_pointer_rtx
719 && (GET_CODE (SET_SRC (x)) != PLUS
720 || XEXP (SET_SRC (x), 0) != SET_DEST (x)
721 || ! CONST_INT_P (XEXP (SET_SRC (x), 1))))
722 setup_can_eliminate (ep, false);
723 }
724
725 mark_not_eliminable (SET_DEST (x));
726 mark_not_eliminable (SET_SRC (x));
727 return;
728
729 default:
730 break;
731 }
732
733 fmt = GET_RTX_FORMAT (code);
734 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
735 {
736 if (*fmt == 'e')
737 mark_not_eliminable (XEXP (x, i));
738 else if (*fmt == 'E')
739 for (j = 0; j < XVECLEN (x, i); j++)
740 mark_not_eliminable (XVECEXP (x, i, j));
741 }
742 }
743
744 \f
745
746 /* Scan INSN and eliminate all eliminable hard registers in it.
747
748 If REPLACE_P is true, do the replacement destructively. Also
749 delete the insn as dead it if it is setting an eliminable register.
750
751 If REPLACE_P is false, just update the offsets while keeping the
752 base register the same. */
753
754 static void
755 eliminate_regs_in_insn (rtx insn, bool replace_p)
756 {
757 int icode = recog_memoized (insn);
758 rtx old_set = single_set (insn);
759 bool validate_p;
760 int i;
761 rtx substed_operand[MAX_RECOG_OPERANDS];
762 rtx orig_operand[MAX_RECOG_OPERANDS];
763 struct elim_table *ep;
764 rtx plus_src, plus_cst_src;
765 lra_insn_recog_data_t id;
766 struct lra_static_insn_data *static_id;
767
768 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
769 {
770 lra_assert (JUMP_TABLE_DATA_P (insn)
771 || GET_CODE (PATTERN (insn)) == USE
772 || GET_CODE (PATTERN (insn)) == CLOBBER
773 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
774 return;
775 }
776
777 /* Check for setting an eliminable register. */
778 if (old_set != 0 && REG_P (SET_DEST (old_set))
779 && (ep = get_elimination (SET_DEST (old_set))) != NULL)
780 {
781 bool delete_p = replace_p;
782
783 #ifdef HARD_FRAME_POINTER_REGNUM
784 /* If this is setting the frame pointer register to the hardware
785 frame pointer register and this is an elimination that will
786 be done (tested above), this insn is really adjusting the
787 frame pointer downward to compensate for the adjustment done
788 before a nonlocal goto. */
789 if (ep->from == FRAME_POINTER_REGNUM
790 && ep->to == HARD_FRAME_POINTER_REGNUM)
791 {
792 if (replace_p)
793 {
794 SET_DEST (old_set) = ep->to_rtx;
795 lra_update_insn_recog_data (insn);
796 return;
797 }
798 else
799 {
800 rtx base = SET_SRC (old_set);
801 HOST_WIDE_INT offset = 0;
802 rtx base_insn = insn;
803
804 while (base != ep->to_rtx)
805 {
806 rtx prev_insn, prev_set;
807
808 if (GET_CODE (base) == PLUS && CONST_INT_P (XEXP (base, 1)))
809 {
810 offset += INTVAL (XEXP (base, 1));
811 base = XEXP (base, 0);
812 }
813 else if ((prev_insn = prev_nonnote_insn (base_insn)) != 0
814 && (prev_set = single_set (prev_insn)) != 0
815 && rtx_equal_p (SET_DEST (prev_set), base))
816 {
817 base = SET_SRC (prev_set);
818 base_insn = prev_insn;
819 }
820 else
821 break;
822 }
823
824 if (base == ep->to_rtx)
825 {
826 rtx src;
827
828 offset -= (ep->offset - ep->previous_offset);
829 src = plus_constant (Pmode, ep->to_rtx, offset);
830
831 /* First see if this insn remains valid when we make
832 the change. If not, keep the INSN_CODE the same
833 and let the constraint pass fit it up. */
834 validate_change (insn, &SET_SRC (old_set), src, 1);
835 validate_change (insn, &SET_DEST (old_set),
836 ep->from_rtx, 1);
837 if (! apply_change_group ())
838 {
839 SET_SRC (old_set) = src;
840 SET_DEST (old_set) = ep->from_rtx;
841 }
842 lra_update_insn_recog_data (insn);
843 return;
844 }
845 }
846
847
848 /* We can't delete this insn, but needn't process it
849 since it won't be used unless something changes. */
850 delete_p = false;
851 }
852 #endif
853
854 /* This insn isn't serving a useful purpose. We delete it
855 when REPLACE is set. */
856 if (delete_p)
857 lra_delete_dead_insn (insn);
858 return;
859 }
860
861 /* We allow one special case which happens to work on all machines we
862 currently support: a single set with the source or a REG_EQUAL
863 note being a PLUS of an eliminable register and a constant. */
864 plus_src = plus_cst_src = 0;
865 if (old_set && REG_P (SET_DEST (old_set)))
866 {
867 if (GET_CODE (SET_SRC (old_set)) == PLUS)
868 plus_src = SET_SRC (old_set);
869 /* First see if the source is of the form (plus (...) CST). */
870 if (plus_src
871 && CONST_INT_P (XEXP (plus_src, 1)))
872 plus_cst_src = plus_src;
873 /* Check that the first operand of the PLUS is a hard reg or
874 the lowpart subreg of one. */
875 if (plus_cst_src)
876 {
877 rtx reg = XEXP (plus_cst_src, 0);
878
879 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
880 reg = SUBREG_REG (reg);
881
882 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
883 plus_cst_src = 0;
884 }
885 }
886 if (plus_cst_src)
887 {
888 rtx reg = XEXP (plus_cst_src, 0);
889 HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1));
890
891 if (GET_CODE (reg) == SUBREG)
892 reg = SUBREG_REG (reg);
893
894 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
895 {
896 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
897
898 if (! replace_p)
899 {
900 offset += (ep->offset - ep->previous_offset);
901 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
902 }
903
904 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
905 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
906 /* If we have a nonzero offset, and the source is already a
907 simple REG, the following transformation would increase
908 the cost of the insn by replacing a simple REG with (plus
909 (reg sp) CST). So try only when we already had a PLUS
910 before. */
911 if (offset == 0 || plus_src)
912 {
913 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
914
915 old_set = single_set (insn);
916
917 /* First see if this insn remains valid when we make the
918 change. If not, try to replace the whole pattern
919 with a simple set (this may help if the original insn
920 was a PARALLEL that was only recognized as single_set
921 due to REG_UNUSED notes). If this isn't valid
922 either, keep the INSN_CODE the same and let the
923 constraint pass fix it up. */
924 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
925 {
926 rtx new_pat = gen_rtx_SET (VOIDmode,
927 SET_DEST (old_set), new_src);
928
929 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
930 SET_SRC (old_set) = new_src;
931 }
932 lra_update_insn_recog_data (insn);
933 /* This can't have an effect on elimination offsets, so skip
934 right to the end. */
935 return;
936 }
937 }
938 }
939
940 /* Eliminate all eliminable registers occurring in operands that
941 can be handled by the constraint pass. */
942 id = lra_get_insn_recog_data (insn);
943 static_id = id->insn_static_data;
944 validate_p = false;
945 for (i = 0; i < static_id->n_operands; i++)
946 {
947 orig_operand[i] = *id->operand_loc[i];
948 substed_operand[i] = *id->operand_loc[i];
949
950 /* For an asm statement, every operand is eliminable. */
951 if (icode < 0 || insn_data[icode].operand[i].eliminable)
952 {
953 /* Check for setting a hard register that we know about. */
954 if (static_id->operand[i].type != OP_IN
955 && REG_P (orig_operand[i]))
956 {
957 /* If we are assigning to a hard register that can be
958 eliminated, it must be as part of a PARALLEL, since
959 the code above handles single SETs. This reg can not
960 be longer eliminated -- it is forced by
961 mark_not_eliminable. */
962 for (ep = reg_eliminate;
963 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
964 ep++)
965 lra_assert (ep->from_rtx != orig_operand[i]
966 || ! ep->can_eliminate);
967 }
968
969 /* Companion to the above plus substitution, we can allow
970 invariants as the source of a plain move. */
971 substed_operand[i]
972 = lra_eliminate_regs_1 (*id->operand_loc[i], VOIDmode,
973 replace_p, ! replace_p, false);
974 if (substed_operand[i] != orig_operand[i])
975 validate_p = true;
976 }
977 }
978
979 /* Substitute the operands; the new values are in the substed_operand
980 array. */
981 for (i = 0; i < static_id->n_operands; i++)
982 *id->operand_loc[i] = substed_operand[i];
983 for (i = 0; i < static_id->n_dups; i++)
984 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
985
986 if (validate_p)
987 {
988 /* If we had a move insn but now we don't, re-recognize it.
989 This will cause spurious re-recognition if the old move had a
990 PARALLEL since the new one still will, but we can't call
991 single_set without having put new body into the insn and the
992 re-recognition won't hurt in this rare case. */
993 id = lra_update_insn_recog_data (insn);
994 static_id = id->insn_static_data;
995 }
996 }
997
998 /* Spill pseudos which are assigned to hard registers in SET. Add
999 affected insns for processing in the subsequent constraint
1000 pass. */
1001 static void
1002 spill_pseudos (HARD_REG_SET set)
1003 {
1004 int i;
1005 bitmap_head to_process;
1006 rtx insn;
1007
1008 if (hard_reg_set_empty_p (set))
1009 return;
1010 if (lra_dump_file != NULL)
1011 {
1012 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
1013 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1014 if (TEST_HARD_REG_BIT (set, i))
1015 fprintf (lra_dump_file, " %d", i);
1016 fprintf (lra_dump_file, "\n");
1017 }
1018 bitmap_initialize (&to_process, &reg_obstack);
1019 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
1020 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
1021 && overlaps_hard_reg_set_p (set,
1022 PSEUDO_REGNO_MODE (i), reg_renumber[i]))
1023 {
1024 if (lra_dump_file != NULL)
1025 fprintf (lra_dump_file, " Spilling r%d(%d)\n",
1026 i, reg_renumber[i]);
1027 reg_renumber[i] = -1;
1028 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
1029 }
1030 IOR_HARD_REG_SET (lra_no_alloc_regs, set);
1031 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
1032 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
1033 {
1034 lra_push_insn (insn);
1035 lra_set_used_insn_alternative (insn, -1);
1036 }
1037 bitmap_clear (&to_process);
1038 }
1039
1040 /* Update all offsets and possibility for elimination on eliminable
1041 registers. Spill pseudos assigned to registers which became
1042 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
1043 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
1044 registers whose offsets should be changed. */
1045 static void
1046 update_reg_eliminate (bitmap insns_with_changed_offsets)
1047 {
1048 bool prev;
1049 struct elim_table *ep, *ep1;
1050 HARD_REG_SET temp_hard_reg_set;
1051
1052 /* Clear self elimination offsets. */
1053 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1054 self_elim_offsets[ep->from] = 0;
1055 CLEAR_HARD_REG_SET (temp_hard_reg_set);
1056 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1057 {
1058 /* If it is a currently used elimination: update the previous
1059 offset. */
1060 if (elimination_map[ep->from] == ep)
1061 ep->previous_offset = ep->offset;
1062
1063 prev = ep->prev_can_eliminate;
1064 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
1065 if (ep->can_eliminate && ! prev)
1066 {
1067 /* It is possible that not eliminable register becomes
1068 eliminable because we took other reasons into account to
1069 set up eliminable regs in the initial set up. Just
1070 ignore new eliminable registers. */
1071 setup_can_eliminate (ep, false);
1072 continue;
1073 }
1074 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
1075 {
1076 /* We cannot use this elimination anymore -- find another
1077 one. */
1078 if (lra_dump_file != NULL)
1079 fprintf (lra_dump_file,
1080 " Elimination %d to %d is not possible anymore\n",
1081 ep->from, ep->to);
1082 /* Mark that is not eliminable anymore. */
1083 elimination_map[ep->from] = NULL;
1084 for (ep1 = ep + 1; ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
1085 if (ep1->can_eliminate && ep1->from == ep->from)
1086 break;
1087 if (ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS])
1088 {
1089 if (lra_dump_file != NULL)
1090 fprintf (lra_dump_file, " Using elimination %d to %d now\n",
1091 ep1->from, ep1->to);
1092 /* Prevent the hard register into which we eliminate now
1093 from the usage for pseudos. */
1094 SET_HARD_REG_BIT (temp_hard_reg_set, ep1->to);
1095 lra_assert (ep1->previous_offset == 0);
1096 ep1->previous_offset = ep->offset;
1097 }
1098 else
1099 {
1100 /* There is no elimination anymore just use the hard
1101 register `from' itself. Setup self elimination
1102 offset to restore the original offset values. */
1103 if (lra_dump_file != NULL)
1104 fprintf (lra_dump_file, " %d is not eliminable at all\n",
1105 ep->from);
1106 self_elim_offsets[ep->from] = -ep->offset;
1107 SET_HARD_REG_BIT (temp_hard_reg_set, ep->from);
1108 if (ep->offset != 0)
1109 bitmap_ior_into (insns_with_changed_offsets,
1110 &lra_reg_info[ep->from].insn_bitmap);
1111 }
1112 }
1113
1114 #ifdef ELIMINABLE_REGS
1115 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
1116 #else
1117 INITIAL_FRAME_POINTER_OFFSET (ep->offset);
1118 #endif
1119 }
1120 IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
1121 AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
1122 spill_pseudos (temp_hard_reg_set);
1123 setup_elimination_map ();
1124 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1125 if (elimination_map[ep->from] == ep && ep->previous_offset != ep->offset)
1126 bitmap_ior_into (insns_with_changed_offsets,
1127 &lra_reg_info[ep->from].insn_bitmap);
1128 }
1129
1130 /* Initialize the table of hard registers to eliminate.
1131 Pre-condition: global flag frame_pointer_needed has been set before
1132 calling this function. */
1133 static void
1134 init_elim_table (void)
1135 {
1136 bool value_p;
1137 struct elim_table *ep;
1138 #ifdef ELIMINABLE_REGS
1139 const struct elim_table_1 *ep1;
1140 #endif
1141
1142 if (!reg_eliminate)
1143 reg_eliminate = XCNEWVEC (struct elim_table, NUM_ELIMINABLE_REGS);
1144
1145 memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
1146 /* Initiate member values which will be never changed. */
1147 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
1148 self_elim_table.previous_offset = 0;
1149 #ifdef ELIMINABLE_REGS
1150 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
1151 ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
1152 {
1153 ep->offset = ep->previous_offset = 0;
1154 ep->from = ep1->from;
1155 ep->to = ep1->to;
1156 value_p = (targetm.can_eliminate (ep->from, ep->to)
1157 && ! (ep->to == STACK_POINTER_REGNUM
1158 && frame_pointer_needed
1159 && (! SUPPORTS_STACK_ALIGNMENT
1160 || ! stack_realign_fp)));
1161 setup_can_eliminate (ep, value_p);
1162 }
1163 #else
1164 reg_eliminate[0].offset = reg_eliminate[0].previous_offset = 0;
1165 reg_eliminate[0].from = reg_eliminate_1[0].from;
1166 reg_eliminate[0].to = reg_eliminate_1[0].to;
1167 setup_can_eliminate (&reg_eliminate[0], ! frame_pointer_needed);
1168 #endif
1169
1170 /* Count the number of eliminable registers and build the FROM and TO
1171 REG rtx's. Note that code in gen_rtx_REG will cause, e.g.,
1172 gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to equal stack_pointer_rtx.
1173 We depend on this. */
1174 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1175 {
1176 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
1177 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
1178 eliminable_reg_rtx[ep->from] = ep->from_rtx;
1179 }
1180 }
1181
1182 /* Entry function for initialization of elimination once per
1183 function. */
1184 void
1185 lra_init_elimination (void)
1186 {
1187 basic_block bb;
1188 rtx insn;
1189
1190 init_elim_table ();
1191 FOR_EACH_BB (bb)
1192 FOR_BB_INSNS (bb, insn)
1193 if (NONDEBUG_INSN_P (insn))
1194 mark_not_eliminable (PATTERN (insn));
1195 setup_elimination_map ();
1196 }
1197
1198 /* Eliminate hard reg given by its location LOC. */
1199 void
1200 lra_eliminate_reg_if_possible (rtx *loc)
1201 {
1202 int regno;
1203 struct elim_table *ep;
1204
1205 lra_assert (REG_P (*loc));
1206 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
1207 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
1208 return;
1209 if ((ep = get_elimination (*loc)) != NULL)
1210 *loc = ep->to_rtx;
1211 }
1212
1213 /* Do (final if FINAL_P) elimination in INSN. Add the insn for
1214 subsequent processing in the constraint pass, update the insn info. */
1215 static void
1216 process_insn_for_elimination (rtx insn, bool final_p)
1217 {
1218 eliminate_regs_in_insn (insn, final_p);
1219 if (! final_p)
1220 {
1221 /* Check that insn changed its code. This is a case when a move
1222 insn becomes an add insn and we do not want to process the
1223 insn as a move anymore. */
1224 int icode = recog (PATTERN (insn), insn, 0);
1225
1226 if (icode >= 0 && icode != INSN_CODE (insn))
1227 {
1228 INSN_CODE (insn) = icode;
1229 lra_update_insn_recog_data (insn);
1230 }
1231 lra_update_insn_regno_info (insn);
1232 lra_push_insn (insn);
1233 lra_set_used_insn_alternative (insn, -1);
1234 }
1235 }
1236
1237 /* Entry function to do final elimination if FINAL_P or to update
1238 elimination register offsets. */
1239 void
1240 lra_eliminate (bool final_p)
1241 {
1242 int i;
1243 unsigned int uid;
1244 rtx mem_loc, invariant;
1245 bitmap_head insns_with_changed_offsets;
1246 bitmap_iterator bi;
1247 struct elim_table *ep;
1248 int regs_num = max_reg_num ();
1249
1250 timevar_push (TV_LRA_ELIMINATE);
1251
1252 bitmap_initialize (&insns_with_changed_offsets, &reg_obstack);
1253 if (final_p)
1254 {
1255 #ifdef ENABLE_CHECKING
1256 update_reg_eliminate (&insns_with_changed_offsets);
1257 if (! bitmap_empty_p (&insns_with_changed_offsets))
1258 gcc_unreachable ();
1259 #endif
1260 /* We change eliminable hard registers in insns so we should do
1261 this for all insns containing any eliminable hard
1262 register. */
1263 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1264 if (elimination_map[ep->from] != NULL)
1265 bitmap_ior_into (&insns_with_changed_offsets,
1266 &lra_reg_info[ep->from].insn_bitmap);
1267 }
1268 else
1269 {
1270 update_reg_eliminate (&insns_with_changed_offsets);
1271 if (bitmap_empty_p (&insns_with_changed_offsets))
1272 goto lra_eliminate_done;
1273 }
1274 if (lra_dump_file != NULL)
1275 {
1276 fprintf (lra_dump_file, "New elimination table:\n");
1277 print_elim_table (lra_dump_file);
1278 }
1279 for (i = FIRST_PSEUDO_REGISTER; i < regs_num; i++)
1280 if (lra_reg_info[i].nrefs != 0)
1281 {
1282 mem_loc = ira_reg_equiv[i].memory;
1283 if (mem_loc != NULL_RTX)
1284 mem_loc = lra_eliminate_regs_1 (mem_loc, VOIDmode,
1285 final_p, ! final_p, false);
1286 ira_reg_equiv[i].memory = mem_loc;
1287 invariant = ira_reg_equiv[i].invariant;
1288 if (invariant != NULL_RTX)
1289 invariant = lra_eliminate_regs_1 (invariant, VOIDmode,
1290 final_p, ! final_p, false);
1291 ira_reg_equiv[i].invariant = invariant;
1292 if (lra_dump_file != NULL
1293 && (mem_loc != NULL_RTX || invariant != NULL))
1294 fprintf (lra_dump_file,
1295 "Updating elimination of equiv for reg %d\n", i);
1296 }
1297 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
1298 process_insn_for_elimination (lra_insn_recog_data[uid]->insn, final_p);
1299 bitmap_clear (&insns_with_changed_offsets);
1300
1301 lra_eliminate_done:
1302 timevar_pop (TV_LRA_ELIMINATE);
1303 }