1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
25 #include "diagnostic-core.h"
27 /* Include insn-config.h before expr.h so that HAVE_conditional_move
28 is properly defined. */
29 #include "insn-config.h"
42 #include "basic-block.h"
45 struct target_optabs default_target_optabs
;
46 struct target_libfuncs default_target_libfuncs
;
48 struct target_optabs
*this_target_optabs
= &default_target_optabs
;
49 struct target_libfuncs
*this_target_libfuncs
= &default_target_libfuncs
;
52 #define libfunc_hash \
53 (this_target_libfuncs->x_libfunc_hash)
55 static void prepare_float_lib_cmp (rtx
, rtx
, enum rtx_code
, rtx
*,
57 static rtx
expand_unop_direct (enum machine_mode
, optab
, rtx
, rtx
, int);
58 static void emit_libcall_block_1 (rtx
, rtx
, rtx
, rtx
, bool);
60 /* Debug facility for use in GDB. */
61 void debug_optab_libfuncs (void);
63 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
64 #if ENABLE_DECIMAL_BID_FORMAT
65 #define DECIMAL_PREFIX "bid_"
67 #define DECIMAL_PREFIX "dpd_"
70 /* Used for libfunc_hash. */
73 hash_libfunc (const void *p
)
75 const struct libfunc_entry
*const e
= (const struct libfunc_entry
*) p
;
76 return ((e
->mode1
+ e
->mode2
* NUM_MACHINE_MODES
) ^ e
->op
);
79 /* Used for libfunc_hash. */
82 eq_libfunc (const void *p
, const void *q
)
84 const struct libfunc_entry
*const e1
= (const struct libfunc_entry
*) p
;
85 const struct libfunc_entry
*const e2
= (const struct libfunc_entry
*) q
;
86 return e1
->op
== e2
->op
&& e1
->mode1
== e2
->mode1
&& e1
->mode2
== e2
->mode2
;
89 /* Return libfunc corresponding operation defined by OPTAB converting
90 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
91 if no libfunc is available. */
93 convert_optab_libfunc (convert_optab optab
, enum machine_mode mode1
,
94 enum machine_mode mode2
)
96 struct libfunc_entry e
;
97 struct libfunc_entry
**slot
;
99 /* ??? This ought to be an assert, but not all of the places
100 that we expand optabs know about the optabs that got moved
102 if (!(optab
>= FIRST_CONV_OPTAB
&& optab
<= LAST_CONVLIB_OPTAB
))
108 slot
= (struct libfunc_entry
**)
109 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
112 const struct convert_optab_libcall_d
*d
113 = &convlib_def
[optab
- FIRST_CONV_OPTAB
];
115 if (d
->libcall_gen
== NULL
)
118 d
->libcall_gen (optab
, d
->libcall_basename
, mode1
, mode2
);
119 slot
= (struct libfunc_entry
**)
120 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
124 return (*slot
)->libfunc
;
127 /* Return libfunc corresponding operation defined by OPTAB in MODE.
128 Trigger lazy initialization if needed, return NULL if no libfunc is
131 optab_libfunc (optab optab
, enum machine_mode mode
)
133 struct libfunc_entry e
;
134 struct libfunc_entry
**slot
;
136 /* ??? This ought to be an assert, but not all of the places
137 that we expand optabs know about the optabs that got moved
139 if (!(optab
>= FIRST_NORM_OPTAB
&& optab
<= LAST_NORMLIB_OPTAB
))
145 slot
= (struct libfunc_entry
**)
146 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
149 const struct optab_libcall_d
*d
150 = &normlib_def
[optab
- FIRST_NORM_OPTAB
];
152 if (d
->libcall_gen
== NULL
)
155 d
->libcall_gen (optab
, d
->libcall_basename
, d
->libcall_suffix
, mode
);
156 slot
= (struct libfunc_entry
**)
157 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
161 return (*slot
)->libfunc
;
165 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
166 the result of operation CODE applied to OP0 (and OP1 if it is a binary
169 If the last insn does not set TARGET, don't do anything, but return 1.
171 If the last insn or a previous insn sets TARGET and TARGET is one of OP0
172 or OP1, don't add the REG_EQUAL note but return 0. Our caller can then
173 try again, ensuring that TARGET is not one of the operands. */
176 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
181 gcc_assert (insns
&& INSN_P (insns
) && NEXT_INSN (insns
));
183 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
184 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
185 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
186 && GET_RTX_CLASS (code
) != RTX_COMPARE
187 && GET_RTX_CLASS (code
) != RTX_UNARY
)
190 if (GET_CODE (target
) == ZERO_EXTRACT
)
193 for (last_insn
= insns
;
194 NEXT_INSN (last_insn
) != NULL_RTX
;
195 last_insn
= NEXT_INSN (last_insn
))
198 /* If TARGET is in OP0 or OP1, punt. We'd end up with a note referencing
199 a value changing in the insn, so the note would be invalid for CSE. */
200 if (reg_overlap_mentioned_p (target
, op0
)
201 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
204 && (rtx_equal_p (target
, op0
)
205 || (op1
&& rtx_equal_p (target
, op1
))))
207 /* For MEM target, with MEM = MEM op X, prefer no REG_EQUAL note
208 over expanding it as temp = MEM op X, MEM = temp. If the target
209 supports MEM = MEM op X instructions, it is sometimes too hard
210 to reconstruct that form later, especially if X is also a memory,
211 and due to multiple occurrences of addresses the address might
212 be forced into register unnecessarily.
213 Note that not emitting the REG_EQUIV note might inhibit
214 CSE in some cases. */
215 set
= single_set (last_insn
);
217 && GET_CODE (SET_SRC (set
)) == code
218 && MEM_P (SET_DEST (set
))
219 && (rtx_equal_p (SET_DEST (set
), XEXP (SET_SRC (set
), 0))
220 || (op1
&& rtx_equal_p (SET_DEST (set
),
221 XEXP (SET_SRC (set
), 1)))))
227 set
= single_set (last_insn
);
231 if (! rtx_equal_p (SET_DEST (set
), target
)
232 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
233 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
234 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
237 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
247 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (target
) != GET_MODE (op0
))
249 note
= gen_rtx_fmt_e (code
, GET_MODE (op0
), copy_rtx (op0
));
250 if (GET_MODE_SIZE (GET_MODE (op0
))
251 > GET_MODE_SIZE (GET_MODE (target
)))
252 note
= simplify_gen_unary (TRUNCATE
, GET_MODE (target
),
253 note
, GET_MODE (op0
));
255 note
= simplify_gen_unary (ZERO_EXTEND
, GET_MODE (target
),
256 note
, GET_MODE (op0
));
261 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
265 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
267 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
272 /* Given two input operands, OP0 and OP1, determine what the correct from_mode
273 for a widening operation would be. In most cases this would be OP0, but if
274 that's a constant it'll be VOIDmode, which isn't useful. */
276 static enum machine_mode
277 widened_mode (enum machine_mode to_mode
, rtx op0
, rtx op1
)
279 enum machine_mode m0
= GET_MODE (op0
);
280 enum machine_mode m1
= GET_MODE (op1
);
281 enum machine_mode result
;
283 if (m0
== VOIDmode
&& m1
== VOIDmode
)
285 else if (m0
== VOIDmode
|| GET_MODE_SIZE (m0
) < GET_MODE_SIZE (m1
))
290 if (GET_MODE_SIZE (result
) > GET_MODE_SIZE (to_mode
))
296 /* Find a widening optab even if it doesn't widen as much as we want.
297 E.g. if from_mode is HImode, and to_mode is DImode, and there is no
298 direct HI->SI insn, then return SI->DI, if that exists.
299 If PERMIT_NON_WIDENING is non-zero then this can be used with
300 non-widening optabs also. */
303 find_widening_optab_handler_and_mode (optab op
, enum machine_mode to_mode
,
304 enum machine_mode from_mode
,
305 int permit_non_widening
,
306 enum machine_mode
*found_mode
)
308 for (; (permit_non_widening
|| from_mode
!= to_mode
)
309 && GET_MODE_SIZE (from_mode
) <= GET_MODE_SIZE (to_mode
)
310 && from_mode
!= VOIDmode
;
311 from_mode
= GET_MODE_WIDER_MODE (from_mode
))
313 enum insn_code handler
= widening_optab_handler (op
, to_mode
,
316 if (handler
!= CODE_FOR_nothing
)
319 *found_mode
= from_mode
;
324 return CODE_FOR_nothing
;
327 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
328 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
329 not actually do a sign-extend or zero-extend, but can leave the
330 higher-order bits of the result rtx undefined, for example, in the case
331 of logical operations, but not right shifts. */
334 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
335 int unsignedp
, int no_extend
)
339 /* If we don't have to extend and this is a constant, return it. */
340 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
343 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
344 extend since it will be more efficient to do so unless the signedness of
345 a promoted object differs from our extension. */
347 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
348 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
349 return convert_modes (mode
, oldmode
, op
, unsignedp
);
351 /* If MODE is no wider than a single word, we return a lowpart or paradoxical
353 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
354 return gen_lowpart (mode
, force_reg (GET_MODE (op
), op
));
356 /* Otherwise, get an object of MODE, clobber it, and set the low-order
359 result
= gen_reg_rtx (mode
);
360 emit_clobber (result
);
361 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
365 /* Return the optab used for computing the operation given by the tree code,
366 CODE and the tree EXP. This function is not always usable (for example, it
367 cannot give complete results for multiplication or division) but probably
368 ought to be relied on more widely throughout the expander. */
370 optab_for_tree_code (enum tree_code code
, const_tree type
,
371 enum optab_subtype subtype
)
383 return one_cmpl_optab
;
388 case MULT_HIGHPART_EXPR
:
389 return TYPE_UNSIGNED (type
) ? umul_highpart_optab
: smul_highpart_optab
;
395 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
403 if (TYPE_SATURATING(type
))
404 return TYPE_UNSIGNED(type
) ? usdiv_optab
: ssdiv_optab
;
405 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
408 if (TREE_CODE (type
) == VECTOR_TYPE
)
410 if (subtype
== optab_vector
)
411 return TYPE_SATURATING (type
) ? unknown_optab
: vashl_optab
;
413 gcc_assert (subtype
== optab_scalar
);
415 if (TYPE_SATURATING(type
))
416 return TYPE_UNSIGNED(type
) ? usashl_optab
: ssashl_optab
;
420 if (TREE_CODE (type
) == VECTOR_TYPE
)
422 if (subtype
== optab_vector
)
423 return TYPE_UNSIGNED (type
) ? vlshr_optab
: vashr_optab
;
425 gcc_assert (subtype
== optab_scalar
);
427 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
430 if (TREE_CODE (type
) == VECTOR_TYPE
)
432 if (subtype
== optab_vector
)
435 gcc_assert (subtype
== optab_scalar
);
440 if (TREE_CODE (type
) == VECTOR_TYPE
)
442 if (subtype
== optab_vector
)
445 gcc_assert (subtype
== optab_scalar
);
450 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
453 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
455 case REALIGN_LOAD_EXPR
:
456 return vec_realign_load_optab
;
459 return TYPE_UNSIGNED (type
) ? usum_widen_optab
: ssum_widen_optab
;
462 return TYPE_UNSIGNED (type
) ? udot_prod_optab
: sdot_prod_optab
;
464 case WIDEN_MULT_PLUS_EXPR
:
465 return (TYPE_UNSIGNED (type
)
466 ? (TYPE_SATURATING (type
)
467 ? usmadd_widen_optab
: umadd_widen_optab
)
468 : (TYPE_SATURATING (type
)
469 ? ssmadd_widen_optab
: smadd_widen_optab
));
471 case WIDEN_MULT_MINUS_EXPR
:
472 return (TYPE_UNSIGNED (type
)
473 ? (TYPE_SATURATING (type
)
474 ? usmsub_widen_optab
: umsub_widen_optab
)
475 : (TYPE_SATURATING (type
)
476 ? ssmsub_widen_optab
: smsub_widen_optab
));
482 return TYPE_UNSIGNED (type
) ? reduc_umax_optab
: reduc_smax_optab
;
485 return TYPE_UNSIGNED (type
) ? reduc_umin_optab
: reduc_smin_optab
;
487 case REDUC_PLUS_EXPR
:
488 return TYPE_UNSIGNED (type
) ? reduc_uplus_optab
: reduc_splus_optab
;
490 case VEC_LSHIFT_EXPR
:
491 return vec_shl_optab
;
493 case VEC_RSHIFT_EXPR
:
494 return vec_shr_optab
;
496 case VEC_WIDEN_MULT_HI_EXPR
:
497 return TYPE_UNSIGNED (type
) ?
498 vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
500 case VEC_WIDEN_MULT_LO_EXPR
:
501 return TYPE_UNSIGNED (type
) ?
502 vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
504 case VEC_WIDEN_MULT_EVEN_EXPR
:
505 return TYPE_UNSIGNED (type
) ?
506 vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
508 case VEC_WIDEN_MULT_ODD_EXPR
:
509 return TYPE_UNSIGNED (type
) ?
510 vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
512 case VEC_WIDEN_LSHIFT_HI_EXPR
:
513 return TYPE_UNSIGNED (type
) ?
514 vec_widen_ushiftl_hi_optab
: vec_widen_sshiftl_hi_optab
;
516 case VEC_WIDEN_LSHIFT_LO_EXPR
:
517 return TYPE_UNSIGNED (type
) ?
518 vec_widen_ushiftl_lo_optab
: vec_widen_sshiftl_lo_optab
;
520 case VEC_UNPACK_HI_EXPR
:
521 return TYPE_UNSIGNED (type
) ?
522 vec_unpacku_hi_optab
: vec_unpacks_hi_optab
;
524 case VEC_UNPACK_LO_EXPR
:
525 return TYPE_UNSIGNED (type
) ?
526 vec_unpacku_lo_optab
: vec_unpacks_lo_optab
;
528 case VEC_UNPACK_FLOAT_HI_EXPR
:
529 /* The signedness is determined from input operand. */
530 return TYPE_UNSIGNED (type
) ?
531 vec_unpacku_float_hi_optab
: vec_unpacks_float_hi_optab
;
533 case VEC_UNPACK_FLOAT_LO_EXPR
:
534 /* The signedness is determined from input operand. */
535 return TYPE_UNSIGNED (type
) ?
536 vec_unpacku_float_lo_optab
: vec_unpacks_float_lo_optab
;
538 case VEC_PACK_TRUNC_EXPR
:
539 return vec_pack_trunc_optab
;
541 case VEC_PACK_SAT_EXPR
:
542 return TYPE_UNSIGNED (type
) ? vec_pack_usat_optab
: vec_pack_ssat_optab
;
544 case VEC_PACK_FIX_TRUNC_EXPR
:
545 /* The signedness is determined from output operand. */
546 return TYPE_UNSIGNED (type
) ?
547 vec_pack_ufix_trunc_optab
: vec_pack_sfix_trunc_optab
;
553 trapv
= INTEGRAL_TYPE_P (type
) && TYPE_OVERFLOW_TRAPS (type
);
556 case POINTER_PLUS_EXPR
:
558 if (TYPE_SATURATING(type
))
559 return TYPE_UNSIGNED(type
) ? usadd_optab
: ssadd_optab
;
560 return trapv
? addv_optab
: add_optab
;
563 if (TYPE_SATURATING(type
))
564 return TYPE_UNSIGNED(type
) ? ussub_optab
: sssub_optab
;
565 return trapv
? subv_optab
: sub_optab
;
568 if (TYPE_SATURATING(type
))
569 return TYPE_UNSIGNED(type
) ? usmul_optab
: ssmul_optab
;
570 return trapv
? smulv_optab
: smul_optab
;
573 if (TYPE_SATURATING(type
))
574 return TYPE_UNSIGNED(type
) ? usneg_optab
: ssneg_optab
;
575 return trapv
? negv_optab
: neg_optab
;
578 return trapv
? absv_optab
: abs_optab
;
581 return unknown_optab
;
586 /* Expand vector widening operations.
588 There are two different classes of operations handled here:
589 1) Operations whose result is wider than all the arguments to the operation.
590 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
591 In this case OP0 and optionally OP1 would be initialized,
592 but WIDE_OP wouldn't (not relevant for this case).
593 2) Operations whose result is of the same size as the last argument to the
594 operation, but wider than all the other arguments to the operation.
595 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
596 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
598 E.g, when called to expand the following operations, this is how
599 the arguments will be initialized:
601 widening-sum 2 oprnd0 - oprnd1
602 widening-dot-product 3 oprnd0 oprnd1 oprnd2
603 widening-mult 2 oprnd0 oprnd1 -
604 type-promotion (vec-unpack) 1 oprnd0 - - */
607 expand_widen_pattern_expr (sepops ops
, rtx op0
, rtx op1
, rtx wide_op
,
608 rtx target
, int unsignedp
)
610 struct expand_operand eops
[4];
611 tree oprnd0
, oprnd1
, oprnd2
;
612 enum machine_mode wmode
= VOIDmode
, tmode0
, tmode1
= VOIDmode
;
613 optab widen_pattern_optab
;
614 enum insn_code icode
;
615 int nops
= TREE_CODE_LENGTH (ops
->code
);
619 tmode0
= TYPE_MODE (TREE_TYPE (oprnd0
));
620 widen_pattern_optab
=
621 optab_for_tree_code (ops
->code
, TREE_TYPE (oprnd0
), optab_default
);
622 if (ops
->code
== WIDEN_MULT_PLUS_EXPR
623 || ops
->code
== WIDEN_MULT_MINUS_EXPR
)
624 icode
= find_widening_optab_handler (widen_pattern_optab
,
625 TYPE_MODE (TREE_TYPE (ops
->op2
)),
628 icode
= optab_handler (widen_pattern_optab
, tmode0
);
629 gcc_assert (icode
!= CODE_FOR_nothing
);
634 tmode1
= TYPE_MODE (TREE_TYPE (oprnd1
));
637 /* The last operand is of a wider mode than the rest of the operands. */
642 gcc_assert (tmode1
== tmode0
);
645 wmode
= TYPE_MODE (TREE_TYPE (oprnd2
));
649 create_output_operand (&eops
[op
++], target
, TYPE_MODE (ops
->type
));
650 create_convert_operand_from (&eops
[op
++], op0
, tmode0
, unsignedp
);
652 create_convert_operand_from (&eops
[op
++], op1
, tmode1
, unsignedp
);
654 create_convert_operand_from (&eops
[op
++], wide_op
, wmode
, unsignedp
);
655 expand_insn (icode
, op
, eops
);
656 return eops
[0].value
;
659 /* Generate code to perform an operation specified by TERNARY_OPTAB
660 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
662 UNSIGNEDP is for the case where we have to widen the operands
663 to perform the operation. It says to use zero-extension.
665 If TARGET is nonzero, the value
666 is generated there, if it is convenient to do so.
667 In all cases an rtx is returned for the locus of the value;
668 this may or may not be TARGET. */
671 expand_ternary_op (enum machine_mode mode
, optab ternary_optab
, rtx op0
,
672 rtx op1
, rtx op2
, rtx target
, int unsignedp
)
674 struct expand_operand ops
[4];
675 enum insn_code icode
= optab_handler (ternary_optab
, mode
);
677 gcc_assert (optab_handler (ternary_optab
, mode
) != CODE_FOR_nothing
);
679 create_output_operand (&ops
[0], target
, mode
);
680 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
681 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
682 create_convert_operand_from (&ops
[3], op2
, mode
, unsignedp
);
683 expand_insn (icode
, 4, ops
);
688 /* Like expand_binop, but return a constant rtx if the result can be
689 calculated at compile time. The arguments and return value are
690 otherwise the same as for expand_binop. */
693 simplify_expand_binop (enum machine_mode mode
, optab binoptab
,
694 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
695 enum optab_methods methods
)
697 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
699 rtx x
= simplify_binary_operation (optab_to_code (binoptab
),
705 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
708 /* Like simplify_expand_binop, but always put the result in TARGET.
709 Return true if the expansion succeeded. */
712 force_expand_binop (enum machine_mode mode
, optab binoptab
,
713 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
714 enum optab_methods methods
)
716 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
717 target
, unsignedp
, methods
);
721 emit_move_insn (target
, x
);
725 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
728 expand_vec_shift_expr (sepops ops
, rtx target
)
730 struct expand_operand eops
[3];
731 enum insn_code icode
;
732 rtx rtx_op1
, rtx_op2
;
733 enum machine_mode mode
= TYPE_MODE (ops
->type
);
734 tree vec_oprnd
= ops
->op0
;
735 tree shift_oprnd
= ops
->op1
;
740 case VEC_RSHIFT_EXPR
:
741 shift_optab
= vec_shr_optab
;
743 case VEC_LSHIFT_EXPR
:
744 shift_optab
= vec_shl_optab
;
750 icode
= optab_handler (shift_optab
, mode
);
751 gcc_assert (icode
!= CODE_FOR_nothing
);
753 rtx_op1
= expand_normal (vec_oprnd
);
754 rtx_op2
= expand_normal (shift_oprnd
);
756 create_output_operand (&eops
[0], target
, mode
);
757 create_input_operand (&eops
[1], rtx_op1
, GET_MODE (rtx_op1
));
758 create_convert_operand_from_type (&eops
[2], rtx_op2
, TREE_TYPE (shift_oprnd
));
759 expand_insn (icode
, 3, eops
);
761 return eops
[0].value
;
764 /* Create a new vector value in VMODE with all elements set to OP. The
765 mode of OP must be the element mode of VMODE. If OP is a constant,
766 then the return value will be a constant. */
769 expand_vector_broadcast (enum machine_mode vmode
, rtx op
)
771 enum insn_code icode
;
776 gcc_checking_assert (VECTOR_MODE_P (vmode
));
778 n
= GET_MODE_NUNITS (vmode
);
779 vec
= rtvec_alloc (n
);
780 for (i
= 0; i
< n
; ++i
)
781 RTVEC_ELT (vec
, i
) = op
;
784 return gen_rtx_CONST_VECTOR (vmode
, vec
);
786 /* ??? If the target doesn't have a vec_init, then we have no easy way
787 of performing this operation. Most of this sort of generic support
788 is hidden away in the vector lowering support in gimple. */
789 icode
= optab_handler (vec_init_optab
, vmode
);
790 if (icode
== CODE_FOR_nothing
)
793 ret
= gen_reg_rtx (vmode
);
794 emit_insn (GEN_FCN (icode
) (ret
, gen_rtx_PARALLEL (vmode
, vec
)));
799 /* This subroutine of expand_doubleword_shift handles the cases in which
800 the effective shift value is >= BITS_PER_WORD. The arguments and return
801 value are the same as for the parent routine, except that SUPERWORD_OP1
802 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
803 INTO_TARGET may be null if the caller has decided to calculate it. */
806 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
807 rtx outof_target
, rtx into_target
,
808 int unsignedp
, enum optab_methods methods
)
810 if (into_target
!= 0)
811 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
812 into_target
, unsignedp
, methods
))
815 if (outof_target
!= 0)
817 /* For a signed right shift, we must fill OUTOF_TARGET with copies
818 of the sign bit, otherwise we must fill it with zeros. */
819 if (binoptab
!= ashr_optab
)
820 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
822 if (!force_expand_binop (word_mode
, binoptab
,
823 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
824 outof_target
, unsignedp
, methods
))
830 /* This subroutine of expand_doubleword_shift handles the cases in which
831 the effective shift value is < BITS_PER_WORD. The arguments and return
832 value are the same as for the parent routine. */
835 expand_subword_shift (enum machine_mode op1_mode
, optab binoptab
,
836 rtx outof_input
, rtx into_input
, rtx op1
,
837 rtx outof_target
, rtx into_target
,
838 int unsignedp
, enum optab_methods methods
,
839 unsigned HOST_WIDE_INT shift_mask
)
841 optab reverse_unsigned_shift
, unsigned_shift
;
844 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
845 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
847 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
848 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
849 the opposite direction to BINOPTAB. */
850 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
852 carries
= outof_input
;
853 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
854 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
859 /* We must avoid shifting by BITS_PER_WORD bits since that is either
860 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
861 has unknown behavior. Do a single shift first, then shift by the
862 remainder. It's OK to use ~OP1 as the remainder if shift counts
863 are truncated to the mode size. */
864 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
865 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
866 if (shift_mask
== BITS_PER_WORD
- 1)
868 tmp
= immed_double_const (-1, -1, op1_mode
);
869 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
874 tmp
= immed_double_const (BITS_PER_WORD
- 1, 0, op1_mode
);
875 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
879 if (tmp
== 0 || carries
== 0)
881 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
882 carries
, tmp
, 0, unsignedp
, methods
);
886 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
887 so the result can go directly into INTO_TARGET if convenient. */
888 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
889 into_target
, unsignedp
, methods
);
893 /* Now OR in the bits carried over from OUTOF_INPUT. */
894 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
895 into_target
, unsignedp
, methods
))
898 /* Use a standard word_mode shift for the out-of half. */
899 if (outof_target
!= 0)
900 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
901 outof_target
, unsignedp
, methods
))
908 #ifdef HAVE_conditional_move
909 /* Try implementing expand_doubleword_shift using conditional moves.
910 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
911 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
912 are the shift counts to use in the former and latter case. All other
913 arguments are the same as the parent routine. */
916 expand_doubleword_shift_condmove (enum machine_mode op1_mode
, optab binoptab
,
917 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
918 rtx outof_input
, rtx into_input
,
919 rtx subword_op1
, rtx superword_op1
,
920 rtx outof_target
, rtx into_target
,
921 int unsignedp
, enum optab_methods methods
,
922 unsigned HOST_WIDE_INT shift_mask
)
924 rtx outof_superword
, into_superword
;
926 /* Put the superword version of the output into OUTOF_SUPERWORD and
928 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
929 if (outof_target
!= 0 && subword_op1
== superword_op1
)
931 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
932 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
933 into_superword
= outof_target
;
934 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
935 outof_superword
, 0, unsignedp
, methods
))
940 into_superword
= gen_reg_rtx (word_mode
);
941 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
942 outof_superword
, into_superword
,
947 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
948 if (!expand_subword_shift (op1_mode
, binoptab
,
949 outof_input
, into_input
, subword_op1
,
950 outof_target
, into_target
,
951 unsignedp
, methods
, shift_mask
))
954 /* Select between them. Do the INTO half first because INTO_SUPERWORD
955 might be the current value of OUTOF_TARGET. */
956 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
957 into_target
, into_superword
, word_mode
, false))
960 if (outof_target
!= 0)
961 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
962 outof_target
, outof_superword
,
970 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
971 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
972 input operand; the shift moves bits in the direction OUTOF_INPUT->
973 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
974 of the target. OP1 is the shift count and OP1_MODE is its mode.
975 If OP1 is constant, it will have been truncated as appropriate
976 and is known to be nonzero.
978 If SHIFT_MASK is zero, the result of word shifts is undefined when the
979 shift count is outside the range [0, BITS_PER_WORD). This routine must
980 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
982 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
983 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
984 fill with zeros or sign bits as appropriate.
986 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
987 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
988 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
989 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
992 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
993 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
994 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
995 function wants to calculate it itself.
997 Return true if the shift could be successfully synthesized. */
1000 expand_doubleword_shift (enum machine_mode op1_mode
, optab binoptab
,
1001 rtx outof_input
, rtx into_input
, rtx op1
,
1002 rtx outof_target
, rtx into_target
,
1003 int unsignedp
, enum optab_methods methods
,
1004 unsigned HOST_WIDE_INT shift_mask
)
1006 rtx superword_op1
, tmp
, cmp1
, cmp2
;
1007 rtx subword_label
, done_label
;
1008 enum rtx_code cmp_code
;
1010 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1011 fill the result with sign or zero bits as appropriate. If so, the value
1012 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1013 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1014 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1016 This isn't worthwhile for constant shifts since the optimizers will
1017 cope better with in-range shift counts. */
1018 if (shift_mask
>= BITS_PER_WORD
1019 && outof_target
!= 0
1020 && !CONSTANT_P (op1
))
1022 if (!expand_doubleword_shift (op1_mode
, binoptab
,
1023 outof_input
, into_input
, op1
,
1025 unsignedp
, methods
, shift_mask
))
1027 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
1028 outof_target
, unsignedp
, methods
))
1033 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1034 is true when the effective shift value is less than BITS_PER_WORD.
1035 Set SUPERWORD_OP1 to the shift count that should be used to shift
1036 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1037 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
1038 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
1040 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1041 is a subword shift count. */
1042 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
1044 cmp2
= CONST0_RTX (op1_mode
);
1046 superword_op1
= op1
;
1050 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1051 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
1053 cmp2
= CONST0_RTX (op1_mode
);
1055 superword_op1
= cmp1
;
1060 /* If we can compute the condition at compile time, pick the
1061 appropriate subroutine. */
1062 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
1063 if (tmp
!= 0 && CONST_INT_P (tmp
))
1065 if (tmp
== const0_rtx
)
1066 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1067 outof_target
, into_target
,
1068 unsignedp
, methods
);
1070 return expand_subword_shift (op1_mode
, binoptab
,
1071 outof_input
, into_input
, op1
,
1072 outof_target
, into_target
,
1073 unsignedp
, methods
, shift_mask
);
1076 #ifdef HAVE_conditional_move
1077 /* Try using conditional moves to generate straight-line code. */
1079 rtx start
= get_last_insn ();
1080 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
1081 cmp_code
, cmp1
, cmp2
,
1082 outof_input
, into_input
,
1084 outof_target
, into_target
,
1085 unsignedp
, methods
, shift_mask
))
1087 delete_insns_since (start
);
1091 /* As a last resort, use branches to select the correct alternative. */
1092 subword_label
= gen_label_rtx ();
1093 done_label
= gen_label_rtx ();
1096 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
1097 0, 0, subword_label
, -1);
1100 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1101 outof_target
, into_target
,
1102 unsignedp
, methods
))
1105 emit_jump_insn (gen_jump (done_label
));
1107 emit_label (subword_label
);
1109 if (!expand_subword_shift (op1_mode
, binoptab
,
1110 outof_input
, into_input
, op1
,
1111 outof_target
, into_target
,
1112 unsignedp
, methods
, shift_mask
))
1115 emit_label (done_label
);
1119 /* Subroutine of expand_binop. Perform a double word multiplication of
1120 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1121 as the target's word_mode. This function return NULL_RTX if anything
1122 goes wrong, in which case it may have already emitted instructions
1123 which need to be deleted.
1125 If we want to multiply two two-word values and have normal and widening
1126 multiplies of single-word values, we can do this with three smaller
1129 The multiplication proceeds as follows:
1130 _______________________
1131 [__op0_high_|__op0_low__]
1132 _______________________
1133 * [__op1_high_|__op1_low__]
1134 _______________________________________________
1135 _______________________
1136 (1) [__op0_low__*__op1_low__]
1137 _______________________
1138 (2a) [__op0_low__*__op1_high_]
1139 _______________________
1140 (2b) [__op0_high_*__op1_low__]
1141 _______________________
1142 (3) [__op0_high_*__op1_high_]
1145 This gives a 4-word result. Since we are only interested in the
1146 lower 2 words, partial result (3) and the upper words of (2a) and
1147 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1148 calculated using non-widening multiplication.
1150 (1), however, needs to be calculated with an unsigned widening
1151 multiplication. If this operation is not directly supported we
1152 try using a signed widening multiplication and adjust the result.
1153 This adjustment works as follows:
1155 If both operands are positive then no adjustment is needed.
1157 If the operands have different signs, for example op0_low < 0 and
1158 op1_low >= 0, the instruction treats the most significant bit of
1159 op0_low as a sign bit instead of a bit with significance
1160 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1161 with 2**BITS_PER_WORD - op0_low, and two's complements the
1162 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1165 Similarly, if both operands are negative, we need to add
1166 (op0_low + op1_low) * 2**BITS_PER_WORD.
1168 We use a trick to adjust quickly. We logically shift op0_low right
1169 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1170 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1171 logical shift exists, we do an arithmetic right shift and subtract
1175 expand_doubleword_mult (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
1176 bool umulp
, enum optab_methods methods
)
1178 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1179 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1180 rtx wordm1
= umulp
? NULL_RTX
: GEN_INT (BITS_PER_WORD
- 1);
1181 rtx product
, adjust
, product_high
, temp
;
1183 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1184 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1185 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1186 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1188 /* If we're using an unsigned multiply to directly compute the product
1189 of the low-order words of the operands and perform any required
1190 adjustments of the operands, we begin by trying two more multiplications
1191 and then computing the appropriate sum.
1193 We have checked above that the required addition is provided.
1194 Full-word addition will normally always succeed, especially if
1195 it is provided at all, so we don't worry about its failure. The
1196 multiplication may well fail, however, so we do handle that. */
1200 /* ??? This could be done with emit_store_flag where available. */
1201 temp
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1202 NULL_RTX
, 1, methods
);
1204 op0_high
= expand_binop (word_mode
, add_optab
, op0_high
, temp
,
1205 NULL_RTX
, 0, OPTAB_DIRECT
);
1208 temp
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1209 NULL_RTX
, 0, methods
);
1212 op0_high
= expand_binop (word_mode
, sub_optab
, op0_high
, temp
,
1213 NULL_RTX
, 0, OPTAB_DIRECT
);
1220 adjust
= expand_binop (word_mode
, smul_optab
, op0_high
, op1_low
,
1221 NULL_RTX
, 0, OPTAB_DIRECT
);
1225 /* OP0_HIGH should now be dead. */
1229 /* ??? This could be done with emit_store_flag where available. */
1230 temp
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1231 NULL_RTX
, 1, methods
);
1233 op1_high
= expand_binop (word_mode
, add_optab
, op1_high
, temp
,
1234 NULL_RTX
, 0, OPTAB_DIRECT
);
1237 temp
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1238 NULL_RTX
, 0, methods
);
1241 op1_high
= expand_binop (word_mode
, sub_optab
, op1_high
, temp
,
1242 NULL_RTX
, 0, OPTAB_DIRECT
);
1249 temp
= expand_binop (word_mode
, smul_optab
, op1_high
, op0_low
,
1250 NULL_RTX
, 0, OPTAB_DIRECT
);
1254 /* OP1_HIGH should now be dead. */
1256 adjust
= expand_binop (word_mode
, add_optab
, adjust
, temp
,
1257 NULL_RTX
, 0, OPTAB_DIRECT
);
1259 if (target
&& !REG_P (target
))
1263 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1264 target
, 1, OPTAB_DIRECT
);
1266 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1267 target
, 1, OPTAB_DIRECT
);
1272 product_high
= operand_subword (product
, high
, 1, mode
);
1273 adjust
= expand_binop (word_mode
, add_optab
, product_high
, adjust
,
1274 NULL_RTX
, 0, OPTAB_DIRECT
);
1275 emit_move_insn (product_high
, adjust
);
1279 /* Wrapper around expand_binop which takes an rtx code to specify
1280 the operation to perform, not an optab pointer. All other
1281 arguments are the same. */
1283 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
1284 rtx op1
, rtx target
, int unsignedp
,
1285 enum optab_methods methods
)
1287 optab binop
= code_to_optab (code
);
1290 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
1293 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1294 binop. Order them according to commutative_operand_precedence and, if
1295 possible, try to put TARGET or a pseudo first. */
1297 swap_commutative_operands_with_target (rtx target
, rtx op0
, rtx op1
)
1299 int op0_prec
= commutative_operand_precedence (op0
);
1300 int op1_prec
= commutative_operand_precedence (op1
);
1302 if (op0_prec
< op1_prec
)
1305 if (op0_prec
> op1_prec
)
1308 /* With equal precedence, both orders are ok, but it is better if the
1309 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1310 if (target
== 0 || REG_P (target
))
1311 return (REG_P (op1
) && !REG_P (op0
)) || target
== op1
;
1313 return rtx_equal_p (op1
, target
);
1316 /* Return true if BINOPTAB implements a shift operation. */
1319 shift_optab_p (optab binoptab
)
1321 switch (optab_to_code (binoptab
))
1337 /* Return true if BINOPTAB implements a commutative binary operation. */
1340 commutative_optab_p (optab binoptab
)
1342 return (GET_RTX_CLASS (optab_to_code (binoptab
)) == RTX_COMM_ARITH
1343 || binoptab
== smul_widen_optab
1344 || binoptab
== umul_widen_optab
1345 || binoptab
== smul_highpart_optab
1346 || binoptab
== umul_highpart_optab
);
1349 /* X is to be used in mode MODE as operand OPN to BINOPTAB. If we're
1350 optimizing, and if the operand is a constant that costs more than
1351 1 instruction, force the constant into a register and return that
1352 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1355 avoid_expensive_constant (enum machine_mode mode
, optab binoptab
,
1356 int opn
, rtx x
, bool unsignedp
)
1358 bool speed
= optimize_insn_for_speed_p ();
1360 if (mode
!= VOIDmode
1363 && (rtx_cost (x
, optab_to_code (binoptab
), opn
, speed
)
1364 > set_src_cost (x
, speed
)))
1366 if (CONST_INT_P (x
))
1368 HOST_WIDE_INT intval
= trunc_int_for_mode (INTVAL (x
), mode
);
1369 if (intval
!= INTVAL (x
))
1370 x
= GEN_INT (intval
);
1373 x
= convert_modes (mode
, VOIDmode
, x
, unsignedp
);
1374 x
= force_reg (mode
, x
);
1379 /* Helper function for expand_binop: handle the case where there
1380 is an insn that directly implements the indicated operation.
1381 Returns null if this is not possible. */
1383 expand_binop_directly (enum machine_mode mode
, optab binoptab
,
1385 rtx target
, int unsignedp
, enum optab_methods methods
,
1388 enum machine_mode from_mode
= widened_mode (mode
, op0
, op1
);
1389 enum insn_code icode
= find_widening_optab_handler (binoptab
, mode
,
1391 enum machine_mode xmode0
= insn_data
[(int) icode
].operand
[1].mode
;
1392 enum machine_mode xmode1
= insn_data
[(int) icode
].operand
[2].mode
;
1393 enum machine_mode mode0
, mode1
, tmp_mode
;
1394 struct expand_operand ops
[3];
1397 rtx xop0
= op0
, xop1
= op1
;
1400 /* If it is a commutative operator and the modes would match
1401 if we would swap the operands, we can save the conversions. */
1402 commutative_p
= commutative_optab_p (binoptab
);
1404 && GET_MODE (xop0
) != xmode0
&& GET_MODE (xop1
) != xmode1
1405 && GET_MODE (xop0
) == xmode1
&& GET_MODE (xop1
) == xmode1
)
1412 /* If we are optimizing, force expensive constants into a register. */
1413 xop0
= avoid_expensive_constant (xmode0
, binoptab
, 0, xop0
, unsignedp
);
1414 if (!shift_optab_p (binoptab
))
1415 xop1
= avoid_expensive_constant (xmode1
, binoptab
, 1, xop1
, unsignedp
);
1417 /* In case the insn wants input operands in modes different from
1418 those of the actual operands, convert the operands. It would
1419 seem that we don't need to convert CONST_INTs, but we do, so
1420 that they're properly zero-extended, sign-extended or truncated
1423 mode0
= GET_MODE (xop0
) != VOIDmode
? GET_MODE (xop0
) : mode
;
1424 if (xmode0
!= VOIDmode
&& xmode0
!= mode0
)
1426 xop0
= convert_modes (xmode0
, mode0
, xop0
, unsignedp
);
1430 mode1
= GET_MODE (xop1
) != VOIDmode
? GET_MODE (xop1
) : mode
;
1431 if (xmode1
!= VOIDmode
&& xmode1
!= mode1
)
1433 xop1
= convert_modes (xmode1
, mode1
, xop1
, unsignedp
);
1437 /* If operation is commutative,
1438 try to make the first operand a register.
1439 Even better, try to make it the same as the target.
1440 Also try to make the last operand a constant. */
1442 && swap_commutative_operands_with_target (target
, xop0
, xop1
))
1449 /* Now, if insn's predicates don't allow our operands, put them into
1452 if (binoptab
== vec_pack_trunc_optab
1453 || binoptab
== vec_pack_usat_optab
1454 || binoptab
== vec_pack_ssat_optab
1455 || binoptab
== vec_pack_ufix_trunc_optab
1456 || binoptab
== vec_pack_sfix_trunc_optab
)
1458 /* The mode of the result is different then the mode of the
1460 tmp_mode
= insn_data
[(int) icode
].operand
[0].mode
;
1461 if (GET_MODE_NUNITS (tmp_mode
) != 2 * GET_MODE_NUNITS (mode
))
1463 delete_insns_since (last
);
1470 create_output_operand (&ops
[0], target
, tmp_mode
);
1471 create_input_operand (&ops
[1], xop0
, mode0
);
1472 create_input_operand (&ops
[2], xop1
, mode1
);
1473 pat
= maybe_gen_insn (icode
, 3, ops
);
1476 /* If PAT is composed of more than one insn, try to add an appropriate
1477 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1478 operand, call expand_binop again, this time without a target. */
1479 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
1480 && ! add_equal_note (pat
, ops
[0].value
, optab_to_code (binoptab
),
1481 ops
[1].value
, ops
[2].value
))
1483 delete_insns_since (last
);
1484 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
1485 unsignedp
, methods
);
1489 return ops
[0].value
;
1491 delete_insns_since (last
);
1495 /* Generate code to perform an operation specified by BINOPTAB
1496 on operands OP0 and OP1, with result having machine-mode MODE.
1498 UNSIGNEDP is for the case where we have to widen the operands
1499 to perform the operation. It says to use zero-extension.
1501 If TARGET is nonzero, the value
1502 is generated there, if it is convenient to do so.
1503 In all cases an rtx is returned for the locus of the value;
1504 this may or may not be TARGET. */
1507 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
1508 rtx target
, int unsignedp
, enum optab_methods methods
)
1510 enum optab_methods next_methods
1511 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
1512 ? OPTAB_WIDEN
: methods
);
1513 enum mode_class mclass
;
1514 enum machine_mode wider_mode
;
1517 rtx entry_last
= get_last_insn ();
1520 mclass
= GET_MODE_CLASS (mode
);
1522 /* If subtracting an integer constant, convert this into an addition of
1523 the negated constant. */
1525 if (binoptab
== sub_optab
&& CONST_INT_P (op1
))
1527 op1
= negate_rtx (mode
, op1
);
1528 binoptab
= add_optab
;
1531 /* Record where to delete back to if we backtrack. */
1532 last
= get_last_insn ();
1534 /* If we can do it with a three-operand insn, do so. */
1536 if (methods
!= OPTAB_MUST_WIDEN
1537 && find_widening_optab_handler (binoptab
, mode
,
1538 widened_mode (mode
, op0
, op1
), 1)
1539 != CODE_FOR_nothing
)
1541 temp
= expand_binop_directly (mode
, binoptab
, op0
, op1
, target
,
1542 unsignedp
, methods
, last
);
1547 /* If we were trying to rotate, and that didn't work, try rotating
1548 the other direction before falling back to shifts and bitwise-or. */
1549 if (((binoptab
== rotl_optab
1550 && optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
1551 || (binoptab
== rotr_optab
1552 && optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
))
1553 && mclass
== MODE_INT
)
1555 optab otheroptab
= (binoptab
== rotl_optab
? rotr_optab
: rotl_optab
);
1557 unsigned int bits
= GET_MODE_PRECISION (mode
);
1559 if (CONST_INT_P (op1
))
1560 newop1
= GEN_INT (bits
- INTVAL (op1
));
1561 else if (targetm
.shift_truncation_mask (mode
) == bits
- 1)
1562 newop1
= negate_rtx (GET_MODE (op1
), op1
);
1564 newop1
= expand_binop (GET_MODE (op1
), sub_optab
,
1565 GEN_INT (bits
), op1
,
1566 NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1568 temp
= expand_binop_directly (mode
, otheroptab
, op0
, newop1
,
1569 target
, unsignedp
, methods
, last
);
1574 /* If this is a multiply, see if we can do a widening operation that
1575 takes operands of this mode and makes a wider mode. */
1577 if (binoptab
== smul_optab
1578 && GET_MODE_2XWIDER_MODE (mode
) != VOIDmode
1579 && (widening_optab_handler ((unsignedp
? umul_widen_optab
1580 : smul_widen_optab
),
1581 GET_MODE_2XWIDER_MODE (mode
), mode
)
1582 != CODE_FOR_nothing
))
1584 temp
= expand_binop (GET_MODE_2XWIDER_MODE (mode
),
1585 unsignedp
? umul_widen_optab
: smul_widen_optab
,
1586 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1590 if (GET_MODE_CLASS (mode
) == MODE_INT
1591 && TRULY_NOOP_TRUNCATION_MODES_P (mode
, GET_MODE (temp
)))
1592 return gen_lowpart (mode
, temp
);
1594 return convert_to_mode (mode
, temp
, unsignedp
);
1598 /* If this is a vector shift by a scalar, see if we can do a vector
1599 shift by a vector. If so, broadcast the scalar into a vector. */
1600 if (mclass
== MODE_VECTOR_INT
)
1602 optab otheroptab
= unknown_optab
;
1604 if (binoptab
== ashl_optab
)
1605 otheroptab
= vashl_optab
;
1606 else if (binoptab
== ashr_optab
)
1607 otheroptab
= vashr_optab
;
1608 else if (binoptab
== lshr_optab
)
1609 otheroptab
= vlshr_optab
;
1610 else if (binoptab
== rotl_optab
)
1611 otheroptab
= vrotl_optab
;
1612 else if (binoptab
== rotr_optab
)
1613 otheroptab
= vrotr_optab
;
1615 if (otheroptab
&& optab_handler (otheroptab
, mode
) != CODE_FOR_nothing
)
1617 rtx vop1
= expand_vector_broadcast (mode
, op1
);
1620 temp
= expand_binop_directly (mode
, otheroptab
, op0
, vop1
,
1621 target
, unsignedp
, methods
, last
);
1628 /* Look for a wider mode of the same class for which we think we
1629 can open-code the operation. Check for a widening multiply at the
1630 wider mode as well. */
1632 if (CLASS_HAS_WIDER_MODES_P (mclass
)
1633 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
1634 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
1635 wider_mode
!= VOIDmode
;
1636 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1638 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
1639 || (binoptab
== smul_optab
1640 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
1641 && (find_widening_optab_handler ((unsignedp
1643 : smul_widen_optab
),
1644 GET_MODE_WIDER_MODE (wider_mode
),
1646 != CODE_FOR_nothing
)))
1648 rtx xop0
= op0
, xop1
= op1
;
1651 /* For certain integer operations, we need not actually extend
1652 the narrow operands, as long as we will truncate
1653 the results to the same narrowness. */
1655 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1656 || binoptab
== xor_optab
1657 || binoptab
== add_optab
|| binoptab
== sub_optab
1658 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1659 && mclass
== MODE_INT
)
1662 xop0
= avoid_expensive_constant (mode
, binoptab
, 0,
1664 if (binoptab
!= ashl_optab
)
1665 xop1
= avoid_expensive_constant (mode
, binoptab
, 1,
1669 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
1671 /* The second operand of a shift must always be extended. */
1672 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1673 no_extend
&& binoptab
!= ashl_optab
);
1675 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1676 unsignedp
, OPTAB_DIRECT
);
1679 if (mclass
!= MODE_INT
1680 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
1683 target
= gen_reg_rtx (mode
);
1684 convert_move (target
, temp
, 0);
1688 return gen_lowpart (mode
, temp
);
1691 delete_insns_since (last
);
1695 /* If operation is commutative,
1696 try to make the first operand a register.
1697 Even better, try to make it the same as the target.
1698 Also try to make the last operand a constant. */
1699 if (commutative_optab_p (binoptab
)
1700 && swap_commutative_operands_with_target (target
, op0
, op1
))
1707 /* These can be done a word at a time. */
1708 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
1709 && mclass
== MODE_INT
1710 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1711 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1716 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1717 won't be accurate, so use a new target. */
1721 || !valid_multiword_target_p (target
))
1722 target
= gen_reg_rtx (mode
);
1726 /* Do the actual arithmetic. */
1727 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1729 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1730 rtx x
= expand_binop (word_mode
, binoptab
,
1731 operand_subword_force (op0
, i
, mode
),
1732 operand_subword_force (op1
, i
, mode
),
1733 target_piece
, unsignedp
, next_methods
);
1738 if (target_piece
!= x
)
1739 emit_move_insn (target_piece
, x
);
1742 insns
= get_insns ();
1745 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1752 /* Synthesize double word shifts from single word shifts. */
1753 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
1754 || binoptab
== ashr_optab
)
1755 && mclass
== MODE_INT
1756 && (CONST_INT_P (op1
) || optimize_insn_for_speed_p ())
1757 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1758 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
)
1759 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
1760 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1761 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1763 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
1764 enum machine_mode op1_mode
;
1766 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1767 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1768 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1770 /* Apply the truncation to constant shifts. */
1771 if (double_shift_mask
> 0 && CONST_INT_P (op1
))
1772 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1774 if (op1
== CONST0_RTX (op1_mode
))
1777 /* Make sure that this is a combination that expand_doubleword_shift
1778 can handle. See the comments there for details. */
1779 if (double_shift_mask
== 0
1780 || (shift_mask
== BITS_PER_WORD
- 1
1781 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1784 rtx into_target
, outof_target
;
1785 rtx into_input
, outof_input
;
1786 int left_shift
, outof_word
;
1788 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1789 won't be accurate, so use a new target. */
1793 || !valid_multiword_target_p (target
))
1794 target
= gen_reg_rtx (mode
);
1798 /* OUTOF_* is the word we are shifting bits away from, and
1799 INTO_* is the word that we are shifting bits towards, thus
1800 they differ depending on the direction of the shift and
1801 WORDS_BIG_ENDIAN. */
1803 left_shift
= binoptab
== ashl_optab
;
1804 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1806 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1807 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1809 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1810 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1812 if (expand_doubleword_shift (op1_mode
, binoptab
,
1813 outof_input
, into_input
, op1
,
1814 outof_target
, into_target
,
1815 unsignedp
, next_methods
, shift_mask
))
1817 insns
= get_insns ();
1827 /* Synthesize double word rotates from single word shifts. */
1828 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1829 && mclass
== MODE_INT
1830 && CONST_INT_P (op1
)
1831 && GET_MODE_PRECISION (mode
) == 2 * BITS_PER_WORD
1832 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1833 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1836 rtx into_target
, outof_target
;
1837 rtx into_input
, outof_input
;
1839 int shift_count
, left_shift
, outof_word
;
1841 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1842 won't be accurate, so use a new target. Do this also if target is not
1843 a REG, first because having a register instead may open optimization
1844 opportunities, and second because if target and op0 happen to be MEMs
1845 designating the same location, we would risk clobbering it too early
1846 in the code sequence we generate below. */
1851 || !valid_multiword_target_p (target
))
1852 target
= gen_reg_rtx (mode
);
1856 shift_count
= INTVAL (op1
);
1858 /* OUTOF_* is the word we are shifting bits away from, and
1859 INTO_* is the word that we are shifting bits towards, thus
1860 they differ depending on the direction of the shift and
1861 WORDS_BIG_ENDIAN. */
1863 left_shift
= (binoptab
== rotl_optab
);
1864 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1866 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1867 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1869 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1870 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1872 if (shift_count
== BITS_PER_WORD
)
1874 /* This is just a word swap. */
1875 emit_move_insn (outof_target
, into_input
);
1876 emit_move_insn (into_target
, outof_input
);
1881 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1882 rtx first_shift_count
, second_shift_count
;
1883 optab reverse_unsigned_shift
, unsigned_shift
;
1885 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1886 ? lshr_optab
: ashl_optab
);
1888 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1889 ? ashl_optab
: lshr_optab
);
1891 if (shift_count
> BITS_PER_WORD
)
1893 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1894 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1898 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1899 second_shift_count
= GEN_INT (shift_count
);
1902 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1903 outof_input
, first_shift_count
,
1904 NULL_RTX
, unsignedp
, next_methods
);
1905 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1906 into_input
, second_shift_count
,
1907 NULL_RTX
, unsignedp
, next_methods
);
1909 if (into_temp1
!= 0 && into_temp2
!= 0)
1910 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1911 into_target
, unsignedp
, next_methods
);
1915 if (inter
!= 0 && inter
!= into_target
)
1916 emit_move_insn (into_target
, inter
);
1918 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1919 into_input
, first_shift_count
,
1920 NULL_RTX
, unsignedp
, next_methods
);
1921 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1922 outof_input
, second_shift_count
,
1923 NULL_RTX
, unsignedp
, next_methods
);
1925 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1926 inter
= expand_binop (word_mode
, ior_optab
,
1927 outof_temp1
, outof_temp2
,
1928 outof_target
, unsignedp
, next_methods
);
1930 if (inter
!= 0 && inter
!= outof_target
)
1931 emit_move_insn (outof_target
, inter
);
1934 insns
= get_insns ();
1944 /* These can be done a word at a time by propagating carries. */
1945 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1946 && mclass
== MODE_INT
1947 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1948 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1951 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1952 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1953 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1954 rtx xop0
, xop1
, xtarget
;
1956 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1957 value is one of those, use it. Otherwise, use 1 since it is the
1958 one easiest to get. */
1959 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1960 int normalizep
= STORE_FLAG_VALUE
;
1965 /* Prepare the operands. */
1966 xop0
= force_reg (mode
, op0
);
1967 xop1
= force_reg (mode
, op1
);
1969 xtarget
= gen_reg_rtx (mode
);
1971 if (target
== 0 || !REG_P (target
) || !valid_multiword_target_p (target
))
1974 /* Indicate for flow that the entire target reg is being set. */
1976 emit_clobber (xtarget
);
1978 /* Do the actual arithmetic. */
1979 for (i
= 0; i
< nwords
; i
++)
1981 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1982 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1983 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1984 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1987 /* Main add/subtract of the input operands. */
1988 x
= expand_binop (word_mode
, binoptab
,
1989 op0_piece
, op1_piece
,
1990 target_piece
, unsignedp
, next_methods
);
1996 /* Store carry from main add/subtract. */
1997 carry_out
= gen_reg_rtx (word_mode
);
1998 carry_out
= emit_store_flag_force (carry_out
,
1999 (binoptab
== add_optab
2002 word_mode
, 1, normalizep
);
2009 /* Add/subtract previous carry to main result. */
2010 newx
= expand_binop (word_mode
,
2011 normalizep
== 1 ? binoptab
: otheroptab
,
2013 NULL_RTX
, 1, next_methods
);
2017 /* Get out carry from adding/subtracting carry in. */
2018 rtx carry_tmp
= gen_reg_rtx (word_mode
);
2019 carry_tmp
= emit_store_flag_force (carry_tmp
,
2020 (binoptab
== add_optab
2023 word_mode
, 1, normalizep
);
2025 /* Logical-ior the two poss. carry together. */
2026 carry_out
= expand_binop (word_mode
, ior_optab
,
2027 carry_out
, carry_tmp
,
2028 carry_out
, 0, next_methods
);
2032 emit_move_insn (target_piece
, newx
);
2036 if (x
!= target_piece
)
2037 emit_move_insn (target_piece
, x
);
2040 carry_in
= carry_out
;
2043 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
2045 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
2046 || ! rtx_equal_p (target
, xtarget
))
2048 rtx temp
= emit_move_insn (target
, xtarget
);
2050 set_dst_reg_note (temp
, REG_EQUAL
,
2051 gen_rtx_fmt_ee (optab_to_code (binoptab
),
2052 mode
, copy_rtx (xop0
),
2063 delete_insns_since (last
);
2066 /* Attempt to synthesize double word multiplies using a sequence of word
2067 mode multiplications. We first attempt to generate a sequence using a
2068 more efficient unsigned widening multiply, and if that fails we then
2069 try using a signed widening multiply. */
2071 if (binoptab
== smul_optab
2072 && mclass
== MODE_INT
2073 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
2074 && optab_handler (smul_optab
, word_mode
) != CODE_FOR_nothing
2075 && optab_handler (add_optab
, word_mode
) != CODE_FOR_nothing
)
2077 rtx product
= NULL_RTX
;
2078 if (widening_optab_handler (umul_widen_optab
, mode
, word_mode
)
2079 != CODE_FOR_nothing
)
2081 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2084 delete_insns_since (last
);
2087 if (product
== NULL_RTX
2088 && widening_optab_handler (smul_widen_optab
, mode
, word_mode
)
2089 != CODE_FOR_nothing
)
2091 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2094 delete_insns_since (last
);
2097 if (product
!= NULL_RTX
)
2099 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
)
2101 temp
= emit_move_insn (target
? target
: product
, product
);
2102 set_dst_reg_note (temp
,
2104 gen_rtx_fmt_ee (MULT
, mode
,
2107 target
? target
: product
);
2113 /* It can't be open-coded in this mode.
2114 Use a library call if one is available and caller says that's ok. */
2116 libfunc
= optab_libfunc (binoptab
, mode
);
2118 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
2122 enum machine_mode op1_mode
= mode
;
2127 if (shift_optab_p (binoptab
))
2129 op1_mode
= targetm
.libgcc_shift_count_mode ();
2130 /* Specify unsigned here,
2131 since negative shift counts are meaningless. */
2132 op1x
= convert_to_mode (op1_mode
, op1
, 1);
2135 if (GET_MODE (op0
) != VOIDmode
2136 && GET_MODE (op0
) != mode
)
2137 op0
= convert_to_mode (mode
, op0
, unsignedp
);
2139 /* Pass 1 for NO_QUEUE so we don't lose any increments
2140 if the libcall is cse'd or moved. */
2141 value
= emit_library_call_value (libfunc
,
2142 NULL_RTX
, LCT_CONST
, mode
, 2,
2143 op0
, mode
, op1x
, op1_mode
);
2145 insns
= get_insns ();
2148 target
= gen_reg_rtx (mode
);
2149 emit_libcall_block_1 (insns
, target
, value
,
2150 gen_rtx_fmt_ee (optab_to_code (binoptab
),
2152 trapv_binoptab_p (binoptab
));
2157 delete_insns_since (last
);
2159 /* It can't be done in this mode. Can we do it in a wider mode? */
2161 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
2162 || methods
== OPTAB_MUST_WIDEN
))
2164 /* Caller says, don't even try. */
2165 delete_insns_since (entry_last
);
2169 /* Compute the value of METHODS to pass to recursive calls.
2170 Don't allow widening to be tried recursively. */
2172 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
2174 /* Look for a wider mode of the same class for which it appears we can do
2177 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2179 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2180 wider_mode
!= VOIDmode
;
2181 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2183 if (find_widening_optab_handler (binoptab
, wider_mode
, mode
, 1)
2185 || (methods
== OPTAB_LIB
2186 && optab_libfunc (binoptab
, wider_mode
)))
2188 rtx xop0
= op0
, xop1
= op1
;
2191 /* For certain integer operations, we need not actually extend
2192 the narrow operands, as long as we will truncate
2193 the results to the same narrowness. */
2195 if ((binoptab
== ior_optab
|| binoptab
== and_optab
2196 || binoptab
== xor_optab
2197 || binoptab
== add_optab
|| binoptab
== sub_optab
2198 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
2199 && mclass
== MODE_INT
)
2202 xop0
= widen_operand (xop0
, wider_mode
, mode
,
2203 unsignedp
, no_extend
);
2205 /* The second operand of a shift must always be extended. */
2206 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
2207 no_extend
&& binoptab
!= ashl_optab
);
2209 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
2210 unsignedp
, methods
);
2213 if (mclass
!= MODE_INT
2214 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
2217 target
= gen_reg_rtx (mode
);
2218 convert_move (target
, temp
, 0);
2222 return gen_lowpart (mode
, temp
);
2225 delete_insns_since (last
);
2230 delete_insns_since (entry_last
);
2234 /* Expand a binary operator which has both signed and unsigned forms.
2235 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2238 If we widen unsigned operands, we may use a signed wider operation instead
2239 of an unsigned wider operation, since the result would be the same. */
2242 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2243 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2244 enum optab_methods methods
)
2247 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2250 /* Do it without widening, if possible. */
2251 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2252 unsignedp
, OPTAB_DIRECT
);
2253 if (temp
|| methods
== OPTAB_DIRECT
)
2256 /* Try widening to a signed int. Disable any direct use of any
2257 signed insn in the current mode. */
2258 save_enable
= swap_optab_enable (soptab
, mode
, false);
2260 temp
= expand_binop (mode
, soptab
, op0
, op1
, target
,
2261 unsignedp
, OPTAB_WIDEN
);
2263 /* For unsigned operands, try widening to an unsigned int. */
2264 if (!temp
&& unsignedp
)
2265 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2266 unsignedp
, OPTAB_WIDEN
);
2267 if (temp
|| methods
== OPTAB_WIDEN
)
2270 /* Use the right width libcall if that exists. */
2271 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2272 unsignedp
, OPTAB_LIB
);
2273 if (temp
|| methods
== OPTAB_LIB
)
2276 /* Must widen and use a libcall, use either signed or unsigned. */
2277 temp
= expand_binop (mode
, soptab
, op0
, op1
, target
,
2278 unsignedp
, methods
);
2279 if (!temp
&& unsignedp
)
2280 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2281 unsignedp
, methods
);
2284 /* Undo the fiddling above. */
2286 swap_optab_enable (soptab
, mode
, true);
2290 /* Generate code to perform an operation specified by UNOPPTAB
2291 on operand OP0, with two results to TARG0 and TARG1.
2292 We assume that the order of the operands for the instruction
2293 is TARG0, TARG1, OP0.
2295 Either TARG0 or TARG1 may be zero, but what that means is that
2296 the result is not actually wanted. We will generate it into
2297 a dummy pseudo-reg and discard it. They may not both be zero.
2299 Returns 1 if this operation can be performed; 0 if not. */
2302 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2305 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2306 enum mode_class mclass
;
2307 enum machine_mode wider_mode
;
2308 rtx entry_last
= get_last_insn ();
2311 mclass
= GET_MODE_CLASS (mode
);
2314 targ0
= gen_reg_rtx (mode
);
2316 targ1
= gen_reg_rtx (mode
);
2318 /* Record where to go back to if we fail. */
2319 last
= get_last_insn ();
2321 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2323 struct expand_operand ops
[3];
2324 enum insn_code icode
= optab_handler (unoptab
, mode
);
2326 create_fixed_operand (&ops
[0], targ0
);
2327 create_fixed_operand (&ops
[1], targ1
);
2328 create_convert_operand_from (&ops
[2], op0
, mode
, unsignedp
);
2329 if (maybe_expand_insn (icode
, 3, ops
))
2333 /* It can't be done in this mode. Can we do it in a wider mode? */
2335 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2337 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2338 wider_mode
!= VOIDmode
;
2339 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2341 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2343 rtx t0
= gen_reg_rtx (wider_mode
);
2344 rtx t1
= gen_reg_rtx (wider_mode
);
2345 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2347 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2349 convert_move (targ0
, t0
, unsignedp
);
2350 convert_move (targ1
, t1
, unsignedp
);
2354 delete_insns_since (last
);
2359 delete_insns_since (entry_last
);
2363 /* Generate code to perform an operation specified by BINOPTAB
2364 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2365 We assume that the order of the operands for the instruction
2366 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2367 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2369 Either TARG0 or TARG1 may be zero, but what that means is that
2370 the result is not actually wanted. We will generate it into
2371 a dummy pseudo-reg and discard it. They may not both be zero.
2373 Returns 1 if this operation can be performed; 0 if not. */
2376 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2379 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2380 enum mode_class mclass
;
2381 enum machine_mode wider_mode
;
2382 rtx entry_last
= get_last_insn ();
2385 mclass
= GET_MODE_CLASS (mode
);
2388 targ0
= gen_reg_rtx (mode
);
2390 targ1
= gen_reg_rtx (mode
);
2392 /* Record where to go back to if we fail. */
2393 last
= get_last_insn ();
2395 if (optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
2397 struct expand_operand ops
[4];
2398 enum insn_code icode
= optab_handler (binoptab
, mode
);
2399 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2400 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2401 rtx xop0
= op0
, xop1
= op1
;
2403 /* If we are optimizing, force expensive constants into a register. */
2404 xop0
= avoid_expensive_constant (mode0
, binoptab
, 0, xop0
, unsignedp
);
2405 xop1
= avoid_expensive_constant (mode1
, binoptab
, 1, xop1
, unsignedp
);
2407 create_fixed_operand (&ops
[0], targ0
);
2408 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2409 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
2410 create_fixed_operand (&ops
[3], targ1
);
2411 if (maybe_expand_insn (icode
, 4, ops
))
2413 delete_insns_since (last
);
2416 /* It can't be done in this mode. Can we do it in a wider mode? */
2418 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2420 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2421 wider_mode
!= VOIDmode
;
2422 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2424 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
)
2426 rtx t0
= gen_reg_rtx (wider_mode
);
2427 rtx t1
= gen_reg_rtx (wider_mode
);
2428 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2429 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2431 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2434 convert_move (targ0
, t0
, unsignedp
);
2435 convert_move (targ1
, t1
, unsignedp
);
2439 delete_insns_since (last
);
2444 delete_insns_since (entry_last
);
2448 /* Expand the two-valued library call indicated by BINOPTAB, but
2449 preserve only one of the values. If TARG0 is non-NULL, the first
2450 value is placed into TARG0; otherwise the second value is placed
2451 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2452 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2453 This routine assumes that the value returned by the library call is
2454 as if the return value was of an integral mode twice as wide as the
2455 mode of OP0. Returns 1 if the call was successful. */
2458 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
2459 rtx targ0
, rtx targ1
, enum rtx_code code
)
2461 enum machine_mode mode
;
2462 enum machine_mode libval_mode
;
2467 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2468 gcc_assert (!targ0
!= !targ1
);
2470 mode
= GET_MODE (op0
);
2471 libfunc
= optab_libfunc (binoptab
, mode
);
2475 /* The value returned by the library function will have twice as
2476 many bits as the nominal MODE. */
2477 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
2480 libval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
2484 /* Get the part of VAL containing the value that we want. */
2485 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
2486 targ0
? 0 : GET_MODE_SIZE (mode
));
2487 insns
= get_insns ();
2489 /* Move the into the desired location. */
2490 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
2491 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
2497 /* Wrapper around expand_unop which takes an rtx code to specify
2498 the operation to perform, not an optab pointer. All other
2499 arguments are the same. */
2501 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2502 rtx target
, int unsignedp
)
2504 optab unop
= code_to_optab (code
);
2507 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2513 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)).
2515 A similar operation can be used for clrsb. UNOPTAB says which operation
2516 we are trying to expand. */
2518 widen_leading (enum machine_mode mode
, rtx op0
, rtx target
, optab unoptab
)
2520 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2521 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2523 enum machine_mode wider_mode
;
2524 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2525 wider_mode
!= VOIDmode
;
2526 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2528 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2530 rtx xop0
, temp
, last
;
2532 last
= get_last_insn ();
2535 target
= gen_reg_rtx (mode
);
2536 xop0
= widen_operand (op0
, wider_mode
, mode
,
2537 unoptab
!= clrsb_optab
, false);
2538 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2539 unoptab
!= clrsb_optab
);
2541 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2542 GEN_INT (GET_MODE_PRECISION (wider_mode
)
2543 - GET_MODE_PRECISION (mode
)),
2544 target
, true, OPTAB_DIRECT
);
2546 delete_insns_since (last
);
2555 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2556 quantities, choosing which based on whether the high word is nonzero. */
2558 expand_doubleword_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2560 rtx xop0
= force_reg (mode
, op0
);
2561 rtx subhi
= gen_highpart (word_mode
, xop0
);
2562 rtx sublo
= gen_lowpart (word_mode
, xop0
);
2563 rtx hi0_label
= gen_label_rtx ();
2564 rtx after_label
= gen_label_rtx ();
2565 rtx seq
, temp
, result
;
2567 /* If we were not given a target, use a word_mode register, not a
2568 'mode' register. The result will fit, and nobody is expecting
2569 anything bigger (the return type of __builtin_clz* is int). */
2571 target
= gen_reg_rtx (word_mode
);
2573 /* In any case, write to a word_mode scratch in both branches of the
2574 conditional, so we can ensure there is a single move insn setting
2575 'target' to tag a REG_EQUAL note on. */
2576 result
= gen_reg_rtx (word_mode
);
2580 /* If the high word is not equal to zero,
2581 then clz of the full value is clz of the high word. */
2582 emit_cmp_and_jump_insns (subhi
, CONST0_RTX (word_mode
), EQ
, 0,
2583 word_mode
, true, hi0_label
);
2585 temp
= expand_unop_direct (word_mode
, clz_optab
, subhi
, result
, true);
2590 convert_move (result
, temp
, true);
2592 emit_jump_insn (gen_jump (after_label
));
2595 /* Else clz of the full value is clz of the low word plus the number
2596 of bits in the high word. */
2597 emit_label (hi0_label
);
2599 temp
= expand_unop_direct (word_mode
, clz_optab
, sublo
, 0, true);
2602 temp
= expand_binop (word_mode
, add_optab
, temp
,
2603 GEN_INT (GET_MODE_BITSIZE (word_mode
)),
2604 result
, true, OPTAB_DIRECT
);
2608 convert_move (result
, temp
, true);
2610 emit_label (after_label
);
2611 convert_move (target
, result
, true);
2616 add_equal_note (seq
, target
, CLZ
, xop0
, 0);
2628 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2630 widen_bswap (enum machine_mode mode
, rtx op0
, rtx target
)
2632 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2633 enum machine_mode wider_mode
;
2636 if (!CLASS_HAS_WIDER_MODES_P (mclass
))
2639 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2640 wider_mode
!= VOIDmode
;
2641 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2642 if (optab_handler (bswap_optab
, wider_mode
) != CODE_FOR_nothing
)
2647 last
= get_last_insn ();
2649 x
= widen_operand (op0
, wider_mode
, mode
, true, true);
2650 x
= expand_unop (wider_mode
, bswap_optab
, x
, NULL_RTX
, true);
2652 gcc_assert (GET_MODE_PRECISION (wider_mode
) == GET_MODE_BITSIZE (wider_mode
)
2653 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
));
2655 x
= expand_shift (RSHIFT_EXPR
, wider_mode
, x
,
2656 GET_MODE_BITSIZE (wider_mode
)
2657 - GET_MODE_BITSIZE (mode
),
2663 target
= gen_reg_rtx (mode
);
2664 emit_move_insn (target
, gen_lowpart (mode
, x
));
2667 delete_insns_since (last
);
2672 /* Try calculating bswap as two bswaps of two word-sized operands. */
2675 expand_doubleword_bswap (enum machine_mode mode
, rtx op
, rtx target
)
2679 t1
= expand_unop (word_mode
, bswap_optab
,
2680 operand_subword_force (op
, 0, mode
), NULL_RTX
, true);
2681 t0
= expand_unop (word_mode
, bswap_optab
,
2682 operand_subword_force (op
, 1, mode
), NULL_RTX
, true);
2684 if (target
== 0 || !valid_multiword_target_p (target
))
2685 target
= gen_reg_rtx (mode
);
2687 emit_clobber (target
);
2688 emit_move_insn (operand_subword (target
, 0, 1, mode
), t0
);
2689 emit_move_insn (operand_subword (target
, 1, 1, mode
), t1
);
2694 /* Try calculating (parity x) as (and (popcount x) 1), where
2695 popcount can also be done in a wider mode. */
2697 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2699 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2700 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2702 enum machine_mode wider_mode
;
2703 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2704 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2706 if (optab_handler (popcount_optab
, wider_mode
) != CODE_FOR_nothing
)
2708 rtx xop0
, temp
, last
;
2710 last
= get_last_insn ();
2713 target
= gen_reg_rtx (mode
);
2714 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2715 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2718 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2719 target
, true, OPTAB_DIRECT
);
2721 delete_insns_since (last
);
2730 /* Try calculating ctz(x) as K - clz(x & -x) ,
2731 where K is GET_MODE_PRECISION(mode) - 1.
2733 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2734 don't have to worry about what the hardware does in that case. (If
2735 the clz instruction produces the usual value at 0, which is K, the
2736 result of this code sequence will be -1; expand_ffs, below, relies
2737 on this. It might be nice to have it be K instead, for consistency
2738 with the (very few) processors that provide a ctz with a defined
2739 value, but that would take one more instruction, and it would be
2740 less convenient for expand_ffs anyway. */
2743 expand_ctz (enum machine_mode mode
, rtx op0
, rtx target
)
2747 if (optab_handler (clz_optab
, mode
) == CODE_FOR_nothing
)
2752 temp
= expand_unop_direct (mode
, neg_optab
, op0
, NULL_RTX
, true);
2754 temp
= expand_binop (mode
, and_optab
, op0
, temp
, NULL_RTX
,
2755 true, OPTAB_DIRECT
);
2757 temp
= expand_unop_direct (mode
, clz_optab
, temp
, NULL_RTX
, true);
2759 temp
= expand_binop (mode
, sub_optab
, GEN_INT (GET_MODE_PRECISION (mode
) - 1),
2761 true, OPTAB_DIRECT
);
2771 add_equal_note (seq
, temp
, CTZ
, op0
, 0);
2777 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2778 else with the sequence used by expand_clz.
2780 The ffs builtin promises to return zero for a zero value and ctz/clz
2781 may have an undefined value in that case. If they do not give us a
2782 convenient value, we have to generate a test and branch. */
2784 expand_ffs (enum machine_mode mode
, rtx op0
, rtx target
)
2786 HOST_WIDE_INT val
= 0;
2787 bool defined_at_zero
= false;
2790 if (optab_handler (ctz_optab
, mode
) != CODE_FOR_nothing
)
2794 temp
= expand_unop_direct (mode
, ctz_optab
, op0
, 0, true);
2798 defined_at_zero
= (CTZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2);
2800 else if (optab_handler (clz_optab
, mode
) != CODE_FOR_nothing
)
2803 temp
= expand_ctz (mode
, op0
, 0);
2807 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2)
2809 defined_at_zero
= true;
2810 val
= (GET_MODE_PRECISION (mode
) - 1) - val
;
2816 if (defined_at_zero
&& val
== -1)
2817 /* No correction needed at zero. */;
2820 /* We don't try to do anything clever with the situation found
2821 on some processors (eg Alpha) where ctz(0:mode) ==
2822 bitsize(mode). If someone can think of a way to send N to -1
2823 and leave alone all values in the range 0..N-1 (where N is a
2824 power of two), cheaper than this test-and-branch, please add it.
2826 The test-and-branch is done after the operation itself, in case
2827 the operation sets condition codes that can be recycled for this.
2828 (This is true on i386, for instance.) */
2830 rtx nonzero_label
= gen_label_rtx ();
2831 emit_cmp_and_jump_insns (op0
, CONST0_RTX (mode
), NE
, 0,
2832 mode
, true, nonzero_label
);
2834 convert_move (temp
, GEN_INT (-1), false);
2835 emit_label (nonzero_label
);
2838 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2839 to produce a value in the range 0..bitsize. */
2840 temp
= expand_binop (mode
, add_optab
, temp
, GEN_INT (1),
2841 target
, false, OPTAB_DIRECT
);
2848 add_equal_note (seq
, temp
, FFS
, op0
, 0);
2857 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2858 conditions, VAL may already be a SUBREG against which we cannot generate
2859 a further SUBREG. In this case, we expect forcing the value into a
2860 register will work around the situation. */
2863 lowpart_subreg_maybe_copy (enum machine_mode omode
, rtx val
,
2864 enum machine_mode imode
)
2867 ret
= lowpart_subreg (omode
, val
, imode
);
2870 val
= force_reg (imode
, val
);
2871 ret
= lowpart_subreg (omode
, val
, imode
);
2872 gcc_assert (ret
!= NULL
);
2877 /* Expand a floating point absolute value or negation operation via a
2878 logical operation on the sign bit. */
2881 expand_absneg_bit (enum rtx_code code
, enum machine_mode mode
,
2882 rtx op0
, rtx target
)
2884 const struct real_format
*fmt
;
2885 int bitpos
, word
, nwords
, i
;
2886 enum machine_mode imode
;
2890 /* The format has to have a simple sign bit. */
2891 fmt
= REAL_MODE_FORMAT (mode
);
2895 bitpos
= fmt
->signbit_rw
;
2899 /* Don't create negative zeros if the format doesn't support them. */
2900 if (code
== NEG
&& !fmt
->has_signed_zero
)
2903 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
2905 imode
= int_mode_for_mode (mode
);
2906 if (imode
== BLKmode
)
2915 if (FLOAT_WORDS_BIG_ENDIAN
)
2916 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
2918 word
= bitpos
/ BITS_PER_WORD
;
2919 bitpos
= bitpos
% BITS_PER_WORD
;
2920 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
2923 mask
= double_int_zero
.set_bit (bitpos
);
2929 || (nwords
> 1 && !valid_multiword_target_p (target
)))
2930 target
= gen_reg_rtx (mode
);
2936 for (i
= 0; i
< nwords
; ++i
)
2938 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
2939 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
2943 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2945 immed_double_int_const (mask
, imode
),
2946 targ_piece
, 1, OPTAB_LIB_WIDEN
);
2947 if (temp
!= targ_piece
)
2948 emit_move_insn (targ_piece
, temp
);
2951 emit_move_insn (targ_piece
, op0_piece
);
2954 insns
= get_insns ();
2961 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2962 gen_lowpart (imode
, op0
),
2963 immed_double_int_const (mask
, imode
),
2964 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
2965 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
2967 set_dst_reg_note (get_last_insn (), REG_EQUAL
,
2968 gen_rtx_fmt_e (code
, mode
, copy_rtx (op0
)),
2975 /* As expand_unop, but will fail rather than attempt the operation in a
2976 different mode or with a libcall. */
2978 expand_unop_direct (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2981 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2983 struct expand_operand ops
[2];
2984 enum insn_code icode
= optab_handler (unoptab
, mode
);
2985 rtx last
= get_last_insn ();
2988 create_output_operand (&ops
[0], target
, mode
);
2989 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2990 pat
= maybe_gen_insn (icode
, 2, ops
);
2993 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2994 && ! add_equal_note (pat
, ops
[0].value
, optab_to_code (unoptab
),
2995 ops
[1].value
, NULL_RTX
))
2997 delete_insns_since (last
);
2998 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
3003 return ops
[0].value
;
3009 /* Generate code to perform an operation specified by UNOPTAB
3010 on operand OP0, with result having machine-mode MODE.
3012 UNSIGNEDP is for the case where we have to widen the operands
3013 to perform the operation. It says to use zero-extension.
3015 If TARGET is nonzero, the value
3016 is generated there, if it is convenient to do so.
3017 In all cases an rtx is returned for the locus of the value;
3018 this may or may not be TARGET. */
3021 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3024 enum mode_class mclass
= GET_MODE_CLASS (mode
);
3025 enum machine_mode wider_mode
;
3029 temp
= expand_unop_direct (mode
, unoptab
, op0
, target
, unsignedp
);
3033 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3035 /* Widening (or narrowing) clz needs special treatment. */
3036 if (unoptab
== clz_optab
)
3038 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3042 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3043 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3045 temp
= expand_doubleword_clz (mode
, op0
, target
);
3053 if (unoptab
== clrsb_optab
)
3055 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3061 /* Widening (or narrowing) bswap needs special treatment. */
3062 if (unoptab
== bswap_optab
)
3064 /* HImode is special because in this mode BSWAP is equivalent to ROTATE
3065 or ROTATERT. First try these directly; if this fails, then try the
3066 obvious pair of shifts with allowed widening, as this will probably
3067 be always more efficient than the other fallback methods. */
3070 rtx last
, temp1
, temp2
;
3072 if (optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
)
3074 temp
= expand_binop (mode
, rotl_optab
, op0
, GEN_INT (8), target
,
3075 unsignedp
, OPTAB_DIRECT
);
3080 if (optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
3082 temp
= expand_binop (mode
, rotr_optab
, op0
, GEN_INT (8), target
,
3083 unsignedp
, OPTAB_DIRECT
);
3088 last
= get_last_insn ();
3090 temp1
= expand_binop (mode
, ashl_optab
, op0
, GEN_INT (8), NULL_RTX
,
3091 unsignedp
, OPTAB_WIDEN
);
3092 temp2
= expand_binop (mode
, lshr_optab
, op0
, GEN_INT (8), NULL_RTX
,
3093 unsignedp
, OPTAB_WIDEN
);
3096 temp
= expand_binop (mode
, ior_optab
, temp1
, temp2
, target
,
3097 unsignedp
, OPTAB_WIDEN
);
3102 delete_insns_since (last
);
3105 temp
= widen_bswap (mode
, op0
, target
);
3109 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3110 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3112 temp
= expand_doubleword_bswap (mode
, op0
, target
);
3120 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3121 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3122 wider_mode
!= VOIDmode
;
3123 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3125 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
3128 rtx last
= get_last_insn ();
3130 /* For certain operations, we need not actually extend
3131 the narrow operand, as long as we will truncate the
3132 results to the same narrowness. */
3134 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3135 (unoptab
== neg_optab
3136 || unoptab
== one_cmpl_optab
)
3137 && mclass
== MODE_INT
);
3139 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3144 if (mclass
!= MODE_INT
3145 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
3148 target
= gen_reg_rtx (mode
);
3149 convert_move (target
, temp
, 0);
3153 return gen_lowpart (mode
, temp
);
3156 delete_insns_since (last
);
3160 /* These can be done a word at a time. */
3161 if (unoptab
== one_cmpl_optab
3162 && mclass
== MODE_INT
3163 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
3164 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3169 if (target
== 0 || target
== op0
|| !valid_multiword_target_p (target
))
3170 target
= gen_reg_rtx (mode
);
3174 /* Do the actual arithmetic. */
3175 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
3177 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
3178 rtx x
= expand_unop (word_mode
, unoptab
,
3179 operand_subword_force (op0
, i
, mode
),
3180 target_piece
, unsignedp
);
3182 if (target_piece
!= x
)
3183 emit_move_insn (target_piece
, x
);
3186 insns
= get_insns ();
3193 if (optab_to_code (unoptab
) == NEG
)
3195 /* Try negating floating point values by flipping the sign bit. */
3196 if (SCALAR_FLOAT_MODE_P (mode
))
3198 temp
= expand_absneg_bit (NEG
, mode
, op0
, target
);
3203 /* If there is no negation pattern, and we have no negative zero,
3204 try subtracting from zero. */
3205 if (!HONOR_SIGNED_ZEROS (mode
))
3207 temp
= expand_binop (mode
, (unoptab
== negv_optab
3208 ? subv_optab
: sub_optab
),
3209 CONST0_RTX (mode
), op0
, target
,
3210 unsignedp
, OPTAB_DIRECT
);
3216 /* Try calculating parity (x) as popcount (x) % 2. */
3217 if (unoptab
== parity_optab
)
3219 temp
= expand_parity (mode
, op0
, target
);
3224 /* Try implementing ffs (x) in terms of clz (x). */
3225 if (unoptab
== ffs_optab
)
3227 temp
= expand_ffs (mode
, op0
, target
);
3232 /* Try implementing ctz (x) in terms of clz (x). */
3233 if (unoptab
== ctz_optab
)
3235 temp
= expand_ctz (mode
, op0
, target
);
3241 /* Now try a library call in this mode. */
3242 libfunc
= optab_libfunc (unoptab
, mode
);
3248 enum machine_mode outmode
= mode
;
3250 /* All of these functions return small values. Thus we choose to
3251 have them return something that isn't a double-word. */
3252 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
3253 || unoptab
== clrsb_optab
|| unoptab
== popcount_optab
3254 || unoptab
== parity_optab
)
3256 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
),
3257 optab_libfunc (unoptab
, mode
)));
3261 /* Pass 1 for NO_QUEUE so we don't lose any increments
3262 if the libcall is cse'd or moved. */
3263 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, outmode
,
3265 insns
= get_insns ();
3268 target
= gen_reg_rtx (outmode
);
3269 eq_value
= gen_rtx_fmt_e (optab_to_code (unoptab
), mode
, op0
);
3270 if (GET_MODE_SIZE (outmode
) < GET_MODE_SIZE (mode
))
3271 eq_value
= simplify_gen_unary (TRUNCATE
, outmode
, eq_value
, mode
);
3272 else if (GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (mode
))
3273 eq_value
= simplify_gen_unary (ZERO_EXTEND
, outmode
, eq_value
, mode
);
3274 emit_libcall_block_1 (insns
, target
, value
, eq_value
,
3275 trapv_unoptab_p (unoptab
));
3280 /* It can't be done in this mode. Can we do it in a wider mode? */
3282 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3284 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3285 wider_mode
!= VOIDmode
;
3286 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3288 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
3289 || optab_libfunc (unoptab
, wider_mode
))
3292 rtx last
= get_last_insn ();
3294 /* For certain operations, we need not actually extend
3295 the narrow operand, as long as we will truncate the
3296 results to the same narrowness. */
3297 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3298 (unoptab
== neg_optab
3299 || unoptab
== one_cmpl_optab
3300 || unoptab
== bswap_optab
)
3301 && mclass
== MODE_INT
);
3303 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3306 /* If we are generating clz using wider mode, adjust the
3307 result. Similarly for clrsb. */
3308 if ((unoptab
== clz_optab
|| unoptab
== clrsb_optab
)
3310 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
3311 GEN_INT (GET_MODE_PRECISION (wider_mode
)
3312 - GET_MODE_PRECISION (mode
)),
3313 target
, true, OPTAB_DIRECT
);
3315 /* Likewise for bswap. */
3316 if (unoptab
== bswap_optab
&& temp
!= 0)
3318 gcc_assert (GET_MODE_PRECISION (wider_mode
)
3319 == GET_MODE_BITSIZE (wider_mode
)
3320 && GET_MODE_PRECISION (mode
)
3321 == GET_MODE_BITSIZE (mode
));
3323 temp
= expand_shift (RSHIFT_EXPR
, wider_mode
, temp
,
3324 GET_MODE_BITSIZE (wider_mode
)
3325 - GET_MODE_BITSIZE (mode
),
3331 if (mclass
!= MODE_INT
)
3334 target
= gen_reg_rtx (mode
);
3335 convert_move (target
, temp
, 0);
3339 return gen_lowpart (mode
, temp
);
3342 delete_insns_since (last
);
3347 /* One final attempt at implementing negation via subtraction,
3348 this time allowing widening of the operand. */
3349 if (optab_to_code (unoptab
) == NEG
&& !HONOR_SIGNED_ZEROS (mode
))
3352 temp
= expand_binop (mode
,
3353 unoptab
== negv_optab
? subv_optab
: sub_optab
,
3354 CONST0_RTX (mode
), op0
,
3355 target
, unsignedp
, OPTAB_LIB_WIDEN
);
3363 /* Emit code to compute the absolute value of OP0, with result to
3364 TARGET if convenient. (TARGET may be 0.) The return value says
3365 where the result actually is to be found.
3367 MODE is the mode of the operand; the mode of the result is
3368 different but can be deduced from MODE.
3373 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
3374 int result_unsignedp
)
3379 result_unsignedp
= 1;
3381 /* First try to do it with a special abs instruction. */
3382 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
3387 /* For floating point modes, try clearing the sign bit. */
3388 if (SCALAR_FLOAT_MODE_P (mode
))
3390 temp
= expand_absneg_bit (ABS
, mode
, op0
, target
);
3395 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3396 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
3397 && !HONOR_SIGNED_ZEROS (mode
))
3399 rtx last
= get_last_insn ();
3401 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
3403 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3409 delete_insns_since (last
);
3412 /* If this machine has expensive jumps, we can do integer absolute
3413 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3414 where W is the width of MODE. */
3416 if (GET_MODE_CLASS (mode
) == MODE_INT
3417 && BRANCH_COST (optimize_insn_for_speed_p (),
3420 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3421 GET_MODE_PRECISION (mode
) - 1,
3424 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3427 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
3428 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
3438 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3439 int result_unsignedp
, int safe
)
3444 result_unsignedp
= 1;
3446 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
3450 /* If that does not win, use conditional jump and negate. */
3452 /* It is safe to use the target if it is the same
3453 as the source if this is also a pseudo register */
3454 if (op0
== target
&& REG_P (op0
)
3455 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3458 op1
= gen_label_rtx ();
3459 if (target
== 0 || ! safe
3460 || GET_MODE (target
) != mode
3461 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
3463 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
3464 target
= gen_reg_rtx (mode
);
3466 emit_move_insn (target
, op0
);
3469 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3470 NULL_RTX
, NULL_RTX
, op1
, -1);
3472 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3475 emit_move_insn (target
, op0
);
3481 /* Emit code to compute the one's complement absolute value of OP0
3482 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3483 (TARGET may be NULL_RTX.) The return value says where the result
3484 actually is to be found.
3486 MODE is the mode of the operand; the mode of the result is
3487 different but can be deduced from MODE. */
3490 expand_one_cmpl_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
)
3494 /* Not applicable for floating point modes. */
3495 if (FLOAT_MODE_P (mode
))
3498 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3499 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
)
3501 rtx last
= get_last_insn ();
3503 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, NULL_RTX
, 0);
3505 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3511 delete_insns_since (last
);
3514 /* If this machine has expensive jumps, we can do one's complement
3515 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3517 if (GET_MODE_CLASS (mode
) == MODE_INT
3518 && BRANCH_COST (optimize_insn_for_speed_p (),
3521 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3522 GET_MODE_PRECISION (mode
) - 1,
3525 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3535 /* A subroutine of expand_copysign, perform the copysign operation using the
3536 abs and neg primitives advertised to exist on the target. The assumption
3537 is that we have a split register file, and leaving op0 in fp registers,
3538 and not playing with subregs so much, will help the register allocator. */
3541 expand_copysign_absneg (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3542 int bitpos
, bool op0_is_abs
)
3544 enum machine_mode imode
;
3545 enum insn_code icode
;
3551 /* Check if the back end provides an insn that handles signbit for the
3553 icode
= optab_handler (signbit_optab
, mode
);
3554 if (icode
!= CODE_FOR_nothing
)
3556 imode
= insn_data
[(int) icode
].operand
[0].mode
;
3557 sign
= gen_reg_rtx (imode
);
3558 emit_unop_insn (icode
, sign
, op1
, UNKNOWN
);
3564 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3566 imode
= int_mode_for_mode (mode
);
3567 if (imode
== BLKmode
)
3569 op1
= gen_lowpart (imode
, op1
);
3576 if (FLOAT_WORDS_BIG_ENDIAN
)
3577 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3579 word
= bitpos
/ BITS_PER_WORD
;
3580 bitpos
= bitpos
% BITS_PER_WORD
;
3581 op1
= operand_subword_force (op1
, word
, mode
);
3584 mask
= double_int_zero
.set_bit (bitpos
);
3586 sign
= expand_binop (imode
, and_optab
, op1
,
3587 immed_double_int_const (mask
, imode
),
3588 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3593 op0
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
3600 if (target
== NULL_RTX
)
3601 target
= copy_to_reg (op0
);
3603 emit_move_insn (target
, op0
);
3606 label
= gen_label_rtx ();
3607 emit_cmp_and_jump_insns (sign
, const0_rtx
, EQ
, NULL_RTX
, imode
, 1, label
);
3609 if (CONST_DOUBLE_AS_FLOAT_P (op0
))
3610 op0
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3612 op0
= expand_unop (mode
, neg_optab
, op0
, target
, 0);
3614 emit_move_insn (target
, op0
);
3622 /* A subroutine of expand_copysign, perform the entire copysign operation
3623 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3624 is true if op0 is known to have its sign bit clear. */
3627 expand_copysign_bit (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3628 int bitpos
, bool op0_is_abs
)
3630 enum machine_mode imode
;
3632 int word
, nwords
, i
;
3635 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3637 imode
= int_mode_for_mode (mode
);
3638 if (imode
== BLKmode
)
3647 if (FLOAT_WORDS_BIG_ENDIAN
)
3648 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3650 word
= bitpos
/ BITS_PER_WORD
;
3651 bitpos
= bitpos
% BITS_PER_WORD
;
3652 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
3655 mask
= double_int_zero
.set_bit (bitpos
);
3660 || (nwords
> 1 && !valid_multiword_target_p (target
)))
3661 target
= gen_reg_rtx (mode
);
3667 for (i
= 0; i
< nwords
; ++i
)
3669 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
3670 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3676 = expand_binop (imode
, and_optab
, op0_piece
,
3677 immed_double_int_const (~mask
, imode
),
3678 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3680 op1
= expand_binop (imode
, and_optab
,
3681 operand_subword_force (op1
, i
, mode
),
3682 immed_double_int_const (mask
, imode
),
3683 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3685 temp
= expand_binop (imode
, ior_optab
, op0_piece
, op1
,
3686 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3687 if (temp
!= targ_piece
)
3688 emit_move_insn (targ_piece
, temp
);
3691 emit_move_insn (targ_piece
, op0_piece
);
3694 insns
= get_insns ();
3701 op1
= expand_binop (imode
, and_optab
, gen_lowpart (imode
, op1
),
3702 immed_double_int_const (mask
, imode
),
3703 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3705 op0
= gen_lowpart (imode
, op0
);
3707 op0
= expand_binop (imode
, and_optab
, op0
,
3708 immed_double_int_const (~mask
, imode
),
3709 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3711 temp
= expand_binop (imode
, ior_optab
, op0
, op1
,
3712 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3713 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3719 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3720 scalar floating point mode. Return NULL if we do not know how to
3721 expand the operation inline. */
3724 expand_copysign (rtx op0
, rtx op1
, rtx target
)
3726 enum machine_mode mode
= GET_MODE (op0
);
3727 const struct real_format
*fmt
;
3731 gcc_assert (SCALAR_FLOAT_MODE_P (mode
));
3732 gcc_assert (GET_MODE (op1
) == mode
);
3734 /* First try to do it with a special instruction. */
3735 temp
= expand_binop (mode
, copysign_optab
, op0
, op1
,
3736 target
, 0, OPTAB_DIRECT
);
3740 fmt
= REAL_MODE_FORMAT (mode
);
3741 if (fmt
== NULL
|| !fmt
->has_signed_zero
)
3745 if (CONST_DOUBLE_AS_FLOAT_P (op0
))
3747 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0
)))
3748 op0
= simplify_unary_operation (ABS
, mode
, op0
, mode
);
3752 if (fmt
->signbit_ro
>= 0
3753 && (CONST_DOUBLE_AS_FLOAT_P (op0
)
3754 || (optab_handler (neg_optab
, mode
) != CODE_FOR_nothing
3755 && optab_handler (abs_optab
, mode
) != CODE_FOR_nothing
)))
3757 temp
= expand_copysign_absneg (mode
, op0
, op1
, target
,
3758 fmt
->signbit_ro
, op0_is_abs
);
3763 if (fmt
->signbit_rw
< 0)
3765 return expand_copysign_bit (mode
, op0
, op1
, target
,
3766 fmt
->signbit_rw
, op0_is_abs
);
3769 /* Generate an instruction whose insn-code is INSN_CODE,
3770 with two operands: an output TARGET and an input OP0.
3771 TARGET *must* be nonzero, and the output is always stored there.
3772 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3773 the value that is stored into TARGET.
3775 Return false if expansion failed. */
3778 maybe_emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
,
3781 struct expand_operand ops
[2];
3784 create_output_operand (&ops
[0], target
, GET_MODE (target
));
3785 create_input_operand (&ops
[1], op0
, GET_MODE (op0
));
3786 pat
= maybe_gen_insn (icode
, 2, ops
);
3790 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3791 add_equal_note (pat
, ops
[0].value
, code
, ops
[1].value
, NULL_RTX
);
3795 if (ops
[0].value
!= target
)
3796 emit_move_insn (target
, ops
[0].value
);
3799 /* Generate an instruction whose insn-code is INSN_CODE,
3800 with two operands: an output TARGET and an input OP0.
3801 TARGET *must* be nonzero, and the output is always stored there.
3802 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3803 the value that is stored into TARGET. */
3806 emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
, enum rtx_code code
)
3808 bool ok
= maybe_emit_unop_insn (icode
, target
, op0
, code
);
3812 struct no_conflict_data
3814 rtx target
, first
, insn
;
3818 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3819 the currently examined clobber / store has to stay in the list of
3820 insns that constitute the actual libcall block. */
3822 no_conflict_move_test (rtx dest
, const_rtx set
, void *p0
)
3824 struct no_conflict_data
*p
= (struct no_conflict_data
*) p0
;
3826 /* If this inns directly contributes to setting the target, it must stay. */
3827 if (reg_overlap_mentioned_p (p
->target
, dest
))
3828 p
->must_stay
= true;
3829 /* If we haven't committed to keeping any other insns in the list yet,
3830 there is nothing more to check. */
3831 else if (p
->insn
== p
->first
)
3833 /* If this insn sets / clobbers a register that feeds one of the insns
3834 already in the list, this insn has to stay too. */
3835 else if (reg_overlap_mentioned_p (dest
, PATTERN (p
->first
))
3836 || (CALL_P (p
->first
) && (find_reg_fusage (p
->first
, USE
, dest
)))
3837 || reg_used_between_p (dest
, p
->first
, p
->insn
)
3838 /* Likewise if this insn depends on a register set by a previous
3839 insn in the list, or if it sets a result (presumably a hard
3840 register) that is set or clobbered by a previous insn.
3841 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3842 SET_DEST perform the former check on the address, and the latter
3843 check on the MEM. */
3844 || (GET_CODE (set
) == SET
3845 && (modified_in_p (SET_SRC (set
), p
->first
)
3846 || modified_in_p (SET_DEST (set
), p
->first
)
3847 || modified_between_p (SET_SRC (set
), p
->first
, p
->insn
)
3848 || modified_between_p (SET_DEST (set
), p
->first
, p
->insn
))))
3849 p
->must_stay
= true;
3853 /* Emit code to make a call to a constant function or a library call.
3855 INSNS is a list containing all insns emitted in the call.
3856 These insns leave the result in RESULT. Our block is to copy RESULT
3857 to TARGET, which is logically equivalent to EQUIV.
3859 We first emit any insns that set a pseudo on the assumption that these are
3860 loading constants into registers; doing so allows them to be safely cse'ed
3861 between blocks. Then we emit all the other insns in the block, followed by
3862 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3863 note with an operand of EQUIV. */
3866 emit_libcall_block_1 (rtx insns
, rtx target
, rtx result
, rtx equiv
,
3867 bool equiv_may_trap
)
3869 rtx final_dest
= target
;
3870 rtx next
, last
, insn
;
3872 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3873 into a MEM later. Protect the libcall block from this change. */
3874 if (! REG_P (target
) || REG_USERVAR_P (target
))
3875 target
= gen_reg_rtx (GET_MODE (target
));
3877 /* If we're using non-call exceptions, a libcall corresponding to an
3878 operation that may trap may also trap. */
3879 /* ??? See the comment in front of make_reg_eh_region_note. */
3880 if (cfun
->can_throw_non_call_exceptions
3881 && (equiv_may_trap
|| may_trap_p (equiv
)))
3883 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3886 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3889 int lp_nr
= INTVAL (XEXP (note
, 0));
3890 if (lp_nr
== 0 || lp_nr
== INT_MIN
)
3891 remove_note (insn
, note
);
3897 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3898 reg note to indicate that this call cannot throw or execute a nonlocal
3899 goto (unless there is already a REG_EH_REGION note, in which case
3901 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3903 make_reg_eh_region_note_nothrow_nononlocal (insn
);
3906 /* First emit all insns that set pseudos. Remove them from the list as
3907 we go. Avoid insns that set pseudos which were referenced in previous
3908 insns. These can be generated by move_by_pieces, for example,
3909 to update an address. Similarly, avoid insns that reference things
3910 set in previous insns. */
3912 for (insn
= insns
; insn
; insn
= next
)
3914 rtx set
= single_set (insn
);
3916 next
= NEXT_INSN (insn
);
3918 if (set
!= 0 && REG_P (SET_DEST (set
))
3919 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3921 struct no_conflict_data data
;
3923 data
.target
= const0_rtx
;
3927 note_stores (PATTERN (insn
), no_conflict_move_test
, &data
);
3928 if (! data
.must_stay
)
3930 if (PREV_INSN (insn
))
3931 NEXT_INSN (PREV_INSN (insn
)) = next
;
3936 PREV_INSN (next
) = PREV_INSN (insn
);
3942 /* Some ports use a loop to copy large arguments onto the stack.
3943 Don't move anything outside such a loop. */
3948 /* Write the remaining insns followed by the final copy. */
3949 for (insn
= insns
; insn
; insn
= next
)
3951 next
= NEXT_INSN (insn
);
3956 last
= emit_move_insn (target
, result
);
3957 set_dst_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
), target
);
3959 if (final_dest
!= target
)
3960 emit_move_insn (final_dest
, target
);
3964 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3966 emit_libcall_block_1 (insns
, target
, result
, equiv
, false);
3969 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3970 PURPOSE describes how this comparison will be used. CODE is the rtx
3971 comparison code we will be using.
3973 ??? Actually, CODE is slightly weaker than that. A target is still
3974 required to implement all of the normal bcc operations, but not
3975 required to implement all (or any) of the unordered bcc operations. */
3978 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3979 enum can_compare_purpose purpose
)
3982 test
= gen_rtx_fmt_ee (code
, mode
, const0_rtx
, const0_rtx
);
3985 enum insn_code icode
;
3987 if (purpose
== ccp_jump
3988 && (icode
= optab_handler (cbranch_optab
, mode
)) != CODE_FOR_nothing
3989 && insn_operand_matches (icode
, 0, test
))
3991 if (purpose
== ccp_store_flag
3992 && (icode
= optab_handler (cstore_optab
, mode
)) != CODE_FOR_nothing
3993 && insn_operand_matches (icode
, 1, test
))
3995 if (purpose
== ccp_cmov
3996 && optab_handler (cmov_optab
, mode
) != CODE_FOR_nothing
)
3999 mode
= GET_MODE_WIDER_MODE (mode
);
4000 PUT_MODE (test
, mode
);
4002 while (mode
!= VOIDmode
);
4007 /* This function is called when we are going to emit a compare instruction that
4008 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
4010 *PMODE is the mode of the inputs (in case they are const_int).
4011 *PUNSIGNEDP nonzero says that the operands are unsigned;
4012 this matters if they need to be widened (as given by METHODS).
4014 If they have mode BLKmode, then SIZE specifies the size of both operands.
4016 This function performs all the setup necessary so that the caller only has
4017 to emit a single comparison insn. This setup can involve doing a BLKmode
4018 comparison or emitting a library call to perform the comparison if no insn
4019 is available to handle it.
4020 The values which are passed in through pointers can be modified; the caller
4021 should perform the comparison on the modified values. Constant
4022 comparisons must have already been folded. */
4025 prepare_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4026 int unsignedp
, enum optab_methods methods
,
4027 rtx
*ptest
, enum machine_mode
*pmode
)
4029 enum machine_mode mode
= *pmode
;
4031 enum machine_mode cmp_mode
;
4032 enum mode_class mclass
;
4034 /* The other methods are not needed. */
4035 gcc_assert (methods
== OPTAB_DIRECT
|| methods
== OPTAB_WIDEN
4036 || methods
== OPTAB_LIB_WIDEN
);
4038 /* If we are optimizing, force expensive constants into a register. */
4039 if (CONSTANT_P (x
) && optimize
4040 && (rtx_cost (x
, COMPARE
, 0, optimize_insn_for_speed_p ())
4041 > COSTS_N_INSNS (1)))
4042 x
= force_reg (mode
, x
);
4044 if (CONSTANT_P (y
) && optimize
4045 && (rtx_cost (y
, COMPARE
, 1, optimize_insn_for_speed_p ())
4046 > COSTS_N_INSNS (1)))
4047 y
= force_reg (mode
, y
);
4050 /* Make sure if we have a canonical comparison. The RTL
4051 documentation states that canonical comparisons are required only
4052 for targets which have cc0. */
4053 gcc_assert (!CONSTANT_P (x
) || CONSTANT_P (y
));
4056 /* Don't let both operands fail to indicate the mode. */
4057 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
4058 x
= force_reg (mode
, x
);
4059 if (mode
== VOIDmode
)
4060 mode
= GET_MODE (x
) != VOIDmode
? GET_MODE (x
) : GET_MODE (y
);
4062 /* Handle all BLKmode compares. */
4064 if (mode
== BLKmode
)
4066 enum machine_mode result_mode
;
4067 enum insn_code cmp_code
;
4072 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
4076 /* Try to use a memory block compare insn - either cmpstr
4077 or cmpmem will do. */
4078 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
4079 cmp_mode
!= VOIDmode
;
4080 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
4082 cmp_code
= direct_optab_handler (cmpmem_optab
, cmp_mode
);
4083 if (cmp_code
== CODE_FOR_nothing
)
4084 cmp_code
= direct_optab_handler (cmpstr_optab
, cmp_mode
);
4085 if (cmp_code
== CODE_FOR_nothing
)
4086 cmp_code
= direct_optab_handler (cmpstrn_optab
, cmp_mode
);
4087 if (cmp_code
== CODE_FOR_nothing
)
4090 /* Must make sure the size fits the insn's mode. */
4091 if ((CONST_INT_P (size
)
4092 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
4093 || (GET_MODE_BITSIZE (GET_MODE (size
))
4094 > GET_MODE_BITSIZE (cmp_mode
)))
4097 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
4098 result
= gen_reg_rtx (result_mode
);
4099 size
= convert_to_mode (cmp_mode
, size
, 1);
4100 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
4102 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4103 *pmode
= result_mode
;
4107 if (methods
!= OPTAB_LIB
&& methods
!= OPTAB_LIB_WIDEN
)
4110 /* Otherwise call a library function, memcmp. */
4111 libfunc
= memcmp_libfunc
;
4112 length_type
= sizetype
;
4113 result_mode
= TYPE_MODE (integer_type_node
);
4114 cmp_mode
= TYPE_MODE (length_type
);
4115 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
4116 TYPE_UNSIGNED (length_type
));
4118 result
= emit_library_call_value (libfunc
, 0, LCT_PURE
,
4126 methods
= OPTAB_LIB_WIDEN
;
4130 /* Don't allow operands to the compare to trap, as that can put the
4131 compare and branch in different basic blocks. */
4132 if (cfun
->can_throw_non_call_exceptions
)
4135 x
= force_reg (mode
, x
);
4137 y
= force_reg (mode
, y
);
4140 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4142 gcc_assert (can_compare_p (comparison
, CCmode
, ccp_jump
));
4143 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4147 mclass
= GET_MODE_CLASS (mode
);
4148 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4152 enum insn_code icode
;
4153 icode
= optab_handler (cbranch_optab
, cmp_mode
);
4154 if (icode
!= CODE_FOR_nothing
4155 && insn_operand_matches (icode
, 0, test
))
4157 rtx last
= get_last_insn ();
4158 rtx op0
= prepare_operand (icode
, x
, 1, mode
, cmp_mode
, unsignedp
);
4159 rtx op1
= prepare_operand (icode
, y
, 2, mode
, cmp_mode
, unsignedp
);
4161 && insn_operand_matches (icode
, 1, op0
)
4162 && insn_operand_matches (icode
, 2, op1
))
4164 XEXP (test
, 0) = op0
;
4165 XEXP (test
, 1) = op1
;
4170 delete_insns_since (last
);
4173 if (methods
== OPTAB_DIRECT
|| !CLASS_HAS_WIDER_MODES_P (mclass
))
4175 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
);
4177 while (cmp_mode
!= VOIDmode
);
4179 if (methods
!= OPTAB_LIB_WIDEN
)
4182 if (!SCALAR_FLOAT_MODE_P (mode
))
4185 enum machine_mode ret_mode
;
4187 /* Handle a libcall just for the mode we are using. */
4188 libfunc
= optab_libfunc (cmp_optab
, mode
);
4189 gcc_assert (libfunc
);
4191 /* If we want unsigned, and this mode has a distinct unsigned
4192 comparison routine, use that. */
4195 rtx ulibfunc
= optab_libfunc (ucmp_optab
, mode
);
4200 ret_mode
= targetm
.libgcc_cmp_return_mode ();
4201 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4202 ret_mode
, 2, x
, mode
, y
, mode
);
4204 /* There are two kinds of comparison routines. Biased routines
4205 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4206 of gcc expect that the comparison operation is equivalent
4207 to the modified comparison. For signed comparisons compare the
4208 result against 1 in the biased case, and zero in the unbiased
4209 case. For unsigned comparisons always compare against 1 after
4210 biasing the unbiased result by adding 1. This gives us a way to
4212 The comparisons in the fixed-point helper library are always
4217 if (!TARGET_LIB_INT_CMP_BIASED
&& !ALL_FIXED_POINT_MODE_P (mode
))
4220 x
= plus_constant (ret_mode
, result
, 1);
4226 prepare_cmp_insn (x
, y
, comparison
, NULL_RTX
, unsignedp
, methods
,
4230 prepare_float_lib_cmp (x
, y
, comparison
, ptest
, pmode
);
4238 /* Before emitting an insn with code ICODE, make sure that X, which is going
4239 to be used for operand OPNUM of the insn, is converted from mode MODE to
4240 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4241 that it is accepted by the operand predicate. Return the new value. */
4244 prepare_operand (enum insn_code icode
, rtx x
, int opnum
, enum machine_mode mode
,
4245 enum machine_mode wider_mode
, int unsignedp
)
4247 if (mode
!= wider_mode
)
4248 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
4250 if (!insn_operand_matches (icode
, opnum
, x
))
4252 if (reload_completed
)
4254 x
= copy_to_mode_reg (insn_data
[(int) icode
].operand
[opnum
].mode
, x
);
4260 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4261 we can do the branch. */
4264 emit_cmp_and_jump_insn_1 (rtx test
, enum machine_mode mode
, rtx label
, int prob
)
4266 enum machine_mode optab_mode
;
4267 enum mode_class mclass
;
4268 enum insn_code icode
;
4271 mclass
= GET_MODE_CLASS (mode
);
4272 optab_mode
= (mclass
== MODE_CC
) ? CCmode
: mode
;
4273 icode
= optab_handler (cbranch_optab
, optab_mode
);
4275 gcc_assert (icode
!= CODE_FOR_nothing
);
4276 gcc_assert (insn_operand_matches (icode
, 0, test
));
4277 insn
= emit_jump_insn (GEN_FCN (icode
) (test
, XEXP (test
, 0),
4278 XEXP (test
, 1), label
));
4280 && profile_status
!= PROFILE_ABSENT
4283 && any_condjump_p (insn
)
4284 && !find_reg_note (insn
, REG_BR_PROB
, 0))
4285 add_reg_note (insn
, REG_BR_PROB
, GEN_INT (prob
));
4288 /* Generate code to compare X with Y so that the condition codes are
4289 set and to jump to LABEL if the condition is true. If X is a
4290 constant and Y is not a constant, then the comparison is swapped to
4291 ensure that the comparison RTL has the canonical form.
4293 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4294 need to be widened. UNSIGNEDP is also used to select the proper
4295 branch condition code.
4297 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4299 MODE is the mode of the inputs (in case they are const_int).
4301 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4302 It will be potentially converted into an unsigned variant based on
4303 UNSIGNEDP to select a proper jump instruction.
4305 PROB is the probability of jumping to LABEL. */
4308 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4309 enum machine_mode mode
, int unsignedp
, rtx label
,
4312 rtx op0
= x
, op1
= y
;
4315 /* Swap operands and condition to ensure canonical RTL. */
4316 if (swap_commutative_operands_p (x
, y
)
4317 && can_compare_p (swap_condition (comparison
), mode
, ccp_jump
))
4320 comparison
= swap_condition (comparison
);
4323 /* If OP0 is still a constant, then both X and Y must be constants
4324 or the opposite comparison is not supported. Force X into a register
4325 to create canonical RTL. */
4326 if (CONSTANT_P (op0
))
4327 op0
= force_reg (mode
, op0
);
4330 comparison
= unsigned_condition (comparison
);
4332 prepare_cmp_insn (op0
, op1
, comparison
, size
, unsignedp
, OPTAB_LIB_WIDEN
,
4334 emit_cmp_and_jump_insn_1 (test
, mode
, label
, prob
);
4338 /* Emit a library call comparison between floating point X and Y.
4339 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4342 prepare_float_lib_cmp (rtx x
, rtx y
, enum rtx_code comparison
,
4343 rtx
*ptest
, enum machine_mode
*pmode
)
4345 enum rtx_code swapped
= swap_condition (comparison
);
4346 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
4347 enum machine_mode orig_mode
= GET_MODE (x
);
4348 enum machine_mode mode
, cmp_mode
;
4349 rtx true_rtx
, false_rtx
;
4350 rtx value
, target
, insns
, equiv
;
4352 bool reversed_p
= false;
4353 cmp_mode
= targetm
.libgcc_cmp_return_mode ();
4355 for (mode
= orig_mode
;
4357 mode
= GET_MODE_WIDER_MODE (mode
))
4359 if (code_to_optab (comparison
)
4360 && (libfunc
= optab_libfunc (code_to_optab (comparison
), mode
)))
4363 if (code_to_optab (swapped
)
4364 && (libfunc
= optab_libfunc (code_to_optab (swapped
), mode
)))
4367 tmp
= x
; x
= y
; y
= tmp
;
4368 comparison
= swapped
;
4372 if (code_to_optab (reversed
)
4373 && (libfunc
= optab_libfunc (code_to_optab (reversed
), mode
)))
4375 comparison
= reversed
;
4381 gcc_assert (mode
!= VOIDmode
);
4383 if (mode
!= orig_mode
)
4385 x
= convert_to_mode (mode
, x
, 0);
4386 y
= convert_to_mode (mode
, y
, 0);
4389 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4390 the RTL. The allows the RTL optimizers to delete the libcall if the
4391 condition can be determined at compile-time. */
4392 if (comparison
== UNORDERED
4393 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4395 true_rtx
= const_true_rtx
;
4396 false_rtx
= const0_rtx
;
4403 true_rtx
= const0_rtx
;
4404 false_rtx
= const_true_rtx
;
4408 true_rtx
= const_true_rtx
;
4409 false_rtx
= const0_rtx
;
4413 true_rtx
= const1_rtx
;
4414 false_rtx
= const0_rtx
;
4418 true_rtx
= const0_rtx
;
4419 false_rtx
= constm1_rtx
;
4423 true_rtx
= constm1_rtx
;
4424 false_rtx
= const0_rtx
;
4428 true_rtx
= const0_rtx
;
4429 false_rtx
= const1_rtx
;
4437 if (comparison
== UNORDERED
)
4439 rtx temp
= simplify_gen_relational (NE
, cmp_mode
, mode
, x
, x
);
4440 equiv
= simplify_gen_relational (NE
, cmp_mode
, mode
, y
, y
);
4441 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4442 temp
, const_true_rtx
, equiv
);
4446 equiv
= simplify_gen_relational (comparison
, cmp_mode
, mode
, x
, y
);
4447 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4448 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4449 equiv
, true_rtx
, false_rtx
);
4453 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4454 cmp_mode
, 2, x
, mode
, y
, mode
);
4455 insns
= get_insns ();
4458 target
= gen_reg_rtx (cmp_mode
);
4459 emit_libcall_block (insns
, target
, value
, equiv
);
4461 if (comparison
== UNORDERED
4462 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
)
4464 *ptest
= gen_rtx_fmt_ee (reversed_p
? EQ
: NE
, VOIDmode
, target
, false_rtx
);
4466 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, target
, const0_rtx
);
4471 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4474 emit_indirect_jump (rtx loc
)
4476 struct expand_operand ops
[1];
4478 create_address_operand (&ops
[0], loc
);
4479 expand_jump_insn (CODE_FOR_indirect_jump
, 1, ops
);
4483 #ifdef HAVE_conditional_move
4485 /* Emit a conditional move instruction if the machine supports one for that
4486 condition and machine mode.
4488 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4489 the mode to use should they be constants. If it is VOIDmode, they cannot
4492 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4493 should be stored there. MODE is the mode to use should they be constants.
4494 If it is VOIDmode, they cannot both be constants.
4496 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4497 is not supported. */
4500 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4501 enum machine_mode cmode
, rtx op2
, rtx op3
,
4502 enum machine_mode mode
, int unsignedp
)
4504 rtx tem
, comparison
, last
;
4505 enum insn_code icode
;
4506 enum rtx_code reversed
;
4508 /* If one operand is constant, make it the second one. Only do this
4509 if the other operand is not constant as well. */
4511 if (swap_commutative_operands_p (op0
, op1
))
4516 code
= swap_condition (code
);
4519 /* get_condition will prefer to generate LT and GT even if the old
4520 comparison was against zero, so undo that canonicalization here since
4521 comparisons against zero are cheaper. */
4522 if (code
== LT
&& op1
== const1_rtx
)
4523 code
= LE
, op1
= const0_rtx
;
4524 else if (code
== GT
&& op1
== constm1_rtx
)
4525 code
= GE
, op1
= const0_rtx
;
4527 if (cmode
== VOIDmode
)
4528 cmode
= GET_MODE (op0
);
4530 if (swap_commutative_operands_p (op2
, op3
)
4531 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4540 if (mode
== VOIDmode
)
4541 mode
= GET_MODE (op2
);
4543 icode
= direct_optab_handler (movcc_optab
, mode
);
4545 if (icode
== CODE_FOR_nothing
)
4549 target
= gen_reg_rtx (mode
);
4551 code
= unsignedp
? unsigned_condition (code
) : code
;
4552 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4554 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4555 return NULL and let the caller figure out how best to deal with this
4557 if (!COMPARISON_P (comparison
))
4560 do_pending_stack_adjust ();
4561 last
= get_last_insn ();
4562 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4563 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4564 &comparison
, &cmode
);
4567 struct expand_operand ops
[4];
4569 create_output_operand (&ops
[0], target
, mode
);
4570 create_fixed_operand (&ops
[1], comparison
);
4571 create_input_operand (&ops
[2], op2
, mode
);
4572 create_input_operand (&ops
[3], op3
, mode
);
4573 if (maybe_expand_insn (icode
, 4, ops
))
4575 if (ops
[0].value
!= target
)
4576 convert_move (target
, ops
[0].value
, false);
4580 delete_insns_since (last
);
4584 /* Return nonzero if a conditional move of mode MODE is supported.
4586 This function is for combine so it can tell whether an insn that looks
4587 like a conditional move is actually supported by the hardware. If we
4588 guess wrong we lose a bit on optimization, but that's it. */
4589 /* ??? sparc64 supports conditionally moving integers values based on fp
4590 comparisons, and vice versa. How do we handle them? */
4593 can_conditionally_move_p (enum machine_mode mode
)
4595 if (direct_optab_handler (movcc_optab
, mode
) != CODE_FOR_nothing
)
4601 #endif /* HAVE_conditional_move */
4603 /* Emit a conditional addition instruction if the machine supports one for that
4604 condition and machine mode.
4606 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4607 the mode to use should they be constants. If it is VOIDmode, they cannot
4610 OP2 should be stored in TARGET if the comparison is false, otherwise OP2+OP3
4611 should be stored there. MODE is the mode to use should they be constants.
4612 If it is VOIDmode, they cannot both be constants.
4614 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4615 is not supported. */
4618 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4619 enum machine_mode cmode
, rtx op2
, rtx op3
,
4620 enum machine_mode mode
, int unsignedp
)
4622 rtx tem
, comparison
, last
;
4623 enum insn_code icode
;
4625 /* If one operand is constant, make it the second one. Only do this
4626 if the other operand is not constant as well. */
4628 if (swap_commutative_operands_p (op0
, op1
))
4633 code
= swap_condition (code
);
4636 /* get_condition will prefer to generate LT and GT even if the old
4637 comparison was against zero, so undo that canonicalization here since
4638 comparisons against zero are cheaper. */
4639 if (code
== LT
&& op1
== const1_rtx
)
4640 code
= LE
, op1
= const0_rtx
;
4641 else if (code
== GT
&& op1
== constm1_rtx
)
4642 code
= GE
, op1
= const0_rtx
;
4644 if (cmode
== VOIDmode
)
4645 cmode
= GET_MODE (op0
);
4647 if (mode
== VOIDmode
)
4648 mode
= GET_MODE (op2
);
4650 icode
= optab_handler (addcc_optab
, mode
);
4652 if (icode
== CODE_FOR_nothing
)
4656 target
= gen_reg_rtx (mode
);
4658 code
= unsignedp
? unsigned_condition (code
) : code
;
4659 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4661 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4662 return NULL and let the caller figure out how best to deal with this
4664 if (!COMPARISON_P (comparison
))
4667 do_pending_stack_adjust ();
4668 last
= get_last_insn ();
4669 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4670 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4671 &comparison
, &cmode
);
4674 struct expand_operand ops
[4];
4676 create_output_operand (&ops
[0], target
, mode
);
4677 create_fixed_operand (&ops
[1], comparison
);
4678 create_input_operand (&ops
[2], op2
, mode
);
4679 create_input_operand (&ops
[3], op3
, mode
);
4680 if (maybe_expand_insn (icode
, 4, ops
))
4682 if (ops
[0].value
!= target
)
4683 convert_move (target
, ops
[0].value
, false);
4687 delete_insns_since (last
);
4691 /* These functions attempt to generate an insn body, rather than
4692 emitting the insn, but if the gen function already emits them, we
4693 make no attempt to turn them back into naked patterns. */
4695 /* Generate and return an insn body to add Y to X. */
4698 gen_add2_insn (rtx x
, rtx y
)
4700 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
4702 gcc_assert (insn_operand_matches (icode
, 0, x
));
4703 gcc_assert (insn_operand_matches (icode
, 1, x
));
4704 gcc_assert (insn_operand_matches (icode
, 2, y
));
4706 return GEN_FCN (icode
) (x
, x
, y
);
4709 /* Generate and return an insn body to add r1 and c,
4710 storing the result in r0. */
4713 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4715 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (r0
));
4717 if (icode
== CODE_FOR_nothing
4718 || !insn_operand_matches (icode
, 0, r0
)
4719 || !insn_operand_matches (icode
, 1, r1
)
4720 || !insn_operand_matches (icode
, 2, c
))
4723 return GEN_FCN (icode
) (r0
, r1
, c
);
4727 have_add2_insn (rtx x
, rtx y
)
4729 enum insn_code icode
;
4731 gcc_assert (GET_MODE (x
) != VOIDmode
);
4733 icode
= optab_handler (add_optab
, GET_MODE (x
));
4735 if (icode
== CODE_FOR_nothing
)
4738 if (!insn_operand_matches (icode
, 0, x
)
4739 || !insn_operand_matches (icode
, 1, x
)
4740 || !insn_operand_matches (icode
, 2, y
))
4746 /* Generate and return an insn body to subtract Y from X. */
4749 gen_sub2_insn (rtx x
, rtx y
)
4751 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (x
));
4753 gcc_assert (insn_operand_matches (icode
, 0, x
));
4754 gcc_assert (insn_operand_matches (icode
, 1, x
));
4755 gcc_assert (insn_operand_matches (icode
, 2, y
));
4757 return GEN_FCN (icode
) (x
, x
, y
);
4760 /* Generate and return an insn body to subtract r1 and c,
4761 storing the result in r0. */
4764 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4766 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (r0
));
4768 if (icode
== CODE_FOR_nothing
4769 || !insn_operand_matches (icode
, 0, r0
)
4770 || !insn_operand_matches (icode
, 1, r1
)
4771 || !insn_operand_matches (icode
, 2, c
))
4774 return GEN_FCN (icode
) (r0
, r1
, c
);
4778 have_sub2_insn (rtx x
, rtx y
)
4780 enum insn_code icode
;
4782 gcc_assert (GET_MODE (x
) != VOIDmode
);
4784 icode
= optab_handler (sub_optab
, GET_MODE (x
));
4786 if (icode
== CODE_FOR_nothing
)
4789 if (!insn_operand_matches (icode
, 0, x
)
4790 || !insn_operand_matches (icode
, 1, x
)
4791 || !insn_operand_matches (icode
, 2, y
))
4797 /* Generate the body of an instruction to copy Y into X.
4798 It may be a list of insns, if one insn isn't enough. */
4801 gen_move_insn (rtx x
, rtx y
)
4806 emit_move_insn_1 (x
, y
);
4812 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4813 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4814 no such operation exists, CODE_FOR_nothing will be returned. */
4817 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4821 #ifdef HAVE_ptr_extend
4823 return CODE_FOR_ptr_extend
;
4826 tab
= unsignedp
? zext_optab
: sext_optab
;
4827 return convert_optab_handler (tab
, to_mode
, from_mode
);
4830 /* Generate the body of an insn to extend Y (with mode MFROM)
4831 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4834 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4835 enum machine_mode mfrom
, int unsignedp
)
4837 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4838 return GEN_FCN (icode
) (x
, y
);
4841 /* can_fix_p and can_float_p say whether the target machine
4842 can directly convert a given fixed point type to
4843 a given floating point type, or vice versa.
4844 The returned value is the CODE_FOR_... value to use,
4845 or CODE_FOR_nothing if these modes cannot be directly converted.
4847 *TRUNCP_PTR is set to 1 if it is necessary to output
4848 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4850 static enum insn_code
4851 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4852 int unsignedp
, int *truncp_ptr
)
4855 enum insn_code icode
;
4857 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4858 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4859 if (icode
!= CODE_FOR_nothing
)
4865 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4866 for this to work. We need to rework the fix* and ftrunc* patterns
4867 and documentation. */
4868 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4869 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4870 if (icode
!= CODE_FOR_nothing
4871 && optab_handler (ftrunc_optab
, fltmode
) != CODE_FOR_nothing
)
4878 return CODE_FOR_nothing
;
4882 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4887 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4888 return convert_optab_handler (tab
, fltmode
, fixmode
);
4891 /* Function supportable_convert_operation
4893 Check whether an operation represented by the code CODE is a
4894 convert operation that is supported by the target platform in
4895 vector form (i.e., when operating on arguments of type VECTYPE_IN
4896 producing a result of type VECTYPE_OUT).
4898 Convert operations we currently support directly are FIX_TRUNC and FLOAT.
4899 This function checks if these operations are supported
4900 by the target platform either directly (via vector tree-codes), or via
4904 - CODE1 is code of vector operation to be used when
4905 vectorizing the operation, if available.
4906 - DECL is decl of target builtin functions to be used
4907 when vectorizing the operation, if available. In this case,
4908 CODE1 is CALL_EXPR. */
4911 supportable_convert_operation (enum tree_code code
,
4912 tree vectype_out
, tree vectype_in
,
4913 tree
*decl
, enum tree_code
*code1
)
4915 enum machine_mode m1
,m2
;
4918 m1
= TYPE_MODE (vectype_out
);
4919 m2
= TYPE_MODE (vectype_in
);
4921 /* First check if we can done conversion directly. */
4922 if ((code
== FIX_TRUNC_EXPR
4923 && can_fix_p (m1
,m2
,TYPE_UNSIGNED (vectype_out
), &truncp
)
4924 != CODE_FOR_nothing
)
4925 || (code
== FLOAT_EXPR
4926 && can_float_p (m1
,m2
,TYPE_UNSIGNED (vectype_in
))
4927 != CODE_FOR_nothing
))
4933 /* Now check for builtin. */
4934 if (targetm
.vectorize
.builtin_conversion
4935 && targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
))
4938 *decl
= targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
);
4945 /* Generate code to convert FROM to floating point
4946 and store in TO. FROM must be fixed point and not VOIDmode.
4947 UNSIGNEDP nonzero means regard FROM as unsigned.
4948 Normally this is done by correcting the final value
4949 if it is negative. */
4952 expand_float (rtx to
, rtx from
, int unsignedp
)
4954 enum insn_code icode
;
4956 enum machine_mode fmode
, imode
;
4957 bool can_do_signed
= false;
4959 /* Crash now, because we won't be able to decide which mode to use. */
4960 gcc_assert (GET_MODE (from
) != VOIDmode
);
4962 /* Look for an insn to do the conversion. Do it in the specified
4963 modes if possible; otherwise convert either input, output or both to
4964 wider mode. If the integer mode is wider than the mode of FROM,
4965 we can do the conversion signed even if the input is unsigned. */
4967 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4968 fmode
= GET_MODE_WIDER_MODE (fmode
))
4969 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4970 imode
= GET_MODE_WIDER_MODE (imode
))
4972 int doing_unsigned
= unsignedp
;
4974 if (fmode
!= GET_MODE (to
)
4975 && significand_size (fmode
) < GET_MODE_PRECISION (GET_MODE (from
)))
4978 icode
= can_float_p (fmode
, imode
, unsignedp
);
4979 if (icode
== CODE_FOR_nothing
&& unsignedp
)
4981 enum insn_code scode
= can_float_p (fmode
, imode
, 0);
4982 if (scode
!= CODE_FOR_nothing
)
4983 can_do_signed
= true;
4984 if (imode
!= GET_MODE (from
))
4985 icode
= scode
, doing_unsigned
= 0;
4988 if (icode
!= CODE_FOR_nothing
)
4990 if (imode
!= GET_MODE (from
))
4991 from
= convert_to_mode (imode
, from
, unsignedp
);
4993 if (fmode
!= GET_MODE (to
))
4994 target
= gen_reg_rtx (fmode
);
4996 emit_unop_insn (icode
, target
, from
,
4997 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
5000 convert_move (to
, target
, 0);
5005 /* Unsigned integer, and no way to convert directly. Convert as signed,
5006 then unconditionally adjust the result. */
5007 if (unsignedp
&& can_do_signed
)
5009 rtx label
= gen_label_rtx ();
5011 REAL_VALUE_TYPE offset
;
5013 /* Look for a usable floating mode FMODE wider than the source and at
5014 least as wide as the target. Using FMODE will avoid rounding woes
5015 with unsigned values greater than the signed maximum value. */
5017 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
5018 fmode
= GET_MODE_WIDER_MODE (fmode
))
5019 if (GET_MODE_PRECISION (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
5020 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
5023 if (fmode
== VOIDmode
)
5025 /* There is no such mode. Pretend the target is wide enough. */
5026 fmode
= GET_MODE (to
);
5028 /* Avoid double-rounding when TO is narrower than FROM. */
5029 if ((significand_size (fmode
) + 1)
5030 < GET_MODE_PRECISION (GET_MODE (from
)))
5033 rtx neglabel
= gen_label_rtx ();
5035 /* Don't use TARGET if it isn't a register, is a hard register,
5036 or is the wrong mode. */
5038 || REGNO (target
) < FIRST_PSEUDO_REGISTER
5039 || GET_MODE (target
) != fmode
)
5040 target
= gen_reg_rtx (fmode
);
5042 imode
= GET_MODE (from
);
5043 do_pending_stack_adjust ();
5045 /* Test whether the sign bit is set. */
5046 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
5049 /* The sign bit is not set. Convert as signed. */
5050 expand_float (target
, from
, 0);
5051 emit_jump_insn (gen_jump (label
));
5054 /* The sign bit is set.
5055 Convert to a usable (positive signed) value by shifting right
5056 one bit, while remembering if a nonzero bit was shifted
5057 out; i.e., compute (from & 1) | (from >> 1). */
5059 emit_label (neglabel
);
5060 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
5061 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
5062 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, 1, NULL_RTX
, 1);
5063 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
5065 expand_float (target
, temp
, 0);
5067 /* Multiply by 2 to undo the shift above. */
5068 temp
= expand_binop (fmode
, add_optab
, target
, target
,
5069 target
, 0, OPTAB_LIB_WIDEN
);
5071 emit_move_insn (target
, temp
);
5073 do_pending_stack_adjust ();
5079 /* If we are about to do some arithmetic to correct for an
5080 unsigned operand, do it in a pseudo-register. */
5082 if (GET_MODE (to
) != fmode
5083 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
5084 target
= gen_reg_rtx (fmode
);
5086 /* Convert as signed integer to floating. */
5087 expand_float (target
, from
, 0);
5089 /* If FROM is negative (and therefore TO is negative),
5090 correct its value by 2**bitwidth. */
5092 do_pending_stack_adjust ();
5093 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
5097 real_2expN (&offset
, GET_MODE_PRECISION (GET_MODE (from
)), fmode
);
5098 temp
= expand_binop (fmode
, add_optab
, target
,
5099 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
5100 target
, 0, OPTAB_LIB_WIDEN
);
5102 emit_move_insn (target
, temp
);
5104 do_pending_stack_adjust ();
5109 /* No hardware instruction available; call a library routine. */
5114 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
5116 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
5117 from
= convert_to_mode (SImode
, from
, unsignedp
);
5119 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5120 gcc_assert (libfunc
);
5124 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5125 GET_MODE (to
), 1, from
,
5127 insns
= get_insns ();
5130 emit_libcall_block (insns
, target
, value
,
5131 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FLOAT
: FLOAT
,
5132 GET_MODE (to
), from
));
5137 /* Copy result to requested destination
5138 if we have been computing in a temp location. */
5142 if (GET_MODE (target
) == GET_MODE (to
))
5143 emit_move_insn (to
, target
);
5145 convert_move (to
, target
, 0);
5149 /* Generate code to convert FROM to fixed point and store in TO. FROM
5150 must be floating point. */
5153 expand_fix (rtx to
, rtx from
, int unsignedp
)
5155 enum insn_code icode
;
5157 enum machine_mode fmode
, imode
;
5160 /* We first try to find a pair of modes, one real and one integer, at
5161 least as wide as FROM and TO, respectively, in which we can open-code
5162 this conversion. If the integer mode is wider than the mode of TO,
5163 we can do the conversion either signed or unsigned. */
5165 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5166 fmode
= GET_MODE_WIDER_MODE (fmode
))
5167 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5168 imode
= GET_MODE_WIDER_MODE (imode
))
5170 int doing_unsigned
= unsignedp
;
5172 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5173 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5174 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5176 if (icode
!= CODE_FOR_nothing
)
5178 rtx last
= get_last_insn ();
5179 if (fmode
!= GET_MODE (from
))
5180 from
= convert_to_mode (fmode
, from
, 0);
5184 rtx temp
= gen_reg_rtx (GET_MODE (from
));
5185 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
5189 if (imode
!= GET_MODE (to
))
5190 target
= gen_reg_rtx (imode
);
5192 if (maybe_emit_unop_insn (icode
, target
, from
,
5193 doing_unsigned
? UNSIGNED_FIX
: FIX
))
5196 convert_move (to
, target
, unsignedp
);
5199 delete_insns_since (last
);
5203 /* For an unsigned conversion, there is one more way to do it.
5204 If we have a signed conversion, we generate code that compares
5205 the real value to the largest representable positive number. If if
5206 is smaller, the conversion is done normally. Otherwise, subtract
5207 one plus the highest signed number, convert, and add it back.
5209 We only need to check all real modes, since we know we didn't find
5210 anything with a wider integer mode.
5212 This code used to extend FP value into mode wider than the destination.
5213 This is needed for decimal float modes which cannot accurately
5214 represent one plus the highest signed number of the same size, but
5215 not for binary modes. Consider, for instance conversion from SFmode
5218 The hot path through the code is dealing with inputs smaller than 2^63
5219 and doing just the conversion, so there is no bits to lose.
5221 In the other path we know the value is positive in the range 2^63..2^64-1
5222 inclusive. (as for other input overflow happens and result is undefined)
5223 So we know that the most important bit set in mantissa corresponds to
5224 2^63. The subtraction of 2^63 should not generate any rounding as it
5225 simply clears out that bit. The rest is trivial. */
5227 if (unsignedp
&& GET_MODE_PRECISION (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5228 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5229 fmode
= GET_MODE_WIDER_MODE (fmode
))
5230 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0, &must_trunc
)
5231 && (!DECIMAL_FLOAT_MODE_P (fmode
)
5232 || GET_MODE_BITSIZE (fmode
) > GET_MODE_PRECISION (GET_MODE (to
))))
5235 REAL_VALUE_TYPE offset
;
5236 rtx limit
, lab1
, lab2
, insn
;
5238 bitsize
= GET_MODE_PRECISION (GET_MODE (to
));
5239 real_2expN (&offset
, bitsize
- 1, fmode
);
5240 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5241 lab1
= gen_label_rtx ();
5242 lab2
= gen_label_rtx ();
5244 if (fmode
!= GET_MODE (from
))
5245 from
= convert_to_mode (fmode
, from
, 0);
5247 /* See if we need to do the subtraction. */
5248 do_pending_stack_adjust ();
5249 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5252 /* If not, do the signed "fix" and branch around fixup code. */
5253 expand_fix (to
, from
, 0);
5254 emit_jump_insn (gen_jump (lab2
));
5257 /* Otherwise, subtract 2**(N-1), convert to signed number,
5258 then add 2**(N-1). Do the addition using XOR since this
5259 will often generate better code. */
5261 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5262 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5263 expand_fix (to
, target
, 0);
5264 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5266 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5268 to
, 1, OPTAB_LIB_WIDEN
);
5271 emit_move_insn (to
, target
);
5275 if (optab_handler (mov_optab
, GET_MODE (to
)) != CODE_FOR_nothing
)
5277 /* Make a place for a REG_NOTE and add it. */
5278 insn
= emit_move_insn (to
, to
);
5279 set_dst_reg_note (insn
, REG_EQUAL
,
5280 gen_rtx_fmt_e (UNSIGNED_FIX
, GET_MODE (to
),
5288 /* We can't do it with an insn, so use a library call. But first ensure
5289 that the mode of TO is at least as wide as SImode, since those are the
5290 only library calls we know about. */
5292 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5294 target
= gen_reg_rtx (SImode
);
5296 expand_fix (target
, from
, unsignedp
);
5304 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
5305 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5306 gcc_assert (libfunc
);
5310 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5311 GET_MODE (to
), 1, from
,
5313 insns
= get_insns ();
5316 emit_libcall_block (insns
, target
, value
,
5317 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5318 GET_MODE (to
), from
));
5323 if (GET_MODE (to
) == GET_MODE (target
))
5324 emit_move_insn (to
, target
);
5326 convert_move (to
, target
, 0);
5330 /* Generate code to convert FROM or TO a fixed-point.
5331 If UINTP is true, either TO or FROM is an unsigned integer.
5332 If SATP is true, we need to saturate the result. */
5335 expand_fixed_convert (rtx to
, rtx from
, int uintp
, int satp
)
5337 enum machine_mode to_mode
= GET_MODE (to
);
5338 enum machine_mode from_mode
= GET_MODE (from
);
5340 enum rtx_code this_code
;
5341 enum insn_code code
;
5345 if (to_mode
== from_mode
)
5347 emit_move_insn (to
, from
);
5353 tab
= satp
? satfractuns_optab
: fractuns_optab
;
5354 this_code
= satp
? UNSIGNED_SAT_FRACT
: UNSIGNED_FRACT_CONVERT
;
5358 tab
= satp
? satfract_optab
: fract_optab
;
5359 this_code
= satp
? SAT_FRACT
: FRACT_CONVERT
;
5361 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
5362 if (code
!= CODE_FOR_nothing
)
5364 emit_unop_insn (code
, to
, from
, this_code
);
5368 libfunc
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
5369 gcc_assert (libfunc
);
5372 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, to_mode
,
5373 1, from
, from_mode
);
5374 insns
= get_insns ();
5377 emit_libcall_block (insns
, to
, value
,
5378 gen_rtx_fmt_e (optab_to_code (tab
), to_mode
, from
));
5381 /* Generate code to convert FROM to fixed point and store in TO. FROM
5382 must be floating point, TO must be signed. Use the conversion optab
5383 TAB to do the conversion. */
5386 expand_sfix_optab (rtx to
, rtx from
, convert_optab tab
)
5388 enum insn_code icode
;
5390 enum machine_mode fmode
, imode
;
5392 /* We first try to find a pair of modes, one real and one integer, at
5393 least as wide as FROM and TO, respectively, in which we can open-code
5394 this conversion. If the integer mode is wider than the mode of TO,
5395 we can do the conversion either signed or unsigned. */
5397 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5398 fmode
= GET_MODE_WIDER_MODE (fmode
))
5399 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5400 imode
= GET_MODE_WIDER_MODE (imode
))
5402 icode
= convert_optab_handler (tab
, imode
, fmode
);
5403 if (icode
!= CODE_FOR_nothing
)
5405 rtx last
= get_last_insn ();
5406 if (fmode
!= GET_MODE (from
))
5407 from
= convert_to_mode (fmode
, from
, 0);
5409 if (imode
!= GET_MODE (to
))
5410 target
= gen_reg_rtx (imode
);
5412 if (!maybe_emit_unop_insn (icode
, target
, from
, UNKNOWN
))
5414 delete_insns_since (last
);
5418 convert_move (to
, target
, 0);
5426 /* Report whether we have an instruction to perform the operation
5427 specified by CODE on operands of mode MODE. */
5429 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
5431 return (code_to_optab (code
)
5432 && (optab_handler (code_to_optab (code
), mode
)
5433 != CODE_FOR_nothing
));
5436 /* Initialize the libfunc fields of an entire group of entries in some
5437 optab. Each entry is set equal to a string consisting of a leading
5438 pair of underscores followed by a generic operation name followed by
5439 a mode name (downshifted to lowercase) followed by a single character
5440 representing the number of operands for the given operation (which is
5441 usually one of the characters '2', '3', or '4').
5443 OPTABLE is the table in which libfunc fields are to be initialized.
5444 OPNAME is the generic (string) name of the operation.
5445 SUFFIX is the character which specifies the number of operands for
5446 the given generic operation.
5447 MODE is the mode to generate for.
5451 gen_libfunc (optab optable
, const char *opname
, int suffix
,
5452 enum machine_mode mode
)
5454 unsigned opname_len
= strlen (opname
);
5455 const char *mname
= GET_MODE_NAME (mode
);
5456 unsigned mname_len
= strlen (mname
);
5457 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5458 int len
= prefix_len
+ opname_len
+ mname_len
+ 1 + 1;
5459 char *libfunc_name
= XALLOCAVEC (char, len
);
5466 if (targetm
.libfunc_gnu_prefix
)
5473 for (q
= opname
; *q
; )
5475 for (q
= mname
; *q
; q
++)
5476 *p
++ = TOLOWER (*q
);
5480 set_optab_libfunc (optable
, mode
,
5481 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5484 /* Like gen_libfunc, but verify that integer operation is involved. */
5487 gen_int_libfunc (optab optable
, const char *opname
, char suffix
,
5488 enum machine_mode mode
)
5490 int maxsize
= 2 * BITS_PER_WORD
;
5492 if (GET_MODE_CLASS (mode
) != MODE_INT
)
5494 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5495 maxsize
= LONG_LONG_TYPE_SIZE
;
5496 if (GET_MODE_CLASS (mode
) != MODE_INT
5497 || mode
< word_mode
|| GET_MODE_BITSIZE (mode
) > maxsize
)
5499 gen_libfunc (optable
, opname
, suffix
, mode
);
5502 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5505 gen_fp_libfunc (optab optable
, const char *opname
, char suffix
,
5506 enum machine_mode mode
)
5510 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5511 gen_libfunc (optable
, opname
, suffix
, mode
);
5512 if (DECIMAL_FLOAT_MODE_P (mode
))
5514 dec_opname
= XALLOCAVEC (char, sizeof (DECIMAL_PREFIX
) + strlen (opname
));
5515 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5516 depending on the low level floating format used. */
5517 memcpy (dec_opname
, DECIMAL_PREFIX
, sizeof (DECIMAL_PREFIX
) - 1);
5518 strcpy (dec_opname
+ sizeof (DECIMAL_PREFIX
) - 1, opname
);
5519 gen_libfunc (optable
, dec_opname
, suffix
, mode
);
5523 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5526 gen_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5527 enum machine_mode mode
)
5529 if (!ALL_FIXED_POINT_MODE_P (mode
))
5531 gen_libfunc (optable
, opname
, suffix
, mode
);
5534 /* Like gen_libfunc, but verify that signed fixed-point operation is
5538 gen_signed_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5539 enum machine_mode mode
)
5541 if (!SIGNED_FIXED_POINT_MODE_P (mode
))
5543 gen_libfunc (optable
, opname
, suffix
, mode
);
5546 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5550 gen_unsigned_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5551 enum machine_mode mode
)
5553 if (!UNSIGNED_FIXED_POINT_MODE_P (mode
))
5555 gen_libfunc (optable
, opname
, suffix
, mode
);
5558 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5561 gen_int_fp_libfunc (optab optable
, const char *name
, char suffix
,
5562 enum machine_mode mode
)
5564 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5565 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5566 if (INTEGRAL_MODE_P (mode
))
5567 gen_int_libfunc (optable
, name
, suffix
, mode
);
5570 /* Like gen_libfunc, but verify that FP or INT operation is involved
5571 and add 'v' suffix for integer operation. */
5574 gen_intv_fp_libfunc (optab optable
, const char *name
, char suffix
,
5575 enum machine_mode mode
)
5577 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5578 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5579 if (GET_MODE_CLASS (mode
) == MODE_INT
)
5581 int len
= strlen (name
);
5582 char *v_name
= XALLOCAVEC (char, len
+ 2);
5583 strcpy (v_name
, name
);
5585 v_name
[len
+ 1] = 0;
5586 gen_int_libfunc (optable
, v_name
, suffix
, mode
);
5590 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5594 gen_int_fp_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5595 enum machine_mode mode
)
5597 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5598 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5599 if (INTEGRAL_MODE_P (mode
))
5600 gen_int_libfunc (optable
, name
, suffix
, mode
);
5601 if (ALL_FIXED_POINT_MODE_P (mode
))
5602 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5605 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5609 gen_int_fp_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5610 enum machine_mode mode
)
5612 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5613 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5614 if (INTEGRAL_MODE_P (mode
))
5615 gen_int_libfunc (optable
, name
, suffix
, mode
);
5616 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5617 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5620 /* Like gen_libfunc, but verify that INT or FIXED operation is
5624 gen_int_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5625 enum machine_mode mode
)
5627 if (INTEGRAL_MODE_P (mode
))
5628 gen_int_libfunc (optable
, name
, suffix
, mode
);
5629 if (ALL_FIXED_POINT_MODE_P (mode
))
5630 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5633 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5637 gen_int_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5638 enum machine_mode mode
)
5640 if (INTEGRAL_MODE_P (mode
))
5641 gen_int_libfunc (optable
, name
, suffix
, mode
);
5642 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5643 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5646 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5650 gen_int_unsigned_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5651 enum machine_mode mode
)
5653 if (INTEGRAL_MODE_P (mode
))
5654 gen_int_libfunc (optable
, name
, suffix
, mode
);
5655 if (UNSIGNED_FIXED_POINT_MODE_P (mode
))
5656 gen_unsigned_fixed_libfunc (optable
, name
, suffix
, mode
);
5659 /* Initialize the libfunc fields of an entire group of entries of an
5660 inter-mode-class conversion optab. The string formation rules are
5661 similar to the ones for init_libfuncs, above, but instead of having
5662 a mode name and an operand count these functions have two mode names
5663 and no operand count. */
5666 gen_interclass_conv_libfunc (convert_optab tab
,
5668 enum machine_mode tmode
,
5669 enum machine_mode fmode
)
5671 size_t opname_len
= strlen (opname
);
5672 size_t mname_len
= 0;
5674 const char *fname
, *tname
;
5676 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5677 char *libfunc_name
, *suffix
;
5678 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5681 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5682 depends on which underlying decimal floating point format is used. */
5683 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5685 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5687 nondec_name
= XALLOCAVEC (char, prefix_len
+ opname_len
+ mname_len
+ 1 + 1);
5688 nondec_name
[0] = '_';
5689 nondec_name
[1] = '_';
5690 if (targetm
.libfunc_gnu_prefix
)
5692 nondec_name
[2] = 'g';
5693 nondec_name
[3] = 'n';
5694 nondec_name
[4] = 'u';
5695 nondec_name
[5] = '_';
5698 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5699 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5701 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5704 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5705 memcpy (&dec_name
[2+dec_len
], opname
, opname_len
);
5706 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5708 fname
= GET_MODE_NAME (fmode
);
5709 tname
= GET_MODE_NAME (tmode
);
5711 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5713 libfunc_name
= dec_name
;
5714 suffix
= dec_suffix
;
5718 libfunc_name
= nondec_name
;
5719 suffix
= nondec_suffix
;
5723 for (q
= fname
; *q
; p
++, q
++)
5725 for (q
= tname
; *q
; p
++, q
++)
5730 set_conv_libfunc (tab
, tmode
, fmode
,
5731 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5734 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5735 int->fp conversion. */
5738 gen_int_to_fp_conv_libfunc (convert_optab tab
,
5740 enum machine_mode tmode
,
5741 enum machine_mode fmode
)
5743 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5745 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5747 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5750 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5754 gen_ufloat_conv_libfunc (convert_optab tab
,
5755 const char *opname ATTRIBUTE_UNUSED
,
5756 enum machine_mode tmode
,
5757 enum machine_mode fmode
)
5759 if (DECIMAL_FLOAT_MODE_P (tmode
))
5760 gen_int_to_fp_conv_libfunc (tab
, "floatuns", tmode
, fmode
);
5762 gen_int_to_fp_conv_libfunc (tab
, "floatun", tmode
, fmode
);
5765 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5766 fp->int conversion. */
5769 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab
,
5771 enum machine_mode tmode
,
5772 enum machine_mode fmode
)
5774 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5776 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
)
5778 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5781 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5782 fp->int conversion with no decimal floating point involved. */
5785 gen_fp_to_int_conv_libfunc (convert_optab tab
,
5787 enum machine_mode tmode
,
5788 enum machine_mode fmode
)
5790 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5792 if (GET_MODE_CLASS (tmode
) != MODE_INT
)
5794 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5797 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5798 The string formation rules are
5799 similar to the ones for init_libfunc, above. */
5802 gen_intraclass_conv_libfunc (convert_optab tab
, const char *opname
,
5803 enum machine_mode tmode
, enum machine_mode fmode
)
5805 size_t opname_len
= strlen (opname
);
5806 size_t mname_len
= 0;
5808 const char *fname
, *tname
;
5810 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5811 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5812 char *libfunc_name
, *suffix
;
5815 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5816 depends on which underlying decimal floating point format is used. */
5817 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5819 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5821 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5822 nondec_name
[0] = '_';
5823 nondec_name
[1] = '_';
5824 if (targetm
.libfunc_gnu_prefix
)
5826 nondec_name
[2] = 'g';
5827 nondec_name
[3] = 'n';
5828 nondec_name
[4] = 'u';
5829 nondec_name
[5] = '_';
5831 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5832 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5834 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5837 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5838 memcpy (&dec_name
[2 + dec_len
], opname
, opname_len
);
5839 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5841 fname
= GET_MODE_NAME (fmode
);
5842 tname
= GET_MODE_NAME (tmode
);
5844 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5846 libfunc_name
= dec_name
;
5847 suffix
= dec_suffix
;
5851 libfunc_name
= nondec_name
;
5852 suffix
= nondec_suffix
;
5856 for (q
= fname
; *q
; p
++, q
++)
5858 for (q
= tname
; *q
; p
++, q
++)
5864 set_conv_libfunc (tab
, tmode
, fmode
,
5865 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5868 /* Pick proper libcall for trunc_optab. We need to chose if we do
5869 truncation or extension and interclass or intraclass. */
5872 gen_trunc_conv_libfunc (convert_optab tab
,
5874 enum machine_mode tmode
,
5875 enum machine_mode fmode
)
5877 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5879 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5884 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5885 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5886 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5888 if (GET_MODE_PRECISION (fmode
) <= GET_MODE_PRECISION (tmode
))
5891 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5892 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5893 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5894 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5897 /* Pick proper libcall for extend_optab. We need to chose if we do
5898 truncation or extension and interclass or intraclass. */
5901 gen_extend_conv_libfunc (convert_optab tab
,
5902 const char *opname ATTRIBUTE_UNUSED
,
5903 enum machine_mode tmode
,
5904 enum machine_mode fmode
)
5906 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5908 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5913 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5914 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5915 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5917 if (GET_MODE_PRECISION (fmode
) > GET_MODE_PRECISION (tmode
))
5920 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5921 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5922 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5923 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5926 /* Pick proper libcall for fract_optab. We need to chose if we do
5927 interclass or intraclass. */
5930 gen_fract_conv_libfunc (convert_optab tab
,
5932 enum machine_mode tmode
,
5933 enum machine_mode fmode
)
5937 if (!(ALL_FIXED_POINT_MODE_P (tmode
) || ALL_FIXED_POINT_MODE_P (fmode
)))
5940 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5941 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5943 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5946 /* Pick proper libcall for fractuns_optab. */
5949 gen_fractuns_conv_libfunc (convert_optab tab
,
5951 enum machine_mode tmode
,
5952 enum machine_mode fmode
)
5956 /* One mode must be a fixed-point mode, and the other must be an integer
5958 if (!((ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
)
5959 || (ALL_FIXED_POINT_MODE_P (fmode
)
5960 && GET_MODE_CLASS (tmode
) == MODE_INT
)))
5963 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5966 /* Pick proper libcall for satfract_optab. We need to chose if we do
5967 interclass or intraclass. */
5970 gen_satfract_conv_libfunc (convert_optab tab
,
5972 enum machine_mode tmode
,
5973 enum machine_mode fmode
)
5977 /* TMODE must be a fixed-point mode. */
5978 if (!ALL_FIXED_POINT_MODE_P (tmode
))
5981 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5982 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5984 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5987 /* Pick proper libcall for satfractuns_optab. */
5990 gen_satfractuns_conv_libfunc (convert_optab tab
,
5992 enum machine_mode tmode
,
5993 enum machine_mode fmode
)
5997 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
5998 if (!(ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
))
6001 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6004 /* A table of previously-created libfuncs, hashed by name. */
6005 static GTY ((param_is (union tree_node
))) htab_t libfunc_decls
;
6007 /* Hashtable callbacks for libfunc_decls. */
6010 libfunc_decl_hash (const void *entry
)
6012 return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree
) entry
));
6016 libfunc_decl_eq (const void *entry1
, const void *entry2
)
6018 return DECL_NAME ((const_tree
) entry1
) == (const_tree
) entry2
;
6021 /* Build a decl for a libfunc named NAME. */
6024 build_libfunc_function (const char *name
)
6026 tree decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
6027 get_identifier (name
),
6028 build_function_type (integer_type_node
, NULL_TREE
));
6029 /* ??? We don't have any type information except for this is
6030 a function. Pretend this is "int foo()". */
6031 DECL_ARTIFICIAL (decl
) = 1;
6032 DECL_EXTERNAL (decl
) = 1;
6033 TREE_PUBLIC (decl
) = 1;
6034 gcc_assert (DECL_ASSEMBLER_NAME (decl
));
6036 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6037 are the flags assigned by targetm.encode_section_info. */
6038 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
6044 init_one_libfunc (const char *name
)
6050 if (libfunc_decls
== NULL
)
6051 libfunc_decls
= htab_create_ggc (37, libfunc_decl_hash
,
6052 libfunc_decl_eq
, NULL
);
6054 /* See if we have already created a libfunc decl for this function. */
6055 id
= get_identifier (name
);
6056 hash
= IDENTIFIER_HASH_VALUE (id
);
6057 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, INSERT
);
6058 decl
= (tree
) *slot
;
6061 /* Create a new decl, so that it can be passed to
6062 targetm.encode_section_info. */
6063 decl
= build_libfunc_function (name
);
6066 return XEXP (DECL_RTL (decl
), 0);
6069 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6072 set_user_assembler_libfunc (const char *name
, const char *asmspec
)
6078 id
= get_identifier (name
);
6079 hash
= IDENTIFIER_HASH_VALUE (id
);
6080 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, NO_INSERT
);
6082 decl
= (tree
) *slot
;
6083 set_user_assembler_name (decl
, asmspec
);
6084 return XEXP (DECL_RTL (decl
), 0);
6087 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6088 MODE to NAME, which should be either 0 or a string constant. */
6090 set_optab_libfunc (optab op
, enum machine_mode mode
, const char *name
)
6093 struct libfunc_entry e
;
6094 struct libfunc_entry
**slot
;
6101 val
= init_one_libfunc (name
);
6104 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6106 *slot
= ggc_alloc_libfunc_entry ();
6108 (*slot
)->mode1
= mode
;
6109 (*slot
)->mode2
= VOIDmode
;
6110 (*slot
)->libfunc
= val
;
6113 /* Call this to reset the function entry for one conversion optab
6114 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6115 either 0 or a string constant. */
6117 set_conv_libfunc (convert_optab optab
, enum machine_mode tmode
,
6118 enum machine_mode fmode
, const char *name
)
6121 struct libfunc_entry e
;
6122 struct libfunc_entry
**slot
;
6129 val
= init_one_libfunc (name
);
6132 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6134 *slot
= ggc_alloc_libfunc_entry ();
6135 (*slot
)->op
= optab
;
6136 (*slot
)->mode1
= tmode
;
6137 (*slot
)->mode2
= fmode
;
6138 (*slot
)->libfunc
= val
;
6141 /* Call this to initialize the contents of the optabs
6142 appropriately for the current target machine. */
6148 htab_empty (libfunc_hash
);
6150 libfunc_hash
= htab_create_ggc (10, hash_libfunc
, eq_libfunc
, NULL
);
6152 /* Fill in the optabs with the insns we support. */
6155 /* The ffs function operates on `int'. Fall back on it if we do not
6156 have a libgcc2 function for that width. */
6157 if (INT_TYPE_SIZE
< BITS_PER_WORD
)
6158 set_optab_libfunc (ffs_optab
, mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0),
6161 /* Explicitly initialize the bswap libfuncs since we need them to be
6162 valid for things other than word_mode. */
6163 if (targetm
.libfunc_gnu_prefix
)
6165 set_optab_libfunc (bswap_optab
, SImode
, "__gnu_bswapsi2");
6166 set_optab_libfunc (bswap_optab
, DImode
, "__gnu_bswapdi2");
6170 set_optab_libfunc (bswap_optab
, SImode
, "__bswapsi2");
6171 set_optab_libfunc (bswap_optab
, DImode
, "__bswapdi2");
6174 /* Use cabs for double complex abs, since systems generally have cabs.
6175 Don't define any libcall for float complex, so that cabs will be used. */
6176 if (complex_double_type_node
)
6177 set_optab_libfunc (abs_optab
, TYPE_MODE (complex_double_type_node
),
6180 abort_libfunc
= init_one_libfunc ("abort");
6181 memcpy_libfunc
= init_one_libfunc ("memcpy");
6182 memmove_libfunc
= init_one_libfunc ("memmove");
6183 memcmp_libfunc
= init_one_libfunc ("memcmp");
6184 memset_libfunc
= init_one_libfunc ("memset");
6185 setbits_libfunc
= init_one_libfunc ("__setbits");
6187 #ifndef DONT_USE_BUILTIN_SETJMP
6188 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
6189 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
6191 setjmp_libfunc
= init_one_libfunc ("setjmp");
6192 longjmp_libfunc
= init_one_libfunc ("longjmp");
6194 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
6195 unwind_sjlj_unregister_libfunc
6196 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6198 /* For function entry/exit instrumentation. */
6199 profile_function_entry_libfunc
6200 = init_one_libfunc ("__cyg_profile_func_enter");
6201 profile_function_exit_libfunc
6202 = init_one_libfunc ("__cyg_profile_func_exit");
6204 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
6206 /* Allow the target to add more libcalls or rename some, etc. */
6207 targetm
.init_libfuncs ();
6210 /* A helper function for init_sync_libfuncs. Using the basename BASE,
6211 install libfuncs into TAB for BASE_N for 1 <= N <= MAX. */
6214 init_sync_libfuncs_1 (optab tab
, const char *base
, int max
)
6216 enum machine_mode mode
;
6218 size_t len
= strlen (base
);
6221 gcc_assert (max
<= 8);
6222 gcc_assert (len
+ 3 < sizeof (buf
));
6224 memcpy (buf
, base
, len
);
6227 buf
[len
+ 2] = '\0';
6230 for (i
= 1; i
<= max
; i
*= 2)
6232 buf
[len
+ 1] = '0' + i
;
6233 set_optab_libfunc (tab
, mode
, buf
);
6234 mode
= GET_MODE_2XWIDER_MODE (mode
);
6239 init_sync_libfuncs (int max
)
6241 if (!flag_sync_libcalls
)
6244 init_sync_libfuncs_1 (sync_compare_and_swap_optab
,
6245 "__sync_val_compare_and_swap", max
);
6246 init_sync_libfuncs_1 (sync_lock_test_and_set_optab
,
6247 "__sync_lock_test_and_set", max
);
6249 init_sync_libfuncs_1 (sync_old_add_optab
, "__sync_fetch_and_add", max
);
6250 init_sync_libfuncs_1 (sync_old_sub_optab
, "__sync_fetch_and_sub", max
);
6251 init_sync_libfuncs_1 (sync_old_ior_optab
, "__sync_fetch_and_or", max
);
6252 init_sync_libfuncs_1 (sync_old_and_optab
, "__sync_fetch_and_and", max
);
6253 init_sync_libfuncs_1 (sync_old_xor_optab
, "__sync_fetch_and_xor", max
);
6254 init_sync_libfuncs_1 (sync_old_nand_optab
, "__sync_fetch_and_nand", max
);
6256 init_sync_libfuncs_1 (sync_new_add_optab
, "__sync_add_and_fetch", max
);
6257 init_sync_libfuncs_1 (sync_new_sub_optab
, "__sync_sub_and_fetch", max
);
6258 init_sync_libfuncs_1 (sync_new_ior_optab
, "__sync_or_and_fetch", max
);
6259 init_sync_libfuncs_1 (sync_new_and_optab
, "__sync_and_and_fetch", max
);
6260 init_sync_libfuncs_1 (sync_new_xor_optab
, "__sync_xor_and_fetch", max
);
6261 init_sync_libfuncs_1 (sync_new_nand_optab
, "__sync_nand_and_fetch", max
);
6264 /* Print information about the current contents of the optabs on
6268 debug_optab_libfuncs (void)
6272 /* Dump the arithmetic optabs. */
6273 for (i
= FIRST_NORM_OPTAB
; i
<= LAST_NORMLIB_OPTAB
; ++i
)
6274 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6276 rtx l
= optab_libfunc ((optab
) i
, (enum machine_mode
) j
);
6279 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6280 fprintf (stderr
, "%s\t%s:\t%s\n",
6281 GET_RTX_NAME (optab_to_code ((optab
) i
)),
6287 /* Dump the conversion optabs. */
6288 for (i
= FIRST_CONV_OPTAB
; i
<= LAST_CONVLIB_OPTAB
; ++i
)
6289 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6290 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
6292 rtx l
= convert_optab_libfunc ((optab
) i
, (enum machine_mode
) j
,
6293 (enum machine_mode
) k
);
6296 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6297 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
6298 GET_RTX_NAME (optab_to_code ((optab
) i
)),
6307 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6308 CODE. Return 0 on failure. */
6311 gen_cond_trap (enum rtx_code code
, rtx op1
, rtx op2
, rtx tcode
)
6313 enum machine_mode mode
= GET_MODE (op1
);
6314 enum insn_code icode
;
6318 if (mode
== VOIDmode
)
6321 icode
= optab_handler (ctrap_optab
, mode
);
6322 if (icode
== CODE_FOR_nothing
)
6325 /* Some targets only accept a zero trap code. */
6326 if (!insn_operand_matches (icode
, 3, tcode
))
6329 do_pending_stack_adjust ();
6331 prepare_cmp_insn (op1
, op2
, code
, NULL_RTX
, false, OPTAB_DIRECT
,
6336 insn
= GEN_FCN (icode
) (trap_rtx
, XEXP (trap_rtx
, 0), XEXP (trap_rtx
, 1),
6339 /* If that failed, then give up. */
6347 insn
= get_insns ();
6352 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6353 or unsigned operation code. */
6355 static enum rtx_code
6356 get_rtx_code (enum tree_code tcode
, bool unsignedp
)
6368 code
= unsignedp
? LTU
: LT
;
6371 code
= unsignedp
? LEU
: LE
;
6374 code
= unsignedp
? GTU
: GT
;
6377 code
= unsignedp
? GEU
: GE
;
6380 case UNORDERED_EXPR
:
6411 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6412 unsigned operators. Do not generate compare instruction. */
6415 vector_compare_rtx (enum tree_code tcode
, tree t_op0
, tree t_op1
,
6416 bool unsignedp
, enum insn_code icode
)
6418 struct expand_operand ops
[2];
6419 rtx rtx_op0
, rtx_op1
;
6420 enum rtx_code rcode
= get_rtx_code (tcode
, unsignedp
);
6422 gcc_assert (TREE_CODE_CLASS (tcode
) == tcc_comparison
);
6424 /* Expand operands. */
6425 rtx_op0
= expand_expr (t_op0
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op0
)),
6427 rtx_op1
= expand_expr (t_op1
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op1
)),
6430 create_input_operand (&ops
[0], rtx_op0
, GET_MODE (rtx_op0
));
6431 create_input_operand (&ops
[1], rtx_op1
, GET_MODE (rtx_op1
));
6432 if (!maybe_legitimize_operands (icode
, 4, 2, ops
))
6434 return gen_rtx_fmt_ee (rcode
, VOIDmode
, ops
[0].value
, ops
[1].value
);
6437 /* Return true if VEC_PERM_EXPR can be expanded using SIMD extensions
6438 of the CPU. SEL may be NULL, which stands for an unknown constant. */
6441 can_vec_perm_p (enum machine_mode mode
, bool variable
,
6442 const unsigned char *sel
)
6444 enum machine_mode qimode
;
6446 /* If the target doesn't implement a vector mode for the vector type,
6447 then no operations are supported. */
6448 if (!VECTOR_MODE_P (mode
))
6453 if (direct_optab_handler (vec_perm_const_optab
, mode
) != CODE_FOR_nothing
6455 || targetm
.vectorize
.vec_perm_const_ok
== NULL
6456 || targetm
.vectorize
.vec_perm_const_ok (mode
, sel
)))
6460 if (direct_optab_handler (vec_perm_optab
, mode
) != CODE_FOR_nothing
)
6463 /* We allow fallback to a QI vector mode, and adjust the mask. */
6464 if (GET_MODE_INNER (mode
) == QImode
)
6466 qimode
= mode_for_vector (QImode
, GET_MODE_SIZE (mode
));
6467 if (!VECTOR_MODE_P (qimode
))
6470 /* ??? For completeness, we ought to check the QImode version of
6471 vec_perm_const_optab. But all users of this implicit lowering
6472 feature implement the variable vec_perm_optab. */
6473 if (direct_optab_handler (vec_perm_optab
, qimode
) == CODE_FOR_nothing
)
6476 /* In order to support the lowering of variable permutations,
6477 we need to support shifts and adds. */
6480 if (GET_MODE_UNIT_SIZE (mode
) > 2
6481 && optab_handler (ashl_optab
, mode
) == CODE_FOR_nothing
6482 && optab_handler (vashl_optab
, mode
) == CODE_FOR_nothing
)
6484 if (optab_handler (add_optab
, qimode
) == CODE_FOR_nothing
)
6491 /* A subroutine of expand_vec_perm for expanding one vec_perm insn. */
6494 expand_vec_perm_1 (enum insn_code icode
, rtx target
,
6495 rtx v0
, rtx v1
, rtx sel
)
6497 enum machine_mode tmode
= GET_MODE (target
);
6498 enum machine_mode smode
= GET_MODE (sel
);
6499 struct expand_operand ops
[4];
6501 create_output_operand (&ops
[0], target
, tmode
);
6502 create_input_operand (&ops
[3], sel
, smode
);
6504 /* Make an effort to preserve v0 == v1. The target expander is able to
6505 rely on this to determine if we're permuting a single input operand. */
6506 if (rtx_equal_p (v0
, v1
))
6508 if (!insn_operand_matches (icode
, 1, v0
))
6509 v0
= force_reg (tmode
, v0
);
6510 gcc_checking_assert (insn_operand_matches (icode
, 1, v0
));
6511 gcc_checking_assert (insn_operand_matches (icode
, 2, v0
));
6513 create_fixed_operand (&ops
[1], v0
);
6514 create_fixed_operand (&ops
[2], v0
);
6518 create_input_operand (&ops
[1], v0
, tmode
);
6519 create_input_operand (&ops
[2], v1
, tmode
);
6522 if (maybe_expand_insn (icode
, 4, ops
))
6523 return ops
[0].value
;
6527 /* Generate instructions for vec_perm optab given its mode
6528 and three operands. */
6531 expand_vec_perm (enum machine_mode mode
, rtx v0
, rtx v1
, rtx sel
, rtx target
)
6533 enum insn_code icode
;
6534 enum machine_mode qimode
;
6535 unsigned int i
, w
, e
, u
;
6536 rtx tmp
, sel_qi
= NULL
;
6539 if (!target
|| GET_MODE (target
) != mode
)
6540 target
= gen_reg_rtx (mode
);
6542 w
= GET_MODE_SIZE (mode
);
6543 e
= GET_MODE_NUNITS (mode
);
6544 u
= GET_MODE_UNIT_SIZE (mode
);
6546 /* Set QIMODE to a different vector mode with byte elements.
6547 If no such mode, or if MODE already has byte elements, use VOIDmode. */
6549 if (GET_MODE_INNER (mode
) != QImode
)
6551 qimode
= mode_for_vector (QImode
, w
);
6552 if (!VECTOR_MODE_P (qimode
))
6556 /* If the input is a constant, expand it specially. */
6557 gcc_assert (GET_MODE_CLASS (GET_MODE (sel
)) == MODE_VECTOR_INT
);
6558 if (GET_CODE (sel
) == CONST_VECTOR
)
6560 icode
= direct_optab_handler (vec_perm_const_optab
, mode
);
6561 if (icode
!= CODE_FOR_nothing
)
6563 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6568 /* Fall back to a constant byte-based permutation. */
6569 if (qimode
!= VOIDmode
)
6571 vec
= rtvec_alloc (w
);
6572 for (i
= 0; i
< e
; ++i
)
6574 unsigned int j
, this_e
;
6576 this_e
= INTVAL (CONST_VECTOR_ELT (sel
, i
));
6577 this_e
&= 2 * e
- 1;
6580 for (j
= 0; j
< u
; ++j
)
6581 RTVEC_ELT (vec
, i
* u
+ j
) = GEN_INT (this_e
+ j
);
6583 sel_qi
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6585 icode
= direct_optab_handler (vec_perm_const_optab
, qimode
);
6586 if (icode
!= CODE_FOR_nothing
)
6588 tmp
= expand_vec_perm_1 (icode
, gen_lowpart (qimode
, target
),
6589 gen_lowpart (qimode
, v0
),
6590 gen_lowpart (qimode
, v1
), sel_qi
);
6592 return gen_lowpart (mode
, tmp
);
6597 /* Otherwise expand as a fully variable permuation. */
6598 icode
= direct_optab_handler (vec_perm_optab
, mode
);
6599 if (icode
!= CODE_FOR_nothing
)
6601 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6606 /* As a special case to aid several targets, lower the element-based
6607 permutation to a byte-based permutation and try again. */
6608 if (qimode
== VOIDmode
)
6610 icode
= direct_optab_handler (vec_perm_optab
, qimode
);
6611 if (icode
== CODE_FOR_nothing
)
6616 /* Multiply each element by its byte size. */
6617 enum machine_mode selmode
= GET_MODE (sel
);
6619 sel
= expand_simple_binop (selmode
, PLUS
, sel
, sel
,
6620 sel
, 0, OPTAB_DIRECT
);
6622 sel
= expand_simple_binop (selmode
, ASHIFT
, sel
,
6623 GEN_INT (exact_log2 (u
)),
6624 sel
, 0, OPTAB_DIRECT
);
6625 gcc_assert (sel
!= NULL
);
6627 /* Broadcast the low byte each element into each of its bytes. */
6628 vec
= rtvec_alloc (w
);
6629 for (i
= 0; i
< w
; ++i
)
6631 int this_e
= i
/ u
* u
;
6632 if (BYTES_BIG_ENDIAN
)
6634 RTVEC_ELT (vec
, i
) = GEN_INT (this_e
);
6636 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6637 sel
= gen_lowpart (qimode
, sel
);
6638 sel
= expand_vec_perm (qimode
, sel
, sel
, tmp
, NULL
);
6639 gcc_assert (sel
!= NULL
);
6641 /* Add the byte offset to each byte element. */
6642 /* Note that the definition of the indicies here is memory ordering,
6643 so there should be no difference between big and little endian. */
6644 vec
= rtvec_alloc (w
);
6645 for (i
= 0; i
< w
; ++i
)
6646 RTVEC_ELT (vec
, i
) = GEN_INT (i
% u
);
6647 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6648 sel_qi
= expand_simple_binop (qimode
, PLUS
, sel
, tmp
,
6649 sel
, 0, OPTAB_DIRECT
);
6650 gcc_assert (sel_qi
!= NULL
);
6653 tmp
= expand_vec_perm_1 (icode
, gen_lowpart (qimode
, target
),
6654 gen_lowpart (qimode
, v0
),
6655 gen_lowpart (qimode
, v1
), sel_qi
);
6657 tmp
= gen_lowpart (mode
, tmp
);
6661 /* Return insn code for a conditional operator with a comparison in
6662 mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
6664 static inline enum insn_code
6665 get_vcond_icode (enum machine_mode vmode
, enum machine_mode cmode
, bool uns
)
6667 enum insn_code icode
= CODE_FOR_nothing
;
6669 icode
= convert_optab_handler (vcondu_optab
, vmode
, cmode
);
6671 icode
= convert_optab_handler (vcond_optab
, vmode
, cmode
);
6675 /* Return TRUE iff, appropriate vector insns are available
6676 for vector cond expr with vector type VALUE_TYPE and a comparison
6677 with operand vector types in CMP_OP_TYPE. */
6680 expand_vec_cond_expr_p (tree value_type
, tree cmp_op_type
)
6682 enum machine_mode value_mode
= TYPE_MODE (value_type
);
6683 enum machine_mode cmp_op_mode
= TYPE_MODE (cmp_op_type
);
6684 if (GET_MODE_SIZE (value_mode
) != GET_MODE_SIZE (cmp_op_mode
)
6685 || GET_MODE_NUNITS (value_mode
) != GET_MODE_NUNITS (cmp_op_mode
)
6686 || get_vcond_icode (TYPE_MODE (value_type
), TYPE_MODE (cmp_op_type
),
6687 TYPE_UNSIGNED (cmp_op_type
)) == CODE_FOR_nothing
)
6692 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
6696 expand_vec_cond_expr (tree vec_cond_type
, tree op0
, tree op1
, tree op2
,
6699 struct expand_operand ops
[6];
6700 enum insn_code icode
;
6701 rtx comparison
, rtx_op1
, rtx_op2
;
6702 enum machine_mode mode
= TYPE_MODE (vec_cond_type
);
6703 enum machine_mode cmp_op_mode
;
6706 enum tree_code tcode
;
6708 if (COMPARISON_CLASS_P (op0
))
6710 op0a
= TREE_OPERAND (op0
, 0);
6711 op0b
= TREE_OPERAND (op0
, 1);
6712 tcode
= TREE_CODE (op0
);
6717 gcc_assert (!TYPE_UNSIGNED (TREE_TYPE (op0
)));
6719 op0b
= build_zero_cst (TREE_TYPE (op0
));
6722 unsignedp
= TYPE_UNSIGNED (TREE_TYPE (op0a
));
6723 cmp_op_mode
= TYPE_MODE (TREE_TYPE (op0a
));
6726 gcc_assert (GET_MODE_SIZE (mode
) == GET_MODE_SIZE (cmp_op_mode
)
6727 && GET_MODE_NUNITS (mode
) == GET_MODE_NUNITS (cmp_op_mode
));
6729 icode
= get_vcond_icode (mode
, cmp_op_mode
, unsignedp
);
6730 if (icode
== CODE_FOR_nothing
)
6733 comparison
= vector_compare_rtx (tcode
, op0a
, op0b
, unsignedp
, icode
);
6734 rtx_op1
= expand_normal (op1
);
6735 rtx_op2
= expand_normal (op2
);
6737 create_output_operand (&ops
[0], target
, mode
);
6738 create_input_operand (&ops
[1], rtx_op1
, mode
);
6739 create_input_operand (&ops
[2], rtx_op2
, mode
);
6740 create_fixed_operand (&ops
[3], comparison
);
6741 create_fixed_operand (&ops
[4], XEXP (comparison
, 0));
6742 create_fixed_operand (&ops
[5], XEXP (comparison
, 1));
6743 expand_insn (icode
, 6, ops
);
6744 return ops
[0].value
;
6747 /* Return non-zero if a highpart multiply is supported of can be synthisized.
6748 For the benefit of expand_mult_highpart, the return value is 1 for direct,
6749 2 for even/odd widening, and 3 for hi/lo widening. */
6752 can_mult_highpart_p (enum machine_mode mode
, bool uns_p
)
6758 op
= uns_p
? umul_highpart_optab
: smul_highpart_optab
;
6759 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6762 /* If the mode is an integral vector, synth from widening operations. */
6763 if (GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
)
6766 nunits
= GET_MODE_NUNITS (mode
);
6767 sel
= XALLOCAVEC (unsigned char, nunits
);
6769 op
= uns_p
? vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
6770 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6772 op
= uns_p
? vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
6773 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6775 for (i
= 0; i
< nunits
; ++i
)
6776 sel
[i
] = !BYTES_BIG_ENDIAN
+ (i
& ~1) + ((i
& 1) ? nunits
: 0);
6777 if (can_vec_perm_p (mode
, false, sel
))
6782 op
= uns_p
? vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
6783 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6785 op
= uns_p
? vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
6786 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6788 for (i
= 0; i
< nunits
; ++i
)
6789 sel
[i
] = 2 * i
+ (BYTES_BIG_ENDIAN
? 0 : 1);
6790 if (can_vec_perm_p (mode
, false, sel
))
6798 /* Expand a highpart multiply. */
6801 expand_mult_highpart (enum machine_mode mode
, rtx op0
, rtx op1
,
6802 rtx target
, bool uns_p
)
6804 struct expand_operand eops
[3];
6805 enum insn_code icode
;
6806 int method
, i
, nunits
;
6807 enum machine_mode wmode
;
6812 method
= can_mult_highpart_p (mode
, uns_p
);
6818 tab1
= uns_p
? umul_highpart_optab
: smul_highpart_optab
;
6819 return expand_binop (mode
, tab1
, op0
, op1
, target
, uns_p
,
6822 tab1
= uns_p
? vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
6823 tab2
= uns_p
? vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
6826 tab1
= uns_p
? vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
6827 tab2
= uns_p
? vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
6828 if (BYTES_BIG_ENDIAN
)
6839 icode
= optab_handler (tab1
, mode
);
6840 nunits
= GET_MODE_NUNITS (mode
);
6841 wmode
= insn_data
[icode
].operand
[0].mode
;
6842 gcc_checking_assert (2 * GET_MODE_NUNITS (wmode
) == nunits
);
6843 gcc_checking_assert (GET_MODE_SIZE (wmode
) == GET_MODE_SIZE (mode
));
6845 create_output_operand (&eops
[0], gen_reg_rtx (wmode
), wmode
);
6846 create_input_operand (&eops
[1], op0
, mode
);
6847 create_input_operand (&eops
[2], op1
, mode
);
6848 expand_insn (icode
, 3, eops
);
6849 m1
= gen_lowpart (mode
, eops
[0].value
);
6851 create_output_operand (&eops
[0], gen_reg_rtx (wmode
), wmode
);
6852 create_input_operand (&eops
[1], op0
, mode
);
6853 create_input_operand (&eops
[2], op1
, mode
);
6854 expand_insn (optab_handler (tab2
, mode
), 3, eops
);
6855 m2
= gen_lowpart (mode
, eops
[0].value
);
6857 v
= rtvec_alloc (nunits
);
6860 for (i
= 0; i
< nunits
; ++i
)
6861 RTVEC_ELT (v
, i
) = GEN_INT (!BYTES_BIG_ENDIAN
+ (i
& ~1)
6862 + ((i
& 1) ? nunits
: 0));
6866 for (i
= 0; i
< nunits
; ++i
)
6867 RTVEC_ELT (v
, i
) = GEN_INT (2 * i
+ (BYTES_BIG_ENDIAN
? 0 : 1));
6869 perm
= gen_rtx_CONST_VECTOR (mode
, v
);
6871 return expand_vec_perm (mode
, m1
, m2
, perm
, target
);
6874 /* Return true if there is a compare_and_swap pattern. */
6877 can_compare_and_swap_p (enum machine_mode mode
, bool allow_libcall
)
6879 enum insn_code icode
;
6881 /* Check for __atomic_compare_and_swap. */
6882 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
6883 if (icode
!= CODE_FOR_nothing
)
6886 /* Check for __sync_compare_and_swap. */
6887 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
6888 if (icode
!= CODE_FOR_nothing
)
6890 if (allow_libcall
&& optab_libfunc (sync_compare_and_swap_optab
, mode
))
6893 /* No inline compare and swap. */
6897 /* Return true if an atomic exchange can be performed. */
6900 can_atomic_exchange_p (enum machine_mode mode
, bool allow_libcall
)
6902 enum insn_code icode
;
6904 /* Check for __atomic_exchange. */
6905 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
6906 if (icode
!= CODE_FOR_nothing
)
6909 /* Don't check __sync_test_and_set, as on some platforms that
6910 has reduced functionality. Targets that really do support
6911 a proper exchange should simply be updated to the __atomics. */
6913 return can_compare_and_swap_p (mode
, allow_libcall
);
6917 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
6921 find_cc_set (rtx x
, const_rtx pat
, void *data
)
6923 if (REG_P (x
) && GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
6924 && GET_CODE (pat
) == SET
)
6926 rtx
*p_cc_reg
= (rtx
*) data
;
6927 gcc_assert (!*p_cc_reg
);
6932 /* This is a helper function for the other atomic operations. This function
6933 emits a loop that contains SEQ that iterates until a compare-and-swap
6934 operation at the end succeeds. MEM is the memory to be modified. SEQ is
6935 a set of instructions that takes a value from OLD_REG as an input and
6936 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
6937 set to the current contents of MEM. After SEQ, a compare-and-swap will
6938 attempt to update MEM with NEW_REG. The function returns true when the
6939 loop was generated successfully. */
6942 expand_compare_and_swap_loop (rtx mem
, rtx old_reg
, rtx new_reg
, rtx seq
)
6944 enum machine_mode mode
= GET_MODE (mem
);
6945 rtx label
, cmp_reg
, success
, oldval
;
6947 /* The loop we want to generate looks like
6953 (success, cmp_reg) = compare-and-swap(mem, old_reg, new_reg)
6957 Note that we only do the plain load from memory once. Subsequent
6958 iterations use the value loaded by the compare-and-swap pattern. */
6960 label
= gen_label_rtx ();
6961 cmp_reg
= gen_reg_rtx (mode
);
6963 emit_move_insn (cmp_reg
, mem
);
6965 emit_move_insn (old_reg
, cmp_reg
);
6971 if (!expand_atomic_compare_and_swap (&success
, &oldval
, mem
, old_reg
,
6972 new_reg
, false, MEMMODEL_SEQ_CST
,
6976 if (oldval
!= cmp_reg
)
6977 emit_move_insn (cmp_reg
, oldval
);
6979 /* Mark this jump predicted not taken. */
6980 emit_cmp_and_jump_insns (success
, const0_rtx
, EQ
, const0_rtx
,
6981 GET_MODE (success
), 1, label
, 0);
6986 /* This function tries to emit an atomic_exchange intruction. VAL is written
6987 to *MEM using memory model MODEL. The previous contents of *MEM are returned,
6988 using TARGET if possible. */
6991 maybe_emit_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
6993 enum machine_mode mode
= GET_MODE (mem
);
6994 enum insn_code icode
;
6996 /* If the target supports the exchange directly, great. */
6997 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
6998 if (icode
!= CODE_FOR_nothing
)
7000 struct expand_operand ops
[4];
7002 create_output_operand (&ops
[0], target
, mode
);
7003 create_fixed_operand (&ops
[1], mem
);
7004 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7005 create_convert_operand_to (&ops
[2], val
, mode
, true);
7006 create_integer_operand (&ops
[3], model
);
7007 if (maybe_expand_insn (icode
, 4, ops
))
7008 return ops
[0].value
;
7014 /* This function tries to implement an atomic exchange operation using
7015 __sync_lock_test_and_set. VAL is written to *MEM using memory model MODEL.
7016 The previous contents of *MEM are returned, using TARGET if possible.
7017 Since this instructionn is an acquire barrier only, stronger memory
7018 models may require additional barriers to be emitted. */
7021 maybe_emit_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
,
7022 enum memmodel model
)
7024 enum machine_mode mode
= GET_MODE (mem
);
7025 enum insn_code icode
;
7026 rtx last_insn
= get_last_insn ();
7028 icode
= optab_handler (sync_lock_test_and_set_optab
, mode
);
7030 /* Legacy sync_lock_test_and_set is an acquire barrier. If the pattern
7031 exists, and the memory model is stronger than acquire, add a release
7032 barrier before the instruction. */
7034 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
7035 || (model
& MEMMODEL_MASK
) == MEMMODEL_RELEASE
7036 || (model
& MEMMODEL_MASK
) == MEMMODEL_ACQ_REL
)
7037 expand_mem_thread_fence (model
);
7039 if (icode
!= CODE_FOR_nothing
)
7041 struct expand_operand ops
[3];
7042 create_output_operand (&ops
[0], target
, mode
);
7043 create_fixed_operand (&ops
[1], mem
);
7044 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7045 create_convert_operand_to (&ops
[2], val
, mode
, true);
7046 if (maybe_expand_insn (icode
, 3, ops
))
7047 return ops
[0].value
;
7050 /* If an external test-and-set libcall is provided, use that instead of
7051 any external compare-and-swap that we might get from the compare-and-
7052 swap-loop expansion later. */
7053 if (!can_compare_and_swap_p (mode
, false))
7055 rtx libfunc
= optab_libfunc (sync_lock_test_and_set_optab
, mode
);
7056 if (libfunc
!= NULL
)
7060 addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7061 return emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7062 mode
, 2, addr
, ptr_mode
,
7067 /* If the test_and_set can't be emitted, eliminate any barrier that might
7068 have been emitted. */
7069 delete_insns_since (last_insn
);
7073 /* This function tries to implement an atomic exchange operation using a
7074 compare_and_swap loop. VAL is written to *MEM. The previous contents of
7075 *MEM are returned, using TARGET if possible. No memory model is required
7076 since a compare_and_swap loop is seq-cst. */
7079 maybe_emit_compare_and_swap_exchange_loop (rtx target
, rtx mem
, rtx val
)
7081 enum machine_mode mode
= GET_MODE (mem
);
7083 if (can_compare_and_swap_p (mode
, true))
7085 if (!target
|| !register_operand (target
, mode
))
7086 target
= gen_reg_rtx (mode
);
7087 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7088 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7089 if (expand_compare_and_swap_loop (mem
, target
, val
, NULL_RTX
))
7096 /* This function tries to implement an atomic test-and-set operation
7097 using the atomic_test_and_set instruction pattern. A boolean value
7098 is returned from the operation, using TARGET if possible. */
7100 #ifndef HAVE_atomic_test_and_set
7101 #define HAVE_atomic_test_and_set 0
7102 #define CODE_FOR_atomic_test_and_set CODE_FOR_nothing
7106 maybe_emit_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7108 enum machine_mode pat_bool_mode
;
7109 struct expand_operand ops
[3];
7111 if (!HAVE_atomic_test_and_set
)
7114 /* While we always get QImode from __atomic_test_and_set, we get
7115 other memory modes from __sync_lock_test_and_set. Note that we
7116 use no endian adjustment here. This matches the 4.6 behavior
7117 in the Sparc backend. */
7119 (insn_data
[CODE_FOR_atomic_test_and_set
].operand
[1].mode
== QImode
);
7120 if (GET_MODE (mem
) != QImode
)
7121 mem
= adjust_address_nv (mem
, QImode
, 0);
7123 pat_bool_mode
= insn_data
[CODE_FOR_atomic_test_and_set
].operand
[0].mode
;
7124 create_output_operand (&ops
[0], target
, pat_bool_mode
);
7125 create_fixed_operand (&ops
[1], mem
);
7126 create_integer_operand (&ops
[2], model
);
7128 if (maybe_expand_insn (CODE_FOR_atomic_test_and_set
, 3, ops
))
7129 return ops
[0].value
;
7133 /* This function expands the legacy _sync_lock test_and_set operation which is
7134 generally an atomic exchange. Some limited targets only allow the
7135 constant 1 to be stored. This is an ACQUIRE operation.
7137 TARGET is an optional place to stick the return value.
7138 MEM is where VAL is stored. */
7141 expand_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
)
7145 /* Try an atomic_exchange first. */
7146 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7150 ret
= maybe_emit_sync_lock_test_and_set (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7154 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7158 /* If there are no other options, try atomic_test_and_set if the value
7159 being stored is 1. */
7160 if (val
== const1_rtx
)
7161 ret
= maybe_emit_atomic_test_and_set (target
, mem
, MEMMODEL_ACQUIRE
);
7166 /* This function expands the atomic test_and_set operation:
7167 atomically store a boolean TRUE into MEM and return the previous value.
7169 MEMMODEL is the memory model variant to use.
7170 TARGET is an optional place to stick the return value. */
7173 expand_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7175 enum machine_mode mode
= GET_MODE (mem
);
7176 rtx ret
, trueval
, subtarget
;
7178 ret
= maybe_emit_atomic_test_and_set (target
, mem
, model
);
7182 /* Be binary compatible with non-default settings of trueval, and different
7183 cpu revisions. E.g. one revision may have atomic-test-and-set, but
7184 another only has atomic-exchange. */
7185 if (targetm
.atomic_test_and_set_trueval
== 1)
7187 trueval
= const1_rtx
;
7188 subtarget
= target
? target
: gen_reg_rtx (mode
);
7192 trueval
= gen_int_mode (targetm
.atomic_test_and_set_trueval
, mode
);
7193 subtarget
= gen_reg_rtx (mode
);
7196 /* Try the atomic-exchange optab... */
7197 ret
= maybe_emit_atomic_exchange (subtarget
, mem
, trueval
, model
);
7199 /* ... then an atomic-compare-and-swap loop ... */
7201 ret
= maybe_emit_compare_and_swap_exchange_loop (subtarget
, mem
, trueval
);
7203 /* ... before trying the vaguely defined legacy lock_test_and_set. */
7205 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, trueval
, model
);
7207 /* Recall that the legacy lock_test_and_set optab was allowed to do magic
7208 things with the value 1. Thus we try again without trueval. */
7209 if (!ret
&& targetm
.atomic_test_and_set_trueval
!= 1)
7210 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, const1_rtx
, model
);
7212 /* Failing all else, assume a single threaded environment and simply
7213 perform the operation. */
7216 emit_move_insn (subtarget
, mem
);
7217 emit_move_insn (mem
, trueval
);
7221 /* Recall that have to return a boolean value; rectify if trueval
7222 is not exactly one. */
7223 if (targetm
.atomic_test_and_set_trueval
!= 1)
7224 ret
= emit_store_flag_force (target
, NE
, ret
, const0_rtx
, mode
, 0, 1);
7229 /* This function expands the atomic exchange operation:
7230 atomically store VAL in MEM and return the previous value in MEM.
7232 MEMMODEL is the memory model variant to use.
7233 TARGET is an optional place to stick the return value. */
7236 expand_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7240 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7242 /* Next try a compare-and-swap loop for the exchange. */
7244 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7249 /* This function expands the atomic compare exchange operation:
7251 *PTARGET_BOOL is an optional place to store the boolean success/failure.
7252 *PTARGET_OVAL is an optional place to store the old value from memory.
7253 Both target parameters may be NULL to indicate that we do not care about
7254 that return value. Both target parameters are updated on success to
7255 the actual location of the corresponding result.
7257 MEMMODEL is the memory model variant to use.
7259 The return value of the function is true for success. */
7262 expand_atomic_compare_and_swap (rtx
*ptarget_bool
, rtx
*ptarget_oval
,
7263 rtx mem
, rtx expected
, rtx desired
,
7264 bool is_weak
, enum memmodel succ_model
,
7265 enum memmodel fail_model
)
7267 enum machine_mode mode
= GET_MODE (mem
);
7268 struct expand_operand ops
[8];
7269 enum insn_code icode
;
7270 rtx target_oval
, target_bool
= NULL_RTX
;
7273 /* Load expected into a register for the compare and swap. */
7274 if (MEM_P (expected
))
7275 expected
= copy_to_reg (expected
);
7277 /* Make sure we always have some place to put the return oldval.
7278 Further, make sure that place is distinct from the input expected,
7279 just in case we need that path down below. */
7280 if (ptarget_oval
== NULL
7281 || (target_oval
= *ptarget_oval
) == NULL
7282 || reg_overlap_mentioned_p (expected
, target_oval
))
7283 target_oval
= gen_reg_rtx (mode
);
7285 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7286 if (icode
!= CODE_FOR_nothing
)
7288 enum machine_mode bool_mode
= insn_data
[icode
].operand
[0].mode
;
7290 /* Make sure we always have a place for the bool operand. */
7291 if (ptarget_bool
== NULL
7292 || (target_bool
= *ptarget_bool
) == NULL
7293 || GET_MODE (target_bool
) != bool_mode
)
7294 target_bool
= gen_reg_rtx (bool_mode
);
7296 /* Emit the compare_and_swap. */
7297 create_output_operand (&ops
[0], target_bool
, bool_mode
);
7298 create_output_operand (&ops
[1], target_oval
, mode
);
7299 create_fixed_operand (&ops
[2], mem
);
7300 create_convert_operand_to (&ops
[3], expected
, mode
, true);
7301 create_convert_operand_to (&ops
[4], desired
, mode
, true);
7302 create_integer_operand (&ops
[5], is_weak
);
7303 create_integer_operand (&ops
[6], succ_model
);
7304 create_integer_operand (&ops
[7], fail_model
);
7305 expand_insn (icode
, 8, ops
);
7307 /* Return success/failure. */
7308 target_bool
= ops
[0].value
;
7309 target_oval
= ops
[1].value
;
7313 /* Otherwise fall back to the original __sync_val_compare_and_swap
7314 which is always seq-cst. */
7315 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7316 if (icode
!= CODE_FOR_nothing
)
7320 create_output_operand (&ops
[0], target_oval
, mode
);
7321 create_fixed_operand (&ops
[1], mem
);
7322 create_convert_operand_to (&ops
[2], expected
, mode
, true);
7323 create_convert_operand_to (&ops
[3], desired
, mode
, true);
7324 if (!maybe_expand_insn (icode
, 4, ops
))
7327 target_oval
= ops
[0].value
;
7329 /* If the caller isn't interested in the boolean return value,
7330 skip the computation of it. */
7331 if (ptarget_bool
== NULL
)
7334 /* Otherwise, work out if the compare-and-swap succeeded. */
7336 if (have_insn_for (COMPARE
, CCmode
))
7337 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
7340 target_bool
= emit_store_flag_force (target_bool
, EQ
, cc_reg
,
7341 const0_rtx
, VOIDmode
, 0, 1);
7344 goto success_bool_from_val
;
7347 /* Also check for library support for __sync_val_compare_and_swap. */
7348 libfunc
= optab_libfunc (sync_compare_and_swap_optab
, mode
);
7349 if (libfunc
!= NULL
)
7351 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7352 target_oval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7353 mode
, 3, addr
, ptr_mode
,
7354 expected
, mode
, desired
, mode
);
7356 /* Compute the boolean return value only if requested. */
7358 goto success_bool_from_val
;
7366 success_bool_from_val
:
7367 target_bool
= emit_store_flag_force (target_bool
, EQ
, target_oval
,
7368 expected
, VOIDmode
, 1, 1);
7370 /* Make sure that the oval output winds up where the caller asked. */
7372 *ptarget_oval
= target_oval
;
7374 *ptarget_bool
= target_bool
;
7378 /* Generate asm volatile("" : : : "memory") as the memory barrier. */
7381 expand_asm_memory_barrier (void)
7385 asm_op
= gen_rtx_ASM_OPERANDS (VOIDmode
, empty_string
, empty_string
, 0,
7386 rtvec_alloc (0), rtvec_alloc (0),
7387 rtvec_alloc (0), UNKNOWN_LOCATION
);
7388 MEM_VOLATILE_P (asm_op
) = 1;
7390 clob
= gen_rtx_SCRATCH (VOIDmode
);
7391 clob
= gen_rtx_MEM (BLKmode
, clob
);
7392 clob
= gen_rtx_CLOBBER (VOIDmode
, clob
);
7394 emit_insn (gen_rtx_PARALLEL (VOIDmode
, gen_rtvec (2, asm_op
, clob
)));
7397 /* This routine will either emit the mem_thread_fence pattern or issue a
7398 sync_synchronize to generate a fence for memory model MEMMODEL. */
7400 #ifndef HAVE_mem_thread_fence
7401 # define HAVE_mem_thread_fence 0
7402 # define gen_mem_thread_fence(x) (gcc_unreachable (), NULL_RTX)
7404 #ifndef HAVE_memory_barrier
7405 # define HAVE_memory_barrier 0
7406 # define gen_memory_barrier() (gcc_unreachable (), NULL_RTX)
7410 expand_mem_thread_fence (enum memmodel model
)
7412 if (HAVE_mem_thread_fence
)
7413 emit_insn (gen_mem_thread_fence (GEN_INT (model
)));
7414 else if ((model
& MEMMODEL_MASK
) != MEMMODEL_RELAXED
)
7416 if (HAVE_memory_barrier
)
7417 emit_insn (gen_memory_barrier ());
7418 else if (synchronize_libfunc
!= NULL_RTX
)
7419 emit_library_call (synchronize_libfunc
, LCT_NORMAL
, VOIDmode
, 0);
7421 expand_asm_memory_barrier ();
7425 /* This routine will either emit the mem_signal_fence pattern or issue a
7426 sync_synchronize to generate a fence for memory model MEMMODEL. */
7428 #ifndef HAVE_mem_signal_fence
7429 # define HAVE_mem_signal_fence 0
7430 # define gen_mem_signal_fence(x) (gcc_unreachable (), NULL_RTX)
7434 expand_mem_signal_fence (enum memmodel model
)
7436 if (HAVE_mem_signal_fence
)
7437 emit_insn (gen_mem_signal_fence (GEN_INT (model
)));
7438 else if ((model
& MEMMODEL_MASK
) != MEMMODEL_RELAXED
)
7440 /* By default targets are coherent between a thread and the signal
7441 handler running on the same thread. Thus this really becomes a
7442 compiler barrier, in that stores must not be sunk past
7443 (or raised above) a given point. */
7444 expand_asm_memory_barrier ();
7448 /* This function expands the atomic load operation:
7449 return the atomically loaded value in MEM.
7451 MEMMODEL is the memory model variant to use.
7452 TARGET is an option place to stick the return value. */
7455 expand_atomic_load (rtx target
, rtx mem
, enum memmodel model
)
7457 enum machine_mode mode
= GET_MODE (mem
);
7458 enum insn_code icode
;
7460 /* If the target supports the load directly, great. */
7461 icode
= direct_optab_handler (atomic_load_optab
, mode
);
7462 if (icode
!= CODE_FOR_nothing
)
7464 struct expand_operand ops
[3];
7466 create_output_operand (&ops
[0], target
, mode
);
7467 create_fixed_operand (&ops
[1], mem
);
7468 create_integer_operand (&ops
[2], model
);
7469 if (maybe_expand_insn (icode
, 3, ops
))
7470 return ops
[0].value
;
7473 /* If the size of the object is greater than word size on this target,
7474 then we assume that a load will not be atomic. */
7475 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7477 /* Issue val = compare_and_swap (mem, 0, 0).
7478 This may cause the occasional harmless store of 0 when the value is
7479 already 0, but it seems to be OK according to the standards guys. */
7480 if (expand_atomic_compare_and_swap (NULL
, &target
, mem
, const0_rtx
,
7481 const0_rtx
, false, model
, model
))
7484 /* Otherwise there is no atomic load, leave the library call. */
7488 /* Otherwise assume loads are atomic, and emit the proper barriers. */
7489 if (!target
|| target
== const0_rtx
)
7490 target
= gen_reg_rtx (mode
);
7492 /* For SEQ_CST, emit a barrier before the load. */
7493 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7494 expand_mem_thread_fence (model
);
7496 emit_move_insn (target
, mem
);
7498 /* Emit the appropriate barrier after the load. */
7499 expand_mem_thread_fence (model
);
7504 /* This function expands the atomic store operation:
7505 Atomically store VAL in MEM.
7506 MEMMODEL is the memory model variant to use.
7507 USE_RELEASE is true if __sync_lock_release can be used as a fall back.
7508 function returns const0_rtx if a pattern was emitted. */
7511 expand_atomic_store (rtx mem
, rtx val
, enum memmodel model
, bool use_release
)
7513 enum machine_mode mode
= GET_MODE (mem
);
7514 enum insn_code icode
;
7515 struct expand_operand ops
[3];
7517 /* If the target supports the store directly, great. */
7518 icode
= direct_optab_handler (atomic_store_optab
, mode
);
7519 if (icode
!= CODE_FOR_nothing
)
7521 create_fixed_operand (&ops
[0], mem
);
7522 create_input_operand (&ops
[1], val
, mode
);
7523 create_integer_operand (&ops
[2], model
);
7524 if (maybe_expand_insn (icode
, 3, ops
))
7528 /* If using __sync_lock_release is a viable alternative, try it. */
7531 icode
= direct_optab_handler (sync_lock_release_optab
, mode
);
7532 if (icode
!= CODE_FOR_nothing
)
7534 create_fixed_operand (&ops
[0], mem
);
7535 create_input_operand (&ops
[1], const0_rtx
, mode
);
7536 if (maybe_expand_insn (icode
, 2, ops
))
7538 /* lock_release is only a release barrier. */
7539 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7540 expand_mem_thread_fence (model
);
7546 /* If the size of the object is greater than word size on this target,
7547 a default store will not be atomic, Try a mem_exchange and throw away
7548 the result. If that doesn't work, don't do anything. */
7549 if (GET_MODE_PRECISION(mode
) > BITS_PER_WORD
)
7551 rtx target
= maybe_emit_atomic_exchange (NULL_RTX
, mem
, val
, model
);
7553 target
= maybe_emit_compare_and_swap_exchange_loop (NULL_RTX
, mem
, val
);
7560 /* Otherwise assume stores are atomic, and emit the proper barriers. */
7561 expand_mem_thread_fence (model
);
7563 emit_move_insn (mem
, val
);
7565 /* For SEQ_CST, also emit a barrier after the store. */
7566 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7567 expand_mem_thread_fence (model
);
7573 /* Structure containing the pointers and values required to process the
7574 various forms of the atomic_fetch_op and atomic_op_fetch builtins. */
7576 struct atomic_op_functions
7578 direct_optab mem_fetch_before
;
7579 direct_optab mem_fetch_after
;
7580 direct_optab mem_no_result
;
7583 direct_optab no_result
;
7584 enum rtx_code reverse_code
;
7588 /* Fill in structure pointed to by OP with the various optab entries for an
7589 operation of type CODE. */
7592 get_atomic_op_for_code (struct atomic_op_functions
*op
, enum rtx_code code
)
7594 gcc_assert (op
!= NULL
);
7596 /* If SWITCHABLE_TARGET is defined, then subtargets can be switched
7597 in the source code during compilation, and the optab entries are not
7598 computable until runtime. Fill in the values at runtime. */
7602 op
->mem_fetch_before
= atomic_fetch_add_optab
;
7603 op
->mem_fetch_after
= atomic_add_fetch_optab
;
7604 op
->mem_no_result
= atomic_add_optab
;
7605 op
->fetch_before
= sync_old_add_optab
;
7606 op
->fetch_after
= sync_new_add_optab
;
7607 op
->no_result
= sync_add_optab
;
7608 op
->reverse_code
= MINUS
;
7611 op
->mem_fetch_before
= atomic_fetch_sub_optab
;
7612 op
->mem_fetch_after
= atomic_sub_fetch_optab
;
7613 op
->mem_no_result
= atomic_sub_optab
;
7614 op
->fetch_before
= sync_old_sub_optab
;
7615 op
->fetch_after
= sync_new_sub_optab
;
7616 op
->no_result
= sync_sub_optab
;
7617 op
->reverse_code
= PLUS
;
7620 op
->mem_fetch_before
= atomic_fetch_xor_optab
;
7621 op
->mem_fetch_after
= atomic_xor_fetch_optab
;
7622 op
->mem_no_result
= atomic_xor_optab
;
7623 op
->fetch_before
= sync_old_xor_optab
;
7624 op
->fetch_after
= sync_new_xor_optab
;
7625 op
->no_result
= sync_xor_optab
;
7626 op
->reverse_code
= XOR
;
7629 op
->mem_fetch_before
= atomic_fetch_and_optab
;
7630 op
->mem_fetch_after
= atomic_and_fetch_optab
;
7631 op
->mem_no_result
= atomic_and_optab
;
7632 op
->fetch_before
= sync_old_and_optab
;
7633 op
->fetch_after
= sync_new_and_optab
;
7634 op
->no_result
= sync_and_optab
;
7635 op
->reverse_code
= UNKNOWN
;
7638 op
->mem_fetch_before
= atomic_fetch_or_optab
;
7639 op
->mem_fetch_after
= atomic_or_fetch_optab
;
7640 op
->mem_no_result
= atomic_or_optab
;
7641 op
->fetch_before
= sync_old_ior_optab
;
7642 op
->fetch_after
= sync_new_ior_optab
;
7643 op
->no_result
= sync_ior_optab
;
7644 op
->reverse_code
= UNKNOWN
;
7647 op
->mem_fetch_before
= atomic_fetch_nand_optab
;
7648 op
->mem_fetch_after
= atomic_nand_fetch_optab
;
7649 op
->mem_no_result
= atomic_nand_optab
;
7650 op
->fetch_before
= sync_old_nand_optab
;
7651 op
->fetch_after
= sync_new_nand_optab
;
7652 op
->no_result
= sync_nand_optab
;
7653 op
->reverse_code
= UNKNOWN
;
7660 /* See if there is a more optimal way to implement the operation "*MEM CODE VAL"
7661 using memory order MODEL. If AFTER is true the operation needs to return
7662 the value of *MEM after the operation, otherwise the previous value.
7663 TARGET is an optional place to place the result. The result is unused if
7665 Return the result if there is a better sequence, otherwise NULL_RTX. */
7668 maybe_optimize_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7669 enum memmodel model
, bool after
)
7671 /* If the value is prefetched, or not used, it may be possible to replace
7672 the sequence with a native exchange operation. */
7673 if (!after
|| target
== const0_rtx
)
7675 /* fetch_and (&x, 0, m) can be replaced with exchange (&x, 0, m). */
7676 if (code
== AND
&& val
== const0_rtx
)
7678 if (target
== const0_rtx
)
7679 target
= gen_reg_rtx (GET_MODE (mem
));
7680 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7683 /* fetch_or (&x, -1, m) can be replaced with exchange (&x, -1, m). */
7684 if (code
== IOR
&& val
== constm1_rtx
)
7686 if (target
== const0_rtx
)
7687 target
= gen_reg_rtx (GET_MODE (mem
));
7688 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7695 /* Try to emit an instruction for a specific operation varaition.
7696 OPTAB contains the OP functions.
7697 TARGET is an optional place to return the result. const0_rtx means unused.
7698 MEM is the memory location to operate on.
7699 VAL is the value to use in the operation.
7700 USE_MEMMODEL is TRUE if the variation with a memory model should be tried.
7701 MODEL is the memory model, if used.
7702 AFTER is true if the returned result is the value after the operation. */
7705 maybe_emit_op (const struct atomic_op_functions
*optab
, rtx target
, rtx mem
,
7706 rtx val
, bool use_memmodel
, enum memmodel model
, bool after
)
7708 enum machine_mode mode
= GET_MODE (mem
);
7709 struct expand_operand ops
[4];
7710 enum insn_code icode
;
7714 /* Check to see if there is a result returned. */
7715 if (target
== const0_rtx
)
7719 icode
= direct_optab_handler (optab
->mem_no_result
, mode
);
7720 create_integer_operand (&ops
[2], model
);
7725 icode
= direct_optab_handler (optab
->no_result
, mode
);
7729 /* Otherwise, we need to generate a result. */
7734 icode
= direct_optab_handler (after
? optab
->mem_fetch_after
7735 : optab
->mem_fetch_before
, mode
);
7736 create_integer_operand (&ops
[3], model
);
7741 icode
= optab_handler (after
? optab
->fetch_after
7742 : optab
->fetch_before
, mode
);
7745 create_output_operand (&ops
[op_counter
++], target
, mode
);
7747 if (icode
== CODE_FOR_nothing
)
7750 create_fixed_operand (&ops
[op_counter
++], mem
);
7751 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7752 create_convert_operand_to (&ops
[op_counter
++], val
, mode
, true);
7754 if (maybe_expand_insn (icode
, num_ops
, ops
))
7755 return (target
== const0_rtx
? const0_rtx
: ops
[0].value
);
7761 /* This function expands an atomic fetch_OP or OP_fetch operation:
7762 TARGET is an option place to stick the return value. const0_rtx indicates
7763 the result is unused.
7764 atomically fetch MEM, perform the operation with VAL and return it to MEM.
7765 CODE is the operation being performed (OP)
7766 MEMMODEL is the memory model variant to use.
7767 AFTER is true to return the result of the operation (OP_fetch).
7768 AFTER is false to return the value before the operation (fetch_OP).
7770 This function will *only* generate instructions if there is a direct
7771 optab. No compare and swap loops or libcalls will be generated. */
7774 expand_atomic_fetch_op_no_fallback (rtx target
, rtx mem
, rtx val
,
7775 enum rtx_code code
, enum memmodel model
,
7778 enum machine_mode mode
= GET_MODE (mem
);
7779 struct atomic_op_functions optab
;
7781 bool unused_result
= (target
== const0_rtx
);
7783 get_atomic_op_for_code (&optab
, code
);
7785 /* Check to see if there are any better instructions. */
7786 result
= maybe_optimize_fetch_op (target
, mem
, val
, code
, model
, after
);
7790 /* Check for the case where the result isn't used and try those patterns. */
7793 /* Try the memory model variant first. */
7794 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, true);
7798 /* Next try the old style withuot a memory model. */
7799 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, true);
7803 /* There is no no-result pattern, so try patterns with a result. */
7807 /* Try the __atomic version. */
7808 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, after
);
7812 /* Try the older __sync version. */
7813 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, after
);
7817 /* If the fetch value can be calculated from the other variation of fetch,
7818 try that operation. */
7819 if (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
)
7821 /* Try the __atomic version, then the older __sync version. */
7822 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, !after
);
7824 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, !after
);
7828 /* If the result isn't used, no need to do compensation code. */
7832 /* Issue compensation code. Fetch_after == fetch_before OP val.
7833 Fetch_before == after REVERSE_OP val. */
7835 code
= optab
.reverse_code
;
7838 result
= expand_simple_binop (mode
, AND
, result
, val
, NULL_RTX
,
7839 true, OPTAB_LIB_WIDEN
);
7840 result
= expand_simple_unop (mode
, NOT
, result
, target
, true);
7843 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
7844 true, OPTAB_LIB_WIDEN
);
7849 /* No direct opcode can be generated. */
7855 /* This function expands an atomic fetch_OP or OP_fetch operation:
7856 TARGET is an option place to stick the return value. const0_rtx indicates
7857 the result is unused.
7858 atomically fetch MEM, perform the operation with VAL and return it to MEM.
7859 CODE is the operation being performed (OP)
7860 MEMMODEL is the memory model variant to use.
7861 AFTER is true to return the result of the operation (OP_fetch).
7862 AFTER is false to return the value before the operation (fetch_OP). */
7864 expand_atomic_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7865 enum memmodel model
, bool after
)
7867 enum machine_mode mode
= GET_MODE (mem
);
7869 bool unused_result
= (target
== const0_rtx
);
7871 result
= expand_atomic_fetch_op_no_fallback (target
, mem
, val
, code
, model
,
7877 /* Add/sub can be implemented by doing the reverse operation with -(val). */
7878 if (code
== PLUS
|| code
== MINUS
)
7881 enum rtx_code reverse
= (code
== PLUS
? MINUS
: PLUS
);
7884 tmp
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, true);
7885 result
= expand_atomic_fetch_op_no_fallback (target
, mem
, tmp
, reverse
,
7889 /* PLUS worked so emit the insns and return. */
7896 /* PLUS did not work, so throw away the negation code and continue. */
7900 /* Try the __sync libcalls only if we can't do compare-and-swap inline. */
7901 if (!can_compare_and_swap_p (mode
, false))
7905 enum rtx_code orig_code
= code
;
7906 struct atomic_op_functions optab
;
7908 get_atomic_op_for_code (&optab
, code
);
7909 libfunc
= optab_libfunc (after
? optab
.fetch_after
7910 : optab
.fetch_before
, mode
);
7912 && (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
))
7916 code
= optab
.reverse_code
;
7917 libfunc
= optab_libfunc (after
? optab
.fetch_before
7918 : optab
.fetch_after
, mode
);
7920 if (libfunc
!= NULL
)
7922 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7923 result
= emit_library_call_value (libfunc
, NULL
, LCT_NORMAL
, mode
,
7924 2, addr
, ptr_mode
, val
, mode
);
7926 if (!unused_result
&& fixup
)
7927 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
7928 true, OPTAB_LIB_WIDEN
);
7932 /* We need the original code for any further attempts. */
7936 /* If nothing else has succeeded, default to a compare and swap loop. */
7937 if (can_compare_and_swap_p (mode
, true))
7940 rtx t0
= gen_reg_rtx (mode
), t1
;
7944 /* If the result is used, get a register for it. */
7947 if (!target
|| !register_operand (target
, mode
))
7948 target
= gen_reg_rtx (mode
);
7949 /* If fetch_before, copy the value now. */
7951 emit_move_insn (target
, t0
);
7954 target
= const0_rtx
;
7959 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
7960 true, OPTAB_LIB_WIDEN
);
7961 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
7964 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
, true,
7967 /* For after, copy the value now. */
7968 if (!unused_result
&& after
)
7969 emit_move_insn (target
, t1
);
7970 insn
= get_insns ();
7973 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
7980 /* Return true if OPERAND is suitable for operand number OPNO of
7981 instruction ICODE. */
7984 insn_operand_matches (enum insn_code icode
, unsigned int opno
, rtx operand
)
7986 return (!insn_data
[(int) icode
].operand
[opno
].predicate
7987 || (insn_data
[(int) icode
].operand
[opno
].predicate
7988 (operand
, insn_data
[(int) icode
].operand
[opno
].mode
)));
7991 /* TARGET is a target of a multiword operation that we are going to
7992 implement as a series of word-mode operations. Return true if
7993 TARGET is suitable for this purpose. */
7996 valid_multiword_target_p (rtx target
)
7998 enum machine_mode mode
;
8001 mode
= GET_MODE (target
);
8002 for (i
= 0; i
< GET_MODE_SIZE (mode
); i
+= UNITS_PER_WORD
)
8003 if (!validate_subreg (word_mode
, mode
, target
, i
))
8008 /* Like maybe_legitimize_operand, but do not change the code of the
8009 current rtx value. */
8012 maybe_legitimize_operand_same_code (enum insn_code icode
, unsigned int opno
,
8013 struct expand_operand
*op
)
8015 /* See if the operand matches in its current form. */
8016 if (insn_operand_matches (icode
, opno
, op
->value
))
8019 /* If the operand is a memory whose address has no side effects,
8020 try forcing the address into a non-virtual pseudo register.
8021 The check for side effects is important because copy_to_mode_reg
8022 cannot handle things like auto-modified addresses. */
8023 if (insn_data
[(int) icode
].operand
[opno
].allows_mem
&& MEM_P (op
->value
))
8028 addr
= XEXP (mem
, 0);
8029 if (!(REG_P (addr
) && REGNO (addr
) > LAST_VIRTUAL_REGISTER
)
8030 && !side_effects_p (addr
))
8033 enum machine_mode mode
;
8035 last
= get_last_insn ();
8036 mode
= get_address_mode (mem
);
8037 mem
= replace_equiv_address (mem
, copy_to_mode_reg (mode
, addr
));
8038 if (insn_operand_matches (icode
, opno
, mem
))
8043 delete_insns_since (last
);
8050 /* Try to make OP match operand OPNO of instruction ICODE. Return true
8051 on success, storing the new operand value back in OP. */
8054 maybe_legitimize_operand (enum insn_code icode
, unsigned int opno
,
8055 struct expand_operand
*op
)
8057 enum machine_mode mode
, imode
;
8058 bool old_volatile_ok
, result
;
8064 old_volatile_ok
= volatile_ok
;
8066 result
= maybe_legitimize_operand_same_code (icode
, opno
, op
);
8067 volatile_ok
= old_volatile_ok
;
8071 gcc_assert (mode
!= VOIDmode
);
8073 && op
->value
!= const0_rtx
8074 && GET_MODE (op
->value
) == mode
8075 && maybe_legitimize_operand_same_code (icode
, opno
, op
))
8078 op
->value
= gen_reg_rtx (mode
);
8083 gcc_assert (mode
!= VOIDmode
);
8084 gcc_assert (GET_MODE (op
->value
) == VOIDmode
8085 || GET_MODE (op
->value
) == mode
);
8086 if (maybe_legitimize_operand_same_code (icode
, opno
, op
))
8089 op
->value
= copy_to_mode_reg (mode
, op
->value
);
8092 case EXPAND_CONVERT_TO
:
8093 gcc_assert (mode
!= VOIDmode
);
8094 op
->value
= convert_to_mode (mode
, op
->value
, op
->unsigned_p
);
8097 case EXPAND_CONVERT_FROM
:
8098 if (GET_MODE (op
->value
) != VOIDmode
)
8099 mode
= GET_MODE (op
->value
);
8101 /* The caller must tell us what mode this value has. */
8102 gcc_assert (mode
!= VOIDmode
);
8104 imode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8105 if (imode
!= VOIDmode
&& imode
!= mode
)
8107 op
->value
= convert_modes (imode
, mode
, op
->value
, op
->unsigned_p
);
8112 case EXPAND_ADDRESS
:
8113 gcc_assert (mode
!= VOIDmode
);
8114 op
->value
= convert_memory_address (mode
, op
->value
);
8117 case EXPAND_INTEGER
:
8118 mode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8119 if (mode
!= VOIDmode
&& const_int_operand (op
->value
, mode
))
8123 return insn_operand_matches (icode
, opno
, op
->value
);
8126 /* Make OP describe an input operand that should have the same value
8127 as VALUE, after any mode conversion that the target might request.
8128 TYPE is the type of VALUE. */
8131 create_convert_operand_from_type (struct expand_operand
*op
,
8132 rtx value
, tree type
)
8134 create_convert_operand_from (op
, value
, TYPE_MODE (type
),
8135 TYPE_UNSIGNED (type
));
8138 /* Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
8139 of instruction ICODE. Return true on success, leaving the new operand
8140 values in the OPS themselves. Emit no code on failure. */
8143 maybe_legitimize_operands (enum insn_code icode
, unsigned int opno
,
8144 unsigned int nops
, struct expand_operand
*ops
)
8149 last
= get_last_insn ();
8150 for (i
= 0; i
< nops
; i
++)
8151 if (!maybe_legitimize_operand (icode
, opno
+ i
, &ops
[i
]))
8153 delete_insns_since (last
);
8159 /* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
8160 as its operands. Return the instruction pattern on success,
8161 and emit any necessary set-up code. Return null and emit no
8165 maybe_gen_insn (enum insn_code icode
, unsigned int nops
,
8166 struct expand_operand
*ops
)
8168 gcc_assert (nops
== (unsigned int) insn_data
[(int) icode
].n_generator_args
);
8169 if (!maybe_legitimize_operands (icode
, 0, nops
, ops
))
8175 return GEN_FCN (icode
) (ops
[0].value
);
8177 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
);
8179 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
);
8181 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8184 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8185 ops
[3].value
, ops
[4].value
);
8187 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8188 ops
[3].value
, ops
[4].value
, ops
[5].value
);
8190 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8191 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8194 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8195 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8196 ops
[6].value
, ops
[7].value
);
8201 /* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
8202 as its operands. Return true on success and emit no code on failure. */
8205 maybe_expand_insn (enum insn_code icode
, unsigned int nops
,
8206 struct expand_operand
*ops
)
8208 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8217 /* Like maybe_expand_insn, but for jumps. */
8220 maybe_expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8221 struct expand_operand
*ops
)
8223 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8226 emit_jump_insn (pat
);
8232 /* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
8236 expand_insn (enum insn_code icode
, unsigned int nops
,
8237 struct expand_operand
*ops
)
8239 if (!maybe_expand_insn (icode
, nops
, ops
))
8243 /* Like expand_insn, but for jumps. */
8246 expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8247 struct expand_operand
*ops
)
8249 if (!maybe_expand_jump_insn (icode
, nops
, ops
))
8253 /* Reduce conditional compilation elsewhere. */
8256 #define CODE_FOR_insv CODE_FOR_nothing
8260 #define CODE_FOR_extv CODE_FOR_nothing
8263 #define HAVE_extzv 0
8264 #define CODE_FOR_extzv CODE_FOR_nothing
8267 /* Enumerates the possible types of structure operand to an
8269 enum extraction_type
{ ET_unaligned_mem
, ET_reg
};
8271 /* Check whether insv, extv or extzv pattern ICODE can be used for an
8272 insertion or extraction of type TYPE on a structure of mode MODE.
8273 Return true if so and fill in *INSN accordingly. STRUCT_OP is the
8274 operand number of the structure (the first sign_extract or zero_extract
8275 operand) and FIELD_OP is the operand number of the field (the other
8276 side of the set from the sign_extract or zero_extract). */
8279 get_traditional_extraction_insn (extraction_insn
*insn
,
8280 enum extraction_type type
,
8281 enum machine_mode mode
,
8282 enum insn_code icode
,
8283 int struct_op
, int field_op
)
8285 const struct insn_data_d
*data
= &insn_data
[icode
];
8287 enum machine_mode struct_mode
= data
->operand
[struct_op
].mode
;
8288 if (struct_mode
== VOIDmode
)
8289 struct_mode
= word_mode
;
8290 if (mode
!= struct_mode
)
8293 enum machine_mode field_mode
= data
->operand
[field_op
].mode
;
8294 if (field_mode
== VOIDmode
)
8295 field_mode
= word_mode
;
8297 enum machine_mode pos_mode
= data
->operand
[struct_op
+ 2].mode
;
8298 if (pos_mode
== VOIDmode
)
8299 pos_mode
= word_mode
;
8301 insn
->icode
= icode
;
8302 insn
->field_mode
= field_mode
;
8303 insn
->struct_mode
= (type
== ET_unaligned_mem
? byte_mode
: struct_mode
);
8304 insn
->pos_mode
= pos_mode
;
8308 /* Return true if an optab exists to perform an insertion or extraction
8309 of type TYPE in mode MODE. Describe the instruction in *INSN if so.
8311 REG_OPTAB is the optab to use for register structures and
8312 MISALIGN_OPTAB is the optab to use for misaligned memory structures.
8313 POS_OP is the operand number of the bit position. */
8316 get_optab_extraction_insn (struct extraction_insn
*insn
,
8317 enum extraction_type type
,
8318 enum machine_mode mode
, direct_optab reg_optab
,
8319 direct_optab misalign_optab
, int pos_op
)
8321 direct_optab optab
= (type
== ET_unaligned_mem
? misalign_optab
: reg_optab
);
8322 enum insn_code icode
= direct_optab_handler (optab
, mode
);
8323 if (icode
== CODE_FOR_nothing
)
8326 const struct insn_data_d
*data
= &insn_data
[icode
];
8328 insn
->icode
= icode
;
8329 insn
->field_mode
= mode
;
8330 insn
->struct_mode
= (type
== ET_unaligned_mem
? BLKmode
: mode
);
8331 insn
->pos_mode
= data
->operand
[pos_op
].mode
;
8332 if (insn
->pos_mode
== VOIDmode
)
8333 insn
->pos_mode
= word_mode
;
8337 /* Return true if an instruction exists to perform an insertion or
8338 extraction (PATTERN says which) of type TYPE in mode MODE.
8339 Describe the instruction in *INSN if so. */
8342 get_extraction_insn (extraction_insn
*insn
,
8343 enum extraction_pattern pattern
,
8344 enum extraction_type type
,
8345 enum machine_mode mode
)
8351 && get_traditional_extraction_insn (insn
, type
, mode
,
8352 CODE_FOR_insv
, 0, 3))
8354 return get_optab_extraction_insn (insn
, type
, mode
, insv_optab
,
8355 insvmisalign_optab
, 2);
8359 && get_traditional_extraction_insn (insn
, type
, mode
,
8360 CODE_FOR_extv
, 1, 0))
8362 return get_optab_extraction_insn (insn
, type
, mode
, extv_optab
,
8363 extvmisalign_optab
, 3);
8367 && get_traditional_extraction_insn (insn
, type
, mode
,
8368 CODE_FOR_extzv
, 1, 0))
8370 return get_optab_extraction_insn (insn
, type
, mode
, extzv_optab
,
8371 extzvmisalign_optab
, 3);
8378 /* Return true if an instruction exists to access a field of mode
8379 FIELDMODE in a structure that has STRUCT_BITS significant bits.
8380 Describe the "best" such instruction in *INSN if so. PATTERN and
8381 TYPE describe the type of insertion or extraction we want to perform.
8383 For an insertion, the number of significant structure bits includes
8384 all bits of the target. For an extraction, it need only include the
8385 most significant bit of the field. Larger widths are acceptable
8389 get_best_extraction_insn (extraction_insn
*insn
,
8390 enum extraction_pattern pattern
,
8391 enum extraction_type type
,
8392 unsigned HOST_WIDE_INT struct_bits
,
8393 enum machine_mode field_mode
)
8395 enum machine_mode mode
= smallest_mode_for_size (struct_bits
, MODE_INT
);
8396 while (mode
!= VOIDmode
)
8398 if (get_extraction_insn (insn
, pattern
, type
, mode
))
8400 while (mode
!= VOIDmode
8401 && GET_MODE_SIZE (mode
) <= GET_MODE_SIZE (field_mode
)
8402 && !TRULY_NOOP_TRUNCATION_MODES_P (insn
->field_mode
,
8405 get_extraction_insn (insn
, pattern
, type
, mode
);
8406 mode
= GET_MODE_WIDER_MODE (mode
);
8410 mode
= GET_MODE_WIDER_MODE (mode
);
8415 /* Return true if an instruction exists to access a field of mode
8416 FIELDMODE in a register structure that has STRUCT_BITS significant bits.
8417 Describe the "best" such instruction in *INSN if so. PATTERN describes
8418 the type of insertion or extraction we want to perform.
8420 For an insertion, the number of significant structure bits includes
8421 all bits of the target. For an extraction, it need only include the
8422 most significant bit of the field. Larger widths are acceptable
8426 get_best_reg_extraction_insn (extraction_insn
*insn
,
8427 enum extraction_pattern pattern
,
8428 unsigned HOST_WIDE_INT struct_bits
,
8429 enum machine_mode field_mode
)
8431 return get_best_extraction_insn (insn
, pattern
, ET_reg
, struct_bits
,
8435 /* Return true if an instruction exists to access a field of BITSIZE
8436 bits starting BITNUM bits into a memory structure. Describe the
8437 "best" such instruction in *INSN if so. PATTERN describes the type
8438 of insertion or extraction we want to perform and FIELDMODE is the
8439 natural mode of the extracted field.
8441 The instructions considered here only access bytes that overlap
8442 the bitfield; they do not touch any surrounding bytes. */
8445 get_best_mem_extraction_insn (extraction_insn
*insn
,
8446 enum extraction_pattern pattern
,
8447 HOST_WIDE_INT bitsize
, HOST_WIDE_INT bitnum
,
8448 enum machine_mode field_mode
)
8450 unsigned HOST_WIDE_INT struct_bits
= (bitnum
% BITS_PER_UNIT
8452 + BITS_PER_UNIT
- 1);
8453 struct_bits
-= struct_bits
% BITS_PER_UNIT
;
8454 return get_best_extraction_insn (insn
, pattern
, ET_unaligned_mem
,
8455 struct_bits
, field_mode
);
8458 #include "gt-optabs.h"