1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
25 #include "diagnostic-core.h"
27 /* Include insn-config.h before expr.h so that HAVE_conditional_move
28 is properly defined. */
29 #include "insn-config.h"
42 #include "basic-block.h"
45 struct target_optabs default_target_optabs
;
46 struct target_libfuncs default_target_libfuncs
;
47 struct target_optabs
*this_fn_optabs
= &default_target_optabs
;
49 struct target_optabs
*this_target_optabs
= &default_target_optabs
;
50 struct target_libfuncs
*this_target_libfuncs
= &default_target_libfuncs
;
53 #define libfunc_hash \
54 (this_target_libfuncs->x_libfunc_hash)
56 static void prepare_float_lib_cmp (rtx
, rtx
, enum rtx_code
, rtx
*,
58 static rtx
expand_unop_direct (enum machine_mode
, optab
, rtx
, rtx
, int);
59 static void emit_libcall_block_1 (rtx
, rtx
, rtx
, rtx
, bool);
61 /* Debug facility for use in GDB. */
62 void debug_optab_libfuncs (void);
64 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
65 #if ENABLE_DECIMAL_BID_FORMAT
66 #define DECIMAL_PREFIX "bid_"
68 #define DECIMAL_PREFIX "dpd_"
71 /* Used for libfunc_hash. */
74 hash_libfunc (const void *p
)
76 const struct libfunc_entry
*const e
= (const struct libfunc_entry
*) p
;
77 return ((e
->mode1
+ e
->mode2
* NUM_MACHINE_MODES
) ^ e
->op
);
80 /* Used for libfunc_hash. */
83 eq_libfunc (const void *p
, const void *q
)
85 const struct libfunc_entry
*const e1
= (const struct libfunc_entry
*) p
;
86 const struct libfunc_entry
*const e2
= (const struct libfunc_entry
*) q
;
87 return e1
->op
== e2
->op
&& e1
->mode1
== e2
->mode1
&& e1
->mode2
== e2
->mode2
;
90 /* Return libfunc corresponding operation defined by OPTAB converting
91 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
92 if no libfunc is available. */
94 convert_optab_libfunc (convert_optab optab
, enum machine_mode mode1
,
95 enum machine_mode mode2
)
97 struct libfunc_entry e
;
98 struct libfunc_entry
**slot
;
100 /* ??? This ought to be an assert, but not all of the places
101 that we expand optabs know about the optabs that got moved
103 if (!(optab
>= FIRST_CONV_OPTAB
&& optab
<= LAST_CONVLIB_OPTAB
))
109 slot
= (struct libfunc_entry
**)
110 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
113 const struct convert_optab_libcall_d
*d
114 = &convlib_def
[optab
- FIRST_CONV_OPTAB
];
116 if (d
->libcall_gen
== NULL
)
119 d
->libcall_gen (optab
, d
->libcall_basename
, mode1
, mode2
);
120 slot
= (struct libfunc_entry
**)
121 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
125 return (*slot
)->libfunc
;
128 /* Return libfunc corresponding operation defined by OPTAB in MODE.
129 Trigger lazy initialization if needed, return NULL if no libfunc is
132 optab_libfunc (optab optab
, enum machine_mode mode
)
134 struct libfunc_entry e
;
135 struct libfunc_entry
**slot
;
137 /* ??? This ought to be an assert, but not all of the places
138 that we expand optabs know about the optabs that got moved
140 if (!(optab
>= FIRST_NORM_OPTAB
&& optab
<= LAST_NORMLIB_OPTAB
))
146 slot
= (struct libfunc_entry
**)
147 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
150 const struct optab_libcall_d
*d
151 = &normlib_def
[optab
- FIRST_NORM_OPTAB
];
153 if (d
->libcall_gen
== NULL
)
156 d
->libcall_gen (optab
, d
->libcall_basename
, d
->libcall_suffix
, mode
);
157 slot
= (struct libfunc_entry
**)
158 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
162 return (*slot
)->libfunc
;
166 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
167 the result of operation CODE applied to OP0 (and OP1 if it is a binary
170 If the last insn does not set TARGET, don't do anything, but return 1.
172 If the last insn or a previous insn sets TARGET and TARGET is one of OP0
173 or OP1, don't add the REG_EQUAL note but return 0. Our caller can then
174 try again, ensuring that TARGET is not one of the operands. */
177 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
182 gcc_assert (insns
&& INSN_P (insns
) && NEXT_INSN (insns
));
184 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
185 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
186 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
187 && GET_RTX_CLASS (code
) != RTX_COMPARE
188 && GET_RTX_CLASS (code
) != RTX_UNARY
)
191 if (GET_CODE (target
) == ZERO_EXTRACT
)
194 for (last_insn
= insns
;
195 NEXT_INSN (last_insn
) != NULL_RTX
;
196 last_insn
= NEXT_INSN (last_insn
))
199 /* If TARGET is in OP0 or OP1, punt. We'd end up with a note referencing
200 a value changing in the insn, so the note would be invalid for CSE. */
201 if (reg_overlap_mentioned_p (target
, op0
)
202 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
205 && (rtx_equal_p (target
, op0
)
206 || (op1
&& rtx_equal_p (target
, op1
))))
208 /* For MEM target, with MEM = MEM op X, prefer no REG_EQUAL note
209 over expanding it as temp = MEM op X, MEM = temp. If the target
210 supports MEM = MEM op X instructions, it is sometimes too hard
211 to reconstruct that form later, especially if X is also a memory,
212 and due to multiple occurrences of addresses the address might
213 be forced into register unnecessarily.
214 Note that not emitting the REG_EQUIV note might inhibit
215 CSE in some cases. */
216 set
= single_set (last_insn
);
218 && GET_CODE (SET_SRC (set
)) == code
219 && MEM_P (SET_DEST (set
))
220 && (rtx_equal_p (SET_DEST (set
), XEXP (SET_SRC (set
), 0))
221 || (op1
&& rtx_equal_p (SET_DEST (set
),
222 XEXP (SET_SRC (set
), 1)))))
228 set
= single_set (last_insn
);
232 if (! rtx_equal_p (SET_DEST (set
), target
)
233 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
234 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
235 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
238 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
248 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (target
) != GET_MODE (op0
))
250 note
= gen_rtx_fmt_e (code
, GET_MODE (op0
), copy_rtx (op0
));
251 if (GET_MODE_SIZE (GET_MODE (op0
))
252 > GET_MODE_SIZE (GET_MODE (target
)))
253 note
= simplify_gen_unary (TRUNCATE
, GET_MODE (target
),
254 note
, GET_MODE (op0
));
256 note
= simplify_gen_unary (ZERO_EXTEND
, GET_MODE (target
),
257 note
, GET_MODE (op0
));
262 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
266 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
268 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
273 /* Given two input operands, OP0 and OP1, determine what the correct from_mode
274 for a widening operation would be. In most cases this would be OP0, but if
275 that's a constant it'll be VOIDmode, which isn't useful. */
277 static enum machine_mode
278 widened_mode (enum machine_mode to_mode
, rtx op0
, rtx op1
)
280 enum machine_mode m0
= GET_MODE (op0
);
281 enum machine_mode m1
= GET_MODE (op1
);
282 enum machine_mode result
;
284 if (m0
== VOIDmode
&& m1
== VOIDmode
)
286 else if (m0
== VOIDmode
|| GET_MODE_SIZE (m0
) < GET_MODE_SIZE (m1
))
291 if (GET_MODE_SIZE (result
) > GET_MODE_SIZE (to_mode
))
297 /* Find a widening optab even if it doesn't widen as much as we want.
298 E.g. if from_mode is HImode, and to_mode is DImode, and there is no
299 direct HI->SI insn, then return SI->DI, if that exists.
300 If PERMIT_NON_WIDENING is non-zero then this can be used with
301 non-widening optabs also. */
304 find_widening_optab_handler_and_mode (optab op
, enum machine_mode to_mode
,
305 enum machine_mode from_mode
,
306 int permit_non_widening
,
307 enum machine_mode
*found_mode
)
309 for (; (permit_non_widening
|| from_mode
!= to_mode
)
310 && GET_MODE_SIZE (from_mode
) <= GET_MODE_SIZE (to_mode
)
311 && from_mode
!= VOIDmode
;
312 from_mode
= GET_MODE_WIDER_MODE (from_mode
))
314 enum insn_code handler
= widening_optab_handler (op
, to_mode
,
317 if (handler
!= CODE_FOR_nothing
)
320 *found_mode
= from_mode
;
325 return CODE_FOR_nothing
;
328 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
329 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
330 not actually do a sign-extend or zero-extend, but can leave the
331 higher-order bits of the result rtx undefined, for example, in the case
332 of logical operations, but not right shifts. */
335 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
336 int unsignedp
, int no_extend
)
340 /* If we don't have to extend and this is a constant, return it. */
341 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
344 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
345 extend since it will be more efficient to do so unless the signedness of
346 a promoted object differs from our extension. */
348 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
349 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
350 return convert_modes (mode
, oldmode
, op
, unsignedp
);
352 /* If MODE is no wider than a single word, we return a lowpart or paradoxical
354 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
355 return gen_lowpart (mode
, force_reg (GET_MODE (op
), op
));
357 /* Otherwise, get an object of MODE, clobber it, and set the low-order
360 result
= gen_reg_rtx (mode
);
361 emit_clobber (result
);
362 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
366 /* Return the optab used for computing the operation given by the tree code,
367 CODE and the tree EXP. This function is not always usable (for example, it
368 cannot give complete results for multiplication or division) but probably
369 ought to be relied on more widely throughout the expander. */
371 optab_for_tree_code (enum tree_code code
, const_tree type
,
372 enum optab_subtype subtype
)
384 return one_cmpl_optab
;
389 case MULT_HIGHPART_EXPR
:
390 return TYPE_UNSIGNED (type
) ? umul_highpart_optab
: smul_highpart_optab
;
396 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
404 if (TYPE_SATURATING (type
))
405 return TYPE_UNSIGNED (type
) ? usdiv_optab
: ssdiv_optab
;
406 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
409 if (TREE_CODE (type
) == VECTOR_TYPE
)
411 if (subtype
== optab_vector
)
412 return TYPE_SATURATING (type
) ? unknown_optab
: vashl_optab
;
414 gcc_assert (subtype
== optab_scalar
);
416 if (TYPE_SATURATING (type
))
417 return TYPE_UNSIGNED (type
) ? usashl_optab
: ssashl_optab
;
421 if (TREE_CODE (type
) == VECTOR_TYPE
)
423 if (subtype
== optab_vector
)
424 return TYPE_UNSIGNED (type
) ? vlshr_optab
: vashr_optab
;
426 gcc_assert (subtype
== optab_scalar
);
428 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
431 if (TREE_CODE (type
) == VECTOR_TYPE
)
433 if (subtype
== optab_vector
)
436 gcc_assert (subtype
== optab_scalar
);
441 if (TREE_CODE (type
) == VECTOR_TYPE
)
443 if (subtype
== optab_vector
)
446 gcc_assert (subtype
== optab_scalar
);
451 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
454 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
456 case REALIGN_LOAD_EXPR
:
457 return vec_realign_load_optab
;
460 return TYPE_UNSIGNED (type
) ? usum_widen_optab
: ssum_widen_optab
;
463 return TYPE_UNSIGNED (type
) ? udot_prod_optab
: sdot_prod_optab
;
465 case WIDEN_MULT_PLUS_EXPR
:
466 return (TYPE_UNSIGNED (type
)
467 ? (TYPE_SATURATING (type
)
468 ? usmadd_widen_optab
: umadd_widen_optab
)
469 : (TYPE_SATURATING (type
)
470 ? ssmadd_widen_optab
: smadd_widen_optab
));
472 case WIDEN_MULT_MINUS_EXPR
:
473 return (TYPE_UNSIGNED (type
)
474 ? (TYPE_SATURATING (type
)
475 ? usmsub_widen_optab
: umsub_widen_optab
)
476 : (TYPE_SATURATING (type
)
477 ? ssmsub_widen_optab
: smsub_widen_optab
));
483 return TYPE_UNSIGNED (type
) ? reduc_umax_optab
: reduc_smax_optab
;
486 return TYPE_UNSIGNED (type
) ? reduc_umin_optab
: reduc_smin_optab
;
488 case REDUC_PLUS_EXPR
:
489 return TYPE_UNSIGNED (type
) ? reduc_uplus_optab
: reduc_splus_optab
;
491 case VEC_LSHIFT_EXPR
:
492 return vec_shl_optab
;
494 case VEC_RSHIFT_EXPR
:
495 return vec_shr_optab
;
497 case VEC_WIDEN_MULT_HI_EXPR
:
498 return TYPE_UNSIGNED (type
) ?
499 vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
501 case VEC_WIDEN_MULT_LO_EXPR
:
502 return TYPE_UNSIGNED (type
) ?
503 vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
505 case VEC_WIDEN_MULT_EVEN_EXPR
:
506 return TYPE_UNSIGNED (type
) ?
507 vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
509 case VEC_WIDEN_MULT_ODD_EXPR
:
510 return TYPE_UNSIGNED (type
) ?
511 vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
513 case VEC_WIDEN_LSHIFT_HI_EXPR
:
514 return TYPE_UNSIGNED (type
) ?
515 vec_widen_ushiftl_hi_optab
: vec_widen_sshiftl_hi_optab
;
517 case VEC_WIDEN_LSHIFT_LO_EXPR
:
518 return TYPE_UNSIGNED (type
) ?
519 vec_widen_ushiftl_lo_optab
: vec_widen_sshiftl_lo_optab
;
521 case VEC_UNPACK_HI_EXPR
:
522 return TYPE_UNSIGNED (type
) ?
523 vec_unpacku_hi_optab
: vec_unpacks_hi_optab
;
525 case VEC_UNPACK_LO_EXPR
:
526 return TYPE_UNSIGNED (type
) ?
527 vec_unpacku_lo_optab
: vec_unpacks_lo_optab
;
529 case VEC_UNPACK_FLOAT_HI_EXPR
:
530 /* The signedness is determined from input operand. */
531 return TYPE_UNSIGNED (type
) ?
532 vec_unpacku_float_hi_optab
: vec_unpacks_float_hi_optab
;
534 case VEC_UNPACK_FLOAT_LO_EXPR
:
535 /* The signedness is determined from input operand. */
536 return TYPE_UNSIGNED (type
) ?
537 vec_unpacku_float_lo_optab
: vec_unpacks_float_lo_optab
;
539 case VEC_PACK_TRUNC_EXPR
:
540 return vec_pack_trunc_optab
;
542 case VEC_PACK_SAT_EXPR
:
543 return TYPE_UNSIGNED (type
) ? vec_pack_usat_optab
: vec_pack_ssat_optab
;
545 case VEC_PACK_FIX_TRUNC_EXPR
:
546 /* The signedness is determined from output operand. */
547 return TYPE_UNSIGNED (type
) ?
548 vec_pack_ufix_trunc_optab
: vec_pack_sfix_trunc_optab
;
554 trapv
= INTEGRAL_TYPE_P (type
) && TYPE_OVERFLOW_TRAPS (type
);
557 case POINTER_PLUS_EXPR
:
559 if (TYPE_SATURATING (type
))
560 return TYPE_UNSIGNED (type
) ? usadd_optab
: ssadd_optab
;
561 return trapv
? addv_optab
: add_optab
;
564 if (TYPE_SATURATING (type
))
565 return TYPE_UNSIGNED (type
) ? ussub_optab
: sssub_optab
;
566 return trapv
? subv_optab
: sub_optab
;
569 if (TYPE_SATURATING (type
))
570 return TYPE_UNSIGNED (type
) ? usmul_optab
: ssmul_optab
;
571 return trapv
? smulv_optab
: smul_optab
;
574 if (TYPE_SATURATING (type
))
575 return TYPE_UNSIGNED (type
) ? usneg_optab
: ssneg_optab
;
576 return trapv
? negv_optab
: neg_optab
;
579 return trapv
? absv_optab
: abs_optab
;
582 return unknown_optab
;
587 /* Expand vector widening operations.
589 There are two different classes of operations handled here:
590 1) Operations whose result is wider than all the arguments to the operation.
591 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
592 In this case OP0 and optionally OP1 would be initialized,
593 but WIDE_OP wouldn't (not relevant for this case).
594 2) Operations whose result is of the same size as the last argument to the
595 operation, but wider than all the other arguments to the operation.
596 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
597 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
599 E.g, when called to expand the following operations, this is how
600 the arguments will be initialized:
602 widening-sum 2 oprnd0 - oprnd1
603 widening-dot-product 3 oprnd0 oprnd1 oprnd2
604 widening-mult 2 oprnd0 oprnd1 -
605 type-promotion (vec-unpack) 1 oprnd0 - - */
608 expand_widen_pattern_expr (sepops ops
, rtx op0
, rtx op1
, rtx wide_op
,
609 rtx target
, int unsignedp
)
611 struct expand_operand eops
[4];
612 tree oprnd0
, oprnd1
, oprnd2
;
613 enum machine_mode wmode
= VOIDmode
, tmode0
, tmode1
= VOIDmode
;
614 optab widen_pattern_optab
;
615 enum insn_code icode
;
616 int nops
= TREE_CODE_LENGTH (ops
->code
);
620 tmode0
= TYPE_MODE (TREE_TYPE (oprnd0
));
621 widen_pattern_optab
=
622 optab_for_tree_code (ops
->code
, TREE_TYPE (oprnd0
), optab_default
);
623 if (ops
->code
== WIDEN_MULT_PLUS_EXPR
624 || ops
->code
== WIDEN_MULT_MINUS_EXPR
)
625 icode
= find_widening_optab_handler (widen_pattern_optab
,
626 TYPE_MODE (TREE_TYPE (ops
->op2
)),
629 icode
= optab_handler (widen_pattern_optab
, tmode0
);
630 gcc_assert (icode
!= CODE_FOR_nothing
);
635 tmode1
= TYPE_MODE (TREE_TYPE (oprnd1
));
638 /* The last operand is of a wider mode than the rest of the operands. */
643 gcc_assert (tmode1
== tmode0
);
646 wmode
= TYPE_MODE (TREE_TYPE (oprnd2
));
650 create_output_operand (&eops
[op
++], target
, TYPE_MODE (ops
->type
));
651 create_convert_operand_from (&eops
[op
++], op0
, tmode0
, unsignedp
);
653 create_convert_operand_from (&eops
[op
++], op1
, tmode1
, unsignedp
);
655 create_convert_operand_from (&eops
[op
++], wide_op
, wmode
, unsignedp
);
656 expand_insn (icode
, op
, eops
);
657 return eops
[0].value
;
660 /* Generate code to perform an operation specified by TERNARY_OPTAB
661 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
663 UNSIGNEDP is for the case where we have to widen the operands
664 to perform the operation. It says to use zero-extension.
666 If TARGET is nonzero, the value
667 is generated there, if it is convenient to do so.
668 In all cases an rtx is returned for the locus of the value;
669 this may or may not be TARGET. */
672 expand_ternary_op (enum machine_mode mode
, optab ternary_optab
, rtx op0
,
673 rtx op1
, rtx op2
, rtx target
, int unsignedp
)
675 struct expand_operand ops
[4];
676 enum insn_code icode
= optab_handler (ternary_optab
, mode
);
678 gcc_assert (optab_handler (ternary_optab
, mode
) != CODE_FOR_nothing
);
680 create_output_operand (&ops
[0], target
, mode
);
681 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
682 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
683 create_convert_operand_from (&ops
[3], op2
, mode
, unsignedp
);
684 expand_insn (icode
, 4, ops
);
689 /* Like expand_binop, but return a constant rtx if the result can be
690 calculated at compile time. The arguments and return value are
691 otherwise the same as for expand_binop. */
694 simplify_expand_binop (enum machine_mode mode
, optab binoptab
,
695 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
696 enum optab_methods methods
)
698 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
700 rtx x
= simplify_binary_operation (optab_to_code (binoptab
),
706 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
709 /* Like simplify_expand_binop, but always put the result in TARGET.
710 Return true if the expansion succeeded. */
713 force_expand_binop (enum machine_mode mode
, optab binoptab
,
714 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
715 enum optab_methods methods
)
717 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
718 target
, unsignedp
, methods
);
722 emit_move_insn (target
, x
);
726 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
729 expand_vec_shift_expr (sepops ops
, rtx target
)
731 struct expand_operand eops
[3];
732 enum insn_code icode
;
733 rtx rtx_op1
, rtx_op2
;
734 enum machine_mode mode
= TYPE_MODE (ops
->type
);
735 tree vec_oprnd
= ops
->op0
;
736 tree shift_oprnd
= ops
->op1
;
741 case VEC_RSHIFT_EXPR
:
742 shift_optab
= vec_shr_optab
;
744 case VEC_LSHIFT_EXPR
:
745 shift_optab
= vec_shl_optab
;
751 icode
= optab_handler (shift_optab
, mode
);
752 gcc_assert (icode
!= CODE_FOR_nothing
);
754 rtx_op1
= expand_normal (vec_oprnd
);
755 rtx_op2
= expand_normal (shift_oprnd
);
757 create_output_operand (&eops
[0], target
, mode
);
758 create_input_operand (&eops
[1], rtx_op1
, GET_MODE (rtx_op1
));
759 create_convert_operand_from_type (&eops
[2], rtx_op2
, TREE_TYPE (shift_oprnd
));
760 expand_insn (icode
, 3, eops
);
762 return eops
[0].value
;
765 /* Create a new vector value in VMODE with all elements set to OP. The
766 mode of OP must be the element mode of VMODE. If OP is a constant,
767 then the return value will be a constant. */
770 expand_vector_broadcast (enum machine_mode vmode
, rtx op
)
772 enum insn_code icode
;
777 gcc_checking_assert (VECTOR_MODE_P (vmode
));
779 n
= GET_MODE_NUNITS (vmode
);
780 vec
= rtvec_alloc (n
);
781 for (i
= 0; i
< n
; ++i
)
782 RTVEC_ELT (vec
, i
) = op
;
785 return gen_rtx_CONST_VECTOR (vmode
, vec
);
787 /* ??? If the target doesn't have a vec_init, then we have no easy way
788 of performing this operation. Most of this sort of generic support
789 is hidden away in the vector lowering support in gimple. */
790 icode
= optab_handler (vec_init_optab
, vmode
);
791 if (icode
== CODE_FOR_nothing
)
794 ret
= gen_reg_rtx (vmode
);
795 emit_insn (GEN_FCN (icode
) (ret
, gen_rtx_PARALLEL (vmode
, vec
)));
800 /* This subroutine of expand_doubleword_shift handles the cases in which
801 the effective shift value is >= BITS_PER_WORD. The arguments and return
802 value are the same as for the parent routine, except that SUPERWORD_OP1
803 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
804 INTO_TARGET may be null if the caller has decided to calculate it. */
807 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
808 rtx outof_target
, rtx into_target
,
809 int unsignedp
, enum optab_methods methods
)
811 if (into_target
!= 0)
812 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
813 into_target
, unsignedp
, methods
))
816 if (outof_target
!= 0)
818 /* For a signed right shift, we must fill OUTOF_TARGET with copies
819 of the sign bit, otherwise we must fill it with zeros. */
820 if (binoptab
!= ashr_optab
)
821 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
823 if (!force_expand_binop (word_mode
, binoptab
,
824 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
825 outof_target
, unsignedp
, methods
))
831 /* This subroutine of expand_doubleword_shift handles the cases in which
832 the effective shift value is < BITS_PER_WORD. The arguments and return
833 value are the same as for the parent routine. */
836 expand_subword_shift (enum machine_mode op1_mode
, optab binoptab
,
837 rtx outof_input
, rtx into_input
, rtx op1
,
838 rtx outof_target
, rtx into_target
,
839 int unsignedp
, enum optab_methods methods
,
840 unsigned HOST_WIDE_INT shift_mask
)
842 optab reverse_unsigned_shift
, unsigned_shift
;
845 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
846 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
848 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
849 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
850 the opposite direction to BINOPTAB. */
851 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
853 carries
= outof_input
;
854 tmp
= immed_wide_int_const (wi::shwi (BITS_PER_WORD
,
855 op1_mode
), op1_mode
);
856 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
861 /* We must avoid shifting by BITS_PER_WORD bits since that is either
862 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
863 has unknown behavior. Do a single shift first, then shift by the
864 remainder. It's OK to use ~OP1 as the remainder if shift counts
865 are truncated to the mode size. */
866 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
867 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
868 if (shift_mask
== BITS_PER_WORD
- 1)
870 tmp
= immed_wide_int_const
871 (wi::minus_one (GET_MODE_PRECISION (op1_mode
)), op1_mode
);
872 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
877 tmp
= immed_wide_int_const (wi::shwi (BITS_PER_WORD
- 1,
878 op1_mode
), op1_mode
);
879 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
883 if (tmp
== 0 || carries
== 0)
885 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
886 carries
, tmp
, 0, unsignedp
, methods
);
890 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
891 so the result can go directly into INTO_TARGET if convenient. */
892 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
893 into_target
, unsignedp
, methods
);
897 /* Now OR in the bits carried over from OUTOF_INPUT. */
898 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
899 into_target
, unsignedp
, methods
))
902 /* Use a standard word_mode shift for the out-of half. */
903 if (outof_target
!= 0)
904 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
905 outof_target
, unsignedp
, methods
))
912 #ifdef HAVE_conditional_move
913 /* Try implementing expand_doubleword_shift using conditional moves.
914 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
915 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
916 are the shift counts to use in the former and latter case. All other
917 arguments are the same as the parent routine. */
920 expand_doubleword_shift_condmove (enum machine_mode op1_mode
, optab binoptab
,
921 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
922 rtx outof_input
, rtx into_input
,
923 rtx subword_op1
, rtx superword_op1
,
924 rtx outof_target
, rtx into_target
,
925 int unsignedp
, enum optab_methods methods
,
926 unsigned HOST_WIDE_INT shift_mask
)
928 rtx outof_superword
, into_superword
;
930 /* Put the superword version of the output into OUTOF_SUPERWORD and
932 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
933 if (outof_target
!= 0 && subword_op1
== superword_op1
)
935 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
936 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
937 into_superword
= outof_target
;
938 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
939 outof_superword
, 0, unsignedp
, methods
))
944 into_superword
= gen_reg_rtx (word_mode
);
945 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
946 outof_superword
, into_superword
,
951 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
952 if (!expand_subword_shift (op1_mode
, binoptab
,
953 outof_input
, into_input
, subword_op1
,
954 outof_target
, into_target
,
955 unsignedp
, methods
, shift_mask
))
958 /* Select between them. Do the INTO half first because INTO_SUPERWORD
959 might be the current value of OUTOF_TARGET. */
960 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
961 into_target
, into_superword
, word_mode
, false))
964 if (outof_target
!= 0)
965 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
966 outof_target
, outof_superword
,
974 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
975 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
976 input operand; the shift moves bits in the direction OUTOF_INPUT->
977 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
978 of the target. OP1 is the shift count and OP1_MODE is its mode.
979 If OP1 is constant, it will have been truncated as appropriate
980 and is known to be nonzero.
982 If SHIFT_MASK is zero, the result of word shifts is undefined when the
983 shift count is outside the range [0, BITS_PER_WORD). This routine must
984 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
986 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
987 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
988 fill with zeros or sign bits as appropriate.
990 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
991 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
992 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
993 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
996 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
997 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
998 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
999 function wants to calculate it itself.
1001 Return true if the shift could be successfully synthesized. */
1004 expand_doubleword_shift (enum machine_mode op1_mode
, optab binoptab
,
1005 rtx outof_input
, rtx into_input
, rtx op1
,
1006 rtx outof_target
, rtx into_target
,
1007 int unsignedp
, enum optab_methods methods
,
1008 unsigned HOST_WIDE_INT shift_mask
)
1010 rtx superword_op1
, tmp
, cmp1
, cmp2
;
1011 rtx subword_label
, done_label
;
1012 enum rtx_code cmp_code
;
1014 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1015 fill the result with sign or zero bits as appropriate. If so, the value
1016 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1017 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1018 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1020 This isn't worthwhile for constant shifts since the optimizers will
1021 cope better with in-range shift counts. */
1022 if (shift_mask
>= BITS_PER_WORD
1023 && outof_target
!= 0
1024 && !CONSTANT_P (op1
))
1026 if (!expand_doubleword_shift (op1_mode
, binoptab
,
1027 outof_input
, into_input
, op1
,
1029 unsignedp
, methods
, shift_mask
))
1031 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
1032 outof_target
, unsignedp
, methods
))
1037 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1038 is true when the effective shift value is less than BITS_PER_WORD.
1039 Set SUPERWORD_OP1 to the shift count that should be used to shift
1040 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1041 tmp
= immed_wide_int_const (wi::shwi (BITS_PER_WORD
, op1_mode
), op1_mode
);
1042 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
1044 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1045 is a subword shift count. */
1046 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
1048 cmp2
= CONST0_RTX (op1_mode
);
1050 superword_op1
= op1
;
1054 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1055 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
1057 cmp2
= CONST0_RTX (op1_mode
);
1059 superword_op1
= cmp1
;
1064 /* If we can compute the condition at compile time, pick the
1065 appropriate subroutine. */
1066 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
1067 if (tmp
!= 0 && CONST_INT_P (tmp
))
1069 if (tmp
== const0_rtx
)
1070 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1071 outof_target
, into_target
,
1072 unsignedp
, methods
);
1074 return expand_subword_shift (op1_mode
, binoptab
,
1075 outof_input
, into_input
, op1
,
1076 outof_target
, into_target
,
1077 unsignedp
, methods
, shift_mask
);
1080 #ifdef HAVE_conditional_move
1081 /* Try using conditional moves to generate straight-line code. */
1083 rtx start
= get_last_insn ();
1084 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
1085 cmp_code
, cmp1
, cmp2
,
1086 outof_input
, into_input
,
1088 outof_target
, into_target
,
1089 unsignedp
, methods
, shift_mask
))
1091 delete_insns_since (start
);
1095 /* As a last resort, use branches to select the correct alternative. */
1096 subword_label
= gen_label_rtx ();
1097 done_label
= gen_label_rtx ();
1100 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
1101 0, 0, subword_label
, -1);
1104 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1105 outof_target
, into_target
,
1106 unsignedp
, methods
))
1109 emit_jump_insn (gen_jump (done_label
));
1111 emit_label (subword_label
);
1113 if (!expand_subword_shift (op1_mode
, binoptab
,
1114 outof_input
, into_input
, op1
,
1115 outof_target
, into_target
,
1116 unsignedp
, methods
, shift_mask
))
1119 emit_label (done_label
);
1123 /* Subroutine of expand_binop. Perform a double word multiplication of
1124 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1125 as the target's word_mode. This function return NULL_RTX if anything
1126 goes wrong, in which case it may have already emitted instructions
1127 which need to be deleted.
1129 If we want to multiply two two-word values and have normal and widening
1130 multiplies of single-word values, we can do this with three smaller
1133 The multiplication proceeds as follows:
1134 _______________________
1135 [__op0_high_|__op0_low__]
1136 _______________________
1137 * [__op1_high_|__op1_low__]
1138 _______________________________________________
1139 _______________________
1140 (1) [__op0_low__*__op1_low__]
1141 _______________________
1142 (2a) [__op0_low__*__op1_high_]
1143 _______________________
1144 (2b) [__op0_high_*__op1_low__]
1145 _______________________
1146 (3) [__op0_high_*__op1_high_]
1149 This gives a 4-word result. Since we are only interested in the
1150 lower 2 words, partial result (3) and the upper words of (2a) and
1151 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1152 calculated using non-widening multiplication.
1154 (1), however, needs to be calculated with an unsigned widening
1155 multiplication. If this operation is not directly supported we
1156 try using a signed widening multiplication and adjust the result.
1157 This adjustment works as follows:
1159 If both operands are positive then no adjustment is needed.
1161 If the operands have different signs, for example op0_low < 0 and
1162 op1_low >= 0, the instruction treats the most significant bit of
1163 op0_low as a sign bit instead of a bit with significance
1164 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1165 with 2**BITS_PER_WORD - op0_low, and two's complements the
1166 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1169 Similarly, if both operands are negative, we need to add
1170 (op0_low + op1_low) * 2**BITS_PER_WORD.
1172 We use a trick to adjust quickly. We logically shift op0_low right
1173 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1174 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1175 logical shift exists, we do an arithmetic right shift and subtract
1179 expand_doubleword_mult (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
1180 bool umulp
, enum optab_methods methods
)
1182 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1183 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1184 rtx wordm1
= umulp
? NULL_RTX
: GEN_INT (BITS_PER_WORD
- 1);
1185 rtx product
, adjust
, product_high
, temp
;
1187 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1188 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1189 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1190 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1192 /* If we're using an unsigned multiply to directly compute the product
1193 of the low-order words of the operands and perform any required
1194 adjustments of the operands, we begin by trying two more multiplications
1195 and then computing the appropriate sum.
1197 We have checked above that the required addition is provided.
1198 Full-word addition will normally always succeed, especially if
1199 it is provided at all, so we don't worry about its failure. The
1200 multiplication may well fail, however, so we do handle that. */
1204 /* ??? This could be done with emit_store_flag where available. */
1205 temp
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1206 NULL_RTX
, 1, methods
);
1208 op0_high
= expand_binop (word_mode
, add_optab
, op0_high
, temp
,
1209 NULL_RTX
, 0, OPTAB_DIRECT
);
1212 temp
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1213 NULL_RTX
, 0, methods
);
1216 op0_high
= expand_binop (word_mode
, sub_optab
, op0_high
, temp
,
1217 NULL_RTX
, 0, OPTAB_DIRECT
);
1224 adjust
= expand_binop (word_mode
, smul_optab
, op0_high
, op1_low
,
1225 NULL_RTX
, 0, OPTAB_DIRECT
);
1229 /* OP0_HIGH should now be dead. */
1233 /* ??? This could be done with emit_store_flag where available. */
1234 temp
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1235 NULL_RTX
, 1, methods
);
1237 op1_high
= expand_binop (word_mode
, add_optab
, op1_high
, temp
,
1238 NULL_RTX
, 0, OPTAB_DIRECT
);
1241 temp
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1242 NULL_RTX
, 0, methods
);
1245 op1_high
= expand_binop (word_mode
, sub_optab
, op1_high
, temp
,
1246 NULL_RTX
, 0, OPTAB_DIRECT
);
1253 temp
= expand_binop (word_mode
, smul_optab
, op1_high
, op0_low
,
1254 NULL_RTX
, 0, OPTAB_DIRECT
);
1258 /* OP1_HIGH should now be dead. */
1260 adjust
= expand_binop (word_mode
, add_optab
, adjust
, temp
,
1261 NULL_RTX
, 0, OPTAB_DIRECT
);
1263 if (target
&& !REG_P (target
))
1267 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1268 target
, 1, OPTAB_DIRECT
);
1270 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1271 target
, 1, OPTAB_DIRECT
);
1276 product_high
= operand_subword (product
, high
, 1, mode
);
1277 adjust
= expand_binop (word_mode
, add_optab
, product_high
, adjust
,
1278 NULL_RTX
, 0, OPTAB_DIRECT
);
1279 emit_move_insn (product_high
, adjust
);
1283 /* Wrapper around expand_binop which takes an rtx code to specify
1284 the operation to perform, not an optab pointer. All other
1285 arguments are the same. */
1287 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
1288 rtx op1
, rtx target
, int unsignedp
,
1289 enum optab_methods methods
)
1291 optab binop
= code_to_optab (code
);
1294 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
1297 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1298 binop. Order them according to commutative_operand_precedence and, if
1299 possible, try to put TARGET or a pseudo first. */
1301 swap_commutative_operands_with_target (rtx target
, rtx op0
, rtx op1
)
1303 int op0_prec
= commutative_operand_precedence (op0
);
1304 int op1_prec
= commutative_operand_precedence (op1
);
1306 if (op0_prec
< op1_prec
)
1309 if (op0_prec
> op1_prec
)
1312 /* With equal precedence, both orders are ok, but it is better if the
1313 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1314 if (target
== 0 || REG_P (target
))
1315 return (REG_P (op1
) && !REG_P (op0
)) || target
== op1
;
1317 return rtx_equal_p (op1
, target
);
1320 /* Return true if BINOPTAB implements a shift operation. */
1323 shift_optab_p (optab binoptab
)
1325 switch (optab_to_code (binoptab
))
1341 /* Return true if BINOPTAB implements a commutative binary operation. */
1344 commutative_optab_p (optab binoptab
)
1346 return (GET_RTX_CLASS (optab_to_code (binoptab
)) == RTX_COMM_ARITH
1347 || binoptab
== smul_widen_optab
1348 || binoptab
== umul_widen_optab
1349 || binoptab
== smul_highpart_optab
1350 || binoptab
== umul_highpart_optab
);
1353 /* X is to be used in mode MODE as operand OPN to BINOPTAB. If we're
1354 optimizing, and if the operand is a constant that costs more than
1355 1 instruction, force the constant into a register and return that
1356 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1359 avoid_expensive_constant (enum machine_mode mode
, optab binoptab
,
1360 int opn
, rtx x
, bool unsignedp
)
1362 bool speed
= optimize_insn_for_speed_p ();
1364 if (mode
!= VOIDmode
1367 && (rtx_cost (x
, optab_to_code (binoptab
), opn
, speed
)
1368 > set_src_cost (x
, speed
)))
1370 if (CONST_INT_P (x
))
1372 HOST_WIDE_INT intval
= trunc_int_for_mode (INTVAL (x
), mode
);
1373 if (intval
!= INTVAL (x
))
1374 x
= GEN_INT (intval
);
1377 x
= convert_modes (mode
, VOIDmode
, x
, unsignedp
);
1378 x
= force_reg (mode
, x
);
1383 /* Helper function for expand_binop: handle the case where there
1384 is an insn that directly implements the indicated operation.
1385 Returns null if this is not possible. */
1387 expand_binop_directly (enum machine_mode mode
, optab binoptab
,
1389 rtx target
, int unsignedp
, enum optab_methods methods
,
1392 enum machine_mode from_mode
= widened_mode (mode
, op0
, op1
);
1393 enum insn_code icode
= find_widening_optab_handler (binoptab
, mode
,
1395 enum machine_mode xmode0
= insn_data
[(int) icode
].operand
[1].mode
;
1396 enum machine_mode xmode1
= insn_data
[(int) icode
].operand
[2].mode
;
1397 enum machine_mode mode0
, mode1
, tmp_mode
;
1398 struct expand_operand ops
[3];
1401 rtx xop0
= op0
, xop1
= op1
;
1404 /* If it is a commutative operator and the modes would match
1405 if we would swap the operands, we can save the conversions. */
1406 commutative_p
= commutative_optab_p (binoptab
);
1408 && GET_MODE (xop0
) != xmode0
&& GET_MODE (xop1
) != xmode1
1409 && GET_MODE (xop0
) == xmode1
&& GET_MODE (xop1
) == xmode1
)
1416 /* If we are optimizing, force expensive constants into a register. */
1417 xop0
= avoid_expensive_constant (xmode0
, binoptab
, 0, xop0
, unsignedp
);
1418 if (!shift_optab_p (binoptab
))
1419 xop1
= avoid_expensive_constant (xmode1
, binoptab
, 1, xop1
, unsignedp
);
1421 /* In case the insn wants input operands in modes different from
1422 those of the actual operands, convert the operands. It would
1423 seem that we don't need to convert CONST_INTs, but we do, so
1424 that they're properly zero-extended, sign-extended or truncated
1427 mode0
= GET_MODE (xop0
) != VOIDmode
? GET_MODE (xop0
) : mode
;
1428 if (xmode0
!= VOIDmode
&& xmode0
!= mode0
)
1430 xop0
= convert_modes (xmode0
, mode0
, xop0
, unsignedp
);
1434 mode1
= GET_MODE (xop1
) != VOIDmode
? GET_MODE (xop1
) : mode
;
1435 if (xmode1
!= VOIDmode
&& xmode1
!= mode1
)
1437 xop1
= convert_modes (xmode1
, mode1
, xop1
, unsignedp
);
1441 /* If operation is commutative,
1442 try to make the first operand a register.
1443 Even better, try to make it the same as the target.
1444 Also try to make the last operand a constant. */
1446 && swap_commutative_operands_with_target (target
, xop0
, xop1
))
1453 /* Now, if insn's predicates don't allow our operands, put them into
1456 if (binoptab
== vec_pack_trunc_optab
1457 || binoptab
== vec_pack_usat_optab
1458 || binoptab
== vec_pack_ssat_optab
1459 || binoptab
== vec_pack_ufix_trunc_optab
1460 || binoptab
== vec_pack_sfix_trunc_optab
)
1462 /* The mode of the result is different then the mode of the
1464 tmp_mode
= insn_data
[(int) icode
].operand
[0].mode
;
1465 if (GET_MODE_NUNITS (tmp_mode
) != 2 * GET_MODE_NUNITS (mode
))
1467 delete_insns_since (last
);
1474 create_output_operand (&ops
[0], target
, tmp_mode
);
1475 create_input_operand (&ops
[1], xop0
, mode0
);
1476 create_input_operand (&ops
[2], xop1
, mode1
);
1477 pat
= maybe_gen_insn (icode
, 3, ops
);
1480 /* If PAT is composed of more than one insn, try to add an appropriate
1481 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1482 operand, call expand_binop again, this time without a target. */
1483 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
1484 && ! add_equal_note (pat
, ops
[0].value
, optab_to_code (binoptab
),
1485 ops
[1].value
, ops
[2].value
))
1487 delete_insns_since (last
);
1488 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
1489 unsignedp
, methods
);
1493 return ops
[0].value
;
1495 delete_insns_since (last
);
1499 /* Generate code to perform an operation specified by BINOPTAB
1500 on operands OP0 and OP1, with result having machine-mode MODE.
1502 UNSIGNEDP is for the case where we have to widen the operands
1503 to perform the operation. It says to use zero-extension.
1505 If TARGET is nonzero, the value
1506 is generated there, if it is convenient to do so.
1507 In all cases an rtx is returned for the locus of the value;
1508 this may or may not be TARGET. */
1511 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
1512 rtx target
, int unsignedp
, enum optab_methods methods
)
1514 enum optab_methods next_methods
1515 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
1516 ? OPTAB_WIDEN
: methods
);
1517 enum mode_class mclass
;
1518 enum machine_mode wider_mode
;
1521 rtx entry_last
= get_last_insn ();
1524 mclass
= GET_MODE_CLASS (mode
);
1526 /* If subtracting an integer constant, convert this into an addition of
1527 the negated constant. */
1529 if (binoptab
== sub_optab
&& CONST_INT_P (op1
))
1531 op1
= negate_rtx (mode
, op1
);
1532 binoptab
= add_optab
;
1535 /* Record where to delete back to if we backtrack. */
1536 last
= get_last_insn ();
1538 /* If we can do it with a three-operand insn, do so. */
1540 if (methods
!= OPTAB_MUST_WIDEN
1541 && find_widening_optab_handler (binoptab
, mode
,
1542 widened_mode (mode
, op0
, op1
), 1)
1543 != CODE_FOR_nothing
)
1545 temp
= expand_binop_directly (mode
, binoptab
, op0
, op1
, target
,
1546 unsignedp
, methods
, last
);
1551 /* If we were trying to rotate, and that didn't work, try rotating
1552 the other direction before falling back to shifts and bitwise-or. */
1553 if (((binoptab
== rotl_optab
1554 && optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
1555 || (binoptab
== rotr_optab
1556 && optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
))
1557 && mclass
== MODE_INT
)
1559 optab otheroptab
= (binoptab
== rotl_optab
? rotr_optab
: rotl_optab
);
1561 unsigned int bits
= GET_MODE_PRECISION (mode
);
1563 if (CONST_INT_P (op1
))
1564 newop1
= GEN_INT (bits
- INTVAL (op1
));
1565 else if (targetm
.shift_truncation_mask (mode
) == bits
- 1)
1566 newop1
= negate_rtx (GET_MODE (op1
), op1
);
1568 newop1
= expand_binop (GET_MODE (op1
), sub_optab
,
1569 gen_int_mode (bits
, GET_MODE (op1
)), op1
,
1570 NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1572 temp
= expand_binop_directly (mode
, otheroptab
, op0
, newop1
,
1573 target
, unsignedp
, methods
, last
);
1578 /* If this is a multiply, see if we can do a widening operation that
1579 takes operands of this mode and makes a wider mode. */
1581 if (binoptab
== smul_optab
1582 && GET_MODE_2XWIDER_MODE (mode
) != VOIDmode
1583 && (widening_optab_handler ((unsignedp
? umul_widen_optab
1584 : smul_widen_optab
),
1585 GET_MODE_2XWIDER_MODE (mode
), mode
)
1586 != CODE_FOR_nothing
))
1588 temp
= expand_binop (GET_MODE_2XWIDER_MODE (mode
),
1589 unsignedp
? umul_widen_optab
: smul_widen_optab
,
1590 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1594 if (GET_MODE_CLASS (mode
) == MODE_INT
1595 && TRULY_NOOP_TRUNCATION_MODES_P (mode
, GET_MODE (temp
)))
1596 return gen_lowpart (mode
, temp
);
1598 return convert_to_mode (mode
, temp
, unsignedp
);
1602 /* If this is a vector shift by a scalar, see if we can do a vector
1603 shift by a vector. If so, broadcast the scalar into a vector. */
1604 if (mclass
== MODE_VECTOR_INT
)
1606 optab otheroptab
= unknown_optab
;
1608 if (binoptab
== ashl_optab
)
1609 otheroptab
= vashl_optab
;
1610 else if (binoptab
== ashr_optab
)
1611 otheroptab
= vashr_optab
;
1612 else if (binoptab
== lshr_optab
)
1613 otheroptab
= vlshr_optab
;
1614 else if (binoptab
== rotl_optab
)
1615 otheroptab
= vrotl_optab
;
1616 else if (binoptab
== rotr_optab
)
1617 otheroptab
= vrotr_optab
;
1619 if (otheroptab
&& optab_handler (otheroptab
, mode
) != CODE_FOR_nothing
)
1621 rtx vop1
= expand_vector_broadcast (mode
, op1
);
1624 temp
= expand_binop_directly (mode
, otheroptab
, op0
, vop1
,
1625 target
, unsignedp
, methods
, last
);
1632 /* Look for a wider mode of the same class for which we think we
1633 can open-code the operation. Check for a widening multiply at the
1634 wider mode as well. */
1636 if (CLASS_HAS_WIDER_MODES_P (mclass
)
1637 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
1638 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
1639 wider_mode
!= VOIDmode
;
1640 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1642 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
1643 || (binoptab
== smul_optab
1644 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
1645 && (find_widening_optab_handler ((unsignedp
1647 : smul_widen_optab
),
1648 GET_MODE_WIDER_MODE (wider_mode
),
1650 != CODE_FOR_nothing
)))
1652 rtx xop0
= op0
, xop1
= op1
;
1655 /* For certain integer operations, we need not actually extend
1656 the narrow operands, as long as we will truncate
1657 the results to the same narrowness. */
1659 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1660 || binoptab
== xor_optab
1661 || binoptab
== add_optab
|| binoptab
== sub_optab
1662 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1663 && mclass
== MODE_INT
)
1666 xop0
= avoid_expensive_constant (mode
, binoptab
, 0,
1668 if (binoptab
!= ashl_optab
)
1669 xop1
= avoid_expensive_constant (mode
, binoptab
, 1,
1673 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
1675 /* The second operand of a shift must always be extended. */
1676 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1677 no_extend
&& binoptab
!= ashl_optab
);
1679 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1680 unsignedp
, OPTAB_DIRECT
);
1683 if (mclass
!= MODE_INT
1684 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
1687 target
= gen_reg_rtx (mode
);
1688 convert_move (target
, temp
, 0);
1692 return gen_lowpart (mode
, temp
);
1695 delete_insns_since (last
);
1699 /* If operation is commutative,
1700 try to make the first operand a register.
1701 Even better, try to make it the same as the target.
1702 Also try to make the last operand a constant. */
1703 if (commutative_optab_p (binoptab
)
1704 && swap_commutative_operands_with_target (target
, op0
, op1
))
1711 /* These can be done a word at a time. */
1712 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
1713 && mclass
== MODE_INT
1714 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1715 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1720 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1721 won't be accurate, so use a new target. */
1725 || !valid_multiword_target_p (target
))
1726 target
= gen_reg_rtx (mode
);
1730 /* Do the actual arithmetic. */
1731 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1733 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1734 rtx x
= expand_binop (word_mode
, binoptab
,
1735 operand_subword_force (op0
, i
, mode
),
1736 operand_subword_force (op1
, i
, mode
),
1737 target_piece
, unsignedp
, next_methods
);
1742 if (target_piece
!= x
)
1743 emit_move_insn (target_piece
, x
);
1746 insns
= get_insns ();
1749 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1756 /* Synthesize double word shifts from single word shifts. */
1757 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
1758 || binoptab
== ashr_optab
)
1759 && mclass
== MODE_INT
1760 && (CONST_INT_P (op1
) || optimize_insn_for_speed_p ())
1761 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1762 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
)
1763 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
1764 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1765 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1767 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
1768 enum machine_mode op1_mode
;
1770 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1771 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1772 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1774 /* Apply the truncation to constant shifts. */
1775 if (double_shift_mask
> 0 && CONST_INT_P (op1
))
1776 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1778 if (op1
== CONST0_RTX (op1_mode
))
1781 /* Make sure that this is a combination that expand_doubleword_shift
1782 can handle. See the comments there for details. */
1783 if (double_shift_mask
== 0
1784 || (shift_mask
== BITS_PER_WORD
- 1
1785 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1788 rtx into_target
, outof_target
;
1789 rtx into_input
, outof_input
;
1790 int left_shift
, outof_word
;
1792 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1793 won't be accurate, so use a new target. */
1797 || !valid_multiword_target_p (target
))
1798 target
= gen_reg_rtx (mode
);
1802 /* OUTOF_* is the word we are shifting bits away from, and
1803 INTO_* is the word that we are shifting bits towards, thus
1804 they differ depending on the direction of the shift and
1805 WORDS_BIG_ENDIAN. */
1807 left_shift
= binoptab
== ashl_optab
;
1808 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1810 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1811 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1813 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1814 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1816 if (expand_doubleword_shift (op1_mode
, binoptab
,
1817 outof_input
, into_input
, op1
,
1818 outof_target
, into_target
,
1819 unsignedp
, next_methods
, shift_mask
))
1821 insns
= get_insns ();
1831 /* Synthesize double word rotates from single word shifts. */
1832 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1833 && mclass
== MODE_INT
1834 && CONST_INT_P (op1
)
1835 && GET_MODE_PRECISION (mode
) == 2 * BITS_PER_WORD
1836 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1837 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1840 rtx into_target
, outof_target
;
1841 rtx into_input
, outof_input
;
1843 int shift_count
, left_shift
, outof_word
;
1845 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1846 won't be accurate, so use a new target. Do this also if target is not
1847 a REG, first because having a register instead may open optimization
1848 opportunities, and second because if target and op0 happen to be MEMs
1849 designating the same location, we would risk clobbering it too early
1850 in the code sequence we generate below. */
1855 || !valid_multiword_target_p (target
))
1856 target
= gen_reg_rtx (mode
);
1860 shift_count
= INTVAL (op1
);
1862 /* OUTOF_* is the word we are shifting bits away from, and
1863 INTO_* is the word that we are shifting bits towards, thus
1864 they differ depending on the direction of the shift and
1865 WORDS_BIG_ENDIAN. */
1867 left_shift
= (binoptab
== rotl_optab
);
1868 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1870 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1871 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1873 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1874 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1876 if (shift_count
== BITS_PER_WORD
)
1878 /* This is just a word swap. */
1879 emit_move_insn (outof_target
, into_input
);
1880 emit_move_insn (into_target
, outof_input
);
1885 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1886 rtx first_shift_count
, second_shift_count
;
1887 optab reverse_unsigned_shift
, unsigned_shift
;
1889 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1890 ? lshr_optab
: ashl_optab
);
1892 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1893 ? ashl_optab
: lshr_optab
);
1895 if (shift_count
> BITS_PER_WORD
)
1897 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1898 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1902 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1903 second_shift_count
= GEN_INT (shift_count
);
1906 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1907 outof_input
, first_shift_count
,
1908 NULL_RTX
, unsignedp
, next_methods
);
1909 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1910 into_input
, second_shift_count
,
1911 NULL_RTX
, unsignedp
, next_methods
);
1913 if (into_temp1
!= 0 && into_temp2
!= 0)
1914 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1915 into_target
, unsignedp
, next_methods
);
1919 if (inter
!= 0 && inter
!= into_target
)
1920 emit_move_insn (into_target
, inter
);
1922 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1923 into_input
, first_shift_count
,
1924 NULL_RTX
, unsignedp
, next_methods
);
1925 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1926 outof_input
, second_shift_count
,
1927 NULL_RTX
, unsignedp
, next_methods
);
1929 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1930 inter
= expand_binop (word_mode
, ior_optab
,
1931 outof_temp1
, outof_temp2
,
1932 outof_target
, unsignedp
, next_methods
);
1934 if (inter
!= 0 && inter
!= outof_target
)
1935 emit_move_insn (outof_target
, inter
);
1938 insns
= get_insns ();
1948 /* These can be done a word at a time by propagating carries. */
1949 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1950 && mclass
== MODE_INT
1951 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1952 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1955 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1956 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1957 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1958 rtx xop0
, xop1
, xtarget
;
1960 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1961 value is one of those, use it. Otherwise, use 1 since it is the
1962 one easiest to get. */
1963 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1964 int normalizep
= STORE_FLAG_VALUE
;
1969 /* Prepare the operands. */
1970 xop0
= force_reg (mode
, op0
);
1971 xop1
= force_reg (mode
, op1
);
1973 xtarget
= gen_reg_rtx (mode
);
1975 if (target
== 0 || !REG_P (target
) || !valid_multiword_target_p (target
))
1978 /* Indicate for flow that the entire target reg is being set. */
1980 emit_clobber (xtarget
);
1982 /* Do the actual arithmetic. */
1983 for (i
= 0; i
< nwords
; i
++)
1985 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1986 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1987 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1988 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1991 /* Main add/subtract of the input operands. */
1992 x
= expand_binop (word_mode
, binoptab
,
1993 op0_piece
, op1_piece
,
1994 target_piece
, unsignedp
, next_methods
);
2000 /* Store carry from main add/subtract. */
2001 carry_out
= gen_reg_rtx (word_mode
);
2002 carry_out
= emit_store_flag_force (carry_out
,
2003 (binoptab
== add_optab
2006 word_mode
, 1, normalizep
);
2013 /* Add/subtract previous carry to main result. */
2014 newx
= expand_binop (word_mode
,
2015 normalizep
== 1 ? binoptab
: otheroptab
,
2017 NULL_RTX
, 1, next_methods
);
2021 /* Get out carry from adding/subtracting carry in. */
2022 rtx carry_tmp
= gen_reg_rtx (word_mode
);
2023 carry_tmp
= emit_store_flag_force (carry_tmp
,
2024 (binoptab
== add_optab
2027 word_mode
, 1, normalizep
);
2029 /* Logical-ior the two poss. carry together. */
2030 carry_out
= expand_binop (word_mode
, ior_optab
,
2031 carry_out
, carry_tmp
,
2032 carry_out
, 0, next_methods
);
2036 emit_move_insn (target_piece
, newx
);
2040 if (x
!= target_piece
)
2041 emit_move_insn (target_piece
, x
);
2044 carry_in
= carry_out
;
2047 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
2049 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
2050 || ! rtx_equal_p (target
, xtarget
))
2052 rtx temp
= emit_move_insn (target
, xtarget
);
2054 set_dst_reg_note (temp
, REG_EQUAL
,
2055 gen_rtx_fmt_ee (optab_to_code (binoptab
),
2056 mode
, copy_rtx (xop0
),
2067 delete_insns_since (last
);
2070 /* Attempt to synthesize double word multiplies using a sequence of word
2071 mode multiplications. We first attempt to generate a sequence using a
2072 more efficient unsigned widening multiply, and if that fails we then
2073 try using a signed widening multiply. */
2075 if (binoptab
== smul_optab
2076 && mclass
== MODE_INT
2077 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
2078 && optab_handler (smul_optab
, word_mode
) != CODE_FOR_nothing
2079 && optab_handler (add_optab
, word_mode
) != CODE_FOR_nothing
)
2081 rtx product
= NULL_RTX
;
2082 if (widening_optab_handler (umul_widen_optab
, mode
, word_mode
)
2083 != CODE_FOR_nothing
)
2085 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2088 delete_insns_since (last
);
2091 if (product
== NULL_RTX
2092 && widening_optab_handler (smul_widen_optab
, mode
, word_mode
)
2093 != CODE_FOR_nothing
)
2095 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2098 delete_insns_since (last
);
2101 if (product
!= NULL_RTX
)
2103 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
)
2105 temp
= emit_move_insn (target
? target
: product
, product
);
2106 set_dst_reg_note (temp
,
2108 gen_rtx_fmt_ee (MULT
, mode
,
2111 target
? target
: product
);
2117 /* It can't be open-coded in this mode.
2118 Use a library call if one is available and caller says that's ok. */
2120 libfunc
= optab_libfunc (binoptab
, mode
);
2122 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
2126 enum machine_mode op1_mode
= mode
;
2131 if (shift_optab_p (binoptab
))
2133 op1_mode
= targetm
.libgcc_shift_count_mode ();
2134 /* Specify unsigned here,
2135 since negative shift counts are meaningless. */
2136 op1x
= convert_to_mode (op1_mode
, op1
, 1);
2139 if (GET_MODE (op0
) != VOIDmode
2140 && GET_MODE (op0
) != mode
)
2141 op0
= convert_to_mode (mode
, op0
, unsignedp
);
2143 /* Pass 1 for NO_QUEUE so we don't lose any increments
2144 if the libcall is cse'd or moved. */
2145 value
= emit_library_call_value (libfunc
,
2146 NULL_RTX
, LCT_CONST
, mode
, 2,
2147 op0
, mode
, op1x
, op1_mode
);
2149 insns
= get_insns ();
2152 target
= gen_reg_rtx (mode
);
2153 emit_libcall_block_1 (insns
, target
, value
,
2154 gen_rtx_fmt_ee (optab_to_code (binoptab
),
2156 trapv_binoptab_p (binoptab
));
2161 delete_insns_since (last
);
2163 /* It can't be done in this mode. Can we do it in a wider mode? */
2165 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
2166 || methods
== OPTAB_MUST_WIDEN
))
2168 /* Caller says, don't even try. */
2169 delete_insns_since (entry_last
);
2173 /* Compute the value of METHODS to pass to recursive calls.
2174 Don't allow widening to be tried recursively. */
2176 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
2178 /* Look for a wider mode of the same class for which it appears we can do
2181 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2183 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2184 wider_mode
!= VOIDmode
;
2185 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2187 if (find_widening_optab_handler (binoptab
, wider_mode
, mode
, 1)
2189 || (methods
== OPTAB_LIB
2190 && optab_libfunc (binoptab
, wider_mode
)))
2192 rtx xop0
= op0
, xop1
= op1
;
2195 /* For certain integer operations, we need not actually extend
2196 the narrow operands, as long as we will truncate
2197 the results to the same narrowness. */
2199 if ((binoptab
== ior_optab
|| binoptab
== and_optab
2200 || binoptab
== xor_optab
2201 || binoptab
== add_optab
|| binoptab
== sub_optab
2202 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
2203 && mclass
== MODE_INT
)
2206 xop0
= widen_operand (xop0
, wider_mode
, mode
,
2207 unsignedp
, no_extend
);
2209 /* The second operand of a shift must always be extended. */
2210 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
2211 no_extend
&& binoptab
!= ashl_optab
);
2213 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
2214 unsignedp
, methods
);
2217 if (mclass
!= MODE_INT
2218 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
2221 target
= gen_reg_rtx (mode
);
2222 convert_move (target
, temp
, 0);
2226 return gen_lowpart (mode
, temp
);
2229 delete_insns_since (last
);
2234 delete_insns_since (entry_last
);
2238 /* Expand a binary operator which has both signed and unsigned forms.
2239 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2242 If we widen unsigned operands, we may use a signed wider operation instead
2243 of an unsigned wider operation, since the result would be the same. */
2246 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2247 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2248 enum optab_methods methods
)
2251 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2254 /* Do it without widening, if possible. */
2255 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2256 unsignedp
, OPTAB_DIRECT
);
2257 if (temp
|| methods
== OPTAB_DIRECT
)
2260 /* Try widening to a signed int. Disable any direct use of any
2261 signed insn in the current mode. */
2262 save_enable
= swap_optab_enable (soptab
, mode
, false);
2264 temp
= expand_binop (mode
, soptab
, op0
, op1
, target
,
2265 unsignedp
, OPTAB_WIDEN
);
2267 /* For unsigned operands, try widening to an unsigned int. */
2268 if (!temp
&& unsignedp
)
2269 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2270 unsignedp
, OPTAB_WIDEN
);
2271 if (temp
|| methods
== OPTAB_WIDEN
)
2274 /* Use the right width libcall if that exists. */
2275 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2276 unsignedp
, OPTAB_LIB
);
2277 if (temp
|| methods
== OPTAB_LIB
)
2280 /* Must widen and use a libcall, use either signed or unsigned. */
2281 temp
= expand_binop (mode
, soptab
, op0
, op1
, target
,
2282 unsignedp
, methods
);
2283 if (!temp
&& unsignedp
)
2284 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2285 unsignedp
, methods
);
2288 /* Undo the fiddling above. */
2290 swap_optab_enable (soptab
, mode
, true);
2294 /* Generate code to perform an operation specified by UNOPPTAB
2295 on operand OP0, with two results to TARG0 and TARG1.
2296 We assume that the order of the operands for the instruction
2297 is TARG0, TARG1, OP0.
2299 Either TARG0 or TARG1 may be zero, but what that means is that
2300 the result is not actually wanted. We will generate it into
2301 a dummy pseudo-reg and discard it. They may not both be zero.
2303 Returns 1 if this operation can be performed; 0 if not. */
2306 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2309 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2310 enum mode_class mclass
;
2311 enum machine_mode wider_mode
;
2312 rtx entry_last
= get_last_insn ();
2315 mclass
= GET_MODE_CLASS (mode
);
2318 targ0
= gen_reg_rtx (mode
);
2320 targ1
= gen_reg_rtx (mode
);
2322 /* Record where to go back to if we fail. */
2323 last
= get_last_insn ();
2325 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2327 struct expand_operand ops
[3];
2328 enum insn_code icode
= optab_handler (unoptab
, mode
);
2330 create_fixed_operand (&ops
[0], targ0
);
2331 create_fixed_operand (&ops
[1], targ1
);
2332 create_convert_operand_from (&ops
[2], op0
, mode
, unsignedp
);
2333 if (maybe_expand_insn (icode
, 3, ops
))
2337 /* It can't be done in this mode. Can we do it in a wider mode? */
2339 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2341 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2342 wider_mode
!= VOIDmode
;
2343 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2345 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2347 rtx t0
= gen_reg_rtx (wider_mode
);
2348 rtx t1
= gen_reg_rtx (wider_mode
);
2349 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2351 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2353 convert_move (targ0
, t0
, unsignedp
);
2354 convert_move (targ1
, t1
, unsignedp
);
2358 delete_insns_since (last
);
2363 delete_insns_since (entry_last
);
2367 /* Generate code to perform an operation specified by BINOPTAB
2368 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2369 We assume that the order of the operands for the instruction
2370 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2371 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2373 Either TARG0 or TARG1 may be zero, but what that means is that
2374 the result is not actually wanted. We will generate it into
2375 a dummy pseudo-reg and discard it. They may not both be zero.
2377 Returns 1 if this operation can be performed; 0 if not. */
2380 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2383 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2384 enum mode_class mclass
;
2385 enum machine_mode wider_mode
;
2386 rtx entry_last
= get_last_insn ();
2389 mclass
= GET_MODE_CLASS (mode
);
2392 targ0
= gen_reg_rtx (mode
);
2394 targ1
= gen_reg_rtx (mode
);
2396 /* Record where to go back to if we fail. */
2397 last
= get_last_insn ();
2399 if (optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
2401 struct expand_operand ops
[4];
2402 enum insn_code icode
= optab_handler (binoptab
, mode
);
2403 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2404 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2405 rtx xop0
= op0
, xop1
= op1
;
2407 /* If we are optimizing, force expensive constants into a register. */
2408 xop0
= avoid_expensive_constant (mode0
, binoptab
, 0, xop0
, unsignedp
);
2409 xop1
= avoid_expensive_constant (mode1
, binoptab
, 1, xop1
, unsignedp
);
2411 create_fixed_operand (&ops
[0], targ0
);
2412 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2413 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
2414 create_fixed_operand (&ops
[3], targ1
);
2415 if (maybe_expand_insn (icode
, 4, ops
))
2417 delete_insns_since (last
);
2420 /* It can't be done in this mode. Can we do it in a wider mode? */
2422 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2424 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2425 wider_mode
!= VOIDmode
;
2426 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2428 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
)
2430 rtx t0
= gen_reg_rtx (wider_mode
);
2431 rtx t1
= gen_reg_rtx (wider_mode
);
2432 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2433 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2435 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2438 convert_move (targ0
, t0
, unsignedp
);
2439 convert_move (targ1
, t1
, unsignedp
);
2443 delete_insns_since (last
);
2448 delete_insns_since (entry_last
);
2452 /* Expand the two-valued library call indicated by BINOPTAB, but
2453 preserve only one of the values. If TARG0 is non-NULL, the first
2454 value is placed into TARG0; otherwise the second value is placed
2455 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2456 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2457 This routine assumes that the value returned by the library call is
2458 as if the return value was of an integral mode twice as wide as the
2459 mode of OP0. Returns 1 if the call was successful. */
2462 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
2463 rtx targ0
, rtx targ1
, enum rtx_code code
)
2465 enum machine_mode mode
;
2466 enum machine_mode libval_mode
;
2471 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2472 gcc_assert (!targ0
!= !targ1
);
2474 mode
= GET_MODE (op0
);
2475 libfunc
= optab_libfunc (binoptab
, mode
);
2479 /* The value returned by the library function will have twice as
2480 many bits as the nominal MODE. */
2481 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
2484 libval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
2488 /* Get the part of VAL containing the value that we want. */
2489 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
2490 targ0
? 0 : GET_MODE_SIZE (mode
));
2491 insns
= get_insns ();
2493 /* Move the into the desired location. */
2494 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
2495 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
2501 /* Wrapper around expand_unop which takes an rtx code to specify
2502 the operation to perform, not an optab pointer. All other
2503 arguments are the same. */
2505 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2506 rtx target
, int unsignedp
)
2508 optab unop
= code_to_optab (code
);
2511 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2517 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)).
2519 A similar operation can be used for clrsb. UNOPTAB says which operation
2520 we are trying to expand. */
2522 widen_leading (enum machine_mode mode
, rtx op0
, rtx target
, optab unoptab
)
2524 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2525 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2527 enum machine_mode wider_mode
;
2528 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2529 wider_mode
!= VOIDmode
;
2530 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2532 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2534 rtx xop0
, temp
, last
;
2536 last
= get_last_insn ();
2539 target
= gen_reg_rtx (mode
);
2540 xop0
= widen_operand (op0
, wider_mode
, mode
,
2541 unoptab
!= clrsb_optab
, false);
2542 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2543 unoptab
!= clrsb_optab
);
2546 (wider_mode
, sub_optab
, temp
,
2547 gen_int_mode (GET_MODE_PRECISION (wider_mode
)
2548 - GET_MODE_PRECISION (mode
),
2550 target
, true, OPTAB_DIRECT
);
2552 delete_insns_since (last
);
2561 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2562 quantities, choosing which based on whether the high word is nonzero. */
2564 expand_doubleword_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2566 rtx xop0
= force_reg (mode
, op0
);
2567 rtx subhi
= gen_highpart (word_mode
, xop0
);
2568 rtx sublo
= gen_lowpart (word_mode
, xop0
);
2569 rtx hi0_label
= gen_label_rtx ();
2570 rtx after_label
= gen_label_rtx ();
2571 rtx seq
, temp
, result
;
2573 /* If we were not given a target, use a word_mode register, not a
2574 'mode' register. The result will fit, and nobody is expecting
2575 anything bigger (the return type of __builtin_clz* is int). */
2577 target
= gen_reg_rtx (word_mode
);
2579 /* In any case, write to a word_mode scratch in both branches of the
2580 conditional, so we can ensure there is a single move insn setting
2581 'target' to tag a REG_EQUAL note on. */
2582 result
= gen_reg_rtx (word_mode
);
2586 /* If the high word is not equal to zero,
2587 then clz of the full value is clz of the high word. */
2588 emit_cmp_and_jump_insns (subhi
, CONST0_RTX (word_mode
), EQ
, 0,
2589 word_mode
, true, hi0_label
);
2591 temp
= expand_unop_direct (word_mode
, clz_optab
, subhi
, result
, true);
2596 convert_move (result
, temp
, true);
2598 emit_jump_insn (gen_jump (after_label
));
2601 /* Else clz of the full value is clz of the low word plus the number
2602 of bits in the high word. */
2603 emit_label (hi0_label
);
2605 temp
= expand_unop_direct (word_mode
, clz_optab
, sublo
, 0, true);
2608 temp
= expand_binop (word_mode
, add_optab
, temp
,
2609 gen_int_mode (GET_MODE_BITSIZE (word_mode
), word_mode
),
2610 result
, true, OPTAB_DIRECT
);
2614 convert_move (result
, temp
, true);
2616 emit_label (after_label
);
2617 convert_move (target
, result
, true);
2622 add_equal_note (seq
, target
, CLZ
, xop0
, 0);
2634 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2636 widen_bswap (enum machine_mode mode
, rtx op0
, rtx target
)
2638 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2639 enum machine_mode wider_mode
;
2642 if (!CLASS_HAS_WIDER_MODES_P (mclass
))
2645 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2646 wider_mode
!= VOIDmode
;
2647 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2648 if (optab_handler (bswap_optab
, wider_mode
) != CODE_FOR_nothing
)
2653 last
= get_last_insn ();
2655 x
= widen_operand (op0
, wider_mode
, mode
, true, true);
2656 x
= expand_unop (wider_mode
, bswap_optab
, x
, NULL_RTX
, true);
2658 gcc_assert (GET_MODE_PRECISION (wider_mode
) == GET_MODE_BITSIZE (wider_mode
)
2659 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
));
2661 x
= expand_shift (RSHIFT_EXPR
, wider_mode
, x
,
2662 GET_MODE_BITSIZE (wider_mode
)
2663 - GET_MODE_BITSIZE (mode
),
2669 target
= gen_reg_rtx (mode
);
2670 emit_move_insn (target
, gen_lowpart (mode
, x
));
2673 delete_insns_since (last
);
2678 /* Try calculating bswap as two bswaps of two word-sized operands. */
2681 expand_doubleword_bswap (enum machine_mode mode
, rtx op
, rtx target
)
2685 t1
= expand_unop (word_mode
, bswap_optab
,
2686 operand_subword_force (op
, 0, mode
), NULL_RTX
, true);
2687 t0
= expand_unop (word_mode
, bswap_optab
,
2688 operand_subword_force (op
, 1, mode
), NULL_RTX
, true);
2690 if (target
== 0 || !valid_multiword_target_p (target
))
2691 target
= gen_reg_rtx (mode
);
2693 emit_clobber (target
);
2694 emit_move_insn (operand_subword (target
, 0, 1, mode
), t0
);
2695 emit_move_insn (operand_subword (target
, 1, 1, mode
), t1
);
2700 /* Try calculating (parity x) as (and (popcount x) 1), where
2701 popcount can also be done in a wider mode. */
2703 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2705 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2706 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2708 enum machine_mode wider_mode
;
2709 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2710 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2712 if (optab_handler (popcount_optab
, wider_mode
) != CODE_FOR_nothing
)
2714 rtx xop0
, temp
, last
;
2716 last
= get_last_insn ();
2719 target
= gen_reg_rtx (mode
);
2720 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2721 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2724 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2725 target
, true, OPTAB_DIRECT
);
2727 delete_insns_since (last
);
2736 /* Try calculating ctz(x) as K - clz(x & -x) ,
2737 where K is GET_MODE_PRECISION(mode) - 1.
2739 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2740 don't have to worry about what the hardware does in that case. (If
2741 the clz instruction produces the usual value at 0, which is K, the
2742 result of this code sequence will be -1; expand_ffs, below, relies
2743 on this. It might be nice to have it be K instead, for consistency
2744 with the (very few) processors that provide a ctz with a defined
2745 value, but that would take one more instruction, and it would be
2746 less convenient for expand_ffs anyway. */
2749 expand_ctz (enum machine_mode mode
, rtx op0
, rtx target
)
2753 if (optab_handler (clz_optab
, mode
) == CODE_FOR_nothing
)
2758 temp
= expand_unop_direct (mode
, neg_optab
, op0
, NULL_RTX
, true);
2760 temp
= expand_binop (mode
, and_optab
, op0
, temp
, NULL_RTX
,
2761 true, OPTAB_DIRECT
);
2763 temp
= expand_unop_direct (mode
, clz_optab
, temp
, NULL_RTX
, true);
2765 temp
= expand_binop (mode
, sub_optab
,
2766 gen_int_mode (GET_MODE_PRECISION (mode
) - 1, mode
),
2768 true, OPTAB_DIRECT
);
2778 add_equal_note (seq
, temp
, CTZ
, op0
, 0);
2784 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2785 else with the sequence used by expand_clz.
2787 The ffs builtin promises to return zero for a zero value and ctz/clz
2788 may have an undefined value in that case. If they do not give us a
2789 convenient value, we have to generate a test and branch. */
2791 expand_ffs (enum machine_mode mode
, rtx op0
, rtx target
)
2793 HOST_WIDE_INT val
= 0;
2794 bool defined_at_zero
= false;
2797 if (optab_handler (ctz_optab
, mode
) != CODE_FOR_nothing
)
2801 temp
= expand_unop_direct (mode
, ctz_optab
, op0
, 0, true);
2805 defined_at_zero
= (CTZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2);
2807 else if (optab_handler (clz_optab
, mode
) != CODE_FOR_nothing
)
2810 temp
= expand_ctz (mode
, op0
, 0);
2814 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2)
2816 defined_at_zero
= true;
2817 val
= (GET_MODE_PRECISION (mode
) - 1) - val
;
2823 if (defined_at_zero
&& val
== -1)
2824 /* No correction needed at zero. */;
2827 /* We don't try to do anything clever with the situation found
2828 on some processors (eg Alpha) where ctz(0:mode) ==
2829 bitsize(mode). If someone can think of a way to send N to -1
2830 and leave alone all values in the range 0..N-1 (where N is a
2831 power of two), cheaper than this test-and-branch, please add it.
2833 The test-and-branch is done after the operation itself, in case
2834 the operation sets condition codes that can be recycled for this.
2835 (This is true on i386, for instance.) */
2837 rtx nonzero_label
= gen_label_rtx ();
2838 emit_cmp_and_jump_insns (op0
, CONST0_RTX (mode
), NE
, 0,
2839 mode
, true, nonzero_label
);
2841 convert_move (temp
, GEN_INT (-1), false);
2842 emit_label (nonzero_label
);
2845 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2846 to produce a value in the range 0..bitsize. */
2847 temp
= expand_binop (mode
, add_optab
, temp
, gen_int_mode (1, mode
),
2848 target
, false, OPTAB_DIRECT
);
2855 add_equal_note (seq
, temp
, FFS
, op0
, 0);
2864 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2865 conditions, VAL may already be a SUBREG against which we cannot generate
2866 a further SUBREG. In this case, we expect forcing the value into a
2867 register will work around the situation. */
2870 lowpart_subreg_maybe_copy (enum machine_mode omode
, rtx val
,
2871 enum machine_mode imode
)
2874 ret
= lowpart_subreg (omode
, val
, imode
);
2877 val
= force_reg (imode
, val
);
2878 ret
= lowpart_subreg (omode
, val
, imode
);
2879 gcc_assert (ret
!= NULL
);
2884 /* Expand a floating point absolute value or negation operation via a
2885 logical operation on the sign bit. */
2888 expand_absneg_bit (enum rtx_code code
, enum machine_mode mode
,
2889 rtx op0
, rtx target
)
2891 const struct real_format
*fmt
;
2892 int bitpos
, word
, nwords
, i
;
2893 enum machine_mode imode
;
2896 /* The format has to have a simple sign bit. */
2897 fmt
= REAL_MODE_FORMAT (mode
);
2901 bitpos
= fmt
->signbit_rw
;
2905 /* Don't create negative zeros if the format doesn't support them. */
2906 if (code
== NEG
&& !fmt
->has_signed_zero
)
2909 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
2911 imode
= int_mode_for_mode (mode
);
2912 if (imode
== BLKmode
)
2921 if (FLOAT_WORDS_BIG_ENDIAN
)
2922 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
2924 word
= bitpos
/ BITS_PER_WORD
;
2925 bitpos
= bitpos
% BITS_PER_WORD
;
2926 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
2929 wide_int mask
= wi::set_bit_in_zero (bitpos
, GET_MODE_PRECISION (imode
));
2935 || (nwords
> 1 && !valid_multiword_target_p (target
)))
2936 target
= gen_reg_rtx (mode
);
2942 for (i
= 0; i
< nwords
; ++i
)
2944 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
2945 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
2949 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2951 immed_wide_int_const (mask
, imode
),
2952 targ_piece
, 1, OPTAB_LIB_WIDEN
);
2953 if (temp
!= targ_piece
)
2954 emit_move_insn (targ_piece
, temp
);
2957 emit_move_insn (targ_piece
, op0_piece
);
2960 insns
= get_insns ();
2967 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2968 gen_lowpart (imode
, op0
),
2969 immed_wide_int_const (mask
, imode
),
2970 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
2971 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
2973 set_dst_reg_note (get_last_insn (), REG_EQUAL
,
2974 gen_rtx_fmt_e (code
, mode
, copy_rtx (op0
)),
2981 /* As expand_unop, but will fail rather than attempt the operation in a
2982 different mode or with a libcall. */
2984 expand_unop_direct (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2987 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2989 struct expand_operand ops
[2];
2990 enum insn_code icode
= optab_handler (unoptab
, mode
);
2991 rtx last
= get_last_insn ();
2994 create_output_operand (&ops
[0], target
, mode
);
2995 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2996 pat
= maybe_gen_insn (icode
, 2, ops
);
2999 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3000 && ! add_equal_note (pat
, ops
[0].value
, optab_to_code (unoptab
),
3001 ops
[1].value
, NULL_RTX
))
3003 delete_insns_since (last
);
3004 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
3009 return ops
[0].value
;
3015 /* Generate code to perform an operation specified by UNOPTAB
3016 on operand OP0, with result having machine-mode MODE.
3018 UNSIGNEDP is for the case where we have to widen the operands
3019 to perform the operation. It says to use zero-extension.
3021 If TARGET is nonzero, the value
3022 is generated there, if it is convenient to do so.
3023 In all cases an rtx is returned for the locus of the value;
3024 this may or may not be TARGET. */
3027 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3030 enum mode_class mclass
= GET_MODE_CLASS (mode
);
3031 enum machine_mode wider_mode
;
3035 temp
= expand_unop_direct (mode
, unoptab
, op0
, target
, unsignedp
);
3039 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3041 /* Widening (or narrowing) clz needs special treatment. */
3042 if (unoptab
== clz_optab
)
3044 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3048 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3049 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3051 temp
= expand_doubleword_clz (mode
, op0
, target
);
3059 if (unoptab
== clrsb_optab
)
3061 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3067 /* Widening (or narrowing) bswap needs special treatment. */
3068 if (unoptab
== bswap_optab
)
3070 /* HImode is special because in this mode BSWAP is equivalent to ROTATE
3071 or ROTATERT. First try these directly; if this fails, then try the
3072 obvious pair of shifts with allowed widening, as this will probably
3073 be always more efficient than the other fallback methods. */
3076 rtx last
, temp1
, temp2
;
3078 if (optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
)
3080 temp
= expand_binop (mode
, rotl_optab
, op0
, GEN_INT (8), target
,
3081 unsignedp
, OPTAB_DIRECT
);
3086 if (optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
3088 temp
= expand_binop (mode
, rotr_optab
, op0
, GEN_INT (8), target
,
3089 unsignedp
, OPTAB_DIRECT
);
3094 last
= get_last_insn ();
3096 temp1
= expand_binop (mode
, ashl_optab
, op0
, GEN_INT (8), NULL_RTX
,
3097 unsignedp
, OPTAB_WIDEN
);
3098 temp2
= expand_binop (mode
, lshr_optab
, op0
, GEN_INT (8), NULL_RTX
,
3099 unsignedp
, OPTAB_WIDEN
);
3102 temp
= expand_binop (mode
, ior_optab
, temp1
, temp2
, target
,
3103 unsignedp
, OPTAB_WIDEN
);
3108 delete_insns_since (last
);
3111 temp
= widen_bswap (mode
, op0
, target
);
3115 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3116 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3118 temp
= expand_doubleword_bswap (mode
, op0
, target
);
3126 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3127 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3128 wider_mode
!= VOIDmode
;
3129 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3131 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
3134 rtx last
= get_last_insn ();
3136 /* For certain operations, we need not actually extend
3137 the narrow operand, as long as we will truncate the
3138 results to the same narrowness. */
3140 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3141 (unoptab
== neg_optab
3142 || unoptab
== one_cmpl_optab
)
3143 && mclass
== MODE_INT
);
3145 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3150 if (mclass
!= MODE_INT
3151 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
3154 target
= gen_reg_rtx (mode
);
3155 convert_move (target
, temp
, 0);
3159 return gen_lowpart (mode
, temp
);
3162 delete_insns_since (last
);
3166 /* These can be done a word at a time. */
3167 if (unoptab
== one_cmpl_optab
3168 && mclass
== MODE_INT
3169 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
3170 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3175 if (target
== 0 || target
== op0
|| !valid_multiword_target_p (target
))
3176 target
= gen_reg_rtx (mode
);
3180 /* Do the actual arithmetic. */
3181 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
3183 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
3184 rtx x
= expand_unop (word_mode
, unoptab
,
3185 operand_subword_force (op0
, i
, mode
),
3186 target_piece
, unsignedp
);
3188 if (target_piece
!= x
)
3189 emit_move_insn (target_piece
, x
);
3192 insns
= get_insns ();
3199 if (optab_to_code (unoptab
) == NEG
)
3201 /* Try negating floating point values by flipping the sign bit. */
3202 if (SCALAR_FLOAT_MODE_P (mode
))
3204 temp
= expand_absneg_bit (NEG
, mode
, op0
, target
);
3209 /* If there is no negation pattern, and we have no negative zero,
3210 try subtracting from zero. */
3211 if (!HONOR_SIGNED_ZEROS (mode
))
3213 temp
= expand_binop (mode
, (unoptab
== negv_optab
3214 ? subv_optab
: sub_optab
),
3215 CONST0_RTX (mode
), op0
, target
,
3216 unsignedp
, OPTAB_DIRECT
);
3222 /* Try calculating parity (x) as popcount (x) % 2. */
3223 if (unoptab
== parity_optab
)
3225 temp
= expand_parity (mode
, op0
, target
);
3230 /* Try implementing ffs (x) in terms of clz (x). */
3231 if (unoptab
== ffs_optab
)
3233 temp
= expand_ffs (mode
, op0
, target
);
3238 /* Try implementing ctz (x) in terms of clz (x). */
3239 if (unoptab
== ctz_optab
)
3241 temp
= expand_ctz (mode
, op0
, target
);
3247 /* Now try a library call in this mode. */
3248 libfunc
= optab_libfunc (unoptab
, mode
);
3254 enum machine_mode outmode
= mode
;
3256 /* All of these functions return small values. Thus we choose to
3257 have them return something that isn't a double-word. */
3258 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
3259 || unoptab
== clrsb_optab
|| unoptab
== popcount_optab
3260 || unoptab
== parity_optab
)
3262 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
),
3263 optab_libfunc (unoptab
, mode
)));
3267 /* Pass 1 for NO_QUEUE so we don't lose any increments
3268 if the libcall is cse'd or moved. */
3269 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, outmode
,
3271 insns
= get_insns ();
3274 target
= gen_reg_rtx (outmode
);
3275 eq_value
= gen_rtx_fmt_e (optab_to_code (unoptab
), mode
, op0
);
3276 if (GET_MODE_SIZE (outmode
) < GET_MODE_SIZE (mode
))
3277 eq_value
= simplify_gen_unary (TRUNCATE
, outmode
, eq_value
, mode
);
3278 else if (GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (mode
))
3279 eq_value
= simplify_gen_unary (ZERO_EXTEND
, outmode
, eq_value
, mode
);
3280 emit_libcall_block_1 (insns
, target
, value
, eq_value
,
3281 trapv_unoptab_p (unoptab
));
3286 /* It can't be done in this mode. Can we do it in a wider mode? */
3288 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3290 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3291 wider_mode
!= VOIDmode
;
3292 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3294 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
3295 || optab_libfunc (unoptab
, wider_mode
))
3298 rtx last
= get_last_insn ();
3300 /* For certain operations, we need not actually extend
3301 the narrow operand, as long as we will truncate the
3302 results to the same narrowness. */
3303 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3304 (unoptab
== neg_optab
3305 || unoptab
== one_cmpl_optab
3306 || unoptab
== bswap_optab
)
3307 && mclass
== MODE_INT
);
3309 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3312 /* If we are generating clz using wider mode, adjust the
3313 result. Similarly for clrsb. */
3314 if ((unoptab
== clz_optab
|| unoptab
== clrsb_optab
)
3317 (wider_mode
, sub_optab
, temp
,
3318 gen_int_mode (GET_MODE_PRECISION (wider_mode
)
3319 - GET_MODE_PRECISION (mode
),
3321 target
, true, OPTAB_DIRECT
);
3323 /* Likewise for bswap. */
3324 if (unoptab
== bswap_optab
&& temp
!= 0)
3326 gcc_assert (GET_MODE_PRECISION (wider_mode
)
3327 == GET_MODE_BITSIZE (wider_mode
)
3328 && GET_MODE_PRECISION (mode
)
3329 == GET_MODE_BITSIZE (mode
));
3331 temp
= expand_shift (RSHIFT_EXPR
, wider_mode
, temp
,
3332 GET_MODE_BITSIZE (wider_mode
)
3333 - GET_MODE_BITSIZE (mode
),
3339 if (mclass
!= MODE_INT
)
3342 target
= gen_reg_rtx (mode
);
3343 convert_move (target
, temp
, 0);
3347 return gen_lowpart (mode
, temp
);
3350 delete_insns_since (last
);
3355 /* One final attempt at implementing negation via subtraction,
3356 this time allowing widening of the operand. */
3357 if (optab_to_code (unoptab
) == NEG
&& !HONOR_SIGNED_ZEROS (mode
))
3360 temp
= expand_binop (mode
,
3361 unoptab
== negv_optab
? subv_optab
: sub_optab
,
3362 CONST0_RTX (mode
), op0
,
3363 target
, unsignedp
, OPTAB_LIB_WIDEN
);
3371 /* Emit code to compute the absolute value of OP0, with result to
3372 TARGET if convenient. (TARGET may be 0.) The return value says
3373 where the result actually is to be found.
3375 MODE is the mode of the operand; the mode of the result is
3376 different but can be deduced from MODE.
3381 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
3382 int result_unsignedp
)
3387 result_unsignedp
= 1;
3389 /* First try to do it with a special abs instruction. */
3390 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
3395 /* For floating point modes, try clearing the sign bit. */
3396 if (SCALAR_FLOAT_MODE_P (mode
))
3398 temp
= expand_absneg_bit (ABS
, mode
, op0
, target
);
3403 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3404 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
3405 && !HONOR_SIGNED_ZEROS (mode
))
3407 rtx last
= get_last_insn ();
3409 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
3411 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3417 delete_insns_since (last
);
3420 /* If this machine has expensive jumps, we can do integer absolute
3421 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3422 where W is the width of MODE. */
3424 if (GET_MODE_CLASS (mode
) == MODE_INT
3425 && BRANCH_COST (optimize_insn_for_speed_p (),
3428 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3429 GET_MODE_PRECISION (mode
) - 1,
3432 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3435 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
3436 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
3446 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3447 int result_unsignedp
, int safe
)
3452 result_unsignedp
= 1;
3454 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
3458 /* If that does not win, use conditional jump and negate. */
3460 /* It is safe to use the target if it is the same
3461 as the source if this is also a pseudo register */
3462 if (op0
== target
&& REG_P (op0
)
3463 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3466 op1
= gen_label_rtx ();
3467 if (target
== 0 || ! safe
3468 || GET_MODE (target
) != mode
3469 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
3471 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
3472 target
= gen_reg_rtx (mode
);
3474 emit_move_insn (target
, op0
);
3477 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3478 NULL_RTX
, NULL_RTX
, op1
, -1);
3480 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3483 emit_move_insn (target
, op0
);
3489 /* Emit code to compute the one's complement absolute value of OP0
3490 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3491 (TARGET may be NULL_RTX.) The return value says where the result
3492 actually is to be found.
3494 MODE is the mode of the operand; the mode of the result is
3495 different but can be deduced from MODE. */
3498 expand_one_cmpl_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
)
3502 /* Not applicable for floating point modes. */
3503 if (FLOAT_MODE_P (mode
))
3506 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3507 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
)
3509 rtx last
= get_last_insn ();
3511 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, NULL_RTX
, 0);
3513 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3519 delete_insns_since (last
);
3522 /* If this machine has expensive jumps, we can do one's complement
3523 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3525 if (GET_MODE_CLASS (mode
) == MODE_INT
3526 && BRANCH_COST (optimize_insn_for_speed_p (),
3529 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3530 GET_MODE_PRECISION (mode
) - 1,
3533 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3543 /* A subroutine of expand_copysign, perform the copysign operation using the
3544 abs and neg primitives advertised to exist on the target. The assumption
3545 is that we have a split register file, and leaving op0 in fp registers,
3546 and not playing with subregs so much, will help the register allocator. */
3549 expand_copysign_absneg (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3550 int bitpos
, bool op0_is_abs
)
3552 enum machine_mode imode
;
3553 enum insn_code icode
;
3559 /* Check if the back end provides an insn that handles signbit for the
3561 icode
= optab_handler (signbit_optab
, mode
);
3562 if (icode
!= CODE_FOR_nothing
)
3564 imode
= insn_data
[(int) icode
].operand
[0].mode
;
3565 sign
= gen_reg_rtx (imode
);
3566 emit_unop_insn (icode
, sign
, op1
, UNKNOWN
);
3570 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3572 imode
= int_mode_for_mode (mode
);
3573 if (imode
== BLKmode
)
3575 op1
= gen_lowpart (imode
, op1
);
3582 if (FLOAT_WORDS_BIG_ENDIAN
)
3583 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3585 word
= bitpos
/ BITS_PER_WORD
;
3586 bitpos
= bitpos
% BITS_PER_WORD
;
3587 op1
= operand_subword_force (op1
, word
, mode
);
3590 wide_int mask
= wi::set_bit_in_zero (bitpos
, GET_MODE_PRECISION (imode
));
3591 sign
= expand_binop (imode
, and_optab
, op1
,
3592 immed_wide_int_const (mask
, imode
),
3593 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3598 op0
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
3605 if (target
== NULL_RTX
)
3606 target
= copy_to_reg (op0
);
3608 emit_move_insn (target
, op0
);
3611 label
= gen_label_rtx ();
3612 emit_cmp_and_jump_insns (sign
, const0_rtx
, EQ
, NULL_RTX
, imode
, 1, label
);
3614 if (CONST_DOUBLE_AS_FLOAT_P (op0
))
3615 op0
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3617 op0
= expand_unop (mode
, neg_optab
, op0
, target
, 0);
3619 emit_move_insn (target
, op0
);
3627 /* A subroutine of expand_copysign, perform the entire copysign operation
3628 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3629 is true if op0 is known to have its sign bit clear. */
3632 expand_copysign_bit (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3633 int bitpos
, bool op0_is_abs
)
3635 enum machine_mode imode
;
3636 int word
, nwords
, i
;
3639 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3641 imode
= int_mode_for_mode (mode
);
3642 if (imode
== BLKmode
)
3651 if (FLOAT_WORDS_BIG_ENDIAN
)
3652 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3654 word
= bitpos
/ BITS_PER_WORD
;
3655 bitpos
= bitpos
% BITS_PER_WORD
;
3656 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
3659 wide_int mask
= wi::set_bit_in_zero (bitpos
, GET_MODE_PRECISION (imode
));
3664 || (nwords
> 1 && !valid_multiword_target_p (target
)))
3665 target
= gen_reg_rtx (mode
);
3671 for (i
= 0; i
< nwords
; ++i
)
3673 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
3674 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3680 = expand_binop (imode
, and_optab
, op0_piece
,
3681 immed_wide_int_const (~mask
, imode
),
3682 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3683 op1
= expand_binop (imode
, and_optab
,
3684 operand_subword_force (op1
, i
, mode
),
3685 immed_wide_int_const (mask
, imode
),
3686 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3688 temp
= expand_binop (imode
, ior_optab
, op0_piece
, op1
,
3689 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3690 if (temp
!= targ_piece
)
3691 emit_move_insn (targ_piece
, temp
);
3694 emit_move_insn (targ_piece
, op0_piece
);
3697 insns
= get_insns ();
3704 op1
= expand_binop (imode
, and_optab
, gen_lowpart (imode
, op1
),
3705 immed_wide_int_const (mask
, imode
),
3706 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3708 op0
= gen_lowpart (imode
, op0
);
3710 op0
= expand_binop (imode
, and_optab
, op0
,
3711 immed_wide_int_const (~mask
, imode
),
3712 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3714 temp
= expand_binop (imode
, ior_optab
, op0
, op1
,
3715 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3716 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3722 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3723 scalar floating point mode. Return NULL if we do not know how to
3724 expand the operation inline. */
3727 expand_copysign (rtx op0
, rtx op1
, rtx target
)
3729 enum machine_mode mode
= GET_MODE (op0
);
3730 const struct real_format
*fmt
;
3734 gcc_assert (SCALAR_FLOAT_MODE_P (mode
));
3735 gcc_assert (GET_MODE (op1
) == mode
);
3737 /* First try to do it with a special instruction. */
3738 temp
= expand_binop (mode
, copysign_optab
, op0
, op1
,
3739 target
, 0, OPTAB_DIRECT
);
3743 fmt
= REAL_MODE_FORMAT (mode
);
3744 if (fmt
== NULL
|| !fmt
->has_signed_zero
)
3748 if (CONST_DOUBLE_AS_FLOAT_P (op0
))
3750 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0
)))
3751 op0
= simplify_unary_operation (ABS
, mode
, op0
, mode
);
3755 if (fmt
->signbit_ro
>= 0
3756 && (CONST_DOUBLE_AS_FLOAT_P (op0
)
3757 || (optab_handler (neg_optab
, mode
) != CODE_FOR_nothing
3758 && optab_handler (abs_optab
, mode
) != CODE_FOR_nothing
)))
3760 temp
= expand_copysign_absneg (mode
, op0
, op1
, target
,
3761 fmt
->signbit_ro
, op0_is_abs
);
3766 if (fmt
->signbit_rw
< 0)
3768 return expand_copysign_bit (mode
, op0
, op1
, target
,
3769 fmt
->signbit_rw
, op0_is_abs
);
3772 /* Generate an instruction whose insn-code is INSN_CODE,
3773 with two operands: an output TARGET and an input OP0.
3774 TARGET *must* be nonzero, and the output is always stored there.
3775 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3776 the value that is stored into TARGET.
3778 Return false if expansion failed. */
3781 maybe_emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
,
3784 struct expand_operand ops
[2];
3787 create_output_operand (&ops
[0], target
, GET_MODE (target
));
3788 create_input_operand (&ops
[1], op0
, GET_MODE (op0
));
3789 pat
= maybe_gen_insn (icode
, 2, ops
);
3793 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3794 add_equal_note (pat
, ops
[0].value
, code
, ops
[1].value
, NULL_RTX
);
3798 if (ops
[0].value
!= target
)
3799 emit_move_insn (target
, ops
[0].value
);
3802 /* Generate an instruction whose insn-code is INSN_CODE,
3803 with two operands: an output TARGET and an input OP0.
3804 TARGET *must* be nonzero, and the output is always stored there.
3805 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3806 the value that is stored into TARGET. */
3809 emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
, enum rtx_code code
)
3811 bool ok
= maybe_emit_unop_insn (icode
, target
, op0
, code
);
3815 struct no_conflict_data
3817 rtx target
, first
, insn
;
3821 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3822 the currently examined clobber / store has to stay in the list of
3823 insns that constitute the actual libcall block. */
3825 no_conflict_move_test (rtx dest
, const_rtx set
, void *p0
)
3827 struct no_conflict_data
*p
= (struct no_conflict_data
*) p0
;
3829 /* If this inns directly contributes to setting the target, it must stay. */
3830 if (reg_overlap_mentioned_p (p
->target
, dest
))
3831 p
->must_stay
= true;
3832 /* If we haven't committed to keeping any other insns in the list yet,
3833 there is nothing more to check. */
3834 else if (p
->insn
== p
->first
)
3836 /* If this insn sets / clobbers a register that feeds one of the insns
3837 already in the list, this insn has to stay too. */
3838 else if (reg_overlap_mentioned_p (dest
, PATTERN (p
->first
))
3839 || (CALL_P (p
->first
) && (find_reg_fusage (p
->first
, USE
, dest
)))
3840 || reg_used_between_p (dest
, p
->first
, p
->insn
)
3841 /* Likewise if this insn depends on a register set by a previous
3842 insn in the list, or if it sets a result (presumably a hard
3843 register) that is set or clobbered by a previous insn.
3844 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3845 SET_DEST perform the former check on the address, and the latter
3846 check on the MEM. */
3847 || (GET_CODE (set
) == SET
3848 && (modified_in_p (SET_SRC (set
), p
->first
)
3849 || modified_in_p (SET_DEST (set
), p
->first
)
3850 || modified_between_p (SET_SRC (set
), p
->first
, p
->insn
)
3851 || modified_between_p (SET_DEST (set
), p
->first
, p
->insn
))))
3852 p
->must_stay
= true;
3856 /* Emit code to make a call to a constant function or a library call.
3858 INSNS is a list containing all insns emitted in the call.
3859 These insns leave the result in RESULT. Our block is to copy RESULT
3860 to TARGET, which is logically equivalent to EQUIV.
3862 We first emit any insns that set a pseudo on the assumption that these are
3863 loading constants into registers; doing so allows them to be safely cse'ed
3864 between blocks. Then we emit all the other insns in the block, followed by
3865 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3866 note with an operand of EQUIV. */
3869 emit_libcall_block_1 (rtx insns
, rtx target
, rtx result
, rtx equiv
,
3870 bool equiv_may_trap
)
3872 rtx final_dest
= target
;
3873 rtx next
, last
, insn
;
3875 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3876 into a MEM later. Protect the libcall block from this change. */
3877 if (! REG_P (target
) || REG_USERVAR_P (target
))
3878 target
= gen_reg_rtx (GET_MODE (target
));
3880 /* If we're using non-call exceptions, a libcall corresponding to an
3881 operation that may trap may also trap. */
3882 /* ??? See the comment in front of make_reg_eh_region_note. */
3883 if (cfun
->can_throw_non_call_exceptions
3884 && (equiv_may_trap
|| may_trap_p (equiv
)))
3886 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3889 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3892 int lp_nr
= INTVAL (XEXP (note
, 0));
3893 if (lp_nr
== 0 || lp_nr
== INT_MIN
)
3894 remove_note (insn
, note
);
3900 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3901 reg note to indicate that this call cannot throw or execute a nonlocal
3902 goto (unless there is already a REG_EH_REGION note, in which case
3904 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3906 make_reg_eh_region_note_nothrow_nononlocal (insn
);
3909 /* First emit all insns that set pseudos. Remove them from the list as
3910 we go. Avoid insns that set pseudos which were referenced in previous
3911 insns. These can be generated by move_by_pieces, for example,
3912 to update an address. Similarly, avoid insns that reference things
3913 set in previous insns. */
3915 for (insn
= insns
; insn
; insn
= next
)
3917 rtx set
= single_set (insn
);
3919 next
= NEXT_INSN (insn
);
3921 if (set
!= 0 && REG_P (SET_DEST (set
))
3922 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3924 struct no_conflict_data data
;
3926 data
.target
= const0_rtx
;
3930 note_stores (PATTERN (insn
), no_conflict_move_test
, &data
);
3931 if (! data
.must_stay
)
3933 if (PREV_INSN (insn
))
3934 NEXT_INSN (PREV_INSN (insn
)) = next
;
3939 PREV_INSN (next
) = PREV_INSN (insn
);
3945 /* Some ports use a loop to copy large arguments onto the stack.
3946 Don't move anything outside such a loop. */
3951 /* Write the remaining insns followed by the final copy. */
3952 for (insn
= insns
; insn
; insn
= next
)
3954 next
= NEXT_INSN (insn
);
3959 last
= emit_move_insn (target
, result
);
3960 set_dst_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
), target
);
3962 if (final_dest
!= target
)
3963 emit_move_insn (final_dest
, target
);
3967 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3969 emit_libcall_block_1 (insns
, target
, result
, equiv
, false);
3972 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3973 PURPOSE describes how this comparison will be used. CODE is the rtx
3974 comparison code we will be using.
3976 ??? Actually, CODE is slightly weaker than that. A target is still
3977 required to implement all of the normal bcc operations, but not
3978 required to implement all (or any) of the unordered bcc operations. */
3981 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3982 enum can_compare_purpose purpose
)
3985 test
= gen_rtx_fmt_ee (code
, mode
, const0_rtx
, const0_rtx
);
3988 enum insn_code icode
;
3990 if (purpose
== ccp_jump
3991 && (icode
= optab_handler (cbranch_optab
, mode
)) != CODE_FOR_nothing
3992 && insn_operand_matches (icode
, 0, test
))
3994 if (purpose
== ccp_store_flag
3995 && (icode
= optab_handler (cstore_optab
, mode
)) != CODE_FOR_nothing
3996 && insn_operand_matches (icode
, 1, test
))
3998 if (purpose
== ccp_cmov
3999 && optab_handler (cmov_optab
, mode
) != CODE_FOR_nothing
)
4002 mode
= GET_MODE_WIDER_MODE (mode
);
4003 PUT_MODE (test
, mode
);
4005 while (mode
!= VOIDmode
);
4010 /* This function is called when we are going to emit a compare instruction that
4011 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
4013 *PMODE is the mode of the inputs (in case they are const_int).
4014 *PUNSIGNEDP nonzero says that the operands are unsigned;
4015 this matters if they need to be widened (as given by METHODS).
4017 If they have mode BLKmode, then SIZE specifies the size of both operands.
4019 This function performs all the setup necessary so that the caller only has
4020 to emit a single comparison insn. This setup can involve doing a BLKmode
4021 comparison or emitting a library call to perform the comparison if no insn
4022 is available to handle it.
4023 The values which are passed in through pointers can be modified; the caller
4024 should perform the comparison on the modified values. Constant
4025 comparisons must have already been folded. */
4028 prepare_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4029 int unsignedp
, enum optab_methods methods
,
4030 rtx
*ptest
, enum machine_mode
*pmode
)
4032 enum machine_mode mode
= *pmode
;
4034 enum machine_mode cmp_mode
;
4035 enum mode_class mclass
;
4037 /* The other methods are not needed. */
4038 gcc_assert (methods
== OPTAB_DIRECT
|| methods
== OPTAB_WIDEN
4039 || methods
== OPTAB_LIB_WIDEN
);
4041 /* If we are optimizing, force expensive constants into a register. */
4042 if (CONSTANT_P (x
) && optimize
4043 && (rtx_cost (x
, COMPARE
, 0, optimize_insn_for_speed_p ())
4044 > COSTS_N_INSNS (1)))
4045 x
= force_reg (mode
, x
);
4047 if (CONSTANT_P (y
) && optimize
4048 && (rtx_cost (y
, COMPARE
, 1, optimize_insn_for_speed_p ())
4049 > COSTS_N_INSNS (1)))
4050 y
= force_reg (mode
, y
);
4053 /* Make sure if we have a canonical comparison. The RTL
4054 documentation states that canonical comparisons are required only
4055 for targets which have cc0. */
4056 gcc_assert (!CONSTANT_P (x
) || CONSTANT_P (y
));
4059 /* Don't let both operands fail to indicate the mode. */
4060 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
4061 x
= force_reg (mode
, x
);
4062 if (mode
== VOIDmode
)
4063 mode
= GET_MODE (x
) != VOIDmode
? GET_MODE (x
) : GET_MODE (y
);
4065 /* Handle all BLKmode compares. */
4067 if (mode
== BLKmode
)
4069 enum machine_mode result_mode
;
4070 enum insn_code cmp_code
;
4075 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
4079 /* Try to use a memory block compare insn - either cmpstr
4080 or cmpmem will do. */
4081 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
4082 cmp_mode
!= VOIDmode
;
4083 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
4085 cmp_code
= direct_optab_handler (cmpmem_optab
, cmp_mode
);
4086 if (cmp_code
== CODE_FOR_nothing
)
4087 cmp_code
= direct_optab_handler (cmpstr_optab
, cmp_mode
);
4088 if (cmp_code
== CODE_FOR_nothing
)
4089 cmp_code
= direct_optab_handler (cmpstrn_optab
, cmp_mode
);
4090 if (cmp_code
== CODE_FOR_nothing
)
4093 /* Must make sure the size fits the insn's mode. */
4094 if ((CONST_INT_P (size
)
4095 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
4096 || (GET_MODE_BITSIZE (GET_MODE (size
))
4097 > GET_MODE_BITSIZE (cmp_mode
)))
4100 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
4101 result
= gen_reg_rtx (result_mode
);
4102 size
= convert_to_mode (cmp_mode
, size
, 1);
4103 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
4105 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4106 *pmode
= result_mode
;
4110 if (methods
!= OPTAB_LIB
&& methods
!= OPTAB_LIB_WIDEN
)
4113 /* Otherwise call a library function, memcmp. */
4114 libfunc
= memcmp_libfunc
;
4115 length_type
= sizetype
;
4116 result_mode
= TYPE_MODE (integer_type_node
);
4117 cmp_mode
= TYPE_MODE (length_type
);
4118 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
4119 TYPE_UNSIGNED (length_type
));
4121 result
= emit_library_call_value (libfunc
, 0, LCT_PURE
,
4129 methods
= OPTAB_LIB_WIDEN
;
4133 /* Don't allow operands to the compare to trap, as that can put the
4134 compare and branch in different basic blocks. */
4135 if (cfun
->can_throw_non_call_exceptions
)
4138 x
= force_reg (mode
, x
);
4140 y
= force_reg (mode
, y
);
4143 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4145 gcc_assert (can_compare_p (comparison
, CCmode
, ccp_jump
));
4146 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4150 mclass
= GET_MODE_CLASS (mode
);
4151 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4155 enum insn_code icode
;
4156 icode
= optab_handler (cbranch_optab
, cmp_mode
);
4157 if (icode
!= CODE_FOR_nothing
4158 && insn_operand_matches (icode
, 0, test
))
4160 rtx last
= get_last_insn ();
4161 rtx op0
= prepare_operand (icode
, x
, 1, mode
, cmp_mode
, unsignedp
);
4162 rtx op1
= prepare_operand (icode
, y
, 2, mode
, cmp_mode
, unsignedp
);
4164 && insn_operand_matches (icode
, 1, op0
)
4165 && insn_operand_matches (icode
, 2, op1
))
4167 XEXP (test
, 0) = op0
;
4168 XEXP (test
, 1) = op1
;
4173 delete_insns_since (last
);
4176 if (methods
== OPTAB_DIRECT
|| !CLASS_HAS_WIDER_MODES_P (mclass
))
4178 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
);
4180 while (cmp_mode
!= VOIDmode
);
4182 if (methods
!= OPTAB_LIB_WIDEN
)
4185 if (!SCALAR_FLOAT_MODE_P (mode
))
4188 enum machine_mode ret_mode
;
4190 /* Handle a libcall just for the mode we are using. */
4191 libfunc
= optab_libfunc (cmp_optab
, mode
);
4192 gcc_assert (libfunc
);
4194 /* If we want unsigned, and this mode has a distinct unsigned
4195 comparison routine, use that. */
4198 rtx ulibfunc
= optab_libfunc (ucmp_optab
, mode
);
4203 ret_mode
= targetm
.libgcc_cmp_return_mode ();
4204 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4205 ret_mode
, 2, x
, mode
, y
, mode
);
4207 /* There are two kinds of comparison routines. Biased routines
4208 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4209 of gcc expect that the comparison operation is equivalent
4210 to the modified comparison. For signed comparisons compare the
4211 result against 1 in the biased case, and zero in the unbiased
4212 case. For unsigned comparisons always compare against 1 after
4213 biasing the unbiased result by adding 1. This gives us a way to
4215 The comparisons in the fixed-point helper library are always
4220 if (!TARGET_LIB_INT_CMP_BIASED
&& !ALL_FIXED_POINT_MODE_P (mode
))
4223 x
= plus_constant (ret_mode
, result
, 1);
4229 prepare_cmp_insn (x
, y
, comparison
, NULL_RTX
, unsignedp
, methods
,
4233 prepare_float_lib_cmp (x
, y
, comparison
, ptest
, pmode
);
4241 /* Before emitting an insn with code ICODE, make sure that X, which is going
4242 to be used for operand OPNUM of the insn, is converted from mode MODE to
4243 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4244 that it is accepted by the operand predicate. Return the new value. */
4247 prepare_operand (enum insn_code icode
, rtx x
, int opnum
, enum machine_mode mode
,
4248 enum machine_mode wider_mode
, int unsignedp
)
4250 if (mode
!= wider_mode
)
4251 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
4253 if (!insn_operand_matches (icode
, opnum
, x
))
4255 if (reload_completed
)
4257 x
= copy_to_mode_reg (insn_data
[(int) icode
].operand
[opnum
].mode
, x
);
4263 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4264 we can do the branch. */
4267 emit_cmp_and_jump_insn_1 (rtx test
, enum machine_mode mode
, rtx label
, int prob
)
4269 enum machine_mode optab_mode
;
4270 enum mode_class mclass
;
4271 enum insn_code icode
;
4274 mclass
= GET_MODE_CLASS (mode
);
4275 optab_mode
= (mclass
== MODE_CC
) ? CCmode
: mode
;
4276 icode
= optab_handler (cbranch_optab
, optab_mode
);
4278 gcc_assert (icode
!= CODE_FOR_nothing
);
4279 gcc_assert (insn_operand_matches (icode
, 0, test
));
4280 insn
= emit_jump_insn (GEN_FCN (icode
) (test
, XEXP (test
, 0),
4281 XEXP (test
, 1), label
));
4283 && profile_status
!= PROFILE_ABSENT
4286 && any_condjump_p (insn
)
4287 && !find_reg_note (insn
, REG_BR_PROB
, 0))
4288 add_int_reg_note (insn
, REG_BR_PROB
, prob
);
4291 /* Generate code to compare X with Y so that the condition codes are
4292 set and to jump to LABEL if the condition is true. If X is a
4293 constant and Y is not a constant, then the comparison is swapped to
4294 ensure that the comparison RTL has the canonical form.
4296 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4297 need to be widened. UNSIGNEDP is also used to select the proper
4298 branch condition code.
4300 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4302 MODE is the mode of the inputs (in case they are const_int).
4304 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4305 It will be potentially converted into an unsigned variant based on
4306 UNSIGNEDP to select a proper jump instruction.
4308 PROB is the probability of jumping to LABEL. */
4311 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4312 enum machine_mode mode
, int unsignedp
, rtx label
,
4315 rtx op0
= x
, op1
= y
;
4318 /* Swap operands and condition to ensure canonical RTL. */
4319 if (swap_commutative_operands_p (x
, y
)
4320 && can_compare_p (swap_condition (comparison
), mode
, ccp_jump
))
4323 comparison
= swap_condition (comparison
);
4326 /* If OP0 is still a constant, then both X and Y must be constants
4327 or the opposite comparison is not supported. Force X into a register
4328 to create canonical RTL. */
4329 if (CONSTANT_P (op0
))
4330 op0
= force_reg (mode
, op0
);
4333 comparison
= unsigned_condition (comparison
);
4335 prepare_cmp_insn (op0
, op1
, comparison
, size
, unsignedp
, OPTAB_LIB_WIDEN
,
4337 emit_cmp_and_jump_insn_1 (test
, mode
, label
, prob
);
4341 /* Emit a library call comparison between floating point X and Y.
4342 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4345 prepare_float_lib_cmp (rtx x
, rtx y
, enum rtx_code comparison
,
4346 rtx
*ptest
, enum machine_mode
*pmode
)
4348 enum rtx_code swapped
= swap_condition (comparison
);
4349 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
4350 enum machine_mode orig_mode
= GET_MODE (x
);
4351 enum machine_mode mode
, cmp_mode
;
4352 rtx true_rtx
, false_rtx
;
4353 rtx value
, target
, insns
, equiv
;
4355 bool reversed_p
= false;
4356 cmp_mode
= targetm
.libgcc_cmp_return_mode ();
4358 for (mode
= orig_mode
;
4360 mode
= GET_MODE_WIDER_MODE (mode
))
4362 if (code_to_optab (comparison
)
4363 && (libfunc
= optab_libfunc (code_to_optab (comparison
), mode
)))
4366 if (code_to_optab (swapped
)
4367 && (libfunc
= optab_libfunc (code_to_optab (swapped
), mode
)))
4370 tmp
= x
; x
= y
; y
= tmp
;
4371 comparison
= swapped
;
4375 if (code_to_optab (reversed
)
4376 && (libfunc
= optab_libfunc (code_to_optab (reversed
), mode
)))
4378 comparison
= reversed
;
4384 gcc_assert (mode
!= VOIDmode
);
4386 if (mode
!= orig_mode
)
4388 x
= convert_to_mode (mode
, x
, 0);
4389 y
= convert_to_mode (mode
, y
, 0);
4392 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4393 the RTL. The allows the RTL optimizers to delete the libcall if the
4394 condition can be determined at compile-time. */
4395 if (comparison
== UNORDERED
4396 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4398 true_rtx
= const_true_rtx
;
4399 false_rtx
= const0_rtx
;
4406 true_rtx
= const0_rtx
;
4407 false_rtx
= const_true_rtx
;
4411 true_rtx
= const_true_rtx
;
4412 false_rtx
= const0_rtx
;
4416 true_rtx
= const1_rtx
;
4417 false_rtx
= const0_rtx
;
4421 true_rtx
= const0_rtx
;
4422 false_rtx
= constm1_rtx
;
4426 true_rtx
= constm1_rtx
;
4427 false_rtx
= const0_rtx
;
4431 true_rtx
= const0_rtx
;
4432 false_rtx
= const1_rtx
;
4440 if (comparison
== UNORDERED
)
4442 rtx temp
= simplify_gen_relational (NE
, cmp_mode
, mode
, x
, x
);
4443 equiv
= simplify_gen_relational (NE
, cmp_mode
, mode
, y
, y
);
4444 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4445 temp
, const_true_rtx
, equiv
);
4449 equiv
= simplify_gen_relational (comparison
, cmp_mode
, mode
, x
, y
);
4450 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4451 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4452 equiv
, true_rtx
, false_rtx
);
4456 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4457 cmp_mode
, 2, x
, mode
, y
, mode
);
4458 insns
= get_insns ();
4461 target
= gen_reg_rtx (cmp_mode
);
4462 emit_libcall_block (insns
, target
, value
, equiv
);
4464 if (comparison
== UNORDERED
4465 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
)
4467 *ptest
= gen_rtx_fmt_ee (reversed_p
? EQ
: NE
, VOIDmode
, target
, false_rtx
);
4469 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, target
, const0_rtx
);
4474 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4477 emit_indirect_jump (rtx loc
)
4479 struct expand_operand ops
[1];
4481 create_address_operand (&ops
[0], loc
);
4482 expand_jump_insn (CODE_FOR_indirect_jump
, 1, ops
);
4486 #ifdef HAVE_conditional_move
4488 /* Emit a conditional move instruction if the machine supports one for that
4489 condition and machine mode.
4491 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4492 the mode to use should they be constants. If it is VOIDmode, they cannot
4495 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4496 should be stored there. MODE is the mode to use should they be constants.
4497 If it is VOIDmode, they cannot both be constants.
4499 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4500 is not supported. */
4503 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4504 enum machine_mode cmode
, rtx op2
, rtx op3
,
4505 enum machine_mode mode
, int unsignedp
)
4507 rtx tem
, comparison
, last
;
4508 enum insn_code icode
;
4509 enum rtx_code reversed
;
4511 /* If one operand is constant, make it the second one. Only do this
4512 if the other operand is not constant as well. */
4514 if (swap_commutative_operands_p (op0
, op1
))
4519 code
= swap_condition (code
);
4522 /* get_condition will prefer to generate LT and GT even if the old
4523 comparison was against zero, so undo that canonicalization here since
4524 comparisons against zero are cheaper. */
4525 if (code
== LT
&& op1
== const1_rtx
)
4526 code
= LE
, op1
= const0_rtx
;
4527 else if (code
== GT
&& op1
== constm1_rtx
)
4528 code
= GE
, op1
= const0_rtx
;
4530 if (cmode
== VOIDmode
)
4531 cmode
= GET_MODE (op0
);
4533 if (swap_commutative_operands_p (op2
, op3
)
4534 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4543 if (mode
== VOIDmode
)
4544 mode
= GET_MODE (op2
);
4546 icode
= direct_optab_handler (movcc_optab
, mode
);
4548 if (icode
== CODE_FOR_nothing
)
4552 target
= gen_reg_rtx (mode
);
4554 code
= unsignedp
? unsigned_condition (code
) : code
;
4555 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4557 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4558 return NULL and let the caller figure out how best to deal with this
4560 if (!COMPARISON_P (comparison
))
4563 do_pending_stack_adjust ();
4564 last
= get_last_insn ();
4565 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4566 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4567 &comparison
, &cmode
);
4570 struct expand_operand ops
[4];
4572 create_output_operand (&ops
[0], target
, mode
);
4573 create_fixed_operand (&ops
[1], comparison
);
4574 create_input_operand (&ops
[2], op2
, mode
);
4575 create_input_operand (&ops
[3], op3
, mode
);
4576 if (maybe_expand_insn (icode
, 4, ops
))
4578 if (ops
[0].value
!= target
)
4579 convert_move (target
, ops
[0].value
, false);
4583 delete_insns_since (last
);
4587 /* Return nonzero if a conditional move of mode MODE is supported.
4589 This function is for combine so it can tell whether an insn that looks
4590 like a conditional move is actually supported by the hardware. If we
4591 guess wrong we lose a bit on optimization, but that's it. */
4592 /* ??? sparc64 supports conditionally moving integers values based on fp
4593 comparisons, and vice versa. How do we handle them? */
4596 can_conditionally_move_p (enum machine_mode mode
)
4598 if (direct_optab_handler (movcc_optab
, mode
) != CODE_FOR_nothing
)
4604 #endif /* HAVE_conditional_move */
4606 /* Emit a conditional addition instruction if the machine supports one for that
4607 condition and machine mode.
4609 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4610 the mode to use should they be constants. If it is VOIDmode, they cannot
4613 OP2 should be stored in TARGET if the comparison is false, otherwise OP2+OP3
4614 should be stored there. MODE is the mode to use should they be constants.
4615 If it is VOIDmode, they cannot both be constants.
4617 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4618 is not supported. */
4621 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4622 enum machine_mode cmode
, rtx op2
, rtx op3
,
4623 enum machine_mode mode
, int unsignedp
)
4625 rtx tem
, comparison
, last
;
4626 enum insn_code icode
;
4628 /* If one operand is constant, make it the second one. Only do this
4629 if the other operand is not constant as well. */
4631 if (swap_commutative_operands_p (op0
, op1
))
4636 code
= swap_condition (code
);
4639 /* get_condition will prefer to generate LT and GT even if the old
4640 comparison was against zero, so undo that canonicalization here since
4641 comparisons against zero are cheaper. */
4642 if (code
== LT
&& op1
== const1_rtx
)
4643 code
= LE
, op1
= const0_rtx
;
4644 else if (code
== GT
&& op1
== constm1_rtx
)
4645 code
= GE
, op1
= const0_rtx
;
4647 if (cmode
== VOIDmode
)
4648 cmode
= GET_MODE (op0
);
4650 if (mode
== VOIDmode
)
4651 mode
= GET_MODE (op2
);
4653 icode
= optab_handler (addcc_optab
, mode
);
4655 if (icode
== CODE_FOR_nothing
)
4659 target
= gen_reg_rtx (mode
);
4661 code
= unsignedp
? unsigned_condition (code
) : code
;
4662 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4664 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4665 return NULL and let the caller figure out how best to deal with this
4667 if (!COMPARISON_P (comparison
))
4670 do_pending_stack_adjust ();
4671 last
= get_last_insn ();
4672 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4673 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4674 &comparison
, &cmode
);
4677 struct expand_operand ops
[4];
4679 create_output_operand (&ops
[0], target
, mode
);
4680 create_fixed_operand (&ops
[1], comparison
);
4681 create_input_operand (&ops
[2], op2
, mode
);
4682 create_input_operand (&ops
[3], op3
, mode
);
4683 if (maybe_expand_insn (icode
, 4, ops
))
4685 if (ops
[0].value
!= target
)
4686 convert_move (target
, ops
[0].value
, false);
4690 delete_insns_since (last
);
4694 /* These functions attempt to generate an insn body, rather than
4695 emitting the insn, but if the gen function already emits them, we
4696 make no attempt to turn them back into naked patterns. */
4698 /* Generate and return an insn body to add Y to X. */
4701 gen_add2_insn (rtx x
, rtx y
)
4703 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
4705 gcc_assert (insn_operand_matches (icode
, 0, x
));
4706 gcc_assert (insn_operand_matches (icode
, 1, x
));
4707 gcc_assert (insn_operand_matches (icode
, 2, y
));
4709 return GEN_FCN (icode
) (x
, x
, y
);
4712 /* Generate and return an insn body to add r1 and c,
4713 storing the result in r0. */
4716 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4718 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (r0
));
4720 if (icode
== CODE_FOR_nothing
4721 || !insn_operand_matches (icode
, 0, r0
)
4722 || !insn_operand_matches (icode
, 1, r1
)
4723 || !insn_operand_matches (icode
, 2, c
))
4726 return GEN_FCN (icode
) (r0
, r1
, c
);
4730 have_add2_insn (rtx x
, rtx y
)
4732 enum insn_code icode
;
4734 gcc_assert (GET_MODE (x
) != VOIDmode
);
4736 icode
= optab_handler (add_optab
, GET_MODE (x
));
4738 if (icode
== CODE_FOR_nothing
)
4741 if (!insn_operand_matches (icode
, 0, x
)
4742 || !insn_operand_matches (icode
, 1, x
)
4743 || !insn_operand_matches (icode
, 2, y
))
4749 /* Generate and return an insn body to subtract Y from X. */
4752 gen_sub2_insn (rtx x
, rtx y
)
4754 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (x
));
4756 gcc_assert (insn_operand_matches (icode
, 0, x
));
4757 gcc_assert (insn_operand_matches (icode
, 1, x
));
4758 gcc_assert (insn_operand_matches (icode
, 2, y
));
4760 return GEN_FCN (icode
) (x
, x
, y
);
4763 /* Generate and return an insn body to subtract r1 and c,
4764 storing the result in r0. */
4767 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4769 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (r0
));
4771 if (icode
== CODE_FOR_nothing
4772 || !insn_operand_matches (icode
, 0, r0
)
4773 || !insn_operand_matches (icode
, 1, r1
)
4774 || !insn_operand_matches (icode
, 2, c
))
4777 return GEN_FCN (icode
) (r0
, r1
, c
);
4781 have_sub2_insn (rtx x
, rtx y
)
4783 enum insn_code icode
;
4785 gcc_assert (GET_MODE (x
) != VOIDmode
);
4787 icode
= optab_handler (sub_optab
, GET_MODE (x
));
4789 if (icode
== CODE_FOR_nothing
)
4792 if (!insn_operand_matches (icode
, 0, x
)
4793 || !insn_operand_matches (icode
, 1, x
)
4794 || !insn_operand_matches (icode
, 2, y
))
4800 /* Generate the body of an instruction to copy Y into X.
4801 It may be a list of insns, if one insn isn't enough. */
4804 gen_move_insn (rtx x
, rtx y
)
4809 emit_move_insn_1 (x
, y
);
4815 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4816 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4817 no such operation exists, CODE_FOR_nothing will be returned. */
4820 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4824 #ifdef HAVE_ptr_extend
4826 return CODE_FOR_ptr_extend
;
4829 tab
= unsignedp
? zext_optab
: sext_optab
;
4830 return convert_optab_handler (tab
, to_mode
, from_mode
);
4833 /* Generate the body of an insn to extend Y (with mode MFROM)
4834 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4837 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4838 enum machine_mode mfrom
, int unsignedp
)
4840 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4841 return GEN_FCN (icode
) (x
, y
);
4844 /* can_fix_p and can_float_p say whether the target machine
4845 can directly convert a given fixed point type to
4846 a given floating point type, or vice versa.
4847 The returned value is the CODE_FOR_... value to use,
4848 or CODE_FOR_nothing if these modes cannot be directly converted.
4850 *TRUNCP_PTR is set to 1 if it is necessary to output
4851 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4853 static enum insn_code
4854 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4855 int unsignedp
, int *truncp_ptr
)
4858 enum insn_code icode
;
4860 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4861 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4862 if (icode
!= CODE_FOR_nothing
)
4868 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4869 for this to work. We need to rework the fix* and ftrunc* patterns
4870 and documentation. */
4871 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4872 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4873 if (icode
!= CODE_FOR_nothing
4874 && optab_handler (ftrunc_optab
, fltmode
) != CODE_FOR_nothing
)
4881 return CODE_FOR_nothing
;
4885 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4890 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4891 return convert_optab_handler (tab
, fltmode
, fixmode
);
4894 /* Function supportable_convert_operation
4896 Check whether an operation represented by the code CODE is a
4897 convert operation that is supported by the target platform in
4898 vector form (i.e., when operating on arguments of type VECTYPE_IN
4899 producing a result of type VECTYPE_OUT).
4901 Convert operations we currently support directly are FIX_TRUNC and FLOAT.
4902 This function checks if these operations are supported
4903 by the target platform either directly (via vector tree-codes), or via
4907 - CODE1 is code of vector operation to be used when
4908 vectorizing the operation, if available.
4909 - DECL is decl of target builtin functions to be used
4910 when vectorizing the operation, if available. In this case,
4911 CODE1 is CALL_EXPR. */
4914 supportable_convert_operation (enum tree_code code
,
4915 tree vectype_out
, tree vectype_in
,
4916 tree
*decl
, enum tree_code
*code1
)
4918 enum machine_mode m1
,m2
;
4921 m1
= TYPE_MODE (vectype_out
);
4922 m2
= TYPE_MODE (vectype_in
);
4924 /* First check if we can done conversion directly. */
4925 if ((code
== FIX_TRUNC_EXPR
4926 && can_fix_p (m1
,m2
,TYPE_UNSIGNED (vectype_out
), &truncp
)
4927 != CODE_FOR_nothing
)
4928 || (code
== FLOAT_EXPR
4929 && can_float_p (m1
,m2
,TYPE_UNSIGNED (vectype_in
))
4930 != CODE_FOR_nothing
))
4936 /* Now check for builtin. */
4937 if (targetm
.vectorize
.builtin_conversion
4938 && targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
))
4941 *decl
= targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
);
4948 /* Generate code to convert FROM to floating point
4949 and store in TO. FROM must be fixed point and not VOIDmode.
4950 UNSIGNEDP nonzero means regard FROM as unsigned.
4951 Normally this is done by correcting the final value
4952 if it is negative. */
4955 expand_float (rtx to
, rtx from
, int unsignedp
)
4957 enum insn_code icode
;
4959 enum machine_mode fmode
, imode
;
4960 bool can_do_signed
= false;
4962 /* Crash now, because we won't be able to decide which mode to use. */
4963 gcc_assert (GET_MODE (from
) != VOIDmode
);
4965 /* Look for an insn to do the conversion. Do it in the specified
4966 modes if possible; otherwise convert either input, output or both to
4967 wider mode. If the integer mode is wider than the mode of FROM,
4968 we can do the conversion signed even if the input is unsigned. */
4970 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4971 fmode
= GET_MODE_WIDER_MODE (fmode
))
4972 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4973 imode
= GET_MODE_WIDER_MODE (imode
))
4975 int doing_unsigned
= unsignedp
;
4977 if (fmode
!= GET_MODE (to
)
4978 && significand_size (fmode
) < GET_MODE_PRECISION (GET_MODE (from
)))
4981 icode
= can_float_p (fmode
, imode
, unsignedp
);
4982 if (icode
== CODE_FOR_nothing
&& unsignedp
)
4984 enum insn_code scode
= can_float_p (fmode
, imode
, 0);
4985 if (scode
!= CODE_FOR_nothing
)
4986 can_do_signed
= true;
4987 if (imode
!= GET_MODE (from
))
4988 icode
= scode
, doing_unsigned
= 0;
4991 if (icode
!= CODE_FOR_nothing
)
4993 if (imode
!= GET_MODE (from
))
4994 from
= convert_to_mode (imode
, from
, unsignedp
);
4996 if (fmode
!= GET_MODE (to
))
4997 target
= gen_reg_rtx (fmode
);
4999 emit_unop_insn (icode
, target
, from
,
5000 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
5003 convert_move (to
, target
, 0);
5008 /* Unsigned integer, and no way to convert directly. Convert as signed,
5009 then unconditionally adjust the result. */
5010 if (unsignedp
&& can_do_signed
)
5012 rtx label
= gen_label_rtx ();
5014 REAL_VALUE_TYPE offset
;
5016 /* Look for a usable floating mode FMODE wider than the source and at
5017 least as wide as the target. Using FMODE will avoid rounding woes
5018 with unsigned values greater than the signed maximum value. */
5020 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
5021 fmode
= GET_MODE_WIDER_MODE (fmode
))
5022 if (GET_MODE_PRECISION (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
5023 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
5026 if (fmode
== VOIDmode
)
5028 /* There is no such mode. Pretend the target is wide enough. */
5029 fmode
= GET_MODE (to
);
5031 /* Avoid double-rounding when TO is narrower than FROM. */
5032 if ((significand_size (fmode
) + 1)
5033 < GET_MODE_PRECISION (GET_MODE (from
)))
5036 rtx neglabel
= gen_label_rtx ();
5038 /* Don't use TARGET if it isn't a register, is a hard register,
5039 or is the wrong mode. */
5041 || REGNO (target
) < FIRST_PSEUDO_REGISTER
5042 || GET_MODE (target
) != fmode
)
5043 target
= gen_reg_rtx (fmode
);
5045 imode
= GET_MODE (from
);
5046 do_pending_stack_adjust ();
5048 /* Test whether the sign bit is set. */
5049 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
5052 /* The sign bit is not set. Convert as signed. */
5053 expand_float (target
, from
, 0);
5054 emit_jump_insn (gen_jump (label
));
5057 /* The sign bit is set.
5058 Convert to a usable (positive signed) value by shifting right
5059 one bit, while remembering if a nonzero bit was shifted
5060 out; i.e., compute (from & 1) | (from >> 1). */
5062 emit_label (neglabel
);
5063 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
5064 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
5065 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, 1, NULL_RTX
, 1);
5066 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
5068 expand_float (target
, temp
, 0);
5070 /* Multiply by 2 to undo the shift above. */
5071 temp
= expand_binop (fmode
, add_optab
, target
, target
,
5072 target
, 0, OPTAB_LIB_WIDEN
);
5074 emit_move_insn (target
, temp
);
5076 do_pending_stack_adjust ();
5082 /* If we are about to do some arithmetic to correct for an
5083 unsigned operand, do it in a pseudo-register. */
5085 if (GET_MODE (to
) != fmode
5086 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
5087 target
= gen_reg_rtx (fmode
);
5089 /* Convert as signed integer to floating. */
5090 expand_float (target
, from
, 0);
5092 /* If FROM is negative (and therefore TO is negative),
5093 correct its value by 2**bitwidth. */
5095 do_pending_stack_adjust ();
5096 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
5100 real_2expN (&offset
, GET_MODE_PRECISION (GET_MODE (from
)), fmode
);
5101 temp
= expand_binop (fmode
, add_optab
, target
,
5102 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
5103 target
, 0, OPTAB_LIB_WIDEN
);
5105 emit_move_insn (target
, temp
);
5107 do_pending_stack_adjust ();
5112 /* No hardware instruction available; call a library routine. */
5117 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
5119 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
5120 from
= convert_to_mode (SImode
, from
, unsignedp
);
5122 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5123 gcc_assert (libfunc
);
5127 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5128 GET_MODE (to
), 1, from
,
5130 insns
= get_insns ();
5133 emit_libcall_block (insns
, target
, value
,
5134 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FLOAT
: FLOAT
,
5135 GET_MODE (to
), from
));
5140 /* Copy result to requested destination
5141 if we have been computing in a temp location. */
5145 if (GET_MODE (target
) == GET_MODE (to
))
5146 emit_move_insn (to
, target
);
5148 convert_move (to
, target
, 0);
5152 /* Generate code to convert FROM to fixed point and store in TO. FROM
5153 must be floating point. */
5156 expand_fix (rtx to
, rtx from
, int unsignedp
)
5158 enum insn_code icode
;
5160 enum machine_mode fmode
, imode
;
5163 /* We first try to find a pair of modes, one real and one integer, at
5164 least as wide as FROM and TO, respectively, in which we can open-code
5165 this conversion. If the integer mode is wider than the mode of TO,
5166 we can do the conversion either signed or unsigned. */
5168 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5169 fmode
= GET_MODE_WIDER_MODE (fmode
))
5170 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5171 imode
= GET_MODE_WIDER_MODE (imode
))
5173 int doing_unsigned
= unsignedp
;
5175 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5176 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5177 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5179 if (icode
!= CODE_FOR_nothing
)
5181 rtx last
= get_last_insn ();
5182 if (fmode
!= GET_MODE (from
))
5183 from
= convert_to_mode (fmode
, from
, 0);
5187 rtx temp
= gen_reg_rtx (GET_MODE (from
));
5188 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
5192 if (imode
!= GET_MODE (to
))
5193 target
= gen_reg_rtx (imode
);
5195 if (maybe_emit_unop_insn (icode
, target
, from
,
5196 doing_unsigned
? UNSIGNED_FIX
: FIX
))
5199 convert_move (to
, target
, unsignedp
);
5202 delete_insns_since (last
);
5206 /* For an unsigned conversion, there is one more way to do it.
5207 If we have a signed conversion, we generate code that compares
5208 the real value to the largest representable positive number. If if
5209 is smaller, the conversion is done normally. Otherwise, subtract
5210 one plus the highest signed number, convert, and add it back.
5212 We only need to check all real modes, since we know we didn't find
5213 anything with a wider integer mode.
5215 This code used to extend FP value into mode wider than the destination.
5216 This is needed for decimal float modes which cannot accurately
5217 represent one plus the highest signed number of the same size, but
5218 not for binary modes. Consider, for instance conversion from SFmode
5221 The hot path through the code is dealing with inputs smaller than 2^63
5222 and doing just the conversion, so there is no bits to lose.
5224 In the other path we know the value is positive in the range 2^63..2^64-1
5225 inclusive. (as for other input overflow happens and result is undefined)
5226 So we know that the most important bit set in mantissa corresponds to
5227 2^63. The subtraction of 2^63 should not generate any rounding as it
5228 simply clears out that bit. The rest is trivial. */
5230 if (unsignedp
&& GET_MODE_PRECISION (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5231 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5232 fmode
= GET_MODE_WIDER_MODE (fmode
))
5233 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0, &must_trunc
)
5234 && (!DECIMAL_FLOAT_MODE_P (fmode
)
5235 || GET_MODE_BITSIZE (fmode
) > GET_MODE_PRECISION (GET_MODE (to
))))
5238 REAL_VALUE_TYPE offset
;
5239 rtx limit
, lab1
, lab2
, insn
;
5241 bitsize
= GET_MODE_PRECISION (GET_MODE (to
));
5242 real_2expN (&offset
, bitsize
- 1, fmode
);
5243 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5244 lab1
= gen_label_rtx ();
5245 lab2
= gen_label_rtx ();
5247 if (fmode
!= GET_MODE (from
))
5248 from
= convert_to_mode (fmode
, from
, 0);
5250 /* See if we need to do the subtraction. */
5251 do_pending_stack_adjust ();
5252 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5255 /* If not, do the signed "fix" and branch around fixup code. */
5256 expand_fix (to
, from
, 0);
5257 emit_jump_insn (gen_jump (lab2
));
5260 /* Otherwise, subtract 2**(N-1), convert to signed number,
5261 then add 2**(N-1). Do the addition using XOR since this
5262 will often generate better code. */
5264 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5265 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5266 expand_fix (to
, target
, 0);
5267 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5269 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5271 to
, 1, OPTAB_LIB_WIDEN
);
5274 emit_move_insn (to
, target
);
5278 if (optab_handler (mov_optab
, GET_MODE (to
)) != CODE_FOR_nothing
)
5280 /* Make a place for a REG_NOTE and add it. */
5281 insn
= emit_move_insn (to
, to
);
5282 set_dst_reg_note (insn
, REG_EQUAL
,
5283 gen_rtx_fmt_e (UNSIGNED_FIX
, GET_MODE (to
),
5291 /* We can't do it with an insn, so use a library call. But first ensure
5292 that the mode of TO is at least as wide as SImode, since those are the
5293 only library calls we know about. */
5295 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5297 target
= gen_reg_rtx (SImode
);
5299 expand_fix (target
, from
, unsignedp
);
5307 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
5308 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5309 gcc_assert (libfunc
);
5313 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5314 GET_MODE (to
), 1, from
,
5316 insns
= get_insns ();
5319 emit_libcall_block (insns
, target
, value
,
5320 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5321 GET_MODE (to
), from
));
5326 if (GET_MODE (to
) == GET_MODE (target
))
5327 emit_move_insn (to
, target
);
5329 convert_move (to
, target
, 0);
5333 /* Generate code to convert FROM or TO a fixed-point.
5334 If UINTP is true, either TO or FROM is an unsigned integer.
5335 If SATP is true, we need to saturate the result. */
5338 expand_fixed_convert (rtx to
, rtx from
, int uintp
, int satp
)
5340 enum machine_mode to_mode
= GET_MODE (to
);
5341 enum machine_mode from_mode
= GET_MODE (from
);
5343 enum rtx_code this_code
;
5344 enum insn_code code
;
5348 if (to_mode
== from_mode
)
5350 emit_move_insn (to
, from
);
5356 tab
= satp
? satfractuns_optab
: fractuns_optab
;
5357 this_code
= satp
? UNSIGNED_SAT_FRACT
: UNSIGNED_FRACT_CONVERT
;
5361 tab
= satp
? satfract_optab
: fract_optab
;
5362 this_code
= satp
? SAT_FRACT
: FRACT_CONVERT
;
5364 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
5365 if (code
!= CODE_FOR_nothing
)
5367 emit_unop_insn (code
, to
, from
, this_code
);
5371 libfunc
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
5372 gcc_assert (libfunc
);
5375 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, to_mode
,
5376 1, from
, from_mode
);
5377 insns
= get_insns ();
5380 emit_libcall_block (insns
, to
, value
,
5381 gen_rtx_fmt_e (optab_to_code (tab
), to_mode
, from
));
5384 /* Generate code to convert FROM to fixed point and store in TO. FROM
5385 must be floating point, TO must be signed. Use the conversion optab
5386 TAB to do the conversion. */
5389 expand_sfix_optab (rtx to
, rtx from
, convert_optab tab
)
5391 enum insn_code icode
;
5393 enum machine_mode fmode
, imode
;
5395 /* We first try to find a pair of modes, one real and one integer, at
5396 least as wide as FROM and TO, respectively, in which we can open-code
5397 this conversion. If the integer mode is wider than the mode of TO,
5398 we can do the conversion either signed or unsigned. */
5400 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5401 fmode
= GET_MODE_WIDER_MODE (fmode
))
5402 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5403 imode
= GET_MODE_WIDER_MODE (imode
))
5405 icode
= convert_optab_handler (tab
, imode
, fmode
);
5406 if (icode
!= CODE_FOR_nothing
)
5408 rtx last
= get_last_insn ();
5409 if (fmode
!= GET_MODE (from
))
5410 from
= convert_to_mode (fmode
, from
, 0);
5412 if (imode
!= GET_MODE (to
))
5413 target
= gen_reg_rtx (imode
);
5415 if (!maybe_emit_unop_insn (icode
, target
, from
, UNKNOWN
))
5417 delete_insns_since (last
);
5421 convert_move (to
, target
, 0);
5429 /* Report whether we have an instruction to perform the operation
5430 specified by CODE on operands of mode MODE. */
5432 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
5434 return (code_to_optab (code
)
5435 && (optab_handler (code_to_optab (code
), mode
)
5436 != CODE_FOR_nothing
));
5439 /* Initialize the libfunc fields of an entire group of entries in some
5440 optab. Each entry is set equal to a string consisting of a leading
5441 pair of underscores followed by a generic operation name followed by
5442 a mode name (downshifted to lowercase) followed by a single character
5443 representing the number of operands for the given operation (which is
5444 usually one of the characters '2', '3', or '4').
5446 OPTABLE is the table in which libfunc fields are to be initialized.
5447 OPNAME is the generic (string) name of the operation.
5448 SUFFIX is the character which specifies the number of operands for
5449 the given generic operation.
5450 MODE is the mode to generate for.
5454 gen_libfunc (optab optable
, const char *opname
, int suffix
,
5455 enum machine_mode mode
)
5457 unsigned opname_len
= strlen (opname
);
5458 const char *mname
= GET_MODE_NAME (mode
);
5459 unsigned mname_len
= strlen (mname
);
5460 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5461 int len
= prefix_len
+ opname_len
+ mname_len
+ 1 + 1;
5462 char *libfunc_name
= XALLOCAVEC (char, len
);
5469 if (targetm
.libfunc_gnu_prefix
)
5476 for (q
= opname
; *q
; )
5478 for (q
= mname
; *q
; q
++)
5479 *p
++ = TOLOWER (*q
);
5483 set_optab_libfunc (optable
, mode
,
5484 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5487 /* Like gen_libfunc, but verify that integer operation is involved. */
5490 gen_int_libfunc (optab optable
, const char *opname
, char suffix
,
5491 enum machine_mode mode
)
5493 int maxsize
= 2 * BITS_PER_WORD
;
5495 if (GET_MODE_CLASS (mode
) != MODE_INT
)
5497 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5498 maxsize
= LONG_LONG_TYPE_SIZE
;
5499 if (GET_MODE_CLASS (mode
) != MODE_INT
5500 || mode
< word_mode
|| GET_MODE_BITSIZE (mode
) > maxsize
)
5502 gen_libfunc (optable
, opname
, suffix
, mode
);
5505 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5508 gen_fp_libfunc (optab optable
, const char *opname
, char suffix
,
5509 enum machine_mode mode
)
5513 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5514 gen_libfunc (optable
, opname
, suffix
, mode
);
5515 if (DECIMAL_FLOAT_MODE_P (mode
))
5517 dec_opname
= XALLOCAVEC (char, sizeof (DECIMAL_PREFIX
) + strlen (opname
));
5518 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5519 depending on the low level floating format used. */
5520 memcpy (dec_opname
, DECIMAL_PREFIX
, sizeof (DECIMAL_PREFIX
) - 1);
5521 strcpy (dec_opname
+ sizeof (DECIMAL_PREFIX
) - 1, opname
);
5522 gen_libfunc (optable
, dec_opname
, suffix
, mode
);
5526 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5529 gen_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5530 enum machine_mode mode
)
5532 if (!ALL_FIXED_POINT_MODE_P (mode
))
5534 gen_libfunc (optable
, opname
, suffix
, mode
);
5537 /* Like gen_libfunc, but verify that signed fixed-point operation is
5541 gen_signed_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5542 enum machine_mode mode
)
5544 if (!SIGNED_FIXED_POINT_MODE_P (mode
))
5546 gen_libfunc (optable
, opname
, suffix
, mode
);
5549 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5553 gen_unsigned_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5554 enum machine_mode mode
)
5556 if (!UNSIGNED_FIXED_POINT_MODE_P (mode
))
5558 gen_libfunc (optable
, opname
, suffix
, mode
);
5561 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5564 gen_int_fp_libfunc (optab optable
, const char *name
, char suffix
,
5565 enum machine_mode mode
)
5567 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5568 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5569 if (INTEGRAL_MODE_P (mode
))
5570 gen_int_libfunc (optable
, name
, suffix
, mode
);
5573 /* Like gen_libfunc, but verify that FP or INT operation is involved
5574 and add 'v' suffix for integer operation. */
5577 gen_intv_fp_libfunc (optab optable
, const char *name
, char suffix
,
5578 enum machine_mode mode
)
5580 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5581 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5582 if (GET_MODE_CLASS (mode
) == MODE_INT
)
5584 int len
= strlen (name
);
5585 char *v_name
= XALLOCAVEC (char, len
+ 2);
5586 strcpy (v_name
, name
);
5588 v_name
[len
+ 1] = 0;
5589 gen_int_libfunc (optable
, v_name
, suffix
, mode
);
5593 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5597 gen_int_fp_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5598 enum machine_mode mode
)
5600 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5601 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5602 if (INTEGRAL_MODE_P (mode
))
5603 gen_int_libfunc (optable
, name
, suffix
, mode
);
5604 if (ALL_FIXED_POINT_MODE_P (mode
))
5605 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5608 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5612 gen_int_fp_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5613 enum machine_mode mode
)
5615 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5616 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5617 if (INTEGRAL_MODE_P (mode
))
5618 gen_int_libfunc (optable
, name
, suffix
, mode
);
5619 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5620 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5623 /* Like gen_libfunc, but verify that INT or FIXED operation is
5627 gen_int_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5628 enum machine_mode mode
)
5630 if (INTEGRAL_MODE_P (mode
))
5631 gen_int_libfunc (optable
, name
, suffix
, mode
);
5632 if (ALL_FIXED_POINT_MODE_P (mode
))
5633 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5636 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5640 gen_int_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5641 enum machine_mode mode
)
5643 if (INTEGRAL_MODE_P (mode
))
5644 gen_int_libfunc (optable
, name
, suffix
, mode
);
5645 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5646 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5649 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5653 gen_int_unsigned_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5654 enum machine_mode mode
)
5656 if (INTEGRAL_MODE_P (mode
))
5657 gen_int_libfunc (optable
, name
, suffix
, mode
);
5658 if (UNSIGNED_FIXED_POINT_MODE_P (mode
))
5659 gen_unsigned_fixed_libfunc (optable
, name
, suffix
, mode
);
5662 /* Initialize the libfunc fields of an entire group of entries of an
5663 inter-mode-class conversion optab. The string formation rules are
5664 similar to the ones for init_libfuncs, above, but instead of having
5665 a mode name and an operand count these functions have two mode names
5666 and no operand count. */
5669 gen_interclass_conv_libfunc (convert_optab tab
,
5671 enum machine_mode tmode
,
5672 enum machine_mode fmode
)
5674 size_t opname_len
= strlen (opname
);
5675 size_t mname_len
= 0;
5677 const char *fname
, *tname
;
5679 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5680 char *libfunc_name
, *suffix
;
5681 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5684 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5685 depends on which underlying decimal floating point format is used. */
5686 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5688 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5690 nondec_name
= XALLOCAVEC (char, prefix_len
+ opname_len
+ mname_len
+ 1 + 1);
5691 nondec_name
[0] = '_';
5692 nondec_name
[1] = '_';
5693 if (targetm
.libfunc_gnu_prefix
)
5695 nondec_name
[2] = 'g';
5696 nondec_name
[3] = 'n';
5697 nondec_name
[4] = 'u';
5698 nondec_name
[5] = '_';
5701 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5702 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5704 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5707 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5708 memcpy (&dec_name
[2+dec_len
], opname
, opname_len
);
5709 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5711 fname
= GET_MODE_NAME (fmode
);
5712 tname
= GET_MODE_NAME (tmode
);
5714 if (DECIMAL_FLOAT_MODE_P (fmode
) || DECIMAL_FLOAT_MODE_P (tmode
))
5716 libfunc_name
= dec_name
;
5717 suffix
= dec_suffix
;
5721 libfunc_name
= nondec_name
;
5722 suffix
= nondec_suffix
;
5726 for (q
= fname
; *q
; p
++, q
++)
5728 for (q
= tname
; *q
; p
++, q
++)
5733 set_conv_libfunc (tab
, tmode
, fmode
,
5734 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5737 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5738 int->fp conversion. */
5741 gen_int_to_fp_conv_libfunc (convert_optab tab
,
5743 enum machine_mode tmode
,
5744 enum machine_mode fmode
)
5746 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5748 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5750 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5753 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5757 gen_ufloat_conv_libfunc (convert_optab tab
,
5758 const char *opname ATTRIBUTE_UNUSED
,
5759 enum machine_mode tmode
,
5760 enum machine_mode fmode
)
5762 if (DECIMAL_FLOAT_MODE_P (tmode
))
5763 gen_int_to_fp_conv_libfunc (tab
, "floatuns", tmode
, fmode
);
5765 gen_int_to_fp_conv_libfunc (tab
, "floatun", tmode
, fmode
);
5768 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5769 fp->int conversion. */
5772 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab
,
5774 enum machine_mode tmode
,
5775 enum machine_mode fmode
)
5777 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5779 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
)
5781 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5784 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5785 fp->int conversion with no decimal floating point involved. */
5788 gen_fp_to_int_conv_libfunc (convert_optab tab
,
5790 enum machine_mode tmode
,
5791 enum machine_mode fmode
)
5793 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5795 if (GET_MODE_CLASS (tmode
) != MODE_INT
)
5797 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5800 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5801 The string formation rules are
5802 similar to the ones for init_libfunc, above. */
5805 gen_intraclass_conv_libfunc (convert_optab tab
, const char *opname
,
5806 enum machine_mode tmode
, enum machine_mode fmode
)
5808 size_t opname_len
= strlen (opname
);
5809 size_t mname_len
= 0;
5811 const char *fname
, *tname
;
5813 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5814 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5815 char *libfunc_name
, *suffix
;
5818 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5819 depends on which underlying decimal floating point format is used. */
5820 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5822 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5824 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5825 nondec_name
[0] = '_';
5826 nondec_name
[1] = '_';
5827 if (targetm
.libfunc_gnu_prefix
)
5829 nondec_name
[2] = 'g';
5830 nondec_name
[3] = 'n';
5831 nondec_name
[4] = 'u';
5832 nondec_name
[5] = '_';
5834 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5835 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5837 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5840 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5841 memcpy (&dec_name
[2 + dec_len
], opname
, opname_len
);
5842 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5844 fname
= GET_MODE_NAME (fmode
);
5845 tname
= GET_MODE_NAME (tmode
);
5847 if (DECIMAL_FLOAT_MODE_P (fmode
) || DECIMAL_FLOAT_MODE_P (tmode
))
5849 libfunc_name
= dec_name
;
5850 suffix
= dec_suffix
;
5854 libfunc_name
= nondec_name
;
5855 suffix
= nondec_suffix
;
5859 for (q
= fname
; *q
; p
++, q
++)
5861 for (q
= tname
; *q
; p
++, q
++)
5867 set_conv_libfunc (tab
, tmode
, fmode
,
5868 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5871 /* Pick proper libcall for trunc_optab. We need to chose if we do
5872 truncation or extension and interclass or intraclass. */
5875 gen_trunc_conv_libfunc (convert_optab tab
,
5877 enum machine_mode tmode
,
5878 enum machine_mode fmode
)
5880 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5882 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5887 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5888 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5889 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5891 if (GET_MODE_PRECISION (fmode
) <= GET_MODE_PRECISION (tmode
))
5894 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5895 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5896 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5897 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5900 /* Pick proper libcall for extend_optab. We need to chose if we do
5901 truncation or extension and interclass or intraclass. */
5904 gen_extend_conv_libfunc (convert_optab tab
,
5905 const char *opname ATTRIBUTE_UNUSED
,
5906 enum machine_mode tmode
,
5907 enum machine_mode fmode
)
5909 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5911 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5916 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5917 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5918 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5920 if (GET_MODE_PRECISION (fmode
) > GET_MODE_PRECISION (tmode
))
5923 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5924 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5925 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5926 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5929 /* Pick proper libcall for fract_optab. We need to chose if we do
5930 interclass or intraclass. */
5933 gen_fract_conv_libfunc (convert_optab tab
,
5935 enum machine_mode tmode
,
5936 enum machine_mode fmode
)
5940 if (!(ALL_FIXED_POINT_MODE_P (tmode
) || ALL_FIXED_POINT_MODE_P (fmode
)))
5943 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5944 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5946 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5949 /* Pick proper libcall for fractuns_optab. */
5952 gen_fractuns_conv_libfunc (convert_optab tab
,
5954 enum machine_mode tmode
,
5955 enum machine_mode fmode
)
5959 /* One mode must be a fixed-point mode, and the other must be an integer
5961 if (!((ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
)
5962 || (ALL_FIXED_POINT_MODE_P (fmode
)
5963 && GET_MODE_CLASS (tmode
) == MODE_INT
)))
5966 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5969 /* Pick proper libcall for satfract_optab. We need to chose if we do
5970 interclass or intraclass. */
5973 gen_satfract_conv_libfunc (convert_optab tab
,
5975 enum machine_mode tmode
,
5976 enum machine_mode fmode
)
5980 /* TMODE must be a fixed-point mode. */
5981 if (!ALL_FIXED_POINT_MODE_P (tmode
))
5984 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5985 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5987 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5990 /* Pick proper libcall for satfractuns_optab. */
5993 gen_satfractuns_conv_libfunc (convert_optab tab
,
5995 enum machine_mode tmode
,
5996 enum machine_mode fmode
)
6000 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
6001 if (!(ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
))
6004 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6007 /* A table of previously-created libfuncs, hashed by name. */
6008 static GTY ((param_is (union tree_node
))) htab_t libfunc_decls
;
6010 /* Hashtable callbacks for libfunc_decls. */
6013 libfunc_decl_hash (const void *entry
)
6015 return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree
) entry
));
6019 libfunc_decl_eq (const void *entry1
, const void *entry2
)
6021 return DECL_NAME ((const_tree
) entry1
) == (const_tree
) entry2
;
6024 /* Build a decl for a libfunc named NAME. */
6027 build_libfunc_function (const char *name
)
6029 tree decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
6030 get_identifier (name
),
6031 build_function_type (integer_type_node
, NULL_TREE
));
6032 /* ??? We don't have any type information except for this is
6033 a function. Pretend this is "int foo()". */
6034 DECL_ARTIFICIAL (decl
) = 1;
6035 DECL_EXTERNAL (decl
) = 1;
6036 TREE_PUBLIC (decl
) = 1;
6037 gcc_assert (DECL_ASSEMBLER_NAME (decl
));
6039 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6040 are the flags assigned by targetm.encode_section_info. */
6041 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
6047 init_one_libfunc (const char *name
)
6053 if (libfunc_decls
== NULL
)
6054 libfunc_decls
= htab_create_ggc (37, libfunc_decl_hash
,
6055 libfunc_decl_eq
, NULL
);
6057 /* See if we have already created a libfunc decl for this function. */
6058 id
= get_identifier (name
);
6059 hash
= IDENTIFIER_HASH_VALUE (id
);
6060 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, INSERT
);
6061 decl
= (tree
) *slot
;
6064 /* Create a new decl, so that it can be passed to
6065 targetm.encode_section_info. */
6066 decl
= build_libfunc_function (name
);
6069 return XEXP (DECL_RTL (decl
), 0);
6072 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6075 set_user_assembler_libfunc (const char *name
, const char *asmspec
)
6081 id
= get_identifier (name
);
6082 hash
= IDENTIFIER_HASH_VALUE (id
);
6083 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, NO_INSERT
);
6085 decl
= (tree
) *slot
;
6086 set_user_assembler_name (decl
, asmspec
);
6087 return XEXP (DECL_RTL (decl
), 0);
6090 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6091 MODE to NAME, which should be either 0 or a string constant. */
6093 set_optab_libfunc (optab op
, enum machine_mode mode
, const char *name
)
6096 struct libfunc_entry e
;
6097 struct libfunc_entry
**slot
;
6104 val
= init_one_libfunc (name
);
6107 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6109 *slot
= ggc_alloc_libfunc_entry ();
6111 (*slot
)->mode1
= mode
;
6112 (*slot
)->mode2
= VOIDmode
;
6113 (*slot
)->libfunc
= val
;
6116 /* Call this to reset the function entry for one conversion optab
6117 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6118 either 0 or a string constant. */
6120 set_conv_libfunc (convert_optab optab
, enum machine_mode tmode
,
6121 enum machine_mode fmode
, const char *name
)
6124 struct libfunc_entry e
;
6125 struct libfunc_entry
**slot
;
6132 val
= init_one_libfunc (name
);
6135 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6137 *slot
= ggc_alloc_libfunc_entry ();
6138 (*slot
)->op
= optab
;
6139 (*slot
)->mode1
= tmode
;
6140 (*slot
)->mode2
= fmode
;
6141 (*slot
)->libfunc
= val
;
6144 /* Call this to initialize the contents of the optabs
6145 appropriately for the current target machine. */
6151 htab_empty (libfunc_hash
);
6153 libfunc_hash
= htab_create_ggc (10, hash_libfunc
, eq_libfunc
, NULL
);
6155 /* Fill in the optabs with the insns we support. */
6156 init_all_optabs (this_fn_optabs
);
6158 /* The ffs function operates on `int'. Fall back on it if we do not
6159 have a libgcc2 function for that width. */
6160 if (INT_TYPE_SIZE
< BITS_PER_WORD
)
6161 set_optab_libfunc (ffs_optab
, mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0),
6164 /* Explicitly initialize the bswap libfuncs since we need them to be
6165 valid for things other than word_mode. */
6166 if (targetm
.libfunc_gnu_prefix
)
6168 set_optab_libfunc (bswap_optab
, SImode
, "__gnu_bswapsi2");
6169 set_optab_libfunc (bswap_optab
, DImode
, "__gnu_bswapdi2");
6173 set_optab_libfunc (bswap_optab
, SImode
, "__bswapsi2");
6174 set_optab_libfunc (bswap_optab
, DImode
, "__bswapdi2");
6177 /* Use cabs for double complex abs, since systems generally have cabs.
6178 Don't define any libcall for float complex, so that cabs will be used. */
6179 if (complex_double_type_node
)
6180 set_optab_libfunc (abs_optab
, TYPE_MODE (complex_double_type_node
),
6183 abort_libfunc
= init_one_libfunc ("abort");
6184 memcpy_libfunc
= init_one_libfunc ("memcpy");
6185 memmove_libfunc
= init_one_libfunc ("memmove");
6186 memcmp_libfunc
= init_one_libfunc ("memcmp");
6187 memset_libfunc
= init_one_libfunc ("memset");
6188 setbits_libfunc
= init_one_libfunc ("__setbits");
6190 #ifndef DONT_USE_BUILTIN_SETJMP
6191 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
6192 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
6194 setjmp_libfunc
= init_one_libfunc ("setjmp");
6195 longjmp_libfunc
= init_one_libfunc ("longjmp");
6197 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
6198 unwind_sjlj_unregister_libfunc
6199 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6201 /* For function entry/exit instrumentation. */
6202 profile_function_entry_libfunc
6203 = init_one_libfunc ("__cyg_profile_func_enter");
6204 profile_function_exit_libfunc
6205 = init_one_libfunc ("__cyg_profile_func_exit");
6207 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
6209 /* Allow the target to add more libcalls or rename some, etc. */
6210 targetm
.init_libfuncs ();
6213 /* Use the current target and options to initialize
6214 TREE_OPTIMIZATION_OPTABS (OPTNODE). */
6217 init_tree_optimization_optabs (tree optnode
)
6219 /* Quick exit if we have already computed optabs for this target. */
6220 if (TREE_OPTIMIZATION_BASE_OPTABS (optnode
) == this_target_optabs
)
6223 /* Forget any previous information and set up for the current target. */
6224 TREE_OPTIMIZATION_BASE_OPTABS (optnode
) = this_target_optabs
;
6225 struct target_optabs
*tmp_optabs
= (struct target_optabs
*)
6226 TREE_OPTIMIZATION_OPTABS (optnode
);
6228 memset (tmp_optabs
, 0, sizeof (struct target_optabs
));
6230 tmp_optabs
= (struct target_optabs
*)
6231 ggc_alloc_atomic (sizeof (struct target_optabs
));
6233 /* Generate a new set of optabs into tmp_optabs. */
6234 init_all_optabs (tmp_optabs
);
6236 /* If the optabs changed, record it. */
6237 if (memcmp (tmp_optabs
, this_target_optabs
, sizeof (struct target_optabs
)))
6238 TREE_OPTIMIZATION_OPTABS (optnode
) = (unsigned char *) tmp_optabs
;
6241 TREE_OPTIMIZATION_OPTABS (optnode
) = NULL
;
6242 ggc_free (tmp_optabs
);
6246 /* A helper function for init_sync_libfuncs. Using the basename BASE,
6247 install libfuncs into TAB for BASE_N for 1 <= N <= MAX. */
6250 init_sync_libfuncs_1 (optab tab
, const char *base
, int max
)
6252 enum machine_mode mode
;
6254 size_t len
= strlen (base
);
6257 gcc_assert (max
<= 8);
6258 gcc_assert (len
+ 3 < sizeof (buf
));
6260 memcpy (buf
, base
, len
);
6263 buf
[len
+ 2] = '\0';
6266 for (i
= 1; i
<= max
; i
*= 2)
6268 buf
[len
+ 1] = '0' + i
;
6269 set_optab_libfunc (tab
, mode
, buf
);
6270 mode
= GET_MODE_2XWIDER_MODE (mode
);
6275 init_sync_libfuncs (int max
)
6277 if (!flag_sync_libcalls
)
6280 init_sync_libfuncs_1 (sync_compare_and_swap_optab
,
6281 "__sync_val_compare_and_swap", max
);
6282 init_sync_libfuncs_1 (sync_lock_test_and_set_optab
,
6283 "__sync_lock_test_and_set", max
);
6285 init_sync_libfuncs_1 (sync_old_add_optab
, "__sync_fetch_and_add", max
);
6286 init_sync_libfuncs_1 (sync_old_sub_optab
, "__sync_fetch_and_sub", max
);
6287 init_sync_libfuncs_1 (sync_old_ior_optab
, "__sync_fetch_and_or", max
);
6288 init_sync_libfuncs_1 (sync_old_and_optab
, "__sync_fetch_and_and", max
);
6289 init_sync_libfuncs_1 (sync_old_xor_optab
, "__sync_fetch_and_xor", max
);
6290 init_sync_libfuncs_1 (sync_old_nand_optab
, "__sync_fetch_and_nand", max
);
6292 init_sync_libfuncs_1 (sync_new_add_optab
, "__sync_add_and_fetch", max
);
6293 init_sync_libfuncs_1 (sync_new_sub_optab
, "__sync_sub_and_fetch", max
);
6294 init_sync_libfuncs_1 (sync_new_ior_optab
, "__sync_or_and_fetch", max
);
6295 init_sync_libfuncs_1 (sync_new_and_optab
, "__sync_and_and_fetch", max
);
6296 init_sync_libfuncs_1 (sync_new_xor_optab
, "__sync_xor_and_fetch", max
);
6297 init_sync_libfuncs_1 (sync_new_nand_optab
, "__sync_nand_and_fetch", max
);
6300 /* Print information about the current contents of the optabs on
6304 debug_optab_libfuncs (void)
6308 /* Dump the arithmetic optabs. */
6309 for (i
= FIRST_NORM_OPTAB
; i
<= LAST_NORMLIB_OPTAB
; ++i
)
6310 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6312 rtx l
= optab_libfunc ((optab
) i
, (enum machine_mode
) j
);
6315 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6316 fprintf (stderr
, "%s\t%s:\t%s\n",
6317 GET_RTX_NAME (optab_to_code ((optab
) i
)),
6323 /* Dump the conversion optabs. */
6324 for (i
= FIRST_CONV_OPTAB
; i
<= LAST_CONVLIB_OPTAB
; ++i
)
6325 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6326 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
6328 rtx l
= convert_optab_libfunc ((optab
) i
, (enum machine_mode
) j
,
6329 (enum machine_mode
) k
);
6332 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6333 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
6334 GET_RTX_NAME (optab_to_code ((optab
) i
)),
6343 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6344 CODE. Return 0 on failure. */
6347 gen_cond_trap (enum rtx_code code
, rtx op1
, rtx op2
, rtx tcode
)
6349 enum machine_mode mode
= GET_MODE (op1
);
6350 enum insn_code icode
;
6354 if (mode
== VOIDmode
)
6357 icode
= optab_handler (ctrap_optab
, mode
);
6358 if (icode
== CODE_FOR_nothing
)
6361 /* Some targets only accept a zero trap code. */
6362 if (!insn_operand_matches (icode
, 3, tcode
))
6365 do_pending_stack_adjust ();
6367 prepare_cmp_insn (op1
, op2
, code
, NULL_RTX
, false, OPTAB_DIRECT
,
6372 insn
= GEN_FCN (icode
) (trap_rtx
, XEXP (trap_rtx
, 0), XEXP (trap_rtx
, 1),
6375 /* If that failed, then give up. */
6383 insn
= get_insns ();
6388 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6389 or unsigned operation code. */
6391 static enum rtx_code
6392 get_rtx_code (enum tree_code tcode
, bool unsignedp
)
6404 code
= unsignedp
? LTU
: LT
;
6407 code
= unsignedp
? LEU
: LE
;
6410 code
= unsignedp
? GTU
: GT
;
6413 code
= unsignedp
? GEU
: GE
;
6416 case UNORDERED_EXPR
:
6447 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6448 unsigned operators. Do not generate compare instruction. */
6451 vector_compare_rtx (enum tree_code tcode
, tree t_op0
, tree t_op1
,
6452 bool unsignedp
, enum insn_code icode
)
6454 struct expand_operand ops
[2];
6455 rtx rtx_op0
, rtx_op1
;
6456 enum rtx_code rcode
= get_rtx_code (tcode
, unsignedp
);
6458 gcc_assert (TREE_CODE_CLASS (tcode
) == tcc_comparison
);
6460 /* Expand operands. */
6461 rtx_op0
= expand_expr (t_op0
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op0
)),
6463 rtx_op1
= expand_expr (t_op1
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op1
)),
6466 create_input_operand (&ops
[0], rtx_op0
, GET_MODE (rtx_op0
));
6467 create_input_operand (&ops
[1], rtx_op1
, GET_MODE (rtx_op1
));
6468 if (!maybe_legitimize_operands (icode
, 4, 2, ops
))
6470 return gen_rtx_fmt_ee (rcode
, VOIDmode
, ops
[0].value
, ops
[1].value
);
6473 /* Return true if VEC_PERM_EXPR can be expanded using SIMD extensions
6474 of the CPU. SEL may be NULL, which stands for an unknown constant. */
6477 can_vec_perm_p (enum machine_mode mode
, bool variable
,
6478 const unsigned char *sel
)
6480 enum machine_mode qimode
;
6482 /* If the target doesn't implement a vector mode for the vector type,
6483 then no operations are supported. */
6484 if (!VECTOR_MODE_P (mode
))
6489 if (direct_optab_handler (vec_perm_const_optab
, mode
) != CODE_FOR_nothing
6491 || targetm
.vectorize
.vec_perm_const_ok
== NULL
6492 || targetm
.vectorize
.vec_perm_const_ok (mode
, sel
)))
6496 if (direct_optab_handler (vec_perm_optab
, mode
) != CODE_FOR_nothing
)
6499 /* We allow fallback to a QI vector mode, and adjust the mask. */
6500 if (GET_MODE_INNER (mode
) == QImode
)
6502 qimode
= mode_for_vector (QImode
, GET_MODE_SIZE (mode
));
6503 if (!VECTOR_MODE_P (qimode
))
6506 /* ??? For completeness, we ought to check the QImode version of
6507 vec_perm_const_optab. But all users of this implicit lowering
6508 feature implement the variable vec_perm_optab. */
6509 if (direct_optab_handler (vec_perm_optab
, qimode
) == CODE_FOR_nothing
)
6512 /* In order to support the lowering of variable permutations,
6513 we need to support shifts and adds. */
6516 if (GET_MODE_UNIT_SIZE (mode
) > 2
6517 && optab_handler (ashl_optab
, mode
) == CODE_FOR_nothing
6518 && optab_handler (vashl_optab
, mode
) == CODE_FOR_nothing
)
6520 if (optab_handler (add_optab
, qimode
) == CODE_FOR_nothing
)
6527 /* A subroutine of expand_vec_perm for expanding one vec_perm insn. */
6530 expand_vec_perm_1 (enum insn_code icode
, rtx target
,
6531 rtx v0
, rtx v1
, rtx sel
)
6533 enum machine_mode tmode
= GET_MODE (target
);
6534 enum machine_mode smode
= GET_MODE (sel
);
6535 struct expand_operand ops
[4];
6537 create_output_operand (&ops
[0], target
, tmode
);
6538 create_input_operand (&ops
[3], sel
, smode
);
6540 /* Make an effort to preserve v0 == v1. The target expander is able to
6541 rely on this to determine if we're permuting a single input operand. */
6542 if (rtx_equal_p (v0
, v1
))
6544 if (!insn_operand_matches (icode
, 1, v0
))
6545 v0
= force_reg (tmode
, v0
);
6546 gcc_checking_assert (insn_operand_matches (icode
, 1, v0
));
6547 gcc_checking_assert (insn_operand_matches (icode
, 2, v0
));
6549 create_fixed_operand (&ops
[1], v0
);
6550 create_fixed_operand (&ops
[2], v0
);
6554 create_input_operand (&ops
[1], v0
, tmode
);
6555 create_input_operand (&ops
[2], v1
, tmode
);
6558 if (maybe_expand_insn (icode
, 4, ops
))
6559 return ops
[0].value
;
6563 /* Generate instructions for vec_perm optab given its mode
6564 and three operands. */
6567 expand_vec_perm (enum machine_mode mode
, rtx v0
, rtx v1
, rtx sel
, rtx target
)
6569 enum insn_code icode
;
6570 enum machine_mode qimode
;
6571 unsigned int i
, w
, e
, u
;
6572 rtx tmp
, sel_qi
= NULL
;
6575 if (!target
|| GET_MODE (target
) != mode
)
6576 target
= gen_reg_rtx (mode
);
6578 w
= GET_MODE_SIZE (mode
);
6579 e
= GET_MODE_NUNITS (mode
);
6580 u
= GET_MODE_UNIT_SIZE (mode
);
6582 /* Set QIMODE to a different vector mode with byte elements.
6583 If no such mode, or if MODE already has byte elements, use VOIDmode. */
6585 if (GET_MODE_INNER (mode
) != QImode
)
6587 qimode
= mode_for_vector (QImode
, w
);
6588 if (!VECTOR_MODE_P (qimode
))
6592 /* If the input is a constant, expand it specially. */
6593 gcc_assert (GET_MODE_CLASS (GET_MODE (sel
)) == MODE_VECTOR_INT
);
6594 if (GET_CODE (sel
) == CONST_VECTOR
)
6596 icode
= direct_optab_handler (vec_perm_const_optab
, mode
);
6597 if (icode
!= CODE_FOR_nothing
)
6599 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6604 /* Fall back to a constant byte-based permutation. */
6605 if (qimode
!= VOIDmode
)
6607 vec
= rtvec_alloc (w
);
6608 for (i
= 0; i
< e
; ++i
)
6610 unsigned int j
, this_e
;
6612 this_e
= INTVAL (CONST_VECTOR_ELT (sel
, i
));
6613 this_e
&= 2 * e
- 1;
6616 for (j
= 0; j
< u
; ++j
)
6617 RTVEC_ELT (vec
, i
* u
+ j
) = GEN_INT (this_e
+ j
);
6619 sel_qi
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6621 icode
= direct_optab_handler (vec_perm_const_optab
, qimode
);
6622 if (icode
!= CODE_FOR_nothing
)
6624 tmp
= mode
!= qimode
? gen_reg_rtx (qimode
) : target
;
6625 tmp
= expand_vec_perm_1 (icode
, tmp
, gen_lowpart (qimode
, v0
),
6626 gen_lowpart (qimode
, v1
), sel_qi
);
6628 return gen_lowpart (mode
, tmp
);
6633 /* Otherwise expand as a fully variable permuation. */
6634 icode
= direct_optab_handler (vec_perm_optab
, mode
);
6635 if (icode
!= CODE_FOR_nothing
)
6637 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6642 /* As a special case to aid several targets, lower the element-based
6643 permutation to a byte-based permutation and try again. */
6644 if (qimode
== VOIDmode
)
6646 icode
= direct_optab_handler (vec_perm_optab
, qimode
);
6647 if (icode
== CODE_FOR_nothing
)
6652 /* Multiply each element by its byte size. */
6653 enum machine_mode selmode
= GET_MODE (sel
);
6655 sel
= expand_simple_binop (selmode
, PLUS
, sel
, sel
,
6656 sel
, 0, OPTAB_DIRECT
);
6658 sel
= expand_simple_binop (selmode
, ASHIFT
, sel
,
6659 GEN_INT (exact_log2 (u
)),
6660 sel
, 0, OPTAB_DIRECT
);
6661 gcc_assert (sel
!= NULL
);
6663 /* Broadcast the low byte each element into each of its bytes. */
6664 vec
= rtvec_alloc (w
);
6665 for (i
= 0; i
< w
; ++i
)
6667 int this_e
= i
/ u
* u
;
6668 if (BYTES_BIG_ENDIAN
)
6670 RTVEC_ELT (vec
, i
) = GEN_INT (this_e
);
6672 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6673 sel
= gen_lowpart (qimode
, sel
);
6674 sel
= expand_vec_perm (qimode
, sel
, sel
, tmp
, NULL
);
6675 gcc_assert (sel
!= NULL
);
6677 /* Add the byte offset to each byte element. */
6678 /* Note that the definition of the indicies here is memory ordering,
6679 so there should be no difference between big and little endian. */
6680 vec
= rtvec_alloc (w
);
6681 for (i
= 0; i
< w
; ++i
)
6682 RTVEC_ELT (vec
, i
) = GEN_INT (i
% u
);
6683 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6684 sel_qi
= expand_simple_binop (qimode
, PLUS
, sel
, tmp
,
6685 sel
, 0, OPTAB_DIRECT
);
6686 gcc_assert (sel_qi
!= NULL
);
6689 tmp
= mode
!= qimode
? gen_reg_rtx (qimode
) : target
;
6690 tmp
= expand_vec_perm_1 (icode
, tmp
, gen_lowpart (qimode
, v0
),
6691 gen_lowpart (qimode
, v1
), sel_qi
);
6693 tmp
= gen_lowpart (mode
, tmp
);
6697 /* Return insn code for a conditional operator with a comparison in
6698 mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
6700 static inline enum insn_code
6701 get_vcond_icode (enum machine_mode vmode
, enum machine_mode cmode
, bool uns
)
6703 enum insn_code icode
= CODE_FOR_nothing
;
6705 icode
= convert_optab_handler (vcondu_optab
, vmode
, cmode
);
6707 icode
= convert_optab_handler (vcond_optab
, vmode
, cmode
);
6711 /* Return TRUE iff, appropriate vector insns are available
6712 for vector cond expr with vector type VALUE_TYPE and a comparison
6713 with operand vector types in CMP_OP_TYPE. */
6716 expand_vec_cond_expr_p (tree value_type
, tree cmp_op_type
)
6718 enum machine_mode value_mode
= TYPE_MODE (value_type
);
6719 enum machine_mode cmp_op_mode
= TYPE_MODE (cmp_op_type
);
6720 if (GET_MODE_SIZE (value_mode
) != GET_MODE_SIZE (cmp_op_mode
)
6721 || GET_MODE_NUNITS (value_mode
) != GET_MODE_NUNITS (cmp_op_mode
)
6722 || get_vcond_icode (TYPE_MODE (value_type
), TYPE_MODE (cmp_op_type
),
6723 TYPE_UNSIGNED (cmp_op_type
)) == CODE_FOR_nothing
)
6728 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
6732 expand_vec_cond_expr (tree vec_cond_type
, tree op0
, tree op1
, tree op2
,
6735 struct expand_operand ops
[6];
6736 enum insn_code icode
;
6737 rtx comparison
, rtx_op1
, rtx_op2
;
6738 enum machine_mode mode
= TYPE_MODE (vec_cond_type
);
6739 enum machine_mode cmp_op_mode
;
6742 enum tree_code tcode
;
6744 if (COMPARISON_CLASS_P (op0
))
6746 op0a
= TREE_OPERAND (op0
, 0);
6747 op0b
= TREE_OPERAND (op0
, 1);
6748 tcode
= TREE_CODE (op0
);
6753 gcc_assert (!TYPE_UNSIGNED (TREE_TYPE (op0
)));
6755 op0b
= build_zero_cst (TREE_TYPE (op0
));
6758 unsignedp
= TYPE_UNSIGNED (TREE_TYPE (op0a
));
6759 cmp_op_mode
= TYPE_MODE (TREE_TYPE (op0a
));
6762 gcc_assert (GET_MODE_SIZE (mode
) == GET_MODE_SIZE (cmp_op_mode
)
6763 && GET_MODE_NUNITS (mode
) == GET_MODE_NUNITS (cmp_op_mode
));
6765 icode
= get_vcond_icode (mode
, cmp_op_mode
, unsignedp
);
6766 if (icode
== CODE_FOR_nothing
)
6769 comparison
= vector_compare_rtx (tcode
, op0a
, op0b
, unsignedp
, icode
);
6770 rtx_op1
= expand_normal (op1
);
6771 rtx_op2
= expand_normal (op2
);
6773 create_output_operand (&ops
[0], target
, mode
);
6774 create_input_operand (&ops
[1], rtx_op1
, mode
);
6775 create_input_operand (&ops
[2], rtx_op2
, mode
);
6776 create_fixed_operand (&ops
[3], comparison
);
6777 create_fixed_operand (&ops
[4], XEXP (comparison
, 0));
6778 create_fixed_operand (&ops
[5], XEXP (comparison
, 1));
6779 expand_insn (icode
, 6, ops
);
6780 return ops
[0].value
;
6783 /* Return non-zero if a highpart multiply is supported of can be synthisized.
6784 For the benefit of expand_mult_highpart, the return value is 1 for direct,
6785 2 for even/odd widening, and 3 for hi/lo widening. */
6788 can_mult_highpart_p (enum machine_mode mode
, bool uns_p
)
6794 op
= uns_p
? umul_highpart_optab
: smul_highpart_optab
;
6795 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6798 /* If the mode is an integral vector, synth from widening operations. */
6799 if (GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
)
6802 nunits
= GET_MODE_NUNITS (mode
);
6803 sel
= XALLOCAVEC (unsigned char, nunits
);
6805 op
= uns_p
? vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
6806 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6808 op
= uns_p
? vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
6809 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6811 for (i
= 0; i
< nunits
; ++i
)
6812 sel
[i
] = !BYTES_BIG_ENDIAN
+ (i
& ~1) + ((i
& 1) ? nunits
: 0);
6813 if (can_vec_perm_p (mode
, false, sel
))
6818 op
= uns_p
? vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
6819 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6821 op
= uns_p
? vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
6822 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6824 for (i
= 0; i
< nunits
; ++i
)
6825 sel
[i
] = 2 * i
+ (BYTES_BIG_ENDIAN
? 0 : 1);
6826 if (can_vec_perm_p (mode
, false, sel
))
6834 /* Expand a highpart multiply. */
6837 expand_mult_highpart (enum machine_mode mode
, rtx op0
, rtx op1
,
6838 rtx target
, bool uns_p
)
6840 struct expand_operand eops
[3];
6841 enum insn_code icode
;
6842 int method
, i
, nunits
;
6843 enum machine_mode wmode
;
6848 method
= can_mult_highpart_p (mode
, uns_p
);
6854 tab1
= uns_p
? umul_highpart_optab
: smul_highpart_optab
;
6855 return expand_binop (mode
, tab1
, op0
, op1
, target
, uns_p
,
6858 tab1
= uns_p
? vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
6859 tab2
= uns_p
? vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
6862 tab1
= uns_p
? vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
6863 tab2
= uns_p
? vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
6864 if (BYTES_BIG_ENDIAN
)
6875 icode
= optab_handler (tab1
, mode
);
6876 nunits
= GET_MODE_NUNITS (mode
);
6877 wmode
= insn_data
[icode
].operand
[0].mode
;
6878 gcc_checking_assert (2 * GET_MODE_NUNITS (wmode
) == nunits
);
6879 gcc_checking_assert (GET_MODE_SIZE (wmode
) == GET_MODE_SIZE (mode
));
6881 create_output_operand (&eops
[0], gen_reg_rtx (wmode
), wmode
);
6882 create_input_operand (&eops
[1], op0
, mode
);
6883 create_input_operand (&eops
[2], op1
, mode
);
6884 expand_insn (icode
, 3, eops
);
6885 m1
= gen_lowpart (mode
, eops
[0].value
);
6887 create_output_operand (&eops
[0], gen_reg_rtx (wmode
), wmode
);
6888 create_input_operand (&eops
[1], op0
, mode
);
6889 create_input_operand (&eops
[2], op1
, mode
);
6890 expand_insn (optab_handler (tab2
, mode
), 3, eops
);
6891 m2
= gen_lowpart (mode
, eops
[0].value
);
6893 v
= rtvec_alloc (nunits
);
6896 for (i
= 0; i
< nunits
; ++i
)
6897 RTVEC_ELT (v
, i
) = GEN_INT (!BYTES_BIG_ENDIAN
+ (i
& ~1)
6898 + ((i
& 1) ? nunits
: 0));
6902 for (i
= 0; i
< nunits
; ++i
)
6903 RTVEC_ELT (v
, i
) = GEN_INT (2 * i
+ (BYTES_BIG_ENDIAN
? 0 : 1));
6905 perm
= gen_rtx_CONST_VECTOR (mode
, v
);
6907 return expand_vec_perm (mode
, m1
, m2
, perm
, target
);
6910 /* Return true if there is a compare_and_swap pattern. */
6913 can_compare_and_swap_p (enum machine_mode mode
, bool allow_libcall
)
6915 enum insn_code icode
;
6917 /* Check for __atomic_compare_and_swap. */
6918 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
6919 if (icode
!= CODE_FOR_nothing
)
6922 /* Check for __sync_compare_and_swap. */
6923 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
6924 if (icode
!= CODE_FOR_nothing
)
6926 if (allow_libcall
&& optab_libfunc (sync_compare_and_swap_optab
, mode
))
6929 /* No inline compare and swap. */
6933 /* Return true if an atomic exchange can be performed. */
6936 can_atomic_exchange_p (enum machine_mode mode
, bool allow_libcall
)
6938 enum insn_code icode
;
6940 /* Check for __atomic_exchange. */
6941 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
6942 if (icode
!= CODE_FOR_nothing
)
6945 /* Don't check __sync_test_and_set, as on some platforms that
6946 has reduced functionality. Targets that really do support
6947 a proper exchange should simply be updated to the __atomics. */
6949 return can_compare_and_swap_p (mode
, allow_libcall
);
6953 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
6957 find_cc_set (rtx x
, const_rtx pat
, void *data
)
6959 if (REG_P (x
) && GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
6960 && GET_CODE (pat
) == SET
)
6962 rtx
*p_cc_reg
= (rtx
*) data
;
6963 gcc_assert (!*p_cc_reg
);
6968 /* This is a helper function for the other atomic operations. This function
6969 emits a loop that contains SEQ that iterates until a compare-and-swap
6970 operation at the end succeeds. MEM is the memory to be modified. SEQ is
6971 a set of instructions that takes a value from OLD_REG as an input and
6972 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
6973 set to the current contents of MEM. After SEQ, a compare-and-swap will
6974 attempt to update MEM with NEW_REG. The function returns true when the
6975 loop was generated successfully. */
6978 expand_compare_and_swap_loop (rtx mem
, rtx old_reg
, rtx new_reg
, rtx seq
)
6980 enum machine_mode mode
= GET_MODE (mem
);
6981 rtx label
, cmp_reg
, success
, oldval
;
6983 /* The loop we want to generate looks like
6989 (success, cmp_reg) = compare-and-swap(mem, old_reg, new_reg)
6993 Note that we only do the plain load from memory once. Subsequent
6994 iterations use the value loaded by the compare-and-swap pattern. */
6996 label
= gen_label_rtx ();
6997 cmp_reg
= gen_reg_rtx (mode
);
6999 emit_move_insn (cmp_reg
, mem
);
7001 emit_move_insn (old_reg
, cmp_reg
);
7007 if (!expand_atomic_compare_and_swap (&success
, &oldval
, mem
, old_reg
,
7008 new_reg
, false, MEMMODEL_SEQ_CST
,
7012 if (oldval
!= cmp_reg
)
7013 emit_move_insn (cmp_reg
, oldval
);
7015 /* Mark this jump predicted not taken. */
7016 emit_cmp_and_jump_insns (success
, const0_rtx
, EQ
, const0_rtx
,
7017 GET_MODE (success
), 1, label
, 0);
7022 /* This function tries to emit an atomic_exchange intruction. VAL is written
7023 to *MEM using memory model MODEL. The previous contents of *MEM are returned,
7024 using TARGET if possible. */
7027 maybe_emit_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7029 enum machine_mode mode
= GET_MODE (mem
);
7030 enum insn_code icode
;
7032 /* If the target supports the exchange directly, great. */
7033 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7034 if (icode
!= CODE_FOR_nothing
)
7036 struct expand_operand ops
[4];
7038 create_output_operand (&ops
[0], target
, mode
);
7039 create_fixed_operand (&ops
[1], mem
);
7040 create_input_operand (&ops
[2], val
, mode
);
7041 create_integer_operand (&ops
[3], model
);
7042 if (maybe_expand_insn (icode
, 4, ops
))
7043 return ops
[0].value
;
7049 /* This function tries to implement an atomic exchange operation using
7050 __sync_lock_test_and_set. VAL is written to *MEM using memory model MODEL.
7051 The previous contents of *MEM are returned, using TARGET if possible.
7052 Since this instructionn is an acquire barrier only, stronger memory
7053 models may require additional barriers to be emitted. */
7056 maybe_emit_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
,
7057 enum memmodel model
)
7059 enum machine_mode mode
= GET_MODE (mem
);
7060 enum insn_code icode
;
7061 rtx last_insn
= get_last_insn ();
7063 icode
= optab_handler (sync_lock_test_and_set_optab
, mode
);
7065 /* Legacy sync_lock_test_and_set is an acquire barrier. If the pattern
7066 exists, and the memory model is stronger than acquire, add a release
7067 barrier before the instruction. */
7069 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
7070 || (model
& MEMMODEL_MASK
) == MEMMODEL_RELEASE
7071 || (model
& MEMMODEL_MASK
) == MEMMODEL_ACQ_REL
)
7072 expand_mem_thread_fence (model
);
7074 if (icode
!= CODE_FOR_nothing
)
7076 struct expand_operand ops
[3];
7077 create_output_operand (&ops
[0], target
, mode
);
7078 create_fixed_operand (&ops
[1], mem
);
7079 create_input_operand (&ops
[2], val
, mode
);
7080 if (maybe_expand_insn (icode
, 3, ops
))
7081 return ops
[0].value
;
7084 /* If an external test-and-set libcall is provided, use that instead of
7085 any external compare-and-swap that we might get from the compare-and-
7086 swap-loop expansion later. */
7087 if (!can_compare_and_swap_p (mode
, false))
7089 rtx libfunc
= optab_libfunc (sync_lock_test_and_set_optab
, mode
);
7090 if (libfunc
!= NULL
)
7094 addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7095 return emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7096 mode
, 2, addr
, ptr_mode
,
7101 /* If the test_and_set can't be emitted, eliminate any barrier that might
7102 have been emitted. */
7103 delete_insns_since (last_insn
);
7107 /* This function tries to implement an atomic exchange operation using a
7108 compare_and_swap loop. VAL is written to *MEM. The previous contents of
7109 *MEM are returned, using TARGET if possible. No memory model is required
7110 since a compare_and_swap loop is seq-cst. */
7113 maybe_emit_compare_and_swap_exchange_loop (rtx target
, rtx mem
, rtx val
)
7115 enum machine_mode mode
= GET_MODE (mem
);
7117 if (can_compare_and_swap_p (mode
, true))
7119 if (!target
|| !register_operand (target
, mode
))
7120 target
= gen_reg_rtx (mode
);
7121 if (expand_compare_and_swap_loop (mem
, target
, val
, NULL_RTX
))
7128 /* This function tries to implement an atomic test-and-set operation
7129 using the atomic_test_and_set instruction pattern. A boolean value
7130 is returned from the operation, using TARGET if possible. */
7132 #ifndef HAVE_atomic_test_and_set
7133 #define HAVE_atomic_test_and_set 0
7134 #define CODE_FOR_atomic_test_and_set CODE_FOR_nothing
7138 maybe_emit_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7140 enum machine_mode pat_bool_mode
;
7141 struct expand_operand ops
[3];
7143 if (!HAVE_atomic_test_and_set
)
7146 /* While we always get QImode from __atomic_test_and_set, we get
7147 other memory modes from __sync_lock_test_and_set. Note that we
7148 use no endian adjustment here. This matches the 4.6 behavior
7149 in the Sparc backend. */
7151 (insn_data
[CODE_FOR_atomic_test_and_set
].operand
[1].mode
== QImode
);
7152 if (GET_MODE (mem
) != QImode
)
7153 mem
= adjust_address_nv (mem
, QImode
, 0);
7155 pat_bool_mode
= insn_data
[CODE_FOR_atomic_test_and_set
].operand
[0].mode
;
7156 create_output_operand (&ops
[0], target
, pat_bool_mode
);
7157 create_fixed_operand (&ops
[1], mem
);
7158 create_integer_operand (&ops
[2], model
);
7160 if (maybe_expand_insn (CODE_FOR_atomic_test_and_set
, 3, ops
))
7161 return ops
[0].value
;
7165 /* This function expands the legacy _sync_lock test_and_set operation which is
7166 generally an atomic exchange. Some limited targets only allow the
7167 constant 1 to be stored. This is an ACQUIRE operation.
7169 TARGET is an optional place to stick the return value.
7170 MEM is where VAL is stored. */
7173 expand_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
)
7177 /* Try an atomic_exchange first. */
7178 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7182 ret
= maybe_emit_sync_lock_test_and_set (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7186 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7190 /* If there are no other options, try atomic_test_and_set if the value
7191 being stored is 1. */
7192 if (val
== const1_rtx
)
7193 ret
= maybe_emit_atomic_test_and_set (target
, mem
, MEMMODEL_ACQUIRE
);
7198 /* This function expands the atomic test_and_set operation:
7199 atomically store a boolean TRUE into MEM and return the previous value.
7201 MEMMODEL is the memory model variant to use.
7202 TARGET is an optional place to stick the return value. */
7205 expand_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7207 enum machine_mode mode
= GET_MODE (mem
);
7208 rtx ret
, trueval
, subtarget
;
7210 ret
= maybe_emit_atomic_test_and_set (target
, mem
, model
);
7214 /* Be binary compatible with non-default settings of trueval, and different
7215 cpu revisions. E.g. one revision may have atomic-test-and-set, but
7216 another only has atomic-exchange. */
7217 if (targetm
.atomic_test_and_set_trueval
== 1)
7219 trueval
= const1_rtx
;
7220 subtarget
= target
? target
: gen_reg_rtx (mode
);
7224 trueval
= gen_int_mode (targetm
.atomic_test_and_set_trueval
, mode
);
7225 subtarget
= gen_reg_rtx (mode
);
7228 /* Try the atomic-exchange optab... */
7229 ret
= maybe_emit_atomic_exchange (subtarget
, mem
, trueval
, model
);
7231 /* ... then an atomic-compare-and-swap loop ... */
7233 ret
= maybe_emit_compare_and_swap_exchange_loop (subtarget
, mem
, trueval
);
7235 /* ... before trying the vaguely defined legacy lock_test_and_set. */
7237 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, trueval
, model
);
7239 /* Recall that the legacy lock_test_and_set optab was allowed to do magic
7240 things with the value 1. Thus we try again without trueval. */
7241 if (!ret
&& targetm
.atomic_test_and_set_trueval
!= 1)
7242 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, const1_rtx
, model
);
7244 /* Failing all else, assume a single threaded environment and simply
7245 perform the operation. */
7248 emit_move_insn (subtarget
, mem
);
7249 emit_move_insn (mem
, trueval
);
7253 /* Recall that have to return a boolean value; rectify if trueval
7254 is not exactly one. */
7255 if (targetm
.atomic_test_and_set_trueval
!= 1)
7256 ret
= emit_store_flag_force (target
, NE
, ret
, const0_rtx
, mode
, 0, 1);
7261 /* This function expands the atomic exchange operation:
7262 atomically store VAL in MEM and return the previous value in MEM.
7264 MEMMODEL is the memory model variant to use.
7265 TARGET is an optional place to stick the return value. */
7268 expand_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7272 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7274 /* Next try a compare-and-swap loop for the exchange. */
7276 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7281 /* This function expands the atomic compare exchange operation:
7283 *PTARGET_BOOL is an optional place to store the boolean success/failure.
7284 *PTARGET_OVAL is an optional place to store the old value from memory.
7285 Both target parameters may be NULL to indicate that we do not care about
7286 that return value. Both target parameters are updated on success to
7287 the actual location of the corresponding result.
7289 MEMMODEL is the memory model variant to use.
7291 The return value of the function is true for success. */
7294 expand_atomic_compare_and_swap (rtx
*ptarget_bool
, rtx
*ptarget_oval
,
7295 rtx mem
, rtx expected
, rtx desired
,
7296 bool is_weak
, enum memmodel succ_model
,
7297 enum memmodel fail_model
)
7299 enum machine_mode mode
= GET_MODE (mem
);
7300 struct expand_operand ops
[8];
7301 enum insn_code icode
;
7302 rtx target_oval
, target_bool
= NULL_RTX
;
7305 /* Load expected into a register for the compare and swap. */
7306 if (MEM_P (expected
))
7307 expected
= copy_to_reg (expected
);
7309 /* Make sure we always have some place to put the return oldval.
7310 Further, make sure that place is distinct from the input expected,
7311 just in case we need that path down below. */
7312 if (ptarget_oval
== NULL
7313 || (target_oval
= *ptarget_oval
) == NULL
7314 || reg_overlap_mentioned_p (expected
, target_oval
))
7315 target_oval
= gen_reg_rtx (mode
);
7317 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7318 if (icode
!= CODE_FOR_nothing
)
7320 enum machine_mode bool_mode
= insn_data
[icode
].operand
[0].mode
;
7322 /* Make sure we always have a place for the bool operand. */
7323 if (ptarget_bool
== NULL
7324 || (target_bool
= *ptarget_bool
) == NULL
7325 || GET_MODE (target_bool
) != bool_mode
)
7326 target_bool
= gen_reg_rtx (bool_mode
);
7328 /* Emit the compare_and_swap. */
7329 create_output_operand (&ops
[0], target_bool
, bool_mode
);
7330 create_output_operand (&ops
[1], target_oval
, mode
);
7331 create_fixed_operand (&ops
[2], mem
);
7332 create_input_operand (&ops
[3], expected
, mode
);
7333 create_input_operand (&ops
[4], desired
, mode
);
7334 create_integer_operand (&ops
[5], is_weak
);
7335 create_integer_operand (&ops
[6], succ_model
);
7336 create_integer_operand (&ops
[7], fail_model
);
7337 expand_insn (icode
, 8, ops
);
7339 /* Return success/failure. */
7340 target_bool
= ops
[0].value
;
7341 target_oval
= ops
[1].value
;
7345 /* Otherwise fall back to the original __sync_val_compare_and_swap
7346 which is always seq-cst. */
7347 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7348 if (icode
!= CODE_FOR_nothing
)
7352 create_output_operand (&ops
[0], target_oval
, mode
);
7353 create_fixed_operand (&ops
[1], mem
);
7354 create_input_operand (&ops
[2], expected
, mode
);
7355 create_input_operand (&ops
[3], desired
, mode
);
7356 if (!maybe_expand_insn (icode
, 4, ops
))
7359 target_oval
= ops
[0].value
;
7361 /* If the caller isn't interested in the boolean return value,
7362 skip the computation of it. */
7363 if (ptarget_bool
== NULL
)
7366 /* Otherwise, work out if the compare-and-swap succeeded. */
7368 if (have_insn_for (COMPARE
, CCmode
))
7369 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
7372 target_bool
= emit_store_flag_force (target_bool
, EQ
, cc_reg
,
7373 const0_rtx
, VOIDmode
, 0, 1);
7376 goto success_bool_from_val
;
7379 /* Also check for library support for __sync_val_compare_and_swap. */
7380 libfunc
= optab_libfunc (sync_compare_and_swap_optab
, mode
);
7381 if (libfunc
!= NULL
)
7383 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7384 target_oval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7385 mode
, 3, addr
, ptr_mode
,
7386 expected
, mode
, desired
, mode
);
7388 /* Compute the boolean return value only if requested. */
7390 goto success_bool_from_val
;
7398 success_bool_from_val
:
7399 target_bool
= emit_store_flag_force (target_bool
, EQ
, target_oval
,
7400 expected
, VOIDmode
, 1, 1);
7402 /* Make sure that the oval output winds up where the caller asked. */
7404 *ptarget_oval
= target_oval
;
7406 *ptarget_bool
= target_bool
;
7410 /* Generate asm volatile("" : : : "memory") as the memory barrier. */
7413 expand_asm_memory_barrier (void)
7417 asm_op
= gen_rtx_ASM_OPERANDS (VOIDmode
, empty_string
, empty_string
, 0,
7418 rtvec_alloc (0), rtvec_alloc (0),
7419 rtvec_alloc (0), UNKNOWN_LOCATION
);
7420 MEM_VOLATILE_P (asm_op
) = 1;
7422 clob
= gen_rtx_SCRATCH (VOIDmode
);
7423 clob
= gen_rtx_MEM (BLKmode
, clob
);
7424 clob
= gen_rtx_CLOBBER (VOIDmode
, clob
);
7426 emit_insn (gen_rtx_PARALLEL (VOIDmode
, gen_rtvec (2, asm_op
, clob
)));
7429 /* This routine will either emit the mem_thread_fence pattern or issue a
7430 sync_synchronize to generate a fence for memory model MEMMODEL. */
7432 #ifndef HAVE_mem_thread_fence
7433 # define HAVE_mem_thread_fence 0
7434 # define gen_mem_thread_fence(x) (gcc_unreachable (), NULL_RTX)
7436 #ifndef HAVE_memory_barrier
7437 # define HAVE_memory_barrier 0
7438 # define gen_memory_barrier() (gcc_unreachable (), NULL_RTX)
7442 expand_mem_thread_fence (enum memmodel model
)
7444 if (HAVE_mem_thread_fence
)
7445 emit_insn (gen_mem_thread_fence (GEN_INT (model
)));
7446 else if ((model
& MEMMODEL_MASK
) != MEMMODEL_RELAXED
)
7448 if (HAVE_memory_barrier
)
7449 emit_insn (gen_memory_barrier ());
7450 else if (synchronize_libfunc
!= NULL_RTX
)
7451 emit_library_call (synchronize_libfunc
, LCT_NORMAL
, VOIDmode
, 0);
7453 expand_asm_memory_barrier ();
7457 /* This routine will either emit the mem_signal_fence pattern or issue a
7458 sync_synchronize to generate a fence for memory model MEMMODEL. */
7460 #ifndef HAVE_mem_signal_fence
7461 # define HAVE_mem_signal_fence 0
7462 # define gen_mem_signal_fence(x) (gcc_unreachable (), NULL_RTX)
7466 expand_mem_signal_fence (enum memmodel model
)
7468 if (HAVE_mem_signal_fence
)
7469 emit_insn (gen_mem_signal_fence (GEN_INT (model
)));
7470 else if ((model
& MEMMODEL_MASK
) != MEMMODEL_RELAXED
)
7472 /* By default targets are coherent between a thread and the signal
7473 handler running on the same thread. Thus this really becomes a
7474 compiler barrier, in that stores must not be sunk past
7475 (or raised above) a given point. */
7476 expand_asm_memory_barrier ();
7480 /* This function expands the atomic load operation:
7481 return the atomically loaded value in MEM.
7483 MEMMODEL is the memory model variant to use.
7484 TARGET is an option place to stick the return value. */
7487 expand_atomic_load (rtx target
, rtx mem
, enum memmodel model
)
7489 enum machine_mode mode
= GET_MODE (mem
);
7490 enum insn_code icode
;
7492 /* If the target supports the load directly, great. */
7493 icode
= direct_optab_handler (atomic_load_optab
, mode
);
7494 if (icode
!= CODE_FOR_nothing
)
7496 struct expand_operand ops
[3];
7498 create_output_operand (&ops
[0], target
, mode
);
7499 create_fixed_operand (&ops
[1], mem
);
7500 create_integer_operand (&ops
[2], model
);
7501 if (maybe_expand_insn (icode
, 3, ops
))
7502 return ops
[0].value
;
7505 /* If the size of the object is greater than word size on this target,
7506 then we assume that a load will not be atomic. */
7507 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7509 /* Issue val = compare_and_swap (mem, 0, 0).
7510 This may cause the occasional harmless store of 0 when the value is
7511 already 0, but it seems to be OK according to the standards guys. */
7512 if (expand_atomic_compare_and_swap (NULL
, &target
, mem
, const0_rtx
,
7513 const0_rtx
, false, model
, model
))
7516 /* Otherwise there is no atomic load, leave the library call. */
7520 /* Otherwise assume loads are atomic, and emit the proper barriers. */
7521 if (!target
|| target
== const0_rtx
)
7522 target
= gen_reg_rtx (mode
);
7524 /* For SEQ_CST, emit a barrier before the load. */
7525 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7526 expand_mem_thread_fence (model
);
7528 emit_move_insn (target
, mem
);
7530 /* Emit the appropriate barrier after the load. */
7531 expand_mem_thread_fence (model
);
7536 /* This function expands the atomic store operation:
7537 Atomically store VAL in MEM.
7538 MEMMODEL is the memory model variant to use.
7539 USE_RELEASE is true if __sync_lock_release can be used as a fall back.
7540 function returns const0_rtx if a pattern was emitted. */
7543 expand_atomic_store (rtx mem
, rtx val
, enum memmodel model
, bool use_release
)
7545 enum machine_mode mode
= GET_MODE (mem
);
7546 enum insn_code icode
;
7547 struct expand_operand ops
[3];
7549 /* If the target supports the store directly, great. */
7550 icode
= direct_optab_handler (atomic_store_optab
, mode
);
7551 if (icode
!= CODE_FOR_nothing
)
7553 create_fixed_operand (&ops
[0], mem
);
7554 create_input_operand (&ops
[1], val
, mode
);
7555 create_integer_operand (&ops
[2], model
);
7556 if (maybe_expand_insn (icode
, 3, ops
))
7560 /* If using __sync_lock_release is a viable alternative, try it. */
7563 icode
= direct_optab_handler (sync_lock_release_optab
, mode
);
7564 if (icode
!= CODE_FOR_nothing
)
7566 create_fixed_operand (&ops
[0], mem
);
7567 create_input_operand (&ops
[1], const0_rtx
, mode
);
7568 if (maybe_expand_insn (icode
, 2, ops
))
7570 /* lock_release is only a release barrier. */
7571 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7572 expand_mem_thread_fence (model
);
7578 /* If the size of the object is greater than word size on this target,
7579 a default store will not be atomic, Try a mem_exchange and throw away
7580 the result. If that doesn't work, don't do anything. */
7581 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7583 rtx target
= maybe_emit_atomic_exchange (NULL_RTX
, mem
, val
, model
);
7585 target
= maybe_emit_compare_and_swap_exchange_loop (NULL_RTX
, mem
, val
);
7592 /* Otherwise assume stores are atomic, and emit the proper barriers. */
7593 expand_mem_thread_fence (model
);
7595 emit_move_insn (mem
, val
);
7597 /* For SEQ_CST, also emit a barrier after the store. */
7598 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7599 expand_mem_thread_fence (model
);
7605 /* Structure containing the pointers and values required to process the
7606 various forms of the atomic_fetch_op and atomic_op_fetch builtins. */
7608 struct atomic_op_functions
7610 direct_optab mem_fetch_before
;
7611 direct_optab mem_fetch_after
;
7612 direct_optab mem_no_result
;
7615 direct_optab no_result
;
7616 enum rtx_code reverse_code
;
7620 /* Fill in structure pointed to by OP with the various optab entries for an
7621 operation of type CODE. */
7624 get_atomic_op_for_code (struct atomic_op_functions
*op
, enum rtx_code code
)
7626 gcc_assert (op
!= NULL
);
7628 /* If SWITCHABLE_TARGET is defined, then subtargets can be switched
7629 in the source code during compilation, and the optab entries are not
7630 computable until runtime. Fill in the values at runtime. */
7634 op
->mem_fetch_before
= atomic_fetch_add_optab
;
7635 op
->mem_fetch_after
= atomic_add_fetch_optab
;
7636 op
->mem_no_result
= atomic_add_optab
;
7637 op
->fetch_before
= sync_old_add_optab
;
7638 op
->fetch_after
= sync_new_add_optab
;
7639 op
->no_result
= sync_add_optab
;
7640 op
->reverse_code
= MINUS
;
7643 op
->mem_fetch_before
= atomic_fetch_sub_optab
;
7644 op
->mem_fetch_after
= atomic_sub_fetch_optab
;
7645 op
->mem_no_result
= atomic_sub_optab
;
7646 op
->fetch_before
= sync_old_sub_optab
;
7647 op
->fetch_after
= sync_new_sub_optab
;
7648 op
->no_result
= sync_sub_optab
;
7649 op
->reverse_code
= PLUS
;
7652 op
->mem_fetch_before
= atomic_fetch_xor_optab
;
7653 op
->mem_fetch_after
= atomic_xor_fetch_optab
;
7654 op
->mem_no_result
= atomic_xor_optab
;
7655 op
->fetch_before
= sync_old_xor_optab
;
7656 op
->fetch_after
= sync_new_xor_optab
;
7657 op
->no_result
= sync_xor_optab
;
7658 op
->reverse_code
= XOR
;
7661 op
->mem_fetch_before
= atomic_fetch_and_optab
;
7662 op
->mem_fetch_after
= atomic_and_fetch_optab
;
7663 op
->mem_no_result
= atomic_and_optab
;
7664 op
->fetch_before
= sync_old_and_optab
;
7665 op
->fetch_after
= sync_new_and_optab
;
7666 op
->no_result
= sync_and_optab
;
7667 op
->reverse_code
= UNKNOWN
;
7670 op
->mem_fetch_before
= atomic_fetch_or_optab
;
7671 op
->mem_fetch_after
= atomic_or_fetch_optab
;
7672 op
->mem_no_result
= atomic_or_optab
;
7673 op
->fetch_before
= sync_old_ior_optab
;
7674 op
->fetch_after
= sync_new_ior_optab
;
7675 op
->no_result
= sync_ior_optab
;
7676 op
->reverse_code
= UNKNOWN
;
7679 op
->mem_fetch_before
= atomic_fetch_nand_optab
;
7680 op
->mem_fetch_after
= atomic_nand_fetch_optab
;
7681 op
->mem_no_result
= atomic_nand_optab
;
7682 op
->fetch_before
= sync_old_nand_optab
;
7683 op
->fetch_after
= sync_new_nand_optab
;
7684 op
->no_result
= sync_nand_optab
;
7685 op
->reverse_code
= UNKNOWN
;
7692 /* See if there is a more optimal way to implement the operation "*MEM CODE VAL"
7693 using memory order MODEL. If AFTER is true the operation needs to return
7694 the value of *MEM after the operation, otherwise the previous value.
7695 TARGET is an optional place to place the result. The result is unused if
7697 Return the result if there is a better sequence, otherwise NULL_RTX. */
7700 maybe_optimize_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7701 enum memmodel model
, bool after
)
7703 /* If the value is prefetched, or not used, it may be possible to replace
7704 the sequence with a native exchange operation. */
7705 if (!after
|| target
== const0_rtx
)
7707 /* fetch_and (&x, 0, m) can be replaced with exchange (&x, 0, m). */
7708 if (code
== AND
&& val
== const0_rtx
)
7710 if (target
== const0_rtx
)
7711 target
= gen_reg_rtx (GET_MODE (mem
));
7712 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7715 /* fetch_or (&x, -1, m) can be replaced with exchange (&x, -1, m). */
7716 if (code
== IOR
&& val
== constm1_rtx
)
7718 if (target
== const0_rtx
)
7719 target
= gen_reg_rtx (GET_MODE (mem
));
7720 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7727 /* Try to emit an instruction for a specific operation varaition.
7728 OPTAB contains the OP functions.
7729 TARGET is an optional place to return the result. const0_rtx means unused.
7730 MEM is the memory location to operate on.
7731 VAL is the value to use in the operation.
7732 USE_MEMMODEL is TRUE if the variation with a memory model should be tried.
7733 MODEL is the memory model, if used.
7734 AFTER is true if the returned result is the value after the operation. */
7737 maybe_emit_op (const struct atomic_op_functions
*optab
, rtx target
, rtx mem
,
7738 rtx val
, bool use_memmodel
, enum memmodel model
, bool after
)
7740 enum machine_mode mode
= GET_MODE (mem
);
7741 struct expand_operand ops
[4];
7742 enum insn_code icode
;
7746 /* Check to see if there is a result returned. */
7747 if (target
== const0_rtx
)
7751 icode
= direct_optab_handler (optab
->mem_no_result
, mode
);
7752 create_integer_operand (&ops
[2], model
);
7757 icode
= direct_optab_handler (optab
->no_result
, mode
);
7761 /* Otherwise, we need to generate a result. */
7766 icode
= direct_optab_handler (after
? optab
->mem_fetch_after
7767 : optab
->mem_fetch_before
, mode
);
7768 create_integer_operand (&ops
[3], model
);
7773 icode
= optab_handler (after
? optab
->fetch_after
7774 : optab
->fetch_before
, mode
);
7777 create_output_operand (&ops
[op_counter
++], target
, mode
);
7779 if (icode
== CODE_FOR_nothing
)
7782 create_fixed_operand (&ops
[op_counter
++], mem
);
7783 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7784 create_convert_operand_to (&ops
[op_counter
++], val
, mode
, true);
7786 if (maybe_expand_insn (icode
, num_ops
, ops
))
7787 return (target
== const0_rtx
? const0_rtx
: ops
[0].value
);
7793 /* This function expands an atomic fetch_OP or OP_fetch operation:
7794 TARGET is an option place to stick the return value. const0_rtx indicates
7795 the result is unused.
7796 atomically fetch MEM, perform the operation with VAL and return it to MEM.
7797 CODE is the operation being performed (OP)
7798 MEMMODEL is the memory model variant to use.
7799 AFTER is true to return the result of the operation (OP_fetch).
7800 AFTER is false to return the value before the operation (fetch_OP).
7802 This function will *only* generate instructions if there is a direct
7803 optab. No compare and swap loops or libcalls will be generated. */
7806 expand_atomic_fetch_op_no_fallback (rtx target
, rtx mem
, rtx val
,
7807 enum rtx_code code
, enum memmodel model
,
7810 enum machine_mode mode
= GET_MODE (mem
);
7811 struct atomic_op_functions optab
;
7813 bool unused_result
= (target
== const0_rtx
);
7815 get_atomic_op_for_code (&optab
, code
);
7817 /* Check to see if there are any better instructions. */
7818 result
= maybe_optimize_fetch_op (target
, mem
, val
, code
, model
, after
);
7822 /* Check for the case where the result isn't used and try those patterns. */
7825 /* Try the memory model variant first. */
7826 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, true);
7830 /* Next try the old style withuot a memory model. */
7831 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, true);
7835 /* There is no no-result pattern, so try patterns with a result. */
7839 /* Try the __atomic version. */
7840 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, after
);
7844 /* Try the older __sync version. */
7845 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, after
);
7849 /* If the fetch value can be calculated from the other variation of fetch,
7850 try that operation. */
7851 if (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
)
7853 /* Try the __atomic version, then the older __sync version. */
7854 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, !after
);
7856 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, !after
);
7860 /* If the result isn't used, no need to do compensation code. */
7864 /* Issue compensation code. Fetch_after == fetch_before OP val.
7865 Fetch_before == after REVERSE_OP val. */
7867 code
= optab
.reverse_code
;
7870 result
= expand_simple_binop (mode
, AND
, result
, val
, NULL_RTX
,
7871 true, OPTAB_LIB_WIDEN
);
7872 result
= expand_simple_unop (mode
, NOT
, result
, target
, true);
7875 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
7876 true, OPTAB_LIB_WIDEN
);
7881 /* No direct opcode can be generated. */
7887 /* This function expands an atomic fetch_OP or OP_fetch operation:
7888 TARGET is an option place to stick the return value. const0_rtx indicates
7889 the result is unused.
7890 atomically fetch MEM, perform the operation with VAL and return it to MEM.
7891 CODE is the operation being performed (OP)
7892 MEMMODEL is the memory model variant to use.
7893 AFTER is true to return the result of the operation (OP_fetch).
7894 AFTER is false to return the value before the operation (fetch_OP). */
7896 expand_atomic_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7897 enum memmodel model
, bool after
)
7899 enum machine_mode mode
= GET_MODE (mem
);
7901 bool unused_result
= (target
== const0_rtx
);
7903 result
= expand_atomic_fetch_op_no_fallback (target
, mem
, val
, code
, model
,
7909 /* Add/sub can be implemented by doing the reverse operation with -(val). */
7910 if (code
== PLUS
|| code
== MINUS
)
7913 enum rtx_code reverse
= (code
== PLUS
? MINUS
: PLUS
);
7916 tmp
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, true);
7917 result
= expand_atomic_fetch_op_no_fallback (target
, mem
, tmp
, reverse
,
7921 /* PLUS worked so emit the insns and return. */
7928 /* PLUS did not work, so throw away the negation code and continue. */
7932 /* Try the __sync libcalls only if we can't do compare-and-swap inline. */
7933 if (!can_compare_and_swap_p (mode
, false))
7937 enum rtx_code orig_code
= code
;
7938 struct atomic_op_functions optab
;
7940 get_atomic_op_for_code (&optab
, code
);
7941 libfunc
= optab_libfunc (after
? optab
.fetch_after
7942 : optab
.fetch_before
, mode
);
7944 && (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
))
7948 code
= optab
.reverse_code
;
7949 libfunc
= optab_libfunc (after
? optab
.fetch_before
7950 : optab
.fetch_after
, mode
);
7952 if (libfunc
!= NULL
)
7954 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7955 result
= emit_library_call_value (libfunc
, NULL
, LCT_NORMAL
, mode
,
7956 2, addr
, ptr_mode
, val
, mode
);
7958 if (!unused_result
&& fixup
)
7959 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
7960 true, OPTAB_LIB_WIDEN
);
7964 /* We need the original code for any further attempts. */
7968 /* If nothing else has succeeded, default to a compare and swap loop. */
7969 if (can_compare_and_swap_p (mode
, true))
7972 rtx t0
= gen_reg_rtx (mode
), t1
;
7976 /* If the result is used, get a register for it. */
7979 if (!target
|| !register_operand (target
, mode
))
7980 target
= gen_reg_rtx (mode
);
7981 /* If fetch_before, copy the value now. */
7983 emit_move_insn (target
, t0
);
7986 target
= const0_rtx
;
7991 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
7992 true, OPTAB_LIB_WIDEN
);
7993 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
7996 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
, true,
7999 /* For after, copy the value now. */
8000 if (!unused_result
&& after
)
8001 emit_move_insn (target
, t1
);
8002 insn
= get_insns ();
8005 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
8012 /* Return true if OPERAND is suitable for operand number OPNO of
8013 instruction ICODE. */
8016 insn_operand_matches (enum insn_code icode
, unsigned int opno
, rtx operand
)
8018 return (!insn_data
[(int) icode
].operand
[opno
].predicate
8019 || (insn_data
[(int) icode
].operand
[opno
].predicate
8020 (operand
, insn_data
[(int) icode
].operand
[opno
].mode
)));
8023 /* TARGET is a target of a multiword operation that we are going to
8024 implement as a series of word-mode operations. Return true if
8025 TARGET is suitable for this purpose. */
8028 valid_multiword_target_p (rtx target
)
8030 enum machine_mode mode
;
8033 mode
= GET_MODE (target
);
8034 for (i
= 0; i
< GET_MODE_SIZE (mode
); i
+= UNITS_PER_WORD
)
8035 if (!validate_subreg (word_mode
, mode
, target
, i
))
8040 /* Like maybe_legitimize_operand, but do not change the code of the
8041 current rtx value. */
8044 maybe_legitimize_operand_same_code (enum insn_code icode
, unsigned int opno
,
8045 struct expand_operand
*op
)
8047 /* See if the operand matches in its current form. */
8048 if (insn_operand_matches (icode
, opno
, op
->value
))
8051 /* If the operand is a memory whose address has no side effects,
8052 try forcing the address into a non-virtual pseudo register.
8053 The check for side effects is important because copy_to_mode_reg
8054 cannot handle things like auto-modified addresses. */
8055 if (insn_data
[(int) icode
].operand
[opno
].allows_mem
&& MEM_P (op
->value
))
8060 addr
= XEXP (mem
, 0);
8061 if (!(REG_P (addr
) && REGNO (addr
) > LAST_VIRTUAL_REGISTER
)
8062 && !side_effects_p (addr
))
8065 enum machine_mode mode
;
8067 last
= get_last_insn ();
8068 mode
= get_address_mode (mem
);
8069 mem
= replace_equiv_address (mem
, copy_to_mode_reg (mode
, addr
));
8070 if (insn_operand_matches (icode
, opno
, mem
))
8075 delete_insns_since (last
);
8082 /* Try to make OP match operand OPNO of instruction ICODE. Return true
8083 on success, storing the new operand value back in OP. */
8086 maybe_legitimize_operand (enum insn_code icode
, unsigned int opno
,
8087 struct expand_operand
*op
)
8089 enum machine_mode mode
, imode
;
8090 bool old_volatile_ok
, result
;
8096 old_volatile_ok
= volatile_ok
;
8098 result
= maybe_legitimize_operand_same_code (icode
, opno
, op
);
8099 volatile_ok
= old_volatile_ok
;
8103 gcc_assert (mode
!= VOIDmode
);
8105 && op
->value
!= const0_rtx
8106 && GET_MODE (op
->value
) == mode
8107 && maybe_legitimize_operand_same_code (icode
, opno
, op
))
8110 op
->value
= gen_reg_rtx (mode
);
8115 gcc_assert (mode
!= VOIDmode
);
8116 gcc_assert (GET_MODE (op
->value
) == VOIDmode
8117 || GET_MODE (op
->value
) == mode
);
8118 if (maybe_legitimize_operand_same_code (icode
, opno
, op
))
8121 op
->value
= copy_to_mode_reg (mode
, op
->value
);
8124 case EXPAND_CONVERT_TO
:
8125 gcc_assert (mode
!= VOIDmode
);
8126 op
->value
= convert_to_mode (mode
, op
->value
, op
->unsigned_p
);
8129 case EXPAND_CONVERT_FROM
:
8130 if (GET_MODE (op
->value
) != VOIDmode
)
8131 mode
= GET_MODE (op
->value
);
8133 /* The caller must tell us what mode this value has. */
8134 gcc_assert (mode
!= VOIDmode
);
8136 imode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8137 if (imode
!= VOIDmode
&& imode
!= mode
)
8139 op
->value
= convert_modes (imode
, mode
, op
->value
, op
->unsigned_p
);
8144 case EXPAND_ADDRESS
:
8145 gcc_assert (mode
!= VOIDmode
);
8146 op
->value
= convert_memory_address (mode
, op
->value
);
8149 case EXPAND_INTEGER
:
8150 mode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8151 if (mode
!= VOIDmode
&& const_int_operand (op
->value
, mode
))
8155 return insn_operand_matches (icode
, opno
, op
->value
);
8158 /* Make OP describe an input operand that should have the same value
8159 as VALUE, after any mode conversion that the target might request.
8160 TYPE is the type of VALUE. */
8163 create_convert_operand_from_type (struct expand_operand
*op
,
8164 rtx value
, tree type
)
8166 create_convert_operand_from (op
, value
, TYPE_MODE (type
),
8167 TYPE_UNSIGNED (type
));
8170 /* Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
8171 of instruction ICODE. Return true on success, leaving the new operand
8172 values in the OPS themselves. Emit no code on failure. */
8175 maybe_legitimize_operands (enum insn_code icode
, unsigned int opno
,
8176 unsigned int nops
, struct expand_operand
*ops
)
8181 last
= get_last_insn ();
8182 for (i
= 0; i
< nops
; i
++)
8183 if (!maybe_legitimize_operand (icode
, opno
+ i
, &ops
[i
]))
8185 delete_insns_since (last
);
8191 /* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
8192 as its operands. Return the instruction pattern on success,
8193 and emit any necessary set-up code. Return null and emit no
8197 maybe_gen_insn (enum insn_code icode
, unsigned int nops
,
8198 struct expand_operand
*ops
)
8200 gcc_assert (nops
== (unsigned int) insn_data
[(int) icode
].n_generator_args
);
8201 if (!maybe_legitimize_operands (icode
, 0, nops
, ops
))
8207 return GEN_FCN (icode
) (ops
[0].value
);
8209 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
);
8211 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
);
8213 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8216 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8217 ops
[3].value
, ops
[4].value
);
8219 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8220 ops
[3].value
, ops
[4].value
, ops
[5].value
);
8222 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8223 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8226 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8227 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8228 ops
[6].value
, ops
[7].value
);
8233 /* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
8234 as its operands. Return true on success and emit no code on failure. */
8237 maybe_expand_insn (enum insn_code icode
, unsigned int nops
,
8238 struct expand_operand
*ops
)
8240 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8249 /* Like maybe_expand_insn, but for jumps. */
8252 maybe_expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8253 struct expand_operand
*ops
)
8255 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8258 emit_jump_insn (pat
);
8264 /* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
8268 expand_insn (enum insn_code icode
, unsigned int nops
,
8269 struct expand_operand
*ops
)
8271 if (!maybe_expand_insn (icode
, nops
, ops
))
8275 /* Like expand_insn, but for jumps. */
8278 expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8279 struct expand_operand
*ops
)
8281 if (!maybe_expand_jump_insn (icode
, nops
, ops
))
8285 /* Reduce conditional compilation elsewhere. */
8288 #define CODE_FOR_insv CODE_FOR_nothing
8292 #define CODE_FOR_extv CODE_FOR_nothing
8295 #define HAVE_extzv 0
8296 #define CODE_FOR_extzv CODE_FOR_nothing
8299 /* Enumerates the possible types of structure operand to an
8301 enum extraction_type
{ ET_unaligned_mem
, ET_reg
};
8303 /* Check whether insv, extv or extzv pattern ICODE can be used for an
8304 insertion or extraction of type TYPE on a structure of mode MODE.
8305 Return true if so and fill in *INSN accordingly. STRUCT_OP is the
8306 operand number of the structure (the first sign_extract or zero_extract
8307 operand) and FIELD_OP is the operand number of the field (the other
8308 side of the set from the sign_extract or zero_extract). */
8311 get_traditional_extraction_insn (extraction_insn
*insn
,
8312 enum extraction_type type
,
8313 enum machine_mode mode
,
8314 enum insn_code icode
,
8315 int struct_op
, int field_op
)
8317 const struct insn_data_d
*data
= &insn_data
[icode
];
8319 enum machine_mode struct_mode
= data
->operand
[struct_op
].mode
;
8320 if (struct_mode
== VOIDmode
)
8321 struct_mode
= word_mode
;
8322 if (mode
!= struct_mode
)
8325 enum machine_mode field_mode
= data
->operand
[field_op
].mode
;
8326 if (field_mode
== VOIDmode
)
8327 field_mode
= word_mode
;
8329 enum machine_mode pos_mode
= data
->operand
[struct_op
+ 2].mode
;
8330 if (pos_mode
== VOIDmode
)
8331 pos_mode
= word_mode
;
8333 insn
->icode
= icode
;
8334 insn
->field_mode
= field_mode
;
8335 insn
->struct_mode
= (type
== ET_unaligned_mem
? byte_mode
: struct_mode
);
8336 insn
->pos_mode
= pos_mode
;
8340 /* Return true if an optab exists to perform an insertion or extraction
8341 of type TYPE in mode MODE. Describe the instruction in *INSN if so.
8343 REG_OPTAB is the optab to use for register structures and
8344 MISALIGN_OPTAB is the optab to use for misaligned memory structures.
8345 POS_OP is the operand number of the bit position. */
8348 get_optab_extraction_insn (struct extraction_insn
*insn
,
8349 enum extraction_type type
,
8350 enum machine_mode mode
, direct_optab reg_optab
,
8351 direct_optab misalign_optab
, int pos_op
)
8353 direct_optab optab
= (type
== ET_unaligned_mem
? misalign_optab
: reg_optab
);
8354 enum insn_code icode
= direct_optab_handler (optab
, mode
);
8355 if (icode
== CODE_FOR_nothing
)
8358 const struct insn_data_d
*data
= &insn_data
[icode
];
8360 insn
->icode
= icode
;
8361 insn
->field_mode
= mode
;
8362 insn
->struct_mode
= (type
== ET_unaligned_mem
? BLKmode
: mode
);
8363 insn
->pos_mode
= data
->operand
[pos_op
].mode
;
8364 if (insn
->pos_mode
== VOIDmode
)
8365 insn
->pos_mode
= word_mode
;
8369 /* Return true if an instruction exists to perform an insertion or
8370 extraction (PATTERN says which) of type TYPE in mode MODE.
8371 Describe the instruction in *INSN if so. */
8374 get_extraction_insn (extraction_insn
*insn
,
8375 enum extraction_pattern pattern
,
8376 enum extraction_type type
,
8377 enum machine_mode mode
)
8383 && get_traditional_extraction_insn (insn
, type
, mode
,
8384 CODE_FOR_insv
, 0, 3))
8386 return get_optab_extraction_insn (insn
, type
, mode
, insv_optab
,
8387 insvmisalign_optab
, 2);
8391 && get_traditional_extraction_insn (insn
, type
, mode
,
8392 CODE_FOR_extv
, 1, 0))
8394 return get_optab_extraction_insn (insn
, type
, mode
, extv_optab
,
8395 extvmisalign_optab
, 3);
8399 && get_traditional_extraction_insn (insn
, type
, mode
,
8400 CODE_FOR_extzv
, 1, 0))
8402 return get_optab_extraction_insn (insn
, type
, mode
, extzv_optab
,
8403 extzvmisalign_optab
, 3);
8410 /* Return true if an instruction exists to access a field of mode
8411 FIELDMODE in a structure that has STRUCT_BITS significant bits.
8412 Describe the "best" such instruction in *INSN if so. PATTERN and
8413 TYPE describe the type of insertion or extraction we want to perform.
8415 For an insertion, the number of significant structure bits includes
8416 all bits of the target. For an extraction, it need only include the
8417 most significant bit of the field. Larger widths are acceptable
8421 get_best_extraction_insn (extraction_insn
*insn
,
8422 enum extraction_pattern pattern
,
8423 enum extraction_type type
,
8424 unsigned HOST_WIDE_INT struct_bits
,
8425 enum machine_mode field_mode
)
8427 enum machine_mode mode
= smallest_mode_for_size (struct_bits
, MODE_INT
);
8428 while (mode
!= VOIDmode
)
8430 if (get_extraction_insn (insn
, pattern
, type
, mode
))
8432 while (mode
!= VOIDmode
8433 && GET_MODE_SIZE (mode
) <= GET_MODE_SIZE (field_mode
)
8434 && !TRULY_NOOP_TRUNCATION_MODES_P (insn
->field_mode
,
8437 get_extraction_insn (insn
, pattern
, type
, mode
);
8438 mode
= GET_MODE_WIDER_MODE (mode
);
8442 mode
= GET_MODE_WIDER_MODE (mode
);
8447 /* Return true if an instruction exists to access a field of mode
8448 FIELDMODE in a register structure that has STRUCT_BITS significant bits.
8449 Describe the "best" such instruction in *INSN if so. PATTERN describes
8450 the type of insertion or extraction we want to perform.
8452 For an insertion, the number of significant structure bits includes
8453 all bits of the target. For an extraction, it need only include the
8454 most significant bit of the field. Larger widths are acceptable
8458 get_best_reg_extraction_insn (extraction_insn
*insn
,
8459 enum extraction_pattern pattern
,
8460 unsigned HOST_WIDE_INT struct_bits
,
8461 enum machine_mode field_mode
)
8463 return get_best_extraction_insn (insn
, pattern
, ET_reg
, struct_bits
,
8467 /* Return true if an instruction exists to access a field of BITSIZE
8468 bits starting BITNUM bits into a memory structure. Describe the
8469 "best" such instruction in *INSN if so. PATTERN describes the type
8470 of insertion or extraction we want to perform and FIELDMODE is the
8471 natural mode of the extracted field.
8473 The instructions considered here only access bytes that overlap
8474 the bitfield; they do not touch any surrounding bytes. */
8477 get_best_mem_extraction_insn (extraction_insn
*insn
,
8478 enum extraction_pattern pattern
,
8479 HOST_WIDE_INT bitsize
, HOST_WIDE_INT bitnum
,
8480 enum machine_mode field_mode
)
8482 unsigned HOST_WIDE_INT struct_bits
= (bitnum
% BITS_PER_UNIT
8484 + BITS_PER_UNIT
- 1);
8485 struct_bits
-= struct_bits
% BITS_PER_UNIT
;
8486 return get_best_extraction_insn (insn
, pattern
, ET_unaligned_mem
,
8487 struct_bits
, field_mode
);
8490 #include "gt-optabs.h"