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1 /* Definitions for code generation pass of GNU compiler.
2 Copyright (C) 2001-2019 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #ifndef GCC_OPTABS_H
21 #define GCC_OPTABS_H
22
23 #include "optabs-query.h"
24 #include "optabs-libfuncs.h"
25 #include "vec-perm-indices.h"
26
27 /* Generate code for a widening multiply. */
28 extern rtx expand_widening_mult (machine_mode, rtx, rtx, rtx, int, optab);
29
30 /* Describes the type of an expand_operand. Each value is associated
31 with a create_*_operand function; see the comments above those
32 functions for details. */
33 enum expand_operand_type {
34 EXPAND_FIXED,
35 EXPAND_OUTPUT,
36 EXPAND_INPUT,
37 EXPAND_CONVERT_TO,
38 EXPAND_CONVERT_FROM,
39 EXPAND_ADDRESS,
40 EXPAND_INTEGER
41 };
42
43 /* Information about an operand for instruction expansion. */
44 class expand_operand {
45 public:
46 /* The type of operand. */
47 ENUM_BITFIELD (expand_operand_type) type : 8;
48
49 /* True if any conversion should treat VALUE as being unsigned
50 rather than signed. Only meaningful for certain types. */
51 unsigned int unsigned_p : 1;
52
53 /* Is the target operand. */
54 unsigned int target : 1;
55
56 /* Unused; available for future use. */
57 unsigned int unused : 6;
58
59 /* The mode passed to the convert_*_operand function. It has a
60 type-dependent meaning. */
61 ENUM_BITFIELD (machine_mode) mode : 16;
62
63 /* The value of the operand. */
64 rtx value;
65
66 /* The value of an EXPAND_INTEGER operand. */
67 poly_int64 int_value;
68 };
69
70 /* Initialize OP with the given fields. Initialise the other fields
71 to their default values. */
72
73 static inline void
74 create_expand_operand (class expand_operand *op,
75 enum expand_operand_type type,
76 rtx value, machine_mode mode,
77 bool unsigned_p, poly_int64 int_value = 0)
78 {
79 op->type = type;
80 op->unsigned_p = unsigned_p;
81 op->unused = 0;
82 op->mode = mode;
83 op->value = value;
84 op->int_value = int_value;
85 }
86
87 /* Make OP describe an operand that must use rtx X, even if X is volatile. */
88
89 static inline void
90 create_fixed_operand (class expand_operand *op, rtx x)
91 {
92 create_expand_operand (op, EXPAND_FIXED, x, VOIDmode, false);
93 }
94
95 /* Make OP describe an output operand that must have mode MODE.
96 X, if nonnull, is a suggestion for where the output should be stored.
97 It is OK for VALUE to be inconsistent with MODE, although it will just
98 be ignored in that case. */
99
100 static inline void
101 create_output_operand (class expand_operand *op, rtx x,
102 machine_mode mode)
103 {
104 create_expand_operand (op, EXPAND_OUTPUT, x, mode, false);
105 }
106
107 /* Make OP describe an input operand that must have mode MODE and
108 value VALUE; MODE cannot be VOIDmode. The backend may request that
109 VALUE be copied into a different kind of rtx before being passed
110 as an operand. */
111
112 static inline void
113 create_input_operand (class expand_operand *op, rtx value,
114 machine_mode mode)
115 {
116 create_expand_operand (op, EXPAND_INPUT, value, mode, false);
117 }
118
119 /* Like create_input_operand, except that VALUE must first be converted
120 to mode MODE. UNSIGNED_P says whether VALUE is unsigned. */
121
122 static inline void
123 create_convert_operand_to (class expand_operand *op, rtx value,
124 machine_mode mode, bool unsigned_p)
125 {
126 create_expand_operand (op, EXPAND_CONVERT_TO, value, mode, unsigned_p);
127 }
128
129 /* Make OP describe an input operand that should have the same value
130 as VALUE, after any mode conversion that the backend might request.
131 If VALUE is a CONST_INT, it should be treated as having mode MODE.
132 UNSIGNED_P says whether VALUE is unsigned.
133
134 The conversion of VALUE can include a combination of numerical
135 conversion (as for convert_modes) and duplicating a scalar to fill
136 a vector (if VALUE is a scalar but the operand is a vector). */
137
138 static inline void
139 create_convert_operand_from (class expand_operand *op, rtx value,
140 machine_mode mode, bool unsigned_p)
141 {
142 create_expand_operand (op, EXPAND_CONVERT_FROM, value, mode, unsigned_p);
143 }
144
145
146 /* Make OP describe an input Pmode address operand. VALUE is the value
147 of the address, but it may need to be converted to Pmode first. */
148
149 static inline void
150 create_address_operand (class expand_operand *op, rtx value)
151 {
152 create_expand_operand (op, EXPAND_ADDRESS, value, Pmode, false);
153 }
154
155 extern void create_integer_operand (class expand_operand *, poly_int64);
156
157 /* Passed to expand_simple_binop and expand_binop to say which options
158 to try to use if the requested operation can't be open-coded on the
159 requisite mode. Either OPTAB_LIB or OPTAB_LIB_WIDEN says try using
160 a library call. Either OPTAB_WIDEN or OPTAB_LIB_WIDEN says try
161 using a wider mode. OPTAB_MUST_WIDEN says try widening and don't
162 try anything else. */
163
164 enum optab_methods
165 {
166 OPTAB_DIRECT,
167 OPTAB_LIB,
168 OPTAB_WIDEN,
169 OPTAB_LIB_WIDEN,
170 OPTAB_MUST_WIDEN
171 };
172
173 extern rtx expand_widen_pattern_expr (struct separate_ops *, rtx , rtx , rtx,
174 rtx, int);
175 extern rtx expand_ternary_op (machine_mode mode, optab ternary_optab,
176 rtx op0, rtx op1, rtx op2, rtx target,
177 int unsignedp);
178 extern rtx simplify_expand_binop (machine_mode mode, optab binoptab,
179 rtx op0, rtx op1, rtx target, int unsignedp,
180 enum optab_methods methods);
181 extern bool force_expand_binop (machine_mode, optab, rtx, rtx, rtx, int,
182 enum optab_methods);
183 extern rtx expand_vector_broadcast (machine_mode, rtx);
184
185 /* Generate code for a simple binary or unary operation. "Simple" in
186 this case means "can be unambiguously described by a (mode, code)
187 pair and mapped to a single optab." */
188 extern rtx expand_simple_binop (machine_mode, enum rtx_code, rtx,
189 rtx, rtx, int, enum optab_methods);
190
191 /* Expand a binary operation given optab and rtx operands. */
192 extern rtx expand_binop (machine_mode, optab, rtx, rtx, rtx, int,
193 enum optab_methods);
194
195 /* Expand a binary operation with both signed and unsigned forms. */
196 extern rtx sign_expand_binop (machine_mode, optab, optab, rtx, rtx,
197 rtx, int, enum optab_methods);
198
199 /* Generate code to perform an operation on one operand with two results. */
200 extern int expand_twoval_unop (optab, rtx, rtx, rtx, int);
201
202 /* Generate code to perform an operation on two operands with two results. */
203 extern int expand_twoval_binop (optab, rtx, rtx, rtx, rtx, int);
204
205 /* Generate code to perform an operation on two operands with two
206 results, using a library function. */
207 extern bool expand_twoval_binop_libfunc (optab, rtx, rtx, rtx, rtx,
208 enum rtx_code);
209 extern rtx expand_simple_unop (machine_mode, enum rtx_code, rtx, rtx,
210 int);
211
212 /* Expand a unary arithmetic operation given optab rtx operand. */
213 extern rtx expand_unop (machine_mode, optab, rtx, rtx, int);
214
215 /* Expand the absolute value operation. */
216 extern rtx expand_abs_nojump (machine_mode, rtx, rtx, int);
217 extern rtx expand_abs (machine_mode, rtx, rtx, int, int);
218
219 /* Expand the one's complement absolute value operation. */
220 extern rtx expand_one_cmpl_abs_nojump (machine_mode, rtx, rtx);
221
222 /* Expand the copysign operation. */
223 extern rtx expand_copysign (rtx, rtx, rtx);
224 /* Generate an instruction with a given INSN_CODE with an output and
225 an input. */
226 extern bool maybe_emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code);
227 extern void emit_unop_insn (enum insn_code, rtx, rtx, enum rtx_code);
228
229 /* Emit code to make a call to a constant function or a library call. */
230 extern void emit_libcall_block (rtx_insn *, rtx, rtx, rtx);
231
232 /* The various uses that a comparison can have; used by can_compare_p:
233 jumps, conditional moves, store flag operations. */
234 enum can_compare_purpose
235 {
236 ccp_jump,
237 ccp_cmov,
238 ccp_store_flag
239 };
240
241 /* Nonzero if a compare of mode MODE can be done straightforwardly
242 (without splitting it into pieces). */
243 extern int can_compare_p (enum rtx_code, machine_mode,
244 enum can_compare_purpose);
245
246 /* Return whether the backend can emit a vector comparison for code CODE,
247 comparing operands of mode CMP_OP_MODE and producing a result with
248 VALUE_MODE. */
249 extern bool can_vcond_compare_p (enum rtx_code, machine_mode, machine_mode);
250
251 extern rtx prepare_operand (enum insn_code, rtx, int, machine_mode,
252 machine_mode, int);
253 /* Emit a pair of rtl insns to compare two rtx's and to jump
254 to a label if the comparison is true. */
255 extern void emit_cmp_and_jump_insns (rtx, rtx, enum rtx_code, rtx,
256 machine_mode, int, rtx,
257 profile_probability prob
258 = profile_probability::uninitialized ());
259
260 /* Generate code to indirectly jump to a location given in the rtx LOC. */
261 extern void emit_indirect_jump (rtx);
262
263 #include "insn-config.h"
264
265 #ifndef GCC_INSN_CONFIG_H
266 #error "insn-config.h must be included before optabs.h"
267 #endif
268
269 /* Emit a conditional move operation. */
270 rtx emit_conditional_move (rtx, enum rtx_code, rtx, rtx, machine_mode,
271 rtx, rtx, machine_mode, int);
272
273 /* Emit a conditional negate or bitwise complement operation. */
274 rtx emit_conditional_neg_or_complement (rtx, rtx_code, machine_mode, rtx,
275 rtx, rtx);
276
277 rtx emit_conditional_add (rtx, enum rtx_code, rtx, rtx, machine_mode,
278 rtx, rtx, machine_mode, int);
279
280 /* Create but don't emit one rtl instruction to perform certain operations.
281 Modes must match; operands must meet the operation's predicates.
282 Likewise for subtraction and for just copying. */
283 extern rtx_insn *gen_add2_insn (rtx, rtx);
284 extern rtx_insn *gen_add3_insn (rtx, rtx, rtx);
285 extern int have_add2_insn (rtx, rtx);
286 extern rtx_insn *gen_addptr3_insn (rtx, rtx, rtx);
287 extern int have_addptr3_insn (rtx, rtx, rtx);
288 extern rtx_insn *gen_sub2_insn (rtx, rtx);
289 extern rtx_insn *gen_sub3_insn (rtx, rtx, rtx);
290 extern int have_sub2_insn (rtx, rtx);
291
292 /* Generate the body of an insn to extend Y (with mode MFROM)
293 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
294 extern rtx_insn *gen_extend_insn (rtx, rtx, machine_mode, machine_mode, int);
295
296 /* Generate code for a FLOAT_EXPR. */
297 extern void expand_float (rtx, rtx, int);
298
299 /* Generate code for a FIX_EXPR. */
300 extern void expand_fix (rtx, rtx, int);
301
302 /* Generate code for a FIXED_CONVERT_EXPR. */
303 extern void expand_fixed_convert (rtx, rtx, int, int);
304
305 /* Generate code for float to integral conversion. */
306 extern bool expand_sfix_optab (rtx, rtx, convert_optab);
307
308 /* Report whether the machine description contains an insn which can
309 perform the operation described by CODE and MODE. */
310 extern int have_insn_for (enum rtx_code, machine_mode);
311
312 /* Generate a conditional trap instruction. */
313 extern rtx_insn *gen_cond_trap (enum rtx_code, rtx, rtx, rtx);
314
315 /* Generate code for VEC_PERM_EXPR. */
316 extern rtx expand_vec_perm_var (machine_mode, rtx, rtx, rtx, rtx);
317 extern rtx expand_vec_perm_const (machine_mode, rtx, rtx,
318 const vec_perm_builder &, machine_mode, rtx);
319
320 /* Generate code for vector comparison. */
321 extern rtx expand_vec_cmp_expr (tree, tree, rtx);
322
323 /* Generate code for VEC_COND_EXPR. */
324 extern rtx expand_vec_cond_expr (tree, tree, tree, tree, rtx);
325
326 /* Generate code for VEC_SERIES_EXPR. */
327 extern rtx expand_vec_series_expr (machine_mode, rtx, rtx, rtx);
328
329 /* Generate code for MULT_HIGHPART_EXPR. */
330 extern rtx expand_mult_highpart (machine_mode, rtx, rtx, rtx, bool);
331
332 extern rtx expand_sync_lock_test_and_set (rtx, rtx, rtx);
333 extern rtx expand_atomic_test_and_set (rtx, rtx, enum memmodel);
334 extern rtx expand_atomic_exchange (rtx, rtx, rtx, enum memmodel);
335 extern bool expand_atomic_compare_and_swap (rtx *, rtx *, rtx, rtx, rtx, bool,
336 enum memmodel, enum memmodel);
337 /* Generate memory barriers. */
338 extern void expand_mem_thread_fence (enum memmodel);
339 extern void expand_mem_signal_fence (enum memmodel);
340
341 rtx expand_atomic_load (rtx, rtx, enum memmodel);
342 rtx expand_atomic_store (rtx, rtx, enum memmodel, bool);
343 rtx expand_atomic_fetch_op (rtx, rtx, rtx, enum rtx_code, enum memmodel,
344 bool);
345
346 extern bool insn_operand_matches (enum insn_code icode, unsigned int opno,
347 rtx operand);
348 extern bool valid_multiword_target_p (rtx);
349 extern void create_convert_operand_from_type (class expand_operand *op,
350 rtx value, tree type);
351 extern bool maybe_legitimize_operands (enum insn_code icode,
352 unsigned int opno, unsigned int nops,
353 class expand_operand *ops);
354 extern rtx_insn *maybe_gen_insn (enum insn_code icode, unsigned int nops,
355 class expand_operand *ops);
356 extern bool maybe_expand_insn (enum insn_code icode, unsigned int nops,
357 class expand_operand *ops);
358 extern bool maybe_expand_jump_insn (enum insn_code icode, unsigned int nops,
359 class expand_operand *ops);
360 extern void expand_insn (enum insn_code icode, unsigned int nops,
361 class expand_operand *ops);
362 extern void expand_jump_insn (enum insn_code icode, unsigned int nops,
363 class expand_operand *ops);
364
365 extern enum rtx_code get_rtx_code (enum tree_code tcode, bool unsignedp);
366
367 #endif /* GCC_OPTABS_H */