1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This file contains subroutines used only from the file reload1.c.
21 It knows how to scan one insn for operands and values
22 that need to be copied into registers to make valid code.
23 It also finds other operands and values which are valid
24 but for which equivalent values in registers exist and
25 ought to be used instead.
27 Before processing the first insn of the function, call `init_reload'.
28 init_reload actually has to be called earlier anyway.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
72 Using a reload register for several reloads in one insn:
74 When an insn has reloads, it is considered as having three parts:
75 the input reloads, the insn itself after reloading, and the output reloads.
76 Reloads of values used in memory addresses are often needed for only one part.
78 When this is so, reload_when_needed records which part needs the reload.
79 Two reloads for different parts of the insn can share the same reload
82 When a reload is used for addresses in multiple parts, or when it is
83 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
84 a register with any other reload. */
88 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
93 #include "coretypes.h"
95 #include "rtl-error.h"
97 #include "insn-config.h"
104 #include "addresses.h"
105 #include "hard-reg-set.h"
107 #include "function.h"
112 /* True if X is a constant that can be forced into the constant pool.
113 MODE is the mode of the operand, or VOIDmode if not known. */
114 #define CONST_POOL_OK_P(MODE, X) \
115 ((MODE) != VOIDmode \
117 && GET_CODE (X) != HIGH \
118 && !targetm.cannot_force_const_mem (MODE, X))
120 /* True if C is a non-empty register class that has too few registers
121 to be safely used as a reload target class. */
124 small_register_class_p (reg_class_t rclass
)
126 return (reg_class_size
[(int) rclass
] == 1
127 || (reg_class_size
[(int) rclass
] >= 1
128 && targetm
.class_likely_spilled_p (rclass
)));
132 /* All reloads of the current insn are recorded here. See reload.h for
135 struct reload rld
[MAX_RELOADS
];
137 /* All the "earlyclobber" operands of the current insn
138 are recorded here. */
140 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
142 int reload_n_operands
;
144 /* Replacing reloads.
146 If `replace_reloads' is nonzero, then as each reload is recorded
147 an entry is made for it in the table `replacements'.
148 Then later `subst_reloads' can look through that table and
149 perform all the replacements needed. */
151 /* Nonzero means record the places to replace. */
152 static int replace_reloads
;
154 /* Each replacement is recorded with a structure like this. */
157 rtx
*where
; /* Location to store in */
158 int what
; /* which reload this is for */
159 enum machine_mode mode
; /* mode it must have */
162 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
164 /* Number of replacements currently recorded. */
165 static int n_replacements
;
167 /* Used to track what is modified by an operand. */
170 int reg_flag
; /* Nonzero if referencing a register. */
171 int safe
; /* Nonzero if this can't conflict with anything. */
172 rtx base
; /* Base address for MEM. */
173 HOST_WIDE_INT start
; /* Starting offset or register number. */
174 HOST_WIDE_INT end
; /* Ending offset or register number. */
177 #ifdef SECONDARY_MEMORY_NEEDED
179 /* Save MEMs needed to copy from one class of registers to another. One MEM
180 is used per mode, but normally only one or two modes are ever used.
182 We keep two versions, before and after register elimination. The one
183 after register elimination is record separately for each operand. This
184 is done in case the address is not valid to be sure that we separately
187 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
188 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
189 static int secondary_memlocs_elim_used
= 0;
192 /* The instruction we are doing reloads for;
193 so we can test whether a register dies in it. */
194 static rtx this_insn
;
196 /* Nonzero if this instruction is a user-specified asm with operands. */
197 static int this_insn_is_asm
;
199 /* If hard_regs_live_known is nonzero,
200 we can tell which hard regs are currently live,
201 at least enough to succeed in choosing dummy reloads. */
202 static int hard_regs_live_known
;
204 /* Indexed by hard reg number,
205 element is nonnegative if hard reg has been spilled.
206 This vector is passed to `find_reloads' as an argument
207 and is not changed here. */
208 static short *static_reload_reg_p
;
210 /* Set to 1 in subst_reg_equivs if it changes anything. */
211 static int subst_reg_equivs_changed
;
213 /* On return from push_reload, holds the reload-number for the OUT
214 operand, which can be different for that from the input operand. */
215 static int output_reloadnum
;
217 /* Compare two RTX's. */
218 #define MATCHES(x, y) \
219 (x == y || (x != 0 && (REG_P (x) \
220 ? REG_P (y) && REGNO (x) == REGNO (y) \
221 : rtx_equal_p (x, y) && ! side_effects_p (x))))
223 /* Indicates if two reloads purposes are for similar enough things that we
224 can merge their reloads. */
225 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
226 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
227 || ((when1) == (when2) && (op1) == (op2)) \
228 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
229 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
230 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
231 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
232 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
234 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
235 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
236 ((when1) != (when2) \
237 || ! ((op1) == (op2) \
238 || (when1) == RELOAD_FOR_INPUT \
239 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
240 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
242 /* If we are going to reload an address, compute the reload type to
244 #define ADDR_TYPE(type) \
245 ((type) == RELOAD_FOR_INPUT_ADDRESS \
246 ? RELOAD_FOR_INPADDR_ADDRESS \
247 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
248 ? RELOAD_FOR_OUTADDR_ADDRESS \
251 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
252 enum machine_mode
, enum reload_type
,
253 enum insn_code
*, secondary_reload_info
*);
254 static enum reg_class
find_valid_class (enum machine_mode
, enum machine_mode
,
256 static void push_replacement (rtx
*, int, enum machine_mode
);
257 static void dup_replacements (rtx
*, rtx
*);
258 static void combine_reloads (void);
259 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
260 enum reload_type
, int, int);
261 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, enum machine_mode
,
262 enum machine_mode
, reg_class_t
, int, int);
263 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
264 static struct decomposition
decompose (rtx
);
265 static int immune_p (rtx
, rtx
, struct decomposition
);
266 static bool alternative_allows_const_pool_ref (rtx
, const char *, int);
267 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int, rtx
,
269 static rtx
make_memloc (rtx
, int);
270 static int maybe_memory_address_addr_space_p (enum machine_mode
, rtx
,
271 addr_space_t
, rtx
*);
272 static int find_reloads_address (enum machine_mode
, rtx
*, rtx
, rtx
*,
273 int, enum reload_type
, int, rtx
);
274 static rtx
subst_reg_equivs (rtx
, rtx
);
275 static rtx
subst_indexed_address (rtx
);
276 static void update_auto_inc_notes (rtx
, int, int);
277 static int find_reloads_address_1 (enum machine_mode
, addr_space_t
, rtx
, int,
278 enum rtx_code
, enum rtx_code
, rtx
*,
279 int, enum reload_type
,int, rtx
);
280 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
281 enum machine_mode
, int,
282 enum reload_type
, int);
283 static rtx
find_reloads_subreg_address (rtx
, int, enum reload_type
,
285 static void copy_replacements_1 (rtx
*, rtx
*, int);
286 static int find_inc_amount (rtx
, rtx
);
287 static int refers_to_mem_for_reload_p (rtx
);
288 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
291 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
295 push_reg_equiv_alt_mem (int regno
, rtx mem
)
299 for (it
= reg_equiv_alt_mem_list (regno
); it
; it
= XEXP (it
, 1))
300 if (rtx_equal_p (XEXP (it
, 0), mem
))
303 reg_equiv_alt_mem_list (regno
)
304 = alloc_EXPR_LIST (REG_EQUIV
, mem
,
305 reg_equiv_alt_mem_list (regno
));
308 /* Determine if any secondary reloads are needed for loading (if IN_P is
309 nonzero) or storing (if IN_P is zero) X to or from a reload register of
310 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
311 are needed, push them.
313 Return the reload number of the secondary reload we made, or -1 if
314 we didn't need one. *PICODE is set to the insn_code to use if we do
315 need a secondary reload. */
318 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
319 enum reg_class reload_class
,
320 enum machine_mode reload_mode
, enum reload_type type
,
321 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
323 enum reg_class rclass
= NO_REGS
;
324 enum reg_class scratch_class
;
325 enum machine_mode mode
= reload_mode
;
326 enum insn_code icode
= CODE_FOR_nothing
;
327 enum insn_code t_icode
= CODE_FOR_nothing
;
328 enum reload_type secondary_type
;
329 int s_reload
, t_reload
= -1;
330 const char *scratch_constraint
;
332 secondary_reload_info sri
;
334 if (type
== RELOAD_FOR_INPUT_ADDRESS
335 || type
== RELOAD_FOR_OUTPUT_ADDRESS
336 || type
== RELOAD_FOR_INPADDR_ADDRESS
337 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
338 secondary_type
= type
;
340 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
342 *picode
= CODE_FOR_nothing
;
344 /* If X is a paradoxical SUBREG, use the inner value to determine both the
345 mode and object being reloaded. */
346 if (paradoxical_subreg_p (x
))
349 reload_mode
= GET_MODE (x
);
352 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
353 is still a pseudo-register by now, it *must* have an equivalent MEM
354 but we don't want to assume that), use that equivalent when seeing if
355 a secondary reload is needed since whether or not a reload is needed
356 might be sensitive to the form of the MEM. */
358 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
359 && reg_equiv_mem (REGNO (x
)))
360 x
= reg_equiv_mem (REGNO (x
));
362 sri
.icode
= CODE_FOR_nothing
;
363 sri
.prev_sri
= prev_sri
;
364 rclass
= (enum reg_class
) targetm
.secondary_reload (in_p
, x
, reload_class
,
366 icode
= (enum insn_code
) sri
.icode
;
368 /* If we don't need any secondary registers, done. */
369 if (rclass
== NO_REGS
&& icode
== CODE_FOR_nothing
)
372 if (rclass
!= NO_REGS
)
373 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, rclass
,
374 reload_mode
, type
, &t_icode
, &sri
);
376 /* If we will be using an insn, the secondary reload is for a
379 if (icode
!= CODE_FOR_nothing
)
381 /* If IN_P is nonzero, the reload register will be the output in
382 operand 0. If IN_P is zero, the reload register will be the input
383 in operand 1. Outputs should have an initial "=", which we must
386 /* ??? It would be useful to be able to handle only two, or more than
387 three, operands, but for now we can only handle the case of having
388 exactly three: output, input and one temp/scratch. */
389 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
391 /* ??? We currently have no way to represent a reload that needs
392 an icode to reload from an intermediate tertiary reload register.
393 We should probably have a new field in struct reload to tag a
394 chain of scratch operand reloads onto. */
395 gcc_assert (rclass
== NO_REGS
);
397 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
398 gcc_assert (*scratch_constraint
== '=');
399 scratch_constraint
++;
400 if (*scratch_constraint
== '&')
401 scratch_constraint
++;
402 letter
= *scratch_constraint
;
403 scratch_class
= (letter
== 'r' ? GENERAL_REGS
404 : (reg_class_for_constraint
405 (lookup_constraint (scratch_constraint
))));
407 rclass
= scratch_class
;
408 mode
= insn_data
[(int) icode
].operand
[2].mode
;
411 /* This case isn't valid, so fail. Reload is allowed to use the same
412 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
413 in the case of a secondary register, we actually need two different
414 registers for correct code. We fail here to prevent the possibility of
415 silently generating incorrect code later.
417 The convention is that secondary input reloads are valid only if the
418 secondary_class is different from class. If you have such a case, you
419 can not use secondary reloads, you must work around the problem some
422 Allow this when a reload_in/out pattern is being used. I.e. assume
423 that the generated code handles this case. */
425 gcc_assert (!in_p
|| rclass
!= reload_class
|| icode
!= CODE_FOR_nothing
426 || t_icode
!= CODE_FOR_nothing
);
428 /* See if we can reuse an existing secondary reload. */
429 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
430 if (rld
[s_reload
].secondary_p
431 && (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
)
432 || reg_class_subset_p (rld
[s_reload
].rclass
, rclass
))
433 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
434 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
435 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
436 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
437 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
438 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
439 && (small_register_class_p (rclass
)
440 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
441 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
442 opnum
, rld
[s_reload
].opnum
))
445 rld
[s_reload
].inmode
= mode
;
447 rld
[s_reload
].outmode
= mode
;
449 if (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
))
450 rld
[s_reload
].rclass
= rclass
;
452 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
453 rld
[s_reload
].optional
&= optional
;
454 rld
[s_reload
].secondary_p
= 1;
455 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
456 opnum
, rld
[s_reload
].opnum
))
457 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
462 if (s_reload
== n_reloads
)
464 #ifdef SECONDARY_MEMORY_NEEDED
465 /* If we need a memory location to copy between the two reload regs,
466 set it up now. Note that we do the input case before making
467 the reload and the output case after. This is due to the
468 way reloads are output. */
470 if (in_p
&& icode
== CODE_FOR_nothing
471 && SECONDARY_MEMORY_NEEDED (rclass
, reload_class
, mode
))
473 get_secondary_mem (x
, reload_mode
, opnum
, type
);
475 /* We may have just added new reloads. Make sure we add
476 the new reload at the end. */
477 s_reload
= n_reloads
;
481 /* We need to make a new secondary reload for this register class. */
482 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
483 rld
[s_reload
].rclass
= rclass
;
485 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
486 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
487 rld
[s_reload
].reg_rtx
= 0;
488 rld
[s_reload
].optional
= optional
;
489 rld
[s_reload
].inc
= 0;
490 /* Maybe we could combine these, but it seems too tricky. */
491 rld
[s_reload
].nocombine
= 1;
492 rld
[s_reload
].in_reg
= 0;
493 rld
[s_reload
].out_reg
= 0;
494 rld
[s_reload
].opnum
= opnum
;
495 rld
[s_reload
].when_needed
= secondary_type
;
496 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
497 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
498 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
499 rld
[s_reload
].secondary_out_icode
500 = ! in_p
? t_icode
: CODE_FOR_nothing
;
501 rld
[s_reload
].secondary_p
= 1;
505 #ifdef SECONDARY_MEMORY_NEEDED
506 if (! in_p
&& icode
== CODE_FOR_nothing
507 && SECONDARY_MEMORY_NEEDED (reload_class
, rclass
, mode
))
508 get_secondary_mem (x
, mode
, opnum
, type
);
516 /* If a secondary reload is needed, return its class. If both an intermediate
517 register and a scratch register is needed, we return the class of the
518 intermediate register. */
520 secondary_reload_class (bool in_p
, reg_class_t rclass
, enum machine_mode mode
,
523 enum insn_code icode
;
524 secondary_reload_info sri
;
526 sri
.icode
= CODE_FOR_nothing
;
529 = (enum reg_class
) targetm
.secondary_reload (in_p
, x
, rclass
, mode
, &sri
);
530 icode
= (enum insn_code
) sri
.icode
;
532 /* If there are no secondary reloads at all, we return NO_REGS.
533 If an intermediate register is needed, we return its class. */
534 if (icode
== CODE_FOR_nothing
|| rclass
!= NO_REGS
)
537 /* No intermediate register is needed, but we have a special reload
538 pattern, which we assume for now needs a scratch register. */
539 return scratch_reload_class (icode
);
542 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
543 three operands, verify that operand 2 is an output operand, and return
545 ??? We'd like to be able to handle any pattern with at least 2 operands,
546 for zero or more scratch registers, but that needs more infrastructure. */
548 scratch_reload_class (enum insn_code icode
)
550 const char *scratch_constraint
;
552 enum reg_class rclass
;
554 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
555 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
556 gcc_assert (*scratch_constraint
== '=');
557 scratch_constraint
++;
558 if (*scratch_constraint
== '&')
559 scratch_constraint
++;
560 scratch_letter
= *scratch_constraint
;
561 if (scratch_letter
== 'r')
563 rclass
= reg_class_for_constraint (lookup_constraint (scratch_constraint
));
564 gcc_assert (rclass
!= NO_REGS
);
568 #ifdef SECONDARY_MEMORY_NEEDED
570 /* Return a memory location that will be used to copy X in mode MODE.
571 If we haven't already made a location for this mode in this insn,
572 call find_reloads_address on the location being returned. */
575 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, enum machine_mode mode
,
576 int opnum
, enum reload_type type
)
581 /* By default, if MODE is narrower than a word, widen it to a word.
582 This is required because most machines that require these memory
583 locations do not support short load and stores from all registers
584 (e.g., FP registers). */
586 #ifdef SECONDARY_MEMORY_NEEDED_MODE
587 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
589 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
590 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
593 /* If we already have made a MEM for this operand in MODE, return it. */
594 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
595 return secondary_memlocs_elim
[(int) mode
][opnum
];
597 /* If this is the first time we've tried to get a MEM for this mode,
598 allocate a new one. `something_changed' in reload will get set
599 by noticing that the frame size has changed. */
601 if (secondary_memlocs
[(int) mode
] == 0)
603 #ifdef SECONDARY_MEMORY_NEEDED_RTX
604 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
606 secondary_memlocs
[(int) mode
]
607 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
611 /* Get a version of the address doing any eliminations needed. If that
612 didn't give us a new MEM, make a new one if it isn't valid. */
614 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
615 mem_valid
= strict_memory_address_addr_space_p (mode
, XEXP (loc
, 0),
616 MEM_ADDR_SPACE (loc
));
618 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
619 loc
= copy_rtx (loc
);
621 /* The only time the call below will do anything is if the stack
622 offset is too large. In that case IND_LEVELS doesn't matter, so we
623 can just pass a zero. Adjust the type to be the address of the
624 corresponding object. If the address was valid, save the eliminated
625 address. If it wasn't valid, we need to make a reload each time, so
630 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
631 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
634 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
638 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
639 if (secondary_memlocs_elim_used
<= (int)mode
)
640 secondary_memlocs_elim_used
= (int)mode
+ 1;
644 /* Clear any secondary memory locations we've made. */
647 clear_secondary_mem (void)
649 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
651 #endif /* SECONDARY_MEMORY_NEEDED */
654 /* Find the largest class which has at least one register valid in
655 mode INNER, and which for every such register, that register number
656 plus N is also valid in OUTER (if in range) and is cheap to move
657 into REGNO. Such a class must exist. */
659 static enum reg_class
660 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED
,
661 enum machine_mode inner ATTRIBUTE_UNUSED
, int n
,
662 unsigned int dest_regno ATTRIBUTE_UNUSED
)
667 enum reg_class best_class
= NO_REGS
;
668 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
669 unsigned int best_size
= 0;
672 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
676 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
677 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
))
679 if (HARD_REGNO_MODE_OK (regno
, inner
))
682 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
+ n
)
683 && ! HARD_REGNO_MODE_OK (regno
+ n
, outer
))
690 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
692 if ((reg_class_size
[rclass
] > best_size
693 && (best_cost
< 0 || best_cost
>= cost
))
696 best_class
= (enum reg_class
) rclass
;
697 best_size
= reg_class_size
[rclass
];
698 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
703 gcc_assert (best_size
!= 0);
708 /* We are trying to reload a subreg of something that is not a register.
709 Find the largest class which contains only registers valid in
710 mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
711 which we would eventually like to obtain the object. */
713 static enum reg_class
714 find_valid_class_1 (enum machine_mode outer ATTRIBUTE_UNUSED
,
715 enum machine_mode mode ATTRIBUTE_UNUSED
,
716 enum reg_class dest_class ATTRIBUTE_UNUSED
)
721 enum reg_class best_class
= NO_REGS
;
722 unsigned int best_size
= 0;
725 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
728 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& !bad
; regno
++)
730 if (in_hard_reg_set_p (reg_class_contents
[rclass
], mode
, regno
)
731 && !HARD_REGNO_MODE_OK (regno
, mode
))
738 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
740 if ((reg_class_size
[rclass
] > best_size
741 && (best_cost
< 0 || best_cost
>= cost
))
744 best_class
= (enum reg_class
) rclass
;
745 best_size
= reg_class_size
[rclass
];
746 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
751 gcc_assert (best_size
!= 0);
753 #ifdef LIMIT_RELOAD_CLASS
754 best_class
= LIMIT_RELOAD_CLASS (mode
, best_class
);
759 /* Return the number of a previously made reload that can be combined with
760 a new one, or n_reloads if none of the existing reloads can be used.
761 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
762 push_reload, they determine the kind of the new reload that we try to
763 combine. P_IN points to the corresponding value of IN, which can be
764 modified by this function.
765 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
768 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class rclass
,
769 enum reload_type type
, int opnum
, int dont_share
)
773 /* We can't merge two reloads if the output of either one is
776 if (earlyclobber_operand_p (out
))
779 /* We can use an existing reload if the class is right
780 and at least one of IN and OUT is a match
781 and the other is at worst neutral.
782 (A zero compared against anything is neutral.)
784 For targets with small register classes, don't use existing reloads
785 unless they are for the same thing since that can cause us to need
786 more reload registers than we otherwise would. */
788 for (i
= 0; i
< n_reloads
; i
++)
789 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
790 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
791 /* If the existing reload has a register, it must fit our class. */
792 && (rld
[i
].reg_rtx
== 0
793 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
794 true_regnum (rld
[i
].reg_rtx
)))
795 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
796 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
797 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
798 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
799 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
800 && (small_register_class_p (rclass
)
801 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
802 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
805 /* Reloading a plain reg for input can match a reload to postincrement
806 that reg, since the postincrement's value is the right value.
807 Likewise, it can match a preincrement reload, since we regard
808 the preincrementation as happening before any ref in this insn
810 for (i
= 0; i
< n_reloads
; i
++)
811 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
812 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
813 /* If the existing reload has a register, it must fit our
815 && (rld
[i
].reg_rtx
== 0
816 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
817 true_regnum (rld
[i
].reg_rtx
)))
818 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
820 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
821 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
822 || (REG_P (rld
[i
].in
)
823 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
824 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
825 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
826 && (small_register_class_p (rclass
)
827 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
828 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
829 opnum
, rld
[i
].opnum
))
831 /* Make sure reload_in ultimately has the increment,
832 not the plain register. */
840 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
841 expression. MODE is the mode that X will be used in. OUTPUT is true if
842 the function is invoked for the output part of an enclosing reload. */
845 reload_inner_reg_of_subreg (rtx x
, enum machine_mode mode
, bool output
)
849 /* Only SUBREGs are problematical. */
850 if (GET_CODE (x
) != SUBREG
)
853 inner
= SUBREG_REG (x
);
855 /* If INNER is a constant or PLUS, then INNER will need reloading. */
856 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
859 /* If INNER is not a hard register, then INNER will not need reloading. */
860 if (!(REG_P (inner
) && HARD_REGISTER_P (inner
)))
863 /* If INNER is not ok for MODE, then INNER will need reloading. */
864 if (!HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
867 /* If this is for an output, and the outer part is a word or smaller,
868 INNER is larger than a word and the number of registers in INNER is
869 not the same as the number of words in INNER, then INNER will need
870 reloading (with an in-out reload). */
872 && GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
873 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
874 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
875 != (int) hard_regno_nregs
[REGNO (inner
)][GET_MODE (inner
)]));
878 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
879 requiring an extra reload register. The caller has already found that
880 IN contains some reference to REGNO, so check that we can produce the
881 new value in a single step. E.g. if we have
882 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
883 instruction that adds one to a register, this should succeed.
884 However, if we have something like
885 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
886 needs to be loaded into a register first, we need a separate reload
888 Such PLUS reloads are generated by find_reload_address_part.
889 The out-of-range PLUS expressions are usually introduced in the instruction
890 patterns by register elimination and substituting pseudos without a home
891 by their function-invariant equivalences. */
893 can_reload_into (rtx in
, int regno
, enum machine_mode mode
)
897 struct recog_data_d save_recog_data
;
899 /* For matching constraints, we often get notional input reloads where
900 we want to use the original register as the reload register. I.e.
901 technically this is a non-optional input-output reload, but IN is
902 already a valid register, and has been chosen as the reload register.
903 Speed this up, since it trivially works. */
907 /* To test MEMs properly, we'd have to take into account all the reloads
908 that are already scheduled, which can become quite complicated.
909 And since we've already handled address reloads for this MEM, it
910 should always succeed anyway. */
914 /* If we can make a simple SET insn that does the job, everything should
916 dst
= gen_rtx_REG (mode
, regno
);
917 test_insn
= make_insn_raw (gen_rtx_SET (VOIDmode
, dst
, in
));
918 save_recog_data
= recog_data
;
919 if (recog_memoized (test_insn
) >= 0)
921 extract_insn (test_insn
);
922 r
= constrain_operands (1);
924 recog_data
= save_recog_data
;
928 /* Record one reload that needs to be performed.
929 IN is an rtx saying where the data are to be found before this instruction.
930 OUT says where they must be stored after the instruction.
931 (IN is zero for data not read, and OUT is zero for data not written.)
932 INLOC and OUTLOC point to the places in the instructions where
933 IN and OUT were found.
934 If IN and OUT are both nonzero, it means the same register must be used
935 to reload both IN and OUT.
937 RCLASS is a register class required for the reloaded data.
938 INMODE is the machine mode that the instruction requires
939 for the reg that replaces IN and OUTMODE is likewise for OUT.
941 If IN is zero, then OUT's location and mode should be passed as
944 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
946 OPTIONAL nonzero means this reload does not need to be performed:
947 it can be discarded if that is more convenient.
949 OPNUM and TYPE say what the purpose of this reload is.
951 The return value is the reload-number for this reload.
953 If both IN and OUT are nonzero, in some rare cases we might
954 want to make two separate reloads. (Actually we never do this now.)
955 Therefore, the reload-number for OUT is stored in
956 output_reloadnum when we return; the return value applies to IN.
957 Usually (presently always), when IN and OUT are nonzero,
958 the two reload-numbers are equal, but the caller should be careful to
962 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
963 enum reg_class rclass
, enum machine_mode inmode
,
964 enum machine_mode outmode
, int strict_low
, int optional
,
965 int opnum
, enum reload_type type
)
969 int dont_remove_subreg
= 0;
970 #ifdef LIMIT_RELOAD_CLASS
971 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
973 int secondary_in_reload
= -1, secondary_out_reload
= -1;
974 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
975 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
976 enum reg_class subreg_in_class ATTRIBUTE_UNUSED
;
977 subreg_in_class
= NO_REGS
;
979 /* INMODE and/or OUTMODE could be VOIDmode if no mode
980 has been specified for the operand. In that case,
981 use the operand's mode as the mode to reload. */
982 if (inmode
== VOIDmode
&& in
!= 0)
983 inmode
= GET_MODE (in
);
984 if (outmode
== VOIDmode
&& out
!= 0)
985 outmode
= GET_MODE (out
);
987 /* If find_reloads and friends until now missed to replace a pseudo
988 with a constant of reg_equiv_constant something went wrong
990 Note that it can't simply be done here if we missed it earlier
991 since the constant might need to be pushed into the literal pool
992 and the resulting memref would probably need further
994 if (in
!= 0 && REG_P (in
))
996 int regno
= REGNO (in
);
998 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
999 || reg_renumber
[regno
] >= 0
1000 || reg_equiv_constant (regno
) == NULL_RTX
);
1003 /* reg_equiv_constant only contains constants which are obviously
1004 not appropriate as destination. So if we would need to replace
1005 the destination pseudo with a constant we are in real
1007 if (out
!= 0 && REG_P (out
))
1009 int regno
= REGNO (out
);
1011 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
1012 || reg_renumber
[regno
] >= 0
1013 || reg_equiv_constant (regno
) == NULL_RTX
);
1016 /* If we have a read-write operand with an address side-effect,
1017 change either IN or OUT so the side-effect happens only once. */
1018 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
1019 switch (GET_CODE (XEXP (in
, 0)))
1021 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
1022 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
1025 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
1026 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
1033 /* If we are reloading a (SUBREG constant ...), really reload just the
1034 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1035 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
1036 a pseudo and hence will become a MEM) with M1 wider than M2 and the
1037 register is a pseudo, also reload the inside expression.
1038 For machines that extend byte loads, do this for any SUBREG of a pseudo
1039 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
1040 M2 is an integral mode that gets extended when loaded.
1041 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1042 where either M1 is not valid for R or M2 is wider than a word but we
1043 only need one register to store an M2-sized quantity in R.
1044 (However, if OUT is nonzero, we need to reload the reg *and*
1045 the subreg, so do nothing here, and let following statement handle it.)
1047 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1048 we can't handle it here because CONST_INT does not indicate a mode.
1050 Similarly, we must reload the inside expression if we have a
1051 STRICT_LOW_PART (presumably, in == out in this case).
1053 Also reload the inner expression if it does not require a secondary
1054 reload but the SUBREG does.
1056 Finally, reload the inner expression if it is a register that is in
1057 the class whose registers cannot be referenced in a different size
1058 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1059 cannot reload just the inside since we might end up with the wrong
1060 register class. But if it is inside a STRICT_LOW_PART, we have
1061 no choice, so we hope we do get the right register class there. */
1063 if (in
!= 0 && GET_CODE (in
) == SUBREG
1064 && (subreg_lowpart_p (in
) || strict_low
)
1065 #ifdef CANNOT_CHANGE_MODE_CLASS
1066 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, rclass
)
1068 && contains_reg_of_mode
[(int) rclass
][(int) GET_MODE (SUBREG_REG (in
))]
1069 && (CONSTANT_P (SUBREG_REG (in
))
1070 || GET_CODE (SUBREG_REG (in
)) == PLUS
1072 || (((REG_P (SUBREG_REG (in
))
1073 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1074 || MEM_P (SUBREG_REG (in
)))
1075 && ((GET_MODE_PRECISION (inmode
)
1076 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1077 #ifdef LOAD_EXTEND_OP
1078 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1079 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1081 && (GET_MODE_PRECISION (inmode
)
1082 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1083 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
1084 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != UNKNOWN
)
1086 #ifdef WORD_REGISTER_OPERATIONS
1087 || ((GET_MODE_PRECISION (inmode
)
1088 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1089 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1090 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1094 || (REG_P (SUBREG_REG (in
))
1095 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1096 /* The case where out is nonzero
1097 is handled differently in the following statement. */
1098 && (out
== 0 || subreg_lowpart_p (in
))
1099 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1100 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1102 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1104 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (in
))]
1105 [GET_MODE (SUBREG_REG (in
))]))
1106 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1107 || (secondary_reload_class (1, rclass
, inmode
, in
) != NO_REGS
1108 && (secondary_reload_class (1, rclass
, GET_MODE (SUBREG_REG (in
)),
1111 #ifdef CANNOT_CHANGE_MODE_CLASS
1112 || (REG_P (SUBREG_REG (in
))
1113 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1114 && REG_CANNOT_CHANGE_MODE_P
1115 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1119 #ifdef LIMIT_RELOAD_CLASS
1120 in_subreg_loc
= inloc
;
1122 inloc
= &SUBREG_REG (in
);
1124 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1126 /* This is supposed to happen only for paradoxical subregs made by
1127 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1128 gcc_assert (GET_MODE_SIZE (GET_MODE (in
)) <= GET_MODE_SIZE (inmode
));
1130 inmode
= GET_MODE (in
);
1133 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1134 where M1 is not valid for R if it was not handled by the code above.
1136 Similar issue for (SUBREG constant ...) if it was not handled by the
1137 code above. This can happen if SUBREG_BYTE != 0.
1139 However, we must reload the inner reg *as well as* the subreg in
1142 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, false))
1144 if (REG_P (SUBREG_REG (in
)))
1146 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1147 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1148 GET_MODE (SUBREG_REG (in
)),
1151 REGNO (SUBREG_REG (in
)));
1152 else if (GET_CODE (SUBREG_REG (in
)) == SYMBOL_REF
)
1153 subreg_in_class
= find_valid_class_1 (inmode
,
1154 GET_MODE (SUBREG_REG (in
)),
1157 /* This relies on the fact that emit_reload_insns outputs the
1158 instructions for input reloads of type RELOAD_OTHER in the same
1159 order as the reloads. Thus if the outer reload is also of type
1160 RELOAD_OTHER, we are guaranteed that this inner reload will be
1161 output before the outer reload. */
1162 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1163 subreg_in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1164 dont_remove_subreg
= 1;
1167 /* Similarly for paradoxical and problematical SUBREGs on the output.
1168 Note that there is no reason we need worry about the previous value
1169 of SUBREG_REG (out); even if wider than out, storing in a subreg is
1170 entitled to clobber it all (except in the case of a word mode subreg
1171 or of a STRICT_LOW_PART, in that latter case the constraint should
1172 label it input-output.) */
1173 if (out
!= 0 && GET_CODE (out
) == SUBREG
1174 && (subreg_lowpart_p (out
) || strict_low
)
1175 #ifdef CANNOT_CHANGE_MODE_CLASS
1176 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, rclass
)
1178 && contains_reg_of_mode
[(int) rclass
][(int) GET_MODE (SUBREG_REG (out
))]
1179 && (CONSTANT_P (SUBREG_REG (out
))
1181 || (((REG_P (SUBREG_REG (out
))
1182 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1183 || MEM_P (SUBREG_REG (out
)))
1184 && ((GET_MODE_PRECISION (outmode
)
1185 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out
))))
1186 #ifdef WORD_REGISTER_OPERATIONS
1187 || ((GET_MODE_PRECISION (outmode
)
1188 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out
))))
1189 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1190 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1194 || (REG_P (SUBREG_REG (out
))
1195 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1196 /* The case of a word mode subreg
1197 is handled differently in the following statement. */
1198 && ! (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1199 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1201 && ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
))
1202 || (secondary_reload_class (0, rclass
, outmode
, out
) != NO_REGS
1203 && (secondary_reload_class (0, rclass
, GET_MODE (SUBREG_REG (out
)),
1206 #ifdef CANNOT_CHANGE_MODE_CLASS
1207 || (REG_P (SUBREG_REG (out
))
1208 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1209 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1210 GET_MODE (SUBREG_REG (out
)),
1215 #ifdef LIMIT_RELOAD_CLASS
1216 out_subreg_loc
= outloc
;
1218 outloc
= &SUBREG_REG (out
);
1220 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1221 gcc_assert (!MEM_P (out
)
1222 || GET_MODE_SIZE (GET_MODE (out
))
1223 <= GET_MODE_SIZE (outmode
));
1225 outmode
= GET_MODE (out
);
1228 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1229 where either M1 is not valid for R or M2 is wider than a word but we
1230 only need one register to store an M2-sized quantity in R.
1232 However, we must reload the inner reg *as well as* the subreg in
1233 that case and the inner reg is an in-out reload. */
1235 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, true))
1237 enum reg_class in_out_class
1238 = find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1239 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1240 GET_MODE (SUBREG_REG (out
)),
1243 REGNO (SUBREG_REG (out
)));
1245 /* This relies on the fact that emit_reload_insns outputs the
1246 instructions for output reloads of type RELOAD_OTHER in reverse
1247 order of the reloads. Thus if the outer reload is also of type
1248 RELOAD_OTHER, we are guaranteed that this inner reload will be
1249 output after the outer reload. */
1250 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1251 &SUBREG_REG (out
), in_out_class
, VOIDmode
, VOIDmode
,
1252 0, 0, opnum
, RELOAD_OTHER
);
1253 dont_remove_subreg
= 1;
1256 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1257 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1258 && (REG_P (in
) || MEM_P (in
) || GET_CODE (in
) == PLUS
)
1259 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1262 /* If IN is a SUBREG of a hard register, make a new REG. This
1263 simplifies some of the cases below. */
1265 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1266 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1267 && ! dont_remove_subreg
)
1268 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1270 /* Similarly for OUT. */
1271 if (out
!= 0 && GET_CODE (out
) == SUBREG
1272 && REG_P (SUBREG_REG (out
))
1273 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1274 && ! dont_remove_subreg
)
1275 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1277 /* Narrow down the class of register wanted if that is
1278 desirable on this machine for efficiency. */
1280 reg_class_t preferred_class
= rclass
;
1283 preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1285 /* Output reloads may need analogous treatment, different in detail. */
1288 = targetm
.preferred_output_reload_class (out
, preferred_class
);
1290 /* Discard what the target said if we cannot do it. */
1291 if (preferred_class
!= NO_REGS
1292 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1293 rclass
= (enum reg_class
) preferred_class
;
1296 /* Make sure we use a class that can handle the actual pseudo
1297 inside any subreg. For example, on the 386, QImode regs
1298 can appear within SImode subregs. Although GENERAL_REGS
1299 can handle SImode, QImode needs a smaller class. */
1300 #ifdef LIMIT_RELOAD_CLASS
1302 rclass
= LIMIT_RELOAD_CLASS (inmode
, rclass
);
1303 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1304 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), rclass
);
1307 rclass
= LIMIT_RELOAD_CLASS (outmode
, rclass
);
1308 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1309 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), rclass
);
1312 /* Verify that this class is at least possible for the mode that
1314 if (this_insn_is_asm
)
1316 enum machine_mode mode
;
1317 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1321 if (mode
== VOIDmode
)
1323 error_for_asm (this_insn
, "cannot reload integer constant "
1324 "operand in %<asm%>");
1329 outmode
= word_mode
;
1331 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1332 if (HARD_REGNO_MODE_OK (i
, mode
)
1333 && in_hard_reg_set_p (reg_class_contents
[(int) rclass
], mode
, i
))
1335 if (i
== FIRST_PSEUDO_REGISTER
)
1337 error_for_asm (this_insn
, "impossible register constraint "
1339 /* Avoid further trouble with this insn. */
1340 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1341 /* We used to continue here setting class to ALL_REGS, but it triggers
1342 sanity check on i386 for:
1343 void foo(long double d)
1347 Returning zero here ought to be safe as we take care in
1348 find_reloads to not process the reloads when instruction was
1355 /* Optional output reloads are always OK even if we have no register class,
1356 since the function of these reloads is only to have spill_reg_store etc.
1357 set, so that the storing insn can be deleted later. */
1358 gcc_assert (rclass
!= NO_REGS
1359 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1361 i
= find_reusable_reload (&in
, out
, rclass
, type
, opnum
, dont_share
);
1365 /* See if we need a secondary reload register to move between CLASS
1366 and IN or CLASS and OUT. Get the icode and push any required reloads
1367 needed for each of them if so. */
1371 = push_secondary_reload (1, in
, opnum
, optional
, rclass
, inmode
, type
,
1372 &secondary_in_icode
, NULL
);
1373 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1374 secondary_out_reload
1375 = push_secondary_reload (0, out
, opnum
, optional
, rclass
, outmode
,
1376 type
, &secondary_out_icode
, NULL
);
1378 /* We found no existing reload suitable for re-use.
1379 So add an additional reload. */
1381 #ifdef SECONDARY_MEMORY_NEEDED
1382 if (subreg_in_class
== NO_REGS
1385 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1386 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
)
1387 subreg_in_class
= REGNO_REG_CLASS (reg_or_subregno (in
));
1388 /* If a memory location is needed for the copy, make one. */
1389 if (subreg_in_class
!= NO_REGS
1390 && SECONDARY_MEMORY_NEEDED (subreg_in_class
, rclass
, inmode
))
1391 get_secondary_mem (in
, inmode
, opnum
, type
);
1397 rld
[i
].rclass
= rclass
;
1398 rld
[i
].inmode
= inmode
;
1399 rld
[i
].outmode
= outmode
;
1401 rld
[i
].optional
= optional
;
1403 rld
[i
].nocombine
= 0;
1404 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1405 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1406 rld
[i
].opnum
= opnum
;
1407 rld
[i
].when_needed
= type
;
1408 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1409 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1410 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1411 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1412 rld
[i
].secondary_p
= 0;
1416 #ifdef SECONDARY_MEMORY_NEEDED
1419 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1420 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1421 && SECONDARY_MEMORY_NEEDED (rclass
,
1422 REGNO_REG_CLASS (reg_or_subregno (out
)),
1424 get_secondary_mem (out
, outmode
, opnum
, type
);
1429 /* We are reusing an existing reload,
1430 but we may have additional information for it.
1431 For example, we may now have both IN and OUT
1432 while the old one may have just one of them. */
1434 /* The modes can be different. If they are, we want to reload in
1435 the larger mode, so that the value is valid for both modes. */
1436 if (inmode
!= VOIDmode
1437 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1438 rld
[i
].inmode
= inmode
;
1439 if (outmode
!= VOIDmode
1440 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1441 rld
[i
].outmode
= outmode
;
1444 rtx in_reg
= inloc
? *inloc
: 0;
1445 /* If we merge reloads for two distinct rtl expressions that
1446 are identical in content, there might be duplicate address
1447 reloads. Remove the extra set now, so that if we later find
1448 that we can inherit this reload, we can get rid of the
1449 address reloads altogether.
1451 Do not do this if both reloads are optional since the result
1452 would be an optional reload which could potentially leave
1453 unresolved address replacements.
1455 It is not sufficient to call transfer_replacements since
1456 choose_reload_regs will remove the replacements for address
1457 reloads of inherited reloads which results in the same
1459 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1460 && ! (rld
[i
].optional
&& optional
))
1462 /* We must keep the address reload with the lower operand
1464 if (opnum
> rld
[i
].opnum
)
1466 remove_address_replacements (in
);
1468 in_reg
= rld
[i
].in_reg
;
1471 remove_address_replacements (rld
[i
].in
);
1473 /* When emitting reloads we don't necessarily look at the in-
1474 and outmode, but also directly at the operands (in and out).
1475 So we can't simply overwrite them with whatever we have found
1476 for this (to-be-merged) reload, we have to "merge" that too.
1477 Reusing another reload already verified that we deal with the
1478 same operands, just possibly in different modes. So we
1479 overwrite the operands only when the new mode is larger.
1480 See also PR33613. */
1482 || GET_MODE_SIZE (GET_MODE (in
))
1483 > GET_MODE_SIZE (GET_MODE (rld
[i
].in
)))
1487 && GET_MODE_SIZE (GET_MODE (in_reg
))
1488 > GET_MODE_SIZE (GET_MODE (rld
[i
].in_reg
))))
1489 rld
[i
].in_reg
= in_reg
;
1495 && GET_MODE_SIZE (GET_MODE (out
))
1496 > GET_MODE_SIZE (GET_MODE (rld
[i
].out
))))
1500 || GET_MODE_SIZE (GET_MODE (*outloc
))
1501 > GET_MODE_SIZE (GET_MODE (rld
[i
].out_reg
))))
1502 rld
[i
].out_reg
= *outloc
;
1504 if (reg_class_subset_p (rclass
, rld
[i
].rclass
))
1505 rld
[i
].rclass
= rclass
;
1506 rld
[i
].optional
&= optional
;
1507 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1508 opnum
, rld
[i
].opnum
))
1509 rld
[i
].when_needed
= RELOAD_OTHER
;
1510 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1513 /* If the ostensible rtx being reloaded differs from the rtx found
1514 in the location to substitute, this reload is not safe to combine
1515 because we cannot reliably tell whether it appears in the insn. */
1517 if (in
!= 0 && in
!= *inloc
)
1518 rld
[i
].nocombine
= 1;
1521 /* This was replaced by changes in find_reloads_address_1 and the new
1522 function inc_for_reload, which go with a new meaning of reload_inc. */
1524 /* If this is an IN/OUT reload in an insn that sets the CC,
1525 it must be for an autoincrement. It doesn't work to store
1526 the incremented value after the insn because that would clobber the CC.
1527 So we must do the increment of the value reloaded from,
1528 increment it, store it back, then decrement again. */
1529 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1533 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1534 /* If we did not find a nonzero amount-to-increment-by,
1535 that contradicts the belief that IN is being incremented
1536 in an address in this insn. */
1537 gcc_assert (rld
[i
].inc
!= 0);
1541 /* If we will replace IN and OUT with the reload-reg,
1542 record where they are located so that substitution need
1543 not do a tree walk. */
1545 if (replace_reloads
)
1549 struct replacement
*r
= &replacements
[n_replacements
++];
1554 if (outloc
!= 0 && outloc
!= inloc
)
1556 struct replacement
*r
= &replacements
[n_replacements
++];
1563 /* If this reload is just being introduced and it has both
1564 an incoming quantity and an outgoing quantity that are
1565 supposed to be made to match, see if either one of the two
1566 can serve as the place to reload into.
1568 If one of them is acceptable, set rld[i].reg_rtx
1571 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1573 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1576 earlyclobber_operand_p (out
));
1578 /* If the outgoing register already contains the same value
1579 as the incoming one, we can dispense with loading it.
1580 The easiest way to tell the caller that is to give a phony
1581 value for the incoming operand (same as outgoing one). */
1582 if (rld
[i
].reg_rtx
== out
1583 && (REG_P (in
) || CONSTANT_P (in
))
1584 && 0 != find_equiv_reg (in
, this_insn
, NO_REGS
, REGNO (out
),
1585 static_reload_reg_p
, i
, inmode
))
1589 /* If this is an input reload and the operand contains a register that
1590 dies in this insn and is used nowhere else, see if it is the right class
1591 to be used for this reload. Use it if so. (This occurs most commonly
1592 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1593 this if it is also an output reload that mentions the register unless
1594 the output is a SUBREG that clobbers an entire register.
1596 Note that the operand might be one of the spill regs, if it is a
1597 pseudo reg and we are in a block where spilling has not taken place.
1598 But if there is no spilling in this block, that is OK.
1599 An explicitly used hard reg cannot be a spill reg. */
1601 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1605 enum machine_mode rel_mode
= inmode
;
1607 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1610 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1611 if (REG_NOTE_KIND (note
) == REG_DEAD
1612 && REG_P (XEXP (note
, 0))
1613 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1614 && reg_mentioned_p (XEXP (note
, 0), in
)
1615 /* Check that a former pseudo is valid; see find_dummy_reload. */
1616 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1617 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1618 ORIGINAL_REGNO (XEXP (note
, 0)))
1619 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1))
1620 && ! refers_to_regno_for_reload_p (regno
,
1621 end_hard_regno (rel_mode
,
1623 PATTERN (this_insn
), inloc
)
1624 /* If this is also an output reload, IN cannot be used as
1625 the reload register if it is set in this insn unless IN
1627 && (out
== 0 || in
== out
1628 || ! hard_reg_set_here_p (regno
,
1629 end_hard_regno (rel_mode
, regno
),
1630 PATTERN (this_insn
)))
1631 /* ??? Why is this code so different from the previous?
1632 Is there any simple coherent way to describe the two together?
1633 What's going on here. */
1635 || (GET_CODE (in
) == SUBREG
1636 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1638 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1639 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1640 /* Make sure the operand fits in the reg that dies. */
1641 && (GET_MODE_SIZE (rel_mode
)
1642 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1643 && HARD_REGNO_MODE_OK (regno
, inmode
)
1644 && HARD_REGNO_MODE_OK (regno
, outmode
))
1647 unsigned int nregs
= MAX (hard_regno_nregs
[regno
][inmode
],
1648 hard_regno_nregs
[regno
][outmode
]);
1650 for (offs
= 0; offs
< nregs
; offs
++)
1651 if (fixed_regs
[regno
+ offs
]
1652 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
1657 && (! (refers_to_regno_for_reload_p
1658 (regno
, end_hard_regno (inmode
, regno
), in
, (rtx
*) 0))
1659 || can_reload_into (in
, regno
, inmode
)))
1661 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1668 output_reloadnum
= i
;
1673 /* Record an additional place we must replace a value
1674 for which we have already recorded a reload.
1675 RELOADNUM is the value returned by push_reload
1676 when the reload was recorded.
1677 This is used in insn patterns that use match_dup. */
1680 push_replacement (rtx
*loc
, int reloadnum
, enum machine_mode mode
)
1682 if (replace_reloads
)
1684 struct replacement
*r
= &replacements
[n_replacements
++];
1685 r
->what
= reloadnum
;
1691 /* Duplicate any replacement we have recorded to apply at
1692 location ORIG_LOC to also be performed at DUP_LOC.
1693 This is used in insn patterns that use match_dup. */
1696 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1698 int i
, n
= n_replacements
;
1700 for (i
= 0; i
< n
; i
++)
1702 struct replacement
*r
= &replacements
[i
];
1703 if (r
->where
== orig_loc
)
1704 push_replacement (dup_loc
, r
->what
, r
->mode
);
1708 /* Transfer all replacements that used to be in reload FROM to be in
1712 transfer_replacements (int to
, int from
)
1716 for (i
= 0; i
< n_replacements
; i
++)
1717 if (replacements
[i
].what
== from
)
1718 replacements
[i
].what
= to
;
1721 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1722 or a subpart of it. If we have any replacements registered for IN_RTX,
1723 cancel the reloads that were supposed to load them.
1724 Return nonzero if we canceled any reloads. */
1726 remove_address_replacements (rtx in_rtx
)
1729 char reload_flags
[MAX_RELOADS
];
1730 int something_changed
= 0;
1732 memset (reload_flags
, 0, sizeof reload_flags
);
1733 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1735 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1736 reload_flags
[replacements
[i
].what
] |= 1;
1739 replacements
[j
++] = replacements
[i
];
1740 reload_flags
[replacements
[i
].what
] |= 2;
1743 /* Note that the following store must be done before the recursive calls. */
1746 for (i
= n_reloads
- 1; i
>= 0; i
--)
1748 if (reload_flags
[i
] == 1)
1750 deallocate_reload_reg (i
);
1751 remove_address_replacements (rld
[i
].in
);
1753 something_changed
= 1;
1756 return something_changed
;
1759 /* If there is only one output reload, and it is not for an earlyclobber
1760 operand, try to combine it with a (logically unrelated) input reload
1761 to reduce the number of reload registers needed.
1763 This is safe if the input reload does not appear in
1764 the value being output-reloaded, because this implies
1765 it is not needed any more once the original insn completes.
1767 If that doesn't work, see we can use any of the registers that
1768 die in this insn as a reload register. We can if it is of the right
1769 class and does not appear in the value being output-reloaded. */
1772 combine_reloads (void)
1775 int output_reload
= -1;
1776 int secondary_out
= -1;
1779 /* Find the output reload; return unless there is exactly one
1780 and that one is mandatory. */
1782 for (i
= 0; i
< n_reloads
; i
++)
1783 if (rld
[i
].out
!= 0)
1785 if (output_reload
>= 0)
1790 if (output_reload
< 0 || rld
[output_reload
].optional
)
1793 /* An input-output reload isn't combinable. */
1795 if (rld
[output_reload
].in
!= 0)
1798 /* If this reload is for an earlyclobber operand, we can't do anything. */
1799 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1802 /* If there is a reload for part of the address of this operand, we would
1803 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1804 its life to the point where doing this combine would not lower the
1805 number of spill registers needed. */
1806 for (i
= 0; i
< n_reloads
; i
++)
1807 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1808 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1809 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1812 /* Check each input reload; can we combine it? */
1814 for (i
= 0; i
< n_reloads
; i
++)
1815 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1816 /* Life span of this reload must not extend past main insn. */
1817 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1818 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1819 && rld
[i
].when_needed
!= RELOAD_OTHER
1820 && (ira_reg_class_max_nregs
[(int)rld
[i
].rclass
][(int) rld
[i
].inmode
]
1821 == ira_reg_class_max_nregs
[(int) rld
[output_reload
].rclass
]
1822 [(int) rld
[output_reload
].outmode
])
1824 && rld
[i
].reg_rtx
== 0
1825 #ifdef SECONDARY_MEMORY_NEEDED
1826 /* Don't combine two reloads with different secondary
1827 memory locations. */
1828 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1829 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1830 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1831 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1833 && (targetm
.small_register_classes_for_mode_p (VOIDmode
)
1834 ? (rld
[i
].rclass
== rld
[output_reload
].rclass
)
1835 : (reg_class_subset_p (rld
[i
].rclass
,
1836 rld
[output_reload
].rclass
)
1837 || reg_class_subset_p (rld
[output_reload
].rclass
,
1839 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1840 /* Args reversed because the first arg seems to be
1841 the one that we imagine being modified
1842 while the second is the one that might be affected. */
1843 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1845 /* However, if the input is a register that appears inside
1846 the output, then we also can't share.
1847 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1848 If the same reload reg is used for both reg 69 and the
1849 result to be stored in memory, then that result
1850 will clobber the address of the memory ref. */
1851 && ! (REG_P (rld
[i
].in
)
1852 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1853 rld
[output_reload
].out
))))
1854 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1855 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1856 && (reg_class_size
[(int) rld
[i
].rclass
]
1857 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
1858 /* We will allow making things slightly worse by combining an
1859 input and an output, but no worse than that. */
1860 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1861 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1865 /* We have found a reload to combine with! */
1866 rld
[i
].out
= rld
[output_reload
].out
;
1867 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1868 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1869 /* Mark the old output reload as inoperative. */
1870 rld
[output_reload
].out
= 0;
1871 /* The combined reload is needed for the entire insn. */
1872 rld
[i
].when_needed
= RELOAD_OTHER
;
1873 /* If the output reload had a secondary reload, copy it. */
1874 if (rld
[output_reload
].secondary_out_reload
!= -1)
1876 rld
[i
].secondary_out_reload
1877 = rld
[output_reload
].secondary_out_reload
;
1878 rld
[i
].secondary_out_icode
1879 = rld
[output_reload
].secondary_out_icode
;
1882 #ifdef SECONDARY_MEMORY_NEEDED
1883 /* Copy any secondary MEM. */
1884 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1885 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1886 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1888 /* If required, minimize the register class. */
1889 if (reg_class_subset_p (rld
[output_reload
].rclass
,
1891 rld
[i
].rclass
= rld
[output_reload
].rclass
;
1893 /* Transfer all replacements from the old reload to the combined. */
1894 for (j
= 0; j
< n_replacements
; j
++)
1895 if (replacements
[j
].what
== output_reload
)
1896 replacements
[j
].what
= i
;
1901 /* If this insn has only one operand that is modified or written (assumed
1902 to be the first), it must be the one corresponding to this reload. It
1903 is safe to use anything that dies in this insn for that output provided
1904 that it does not occur in the output (we already know it isn't an
1905 earlyclobber. If this is an asm insn, give up. */
1907 if (INSN_CODE (this_insn
) == -1)
1910 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1911 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1912 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1915 /* See if some hard register that dies in this insn and is not used in
1916 the output is the right class. Only works if the register we pick
1917 up can fully hold our output reload. */
1918 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1919 if (REG_NOTE_KIND (note
) == REG_DEAD
1920 && REG_P (XEXP (note
, 0))
1921 && !reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1922 rld
[output_reload
].out
)
1923 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1924 && HARD_REGNO_MODE_OK (regno
, rld
[output_reload
].outmode
)
1925 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].rclass
],
1927 && (hard_regno_nregs
[regno
][rld
[output_reload
].outmode
]
1928 <= hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))])
1929 /* Ensure that a secondary or tertiary reload for this output
1930 won't want this register. */
1931 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1932 || (!(TEST_HARD_REG_BIT
1933 (reg_class_contents
[(int) rld
[secondary_out
].rclass
], regno
))
1934 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1935 || !(TEST_HARD_REG_BIT
1936 (reg_class_contents
[(int) rld
[secondary_out
].rclass
],
1938 && !fixed_regs
[regno
]
1939 /* Check that a former pseudo is valid; see find_dummy_reload. */
1940 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1941 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1942 ORIGINAL_REGNO (XEXP (note
, 0)))
1943 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1)))
1945 rld
[output_reload
].reg_rtx
1946 = gen_rtx_REG (rld
[output_reload
].outmode
, regno
);
1951 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1952 See if one of IN and OUT is a register that may be used;
1953 this is desirable since a spill-register won't be needed.
1954 If so, return the register rtx that proves acceptable.
1956 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1957 RCLASS is the register class required for the reload.
1959 If FOR_REAL is >= 0, it is the number of the reload,
1960 and in some cases when it can be discovered that OUT doesn't need
1961 to be computed, clear out rld[FOR_REAL].out.
1963 If FOR_REAL is -1, this should not be done, because this call
1964 is just to see if a register can be found, not to find and install it.
1966 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1967 puts an additional constraint on being able to use IN for OUT since
1968 IN must not appear elsewhere in the insn (it is assumed that IN itself
1969 is safe from the earlyclobber). */
1972 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1973 enum machine_mode inmode
, enum machine_mode outmode
,
1974 reg_class_t rclass
, int for_real
, int earlyclobber
)
1982 /* If operands exceed a word, we can't use either of them
1983 unless they have the same size. */
1984 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1985 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1986 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1989 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1990 respectively refers to a hard register. */
1992 /* Find the inside of any subregs. */
1993 while (GET_CODE (out
) == SUBREG
)
1995 if (REG_P (SUBREG_REG (out
))
1996 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1997 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1998 GET_MODE (SUBREG_REG (out
)),
2001 out
= SUBREG_REG (out
);
2003 while (GET_CODE (in
) == SUBREG
)
2005 if (REG_P (SUBREG_REG (in
))
2006 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
2007 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
2008 GET_MODE (SUBREG_REG (in
)),
2011 in
= SUBREG_REG (in
);
2014 /* Narrow down the reg class, the same way push_reload will;
2015 otherwise we might find a dummy now, but push_reload won't. */
2017 reg_class_t preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
2018 if (preferred_class
!= NO_REGS
)
2019 rclass
= (enum reg_class
) preferred_class
;
2022 /* See if OUT will do. */
2024 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
2026 unsigned int regno
= REGNO (out
) + out_offset
;
2027 unsigned int nwords
= hard_regno_nregs
[regno
][outmode
];
2030 /* When we consider whether the insn uses OUT,
2031 ignore references within IN. They don't prevent us
2032 from copying IN into OUT, because those refs would
2033 move into the insn that reloads IN.
2035 However, we only ignore IN in its role as this reload.
2036 If the insn uses IN elsewhere and it contains OUT,
2037 that counts. We can't be sure it's the "same" operand
2038 so it might not go through this reload.
2040 We also need to avoid using OUT if it, or part of it, is a
2041 fixed register. Modifying such registers, even transiently,
2042 may have undefined effects on the machine, such as modifying
2043 the stack pointer. */
2045 *inloc
= const0_rtx
;
2047 if (regno
< FIRST_PSEUDO_REGISTER
2048 && HARD_REGNO_MODE_OK (regno
, outmode
)
2049 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2050 PATTERN (this_insn
), outloc
))
2054 for (i
= 0; i
< nwords
; i
++)
2055 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2057 || fixed_regs
[regno
+ i
])
2062 if (REG_P (real_out
))
2065 value
= gen_rtx_REG (outmode
, regno
);
2072 /* Consider using IN if OUT was not acceptable
2073 or if OUT dies in this insn (like the quotient in a divmod insn).
2074 We can't use IN unless it is dies in this insn,
2075 which means we must know accurately which hard regs are live.
2076 Also, the result can't go in IN if IN is used within OUT,
2077 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2078 if (hard_regs_live_known
2080 && REGNO (in
) < FIRST_PSEUDO_REGISTER
2082 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
2083 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
2084 && !fixed_regs
[REGNO (in
)]
2085 && HARD_REGNO_MODE_OK (REGNO (in
),
2086 /* The only case where out and real_out might
2087 have different modes is where real_out
2088 is a subreg, and in that case, out
2090 (GET_MODE (out
) != VOIDmode
2091 ? GET_MODE (out
) : outmode
))
2092 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
2093 /* However only do this if we can be sure that this input
2094 operand doesn't correspond with an uninitialized pseudo.
2095 global can assign some hardreg to it that is the same as
2096 the one assigned to a different, also live pseudo (as it
2097 can ignore the conflict). We must never introduce writes
2098 to such hardregs, as they would clobber the other live
2099 pseudo. See PR 20973. */
2100 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
2101 ORIGINAL_REGNO (in
))
2102 /* Similarly, only do this if we can be sure that the death
2103 note is still valid. global can assign some hardreg to
2104 the pseudo referenced in the note and simultaneously a
2105 subword of this hardreg to a different, also live pseudo,
2106 because only another subword of the hardreg is actually
2107 used in the insn. This cannot happen if the pseudo has
2108 been assigned exactly one hardreg. See PR 33732. */
2109 && hard_regno_nregs
[REGNO (in
)][GET_MODE (in
)] == 1)))
2111 unsigned int regno
= REGNO (in
) + in_offset
;
2112 unsigned int nwords
= hard_regno_nregs
[regno
][inmode
];
2114 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2115 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2116 PATTERN (this_insn
))
2118 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2119 PATTERN (this_insn
), inloc
)))
2123 for (i
= 0; i
< nwords
; i
++)
2124 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2130 /* If we were going to use OUT as the reload reg
2131 and changed our mind, it means OUT is a dummy that
2132 dies here. So don't bother copying value to it. */
2133 if (for_real
>= 0 && value
== real_out
)
2134 rld
[for_real
].out
= 0;
2135 if (REG_P (real_in
))
2138 value
= gen_rtx_REG (inmode
, regno
);
2146 /* This page contains subroutines used mainly for determining
2147 whether the IN or an OUT of a reload can serve as the
2150 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2153 earlyclobber_operand_p (rtx x
)
2157 for (i
= 0; i
< n_earlyclobbers
; i
++)
2158 if (reload_earlyclobbers
[i
] == x
)
2164 /* Return 1 if expression X alters a hard reg in the range
2165 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2166 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2167 X should be the body of an instruction. */
2170 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2172 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2174 rtx op0
= SET_DEST (x
);
2176 while (GET_CODE (op0
) == SUBREG
)
2177 op0
= SUBREG_REG (op0
);
2180 unsigned int r
= REGNO (op0
);
2182 /* See if this reg overlaps range under consideration. */
2184 && end_hard_regno (GET_MODE (op0
), r
) > beg_regno
)
2188 else if (GET_CODE (x
) == PARALLEL
)
2190 int i
= XVECLEN (x
, 0) - 1;
2193 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2200 /* Return 1 if ADDR is a valid memory address for mode MODE
2201 in address space AS, and check that each pseudo reg has the
2202 proper kind of hard reg. */
2205 strict_memory_address_addr_space_p (enum machine_mode mode ATTRIBUTE_UNUSED
,
2206 rtx addr
, addr_space_t as
)
2208 #ifdef GO_IF_LEGITIMATE_ADDRESS
2209 gcc_assert (ADDR_SPACE_GENERIC_P (as
));
2210 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2216 return targetm
.addr_space
.legitimate_address_p (mode
, addr
, 1, as
);
2220 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2221 if they are the same hard reg, and has special hacks for
2222 autoincrement and autodecrement.
2223 This is specifically intended for find_reloads to use
2224 in determining whether two operands match.
2225 X is the operand whose number is the lower of the two.
2227 The value is 2 if Y contains a pre-increment that matches
2228 a non-incrementing address in X. */
2230 /* ??? To be completely correct, we should arrange to pass
2231 for X the output operand and for Y the input operand.
2232 For now, we assume that the output operand has the lower number
2233 because that is natural in (SET output (... input ...)). */
2236 operands_match_p (rtx x
, rtx y
)
2239 RTX_CODE code
= GET_CODE (x
);
2245 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2246 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2247 && REG_P (SUBREG_REG (y
)))))
2253 i
= REGNO (SUBREG_REG (x
));
2254 if (i
>= FIRST_PSEUDO_REGISTER
)
2256 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2257 GET_MODE (SUBREG_REG (x
)),
2264 if (GET_CODE (y
) == SUBREG
)
2266 j
= REGNO (SUBREG_REG (y
));
2267 if (j
>= FIRST_PSEUDO_REGISTER
)
2269 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2270 GET_MODE (SUBREG_REG (y
)),
2277 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2278 multiple hard register group of scalar integer registers, so that
2279 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2281 if (REG_WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2282 && SCALAR_INT_MODE_P (GET_MODE (x
))
2283 && i
< FIRST_PSEUDO_REGISTER
)
2284 i
+= hard_regno_nregs
[i
][GET_MODE (x
)] - 1;
2285 if (REG_WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2286 && SCALAR_INT_MODE_P (GET_MODE (y
))
2287 && j
< FIRST_PSEUDO_REGISTER
)
2288 j
+= hard_regno_nregs
[j
][GET_MODE (y
)] - 1;
2292 /* If two operands must match, because they are really a single
2293 operand of an assembler insn, then two postincrements are invalid
2294 because the assembler insn would increment only once.
2295 On the other hand, a postincrement matches ordinary indexing
2296 if the postincrement is the output operand. */
2297 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2298 return operands_match_p (XEXP (x
, 0), y
);
2299 /* Two preincrements are invalid
2300 because the assembler insn would increment only once.
2301 On the other hand, a preincrement matches ordinary indexing
2302 if the preincrement is the input operand.
2303 In this case, return 2, since some callers need to do special
2304 things when this happens. */
2305 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2306 || GET_CODE (y
) == PRE_MODIFY
)
2307 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2311 /* Now we have disposed of all the cases in which different rtx codes
2313 if (code
!= GET_CODE (y
))
2316 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2317 if (GET_MODE (x
) != GET_MODE (y
))
2320 /* MEMs referring to different address space are not equivalent. */
2321 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2330 return XEXP (x
, 0) == XEXP (y
, 0);
2332 return XSTR (x
, 0) == XSTR (y
, 0);
2338 /* Compare the elements. If any pair of corresponding elements
2339 fail to match, return 0 for the whole things. */
2342 fmt
= GET_RTX_FORMAT (code
);
2343 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2349 if (XWINT (x
, i
) != XWINT (y
, i
))
2354 if (XINT (x
, i
) != XINT (y
, i
))
2359 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2362 /* If any subexpression returns 2,
2363 we should return 2 if we are successful. */
2372 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2374 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2376 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2384 /* It is believed that rtx's at this level will never
2385 contain anything but integers and other rtx's,
2386 except for within LABEL_REFs and SYMBOL_REFs. */
2391 return 1 + success_2
;
2394 /* Describe the range of registers or memory referenced by X.
2395 If X is a register, set REG_FLAG and put the first register
2396 number into START and the last plus one into END.
2397 If X is a memory reference, put a base address into BASE
2398 and a range of integer offsets into START and END.
2399 If X is pushing on the stack, we can assume it causes no trouble,
2400 so we set the SAFE field. */
2402 static struct decomposition
2405 struct decomposition val
;
2408 memset (&val
, 0, sizeof (val
));
2410 switch (GET_CODE (x
))
2414 rtx base
= NULL_RTX
, offset
= 0;
2415 rtx addr
= XEXP (x
, 0);
2417 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2418 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2420 val
.base
= XEXP (addr
, 0);
2421 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2422 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2423 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2427 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2429 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2430 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2431 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2433 val
.base
= XEXP (addr
, 0);
2434 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2435 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2436 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2441 if (GET_CODE (addr
) == CONST
)
2443 addr
= XEXP (addr
, 0);
2446 if (GET_CODE (addr
) == PLUS
)
2448 if (CONSTANT_P (XEXP (addr
, 0)))
2450 base
= XEXP (addr
, 1);
2451 offset
= XEXP (addr
, 0);
2453 else if (CONSTANT_P (XEXP (addr
, 1)))
2455 base
= XEXP (addr
, 0);
2456 offset
= XEXP (addr
, 1);
2463 offset
= const0_rtx
;
2465 if (GET_CODE (offset
) == CONST
)
2466 offset
= XEXP (offset
, 0);
2467 if (GET_CODE (offset
) == PLUS
)
2469 if (CONST_INT_P (XEXP (offset
, 0)))
2471 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2472 offset
= XEXP (offset
, 0);
2474 else if (CONST_INT_P (XEXP (offset
, 1)))
2476 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2477 offset
= XEXP (offset
, 1);
2481 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2482 offset
= const0_rtx
;
2485 else if (!CONST_INT_P (offset
))
2487 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2488 offset
= const0_rtx
;
2491 if (all_const
&& GET_CODE (base
) == PLUS
)
2492 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2494 gcc_assert (CONST_INT_P (offset
));
2496 val
.start
= INTVAL (offset
);
2497 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2504 val
.start
= true_regnum (x
);
2505 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2507 /* A pseudo with no hard reg. */
2508 val
.start
= REGNO (x
);
2509 val
.end
= val
.start
+ 1;
2513 val
.end
= end_hard_regno (GET_MODE (x
), val
.start
);
2517 if (!REG_P (SUBREG_REG (x
)))
2518 /* This could be more precise, but it's good enough. */
2519 return decompose (SUBREG_REG (x
));
2521 val
.start
= true_regnum (x
);
2522 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2523 return decompose (SUBREG_REG (x
));
2526 val
.end
= val
.start
+ subreg_nregs (x
);
2530 /* This hasn't been assigned yet, so it can't conflict yet. */
2535 gcc_assert (CONSTANT_P (x
));
2542 /* Return 1 if altering Y will not modify the value of X.
2543 Y is also described by YDATA, which should be decompose (Y). */
2546 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2548 struct decomposition xdata
;
2551 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2555 gcc_assert (MEM_P (y
));
2556 /* If Y is memory and X is not, Y can't affect X. */
2560 xdata
= decompose (x
);
2562 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2564 /* If bases are distinct symbolic constants, there is no overlap. */
2565 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2567 /* Constants and stack slots never overlap. */
2568 if (CONSTANT_P (xdata
.base
)
2569 && (ydata
.base
== frame_pointer_rtx
2570 || ydata
.base
== hard_frame_pointer_rtx
2571 || ydata
.base
== stack_pointer_rtx
))
2573 if (CONSTANT_P (ydata
.base
)
2574 && (xdata
.base
== frame_pointer_rtx
2575 || xdata
.base
== hard_frame_pointer_rtx
2576 || xdata
.base
== stack_pointer_rtx
))
2578 /* If either base is variable, we don't know anything. */
2582 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2585 /* Similar, but calls decompose. */
2588 safe_from_earlyclobber (rtx op
, rtx clobber
)
2590 struct decomposition early_data
;
2592 early_data
= decompose (clobber
);
2593 return immune_p (op
, clobber
, early_data
);
2596 /* Main entry point of this file: search the body of INSN
2597 for values that need reloading and record them with push_reload.
2598 REPLACE nonzero means record also where the values occur
2599 so that subst_reloads can be used.
2601 IND_LEVELS says how many levels of indirection are supported by this
2602 machine; a value of zero means that a memory reference is not a valid
2605 LIVE_KNOWN says we have valid information about which hard
2606 regs are live at each point in the program; this is true when
2607 we are called from global_alloc but false when stupid register
2608 allocation has been done.
2610 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2611 which is nonnegative if the reg has been commandeered for reloading into.
2612 It is copied into STATIC_RELOAD_REG_P and referenced from there
2613 by various subroutines.
2615 Return TRUE if some operands need to be changed, because of swapping
2616 commutative operands, reg_equiv_address substitution, or whatever. */
2619 find_reloads (rtx insn
, int replace
, int ind_levels
, int live_known
,
2620 short *reload_reg_p
)
2622 int insn_code_number
;
2625 /* These start out as the constraints for the insn
2626 and they are chewed up as we consider alternatives. */
2627 const char *constraints
[MAX_RECOG_OPERANDS
];
2628 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2630 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2631 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2632 /* Nonzero for a MEM operand whose entire address needs a reload.
2633 May be -1 to indicate the entire address may or may not need a reload. */
2634 int address_reloaded
[MAX_RECOG_OPERANDS
];
2635 /* Nonzero for an address operand that needs to be completely reloaded.
2636 May be -1 to indicate the entire operand may or may not need a reload. */
2637 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2638 /* Value of enum reload_type to use for operand. */
2639 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2640 /* Value of enum reload_type to use within address of operand. */
2641 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2642 /* Save the usage of each operand. */
2643 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2644 int no_input_reloads
= 0, no_output_reloads
= 0;
2646 reg_class_t this_alternative
[MAX_RECOG_OPERANDS
];
2647 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2648 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2649 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2650 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2651 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2652 reg_class_t goal_alternative
[MAX_RECOG_OPERANDS
];
2653 int this_alternative_number
;
2654 int goal_alternative_number
= 0;
2655 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2656 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2657 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2658 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2659 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2660 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2661 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2662 int goal_alternative_swapped
;
2665 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2666 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2667 rtx body
= PATTERN (insn
);
2668 rtx set
= single_set (insn
);
2669 int goal_earlyclobber
= 0, this_earlyclobber
;
2670 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2676 n_earlyclobbers
= 0;
2677 replace_reloads
= replace
;
2678 hard_regs_live_known
= live_known
;
2679 static_reload_reg_p
= reload_reg_p
;
2681 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2682 neither are insns that SET cc0. Insns that use CC0 are not allowed
2683 to have any input reloads. */
2684 if (JUMP_P (insn
) || CALL_P (insn
))
2685 no_output_reloads
= 1;
2688 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2689 no_input_reloads
= 1;
2690 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2691 no_output_reloads
= 1;
2694 #ifdef SECONDARY_MEMORY_NEEDED
2695 /* The eliminated forms of any secondary memory locations are per-insn, so
2696 clear them out here. */
2698 if (secondary_memlocs_elim_used
)
2700 memset (secondary_memlocs_elim
, 0,
2701 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2702 secondary_memlocs_elim_used
= 0;
2706 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2707 is cheap to move between them. If it is not, there may not be an insn
2708 to do the copy, so we may need a reload. */
2709 if (GET_CODE (body
) == SET
2710 && REG_P (SET_DEST (body
))
2711 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2712 && REG_P (SET_SRC (body
))
2713 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2714 && register_move_cost (GET_MODE (SET_SRC (body
)),
2715 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2716 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2719 extract_insn (insn
);
2721 noperands
= reload_n_operands
= recog_data
.n_operands
;
2722 n_alternatives
= recog_data
.n_alternatives
;
2724 /* Just return "no reloads" if insn has no operands with constraints. */
2725 if (noperands
== 0 || n_alternatives
== 0)
2728 insn_code_number
= INSN_CODE (insn
);
2729 this_insn_is_asm
= insn_code_number
< 0;
2731 memcpy (operand_mode
, recog_data
.operand_mode
,
2732 noperands
* sizeof (enum machine_mode
));
2733 memcpy (constraints
, recog_data
.constraints
,
2734 noperands
* sizeof (const char *));
2738 /* If we will need to know, later, whether some pair of operands
2739 are the same, we must compare them now and save the result.
2740 Reloading the base and index registers will clobber them
2741 and afterward they will fail to match. */
2743 for (i
= 0; i
< noperands
; i
++)
2749 substed_operand
[i
] = recog_data
.operand
[i
];
2752 modified
[i
] = RELOAD_READ
;
2754 /* Scan this operand's constraint to see if it is an output operand,
2755 an in-out operand, is commutative, or should match another. */
2759 p
+= CONSTRAINT_LEN (c
, p
);
2763 modified
[i
] = RELOAD_WRITE
;
2766 modified
[i
] = RELOAD_READ_WRITE
;
2770 /* The last operand should not be marked commutative. */
2771 gcc_assert (i
!= noperands
- 1);
2773 /* We currently only support one commutative pair of
2774 operands. Some existing asm code currently uses more
2775 than one pair. Previously, that would usually work,
2776 but sometimes it would crash the compiler. We
2777 continue supporting that case as well as we can by
2778 silently ignoring all but the first pair. In the
2779 future we may handle it correctly. */
2780 if (commutative
< 0)
2783 gcc_assert (this_insn_is_asm
);
2786 /* Use of ISDIGIT is tempting here, but it may get expensive because
2787 of locale support we don't want. */
2788 case '0': case '1': case '2': case '3': case '4':
2789 case '5': case '6': case '7': case '8': case '9':
2791 c
= strtoul (p
- 1, &end
, 10);
2794 operands_match
[c
][i
]
2795 = operands_match_p (recog_data
.operand
[c
],
2796 recog_data
.operand
[i
]);
2798 /* An operand may not match itself. */
2799 gcc_assert (c
!= i
);
2801 /* If C can be commuted with C+1, and C might need to match I,
2802 then C+1 might also need to match I. */
2803 if (commutative
>= 0)
2805 if (c
== commutative
|| c
== commutative
+ 1)
2807 int other
= c
+ (c
== commutative
? 1 : -1);
2808 operands_match
[other
][i
]
2809 = operands_match_p (recog_data
.operand
[other
],
2810 recog_data
.operand
[i
]);
2812 if (i
== commutative
|| i
== commutative
+ 1)
2814 int other
= i
+ (i
== commutative
? 1 : -1);
2815 operands_match
[c
][other
]
2816 = operands_match_p (recog_data
.operand
[c
],
2817 recog_data
.operand
[other
]);
2819 /* Note that C is supposed to be less than I.
2820 No need to consider altering both C and I because in
2821 that case we would alter one into the other. */
2828 /* Examine each operand that is a memory reference or memory address
2829 and reload parts of the addresses into index registers.
2830 Also here any references to pseudo regs that didn't get hard regs
2831 but are equivalent to constants get replaced in the insn itself
2832 with those constants. Nobody will ever see them again.
2834 Finally, set up the preferred classes of each operand. */
2836 for (i
= 0; i
< noperands
; i
++)
2838 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2840 address_reloaded
[i
] = 0;
2841 address_operand_reloaded
[i
] = 0;
2842 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2843 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2846 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2847 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2850 if (*constraints
[i
] == 0)
2851 /* Ignore things like match_operator operands. */
2853 else if (constraints
[i
][0] == 'p'
2854 || (insn_extra_address_constraint
2855 (lookup_constraint (constraints
[i
]))))
2857 address_operand_reloaded
[i
]
2858 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2859 recog_data
.operand
[i
],
2860 recog_data
.operand_loc
[i
],
2861 i
, operand_type
[i
], ind_levels
, insn
);
2863 /* If we now have a simple operand where we used to have a
2864 PLUS or MULT, re-recognize and try again. */
2865 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2866 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2867 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2868 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2870 INSN_CODE (insn
) = -1;
2871 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2876 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2877 substed_operand
[i
] = recog_data
.operand
[i
];
2879 /* Address operands are reloaded in their existing mode,
2880 no matter what is specified in the machine description. */
2881 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2883 /* If the address is a single CONST_INT pick address mode
2884 instead otherwise we will later not know in which mode
2885 the reload should be performed. */
2886 if (operand_mode
[i
] == VOIDmode
)
2887 operand_mode
[i
] = Pmode
;
2890 else if (code
== MEM
)
2893 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2894 recog_data
.operand_loc
[i
],
2895 XEXP (recog_data
.operand
[i
], 0),
2896 &XEXP (recog_data
.operand
[i
], 0),
2897 i
, address_type
[i
], ind_levels
, insn
);
2898 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2899 substed_operand
[i
] = recog_data
.operand
[i
];
2901 else if (code
== SUBREG
)
2903 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2905 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2908 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2910 &address_reloaded
[i
]);
2912 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2913 that didn't get a hard register, emit a USE with a REG_EQUAL
2914 note in front so that we might inherit a previous, possibly
2920 && (GET_MODE_SIZE (GET_MODE (reg
))
2921 >= GET_MODE_SIZE (GET_MODE (op
)))
2922 && reg_equiv_constant (REGNO (reg
)) == 0)
2923 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2925 REG_EQUAL
, reg_equiv_memory_loc (REGNO (reg
)));
2927 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2929 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2930 /* We can get a PLUS as an "operand" as a result of register
2931 elimination. See eliminate_regs and gen_reload. We handle
2932 a unary operator by reloading the operand. */
2933 substed_operand
[i
] = recog_data
.operand
[i
]
2934 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2935 ind_levels
, 0, insn
,
2936 &address_reloaded
[i
]);
2937 else if (code
== REG
)
2939 /* This is equivalent to calling find_reloads_toplev.
2940 The code is duplicated for speed.
2941 When we find a pseudo always equivalent to a constant,
2942 we replace it by the constant. We must be sure, however,
2943 that we don't try to replace it in the insn in which it
2945 int regno
= REGNO (recog_data
.operand
[i
]);
2946 if (reg_equiv_constant (regno
) != 0
2947 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2949 /* Record the existing mode so that the check if constants are
2950 allowed will work when operand_mode isn't specified. */
2952 if (operand_mode
[i
] == VOIDmode
)
2953 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2955 substed_operand
[i
] = recog_data
.operand
[i
]
2956 = reg_equiv_constant (regno
);
2958 if (reg_equiv_memory_loc (regno
) != 0
2959 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
2960 /* We need not give a valid is_set_dest argument since the case
2961 of a constant equivalence was checked above. */
2962 substed_operand
[i
] = recog_data
.operand
[i
]
2963 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2964 ind_levels
, 0, insn
,
2965 &address_reloaded
[i
]);
2967 /* If the operand is still a register (we didn't replace it with an
2968 equivalent), get the preferred class to reload it into. */
2969 code
= GET_CODE (recog_data
.operand
[i
]);
2971 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2972 >= FIRST_PSEUDO_REGISTER
)
2973 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2977 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2978 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2981 /* If this is simply a copy from operand 1 to operand 0, merge the
2982 preferred classes for the operands. */
2983 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2984 && recog_data
.operand
[1] == SET_SRC (set
))
2986 preferred_class
[0] = preferred_class
[1]
2987 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2988 pref_or_nothing
[0] |= pref_or_nothing
[1];
2989 pref_or_nothing
[1] |= pref_or_nothing
[0];
2992 /* Now see what we need for pseudo-regs that didn't get hard regs
2993 or got the wrong kind of hard reg. For this, we must consider
2994 all the operands together against the register constraints. */
2996 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2998 goal_alternative_swapped
= 0;
3000 /* The constraints are made of several alternatives.
3001 Each operand's constraint looks like foo,bar,... with commas
3002 separating the alternatives. The first alternatives for all
3003 operands go together, the second alternatives go together, etc.
3005 First loop over alternatives. */
3007 for (this_alternative_number
= 0;
3008 this_alternative_number
< n_alternatives
;
3009 this_alternative_number
++)
3013 if (!TEST_BIT (recog_data
.enabled_alternatives
, this_alternative_number
))
3017 for (i
= 0; i
< recog_data
.n_operands
; i
++)
3018 constraints
[i
] = skip_alternative (constraints
[i
]);
3023 /* If insn is commutative (it's safe to exchange a certain pair
3024 of operands) then we need to try each alternative twice, the
3025 second time matching those two operands as if we had
3026 exchanged them. To do this, really exchange them in
3028 for (swapped
= 0; swapped
< (commutative
>= 0 ? 2 : 1); swapped
++)
3030 /* Loop over operands for one constraint alternative. */
3031 /* LOSERS counts those that don't fit this alternative
3032 and would require loading. */
3034 /* BAD is set to 1 if it some operand can't fit this alternative
3035 even after reloading. */
3037 /* REJECT is a count of how undesirable this alternative says it is
3038 if any reloading is required. If the alternative matches exactly
3039 then REJECT is ignored, but otherwise it gets this much
3040 counted against it in addition to the reloading needed. Each
3041 ? counts three times here since we want the disparaging caused by
3042 a bad register class to only count 1/3 as much. */
3047 enum reg_class tclass
;
3050 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3051 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3052 /* Swap the duplicates too. */
3053 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3054 if (recog_data
.dup_num
[i
] == commutative
3055 || recog_data
.dup_num
[i
] == commutative
+ 1)
3056 *recog_data
.dup_loc
[i
]
3057 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3059 tclass
= preferred_class
[commutative
];
3060 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3061 preferred_class
[commutative
+ 1] = tclass
;
3063 t
= pref_or_nothing
[commutative
];
3064 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3065 pref_or_nothing
[commutative
+ 1] = t
;
3067 t
= address_reloaded
[commutative
];
3068 address_reloaded
[commutative
] = address_reloaded
[commutative
+ 1];
3069 address_reloaded
[commutative
+ 1] = t
;
3072 this_earlyclobber
= 0;
3074 for (i
= 0; i
< noperands
; i
++)
3076 const char *p
= constraints
[i
];
3081 /* 0 => this operand can be reloaded somehow for this alternative. */
3083 /* 0 => this operand can be reloaded if the alternative allows regs. */
3087 rtx operand
= recog_data
.operand
[i
];
3089 /* Nonzero means this is a MEM that must be reloaded into a reg
3090 regardless of what the constraint says. */
3091 int force_reload
= 0;
3093 /* Nonzero if a constant forced into memory would be OK for this
3096 int earlyclobber
= 0;
3097 enum constraint_num cn
;
3100 /* If the predicate accepts a unary operator, it means that
3101 we need to reload the operand, but do not do this for
3102 match_operator and friends. */
3103 if (UNARY_P (operand
) && *p
!= 0)
3104 operand
= XEXP (operand
, 0);
3106 /* If the operand is a SUBREG, extract
3107 the REG or MEM (or maybe even a constant) within.
3108 (Constants can occur as a result of reg_equiv_constant.) */
3110 while (GET_CODE (operand
) == SUBREG
)
3112 /* Offset only matters when operand is a REG and
3113 it is a hard reg. This is because it is passed
3114 to reg_fits_class_p if it is a REG and all pseudos
3115 return 0 from that function. */
3116 if (REG_P (SUBREG_REG (operand
))
3117 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
3119 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand
)),
3120 GET_MODE (SUBREG_REG (operand
)),
3121 SUBREG_BYTE (operand
),
3122 GET_MODE (operand
)) < 0)
3124 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
3125 GET_MODE (SUBREG_REG (operand
)),
3126 SUBREG_BYTE (operand
),
3127 GET_MODE (operand
));
3129 operand
= SUBREG_REG (operand
);
3130 /* Force reload if this is a constant or PLUS or if there may
3131 be a problem accessing OPERAND in the outer mode. */
3132 if (CONSTANT_P (operand
)
3133 || GET_CODE (operand
) == PLUS
3134 /* We must force a reload of paradoxical SUBREGs
3135 of a MEM because the alignment of the inner value
3136 may not be enough to do the outer reference. On
3137 big-endian machines, it may also reference outside
3140 On machines that extend byte operations and we have a
3141 SUBREG where both the inner and outer modes are no wider
3142 than a word and the inner mode is narrower, is integral,
3143 and gets extended when loaded from memory, combine.c has
3144 made assumptions about the behavior of the machine in such
3145 register access. If the data is, in fact, in memory we
3146 must always load using the size assumed to be in the
3147 register and let the insn do the different-sized
3150 This is doubly true if WORD_REGISTER_OPERATIONS. In
3151 this case eliminate_regs has left non-paradoxical
3152 subregs for push_reload to see. Make sure it does
3153 by forcing the reload.
3155 ??? When is it right at this stage to have a subreg
3156 of a mem that is _not_ to be handled specially? IMO
3157 those should have been reduced to just a mem. */
3158 || ((MEM_P (operand
)
3160 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3161 #ifndef WORD_REGISTER_OPERATIONS
3162 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
3163 < BIGGEST_ALIGNMENT
)
3164 && (GET_MODE_SIZE (operand_mode
[i
])
3165 > GET_MODE_SIZE (GET_MODE (operand
))))
3167 #ifdef LOAD_EXTEND_OP
3168 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3169 && (GET_MODE_SIZE (GET_MODE (operand
))
3171 && (GET_MODE_SIZE (operand_mode
[i
])
3172 > GET_MODE_SIZE (GET_MODE (operand
)))
3173 && INTEGRAL_MODE_P (GET_MODE (operand
))
3174 && LOAD_EXTEND_OP (GET_MODE (operand
)) != UNKNOWN
)
3183 this_alternative
[i
] = NO_REGS
;
3184 this_alternative_win
[i
] = 0;
3185 this_alternative_match_win
[i
] = 0;
3186 this_alternative_offmemok
[i
] = 0;
3187 this_alternative_earlyclobber
[i
] = 0;
3188 this_alternative_matches
[i
] = -1;
3190 /* An empty constraint or empty alternative
3191 allows anything which matched the pattern. */
3192 if (*p
== 0 || *p
== ',')
3195 /* Scan this alternative's specs for this operand;
3196 set WIN if the operand fits any letter in this alternative.
3197 Otherwise, clear BADOP if this operand could
3198 fit some letter after reloads,
3199 or set WINREG if this operand could fit after reloads
3200 provided the constraint allows some registers. */
3203 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3212 case '=': case '+': case '*':
3216 /* We only support one commutative marker, the first
3217 one. We already set commutative above. */
3229 /* Ignore rest of this alternative as far as
3230 reloading is concerned. */
3233 while (*p
&& *p
!= ',');
3237 case '0': case '1': case '2': case '3': case '4':
3238 case '5': case '6': case '7': case '8': case '9':
3239 m
= strtoul (p
, &end
, 10);
3243 this_alternative_matches
[i
] = m
;
3244 /* We are supposed to match a previous operand.
3245 If we do, we win if that one did.
3246 If we do not, count both of the operands as losers.
3247 (This is too conservative, since most of the time
3248 only a single reload insn will be needed to make
3249 the two operands win. As a result, this alternative
3250 may be rejected when it is actually desirable.) */
3251 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3252 /* If we are matching as if two operands were swapped,
3253 also pretend that operands_match had been computed
3255 But if I is the second of those and C is the first,
3256 don't exchange them, because operands_match is valid
3257 only on one side of its diagonal. */
3259 [(m
== commutative
|| m
== commutative
+ 1)
3260 ? 2 * commutative
+ 1 - m
: m
]
3261 [(i
== commutative
|| i
== commutative
+ 1)
3262 ? 2 * commutative
+ 1 - i
: i
])
3263 : operands_match
[m
][i
])
3265 /* If we are matching a non-offsettable address where an
3266 offsettable address was expected, then we must reject
3267 this combination, because we can't reload it. */
3268 if (this_alternative_offmemok
[m
]
3269 && MEM_P (recog_data
.operand
[m
])
3270 && this_alternative
[m
] == NO_REGS
3271 && ! this_alternative_win
[m
])
3274 did_match
= this_alternative_win
[m
];
3278 /* Operands don't match. */
3281 /* Retroactively mark the operand we had to match
3282 as a loser, if it wasn't already. */
3283 if (this_alternative_win
[m
])
3285 this_alternative_win
[m
] = 0;
3286 if (this_alternative
[m
] == NO_REGS
)
3288 /* But count the pair only once in the total badness of
3289 this alternative, if the pair can be a dummy reload.
3290 The pointers in operand_loc are not swapped; swap
3291 them by hand if necessary. */
3292 if (swapped
&& i
== commutative
)
3293 loc1
= commutative
+ 1;
3294 else if (swapped
&& i
== commutative
+ 1)
3298 if (swapped
&& m
== commutative
)
3299 loc2
= commutative
+ 1;
3300 else if (swapped
&& m
== commutative
+ 1)
3305 = find_dummy_reload (recog_data
.operand
[i
],
3306 recog_data
.operand
[m
],
3307 recog_data
.operand_loc
[loc1
],
3308 recog_data
.operand_loc
[loc2
],
3309 operand_mode
[i
], operand_mode
[m
],
3310 this_alternative
[m
], -1,
3311 this_alternative_earlyclobber
[m
]);
3316 /* This can be fixed with reloads if the operand
3317 we are supposed to match can be fixed with reloads. */
3319 this_alternative
[i
] = this_alternative
[m
];
3321 /* If we have to reload this operand and some previous
3322 operand also had to match the same thing as this
3323 operand, we don't know how to do that. So reject this
3325 if (! did_match
|| force_reload
)
3326 for (j
= 0; j
< i
; j
++)
3327 if (this_alternative_matches
[j
]
3328 == this_alternative_matches
[i
])
3336 /* All necessary reloads for an address_operand
3337 were handled in find_reloads_address. */
3339 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3345 case TARGET_MEM_CONSTRAINT
:
3350 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3351 && reg_renumber
[REGNO (operand
)] < 0))
3353 if (CONST_POOL_OK_P (operand_mode
[i
], operand
))
3360 && ! address_reloaded
[i
]
3361 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3362 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3368 && ! address_reloaded
[i
]
3369 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3370 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3374 /* Memory operand whose address is not offsettable. */
3379 && ! (ind_levels
? offsettable_memref_p (operand
)
3380 : offsettable_nonstrict_memref_p (operand
))
3381 /* Certain mem addresses will become offsettable
3382 after they themselves are reloaded. This is important;
3383 we don't want our own handling of unoffsettables
3384 to override the handling of reg_equiv_address. */
3385 && !(REG_P (XEXP (operand
, 0))
3387 || reg_equiv_address (REGNO (XEXP (operand
, 0))) != 0)))
3391 /* Memory operand whose address is offsettable. */
3395 if ((MEM_P (operand
)
3396 /* If IND_LEVELS, find_reloads_address won't reload a
3397 pseudo that didn't get a hard reg, so we have to
3398 reject that case. */
3399 && ((ind_levels
? offsettable_memref_p (operand
)
3400 : offsettable_nonstrict_memref_p (operand
))
3401 /* A reloaded address is offsettable because it is now
3402 just a simple register indirect. */
3403 || address_reloaded
[i
] == 1))
3405 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3406 && reg_renumber
[REGNO (operand
)] < 0
3407 /* If reg_equiv_address is nonzero, we will be
3408 loading it into a register; hence it will be
3409 offsettable, but we cannot say that reg_equiv_mem
3410 is offsettable without checking. */
3411 && ((reg_equiv_mem (REGNO (operand
)) != 0
3412 && offsettable_memref_p (reg_equiv_mem (REGNO (operand
))))
3413 || (reg_equiv_address (REGNO (operand
)) != 0))))
3415 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3423 /* Output operand that is stored before the need for the
3424 input operands (and their index registers) is over. */
3425 earlyclobber
= 1, this_earlyclobber
= 1;
3430 if (CONST_DOUBLE_AS_FLOAT_P (operand
)
3431 || (GET_CODE (operand
) == CONST_VECTOR
3432 && (GET_MODE_CLASS (GET_MODE (operand
))
3433 == MODE_VECTOR_FLOAT
)))
3439 if (CONST_DOUBLE_AS_FLOAT_P (operand
)
3440 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand
, c
, p
))
3445 if (CONST_SCALAR_INT_P (operand
))
3448 if (CONSTANT_P (operand
)
3449 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
)))
3454 if (CONST_SCALAR_INT_P (operand
))
3466 if (CONST_INT_P (operand
)
3467 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand
), c
, p
))
3478 /* A PLUS is never a valid operand, but reload can make
3479 it from a register when eliminating registers. */
3480 && GET_CODE (operand
) != PLUS
3481 /* A SCRATCH is not a valid operand. */
3482 && GET_CODE (operand
) != SCRATCH
3483 && (! CONSTANT_P (operand
)
3485 || LEGITIMATE_PIC_OPERAND_P (operand
))
3486 && (GENERAL_REGS
== ALL_REGS
3488 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3489 && reg_renumber
[REGNO (operand
)] < 0)))
3491 /* Drop through into 'r' case. */
3498 cn
= lookup_constraint (p
);
3499 switch (get_constraint_type (cn
))
3502 cl
= reg_class_for_constraint (cn
);
3510 if (constraint_satisfied_p (operand
, cn
))
3512 /* If the address was already reloaded,
3514 else if (MEM_P (operand
) && address_reloaded
[i
] == 1)
3516 /* Likewise if the address will be reloaded because
3517 reg_equiv_address is nonzero. For reg_equiv_mem
3518 we have to check. */
3519 else if (REG_P (operand
)
3520 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3521 && reg_renumber
[REGNO (operand
)] < 0
3522 && ((reg_equiv_mem (REGNO (operand
)) != 0
3523 && (constraint_satisfied_p
3524 (reg_equiv_mem (REGNO (operand
)),
3526 || (reg_equiv_address (REGNO (operand
))
3530 /* If we didn't already win, we can reload
3531 constants via force_const_mem, and other
3532 MEMs by reloading the address like for 'o'. */
3533 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3541 if (constraint_satisfied_p (operand
, cn
))
3544 /* If we didn't already win, we can reload
3545 the address into a base register. */
3547 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3553 if (constraint_satisfied_p (operand
, cn
))
3561 = reg_class_subunion
[this_alternative
[i
]][cl
];
3562 if (GET_MODE (operand
) == BLKmode
)
3566 && reg_fits_class_p (operand
, this_alternative
[i
],
3567 offset
, GET_MODE (recog_data
.operand
[i
])))
3571 while ((p
+= len
), c
);
3573 if (swapped
== (commutative
>= 0 ? 1 : 0))
3576 /* If this operand could be handled with a reg,
3577 and some reg is allowed, then this operand can be handled. */
3578 if (winreg
&& this_alternative
[i
] != NO_REGS
3579 && (win
|| !class_only_fixed_regs
[this_alternative
[i
]]))
3582 /* Record which operands fit this alternative. */
3583 this_alternative_earlyclobber
[i
] = earlyclobber
;
3584 if (win
&& ! force_reload
)
3585 this_alternative_win
[i
] = 1;
3586 else if (did_match
&& ! force_reload
)
3587 this_alternative_match_win
[i
] = 1;
3590 int const_to_mem
= 0;
3592 this_alternative_offmemok
[i
] = offmemok
;
3596 /* Alternative loses if it has no regs for a reg operand. */
3598 && this_alternative
[i
] == NO_REGS
3599 && this_alternative_matches
[i
] < 0)
3602 /* If this is a constant that is reloaded into the desired
3603 class by copying it to memory first, count that as another
3604 reload. This is consistent with other code and is
3605 required to avoid choosing another alternative when
3606 the constant is moved into memory by this function on
3607 an early reload pass. Note that the test here is
3608 precisely the same as in the code below that calls
3610 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3611 && ((targetm
.preferred_reload_class (operand
,
3612 this_alternative
[i
])
3614 || no_input_reloads
))
3617 if (this_alternative
[i
] != NO_REGS
)
3621 /* Alternative loses if it requires a type of reload not
3622 permitted for this insn. We can always reload SCRATCH
3623 and objects with a REG_UNUSED note. */
3624 if (GET_CODE (operand
) != SCRATCH
3625 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3626 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3628 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3632 /* If we can't reload this value at all, reject this
3633 alternative. Note that we could also lose due to
3634 LIMIT_RELOAD_CLASS, but we don't check that
3637 if (! CONSTANT_P (operand
) && this_alternative
[i
] != NO_REGS
)
3639 if (targetm
.preferred_reload_class (operand
,
3640 this_alternative
[i
])
3644 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3645 && (targetm
.preferred_output_reload_class (operand
,
3646 this_alternative
[i
])
3651 /* We prefer to reload pseudos over reloading other things,
3652 since such reloads may be able to be eliminated later.
3653 If we are reloading a SCRATCH, we won't be generating any
3654 insns, just using a register, so it is also preferred.
3655 So bump REJECT in other cases. Don't do this in the
3656 case where we are forcing a constant into memory and
3657 it will then win since we don't want to have a different
3658 alternative match then. */
3659 if (! (REG_P (operand
)
3660 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3661 && GET_CODE (operand
) != SCRATCH
3662 && ! (const_to_mem
&& constmemok
))
3665 /* Input reloads can be inherited more often than output
3666 reloads can be removed, so penalize output reloads. */
3667 if (operand_type
[i
] != RELOAD_FOR_INPUT
3668 && GET_CODE (operand
) != SCRATCH
)
3672 /* If this operand is a pseudo register that didn't get
3673 a hard reg and this alternative accepts some
3674 register, see if the class that we want is a subset
3675 of the preferred class for this register. If not,
3676 but it intersects that class, use the preferred class
3677 instead. If it does not intersect the preferred
3678 class, show that usage of this alternative should be
3679 discouraged; it will be discouraged more still if the
3680 register is `preferred or nothing'. We do this
3681 because it increases the chance of reusing our spill
3682 register in a later insn and avoiding a pair of
3683 memory stores and loads.
3685 Don't bother with this if this alternative will
3686 accept this operand.
3688 Don't do this for a multiword operand, since it is
3689 only a small win and has the risk of requiring more
3690 spill registers, which could cause a large loss.
3692 Don't do this if the preferred class has only one
3693 register because we might otherwise exhaust the
3696 if (! win
&& ! did_match
3697 && this_alternative
[i
] != NO_REGS
3698 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3699 && reg_class_size
[(int) preferred_class
[i
]] > 0
3700 && ! small_register_class_p (preferred_class
[i
]))
3702 if (! reg_class_subset_p (this_alternative
[i
],
3703 preferred_class
[i
]))
3705 /* Since we don't have a way of forming the intersection,
3706 we just do something special if the preferred class
3707 is a subset of the class we have; that's the most
3708 common case anyway. */
3709 if (reg_class_subset_p (preferred_class
[i
],
3710 this_alternative
[i
]))
3711 this_alternative
[i
] = preferred_class
[i
];
3713 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3718 /* Now see if any output operands that are marked "earlyclobber"
3719 in this alternative conflict with any input operands
3720 or any memory addresses. */
3722 for (i
= 0; i
< noperands
; i
++)
3723 if (this_alternative_earlyclobber
[i
]
3724 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3726 struct decomposition early_data
;
3728 early_data
= decompose (recog_data
.operand
[i
]);
3730 gcc_assert (modified
[i
] != RELOAD_READ
);
3732 if (this_alternative
[i
] == NO_REGS
)
3734 this_alternative_earlyclobber
[i
] = 0;
3735 gcc_assert (this_insn_is_asm
);
3736 error_for_asm (this_insn
,
3737 "%<&%> constraint used with no register class");
3740 for (j
= 0; j
< noperands
; j
++)
3741 /* Is this an input operand or a memory ref? */
3742 if ((MEM_P (recog_data
.operand
[j
])
3743 || modified
[j
] != RELOAD_WRITE
)
3745 /* Ignore things like match_operator operands. */
3746 && !recog_data
.is_operator
[j
]
3747 /* Don't count an input operand that is constrained to match
3748 the early clobber operand. */
3749 && ! (this_alternative_matches
[j
] == i
3750 && rtx_equal_p (recog_data
.operand
[i
],
3751 recog_data
.operand
[j
]))
3752 /* Is it altered by storing the earlyclobber operand? */
3753 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3756 /* If the output is in a non-empty few-regs class,
3757 it's costly to reload it, so reload the input instead. */
3758 if (small_register_class_p (this_alternative
[i
])
3759 && (REG_P (recog_data
.operand
[j
])
3760 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3763 this_alternative_win
[j
] = 0;
3764 this_alternative_match_win
[j
] = 0;
3769 /* If an earlyclobber operand conflicts with something,
3770 it must be reloaded, so request this and count the cost. */
3774 this_alternative_win
[i
] = 0;
3775 this_alternative_match_win
[j
] = 0;
3776 for (j
= 0; j
< noperands
; j
++)
3777 if (this_alternative_matches
[j
] == i
3778 && this_alternative_match_win
[j
])
3780 this_alternative_win
[j
] = 0;
3781 this_alternative_match_win
[j
] = 0;
3787 /* If one alternative accepts all the operands, no reload required,
3788 choose that alternative; don't consider the remaining ones. */
3791 /* Unswap these so that they are never swapped at `finish'. */
3794 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3795 recog_data
.operand
[commutative
+ 1]
3796 = substed_operand
[commutative
+ 1];
3798 for (i
= 0; i
< noperands
; i
++)
3800 goal_alternative_win
[i
] = this_alternative_win
[i
];
3801 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3802 goal_alternative
[i
] = this_alternative
[i
];
3803 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3804 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3805 goal_alternative_earlyclobber
[i
]
3806 = this_alternative_earlyclobber
[i
];
3808 goal_alternative_number
= this_alternative_number
;
3809 goal_alternative_swapped
= swapped
;
3810 goal_earlyclobber
= this_earlyclobber
;
3814 /* REJECT, set by the ! and ? constraint characters and when a register
3815 would be reloaded into a non-preferred class, discourages the use of
3816 this alternative for a reload goal. REJECT is incremented by six
3817 for each ? and two for each non-preferred class. */
3818 losers
= losers
* 6 + reject
;
3820 /* If this alternative can be made to work by reloading,
3821 and it needs less reloading than the others checked so far,
3822 record it as the chosen goal for reloading. */
3827 for (i
= 0; i
< noperands
; i
++)
3829 goal_alternative
[i
] = this_alternative
[i
];
3830 goal_alternative_win
[i
] = this_alternative_win
[i
];
3831 goal_alternative_match_win
[i
]
3832 = this_alternative_match_win
[i
];
3833 goal_alternative_offmemok
[i
]
3834 = this_alternative_offmemok
[i
];
3835 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3836 goal_alternative_earlyclobber
[i
]
3837 = this_alternative_earlyclobber
[i
];
3839 goal_alternative_swapped
= swapped
;
3841 goal_alternative_number
= this_alternative_number
;
3842 goal_earlyclobber
= this_earlyclobber
;
3848 enum reg_class tclass
;
3851 /* If the commutative operands have been swapped, swap
3852 them back in order to check the next alternative. */
3853 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3854 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3855 /* Unswap the duplicates too. */
3856 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3857 if (recog_data
.dup_num
[i
] == commutative
3858 || recog_data
.dup_num
[i
] == commutative
+ 1)
3859 *recog_data
.dup_loc
[i
]
3860 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3862 /* Unswap the operand related information as well. */
3863 tclass
= preferred_class
[commutative
];
3864 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3865 preferred_class
[commutative
+ 1] = tclass
;
3867 t
= pref_or_nothing
[commutative
];
3868 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3869 pref_or_nothing
[commutative
+ 1] = t
;
3871 t
= address_reloaded
[commutative
];
3872 address_reloaded
[commutative
] = address_reloaded
[commutative
+ 1];
3873 address_reloaded
[commutative
+ 1] = t
;
3878 /* The operands don't meet the constraints.
3879 goal_alternative describes the alternative
3880 that we could reach by reloading the fewest operands.
3881 Reload so as to fit it. */
3883 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3885 /* No alternative works with reloads?? */
3886 if (insn_code_number
>= 0)
3887 fatal_insn ("unable to generate reloads for:", insn
);
3888 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3889 /* Avoid further trouble with this insn. */
3890 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3895 /* Jump to `finish' from above if all operands are valid already.
3896 In that case, goal_alternative_win is all 1. */
3899 /* Right now, for any pair of operands I and J that are required to match,
3901 goal_alternative_matches[J] is I.
3902 Set up goal_alternative_matched as the inverse function:
3903 goal_alternative_matched[I] = J. */
3905 for (i
= 0; i
< noperands
; i
++)
3906 goal_alternative_matched
[i
] = -1;
3908 for (i
= 0; i
< noperands
; i
++)
3909 if (! goal_alternative_win
[i
]
3910 && goal_alternative_matches
[i
] >= 0)
3911 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3913 for (i
= 0; i
< noperands
; i
++)
3914 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3916 /* If the best alternative is with operands 1 and 2 swapped,
3917 consider them swapped before reporting the reloads. Update the
3918 operand numbers of any reloads already pushed. */
3920 if (goal_alternative_swapped
)
3924 tem
= substed_operand
[commutative
];
3925 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3926 substed_operand
[commutative
+ 1] = tem
;
3927 tem
= recog_data
.operand
[commutative
];
3928 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3929 recog_data
.operand
[commutative
+ 1] = tem
;
3930 tem
= *recog_data
.operand_loc
[commutative
];
3931 *recog_data
.operand_loc
[commutative
]
3932 = *recog_data
.operand_loc
[commutative
+ 1];
3933 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3935 for (i
= 0; i
< n_reloads
; i
++)
3937 if (rld
[i
].opnum
== commutative
)
3938 rld
[i
].opnum
= commutative
+ 1;
3939 else if (rld
[i
].opnum
== commutative
+ 1)
3940 rld
[i
].opnum
= commutative
;
3944 for (i
= 0; i
< noperands
; i
++)
3946 operand_reloadnum
[i
] = -1;
3948 /* If this is an earlyclobber operand, we need to widen the scope.
3949 The reload must remain valid from the start of the insn being
3950 reloaded until after the operand is stored into its destination.
3951 We approximate this with RELOAD_OTHER even though we know that we
3952 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3954 One special case that is worth checking is when we have an
3955 output that is earlyclobber but isn't used past the insn (typically
3956 a SCRATCH). In this case, we only need have the reload live
3957 through the insn itself, but not for any of our input or output
3959 But we must not accidentally narrow the scope of an existing
3960 RELOAD_OTHER reload - leave these alone.
3962 In any case, anything needed to address this operand can remain
3963 however they were previously categorized. */
3965 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3967 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3968 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3971 /* Any constants that aren't allowed and can't be reloaded
3972 into registers are here changed into memory references. */
3973 for (i
= 0; i
< noperands
; i
++)
3974 if (! goal_alternative_win
[i
])
3976 rtx op
= recog_data
.operand
[i
];
3977 rtx subreg
= NULL_RTX
;
3978 rtx plus
= NULL_RTX
;
3979 enum machine_mode mode
= operand_mode
[i
];
3981 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3982 push_reload so we have to let them pass here. */
3983 if (GET_CODE (op
) == SUBREG
)
3986 op
= SUBREG_REG (op
);
3987 mode
= GET_MODE (op
);
3990 if (GET_CODE (op
) == PLUS
)
3996 if (CONST_POOL_OK_P (mode
, op
)
3997 && ((targetm
.preferred_reload_class (op
, goal_alternative
[i
])
3999 || no_input_reloads
))
4001 int this_address_reloaded
;
4002 rtx tem
= force_const_mem (mode
, op
);
4004 /* If we stripped a SUBREG or a PLUS above add it back. */
4005 if (plus
!= NULL_RTX
)
4006 tem
= gen_rtx_PLUS (mode
, XEXP (plus
, 0), tem
);
4008 if (subreg
!= NULL_RTX
)
4009 tem
= gen_rtx_SUBREG (operand_mode
[i
], tem
, SUBREG_BYTE (subreg
));
4011 this_address_reloaded
= 0;
4012 substed_operand
[i
] = recog_data
.operand
[i
]
4013 = find_reloads_toplev (tem
, i
, address_type
[i
], ind_levels
,
4014 0, insn
, &this_address_reloaded
);
4016 /* If the alternative accepts constant pool refs directly
4017 there will be no reload needed at all. */
4018 if (plus
== NULL_RTX
4019 && subreg
== NULL_RTX
4020 && alternative_allows_const_pool_ref (this_address_reloaded
== 0
4021 ? substed_operand
[i
]
4023 recog_data
.constraints
[i
],
4024 goal_alternative_number
))
4025 goal_alternative_win
[i
] = 1;
4029 /* Record the values of the earlyclobber operands for the caller. */
4030 if (goal_earlyclobber
)
4031 for (i
= 0; i
< noperands
; i
++)
4032 if (goal_alternative_earlyclobber
[i
])
4033 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
4035 /* Now record reloads for all the operands that need them. */
4036 for (i
= 0; i
< noperands
; i
++)
4037 if (! goal_alternative_win
[i
])
4039 /* Operands that match previous ones have already been handled. */
4040 if (goal_alternative_matches
[i
] >= 0)
4042 /* Handle an operand with a nonoffsettable address
4043 appearing where an offsettable address will do
4044 by reloading the address into a base register.
4046 ??? We can also do this when the operand is a register and
4047 reg_equiv_mem is not offsettable, but this is a bit tricky,
4048 so we don't bother with it. It may not be worth doing. */
4049 else if (goal_alternative_matched
[i
] == -1
4050 && goal_alternative_offmemok
[i
]
4051 && MEM_P (recog_data
.operand
[i
]))
4053 /* If the address to be reloaded is a VOIDmode constant,
4054 use the default address mode as mode of the reload register,
4055 as would have been done by find_reloads_address. */
4056 addr_space_t as
= MEM_ADDR_SPACE (recog_data
.operand
[i
]);
4057 enum machine_mode address_mode
;
4059 address_mode
= get_address_mode (recog_data
.operand
[i
]);
4060 operand_reloadnum
[i
]
4061 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
4062 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
4063 base_reg_class (VOIDmode
, as
, MEM
, SCRATCH
),
4065 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
4066 rld
[operand_reloadnum
[i
]].inc
4067 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
4069 /* If this operand is an output, we will have made any
4070 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4071 now we are treating part of the operand as an input, so
4072 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
4074 if (modified
[i
] == RELOAD_WRITE
)
4076 for (j
= 0; j
< n_reloads
; j
++)
4078 if (rld
[j
].opnum
== i
)
4080 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
4081 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
4082 else if (rld
[j
].when_needed
4083 == RELOAD_FOR_OUTADDR_ADDRESS
)
4084 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
4089 else if (goal_alternative_matched
[i
] == -1)
4091 operand_reloadnum
[i
]
4092 = push_reload ((modified
[i
] != RELOAD_WRITE
4093 ? recog_data
.operand
[i
] : 0),
4094 (modified
[i
] != RELOAD_READ
4095 ? recog_data
.operand
[i
] : 0),
4096 (modified
[i
] != RELOAD_WRITE
4097 ? recog_data
.operand_loc
[i
] : 0),
4098 (modified
[i
] != RELOAD_READ
4099 ? recog_data
.operand_loc
[i
] : 0),
4100 (enum reg_class
) goal_alternative
[i
],
4101 (modified
[i
] == RELOAD_WRITE
4102 ? VOIDmode
: operand_mode
[i
]),
4103 (modified
[i
] == RELOAD_READ
4104 ? VOIDmode
: operand_mode
[i
]),
4105 (insn_code_number
< 0 ? 0
4106 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4107 0, i
, operand_type
[i
]);
4109 /* In a matching pair of operands, one must be input only
4110 and the other must be output only.
4111 Pass the input operand as IN and the other as OUT. */
4112 else if (modified
[i
] == RELOAD_READ
4113 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
4115 operand_reloadnum
[i
]
4116 = push_reload (recog_data
.operand
[i
],
4117 recog_data
.operand
[goal_alternative_matched
[i
]],
4118 recog_data
.operand_loc
[i
],
4119 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4120 (enum reg_class
) goal_alternative
[i
],
4122 operand_mode
[goal_alternative_matched
[i
]],
4123 0, 0, i
, RELOAD_OTHER
);
4124 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
4126 else if (modified
[i
] == RELOAD_WRITE
4127 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
4129 operand_reloadnum
[goal_alternative_matched
[i
]]
4130 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
4131 recog_data
.operand
[i
],
4132 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4133 recog_data
.operand_loc
[i
],
4134 (enum reg_class
) goal_alternative
[i
],
4135 operand_mode
[goal_alternative_matched
[i
]],
4137 0, 0, i
, RELOAD_OTHER
);
4138 operand_reloadnum
[i
] = output_reloadnum
;
4142 gcc_assert (insn_code_number
< 0);
4143 error_for_asm (insn
, "inconsistent operand constraints "
4145 /* Avoid further trouble with this insn. */
4146 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
4151 else if (goal_alternative_matched
[i
] < 0
4152 && goal_alternative_matches
[i
] < 0
4153 && address_operand_reloaded
[i
] != 1
4156 /* For each non-matching operand that's a MEM or a pseudo-register
4157 that didn't get a hard register, make an optional reload.
4158 This may get done even if the insn needs no reloads otherwise. */
4160 rtx operand
= recog_data
.operand
[i
];
4162 while (GET_CODE (operand
) == SUBREG
)
4163 operand
= SUBREG_REG (operand
);
4164 if ((MEM_P (operand
)
4166 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4167 /* If this is only for an output, the optional reload would not
4168 actually cause us to use a register now, just note that
4169 something is stored here. */
4170 && (goal_alternative
[i
] != NO_REGS
4171 || modified
[i
] == RELOAD_WRITE
)
4172 && ! no_input_reloads
4173 /* An optional output reload might allow to delete INSN later.
4174 We mustn't make in-out reloads on insns that are not permitted
4176 If this is an asm, we can't delete it; we must not even call
4177 push_reload for an optional output reload in this case,
4178 because we can't be sure that the constraint allows a register,
4179 and push_reload verifies the constraints for asms. */
4180 && (modified
[i
] == RELOAD_READ
4181 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4182 operand_reloadnum
[i
]
4183 = push_reload ((modified
[i
] != RELOAD_WRITE
4184 ? recog_data
.operand
[i
] : 0),
4185 (modified
[i
] != RELOAD_READ
4186 ? recog_data
.operand
[i
] : 0),
4187 (modified
[i
] != RELOAD_WRITE
4188 ? recog_data
.operand_loc
[i
] : 0),
4189 (modified
[i
] != RELOAD_READ
4190 ? recog_data
.operand_loc
[i
] : 0),
4191 (enum reg_class
) goal_alternative
[i
],
4192 (modified
[i
] == RELOAD_WRITE
4193 ? VOIDmode
: operand_mode
[i
]),
4194 (modified
[i
] == RELOAD_READ
4195 ? VOIDmode
: operand_mode
[i
]),
4196 (insn_code_number
< 0 ? 0
4197 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4198 1, i
, operand_type
[i
]);
4199 /* If a memory reference remains (either as a MEM or a pseudo that
4200 did not get a hard register), yet we can't make an optional
4201 reload, check if this is actually a pseudo register reference;
4202 we then need to emit a USE and/or a CLOBBER so that reload
4203 inheritance will do the right thing. */
4207 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4208 && reg_renumber
[REGNO (operand
)] < 0)))
4210 operand
= *recog_data
.operand_loc
[i
];
4212 while (GET_CODE (operand
) == SUBREG
)
4213 operand
= SUBREG_REG (operand
);
4214 if (REG_P (operand
))
4216 if (modified
[i
] != RELOAD_WRITE
)
4217 /* We mark the USE with QImode so that we recognize
4218 it as one that can be safely deleted at the end
4220 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4222 if (modified
[i
] != RELOAD_READ
)
4223 emit_insn_after (gen_clobber (operand
), insn
);
4227 else if (goal_alternative_matches
[i
] >= 0
4228 && goal_alternative_win
[goal_alternative_matches
[i
]]
4229 && modified
[i
] == RELOAD_READ
4230 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4231 && ! no_input_reloads
&& ! no_output_reloads
4234 /* Similarly, make an optional reload for a pair of matching
4235 objects that are in MEM or a pseudo that didn't get a hard reg. */
4237 rtx operand
= recog_data
.operand
[i
];
4239 while (GET_CODE (operand
) == SUBREG
)
4240 operand
= SUBREG_REG (operand
);
4241 if ((MEM_P (operand
)
4243 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4244 && (goal_alternative
[goal_alternative_matches
[i
]] != NO_REGS
))
4245 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4246 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4247 recog_data
.operand
[i
],
4248 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4249 recog_data
.operand_loc
[i
],
4250 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4251 operand_mode
[goal_alternative_matches
[i
]],
4253 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4256 /* Perform whatever substitutions on the operands we are supposed
4257 to make due to commutativity or replacement of registers
4258 with equivalent constants or memory slots. */
4260 for (i
= 0; i
< noperands
; i
++)
4262 /* We only do this on the last pass through reload, because it is
4263 possible for some data (like reg_equiv_address) to be changed during
4264 later passes. Moreover, we lose the opportunity to get a useful
4265 reload_{in,out}_reg when we do these replacements. */
4269 rtx substitution
= substed_operand
[i
];
4271 *recog_data
.operand_loc
[i
] = substitution
;
4273 /* If we're replacing an operand with a LABEL_REF, we need to
4274 make sure that there's a REG_LABEL_OPERAND note attached to
4275 this instruction. */
4276 if (GET_CODE (substitution
) == LABEL_REF
4277 && !find_reg_note (insn
, REG_LABEL_OPERAND
,
4278 XEXP (substitution
, 0))
4279 /* For a JUMP_P, if it was a branch target it must have
4280 already been recorded as such. */
4282 || !label_is_jump_target_p (XEXP (substitution
, 0),
4285 add_reg_note (insn
, REG_LABEL_OPERAND
, XEXP (substitution
, 0));
4286 if (LABEL_P (XEXP (substitution
, 0)))
4287 ++LABEL_NUSES (XEXP (substitution
, 0));
4292 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4295 /* If this insn pattern contains any MATCH_DUP's, make sure that
4296 they will be substituted if the operands they match are substituted.
4297 Also do now any substitutions we already did on the operands.
4299 Don't do this if we aren't making replacements because we might be
4300 propagating things allocated by frame pointer elimination into places
4301 it doesn't expect. */
4303 if (insn_code_number
>= 0 && replace
)
4304 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4306 int opno
= recog_data
.dup_num
[i
];
4307 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4308 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4312 /* This loses because reloading of prior insns can invalidate the equivalence
4313 (or at least find_equiv_reg isn't smart enough to find it any more),
4314 causing this insn to need more reload regs than it needed before.
4315 It may be too late to make the reload regs available.
4316 Now this optimization is done safely in choose_reload_regs. */
4318 /* For each reload of a reg into some other class of reg,
4319 search for an existing equivalent reg (same value now) in the right class.
4320 We can use it as long as we don't need to change its contents. */
4321 for (i
= 0; i
< n_reloads
; i
++)
4322 if (rld
[i
].reg_rtx
== 0
4324 && REG_P (rld
[i
].in
)
4328 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].rclass
, -1,
4329 static_reload_reg_p
, 0, rld
[i
].inmode
);
4330 /* Prevent generation of insn to load the value
4331 because the one we found already has the value. */
4333 rld
[i
].in
= rld
[i
].reg_rtx
;
4337 /* If we detected error and replaced asm instruction by USE, forget about the
4339 if (GET_CODE (PATTERN (insn
)) == USE
4340 && CONST_INT_P (XEXP (PATTERN (insn
), 0)))
4343 /* Perhaps an output reload can be combined with another
4344 to reduce needs by one. */
4345 if (!goal_earlyclobber
)
4348 /* If we have a pair of reloads for parts of an address, they are reloading
4349 the same object, the operands themselves were not reloaded, and they
4350 are for two operands that are supposed to match, merge the reloads and
4351 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4353 for (i
= 0; i
< n_reloads
; i
++)
4357 for (j
= i
+ 1; j
< n_reloads
; j
++)
4358 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4359 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4360 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4361 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4362 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4363 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4364 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4365 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4366 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4367 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4368 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4369 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4370 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4371 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4372 || (goal_alternative_matches
[rld
[j
].opnum
]
4375 for (k
= 0; k
< n_replacements
; k
++)
4376 if (replacements
[k
].what
== j
)
4377 replacements
[k
].what
= i
;
4379 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4380 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4381 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4383 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4388 /* Scan all the reloads and update their type.
4389 If a reload is for the address of an operand and we didn't reload
4390 that operand, change the type. Similarly, change the operand number
4391 of a reload when two operands match. If a reload is optional, treat it
4392 as though the operand isn't reloaded.
4394 ??? This latter case is somewhat odd because if we do the optional
4395 reload, it means the object is hanging around. Thus we need only
4396 do the address reload if the optional reload was NOT done.
4398 Change secondary reloads to be the address type of their operand, not
4401 If an operand's reload is now RELOAD_OTHER, change any
4402 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4403 RELOAD_FOR_OTHER_ADDRESS. */
4405 for (i
= 0; i
< n_reloads
; i
++)
4407 if (rld
[i
].secondary_p
4408 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4409 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4411 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4412 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4413 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4414 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4415 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4416 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4418 /* If we have a secondary reload to go along with this reload,
4419 change its type to RELOAD_FOR_OPADDR_ADDR. */
4421 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4422 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4423 && rld
[i
].secondary_in_reload
!= -1)
4425 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4427 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4429 /* If there's a tertiary reload we have to change it also. */
4430 if (secondary_in_reload
> 0
4431 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4432 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4433 = RELOAD_FOR_OPADDR_ADDR
;
4436 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4437 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4438 && rld
[i
].secondary_out_reload
!= -1)
4440 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4442 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4444 /* If there's a tertiary reload we have to change it also. */
4445 if (secondary_out_reload
4446 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4447 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4448 = RELOAD_FOR_OPADDR_ADDR
;
4451 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4452 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4453 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4455 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4458 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4459 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4460 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4461 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4463 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4465 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4466 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4469 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4470 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4471 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4473 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4474 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4475 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4476 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4477 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4478 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4479 This is complicated by the fact that a single operand can have more
4480 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4481 choose_reload_regs without affecting code quality, and cases that
4482 actually fail are extremely rare, so it turns out to be better to fix
4483 the problem here by not generating cases that choose_reload_regs will
4485 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4486 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4488 We can reduce the register pressure by exploiting that a
4489 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4490 does not conflict with any of them, if it is only used for the first of
4491 the RELOAD_FOR_X_ADDRESS reloads. */
4493 int first_op_addr_num
= -2;
4494 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4495 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4496 int need_change
= 0;
4497 /* We use last_op_addr_reload and the contents of the above arrays
4498 first as flags - -2 means no instance encountered, -1 means exactly
4499 one instance encountered.
4500 If more than one instance has been encountered, we store the reload
4501 number of the first reload of the kind in question; reload numbers
4502 are known to be non-negative. */
4503 for (i
= 0; i
< noperands
; i
++)
4504 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4505 for (i
= n_reloads
- 1; i
>= 0; i
--)
4507 switch (rld
[i
].when_needed
)
4509 case RELOAD_FOR_OPERAND_ADDRESS
:
4510 if (++first_op_addr_num
>= 0)
4512 first_op_addr_num
= i
;
4516 case RELOAD_FOR_INPUT_ADDRESS
:
4517 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4519 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4523 case RELOAD_FOR_OUTPUT_ADDRESS
:
4524 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4526 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4537 for (i
= 0; i
< n_reloads
; i
++)
4540 enum reload_type type
;
4542 switch (rld
[i
].when_needed
)
4544 case RELOAD_FOR_OPADDR_ADDR
:
4545 first_num
= first_op_addr_num
;
4546 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4548 case RELOAD_FOR_INPADDR_ADDRESS
:
4549 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4550 type
= RELOAD_FOR_INPUT_ADDRESS
;
4552 case RELOAD_FOR_OUTADDR_ADDRESS
:
4553 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4554 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4561 else if (i
> first_num
)
4562 rld
[i
].when_needed
= type
;
4565 /* Check if the only TYPE reload that uses reload I is
4566 reload FIRST_NUM. */
4567 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4569 if (rld
[j
].when_needed
== type
4570 && (rld
[i
].secondary_p
4571 ? rld
[j
].secondary_in_reload
== i
4572 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4574 rld
[i
].when_needed
= type
;
4583 /* See if we have any reloads that are now allowed to be merged
4584 because we've changed when the reload is needed to
4585 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4586 check for the most common cases. */
4588 for (i
= 0; i
< n_reloads
; i
++)
4589 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4590 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4591 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4592 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4593 for (j
= 0; j
< n_reloads
; j
++)
4594 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4595 && rld
[j
].when_needed
== rld
[i
].when_needed
4596 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4597 && rld
[i
].rclass
== rld
[j
].rclass
4598 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4599 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4601 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4602 transfer_replacements (i
, j
);
4607 /* If we made any reloads for addresses, see if they violate a
4608 "no input reloads" requirement for this insn. But loads that we
4609 do after the insn (such as for output addresses) are fine. */
4610 if (no_input_reloads
)
4611 for (i
= 0; i
< n_reloads
; i
++)
4612 gcc_assert (rld
[i
].in
== 0
4613 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
4614 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
);
4617 /* Compute reload_mode and reload_nregs. */
4618 for (i
= 0; i
< n_reloads
; i
++)
4621 = (rld
[i
].inmode
== VOIDmode
4622 || (GET_MODE_SIZE (rld
[i
].outmode
)
4623 > GET_MODE_SIZE (rld
[i
].inmode
)))
4624 ? rld
[i
].outmode
: rld
[i
].inmode
;
4626 rld
[i
].nregs
= ira_reg_class_max_nregs
[rld
[i
].rclass
][rld
[i
].mode
];
4629 /* Special case a simple move with an input reload and a
4630 destination of a hard reg, if the hard reg is ok, use it. */
4631 for (i
= 0; i
< n_reloads
; i
++)
4632 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4633 && GET_CODE (PATTERN (insn
)) == SET
4634 && REG_P (SET_DEST (PATTERN (insn
)))
4635 && (SET_SRC (PATTERN (insn
)) == rld
[i
].in
4636 || SET_SRC (PATTERN (insn
)) == rld
[i
].in_reg
)
4637 && !elimination_target_reg_p (SET_DEST (PATTERN (insn
))))
4639 rtx dest
= SET_DEST (PATTERN (insn
));
4640 unsigned int regno
= REGNO (dest
);
4642 if (regno
< FIRST_PSEUDO_REGISTER
4643 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
)
4644 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4646 int nr
= hard_regno_nregs
[regno
][rld
[i
].mode
];
4649 for (nri
= 1; nri
< nr
; nri
++)
4650 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
+ nri
))
4657 rld
[i
].reg_rtx
= dest
;
4664 /* Return true if alternative number ALTNUM in constraint-string
4665 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4666 MEM gives the reference if it didn't need any reloads, otherwise it
4670 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED
,
4671 const char *constraint
, int altnum
)
4675 /* Skip alternatives before the one requested. */
4678 while (*constraint
++ != ',')
4682 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4683 If one of them is present, this alternative accepts the result of
4684 passing a constant-pool reference through find_reloads_toplev.
4686 The same is true of extra memory constraints if the address
4687 was reloaded into a register. However, the target may elect
4688 to disallow the original constant address, forcing it to be
4689 reloaded into a register instead. */
4690 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4691 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4693 if (c
== TARGET_MEM_CONSTRAINT
|| c
== 'o')
4695 enum constraint_num cn
= lookup_constraint (constraint
);
4696 if (insn_extra_memory_constraint (cn
)
4697 && (mem
== NULL
|| constraint_satisfied_p (mem
, cn
)))
4703 /* Scan X for memory references and scan the addresses for reloading.
4704 Also checks for references to "constant" regs that we want to eliminate
4705 and replaces them with the values they stand for.
4706 We may alter X destructively if it contains a reference to such.
4707 If X is just a constant reg, we return the equivalent value
4710 IND_LEVELS says how many levels of indirect addressing this machine
4713 OPNUM and TYPE identify the purpose of the reload.
4715 IS_SET_DEST is true if X is the destination of a SET, which is not
4716 appropriate to be replaced by a constant.
4718 INSN, if nonzero, is the insn in which we do the reload. It is used
4719 to determine if we may generate output reloads, and where to put USEs
4720 for pseudos that we have to replace with stack slots.
4722 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4723 result of find_reloads_address. */
4726 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4727 int ind_levels
, int is_set_dest
, rtx insn
,
4728 int *address_reloaded
)
4730 RTX_CODE code
= GET_CODE (x
);
4732 const char *fmt
= GET_RTX_FORMAT (code
);
4738 /* This code is duplicated for speed in find_reloads. */
4739 int regno
= REGNO (x
);
4740 if (reg_equiv_constant (regno
) != 0 && !is_set_dest
)
4741 x
= reg_equiv_constant (regno
);
4743 /* This creates (subreg (mem...)) which would cause an unnecessary
4744 reload of the mem. */
4745 else if (reg_equiv_mem (regno
) != 0)
4746 x
= reg_equiv_mem (regno
);
4748 else if (reg_equiv_memory_loc (regno
)
4749 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
4751 rtx mem
= make_memloc (x
, regno
);
4752 if (reg_equiv_address (regno
)
4753 || ! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
4755 /* If this is not a toplevel operand, find_reloads doesn't see
4756 this substitution. We have to emit a USE of the pseudo so
4757 that delete_output_reload can see it. */
4758 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4759 /* We mark the USE with QImode so that we recognize it
4760 as one that can be safely deleted at the end of
4762 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4765 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4766 opnum
, type
, ind_levels
, insn
);
4767 if (!rtx_equal_p (x
, mem
))
4768 push_reg_equiv_alt_mem (regno
, x
);
4769 if (address_reloaded
)
4770 *address_reloaded
= i
;
4779 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4780 opnum
, type
, ind_levels
, insn
);
4781 if (address_reloaded
)
4782 *address_reloaded
= i
;
4787 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4789 /* Check for SUBREG containing a REG that's equivalent to a
4790 constant. If the constant has a known value, truncate it
4791 right now. Similarly if we are extracting a single-word of a
4792 multi-word constant. If the constant is symbolic, allow it
4793 to be substituted normally. push_reload will strip the
4794 subreg later. The constant must not be VOIDmode, because we
4795 will lose the mode of the register (this should never happen
4796 because one of the cases above should handle it). */
4798 int regno
= REGNO (SUBREG_REG (x
));
4801 if (regno
>= FIRST_PSEUDO_REGISTER
4802 && reg_renumber
[regno
] < 0
4803 && reg_equiv_constant (regno
) != 0)
4806 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant (regno
),
4807 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4809 if (CONSTANT_P (tem
)
4810 && !targetm
.legitimate_constant_p (GET_MODE (x
), tem
))
4812 tem
= force_const_mem (GET_MODE (x
), tem
);
4813 i
= find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4814 &XEXP (tem
, 0), opnum
, type
,
4816 if (address_reloaded
)
4817 *address_reloaded
= i
;
4822 /* If the subreg contains a reg that will be converted to a mem,
4823 attempt to convert the whole subreg to a (narrower or wider)
4824 memory reference instead. If this succeeds, we're done --
4825 otherwise fall through to check whether the inner reg still
4826 needs address reloads anyway. */
4828 if (regno
>= FIRST_PSEUDO_REGISTER
4829 && reg_equiv_memory_loc (regno
) != 0)
4831 tem
= find_reloads_subreg_address (x
, opnum
, type
, ind_levels
,
4832 insn
, address_reloaded
);
4838 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4842 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4843 ind_levels
, is_set_dest
, insn
,
4845 /* If we have replaced a reg with it's equivalent memory loc -
4846 that can still be handled here e.g. if it's in a paradoxical
4847 subreg - we must make the change in a copy, rather than using
4848 a destructive change. This way, find_reloads can still elect
4849 not to do the change. */
4850 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4852 x
= shallow_copy_rtx (x
);
4855 XEXP (x
, i
) = new_part
;
4861 /* Return a mem ref for the memory equivalent of reg REGNO.
4862 This mem ref is not shared with anything. */
4865 make_memloc (rtx ad
, int regno
)
4867 /* We must rerun eliminate_regs, in case the elimination
4868 offsets have changed. */
4870 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno
), VOIDmode
, NULL_RTX
),
4873 /* If TEM might contain a pseudo, we must copy it to avoid
4874 modifying it when we do the substitution for the reload. */
4875 if (rtx_varies_p (tem
, 0))
4876 tem
= copy_rtx (tem
);
4878 tem
= replace_equiv_address_nv (reg_equiv_memory_loc (regno
), tem
);
4879 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4881 /* Copy the result if it's still the same as the equivalence, to avoid
4882 modifying it when we do the substitution for the reload. */
4883 if (tem
== reg_equiv_memory_loc (regno
))
4884 tem
= copy_rtx (tem
);
4888 /* Returns true if AD could be turned into a valid memory reference
4889 to mode MODE in address space AS by reloading the part pointed to
4890 by PART into a register. */
4893 maybe_memory_address_addr_space_p (enum machine_mode mode
, rtx ad
,
4894 addr_space_t as
, rtx
*part
)
4898 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4901 retv
= memory_address_addr_space_p (mode
, ad
, as
);
4907 /* Record all reloads needed for handling memory address AD
4908 which appears in *LOC in a memory reference to mode MODE
4909 which itself is found in location *MEMREFLOC.
4910 Note that we take shortcuts assuming that no multi-reg machine mode
4911 occurs as part of an address.
4913 OPNUM and TYPE specify the purpose of this reload.
4915 IND_LEVELS says how many levels of indirect addressing this machine
4918 INSN, if nonzero, is the insn in which we do the reload. It is used
4919 to determine if we may generate output reloads, and where to put USEs
4920 for pseudos that we have to replace with stack slots.
4922 Value is one if this address is reloaded or replaced as a whole; it is
4923 zero if the top level of this address was not reloaded or replaced, and
4924 it is -1 if it may or may not have been reloaded or replaced.
4926 Note that there is no verification that the address will be valid after
4927 this routine does its work. Instead, we rely on the fact that the address
4928 was valid when reload started. So we need only undo things that reload
4929 could have broken. These are wrong register types, pseudos not allocated
4930 to a hard register, and frame pointer elimination. */
4933 find_reloads_address (enum machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4934 rtx
*loc
, int opnum
, enum reload_type type
,
4935 int ind_levels
, rtx insn
)
4937 addr_space_t as
= memrefloc
? MEM_ADDR_SPACE (*memrefloc
)
4938 : ADDR_SPACE_GENERIC
;
4940 int removed_and
= 0;
4944 /* If the address is a register, see if it is a legitimate address and
4945 reload if not. We first handle the cases where we need not reload
4946 or where we must reload in a non-standard way. */
4952 if (reg_equiv_constant (regno
) != 0)
4954 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
4955 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4956 GET_MODE (ad
), opnum
, type
, ind_levels
);
4960 tem
= reg_equiv_memory_loc (regno
);
4963 if (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
)
4965 tem
= make_memloc (ad
, regno
);
4966 if (! strict_memory_address_addr_space_p (GET_MODE (tem
),
4968 MEM_ADDR_SPACE (tem
)))
4972 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4973 &XEXP (tem
, 0), opnum
,
4974 ADDR_TYPE (type
), ind_levels
, insn
);
4975 if (!rtx_equal_p (tem
, orig
))
4976 push_reg_equiv_alt_mem (regno
, tem
);
4978 /* We can avoid a reload if the register's equivalent memory
4979 expression is valid as an indirect memory address.
4980 But not all addresses are valid in a mem used as an indirect
4981 address: only reg or reg+constant. */
4984 && strict_memory_address_addr_space_p (mode
, tem
, as
)
4985 && (REG_P (XEXP (tem
, 0))
4986 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4987 && REG_P (XEXP (XEXP (tem
, 0), 0))
4988 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4990 /* TEM is not the same as what we'll be replacing the
4991 pseudo with after reload, put a USE in front of INSN
4992 in the final reload pass. */
4994 && num_not_at_initial_offset
4995 && ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
4998 /* We mark the USE with QImode so that we
4999 recognize it as one that can be safely
5000 deleted at the end of reload. */
5001 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
5004 /* This doesn't really count as replacing the address
5005 as a whole, since it is still a memory access. */
5013 /* The only remaining case where we can avoid a reload is if this is a
5014 hard register that is valid as a base register and which is not the
5015 subject of a CLOBBER in this insn. */
5017 else if (regno
< FIRST_PSEUDO_REGISTER
5018 && regno_ok_for_base_p (regno
, mode
, as
, MEM
, SCRATCH
)
5019 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
5022 /* If we do not have one of the cases above, we must do the reload. */
5023 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0,
5024 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5025 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
5029 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
5031 /* The address appears valid, so reloads are not needed.
5032 But the address may contain an eliminable register.
5033 This can happen because a machine with indirect addressing
5034 may consider a pseudo register by itself a valid address even when
5035 it has failed to get a hard reg.
5036 So do a tree-walk to find and eliminate all such regs. */
5038 /* But first quickly dispose of a common case. */
5039 if (GET_CODE (ad
) == PLUS
5040 && CONST_INT_P (XEXP (ad
, 1))
5041 && REG_P (XEXP (ad
, 0))
5042 && reg_equiv_constant (REGNO (XEXP (ad
, 0))) == 0)
5045 subst_reg_equivs_changed
= 0;
5046 *loc
= subst_reg_equivs (ad
, insn
);
5048 if (! subst_reg_equivs_changed
)
5051 /* Check result for validity after substitution. */
5052 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
5056 #ifdef LEGITIMIZE_RELOAD_ADDRESS
5059 if (memrefloc
&& ADDR_SPACE_GENERIC_P (as
))
5061 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
5066 *memrefloc
= copy_rtx (*memrefloc
);
5067 XEXP (*memrefloc
, 0) = ad
;
5068 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
5074 /* The address is not valid. We have to figure out why. First see if
5075 we have an outer AND and remove it if so. Then analyze what's inside. */
5077 if (GET_CODE (ad
) == AND
)
5080 loc
= &XEXP (ad
, 0);
5084 /* One possibility for why the address is invalid is that it is itself
5085 a MEM. This can happen when the frame pointer is being eliminated, a
5086 pseudo is not allocated to a hard register, and the offset between the
5087 frame and stack pointers is not its initial value. In that case the
5088 pseudo will have been replaced by a MEM referring to the
5092 /* First ensure that the address in this MEM is valid. Then, unless
5093 indirect addresses are valid, reload the MEM into a register. */
5095 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
5096 opnum
, ADDR_TYPE (type
),
5097 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
5099 /* If tem was changed, then we must create a new memory reference to
5100 hold it and store it back into memrefloc. */
5101 if (tem
!= ad
&& memrefloc
)
5103 *memrefloc
= copy_rtx (*memrefloc
);
5104 copy_replacements (tem
, XEXP (*memrefloc
, 0));
5105 loc
= &XEXP (*memrefloc
, 0);
5107 loc
= &XEXP (*loc
, 0);
5110 /* Check similar cases as for indirect addresses as above except
5111 that we can allow pseudos and a MEM since they should have been
5112 taken care of above. */
5115 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
5116 || MEM_P (XEXP (tem
, 0))
5117 || ! (REG_P (XEXP (tem
, 0))
5118 || (GET_CODE (XEXP (tem
, 0)) == PLUS
5119 && REG_P (XEXP (XEXP (tem
, 0), 0))
5120 && CONST_INT_P (XEXP (XEXP (tem
, 0), 1)))))
5122 /* Must use TEM here, not AD, since it is the one that will
5123 have any subexpressions reloaded, if needed. */
5124 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
5125 base_reg_class (mode
, as
, MEM
, SCRATCH
), GET_MODE (tem
),
5128 return ! removed_and
;
5134 /* If we have address of a stack slot but it's not valid because the
5135 displacement is too large, compute the sum in a register.
5136 Handle all base registers here, not just fp/ap/sp, because on some
5137 targets (namely SH) we can also get too large displacements from
5138 big-endian corrections. */
5139 else if (GET_CODE (ad
) == PLUS
5140 && REG_P (XEXP (ad
, 0))
5141 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
5142 && CONST_INT_P (XEXP (ad
, 1))
5143 && (regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
, PLUS
,
5145 /* Similarly, if we were to reload the base register and the
5146 mem+offset address is still invalid, then we want to reload
5147 the whole address, not just the base register. */
5148 || ! maybe_memory_address_addr_space_p
5149 (mode
, ad
, as
, &(XEXP (ad
, 0)))))
5152 /* Unshare the MEM rtx so we can safely alter it. */
5155 *memrefloc
= copy_rtx (*memrefloc
);
5156 loc
= &XEXP (*memrefloc
, 0);
5158 loc
= &XEXP (*loc
, 0);
5161 if (double_reg_address_ok
5162 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
,
5165 /* Unshare the sum as well. */
5166 *loc
= ad
= copy_rtx (ad
);
5168 /* Reload the displacement into an index reg.
5169 We assume the frame pointer or arg pointer is a base reg. */
5170 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
5171 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
5177 /* If the sum of two regs is not necessarily valid,
5178 reload the sum into a base reg.
5179 That will at least work. */
5180 find_reloads_address_part (ad
, loc
,
5181 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5182 GET_MODE (ad
), opnum
, type
, ind_levels
);
5184 return ! removed_and
;
5187 /* If we have an indexed stack slot, there are three possible reasons why
5188 it might be invalid: The index might need to be reloaded, the address
5189 might have been made by frame pointer elimination and hence have a
5190 constant out of range, or both reasons might apply.
5192 We can easily check for an index needing reload, but even if that is the
5193 case, we might also have an invalid constant. To avoid making the
5194 conservative assumption and requiring two reloads, we see if this address
5195 is valid when not interpreted strictly. If it is, the only problem is
5196 that the index needs a reload and find_reloads_address_1 will take care
5199 Handle all base registers here, not just fp/ap/sp, because on some
5200 targets (namely SPARC) we can also get invalid addresses from preventive
5201 subreg big-endian corrections made by find_reloads_toplev. We
5202 can also get expressions involving LO_SUM (rather than PLUS) from
5203 find_reloads_subreg_address.
5205 If we decide to do something, it must be that `double_reg_address_ok'
5206 is true. We generate a reload of the base register + constant and
5207 rework the sum so that the reload register will be added to the index.
5208 This is safe because we know the address isn't shared.
5210 We check for the base register as both the first and second operand of
5211 the innermost PLUS and/or LO_SUM. */
5213 for (op_index
= 0; op_index
< 2; ++op_index
)
5215 rtx operand
, addend
;
5216 enum rtx_code inner_code
;
5218 if (GET_CODE (ad
) != PLUS
)
5221 inner_code
= GET_CODE (XEXP (ad
, 0));
5222 if (!(GET_CODE (ad
) == PLUS
5223 && CONST_INT_P (XEXP (ad
, 1))
5224 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5227 operand
= XEXP (XEXP (ad
, 0), op_index
);
5228 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5231 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5233 if ((regno_ok_for_base_p (REGNO (operand
), mode
, as
, inner_code
,
5235 || operand
== frame_pointer_rtx
5236 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
5237 || operand
== hard_frame_pointer_rtx
5239 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5240 || operand
== arg_pointer_rtx
5242 || operand
== stack_pointer_rtx
)
5243 && ! maybe_memory_address_addr_space_p
5244 (mode
, ad
, as
, &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5249 offset_reg
= plus_constant (GET_MODE (ad
), operand
,
5250 INTVAL (XEXP (ad
, 1)));
5252 /* Form the adjusted address. */
5253 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5254 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5255 op_index
== 0 ? offset_reg
: addend
,
5256 op_index
== 0 ? addend
: offset_reg
);
5258 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5259 op_index
== 0 ? offset_reg
: addend
,
5260 op_index
== 0 ? addend
: offset_reg
);
5263 cls
= base_reg_class (mode
, as
, MEM
, GET_CODE (addend
));
5264 find_reloads_address_part (XEXP (ad
, op_index
),
5265 &XEXP (ad
, op_index
), cls
,
5266 GET_MODE (ad
), opnum
, type
, ind_levels
);
5267 find_reloads_address_1 (mode
, as
,
5268 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5269 GET_CODE (XEXP (ad
, op_index
)),
5270 &XEXP (ad
, 1 - op_index
), opnum
,
5277 /* See if address becomes valid when an eliminable register
5278 in a sum is replaced. */
5281 if (GET_CODE (ad
) == PLUS
)
5282 tem
= subst_indexed_address (ad
);
5283 if (tem
!= ad
&& strict_memory_address_addr_space_p (mode
, tem
, as
))
5285 /* Ok, we win that way. Replace any additional eliminable
5288 subst_reg_equivs_changed
= 0;
5289 tem
= subst_reg_equivs (tem
, insn
);
5291 /* Make sure that didn't make the address invalid again. */
5293 if (! subst_reg_equivs_changed
5294 || strict_memory_address_addr_space_p (mode
, tem
, as
))
5301 /* If constants aren't valid addresses, reload the constant address
5303 if (CONSTANT_P (ad
) && ! strict_memory_address_addr_space_p (mode
, ad
, as
))
5305 enum machine_mode address_mode
= GET_MODE (ad
);
5306 if (address_mode
== VOIDmode
)
5307 address_mode
= targetm
.addr_space
.address_mode (as
);
5309 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5310 Unshare it so we can safely alter it. */
5311 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5312 && CONSTANT_POOL_ADDRESS_P (ad
))
5314 *memrefloc
= copy_rtx (*memrefloc
);
5315 loc
= &XEXP (*memrefloc
, 0);
5317 loc
= &XEXP (*loc
, 0);
5320 find_reloads_address_part (ad
, loc
,
5321 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5322 address_mode
, opnum
, type
, ind_levels
);
5323 return ! removed_and
;
5326 return find_reloads_address_1 (mode
, as
, ad
, 0, MEM
, SCRATCH
, loc
,
5327 opnum
, type
, ind_levels
, insn
);
5330 /* Find all pseudo regs appearing in AD
5331 that are eliminable in favor of equivalent values
5332 and do not have hard regs; replace them by their equivalents.
5333 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5334 front of it for pseudos that we have to replace with stack slots. */
5337 subst_reg_equivs (rtx ad
, rtx insn
)
5339 RTX_CODE code
= GET_CODE (ad
);
5356 int regno
= REGNO (ad
);
5358 if (reg_equiv_constant (regno
) != 0)
5360 subst_reg_equivs_changed
= 1;
5361 return reg_equiv_constant (regno
);
5363 if (reg_equiv_memory_loc (regno
) && num_not_at_initial_offset
)
5365 rtx mem
= make_memloc (ad
, regno
);
5366 if (! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
5368 subst_reg_equivs_changed
= 1;
5369 /* We mark the USE with QImode so that we recognize it
5370 as one that can be safely deleted at the end of
5372 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5381 /* Quickly dispose of a common case. */
5382 if (XEXP (ad
, 0) == frame_pointer_rtx
5383 && CONST_INT_P (XEXP (ad
, 1)))
5391 fmt
= GET_RTX_FORMAT (code
);
5392 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5394 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5398 /* Compute the sum of X and Y, making canonicalizations assumed in an
5399 address, namely: sum constant integers, surround the sum of two
5400 constants with a CONST, put the constant as the second operand, and
5401 group the constant on the outermost sum.
5403 This routine assumes both inputs are already in canonical form. */
5406 form_sum (enum machine_mode mode
, rtx x
, rtx y
)
5410 gcc_assert (GET_MODE (x
) == mode
|| GET_MODE (x
) == VOIDmode
);
5411 gcc_assert (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
);
5413 if (CONST_INT_P (x
))
5414 return plus_constant (mode
, y
, INTVAL (x
));
5415 else if (CONST_INT_P (y
))
5416 return plus_constant (mode
, x
, INTVAL (y
));
5417 else if (CONSTANT_P (x
))
5418 tem
= x
, x
= y
, y
= tem
;
5420 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5421 return form_sum (mode
, XEXP (x
, 0), form_sum (mode
, XEXP (x
, 1), y
));
5423 /* Note that if the operands of Y are specified in the opposite
5424 order in the recursive calls below, infinite recursion will occur. */
5425 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5426 return form_sum (mode
, form_sum (mode
, x
, XEXP (y
, 0)), XEXP (y
, 1));
5428 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5429 constant will have been placed second. */
5430 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5432 if (GET_CODE (x
) == CONST
)
5434 if (GET_CODE (y
) == CONST
)
5437 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5440 return gen_rtx_PLUS (mode
, x
, y
);
5443 /* If ADDR is a sum containing a pseudo register that should be
5444 replaced with a constant (from reg_equiv_constant),
5445 return the result of doing so, and also apply the associative
5446 law so that the result is more likely to be a valid address.
5447 (But it is not guaranteed to be one.)
5449 Note that at most one register is replaced, even if more are
5450 replaceable. Also, we try to put the result into a canonical form
5451 so it is more likely to be a valid address.
5453 In all other cases, return ADDR. */
5456 subst_indexed_address (rtx addr
)
5458 rtx op0
= 0, op1
= 0, op2
= 0;
5462 if (GET_CODE (addr
) == PLUS
)
5464 /* Try to find a register to replace. */
5465 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5467 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5468 && reg_renumber
[regno
] < 0
5469 && reg_equiv_constant (regno
) != 0)
5470 op0
= reg_equiv_constant (regno
);
5471 else if (REG_P (op1
)
5472 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5473 && reg_renumber
[regno
] < 0
5474 && reg_equiv_constant (regno
) != 0)
5475 op1
= reg_equiv_constant (regno
);
5476 else if (GET_CODE (op0
) == PLUS
5477 && (tem
= subst_indexed_address (op0
)) != op0
)
5479 else if (GET_CODE (op1
) == PLUS
5480 && (tem
= subst_indexed_address (op1
)) != op1
)
5485 /* Pick out up to three things to add. */
5486 if (GET_CODE (op1
) == PLUS
)
5487 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5488 else if (GET_CODE (op0
) == PLUS
)
5489 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5491 /* Compute the sum. */
5493 op1
= form_sum (GET_MODE (addr
), op1
, op2
);
5495 op0
= form_sum (GET_MODE (addr
), op0
, op1
);
5502 /* Update the REG_INC notes for an insn. It updates all REG_INC
5503 notes for the instruction which refer to REGNO the to refer
5504 to the reload number.
5506 INSN is the insn for which any REG_INC notes need updating.
5508 REGNO is the register number which has been reloaded.
5510 RELOADNUM is the reload number. */
5513 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5514 int reloadnum ATTRIBUTE_UNUSED
)
5519 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5520 if (REG_NOTE_KIND (link
) == REG_INC
5521 && (int) REGNO (XEXP (link
, 0)) == regno
)
5522 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5526 /* Record the pseudo registers we must reload into hard registers in a
5527 subexpression of a would-be memory address, X referring to a value
5528 in mode MODE. (This function is not called if the address we find
5531 CONTEXT = 1 means we are considering regs as index regs,
5532 = 0 means we are considering them as base regs.
5533 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5535 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5536 is the code of the index part of the address. Otherwise, pass SCRATCH
5538 OPNUM and TYPE specify the purpose of any reloads made.
5540 IND_LEVELS says how many levels of indirect addressing are
5541 supported at this point in the address.
5543 INSN, if nonzero, is the insn in which we do the reload. It is used
5544 to determine if we may generate output reloads.
5546 We return nonzero if X, as a whole, is reloaded or replaced. */
5548 /* Note that we take shortcuts assuming that no multi-reg machine mode
5549 occurs as part of an address.
5550 Also, this is not fully machine-customizable; it works for machines
5551 such as VAXen and 68000's and 32000's, but other possible machines
5552 could have addressing modes that this does not handle right.
5553 If you add push_reload calls here, you need to make sure gen_reload
5554 handles those cases gracefully. */
5557 find_reloads_address_1 (enum machine_mode mode
, addr_space_t as
,
5559 enum rtx_code outer_code
, enum rtx_code index_code
,
5560 rtx
*loc
, int opnum
, enum reload_type type
,
5561 int ind_levels
, rtx insn
)
5563 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, AS, OUTER, INDEX) \
5565 ? regno_ok_for_base_p (REGNO, MODE, AS, OUTER, INDEX) \
5566 : REGNO_OK_FOR_INDEX_P (REGNO))
5568 enum reg_class context_reg_class
;
5569 RTX_CODE code
= GET_CODE (x
);
5570 bool reloaded_inner_of_autoinc
= false;
5573 context_reg_class
= INDEX_REG_CLASS
;
5575 context_reg_class
= base_reg_class (mode
, as
, outer_code
, index_code
);
5581 rtx orig_op0
= XEXP (x
, 0);
5582 rtx orig_op1
= XEXP (x
, 1);
5583 RTX_CODE code0
= GET_CODE (orig_op0
);
5584 RTX_CODE code1
= GET_CODE (orig_op1
);
5588 if (GET_CODE (op0
) == SUBREG
)
5590 op0
= SUBREG_REG (op0
);
5591 code0
= GET_CODE (op0
);
5592 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5593 op0
= gen_rtx_REG (word_mode
,
5595 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5596 GET_MODE (SUBREG_REG (orig_op0
)),
5597 SUBREG_BYTE (orig_op0
),
5598 GET_MODE (orig_op0
))));
5601 if (GET_CODE (op1
) == SUBREG
)
5603 op1
= SUBREG_REG (op1
);
5604 code1
= GET_CODE (op1
);
5605 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5606 /* ??? Why is this given op1's mode and above for
5607 ??? op0 SUBREGs we use word_mode? */
5608 op1
= gen_rtx_REG (GET_MODE (op1
),
5610 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5611 GET_MODE (SUBREG_REG (orig_op1
)),
5612 SUBREG_BYTE (orig_op1
),
5613 GET_MODE (orig_op1
))));
5615 /* Plus in the index register may be created only as a result of
5616 register rematerialization for expression like &localvar*4. Reload it.
5617 It may be possible to combine the displacement on the outer level,
5618 but it is probably not worthwhile to do so. */
5621 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5622 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5623 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5625 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5629 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5630 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5632 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5633 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5635 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5636 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5640 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5641 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5643 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5644 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5646 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5647 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5651 else if (code0
== CONST_INT
|| code0
== CONST
5652 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5653 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5654 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5657 else if (code1
== CONST_INT
|| code1
== CONST
5658 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5659 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5660 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5663 else if (code0
== REG
&& code1
== REG
)
5665 if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5666 && regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5668 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5669 && regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5671 else if (regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5672 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5673 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5675 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5676 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5677 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5679 else if (regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5680 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5681 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5683 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5684 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5685 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5689 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5690 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5692 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5693 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5698 else if (code0
== REG
)
5700 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5701 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5703 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5704 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5708 else if (code1
== REG
)
5710 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5711 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5713 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5714 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5724 rtx op0
= XEXP (x
, 0);
5725 rtx op1
= XEXP (x
, 1);
5726 enum rtx_code index_code
;
5730 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5733 /* Currently, we only support {PRE,POST}_MODIFY constructs
5734 where a base register is {inc,dec}remented by the contents
5735 of another register or by a constant value. Thus, these
5736 operands must match. */
5737 gcc_assert (op0
== XEXP (op1
, 0));
5739 /* Require index register (or constant). Let's just handle the
5740 register case in the meantime... If the target allows
5741 auto-modify by a constant then we could try replacing a pseudo
5742 register with its equivalent constant where applicable.
5744 We also handle the case where the register was eliminated
5745 resulting in a PLUS subexpression.
5747 If we later decide to reload the whole PRE_MODIFY or
5748 POST_MODIFY, inc_for_reload might clobber the reload register
5749 before reading the index. The index register might therefore
5750 need to live longer than a TYPE reload normally would, so be
5751 conservative and class it as RELOAD_OTHER. */
5752 if ((REG_P (XEXP (op1
, 1))
5753 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5754 || GET_CODE (XEXP (op1
, 1)) == PLUS
)
5755 find_reloads_address_1 (mode
, as
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5756 &XEXP (op1
, 1), opnum
, RELOAD_OTHER
,
5759 gcc_assert (REG_P (XEXP (op1
, 0)));
5761 regno
= REGNO (XEXP (op1
, 0));
5762 index_code
= GET_CODE (XEXP (op1
, 1));
5764 /* A register that is incremented cannot be constant! */
5765 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5766 || reg_equiv_constant (regno
) == 0);
5768 /* Handle a register that is equivalent to a memory location
5769 which cannot be addressed directly. */
5770 if (reg_equiv_memory_loc (regno
) != 0
5771 && (reg_equiv_address (regno
) != 0
5772 || num_not_at_initial_offset
))
5774 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5776 if (reg_equiv_address (regno
)
5777 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5781 /* First reload the memory location's address.
5782 We can't use ADDR_TYPE (type) here, because we need to
5783 write back the value after reading it, hence we actually
5784 need two registers. */
5785 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5786 &XEXP (tem
, 0), opnum
,
5790 if (!rtx_equal_p (tem
, orig
))
5791 push_reg_equiv_alt_mem (regno
, tem
);
5793 /* Then reload the memory location into a base
5795 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5797 base_reg_class (mode
, as
,
5799 GET_MODE (x
), GET_MODE (x
), 0,
5800 0, opnum
, RELOAD_OTHER
);
5802 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5807 if (reg_renumber
[regno
] >= 0)
5808 regno
= reg_renumber
[regno
];
5810 /* We require a base register here... */
5811 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), as
, code
, index_code
))
5813 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5814 &XEXP (op1
, 0), &XEXP (x
, 0),
5815 base_reg_class (mode
, as
,
5817 GET_MODE (x
), GET_MODE (x
), 0, 0,
5818 opnum
, RELOAD_OTHER
);
5820 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5830 if (REG_P (XEXP (x
, 0)))
5832 int regno
= REGNO (XEXP (x
, 0));
5836 /* A register that is incremented cannot be constant! */
5837 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5838 || reg_equiv_constant (regno
) == 0);
5840 /* Handle a register that is equivalent to a memory location
5841 which cannot be addressed directly. */
5842 if (reg_equiv_memory_loc (regno
) != 0
5843 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5845 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5846 if (reg_equiv_address (regno
)
5847 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5851 /* First reload the memory location's address.
5852 We can't use ADDR_TYPE (type) here, because we need to
5853 write back the value after reading it, hence we actually
5854 need two registers. */
5855 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5856 &XEXP (tem
, 0), opnum
, type
,
5858 reloaded_inner_of_autoinc
= true;
5859 if (!rtx_equal_p (tem
, orig
))
5860 push_reg_equiv_alt_mem (regno
, tem
);
5861 /* Put this inside a new increment-expression. */
5862 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5863 /* Proceed to reload that, as if it contained a register. */
5867 /* If we have a hard register that is ok in this incdec context,
5868 don't make a reload. If the register isn't nice enough for
5869 autoincdec, we can reload it. But, if an autoincrement of a
5870 register that we here verified as playing nice, still outside
5871 isn't "valid", it must be that no autoincrement is "valid".
5872 If that is true and something made an autoincrement anyway,
5873 this must be a special context where one is allowed.
5874 (For example, a "push" instruction.)
5875 We can't improve this address, so leave it alone. */
5877 /* Otherwise, reload the autoincrement into a suitable hard reg
5878 and record how much to increment by. */
5880 if (reg_renumber
[regno
] >= 0)
5881 regno
= reg_renumber
[regno
];
5882 if (regno
>= FIRST_PSEUDO_REGISTER
5883 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, code
,
5888 /* If we can output the register afterwards, do so, this
5889 saves the extra update.
5890 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5891 CALL_INSN - and it does not set CC0.
5892 But don't do this if we cannot directly address the
5893 memory location, since this will make it harder to
5894 reuse address reloads, and increases register pressure.
5895 Also don't do this if we can probably update x directly. */
5896 rtx equiv
= (MEM_P (XEXP (x
, 0))
5898 : reg_equiv_mem (regno
));
5899 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
5900 if (insn
&& NONJUMP_INSN_P (insn
) && equiv
5901 && memory_operand (equiv
, GET_MODE (equiv
))
5903 && ! sets_cc0_p (PATTERN (insn
))
5905 && ! (icode
!= CODE_FOR_nothing
5906 && insn_operand_matches (icode
, 0, equiv
)
5907 && insn_operand_matches (icode
, 1, equiv
))
5908 /* Using RELOAD_OTHER means we emit this and the reload we
5909 made earlier in the wrong order. */
5910 && !reloaded_inner_of_autoinc
)
5912 /* We use the original pseudo for loc, so that
5913 emit_reload_insns() knows which pseudo this
5914 reload refers to and updates the pseudo rtx, not
5915 its equivalent memory location, as well as the
5916 corresponding entry in reg_last_reload_reg. */
5917 loc
= &XEXP (x_orig
, 0);
5920 = push_reload (x
, x
, loc
, loc
,
5922 GET_MODE (x
), GET_MODE (x
), 0, 0,
5923 opnum
, RELOAD_OTHER
);
5928 = push_reload (x
, x
, loc
, (rtx
*) 0,
5930 GET_MODE (x
), GET_MODE (x
), 0, 0,
5933 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5938 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5948 /* Look for parts to reload in the inner expression and reload them
5949 too, in addition to this operation. Reloading all inner parts in
5950 addition to this one shouldn't be necessary, but at this point,
5951 we don't know if we can possibly omit any part that *can* be
5952 reloaded. Targets that are better off reloading just either part
5953 (or perhaps even a different part of an outer expression), should
5954 define LEGITIMIZE_RELOAD_ADDRESS. */
5955 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), as
, XEXP (x
, 0),
5956 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5957 type
, ind_levels
, insn
);
5958 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5960 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5964 /* This is probably the result of a substitution, by eliminate_regs, of
5965 an equivalent address for a pseudo that was not allocated to a hard
5966 register. Verify that the specified address is valid and reload it
5969 Since we know we are going to reload this item, don't decrement for
5970 the indirection level.
5972 Note that this is actually conservative: it would be slightly more
5973 efficient to use the value of SPILL_INDIRECT_LEVELS from
5976 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5977 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5978 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5980 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5985 int regno
= REGNO (x
);
5987 if (reg_equiv_constant (regno
) != 0)
5989 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
5991 GET_MODE (x
), opnum
, type
, ind_levels
);
5995 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5996 that feeds this insn. */
5997 if (reg_equiv_mem (regno
) != 0)
5999 push_reload (reg_equiv_mem (regno
), NULL_RTX
, loc
, (rtx
*) 0,
6001 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6006 if (reg_equiv_memory_loc (regno
)
6007 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
6009 rtx tem
= make_memloc (x
, regno
);
6010 if (reg_equiv_address (regno
) != 0
6011 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
6014 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
6015 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
6017 if (!rtx_equal_p (x
, tem
))
6018 push_reg_equiv_alt_mem (regno
, x
);
6022 if (reg_renumber
[regno
] >= 0)
6023 regno
= reg_renumber
[regno
];
6025 if (regno
>= FIRST_PSEUDO_REGISTER
6026 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
6029 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
6031 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6035 /* If a register appearing in an address is the subject of a CLOBBER
6036 in this insn, reload it into some other register to be safe.
6037 The CLOBBER is supposed to make the register unavailable
6038 from before this insn to after it. */
6039 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
6041 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
6043 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6050 if (REG_P (SUBREG_REG (x
)))
6052 /* If this is a SUBREG of a hard register and the resulting register
6053 is of the wrong class, reload the whole SUBREG. This avoids
6054 needless copies if SUBREG_REG is multi-word. */
6055 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6057 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
6059 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
6062 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
6064 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6068 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
6069 is larger than the class size, then reload the whole SUBREG. */
6072 enum reg_class rclass
= context_reg_class
;
6073 if (ira_reg_class_max_nregs
[rclass
][GET_MODE (SUBREG_REG (x
))]
6074 > reg_class_size
[(int) rclass
])
6076 /* If the inner register will be replaced by a memory
6077 reference, we can do this only if we can replace the
6078 whole subreg by a (narrower) memory reference. If
6079 this is not possible, fall through and reload just
6080 the inner register (including address reloads). */
6081 if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x
))) != 0)
6083 rtx tem
= find_reloads_subreg_address (x
, opnum
,
6089 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6090 GET_MODE (tem
), VOIDmode
, 0, 0,
6097 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6098 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6111 const char *fmt
= GET_RTX_FORMAT (code
);
6114 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6117 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6119 find_reloads_address_1 (mode
, as
, XEXP (x
, i
), context
,
6120 code
, SCRATCH
, &XEXP (x
, i
),
6121 opnum
, type
, ind_levels
, insn
);
6125 #undef REG_OK_FOR_CONTEXT
6129 /* X, which is found at *LOC, is a part of an address that needs to be
6130 reloaded into a register of class RCLASS. If X is a constant, or if
6131 X is a PLUS that contains a constant, check that the constant is a
6132 legitimate operand and that we are supposed to be able to load
6133 it into the register.
6135 If not, force the constant into memory and reload the MEM instead.
6137 MODE is the mode to use, in case X is an integer constant.
6139 OPNUM and TYPE describe the purpose of any reloads made.
6141 IND_LEVELS says how many levels of indirect addressing this machine
6145 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class rclass
,
6146 enum machine_mode mode
, int opnum
,
6147 enum reload_type type
, int ind_levels
)
6150 && (!targetm
.legitimate_constant_p (mode
, x
)
6151 || targetm
.preferred_reload_class (x
, rclass
) == NO_REGS
))
6153 x
= force_const_mem (mode
, x
);
6154 find_reloads_address (mode
, &x
, XEXP (x
, 0), &XEXP (x
, 0),
6155 opnum
, type
, ind_levels
, 0);
6158 else if (GET_CODE (x
) == PLUS
6159 && CONSTANT_P (XEXP (x
, 1))
6160 && (!targetm
.legitimate_constant_p (GET_MODE (x
), XEXP (x
, 1))
6161 || targetm
.preferred_reload_class (XEXP (x
, 1), rclass
)
6166 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
6167 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
6168 find_reloads_address (mode
, &XEXP (x
, 1), XEXP (tem
, 0), &XEXP (tem
, 0),
6169 opnum
, type
, ind_levels
, 0);
6172 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6173 mode
, VOIDmode
, 0, 0, opnum
, type
);
6176 /* X, a subreg of a pseudo, is a part of an address that needs to be
6177 reloaded, and the pseusdo is equivalent to a memory location.
6179 Attempt to replace the whole subreg by a (possibly narrower or wider)
6180 memory reference. If this is possible, return this new memory
6181 reference, and push all required address reloads. Otherwise,
6184 OPNUM and TYPE identify the purpose of the reload.
6186 IND_LEVELS says how many levels of indirect addressing are
6187 supported at this point in the address.
6189 INSN, if nonzero, is the insn in which we do the reload. It is used
6190 to determine where to put USEs for pseudos that we have to replace with
6194 find_reloads_subreg_address (rtx x
, int opnum
, enum reload_type type
,
6195 int ind_levels
, rtx insn
, int *address_reloaded
)
6197 enum machine_mode outer_mode
= GET_MODE (x
);
6198 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (x
));
6199 int regno
= REGNO (SUBREG_REG (x
));
6204 gcc_assert (reg_equiv_memory_loc (regno
) != 0);
6206 /* We cannot replace the subreg with a modified memory reference if:
6208 - we have a paradoxical subreg that implicitly acts as a zero or
6209 sign extension operation due to LOAD_EXTEND_OP;
6211 - we have a subreg that is implicitly supposed to act on the full
6212 register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs);
6214 - the address of the equivalent memory location is mode-dependent; or
6216 - we have a paradoxical subreg and the resulting memory is not
6217 sufficiently aligned to allow access in the wider mode.
6219 In addition, we choose not to perform the replacement for *any*
6220 paradoxical subreg, even if it were possible in principle. This
6221 is to avoid generating wider memory references than necessary.
6223 This corresponds to how previous versions of reload used to handle
6224 paradoxical subregs where no address reload was required. */
6226 if (paradoxical_subreg_p (x
))
6229 #ifdef WORD_REGISTER_OPERATIONS
6230 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
)
6231 && ((GET_MODE_SIZE (outer_mode
) - 1) / UNITS_PER_WORD
6232 == (GET_MODE_SIZE (inner_mode
) - 1) / UNITS_PER_WORD
))
6236 /* Since we don't attempt to handle paradoxical subregs, we can just
6237 call into simplify_subreg, which will handle all remaining checks
6239 orig
= make_memloc (SUBREG_REG (x
), regno
);
6240 offset
= SUBREG_BYTE (x
);
6241 tem
= simplify_subreg (outer_mode
, orig
, inner_mode
, offset
);
6242 if (!tem
|| !MEM_P (tem
))
6245 /* Now push all required address reloads, if any. */
6246 reloaded
= find_reloads_address (GET_MODE (tem
), &tem
,
6247 XEXP (tem
, 0), &XEXP (tem
, 0),
6248 opnum
, type
, ind_levels
, insn
);
6249 /* ??? Do we need to handle nonzero offsets somehow? */
6250 if (!offset
&& !rtx_equal_p (tem
, orig
))
6251 push_reg_equiv_alt_mem (regno
, tem
);
6253 /* For some processors an address may be valid in the original mode but
6254 not in a smaller mode. For example, ARM accepts a scaled index register
6255 in SImode but not in HImode. Note that this is only a problem if the
6256 address in reg_equiv_mem is already invalid in the new mode; other
6257 cases would be fixed by find_reloads_address as usual.
6259 ??? We attempt to handle such cases here by doing an additional reload
6260 of the full address after the usual processing by find_reloads_address.
6261 Note that this may not work in the general case, but it seems to cover
6262 the cases where this situation currently occurs. A more general fix
6263 might be to reload the *value* instead of the address, but this would
6264 not be expected by the callers of this routine as-is.
6266 If find_reloads_address already completed replaced the address, there
6267 is nothing further to do. */
6269 && reg_equiv_mem (regno
) != 0
6270 && !strict_memory_address_addr_space_p
6271 (GET_MODE (x
), XEXP (reg_equiv_mem (regno
), 0),
6272 MEM_ADDR_SPACE (reg_equiv_mem (regno
))))
6274 push_reload (XEXP (tem
, 0), NULL_RTX
, &XEXP (tem
, 0), (rtx
*) 0,
6275 base_reg_class (GET_MODE (tem
), MEM_ADDR_SPACE (tem
),
6277 GET_MODE (XEXP (tem
, 0)), VOIDmode
, 0, 0, opnum
, type
);
6281 /* If this is not a toplevel operand, find_reloads doesn't see this
6282 substitution. We have to emit a USE of the pseudo so that
6283 delete_output_reload can see it. */
6284 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6285 /* We mark the USE with QImode so that we recognize it as one that
6286 can be safely deleted at the end of reload. */
6287 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
),
6290 if (address_reloaded
)
6291 *address_reloaded
= reloaded
;
6296 /* Substitute into the current INSN the registers into which we have reloaded
6297 the things that need reloading. The array `replacements'
6298 contains the locations of all pointers that must be changed
6299 and says what to replace them with.
6301 Return the rtx that X translates into; usually X, but modified. */
6304 subst_reloads (rtx insn
)
6308 for (i
= 0; i
< n_replacements
; i
++)
6310 struct replacement
*r
= &replacements
[i
];
6311 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6315 /* This checking takes a very long time on some platforms
6316 causing the gcc.c-torture/compile/limits-fnargs.c test
6317 to time out during testing. See PR 31850.
6319 Internal consistency test. Check that we don't modify
6320 anything in the equivalence arrays. Whenever something from
6321 those arrays needs to be reloaded, it must be unshared before
6322 being substituted into; the equivalence must not be modified.
6323 Otherwise, if the equivalence is used after that, it will
6324 have been modified, and the thing substituted (probably a
6325 register) is likely overwritten and not a usable equivalence. */
6328 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6330 #define CHECK_MODF(ARRAY) \
6331 gcc_assert (!(*reg_equivs)[check_regno].ARRAY \
6332 || !loc_mentioned_in_p (r->where, \
6333 (*reg_equivs)[check_regno].ARRAY))
6335 CHECK_MODF (constant
);
6336 CHECK_MODF (memory_loc
);
6337 CHECK_MODF (address
);
6341 #endif /* DEBUG_RELOAD */
6343 /* If we're replacing a LABEL_REF with a register, there must
6344 already be an indication (to e.g. flow) which label this
6345 register refers to. */
6346 gcc_assert (GET_CODE (*r
->where
) != LABEL_REF
6348 || find_reg_note (insn
,
6350 XEXP (*r
->where
, 0))
6351 || label_is_jump_target_p (XEXP (*r
->where
, 0), insn
));
6353 /* Encapsulate RELOADREG so its machine mode matches what
6354 used to be there. Note that gen_lowpart_common will
6355 do the wrong thing if RELOADREG is multi-word. RELOADREG
6356 will always be a REG here. */
6357 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6358 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6360 *r
->where
= reloadreg
;
6362 /* If reload got no reg and isn't optional, something's wrong. */
6364 gcc_assert (rld
[r
->what
].optional
);
6368 /* Make a copy of any replacements being done into X and move those
6369 copies to locations in Y, a copy of X. */
6372 copy_replacements (rtx x
, rtx y
)
6374 copy_replacements_1 (&x
, &y
, n_replacements
);
6378 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6382 struct replacement
*r
;
6386 for (j
= 0; j
< orig_replacements
; j
++)
6387 if (replacements
[j
].where
== px
)
6389 r
= &replacements
[n_replacements
++];
6391 r
->what
= replacements
[j
].what
;
6392 r
->mode
= replacements
[j
].mode
;
6397 code
= GET_CODE (x
);
6398 fmt
= GET_RTX_FORMAT (code
);
6400 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6403 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6404 else if (fmt
[i
] == 'E')
6405 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6406 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6411 /* Change any replacements being done to *X to be done to *Y. */
6414 move_replacements (rtx
*x
, rtx
*y
)
6418 for (i
= 0; i
< n_replacements
; i
++)
6419 if (replacements
[i
].where
== x
)
6420 replacements
[i
].where
= y
;
6423 /* If LOC was scheduled to be replaced by something, return the replacement.
6424 Otherwise, return *LOC. */
6427 find_replacement (rtx
*loc
)
6429 struct replacement
*r
;
6431 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6433 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6435 if (reloadreg
&& r
->where
== loc
)
6437 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6438 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6442 else if (reloadreg
&& GET_CODE (*loc
) == SUBREG
6443 && r
->where
== &SUBREG_REG (*loc
))
6445 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6446 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6448 return simplify_gen_subreg (GET_MODE (*loc
), reloadreg
,
6449 GET_MODE (SUBREG_REG (*loc
)),
6450 SUBREG_BYTE (*loc
));
6454 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6455 what's inside and make a new rtl if so. */
6456 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6457 || GET_CODE (*loc
) == MULT
)
6459 rtx x
= find_replacement (&XEXP (*loc
, 0));
6460 rtx y
= find_replacement (&XEXP (*loc
, 1));
6462 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6463 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6469 /* Return nonzero if register in range [REGNO, ENDREGNO)
6470 appears either explicitly or implicitly in X
6471 other than being stored into (except for earlyclobber operands).
6473 References contained within the substructure at LOC do not count.
6474 LOC may be zero, meaning don't ignore anything.
6476 This is similar to refers_to_regno_p in rtlanal.c except that we
6477 look at equivalences for pseudos that didn't get hard registers. */
6480 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6492 code
= GET_CODE (x
);
6499 /* If this is a pseudo, a hard register must not have been allocated.
6500 X must therefore either be a constant or be in memory. */
6501 if (r
>= FIRST_PSEUDO_REGISTER
)
6503 if (reg_equiv_memory_loc (r
))
6504 return refers_to_regno_for_reload_p (regno
, endregno
,
6505 reg_equiv_memory_loc (r
),
6508 gcc_assert (reg_equiv_constant (r
) || reg_equiv_invariant (r
));
6512 return (endregno
> r
6513 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6514 ? hard_regno_nregs
[r
][GET_MODE (x
)]
6518 /* If this is a SUBREG of a hard reg, we can see exactly which
6519 registers are being modified. Otherwise, handle normally. */
6520 if (REG_P (SUBREG_REG (x
))
6521 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6523 unsigned int inner_regno
= subreg_regno (x
);
6524 unsigned int inner_endregno
6525 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6526 ? subreg_nregs (x
) : 1);
6528 return endregno
> inner_regno
&& regno
< inner_endregno
;
6534 if (&SET_DEST (x
) != loc
6535 /* Note setting a SUBREG counts as referring to the REG it is in for
6536 a pseudo but not for hard registers since we can
6537 treat each word individually. */
6538 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6539 && loc
!= &SUBREG_REG (SET_DEST (x
))
6540 && REG_P (SUBREG_REG (SET_DEST (x
)))
6541 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6542 && refers_to_regno_for_reload_p (regno
, endregno
,
6543 SUBREG_REG (SET_DEST (x
)),
6545 /* If the output is an earlyclobber operand, this is
6547 || ((!REG_P (SET_DEST (x
))
6548 || earlyclobber_operand_p (SET_DEST (x
)))
6549 && refers_to_regno_for_reload_p (regno
, endregno
,
6550 SET_DEST (x
), loc
))))
6553 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6562 /* X does not match, so try its subexpressions. */
6564 fmt
= GET_RTX_FORMAT (code
);
6565 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6567 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6575 if (refers_to_regno_for_reload_p (regno
, endregno
,
6579 else if (fmt
[i
] == 'E')
6582 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6583 if (loc
!= &XVECEXP (x
, i
, j
)
6584 && refers_to_regno_for_reload_p (regno
, endregno
,
6585 XVECEXP (x
, i
, j
), loc
))
6592 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6593 we check if any register number in X conflicts with the relevant register
6594 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6595 contains a MEM (we don't bother checking for memory addresses that can't
6596 conflict because we expect this to be a rare case.
6598 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6599 that we look at equivalences for pseudos that didn't get hard registers. */
6602 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6604 int regno
, endregno
;
6606 /* Overly conservative. */
6607 if (GET_CODE (x
) == STRICT_LOW_PART
6608 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6611 /* If either argument is a constant, then modifying X can not affect IN. */
6612 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6614 else if (GET_CODE (x
) == SUBREG
&& MEM_P (SUBREG_REG (x
)))
6615 return refers_to_mem_for_reload_p (in
);
6616 else if (GET_CODE (x
) == SUBREG
)
6618 regno
= REGNO (SUBREG_REG (x
));
6619 if (regno
< FIRST_PSEUDO_REGISTER
)
6620 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6621 GET_MODE (SUBREG_REG (x
)),
6624 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6625 ? subreg_nregs (x
) : 1);
6627 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6633 /* If this is a pseudo, it must not have been assigned a hard register.
6634 Therefore, it must either be in memory or be a constant. */
6636 if (regno
>= FIRST_PSEUDO_REGISTER
)
6638 if (reg_equiv_memory_loc (regno
))
6639 return refers_to_mem_for_reload_p (in
);
6640 gcc_assert (reg_equiv_constant (regno
));
6644 endregno
= END_HARD_REGNO (x
);
6646 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6649 return refers_to_mem_for_reload_p (in
);
6650 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6651 || GET_CODE (x
) == CC0
)
6652 return reg_mentioned_p (x
, in
);
6655 gcc_assert (GET_CODE (x
) == PLUS
);
6657 /* We actually want to know if X is mentioned somewhere inside IN.
6658 We must not say that (plus (sp) (const_int 124)) is in
6659 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6660 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6661 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6666 else if (GET_CODE (in
) == PLUS
)
6667 return (rtx_equal_p (x
, in
)
6668 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6669 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6670 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6671 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6677 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6681 refers_to_mem_for_reload_p (rtx x
)
6690 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6691 && reg_equiv_memory_loc (REGNO (x
)));
6693 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6694 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6696 && (MEM_P (XEXP (x
, i
))
6697 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6703 /* Check the insns before INSN to see if there is a suitable register
6704 containing the same value as GOAL.
6705 If OTHER is -1, look for a register in class RCLASS.
6706 Otherwise, just see if register number OTHER shares GOAL's value.
6708 Return an rtx for the register found, or zero if none is found.
6710 If RELOAD_REG_P is (short *)1,
6711 we reject any hard reg that appears in reload_reg_rtx
6712 because such a hard reg is also needed coming into this insn.
6714 If RELOAD_REG_P is any other nonzero value,
6715 it is a vector indexed by hard reg number
6716 and we reject any hard reg whose element in the vector is nonnegative
6717 as well as any that appears in reload_reg_rtx.
6719 If GOAL is zero, then GOALREG is a register number; we look
6720 for an equivalent for that register.
6722 MODE is the machine mode of the value we want an equivalence for.
6723 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6725 This function is used by jump.c as well as in the reload pass.
6727 If GOAL is the sum of the stack pointer and a constant, we treat it
6728 as if it were a constant except that sp is required to be unchanging. */
6731 find_equiv_reg (rtx goal
, rtx insn
, enum reg_class rclass
, int other
,
6732 short *reload_reg_p
, int goalreg
, enum machine_mode mode
)
6735 rtx goaltry
, valtry
, value
, where
;
6741 int goal_mem_addr_varies
= 0;
6742 int need_stable_sp
= 0;
6749 else if (REG_P (goal
))
6750 regno
= REGNO (goal
);
6751 else if (MEM_P (goal
))
6753 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6754 if (MEM_VOLATILE_P (goal
))
6756 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6758 /* An address with side effects must be reexecuted. */
6773 else if (CONSTANT_P (goal
))
6775 else if (GET_CODE (goal
) == PLUS
6776 && XEXP (goal
, 0) == stack_pointer_rtx
6777 && CONSTANT_P (XEXP (goal
, 1)))
6778 goal_const
= need_stable_sp
= 1;
6779 else if (GET_CODE (goal
) == PLUS
6780 && XEXP (goal
, 0) == frame_pointer_rtx
6781 && CONSTANT_P (XEXP (goal
, 1)))
6787 /* Scan insns back from INSN, looking for one that copies
6788 a value into or out of GOAL.
6789 Stop and give up if we reach a label. */
6794 if (p
&& DEBUG_INSN_P (p
))
6797 if (p
== 0 || LABEL_P (p
)
6798 || num
> PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS
))
6801 /* Don't reuse register contents from before a setjmp-type
6802 function call; on the second return (from the longjmp) it
6803 might have been clobbered by a later reuse. It doesn't
6804 seem worthwhile to actually go and see if it is actually
6805 reused even if that information would be readily available;
6806 just don't reuse it across the setjmp call. */
6807 if (CALL_P (p
) && find_reg_note (p
, REG_SETJMP
, NULL_RTX
))
6810 if (NONJUMP_INSN_P (p
)
6811 /* If we don't want spill regs ... */
6812 && (! (reload_reg_p
!= 0
6813 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6814 /* ... then ignore insns introduced by reload; they aren't
6815 useful and can cause results in reload_as_needed to be
6816 different from what they were when calculating the need for
6817 spills. If we notice an input-reload insn here, we will
6818 reject it below, but it might hide a usable equivalent.
6819 That makes bad code. It may even fail: perhaps no reg was
6820 spilled for this insn because it was assumed we would find
6822 || INSN_UID (p
) < reload_first_uid
))
6825 pat
= single_set (p
);
6827 /* First check for something that sets some reg equal to GOAL. */
6830 && true_regnum (SET_SRC (pat
)) == regno
6831 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6834 && true_regnum (SET_DEST (pat
)) == regno
6835 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6837 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6838 /* When looking for stack pointer + const,
6839 make sure we don't use a stack adjust. */
6840 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6841 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6843 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6844 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6846 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6847 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6848 /* If we are looking for a constant,
6849 and something equivalent to that constant was copied
6850 into a reg, we can use that reg. */
6851 || (goal_const
&& REG_NOTES (p
) != 0
6852 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6853 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6855 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6856 || (REG_P (SET_DEST (pat
))
6857 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6858 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6859 && CONST_INT_P (goal
)
6861 = operand_subword (XEXP (tem
, 0), 0, 0,
6863 && rtx_equal_p (goal
, goaltry
)
6865 = operand_subword (SET_DEST (pat
), 0, 0,
6867 && (valueno
= true_regnum (valtry
)) >= 0)))
6868 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6870 && REG_P (SET_DEST (pat
))
6871 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6872 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6873 && CONST_INT_P (goal
)
6874 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6876 && rtx_equal_p (goal
, goaltry
)
6878 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6879 && (valueno
= true_regnum (valtry
)) >= 0)))
6883 if (valueno
!= other
)
6886 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6888 else if (!in_hard_reg_set_p (reg_class_contents
[(int) rclass
],
6898 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6899 (or copying VALUE into GOAL, if GOAL is also a register).
6900 Now verify that VALUE is really valid. */
6902 /* VALUENO is the register number of VALUE; a hard register. */
6904 /* Don't try to re-use something that is killed in this insn. We want
6905 to be able to trust REG_UNUSED notes. */
6906 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6909 /* If we propose to get the value from the stack pointer or if GOAL is
6910 a MEM based on the stack pointer, we need a stable SP. */
6911 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6912 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6916 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6917 if (GET_MODE (value
) != mode
)
6920 /* Reject VALUE if it was loaded from GOAL
6921 and is also a register that appears in the address of GOAL. */
6923 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6924 && refers_to_regno_for_reload_p (valueno
, end_hard_regno (mode
, valueno
),
6928 /* Reject registers that overlap GOAL. */
6930 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6931 nregs
= hard_regno_nregs
[regno
][mode
];
6934 valuenregs
= hard_regno_nregs
[valueno
][mode
];
6936 if (!goal_mem
&& !goal_const
6937 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6940 /* Reject VALUE if it is one of the regs reserved for reloads.
6941 Reload1 knows how to reuse them anyway, and it would get
6942 confused if we allocated one without its knowledge.
6943 (Now that insns introduced by reload are ignored above,
6944 this case shouldn't happen, but I'm not positive.) */
6946 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6949 for (i
= 0; i
< valuenregs
; ++i
)
6950 if (reload_reg_p
[valueno
+ i
] >= 0)
6954 /* Reject VALUE if it is a register being used for an input reload
6955 even if it is not one of those reserved. */
6957 if (reload_reg_p
!= 0)
6960 for (i
= 0; i
< n_reloads
; i
++)
6961 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6963 int regno1
= REGNO (rld
[i
].reg_rtx
);
6964 int nregs1
= hard_regno_nregs
[regno1
]
6965 [GET_MODE (rld
[i
].reg_rtx
)];
6966 if (regno1
< valueno
+ valuenregs
6967 && regno1
+ nregs1
> valueno
)
6973 /* We must treat frame pointer as varying here,
6974 since it can vary--in a nonlocal goto as generated by expand_goto. */
6975 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6977 /* Now verify that the values of GOAL and VALUE remain unaltered
6978 until INSN is reached. */
6987 /* Don't trust the conversion past a function call
6988 if either of the two is in a call-clobbered register, or memory. */
6993 if (goal_mem
|| need_stable_sp
)
6996 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6997 for (i
= 0; i
< nregs
; ++i
)
6998 if (call_used_regs
[regno
+ i
]
6999 || HARD_REGNO_CALL_PART_CLOBBERED (regno
+ i
, mode
))
7002 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
7003 for (i
= 0; i
< valuenregs
; ++i
)
7004 if (call_used_regs
[valueno
+ i
]
7005 || HARD_REGNO_CALL_PART_CLOBBERED (valueno
+ i
, mode
))
7013 /* Watch out for unspec_volatile, and volatile asms. */
7014 if (volatile_insn_p (pat
))
7017 /* If this insn P stores in either GOAL or VALUE, return 0.
7018 If GOAL is a memory ref and this insn writes memory, return 0.
7019 If GOAL is a memory ref and its address is not constant,
7020 and this insn P changes a register used in GOAL, return 0. */
7022 if (GET_CODE (pat
) == COND_EXEC
)
7023 pat
= COND_EXEC_CODE (pat
);
7024 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
7026 rtx dest
= SET_DEST (pat
);
7027 while (GET_CODE (dest
) == SUBREG
7028 || GET_CODE (dest
) == ZERO_EXTRACT
7029 || GET_CODE (dest
) == STRICT_LOW_PART
)
7030 dest
= XEXP (dest
, 0);
7033 int xregno
= REGNO (dest
);
7035 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
7036 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7039 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
7041 if (xregno
< valueno
+ valuenregs
7042 && xregno
+ xnregs
> valueno
)
7044 if (goal_mem_addr_varies
7045 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
7047 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7050 else if (goal_mem
&& MEM_P (dest
)
7051 && ! push_operand (dest
, GET_MODE (dest
)))
7053 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7054 && reg_equiv_memory_loc (regno
) != 0)
7056 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
7059 else if (GET_CODE (pat
) == PARALLEL
)
7062 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
7064 rtx v1
= XVECEXP (pat
, 0, i
);
7065 if (GET_CODE (v1
) == COND_EXEC
)
7066 v1
= COND_EXEC_CODE (v1
);
7067 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
7069 rtx dest
= SET_DEST (v1
);
7070 while (GET_CODE (dest
) == SUBREG
7071 || GET_CODE (dest
) == ZERO_EXTRACT
7072 || GET_CODE (dest
) == STRICT_LOW_PART
)
7073 dest
= XEXP (dest
, 0);
7076 int xregno
= REGNO (dest
);
7078 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
7079 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7082 if (xregno
< regno
+ nregs
7083 && xregno
+ xnregs
> regno
)
7085 if (xregno
< valueno
+ valuenregs
7086 && xregno
+ xnregs
> valueno
)
7088 if (goal_mem_addr_varies
7089 && reg_overlap_mentioned_for_reload_p (dest
,
7092 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7095 else if (goal_mem
&& MEM_P (dest
)
7096 && ! push_operand (dest
, GET_MODE (dest
)))
7098 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7099 && reg_equiv_memory_loc (regno
) != 0)
7101 else if (need_stable_sp
7102 && push_operand (dest
, GET_MODE (dest
)))
7108 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
7112 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
7113 link
= XEXP (link
, 1))
7115 pat
= XEXP (link
, 0);
7116 if (GET_CODE (pat
) == CLOBBER
)
7118 rtx dest
= SET_DEST (pat
);
7122 int xregno
= REGNO (dest
);
7124 = hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7126 if (xregno
< regno
+ nregs
7127 && xregno
+ xnregs
> regno
)
7129 else if (xregno
< valueno
+ valuenregs
7130 && xregno
+ xnregs
> valueno
)
7132 else if (goal_mem_addr_varies
7133 && reg_overlap_mentioned_for_reload_p (dest
,
7138 else if (goal_mem
&& MEM_P (dest
)
7139 && ! push_operand (dest
, GET_MODE (dest
)))
7141 else if (need_stable_sp
7142 && push_operand (dest
, GET_MODE (dest
)))
7149 /* If this insn auto-increments or auto-decrements
7150 either regno or valueno, return 0 now.
7151 If GOAL is a memory ref and its address is not constant,
7152 and this insn P increments a register used in GOAL, return 0. */
7156 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
7157 if (REG_NOTE_KIND (link
) == REG_INC
7158 && REG_P (XEXP (link
, 0)))
7160 int incno
= REGNO (XEXP (link
, 0));
7161 if (incno
< regno
+ nregs
&& incno
>= regno
)
7163 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
7165 if (goal_mem_addr_varies
7166 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
7176 /* Find a place where INCED appears in an increment or decrement operator
7177 within X, and return the amount INCED is incremented or decremented by.
7178 The value is always positive. */
7181 find_inc_amount (rtx x
, rtx inced
)
7183 enum rtx_code code
= GET_CODE (x
);
7189 rtx addr
= XEXP (x
, 0);
7190 if ((GET_CODE (addr
) == PRE_DEC
7191 || GET_CODE (addr
) == POST_DEC
7192 || GET_CODE (addr
) == PRE_INC
7193 || GET_CODE (addr
) == POST_INC
)
7194 && XEXP (addr
, 0) == inced
)
7195 return GET_MODE_SIZE (GET_MODE (x
));
7196 else if ((GET_CODE (addr
) == PRE_MODIFY
7197 || GET_CODE (addr
) == POST_MODIFY
)
7198 && GET_CODE (XEXP (addr
, 1)) == PLUS
7199 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7200 && XEXP (addr
, 0) == inced
7201 && CONST_INT_P (XEXP (XEXP (addr
, 1), 1)))
7203 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7204 return i
< 0 ? -i
: i
;
7208 fmt
= GET_RTX_FORMAT (code
);
7209 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7213 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
7220 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7222 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7232 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7233 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7237 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7244 if (! INSN_P (insn
))
7247 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7248 if (REG_NOTE_KIND (link
) == REG_INC
)
7250 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7251 if (test
>= regno
&& test
< endregno
)
7258 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7262 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7263 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7264 REG_INC. REGNO must refer to a hard register. */
7267 regno_clobbered_p (unsigned int regno
, rtx insn
, enum machine_mode mode
,
7270 unsigned int nregs
, endregno
;
7272 /* regno must be a hard register. */
7273 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7275 nregs
= hard_regno_nregs
[regno
][mode
];
7276 endregno
= regno
+ nregs
;
7278 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7279 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7280 && REG_P (XEXP (PATTERN (insn
), 0)))
7282 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7284 return test
>= regno
&& test
< endregno
;
7287 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7290 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7292 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7296 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7297 if ((GET_CODE (elt
) == CLOBBER
7298 || (sets
== 1 && GET_CODE (elt
) == SET
))
7299 && REG_P (XEXP (elt
, 0)))
7301 unsigned int test
= REGNO (XEXP (elt
, 0));
7303 if (test
>= regno
&& test
< endregno
)
7307 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7315 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7317 reload_adjust_reg_for_mode (rtx reloadreg
, enum machine_mode mode
)
7321 if (GET_MODE (reloadreg
) == mode
)
7324 regno
= REGNO (reloadreg
);
7326 if (REG_WORDS_BIG_ENDIAN
)
7327 regno
+= (int) hard_regno_nregs
[regno
][GET_MODE (reloadreg
)]
7328 - (int) hard_regno_nregs
[regno
][mode
];
7330 return gen_rtx_REG (mode
, regno
);
7333 static const char *const reload_when_needed_name
[] =
7336 "RELOAD_FOR_OUTPUT",
7338 "RELOAD_FOR_INPUT_ADDRESS",
7339 "RELOAD_FOR_INPADDR_ADDRESS",
7340 "RELOAD_FOR_OUTPUT_ADDRESS",
7341 "RELOAD_FOR_OUTADDR_ADDRESS",
7342 "RELOAD_FOR_OPERAND_ADDRESS",
7343 "RELOAD_FOR_OPADDR_ADDR",
7345 "RELOAD_FOR_OTHER_ADDRESS"
7348 /* These functions are used to print the variables set by 'find_reloads' */
7351 debug_reload_to_stream (FILE *f
)
7358 for (r
= 0; r
< n_reloads
; r
++)
7360 fprintf (f
, "Reload %d: ", r
);
7364 fprintf (f
, "reload_in (%s) = ",
7365 GET_MODE_NAME (rld
[r
].inmode
));
7366 print_inline_rtx (f
, rld
[r
].in
, 24);
7367 fprintf (f
, "\n\t");
7370 if (rld
[r
].out
!= 0)
7372 fprintf (f
, "reload_out (%s) = ",
7373 GET_MODE_NAME (rld
[r
].outmode
));
7374 print_inline_rtx (f
, rld
[r
].out
, 24);
7375 fprintf (f
, "\n\t");
7378 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].rclass
]);
7380 fprintf (f
, "%s (opnum = %d)",
7381 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7384 if (rld
[r
].optional
)
7385 fprintf (f
, ", optional");
7387 if (rld
[r
].nongroup
)
7388 fprintf (f
, ", nongroup");
7390 if (rld
[r
].inc
!= 0)
7391 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7393 if (rld
[r
].nocombine
)
7394 fprintf (f
, ", can't combine");
7396 if (rld
[r
].secondary_p
)
7397 fprintf (f
, ", secondary_reload_p");
7399 if (rld
[r
].in_reg
!= 0)
7401 fprintf (f
, "\n\treload_in_reg: ");
7402 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7405 if (rld
[r
].out_reg
!= 0)
7407 fprintf (f
, "\n\treload_out_reg: ");
7408 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7411 if (rld
[r
].reg_rtx
!= 0)
7413 fprintf (f
, "\n\treload_reg_rtx: ");
7414 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7418 if (rld
[r
].secondary_in_reload
!= -1)
7420 fprintf (f
, "%ssecondary_in_reload = %d",
7421 prefix
, rld
[r
].secondary_in_reload
);
7425 if (rld
[r
].secondary_out_reload
!= -1)
7426 fprintf (f
, "%ssecondary_out_reload = %d\n",
7427 prefix
, rld
[r
].secondary_out_reload
);
7430 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7432 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7433 insn_data
[rld
[r
].secondary_in_icode
].name
);
7437 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7438 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7439 insn_data
[rld
[r
].secondary_out_icode
].name
);
7448 debug_reload_to_stream (stderr
);