3 #include "hard-reg-set.h"
5 #include "basic-block.h"
11 /* This structure is used to record liveness information at the targets or
12 fallthrough insns of branches. We will most likely need the information
13 at targets again, so save them in a hash table rather than recomputing them
18 int uid
; /* INSN_UID of target. */
19 struct target_info
*next
; /* Next info for same hash bucket. */
20 HARD_REG_SET live_regs
; /* Registers live at target. */
21 int block
; /* Basic block number containing target. */
22 int bb_tick
; /* Generation count of basic block info. */
25 #define TARGET_HASH_PRIME 257
27 /* Indicates what resources are required at the beginning of the epilogue. */
28 static struct resources start_of_epilogue_needs
;
30 /* Indicates what resources are required at function end. */
31 static struct resources end_of_function_needs
;
33 /* Define the hash table itself. */
34 static struct target_info
**target_hash_table
= NULL
;
36 /* For each basic block, we maintain a generation number of its basic
37 block info, which is updated each time we move an insn from the
38 target of a jump. This is the generation number indexed by block
43 /* Marks registers possibly live at the current place being scanned by
44 mark_target_live_regs. Used only by next two function. */
46 static HARD_REG_SET current_live_regs
;
48 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
49 Also only used by the next two functions. */
51 static HARD_REG_SET pending_dead_regs
;
53 /* Utility function called from mark_target_live_regs via note_stores.
54 It deadens any CLOBBERed registers and livens any SET registers. */
57 update_live_status (dest
, x
)
61 int first_regno
, last_regno
;
64 if (GET_CODE (dest
) != REG
65 && (GET_CODE (dest
) != SUBREG
|| GET_CODE (SUBREG_REG (dest
)) != REG
))
68 if (GET_CODE (dest
) == SUBREG
)
69 first_regno
= REGNO (SUBREG_REG (dest
)) + SUBREG_WORD (dest
);
71 first_regno
= REGNO (dest
);
73 last_regno
= first_regno
+ HARD_REGNO_NREGS (first_regno
, GET_MODE (dest
));
75 if (GET_CODE (x
) == CLOBBER
)
76 for (i
= first_regno
; i
< last_regno
; i
++)
77 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
79 for (i
= first_regno
; i
< last_regno
; i
++)
81 SET_HARD_REG_BIT (current_live_regs
, i
);
82 CLEAR_HARD_REG_BIT (pending_dead_regs
, i
);
85 /* Find the number of the basic block that starts closest to INSN. Return -1
86 if we couldn't find such a basic block. */
89 find_basic_block (insn
)
94 /* Scan backwards to the previous BARRIER. Then see if we can find a
95 label that starts a basic block. Return the basic block number. */
97 for (insn
= prev_nonnote_insn (insn
);
98 insn
&& GET_CODE (insn
) != BARRIER
;
99 insn
= prev_nonnote_insn (insn
))
102 /* The start of the function is basic block zero. */
106 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
107 anything other than a CODE_LABEL or note, we can't find this code. */
108 for (insn
= next_nonnote_insn (insn
);
109 insn
&& GET_CODE (insn
) == CODE_LABEL
;
110 insn
= next_nonnote_insn (insn
))
112 for (i
= 0; i
< n_basic_blocks
; i
++)
113 if (insn
== BLOCK_HEAD (i
))
120 /* Similar to next_insn, but ignores insns in the delay slots of
121 an annulled branch. */
124 next_insn_no_annul (insn
)
129 /* If INSN is an annulled branch, skip any insns from the target
131 if (INSN_ANNULLED_BRANCH_P (insn
)
132 && NEXT_INSN (PREV_INSN (insn
)) != insn
)
133 while (INSN_FROM_TARGET_P (NEXT_INSN (insn
)))
134 insn
= NEXT_INSN (insn
);
136 insn
= NEXT_INSN (insn
);
137 if (insn
&& GET_CODE (insn
) == INSN
138 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
139 insn
= XVECEXP (PATTERN (insn
), 0, 0);
145 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
146 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
147 is TRUE, resources used by the called routine will be included for
151 mark_referenced_resources (x
, res
, include_delayed_effects
)
153 register struct resources
*res
;
154 register int include_delayed_effects
;
156 register enum rtx_code code
= GET_CODE (x
);
158 register char *format_ptr
;
160 /* Handle leaf items for which we set resource flags. Also, special-case
161 CALL, SET and CLOBBER operators. */
173 if (GET_CODE (SUBREG_REG (x
)) != REG
)
174 mark_referenced_resources (SUBREG_REG (x
), res
, 0);
177 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
178 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
179 for (i
= regno
; i
< last_regno
; i
++)
180 SET_HARD_REG_BIT (res
->regs
, i
);
185 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
186 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
190 /* If this memory shouldn't change, it really isn't referencing
192 if (RTX_UNCHANGING_P (x
))
193 res
->unch_memory
= 1;
196 res
->volatil
= MEM_VOLATILE_P (x
);
198 /* Mark registers used to access memory. */
199 mark_referenced_resources (XEXP (x
, 0), res
, 0);
206 case UNSPEC_VOLATILE
:
208 /* Traditional asm's are always volatile. */
217 res
->volatil
= MEM_VOLATILE_P (x
);
219 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
220 We can not just fall through here since then we would be confused
221 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
222 traditional asms unlike their normal usage. */
224 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
225 mark_referenced_resources (ASM_OPERANDS_INPUT (x
, i
), res
, 0);
229 /* The first operand will be a (MEM (xxx)) but doesn't really reference
230 memory. The second operand may be referenced, though. */
231 mark_referenced_resources (XEXP (XEXP (x
, 0), 0), res
, 0);
232 mark_referenced_resources (XEXP (x
, 1), res
, 0);
236 /* Usually, the first operand of SET is set, not referenced. But
237 registers used to access memory are referenced. SET_DEST is
238 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
240 mark_referenced_resources (SET_SRC (x
), res
, 0);
243 if (GET_CODE (x
) == SIGN_EXTRACT
|| GET_CODE (x
) == ZERO_EXTRACT
)
244 mark_referenced_resources (x
, res
, 0);
245 else if (GET_CODE (x
) == SUBREG
)
247 if (GET_CODE (x
) == MEM
)
248 mark_referenced_resources (XEXP (x
, 0), res
, 0);
255 if (include_delayed_effects
)
257 /* A CALL references memory, the frame pointer if it exists, the
258 stack pointer, any global registers and any registers given in
259 USE insns immediately in front of the CALL.
261 However, we may have moved some of the parameter loading insns
262 into the delay slot of this CALL. If so, the USE's for them
263 don't count and should be skipped. */
264 rtx insn
= PREV_INSN (x
);
267 rtx next
= NEXT_INSN (x
);
270 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
271 if (NEXT_INSN (insn
) != x
)
273 next
= NEXT_INSN (NEXT_INSN (insn
));
274 sequence
= PATTERN (NEXT_INSN (insn
));
275 seq_size
= XVECLEN (sequence
, 0);
276 if (GET_CODE (sequence
) != SEQUENCE
)
281 SET_HARD_REG_BIT (res
->regs
, STACK_POINTER_REGNUM
);
282 if (frame_pointer_needed
)
284 SET_HARD_REG_BIT (res
->regs
, FRAME_POINTER_REGNUM
);
285 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
286 SET_HARD_REG_BIT (res
->regs
, HARD_FRAME_POINTER_REGNUM
);
290 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
292 SET_HARD_REG_BIT (res
->regs
, i
);
294 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
295 assume that this call can need any register.
297 This is done to be more conservative about how we handle setjmp.
298 We assume that they both use and set all registers. Using all
299 registers ensures that a register will not be considered dead
300 just because it crosses a setjmp call. A register should be
301 considered dead only if the setjmp call returns non-zero. */
302 if (next
&& GET_CODE (next
) == NOTE
303 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
304 SET_HARD_REG_SET (res
->regs
);
309 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
311 link
= XEXP (link
, 1))
312 if (GET_CODE (XEXP (link
, 0)) == USE
)
314 for (i
= 1; i
< seq_size
; i
++)
316 rtx slot_pat
= PATTERN (XVECEXP (sequence
, 0, i
));
317 if (GET_CODE (slot_pat
) == SET
318 && rtx_equal_p (SET_DEST (slot_pat
),
319 SET_DEST (XEXP (link
, 0))))
323 mark_referenced_resources (SET_DEST (XEXP (link
, 0)),
329 /* ... fall through to other INSN processing ... */
334 #ifdef INSN_REFERENCES_ARE_DELAYED
335 if (! include_delayed_effects
336 && INSN_REFERENCES_ARE_DELAYED (x
))
340 /* No special processing, just speed up. */
341 mark_referenced_resources (PATTERN (x
), res
, include_delayed_effects
);
348 /* Process each sub-expression and flag what it needs. */
349 format_ptr
= GET_RTX_FORMAT (code
);
350 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
351 switch (*format_ptr
++)
354 mark_referenced_resources (XEXP (x
, i
), res
, include_delayed_effects
);
358 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
359 mark_referenced_resources (XVECEXP (x
, i
, j
), res
,
360 include_delayed_effects
);
365 /* A subroutine of mark_target_live_regs. Search forward from TARGET
366 looking for registers that are set before they are used. These are dead.
367 Stop after passing a few conditional jumps, and/or a small
368 number of unconditional branches. */
371 find_dead_or_set_registers (target
, res
, jump_target
, jump_count
, set
, needed
)
373 struct resources
*res
;
376 struct resources set
, needed
;
378 HARD_REG_SET scratch
;
383 for (insn
= target
; insn
; insn
= next
)
385 rtx this_jump_insn
= insn
;
387 next
= NEXT_INSN (insn
);
388 switch (GET_CODE (insn
))
391 /* After a label, any pending dead registers that weren't yet
392 used can be made dead. */
393 AND_COMPL_HARD_REG_SET (pending_dead_regs
, needed
.regs
);
394 AND_COMPL_HARD_REG_SET (res
->regs
, pending_dead_regs
);
395 CLEAR_HARD_REG_SET (pending_dead_regs
);
404 if (GET_CODE (PATTERN (insn
)) == USE
)
406 /* If INSN is a USE made by update_block, we care about the
407 underlying insn. Any registers set by the underlying insn
408 are live since the insn is being done somewhere else. */
409 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
410 mark_set_resources (XEXP (PATTERN (insn
), 0), res
, 0, 1);
412 /* All other USE insns are to be ignored. */
415 else if (GET_CODE (PATTERN (insn
)) == CLOBBER
)
417 else if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
419 /* An unconditional jump can be used to fill the delay slot
420 of a call, so search for a JUMP_INSN in any position. */
421 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
423 this_jump_insn
= XVECEXP (PATTERN (insn
), 0, i
);
424 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
433 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
435 if (jump_count
++ < 10)
437 if (simplejump_p (this_jump_insn
)
438 || GET_CODE (PATTERN (this_jump_insn
)) == RETURN
)
440 next
= JUMP_LABEL (this_jump_insn
);
445 *jump_target
= JUMP_LABEL (this_jump_insn
);
448 else if (condjump_p (this_jump_insn
)
449 || condjump_in_parallel_p (this_jump_insn
))
451 struct resources target_set
, target_res
;
452 struct resources fallthrough_res
;
454 /* We can handle conditional branches here by following
455 both paths, and then IOR the results of the two paths
456 together, which will give us registers that are dead
457 on both paths. Since this is expensive, we give it
458 a much higher cost than unconditional branches. The
459 cost was chosen so that we will follow at most 1
460 conditional branch. */
463 if (jump_count
>= 10)
466 mark_referenced_resources (insn
, &needed
, 1);
468 /* For an annulled branch, mark_set_resources ignores slots
469 filled by instructions from the target. This is correct
470 if the branch is not taken. Since we are following both
471 paths from the branch, we must also compute correct info
472 if the branch is taken. We do this by inverting all of
473 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
474 and then inverting the INSN_FROM_TARGET_P bits again. */
476 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
477 && INSN_ANNULLED_BRANCH_P (this_jump_insn
))
479 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
480 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
481 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
484 mark_set_resources (insn
, &target_set
, 0, 1);
486 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
487 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
488 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
490 mark_set_resources (insn
, &set
, 0, 1);
494 mark_set_resources (insn
, &set
, 0, 1);
499 COPY_HARD_REG_SET (scratch
, target_set
.regs
);
500 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
501 AND_COMPL_HARD_REG_SET (target_res
.regs
, scratch
);
503 fallthrough_res
= *res
;
504 COPY_HARD_REG_SET (scratch
, set
.regs
);
505 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
506 AND_COMPL_HARD_REG_SET (fallthrough_res
.regs
, scratch
);
508 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn
),
509 &target_res
, 0, jump_count
,
511 find_dead_or_set_registers (next
,
512 &fallthrough_res
, 0, jump_count
,
514 IOR_HARD_REG_SET (fallthrough_res
.regs
, target_res
.regs
);
515 AND_HARD_REG_SET (res
->regs
, fallthrough_res
.regs
);
523 /* Don't try this optimization if we expired our jump count
524 above, since that would mean there may be an infinite loop
525 in the function being compiled. */
531 mark_referenced_resources (insn
, &needed
, 1);
532 mark_set_resources (insn
, &set
, 0, 1);
534 COPY_HARD_REG_SET (scratch
, set
.regs
);
535 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
536 AND_COMPL_HARD_REG_SET (res
->regs
, scratch
);
542 /* Given X, a part of an insn, and a pointer to a `struct resource',
543 RES, indicate which resources are modified by the insn. If
544 INCLUDE_DELAYED_EFFECTS is nonzero, also mark resources potentially
545 set by the called routine.
547 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
548 objects are being referenced instead of set.
550 We never mark the insn as modifying the condition code unless it explicitly
551 SETs CC0 even though this is not totally correct. The reason for this is
552 that we require a SET of CC0 to immediately precede the reference to CC0.
553 So if some other insn sets CC0 as a side-effect, we know it cannot affect
554 our computation and thus may be placed in a delay slot. */
557 mark_set_resources (x
, res
, in_dest
, include_delayed_effects
)
559 register struct resources
*res
;
561 int include_delayed_effects
;
563 register enum rtx_code code
;
565 register char *format_ptr
;
583 /* These don't set any resources. */
592 /* Called routine modifies the condition code, memory, any registers
593 that aren't saved across calls, global registers and anything
594 explicitly CLOBBERed immediately after the CALL_INSN. */
596 if (include_delayed_effects
)
598 rtx next
= NEXT_INSN (x
);
599 rtx prev
= PREV_INSN (x
);
602 res
->cc
= res
->memory
= 1;
603 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
604 if (call_used_regs
[i
] || global_regs
[i
])
605 SET_HARD_REG_BIT (res
->regs
, i
);
607 /* If X is part of a delay slot sequence, then NEXT should be
608 the first insn after the sequence. */
609 if (NEXT_INSN (prev
) != x
)
610 next
= NEXT_INSN (NEXT_INSN (prev
));
612 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
613 link
; link
= XEXP (link
, 1))
614 if (GET_CODE (XEXP (link
, 0)) == CLOBBER
)
615 mark_set_resources (SET_DEST (XEXP (link
, 0)), res
, 1, 0);
617 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
618 assume that this call can clobber any register. */
619 if (next
&& GET_CODE (next
) == NOTE
620 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
621 SET_HARD_REG_SET (res
->regs
);
624 /* ... and also what its RTL says it modifies, if anything. */
629 /* An insn consisting of just a CLOBBER (or USE) is just for flow
630 and doesn't actually do anything, so we ignore it. */
632 #ifdef INSN_SETS_ARE_DELAYED
633 if (! include_delayed_effects
634 && INSN_SETS_ARE_DELAYED (x
))
639 if (GET_CODE (x
) != USE
&& GET_CODE (x
) != CLOBBER
)
644 /* If the source of a SET is a CALL, this is actually done by
645 the called routine. So only include it if we are to include the
646 effects of the calling routine. */
648 mark_set_resources (SET_DEST (x
), res
,
649 (include_delayed_effects
650 || GET_CODE (SET_SRC (x
)) != CALL
),
653 mark_set_resources (SET_SRC (x
), res
, 0, 0);
657 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
661 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
662 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x
, 0, 0))
663 && INSN_FROM_TARGET_P (XVECEXP (x
, 0, i
))))
664 mark_set_resources (XVECEXP (x
, 0, i
), res
, 0,
665 include_delayed_effects
);
672 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
676 mark_set_resources (XEXP (x
, 0), res
, in_dest
, 0);
677 mark_set_resources (XEXP (x
, 1), res
, 0, 0);
678 mark_set_resources (XEXP (x
, 2), res
, 0, 0);
685 res
->unch_memory
= RTX_UNCHANGING_P (x
);
686 res
->volatil
= MEM_VOLATILE_P (x
);
689 mark_set_resources (XEXP (x
, 0), res
, 0, 0);
695 if (GET_CODE (SUBREG_REG (x
)) != REG
)
696 mark_set_resources (SUBREG_REG (x
), res
,
697 in_dest
, include_delayed_effects
);
700 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
701 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
702 for (i
= regno
; i
< last_regno
; i
++)
703 SET_HARD_REG_BIT (res
->regs
, i
);
710 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
711 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
718 /* Process each sub-expression and flag what it needs. */
719 format_ptr
= GET_RTX_FORMAT (code
);
720 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
721 switch (*format_ptr
++)
724 mark_set_resources (XEXP (x
, i
), res
, in_dest
, include_delayed_effects
);
728 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
729 mark_set_resources (XVECEXP (x
, i
, j
), res
, in_dest
,
730 include_delayed_effects
);
735 /* Set the resources that are live at TARGET.
737 If TARGET is zero, we refer to the end of the current function and can
738 return our precomputed value.
740 Otherwise, we try to find out what is live by consulting the basic block
741 information. This is tricky, because we must consider the actions of
742 reload and jump optimization, which occur after the basic block information
745 Accordingly, we proceed as follows::
747 We find the previous BARRIER and look at all immediately following labels
748 (with no intervening active insns) to see if any of them start a basic
749 block. If we hit the start of the function first, we use block 0.
751 Once we have found a basic block and a corresponding first insns, we can
752 accurately compute the live status from basic_block_live_regs and
753 reg_renumber. (By starting at a label following a BARRIER, we are immune
754 to actions taken by reload and jump.) Then we scan all insns between
755 that point and our target. For each CLOBBER (or for call-clobbered regs
756 when we pass a CALL_INSN), mark the appropriate registers are dead. For
757 a SET, mark them as live.
759 We have to be careful when using REG_DEAD notes because they are not
760 updated by such things as find_equiv_reg. So keep track of registers
761 marked as dead that haven't been assigned to, and mark them dead at the
762 next CODE_LABEL since reload and jump won't propagate values across labels.
764 If we cannot find the start of a basic block (should be a very rare
765 case, if it can happen at all), mark everything as potentially live.
767 Next, scan forward from TARGET looking for things set or clobbered
768 before they are used. These are not live.
770 Because we can be called many times on the same target, save our results
771 in a hash table indexed by INSN_UID. This is only done if the function
772 init_resource_info () was invoked before we are called. */
775 mark_target_live_regs (insns
, target
, res
)
778 struct resources
*res
;
782 struct target_info
*tinfo
= NULL
;
786 HARD_REG_SET scratch
;
787 struct resources set
, needed
;
789 /* Handle end of function. */
792 *res
= end_of_function_needs
;
796 /* We have to assume memory is needed, but the CC isn't. */
798 res
->volatil
= res
->unch_memory
= 0;
801 /* See if we have computed this value already. */
802 if (target_hash_table
!= NULL
)
804 for (tinfo
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
805 tinfo
; tinfo
= tinfo
->next
)
806 if (tinfo
->uid
== INSN_UID (target
))
809 /* Start by getting the basic block number. If we have saved
810 information, we can get it from there unless the insn at the
811 start of the basic block has been deleted. */
812 if (tinfo
&& tinfo
->block
!= -1
813 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo
->block
)))
818 b
= find_basic_block (target
);
820 if (target_hash_table
!= NULL
)
824 /* If the information is up-to-date, use it. Otherwise, we will
826 if (b
== tinfo
->block
&& b
!= -1 && tinfo
->bb_tick
== bb_ticks
[b
])
828 COPY_HARD_REG_SET (res
->regs
, tinfo
->live_regs
);
834 /* Allocate a place to put our results and chain it into the
836 tinfo
= (struct target_info
*) oballoc (sizeof (struct target_info
));
837 tinfo
->uid
= INSN_UID (target
);
839 tinfo
->next
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
840 target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
] = tinfo
;
844 CLEAR_HARD_REG_SET (pending_dead_regs
);
846 /* If we found a basic block, get the live registers from it and update
847 them with anything set or killed between its start and the insn before
848 TARGET. Otherwise, we must assume everything is live. */
851 regset regs_live
= basic_block_live_at_start
[b
];
854 rtx start_insn
, stop_insn
;
856 /* Compute hard regs live at start of block -- this is the real hard regs
857 marked live, plus live pseudo regs that have been renumbered to
860 REG_SET_TO_HARD_REG_SET (current_live_regs
, regs_live
);
862 EXECUTE_IF_SET_IN_REG_SET
863 (regs_live
, FIRST_PSEUDO_REGISTER
, i
,
865 if ((regno
= reg_renumber
[i
]) >= 0)
867 j
< regno
+ HARD_REGNO_NREGS (regno
,
868 PSEUDO_REGNO_MODE (i
));
870 SET_HARD_REG_BIT (current_live_regs
, j
);
873 /* Get starting and ending insn, handling the case where each might
875 start_insn
= (b
== 0 ? insns
: BLOCK_HEAD (b
));
878 if (GET_CODE (start_insn
) == INSN
879 && GET_CODE (PATTERN (start_insn
)) == SEQUENCE
)
880 start_insn
= XVECEXP (PATTERN (start_insn
), 0, 0);
882 if (GET_CODE (stop_insn
) == INSN
883 && GET_CODE (PATTERN (stop_insn
)) == SEQUENCE
)
884 stop_insn
= next_insn (PREV_INSN (stop_insn
));
886 for (insn
= start_insn
; insn
!= stop_insn
;
887 insn
= next_insn_no_annul (insn
))
890 rtx real_insn
= insn
;
892 /* If this insn is from the target of a branch, it isn't going to
893 be used in the sequel. If it is used in both cases, this
894 test will not be true. */
895 if (INSN_FROM_TARGET_P (insn
))
898 /* If this insn is a USE made by update_block, we care about the
900 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == USE
901 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
902 real_insn
= XEXP (PATTERN (insn
), 0);
904 if (GET_CODE (real_insn
) == CALL_INSN
)
906 /* CALL clobbers all call-used regs that aren't fixed except
907 sp, ap, and fp. Do this before setting the result of the
909 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
910 if (call_used_regs
[i
]
911 && i
!= STACK_POINTER_REGNUM
&& i
!= FRAME_POINTER_REGNUM
912 && i
!= ARG_POINTER_REGNUM
913 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
914 && i
!= HARD_FRAME_POINTER_REGNUM
916 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
917 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
919 #ifdef PIC_OFFSET_TABLE_REGNUM
920 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
923 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
925 /* A CALL_INSN sets any global register live, since it may
926 have been modified by the call. */
927 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
929 SET_HARD_REG_BIT (current_live_regs
, i
);
932 /* Mark anything killed in an insn to be deadened at the next
933 label. Ignore USE insns; the only REG_DEAD notes will be for
934 parameters. But they might be early. A CALL_INSN will usually
935 clobber registers used for parameters. It isn't worth bothering
936 with the unlikely case when it won't. */
937 if ((GET_CODE (real_insn
) == INSN
938 && GET_CODE (PATTERN (real_insn
)) != USE
939 && GET_CODE (PATTERN (real_insn
)) != CLOBBER
)
940 || GET_CODE (real_insn
) == JUMP_INSN
941 || GET_CODE (real_insn
) == CALL_INSN
)
943 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
944 if (REG_NOTE_KIND (link
) == REG_DEAD
945 && GET_CODE (XEXP (link
, 0)) == REG
946 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
948 int first_regno
= REGNO (XEXP (link
, 0));
951 + HARD_REGNO_NREGS (first_regno
,
952 GET_MODE (XEXP (link
, 0))));
954 for (i
= first_regno
; i
< last_regno
; i
++)
955 SET_HARD_REG_BIT (pending_dead_regs
, i
);
958 note_stores (PATTERN (real_insn
), update_live_status
);
960 /* If any registers were unused after this insn, kill them.
961 These notes will always be accurate. */
962 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
963 if (REG_NOTE_KIND (link
) == REG_UNUSED
964 && GET_CODE (XEXP (link
, 0)) == REG
965 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
967 int first_regno
= REGNO (XEXP (link
, 0));
970 + HARD_REGNO_NREGS (first_regno
,
971 GET_MODE (XEXP (link
, 0))));
973 for (i
= first_regno
; i
< last_regno
; i
++)
974 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
978 else if (GET_CODE (real_insn
) == CODE_LABEL
)
980 /* A label clobbers the pending dead registers since neither
981 reload nor jump will propagate a value across a label. */
982 AND_COMPL_HARD_REG_SET (current_live_regs
, pending_dead_regs
);
983 CLEAR_HARD_REG_SET (pending_dead_regs
);
986 /* The beginning of the epilogue corresponds to the end of the
987 RTL chain when there are no epilogue insns. Certain resources
988 are implicitly required at that point. */
989 else if (GET_CODE (real_insn
) == NOTE
990 && NOTE_LINE_NUMBER (real_insn
) == NOTE_INSN_EPILOGUE_BEG
)
991 IOR_HARD_REG_SET (current_live_regs
, start_of_epilogue_needs
.regs
);
994 COPY_HARD_REG_SET (res
->regs
, current_live_regs
);
998 tinfo
->bb_tick
= bb_ticks
[b
];
1002 /* We didn't find the start of a basic block. Assume everything
1003 in use. This should happen only extremely rarely. */
1004 SET_HARD_REG_SET (res
->regs
);
1006 CLEAR_RESOURCE (&set
);
1007 CLEAR_RESOURCE (&needed
);
1009 jump_insn
= find_dead_or_set_registers (target
, res
, &jump_target
, 0,
1012 /* If we hit an unconditional branch, we have another way of finding out
1013 what is live: we can see what is live at the branch target and include
1014 anything used but not set before the branch. The only things that are
1015 live are those that are live using the above test and the test below. */
1019 struct resources new_resources
;
1020 rtx stop_insn
= next_active_insn (jump_insn
);
1022 mark_target_live_regs (insns
, next_active_insn (jump_target
),
1024 CLEAR_RESOURCE (&set
);
1025 CLEAR_RESOURCE (&needed
);
1027 /* Include JUMP_INSN in the needed registers. */
1028 for (insn
= target
; insn
!= stop_insn
; insn
= next_active_insn (insn
))
1030 mark_referenced_resources (insn
, &needed
, 1);
1032 COPY_HARD_REG_SET (scratch
, needed
.regs
);
1033 AND_COMPL_HARD_REG_SET (scratch
, set
.regs
);
1034 IOR_HARD_REG_SET (new_resources
.regs
, scratch
);
1036 mark_set_resources (insn
, &set
, 0, 1);
1039 AND_HARD_REG_SET (res
->regs
, new_resources
.regs
);
1044 COPY_HARD_REG_SET (tinfo
->live_regs
, res
->regs
);
1048 /* Initialize the resources required by mark_target_live_regs ().
1049 This should be invoked before the first call to mark_target_live_regs. */
1052 init_resource_info (epilogue_insn
)
1057 /* Indicate what resources are required to be valid at the end of the current
1058 function. The condition code never is and memory always is. If the
1059 frame pointer is needed, it is and so is the stack pointer unless
1060 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1061 stack pointer is. Registers used to return the function value are
1062 needed. Registers holding global variables are needed. */
1064 end_of_function_needs
.cc
= 0;
1065 end_of_function_needs
.memory
= 1;
1066 end_of_function_needs
.unch_memory
= 0;
1067 CLEAR_HARD_REG_SET (end_of_function_needs
.regs
);
1069 if (frame_pointer_needed
)
1071 SET_HARD_REG_BIT (end_of_function_needs
.regs
, FRAME_POINTER_REGNUM
);
1072 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1073 SET_HARD_REG_BIT (end_of_function_needs
.regs
, HARD_FRAME_POINTER_REGNUM
);
1075 #ifdef EXIT_IGNORE_STACK
1076 if (! EXIT_IGNORE_STACK
1077 || current_function_sp_is_unchanging
)
1079 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1082 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1084 if (current_function_return_rtx
!= 0)
1085 mark_referenced_resources (current_function_return_rtx
,
1086 &end_of_function_needs
, 1);
1088 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1090 #ifdef EPILOGUE_USES
1091 || EPILOGUE_USES (i
)
1094 SET_HARD_REG_BIT (end_of_function_needs
.regs
, i
);
1096 /* The registers required to be live at the end of the function are
1097 represented in the flow information as being dead just prior to
1098 reaching the end of the function. For example, the return of a value
1099 might be represented by a USE of the return register immediately
1100 followed by an unconditional jump to the return label where the
1101 return label is the end of the RTL chain. The end of the RTL chain
1102 is then taken to mean that the return register is live.
1104 This sequence is no longer maintained when epilogue instructions are
1105 added to the RTL chain. To reconstruct the original meaning, the
1106 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1107 point where these registers become live (start_of_epilogue_needs).
1108 If epilogue instructions are present, the registers set by those
1109 instructions won't have been processed by flow. Thus, those
1110 registers are additionally required at the end of the RTL chain
1111 (end_of_function_needs). */
1113 start_of_epilogue_needs
= end_of_function_needs
;
1115 while ((epilogue_insn
= next_nonnote_insn (epilogue_insn
)))
1116 mark_set_resources (epilogue_insn
, &end_of_function_needs
, 0, 1);
1118 /* Allocate and initialize the tables used by mark_target_live_regs. */
1120 = (struct target_info
**) xmalloc ((TARGET_HASH_PRIME
1121 * sizeof (struct target_info
*)));
1122 bzero ((char *) target_hash_table
,
1123 TARGET_HASH_PRIME
* sizeof (struct target_info
*));
1125 bb_ticks
= (int *) xmalloc (n_basic_blocks
* sizeof (int));
1126 bzero ((char *) bb_ticks
, n_basic_blocks
* sizeof (int));
1129 /* Free up the resources allcated to mark_target_live_regs (). This
1130 should be invoked after the last call to mark_target_live_regs (). */
1133 free_resource_info ()
1135 if (target_hash_table
!= NULL
)
1137 free (target_hash_table
);
1138 target_hash_table
= NULL
;
1141 if (bb_ticks
!= NULL
)
1148 /* Clear any hashed information that we have stored for INSN. */
1151 clear_hashed_info_for_insn (insn
)
1154 struct target_info
*tinfo
;
1156 if (target_hash_table
!= NULL
)
1158 for (tinfo
= target_hash_table
[INSN_UID (insn
) % TARGET_HASH_PRIME
];
1159 tinfo
; tinfo
= tinfo
->next
)
1160 if (tinfo
->uid
== INSN_UID (insn
))
1168 /* Increment the tick count for the basic block that contains INSN. */
1171 incr_ticks_for_insn (insn
)
1174 int b
= find_basic_block (insn
);
1180 /* Add TRIAL to the set of resources used at the end of the current
1183 mark_end_of_function_resources (trial
, include_delayed_effects
)
1185 int include_delayed_effects
;
1187 mark_referenced_resources (trial
, &end_of_function_needs
,
1188 include_delayed_effects
);
1191 /* Try to find an available hard register of mode MODE at
1192 CURRENT_INSN, matching the register class in CLASS_STR. Registers
1193 that already have bits set in REG_SET will not be considered.
1195 If an appropriate register is available, it will be returned and the
1196 corresponding bit(s) in REG_SET will be set; otherwise, NULL_RTX is
1200 find_free_register (current_insn
, class_str
, mode
, reg_set
)
1204 HARD_REG_SET
*reg_set
;
1207 struct resources used
;
1208 unsigned char clet
= class_str
[0];
1209 enum reg_class
class
1210 = (clet
== 'r' ? GENERAL_REGS
: REG_CLASS_FROM_LETTER (clet
));
1212 mark_target_live_regs (get_insns (), current_insn
, &used
);
1214 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1218 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], i
))
1220 for (j
= HARD_REGNO_NREGS (i
, mode
) - 1; j
>= 0; j
--)
1222 if (TEST_HARD_REG_BIT (*reg_set
, i
+ j
)
1223 || TEST_HARD_REG_BIT (used
.regs
, i
+ j
))
1231 for (j
= HARD_REGNO_NREGS (i
, mode
) - 1; j
>= 0; j
--)
1233 SET_HARD_REG_BIT (*reg_set
, i
+ j
);
1235 return gen_rtx_REG (mode
, i
);