1 // Implementation of instruction-related RTL SSA functions -*- C++ -*-
2 // Copyright (C) 2020-2021 Free Software Foundation, Inc.
4 // This file is part of GCC.
6 // GCC is free software; you can redistribute it and/or modify it under
7 // the terms of the GNU General Public License as published by the Free
8 // Software Foundation; either version 3, or (at your option) any later
11 // GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 // You should have received a copy of the GNU General Public License
17 // along with GCC; see the file COPYING3. If not see
18 // <http://www.gnu.org/licenses/>.
20 #define INCLUDE_ALGORITHM
21 #define INCLUDE_FUNCTIONAL
24 #include "coretypes.h"
29 #include "rtl-ssa/internals.inl"
31 #include "print-rtl.h"
34 using namespace rtl_ssa
;
36 // The gap to leave between program points when building up the list
37 // of instructions for the first time. Using 2 allows an instruction
38 // to be inserted between two others without resorting to splay tree
39 // ordering. Using 0 is useful as a debugging aid to stress the
41 static const unsigned int POINT_INCREASE
= 2;
43 // Calculate and record the cost of the instruction, based on the
44 // form it had before any in-progress changes were made.
46 insn_info::calculate_cost () const
48 basic_block cfg_bb
= BLOCK_FOR_INSN (m_rtl
);
49 temporarily_undo_changes (0);
50 m_cost_or_uid
= insn_cost (m_rtl
, optimize_bb_for_speed_p (cfg_bb
));
54 // Add NOTE to the instruction's notes.
56 insn_info::add_note (insn_note
*note
)
58 insn_note
**ptr
= &m_first_note
;
59 // Always put the order node first, since it's the one that's likely
60 // to be used most often.
61 if (*ptr
&& (*ptr
)->kind () == insn_note_kind::ORDER_NODE
)
62 ptr
= &(*ptr
)->m_next_note
;
63 note
->m_next_note
= *ptr
;
67 // Implement compare_with for the case in which this insn and OTHER
68 // have the same program point.
70 insn_info::slow_compare_with (const insn_info
&other
) const
72 return order_splay_tree::compare_nodes (get_known_order_node (),
73 other
.get_known_order_node ());
76 // Print insn uid UID to PP, where UID has the same form as insn_info::uid.
78 insn_info::print_uid (pretty_printer
*pp
, int uid
)
80 char tmp
[3 * sizeof (uid
) + 2];
82 // An artificial instruction.
83 snprintf (tmp
, sizeof (tmp
), "a%d", -uid
);
85 // A real RTL instruction.
86 snprintf (tmp
, sizeof (tmp
), "i%d", uid
);
90 // See comment above declaration.
92 insn_info::print_identifier (pretty_printer
*pp
) const
94 print_uid (pp
, uid ());
97 // See comment above declaration.
99 insn_info::print_location (pretty_printer
*pp
) const
101 if (bb_info
*bb
= this->bb ())
103 ebb_info
*ebb
= bb
->ebb ();
104 if (ebb
&& is_phi ())
105 ebb
->print_identifier (pp
);
107 bb
->print_identifier (pp
);
108 pp_string (pp
, " at point ");
109 pp_decimal_int (pp
, m_point
);
112 pp_string (pp
, "<unknown location>");
115 // See comment above declaration.
117 insn_info::print_identifier_and_location (pretty_printer
*pp
) const
120 pp_string (pp
, "asm ");
122 pp_string (pp
, "debug ");
123 pp_string (pp
, "insn ");
124 print_identifier (pp
);
125 pp_string (pp
, " in ");
129 // See comment above declaration.
131 insn_info::print_full (pretty_printer
*pp
) const
133 print_identifier_and_location (pp
);
137 pp_newline_and_indent (pp
, 2);
138 if (has_been_deleted ())
139 pp_string (pp
, "deleted");
142 // Print the insn pattern to a temporary printer.
143 pretty_printer sub_pp
;
144 print_insn_with_notes (&sub_pp
, rtl ());
145 const char *text
= pp_formatted_text (&sub_pp
);
147 // Calculate the length of the maximum line in the pattern.
148 unsigned int max_len
= 0;
149 const char *start
= text
;
150 while (const char *end
= strchr (start
, '\n'))
152 max_len
= MAX (max_len
, (unsigned int) (end
- start
));
156 // Print a separator before or after the pattern.
157 auto print_top_bottom
= [&]()
159 pp_character (pp
, '+');
160 for (unsigned int i
= 0; i
< max_len
+ 2; ++i
)
161 pp_character (pp
, '-');
166 while (const char *end
= strchr (start
, '\n'))
168 pp_newline_and_indent (pp
, 0);
169 pp_character (pp
, '|');
170 // Each line of the pattern already starts with a space.
171 // so we don't need to add another one here.
172 pp_append_text (pp
, start
, end
);
175 pp_newline_and_indent (pp
, 0);
178 if (m_cost_or_uid
!= UNKNOWN_COST
)
180 pp_newline_and_indent (pp
, 0);
181 pp_string (pp
, "cost: ");
182 pp_decimal_int (pp
, m_cost_or_uid
);
184 if (m_has_pre_post_modify
)
186 pp_newline_and_indent (pp
, 0);
187 pp_string (pp
, "has pre/post-modify operations");
189 if (m_has_volatile_refs
)
191 pp_newline_and_indent (pp
, 0);
192 pp_string (pp
, "has volatile refs");
195 pp_indentation (pp
) -= 2;
198 auto print_accesses
= [&](const char *heading
, access_array accesses
,
201 if (!accesses
.empty ())
203 pp_newline_and_indent (pp
, 2);
204 pp_string (pp
, heading
);
205 pp_newline_and_indent (pp
, 2);
206 pp_accesses (pp
, accesses
, flags
);
207 pp_indentation (pp
) -= 4;
211 print_accesses ("uses:", uses (), PP_ACCESS_USER
);
212 auto *call_clobbers_note
= find_note
<insn_call_clobbers_note
> ();
213 if (call_clobbers_note
)
215 pp_newline_and_indent (pp
, 2);
216 pp_string (pp
, "has call clobbers for ABI ");
217 pp_decimal_int (pp
, call_clobbers_note
->abi_id ());
218 pp_indentation (pp
) -= 2;
220 print_accesses ("defines:", defs (), PP_ACCESS_SETTER
);
221 if (num_uses () == 0 && !call_clobbers_note
&& num_defs () == 0)
223 pp_newline_and_indent (pp
, 2);
224 pp_string (pp
, "has no uses or defs");
225 pp_indentation (pp
) -= 2;
228 if (order_node
*node
= get_order_node ())
230 while (node
->m_parent
)
231 node
= node
->m_parent
;
233 pp_newline_and_indent (pp
, 2);
234 pp_string (pp
, "insn order: ");
235 pp_newline_and_indent (pp
, 2);
236 auto print_order
= [](pretty_printer
*pp
, order_node
*node
)
238 print_uid (pp
, node
->uid ());
240 order_splay_tree::print (pp
, node
, print_order
);
241 pp_indentation (pp
) -= 4;
245 // Return an insn_info::order_node for INSN, creating one if necessary.
246 insn_info::order_node
*
247 function_info::need_order_node (insn_info
*insn
)
249 insn_info::order_node
*order
= insn
->get_order_node ();
252 order
= allocate
<insn_info::order_node
> (insn
->uid ());
253 insn
->add_note (order
);
258 // Add instruction INSN immediately after AFTER in the reverse postorder list.
259 // INSN is not currently in the list.
261 function_info::add_insn_after (insn_info
*insn
, insn_info
*after
)
263 gcc_checking_assert (!insn
->has_insn_links ());
265 insn
->copy_next_from (after
);
266 after
->set_next_any_insn (insn
);
268 // The prev link is easy if AFTER and INSN are the same type.
269 // Handle the other cases below.
270 if (after
->is_debug_insn () == insn
->is_debug_insn ())
271 insn
->set_prev_sametype_insn (after
);
273 if (insn_info
*next
= insn
->next_any_insn ())
275 if (insn
->is_debug_insn () == next
->is_debug_insn ())
277 // INSN might now be the start of the subsequence of debug insns,
278 // and so its prev pointer might point to the end of the subsequence
280 insn
->copy_prev_from (next
);
281 next
->set_prev_sametype_insn (insn
);
283 else if (insn
->is_debug_insn ()) // && !next->is_debug_insn ()
285 // INSN ends a subsequence of debug instructions. Find the
286 // first debug instruction in the subsequence, which might
287 // be INSN itself. (If it isn't, then AFTER is also a debug
288 // instruction and we updated INSN's prev link above.)
289 insn_info
*first
= next
->prev_nondebug_insn ()->next_any_insn ();
290 first
->set_last_debug_insn (insn
);
292 else // !insn->is_debug_insn () && next->is_debug_insn ()
293 // At present we don't (need to) support inserting a nondebug
294 // instruction between two existing debug instructions.
295 gcc_assert (!after
->is_debug_insn ());
297 // If AFTER and NEXT are separated by at least two points, we can
298 // use a unique point number for INSN. Otherwise INSN will have
299 // the same point number as AFTER.
300 insn
->set_point ((next
->point () + after
->point ()) / 2);
304 if (!insn
->is_debug_insn ())
306 insn
->set_prev_sametype_insn (m_last_nondebug_insn
);
307 m_last_nondebug_insn
= insn
;
310 // There is now at least one debug instruction after
311 // m_last_nondebug_insn: either INSN itself, or the start of
312 // a longer subsequence of debug insns that now ends with AFTER
314 m_last_nondebug_insn
->next_any_insn ()->set_last_debug_insn (insn
);
317 insn
->set_point (after
->point () + POINT_INCREASE
);
320 // If INSN's program point is the same as AFTER's, we need to use the
321 // splay tree to record their relative order.
322 if (insn
->point () == after
->point ())
324 insn_info::order_node
*after_node
= need_order_node (after
);
325 insn_info::order_node
*insn_node
= need_order_node (insn
);
326 insn_info::order_splay_tree::insert_child (after_node
, 1, insn_node
);
330 // Remove INSN from the function's list of instructions.
332 function_info::remove_insn (insn_info
*insn
)
334 if (insn_info::order_node
*order
= insn
->get_order_node ())
335 insn_info::order_splay_tree::remove_node (order
);
337 if (auto *note
= insn
->find_note
<insn_call_clobbers_note
> ())
339 ebb_call_clobbers_info
*ecc
= insn
->ebb ()->first_call_clobbers ();
340 while (ecc
->abi ()->id () != note
->abi_id ())
342 int comparison
= lookup_call_clobbers (*ecc
, insn
);
343 gcc_assert (comparison
== 0);
347 insn_info
*prev
= insn
->prev_any_insn ();
348 insn_info
*next
= insn
->next_any_insn ();
349 insn_info
*prev_nondebug
= insn
->prev_nondebug_insn ();
350 insn_info
*next_nondebug
= insn
->next_nondebug_insn ();
352 // We should never remove the entry or exit block's instructions.
353 // At present we also don't remove entire blocks, so should never
354 // remove debug instructions.
355 gcc_checking_assert (prev_nondebug
357 && !insn
->is_debug_insn ());
359 if (prev
->is_debug_insn () && next
->is_debug_insn ())
361 // We need to stitch together two subsequences of debug insns.
362 insn_info
*last
= next
->last_debug_insn ();
363 next
->set_prev_sametype_insn (prev
);
364 prev_nondebug
->next_any_insn ()->set_last_debug_insn (last
);
366 prev
->set_next_any_insn (next
);
367 next_nondebug
->set_prev_sametype_insn (prev_nondebug
);
369 insn
->clear_insn_links ();
372 // Create an artificial instruction for BB, associating it with RTL (which can
373 // be null). Add the new instruction to the end of the function's list and
374 // return the new instruction.
376 function_info::append_artificial_insn (bb_info
*bb
, rtx_insn
*rtl
)
378 insn_info
*insn
= allocate
<insn_info
> (bb
, rtl
, m_next_artificial_uid
);
379 m_next_artificial_uid
-= 1;
384 // Finish building a new list of uses and definitions for instruction INSN.
386 function_info::finish_insn_accesses (insn_info
*insn
)
388 unsigned int num_defs
= m_temp_defs
.length ();
389 unsigned int num_uses
= m_temp_uses
.length ();
390 obstack_make_room (&m_obstack
, num_defs
+ num_uses
);
393 sort_accesses (m_temp_defs
);
394 obstack_grow (&m_obstack
, m_temp_defs
.address (),
395 num_defs
* sizeof (access_info
*));
396 m_temp_defs
.truncate (0);
400 sort_accesses (m_temp_uses
);
401 obstack_grow (&m_obstack
, m_temp_uses
.address (),
402 num_uses
* sizeof (access_info
*));
403 m_temp_uses
.truncate (0);
405 void *addr
= obstack_finish (&m_obstack
);
406 insn
->set_accesses (static_cast<access_info
**> (addr
), num_defs
, num_uses
);
409 // Called while building SSA form using BI. Record that INSN contains
410 // read reference REF. If this requires new entries to be added to
411 // INSN->uses (), add those entries to the list we're building in
414 function_info::record_use (build_info
&bi
, insn_info
*insn
,
415 rtx_obj_reference ref
)
417 unsigned int regno
= ref
.regno
;
418 machine_mode mode
= ref
.is_reg () ? ref
.mode
: BLKmode
;
419 access_info
*access
= bi
.last_access
[ref
.regno
+ 1];
420 use_info
*use
= safe_dyn_cast
<use_info
*> (access
);
423 set_info
*value
= safe_dyn_cast
<set_info
*> (access
);
424 // In order to ensure that -g doesn't affect codegen, uses in debug
425 // instructions do not affect liveness, either in DF or here.
426 // This means that there might be no correct definition of the resource
427 // available (e.g. if it would require a phi node that the nondebug
428 // code doesn't need). Perhaps we could have "debug phi nodes" as
429 // well as "debug instructions", but that would require a method
430 // of building phi nodes that didn't depend on DF liveness information,
431 // and so might be significantly more expensive.
433 // Therefore, the only value we try to attach to a use by a debug
434 // instruction is VALUE itself (as we would for nondebug instructions).
435 // We then need to make a conservative check for whether VALUE is
437 auto value_is_valid
= [&]()
439 // Memmory always has a valid definition.
443 // If VALUE would lead to an uninitialized use anyway, there's
448 // If the previous definition occurs in the same EBB then it
449 // is certainly correct.
450 if (value
->ebb () == bi
.current_ebb
)
453 // If the register is live on entry to the EBB but not used
454 // within it, VALUE is the correct live-in value.
455 if (bitmap_bit_p (bi
.ebb_live_in_for_debug
, regno
))
458 // Check if VALUE is the function's only definition of REGNO
459 // and if it dominates the use.
460 if (regno
!= MEM_REGNO
461 && regno
< DF_REG_SIZE (DF
)
462 && DF_REG_DEF_COUNT (regno
) == 1
463 && dominated_by_p (CDI_DOMINATORS
, insn
->bb ()->cfg_bb (),
464 value
->bb ()->cfg_bb ()))
467 // Punt for other cases.
470 if (insn
->is_debug_insn () && !value_is_valid ())
473 use
= allocate
<use_info
> (insn
, resource_info
{ mode
, regno
}, value
);
475 m_temp_uses
.safe_push (use
);
476 bi
.last_access
[ref
.regno
+ 1] = use
;
477 use
->record_reference (ref
, true);
481 // Record the mode of the largest use. The choice is arbitrary if
482 // the instruction (unusually) references the same register in two
483 // different but equal-sized modes.
484 gcc_checking_assert (use
->insn () == insn
);
485 if (HARD_REGISTER_NUM_P (regno
)
486 && partial_subreg_p (use
->mode (), mode
))
487 use
->set_mode (mode
);
488 use
->record_reference (ref
, false);
492 // Called while building SSA form for INSN using BI. Record the effect
493 // of call clobbers in RTL. We have already added the explicit sets and
494 // clobbers for RTL, which have priority over any call clobbers.
496 function_info::record_call_clobbers (build_info
&bi
, insn_info
*insn
,
499 // See whether we should record this call in the EBB's list of
500 // call clobbers. Three things affect this choice:
502 // (1) The list is the only way we have of recording partial clobbers.
503 // All calls that only partially clobber registers must therefore
506 // (2) Adding calls to the list is much more memory-efficient than
507 // creating a long list of clobber_infos.
509 // (3) Adding calls to the list limits the ability to move definitions
510 // of registers that are normally fully or partially clobbered
511 // by the associated predefined ABI. So adding calls to the list
512 // can hamper optimization if (thanks to -fipa-ra) the number of
513 // clobbers is much smaller than the usual set.
515 // The trade-off that we currently take is to use the list if there
516 // are some registers that the call only partially clobbers or if
517 // the set of clobbers is the standard set.
518 function_abi abi
= insn_callee_abi (rtl
);
519 if (abi
.base_abi ().full_reg_clobbers () == abi
.full_reg_clobbers ()
520 || abi
.full_and_partial_reg_clobbers () != abi
.full_reg_clobbers ())
522 // Find an entry for this predefined ABI, creating one if necessary.
523 ebb_call_clobbers_info
*ecc
= bi
.current_ebb
->first_call_clobbers ();
524 while (ecc
&& ecc
->abi () != &abi
.base_abi ())
528 ecc
= allocate
<ebb_call_clobbers_info
> (&abi
.base_abi ());
529 ecc
->m_next
= bi
.current_ebb
->first_call_clobbers ();
530 bi
.current_ebb
->set_first_call_clobbers (ecc
);
533 auto abi_id
= abi
.base_abi ().id ();
534 auto *insn_clobbers
= allocate
<insn_call_clobbers_note
> (abi_id
, insn
);
535 insn
->add_note (insn_clobbers
);
537 ecc
->insert_max_node (insn_clobbers
);
540 for (unsigned int regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; ++regno
)
541 if (TEST_HARD_REG_BIT (abi
.full_reg_clobbers (), regno
))
543 def_info
*def
= m_defs
[regno
+ 1];
544 if (!def
|| def
->last_def ()->insn () != insn
)
546 def
= allocate
<clobber_info
> (insn
, regno
);
547 def
->m_is_call_clobber
= true;
549 m_temp_defs
.safe_push (def
);
550 bi
.last_access
[regno
+ 1] = def
;
555 // Called while building SSA form using BI. Record that INSN contains
556 // write reference REF. Add associated def_infos to the list of accesses
557 // that we're building in m_temp_defs. Record the register's new live
560 function_info::record_def (build_info
&bi
, insn_info
*insn
,
561 rtx_obj_reference ref
)
563 // Punt if we see multiple definitions of the same resource.
564 // This can happen for several reasons:
566 // - An instruction might store two values to memory at once, giving two
567 // distinct memory references.
569 // - An instruction might assign to multiple pieces of a wide pseudo
570 // register. For example, on 32-bit targets, an instruction might
571 // assign to both the upper and lower halves of a 64-bit pseudo register.
573 // - It's possible for the same register to be clobbered by the
574 // CALL_INSN_FUNCTION_USAGE and to be set by the main instruction
575 // pattern as well. In that case, the clobber conceptually happens
576 // before the set and can essentially be ignored.
578 // - Similarly, global registers are implicitly set by a call but can
579 // be explicitly set or clobbered as well. In that situation, the sets
580 // are listed first and should win over a clobber.
581 unsigned int regno
= ref
.regno
;
582 machine_mode mode
= ref
.is_reg () ? ref
.mode
: BLKmode
;
583 def_info
*def
= safe_dyn_cast
<def_info
*> (bi
.last_access
[ref
.regno
+ 1]);
584 if (def
&& def
->insn () == insn
)
586 if (!ref
.is_clobber ())
588 gcc_checking_assert (!is_a
<clobber_info
*> (def
));
589 def
->record_reference (ref
, false);
594 // Memory is always well-defined, so only use clobber_infos for registers.
595 if (ref
.is_reg () && ref
.is_clobber ())
596 def
= allocate
<clobber_info
> (insn
, regno
);
598 def
= allocate
<set_info
> (insn
, resource_info
{ mode
, regno
});
599 def
->record_reference (ref
, true);
601 m_temp_defs
.safe_push (def
);
602 bi
.last_access
[ref
.regno
+ 1] = def
;
605 // Called while building SSA form using BI. Add an insn_info for RTL
606 // to the block that we're current building.
608 function_info::add_insn_to_block (build_info
&bi
, rtx_insn
*rtl
)
610 insn_info
*insn
= allocate
<insn_info
> (bi
.current_bb
, rtl
, UNKNOWN_COST
);
613 vec_rtx_properties properties
;
614 properties
.add_insn (rtl
, true);
615 insn
->set_properties (properties
);
617 start_insn_accesses ();
620 for (rtx_obj_reference ref
: properties
.refs ())
622 record_use (bi
, insn
, ref
);
624 // Restore the contents of bi.last_access, which we used as a cache
625 // when assembling the uses.
626 for (access_info
*access
: m_temp_uses
)
628 unsigned int regno
= access
->regno ();
629 gcc_checking_assert (bi
.last_access
[regno
+ 1] == access
);
630 bi
.last_access
[regno
+ 1] = as_a
<use_info
*> (access
)->def ();
633 // Record the definitions.
634 for (rtx_obj_reference ref
: properties
.refs ())
636 record_def (bi
, insn
, ref
);
638 // Logically these happen before the explicit definitions, but if the
639 // explicit definitions and call clobbers reference the same register,
640 // the explicit definition should win.
641 if (auto *call_rtl
= dyn_cast
<rtx_call_insn
*> (rtl
))
642 record_call_clobbers (bi
, insn
, call_rtl
);
644 finish_insn_accesses (insn
);
647 // Check whether INSN sets any registers that are never subsequently used.
648 // If so, add REG_UNUSED notes for them. The caller has already removed
649 // any previous REG_UNUSED notes.
651 function_info::add_reg_unused_notes (insn_info
*insn
)
653 rtx_insn
*rtl
= insn
->rtl ();
655 auto handle_potential_set
= [&](rtx pattern
)
657 if (GET_CODE (pattern
) != SET
)
660 rtx dest
= SET_DEST (pattern
);
664 def_array defs
= insn
->defs ();
665 unsigned int index
= find_access_index (defs
, REGNO (dest
));
666 for (unsigned int i
= 0; i
< REG_NREGS (dest
); ++i
)
668 def_info
*def
= defs
[index
+ i
];
669 gcc_checking_assert (def
->regno () == REGNO (dest
) + i
);
670 set_info
*set
= dyn_cast
<set_info
*> (def
);
671 if (set
&& set
->has_nondebug_uses ())
674 add_reg_note (rtl
, REG_UNUSED
, dest
);
677 rtx pattern
= PATTERN (rtl
);
678 if (GET_CODE (pattern
) == PARALLEL
)
679 for (int i
= 0; i
< XVECLEN (pattern
, 0); ++i
)
680 handle_potential_set (XVECEXP (pattern
, 0, i
));
682 handle_potential_set (pattern
);
685 // Search TREE for call clobbers at INSN. Return:
687 // - less than zero if INSN occurs before the root of TREE
688 // - 0 if INSN is the root of TREE
689 // - greater than zero if INSN occurs after the root of TREE
691 rtl_ssa::lookup_call_clobbers (insn_call_clobbers_tree
&tree
, insn_info
*insn
)
693 auto compare
= [&](insn_call_clobbers_note
*clobbers
)
695 return insn
->compare_with (clobbers
->insn ());
697 return tree
.lookup (compare
);
700 // Print a description of INSN to PP.
702 rtl_ssa::pp_insn (pretty_printer
*pp
, const insn_info
*insn
)
705 pp_string (pp
, "<null>");
707 insn
->print_full (pp
);
710 // Print a description of INSN to FILE.
712 dump (FILE *file
, const insn_info
*insn
)
714 dump_using (file
, pp_insn
, insn
);
717 // Debug interface to the dump routine above.
718 void debug (const insn_info
*x
) { dump (stderr
, x
); }