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1 /* Instruction scheduling pass.
2 Copyright (C) 1992-2019 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
4 and currently maintained by, Jim Wilson (wilson@cygnus.com)
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* This pass implements list scheduling within basic blocks. It is
23 run twice: (1) after flow analysis, but before register allocation,
24 and (2) after register allocation.
25
26 The first run performs interblock scheduling, moving insns between
27 different blocks in the same "region", and the second runs only
28 basic block scheduling.
29
30 Interblock motions performed are useful motions and speculative
31 motions, including speculative loads. Motions requiring code
32 duplication are not supported. The identification of motion type
33 and the check for validity of speculative motions requires
34 construction and analysis of the function's control flow graph.
35
36 The main entry point for this pass is schedule_insns(), called for
37 each function. The work of the scheduler is organized in three
38 levels: (1) function level: insns are subject to splitting,
39 control-flow-graph is constructed, regions are computed (after
40 reload, each region is of one block), (2) region level: control
41 flow graph attributes required for interblock scheduling are
42 computed (dominators, reachability, etc.), data dependences and
43 priorities are computed, and (3) block level: insns in the block
44 are actually scheduled. */
45 \f
46 #include "config.h"
47 #include "system.h"
48 #include "coretypes.h"
49 #include "backend.h"
50 #include "target.h"
51 #include "rtl.h"
52 #include "df.h"
53 #include "memmodel.h"
54 #include "tm_p.h"
55 #include "insn-config.h"
56 #include "emit-rtl.h"
57 #include "recog.h"
58 #include "profile.h"
59 #include "insn-attr.h"
60 #include "except.h"
61 #include "params.h"
62 #include "cfganal.h"
63 #include "sched-int.h"
64 #include "sel-sched.h"
65 #include "tree-pass.h"
66 #include "dbgcnt.h"
67 #include "pretty-print.h"
68 #include "print-rtl.h"
69
70 /* Disable warnings about quoting issues in the pp_xxx calls below
71 that (intentionally) don't follow GCC diagnostic conventions. */
72 #if __GNUC__ >= 10
73 # pragma GCC diagnostic push
74 # pragma GCC diagnostic ignored "-Wformat-diag"
75 #endif
76
77 #ifdef INSN_SCHEDULING
78
79 /* Some accessor macros for h_i_d members only used within this file. */
80 #define FED_BY_SPEC_LOAD(INSN) (HID (INSN)->fed_by_spec_load)
81 #define IS_LOAD_INSN(INSN) (HID (insn)->is_load_insn)
82
83 /* nr_inter/spec counts interblock/speculative motion for the function. */
84 static int nr_inter, nr_spec;
85
86 static int is_cfg_nonregular (void);
87
88 /* Number of regions in the procedure. */
89 int nr_regions = 0;
90
91 /* Same as above before adding any new regions. */
92 static int nr_regions_initial = 0;
93
94 /* Table of region descriptions. */
95 region *rgn_table = NULL;
96
97 /* Array of lists of regions' blocks. */
98 int *rgn_bb_table = NULL;
99
100 /* Topological order of blocks in the region (if b2 is reachable from
101 b1, block_to_bb[b2] > block_to_bb[b1]). Note: A basic block is
102 always referred to by either block or b, while its topological
103 order name (in the region) is referred to by bb. */
104 int *block_to_bb = NULL;
105
106 /* The number of the region containing a block. */
107 int *containing_rgn = NULL;
108
109 /* ebb_head [i] - is index in rgn_bb_table of the head basic block of i'th ebb.
110 Currently we can get a ebb only through splitting of currently
111 scheduling block, therefore, we don't need ebb_head array for every region,
112 hence, its sufficient to hold it for current one only. */
113 int *ebb_head = NULL;
114
115 /* The minimum probability of reaching a source block so that it will be
116 considered for speculative scheduling. */
117 static int min_spec_prob;
118
119 static void find_single_block_region (bool);
120 static void find_rgns (void);
121 static bool too_large (int, int *, int *);
122
123 /* Blocks of the current region being scheduled. */
124 int current_nr_blocks;
125 int current_blocks;
126
127 /* A speculative motion requires checking live information on the path
128 from 'source' to 'target'. The split blocks are those to be checked.
129 After a speculative motion, live information should be modified in
130 the 'update' blocks.
131
132 Lists of split and update blocks for each candidate of the current
133 target are in array bblst_table. */
134 static basic_block *bblst_table;
135 static int bblst_size, bblst_last;
136
137 /* Arrays that hold the DFA state at the end of a basic block, to re-use
138 as the initial state at the start of successor blocks. The BB_STATE
139 array holds the actual DFA state, and BB_STATE_ARRAY[I] is a pointer
140 into BB_STATE for basic block I. FIXME: This should be a vec. */
141 static char *bb_state_array = NULL;
142 static state_t *bb_state = NULL;
143
144 /* Target info declarations.
145
146 The block currently being scheduled is referred to as the "target" block,
147 while other blocks in the region from which insns can be moved to the
148 target are called "source" blocks. The candidate structure holds info
149 about such sources: are they valid? Speculative? Etc. */
150 struct bblst
151 {
152 basic_block *first_member;
153 int nr_members;
154 };
155
156 struct candidate
157 {
158 char is_valid;
159 char is_speculative;
160 int src_prob;
161 bblst split_bbs;
162 bblst update_bbs;
163 };
164
165 static candidate *candidate_table;
166 #define IS_VALID(src) (candidate_table[src].is_valid)
167 #define IS_SPECULATIVE(src) (candidate_table[src].is_speculative)
168 #define IS_SPECULATIVE_INSN(INSN) \
169 (IS_SPECULATIVE (BLOCK_TO_BB (BLOCK_NUM (INSN))))
170 #define SRC_PROB(src) ( candidate_table[src].src_prob )
171
172 /* The bb being currently scheduled. */
173 int target_bb;
174
175 /* List of edges. */
176 struct edgelst
177 {
178 edge *first_member;
179 int nr_members;
180 };
181
182 static edge *edgelst_table;
183 static int edgelst_last;
184
185 static void extract_edgelst (sbitmap, edgelst *);
186
187 /* Target info functions. */
188 static void split_edges (int, int, edgelst *);
189 static void compute_trg_info (int);
190 void debug_candidate (int);
191 void debug_candidates (int);
192
193 /* Dominators array: dom[i] contains the sbitmap of dominators of
194 bb i in the region. */
195 static sbitmap *dom;
196
197 /* bb 0 is the only region entry. */
198 #define IS_RGN_ENTRY(bb) (!bb)
199
200 /* Is bb_src dominated by bb_trg. */
201 #define IS_DOMINATED(bb_src, bb_trg) \
202 ( bitmap_bit_p (dom[bb_src], bb_trg) )
203
204 /* Probability: Prob[i] is an int in [0, REG_BR_PROB_BASE] which is
205 the probability of bb i relative to the region entry. */
206 static int *prob;
207
208 /* Bit-set of edges, where bit i stands for edge i. */
209 typedef sbitmap edgeset;
210
211 /* Number of edges in the region. */
212 static int rgn_nr_edges;
213
214 /* Array of size rgn_nr_edges. */
215 static edge *rgn_edges;
216
217 /* Mapping from each edge in the graph to its number in the rgn. */
218 #define EDGE_TO_BIT(edge) ((int)(size_t)(edge)->aux)
219 #define SET_EDGE_TO_BIT(edge,nr) ((edge)->aux = (void *)(size_t)(nr))
220
221 /* The split edges of a source bb is different for each target
222 bb. In order to compute this efficiently, the 'potential-split edges'
223 are computed for each bb prior to scheduling a region. This is actually
224 the split edges of each bb relative to the region entry.
225
226 pot_split[bb] is the set of potential split edges of bb. */
227 static edgeset *pot_split;
228
229 /* For every bb, a set of its ancestor edges. */
230 static edgeset *ancestor_edges;
231
232 #define INSN_PROBABILITY(INSN) (SRC_PROB (BLOCK_TO_BB (BLOCK_NUM (INSN))))
233
234 /* Speculative scheduling functions. */
235 static int check_live_1 (int, rtx);
236 static void update_live_1 (int, rtx);
237 static int is_pfree (rtx, int, int);
238 static int find_conditional_protection (rtx_insn *, int);
239 static int is_conditionally_protected (rtx, int, int);
240 static int is_prisky (rtx, int, int);
241 static int is_exception_free (rtx_insn *, int, int);
242
243 static bool sets_likely_spilled (rtx);
244 static void sets_likely_spilled_1 (rtx, const_rtx, void *);
245 static void add_branch_dependences (rtx_insn *, rtx_insn *);
246 static void compute_block_dependences (int);
247
248 static void schedule_region (int);
249 static void concat_insn_mem_list (rtx_insn_list *, rtx_expr_list *,
250 rtx_insn_list **, rtx_expr_list **);
251 static void propagate_deps (int, class deps_desc *);
252 static void free_pending_lists (void);
253
254 /* Functions for construction of the control flow graph. */
255
256 /* Return 1 if control flow graph should not be constructed, 0 otherwise.
257
258 We decide not to build the control flow graph if there is possibly more
259 than one entry to the function, if computed branches exist, if we
260 have nonlocal gotos, or if we have an unreachable loop. */
261
262 static int
263 is_cfg_nonregular (void)
264 {
265 basic_block b;
266 rtx_insn *insn;
267
268 /* If we have a label that could be the target of a nonlocal goto, then
269 the cfg is not well structured. */
270 if (nonlocal_goto_handler_labels)
271 return 1;
272
273 /* If we have any forced labels, then the cfg is not well structured. */
274 if (forced_labels)
275 return 1;
276
277 /* If we have exception handlers, then we consider the cfg not well
278 structured. ?!? We should be able to handle this now that we
279 compute an accurate cfg for EH. */
280 if (current_function_has_exception_handlers ())
281 return 1;
282
283 /* If we have insns which refer to labels as non-jumped-to operands,
284 then we consider the cfg not well structured. */
285 FOR_EACH_BB_FN (b, cfun)
286 FOR_BB_INSNS (b, insn)
287 {
288 rtx note, set, dest;
289 rtx_insn *next;
290
291 /* If this function has a computed jump, then we consider the cfg
292 not well structured. */
293 if (JUMP_P (insn) && computed_jump_p (insn))
294 return 1;
295
296 if (!INSN_P (insn))
297 continue;
298
299 note = find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX);
300 if (note == NULL_RTX)
301 continue;
302
303 /* For that label not to be seen as a referred-to label, this
304 must be a single-set which is feeding a jump *only*. This
305 could be a conditional jump with the label split off for
306 machine-specific reasons or a casesi/tablejump. */
307 next = next_nonnote_insn (insn);
308 if (next == NULL_RTX
309 || !JUMP_P (next)
310 || (JUMP_LABEL (next) != XEXP (note, 0)
311 && find_reg_note (next, REG_LABEL_TARGET,
312 XEXP (note, 0)) == NULL_RTX)
313 || BLOCK_FOR_INSN (insn) != BLOCK_FOR_INSN (next))
314 return 1;
315
316 set = single_set (insn);
317 if (set == NULL_RTX)
318 return 1;
319
320 dest = SET_DEST (set);
321 if (!REG_P (dest) || !dead_or_set_p (next, dest))
322 return 1;
323 }
324
325 /* Unreachable loops with more than one basic block are detected
326 during the DFS traversal in find_rgns.
327
328 Unreachable loops with a single block are detected here. This
329 test is redundant with the one in find_rgns, but it's much
330 cheaper to go ahead and catch the trivial case here. */
331 FOR_EACH_BB_FN (b, cfun)
332 {
333 if (EDGE_COUNT (b->preds) == 0
334 || (single_pred_p (b)
335 && single_pred (b) == b))
336 return 1;
337 }
338
339 /* All the tests passed. Consider the cfg well structured. */
340 return 0;
341 }
342
343 /* Extract list of edges from a bitmap containing EDGE_TO_BIT bits. */
344
345 static void
346 extract_edgelst (sbitmap set, edgelst *el)
347 {
348 unsigned int i = 0;
349 sbitmap_iterator sbi;
350
351 /* edgelst table space is reused in each call to extract_edgelst. */
352 edgelst_last = 0;
353
354 el->first_member = &edgelst_table[edgelst_last];
355 el->nr_members = 0;
356
357 /* Iterate over each word in the bitset. */
358 EXECUTE_IF_SET_IN_BITMAP (set, 0, i, sbi)
359 {
360 edgelst_table[edgelst_last++] = rgn_edges[i];
361 el->nr_members++;
362 }
363 }
364
365 /* Functions for the construction of regions. */
366
367 /* Print the regions, for debugging purposes. Callable from debugger. */
368
369 DEBUG_FUNCTION void
370 debug_regions (void)
371 {
372 int rgn, bb;
373
374 fprintf (sched_dump, "\n;; ------------ REGIONS ----------\n\n");
375 for (rgn = 0; rgn < nr_regions; rgn++)
376 {
377 fprintf (sched_dump, ";;\trgn %d nr_blocks %d:\n", rgn,
378 rgn_table[rgn].rgn_nr_blocks);
379 fprintf (sched_dump, ";;\tbb/block: ");
380
381 /* We don't have ebb_head initialized yet, so we can't use
382 BB_TO_BLOCK (). */
383 current_blocks = RGN_BLOCKS (rgn);
384
385 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
386 fprintf (sched_dump, " %d/%d ", bb, rgn_bb_table[current_blocks + bb]);
387
388 fprintf (sched_dump, "\n\n");
389 }
390 }
391
392 /* Print the region's basic blocks. */
393
394 DEBUG_FUNCTION void
395 debug_region (int rgn)
396 {
397 int bb;
398
399 fprintf (stderr, "\n;; ------------ REGION %d ----------\n\n", rgn);
400 fprintf (stderr, ";;\trgn %d nr_blocks %d:\n", rgn,
401 rgn_table[rgn].rgn_nr_blocks);
402 fprintf (stderr, ";;\tbb/block: ");
403
404 /* We don't have ebb_head initialized yet, so we can't use
405 BB_TO_BLOCK (). */
406 current_blocks = RGN_BLOCKS (rgn);
407
408 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
409 fprintf (stderr, " %d/%d ", bb, rgn_bb_table[current_blocks + bb]);
410
411 fprintf (stderr, "\n\n");
412
413 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
414 {
415 dump_bb (stderr,
416 BASIC_BLOCK_FOR_FN (cfun, rgn_bb_table[current_blocks + bb]),
417 0, TDF_SLIM | TDF_BLOCKS);
418 fprintf (stderr, "\n");
419 }
420
421 fprintf (stderr, "\n");
422
423 }
424
425 /* True when a bb with index BB_INDEX contained in region RGN. */
426 static bool
427 bb_in_region_p (int bb_index, int rgn)
428 {
429 int i;
430
431 for (i = 0; i < rgn_table[rgn].rgn_nr_blocks; i++)
432 if (rgn_bb_table[current_blocks + i] == bb_index)
433 return true;
434
435 return false;
436 }
437
438 /* Dump region RGN to file F using dot syntax. */
439 void
440 dump_region_dot (FILE *f, int rgn)
441 {
442 int i;
443
444 fprintf (f, "digraph Region_%d {\n", rgn);
445
446 /* We don't have ebb_head initialized yet, so we can't use
447 BB_TO_BLOCK (). */
448 current_blocks = RGN_BLOCKS (rgn);
449
450 for (i = 0; i < rgn_table[rgn].rgn_nr_blocks; i++)
451 {
452 edge e;
453 edge_iterator ei;
454 int src_bb_num = rgn_bb_table[current_blocks + i];
455 basic_block bb = BASIC_BLOCK_FOR_FN (cfun, src_bb_num);
456
457 FOR_EACH_EDGE (e, ei, bb->succs)
458 if (bb_in_region_p (e->dest->index, rgn))
459 fprintf (f, "\t%d -> %d\n", src_bb_num, e->dest->index);
460 }
461 fprintf (f, "}\n");
462 }
463
464 /* The same, but first open a file specified by FNAME. */
465 void
466 dump_region_dot_file (const char *fname, int rgn)
467 {
468 FILE *f = fopen (fname, "wt");
469 dump_region_dot (f, rgn);
470 fclose (f);
471 }
472
473 /* Build a single block region for each basic block in the function.
474 This allows for using the same code for interblock and basic block
475 scheduling. */
476
477 static void
478 find_single_block_region (bool ebbs_p)
479 {
480 basic_block bb, ebb_start;
481 int i = 0;
482
483 nr_regions = 0;
484
485 if (ebbs_p) {
486 int probability_cutoff;
487 if (profile_info && profile_status_for_fn (cfun) == PROFILE_READ)
488 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY_FEEDBACK);
489 else
490 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY);
491 probability_cutoff = REG_BR_PROB_BASE / 100 * probability_cutoff;
492
493 FOR_EACH_BB_FN (ebb_start, cfun)
494 {
495 RGN_NR_BLOCKS (nr_regions) = 0;
496 RGN_BLOCKS (nr_regions) = i;
497 RGN_DONT_CALC_DEPS (nr_regions) = 0;
498 RGN_HAS_REAL_EBB (nr_regions) = 0;
499
500 for (bb = ebb_start; ; bb = bb->next_bb)
501 {
502 edge e;
503
504 rgn_bb_table[i] = bb->index;
505 RGN_NR_BLOCKS (nr_regions)++;
506 CONTAINING_RGN (bb->index) = nr_regions;
507 BLOCK_TO_BB (bb->index) = i - RGN_BLOCKS (nr_regions);
508 i++;
509
510 if (bb->next_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)
511 || LABEL_P (BB_HEAD (bb->next_bb)))
512 break;
513
514 e = find_fallthru_edge (bb->succs);
515 if (! e)
516 break;
517 if (e->probability.initialized_p ()
518 && e->probability.to_reg_br_prob_base () <= probability_cutoff)
519 break;
520 }
521
522 ebb_start = bb;
523 nr_regions++;
524 }
525 }
526 else
527 FOR_EACH_BB_FN (bb, cfun)
528 {
529 rgn_bb_table[nr_regions] = bb->index;
530 RGN_NR_BLOCKS (nr_regions) = 1;
531 RGN_BLOCKS (nr_regions) = nr_regions;
532 RGN_DONT_CALC_DEPS (nr_regions) = 0;
533 RGN_HAS_REAL_EBB (nr_regions) = 0;
534
535 CONTAINING_RGN (bb->index) = nr_regions;
536 BLOCK_TO_BB (bb->index) = 0;
537 nr_regions++;
538 }
539 }
540
541 /* Estimate number of the insns in the BB. */
542 static int
543 rgn_estimate_number_of_insns (basic_block bb)
544 {
545 int count;
546
547 count = INSN_LUID (BB_END (bb)) - INSN_LUID (BB_HEAD (bb));
548
549 if (MAY_HAVE_DEBUG_INSNS)
550 {
551 rtx_insn *insn;
552
553 FOR_BB_INSNS (bb, insn)
554 if (DEBUG_INSN_P (insn))
555 count--;
556 }
557
558 return count;
559 }
560
561 /* Update number of blocks and the estimate for number of insns
562 in the region. Return true if the region is "too large" for interblock
563 scheduling (compile time considerations). */
564
565 static bool
566 too_large (int block, int *num_bbs, int *num_insns)
567 {
568 (*num_bbs)++;
569 (*num_insns) += (common_sched_info->estimate_number_of_insns
570 (BASIC_BLOCK_FOR_FN (cfun, block)));
571
572 return ((*num_bbs > PARAM_VALUE (PARAM_MAX_SCHED_REGION_BLOCKS))
573 || (*num_insns > PARAM_VALUE (PARAM_MAX_SCHED_REGION_INSNS)));
574 }
575
576 /* Update_loop_relations(blk, hdr): Check if the loop headed by max_hdr[blk]
577 is still an inner loop. Put in max_hdr[blk] the header of the most inner
578 loop containing blk. */
579 #define UPDATE_LOOP_RELATIONS(blk, hdr) \
580 { \
581 if (max_hdr[blk] == -1) \
582 max_hdr[blk] = hdr; \
583 else if (dfs_nr[max_hdr[blk]] > dfs_nr[hdr]) \
584 bitmap_clear_bit (inner, hdr); \
585 else if (dfs_nr[max_hdr[blk]] < dfs_nr[hdr]) \
586 { \
587 bitmap_clear_bit (inner,max_hdr[blk]); \
588 max_hdr[blk] = hdr; \
589 } \
590 }
591
592 /* Find regions for interblock scheduling.
593
594 A region for scheduling can be:
595
596 * A loop-free procedure, or
597
598 * A reducible inner loop, or
599
600 * A basic block not contained in any other region.
601
602 ?!? In theory we could build other regions based on extended basic
603 blocks or reverse extended basic blocks. Is it worth the trouble?
604
605 Loop blocks that form a region are put into the region's block list
606 in topological order.
607
608 This procedure stores its results into the following global (ick) variables
609
610 * rgn_nr
611 * rgn_table
612 * rgn_bb_table
613 * block_to_bb
614 * containing region
615
616 We use dominator relationships to avoid making regions out of non-reducible
617 loops.
618
619 This procedure needs to be converted to work on pred/succ lists instead
620 of edge tables. That would simplify it somewhat. */
621
622 static void
623 haifa_find_rgns (void)
624 {
625 int *max_hdr, *dfs_nr, *degree;
626 char no_loops = 1;
627 int node, child, loop_head, i, head, tail;
628 int count = 0, sp, idx = 0;
629 edge_iterator current_edge;
630 edge_iterator *stack;
631 int num_bbs, num_insns, unreachable;
632 int too_large_failure;
633 basic_block bb;
634
635 /* Perform a DFS traversal of the cfg. Identify loop headers, inner loops
636 and a mapping from block to its loop header (if the block is contained
637 in a loop, else -1).
638
639 Store results in HEADER, INNER, and MAX_HDR respectively, these will
640 be used as inputs to the second traversal.
641
642 STACK, SP and DFS_NR are only used during the first traversal. */
643
644 /* Allocate and initialize variables for the first traversal. */
645 max_hdr = XNEWVEC (int, last_basic_block_for_fn (cfun));
646 dfs_nr = XCNEWVEC (int, last_basic_block_for_fn (cfun));
647 stack = XNEWVEC (edge_iterator, n_edges_for_fn (cfun));
648
649 /* Note if a block is a natural inner loop header. */
650 auto_sbitmap inner (last_basic_block_for_fn (cfun));
651 bitmap_ones (inner);
652
653 /* Note if a block is a natural loop header. */
654 auto_sbitmap header (last_basic_block_for_fn (cfun));
655 bitmap_clear (header);
656
657 /* Note if a block is in the block queue. */
658 auto_sbitmap in_queue (last_basic_block_for_fn (cfun));
659 bitmap_clear (in_queue);
660
661 /* Note if a block is in the block queue. */
662 auto_sbitmap in_stack (last_basic_block_for_fn (cfun));
663 bitmap_clear (in_stack);
664
665 for (i = 0; i < last_basic_block_for_fn (cfun); i++)
666 max_hdr[i] = -1;
667
668 #define EDGE_PASSED(E) (ei_end_p ((E)) || ei_edge ((E))->aux)
669 #define SET_EDGE_PASSED(E) (ei_edge ((E))->aux = ei_edge ((E)))
670
671 /* DFS traversal to find inner loops in the cfg. */
672
673 current_edge = ei_start (single_succ (ENTRY_BLOCK_PTR_FOR_FN (cfun))->succs);
674 sp = -1;
675
676 while (1)
677 {
678 if (EDGE_PASSED (current_edge))
679 {
680 /* We have reached a leaf node or a node that was already
681 processed. Pop edges off the stack until we find
682 an edge that has not yet been processed. */
683 while (sp >= 0 && EDGE_PASSED (current_edge))
684 {
685 /* Pop entry off the stack. */
686 current_edge = stack[sp--];
687 node = ei_edge (current_edge)->src->index;
688 gcc_assert (node != ENTRY_BLOCK);
689 child = ei_edge (current_edge)->dest->index;
690 gcc_assert (child != EXIT_BLOCK);
691 bitmap_clear_bit (in_stack, child);
692 if (max_hdr[child] >= 0 && bitmap_bit_p (in_stack, max_hdr[child]))
693 UPDATE_LOOP_RELATIONS (node, max_hdr[child]);
694 ei_next (&current_edge);
695 }
696
697 /* See if have finished the DFS tree traversal. */
698 if (sp < 0 && EDGE_PASSED (current_edge))
699 break;
700
701 /* Nope, continue the traversal with the popped node. */
702 continue;
703 }
704
705 /* Process a node. */
706 node = ei_edge (current_edge)->src->index;
707 gcc_assert (node != ENTRY_BLOCK);
708 bitmap_set_bit (in_stack, node);
709 dfs_nr[node] = ++count;
710
711 /* We don't traverse to the exit block. */
712 child = ei_edge (current_edge)->dest->index;
713 if (child == EXIT_BLOCK)
714 {
715 SET_EDGE_PASSED (current_edge);
716 ei_next (&current_edge);
717 continue;
718 }
719
720 /* If the successor is in the stack, then we've found a loop.
721 Mark the loop, if it is not a natural loop, then it will
722 be rejected during the second traversal. */
723 if (bitmap_bit_p (in_stack, child))
724 {
725 no_loops = 0;
726 bitmap_set_bit (header, child);
727 UPDATE_LOOP_RELATIONS (node, child);
728 SET_EDGE_PASSED (current_edge);
729 ei_next (&current_edge);
730 continue;
731 }
732
733 /* If the child was already visited, then there is no need to visit
734 it again. Just update the loop relationships and restart
735 with a new edge. */
736 if (dfs_nr[child])
737 {
738 if (max_hdr[child] >= 0 && bitmap_bit_p (in_stack, max_hdr[child]))
739 UPDATE_LOOP_RELATIONS (node, max_hdr[child]);
740 SET_EDGE_PASSED (current_edge);
741 ei_next (&current_edge);
742 continue;
743 }
744
745 /* Push an entry on the stack and continue DFS traversal. */
746 stack[++sp] = current_edge;
747 SET_EDGE_PASSED (current_edge);
748 current_edge = ei_start (ei_edge (current_edge)->dest->succs);
749 }
750
751 /* Reset ->aux field used by EDGE_PASSED. */
752 FOR_ALL_BB_FN (bb, cfun)
753 {
754 edge_iterator ei;
755 edge e;
756 FOR_EACH_EDGE (e, ei, bb->succs)
757 e->aux = NULL;
758 }
759
760
761 /* Another check for unreachable blocks. The earlier test in
762 is_cfg_nonregular only finds unreachable blocks that do not
763 form a loop.
764
765 The DFS traversal will mark every block that is reachable from
766 the entry node by placing a nonzero value in dfs_nr. Thus if
767 dfs_nr is zero for any block, then it must be unreachable. */
768 unreachable = 0;
769 FOR_EACH_BB_FN (bb, cfun)
770 if (dfs_nr[bb->index] == 0)
771 {
772 unreachable = 1;
773 break;
774 }
775
776 /* Gross. To avoid wasting memory, the second pass uses the dfs_nr array
777 to hold degree counts. */
778 degree = dfs_nr;
779
780 FOR_EACH_BB_FN (bb, cfun)
781 degree[bb->index] = EDGE_COUNT (bb->preds);
782
783 /* Do not perform region scheduling if there are any unreachable
784 blocks. */
785 if (!unreachable)
786 {
787 int *queue, *degree1 = NULL;
788 /* We use EXTENDED_RGN_HEADER as an addition to HEADER and put
789 there basic blocks, which are forced to be region heads.
790 This is done to try to assemble few smaller regions
791 from a too_large region. */
792 sbitmap extended_rgn_header = NULL;
793 bool extend_regions_p;
794
795 if (no_loops)
796 bitmap_set_bit (header, 0);
797
798 /* Second traversal:find reducible inner loops and topologically sort
799 block of each region. */
800
801 queue = XNEWVEC (int, n_basic_blocks_for_fn (cfun));
802
803 extend_regions_p = PARAM_VALUE (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS) > 0;
804 if (extend_regions_p)
805 {
806 degree1 = XNEWVEC (int, last_basic_block_for_fn (cfun));
807 extended_rgn_header =
808 sbitmap_alloc (last_basic_block_for_fn (cfun));
809 bitmap_clear (extended_rgn_header);
810 }
811
812 /* Find blocks which are inner loop headers. We still have non-reducible
813 loops to consider at this point. */
814 FOR_EACH_BB_FN (bb, cfun)
815 {
816 if (bitmap_bit_p (header, bb->index) && bitmap_bit_p (inner, bb->index))
817 {
818 edge e;
819 edge_iterator ei;
820 basic_block jbb;
821
822 /* Now check that the loop is reducible. We do this separate
823 from finding inner loops so that we do not find a reducible
824 loop which contains an inner non-reducible loop.
825
826 A simple way to find reducible/natural loops is to verify
827 that each block in the loop is dominated by the loop
828 header.
829
830 If there exists a block that is not dominated by the loop
831 header, then the block is reachable from outside the loop
832 and thus the loop is not a natural loop. */
833 FOR_EACH_BB_FN (jbb, cfun)
834 {
835 /* First identify blocks in the loop, except for the loop
836 entry block. */
837 if (bb->index == max_hdr[jbb->index] && bb != jbb)
838 {
839 /* Now verify that the block is dominated by the loop
840 header. */
841 if (!dominated_by_p (CDI_DOMINATORS, jbb, bb))
842 break;
843 }
844 }
845
846 /* If we exited the loop early, then I is the header of
847 a non-reducible loop and we should quit processing it
848 now. */
849 if (jbb != EXIT_BLOCK_PTR_FOR_FN (cfun))
850 continue;
851
852 /* I is a header of an inner loop, or block 0 in a subroutine
853 with no loops at all. */
854 head = tail = -1;
855 too_large_failure = 0;
856 loop_head = max_hdr[bb->index];
857
858 if (extend_regions_p)
859 /* We save degree in case when we meet a too_large region
860 and cancel it. We need a correct degree later when
861 calling extend_rgns. */
862 memcpy (degree1, degree,
863 last_basic_block_for_fn (cfun) * sizeof (int));
864
865 /* Decrease degree of all I's successors for topological
866 ordering. */
867 FOR_EACH_EDGE (e, ei, bb->succs)
868 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
869 --degree[e->dest->index];
870
871 /* Estimate # insns, and count # blocks in the region. */
872 num_bbs = 1;
873 num_insns = common_sched_info->estimate_number_of_insns (bb);
874
875 /* Find all loop latches (blocks with back edges to the loop
876 header) or all the leaf blocks in the cfg has no loops.
877
878 Place those blocks into the queue. */
879 if (no_loops)
880 {
881 FOR_EACH_BB_FN (jbb, cfun)
882 /* Leaf nodes have only a single successor which must
883 be EXIT_BLOCK. */
884 if (single_succ_p (jbb)
885 && single_succ (jbb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
886 {
887 queue[++tail] = jbb->index;
888 bitmap_set_bit (in_queue, jbb->index);
889
890 if (too_large (jbb->index, &num_bbs, &num_insns))
891 {
892 too_large_failure = 1;
893 break;
894 }
895 }
896 }
897 else
898 {
899 edge e;
900
901 FOR_EACH_EDGE (e, ei, bb->preds)
902 {
903 if (e->src == ENTRY_BLOCK_PTR_FOR_FN (cfun))
904 continue;
905
906 node = e->src->index;
907
908 if (max_hdr[node] == loop_head && node != bb->index)
909 {
910 /* This is a loop latch. */
911 queue[++tail] = node;
912 bitmap_set_bit (in_queue, node);
913
914 if (too_large (node, &num_bbs, &num_insns))
915 {
916 too_large_failure = 1;
917 break;
918 }
919 }
920 }
921 }
922
923 /* Now add all the blocks in the loop to the queue.
924
925 We know the loop is a natural loop; however the algorithm
926 above will not always mark certain blocks as being in the
927 loop. Consider:
928 node children
929 a b,c
930 b c
931 c a,d
932 d b
933
934 The algorithm in the DFS traversal may not mark B & D as part
935 of the loop (i.e. they will not have max_hdr set to A).
936
937 We know they cannot be loop latches (else they would have
938 had max_hdr set since they'd have a backedge to a dominator
939 block). So we don't need them on the initial queue.
940
941 We know they are part of the loop because they are dominated
942 by the loop header and can be reached by a backwards walk of
943 the edges starting with nodes on the initial queue.
944
945 It is safe and desirable to include those nodes in the
946 loop/scheduling region. To do so we would need to decrease
947 the degree of a node if it is the target of a backedge
948 within the loop itself as the node is placed in the queue.
949
950 We do not do this because I'm not sure that the actual
951 scheduling code will properly handle this case. ?!? */
952
953 while (head < tail && !too_large_failure)
954 {
955 edge e;
956 child = queue[++head];
957
958 FOR_EACH_EDGE (e, ei,
959 BASIC_BLOCK_FOR_FN (cfun, child)->preds)
960 {
961 node = e->src->index;
962
963 /* See discussion above about nodes not marked as in
964 this loop during the initial DFS traversal. */
965 if (e->src == ENTRY_BLOCK_PTR_FOR_FN (cfun)
966 || max_hdr[node] != loop_head)
967 {
968 tail = -1;
969 break;
970 }
971 else if (!bitmap_bit_p (in_queue, node) && node != bb->index)
972 {
973 queue[++tail] = node;
974 bitmap_set_bit (in_queue, node);
975
976 if (too_large (node, &num_bbs, &num_insns))
977 {
978 too_large_failure = 1;
979 break;
980 }
981 }
982 }
983 }
984
985 if (tail >= 0 && !too_large_failure)
986 {
987 /* Place the loop header into list of region blocks. */
988 degree[bb->index] = -1;
989 rgn_bb_table[idx] = bb->index;
990 RGN_NR_BLOCKS (nr_regions) = num_bbs;
991 RGN_BLOCKS (nr_regions) = idx++;
992 RGN_DONT_CALC_DEPS (nr_regions) = 0;
993 RGN_HAS_REAL_EBB (nr_regions) = 0;
994 CONTAINING_RGN (bb->index) = nr_regions;
995 BLOCK_TO_BB (bb->index) = count = 0;
996
997 /* Remove blocks from queue[] when their in degree
998 becomes zero. Repeat until no blocks are left on the
999 list. This produces a topological list of blocks in
1000 the region. */
1001 while (tail >= 0)
1002 {
1003 if (head < 0)
1004 head = tail;
1005 child = queue[head];
1006 if (degree[child] == 0)
1007 {
1008 edge e;
1009
1010 degree[child] = -1;
1011 rgn_bb_table[idx++] = child;
1012 BLOCK_TO_BB (child) = ++count;
1013 CONTAINING_RGN (child) = nr_regions;
1014 queue[head] = queue[tail--];
1015
1016 FOR_EACH_EDGE (e, ei,
1017 BASIC_BLOCK_FOR_FN (cfun,
1018 child)->succs)
1019 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1020 --degree[e->dest->index];
1021 }
1022 else
1023 --head;
1024 }
1025 ++nr_regions;
1026 }
1027 else if (extend_regions_p)
1028 {
1029 /* Restore DEGREE. */
1030 int *t = degree;
1031
1032 degree = degree1;
1033 degree1 = t;
1034
1035 /* And force successors of BB to be region heads.
1036 This may provide several smaller regions instead
1037 of one too_large region. */
1038 FOR_EACH_EDGE (e, ei, bb->succs)
1039 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1040 bitmap_set_bit (extended_rgn_header, e->dest->index);
1041 }
1042 }
1043 }
1044 free (queue);
1045
1046 if (extend_regions_p)
1047 {
1048 free (degree1);
1049
1050 bitmap_ior (header, header, extended_rgn_header);
1051 sbitmap_free (extended_rgn_header);
1052
1053 extend_rgns (degree, &idx, header, max_hdr);
1054 }
1055 }
1056
1057 /* Any block that did not end up in a region is placed into a region
1058 by itself. */
1059 FOR_EACH_BB_FN (bb, cfun)
1060 if (degree[bb->index] >= 0)
1061 {
1062 rgn_bb_table[idx] = bb->index;
1063 RGN_NR_BLOCKS (nr_regions) = 1;
1064 RGN_BLOCKS (nr_regions) = idx++;
1065 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1066 RGN_HAS_REAL_EBB (nr_regions) = 0;
1067 CONTAINING_RGN (bb->index) = nr_regions++;
1068 BLOCK_TO_BB (bb->index) = 0;
1069 }
1070
1071 free (max_hdr);
1072 free (degree);
1073 free (stack);
1074 }
1075
1076
1077 /* Wrapper function.
1078 If FLAG_SEL_SCHED_PIPELINING is set, then use custom function to form
1079 regions. Otherwise just call find_rgns_haifa. */
1080 static void
1081 find_rgns (void)
1082 {
1083 if (sel_sched_p () && flag_sel_sched_pipelining)
1084 sel_find_rgns ();
1085 else
1086 haifa_find_rgns ();
1087 }
1088
1089 static int gather_region_statistics (int **);
1090 static void print_region_statistics (int *, int, int *, int);
1091
1092 /* Calculate the histogram that shows the number of regions having the
1093 given number of basic blocks, and store it in the RSP array. Return
1094 the size of this array. */
1095 static int
1096 gather_region_statistics (int **rsp)
1097 {
1098 int i, *a = 0, a_sz = 0;
1099
1100 /* a[i] is the number of regions that have (i + 1) basic blocks. */
1101 for (i = 0; i < nr_regions; i++)
1102 {
1103 int nr_blocks = RGN_NR_BLOCKS (i);
1104
1105 gcc_assert (nr_blocks >= 1);
1106
1107 if (nr_blocks > a_sz)
1108 {
1109 a = XRESIZEVEC (int, a, nr_blocks);
1110 do
1111 a[a_sz++] = 0;
1112 while (a_sz != nr_blocks);
1113 }
1114
1115 a[nr_blocks - 1]++;
1116 }
1117
1118 *rsp = a;
1119 return a_sz;
1120 }
1121
1122 /* Print regions statistics. S1 and S2 denote the data before and after
1123 calling extend_rgns, respectively. */
1124 static void
1125 print_region_statistics (int *s1, int s1_sz, int *s2, int s2_sz)
1126 {
1127 int i;
1128
1129 /* We iterate until s2_sz because extend_rgns does not decrease
1130 the maximal region size. */
1131 for (i = 1; i < s2_sz; i++)
1132 {
1133 int n1, n2;
1134
1135 n2 = s2[i];
1136
1137 if (n2 == 0)
1138 continue;
1139
1140 if (i >= s1_sz)
1141 n1 = 0;
1142 else
1143 n1 = s1[i];
1144
1145 fprintf (sched_dump, ";; Region extension statistics: size %d: " \
1146 "was %d + %d more\n", i + 1, n1, n2 - n1);
1147 }
1148 }
1149
1150 /* Extend regions.
1151 DEGREE - Array of incoming edge count, considering only
1152 the edges, that don't have their sources in formed regions yet.
1153 IDXP - pointer to the next available index in rgn_bb_table.
1154 HEADER - set of all region heads.
1155 LOOP_HDR - mapping from block to the containing loop
1156 (two blocks can reside within one region if they have
1157 the same loop header). */
1158 void
1159 extend_rgns (int *degree, int *idxp, sbitmap header, int *loop_hdr)
1160 {
1161 int *order, i, rescan = 0, idx = *idxp, iter = 0, max_iter, *max_hdr;
1162 int nblocks = n_basic_blocks_for_fn (cfun) - NUM_FIXED_BLOCKS;
1163
1164 max_iter = PARAM_VALUE (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS);
1165
1166 max_hdr = XNEWVEC (int, last_basic_block_for_fn (cfun));
1167
1168 order = XNEWVEC (int, last_basic_block_for_fn (cfun));
1169 post_order_compute (order, false, false);
1170
1171 for (i = nblocks - 1; i >= 0; i--)
1172 {
1173 int bbn = order[i];
1174 if (degree[bbn] >= 0)
1175 {
1176 max_hdr[bbn] = bbn;
1177 rescan = 1;
1178 }
1179 else
1180 /* This block already was processed in find_rgns. */
1181 max_hdr[bbn] = -1;
1182 }
1183
1184 /* The idea is to topologically walk through CFG in top-down order.
1185 During the traversal, if all the predecessors of a node are
1186 marked to be in the same region (they all have the same max_hdr),
1187 then current node is also marked to be a part of that region.
1188 Otherwise the node starts its own region.
1189 CFG should be traversed until no further changes are made. On each
1190 iteration the set of the region heads is extended (the set of those
1191 blocks that have max_hdr[bbi] == bbi). This set is upper bounded by the
1192 set of all basic blocks, thus the algorithm is guaranteed to
1193 terminate. */
1194
1195 while (rescan && iter < max_iter)
1196 {
1197 rescan = 0;
1198
1199 for (i = nblocks - 1; i >= 0; i--)
1200 {
1201 edge e;
1202 edge_iterator ei;
1203 int bbn = order[i];
1204
1205 if (max_hdr[bbn] != -1 && !bitmap_bit_p (header, bbn))
1206 {
1207 int hdr = -1;
1208
1209 FOR_EACH_EDGE (e, ei, BASIC_BLOCK_FOR_FN (cfun, bbn)->preds)
1210 {
1211 int predn = e->src->index;
1212
1213 if (predn != ENTRY_BLOCK
1214 /* If pred wasn't processed in find_rgns. */
1215 && max_hdr[predn] != -1
1216 /* And pred and bb reside in the same loop.
1217 (Or out of any loop). */
1218 && loop_hdr[bbn] == loop_hdr[predn])
1219 {
1220 if (hdr == -1)
1221 /* Then bb extends the containing region of pred. */
1222 hdr = max_hdr[predn];
1223 else if (hdr != max_hdr[predn])
1224 /* Too bad, there are at least two predecessors
1225 that reside in different regions. Thus, BB should
1226 begin its own region. */
1227 {
1228 hdr = bbn;
1229 break;
1230 }
1231 }
1232 else
1233 /* BB starts its own region. */
1234 {
1235 hdr = bbn;
1236 break;
1237 }
1238 }
1239
1240 if (hdr == bbn)
1241 {
1242 /* If BB start its own region,
1243 update set of headers with BB. */
1244 bitmap_set_bit (header, bbn);
1245 rescan = 1;
1246 }
1247 else
1248 gcc_assert (hdr != -1);
1249
1250 max_hdr[bbn] = hdr;
1251 }
1252 }
1253
1254 iter++;
1255 }
1256
1257 /* Statistics were gathered on the SPEC2000 package of tests with
1258 mainline weekly snapshot gcc-4.1-20051015 on ia64.
1259
1260 Statistics for SPECint:
1261 1 iteration : 1751 cases (38.7%)
1262 2 iterations: 2770 cases (61.3%)
1263 Blocks wrapped in regions by find_rgns without extension: 18295 blocks
1264 Blocks wrapped in regions by 2 iterations in extend_rgns: 23821 blocks
1265 (We don't count single block regions here).
1266
1267 Statistics for SPECfp:
1268 1 iteration : 621 cases (35.9%)
1269 2 iterations: 1110 cases (64.1%)
1270 Blocks wrapped in regions by find_rgns without extension: 6476 blocks
1271 Blocks wrapped in regions by 2 iterations in extend_rgns: 11155 blocks
1272 (We don't count single block regions here).
1273
1274 By default we do at most 2 iterations.
1275 This can be overridden with max-sched-extend-regions-iters parameter:
1276 0 - disable region extension,
1277 N > 0 - do at most N iterations. */
1278
1279 if (sched_verbose && iter != 0)
1280 fprintf (sched_dump, ";; Region extension iterations: %d%s\n", iter,
1281 rescan ? "... failed" : "");
1282
1283 if (!rescan && iter != 0)
1284 {
1285 int *s1 = NULL, s1_sz = 0;
1286
1287 /* Save the old statistics for later printout. */
1288 if (sched_verbose >= 6)
1289 s1_sz = gather_region_statistics (&s1);
1290
1291 /* We have succeeded. Now assemble the regions. */
1292 for (i = nblocks - 1; i >= 0; i--)
1293 {
1294 int bbn = order[i];
1295
1296 if (max_hdr[bbn] == bbn)
1297 /* BBN is a region head. */
1298 {
1299 edge e;
1300 edge_iterator ei;
1301 int num_bbs = 0, j, num_insns = 0, large;
1302
1303 large = too_large (bbn, &num_bbs, &num_insns);
1304
1305 degree[bbn] = -1;
1306 rgn_bb_table[idx] = bbn;
1307 RGN_BLOCKS (nr_regions) = idx++;
1308 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1309 RGN_HAS_REAL_EBB (nr_regions) = 0;
1310 CONTAINING_RGN (bbn) = nr_regions;
1311 BLOCK_TO_BB (bbn) = 0;
1312
1313 FOR_EACH_EDGE (e, ei, BASIC_BLOCK_FOR_FN (cfun, bbn)->succs)
1314 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1315 degree[e->dest->index]--;
1316
1317 if (!large)
1318 /* Here we check whether the region is too_large. */
1319 for (j = i - 1; j >= 0; j--)
1320 {
1321 int succn = order[j];
1322 if (max_hdr[succn] == bbn)
1323 {
1324 if ((large = too_large (succn, &num_bbs, &num_insns)))
1325 break;
1326 }
1327 }
1328
1329 if (large)
1330 /* If the region is too_large, then wrap every block of
1331 the region into single block region.
1332 Here we wrap region head only. Other blocks are
1333 processed in the below cycle. */
1334 {
1335 RGN_NR_BLOCKS (nr_regions) = 1;
1336 nr_regions++;
1337 }
1338
1339 num_bbs = 1;
1340
1341 for (j = i - 1; j >= 0; j--)
1342 {
1343 int succn = order[j];
1344
1345 if (max_hdr[succn] == bbn)
1346 /* This cycle iterates over all basic blocks, that
1347 are supposed to be in the region with head BBN,
1348 and wraps them into that region (or in single
1349 block region). */
1350 {
1351 gcc_assert (degree[succn] == 0);
1352
1353 degree[succn] = -1;
1354 rgn_bb_table[idx] = succn;
1355 BLOCK_TO_BB (succn) = large ? 0 : num_bbs++;
1356 CONTAINING_RGN (succn) = nr_regions;
1357
1358 if (large)
1359 /* Wrap SUCCN into single block region. */
1360 {
1361 RGN_BLOCKS (nr_regions) = idx;
1362 RGN_NR_BLOCKS (nr_regions) = 1;
1363 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1364 RGN_HAS_REAL_EBB (nr_regions) = 0;
1365 nr_regions++;
1366 }
1367
1368 idx++;
1369
1370 FOR_EACH_EDGE (e, ei,
1371 BASIC_BLOCK_FOR_FN (cfun, succn)->succs)
1372 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1373 degree[e->dest->index]--;
1374 }
1375 }
1376
1377 if (!large)
1378 {
1379 RGN_NR_BLOCKS (nr_regions) = num_bbs;
1380 nr_regions++;
1381 }
1382 }
1383 }
1384
1385 if (sched_verbose >= 6)
1386 {
1387 int *s2, s2_sz;
1388
1389 /* Get the new statistics and print the comparison with the
1390 one before calling this function. */
1391 s2_sz = gather_region_statistics (&s2);
1392 print_region_statistics (s1, s1_sz, s2, s2_sz);
1393 free (s1);
1394 free (s2);
1395 }
1396 }
1397
1398 free (order);
1399 free (max_hdr);
1400
1401 *idxp = idx;
1402 }
1403
1404 /* Functions for regions scheduling information. */
1405
1406 /* Compute dominators, probability, and potential-split-edges of bb.
1407 Assume that these values were already computed for bb's predecessors. */
1408
1409 static void
1410 compute_dom_prob_ps (int bb)
1411 {
1412 edge_iterator in_ei;
1413 edge in_edge;
1414
1415 /* We shouldn't have any real ebbs yet. */
1416 gcc_assert (ebb_head [bb] == bb + current_blocks);
1417
1418 if (IS_RGN_ENTRY (bb))
1419 {
1420 bitmap_set_bit (dom[bb], 0);
1421 prob[bb] = REG_BR_PROB_BASE;
1422 return;
1423 }
1424
1425 prob[bb] = 0;
1426
1427 /* Initialize dom[bb] to '111..1'. */
1428 bitmap_ones (dom[bb]);
1429
1430 FOR_EACH_EDGE (in_edge, in_ei,
1431 BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (bb))->preds)
1432 {
1433 int pred_bb;
1434 edge out_edge;
1435 edge_iterator out_ei;
1436
1437 if (in_edge->src == ENTRY_BLOCK_PTR_FOR_FN (cfun))
1438 continue;
1439
1440 pred_bb = BLOCK_TO_BB (in_edge->src->index);
1441 bitmap_and (dom[bb], dom[bb], dom[pred_bb]);
1442 bitmap_ior (ancestor_edges[bb],
1443 ancestor_edges[bb], ancestor_edges[pred_bb]);
1444
1445 bitmap_set_bit (ancestor_edges[bb], EDGE_TO_BIT (in_edge));
1446
1447 bitmap_ior (pot_split[bb], pot_split[bb], pot_split[pred_bb]);
1448
1449 FOR_EACH_EDGE (out_edge, out_ei, in_edge->src->succs)
1450 bitmap_set_bit (pot_split[bb], EDGE_TO_BIT (out_edge));
1451
1452 prob[bb] += combine_probabilities
1453 (prob[pred_bb],
1454 in_edge->probability.initialized_p ()
1455 ? in_edge->probability.to_reg_br_prob_base ()
1456 : 0);
1457 // The rounding divide in combine_probabilities can result in an extra
1458 // probability increment propagating along 50-50 edges. Eventually when
1459 // the edges re-merge, the accumulated probability can go slightly above
1460 // REG_BR_PROB_BASE.
1461 if (prob[bb] > REG_BR_PROB_BASE)
1462 prob[bb] = REG_BR_PROB_BASE;
1463 }
1464
1465 bitmap_set_bit (dom[bb], bb);
1466 bitmap_and_compl (pot_split[bb], pot_split[bb], ancestor_edges[bb]);
1467
1468 if (sched_verbose >= 2)
1469 fprintf (sched_dump, ";; bb_prob(%d, %d) = %3d\n", bb, BB_TO_BLOCK (bb),
1470 (100 * prob[bb]) / REG_BR_PROB_BASE);
1471 }
1472
1473 /* Functions for target info. */
1474
1475 /* Compute in BL the list of split-edges of bb_src relatively to bb_trg.
1476 Note that bb_trg dominates bb_src. */
1477
1478 static void
1479 split_edges (int bb_src, int bb_trg, edgelst *bl)
1480 {
1481 auto_sbitmap src (SBITMAP_SIZE (pot_split[bb_src]));
1482 bitmap_copy (src, pot_split[bb_src]);
1483
1484 bitmap_and_compl (src, src, pot_split[bb_trg]);
1485 extract_edgelst (src, bl);
1486 }
1487
1488 /* Find the valid candidate-source-blocks for the target block TRG, compute
1489 their probability, and check if they are speculative or not.
1490 For speculative sources, compute their update-blocks and split-blocks. */
1491
1492 static void
1493 compute_trg_info (int trg)
1494 {
1495 candidate *sp;
1496 edgelst el = { NULL, 0 };
1497 int i, j, k, update_idx;
1498 basic_block block;
1499 edge_iterator ei;
1500 edge e;
1501
1502 candidate_table = XNEWVEC (candidate, current_nr_blocks);
1503
1504 bblst_last = 0;
1505 /* bblst_table holds split blocks and update blocks for each block after
1506 the current one in the region. split blocks and update blocks are
1507 the TO blocks of region edges, so there can be at most rgn_nr_edges
1508 of them. */
1509 bblst_size = (current_nr_blocks - target_bb) * rgn_nr_edges;
1510 bblst_table = XNEWVEC (basic_block, bblst_size);
1511
1512 edgelst_last = 0;
1513 edgelst_table = XNEWVEC (edge, rgn_nr_edges);
1514
1515 /* Define some of the fields for the target bb as well. */
1516 sp = candidate_table + trg;
1517 sp->is_valid = 1;
1518 sp->is_speculative = 0;
1519 sp->src_prob = REG_BR_PROB_BASE;
1520
1521 auto_sbitmap visited (last_basic_block_for_fn (cfun));
1522
1523 for (i = trg + 1; i < current_nr_blocks; i++)
1524 {
1525 sp = candidate_table + i;
1526
1527 sp->is_valid = IS_DOMINATED (i, trg);
1528 if (sp->is_valid)
1529 {
1530 int tf = prob[trg], cf = prob[i];
1531
1532 /* In CFGs with low probability edges TF can possibly be zero. */
1533 sp->src_prob = (tf ? GCOV_COMPUTE_SCALE (cf, tf) : 0);
1534 sp->is_valid = (sp->src_prob >= min_spec_prob);
1535 }
1536
1537 if (sp->is_valid)
1538 {
1539 split_edges (i, trg, &el);
1540 sp->is_speculative = (el.nr_members) ? 1 : 0;
1541 if (sp->is_speculative && !flag_schedule_speculative)
1542 sp->is_valid = 0;
1543 }
1544
1545 if (sp->is_valid)
1546 {
1547 /* Compute split blocks and store them in bblst_table.
1548 The TO block of every split edge is a split block. */
1549 sp->split_bbs.first_member = &bblst_table[bblst_last];
1550 sp->split_bbs.nr_members = el.nr_members;
1551 for (j = 0; j < el.nr_members; bblst_last++, j++)
1552 bblst_table[bblst_last] = el.first_member[j]->dest;
1553 sp->update_bbs.first_member = &bblst_table[bblst_last];
1554
1555 /* Compute update blocks and store them in bblst_table.
1556 For every split edge, look at the FROM block, and check
1557 all out edges. For each out edge that is not a split edge,
1558 add the TO block to the update block list. This list can end
1559 up with a lot of duplicates. We need to weed them out to avoid
1560 overrunning the end of the bblst_table. */
1561
1562 update_idx = 0;
1563 bitmap_clear (visited);
1564 for (j = 0; j < el.nr_members; j++)
1565 {
1566 block = el.first_member[j]->src;
1567 FOR_EACH_EDGE (e, ei, block->succs)
1568 {
1569 if (!bitmap_bit_p (visited, e->dest->index))
1570 {
1571 for (k = 0; k < el.nr_members; k++)
1572 if (e == el.first_member[k])
1573 break;
1574
1575 if (k >= el.nr_members)
1576 {
1577 bblst_table[bblst_last++] = e->dest;
1578 bitmap_set_bit (visited, e->dest->index);
1579 update_idx++;
1580 }
1581 }
1582 }
1583 }
1584 sp->update_bbs.nr_members = update_idx;
1585
1586 /* Make sure we didn't overrun the end of bblst_table. */
1587 gcc_assert (bblst_last <= bblst_size);
1588 }
1589 else
1590 {
1591 sp->split_bbs.nr_members = sp->update_bbs.nr_members = 0;
1592
1593 sp->is_speculative = 0;
1594 sp->src_prob = 0;
1595 }
1596 }
1597 }
1598
1599 /* Free the computed target info. */
1600 static void
1601 free_trg_info (void)
1602 {
1603 free (candidate_table);
1604 free (bblst_table);
1605 free (edgelst_table);
1606 }
1607
1608 /* Print candidates info, for debugging purposes. Callable from debugger. */
1609
1610 DEBUG_FUNCTION void
1611 debug_candidate (int i)
1612 {
1613 if (!candidate_table[i].is_valid)
1614 return;
1615
1616 if (candidate_table[i].is_speculative)
1617 {
1618 int j;
1619 fprintf (sched_dump, "src b %d bb %d speculative \n", BB_TO_BLOCK (i), i);
1620
1621 fprintf (sched_dump, "split path: ");
1622 for (j = 0; j < candidate_table[i].split_bbs.nr_members; j++)
1623 {
1624 int b = candidate_table[i].split_bbs.first_member[j]->index;
1625
1626 fprintf (sched_dump, " %d ", b);
1627 }
1628 fprintf (sched_dump, "\n");
1629
1630 fprintf (sched_dump, "update path: ");
1631 for (j = 0; j < candidate_table[i].update_bbs.nr_members; j++)
1632 {
1633 int b = candidate_table[i].update_bbs.first_member[j]->index;
1634
1635 fprintf (sched_dump, " %d ", b);
1636 }
1637 fprintf (sched_dump, "\n");
1638 }
1639 else
1640 {
1641 fprintf (sched_dump, " src %d equivalent\n", BB_TO_BLOCK (i));
1642 }
1643 }
1644
1645 /* Print candidates info, for debugging purposes. Callable from debugger. */
1646
1647 DEBUG_FUNCTION void
1648 debug_candidates (int trg)
1649 {
1650 int i;
1651
1652 fprintf (sched_dump, "----------- candidate table: target: b=%d bb=%d ---\n",
1653 BB_TO_BLOCK (trg), trg);
1654 for (i = trg + 1; i < current_nr_blocks; i++)
1655 debug_candidate (i);
1656 }
1657
1658 /* Functions for speculative scheduling. */
1659
1660 static bitmap_head not_in_df;
1661
1662 /* Return 0 if x is a set of a register alive in the beginning of one
1663 of the split-blocks of src, otherwise return 1. */
1664
1665 static int
1666 check_live_1 (int src, rtx x)
1667 {
1668 int i;
1669 int regno;
1670 rtx reg = SET_DEST (x);
1671
1672 if (reg == 0)
1673 return 1;
1674
1675 while (GET_CODE (reg) == SUBREG
1676 || GET_CODE (reg) == ZERO_EXTRACT
1677 || GET_CODE (reg) == STRICT_LOW_PART)
1678 reg = XEXP (reg, 0);
1679
1680 if (GET_CODE (reg) == PARALLEL)
1681 {
1682 int i;
1683
1684 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
1685 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
1686 if (check_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0)))
1687 return 1;
1688
1689 return 0;
1690 }
1691
1692 if (!REG_P (reg))
1693 return 1;
1694
1695 regno = REGNO (reg);
1696
1697 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1698 {
1699 /* Global registers are assumed live. */
1700 return 0;
1701 }
1702 else
1703 {
1704 if (regno < FIRST_PSEUDO_REGISTER)
1705 {
1706 /* Check for hard registers. */
1707 int j = REG_NREGS (reg);
1708 while (--j >= 0)
1709 {
1710 for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++)
1711 {
1712 basic_block b = candidate_table[src].split_bbs.first_member[i];
1713 int t = bitmap_bit_p (&not_in_df, b->index);
1714
1715 /* We can have split blocks, that were recently generated.
1716 Such blocks are always outside current region. */
1717 gcc_assert (!t || (CONTAINING_RGN (b->index)
1718 != CONTAINING_RGN (BB_TO_BLOCK (src))));
1719
1720 if (t || REGNO_REG_SET_P (df_get_live_in (b), regno + j))
1721 return 0;
1722 }
1723 }
1724 }
1725 else
1726 {
1727 /* Check for pseudo registers. */
1728 for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++)
1729 {
1730 basic_block b = candidate_table[src].split_bbs.first_member[i];
1731 int t = bitmap_bit_p (&not_in_df, b->index);
1732
1733 gcc_assert (!t || (CONTAINING_RGN (b->index)
1734 != CONTAINING_RGN (BB_TO_BLOCK (src))));
1735
1736 if (t || REGNO_REG_SET_P (df_get_live_in (b), regno))
1737 return 0;
1738 }
1739 }
1740 }
1741
1742 return 1;
1743 }
1744
1745 /* If x is a set of a register R, mark that R is alive in the beginning
1746 of every update-block of src. */
1747
1748 static void
1749 update_live_1 (int src, rtx x)
1750 {
1751 int i;
1752 int regno;
1753 rtx reg = SET_DEST (x);
1754
1755 if (reg == 0)
1756 return;
1757
1758 while (GET_CODE (reg) == SUBREG
1759 || GET_CODE (reg) == ZERO_EXTRACT
1760 || GET_CODE (reg) == STRICT_LOW_PART)
1761 reg = XEXP (reg, 0);
1762
1763 if (GET_CODE (reg) == PARALLEL)
1764 {
1765 int i;
1766
1767 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
1768 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
1769 update_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0));
1770
1771 return;
1772 }
1773
1774 if (!REG_P (reg))
1775 return;
1776
1777 /* Global registers are always live, so the code below does not apply
1778 to them. */
1779
1780 regno = REGNO (reg);
1781
1782 if (! HARD_REGISTER_NUM_P (regno)
1783 || !global_regs[regno])
1784 {
1785 for (i = 0; i < candidate_table[src].update_bbs.nr_members; i++)
1786 {
1787 basic_block b = candidate_table[src].update_bbs.first_member[i];
1788 bitmap_set_range (df_get_live_in (b), regno, REG_NREGS (reg));
1789 }
1790 }
1791 }
1792
1793 /* Return 1 if insn can be speculatively moved from block src to trg,
1794 otherwise return 0. Called before first insertion of insn to
1795 ready-list or before the scheduling. */
1796
1797 static int
1798 check_live (rtx_insn *insn, int src)
1799 {
1800 /* Find the registers set by instruction. */
1801 if (GET_CODE (PATTERN (insn)) == SET
1802 || GET_CODE (PATTERN (insn)) == CLOBBER)
1803 return check_live_1 (src, PATTERN (insn));
1804 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1805 {
1806 int j;
1807 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
1808 if ((GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
1809 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
1810 && !check_live_1 (src, XVECEXP (PATTERN (insn), 0, j)))
1811 return 0;
1812
1813 return 1;
1814 }
1815
1816 return 1;
1817 }
1818
1819 /* Update the live registers info after insn was moved speculatively from
1820 block src to trg. */
1821
1822 static void
1823 update_live (rtx_insn *insn, int src)
1824 {
1825 /* Find the registers set by instruction. */
1826 if (GET_CODE (PATTERN (insn)) == SET
1827 || GET_CODE (PATTERN (insn)) == CLOBBER)
1828 update_live_1 (src, PATTERN (insn));
1829 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1830 {
1831 int j;
1832 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
1833 if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
1834 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
1835 update_live_1 (src, XVECEXP (PATTERN (insn), 0, j));
1836 }
1837 }
1838
1839 /* Nonzero if block bb_to is equal to, or reachable from block bb_from. */
1840 #define IS_REACHABLE(bb_from, bb_to) \
1841 (bb_from == bb_to \
1842 || IS_RGN_ENTRY (bb_from) \
1843 || (bitmap_bit_p (ancestor_edges[bb_to], \
1844 EDGE_TO_BIT (single_pred_edge (BASIC_BLOCK_FOR_FN (cfun, \
1845 BB_TO_BLOCK (bb_from)))))))
1846
1847 /* Turns on the fed_by_spec_load flag for insns fed by load_insn. */
1848
1849 static void
1850 set_spec_fed (rtx load_insn)
1851 {
1852 sd_iterator_def sd_it;
1853 dep_t dep;
1854
1855 FOR_EACH_DEP (load_insn, SD_LIST_FORW, sd_it, dep)
1856 if (DEP_TYPE (dep) == REG_DEP_TRUE)
1857 FED_BY_SPEC_LOAD (DEP_CON (dep)) = 1;
1858 }
1859
1860 /* On the path from the insn to load_insn_bb, find a conditional
1861 branch depending on insn, that guards the speculative load. */
1862
1863 static int
1864 find_conditional_protection (rtx_insn *insn, int load_insn_bb)
1865 {
1866 sd_iterator_def sd_it;
1867 dep_t dep;
1868
1869 /* Iterate through DEF-USE forward dependences. */
1870 FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
1871 {
1872 rtx_insn *next = DEP_CON (dep);
1873
1874 if ((CONTAINING_RGN (BLOCK_NUM (next)) ==
1875 CONTAINING_RGN (BB_TO_BLOCK (load_insn_bb)))
1876 && IS_REACHABLE (INSN_BB (next), load_insn_bb)
1877 && load_insn_bb != INSN_BB (next)
1878 && DEP_TYPE (dep) == REG_DEP_TRUE
1879 && (JUMP_P (next)
1880 || find_conditional_protection (next, load_insn_bb)))
1881 return 1;
1882 }
1883 return 0;
1884 } /* find_conditional_protection */
1885
1886 /* Returns 1 if the same insn1 that participates in the computation
1887 of load_insn's address is feeding a conditional branch that is
1888 guarding on load_insn. This is true if we find two DEF-USE
1889 chains:
1890 insn1 -> ... -> conditional-branch
1891 insn1 -> ... -> load_insn,
1892 and if a flow path exists:
1893 insn1 -> ... -> conditional-branch -> ... -> load_insn,
1894 and if insn1 is on the path
1895 region-entry -> ... -> bb_trg -> ... load_insn.
1896
1897 Locate insn1 by climbing on INSN_BACK_DEPS from load_insn.
1898 Locate the branch by following INSN_FORW_DEPS from insn1. */
1899
1900 static int
1901 is_conditionally_protected (rtx load_insn, int bb_src, int bb_trg)
1902 {
1903 sd_iterator_def sd_it;
1904 dep_t dep;
1905
1906 FOR_EACH_DEP (load_insn, SD_LIST_BACK, sd_it, dep)
1907 {
1908 rtx_insn *insn1 = DEP_PRO (dep);
1909
1910 /* Must be a DEF-USE dependence upon non-branch. */
1911 if (DEP_TYPE (dep) != REG_DEP_TRUE
1912 || JUMP_P (insn1))
1913 continue;
1914
1915 /* Must exist a path: region-entry -> ... -> bb_trg -> ... load_insn. */
1916 if (INSN_BB (insn1) == bb_src
1917 || (CONTAINING_RGN (BLOCK_NUM (insn1))
1918 != CONTAINING_RGN (BB_TO_BLOCK (bb_src)))
1919 || (!IS_REACHABLE (bb_trg, INSN_BB (insn1))
1920 && !IS_REACHABLE (INSN_BB (insn1), bb_trg)))
1921 continue;
1922
1923 /* Now search for the conditional-branch. */
1924 if (find_conditional_protection (insn1, bb_src))
1925 return 1;
1926
1927 /* Recursive step: search another insn1, "above" current insn1. */
1928 return is_conditionally_protected (insn1, bb_src, bb_trg);
1929 }
1930
1931 /* The chain does not exist. */
1932 return 0;
1933 } /* is_conditionally_protected */
1934
1935 /* Returns 1 if a clue for "similar load" 'insn2' is found, and hence
1936 load_insn can move speculatively from bb_src to bb_trg. All the
1937 following must hold:
1938
1939 (1) both loads have 1 base register (PFREE_CANDIDATEs).
1940 (2) load_insn and load1 have a def-use dependence upon
1941 the same insn 'insn1'.
1942 (3) either load2 is in bb_trg, or:
1943 - there's only one split-block, and
1944 - load1 is on the escape path, and
1945
1946 From all these we can conclude that the two loads access memory
1947 addresses that differ at most by a constant, and hence if moving
1948 load_insn would cause an exception, it would have been caused by
1949 load2 anyhow. */
1950
1951 static int
1952 is_pfree (rtx load_insn, int bb_src, int bb_trg)
1953 {
1954 sd_iterator_def back_sd_it;
1955 dep_t back_dep;
1956 candidate *candp = candidate_table + bb_src;
1957
1958 if (candp->split_bbs.nr_members != 1)
1959 /* Must have exactly one escape block. */
1960 return 0;
1961
1962 FOR_EACH_DEP (load_insn, SD_LIST_BACK, back_sd_it, back_dep)
1963 {
1964 rtx_insn *insn1 = DEP_PRO (back_dep);
1965
1966 if (DEP_TYPE (back_dep) == REG_DEP_TRUE)
1967 /* Found a DEF-USE dependence (insn1, load_insn). */
1968 {
1969 sd_iterator_def fore_sd_it;
1970 dep_t fore_dep;
1971
1972 FOR_EACH_DEP (insn1, SD_LIST_FORW, fore_sd_it, fore_dep)
1973 {
1974 rtx_insn *insn2 = DEP_CON (fore_dep);
1975
1976 if (DEP_TYPE (fore_dep) == REG_DEP_TRUE)
1977 {
1978 /* Found a DEF-USE dependence (insn1, insn2). */
1979 if (haifa_classify_insn (insn2) != PFREE_CANDIDATE)
1980 /* insn2 not guaranteed to be a 1 base reg load. */
1981 continue;
1982
1983 if (INSN_BB (insn2) == bb_trg)
1984 /* insn2 is the similar load, in the target block. */
1985 return 1;
1986
1987 if (*(candp->split_bbs.first_member) == BLOCK_FOR_INSN (insn2))
1988 /* insn2 is a similar load, in a split-block. */
1989 return 1;
1990 }
1991 }
1992 }
1993 }
1994
1995 /* Couldn't find a similar load. */
1996 return 0;
1997 } /* is_pfree */
1998
1999 /* Return 1 if load_insn is prisky (i.e. if load_insn is fed by
2000 a load moved speculatively, or if load_insn is protected by
2001 a compare on load_insn's address). */
2002
2003 static int
2004 is_prisky (rtx load_insn, int bb_src, int bb_trg)
2005 {
2006 if (FED_BY_SPEC_LOAD (load_insn))
2007 return 1;
2008
2009 if (sd_lists_empty_p (load_insn, SD_LIST_BACK))
2010 /* Dependence may 'hide' out of the region. */
2011 return 1;
2012
2013 if (is_conditionally_protected (load_insn, bb_src, bb_trg))
2014 return 1;
2015
2016 return 0;
2017 }
2018
2019 /* Insn is a candidate to be moved speculatively from bb_src to bb_trg.
2020 Return 1 if insn is exception-free (and the motion is valid)
2021 and 0 otherwise. */
2022
2023 static int
2024 is_exception_free (rtx_insn *insn, int bb_src, int bb_trg)
2025 {
2026 int insn_class = haifa_classify_insn (insn);
2027
2028 /* Handle non-load insns. */
2029 switch (insn_class)
2030 {
2031 case TRAP_FREE:
2032 return 1;
2033 case TRAP_RISKY:
2034 return 0;
2035 default:;
2036 }
2037
2038 /* Handle loads. */
2039 if (!flag_schedule_speculative_load)
2040 return 0;
2041 IS_LOAD_INSN (insn) = 1;
2042 switch (insn_class)
2043 {
2044 case IFREE:
2045 return (1);
2046 case IRISKY:
2047 return 0;
2048 case PFREE_CANDIDATE:
2049 if (is_pfree (insn, bb_src, bb_trg))
2050 return 1;
2051 /* Don't 'break' here: PFREE-candidate is also PRISKY-candidate. */
2052 /* FALLTHRU */
2053 case PRISKY_CANDIDATE:
2054 if (!flag_schedule_speculative_load_dangerous
2055 || is_prisky (insn, bb_src, bb_trg))
2056 return 0;
2057 break;
2058 default:;
2059 }
2060
2061 return flag_schedule_speculative_load_dangerous;
2062 }
2063 \f
2064 /* The number of insns from the current block scheduled so far. */
2065 static int sched_target_n_insns;
2066 /* The number of insns from the current block to be scheduled in total. */
2067 static int target_n_insns;
2068 /* The number of insns from the entire region scheduled so far. */
2069 static int sched_n_insns;
2070
2071 /* Implementations of the sched_info functions for region scheduling. */
2072 static void init_ready_list (void);
2073 static int can_schedule_ready_p (rtx_insn *);
2074 static void begin_schedule_ready (rtx_insn *);
2075 static ds_t new_ready (rtx_insn *, ds_t);
2076 static int schedule_more_p (void);
2077 static const char *rgn_print_insn (const rtx_insn *, int);
2078 static int rgn_rank (rtx_insn *, rtx_insn *);
2079 static void compute_jump_reg_dependencies (rtx, regset);
2080
2081 /* Functions for speculative scheduling. */
2082 static void rgn_add_remove_insn (rtx_insn *, int);
2083 static void rgn_add_block (basic_block, basic_block);
2084 static void rgn_fix_recovery_cfg (int, int, int);
2085 static basic_block advance_target_bb (basic_block, rtx_insn *);
2086
2087 /* Return nonzero if there are more insns that should be scheduled. */
2088
2089 static int
2090 schedule_more_p (void)
2091 {
2092 return sched_target_n_insns < target_n_insns;
2093 }
2094
2095 /* Add all insns that are initially ready to the ready list READY. Called
2096 once before scheduling a set of insns. */
2097
2098 static void
2099 init_ready_list (void)
2100 {
2101 rtx_insn *prev_head = current_sched_info->prev_head;
2102 rtx_insn *next_tail = current_sched_info->next_tail;
2103 int bb_src;
2104 rtx_insn *insn;
2105
2106 target_n_insns = 0;
2107 sched_target_n_insns = 0;
2108 sched_n_insns = 0;
2109
2110 /* Print debugging information. */
2111 if (sched_verbose >= 5)
2112 debug_rgn_dependencies (target_bb);
2113
2114 /* Prepare current target block info. */
2115 if (current_nr_blocks > 1)
2116 compute_trg_info (target_bb);
2117
2118 /* Initialize ready list with all 'ready' insns in target block.
2119 Count number of insns in the target block being scheduled. */
2120 for (insn = NEXT_INSN (prev_head); insn != next_tail; insn = NEXT_INSN (insn))
2121 {
2122 gcc_assert (TODO_SPEC (insn) == HARD_DEP || TODO_SPEC (insn) == DEP_POSTPONED);
2123 TODO_SPEC (insn) = HARD_DEP;
2124 try_ready (insn);
2125 target_n_insns++;
2126
2127 gcc_assert (!(TODO_SPEC (insn) & BEGIN_CONTROL));
2128 }
2129
2130 /* Add to ready list all 'ready' insns in valid source blocks.
2131 For speculative insns, check-live, exception-free, and
2132 issue-delay. */
2133 for (bb_src = target_bb + 1; bb_src < current_nr_blocks; bb_src++)
2134 if (IS_VALID (bb_src))
2135 {
2136 rtx_insn *src_head;
2137 rtx_insn *src_next_tail;
2138 rtx_insn *tail, *head;
2139
2140 get_ebb_head_tail (EBB_FIRST_BB (bb_src), EBB_LAST_BB (bb_src),
2141 &head, &tail);
2142 src_next_tail = NEXT_INSN (tail);
2143 src_head = head;
2144
2145 for (insn = src_head; insn != src_next_tail; insn = NEXT_INSN (insn))
2146 if (INSN_P (insn))
2147 {
2148 gcc_assert (TODO_SPEC (insn) == HARD_DEP || TODO_SPEC (insn) == DEP_POSTPONED);
2149 TODO_SPEC (insn) = HARD_DEP;
2150 try_ready (insn);
2151 }
2152 }
2153 }
2154
2155 /* Called after taking INSN from the ready list. Returns nonzero if this
2156 insn can be scheduled, nonzero if we should silently discard it. */
2157
2158 static int
2159 can_schedule_ready_p (rtx_insn *insn)
2160 {
2161 /* An interblock motion? */
2162 if (INSN_BB (insn) != target_bb && IS_SPECULATIVE_INSN (insn))
2163 {
2164 /* Cannot schedule this insn unless all operands are live. */
2165 if (!check_live (insn, INSN_BB (insn)))
2166 return 0;
2167
2168 /* Should not move expensive instructions speculatively. */
2169 if (GET_CODE (PATTERN (insn)) != CLOBBER
2170 && !targetm.sched.can_speculate_insn (insn))
2171 return 0;
2172 }
2173
2174 return 1;
2175 }
2176
2177 /* Updates counter and other information. Split from can_schedule_ready_p ()
2178 because when we schedule insn speculatively then insn passed to
2179 can_schedule_ready_p () differs from the one passed to
2180 begin_schedule_ready (). */
2181 static void
2182 begin_schedule_ready (rtx_insn *insn)
2183 {
2184 /* An interblock motion? */
2185 if (INSN_BB (insn) != target_bb)
2186 {
2187 if (IS_SPECULATIVE_INSN (insn))
2188 {
2189 gcc_assert (check_live (insn, INSN_BB (insn)));
2190
2191 update_live (insn, INSN_BB (insn));
2192
2193 /* For speculative load, mark insns fed by it. */
2194 if (IS_LOAD_INSN (insn) || FED_BY_SPEC_LOAD (insn))
2195 set_spec_fed (insn);
2196
2197 nr_spec++;
2198 }
2199 nr_inter++;
2200 }
2201 else
2202 {
2203 /* In block motion. */
2204 sched_target_n_insns++;
2205 }
2206 sched_n_insns++;
2207 }
2208
2209 /* Called after INSN has all its hard dependencies resolved and the speculation
2210 of type TS is enough to overcome them all.
2211 Return nonzero if it should be moved to the ready list or the queue, or zero
2212 if we should silently discard it. */
2213 static ds_t
2214 new_ready (rtx_insn *next, ds_t ts)
2215 {
2216 if (INSN_BB (next) != target_bb)
2217 {
2218 int not_ex_free = 0;
2219
2220 /* For speculative insns, before inserting to ready/queue,
2221 check live, exception-free, and issue-delay. */
2222 if (!IS_VALID (INSN_BB (next))
2223 || CANT_MOVE (next)
2224 || (IS_SPECULATIVE_INSN (next)
2225 && ((recog_memoized (next) >= 0
2226 && min_insn_conflict_delay (curr_state, next, next)
2227 > PARAM_VALUE (PARAM_MAX_SCHED_INSN_CONFLICT_DELAY))
2228 || IS_SPECULATION_CHECK_P (next)
2229 || !check_live (next, INSN_BB (next))
2230 || (not_ex_free = !is_exception_free (next, INSN_BB (next),
2231 target_bb)))))
2232 {
2233 if (not_ex_free
2234 /* We are here because is_exception_free () == false.
2235 But we possibly can handle that with control speculation. */
2236 && sched_deps_info->generate_spec_deps
2237 && spec_info->mask & BEGIN_CONTROL)
2238 {
2239 ds_t new_ds;
2240
2241 /* Add control speculation to NEXT's dependency type. */
2242 new_ds = set_dep_weak (ts, BEGIN_CONTROL, MAX_DEP_WEAK);
2243
2244 /* Check if NEXT can be speculated with new dependency type. */
2245 if (sched_insn_is_legitimate_for_speculation_p (next, new_ds))
2246 /* Here we got new control-speculative instruction. */
2247 ts = new_ds;
2248 else
2249 /* NEXT isn't ready yet. */
2250 ts = DEP_POSTPONED;
2251 }
2252 else
2253 /* NEXT isn't ready yet. */
2254 ts = DEP_POSTPONED;
2255 }
2256 }
2257
2258 return ts;
2259 }
2260
2261 /* Return a string that contains the insn uid and optionally anything else
2262 necessary to identify this insn in an output. It's valid to use a
2263 static buffer for this. The ALIGNED parameter should cause the string
2264 to be formatted so that multiple output lines will line up nicely. */
2265
2266 static const char *
2267 rgn_print_insn (const rtx_insn *insn, int aligned)
2268 {
2269 static char tmp[80];
2270
2271 if (aligned)
2272 sprintf (tmp, "b%3d: i%4d", INSN_BB (insn), INSN_UID (insn));
2273 else
2274 {
2275 if (current_nr_blocks > 1 && INSN_BB (insn) != target_bb)
2276 sprintf (tmp, "%d/b%d", INSN_UID (insn), INSN_BB (insn));
2277 else
2278 sprintf (tmp, "%d", INSN_UID (insn));
2279 }
2280 return tmp;
2281 }
2282
2283 /* Compare priority of two insns. Return a positive number if the second
2284 insn is to be preferred for scheduling, and a negative one if the first
2285 is to be preferred. Zero if they are equally good. */
2286
2287 static int
2288 rgn_rank (rtx_insn *insn1, rtx_insn *insn2)
2289 {
2290 /* Some comparison make sense in interblock scheduling only. */
2291 if (INSN_BB (insn1) != INSN_BB (insn2))
2292 {
2293 int spec_val, prob_val;
2294
2295 /* Prefer an inblock motion on an interblock motion. */
2296 if ((INSN_BB (insn2) == target_bb) && (INSN_BB (insn1) != target_bb))
2297 return 1;
2298 if ((INSN_BB (insn1) == target_bb) && (INSN_BB (insn2) != target_bb))
2299 return -1;
2300
2301 /* Prefer a useful motion on a speculative one. */
2302 spec_val = IS_SPECULATIVE_INSN (insn1) - IS_SPECULATIVE_INSN (insn2);
2303 if (spec_val)
2304 return spec_val;
2305
2306 /* Prefer a more probable (speculative) insn. */
2307 prob_val = INSN_PROBABILITY (insn2) - INSN_PROBABILITY (insn1);
2308 if (prob_val)
2309 return prob_val;
2310 }
2311 return 0;
2312 }
2313
2314 /* NEXT is an instruction that depends on INSN (a backward dependence);
2315 return nonzero if we should include this dependence in priority
2316 calculations. */
2317
2318 int
2319 contributes_to_priority (rtx_insn *next, rtx_insn *insn)
2320 {
2321 /* NEXT and INSN reside in one ebb. */
2322 return BLOCK_TO_BB (BLOCK_NUM (next)) == BLOCK_TO_BB (BLOCK_NUM (insn));
2323 }
2324
2325 /* INSN is a JUMP_INSN. Store the set of registers that must be
2326 considered as used by this jump in USED. */
2327
2328 static void
2329 compute_jump_reg_dependencies (rtx insn ATTRIBUTE_UNUSED,
2330 regset used ATTRIBUTE_UNUSED)
2331 {
2332 /* Nothing to do here, since we postprocess jumps in
2333 add_branch_dependences. */
2334 }
2335
2336 /* This variable holds common_sched_info hooks and data relevant to
2337 the interblock scheduler. */
2338 static struct common_sched_info_def rgn_common_sched_info;
2339
2340
2341 /* This holds data for the dependence analysis relevant to
2342 the interblock scheduler. */
2343 static struct sched_deps_info_def rgn_sched_deps_info;
2344
2345 /* This holds constant data used for initializing the above structure
2346 for the Haifa scheduler. */
2347 static const struct sched_deps_info_def rgn_const_sched_deps_info =
2348 {
2349 compute_jump_reg_dependencies,
2350 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2351 0, 0, 0
2352 };
2353
2354 /* Same as above, but for the selective scheduler. */
2355 static const struct sched_deps_info_def rgn_const_sel_sched_deps_info =
2356 {
2357 compute_jump_reg_dependencies,
2358 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2359 0, 0, 0
2360 };
2361
2362 /* Return true if scheduling INSN will trigger finish of scheduling
2363 current block. */
2364 static bool
2365 rgn_insn_finishes_block_p (rtx_insn *insn)
2366 {
2367 if (INSN_BB (insn) == target_bb
2368 && sched_target_n_insns + 1 == target_n_insns)
2369 /* INSN is the last not-scheduled instruction in the current block. */
2370 return true;
2371
2372 return false;
2373 }
2374
2375 /* Used in schedule_insns to initialize current_sched_info for scheduling
2376 regions (or single basic blocks). */
2377
2378 static const struct haifa_sched_info rgn_const_sched_info =
2379 {
2380 init_ready_list,
2381 can_schedule_ready_p,
2382 schedule_more_p,
2383 new_ready,
2384 rgn_rank,
2385 rgn_print_insn,
2386 contributes_to_priority,
2387 rgn_insn_finishes_block_p,
2388
2389 NULL, NULL,
2390 NULL, NULL,
2391 0, 0,
2392
2393 rgn_add_remove_insn,
2394 begin_schedule_ready,
2395 NULL,
2396 advance_target_bb,
2397 NULL, NULL,
2398 SCHED_RGN
2399 };
2400
2401 /* This variable holds the data and hooks needed to the Haifa scheduler backend
2402 for the interblock scheduler frontend. */
2403 static struct haifa_sched_info rgn_sched_info;
2404
2405 /* Returns maximum priority that an insn was assigned to. */
2406
2407 int
2408 get_rgn_sched_max_insns_priority (void)
2409 {
2410 return rgn_sched_info.sched_max_insns_priority;
2411 }
2412
2413 /* Determine if PAT sets a TARGET_CLASS_LIKELY_SPILLED_P register. */
2414
2415 static bool
2416 sets_likely_spilled (rtx pat)
2417 {
2418 bool ret = false;
2419 note_stores (pat, sets_likely_spilled_1, &ret);
2420 return ret;
2421 }
2422
2423 static void
2424 sets_likely_spilled_1 (rtx x, const_rtx pat, void *data)
2425 {
2426 bool *ret = (bool *) data;
2427
2428 if (GET_CODE (pat) == SET
2429 && REG_P (x)
2430 && HARD_REGISTER_P (x)
2431 && targetm.class_likely_spilled_p (REGNO_REG_CLASS (REGNO (x))))
2432 *ret = true;
2433 }
2434
2435 /* A bitmap to note insns that participate in any dependency. Used in
2436 add_branch_dependences. */
2437 static sbitmap insn_referenced;
2438
2439 /* Add dependences so that branches are scheduled to run last in their
2440 block. */
2441 static void
2442 add_branch_dependences (rtx_insn *head, rtx_insn *tail)
2443 {
2444 rtx_insn *insn, *last;
2445
2446 /* For all branches, calls, uses, clobbers, cc0 setters, and instructions
2447 that can throw exceptions, force them to remain in order at the end of
2448 the block by adding dependencies and giving the last a high priority.
2449 There may be notes present, and prev_head may also be a note.
2450
2451 Branches must obviously remain at the end. Calls should remain at the
2452 end since moving them results in worse register allocation. Uses remain
2453 at the end to ensure proper register allocation.
2454
2455 cc0 setters remain at the end because they can't be moved away from
2456 their cc0 user.
2457
2458 Predecessors of SCHED_GROUP_P instructions at the end remain at the end.
2459
2460 COND_EXEC insns cannot be moved past a branch (see e.g. PR17808).
2461
2462 Insns setting TARGET_CLASS_LIKELY_SPILLED_P registers (usually return
2463 values) are not moved before reload because we can wind up with register
2464 allocation failures. */
2465
2466 while (tail != head && DEBUG_INSN_P (tail))
2467 tail = PREV_INSN (tail);
2468
2469 insn = tail;
2470 last = 0;
2471 while (CALL_P (insn)
2472 || JUMP_P (insn) || JUMP_TABLE_DATA_P (insn)
2473 || (NONJUMP_INSN_P (insn)
2474 && (GET_CODE (PATTERN (insn)) == USE
2475 || GET_CODE (PATTERN (insn)) == CLOBBER
2476 || can_throw_internal (insn)
2477 || (HAVE_cc0 && sets_cc0_p (PATTERN (insn)))
2478 || (!reload_completed
2479 && sets_likely_spilled (PATTERN (insn)))))
2480 || NOTE_P (insn)
2481 || (last != 0 && SCHED_GROUP_P (last)))
2482 {
2483 if (!NOTE_P (insn))
2484 {
2485 if (last != 0
2486 && sd_find_dep_between (insn, last, false) == NULL)
2487 {
2488 if (! sched_insns_conditions_mutex_p (last, insn))
2489 add_dependence (last, insn, REG_DEP_ANTI);
2490 bitmap_set_bit (insn_referenced, INSN_LUID (insn));
2491 }
2492
2493 CANT_MOVE (insn) = 1;
2494
2495 last = insn;
2496 }
2497
2498 /* Don't overrun the bounds of the basic block. */
2499 if (insn == head)
2500 break;
2501
2502 do
2503 insn = PREV_INSN (insn);
2504 while (insn != head && DEBUG_INSN_P (insn));
2505 }
2506
2507 /* Selective scheduling handles control dependencies by itself, and
2508 CANT_MOVE flags ensure that other insns will be kept in place. */
2509 if (sel_sched_p ())
2510 return;
2511
2512 /* Make sure these insns are scheduled last in their block. */
2513 insn = last;
2514 if (insn != 0)
2515 while (insn != head)
2516 {
2517 insn = prev_nonnote_insn (insn);
2518
2519 if (bitmap_bit_p (insn_referenced, INSN_LUID (insn))
2520 || DEBUG_INSN_P (insn))
2521 continue;
2522
2523 if (! sched_insns_conditions_mutex_p (last, insn))
2524 add_dependence (last, insn, REG_DEP_ANTI);
2525 }
2526
2527 if (!targetm.have_conditional_execution ())
2528 return;
2529
2530 /* Finally, if the block ends in a jump, and we are doing intra-block
2531 scheduling, make sure that the branch depends on any COND_EXEC insns
2532 inside the block to avoid moving the COND_EXECs past the branch insn.
2533
2534 We only have to do this after reload, because (1) before reload there
2535 are no COND_EXEC insns, and (2) the region scheduler is an intra-block
2536 scheduler after reload.
2537
2538 FIXME: We could in some cases move COND_EXEC insns past the branch if
2539 this scheduler would be a little smarter. Consider this code:
2540
2541 T = [addr]
2542 C ? addr += 4
2543 !C ? X += 12
2544 C ? T += 1
2545 C ? jump foo
2546
2547 On a target with a one cycle stall on a memory access the optimal
2548 sequence would be:
2549
2550 T = [addr]
2551 C ? addr += 4
2552 C ? T += 1
2553 C ? jump foo
2554 !C ? X += 12
2555
2556 We don't want to put the 'X += 12' before the branch because it just
2557 wastes a cycle of execution time when the branch is taken.
2558
2559 Note that in the example "!C" will always be true. That is another
2560 possible improvement for handling COND_EXECs in this scheduler: it
2561 could remove always-true predicates. */
2562
2563 if (!reload_completed || ! (JUMP_P (tail) || JUMP_TABLE_DATA_P (tail)))
2564 return;
2565
2566 insn = tail;
2567 while (insn != head)
2568 {
2569 insn = PREV_INSN (insn);
2570
2571 /* Note that we want to add this dependency even when
2572 sched_insns_conditions_mutex_p returns true. The whole point
2573 is that we _want_ this dependency, even if these insns really
2574 are independent. */
2575 if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == COND_EXEC)
2576 add_dependence (tail, insn, REG_DEP_ANTI);
2577 }
2578 }
2579
2580 /* Data structures for the computation of data dependences in a regions. We
2581 keep one `deps' structure for every basic block. Before analyzing the
2582 data dependences for a bb, its variables are initialized as a function of
2583 the variables of its predecessors. When the analysis for a bb completes,
2584 we save the contents to the corresponding bb_deps[bb] variable. */
2585
2586 static class deps_desc *bb_deps;
2587
2588 static void
2589 concat_insn_mem_list (rtx_insn_list *copy_insns,
2590 rtx_expr_list *copy_mems,
2591 rtx_insn_list **old_insns_p,
2592 rtx_expr_list **old_mems_p)
2593 {
2594 rtx_insn_list *new_insns = *old_insns_p;
2595 rtx_expr_list *new_mems = *old_mems_p;
2596
2597 while (copy_insns)
2598 {
2599 new_insns = alloc_INSN_LIST (copy_insns->insn (), new_insns);
2600 new_mems = alloc_EXPR_LIST (VOIDmode, copy_mems->element (), new_mems);
2601 copy_insns = copy_insns->next ();
2602 copy_mems = copy_mems->next ();
2603 }
2604
2605 *old_insns_p = new_insns;
2606 *old_mems_p = new_mems;
2607 }
2608
2609 /* Join PRED_DEPS to the SUCC_DEPS. */
2610 void
2611 deps_join (class deps_desc *succ_deps, class deps_desc *pred_deps)
2612 {
2613 unsigned reg;
2614 reg_set_iterator rsi;
2615
2616 /* The reg_last lists are inherited by successor. */
2617 EXECUTE_IF_SET_IN_REG_SET (&pred_deps->reg_last_in_use, 0, reg, rsi)
2618 {
2619 struct deps_reg *pred_rl = &pred_deps->reg_last[reg];
2620 struct deps_reg *succ_rl = &succ_deps->reg_last[reg];
2621
2622 succ_rl->uses = concat_INSN_LIST (pred_rl->uses, succ_rl->uses);
2623 succ_rl->sets = concat_INSN_LIST (pred_rl->sets, succ_rl->sets);
2624 succ_rl->implicit_sets
2625 = concat_INSN_LIST (pred_rl->implicit_sets, succ_rl->implicit_sets);
2626 succ_rl->clobbers = concat_INSN_LIST (pred_rl->clobbers,
2627 succ_rl->clobbers);
2628 succ_rl->uses_length += pred_rl->uses_length;
2629 succ_rl->clobbers_length += pred_rl->clobbers_length;
2630 }
2631 IOR_REG_SET (&succ_deps->reg_last_in_use, &pred_deps->reg_last_in_use);
2632
2633 /* Mem read/write lists are inherited by successor. */
2634 concat_insn_mem_list (pred_deps->pending_read_insns,
2635 pred_deps->pending_read_mems,
2636 &succ_deps->pending_read_insns,
2637 &succ_deps->pending_read_mems);
2638 concat_insn_mem_list (pred_deps->pending_write_insns,
2639 pred_deps->pending_write_mems,
2640 &succ_deps->pending_write_insns,
2641 &succ_deps->pending_write_mems);
2642
2643 succ_deps->pending_jump_insns
2644 = concat_INSN_LIST (pred_deps->pending_jump_insns,
2645 succ_deps->pending_jump_insns);
2646 succ_deps->last_pending_memory_flush
2647 = concat_INSN_LIST (pred_deps->last_pending_memory_flush,
2648 succ_deps->last_pending_memory_flush);
2649
2650 succ_deps->pending_read_list_length += pred_deps->pending_read_list_length;
2651 succ_deps->pending_write_list_length += pred_deps->pending_write_list_length;
2652 succ_deps->pending_flush_length += pred_deps->pending_flush_length;
2653
2654 /* last_function_call is inherited by successor. */
2655 succ_deps->last_function_call
2656 = concat_INSN_LIST (pred_deps->last_function_call,
2657 succ_deps->last_function_call);
2658
2659 /* last_function_call_may_noreturn is inherited by successor. */
2660 succ_deps->last_function_call_may_noreturn
2661 = concat_INSN_LIST (pred_deps->last_function_call_may_noreturn,
2662 succ_deps->last_function_call_may_noreturn);
2663
2664 /* sched_before_next_call is inherited by successor. */
2665 succ_deps->sched_before_next_call
2666 = concat_INSN_LIST (pred_deps->sched_before_next_call,
2667 succ_deps->sched_before_next_call);
2668 }
2669
2670 /* After computing the dependencies for block BB, propagate the dependencies
2671 found in TMP_DEPS to the successors of the block. */
2672 static void
2673 propagate_deps (int bb, class deps_desc *pred_deps)
2674 {
2675 basic_block block = BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (bb));
2676 edge_iterator ei;
2677 edge e;
2678
2679 /* bb's structures are inherited by its successors. */
2680 FOR_EACH_EDGE (e, ei, block->succs)
2681 {
2682 /* Only bbs "below" bb, in the same region, are interesting. */
2683 if (e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)
2684 || CONTAINING_RGN (block->index) != CONTAINING_RGN (e->dest->index)
2685 || BLOCK_TO_BB (e->dest->index) <= bb)
2686 continue;
2687
2688 deps_join (bb_deps + BLOCK_TO_BB (e->dest->index), pred_deps);
2689 }
2690
2691 /* These lists should point to the right place, for correct
2692 freeing later. */
2693 bb_deps[bb].pending_read_insns = pred_deps->pending_read_insns;
2694 bb_deps[bb].pending_read_mems = pred_deps->pending_read_mems;
2695 bb_deps[bb].pending_write_insns = pred_deps->pending_write_insns;
2696 bb_deps[bb].pending_write_mems = pred_deps->pending_write_mems;
2697 bb_deps[bb].pending_jump_insns = pred_deps->pending_jump_insns;
2698
2699 /* Can't allow these to be freed twice. */
2700 pred_deps->pending_read_insns = 0;
2701 pred_deps->pending_read_mems = 0;
2702 pred_deps->pending_write_insns = 0;
2703 pred_deps->pending_write_mems = 0;
2704 pred_deps->pending_jump_insns = 0;
2705 }
2706
2707 /* Compute dependences inside bb. In a multiple blocks region:
2708 (1) a bb is analyzed after its predecessors, and (2) the lists in
2709 effect at the end of bb (after analyzing for bb) are inherited by
2710 bb's successors.
2711
2712 Specifically for reg-reg data dependences, the block insns are
2713 scanned by sched_analyze () top-to-bottom. Three lists are
2714 maintained by sched_analyze (): reg_last[].sets for register DEFs,
2715 reg_last[].implicit_sets for implicit hard register DEFs, and
2716 reg_last[].uses for register USEs.
2717
2718 When analysis is completed for bb, we update for its successors:
2719 ; - DEFS[succ] = Union (DEFS [succ], DEFS [bb])
2720 ; - IMPLICIT_DEFS[succ] = Union (IMPLICIT_DEFS [succ], IMPLICIT_DEFS [bb])
2721 ; - USES[succ] = Union (USES [succ], DEFS [bb])
2722
2723 The mechanism for computing mem-mem data dependence is very
2724 similar, and the result is interblock dependences in the region. */
2725
2726 static void
2727 compute_block_dependences (int bb)
2728 {
2729 rtx_insn *head, *tail;
2730 class deps_desc tmp_deps;
2731
2732 tmp_deps = bb_deps[bb];
2733
2734 /* Do the analysis for this block. */
2735 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2736 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2737
2738 sched_analyze (&tmp_deps, head, tail);
2739
2740 add_branch_dependences (head, tail);
2741
2742 if (current_nr_blocks > 1)
2743 propagate_deps (bb, &tmp_deps);
2744
2745 /* Free up the INSN_LISTs. */
2746 free_deps (&tmp_deps);
2747
2748 if (targetm.sched.dependencies_evaluation_hook)
2749 targetm.sched.dependencies_evaluation_hook (head, tail);
2750 }
2751
2752 /* Free dependencies of instructions inside BB. */
2753 static void
2754 free_block_dependencies (int bb)
2755 {
2756 rtx_insn *head;
2757 rtx_insn *tail;
2758
2759 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2760
2761 if (no_real_insns_p (head, tail))
2762 return;
2763
2764 sched_free_deps (head, tail, true);
2765 }
2766
2767 /* Remove all INSN_LISTs and EXPR_LISTs from the pending lists and add
2768 them to the unused_*_list variables, so that they can be reused. */
2769
2770 static void
2771 free_pending_lists (void)
2772 {
2773 int bb;
2774
2775 for (bb = 0; bb < current_nr_blocks; bb++)
2776 {
2777 free_INSN_LIST_list (&bb_deps[bb].pending_read_insns);
2778 free_INSN_LIST_list (&bb_deps[bb].pending_write_insns);
2779 free_EXPR_LIST_list (&bb_deps[bb].pending_read_mems);
2780 free_EXPR_LIST_list (&bb_deps[bb].pending_write_mems);
2781 free_INSN_LIST_list (&bb_deps[bb].pending_jump_insns);
2782 }
2783 }
2784 \f
2785 /* Print dependences for debugging starting from FROM_BB.
2786 Callable from debugger. */
2787 /* Print dependences for debugging starting from FROM_BB.
2788 Callable from debugger. */
2789 DEBUG_FUNCTION void
2790 debug_rgn_dependencies (int from_bb)
2791 {
2792 int bb;
2793
2794 fprintf (sched_dump,
2795 ";; --------------- forward dependences: ------------ \n");
2796
2797 for (bb = from_bb; bb < current_nr_blocks; bb++)
2798 {
2799 rtx_insn *head, *tail;
2800
2801 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2802 fprintf (sched_dump, "\n;; --- Region Dependences --- b %d bb %d \n",
2803 BB_TO_BLOCK (bb), bb);
2804
2805 debug_dependencies (head, tail);
2806 }
2807 }
2808
2809 /* Print dependencies information for instructions between HEAD and TAIL.
2810 ??? This function would probably fit best in haifa-sched.c. */
2811 void debug_dependencies (rtx_insn *head, rtx_insn *tail)
2812 {
2813 rtx_insn *insn;
2814 rtx_insn *next_tail = NEXT_INSN (tail);
2815
2816 fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
2817 "insn", "code", "bb", "dep", "prio", "cost",
2818 "reservation");
2819 fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
2820 "----", "----", "--", "---", "----", "----",
2821 "-----------");
2822
2823 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
2824 {
2825 if (! INSN_P (insn))
2826 {
2827 int n;
2828 fprintf (sched_dump, ";; %6d ", INSN_UID (insn));
2829 if (NOTE_P (insn))
2830 {
2831 n = NOTE_KIND (insn);
2832 fprintf (sched_dump, "%s\n", GET_NOTE_INSN_NAME (n));
2833 }
2834 else
2835 fprintf (sched_dump, " {%s}\n", GET_RTX_NAME (GET_CODE (insn)));
2836 continue;
2837 }
2838
2839 fprintf (sched_dump,
2840 ";; %s%5d%6d%6d%6d%6d%6d ",
2841 (SCHED_GROUP_P (insn) ? "+" : " "),
2842 INSN_UID (insn),
2843 INSN_CODE (insn),
2844 BLOCK_NUM (insn),
2845 sched_emulate_haifa_p ? -1 : sd_lists_size (insn, SD_LIST_BACK),
2846 (sel_sched_p () ? (sched_emulate_haifa_p ? -1
2847 : INSN_PRIORITY (insn))
2848 : INSN_PRIORITY (insn)),
2849 (sel_sched_p () ? (sched_emulate_haifa_p ? -1
2850 : insn_sched_cost (insn))
2851 : insn_sched_cost (insn)));
2852
2853 if (recog_memoized (insn) < 0)
2854 fprintf (sched_dump, "nothing");
2855 else
2856 print_reservation (sched_dump, insn);
2857
2858 fprintf (sched_dump, "\t: ");
2859 {
2860 sd_iterator_def sd_it;
2861 dep_t dep;
2862
2863 FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
2864 fprintf (sched_dump, "%d%s%s ", INSN_UID (DEP_CON (dep)),
2865 DEP_NONREG (dep) ? "n" : "",
2866 DEP_MULTIPLE (dep) ? "m" : "");
2867 }
2868 fprintf (sched_dump, "\n");
2869 }
2870
2871 fprintf (sched_dump, "\n");
2872 }
2873
2874 /* Dump dependency graph for the current region to a file using dot syntax. */
2875
2876 void
2877 dump_rgn_dependencies_dot (FILE *file)
2878 {
2879 rtx_insn *head, *tail, *con, *pro;
2880 sd_iterator_def sd_it;
2881 dep_t dep;
2882 int bb;
2883 pretty_printer pp;
2884
2885 pp.buffer->stream = file;
2886 pp_printf (&pp, "digraph SchedDG {\n");
2887
2888 for (bb = 0; bb < current_nr_blocks; ++bb)
2889 {
2890 /* Begin subgraph (basic block). */
2891 pp_printf (&pp, "subgraph cluster_block_%d {\n", bb);
2892 pp_printf (&pp, "\t" "color=blue;" "\n");
2893 pp_printf (&pp, "\t" "style=bold;" "\n");
2894 pp_printf (&pp, "\t" "label=\"BB #%d\";\n", BB_TO_BLOCK (bb));
2895
2896 /* Setup head and tail (no support for EBBs). */
2897 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2898 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2899 tail = NEXT_INSN (tail);
2900
2901 /* Dump all insns. */
2902 for (con = head; con != tail; con = NEXT_INSN (con))
2903 {
2904 if (!INSN_P (con))
2905 continue;
2906
2907 /* Pretty print the insn. */
2908 pp_printf (&pp, "\t%d [label=\"{", INSN_UID (con));
2909 pp_write_text_to_stream (&pp);
2910 print_insn (&pp, con, /*verbose=*/false);
2911 pp_write_text_as_dot_label_to_stream (&pp, /*for_record=*/true);
2912 pp_write_text_to_stream (&pp);
2913
2914 /* Dump instruction attributes. */
2915 pp_printf (&pp, "|{ uid:%d | luid:%d | prio:%d }}\",shape=record]\n",
2916 INSN_UID (con), INSN_LUID (con), INSN_PRIORITY (con));
2917
2918 /* Dump all deps. */
2919 FOR_EACH_DEP (con, SD_LIST_BACK, sd_it, dep)
2920 {
2921 int weight = 0;
2922 const char *color;
2923 pro = DEP_PRO (dep);
2924
2925 switch (DEP_TYPE (dep))
2926 {
2927 case REG_DEP_TRUE:
2928 color = "black";
2929 weight = 1;
2930 break;
2931 case REG_DEP_OUTPUT:
2932 case REG_DEP_ANTI:
2933 color = "orange";
2934 break;
2935 case REG_DEP_CONTROL:
2936 color = "blue";
2937 break;
2938 default:
2939 gcc_unreachable ();
2940 }
2941
2942 pp_printf (&pp, "\t%d -> %d [color=%s",
2943 INSN_UID (pro), INSN_UID (con), color);
2944 if (int cost = dep_cost (dep))
2945 pp_printf (&pp, ",label=%d", cost);
2946 pp_printf (&pp, ",weight=%d", weight);
2947 pp_printf (&pp, "];\n");
2948 }
2949 }
2950 pp_printf (&pp, "}\n");
2951 }
2952
2953 pp_printf (&pp, "}\n");
2954 pp_flush (&pp);
2955 }
2956
2957 /* Dump dependency graph for the current region to a file using dot syntax. */
2958
2959 DEBUG_FUNCTION void
2960 dump_rgn_dependencies_dot (const char *fname)
2961 {
2962 FILE *fp;
2963
2964 fp = fopen (fname, "w");
2965 if (!fp)
2966 {
2967 perror ("fopen");
2968 return;
2969 }
2970
2971 dump_rgn_dependencies_dot (fp);
2972 fclose (fp);
2973 }
2974
2975 \f
2976 /* Returns true if all the basic blocks of the current region have
2977 NOTE_DISABLE_SCHED_OF_BLOCK which means not to schedule that region. */
2978 bool
2979 sched_is_disabled_for_current_region_p (void)
2980 {
2981 int bb;
2982
2983 for (bb = 0; bb < current_nr_blocks; bb++)
2984 if (!(BASIC_BLOCK_FOR_FN (cfun,
2985 BB_TO_BLOCK (bb))->flags & BB_DISABLE_SCHEDULE))
2986 return false;
2987
2988 return true;
2989 }
2990
2991 /* Free all region dependencies saved in INSN_BACK_DEPS and
2992 INSN_RESOLVED_BACK_DEPS. The Haifa scheduler does this on the fly
2993 when scheduling, so this function is supposed to be called from
2994 the selective scheduling only. */
2995 void
2996 free_rgn_deps (void)
2997 {
2998 int bb;
2999
3000 for (bb = 0; bb < current_nr_blocks; bb++)
3001 {
3002 rtx_insn *head, *tail;
3003
3004 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
3005 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
3006
3007 sched_free_deps (head, tail, false);
3008 }
3009 }
3010
3011 static int rgn_n_insns;
3012
3013 /* Compute insn priority for a current region. */
3014 void
3015 compute_priorities (void)
3016 {
3017 int bb;
3018
3019 current_sched_info->sched_max_insns_priority = 0;
3020 for (bb = 0; bb < current_nr_blocks; bb++)
3021 {
3022 rtx_insn *head, *tail;
3023
3024 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
3025 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
3026
3027 if (no_real_insns_p (head, tail))
3028 continue;
3029
3030 rgn_n_insns += set_priorities (head, tail);
3031 }
3032 current_sched_info->sched_max_insns_priority++;
3033 }
3034
3035 /* (Re-)initialize the arrays of DFA states at the end of each basic block.
3036
3037 SAVED_LAST_BASIC_BLOCK is the previous length of the arrays. It must be
3038 zero for the first call to this function, to allocate the arrays for the
3039 first time.
3040
3041 This function is called once during initialization of the scheduler, and
3042 called again to resize the arrays if new basic blocks have been created,
3043 for example for speculation recovery code. */
3044
3045 static void
3046 realloc_bb_state_array (int saved_last_basic_block)
3047 {
3048 char *old_bb_state_array = bb_state_array;
3049 size_t lbb = (size_t) last_basic_block_for_fn (cfun);
3050 size_t slbb = (size_t) saved_last_basic_block;
3051
3052 /* Nothing to do if nothing changed since the last time this was called. */
3053 if (saved_last_basic_block == last_basic_block_for_fn (cfun))
3054 return;
3055
3056 /* The selective scheduler doesn't use the state arrays. */
3057 if (sel_sched_p ())
3058 {
3059 gcc_assert (bb_state_array == NULL && bb_state == NULL);
3060 return;
3061 }
3062
3063 gcc_checking_assert (saved_last_basic_block == 0
3064 || (bb_state_array != NULL && bb_state != NULL));
3065
3066 bb_state_array = XRESIZEVEC (char, bb_state_array, lbb * dfa_state_size);
3067 bb_state = XRESIZEVEC (state_t, bb_state, lbb);
3068
3069 /* If BB_STATE_ARRAY has moved, fixup all the state pointers array.
3070 Otherwise only fixup the newly allocated ones. For the state
3071 array itself, only initialize the new entries. */
3072 bool bb_state_array_moved = (bb_state_array != old_bb_state_array);
3073 for (size_t i = bb_state_array_moved ? 0 : slbb; i < lbb; i++)
3074 bb_state[i] = (state_t) (bb_state_array + i * dfa_state_size);
3075 for (size_t i = slbb; i < lbb; i++)
3076 state_reset (bb_state[i]);
3077 }
3078
3079 /* Free the arrays of DFA states at the end of each basic block. */
3080
3081 static void
3082 free_bb_state_array (void)
3083 {
3084 free (bb_state_array);
3085 free (bb_state);
3086 bb_state_array = NULL;
3087 bb_state = NULL;
3088 }
3089
3090 /* Schedule a region. A region is either an inner loop, a loop-free
3091 subroutine, or a single basic block. Each bb in the region is
3092 scheduled after its flow predecessors. */
3093
3094 static void
3095 schedule_region (int rgn)
3096 {
3097 int bb;
3098 int sched_rgn_n_insns = 0;
3099
3100 rgn_n_insns = 0;
3101
3102 /* Do not support register pressure sensitive scheduling for the new regions
3103 as we don't update the liveness info for them. */
3104 if (sched_pressure != SCHED_PRESSURE_NONE
3105 && rgn >= nr_regions_initial)
3106 {
3107 free_global_sched_pressure_data ();
3108 sched_pressure = SCHED_PRESSURE_NONE;
3109 }
3110
3111 rgn_setup_region (rgn);
3112
3113 /* Don't schedule region that is marked by
3114 NOTE_DISABLE_SCHED_OF_BLOCK. */
3115 if (sched_is_disabled_for_current_region_p ())
3116 return;
3117
3118 sched_rgn_compute_dependencies (rgn);
3119
3120 sched_rgn_local_init (rgn);
3121
3122 /* Set priorities. */
3123 compute_priorities ();
3124
3125 sched_extend_ready_list (rgn_n_insns);
3126
3127 if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
3128 {
3129 sched_init_region_reg_pressure_info ();
3130 for (bb = 0; bb < current_nr_blocks; bb++)
3131 {
3132 basic_block first_bb, last_bb;
3133 rtx_insn *head, *tail;
3134
3135 first_bb = EBB_FIRST_BB (bb);
3136 last_bb = EBB_LAST_BB (bb);
3137
3138 get_ebb_head_tail (first_bb, last_bb, &head, &tail);
3139
3140 if (no_real_insns_p (head, tail))
3141 {
3142 gcc_assert (first_bb == last_bb);
3143 continue;
3144 }
3145 sched_setup_bb_reg_pressure_info (first_bb, PREV_INSN (head));
3146 }
3147 }
3148
3149 /* Now we can schedule all blocks. */
3150 for (bb = 0; bb < current_nr_blocks; bb++)
3151 {
3152 basic_block first_bb, last_bb, curr_bb;
3153 rtx_insn *head, *tail;
3154
3155 first_bb = EBB_FIRST_BB (bb);
3156 last_bb = EBB_LAST_BB (bb);
3157
3158 get_ebb_head_tail (first_bb, last_bb, &head, &tail);
3159
3160 if (no_real_insns_p (head, tail))
3161 {
3162 gcc_assert (first_bb == last_bb);
3163 continue;
3164 }
3165
3166 current_sched_info->prev_head = PREV_INSN (head);
3167 current_sched_info->next_tail = NEXT_INSN (tail);
3168
3169 remove_notes (head, tail);
3170
3171 unlink_bb_notes (first_bb, last_bb);
3172
3173 target_bb = bb;
3174
3175 gcc_assert (flag_schedule_interblock || current_nr_blocks == 1);
3176 current_sched_info->queue_must_finish_empty = current_nr_blocks == 1;
3177
3178 curr_bb = first_bb;
3179 if (dbg_cnt (sched_block))
3180 {
3181 edge f;
3182 int saved_last_basic_block = last_basic_block_for_fn (cfun);
3183
3184 schedule_block (&curr_bb, bb_state[first_bb->index]);
3185 gcc_assert (EBB_FIRST_BB (bb) == first_bb);
3186 sched_rgn_n_insns += sched_n_insns;
3187 realloc_bb_state_array (saved_last_basic_block);
3188 f = find_fallthru_edge (last_bb->succs);
3189 if (f
3190 && (!f->probability.initialized_p ()
3191 || f->probability.to_reg_br_prob_base () * 100 / REG_BR_PROB_BASE >=
3192 PARAM_VALUE (PARAM_SCHED_STATE_EDGE_PROB_CUTOFF)))
3193 {
3194 memcpy (bb_state[f->dest->index], curr_state,
3195 dfa_state_size);
3196 if (sched_verbose >= 5)
3197 fprintf (sched_dump, "saving state for edge %d->%d\n",
3198 f->src->index, f->dest->index);
3199 }
3200 }
3201 else
3202 {
3203 sched_rgn_n_insns += rgn_n_insns;
3204 }
3205
3206 /* Clean up. */
3207 if (current_nr_blocks > 1)
3208 free_trg_info ();
3209 }
3210
3211 /* Sanity check: verify that all region insns were scheduled. */
3212 gcc_assert (sched_rgn_n_insns == rgn_n_insns);
3213
3214 sched_finish_ready_list ();
3215
3216 /* Done with this region. */
3217 sched_rgn_local_finish ();
3218
3219 /* Free dependencies. */
3220 for (bb = 0; bb < current_nr_blocks; ++bb)
3221 free_block_dependencies (bb);
3222
3223 gcc_assert (haifa_recovery_bb_ever_added_p
3224 || deps_pools_are_empty_p ());
3225 }
3226
3227 /* Initialize data structures for region scheduling. */
3228
3229 void
3230 sched_rgn_init (bool single_blocks_p)
3231 {
3232 min_spec_prob = ((PARAM_VALUE (PARAM_MIN_SPEC_PROB) * REG_BR_PROB_BASE)
3233 / 100);
3234
3235 nr_inter = 0;
3236 nr_spec = 0;
3237
3238 extend_regions ();
3239
3240 CONTAINING_RGN (ENTRY_BLOCK) = -1;
3241 CONTAINING_RGN (EXIT_BLOCK) = -1;
3242
3243 realloc_bb_state_array (0);
3244
3245 /* Compute regions for scheduling. */
3246 if (single_blocks_p
3247 || n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS + 1
3248 || !flag_schedule_interblock
3249 || is_cfg_nonregular ())
3250 {
3251 find_single_block_region (sel_sched_p ());
3252 }
3253 else
3254 {
3255 /* Compute the dominators and post dominators. */
3256 if (!sel_sched_p ())
3257 calculate_dominance_info (CDI_DOMINATORS);
3258
3259 /* Find regions. */
3260 find_rgns ();
3261
3262 if (sched_verbose >= 3)
3263 debug_regions ();
3264
3265 /* For now. This will move as more and more of haifa is converted
3266 to using the cfg code. */
3267 if (!sel_sched_p ())
3268 free_dominance_info (CDI_DOMINATORS);
3269 }
3270
3271 gcc_assert (nr_regions > 0 && nr_regions <= n_basic_blocks_for_fn (cfun));
3272
3273 RGN_BLOCKS (nr_regions) = (RGN_BLOCKS (nr_regions - 1)
3274 + RGN_NR_BLOCKS (nr_regions - 1));
3275 nr_regions_initial = nr_regions;
3276 }
3277
3278 /* Free data structures for region scheduling. */
3279 void
3280 sched_rgn_finish (void)
3281 {
3282 free_bb_state_array ();
3283
3284 /* Reposition the prologue and epilogue notes in case we moved the
3285 prologue/epilogue insns. */
3286 if (reload_completed)
3287 reposition_prologue_and_epilogue_notes ();
3288
3289 if (sched_verbose)
3290 {
3291 if (reload_completed == 0
3292 && flag_schedule_interblock)
3293 {
3294 fprintf (sched_dump,
3295 "\n;; Procedure interblock/speculative motions == %d/%d \n",
3296 nr_inter, nr_spec);
3297 }
3298 else
3299 gcc_assert (nr_inter <= 0);
3300 fprintf (sched_dump, "\n\n");
3301 }
3302
3303 nr_regions = 0;
3304
3305 free (rgn_table);
3306 rgn_table = NULL;
3307
3308 free (rgn_bb_table);
3309 rgn_bb_table = NULL;
3310
3311 free (block_to_bb);
3312 block_to_bb = NULL;
3313
3314 free (containing_rgn);
3315 containing_rgn = NULL;
3316
3317 free (ebb_head);
3318 ebb_head = NULL;
3319 }
3320
3321 /* Setup global variables like CURRENT_BLOCKS and CURRENT_NR_BLOCK to
3322 point to the region RGN. */
3323 void
3324 rgn_setup_region (int rgn)
3325 {
3326 int bb;
3327
3328 /* Set variables for the current region. */
3329 current_nr_blocks = RGN_NR_BLOCKS (rgn);
3330 current_blocks = RGN_BLOCKS (rgn);
3331
3332 /* EBB_HEAD is a region-scope structure. But we realloc it for
3333 each region to save time/memory/something else.
3334 See comments in add_block1, for what reasons we allocate +1 element. */
3335 ebb_head = XRESIZEVEC (int, ebb_head, current_nr_blocks + 1);
3336 for (bb = 0; bb <= current_nr_blocks; bb++)
3337 ebb_head[bb] = current_blocks + bb;
3338 }
3339
3340 /* Compute instruction dependencies in region RGN. */
3341 void
3342 sched_rgn_compute_dependencies (int rgn)
3343 {
3344 if (!RGN_DONT_CALC_DEPS (rgn))
3345 {
3346 int bb;
3347
3348 if (sel_sched_p ())
3349 sched_emulate_haifa_p = 1;
3350
3351 init_deps_global ();
3352
3353 /* Initializations for region data dependence analysis. */
3354 bb_deps = XNEWVEC (class deps_desc, current_nr_blocks);
3355 for (bb = 0; bb < current_nr_blocks; bb++)
3356 init_deps (bb_deps + bb, false);
3357
3358 /* Initialize bitmap used in add_branch_dependences. */
3359 insn_referenced = sbitmap_alloc (sched_max_luid);
3360 bitmap_clear (insn_referenced);
3361
3362 /* Compute backward dependencies. */
3363 for (bb = 0; bb < current_nr_blocks; bb++)
3364 compute_block_dependences (bb);
3365
3366 sbitmap_free (insn_referenced);
3367 free_pending_lists ();
3368 finish_deps_global ();
3369 free (bb_deps);
3370
3371 /* We don't want to recalculate this twice. */
3372 RGN_DONT_CALC_DEPS (rgn) = 1;
3373
3374 if (sel_sched_p ())
3375 sched_emulate_haifa_p = 0;
3376 }
3377 else
3378 /* (This is a recovery block. It is always a single block region.)
3379 OR (We use selective scheduling.) */
3380 gcc_assert (current_nr_blocks == 1 || sel_sched_p ());
3381 }
3382
3383 /* Init region data structures. Returns true if this region should
3384 not be scheduled. */
3385 void
3386 sched_rgn_local_init (int rgn)
3387 {
3388 int bb;
3389
3390 /* Compute interblock info: probabilities, split-edges, dominators, etc. */
3391 if (current_nr_blocks > 1)
3392 {
3393 basic_block block;
3394 edge e;
3395 edge_iterator ei;
3396
3397 prob = XNEWVEC (int, current_nr_blocks);
3398
3399 dom = sbitmap_vector_alloc (current_nr_blocks, current_nr_blocks);
3400 bitmap_vector_clear (dom, current_nr_blocks);
3401
3402 /* Use ->aux to implement EDGE_TO_BIT mapping. */
3403 rgn_nr_edges = 0;
3404 FOR_EACH_BB_FN (block, cfun)
3405 {
3406 if (CONTAINING_RGN (block->index) != rgn)
3407 continue;
3408 FOR_EACH_EDGE (e, ei, block->succs)
3409 SET_EDGE_TO_BIT (e, rgn_nr_edges++);
3410 }
3411
3412 rgn_edges = XNEWVEC (edge, rgn_nr_edges);
3413 rgn_nr_edges = 0;
3414 FOR_EACH_BB_FN (block, cfun)
3415 {
3416 if (CONTAINING_RGN (block->index) != rgn)
3417 continue;
3418 FOR_EACH_EDGE (e, ei, block->succs)
3419 rgn_edges[rgn_nr_edges++] = e;
3420 }
3421
3422 /* Split edges. */
3423 pot_split = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges);
3424 bitmap_vector_clear (pot_split, current_nr_blocks);
3425 ancestor_edges = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges);
3426 bitmap_vector_clear (ancestor_edges, current_nr_blocks);
3427
3428 /* Compute probabilities, dominators, split_edges. */
3429 for (bb = 0; bb < current_nr_blocks; bb++)
3430 compute_dom_prob_ps (bb);
3431
3432 /* Cleanup ->aux used for EDGE_TO_BIT mapping. */
3433 /* We don't need them anymore. But we want to avoid duplication of
3434 aux fields in the newly created edges. */
3435 FOR_EACH_BB_FN (block, cfun)
3436 {
3437 if (CONTAINING_RGN (block->index) != rgn)
3438 continue;
3439 FOR_EACH_EDGE (e, ei, block->succs)
3440 e->aux = NULL;
3441 }
3442 }
3443 }
3444
3445 /* Free data computed for the finished region. */
3446 void
3447 sched_rgn_local_free (void)
3448 {
3449 free (prob);
3450 sbitmap_vector_free (dom);
3451 sbitmap_vector_free (pot_split);
3452 sbitmap_vector_free (ancestor_edges);
3453 free (rgn_edges);
3454 }
3455
3456 /* Free data computed for the finished region. */
3457 void
3458 sched_rgn_local_finish (void)
3459 {
3460 if (current_nr_blocks > 1 && !sel_sched_p ())
3461 {
3462 sched_rgn_local_free ();
3463 }
3464 }
3465
3466 /* Setup scheduler infos. */
3467 void
3468 rgn_setup_common_sched_info (void)
3469 {
3470 memcpy (&rgn_common_sched_info, &haifa_common_sched_info,
3471 sizeof (rgn_common_sched_info));
3472
3473 rgn_common_sched_info.fix_recovery_cfg = rgn_fix_recovery_cfg;
3474 rgn_common_sched_info.add_block = rgn_add_block;
3475 rgn_common_sched_info.estimate_number_of_insns
3476 = rgn_estimate_number_of_insns;
3477 rgn_common_sched_info.sched_pass_id = SCHED_RGN_PASS;
3478
3479 common_sched_info = &rgn_common_sched_info;
3480 }
3481
3482 /* Setup all *_sched_info structures (for the Haifa frontend
3483 and for the dependence analysis) in the interblock scheduler. */
3484 void
3485 rgn_setup_sched_infos (void)
3486 {
3487 if (!sel_sched_p ())
3488 memcpy (&rgn_sched_deps_info, &rgn_const_sched_deps_info,
3489 sizeof (rgn_sched_deps_info));
3490 else
3491 memcpy (&rgn_sched_deps_info, &rgn_const_sel_sched_deps_info,
3492 sizeof (rgn_sched_deps_info));
3493
3494 sched_deps_info = &rgn_sched_deps_info;
3495
3496 memcpy (&rgn_sched_info, &rgn_const_sched_info, sizeof (rgn_sched_info));
3497 current_sched_info = &rgn_sched_info;
3498 }
3499
3500 /* The one entry point in this file. */
3501 void
3502 schedule_insns (void)
3503 {
3504 int rgn;
3505
3506 /* Taking care of this degenerate case makes the rest of
3507 this code simpler. */
3508 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3509 return;
3510
3511 rgn_setup_common_sched_info ();
3512 rgn_setup_sched_infos ();
3513
3514 haifa_sched_init ();
3515 sched_rgn_init (reload_completed);
3516
3517 bitmap_initialize (&not_in_df, &bitmap_default_obstack);
3518
3519 /* Schedule every region in the subroutine. */
3520 for (rgn = 0; rgn < nr_regions; rgn++)
3521 if (dbg_cnt (sched_region))
3522 schedule_region (rgn);
3523
3524 /* Clean up. */
3525 sched_rgn_finish ();
3526 bitmap_release (&not_in_df);
3527
3528 haifa_sched_finish ();
3529 }
3530
3531 /* INSN has been added to/removed from current region. */
3532 static void
3533 rgn_add_remove_insn (rtx_insn *insn, int remove_p)
3534 {
3535 if (!remove_p)
3536 rgn_n_insns++;
3537 else
3538 rgn_n_insns--;
3539
3540 if (INSN_BB (insn) == target_bb)
3541 {
3542 if (!remove_p)
3543 target_n_insns++;
3544 else
3545 target_n_insns--;
3546 }
3547 }
3548
3549 /* Extend internal data structures. */
3550 void
3551 extend_regions (void)
3552 {
3553 rgn_table = XRESIZEVEC (region, rgn_table, n_basic_blocks_for_fn (cfun));
3554 rgn_bb_table = XRESIZEVEC (int, rgn_bb_table,
3555 n_basic_blocks_for_fn (cfun));
3556 block_to_bb = XRESIZEVEC (int, block_to_bb,
3557 last_basic_block_for_fn (cfun));
3558 containing_rgn = XRESIZEVEC (int, containing_rgn,
3559 last_basic_block_for_fn (cfun));
3560 }
3561
3562 void
3563 rgn_make_new_region_out_of_new_block (basic_block bb)
3564 {
3565 int i;
3566
3567 i = RGN_BLOCKS (nr_regions);
3568 /* I - first free position in rgn_bb_table. */
3569
3570 rgn_bb_table[i] = bb->index;
3571 RGN_NR_BLOCKS (nr_regions) = 1;
3572 RGN_HAS_REAL_EBB (nr_regions) = 0;
3573 RGN_DONT_CALC_DEPS (nr_regions) = 0;
3574 CONTAINING_RGN (bb->index) = nr_regions;
3575 BLOCK_TO_BB (bb->index) = 0;
3576
3577 nr_regions++;
3578
3579 RGN_BLOCKS (nr_regions) = i + 1;
3580 }
3581
3582 /* BB was added to ebb after AFTER. */
3583 static void
3584 rgn_add_block (basic_block bb, basic_block after)
3585 {
3586 extend_regions ();
3587 bitmap_set_bit (&not_in_df, bb->index);
3588
3589 if (after == 0 || after == EXIT_BLOCK_PTR_FOR_FN (cfun))
3590 {
3591 rgn_make_new_region_out_of_new_block (bb);
3592 RGN_DONT_CALC_DEPS (nr_regions - 1) = (after
3593 == EXIT_BLOCK_PTR_FOR_FN (cfun));
3594 }
3595 else
3596 {
3597 int i, pos;
3598
3599 /* We need to fix rgn_table, block_to_bb, containing_rgn
3600 and ebb_head. */
3601
3602 BLOCK_TO_BB (bb->index) = BLOCK_TO_BB (after->index);
3603
3604 /* We extend ebb_head to one more position to
3605 easily find the last position of the last ebb in
3606 the current region. Thus, ebb_head[BLOCK_TO_BB (after) + 1]
3607 is _always_ valid for access. */
3608
3609 i = BLOCK_TO_BB (after->index) + 1;
3610 pos = ebb_head[i] - 1;
3611 /* Now POS is the index of the last block in the region. */
3612
3613 /* Find index of basic block AFTER. */
3614 for (; rgn_bb_table[pos] != after->index; pos--)
3615 ;
3616
3617 pos++;
3618 gcc_assert (pos > ebb_head[i - 1]);
3619
3620 /* i - ebb right after "AFTER". */
3621 /* ebb_head[i] - VALID. */
3622
3623 /* Source position: ebb_head[i]
3624 Destination position: ebb_head[i] + 1
3625 Last position:
3626 RGN_BLOCKS (nr_regions) - 1
3627 Number of elements to copy: (last_position) - (source_position) + 1
3628 */
3629
3630 memmove (rgn_bb_table + pos + 1,
3631 rgn_bb_table + pos,
3632 ((RGN_BLOCKS (nr_regions) - 1) - (pos) + 1)
3633 * sizeof (*rgn_bb_table));
3634
3635 rgn_bb_table[pos] = bb->index;
3636
3637 for (; i <= current_nr_blocks; i++)
3638 ebb_head [i]++;
3639
3640 i = CONTAINING_RGN (after->index);
3641 CONTAINING_RGN (bb->index) = i;
3642
3643 RGN_HAS_REAL_EBB (i) = 1;
3644
3645 for (++i; i <= nr_regions; i++)
3646 RGN_BLOCKS (i)++;
3647 }
3648 }
3649
3650 /* Fix internal data after interblock movement of jump instruction.
3651 For parameter meaning please refer to
3652 sched-int.h: struct sched_info: fix_recovery_cfg. */
3653 static void
3654 rgn_fix_recovery_cfg (int bbi, int check_bbi, int check_bb_nexti)
3655 {
3656 int old_pos, new_pos, i;
3657
3658 BLOCK_TO_BB (check_bb_nexti) = BLOCK_TO_BB (bbi);
3659
3660 for (old_pos = ebb_head[BLOCK_TO_BB (check_bbi) + 1] - 1;
3661 rgn_bb_table[old_pos] != check_bb_nexti;
3662 old_pos--)
3663 ;
3664 gcc_assert (old_pos > ebb_head[BLOCK_TO_BB (check_bbi)]);
3665
3666 for (new_pos = ebb_head[BLOCK_TO_BB (bbi) + 1] - 1;
3667 rgn_bb_table[new_pos] != bbi;
3668 new_pos--)
3669 ;
3670 new_pos++;
3671 gcc_assert (new_pos > ebb_head[BLOCK_TO_BB (bbi)]);
3672
3673 gcc_assert (new_pos < old_pos);
3674
3675 memmove (rgn_bb_table + new_pos + 1,
3676 rgn_bb_table + new_pos,
3677 (old_pos - new_pos) * sizeof (*rgn_bb_table));
3678
3679 rgn_bb_table[new_pos] = check_bb_nexti;
3680
3681 for (i = BLOCK_TO_BB (bbi) + 1; i <= BLOCK_TO_BB (check_bbi); i++)
3682 ebb_head[i]++;
3683 }
3684
3685 /* Return next block in ebb chain. For parameter meaning please refer to
3686 sched-int.h: struct sched_info: advance_target_bb. */
3687 static basic_block
3688 advance_target_bb (basic_block bb, rtx_insn *insn)
3689 {
3690 if (insn)
3691 return 0;
3692
3693 gcc_assert (BLOCK_TO_BB (bb->index) == target_bb
3694 && BLOCK_TO_BB (bb->next_bb->index) == target_bb);
3695 return bb->next_bb;
3696 }
3697
3698 #endif
3699 \f
3700 /* Run instruction scheduler. */
3701 static unsigned int
3702 rest_of_handle_live_range_shrinkage (void)
3703 {
3704 #ifdef INSN_SCHEDULING
3705 int saved;
3706
3707 initialize_live_range_shrinkage ();
3708 saved = flag_schedule_interblock;
3709 flag_schedule_interblock = false;
3710 schedule_insns ();
3711 flag_schedule_interblock = saved;
3712 finish_live_range_shrinkage ();
3713 #endif
3714 return 0;
3715 }
3716
3717 /* Run instruction scheduler. */
3718 static unsigned int
3719 rest_of_handle_sched (void)
3720 {
3721 #ifdef INSN_SCHEDULING
3722 if (flag_selective_scheduling
3723 && ! maybe_skip_selective_scheduling ())
3724 run_selective_scheduling ();
3725 else
3726 schedule_insns ();
3727 #endif
3728 return 0;
3729 }
3730
3731 /* Run second scheduling pass after reload. */
3732 static unsigned int
3733 rest_of_handle_sched2 (void)
3734 {
3735 #ifdef INSN_SCHEDULING
3736 if (flag_selective_scheduling2
3737 && ! maybe_skip_selective_scheduling ())
3738 run_selective_scheduling ();
3739 else
3740 {
3741 /* Do control and data sched analysis again,
3742 and write some more of the results to dump file. */
3743 if (flag_sched2_use_superblocks)
3744 schedule_ebbs ();
3745 else
3746 schedule_insns ();
3747 }
3748 #endif
3749 return 0;
3750 }
3751
3752 static unsigned int
3753 rest_of_handle_sched_fusion (void)
3754 {
3755 #ifdef INSN_SCHEDULING
3756 sched_fusion = true;
3757 schedule_insns ();
3758 sched_fusion = false;
3759 #endif
3760 return 0;
3761 }
3762
3763 namespace {
3764
3765 const pass_data pass_data_live_range_shrinkage =
3766 {
3767 RTL_PASS, /* type */
3768 "lr_shrinkage", /* name */
3769 OPTGROUP_NONE, /* optinfo_flags */
3770 TV_LIVE_RANGE_SHRINKAGE, /* tv_id */
3771 0, /* properties_required */
3772 0, /* properties_provided */
3773 0, /* properties_destroyed */
3774 0, /* todo_flags_start */
3775 TODO_df_finish, /* todo_flags_finish */
3776 };
3777
3778 class pass_live_range_shrinkage : public rtl_opt_pass
3779 {
3780 public:
3781 pass_live_range_shrinkage(gcc::context *ctxt)
3782 : rtl_opt_pass(pass_data_live_range_shrinkage, ctxt)
3783 {}
3784
3785 /* opt_pass methods: */
3786 virtual bool gate (function *)
3787 {
3788 #ifdef INSN_SCHEDULING
3789 return flag_live_range_shrinkage;
3790 #else
3791 return 0;
3792 #endif
3793 }
3794
3795 virtual unsigned int execute (function *)
3796 {
3797 return rest_of_handle_live_range_shrinkage ();
3798 }
3799
3800 }; // class pass_live_range_shrinkage
3801
3802 } // anon namespace
3803
3804 rtl_opt_pass *
3805 make_pass_live_range_shrinkage (gcc::context *ctxt)
3806 {
3807 return new pass_live_range_shrinkage (ctxt);
3808 }
3809
3810 namespace {
3811
3812 const pass_data pass_data_sched =
3813 {
3814 RTL_PASS, /* type */
3815 "sched1", /* name */
3816 OPTGROUP_NONE, /* optinfo_flags */
3817 TV_SCHED, /* tv_id */
3818 0, /* properties_required */
3819 0, /* properties_provided */
3820 0, /* properties_destroyed */
3821 0, /* todo_flags_start */
3822 TODO_df_finish, /* todo_flags_finish */
3823 };
3824
3825 class pass_sched : public rtl_opt_pass
3826 {
3827 public:
3828 pass_sched (gcc::context *ctxt)
3829 : rtl_opt_pass (pass_data_sched, ctxt)
3830 {}
3831
3832 /* opt_pass methods: */
3833 virtual bool gate (function *);
3834 virtual unsigned int execute (function *) { return rest_of_handle_sched (); }
3835
3836 }; // class pass_sched
3837
3838 bool
3839 pass_sched::gate (function *)
3840 {
3841 #ifdef INSN_SCHEDULING
3842 return optimize > 0 && flag_schedule_insns && dbg_cnt (sched_func);
3843 #else
3844 return 0;
3845 #endif
3846 }
3847
3848 } // anon namespace
3849
3850 rtl_opt_pass *
3851 make_pass_sched (gcc::context *ctxt)
3852 {
3853 return new pass_sched (ctxt);
3854 }
3855
3856 namespace {
3857
3858 const pass_data pass_data_sched2 =
3859 {
3860 RTL_PASS, /* type */
3861 "sched2", /* name */
3862 OPTGROUP_NONE, /* optinfo_flags */
3863 TV_SCHED2, /* tv_id */
3864 0, /* properties_required */
3865 0, /* properties_provided */
3866 0, /* properties_destroyed */
3867 0, /* todo_flags_start */
3868 TODO_df_finish, /* todo_flags_finish */
3869 };
3870
3871 class pass_sched2 : public rtl_opt_pass
3872 {
3873 public:
3874 pass_sched2 (gcc::context *ctxt)
3875 : rtl_opt_pass (pass_data_sched2, ctxt)
3876 {}
3877
3878 /* opt_pass methods: */
3879 virtual bool gate (function *);
3880 virtual unsigned int execute (function *)
3881 {
3882 return rest_of_handle_sched2 ();
3883 }
3884
3885 }; // class pass_sched2
3886
3887 bool
3888 pass_sched2::gate (function *)
3889 {
3890 #ifdef INSN_SCHEDULING
3891 return optimize > 0 && flag_schedule_insns_after_reload
3892 && !targetm.delay_sched2 && dbg_cnt (sched2_func);
3893 #else
3894 return 0;
3895 #endif
3896 }
3897
3898 } // anon namespace
3899
3900 rtl_opt_pass *
3901 make_pass_sched2 (gcc::context *ctxt)
3902 {
3903 return new pass_sched2 (ctxt);
3904 }
3905
3906 namespace {
3907
3908 const pass_data pass_data_sched_fusion =
3909 {
3910 RTL_PASS, /* type */
3911 "sched_fusion", /* name */
3912 OPTGROUP_NONE, /* optinfo_flags */
3913 TV_SCHED_FUSION, /* tv_id */
3914 0, /* properties_required */
3915 0, /* properties_provided */
3916 0, /* properties_destroyed */
3917 0, /* todo_flags_start */
3918 TODO_df_finish, /* todo_flags_finish */
3919 };
3920
3921 class pass_sched_fusion : public rtl_opt_pass
3922 {
3923 public:
3924 pass_sched_fusion (gcc::context *ctxt)
3925 : rtl_opt_pass (pass_data_sched_fusion, ctxt)
3926 {}
3927
3928 /* opt_pass methods: */
3929 virtual bool gate (function *);
3930 virtual unsigned int execute (function *)
3931 {
3932 return rest_of_handle_sched_fusion ();
3933 }
3934
3935 }; // class pass_sched2
3936
3937 bool
3938 pass_sched_fusion::gate (function *)
3939 {
3940 #ifdef INSN_SCHEDULING
3941 /* Scheduling fusion relies on peephole2 to do real fusion work,
3942 so only enable it if peephole2 is in effect. */
3943 return (optimize > 0 && flag_peephole2
3944 && flag_schedule_fusion && targetm.sched.fusion_priority != NULL);
3945 #else
3946 return 0;
3947 #endif
3948 }
3949
3950 } // anon namespace
3951
3952 rtl_opt_pass *
3953 make_pass_sched_fusion (gcc::context *ctxt)
3954 {
3955 return new pass_sched_fusion (ctxt);
3956 }
3957
3958 #if __GNUC__ >= 10
3959 # pragma GCC diagnostic pop
3960 #endif