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1 /* Instruction scheduling pass.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
4 and currently maintained by, Jim Wilson (wilson@cygnus.com)
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* This pass implements list scheduling within basic blocks. It is
23 run twice: (1) after flow analysis, but before register allocation,
24 and (2) after register allocation.
25
26 The first run performs interblock scheduling, moving insns between
27 different blocks in the same "region", and the second runs only
28 basic block scheduling.
29
30 Interblock motions performed are useful motions and speculative
31 motions, including speculative loads. Motions requiring code
32 duplication are not supported. The identification of motion type
33 and the check for validity of speculative motions requires
34 construction and analysis of the function's control flow graph.
35
36 The main entry point for this pass is schedule_insns(), called for
37 each function. The work of the scheduler is organized in three
38 levels: (1) function level: insns are subject to splitting,
39 control-flow-graph is constructed, regions are computed (after
40 reload, each region is of one block), (2) region level: control
41 flow graph attributes required for interblock scheduling are
42 computed (dominators, reachability, etc.), data dependences and
43 priorities are computed, and (3) block level: insns in the block
44 are actually scheduled. */
45 \f
46 #include "config.h"
47 #include "system.h"
48 #include "coretypes.h"
49 #include "backend.h"
50 #include "target.h"
51 #include "rtl.h"
52 #include "df.h"
53 #include "tm_p.h"
54 #include "insn-config.h"
55 #include "regs.h"
56 #include "emit-rtl.h"
57 #include "recog.h"
58 #include "diagnostic-core.h"
59 #include "profile.h"
60 #include "flags.h"
61 #include "insn-attr.h"
62 #include "except.h"
63 #include "params.h"
64 #include "cfganal.h"
65 #include "sched-int.h"
66 #include "sel-sched.h"
67 #include "tree-pass.h"
68 #include "dbgcnt.h"
69
70 #ifdef INSN_SCHEDULING
71
72 /* Some accessor macros for h_i_d members only used within this file. */
73 #define FED_BY_SPEC_LOAD(INSN) (HID (INSN)->fed_by_spec_load)
74 #define IS_LOAD_INSN(INSN) (HID (insn)->is_load_insn)
75
76 /* nr_inter/spec counts interblock/speculative motion for the function. */
77 static int nr_inter, nr_spec;
78
79 static int is_cfg_nonregular (void);
80
81 /* Number of regions in the procedure. */
82 int nr_regions = 0;
83
84 /* Same as above before adding any new regions. */
85 static int nr_regions_initial = 0;
86
87 /* Table of region descriptions. */
88 region *rgn_table = NULL;
89
90 /* Array of lists of regions' blocks. */
91 int *rgn_bb_table = NULL;
92
93 /* Topological order of blocks in the region (if b2 is reachable from
94 b1, block_to_bb[b2] > block_to_bb[b1]). Note: A basic block is
95 always referred to by either block or b, while its topological
96 order name (in the region) is referred to by bb. */
97 int *block_to_bb = NULL;
98
99 /* The number of the region containing a block. */
100 int *containing_rgn = NULL;
101
102 /* ebb_head [i] - is index in rgn_bb_table of the head basic block of i'th ebb.
103 Currently we can get a ebb only through splitting of currently
104 scheduling block, therefore, we don't need ebb_head array for every region,
105 hence, its sufficient to hold it for current one only. */
106 int *ebb_head = NULL;
107
108 /* The minimum probability of reaching a source block so that it will be
109 considered for speculative scheduling. */
110 static int min_spec_prob;
111
112 static void find_single_block_region (bool);
113 static void find_rgns (void);
114 static bool too_large (int, int *, int *);
115
116 /* Blocks of the current region being scheduled. */
117 int current_nr_blocks;
118 int current_blocks;
119
120 /* A speculative motion requires checking live information on the path
121 from 'source' to 'target'. The split blocks are those to be checked.
122 After a speculative motion, live information should be modified in
123 the 'update' blocks.
124
125 Lists of split and update blocks for each candidate of the current
126 target are in array bblst_table. */
127 static basic_block *bblst_table;
128 static int bblst_size, bblst_last;
129
130 /* Arrays that hold the DFA state at the end of a basic block, to re-use
131 as the initial state at the start of successor blocks. The BB_STATE
132 array holds the actual DFA state, and BB_STATE_ARRAY[I] is a pointer
133 into BB_STATE for basic block I. FIXME: This should be a vec. */
134 static char *bb_state_array = NULL;
135 static state_t *bb_state = NULL;
136
137 /* Target info declarations.
138
139 The block currently being scheduled is referred to as the "target" block,
140 while other blocks in the region from which insns can be moved to the
141 target are called "source" blocks. The candidate structure holds info
142 about such sources: are they valid? Speculative? Etc. */
143 struct bblst
144 {
145 basic_block *first_member;
146 int nr_members;
147 };
148
149 struct candidate
150 {
151 char is_valid;
152 char is_speculative;
153 int src_prob;
154 bblst split_bbs;
155 bblst update_bbs;
156 };
157
158 static candidate *candidate_table;
159 #define IS_VALID(src) (candidate_table[src].is_valid)
160 #define IS_SPECULATIVE(src) (candidate_table[src].is_speculative)
161 #define IS_SPECULATIVE_INSN(INSN) \
162 (IS_SPECULATIVE (BLOCK_TO_BB (BLOCK_NUM (INSN))))
163 #define SRC_PROB(src) ( candidate_table[src].src_prob )
164
165 /* The bb being currently scheduled. */
166 int target_bb;
167
168 /* List of edges. */
169 struct edgelst
170 {
171 edge *first_member;
172 int nr_members;
173 };
174
175 static edge *edgelst_table;
176 static int edgelst_last;
177
178 static void extract_edgelst (sbitmap, edgelst *);
179
180 /* Target info functions. */
181 static void split_edges (int, int, edgelst *);
182 static void compute_trg_info (int);
183 void debug_candidate (int);
184 void debug_candidates (int);
185
186 /* Dominators array: dom[i] contains the sbitmap of dominators of
187 bb i in the region. */
188 static sbitmap *dom;
189
190 /* bb 0 is the only region entry. */
191 #define IS_RGN_ENTRY(bb) (!bb)
192
193 /* Is bb_src dominated by bb_trg. */
194 #define IS_DOMINATED(bb_src, bb_trg) \
195 ( bitmap_bit_p (dom[bb_src], bb_trg) )
196
197 /* Probability: Prob[i] is an int in [0, REG_BR_PROB_BASE] which is
198 the probability of bb i relative to the region entry. */
199 static int *prob;
200
201 /* Bit-set of edges, where bit i stands for edge i. */
202 typedef sbitmap edgeset;
203
204 /* Number of edges in the region. */
205 static int rgn_nr_edges;
206
207 /* Array of size rgn_nr_edges. */
208 static edge *rgn_edges;
209
210 /* Mapping from each edge in the graph to its number in the rgn. */
211 #define EDGE_TO_BIT(edge) ((int)(size_t)(edge)->aux)
212 #define SET_EDGE_TO_BIT(edge,nr) ((edge)->aux = (void *)(size_t)(nr))
213
214 /* The split edges of a source bb is different for each target
215 bb. In order to compute this efficiently, the 'potential-split edges'
216 are computed for each bb prior to scheduling a region. This is actually
217 the split edges of each bb relative to the region entry.
218
219 pot_split[bb] is the set of potential split edges of bb. */
220 static edgeset *pot_split;
221
222 /* For every bb, a set of its ancestor edges. */
223 static edgeset *ancestor_edges;
224
225 #define INSN_PROBABILITY(INSN) (SRC_PROB (BLOCK_TO_BB (BLOCK_NUM (INSN))))
226
227 /* Speculative scheduling functions. */
228 static int check_live_1 (int, rtx);
229 static void update_live_1 (int, rtx);
230 static int is_pfree (rtx, int, int);
231 static int find_conditional_protection (rtx_insn *, int);
232 static int is_conditionally_protected (rtx, int, int);
233 static int is_prisky (rtx, int, int);
234 static int is_exception_free (rtx_insn *, int, int);
235
236 static bool sets_likely_spilled (rtx);
237 static void sets_likely_spilled_1 (rtx, const_rtx, void *);
238 static void add_branch_dependences (rtx_insn *, rtx_insn *);
239 static void compute_block_dependences (int);
240
241 static void schedule_region (int);
242 static void concat_insn_mem_list (rtx_insn_list *, rtx_expr_list *,
243 rtx_insn_list **, rtx_expr_list **);
244 static void propagate_deps (int, struct deps_desc *);
245 static void free_pending_lists (void);
246
247 /* Functions for construction of the control flow graph. */
248
249 /* Return 1 if control flow graph should not be constructed, 0 otherwise.
250
251 We decide not to build the control flow graph if there is possibly more
252 than one entry to the function, if computed branches exist, if we
253 have nonlocal gotos, or if we have an unreachable loop. */
254
255 static int
256 is_cfg_nonregular (void)
257 {
258 basic_block b;
259 rtx_insn *insn;
260
261 /* If we have a label that could be the target of a nonlocal goto, then
262 the cfg is not well structured. */
263 if (nonlocal_goto_handler_labels)
264 return 1;
265
266 /* If we have any forced labels, then the cfg is not well structured. */
267 if (forced_labels)
268 return 1;
269
270 /* If we have exception handlers, then we consider the cfg not well
271 structured. ?!? We should be able to handle this now that we
272 compute an accurate cfg for EH. */
273 if (current_function_has_exception_handlers ())
274 return 1;
275
276 /* If we have insns which refer to labels as non-jumped-to operands,
277 then we consider the cfg not well structured. */
278 FOR_EACH_BB_FN (b, cfun)
279 FOR_BB_INSNS (b, insn)
280 {
281 rtx note, set, dest;
282 rtx_insn *next;
283
284 /* If this function has a computed jump, then we consider the cfg
285 not well structured. */
286 if (JUMP_P (insn) && computed_jump_p (insn))
287 return 1;
288
289 if (!INSN_P (insn))
290 continue;
291
292 note = find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX);
293 if (note == NULL_RTX)
294 continue;
295
296 /* For that label not to be seen as a referred-to label, this
297 must be a single-set which is feeding a jump *only*. This
298 could be a conditional jump with the label split off for
299 machine-specific reasons or a casesi/tablejump. */
300 next = next_nonnote_insn (insn);
301 if (next == NULL_RTX
302 || !JUMP_P (next)
303 || (JUMP_LABEL (next) != XEXP (note, 0)
304 && find_reg_note (next, REG_LABEL_TARGET,
305 XEXP (note, 0)) == NULL_RTX)
306 || BLOCK_FOR_INSN (insn) != BLOCK_FOR_INSN (next))
307 return 1;
308
309 set = single_set (insn);
310 if (set == NULL_RTX)
311 return 1;
312
313 dest = SET_DEST (set);
314 if (!REG_P (dest) || !dead_or_set_p (next, dest))
315 return 1;
316 }
317
318 /* Unreachable loops with more than one basic block are detected
319 during the DFS traversal in find_rgns.
320
321 Unreachable loops with a single block are detected here. This
322 test is redundant with the one in find_rgns, but it's much
323 cheaper to go ahead and catch the trivial case here. */
324 FOR_EACH_BB_FN (b, cfun)
325 {
326 if (EDGE_COUNT (b->preds) == 0
327 || (single_pred_p (b)
328 && single_pred (b) == b))
329 return 1;
330 }
331
332 /* All the tests passed. Consider the cfg well structured. */
333 return 0;
334 }
335
336 /* Extract list of edges from a bitmap containing EDGE_TO_BIT bits. */
337
338 static void
339 extract_edgelst (sbitmap set, edgelst *el)
340 {
341 unsigned int i = 0;
342 sbitmap_iterator sbi;
343
344 /* edgelst table space is reused in each call to extract_edgelst. */
345 edgelst_last = 0;
346
347 el->first_member = &edgelst_table[edgelst_last];
348 el->nr_members = 0;
349
350 /* Iterate over each word in the bitset. */
351 EXECUTE_IF_SET_IN_BITMAP (set, 0, i, sbi)
352 {
353 edgelst_table[edgelst_last++] = rgn_edges[i];
354 el->nr_members++;
355 }
356 }
357
358 /* Functions for the construction of regions. */
359
360 /* Print the regions, for debugging purposes. Callable from debugger. */
361
362 DEBUG_FUNCTION void
363 debug_regions (void)
364 {
365 int rgn, bb;
366
367 fprintf (sched_dump, "\n;; ------------ REGIONS ----------\n\n");
368 for (rgn = 0; rgn < nr_regions; rgn++)
369 {
370 fprintf (sched_dump, ";;\trgn %d nr_blocks %d:\n", rgn,
371 rgn_table[rgn].rgn_nr_blocks);
372 fprintf (sched_dump, ";;\tbb/block: ");
373
374 /* We don't have ebb_head initialized yet, so we can't use
375 BB_TO_BLOCK (). */
376 current_blocks = RGN_BLOCKS (rgn);
377
378 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
379 fprintf (sched_dump, " %d/%d ", bb, rgn_bb_table[current_blocks + bb]);
380
381 fprintf (sched_dump, "\n\n");
382 }
383 }
384
385 /* Print the region's basic blocks. */
386
387 DEBUG_FUNCTION void
388 debug_region (int rgn)
389 {
390 int bb;
391
392 fprintf (stderr, "\n;; ------------ REGION %d ----------\n\n", rgn);
393 fprintf (stderr, ";;\trgn %d nr_blocks %d:\n", rgn,
394 rgn_table[rgn].rgn_nr_blocks);
395 fprintf (stderr, ";;\tbb/block: ");
396
397 /* We don't have ebb_head initialized yet, so we can't use
398 BB_TO_BLOCK (). */
399 current_blocks = RGN_BLOCKS (rgn);
400
401 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
402 fprintf (stderr, " %d/%d ", bb, rgn_bb_table[current_blocks + bb]);
403
404 fprintf (stderr, "\n\n");
405
406 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
407 {
408 dump_bb (stderr,
409 BASIC_BLOCK_FOR_FN (cfun, rgn_bb_table[current_blocks + bb]),
410 0, TDF_SLIM | TDF_BLOCKS);
411 fprintf (stderr, "\n");
412 }
413
414 fprintf (stderr, "\n");
415
416 }
417
418 /* True when a bb with index BB_INDEX contained in region RGN. */
419 static bool
420 bb_in_region_p (int bb_index, int rgn)
421 {
422 int i;
423
424 for (i = 0; i < rgn_table[rgn].rgn_nr_blocks; i++)
425 if (rgn_bb_table[current_blocks + i] == bb_index)
426 return true;
427
428 return false;
429 }
430
431 /* Dump region RGN to file F using dot syntax. */
432 void
433 dump_region_dot (FILE *f, int rgn)
434 {
435 int i;
436
437 fprintf (f, "digraph Region_%d {\n", rgn);
438
439 /* We don't have ebb_head initialized yet, so we can't use
440 BB_TO_BLOCK (). */
441 current_blocks = RGN_BLOCKS (rgn);
442
443 for (i = 0; i < rgn_table[rgn].rgn_nr_blocks; i++)
444 {
445 edge e;
446 edge_iterator ei;
447 int src_bb_num = rgn_bb_table[current_blocks + i];
448 basic_block bb = BASIC_BLOCK_FOR_FN (cfun, src_bb_num);
449
450 FOR_EACH_EDGE (e, ei, bb->succs)
451 if (bb_in_region_p (e->dest->index, rgn))
452 fprintf (f, "\t%d -> %d\n", src_bb_num, e->dest->index);
453 }
454 fprintf (f, "}\n");
455 }
456
457 /* The same, but first open a file specified by FNAME. */
458 void
459 dump_region_dot_file (const char *fname, int rgn)
460 {
461 FILE *f = fopen (fname, "wt");
462 dump_region_dot (f, rgn);
463 fclose (f);
464 }
465
466 /* Build a single block region for each basic block in the function.
467 This allows for using the same code for interblock and basic block
468 scheduling. */
469
470 static void
471 find_single_block_region (bool ebbs_p)
472 {
473 basic_block bb, ebb_start;
474 int i = 0;
475
476 nr_regions = 0;
477
478 if (ebbs_p) {
479 int probability_cutoff;
480 if (profile_info && flag_branch_probabilities)
481 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY_FEEDBACK);
482 else
483 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY);
484 probability_cutoff = REG_BR_PROB_BASE / 100 * probability_cutoff;
485
486 FOR_EACH_BB_FN (ebb_start, cfun)
487 {
488 RGN_NR_BLOCKS (nr_regions) = 0;
489 RGN_BLOCKS (nr_regions) = i;
490 RGN_DONT_CALC_DEPS (nr_regions) = 0;
491 RGN_HAS_REAL_EBB (nr_regions) = 0;
492
493 for (bb = ebb_start; ; bb = bb->next_bb)
494 {
495 edge e;
496
497 rgn_bb_table[i] = bb->index;
498 RGN_NR_BLOCKS (nr_regions)++;
499 CONTAINING_RGN (bb->index) = nr_regions;
500 BLOCK_TO_BB (bb->index) = i - RGN_BLOCKS (nr_regions);
501 i++;
502
503 if (bb->next_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)
504 || LABEL_P (BB_HEAD (bb->next_bb)))
505 break;
506
507 e = find_fallthru_edge (bb->succs);
508 if (! e)
509 break;
510 if (e->probability <= probability_cutoff)
511 break;
512 }
513
514 ebb_start = bb;
515 nr_regions++;
516 }
517 }
518 else
519 FOR_EACH_BB_FN (bb, cfun)
520 {
521 rgn_bb_table[nr_regions] = bb->index;
522 RGN_NR_BLOCKS (nr_regions) = 1;
523 RGN_BLOCKS (nr_regions) = nr_regions;
524 RGN_DONT_CALC_DEPS (nr_regions) = 0;
525 RGN_HAS_REAL_EBB (nr_regions) = 0;
526
527 CONTAINING_RGN (bb->index) = nr_regions;
528 BLOCK_TO_BB (bb->index) = 0;
529 nr_regions++;
530 }
531 }
532
533 /* Estimate number of the insns in the BB. */
534 static int
535 rgn_estimate_number_of_insns (basic_block bb)
536 {
537 int count;
538
539 count = INSN_LUID (BB_END (bb)) - INSN_LUID (BB_HEAD (bb));
540
541 if (MAY_HAVE_DEBUG_INSNS)
542 {
543 rtx_insn *insn;
544
545 FOR_BB_INSNS (bb, insn)
546 if (DEBUG_INSN_P (insn))
547 count--;
548 }
549
550 return count;
551 }
552
553 /* Update number of blocks and the estimate for number of insns
554 in the region. Return true if the region is "too large" for interblock
555 scheduling (compile time considerations). */
556
557 static bool
558 too_large (int block, int *num_bbs, int *num_insns)
559 {
560 (*num_bbs)++;
561 (*num_insns) += (common_sched_info->estimate_number_of_insns
562 (BASIC_BLOCK_FOR_FN (cfun, block)));
563
564 return ((*num_bbs > PARAM_VALUE (PARAM_MAX_SCHED_REGION_BLOCKS))
565 || (*num_insns > PARAM_VALUE (PARAM_MAX_SCHED_REGION_INSNS)));
566 }
567
568 /* Update_loop_relations(blk, hdr): Check if the loop headed by max_hdr[blk]
569 is still an inner loop. Put in max_hdr[blk] the header of the most inner
570 loop containing blk. */
571 #define UPDATE_LOOP_RELATIONS(blk, hdr) \
572 { \
573 if (max_hdr[blk] == -1) \
574 max_hdr[blk] = hdr; \
575 else if (dfs_nr[max_hdr[blk]] > dfs_nr[hdr]) \
576 bitmap_clear_bit (inner, hdr); \
577 else if (dfs_nr[max_hdr[blk]] < dfs_nr[hdr]) \
578 { \
579 bitmap_clear_bit (inner,max_hdr[blk]); \
580 max_hdr[blk] = hdr; \
581 } \
582 }
583
584 /* Find regions for interblock scheduling.
585
586 A region for scheduling can be:
587
588 * A loop-free procedure, or
589
590 * A reducible inner loop, or
591
592 * A basic block not contained in any other region.
593
594 ?!? In theory we could build other regions based on extended basic
595 blocks or reverse extended basic blocks. Is it worth the trouble?
596
597 Loop blocks that form a region are put into the region's block list
598 in topological order.
599
600 This procedure stores its results into the following global (ick) variables
601
602 * rgn_nr
603 * rgn_table
604 * rgn_bb_table
605 * block_to_bb
606 * containing region
607
608 We use dominator relationships to avoid making regions out of non-reducible
609 loops.
610
611 This procedure needs to be converted to work on pred/succ lists instead
612 of edge tables. That would simplify it somewhat. */
613
614 static void
615 haifa_find_rgns (void)
616 {
617 int *max_hdr, *dfs_nr, *degree;
618 char no_loops = 1;
619 int node, child, loop_head, i, head, tail;
620 int count = 0, sp, idx = 0;
621 edge_iterator current_edge;
622 edge_iterator *stack;
623 int num_bbs, num_insns, unreachable;
624 int too_large_failure;
625 basic_block bb;
626
627 /* Note if a block is a natural loop header. */
628 sbitmap header;
629
630 /* Note if a block is a natural inner loop header. */
631 sbitmap inner;
632
633 /* Note if a block is in the block queue. */
634 sbitmap in_queue;
635
636 /* Note if a block is in the block queue. */
637 sbitmap in_stack;
638
639 /* Perform a DFS traversal of the cfg. Identify loop headers, inner loops
640 and a mapping from block to its loop header (if the block is contained
641 in a loop, else -1).
642
643 Store results in HEADER, INNER, and MAX_HDR respectively, these will
644 be used as inputs to the second traversal.
645
646 STACK, SP and DFS_NR are only used during the first traversal. */
647
648 /* Allocate and initialize variables for the first traversal. */
649 max_hdr = XNEWVEC (int, last_basic_block_for_fn (cfun));
650 dfs_nr = XCNEWVEC (int, last_basic_block_for_fn (cfun));
651 stack = XNEWVEC (edge_iterator, n_edges_for_fn (cfun));
652
653 inner = sbitmap_alloc (last_basic_block_for_fn (cfun));
654 bitmap_ones (inner);
655
656 header = sbitmap_alloc (last_basic_block_for_fn (cfun));
657 bitmap_clear (header);
658
659 in_queue = sbitmap_alloc (last_basic_block_for_fn (cfun));
660 bitmap_clear (in_queue);
661
662 in_stack = sbitmap_alloc (last_basic_block_for_fn (cfun));
663 bitmap_clear (in_stack);
664
665 for (i = 0; i < last_basic_block_for_fn (cfun); i++)
666 max_hdr[i] = -1;
667
668 #define EDGE_PASSED(E) (ei_end_p ((E)) || ei_edge ((E))->aux)
669 #define SET_EDGE_PASSED(E) (ei_edge ((E))->aux = ei_edge ((E)))
670
671 /* DFS traversal to find inner loops in the cfg. */
672
673 current_edge = ei_start (single_succ (ENTRY_BLOCK_PTR_FOR_FN (cfun))->succs);
674 sp = -1;
675
676 while (1)
677 {
678 if (EDGE_PASSED (current_edge))
679 {
680 /* We have reached a leaf node or a node that was already
681 processed. Pop edges off the stack until we find
682 an edge that has not yet been processed. */
683 while (sp >= 0 && EDGE_PASSED (current_edge))
684 {
685 /* Pop entry off the stack. */
686 current_edge = stack[sp--];
687 node = ei_edge (current_edge)->src->index;
688 gcc_assert (node != ENTRY_BLOCK);
689 child = ei_edge (current_edge)->dest->index;
690 gcc_assert (child != EXIT_BLOCK);
691 bitmap_clear_bit (in_stack, child);
692 if (max_hdr[child] >= 0 && bitmap_bit_p (in_stack, max_hdr[child]))
693 UPDATE_LOOP_RELATIONS (node, max_hdr[child]);
694 ei_next (&current_edge);
695 }
696
697 /* See if have finished the DFS tree traversal. */
698 if (sp < 0 && EDGE_PASSED (current_edge))
699 break;
700
701 /* Nope, continue the traversal with the popped node. */
702 continue;
703 }
704
705 /* Process a node. */
706 node = ei_edge (current_edge)->src->index;
707 gcc_assert (node != ENTRY_BLOCK);
708 bitmap_set_bit (in_stack, node);
709 dfs_nr[node] = ++count;
710
711 /* We don't traverse to the exit block. */
712 child = ei_edge (current_edge)->dest->index;
713 if (child == EXIT_BLOCK)
714 {
715 SET_EDGE_PASSED (current_edge);
716 ei_next (&current_edge);
717 continue;
718 }
719
720 /* If the successor is in the stack, then we've found a loop.
721 Mark the loop, if it is not a natural loop, then it will
722 be rejected during the second traversal. */
723 if (bitmap_bit_p (in_stack, child))
724 {
725 no_loops = 0;
726 bitmap_set_bit (header, child);
727 UPDATE_LOOP_RELATIONS (node, child);
728 SET_EDGE_PASSED (current_edge);
729 ei_next (&current_edge);
730 continue;
731 }
732
733 /* If the child was already visited, then there is no need to visit
734 it again. Just update the loop relationships and restart
735 with a new edge. */
736 if (dfs_nr[child])
737 {
738 if (max_hdr[child] >= 0 && bitmap_bit_p (in_stack, max_hdr[child]))
739 UPDATE_LOOP_RELATIONS (node, max_hdr[child]);
740 SET_EDGE_PASSED (current_edge);
741 ei_next (&current_edge);
742 continue;
743 }
744
745 /* Push an entry on the stack and continue DFS traversal. */
746 stack[++sp] = current_edge;
747 SET_EDGE_PASSED (current_edge);
748 current_edge = ei_start (ei_edge (current_edge)->dest->succs);
749 }
750
751 /* Reset ->aux field used by EDGE_PASSED. */
752 FOR_ALL_BB_FN (bb, cfun)
753 {
754 edge_iterator ei;
755 edge e;
756 FOR_EACH_EDGE (e, ei, bb->succs)
757 e->aux = NULL;
758 }
759
760
761 /* Another check for unreachable blocks. The earlier test in
762 is_cfg_nonregular only finds unreachable blocks that do not
763 form a loop.
764
765 The DFS traversal will mark every block that is reachable from
766 the entry node by placing a nonzero value in dfs_nr. Thus if
767 dfs_nr is zero for any block, then it must be unreachable. */
768 unreachable = 0;
769 FOR_EACH_BB_FN (bb, cfun)
770 if (dfs_nr[bb->index] == 0)
771 {
772 unreachable = 1;
773 break;
774 }
775
776 /* Gross. To avoid wasting memory, the second pass uses the dfs_nr array
777 to hold degree counts. */
778 degree = dfs_nr;
779
780 FOR_EACH_BB_FN (bb, cfun)
781 degree[bb->index] = EDGE_COUNT (bb->preds);
782
783 /* Do not perform region scheduling if there are any unreachable
784 blocks. */
785 if (!unreachable)
786 {
787 int *queue, *degree1 = NULL;
788 /* We use EXTENDED_RGN_HEADER as an addition to HEADER and put
789 there basic blocks, which are forced to be region heads.
790 This is done to try to assemble few smaller regions
791 from a too_large region. */
792 sbitmap extended_rgn_header = NULL;
793 bool extend_regions_p;
794
795 if (no_loops)
796 bitmap_set_bit (header, 0);
797
798 /* Second traversal:find reducible inner loops and topologically sort
799 block of each region. */
800
801 queue = XNEWVEC (int, n_basic_blocks_for_fn (cfun));
802
803 extend_regions_p = PARAM_VALUE (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS) > 0;
804 if (extend_regions_p)
805 {
806 degree1 = XNEWVEC (int, last_basic_block_for_fn (cfun));
807 extended_rgn_header =
808 sbitmap_alloc (last_basic_block_for_fn (cfun));
809 bitmap_clear (extended_rgn_header);
810 }
811
812 /* Find blocks which are inner loop headers. We still have non-reducible
813 loops to consider at this point. */
814 FOR_EACH_BB_FN (bb, cfun)
815 {
816 if (bitmap_bit_p (header, bb->index) && bitmap_bit_p (inner, bb->index))
817 {
818 edge e;
819 edge_iterator ei;
820 basic_block jbb;
821
822 /* Now check that the loop is reducible. We do this separate
823 from finding inner loops so that we do not find a reducible
824 loop which contains an inner non-reducible loop.
825
826 A simple way to find reducible/natural loops is to verify
827 that each block in the loop is dominated by the loop
828 header.
829
830 If there exists a block that is not dominated by the loop
831 header, then the block is reachable from outside the loop
832 and thus the loop is not a natural loop. */
833 FOR_EACH_BB_FN (jbb, cfun)
834 {
835 /* First identify blocks in the loop, except for the loop
836 entry block. */
837 if (bb->index == max_hdr[jbb->index] && bb != jbb)
838 {
839 /* Now verify that the block is dominated by the loop
840 header. */
841 if (!dominated_by_p (CDI_DOMINATORS, jbb, bb))
842 break;
843 }
844 }
845
846 /* If we exited the loop early, then I is the header of
847 a non-reducible loop and we should quit processing it
848 now. */
849 if (jbb != EXIT_BLOCK_PTR_FOR_FN (cfun))
850 continue;
851
852 /* I is a header of an inner loop, or block 0 in a subroutine
853 with no loops at all. */
854 head = tail = -1;
855 too_large_failure = 0;
856 loop_head = max_hdr[bb->index];
857
858 if (extend_regions_p)
859 /* We save degree in case when we meet a too_large region
860 and cancel it. We need a correct degree later when
861 calling extend_rgns. */
862 memcpy (degree1, degree,
863 last_basic_block_for_fn (cfun) * sizeof (int));
864
865 /* Decrease degree of all I's successors for topological
866 ordering. */
867 FOR_EACH_EDGE (e, ei, bb->succs)
868 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
869 --degree[e->dest->index];
870
871 /* Estimate # insns, and count # blocks in the region. */
872 num_bbs = 1;
873 num_insns = common_sched_info->estimate_number_of_insns (bb);
874
875 /* Find all loop latches (blocks with back edges to the loop
876 header) or all the leaf blocks in the cfg has no loops.
877
878 Place those blocks into the queue. */
879 if (no_loops)
880 {
881 FOR_EACH_BB_FN (jbb, cfun)
882 /* Leaf nodes have only a single successor which must
883 be EXIT_BLOCK. */
884 if (single_succ_p (jbb)
885 && single_succ (jbb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
886 {
887 queue[++tail] = jbb->index;
888 bitmap_set_bit (in_queue, jbb->index);
889
890 if (too_large (jbb->index, &num_bbs, &num_insns))
891 {
892 too_large_failure = 1;
893 break;
894 }
895 }
896 }
897 else
898 {
899 edge e;
900
901 FOR_EACH_EDGE (e, ei, bb->preds)
902 {
903 if (e->src == ENTRY_BLOCK_PTR_FOR_FN (cfun))
904 continue;
905
906 node = e->src->index;
907
908 if (max_hdr[node] == loop_head && node != bb->index)
909 {
910 /* This is a loop latch. */
911 queue[++tail] = node;
912 bitmap_set_bit (in_queue, node);
913
914 if (too_large (node, &num_bbs, &num_insns))
915 {
916 too_large_failure = 1;
917 break;
918 }
919 }
920 }
921 }
922
923 /* Now add all the blocks in the loop to the queue.
924
925 We know the loop is a natural loop; however the algorithm
926 above will not always mark certain blocks as being in the
927 loop. Consider:
928 node children
929 a b,c
930 b c
931 c a,d
932 d b
933
934 The algorithm in the DFS traversal may not mark B & D as part
935 of the loop (i.e. they will not have max_hdr set to A).
936
937 We know they can not be loop latches (else they would have
938 had max_hdr set since they'd have a backedge to a dominator
939 block). So we don't need them on the initial queue.
940
941 We know they are part of the loop because they are dominated
942 by the loop header and can be reached by a backwards walk of
943 the edges starting with nodes on the initial queue.
944
945 It is safe and desirable to include those nodes in the
946 loop/scheduling region. To do so we would need to decrease
947 the degree of a node if it is the target of a backedge
948 within the loop itself as the node is placed in the queue.
949
950 We do not do this because I'm not sure that the actual
951 scheduling code will properly handle this case. ?!? */
952
953 while (head < tail && !too_large_failure)
954 {
955 edge e;
956 child = queue[++head];
957
958 FOR_EACH_EDGE (e, ei,
959 BASIC_BLOCK_FOR_FN (cfun, child)->preds)
960 {
961 node = e->src->index;
962
963 /* See discussion above about nodes not marked as in
964 this loop during the initial DFS traversal. */
965 if (e->src == ENTRY_BLOCK_PTR_FOR_FN (cfun)
966 || max_hdr[node] != loop_head)
967 {
968 tail = -1;
969 break;
970 }
971 else if (!bitmap_bit_p (in_queue, node) && node != bb->index)
972 {
973 queue[++tail] = node;
974 bitmap_set_bit (in_queue, node);
975
976 if (too_large (node, &num_bbs, &num_insns))
977 {
978 too_large_failure = 1;
979 break;
980 }
981 }
982 }
983 }
984
985 if (tail >= 0 && !too_large_failure)
986 {
987 /* Place the loop header into list of region blocks. */
988 degree[bb->index] = -1;
989 rgn_bb_table[idx] = bb->index;
990 RGN_NR_BLOCKS (nr_regions) = num_bbs;
991 RGN_BLOCKS (nr_regions) = idx++;
992 RGN_DONT_CALC_DEPS (nr_regions) = 0;
993 RGN_HAS_REAL_EBB (nr_regions) = 0;
994 CONTAINING_RGN (bb->index) = nr_regions;
995 BLOCK_TO_BB (bb->index) = count = 0;
996
997 /* Remove blocks from queue[] when their in degree
998 becomes zero. Repeat until no blocks are left on the
999 list. This produces a topological list of blocks in
1000 the region. */
1001 while (tail >= 0)
1002 {
1003 if (head < 0)
1004 head = tail;
1005 child = queue[head];
1006 if (degree[child] == 0)
1007 {
1008 edge e;
1009
1010 degree[child] = -1;
1011 rgn_bb_table[idx++] = child;
1012 BLOCK_TO_BB (child) = ++count;
1013 CONTAINING_RGN (child) = nr_regions;
1014 queue[head] = queue[tail--];
1015
1016 FOR_EACH_EDGE (e, ei,
1017 BASIC_BLOCK_FOR_FN (cfun,
1018 child)->succs)
1019 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1020 --degree[e->dest->index];
1021 }
1022 else
1023 --head;
1024 }
1025 ++nr_regions;
1026 }
1027 else if (extend_regions_p)
1028 {
1029 /* Restore DEGREE. */
1030 int *t = degree;
1031
1032 degree = degree1;
1033 degree1 = t;
1034
1035 /* And force successors of BB to be region heads.
1036 This may provide several smaller regions instead
1037 of one too_large region. */
1038 FOR_EACH_EDGE (e, ei, bb->succs)
1039 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1040 bitmap_set_bit (extended_rgn_header, e->dest->index);
1041 }
1042 }
1043 }
1044 free (queue);
1045
1046 if (extend_regions_p)
1047 {
1048 free (degree1);
1049
1050 bitmap_ior (header, header, extended_rgn_header);
1051 sbitmap_free (extended_rgn_header);
1052
1053 extend_rgns (degree, &idx, header, max_hdr);
1054 }
1055 }
1056
1057 /* Any block that did not end up in a region is placed into a region
1058 by itself. */
1059 FOR_EACH_BB_FN (bb, cfun)
1060 if (degree[bb->index] >= 0)
1061 {
1062 rgn_bb_table[idx] = bb->index;
1063 RGN_NR_BLOCKS (nr_regions) = 1;
1064 RGN_BLOCKS (nr_regions) = idx++;
1065 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1066 RGN_HAS_REAL_EBB (nr_regions) = 0;
1067 CONTAINING_RGN (bb->index) = nr_regions++;
1068 BLOCK_TO_BB (bb->index) = 0;
1069 }
1070
1071 free (max_hdr);
1072 free (degree);
1073 free (stack);
1074 sbitmap_free (header);
1075 sbitmap_free (inner);
1076 sbitmap_free (in_queue);
1077 sbitmap_free (in_stack);
1078 }
1079
1080
1081 /* Wrapper function.
1082 If FLAG_SEL_SCHED_PIPELINING is set, then use custom function to form
1083 regions. Otherwise just call find_rgns_haifa. */
1084 static void
1085 find_rgns (void)
1086 {
1087 if (sel_sched_p () && flag_sel_sched_pipelining)
1088 sel_find_rgns ();
1089 else
1090 haifa_find_rgns ();
1091 }
1092
1093 static int gather_region_statistics (int **);
1094 static void print_region_statistics (int *, int, int *, int);
1095
1096 /* Calculate the histogram that shows the number of regions having the
1097 given number of basic blocks, and store it in the RSP array. Return
1098 the size of this array. */
1099 static int
1100 gather_region_statistics (int **rsp)
1101 {
1102 int i, *a = 0, a_sz = 0;
1103
1104 /* a[i] is the number of regions that have (i + 1) basic blocks. */
1105 for (i = 0; i < nr_regions; i++)
1106 {
1107 int nr_blocks = RGN_NR_BLOCKS (i);
1108
1109 gcc_assert (nr_blocks >= 1);
1110
1111 if (nr_blocks > a_sz)
1112 {
1113 a = XRESIZEVEC (int, a, nr_blocks);
1114 do
1115 a[a_sz++] = 0;
1116 while (a_sz != nr_blocks);
1117 }
1118
1119 a[nr_blocks - 1]++;
1120 }
1121
1122 *rsp = a;
1123 return a_sz;
1124 }
1125
1126 /* Print regions statistics. S1 and S2 denote the data before and after
1127 calling extend_rgns, respectively. */
1128 static void
1129 print_region_statistics (int *s1, int s1_sz, int *s2, int s2_sz)
1130 {
1131 int i;
1132
1133 /* We iterate until s2_sz because extend_rgns does not decrease
1134 the maximal region size. */
1135 for (i = 1; i < s2_sz; i++)
1136 {
1137 int n1, n2;
1138
1139 n2 = s2[i];
1140
1141 if (n2 == 0)
1142 continue;
1143
1144 if (i >= s1_sz)
1145 n1 = 0;
1146 else
1147 n1 = s1[i];
1148
1149 fprintf (sched_dump, ";; Region extension statistics: size %d: " \
1150 "was %d + %d more\n", i + 1, n1, n2 - n1);
1151 }
1152 }
1153
1154 /* Extend regions.
1155 DEGREE - Array of incoming edge count, considering only
1156 the edges, that don't have their sources in formed regions yet.
1157 IDXP - pointer to the next available index in rgn_bb_table.
1158 HEADER - set of all region heads.
1159 LOOP_HDR - mapping from block to the containing loop
1160 (two blocks can reside within one region if they have
1161 the same loop header). */
1162 void
1163 extend_rgns (int *degree, int *idxp, sbitmap header, int *loop_hdr)
1164 {
1165 int *order, i, rescan = 0, idx = *idxp, iter = 0, max_iter, *max_hdr;
1166 int nblocks = n_basic_blocks_for_fn (cfun) - NUM_FIXED_BLOCKS;
1167
1168 max_iter = PARAM_VALUE (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS);
1169
1170 max_hdr = XNEWVEC (int, last_basic_block_for_fn (cfun));
1171
1172 order = XNEWVEC (int, last_basic_block_for_fn (cfun));
1173 post_order_compute (order, false, false);
1174
1175 for (i = nblocks - 1; i >= 0; i--)
1176 {
1177 int bbn = order[i];
1178 if (degree[bbn] >= 0)
1179 {
1180 max_hdr[bbn] = bbn;
1181 rescan = 1;
1182 }
1183 else
1184 /* This block already was processed in find_rgns. */
1185 max_hdr[bbn] = -1;
1186 }
1187
1188 /* The idea is to topologically walk through CFG in top-down order.
1189 During the traversal, if all the predecessors of a node are
1190 marked to be in the same region (they all have the same max_hdr),
1191 then current node is also marked to be a part of that region.
1192 Otherwise the node starts its own region.
1193 CFG should be traversed until no further changes are made. On each
1194 iteration the set of the region heads is extended (the set of those
1195 blocks that have max_hdr[bbi] == bbi). This set is upper bounded by the
1196 set of all basic blocks, thus the algorithm is guaranteed to
1197 terminate. */
1198
1199 while (rescan && iter < max_iter)
1200 {
1201 rescan = 0;
1202
1203 for (i = nblocks - 1; i >= 0; i--)
1204 {
1205 edge e;
1206 edge_iterator ei;
1207 int bbn = order[i];
1208
1209 if (max_hdr[bbn] != -1 && !bitmap_bit_p (header, bbn))
1210 {
1211 int hdr = -1;
1212
1213 FOR_EACH_EDGE (e, ei, BASIC_BLOCK_FOR_FN (cfun, bbn)->preds)
1214 {
1215 int predn = e->src->index;
1216
1217 if (predn != ENTRY_BLOCK
1218 /* If pred wasn't processed in find_rgns. */
1219 && max_hdr[predn] != -1
1220 /* And pred and bb reside in the same loop.
1221 (Or out of any loop). */
1222 && loop_hdr[bbn] == loop_hdr[predn])
1223 {
1224 if (hdr == -1)
1225 /* Then bb extends the containing region of pred. */
1226 hdr = max_hdr[predn];
1227 else if (hdr != max_hdr[predn])
1228 /* Too bad, there are at least two predecessors
1229 that reside in different regions. Thus, BB should
1230 begin its own region. */
1231 {
1232 hdr = bbn;
1233 break;
1234 }
1235 }
1236 else
1237 /* BB starts its own region. */
1238 {
1239 hdr = bbn;
1240 break;
1241 }
1242 }
1243
1244 if (hdr == bbn)
1245 {
1246 /* If BB start its own region,
1247 update set of headers with BB. */
1248 bitmap_set_bit (header, bbn);
1249 rescan = 1;
1250 }
1251 else
1252 gcc_assert (hdr != -1);
1253
1254 max_hdr[bbn] = hdr;
1255 }
1256 }
1257
1258 iter++;
1259 }
1260
1261 /* Statistics were gathered on the SPEC2000 package of tests with
1262 mainline weekly snapshot gcc-4.1-20051015 on ia64.
1263
1264 Statistics for SPECint:
1265 1 iteration : 1751 cases (38.7%)
1266 2 iterations: 2770 cases (61.3%)
1267 Blocks wrapped in regions by find_rgns without extension: 18295 blocks
1268 Blocks wrapped in regions by 2 iterations in extend_rgns: 23821 blocks
1269 (We don't count single block regions here).
1270
1271 Statistics for SPECfp:
1272 1 iteration : 621 cases (35.9%)
1273 2 iterations: 1110 cases (64.1%)
1274 Blocks wrapped in regions by find_rgns without extension: 6476 blocks
1275 Blocks wrapped in regions by 2 iterations in extend_rgns: 11155 blocks
1276 (We don't count single block regions here).
1277
1278 By default we do at most 2 iterations.
1279 This can be overridden with max-sched-extend-regions-iters parameter:
1280 0 - disable region extension,
1281 N > 0 - do at most N iterations. */
1282
1283 if (sched_verbose && iter != 0)
1284 fprintf (sched_dump, ";; Region extension iterations: %d%s\n", iter,
1285 rescan ? "... failed" : "");
1286
1287 if (!rescan && iter != 0)
1288 {
1289 int *s1 = NULL, s1_sz = 0;
1290
1291 /* Save the old statistics for later printout. */
1292 if (sched_verbose >= 6)
1293 s1_sz = gather_region_statistics (&s1);
1294
1295 /* We have succeeded. Now assemble the regions. */
1296 for (i = nblocks - 1; i >= 0; i--)
1297 {
1298 int bbn = order[i];
1299
1300 if (max_hdr[bbn] == bbn)
1301 /* BBN is a region head. */
1302 {
1303 edge e;
1304 edge_iterator ei;
1305 int num_bbs = 0, j, num_insns = 0, large;
1306
1307 large = too_large (bbn, &num_bbs, &num_insns);
1308
1309 degree[bbn] = -1;
1310 rgn_bb_table[idx] = bbn;
1311 RGN_BLOCKS (nr_regions) = idx++;
1312 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1313 RGN_HAS_REAL_EBB (nr_regions) = 0;
1314 CONTAINING_RGN (bbn) = nr_regions;
1315 BLOCK_TO_BB (bbn) = 0;
1316
1317 FOR_EACH_EDGE (e, ei, BASIC_BLOCK_FOR_FN (cfun, bbn)->succs)
1318 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1319 degree[e->dest->index]--;
1320
1321 if (!large)
1322 /* Here we check whether the region is too_large. */
1323 for (j = i - 1; j >= 0; j--)
1324 {
1325 int succn = order[j];
1326 if (max_hdr[succn] == bbn)
1327 {
1328 if ((large = too_large (succn, &num_bbs, &num_insns)))
1329 break;
1330 }
1331 }
1332
1333 if (large)
1334 /* If the region is too_large, then wrap every block of
1335 the region into single block region.
1336 Here we wrap region head only. Other blocks are
1337 processed in the below cycle. */
1338 {
1339 RGN_NR_BLOCKS (nr_regions) = 1;
1340 nr_regions++;
1341 }
1342
1343 num_bbs = 1;
1344
1345 for (j = i - 1; j >= 0; j--)
1346 {
1347 int succn = order[j];
1348
1349 if (max_hdr[succn] == bbn)
1350 /* This cycle iterates over all basic blocks, that
1351 are supposed to be in the region with head BBN,
1352 and wraps them into that region (or in single
1353 block region). */
1354 {
1355 gcc_assert (degree[succn] == 0);
1356
1357 degree[succn] = -1;
1358 rgn_bb_table[idx] = succn;
1359 BLOCK_TO_BB (succn) = large ? 0 : num_bbs++;
1360 CONTAINING_RGN (succn) = nr_regions;
1361
1362 if (large)
1363 /* Wrap SUCCN into single block region. */
1364 {
1365 RGN_BLOCKS (nr_regions) = idx;
1366 RGN_NR_BLOCKS (nr_regions) = 1;
1367 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1368 RGN_HAS_REAL_EBB (nr_regions) = 0;
1369 nr_regions++;
1370 }
1371
1372 idx++;
1373
1374 FOR_EACH_EDGE (e, ei,
1375 BASIC_BLOCK_FOR_FN (cfun, succn)->succs)
1376 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1377 degree[e->dest->index]--;
1378 }
1379 }
1380
1381 if (!large)
1382 {
1383 RGN_NR_BLOCKS (nr_regions) = num_bbs;
1384 nr_regions++;
1385 }
1386 }
1387 }
1388
1389 if (sched_verbose >= 6)
1390 {
1391 int *s2, s2_sz;
1392
1393 /* Get the new statistics and print the comparison with the
1394 one before calling this function. */
1395 s2_sz = gather_region_statistics (&s2);
1396 print_region_statistics (s1, s1_sz, s2, s2_sz);
1397 free (s1);
1398 free (s2);
1399 }
1400 }
1401
1402 free (order);
1403 free (max_hdr);
1404
1405 *idxp = idx;
1406 }
1407
1408 /* Functions for regions scheduling information. */
1409
1410 /* Compute dominators, probability, and potential-split-edges of bb.
1411 Assume that these values were already computed for bb's predecessors. */
1412
1413 static void
1414 compute_dom_prob_ps (int bb)
1415 {
1416 edge_iterator in_ei;
1417 edge in_edge;
1418
1419 /* We shouldn't have any real ebbs yet. */
1420 gcc_assert (ebb_head [bb] == bb + current_blocks);
1421
1422 if (IS_RGN_ENTRY (bb))
1423 {
1424 bitmap_set_bit (dom[bb], 0);
1425 prob[bb] = REG_BR_PROB_BASE;
1426 return;
1427 }
1428
1429 prob[bb] = 0;
1430
1431 /* Initialize dom[bb] to '111..1'. */
1432 bitmap_ones (dom[bb]);
1433
1434 FOR_EACH_EDGE (in_edge, in_ei,
1435 BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (bb))->preds)
1436 {
1437 int pred_bb;
1438 edge out_edge;
1439 edge_iterator out_ei;
1440
1441 if (in_edge->src == ENTRY_BLOCK_PTR_FOR_FN (cfun))
1442 continue;
1443
1444 pred_bb = BLOCK_TO_BB (in_edge->src->index);
1445 bitmap_and (dom[bb], dom[bb], dom[pred_bb]);
1446 bitmap_ior (ancestor_edges[bb],
1447 ancestor_edges[bb], ancestor_edges[pred_bb]);
1448
1449 bitmap_set_bit (ancestor_edges[bb], EDGE_TO_BIT (in_edge));
1450
1451 bitmap_ior (pot_split[bb], pot_split[bb], pot_split[pred_bb]);
1452
1453 FOR_EACH_EDGE (out_edge, out_ei, in_edge->src->succs)
1454 bitmap_set_bit (pot_split[bb], EDGE_TO_BIT (out_edge));
1455
1456 prob[bb] += combine_probabilities (prob[pred_bb], in_edge->probability);
1457 // The rounding divide in combine_probabilities can result in an extra
1458 // probability increment propagating along 50-50 edges. Eventually when
1459 // the edges re-merge, the accumulated probability can go slightly above
1460 // REG_BR_PROB_BASE.
1461 if (prob[bb] > REG_BR_PROB_BASE)
1462 prob[bb] = REG_BR_PROB_BASE;
1463 }
1464
1465 bitmap_set_bit (dom[bb], bb);
1466 bitmap_and_compl (pot_split[bb], pot_split[bb], ancestor_edges[bb]);
1467
1468 if (sched_verbose >= 2)
1469 fprintf (sched_dump, ";; bb_prob(%d, %d) = %3d\n", bb, BB_TO_BLOCK (bb),
1470 (100 * prob[bb]) / REG_BR_PROB_BASE);
1471 }
1472
1473 /* Functions for target info. */
1474
1475 /* Compute in BL the list of split-edges of bb_src relatively to bb_trg.
1476 Note that bb_trg dominates bb_src. */
1477
1478 static void
1479 split_edges (int bb_src, int bb_trg, edgelst *bl)
1480 {
1481 sbitmap src = sbitmap_alloc (SBITMAP_SIZE (pot_split[bb_src]));
1482 bitmap_copy (src, pot_split[bb_src]);
1483
1484 bitmap_and_compl (src, src, pot_split[bb_trg]);
1485 extract_edgelst (src, bl);
1486 sbitmap_free (src);
1487 }
1488
1489 /* Find the valid candidate-source-blocks for the target block TRG, compute
1490 their probability, and check if they are speculative or not.
1491 For speculative sources, compute their update-blocks and split-blocks. */
1492
1493 static void
1494 compute_trg_info (int trg)
1495 {
1496 candidate *sp;
1497 edgelst el = { NULL, 0 };
1498 int i, j, k, update_idx;
1499 basic_block block;
1500 sbitmap visited;
1501 edge_iterator ei;
1502 edge e;
1503
1504 candidate_table = XNEWVEC (candidate, current_nr_blocks);
1505
1506 bblst_last = 0;
1507 /* bblst_table holds split blocks and update blocks for each block after
1508 the current one in the region. split blocks and update blocks are
1509 the TO blocks of region edges, so there can be at most rgn_nr_edges
1510 of them. */
1511 bblst_size = (current_nr_blocks - target_bb) * rgn_nr_edges;
1512 bblst_table = XNEWVEC (basic_block, bblst_size);
1513
1514 edgelst_last = 0;
1515 edgelst_table = XNEWVEC (edge, rgn_nr_edges);
1516
1517 /* Define some of the fields for the target bb as well. */
1518 sp = candidate_table + trg;
1519 sp->is_valid = 1;
1520 sp->is_speculative = 0;
1521 sp->src_prob = REG_BR_PROB_BASE;
1522
1523 visited = sbitmap_alloc (last_basic_block_for_fn (cfun));
1524
1525 for (i = trg + 1; i < current_nr_blocks; i++)
1526 {
1527 sp = candidate_table + i;
1528
1529 sp->is_valid = IS_DOMINATED (i, trg);
1530 if (sp->is_valid)
1531 {
1532 int tf = prob[trg], cf = prob[i];
1533
1534 /* In CFGs with low probability edges TF can possibly be zero. */
1535 sp->src_prob = (tf ? GCOV_COMPUTE_SCALE (cf, tf) : 0);
1536 sp->is_valid = (sp->src_prob >= min_spec_prob);
1537 }
1538
1539 if (sp->is_valid)
1540 {
1541 split_edges (i, trg, &el);
1542 sp->is_speculative = (el.nr_members) ? 1 : 0;
1543 if (sp->is_speculative && !flag_schedule_speculative)
1544 sp->is_valid = 0;
1545 }
1546
1547 if (sp->is_valid)
1548 {
1549 /* Compute split blocks and store them in bblst_table.
1550 The TO block of every split edge is a split block. */
1551 sp->split_bbs.first_member = &bblst_table[bblst_last];
1552 sp->split_bbs.nr_members = el.nr_members;
1553 for (j = 0; j < el.nr_members; bblst_last++, j++)
1554 bblst_table[bblst_last] = el.first_member[j]->dest;
1555 sp->update_bbs.first_member = &bblst_table[bblst_last];
1556
1557 /* Compute update blocks and store them in bblst_table.
1558 For every split edge, look at the FROM block, and check
1559 all out edges. For each out edge that is not a split edge,
1560 add the TO block to the update block list. This list can end
1561 up with a lot of duplicates. We need to weed them out to avoid
1562 overrunning the end of the bblst_table. */
1563
1564 update_idx = 0;
1565 bitmap_clear (visited);
1566 for (j = 0; j < el.nr_members; j++)
1567 {
1568 block = el.first_member[j]->src;
1569 FOR_EACH_EDGE (e, ei, block->succs)
1570 {
1571 if (!bitmap_bit_p (visited, e->dest->index))
1572 {
1573 for (k = 0; k < el.nr_members; k++)
1574 if (e == el.first_member[k])
1575 break;
1576
1577 if (k >= el.nr_members)
1578 {
1579 bblst_table[bblst_last++] = e->dest;
1580 bitmap_set_bit (visited, e->dest->index);
1581 update_idx++;
1582 }
1583 }
1584 }
1585 }
1586 sp->update_bbs.nr_members = update_idx;
1587
1588 /* Make sure we didn't overrun the end of bblst_table. */
1589 gcc_assert (bblst_last <= bblst_size);
1590 }
1591 else
1592 {
1593 sp->split_bbs.nr_members = sp->update_bbs.nr_members = 0;
1594
1595 sp->is_speculative = 0;
1596 sp->src_prob = 0;
1597 }
1598 }
1599
1600 sbitmap_free (visited);
1601 }
1602
1603 /* Free the computed target info. */
1604 static void
1605 free_trg_info (void)
1606 {
1607 free (candidate_table);
1608 free (bblst_table);
1609 free (edgelst_table);
1610 }
1611
1612 /* Print candidates info, for debugging purposes. Callable from debugger. */
1613
1614 DEBUG_FUNCTION void
1615 debug_candidate (int i)
1616 {
1617 if (!candidate_table[i].is_valid)
1618 return;
1619
1620 if (candidate_table[i].is_speculative)
1621 {
1622 int j;
1623 fprintf (sched_dump, "src b %d bb %d speculative \n", BB_TO_BLOCK (i), i);
1624
1625 fprintf (sched_dump, "split path: ");
1626 for (j = 0; j < candidate_table[i].split_bbs.nr_members; j++)
1627 {
1628 int b = candidate_table[i].split_bbs.first_member[j]->index;
1629
1630 fprintf (sched_dump, " %d ", b);
1631 }
1632 fprintf (sched_dump, "\n");
1633
1634 fprintf (sched_dump, "update path: ");
1635 for (j = 0; j < candidate_table[i].update_bbs.nr_members; j++)
1636 {
1637 int b = candidate_table[i].update_bbs.first_member[j]->index;
1638
1639 fprintf (sched_dump, " %d ", b);
1640 }
1641 fprintf (sched_dump, "\n");
1642 }
1643 else
1644 {
1645 fprintf (sched_dump, " src %d equivalent\n", BB_TO_BLOCK (i));
1646 }
1647 }
1648
1649 /* Print candidates info, for debugging purposes. Callable from debugger. */
1650
1651 DEBUG_FUNCTION void
1652 debug_candidates (int trg)
1653 {
1654 int i;
1655
1656 fprintf (sched_dump, "----------- candidate table: target: b=%d bb=%d ---\n",
1657 BB_TO_BLOCK (trg), trg);
1658 for (i = trg + 1; i < current_nr_blocks; i++)
1659 debug_candidate (i);
1660 }
1661
1662 /* Functions for speculative scheduling. */
1663
1664 static bitmap_head not_in_df;
1665
1666 /* Return 0 if x is a set of a register alive in the beginning of one
1667 of the split-blocks of src, otherwise return 1. */
1668
1669 static int
1670 check_live_1 (int src, rtx x)
1671 {
1672 int i;
1673 int regno;
1674 rtx reg = SET_DEST (x);
1675
1676 if (reg == 0)
1677 return 1;
1678
1679 while (GET_CODE (reg) == SUBREG
1680 || GET_CODE (reg) == ZERO_EXTRACT
1681 || GET_CODE (reg) == STRICT_LOW_PART)
1682 reg = XEXP (reg, 0);
1683
1684 if (GET_CODE (reg) == PARALLEL)
1685 {
1686 int i;
1687
1688 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
1689 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
1690 if (check_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0)))
1691 return 1;
1692
1693 return 0;
1694 }
1695
1696 if (!REG_P (reg))
1697 return 1;
1698
1699 regno = REGNO (reg);
1700
1701 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1702 {
1703 /* Global registers are assumed live. */
1704 return 0;
1705 }
1706 else
1707 {
1708 if (regno < FIRST_PSEUDO_REGISTER)
1709 {
1710 /* Check for hard registers. */
1711 int j = REG_NREGS (reg);
1712 while (--j >= 0)
1713 {
1714 for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++)
1715 {
1716 basic_block b = candidate_table[src].split_bbs.first_member[i];
1717 int t = bitmap_bit_p (&not_in_df, b->index);
1718
1719 /* We can have split blocks, that were recently generated.
1720 Such blocks are always outside current region. */
1721 gcc_assert (!t || (CONTAINING_RGN (b->index)
1722 != CONTAINING_RGN (BB_TO_BLOCK (src))));
1723
1724 if (t || REGNO_REG_SET_P (df_get_live_in (b), regno + j))
1725 return 0;
1726 }
1727 }
1728 }
1729 else
1730 {
1731 /* Check for pseudo registers. */
1732 for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++)
1733 {
1734 basic_block b = candidate_table[src].split_bbs.first_member[i];
1735 int t = bitmap_bit_p (&not_in_df, b->index);
1736
1737 gcc_assert (!t || (CONTAINING_RGN (b->index)
1738 != CONTAINING_RGN (BB_TO_BLOCK (src))));
1739
1740 if (t || REGNO_REG_SET_P (df_get_live_in (b), regno))
1741 return 0;
1742 }
1743 }
1744 }
1745
1746 return 1;
1747 }
1748
1749 /* If x is a set of a register R, mark that R is alive in the beginning
1750 of every update-block of src. */
1751
1752 static void
1753 update_live_1 (int src, rtx x)
1754 {
1755 int i;
1756 int regno;
1757 rtx reg = SET_DEST (x);
1758
1759 if (reg == 0)
1760 return;
1761
1762 while (GET_CODE (reg) == SUBREG
1763 || GET_CODE (reg) == ZERO_EXTRACT
1764 || GET_CODE (reg) == STRICT_LOW_PART)
1765 reg = XEXP (reg, 0);
1766
1767 if (GET_CODE (reg) == PARALLEL)
1768 {
1769 int i;
1770
1771 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
1772 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
1773 update_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0));
1774
1775 return;
1776 }
1777
1778 if (!REG_P (reg))
1779 return;
1780
1781 /* Global registers are always live, so the code below does not apply
1782 to them. */
1783
1784 regno = REGNO (reg);
1785
1786 if (! HARD_REGISTER_NUM_P (regno)
1787 || !global_regs[regno])
1788 {
1789 for (i = 0; i < candidate_table[src].update_bbs.nr_members; i++)
1790 {
1791 basic_block b = candidate_table[src].update_bbs.first_member[i];
1792 bitmap_set_range (df_get_live_in (b), regno, REG_NREGS (reg));
1793 }
1794 }
1795 }
1796
1797 /* Return 1 if insn can be speculatively moved from block src to trg,
1798 otherwise return 0. Called before first insertion of insn to
1799 ready-list or before the scheduling. */
1800
1801 static int
1802 check_live (rtx_insn *insn, int src)
1803 {
1804 /* Find the registers set by instruction. */
1805 if (GET_CODE (PATTERN (insn)) == SET
1806 || GET_CODE (PATTERN (insn)) == CLOBBER)
1807 return check_live_1 (src, PATTERN (insn));
1808 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1809 {
1810 int j;
1811 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
1812 if ((GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
1813 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
1814 && !check_live_1 (src, XVECEXP (PATTERN (insn), 0, j)))
1815 return 0;
1816
1817 return 1;
1818 }
1819
1820 return 1;
1821 }
1822
1823 /* Update the live registers info after insn was moved speculatively from
1824 block src to trg. */
1825
1826 static void
1827 update_live (rtx_insn *insn, int src)
1828 {
1829 /* Find the registers set by instruction. */
1830 if (GET_CODE (PATTERN (insn)) == SET
1831 || GET_CODE (PATTERN (insn)) == CLOBBER)
1832 update_live_1 (src, PATTERN (insn));
1833 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1834 {
1835 int j;
1836 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
1837 if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
1838 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
1839 update_live_1 (src, XVECEXP (PATTERN (insn), 0, j));
1840 }
1841 }
1842
1843 /* Nonzero if block bb_to is equal to, or reachable from block bb_from. */
1844 #define IS_REACHABLE(bb_from, bb_to) \
1845 (bb_from == bb_to \
1846 || IS_RGN_ENTRY (bb_from) \
1847 || (bitmap_bit_p (ancestor_edges[bb_to], \
1848 EDGE_TO_BIT (single_pred_edge (BASIC_BLOCK_FOR_FN (cfun, \
1849 BB_TO_BLOCK (bb_from)))))))
1850
1851 /* Turns on the fed_by_spec_load flag for insns fed by load_insn. */
1852
1853 static void
1854 set_spec_fed (rtx load_insn)
1855 {
1856 sd_iterator_def sd_it;
1857 dep_t dep;
1858
1859 FOR_EACH_DEP (load_insn, SD_LIST_FORW, sd_it, dep)
1860 if (DEP_TYPE (dep) == REG_DEP_TRUE)
1861 FED_BY_SPEC_LOAD (DEP_CON (dep)) = 1;
1862 }
1863
1864 /* On the path from the insn to load_insn_bb, find a conditional
1865 branch depending on insn, that guards the speculative load. */
1866
1867 static int
1868 find_conditional_protection (rtx_insn *insn, int load_insn_bb)
1869 {
1870 sd_iterator_def sd_it;
1871 dep_t dep;
1872
1873 /* Iterate through DEF-USE forward dependences. */
1874 FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
1875 {
1876 rtx_insn *next = DEP_CON (dep);
1877
1878 if ((CONTAINING_RGN (BLOCK_NUM (next)) ==
1879 CONTAINING_RGN (BB_TO_BLOCK (load_insn_bb)))
1880 && IS_REACHABLE (INSN_BB (next), load_insn_bb)
1881 && load_insn_bb != INSN_BB (next)
1882 && DEP_TYPE (dep) == REG_DEP_TRUE
1883 && (JUMP_P (next)
1884 || find_conditional_protection (next, load_insn_bb)))
1885 return 1;
1886 }
1887 return 0;
1888 } /* find_conditional_protection */
1889
1890 /* Returns 1 if the same insn1 that participates in the computation
1891 of load_insn's address is feeding a conditional branch that is
1892 guarding on load_insn. This is true if we find two DEF-USE
1893 chains:
1894 insn1 -> ... -> conditional-branch
1895 insn1 -> ... -> load_insn,
1896 and if a flow path exists:
1897 insn1 -> ... -> conditional-branch -> ... -> load_insn,
1898 and if insn1 is on the path
1899 region-entry -> ... -> bb_trg -> ... load_insn.
1900
1901 Locate insn1 by climbing on INSN_BACK_DEPS from load_insn.
1902 Locate the branch by following INSN_FORW_DEPS from insn1. */
1903
1904 static int
1905 is_conditionally_protected (rtx load_insn, int bb_src, int bb_trg)
1906 {
1907 sd_iterator_def sd_it;
1908 dep_t dep;
1909
1910 FOR_EACH_DEP (load_insn, SD_LIST_BACK, sd_it, dep)
1911 {
1912 rtx_insn *insn1 = DEP_PRO (dep);
1913
1914 /* Must be a DEF-USE dependence upon non-branch. */
1915 if (DEP_TYPE (dep) != REG_DEP_TRUE
1916 || JUMP_P (insn1))
1917 continue;
1918
1919 /* Must exist a path: region-entry -> ... -> bb_trg -> ... load_insn. */
1920 if (INSN_BB (insn1) == bb_src
1921 || (CONTAINING_RGN (BLOCK_NUM (insn1))
1922 != CONTAINING_RGN (BB_TO_BLOCK (bb_src)))
1923 || (!IS_REACHABLE (bb_trg, INSN_BB (insn1))
1924 && !IS_REACHABLE (INSN_BB (insn1), bb_trg)))
1925 continue;
1926
1927 /* Now search for the conditional-branch. */
1928 if (find_conditional_protection (insn1, bb_src))
1929 return 1;
1930
1931 /* Recursive step: search another insn1, "above" current insn1. */
1932 return is_conditionally_protected (insn1, bb_src, bb_trg);
1933 }
1934
1935 /* The chain does not exist. */
1936 return 0;
1937 } /* is_conditionally_protected */
1938
1939 /* Returns 1 if a clue for "similar load" 'insn2' is found, and hence
1940 load_insn can move speculatively from bb_src to bb_trg. All the
1941 following must hold:
1942
1943 (1) both loads have 1 base register (PFREE_CANDIDATEs).
1944 (2) load_insn and load1 have a def-use dependence upon
1945 the same insn 'insn1'.
1946 (3) either load2 is in bb_trg, or:
1947 - there's only one split-block, and
1948 - load1 is on the escape path, and
1949
1950 From all these we can conclude that the two loads access memory
1951 addresses that differ at most by a constant, and hence if moving
1952 load_insn would cause an exception, it would have been caused by
1953 load2 anyhow. */
1954
1955 static int
1956 is_pfree (rtx load_insn, int bb_src, int bb_trg)
1957 {
1958 sd_iterator_def back_sd_it;
1959 dep_t back_dep;
1960 candidate *candp = candidate_table + bb_src;
1961
1962 if (candp->split_bbs.nr_members != 1)
1963 /* Must have exactly one escape block. */
1964 return 0;
1965
1966 FOR_EACH_DEP (load_insn, SD_LIST_BACK, back_sd_it, back_dep)
1967 {
1968 rtx_insn *insn1 = DEP_PRO (back_dep);
1969
1970 if (DEP_TYPE (back_dep) == REG_DEP_TRUE)
1971 /* Found a DEF-USE dependence (insn1, load_insn). */
1972 {
1973 sd_iterator_def fore_sd_it;
1974 dep_t fore_dep;
1975
1976 FOR_EACH_DEP (insn1, SD_LIST_FORW, fore_sd_it, fore_dep)
1977 {
1978 rtx_insn *insn2 = DEP_CON (fore_dep);
1979
1980 if (DEP_TYPE (fore_dep) == REG_DEP_TRUE)
1981 {
1982 /* Found a DEF-USE dependence (insn1, insn2). */
1983 if (haifa_classify_insn (insn2) != PFREE_CANDIDATE)
1984 /* insn2 not guaranteed to be a 1 base reg load. */
1985 continue;
1986
1987 if (INSN_BB (insn2) == bb_trg)
1988 /* insn2 is the similar load, in the target block. */
1989 return 1;
1990
1991 if (*(candp->split_bbs.first_member) == BLOCK_FOR_INSN (insn2))
1992 /* insn2 is a similar load, in a split-block. */
1993 return 1;
1994 }
1995 }
1996 }
1997 }
1998
1999 /* Couldn't find a similar load. */
2000 return 0;
2001 } /* is_pfree */
2002
2003 /* Return 1 if load_insn is prisky (i.e. if load_insn is fed by
2004 a load moved speculatively, or if load_insn is protected by
2005 a compare on load_insn's address). */
2006
2007 static int
2008 is_prisky (rtx load_insn, int bb_src, int bb_trg)
2009 {
2010 if (FED_BY_SPEC_LOAD (load_insn))
2011 return 1;
2012
2013 if (sd_lists_empty_p (load_insn, SD_LIST_BACK))
2014 /* Dependence may 'hide' out of the region. */
2015 return 1;
2016
2017 if (is_conditionally_protected (load_insn, bb_src, bb_trg))
2018 return 1;
2019
2020 return 0;
2021 }
2022
2023 /* Insn is a candidate to be moved speculatively from bb_src to bb_trg.
2024 Return 1 if insn is exception-free (and the motion is valid)
2025 and 0 otherwise. */
2026
2027 static int
2028 is_exception_free (rtx_insn *insn, int bb_src, int bb_trg)
2029 {
2030 int insn_class = haifa_classify_insn (insn);
2031
2032 /* Handle non-load insns. */
2033 switch (insn_class)
2034 {
2035 case TRAP_FREE:
2036 return 1;
2037 case TRAP_RISKY:
2038 return 0;
2039 default:;
2040 }
2041
2042 /* Handle loads. */
2043 if (!flag_schedule_speculative_load)
2044 return 0;
2045 IS_LOAD_INSN (insn) = 1;
2046 switch (insn_class)
2047 {
2048 case IFREE:
2049 return (1);
2050 case IRISKY:
2051 return 0;
2052 case PFREE_CANDIDATE:
2053 if (is_pfree (insn, bb_src, bb_trg))
2054 return 1;
2055 /* Don't 'break' here: PFREE-candidate is also PRISKY-candidate. */
2056 case PRISKY_CANDIDATE:
2057 if (!flag_schedule_speculative_load_dangerous
2058 || is_prisky (insn, bb_src, bb_trg))
2059 return 0;
2060 break;
2061 default:;
2062 }
2063
2064 return flag_schedule_speculative_load_dangerous;
2065 }
2066 \f
2067 /* The number of insns from the current block scheduled so far. */
2068 static int sched_target_n_insns;
2069 /* The number of insns from the current block to be scheduled in total. */
2070 static int target_n_insns;
2071 /* The number of insns from the entire region scheduled so far. */
2072 static int sched_n_insns;
2073
2074 /* Implementations of the sched_info functions for region scheduling. */
2075 static void init_ready_list (void);
2076 static int can_schedule_ready_p (rtx_insn *);
2077 static void begin_schedule_ready (rtx_insn *);
2078 static ds_t new_ready (rtx_insn *, ds_t);
2079 static int schedule_more_p (void);
2080 static const char *rgn_print_insn (const rtx_insn *, int);
2081 static int rgn_rank (rtx_insn *, rtx_insn *);
2082 static void compute_jump_reg_dependencies (rtx, regset);
2083
2084 /* Functions for speculative scheduling. */
2085 static void rgn_add_remove_insn (rtx_insn *, int);
2086 static void rgn_add_block (basic_block, basic_block);
2087 static void rgn_fix_recovery_cfg (int, int, int);
2088 static basic_block advance_target_bb (basic_block, rtx_insn *);
2089
2090 /* Return nonzero if there are more insns that should be scheduled. */
2091
2092 static int
2093 schedule_more_p (void)
2094 {
2095 return sched_target_n_insns < target_n_insns;
2096 }
2097
2098 /* Add all insns that are initially ready to the ready list READY. Called
2099 once before scheduling a set of insns. */
2100
2101 static void
2102 init_ready_list (void)
2103 {
2104 rtx_insn *prev_head = current_sched_info->prev_head;
2105 rtx_insn *next_tail = current_sched_info->next_tail;
2106 int bb_src;
2107 rtx_insn *insn;
2108
2109 target_n_insns = 0;
2110 sched_target_n_insns = 0;
2111 sched_n_insns = 0;
2112
2113 /* Print debugging information. */
2114 if (sched_verbose >= 5)
2115 debug_rgn_dependencies (target_bb);
2116
2117 /* Prepare current target block info. */
2118 if (current_nr_blocks > 1)
2119 compute_trg_info (target_bb);
2120
2121 /* Initialize ready list with all 'ready' insns in target block.
2122 Count number of insns in the target block being scheduled. */
2123 for (insn = NEXT_INSN (prev_head); insn != next_tail; insn = NEXT_INSN (insn))
2124 {
2125 gcc_assert (TODO_SPEC (insn) == HARD_DEP || TODO_SPEC (insn) == DEP_POSTPONED);
2126 TODO_SPEC (insn) = HARD_DEP;
2127 try_ready (insn);
2128 target_n_insns++;
2129
2130 gcc_assert (!(TODO_SPEC (insn) & BEGIN_CONTROL));
2131 }
2132
2133 /* Add to ready list all 'ready' insns in valid source blocks.
2134 For speculative insns, check-live, exception-free, and
2135 issue-delay. */
2136 for (bb_src = target_bb + 1; bb_src < current_nr_blocks; bb_src++)
2137 if (IS_VALID (bb_src))
2138 {
2139 rtx_insn *src_head;
2140 rtx_insn *src_next_tail;
2141 rtx_insn *tail, *head;
2142
2143 get_ebb_head_tail (EBB_FIRST_BB (bb_src), EBB_LAST_BB (bb_src),
2144 &head, &tail);
2145 src_next_tail = NEXT_INSN (tail);
2146 src_head = head;
2147
2148 for (insn = src_head; insn != src_next_tail; insn = NEXT_INSN (insn))
2149 if (INSN_P (insn))
2150 {
2151 gcc_assert (TODO_SPEC (insn) == HARD_DEP || TODO_SPEC (insn) == DEP_POSTPONED);
2152 TODO_SPEC (insn) = HARD_DEP;
2153 try_ready (insn);
2154 }
2155 }
2156 }
2157
2158 /* Called after taking INSN from the ready list. Returns nonzero if this
2159 insn can be scheduled, nonzero if we should silently discard it. */
2160
2161 static int
2162 can_schedule_ready_p (rtx_insn *insn)
2163 {
2164 /* An interblock motion? */
2165 if (INSN_BB (insn) != target_bb
2166 && IS_SPECULATIVE_INSN (insn)
2167 && !check_live (insn, INSN_BB (insn)))
2168 return 0;
2169 else
2170 return 1;
2171 }
2172
2173 /* Updates counter and other information. Split from can_schedule_ready_p ()
2174 because when we schedule insn speculatively then insn passed to
2175 can_schedule_ready_p () differs from the one passed to
2176 begin_schedule_ready (). */
2177 static void
2178 begin_schedule_ready (rtx_insn *insn)
2179 {
2180 /* An interblock motion? */
2181 if (INSN_BB (insn) != target_bb)
2182 {
2183 if (IS_SPECULATIVE_INSN (insn))
2184 {
2185 gcc_assert (check_live (insn, INSN_BB (insn)));
2186
2187 update_live (insn, INSN_BB (insn));
2188
2189 /* For speculative load, mark insns fed by it. */
2190 if (IS_LOAD_INSN (insn) || FED_BY_SPEC_LOAD (insn))
2191 set_spec_fed (insn);
2192
2193 nr_spec++;
2194 }
2195 nr_inter++;
2196 }
2197 else
2198 {
2199 /* In block motion. */
2200 sched_target_n_insns++;
2201 }
2202 sched_n_insns++;
2203 }
2204
2205 /* Called after INSN has all its hard dependencies resolved and the speculation
2206 of type TS is enough to overcome them all.
2207 Return nonzero if it should be moved to the ready list or the queue, or zero
2208 if we should silently discard it. */
2209 static ds_t
2210 new_ready (rtx_insn *next, ds_t ts)
2211 {
2212 if (INSN_BB (next) != target_bb)
2213 {
2214 int not_ex_free = 0;
2215
2216 /* For speculative insns, before inserting to ready/queue,
2217 check live, exception-free, and issue-delay. */
2218 if (!IS_VALID (INSN_BB (next))
2219 || CANT_MOVE (next)
2220 || (IS_SPECULATIVE_INSN (next)
2221 && ((recog_memoized (next) >= 0
2222 && min_insn_conflict_delay (curr_state, next, next)
2223 > PARAM_VALUE (PARAM_MAX_SCHED_INSN_CONFLICT_DELAY))
2224 || IS_SPECULATION_CHECK_P (next)
2225 || !check_live (next, INSN_BB (next))
2226 || (not_ex_free = !is_exception_free (next, INSN_BB (next),
2227 target_bb)))))
2228 {
2229 if (not_ex_free
2230 /* We are here because is_exception_free () == false.
2231 But we possibly can handle that with control speculation. */
2232 && sched_deps_info->generate_spec_deps
2233 && spec_info->mask & BEGIN_CONTROL)
2234 {
2235 ds_t new_ds;
2236
2237 /* Add control speculation to NEXT's dependency type. */
2238 new_ds = set_dep_weak (ts, BEGIN_CONTROL, MAX_DEP_WEAK);
2239
2240 /* Check if NEXT can be speculated with new dependency type. */
2241 if (sched_insn_is_legitimate_for_speculation_p (next, new_ds))
2242 /* Here we got new control-speculative instruction. */
2243 ts = new_ds;
2244 else
2245 /* NEXT isn't ready yet. */
2246 ts = DEP_POSTPONED;
2247 }
2248 else
2249 /* NEXT isn't ready yet. */
2250 ts = DEP_POSTPONED;
2251 }
2252 }
2253
2254 return ts;
2255 }
2256
2257 /* Return a string that contains the insn uid and optionally anything else
2258 necessary to identify this insn in an output. It's valid to use a
2259 static buffer for this. The ALIGNED parameter should cause the string
2260 to be formatted so that multiple output lines will line up nicely. */
2261
2262 static const char *
2263 rgn_print_insn (const rtx_insn *insn, int aligned)
2264 {
2265 static char tmp[80];
2266
2267 if (aligned)
2268 sprintf (tmp, "b%3d: i%4d", INSN_BB (insn), INSN_UID (insn));
2269 else
2270 {
2271 if (current_nr_blocks > 1 && INSN_BB (insn) != target_bb)
2272 sprintf (tmp, "%d/b%d", INSN_UID (insn), INSN_BB (insn));
2273 else
2274 sprintf (tmp, "%d", INSN_UID (insn));
2275 }
2276 return tmp;
2277 }
2278
2279 /* Compare priority of two insns. Return a positive number if the second
2280 insn is to be preferred for scheduling, and a negative one if the first
2281 is to be preferred. Zero if they are equally good. */
2282
2283 static int
2284 rgn_rank (rtx_insn *insn1, rtx_insn *insn2)
2285 {
2286 /* Some comparison make sense in interblock scheduling only. */
2287 if (INSN_BB (insn1) != INSN_BB (insn2))
2288 {
2289 int spec_val, prob_val;
2290
2291 /* Prefer an inblock motion on an interblock motion. */
2292 if ((INSN_BB (insn2) == target_bb) && (INSN_BB (insn1) != target_bb))
2293 return 1;
2294 if ((INSN_BB (insn1) == target_bb) && (INSN_BB (insn2) != target_bb))
2295 return -1;
2296
2297 /* Prefer a useful motion on a speculative one. */
2298 spec_val = IS_SPECULATIVE_INSN (insn1) - IS_SPECULATIVE_INSN (insn2);
2299 if (spec_val)
2300 return spec_val;
2301
2302 /* Prefer a more probable (speculative) insn. */
2303 prob_val = INSN_PROBABILITY (insn2) - INSN_PROBABILITY (insn1);
2304 if (prob_val)
2305 return prob_val;
2306 }
2307 return 0;
2308 }
2309
2310 /* NEXT is an instruction that depends on INSN (a backward dependence);
2311 return nonzero if we should include this dependence in priority
2312 calculations. */
2313
2314 int
2315 contributes_to_priority (rtx_insn *next, rtx_insn *insn)
2316 {
2317 /* NEXT and INSN reside in one ebb. */
2318 return BLOCK_TO_BB (BLOCK_NUM (next)) == BLOCK_TO_BB (BLOCK_NUM (insn));
2319 }
2320
2321 /* INSN is a JUMP_INSN. Store the set of registers that must be
2322 considered as used by this jump in USED. */
2323
2324 static void
2325 compute_jump_reg_dependencies (rtx insn ATTRIBUTE_UNUSED,
2326 regset used ATTRIBUTE_UNUSED)
2327 {
2328 /* Nothing to do here, since we postprocess jumps in
2329 add_branch_dependences. */
2330 }
2331
2332 /* This variable holds common_sched_info hooks and data relevant to
2333 the interblock scheduler. */
2334 static struct common_sched_info_def rgn_common_sched_info;
2335
2336
2337 /* This holds data for the dependence analysis relevant to
2338 the interblock scheduler. */
2339 static struct sched_deps_info_def rgn_sched_deps_info;
2340
2341 /* This holds constant data used for initializing the above structure
2342 for the Haifa scheduler. */
2343 static const struct sched_deps_info_def rgn_const_sched_deps_info =
2344 {
2345 compute_jump_reg_dependencies,
2346 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2347 0, 0, 0
2348 };
2349
2350 /* Same as above, but for the selective scheduler. */
2351 static const struct sched_deps_info_def rgn_const_sel_sched_deps_info =
2352 {
2353 compute_jump_reg_dependencies,
2354 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2355 0, 0, 0
2356 };
2357
2358 /* Return true if scheduling INSN will trigger finish of scheduling
2359 current block. */
2360 static bool
2361 rgn_insn_finishes_block_p (rtx_insn *insn)
2362 {
2363 if (INSN_BB (insn) == target_bb
2364 && sched_target_n_insns + 1 == target_n_insns)
2365 /* INSN is the last not-scheduled instruction in the current block. */
2366 return true;
2367
2368 return false;
2369 }
2370
2371 /* Used in schedule_insns to initialize current_sched_info for scheduling
2372 regions (or single basic blocks). */
2373
2374 static const struct haifa_sched_info rgn_const_sched_info =
2375 {
2376 init_ready_list,
2377 can_schedule_ready_p,
2378 schedule_more_p,
2379 new_ready,
2380 rgn_rank,
2381 rgn_print_insn,
2382 contributes_to_priority,
2383 rgn_insn_finishes_block_p,
2384
2385 NULL, NULL,
2386 NULL, NULL,
2387 0, 0,
2388
2389 rgn_add_remove_insn,
2390 begin_schedule_ready,
2391 NULL,
2392 advance_target_bb,
2393 NULL, NULL,
2394 SCHED_RGN
2395 };
2396
2397 /* This variable holds the data and hooks needed to the Haifa scheduler backend
2398 for the interblock scheduler frontend. */
2399 static struct haifa_sched_info rgn_sched_info;
2400
2401 /* Returns maximum priority that an insn was assigned to. */
2402
2403 int
2404 get_rgn_sched_max_insns_priority (void)
2405 {
2406 return rgn_sched_info.sched_max_insns_priority;
2407 }
2408
2409 /* Determine if PAT sets a TARGET_CLASS_LIKELY_SPILLED_P register. */
2410
2411 static bool
2412 sets_likely_spilled (rtx pat)
2413 {
2414 bool ret = false;
2415 note_stores (pat, sets_likely_spilled_1, &ret);
2416 return ret;
2417 }
2418
2419 static void
2420 sets_likely_spilled_1 (rtx x, const_rtx pat, void *data)
2421 {
2422 bool *ret = (bool *) data;
2423
2424 if (GET_CODE (pat) == SET
2425 && REG_P (x)
2426 && HARD_REGISTER_P (x)
2427 && targetm.class_likely_spilled_p (REGNO_REG_CLASS (REGNO (x))))
2428 *ret = true;
2429 }
2430
2431 /* A bitmap to note insns that participate in any dependency. Used in
2432 add_branch_dependences. */
2433 static sbitmap insn_referenced;
2434
2435 /* Add dependences so that branches are scheduled to run last in their
2436 block. */
2437 static void
2438 add_branch_dependences (rtx_insn *head, rtx_insn *tail)
2439 {
2440 rtx_insn *insn, *last;
2441
2442 /* For all branches, calls, uses, clobbers, cc0 setters, and instructions
2443 that can throw exceptions, force them to remain in order at the end of
2444 the block by adding dependencies and giving the last a high priority.
2445 There may be notes present, and prev_head may also be a note.
2446
2447 Branches must obviously remain at the end. Calls should remain at the
2448 end since moving them results in worse register allocation. Uses remain
2449 at the end to ensure proper register allocation.
2450
2451 cc0 setters remain at the end because they can't be moved away from
2452 their cc0 user.
2453
2454 Predecessors of SCHED_GROUP_P instructions at the end remain at the end.
2455
2456 COND_EXEC insns cannot be moved past a branch (see e.g. PR17808).
2457
2458 Insns setting TARGET_CLASS_LIKELY_SPILLED_P registers (usually return
2459 values) are not moved before reload because we can wind up with register
2460 allocation failures. */
2461
2462 while (tail != head && DEBUG_INSN_P (tail))
2463 tail = PREV_INSN (tail);
2464
2465 insn = tail;
2466 last = 0;
2467 while (CALL_P (insn)
2468 || JUMP_P (insn) || JUMP_TABLE_DATA_P (insn)
2469 || (NONJUMP_INSN_P (insn)
2470 && (GET_CODE (PATTERN (insn)) == USE
2471 || GET_CODE (PATTERN (insn)) == CLOBBER
2472 || can_throw_internal (insn)
2473 || (HAVE_cc0 && sets_cc0_p (PATTERN (insn)))
2474 || (!reload_completed
2475 && sets_likely_spilled (PATTERN (insn)))))
2476 || NOTE_P (insn)
2477 || (last != 0 && SCHED_GROUP_P (last)))
2478 {
2479 if (!NOTE_P (insn))
2480 {
2481 if (last != 0
2482 && sd_find_dep_between (insn, last, false) == NULL)
2483 {
2484 if (! sched_insns_conditions_mutex_p (last, insn))
2485 add_dependence (last, insn, REG_DEP_ANTI);
2486 bitmap_set_bit (insn_referenced, INSN_LUID (insn));
2487 }
2488
2489 CANT_MOVE (insn) = 1;
2490
2491 last = insn;
2492 }
2493
2494 /* Don't overrun the bounds of the basic block. */
2495 if (insn == head)
2496 break;
2497
2498 do
2499 insn = PREV_INSN (insn);
2500 while (insn != head && DEBUG_INSN_P (insn));
2501 }
2502
2503 /* Make sure these insns are scheduled last in their block. */
2504 insn = last;
2505 if (insn != 0)
2506 while (insn != head)
2507 {
2508 insn = prev_nonnote_insn (insn);
2509
2510 if (bitmap_bit_p (insn_referenced, INSN_LUID (insn))
2511 || DEBUG_INSN_P (insn))
2512 continue;
2513
2514 if (! sched_insns_conditions_mutex_p (last, insn))
2515 add_dependence (last, insn, REG_DEP_ANTI);
2516 }
2517
2518 if (!targetm.have_conditional_execution ())
2519 return;
2520
2521 /* Finally, if the block ends in a jump, and we are doing intra-block
2522 scheduling, make sure that the branch depends on any COND_EXEC insns
2523 inside the block to avoid moving the COND_EXECs past the branch insn.
2524
2525 We only have to do this after reload, because (1) before reload there
2526 are no COND_EXEC insns, and (2) the region scheduler is an intra-block
2527 scheduler after reload.
2528
2529 FIXME: We could in some cases move COND_EXEC insns past the branch if
2530 this scheduler would be a little smarter. Consider this code:
2531
2532 T = [addr]
2533 C ? addr += 4
2534 !C ? X += 12
2535 C ? T += 1
2536 C ? jump foo
2537
2538 On a target with a one cycle stall on a memory access the optimal
2539 sequence would be:
2540
2541 T = [addr]
2542 C ? addr += 4
2543 C ? T += 1
2544 C ? jump foo
2545 !C ? X += 12
2546
2547 We don't want to put the 'X += 12' before the branch because it just
2548 wastes a cycle of execution time when the branch is taken.
2549
2550 Note that in the example "!C" will always be true. That is another
2551 possible improvement for handling COND_EXECs in this scheduler: it
2552 could remove always-true predicates. */
2553
2554 if (!reload_completed || ! (JUMP_P (tail) || JUMP_TABLE_DATA_P (tail)))
2555 return;
2556
2557 insn = tail;
2558 while (insn != head)
2559 {
2560 insn = PREV_INSN (insn);
2561
2562 /* Note that we want to add this dependency even when
2563 sched_insns_conditions_mutex_p returns true. The whole point
2564 is that we _want_ this dependency, even if these insns really
2565 are independent. */
2566 if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == COND_EXEC)
2567 add_dependence (tail, insn, REG_DEP_ANTI);
2568 }
2569 }
2570
2571 /* Data structures for the computation of data dependences in a regions. We
2572 keep one `deps' structure for every basic block. Before analyzing the
2573 data dependences for a bb, its variables are initialized as a function of
2574 the variables of its predecessors. When the analysis for a bb completes,
2575 we save the contents to the corresponding bb_deps[bb] variable. */
2576
2577 static struct deps_desc *bb_deps;
2578
2579 static void
2580 concat_insn_mem_list (rtx_insn_list *copy_insns,
2581 rtx_expr_list *copy_mems,
2582 rtx_insn_list **old_insns_p,
2583 rtx_expr_list **old_mems_p)
2584 {
2585 rtx_insn_list *new_insns = *old_insns_p;
2586 rtx_expr_list *new_mems = *old_mems_p;
2587
2588 while (copy_insns)
2589 {
2590 new_insns = alloc_INSN_LIST (copy_insns->insn (), new_insns);
2591 new_mems = alloc_EXPR_LIST (VOIDmode, copy_mems->element (), new_mems);
2592 copy_insns = copy_insns->next ();
2593 copy_mems = copy_mems->next ();
2594 }
2595
2596 *old_insns_p = new_insns;
2597 *old_mems_p = new_mems;
2598 }
2599
2600 /* Join PRED_DEPS to the SUCC_DEPS. */
2601 void
2602 deps_join (struct deps_desc *succ_deps, struct deps_desc *pred_deps)
2603 {
2604 unsigned reg;
2605 reg_set_iterator rsi;
2606
2607 /* The reg_last lists are inherited by successor. */
2608 EXECUTE_IF_SET_IN_REG_SET (&pred_deps->reg_last_in_use, 0, reg, rsi)
2609 {
2610 struct deps_reg *pred_rl = &pred_deps->reg_last[reg];
2611 struct deps_reg *succ_rl = &succ_deps->reg_last[reg];
2612
2613 succ_rl->uses = concat_INSN_LIST (pred_rl->uses, succ_rl->uses);
2614 succ_rl->sets = concat_INSN_LIST (pred_rl->sets, succ_rl->sets);
2615 succ_rl->implicit_sets
2616 = concat_INSN_LIST (pred_rl->implicit_sets, succ_rl->implicit_sets);
2617 succ_rl->clobbers = concat_INSN_LIST (pred_rl->clobbers,
2618 succ_rl->clobbers);
2619 succ_rl->uses_length += pred_rl->uses_length;
2620 succ_rl->clobbers_length += pred_rl->clobbers_length;
2621 }
2622 IOR_REG_SET (&succ_deps->reg_last_in_use, &pred_deps->reg_last_in_use);
2623
2624 /* Mem read/write lists are inherited by successor. */
2625 concat_insn_mem_list (pred_deps->pending_read_insns,
2626 pred_deps->pending_read_mems,
2627 &succ_deps->pending_read_insns,
2628 &succ_deps->pending_read_mems);
2629 concat_insn_mem_list (pred_deps->pending_write_insns,
2630 pred_deps->pending_write_mems,
2631 &succ_deps->pending_write_insns,
2632 &succ_deps->pending_write_mems);
2633
2634 succ_deps->pending_jump_insns
2635 = concat_INSN_LIST (pred_deps->pending_jump_insns,
2636 succ_deps->pending_jump_insns);
2637 succ_deps->last_pending_memory_flush
2638 = concat_INSN_LIST (pred_deps->last_pending_memory_flush,
2639 succ_deps->last_pending_memory_flush);
2640
2641 succ_deps->pending_read_list_length += pred_deps->pending_read_list_length;
2642 succ_deps->pending_write_list_length += pred_deps->pending_write_list_length;
2643 succ_deps->pending_flush_length += pred_deps->pending_flush_length;
2644
2645 /* last_function_call is inherited by successor. */
2646 succ_deps->last_function_call
2647 = concat_INSN_LIST (pred_deps->last_function_call,
2648 succ_deps->last_function_call);
2649
2650 /* last_function_call_may_noreturn is inherited by successor. */
2651 succ_deps->last_function_call_may_noreturn
2652 = concat_INSN_LIST (pred_deps->last_function_call_may_noreturn,
2653 succ_deps->last_function_call_may_noreturn);
2654
2655 /* sched_before_next_call is inherited by successor. */
2656 succ_deps->sched_before_next_call
2657 = concat_INSN_LIST (pred_deps->sched_before_next_call,
2658 succ_deps->sched_before_next_call);
2659 }
2660
2661 /* After computing the dependencies for block BB, propagate the dependencies
2662 found in TMP_DEPS to the successors of the block. */
2663 static void
2664 propagate_deps (int bb, struct deps_desc *pred_deps)
2665 {
2666 basic_block block = BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (bb));
2667 edge_iterator ei;
2668 edge e;
2669
2670 /* bb's structures are inherited by its successors. */
2671 FOR_EACH_EDGE (e, ei, block->succs)
2672 {
2673 /* Only bbs "below" bb, in the same region, are interesting. */
2674 if (e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)
2675 || CONTAINING_RGN (block->index) != CONTAINING_RGN (e->dest->index)
2676 || BLOCK_TO_BB (e->dest->index) <= bb)
2677 continue;
2678
2679 deps_join (bb_deps + BLOCK_TO_BB (e->dest->index), pred_deps);
2680 }
2681
2682 /* These lists should point to the right place, for correct
2683 freeing later. */
2684 bb_deps[bb].pending_read_insns = pred_deps->pending_read_insns;
2685 bb_deps[bb].pending_read_mems = pred_deps->pending_read_mems;
2686 bb_deps[bb].pending_write_insns = pred_deps->pending_write_insns;
2687 bb_deps[bb].pending_write_mems = pred_deps->pending_write_mems;
2688 bb_deps[bb].pending_jump_insns = pred_deps->pending_jump_insns;
2689
2690 /* Can't allow these to be freed twice. */
2691 pred_deps->pending_read_insns = 0;
2692 pred_deps->pending_read_mems = 0;
2693 pred_deps->pending_write_insns = 0;
2694 pred_deps->pending_write_mems = 0;
2695 pred_deps->pending_jump_insns = 0;
2696 }
2697
2698 /* Compute dependences inside bb. In a multiple blocks region:
2699 (1) a bb is analyzed after its predecessors, and (2) the lists in
2700 effect at the end of bb (after analyzing for bb) are inherited by
2701 bb's successors.
2702
2703 Specifically for reg-reg data dependences, the block insns are
2704 scanned by sched_analyze () top-to-bottom. Three lists are
2705 maintained by sched_analyze (): reg_last[].sets for register DEFs,
2706 reg_last[].implicit_sets for implicit hard register DEFs, and
2707 reg_last[].uses for register USEs.
2708
2709 When analysis is completed for bb, we update for its successors:
2710 ; - DEFS[succ] = Union (DEFS [succ], DEFS [bb])
2711 ; - IMPLICIT_DEFS[succ] = Union (IMPLICIT_DEFS [succ], IMPLICIT_DEFS [bb])
2712 ; - USES[succ] = Union (USES [succ], DEFS [bb])
2713
2714 The mechanism for computing mem-mem data dependence is very
2715 similar, and the result is interblock dependences in the region. */
2716
2717 static void
2718 compute_block_dependences (int bb)
2719 {
2720 rtx_insn *head, *tail;
2721 struct deps_desc tmp_deps;
2722
2723 tmp_deps = bb_deps[bb];
2724
2725 /* Do the analysis for this block. */
2726 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2727 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2728
2729 sched_analyze (&tmp_deps, head, tail);
2730
2731 /* Selective scheduling handles control dependencies by itself. */
2732 if (!sel_sched_p ())
2733 add_branch_dependences (head, tail);
2734
2735 if (current_nr_blocks > 1)
2736 propagate_deps (bb, &tmp_deps);
2737
2738 /* Free up the INSN_LISTs. */
2739 free_deps (&tmp_deps);
2740
2741 if (targetm.sched.dependencies_evaluation_hook)
2742 targetm.sched.dependencies_evaluation_hook (head, tail);
2743 }
2744
2745 /* Free dependencies of instructions inside BB. */
2746 static void
2747 free_block_dependencies (int bb)
2748 {
2749 rtx_insn *head;
2750 rtx_insn *tail;
2751
2752 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2753
2754 if (no_real_insns_p (head, tail))
2755 return;
2756
2757 sched_free_deps (head, tail, true);
2758 }
2759
2760 /* Remove all INSN_LISTs and EXPR_LISTs from the pending lists and add
2761 them to the unused_*_list variables, so that they can be reused. */
2762
2763 static void
2764 free_pending_lists (void)
2765 {
2766 int bb;
2767
2768 for (bb = 0; bb < current_nr_blocks; bb++)
2769 {
2770 free_INSN_LIST_list (&bb_deps[bb].pending_read_insns);
2771 free_INSN_LIST_list (&bb_deps[bb].pending_write_insns);
2772 free_EXPR_LIST_list (&bb_deps[bb].pending_read_mems);
2773 free_EXPR_LIST_list (&bb_deps[bb].pending_write_mems);
2774 free_INSN_LIST_list (&bb_deps[bb].pending_jump_insns);
2775 }
2776 }
2777 \f
2778 /* Print dependences for debugging starting from FROM_BB.
2779 Callable from debugger. */
2780 /* Print dependences for debugging starting from FROM_BB.
2781 Callable from debugger. */
2782 DEBUG_FUNCTION void
2783 debug_rgn_dependencies (int from_bb)
2784 {
2785 int bb;
2786
2787 fprintf (sched_dump,
2788 ";; --------------- forward dependences: ------------ \n");
2789
2790 for (bb = from_bb; bb < current_nr_blocks; bb++)
2791 {
2792 rtx_insn *head, *tail;
2793
2794 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2795 fprintf (sched_dump, "\n;; --- Region Dependences --- b %d bb %d \n",
2796 BB_TO_BLOCK (bb), bb);
2797
2798 debug_dependencies (head, tail);
2799 }
2800 }
2801
2802 /* Print dependencies information for instructions between HEAD and TAIL.
2803 ??? This function would probably fit best in haifa-sched.c. */
2804 void debug_dependencies (rtx_insn *head, rtx_insn *tail)
2805 {
2806 rtx_insn *insn;
2807 rtx_insn *next_tail = NEXT_INSN (tail);
2808
2809 fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
2810 "insn", "code", "bb", "dep", "prio", "cost",
2811 "reservation");
2812 fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
2813 "----", "----", "--", "---", "----", "----",
2814 "-----------");
2815
2816 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
2817 {
2818 if (! INSN_P (insn))
2819 {
2820 int n;
2821 fprintf (sched_dump, ";; %6d ", INSN_UID (insn));
2822 if (NOTE_P (insn))
2823 {
2824 n = NOTE_KIND (insn);
2825 fprintf (sched_dump, "%s\n", GET_NOTE_INSN_NAME (n));
2826 }
2827 else
2828 fprintf (sched_dump, " {%s}\n", GET_RTX_NAME (GET_CODE (insn)));
2829 continue;
2830 }
2831
2832 fprintf (sched_dump,
2833 ";; %s%5d%6d%6d%6d%6d%6d ",
2834 (SCHED_GROUP_P (insn) ? "+" : " "),
2835 INSN_UID (insn),
2836 INSN_CODE (insn),
2837 BLOCK_NUM (insn),
2838 sched_emulate_haifa_p ? -1 : sd_lists_size (insn, SD_LIST_BACK),
2839 (sel_sched_p () ? (sched_emulate_haifa_p ? -1
2840 : INSN_PRIORITY (insn))
2841 : INSN_PRIORITY (insn)),
2842 (sel_sched_p () ? (sched_emulate_haifa_p ? -1
2843 : insn_cost (insn))
2844 : insn_cost (insn)));
2845
2846 if (recog_memoized (insn) < 0)
2847 fprintf (sched_dump, "nothing");
2848 else
2849 print_reservation (sched_dump, insn);
2850
2851 fprintf (sched_dump, "\t: ");
2852 {
2853 sd_iterator_def sd_it;
2854 dep_t dep;
2855
2856 FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
2857 fprintf (sched_dump, "%d%s%s ", INSN_UID (DEP_CON (dep)),
2858 DEP_NONREG (dep) ? "n" : "",
2859 DEP_MULTIPLE (dep) ? "m" : "");
2860 }
2861 fprintf (sched_dump, "\n");
2862 }
2863
2864 fprintf (sched_dump, "\n");
2865 }
2866 \f
2867 /* Returns true if all the basic blocks of the current region have
2868 NOTE_DISABLE_SCHED_OF_BLOCK which means not to schedule that region. */
2869 bool
2870 sched_is_disabled_for_current_region_p (void)
2871 {
2872 int bb;
2873
2874 for (bb = 0; bb < current_nr_blocks; bb++)
2875 if (!(BASIC_BLOCK_FOR_FN (cfun,
2876 BB_TO_BLOCK (bb))->flags & BB_DISABLE_SCHEDULE))
2877 return false;
2878
2879 return true;
2880 }
2881
2882 /* Free all region dependencies saved in INSN_BACK_DEPS and
2883 INSN_RESOLVED_BACK_DEPS. The Haifa scheduler does this on the fly
2884 when scheduling, so this function is supposed to be called from
2885 the selective scheduling only. */
2886 void
2887 free_rgn_deps (void)
2888 {
2889 int bb;
2890
2891 for (bb = 0; bb < current_nr_blocks; bb++)
2892 {
2893 rtx_insn *head, *tail;
2894
2895 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2896 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2897
2898 sched_free_deps (head, tail, false);
2899 }
2900 }
2901
2902 static int rgn_n_insns;
2903
2904 /* Compute insn priority for a current region. */
2905 void
2906 compute_priorities (void)
2907 {
2908 int bb;
2909
2910 current_sched_info->sched_max_insns_priority = 0;
2911 for (bb = 0; bb < current_nr_blocks; bb++)
2912 {
2913 rtx_insn *head, *tail;
2914
2915 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2916 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2917
2918 if (no_real_insns_p (head, tail))
2919 continue;
2920
2921 rgn_n_insns += set_priorities (head, tail);
2922 }
2923 current_sched_info->sched_max_insns_priority++;
2924 }
2925
2926 /* (Re-)initialize the arrays of DFA states at the end of each basic block.
2927
2928 SAVED_LAST_BASIC_BLOCK is the previous length of the arrays. It must be
2929 zero for the first call to this function, to allocate the arrays for the
2930 first time.
2931
2932 This function is called once during initialization of the scheduler, and
2933 called again to resize the arrays if new basic blocks have been created,
2934 for example for speculation recovery code. */
2935
2936 static void
2937 realloc_bb_state_array (int saved_last_basic_block)
2938 {
2939 char *old_bb_state_array = bb_state_array;
2940 size_t lbb = (size_t) last_basic_block_for_fn (cfun);
2941 size_t slbb = (size_t) saved_last_basic_block;
2942
2943 /* Nothing to do if nothing changed since the last time this was called. */
2944 if (saved_last_basic_block == last_basic_block_for_fn (cfun))
2945 return;
2946
2947 /* The selective scheduler doesn't use the state arrays. */
2948 if (sel_sched_p ())
2949 {
2950 gcc_assert (bb_state_array == NULL && bb_state == NULL);
2951 return;
2952 }
2953
2954 gcc_checking_assert (saved_last_basic_block == 0
2955 || (bb_state_array != NULL && bb_state != NULL));
2956
2957 bb_state_array = XRESIZEVEC (char, bb_state_array, lbb * dfa_state_size);
2958 bb_state = XRESIZEVEC (state_t, bb_state, lbb);
2959
2960 /* If BB_STATE_ARRAY has moved, fixup all the state pointers array.
2961 Otherwise only fixup the newly allocated ones. For the state
2962 array itself, only initialize the new entries. */
2963 bool bb_state_array_moved = (bb_state_array != old_bb_state_array);
2964 for (size_t i = bb_state_array_moved ? 0 : slbb; i < lbb; i++)
2965 bb_state[i] = (state_t) (bb_state_array + i * dfa_state_size);
2966 for (size_t i = slbb; i < lbb; i++)
2967 state_reset (bb_state[i]);
2968 }
2969
2970 /* Free the arrays of DFA states at the end of each basic block. */
2971
2972 static void
2973 free_bb_state_array (void)
2974 {
2975 free (bb_state_array);
2976 free (bb_state);
2977 bb_state_array = NULL;
2978 bb_state = NULL;
2979 }
2980
2981 /* Schedule a region. A region is either an inner loop, a loop-free
2982 subroutine, or a single basic block. Each bb in the region is
2983 scheduled after its flow predecessors. */
2984
2985 static void
2986 schedule_region (int rgn)
2987 {
2988 int bb;
2989 int sched_rgn_n_insns = 0;
2990
2991 rgn_n_insns = 0;
2992
2993 /* Do not support register pressure sensitive scheduling for the new regions
2994 as we don't update the liveness info for them. */
2995 if (sched_pressure != SCHED_PRESSURE_NONE
2996 && rgn >= nr_regions_initial)
2997 {
2998 free_global_sched_pressure_data ();
2999 sched_pressure = SCHED_PRESSURE_NONE;
3000 }
3001
3002 rgn_setup_region (rgn);
3003
3004 /* Don't schedule region that is marked by
3005 NOTE_DISABLE_SCHED_OF_BLOCK. */
3006 if (sched_is_disabled_for_current_region_p ())
3007 return;
3008
3009 sched_rgn_compute_dependencies (rgn);
3010
3011 sched_rgn_local_init (rgn);
3012
3013 /* Set priorities. */
3014 compute_priorities ();
3015
3016 sched_extend_ready_list (rgn_n_insns);
3017
3018 if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
3019 {
3020 sched_init_region_reg_pressure_info ();
3021 for (bb = 0; bb < current_nr_blocks; bb++)
3022 {
3023 basic_block first_bb, last_bb;
3024 rtx_insn *head, *tail;
3025
3026 first_bb = EBB_FIRST_BB (bb);
3027 last_bb = EBB_LAST_BB (bb);
3028
3029 get_ebb_head_tail (first_bb, last_bb, &head, &tail);
3030
3031 if (no_real_insns_p (head, tail))
3032 {
3033 gcc_assert (first_bb == last_bb);
3034 continue;
3035 }
3036 sched_setup_bb_reg_pressure_info (first_bb, PREV_INSN (head));
3037 }
3038 }
3039
3040 /* Now we can schedule all blocks. */
3041 for (bb = 0; bb < current_nr_blocks; bb++)
3042 {
3043 basic_block first_bb, last_bb, curr_bb;
3044 rtx_insn *head, *tail;
3045
3046 first_bb = EBB_FIRST_BB (bb);
3047 last_bb = EBB_LAST_BB (bb);
3048
3049 get_ebb_head_tail (first_bb, last_bb, &head, &tail);
3050
3051 if (no_real_insns_p (head, tail))
3052 {
3053 gcc_assert (first_bb == last_bb);
3054 continue;
3055 }
3056
3057 current_sched_info->prev_head = PREV_INSN (head);
3058 current_sched_info->next_tail = NEXT_INSN (tail);
3059
3060 remove_notes (head, tail);
3061
3062 unlink_bb_notes (first_bb, last_bb);
3063
3064 target_bb = bb;
3065
3066 gcc_assert (flag_schedule_interblock || current_nr_blocks == 1);
3067 current_sched_info->queue_must_finish_empty = current_nr_blocks == 1;
3068
3069 curr_bb = first_bb;
3070 if (dbg_cnt (sched_block))
3071 {
3072 edge f;
3073 int saved_last_basic_block = last_basic_block_for_fn (cfun);
3074
3075 schedule_block (&curr_bb, bb_state[first_bb->index]);
3076 gcc_assert (EBB_FIRST_BB (bb) == first_bb);
3077 sched_rgn_n_insns += sched_n_insns;
3078 realloc_bb_state_array (saved_last_basic_block);
3079 f = find_fallthru_edge (last_bb->succs);
3080 if (f && f->probability * 100 / REG_BR_PROB_BASE >=
3081 PARAM_VALUE (PARAM_SCHED_STATE_EDGE_PROB_CUTOFF))
3082 {
3083 memcpy (bb_state[f->dest->index], curr_state,
3084 dfa_state_size);
3085 if (sched_verbose >= 5)
3086 fprintf (sched_dump, "saving state for edge %d->%d\n",
3087 f->src->index, f->dest->index);
3088 }
3089 }
3090 else
3091 {
3092 sched_rgn_n_insns += rgn_n_insns;
3093 }
3094
3095 /* Clean up. */
3096 if (current_nr_blocks > 1)
3097 free_trg_info ();
3098 }
3099
3100 /* Sanity check: verify that all region insns were scheduled. */
3101 gcc_assert (sched_rgn_n_insns == rgn_n_insns);
3102
3103 sched_finish_ready_list ();
3104
3105 /* Done with this region. */
3106 sched_rgn_local_finish ();
3107
3108 /* Free dependencies. */
3109 for (bb = 0; bb < current_nr_blocks; ++bb)
3110 free_block_dependencies (bb);
3111
3112 gcc_assert (haifa_recovery_bb_ever_added_p
3113 || deps_pools_are_empty_p ());
3114 }
3115
3116 /* Initialize data structures for region scheduling. */
3117
3118 void
3119 sched_rgn_init (bool single_blocks_p)
3120 {
3121 min_spec_prob = ((PARAM_VALUE (PARAM_MIN_SPEC_PROB) * REG_BR_PROB_BASE)
3122 / 100);
3123
3124 nr_inter = 0;
3125 nr_spec = 0;
3126
3127 extend_regions ();
3128
3129 CONTAINING_RGN (ENTRY_BLOCK) = -1;
3130 CONTAINING_RGN (EXIT_BLOCK) = -1;
3131
3132 realloc_bb_state_array (0);
3133
3134 /* Compute regions for scheduling. */
3135 if (single_blocks_p
3136 || n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS + 1
3137 || !flag_schedule_interblock
3138 || is_cfg_nonregular ())
3139 {
3140 find_single_block_region (sel_sched_p ());
3141 }
3142 else
3143 {
3144 /* Compute the dominators and post dominators. */
3145 if (!sel_sched_p ())
3146 calculate_dominance_info (CDI_DOMINATORS);
3147
3148 /* Find regions. */
3149 find_rgns ();
3150
3151 if (sched_verbose >= 3)
3152 debug_regions ();
3153
3154 /* For now. This will move as more and more of haifa is converted
3155 to using the cfg code. */
3156 if (!sel_sched_p ())
3157 free_dominance_info (CDI_DOMINATORS);
3158 }
3159
3160 gcc_assert (0 < nr_regions && nr_regions <= n_basic_blocks_for_fn (cfun));
3161
3162 RGN_BLOCKS (nr_regions) = (RGN_BLOCKS (nr_regions - 1) +
3163 RGN_NR_BLOCKS (nr_regions - 1));
3164 nr_regions_initial = nr_regions;
3165 }
3166
3167 /* Free data structures for region scheduling. */
3168 void
3169 sched_rgn_finish (void)
3170 {
3171 free_bb_state_array ();
3172
3173 /* Reposition the prologue and epilogue notes in case we moved the
3174 prologue/epilogue insns. */
3175 if (reload_completed)
3176 reposition_prologue_and_epilogue_notes ();
3177
3178 if (sched_verbose)
3179 {
3180 if (reload_completed == 0
3181 && flag_schedule_interblock)
3182 {
3183 fprintf (sched_dump,
3184 "\n;; Procedure interblock/speculative motions == %d/%d \n",
3185 nr_inter, nr_spec);
3186 }
3187 else
3188 gcc_assert (nr_inter <= 0);
3189 fprintf (sched_dump, "\n\n");
3190 }
3191
3192 nr_regions = 0;
3193
3194 free (rgn_table);
3195 rgn_table = NULL;
3196
3197 free (rgn_bb_table);
3198 rgn_bb_table = NULL;
3199
3200 free (block_to_bb);
3201 block_to_bb = NULL;
3202
3203 free (containing_rgn);
3204 containing_rgn = NULL;
3205
3206 free (ebb_head);
3207 ebb_head = NULL;
3208 }
3209
3210 /* Setup global variables like CURRENT_BLOCKS and CURRENT_NR_BLOCK to
3211 point to the region RGN. */
3212 void
3213 rgn_setup_region (int rgn)
3214 {
3215 int bb;
3216
3217 /* Set variables for the current region. */
3218 current_nr_blocks = RGN_NR_BLOCKS (rgn);
3219 current_blocks = RGN_BLOCKS (rgn);
3220
3221 /* EBB_HEAD is a region-scope structure. But we realloc it for
3222 each region to save time/memory/something else.
3223 See comments in add_block1, for what reasons we allocate +1 element. */
3224 ebb_head = XRESIZEVEC (int, ebb_head, current_nr_blocks + 1);
3225 for (bb = 0; bb <= current_nr_blocks; bb++)
3226 ebb_head[bb] = current_blocks + bb;
3227 }
3228
3229 /* Compute instruction dependencies in region RGN. */
3230 void
3231 sched_rgn_compute_dependencies (int rgn)
3232 {
3233 if (!RGN_DONT_CALC_DEPS (rgn))
3234 {
3235 int bb;
3236
3237 if (sel_sched_p ())
3238 sched_emulate_haifa_p = 1;
3239
3240 init_deps_global ();
3241
3242 /* Initializations for region data dependence analysis. */
3243 bb_deps = XNEWVEC (struct deps_desc, current_nr_blocks);
3244 for (bb = 0; bb < current_nr_blocks; bb++)
3245 init_deps (bb_deps + bb, false);
3246
3247 /* Initialize bitmap used in add_branch_dependences. */
3248 insn_referenced = sbitmap_alloc (sched_max_luid);
3249 bitmap_clear (insn_referenced);
3250
3251 /* Compute backward dependencies. */
3252 for (bb = 0; bb < current_nr_blocks; bb++)
3253 compute_block_dependences (bb);
3254
3255 sbitmap_free (insn_referenced);
3256 free_pending_lists ();
3257 finish_deps_global ();
3258 free (bb_deps);
3259
3260 /* We don't want to recalculate this twice. */
3261 RGN_DONT_CALC_DEPS (rgn) = 1;
3262
3263 if (sel_sched_p ())
3264 sched_emulate_haifa_p = 0;
3265 }
3266 else
3267 /* (This is a recovery block. It is always a single block region.)
3268 OR (We use selective scheduling.) */
3269 gcc_assert (current_nr_blocks == 1 || sel_sched_p ());
3270 }
3271
3272 /* Init region data structures. Returns true if this region should
3273 not be scheduled. */
3274 void
3275 sched_rgn_local_init (int rgn)
3276 {
3277 int bb;
3278
3279 /* Compute interblock info: probabilities, split-edges, dominators, etc. */
3280 if (current_nr_blocks > 1)
3281 {
3282 basic_block block;
3283 edge e;
3284 edge_iterator ei;
3285
3286 prob = XNEWVEC (int, current_nr_blocks);
3287
3288 dom = sbitmap_vector_alloc (current_nr_blocks, current_nr_blocks);
3289 bitmap_vector_clear (dom, current_nr_blocks);
3290
3291 /* Use ->aux to implement EDGE_TO_BIT mapping. */
3292 rgn_nr_edges = 0;
3293 FOR_EACH_BB_FN (block, cfun)
3294 {
3295 if (CONTAINING_RGN (block->index) != rgn)
3296 continue;
3297 FOR_EACH_EDGE (e, ei, block->succs)
3298 SET_EDGE_TO_BIT (e, rgn_nr_edges++);
3299 }
3300
3301 rgn_edges = XNEWVEC (edge, rgn_nr_edges);
3302 rgn_nr_edges = 0;
3303 FOR_EACH_BB_FN (block, cfun)
3304 {
3305 if (CONTAINING_RGN (block->index) != rgn)
3306 continue;
3307 FOR_EACH_EDGE (e, ei, block->succs)
3308 rgn_edges[rgn_nr_edges++] = e;
3309 }
3310
3311 /* Split edges. */
3312 pot_split = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges);
3313 bitmap_vector_clear (pot_split, current_nr_blocks);
3314 ancestor_edges = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges);
3315 bitmap_vector_clear (ancestor_edges, current_nr_blocks);
3316
3317 /* Compute probabilities, dominators, split_edges. */
3318 for (bb = 0; bb < current_nr_blocks; bb++)
3319 compute_dom_prob_ps (bb);
3320
3321 /* Cleanup ->aux used for EDGE_TO_BIT mapping. */
3322 /* We don't need them anymore. But we want to avoid duplication of
3323 aux fields in the newly created edges. */
3324 FOR_EACH_BB_FN (block, cfun)
3325 {
3326 if (CONTAINING_RGN (block->index) != rgn)
3327 continue;
3328 FOR_EACH_EDGE (e, ei, block->succs)
3329 e->aux = NULL;
3330 }
3331 }
3332 }
3333
3334 /* Free data computed for the finished region. */
3335 void
3336 sched_rgn_local_free (void)
3337 {
3338 free (prob);
3339 sbitmap_vector_free (dom);
3340 sbitmap_vector_free (pot_split);
3341 sbitmap_vector_free (ancestor_edges);
3342 free (rgn_edges);
3343 }
3344
3345 /* Free data computed for the finished region. */
3346 void
3347 sched_rgn_local_finish (void)
3348 {
3349 if (current_nr_blocks > 1 && !sel_sched_p ())
3350 {
3351 sched_rgn_local_free ();
3352 }
3353 }
3354
3355 /* Setup scheduler infos. */
3356 void
3357 rgn_setup_common_sched_info (void)
3358 {
3359 memcpy (&rgn_common_sched_info, &haifa_common_sched_info,
3360 sizeof (rgn_common_sched_info));
3361
3362 rgn_common_sched_info.fix_recovery_cfg = rgn_fix_recovery_cfg;
3363 rgn_common_sched_info.add_block = rgn_add_block;
3364 rgn_common_sched_info.estimate_number_of_insns
3365 = rgn_estimate_number_of_insns;
3366 rgn_common_sched_info.sched_pass_id = SCHED_RGN_PASS;
3367
3368 common_sched_info = &rgn_common_sched_info;
3369 }
3370
3371 /* Setup all *_sched_info structures (for the Haifa frontend
3372 and for the dependence analysis) in the interblock scheduler. */
3373 void
3374 rgn_setup_sched_infos (void)
3375 {
3376 if (!sel_sched_p ())
3377 memcpy (&rgn_sched_deps_info, &rgn_const_sched_deps_info,
3378 sizeof (rgn_sched_deps_info));
3379 else
3380 memcpy (&rgn_sched_deps_info, &rgn_const_sel_sched_deps_info,
3381 sizeof (rgn_sched_deps_info));
3382
3383 sched_deps_info = &rgn_sched_deps_info;
3384
3385 memcpy (&rgn_sched_info, &rgn_const_sched_info, sizeof (rgn_sched_info));
3386 current_sched_info = &rgn_sched_info;
3387 }
3388
3389 /* The one entry point in this file. */
3390 void
3391 schedule_insns (void)
3392 {
3393 int rgn;
3394
3395 /* Taking care of this degenerate case makes the rest of
3396 this code simpler. */
3397 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3398 return;
3399
3400 rgn_setup_common_sched_info ();
3401 rgn_setup_sched_infos ();
3402
3403 haifa_sched_init ();
3404 sched_rgn_init (reload_completed);
3405
3406 bitmap_initialize (&not_in_df, 0);
3407 bitmap_clear (&not_in_df);
3408
3409 /* Schedule every region in the subroutine. */
3410 for (rgn = 0; rgn < nr_regions; rgn++)
3411 if (dbg_cnt (sched_region))
3412 schedule_region (rgn);
3413
3414 /* Clean up. */
3415 sched_rgn_finish ();
3416 bitmap_clear (&not_in_df);
3417
3418 haifa_sched_finish ();
3419 }
3420
3421 /* INSN has been added to/removed from current region. */
3422 static void
3423 rgn_add_remove_insn (rtx_insn *insn, int remove_p)
3424 {
3425 if (!remove_p)
3426 rgn_n_insns++;
3427 else
3428 rgn_n_insns--;
3429
3430 if (INSN_BB (insn) == target_bb)
3431 {
3432 if (!remove_p)
3433 target_n_insns++;
3434 else
3435 target_n_insns--;
3436 }
3437 }
3438
3439 /* Extend internal data structures. */
3440 void
3441 extend_regions (void)
3442 {
3443 rgn_table = XRESIZEVEC (region, rgn_table, n_basic_blocks_for_fn (cfun));
3444 rgn_bb_table = XRESIZEVEC (int, rgn_bb_table,
3445 n_basic_blocks_for_fn (cfun));
3446 block_to_bb = XRESIZEVEC (int, block_to_bb,
3447 last_basic_block_for_fn (cfun));
3448 containing_rgn = XRESIZEVEC (int, containing_rgn,
3449 last_basic_block_for_fn (cfun));
3450 }
3451
3452 void
3453 rgn_make_new_region_out_of_new_block (basic_block bb)
3454 {
3455 int i;
3456
3457 i = RGN_BLOCKS (nr_regions);
3458 /* I - first free position in rgn_bb_table. */
3459
3460 rgn_bb_table[i] = bb->index;
3461 RGN_NR_BLOCKS (nr_regions) = 1;
3462 RGN_HAS_REAL_EBB (nr_regions) = 0;
3463 RGN_DONT_CALC_DEPS (nr_regions) = 0;
3464 CONTAINING_RGN (bb->index) = nr_regions;
3465 BLOCK_TO_BB (bb->index) = 0;
3466
3467 nr_regions++;
3468
3469 RGN_BLOCKS (nr_regions) = i + 1;
3470 }
3471
3472 /* BB was added to ebb after AFTER. */
3473 static void
3474 rgn_add_block (basic_block bb, basic_block after)
3475 {
3476 extend_regions ();
3477 bitmap_set_bit (&not_in_df, bb->index);
3478
3479 if (after == 0 || after == EXIT_BLOCK_PTR_FOR_FN (cfun))
3480 {
3481 rgn_make_new_region_out_of_new_block (bb);
3482 RGN_DONT_CALC_DEPS (nr_regions - 1) = (after
3483 == EXIT_BLOCK_PTR_FOR_FN (cfun));
3484 }
3485 else
3486 {
3487 int i, pos;
3488
3489 /* We need to fix rgn_table, block_to_bb, containing_rgn
3490 and ebb_head. */
3491
3492 BLOCK_TO_BB (bb->index) = BLOCK_TO_BB (after->index);
3493
3494 /* We extend ebb_head to one more position to
3495 easily find the last position of the last ebb in
3496 the current region. Thus, ebb_head[BLOCK_TO_BB (after) + 1]
3497 is _always_ valid for access. */
3498
3499 i = BLOCK_TO_BB (after->index) + 1;
3500 pos = ebb_head[i] - 1;
3501 /* Now POS is the index of the last block in the region. */
3502
3503 /* Find index of basic block AFTER. */
3504 for (; rgn_bb_table[pos] != after->index; pos--)
3505 ;
3506
3507 pos++;
3508 gcc_assert (pos > ebb_head[i - 1]);
3509
3510 /* i - ebb right after "AFTER". */
3511 /* ebb_head[i] - VALID. */
3512
3513 /* Source position: ebb_head[i]
3514 Destination position: ebb_head[i] + 1
3515 Last position:
3516 RGN_BLOCKS (nr_regions) - 1
3517 Number of elements to copy: (last_position) - (source_position) + 1
3518 */
3519
3520 memmove (rgn_bb_table + pos + 1,
3521 rgn_bb_table + pos,
3522 ((RGN_BLOCKS (nr_regions) - 1) - (pos) + 1)
3523 * sizeof (*rgn_bb_table));
3524
3525 rgn_bb_table[pos] = bb->index;
3526
3527 for (; i <= current_nr_blocks; i++)
3528 ebb_head [i]++;
3529
3530 i = CONTAINING_RGN (after->index);
3531 CONTAINING_RGN (bb->index) = i;
3532
3533 RGN_HAS_REAL_EBB (i) = 1;
3534
3535 for (++i; i <= nr_regions; i++)
3536 RGN_BLOCKS (i)++;
3537 }
3538 }
3539
3540 /* Fix internal data after interblock movement of jump instruction.
3541 For parameter meaning please refer to
3542 sched-int.h: struct sched_info: fix_recovery_cfg. */
3543 static void
3544 rgn_fix_recovery_cfg (int bbi, int check_bbi, int check_bb_nexti)
3545 {
3546 int old_pos, new_pos, i;
3547
3548 BLOCK_TO_BB (check_bb_nexti) = BLOCK_TO_BB (bbi);
3549
3550 for (old_pos = ebb_head[BLOCK_TO_BB (check_bbi) + 1] - 1;
3551 rgn_bb_table[old_pos] != check_bb_nexti;
3552 old_pos--)
3553 ;
3554 gcc_assert (old_pos > ebb_head[BLOCK_TO_BB (check_bbi)]);
3555
3556 for (new_pos = ebb_head[BLOCK_TO_BB (bbi) + 1] - 1;
3557 rgn_bb_table[new_pos] != bbi;
3558 new_pos--)
3559 ;
3560 new_pos++;
3561 gcc_assert (new_pos > ebb_head[BLOCK_TO_BB (bbi)]);
3562
3563 gcc_assert (new_pos < old_pos);
3564
3565 memmove (rgn_bb_table + new_pos + 1,
3566 rgn_bb_table + new_pos,
3567 (old_pos - new_pos) * sizeof (*rgn_bb_table));
3568
3569 rgn_bb_table[new_pos] = check_bb_nexti;
3570
3571 for (i = BLOCK_TO_BB (bbi) + 1; i <= BLOCK_TO_BB (check_bbi); i++)
3572 ebb_head[i]++;
3573 }
3574
3575 /* Return next block in ebb chain. For parameter meaning please refer to
3576 sched-int.h: struct sched_info: advance_target_bb. */
3577 static basic_block
3578 advance_target_bb (basic_block bb, rtx_insn *insn)
3579 {
3580 if (insn)
3581 return 0;
3582
3583 gcc_assert (BLOCK_TO_BB (bb->index) == target_bb
3584 && BLOCK_TO_BB (bb->next_bb->index) == target_bb);
3585 return bb->next_bb;
3586 }
3587
3588 #endif
3589 \f
3590 /* Run instruction scheduler. */
3591 static unsigned int
3592 rest_of_handle_live_range_shrinkage (void)
3593 {
3594 #ifdef INSN_SCHEDULING
3595 int saved;
3596
3597 initialize_live_range_shrinkage ();
3598 saved = flag_schedule_interblock;
3599 flag_schedule_interblock = false;
3600 schedule_insns ();
3601 flag_schedule_interblock = saved;
3602 finish_live_range_shrinkage ();
3603 #endif
3604 return 0;
3605 }
3606
3607 /* Run instruction scheduler. */
3608 static unsigned int
3609 rest_of_handle_sched (void)
3610 {
3611 #ifdef INSN_SCHEDULING
3612 if (flag_selective_scheduling
3613 && ! maybe_skip_selective_scheduling ())
3614 run_selective_scheduling ();
3615 else
3616 schedule_insns ();
3617 #endif
3618 return 0;
3619 }
3620
3621 /* Run second scheduling pass after reload. */
3622 static unsigned int
3623 rest_of_handle_sched2 (void)
3624 {
3625 #ifdef INSN_SCHEDULING
3626 if (flag_selective_scheduling2
3627 && ! maybe_skip_selective_scheduling ())
3628 run_selective_scheduling ();
3629 else
3630 {
3631 /* Do control and data sched analysis again,
3632 and write some more of the results to dump file. */
3633 if (flag_sched2_use_superblocks)
3634 schedule_ebbs ();
3635 else
3636 schedule_insns ();
3637 }
3638 #endif
3639 return 0;
3640 }
3641
3642 static unsigned int
3643 rest_of_handle_sched_fusion (void)
3644 {
3645 #ifdef INSN_SCHEDULING
3646 sched_fusion = true;
3647 schedule_insns ();
3648 sched_fusion = false;
3649 #endif
3650 return 0;
3651 }
3652
3653 namespace {
3654
3655 const pass_data pass_data_live_range_shrinkage =
3656 {
3657 RTL_PASS, /* type */
3658 "lr_shrinkage", /* name */
3659 OPTGROUP_NONE, /* optinfo_flags */
3660 TV_LIVE_RANGE_SHRINKAGE, /* tv_id */
3661 0, /* properties_required */
3662 0, /* properties_provided */
3663 0, /* properties_destroyed */
3664 0, /* todo_flags_start */
3665 TODO_df_finish, /* todo_flags_finish */
3666 };
3667
3668 class pass_live_range_shrinkage : public rtl_opt_pass
3669 {
3670 public:
3671 pass_live_range_shrinkage(gcc::context *ctxt)
3672 : rtl_opt_pass(pass_data_live_range_shrinkage, ctxt)
3673 {}
3674
3675 /* opt_pass methods: */
3676 virtual bool gate (function *)
3677 {
3678 #ifdef INSN_SCHEDULING
3679 return flag_live_range_shrinkage;
3680 #else
3681 return 0;
3682 #endif
3683 }
3684
3685 virtual unsigned int execute (function *)
3686 {
3687 return rest_of_handle_live_range_shrinkage ();
3688 }
3689
3690 }; // class pass_live_range_shrinkage
3691
3692 } // anon namespace
3693
3694 rtl_opt_pass *
3695 make_pass_live_range_shrinkage (gcc::context *ctxt)
3696 {
3697 return new pass_live_range_shrinkage (ctxt);
3698 }
3699
3700 namespace {
3701
3702 const pass_data pass_data_sched =
3703 {
3704 RTL_PASS, /* type */
3705 "sched1", /* name */
3706 OPTGROUP_NONE, /* optinfo_flags */
3707 TV_SCHED, /* tv_id */
3708 0, /* properties_required */
3709 0, /* properties_provided */
3710 0, /* properties_destroyed */
3711 0, /* todo_flags_start */
3712 TODO_df_finish, /* todo_flags_finish */
3713 };
3714
3715 class pass_sched : public rtl_opt_pass
3716 {
3717 public:
3718 pass_sched (gcc::context *ctxt)
3719 : rtl_opt_pass (pass_data_sched, ctxt)
3720 {}
3721
3722 /* opt_pass methods: */
3723 virtual bool gate (function *);
3724 virtual unsigned int execute (function *) { return rest_of_handle_sched (); }
3725
3726 }; // class pass_sched
3727
3728 bool
3729 pass_sched::gate (function *)
3730 {
3731 #ifdef INSN_SCHEDULING
3732 return optimize > 0 && flag_schedule_insns && dbg_cnt (sched_func);
3733 #else
3734 return 0;
3735 #endif
3736 }
3737
3738 } // anon namespace
3739
3740 rtl_opt_pass *
3741 make_pass_sched (gcc::context *ctxt)
3742 {
3743 return new pass_sched (ctxt);
3744 }
3745
3746 namespace {
3747
3748 const pass_data pass_data_sched2 =
3749 {
3750 RTL_PASS, /* type */
3751 "sched2", /* name */
3752 OPTGROUP_NONE, /* optinfo_flags */
3753 TV_SCHED2, /* tv_id */
3754 0, /* properties_required */
3755 0, /* properties_provided */
3756 0, /* properties_destroyed */
3757 0, /* todo_flags_start */
3758 TODO_df_finish, /* todo_flags_finish */
3759 };
3760
3761 class pass_sched2 : public rtl_opt_pass
3762 {
3763 public:
3764 pass_sched2 (gcc::context *ctxt)
3765 : rtl_opt_pass (pass_data_sched2, ctxt)
3766 {}
3767
3768 /* opt_pass methods: */
3769 virtual bool gate (function *);
3770 virtual unsigned int execute (function *)
3771 {
3772 return rest_of_handle_sched2 ();
3773 }
3774
3775 }; // class pass_sched2
3776
3777 bool
3778 pass_sched2::gate (function *)
3779 {
3780 #ifdef INSN_SCHEDULING
3781 return optimize > 0 && flag_schedule_insns_after_reload
3782 && !targetm.delay_sched2 && dbg_cnt (sched2_func);
3783 #else
3784 return 0;
3785 #endif
3786 }
3787
3788 } // anon namespace
3789
3790 rtl_opt_pass *
3791 make_pass_sched2 (gcc::context *ctxt)
3792 {
3793 return new pass_sched2 (ctxt);
3794 }
3795
3796 namespace {
3797
3798 const pass_data pass_data_sched_fusion =
3799 {
3800 RTL_PASS, /* type */
3801 "sched_fusion", /* name */
3802 OPTGROUP_NONE, /* optinfo_flags */
3803 TV_SCHED_FUSION, /* tv_id */
3804 0, /* properties_required */
3805 0, /* properties_provided */
3806 0, /* properties_destroyed */
3807 0, /* todo_flags_start */
3808 TODO_df_finish, /* todo_flags_finish */
3809 };
3810
3811 class pass_sched_fusion : public rtl_opt_pass
3812 {
3813 public:
3814 pass_sched_fusion (gcc::context *ctxt)
3815 : rtl_opt_pass (pass_data_sched_fusion, ctxt)
3816 {}
3817
3818 /* opt_pass methods: */
3819 virtual bool gate (function *);
3820 virtual unsigned int execute (function *)
3821 {
3822 return rest_of_handle_sched_fusion ();
3823 }
3824
3825 }; // class pass_sched2
3826
3827 bool
3828 pass_sched_fusion::gate (function *)
3829 {
3830 #ifdef INSN_SCHEDULING
3831 /* Scheduling fusion relies on peephole2 to do real fusion work,
3832 so only enable it if peephole2 is in effect. */
3833 return (optimize > 0 && flag_peephole2
3834 && flag_schedule_fusion && targetm.sched.fusion_priority != NULL);
3835 #else
3836 return 0;
3837 #endif
3838 }
3839
3840 } // anon namespace
3841
3842 rtl_opt_pass *
3843 make_pass_sched_fusion (gcc::context *ctxt)
3844 {
3845 return new pass_sched_fusion (ctxt);
3846 }