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1 /* Instruction scheduling pass.
2 Copyright (C) 1992-2014 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
4 and currently maintained by, Jim Wilson (wilson@cygnus.com)
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* This pass implements list scheduling within basic blocks. It is
23 run twice: (1) after flow analysis, but before register allocation,
24 and (2) after register allocation.
25
26 The first run performs interblock scheduling, moving insns between
27 different blocks in the same "region", and the second runs only
28 basic block scheduling.
29
30 Interblock motions performed are useful motions and speculative
31 motions, including speculative loads. Motions requiring code
32 duplication are not supported. The identification of motion type
33 and the check for validity of speculative motions requires
34 construction and analysis of the function's control flow graph.
35
36 The main entry point for this pass is schedule_insns(), called for
37 each function. The work of the scheduler is organized in three
38 levels: (1) function level: insns are subject to splitting,
39 control-flow-graph is constructed, regions are computed (after
40 reload, each region is of one block), (2) region level: control
41 flow graph attributes required for interblock scheduling are
42 computed (dominators, reachability, etc.), data dependences and
43 priorities are computed, and (3) block level: insns in the block
44 are actually scheduled. */
45 \f
46 #include "config.h"
47 #include "system.h"
48 #include "coretypes.h"
49 #include "tm.h"
50 #include "diagnostic-core.h"
51 #include "rtl.h"
52 #include "tm_p.h"
53 #include "hard-reg-set.h"
54 #include "regs.h"
55 #include "function.h"
56 #include "flags.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "except.h"
60 #include "recog.h"
61 #include "params.h"
62 #include "sched-int.h"
63 #include "sel-sched.h"
64 #include "target.h"
65 #include "tree-pass.h"
66 #include "dbgcnt.h"
67
68 #ifdef INSN_SCHEDULING
69
70 /* Some accessor macros for h_i_d members only used within this file. */
71 #define FED_BY_SPEC_LOAD(INSN) (HID (INSN)->fed_by_spec_load)
72 #define IS_LOAD_INSN(INSN) (HID (insn)->is_load_insn)
73
74 /* nr_inter/spec counts interblock/speculative motion for the function. */
75 static int nr_inter, nr_spec;
76
77 static int is_cfg_nonregular (void);
78
79 /* Number of regions in the procedure. */
80 int nr_regions = 0;
81
82 /* Same as above before adding any new regions. */
83 static int nr_regions_initial = 0;
84
85 /* Table of region descriptions. */
86 region *rgn_table = NULL;
87
88 /* Array of lists of regions' blocks. */
89 int *rgn_bb_table = NULL;
90
91 /* Topological order of blocks in the region (if b2 is reachable from
92 b1, block_to_bb[b2] > block_to_bb[b1]). Note: A basic block is
93 always referred to by either block or b, while its topological
94 order name (in the region) is referred to by bb. */
95 int *block_to_bb = NULL;
96
97 /* The number of the region containing a block. */
98 int *containing_rgn = NULL;
99
100 /* ebb_head [i] - is index in rgn_bb_table of the head basic block of i'th ebb.
101 Currently we can get a ebb only through splitting of currently
102 scheduling block, therefore, we don't need ebb_head array for every region,
103 hence, its sufficient to hold it for current one only. */
104 int *ebb_head = NULL;
105
106 /* The minimum probability of reaching a source block so that it will be
107 considered for speculative scheduling. */
108 static int min_spec_prob;
109
110 static void find_single_block_region (bool);
111 static void find_rgns (void);
112 static bool too_large (int, int *, int *);
113
114 /* Blocks of the current region being scheduled. */
115 int current_nr_blocks;
116 int current_blocks;
117
118 /* A speculative motion requires checking live information on the path
119 from 'source' to 'target'. The split blocks are those to be checked.
120 After a speculative motion, live information should be modified in
121 the 'update' blocks.
122
123 Lists of split and update blocks for each candidate of the current
124 target are in array bblst_table. */
125 static basic_block *bblst_table;
126 static int bblst_size, bblst_last;
127
128 /* Arrays that hold the DFA state at the end of a basic block, to re-use
129 as the initial state at the start of successor blocks. The BB_STATE
130 array holds the actual DFA state, and BB_STATE_ARRAY[I] is a pointer
131 into BB_STATE for basic block I. FIXME: This should be a vec. */
132 static char *bb_state_array = NULL;
133 static state_t *bb_state = NULL;
134
135 /* Target info declarations.
136
137 The block currently being scheduled is referred to as the "target" block,
138 while other blocks in the region from which insns can be moved to the
139 target are called "source" blocks. The candidate structure holds info
140 about such sources: are they valid? Speculative? Etc. */
141 typedef struct
142 {
143 basic_block *first_member;
144 int nr_members;
145 }
146 bblst;
147
148 typedef struct
149 {
150 char is_valid;
151 char is_speculative;
152 int src_prob;
153 bblst split_bbs;
154 bblst update_bbs;
155 }
156 candidate;
157
158 static candidate *candidate_table;
159 #define IS_VALID(src) (candidate_table[src].is_valid)
160 #define IS_SPECULATIVE(src) (candidate_table[src].is_speculative)
161 #define IS_SPECULATIVE_INSN(INSN) \
162 (IS_SPECULATIVE (BLOCK_TO_BB (BLOCK_NUM (INSN))))
163 #define SRC_PROB(src) ( candidate_table[src].src_prob )
164
165 /* The bb being currently scheduled. */
166 int target_bb;
167
168 /* List of edges. */
169 typedef struct
170 {
171 edge *first_member;
172 int nr_members;
173 }
174 edgelst;
175
176 static edge *edgelst_table;
177 static int edgelst_last;
178
179 static void extract_edgelst (sbitmap, edgelst *);
180
181 /* Target info functions. */
182 static void split_edges (int, int, edgelst *);
183 static void compute_trg_info (int);
184 void debug_candidate (int);
185 void debug_candidates (int);
186
187 /* Dominators array: dom[i] contains the sbitmap of dominators of
188 bb i in the region. */
189 static sbitmap *dom;
190
191 /* bb 0 is the only region entry. */
192 #define IS_RGN_ENTRY(bb) (!bb)
193
194 /* Is bb_src dominated by bb_trg. */
195 #define IS_DOMINATED(bb_src, bb_trg) \
196 ( bitmap_bit_p (dom[bb_src], bb_trg) )
197
198 /* Probability: Prob[i] is an int in [0, REG_BR_PROB_BASE] which is
199 the probability of bb i relative to the region entry. */
200 static int *prob;
201
202 /* Bit-set of edges, where bit i stands for edge i. */
203 typedef sbitmap edgeset;
204
205 /* Number of edges in the region. */
206 static int rgn_nr_edges;
207
208 /* Array of size rgn_nr_edges. */
209 static edge *rgn_edges;
210
211 /* Mapping from each edge in the graph to its number in the rgn. */
212 #define EDGE_TO_BIT(edge) ((int)(size_t)(edge)->aux)
213 #define SET_EDGE_TO_BIT(edge,nr) ((edge)->aux = (void *)(size_t)(nr))
214
215 /* The split edges of a source bb is different for each target
216 bb. In order to compute this efficiently, the 'potential-split edges'
217 are computed for each bb prior to scheduling a region. This is actually
218 the split edges of each bb relative to the region entry.
219
220 pot_split[bb] is the set of potential split edges of bb. */
221 static edgeset *pot_split;
222
223 /* For every bb, a set of its ancestor edges. */
224 static edgeset *ancestor_edges;
225
226 #define INSN_PROBABILITY(INSN) (SRC_PROB (BLOCK_TO_BB (BLOCK_NUM (INSN))))
227
228 /* Speculative scheduling functions. */
229 static int check_live_1 (int, rtx);
230 static void update_live_1 (int, rtx);
231 static int is_pfree (rtx, int, int);
232 static int find_conditional_protection (rtx, int);
233 static int is_conditionally_protected (rtx, int, int);
234 static int is_prisky (rtx, int, int);
235 static int is_exception_free (rtx, int, int);
236
237 static bool sets_likely_spilled (rtx);
238 static void sets_likely_spilled_1 (rtx, const_rtx, void *);
239 static void add_branch_dependences (rtx_insn *, rtx_insn *);
240 static void compute_block_dependences (int);
241
242 static void schedule_region (int);
243 static void concat_insn_mem_list (rtx_insn_list *, rtx_expr_list *,
244 rtx_insn_list **, rtx_expr_list **);
245 static void propagate_deps (int, struct deps_desc *);
246 static void free_pending_lists (void);
247
248 /* Functions for construction of the control flow graph. */
249
250 /* Return 1 if control flow graph should not be constructed, 0 otherwise.
251
252 We decide not to build the control flow graph if there is possibly more
253 than one entry to the function, if computed branches exist, if we
254 have nonlocal gotos, or if we have an unreachable loop. */
255
256 static int
257 is_cfg_nonregular (void)
258 {
259 basic_block b;
260 rtx_insn *insn;
261
262 /* If we have a label that could be the target of a nonlocal goto, then
263 the cfg is not well structured. */
264 if (nonlocal_goto_handler_labels)
265 return 1;
266
267 /* If we have any forced labels, then the cfg is not well structured. */
268 if (forced_labels)
269 return 1;
270
271 /* If we have exception handlers, then we consider the cfg not well
272 structured. ?!? We should be able to handle this now that we
273 compute an accurate cfg for EH. */
274 if (current_function_has_exception_handlers ())
275 return 1;
276
277 /* If we have insns which refer to labels as non-jumped-to operands,
278 then we consider the cfg not well structured. */
279 FOR_EACH_BB_FN (b, cfun)
280 FOR_BB_INSNS (b, insn)
281 {
282 rtx note, set, dest;
283 rtx_insn *next;
284
285 /* If this function has a computed jump, then we consider the cfg
286 not well structured. */
287 if (JUMP_P (insn) && computed_jump_p (insn))
288 return 1;
289
290 if (!INSN_P (insn))
291 continue;
292
293 note = find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX);
294 if (note == NULL_RTX)
295 continue;
296
297 /* For that label not to be seen as a referred-to label, this
298 must be a single-set which is feeding a jump *only*. This
299 could be a conditional jump with the label split off for
300 machine-specific reasons or a casesi/tablejump. */
301 next = next_nonnote_insn (insn);
302 if (next == NULL_RTX
303 || !JUMP_P (next)
304 || (JUMP_LABEL (next) != XEXP (note, 0)
305 && find_reg_note (next, REG_LABEL_TARGET,
306 XEXP (note, 0)) == NULL_RTX)
307 || BLOCK_FOR_INSN (insn) != BLOCK_FOR_INSN (next))
308 return 1;
309
310 set = single_set (insn);
311 if (set == NULL_RTX)
312 return 1;
313
314 dest = SET_DEST (set);
315 if (!REG_P (dest) || !dead_or_set_p (next, dest))
316 return 1;
317 }
318
319 /* Unreachable loops with more than one basic block are detected
320 during the DFS traversal in find_rgns.
321
322 Unreachable loops with a single block are detected here. This
323 test is redundant with the one in find_rgns, but it's much
324 cheaper to go ahead and catch the trivial case here. */
325 FOR_EACH_BB_FN (b, cfun)
326 {
327 if (EDGE_COUNT (b->preds) == 0
328 || (single_pred_p (b)
329 && single_pred (b) == b))
330 return 1;
331 }
332
333 /* All the tests passed. Consider the cfg well structured. */
334 return 0;
335 }
336
337 /* Extract list of edges from a bitmap containing EDGE_TO_BIT bits. */
338
339 static void
340 extract_edgelst (sbitmap set, edgelst *el)
341 {
342 unsigned int i = 0;
343 sbitmap_iterator sbi;
344
345 /* edgelst table space is reused in each call to extract_edgelst. */
346 edgelst_last = 0;
347
348 el->first_member = &edgelst_table[edgelst_last];
349 el->nr_members = 0;
350
351 /* Iterate over each word in the bitset. */
352 EXECUTE_IF_SET_IN_BITMAP (set, 0, i, sbi)
353 {
354 edgelst_table[edgelst_last++] = rgn_edges[i];
355 el->nr_members++;
356 }
357 }
358
359 /* Functions for the construction of regions. */
360
361 /* Print the regions, for debugging purposes. Callable from debugger. */
362
363 DEBUG_FUNCTION void
364 debug_regions (void)
365 {
366 int rgn, bb;
367
368 fprintf (sched_dump, "\n;; ------------ REGIONS ----------\n\n");
369 for (rgn = 0; rgn < nr_regions; rgn++)
370 {
371 fprintf (sched_dump, ";;\trgn %d nr_blocks %d:\n", rgn,
372 rgn_table[rgn].rgn_nr_blocks);
373 fprintf (sched_dump, ";;\tbb/block: ");
374
375 /* We don't have ebb_head initialized yet, so we can't use
376 BB_TO_BLOCK (). */
377 current_blocks = RGN_BLOCKS (rgn);
378
379 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
380 fprintf (sched_dump, " %d/%d ", bb, rgn_bb_table[current_blocks + bb]);
381
382 fprintf (sched_dump, "\n\n");
383 }
384 }
385
386 /* Print the region's basic blocks. */
387
388 DEBUG_FUNCTION void
389 debug_region (int rgn)
390 {
391 int bb;
392
393 fprintf (stderr, "\n;; ------------ REGION %d ----------\n\n", rgn);
394 fprintf (stderr, ";;\trgn %d nr_blocks %d:\n", rgn,
395 rgn_table[rgn].rgn_nr_blocks);
396 fprintf (stderr, ";;\tbb/block: ");
397
398 /* We don't have ebb_head initialized yet, so we can't use
399 BB_TO_BLOCK (). */
400 current_blocks = RGN_BLOCKS (rgn);
401
402 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
403 fprintf (stderr, " %d/%d ", bb, rgn_bb_table[current_blocks + bb]);
404
405 fprintf (stderr, "\n\n");
406
407 for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++)
408 {
409 dump_bb (stderr,
410 BASIC_BLOCK_FOR_FN (cfun, rgn_bb_table[current_blocks + bb]),
411 0, TDF_SLIM | TDF_BLOCKS);
412 fprintf (stderr, "\n");
413 }
414
415 fprintf (stderr, "\n");
416
417 }
418
419 /* True when a bb with index BB_INDEX contained in region RGN. */
420 static bool
421 bb_in_region_p (int bb_index, int rgn)
422 {
423 int i;
424
425 for (i = 0; i < rgn_table[rgn].rgn_nr_blocks; i++)
426 if (rgn_bb_table[current_blocks + i] == bb_index)
427 return true;
428
429 return false;
430 }
431
432 /* Dump region RGN to file F using dot syntax. */
433 void
434 dump_region_dot (FILE *f, int rgn)
435 {
436 int i;
437
438 fprintf (f, "digraph Region_%d {\n", rgn);
439
440 /* We don't have ebb_head initialized yet, so we can't use
441 BB_TO_BLOCK (). */
442 current_blocks = RGN_BLOCKS (rgn);
443
444 for (i = 0; i < rgn_table[rgn].rgn_nr_blocks; i++)
445 {
446 edge e;
447 edge_iterator ei;
448 int src_bb_num = rgn_bb_table[current_blocks + i];
449 basic_block bb = BASIC_BLOCK_FOR_FN (cfun, src_bb_num);
450
451 FOR_EACH_EDGE (e, ei, bb->succs)
452 if (bb_in_region_p (e->dest->index, rgn))
453 fprintf (f, "\t%d -> %d\n", src_bb_num, e->dest->index);
454 }
455 fprintf (f, "}\n");
456 }
457
458 /* The same, but first open a file specified by FNAME. */
459 void
460 dump_region_dot_file (const char *fname, int rgn)
461 {
462 FILE *f = fopen (fname, "wt");
463 dump_region_dot (f, rgn);
464 fclose (f);
465 }
466
467 /* Build a single block region for each basic block in the function.
468 This allows for using the same code for interblock and basic block
469 scheduling. */
470
471 static void
472 find_single_block_region (bool ebbs_p)
473 {
474 basic_block bb, ebb_start;
475 int i = 0;
476
477 nr_regions = 0;
478
479 if (ebbs_p) {
480 int probability_cutoff;
481 if (profile_info && flag_branch_probabilities)
482 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY_FEEDBACK);
483 else
484 probability_cutoff = PARAM_VALUE (TRACER_MIN_BRANCH_PROBABILITY);
485 probability_cutoff = REG_BR_PROB_BASE / 100 * probability_cutoff;
486
487 FOR_EACH_BB_FN (ebb_start, cfun)
488 {
489 RGN_NR_BLOCKS (nr_regions) = 0;
490 RGN_BLOCKS (nr_regions) = i;
491 RGN_DONT_CALC_DEPS (nr_regions) = 0;
492 RGN_HAS_REAL_EBB (nr_regions) = 0;
493
494 for (bb = ebb_start; ; bb = bb->next_bb)
495 {
496 edge e;
497
498 rgn_bb_table[i] = bb->index;
499 RGN_NR_BLOCKS (nr_regions)++;
500 CONTAINING_RGN (bb->index) = nr_regions;
501 BLOCK_TO_BB (bb->index) = i - RGN_BLOCKS (nr_regions);
502 i++;
503
504 if (bb->next_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)
505 || LABEL_P (BB_HEAD (bb->next_bb)))
506 break;
507
508 e = find_fallthru_edge (bb->succs);
509 if (! e)
510 break;
511 if (e->probability <= probability_cutoff)
512 break;
513 }
514
515 ebb_start = bb;
516 nr_regions++;
517 }
518 }
519 else
520 FOR_EACH_BB_FN (bb, cfun)
521 {
522 rgn_bb_table[nr_regions] = bb->index;
523 RGN_NR_BLOCKS (nr_regions) = 1;
524 RGN_BLOCKS (nr_regions) = nr_regions;
525 RGN_DONT_CALC_DEPS (nr_regions) = 0;
526 RGN_HAS_REAL_EBB (nr_regions) = 0;
527
528 CONTAINING_RGN (bb->index) = nr_regions;
529 BLOCK_TO_BB (bb->index) = 0;
530 nr_regions++;
531 }
532 }
533
534 /* Estimate number of the insns in the BB. */
535 static int
536 rgn_estimate_number_of_insns (basic_block bb)
537 {
538 int count;
539
540 count = INSN_LUID (BB_END (bb)) - INSN_LUID (BB_HEAD (bb));
541
542 if (MAY_HAVE_DEBUG_INSNS)
543 {
544 rtx_insn *insn;
545
546 FOR_BB_INSNS (bb, insn)
547 if (DEBUG_INSN_P (insn))
548 count--;
549 }
550
551 return count;
552 }
553
554 /* Update number of blocks and the estimate for number of insns
555 in the region. Return true if the region is "too large" for interblock
556 scheduling (compile time considerations). */
557
558 static bool
559 too_large (int block, int *num_bbs, int *num_insns)
560 {
561 (*num_bbs)++;
562 (*num_insns) += (common_sched_info->estimate_number_of_insns
563 (BASIC_BLOCK_FOR_FN (cfun, block)));
564
565 return ((*num_bbs > PARAM_VALUE (PARAM_MAX_SCHED_REGION_BLOCKS))
566 || (*num_insns > PARAM_VALUE (PARAM_MAX_SCHED_REGION_INSNS)));
567 }
568
569 /* Update_loop_relations(blk, hdr): Check if the loop headed by max_hdr[blk]
570 is still an inner loop. Put in max_hdr[blk] the header of the most inner
571 loop containing blk. */
572 #define UPDATE_LOOP_RELATIONS(blk, hdr) \
573 { \
574 if (max_hdr[blk] == -1) \
575 max_hdr[blk] = hdr; \
576 else if (dfs_nr[max_hdr[blk]] > dfs_nr[hdr]) \
577 bitmap_clear_bit (inner, hdr); \
578 else if (dfs_nr[max_hdr[blk]] < dfs_nr[hdr]) \
579 { \
580 bitmap_clear_bit (inner,max_hdr[blk]); \
581 max_hdr[blk] = hdr; \
582 } \
583 }
584
585 /* Find regions for interblock scheduling.
586
587 A region for scheduling can be:
588
589 * A loop-free procedure, or
590
591 * A reducible inner loop, or
592
593 * A basic block not contained in any other region.
594
595 ?!? In theory we could build other regions based on extended basic
596 blocks or reverse extended basic blocks. Is it worth the trouble?
597
598 Loop blocks that form a region are put into the region's block list
599 in topological order.
600
601 This procedure stores its results into the following global (ick) variables
602
603 * rgn_nr
604 * rgn_table
605 * rgn_bb_table
606 * block_to_bb
607 * containing region
608
609 We use dominator relationships to avoid making regions out of non-reducible
610 loops.
611
612 This procedure needs to be converted to work on pred/succ lists instead
613 of edge tables. That would simplify it somewhat. */
614
615 static void
616 haifa_find_rgns (void)
617 {
618 int *max_hdr, *dfs_nr, *degree;
619 char no_loops = 1;
620 int node, child, loop_head, i, head, tail;
621 int count = 0, sp, idx = 0;
622 edge_iterator current_edge;
623 edge_iterator *stack;
624 int num_bbs, num_insns, unreachable;
625 int too_large_failure;
626 basic_block bb;
627
628 /* Note if a block is a natural loop header. */
629 sbitmap header;
630
631 /* Note if a block is a natural inner loop header. */
632 sbitmap inner;
633
634 /* Note if a block is in the block queue. */
635 sbitmap in_queue;
636
637 /* Note if a block is in the block queue. */
638 sbitmap in_stack;
639
640 /* Perform a DFS traversal of the cfg. Identify loop headers, inner loops
641 and a mapping from block to its loop header (if the block is contained
642 in a loop, else -1).
643
644 Store results in HEADER, INNER, and MAX_HDR respectively, these will
645 be used as inputs to the second traversal.
646
647 STACK, SP and DFS_NR are only used during the first traversal. */
648
649 /* Allocate and initialize variables for the first traversal. */
650 max_hdr = XNEWVEC (int, last_basic_block_for_fn (cfun));
651 dfs_nr = XCNEWVEC (int, last_basic_block_for_fn (cfun));
652 stack = XNEWVEC (edge_iterator, n_edges_for_fn (cfun));
653
654 inner = sbitmap_alloc (last_basic_block_for_fn (cfun));
655 bitmap_ones (inner);
656
657 header = sbitmap_alloc (last_basic_block_for_fn (cfun));
658 bitmap_clear (header);
659
660 in_queue = sbitmap_alloc (last_basic_block_for_fn (cfun));
661 bitmap_clear (in_queue);
662
663 in_stack = sbitmap_alloc (last_basic_block_for_fn (cfun));
664 bitmap_clear (in_stack);
665
666 for (i = 0; i < last_basic_block_for_fn (cfun); i++)
667 max_hdr[i] = -1;
668
669 #define EDGE_PASSED(E) (ei_end_p ((E)) || ei_edge ((E))->aux)
670 #define SET_EDGE_PASSED(E) (ei_edge ((E))->aux = ei_edge ((E)))
671
672 /* DFS traversal to find inner loops in the cfg. */
673
674 current_edge = ei_start (single_succ (ENTRY_BLOCK_PTR_FOR_FN (cfun))->succs);
675 sp = -1;
676
677 while (1)
678 {
679 if (EDGE_PASSED (current_edge))
680 {
681 /* We have reached a leaf node or a node that was already
682 processed. Pop edges off the stack until we find
683 an edge that has not yet been processed. */
684 while (sp >= 0 && EDGE_PASSED (current_edge))
685 {
686 /* Pop entry off the stack. */
687 current_edge = stack[sp--];
688 node = ei_edge (current_edge)->src->index;
689 gcc_assert (node != ENTRY_BLOCK);
690 child = ei_edge (current_edge)->dest->index;
691 gcc_assert (child != EXIT_BLOCK);
692 bitmap_clear_bit (in_stack, child);
693 if (max_hdr[child] >= 0 && bitmap_bit_p (in_stack, max_hdr[child]))
694 UPDATE_LOOP_RELATIONS (node, max_hdr[child]);
695 ei_next (&current_edge);
696 }
697
698 /* See if have finished the DFS tree traversal. */
699 if (sp < 0 && EDGE_PASSED (current_edge))
700 break;
701
702 /* Nope, continue the traversal with the popped node. */
703 continue;
704 }
705
706 /* Process a node. */
707 node = ei_edge (current_edge)->src->index;
708 gcc_assert (node != ENTRY_BLOCK);
709 bitmap_set_bit (in_stack, node);
710 dfs_nr[node] = ++count;
711
712 /* We don't traverse to the exit block. */
713 child = ei_edge (current_edge)->dest->index;
714 if (child == EXIT_BLOCK)
715 {
716 SET_EDGE_PASSED (current_edge);
717 ei_next (&current_edge);
718 continue;
719 }
720
721 /* If the successor is in the stack, then we've found a loop.
722 Mark the loop, if it is not a natural loop, then it will
723 be rejected during the second traversal. */
724 if (bitmap_bit_p (in_stack, child))
725 {
726 no_loops = 0;
727 bitmap_set_bit (header, child);
728 UPDATE_LOOP_RELATIONS (node, child);
729 SET_EDGE_PASSED (current_edge);
730 ei_next (&current_edge);
731 continue;
732 }
733
734 /* If the child was already visited, then there is no need to visit
735 it again. Just update the loop relationships and restart
736 with a new edge. */
737 if (dfs_nr[child])
738 {
739 if (max_hdr[child] >= 0 && bitmap_bit_p (in_stack, max_hdr[child]))
740 UPDATE_LOOP_RELATIONS (node, max_hdr[child]);
741 SET_EDGE_PASSED (current_edge);
742 ei_next (&current_edge);
743 continue;
744 }
745
746 /* Push an entry on the stack and continue DFS traversal. */
747 stack[++sp] = current_edge;
748 SET_EDGE_PASSED (current_edge);
749 current_edge = ei_start (ei_edge (current_edge)->dest->succs);
750 }
751
752 /* Reset ->aux field used by EDGE_PASSED. */
753 FOR_ALL_BB_FN (bb, cfun)
754 {
755 edge_iterator ei;
756 edge e;
757 FOR_EACH_EDGE (e, ei, bb->succs)
758 e->aux = NULL;
759 }
760
761
762 /* Another check for unreachable blocks. The earlier test in
763 is_cfg_nonregular only finds unreachable blocks that do not
764 form a loop.
765
766 The DFS traversal will mark every block that is reachable from
767 the entry node by placing a nonzero value in dfs_nr. Thus if
768 dfs_nr is zero for any block, then it must be unreachable. */
769 unreachable = 0;
770 FOR_EACH_BB_FN (bb, cfun)
771 if (dfs_nr[bb->index] == 0)
772 {
773 unreachable = 1;
774 break;
775 }
776
777 /* Gross. To avoid wasting memory, the second pass uses the dfs_nr array
778 to hold degree counts. */
779 degree = dfs_nr;
780
781 FOR_EACH_BB_FN (bb, cfun)
782 degree[bb->index] = EDGE_COUNT (bb->preds);
783
784 /* Do not perform region scheduling if there are any unreachable
785 blocks. */
786 if (!unreachable)
787 {
788 int *queue, *degree1 = NULL;
789 /* We use EXTENDED_RGN_HEADER as an addition to HEADER and put
790 there basic blocks, which are forced to be region heads.
791 This is done to try to assemble few smaller regions
792 from a too_large region. */
793 sbitmap extended_rgn_header = NULL;
794 bool extend_regions_p;
795
796 if (no_loops)
797 bitmap_set_bit (header, 0);
798
799 /* Second traversal:find reducible inner loops and topologically sort
800 block of each region. */
801
802 queue = XNEWVEC (int, n_basic_blocks_for_fn (cfun));
803
804 extend_regions_p = PARAM_VALUE (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS) > 0;
805 if (extend_regions_p)
806 {
807 degree1 = XNEWVEC (int, last_basic_block_for_fn (cfun));
808 extended_rgn_header =
809 sbitmap_alloc (last_basic_block_for_fn (cfun));
810 bitmap_clear (extended_rgn_header);
811 }
812
813 /* Find blocks which are inner loop headers. We still have non-reducible
814 loops to consider at this point. */
815 FOR_EACH_BB_FN (bb, cfun)
816 {
817 if (bitmap_bit_p (header, bb->index) && bitmap_bit_p (inner, bb->index))
818 {
819 edge e;
820 edge_iterator ei;
821 basic_block jbb;
822
823 /* Now check that the loop is reducible. We do this separate
824 from finding inner loops so that we do not find a reducible
825 loop which contains an inner non-reducible loop.
826
827 A simple way to find reducible/natural loops is to verify
828 that each block in the loop is dominated by the loop
829 header.
830
831 If there exists a block that is not dominated by the loop
832 header, then the block is reachable from outside the loop
833 and thus the loop is not a natural loop. */
834 FOR_EACH_BB_FN (jbb, cfun)
835 {
836 /* First identify blocks in the loop, except for the loop
837 entry block. */
838 if (bb->index == max_hdr[jbb->index] && bb != jbb)
839 {
840 /* Now verify that the block is dominated by the loop
841 header. */
842 if (!dominated_by_p (CDI_DOMINATORS, jbb, bb))
843 break;
844 }
845 }
846
847 /* If we exited the loop early, then I is the header of
848 a non-reducible loop and we should quit processing it
849 now. */
850 if (jbb != EXIT_BLOCK_PTR_FOR_FN (cfun))
851 continue;
852
853 /* I is a header of an inner loop, or block 0 in a subroutine
854 with no loops at all. */
855 head = tail = -1;
856 too_large_failure = 0;
857 loop_head = max_hdr[bb->index];
858
859 if (extend_regions_p)
860 /* We save degree in case when we meet a too_large region
861 and cancel it. We need a correct degree later when
862 calling extend_rgns. */
863 memcpy (degree1, degree,
864 last_basic_block_for_fn (cfun) * sizeof (int));
865
866 /* Decrease degree of all I's successors for topological
867 ordering. */
868 FOR_EACH_EDGE (e, ei, bb->succs)
869 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
870 --degree[e->dest->index];
871
872 /* Estimate # insns, and count # blocks in the region. */
873 num_bbs = 1;
874 num_insns = common_sched_info->estimate_number_of_insns (bb);
875
876 /* Find all loop latches (blocks with back edges to the loop
877 header) or all the leaf blocks in the cfg has no loops.
878
879 Place those blocks into the queue. */
880 if (no_loops)
881 {
882 FOR_EACH_BB_FN (jbb, cfun)
883 /* Leaf nodes have only a single successor which must
884 be EXIT_BLOCK. */
885 if (single_succ_p (jbb)
886 && single_succ (jbb) == EXIT_BLOCK_PTR_FOR_FN (cfun))
887 {
888 queue[++tail] = jbb->index;
889 bitmap_set_bit (in_queue, jbb->index);
890
891 if (too_large (jbb->index, &num_bbs, &num_insns))
892 {
893 too_large_failure = 1;
894 break;
895 }
896 }
897 }
898 else
899 {
900 edge e;
901
902 FOR_EACH_EDGE (e, ei, bb->preds)
903 {
904 if (e->src == ENTRY_BLOCK_PTR_FOR_FN (cfun))
905 continue;
906
907 node = e->src->index;
908
909 if (max_hdr[node] == loop_head && node != bb->index)
910 {
911 /* This is a loop latch. */
912 queue[++tail] = node;
913 bitmap_set_bit (in_queue, node);
914
915 if (too_large (node, &num_bbs, &num_insns))
916 {
917 too_large_failure = 1;
918 break;
919 }
920 }
921 }
922 }
923
924 /* Now add all the blocks in the loop to the queue.
925
926 We know the loop is a natural loop; however the algorithm
927 above will not always mark certain blocks as being in the
928 loop. Consider:
929 node children
930 a b,c
931 b c
932 c a,d
933 d b
934
935 The algorithm in the DFS traversal may not mark B & D as part
936 of the loop (i.e. they will not have max_hdr set to A).
937
938 We know they can not be loop latches (else they would have
939 had max_hdr set since they'd have a backedge to a dominator
940 block). So we don't need them on the initial queue.
941
942 We know they are part of the loop because they are dominated
943 by the loop header and can be reached by a backwards walk of
944 the edges starting with nodes on the initial queue.
945
946 It is safe and desirable to include those nodes in the
947 loop/scheduling region. To do so we would need to decrease
948 the degree of a node if it is the target of a backedge
949 within the loop itself as the node is placed in the queue.
950
951 We do not do this because I'm not sure that the actual
952 scheduling code will properly handle this case. ?!? */
953
954 while (head < tail && !too_large_failure)
955 {
956 edge e;
957 child = queue[++head];
958
959 FOR_EACH_EDGE (e, ei,
960 BASIC_BLOCK_FOR_FN (cfun, child)->preds)
961 {
962 node = e->src->index;
963
964 /* See discussion above about nodes not marked as in
965 this loop during the initial DFS traversal. */
966 if (e->src == ENTRY_BLOCK_PTR_FOR_FN (cfun)
967 || max_hdr[node] != loop_head)
968 {
969 tail = -1;
970 break;
971 }
972 else if (!bitmap_bit_p (in_queue, node) && node != bb->index)
973 {
974 queue[++tail] = node;
975 bitmap_set_bit (in_queue, node);
976
977 if (too_large (node, &num_bbs, &num_insns))
978 {
979 too_large_failure = 1;
980 break;
981 }
982 }
983 }
984 }
985
986 if (tail >= 0 && !too_large_failure)
987 {
988 /* Place the loop header into list of region blocks. */
989 degree[bb->index] = -1;
990 rgn_bb_table[idx] = bb->index;
991 RGN_NR_BLOCKS (nr_regions) = num_bbs;
992 RGN_BLOCKS (nr_regions) = idx++;
993 RGN_DONT_CALC_DEPS (nr_regions) = 0;
994 RGN_HAS_REAL_EBB (nr_regions) = 0;
995 CONTAINING_RGN (bb->index) = nr_regions;
996 BLOCK_TO_BB (bb->index) = count = 0;
997
998 /* Remove blocks from queue[] when their in degree
999 becomes zero. Repeat until no blocks are left on the
1000 list. This produces a topological list of blocks in
1001 the region. */
1002 while (tail >= 0)
1003 {
1004 if (head < 0)
1005 head = tail;
1006 child = queue[head];
1007 if (degree[child] == 0)
1008 {
1009 edge e;
1010
1011 degree[child] = -1;
1012 rgn_bb_table[idx++] = child;
1013 BLOCK_TO_BB (child) = ++count;
1014 CONTAINING_RGN (child) = nr_regions;
1015 queue[head] = queue[tail--];
1016
1017 FOR_EACH_EDGE (e, ei,
1018 BASIC_BLOCK_FOR_FN (cfun,
1019 child)->succs)
1020 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1021 --degree[e->dest->index];
1022 }
1023 else
1024 --head;
1025 }
1026 ++nr_regions;
1027 }
1028 else if (extend_regions_p)
1029 {
1030 /* Restore DEGREE. */
1031 int *t = degree;
1032
1033 degree = degree1;
1034 degree1 = t;
1035
1036 /* And force successors of BB to be region heads.
1037 This may provide several smaller regions instead
1038 of one too_large region. */
1039 FOR_EACH_EDGE (e, ei, bb->succs)
1040 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1041 bitmap_set_bit (extended_rgn_header, e->dest->index);
1042 }
1043 }
1044 }
1045 free (queue);
1046
1047 if (extend_regions_p)
1048 {
1049 free (degree1);
1050
1051 bitmap_ior (header, header, extended_rgn_header);
1052 sbitmap_free (extended_rgn_header);
1053
1054 extend_rgns (degree, &idx, header, max_hdr);
1055 }
1056 }
1057
1058 /* Any block that did not end up in a region is placed into a region
1059 by itself. */
1060 FOR_EACH_BB_FN (bb, cfun)
1061 if (degree[bb->index] >= 0)
1062 {
1063 rgn_bb_table[idx] = bb->index;
1064 RGN_NR_BLOCKS (nr_regions) = 1;
1065 RGN_BLOCKS (nr_regions) = idx++;
1066 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1067 RGN_HAS_REAL_EBB (nr_regions) = 0;
1068 CONTAINING_RGN (bb->index) = nr_regions++;
1069 BLOCK_TO_BB (bb->index) = 0;
1070 }
1071
1072 free (max_hdr);
1073 free (degree);
1074 free (stack);
1075 sbitmap_free (header);
1076 sbitmap_free (inner);
1077 sbitmap_free (in_queue);
1078 sbitmap_free (in_stack);
1079 }
1080
1081
1082 /* Wrapper function.
1083 If FLAG_SEL_SCHED_PIPELINING is set, then use custom function to form
1084 regions. Otherwise just call find_rgns_haifa. */
1085 static void
1086 find_rgns (void)
1087 {
1088 if (sel_sched_p () && flag_sel_sched_pipelining)
1089 sel_find_rgns ();
1090 else
1091 haifa_find_rgns ();
1092 }
1093
1094 static int gather_region_statistics (int **);
1095 static void print_region_statistics (int *, int, int *, int);
1096
1097 /* Calculate the histogram that shows the number of regions having the
1098 given number of basic blocks, and store it in the RSP array. Return
1099 the size of this array. */
1100 static int
1101 gather_region_statistics (int **rsp)
1102 {
1103 int i, *a = 0, a_sz = 0;
1104
1105 /* a[i] is the number of regions that have (i + 1) basic blocks. */
1106 for (i = 0; i < nr_regions; i++)
1107 {
1108 int nr_blocks = RGN_NR_BLOCKS (i);
1109
1110 gcc_assert (nr_blocks >= 1);
1111
1112 if (nr_blocks > a_sz)
1113 {
1114 a = XRESIZEVEC (int, a, nr_blocks);
1115 do
1116 a[a_sz++] = 0;
1117 while (a_sz != nr_blocks);
1118 }
1119
1120 a[nr_blocks - 1]++;
1121 }
1122
1123 *rsp = a;
1124 return a_sz;
1125 }
1126
1127 /* Print regions statistics. S1 and S2 denote the data before and after
1128 calling extend_rgns, respectively. */
1129 static void
1130 print_region_statistics (int *s1, int s1_sz, int *s2, int s2_sz)
1131 {
1132 int i;
1133
1134 /* We iterate until s2_sz because extend_rgns does not decrease
1135 the maximal region size. */
1136 for (i = 1; i < s2_sz; i++)
1137 {
1138 int n1, n2;
1139
1140 n2 = s2[i];
1141
1142 if (n2 == 0)
1143 continue;
1144
1145 if (i >= s1_sz)
1146 n1 = 0;
1147 else
1148 n1 = s1[i];
1149
1150 fprintf (sched_dump, ";; Region extension statistics: size %d: " \
1151 "was %d + %d more\n", i + 1, n1, n2 - n1);
1152 }
1153 }
1154
1155 /* Extend regions.
1156 DEGREE - Array of incoming edge count, considering only
1157 the edges, that don't have their sources in formed regions yet.
1158 IDXP - pointer to the next available index in rgn_bb_table.
1159 HEADER - set of all region heads.
1160 LOOP_HDR - mapping from block to the containing loop
1161 (two blocks can reside within one region if they have
1162 the same loop header). */
1163 void
1164 extend_rgns (int *degree, int *idxp, sbitmap header, int *loop_hdr)
1165 {
1166 int *order, i, rescan = 0, idx = *idxp, iter = 0, max_iter, *max_hdr;
1167 int nblocks = n_basic_blocks_for_fn (cfun) - NUM_FIXED_BLOCKS;
1168
1169 max_iter = PARAM_VALUE (PARAM_MAX_SCHED_EXTEND_REGIONS_ITERS);
1170
1171 max_hdr = XNEWVEC (int, last_basic_block_for_fn (cfun));
1172
1173 order = XNEWVEC (int, last_basic_block_for_fn (cfun));
1174 post_order_compute (order, false, false);
1175
1176 for (i = nblocks - 1; i >= 0; i--)
1177 {
1178 int bbn = order[i];
1179 if (degree[bbn] >= 0)
1180 {
1181 max_hdr[bbn] = bbn;
1182 rescan = 1;
1183 }
1184 else
1185 /* This block already was processed in find_rgns. */
1186 max_hdr[bbn] = -1;
1187 }
1188
1189 /* The idea is to topologically walk through CFG in top-down order.
1190 During the traversal, if all the predecessors of a node are
1191 marked to be in the same region (they all have the same max_hdr),
1192 then current node is also marked to be a part of that region.
1193 Otherwise the node starts its own region.
1194 CFG should be traversed until no further changes are made. On each
1195 iteration the set of the region heads is extended (the set of those
1196 blocks that have max_hdr[bbi] == bbi). This set is upper bounded by the
1197 set of all basic blocks, thus the algorithm is guaranteed to
1198 terminate. */
1199
1200 while (rescan && iter < max_iter)
1201 {
1202 rescan = 0;
1203
1204 for (i = nblocks - 1; i >= 0; i--)
1205 {
1206 edge e;
1207 edge_iterator ei;
1208 int bbn = order[i];
1209
1210 if (max_hdr[bbn] != -1 && !bitmap_bit_p (header, bbn))
1211 {
1212 int hdr = -1;
1213
1214 FOR_EACH_EDGE (e, ei, BASIC_BLOCK_FOR_FN (cfun, bbn)->preds)
1215 {
1216 int predn = e->src->index;
1217
1218 if (predn != ENTRY_BLOCK
1219 /* If pred wasn't processed in find_rgns. */
1220 && max_hdr[predn] != -1
1221 /* And pred and bb reside in the same loop.
1222 (Or out of any loop). */
1223 && loop_hdr[bbn] == loop_hdr[predn])
1224 {
1225 if (hdr == -1)
1226 /* Then bb extends the containing region of pred. */
1227 hdr = max_hdr[predn];
1228 else if (hdr != max_hdr[predn])
1229 /* Too bad, there are at least two predecessors
1230 that reside in different regions. Thus, BB should
1231 begin its own region. */
1232 {
1233 hdr = bbn;
1234 break;
1235 }
1236 }
1237 else
1238 /* BB starts its own region. */
1239 {
1240 hdr = bbn;
1241 break;
1242 }
1243 }
1244
1245 if (hdr == bbn)
1246 {
1247 /* If BB start its own region,
1248 update set of headers with BB. */
1249 bitmap_set_bit (header, bbn);
1250 rescan = 1;
1251 }
1252 else
1253 gcc_assert (hdr != -1);
1254
1255 max_hdr[bbn] = hdr;
1256 }
1257 }
1258
1259 iter++;
1260 }
1261
1262 /* Statistics were gathered on the SPEC2000 package of tests with
1263 mainline weekly snapshot gcc-4.1-20051015 on ia64.
1264
1265 Statistics for SPECint:
1266 1 iteration : 1751 cases (38.7%)
1267 2 iterations: 2770 cases (61.3%)
1268 Blocks wrapped in regions by find_rgns without extension: 18295 blocks
1269 Blocks wrapped in regions by 2 iterations in extend_rgns: 23821 blocks
1270 (We don't count single block regions here).
1271
1272 Statistics for SPECfp:
1273 1 iteration : 621 cases (35.9%)
1274 2 iterations: 1110 cases (64.1%)
1275 Blocks wrapped in regions by find_rgns without extension: 6476 blocks
1276 Blocks wrapped in regions by 2 iterations in extend_rgns: 11155 blocks
1277 (We don't count single block regions here).
1278
1279 By default we do at most 2 iterations.
1280 This can be overridden with max-sched-extend-regions-iters parameter:
1281 0 - disable region extension,
1282 N > 0 - do at most N iterations. */
1283
1284 if (sched_verbose && iter != 0)
1285 fprintf (sched_dump, ";; Region extension iterations: %d%s\n", iter,
1286 rescan ? "... failed" : "");
1287
1288 if (!rescan && iter != 0)
1289 {
1290 int *s1 = NULL, s1_sz = 0;
1291
1292 /* Save the old statistics for later printout. */
1293 if (sched_verbose >= 6)
1294 s1_sz = gather_region_statistics (&s1);
1295
1296 /* We have succeeded. Now assemble the regions. */
1297 for (i = nblocks - 1; i >= 0; i--)
1298 {
1299 int bbn = order[i];
1300
1301 if (max_hdr[bbn] == bbn)
1302 /* BBN is a region head. */
1303 {
1304 edge e;
1305 edge_iterator ei;
1306 int num_bbs = 0, j, num_insns = 0, large;
1307
1308 large = too_large (bbn, &num_bbs, &num_insns);
1309
1310 degree[bbn] = -1;
1311 rgn_bb_table[idx] = bbn;
1312 RGN_BLOCKS (nr_regions) = idx++;
1313 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1314 RGN_HAS_REAL_EBB (nr_regions) = 0;
1315 CONTAINING_RGN (bbn) = nr_regions;
1316 BLOCK_TO_BB (bbn) = 0;
1317
1318 FOR_EACH_EDGE (e, ei, BASIC_BLOCK_FOR_FN (cfun, bbn)->succs)
1319 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1320 degree[e->dest->index]--;
1321
1322 if (!large)
1323 /* Here we check whether the region is too_large. */
1324 for (j = i - 1; j >= 0; j--)
1325 {
1326 int succn = order[j];
1327 if (max_hdr[succn] == bbn)
1328 {
1329 if ((large = too_large (succn, &num_bbs, &num_insns)))
1330 break;
1331 }
1332 }
1333
1334 if (large)
1335 /* If the region is too_large, then wrap every block of
1336 the region into single block region.
1337 Here we wrap region head only. Other blocks are
1338 processed in the below cycle. */
1339 {
1340 RGN_NR_BLOCKS (nr_regions) = 1;
1341 nr_regions++;
1342 }
1343
1344 num_bbs = 1;
1345
1346 for (j = i - 1; j >= 0; j--)
1347 {
1348 int succn = order[j];
1349
1350 if (max_hdr[succn] == bbn)
1351 /* This cycle iterates over all basic blocks, that
1352 are supposed to be in the region with head BBN,
1353 and wraps them into that region (or in single
1354 block region). */
1355 {
1356 gcc_assert (degree[succn] == 0);
1357
1358 degree[succn] = -1;
1359 rgn_bb_table[idx] = succn;
1360 BLOCK_TO_BB (succn) = large ? 0 : num_bbs++;
1361 CONTAINING_RGN (succn) = nr_regions;
1362
1363 if (large)
1364 /* Wrap SUCCN into single block region. */
1365 {
1366 RGN_BLOCKS (nr_regions) = idx;
1367 RGN_NR_BLOCKS (nr_regions) = 1;
1368 RGN_DONT_CALC_DEPS (nr_regions) = 0;
1369 RGN_HAS_REAL_EBB (nr_regions) = 0;
1370 nr_regions++;
1371 }
1372
1373 idx++;
1374
1375 FOR_EACH_EDGE (e, ei,
1376 BASIC_BLOCK_FOR_FN (cfun, succn)->succs)
1377 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun))
1378 degree[e->dest->index]--;
1379 }
1380 }
1381
1382 if (!large)
1383 {
1384 RGN_NR_BLOCKS (nr_regions) = num_bbs;
1385 nr_regions++;
1386 }
1387 }
1388 }
1389
1390 if (sched_verbose >= 6)
1391 {
1392 int *s2, s2_sz;
1393
1394 /* Get the new statistics and print the comparison with the
1395 one before calling this function. */
1396 s2_sz = gather_region_statistics (&s2);
1397 print_region_statistics (s1, s1_sz, s2, s2_sz);
1398 free (s1);
1399 free (s2);
1400 }
1401 }
1402
1403 free (order);
1404 free (max_hdr);
1405
1406 *idxp = idx;
1407 }
1408
1409 /* Functions for regions scheduling information. */
1410
1411 /* Compute dominators, probability, and potential-split-edges of bb.
1412 Assume that these values were already computed for bb's predecessors. */
1413
1414 static void
1415 compute_dom_prob_ps (int bb)
1416 {
1417 edge_iterator in_ei;
1418 edge in_edge;
1419
1420 /* We shouldn't have any real ebbs yet. */
1421 gcc_assert (ebb_head [bb] == bb + current_blocks);
1422
1423 if (IS_RGN_ENTRY (bb))
1424 {
1425 bitmap_set_bit (dom[bb], 0);
1426 prob[bb] = REG_BR_PROB_BASE;
1427 return;
1428 }
1429
1430 prob[bb] = 0;
1431
1432 /* Initialize dom[bb] to '111..1'. */
1433 bitmap_ones (dom[bb]);
1434
1435 FOR_EACH_EDGE (in_edge, in_ei,
1436 BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (bb))->preds)
1437 {
1438 int pred_bb;
1439 edge out_edge;
1440 edge_iterator out_ei;
1441
1442 if (in_edge->src == ENTRY_BLOCK_PTR_FOR_FN (cfun))
1443 continue;
1444
1445 pred_bb = BLOCK_TO_BB (in_edge->src->index);
1446 bitmap_and (dom[bb], dom[bb], dom[pred_bb]);
1447 bitmap_ior (ancestor_edges[bb],
1448 ancestor_edges[bb], ancestor_edges[pred_bb]);
1449
1450 bitmap_set_bit (ancestor_edges[bb], EDGE_TO_BIT (in_edge));
1451
1452 bitmap_ior (pot_split[bb], pot_split[bb], pot_split[pred_bb]);
1453
1454 FOR_EACH_EDGE (out_edge, out_ei, in_edge->src->succs)
1455 bitmap_set_bit (pot_split[bb], EDGE_TO_BIT (out_edge));
1456
1457 prob[bb] += combine_probabilities (prob[pred_bb], in_edge->probability);
1458 // The rounding divide in combine_probabilities can result in an extra
1459 // probability increment propagating along 50-50 edges. Eventually when
1460 // the edges re-merge, the accumulated probability can go slightly above
1461 // REG_BR_PROB_BASE.
1462 if (prob[bb] > REG_BR_PROB_BASE)
1463 prob[bb] = REG_BR_PROB_BASE;
1464 }
1465
1466 bitmap_set_bit (dom[bb], bb);
1467 bitmap_and_compl (pot_split[bb], pot_split[bb], ancestor_edges[bb]);
1468
1469 if (sched_verbose >= 2)
1470 fprintf (sched_dump, ";; bb_prob(%d, %d) = %3d\n", bb, BB_TO_BLOCK (bb),
1471 (100 * prob[bb]) / REG_BR_PROB_BASE);
1472 }
1473
1474 /* Functions for target info. */
1475
1476 /* Compute in BL the list of split-edges of bb_src relatively to bb_trg.
1477 Note that bb_trg dominates bb_src. */
1478
1479 static void
1480 split_edges (int bb_src, int bb_trg, edgelst *bl)
1481 {
1482 sbitmap src = sbitmap_alloc (SBITMAP_SIZE (pot_split[bb_src]));
1483 bitmap_copy (src, pot_split[bb_src]);
1484
1485 bitmap_and_compl (src, src, pot_split[bb_trg]);
1486 extract_edgelst (src, bl);
1487 sbitmap_free (src);
1488 }
1489
1490 /* Find the valid candidate-source-blocks for the target block TRG, compute
1491 their probability, and check if they are speculative or not.
1492 For speculative sources, compute their update-blocks and split-blocks. */
1493
1494 static void
1495 compute_trg_info (int trg)
1496 {
1497 candidate *sp;
1498 edgelst el = { NULL, 0 };
1499 int i, j, k, update_idx;
1500 basic_block block;
1501 sbitmap visited;
1502 edge_iterator ei;
1503 edge e;
1504
1505 candidate_table = XNEWVEC (candidate, current_nr_blocks);
1506
1507 bblst_last = 0;
1508 /* bblst_table holds split blocks and update blocks for each block after
1509 the current one in the region. split blocks and update blocks are
1510 the TO blocks of region edges, so there can be at most rgn_nr_edges
1511 of them. */
1512 bblst_size = (current_nr_blocks - target_bb) * rgn_nr_edges;
1513 bblst_table = XNEWVEC (basic_block, bblst_size);
1514
1515 edgelst_last = 0;
1516 edgelst_table = XNEWVEC (edge, rgn_nr_edges);
1517
1518 /* Define some of the fields for the target bb as well. */
1519 sp = candidate_table + trg;
1520 sp->is_valid = 1;
1521 sp->is_speculative = 0;
1522 sp->src_prob = REG_BR_PROB_BASE;
1523
1524 visited = sbitmap_alloc (last_basic_block_for_fn (cfun));
1525
1526 for (i = trg + 1; i < current_nr_blocks; i++)
1527 {
1528 sp = candidate_table + i;
1529
1530 sp->is_valid = IS_DOMINATED (i, trg);
1531 if (sp->is_valid)
1532 {
1533 int tf = prob[trg], cf = prob[i];
1534
1535 /* In CFGs with low probability edges TF can possibly be zero. */
1536 sp->src_prob = (tf ? GCOV_COMPUTE_SCALE (cf, tf) : 0);
1537 sp->is_valid = (sp->src_prob >= min_spec_prob);
1538 }
1539
1540 if (sp->is_valid)
1541 {
1542 split_edges (i, trg, &el);
1543 sp->is_speculative = (el.nr_members) ? 1 : 0;
1544 if (sp->is_speculative && !flag_schedule_speculative)
1545 sp->is_valid = 0;
1546 }
1547
1548 if (sp->is_valid)
1549 {
1550 /* Compute split blocks and store them in bblst_table.
1551 The TO block of every split edge is a split block. */
1552 sp->split_bbs.first_member = &bblst_table[bblst_last];
1553 sp->split_bbs.nr_members = el.nr_members;
1554 for (j = 0; j < el.nr_members; bblst_last++, j++)
1555 bblst_table[bblst_last] = el.first_member[j]->dest;
1556 sp->update_bbs.first_member = &bblst_table[bblst_last];
1557
1558 /* Compute update blocks and store them in bblst_table.
1559 For every split edge, look at the FROM block, and check
1560 all out edges. For each out edge that is not a split edge,
1561 add the TO block to the update block list. This list can end
1562 up with a lot of duplicates. We need to weed them out to avoid
1563 overrunning the end of the bblst_table. */
1564
1565 update_idx = 0;
1566 bitmap_clear (visited);
1567 for (j = 0; j < el.nr_members; j++)
1568 {
1569 block = el.first_member[j]->src;
1570 FOR_EACH_EDGE (e, ei, block->succs)
1571 {
1572 if (!bitmap_bit_p (visited, e->dest->index))
1573 {
1574 for (k = 0; k < el.nr_members; k++)
1575 if (e == el.first_member[k])
1576 break;
1577
1578 if (k >= el.nr_members)
1579 {
1580 bblst_table[bblst_last++] = e->dest;
1581 bitmap_set_bit (visited, e->dest->index);
1582 update_idx++;
1583 }
1584 }
1585 }
1586 }
1587 sp->update_bbs.nr_members = update_idx;
1588
1589 /* Make sure we didn't overrun the end of bblst_table. */
1590 gcc_assert (bblst_last <= bblst_size);
1591 }
1592 else
1593 {
1594 sp->split_bbs.nr_members = sp->update_bbs.nr_members = 0;
1595
1596 sp->is_speculative = 0;
1597 sp->src_prob = 0;
1598 }
1599 }
1600
1601 sbitmap_free (visited);
1602 }
1603
1604 /* Free the computed target info. */
1605 static void
1606 free_trg_info (void)
1607 {
1608 free (candidate_table);
1609 free (bblst_table);
1610 free (edgelst_table);
1611 }
1612
1613 /* Print candidates info, for debugging purposes. Callable from debugger. */
1614
1615 DEBUG_FUNCTION void
1616 debug_candidate (int i)
1617 {
1618 if (!candidate_table[i].is_valid)
1619 return;
1620
1621 if (candidate_table[i].is_speculative)
1622 {
1623 int j;
1624 fprintf (sched_dump, "src b %d bb %d speculative \n", BB_TO_BLOCK (i), i);
1625
1626 fprintf (sched_dump, "split path: ");
1627 for (j = 0; j < candidate_table[i].split_bbs.nr_members; j++)
1628 {
1629 int b = candidate_table[i].split_bbs.first_member[j]->index;
1630
1631 fprintf (sched_dump, " %d ", b);
1632 }
1633 fprintf (sched_dump, "\n");
1634
1635 fprintf (sched_dump, "update path: ");
1636 for (j = 0; j < candidate_table[i].update_bbs.nr_members; j++)
1637 {
1638 int b = candidate_table[i].update_bbs.first_member[j]->index;
1639
1640 fprintf (sched_dump, " %d ", b);
1641 }
1642 fprintf (sched_dump, "\n");
1643 }
1644 else
1645 {
1646 fprintf (sched_dump, " src %d equivalent\n", BB_TO_BLOCK (i));
1647 }
1648 }
1649
1650 /* Print candidates info, for debugging purposes. Callable from debugger. */
1651
1652 DEBUG_FUNCTION void
1653 debug_candidates (int trg)
1654 {
1655 int i;
1656
1657 fprintf (sched_dump, "----------- candidate table: target: b=%d bb=%d ---\n",
1658 BB_TO_BLOCK (trg), trg);
1659 for (i = trg + 1; i < current_nr_blocks; i++)
1660 debug_candidate (i);
1661 }
1662
1663 /* Functions for speculative scheduling. */
1664
1665 static bitmap_head not_in_df;
1666
1667 /* Return 0 if x is a set of a register alive in the beginning of one
1668 of the split-blocks of src, otherwise return 1. */
1669
1670 static int
1671 check_live_1 (int src, rtx x)
1672 {
1673 int i;
1674 int regno;
1675 rtx reg = SET_DEST (x);
1676
1677 if (reg == 0)
1678 return 1;
1679
1680 while (GET_CODE (reg) == SUBREG
1681 || GET_CODE (reg) == ZERO_EXTRACT
1682 || GET_CODE (reg) == STRICT_LOW_PART)
1683 reg = XEXP (reg, 0);
1684
1685 if (GET_CODE (reg) == PARALLEL)
1686 {
1687 int i;
1688
1689 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
1690 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
1691 if (check_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0)))
1692 return 1;
1693
1694 return 0;
1695 }
1696
1697 if (!REG_P (reg))
1698 return 1;
1699
1700 regno = REGNO (reg);
1701
1702 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1703 {
1704 /* Global registers are assumed live. */
1705 return 0;
1706 }
1707 else
1708 {
1709 if (regno < FIRST_PSEUDO_REGISTER)
1710 {
1711 /* Check for hard registers. */
1712 int j = hard_regno_nregs[regno][GET_MODE (reg)];
1713 while (--j >= 0)
1714 {
1715 for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++)
1716 {
1717 basic_block b = candidate_table[src].split_bbs.first_member[i];
1718 int t = bitmap_bit_p (&not_in_df, b->index);
1719
1720 /* We can have split blocks, that were recently generated.
1721 Such blocks are always outside current region. */
1722 gcc_assert (!t || (CONTAINING_RGN (b->index)
1723 != CONTAINING_RGN (BB_TO_BLOCK (src))));
1724
1725 if (t || REGNO_REG_SET_P (df_get_live_in (b), regno + j))
1726 return 0;
1727 }
1728 }
1729 }
1730 else
1731 {
1732 /* Check for pseudo registers. */
1733 for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++)
1734 {
1735 basic_block b = candidate_table[src].split_bbs.first_member[i];
1736 int t = bitmap_bit_p (&not_in_df, b->index);
1737
1738 gcc_assert (!t || (CONTAINING_RGN (b->index)
1739 != CONTAINING_RGN (BB_TO_BLOCK (src))));
1740
1741 if (t || REGNO_REG_SET_P (df_get_live_in (b), regno))
1742 return 0;
1743 }
1744 }
1745 }
1746
1747 return 1;
1748 }
1749
1750 /* If x is a set of a register R, mark that R is alive in the beginning
1751 of every update-block of src. */
1752
1753 static void
1754 update_live_1 (int src, rtx x)
1755 {
1756 int i;
1757 int regno;
1758 rtx reg = SET_DEST (x);
1759
1760 if (reg == 0)
1761 return;
1762
1763 while (GET_CODE (reg) == SUBREG
1764 || GET_CODE (reg) == ZERO_EXTRACT
1765 || GET_CODE (reg) == STRICT_LOW_PART)
1766 reg = XEXP (reg, 0);
1767
1768 if (GET_CODE (reg) == PARALLEL)
1769 {
1770 int i;
1771
1772 for (i = XVECLEN (reg, 0) - 1; i >= 0; i--)
1773 if (XEXP (XVECEXP (reg, 0, i), 0) != 0)
1774 update_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0));
1775
1776 return;
1777 }
1778
1779 if (!REG_P (reg))
1780 return;
1781
1782 /* Global registers are always live, so the code below does not apply
1783 to them. */
1784
1785 regno = REGNO (reg);
1786
1787 if (! HARD_REGISTER_NUM_P (regno)
1788 || !global_regs[regno])
1789 {
1790 for (i = 0; i < candidate_table[src].update_bbs.nr_members; i++)
1791 {
1792 basic_block b = candidate_table[src].update_bbs.first_member[i];
1793
1794 if (HARD_REGISTER_NUM_P (regno))
1795 bitmap_set_range (df_get_live_in (b), regno,
1796 hard_regno_nregs[regno][GET_MODE (reg)]);
1797 else
1798 bitmap_set_bit (df_get_live_in (b), regno);
1799 }
1800 }
1801 }
1802
1803 /* Return 1 if insn can be speculatively moved from block src to trg,
1804 otherwise return 0. Called before first insertion of insn to
1805 ready-list or before the scheduling. */
1806
1807 static int
1808 check_live (rtx_insn *insn, int src)
1809 {
1810 /* Find the registers set by instruction. */
1811 if (GET_CODE (PATTERN (insn)) == SET
1812 || GET_CODE (PATTERN (insn)) == CLOBBER)
1813 return check_live_1 (src, PATTERN (insn));
1814 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1815 {
1816 int j;
1817 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
1818 if ((GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
1819 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
1820 && !check_live_1 (src, XVECEXP (PATTERN (insn), 0, j)))
1821 return 0;
1822
1823 return 1;
1824 }
1825
1826 return 1;
1827 }
1828
1829 /* Update the live registers info after insn was moved speculatively from
1830 block src to trg. */
1831
1832 static void
1833 update_live (rtx insn, int src)
1834 {
1835 /* Find the registers set by instruction. */
1836 if (GET_CODE (PATTERN (insn)) == SET
1837 || GET_CODE (PATTERN (insn)) == CLOBBER)
1838 update_live_1 (src, PATTERN (insn));
1839 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1840 {
1841 int j;
1842 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
1843 if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
1844 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
1845 update_live_1 (src, XVECEXP (PATTERN (insn), 0, j));
1846 }
1847 }
1848
1849 /* Nonzero if block bb_to is equal to, or reachable from block bb_from. */
1850 #define IS_REACHABLE(bb_from, bb_to) \
1851 (bb_from == bb_to \
1852 || IS_RGN_ENTRY (bb_from) \
1853 || (bitmap_bit_p (ancestor_edges[bb_to], \
1854 EDGE_TO_BIT (single_pred_edge (BASIC_BLOCK_FOR_FN (cfun, \
1855 BB_TO_BLOCK (bb_from)))))))
1856
1857 /* Turns on the fed_by_spec_load flag for insns fed by load_insn. */
1858
1859 static void
1860 set_spec_fed (rtx load_insn)
1861 {
1862 sd_iterator_def sd_it;
1863 dep_t dep;
1864
1865 FOR_EACH_DEP (load_insn, SD_LIST_FORW, sd_it, dep)
1866 if (DEP_TYPE (dep) == REG_DEP_TRUE)
1867 FED_BY_SPEC_LOAD (DEP_CON (dep)) = 1;
1868 }
1869
1870 /* On the path from the insn to load_insn_bb, find a conditional
1871 branch depending on insn, that guards the speculative load. */
1872
1873 static int
1874 find_conditional_protection (rtx insn, int load_insn_bb)
1875 {
1876 sd_iterator_def sd_it;
1877 dep_t dep;
1878
1879 /* Iterate through DEF-USE forward dependences. */
1880 FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
1881 {
1882 rtx_insn *next = DEP_CON (dep);
1883
1884 if ((CONTAINING_RGN (BLOCK_NUM (next)) ==
1885 CONTAINING_RGN (BB_TO_BLOCK (load_insn_bb)))
1886 && IS_REACHABLE (INSN_BB (next), load_insn_bb)
1887 && load_insn_bb != INSN_BB (next)
1888 && DEP_TYPE (dep) == REG_DEP_TRUE
1889 && (JUMP_P (next)
1890 || find_conditional_protection (next, load_insn_bb)))
1891 return 1;
1892 }
1893 return 0;
1894 } /* find_conditional_protection */
1895
1896 /* Returns 1 if the same insn1 that participates in the computation
1897 of load_insn's address is feeding a conditional branch that is
1898 guarding on load_insn. This is true if we find two DEF-USE
1899 chains:
1900 insn1 -> ... -> conditional-branch
1901 insn1 -> ... -> load_insn,
1902 and if a flow path exists:
1903 insn1 -> ... -> conditional-branch -> ... -> load_insn,
1904 and if insn1 is on the path
1905 region-entry -> ... -> bb_trg -> ... load_insn.
1906
1907 Locate insn1 by climbing on INSN_BACK_DEPS from load_insn.
1908 Locate the branch by following INSN_FORW_DEPS from insn1. */
1909
1910 static int
1911 is_conditionally_protected (rtx load_insn, int bb_src, int bb_trg)
1912 {
1913 sd_iterator_def sd_it;
1914 dep_t dep;
1915
1916 FOR_EACH_DEP (load_insn, SD_LIST_BACK, sd_it, dep)
1917 {
1918 rtx_insn *insn1 = DEP_PRO (dep);
1919
1920 /* Must be a DEF-USE dependence upon non-branch. */
1921 if (DEP_TYPE (dep) != REG_DEP_TRUE
1922 || JUMP_P (insn1))
1923 continue;
1924
1925 /* Must exist a path: region-entry -> ... -> bb_trg -> ... load_insn. */
1926 if (INSN_BB (insn1) == bb_src
1927 || (CONTAINING_RGN (BLOCK_NUM (insn1))
1928 != CONTAINING_RGN (BB_TO_BLOCK (bb_src)))
1929 || (!IS_REACHABLE (bb_trg, INSN_BB (insn1))
1930 && !IS_REACHABLE (INSN_BB (insn1), bb_trg)))
1931 continue;
1932
1933 /* Now search for the conditional-branch. */
1934 if (find_conditional_protection (insn1, bb_src))
1935 return 1;
1936
1937 /* Recursive step: search another insn1, "above" current insn1. */
1938 return is_conditionally_protected (insn1, bb_src, bb_trg);
1939 }
1940
1941 /* The chain does not exist. */
1942 return 0;
1943 } /* is_conditionally_protected */
1944
1945 /* Returns 1 if a clue for "similar load" 'insn2' is found, and hence
1946 load_insn can move speculatively from bb_src to bb_trg. All the
1947 following must hold:
1948
1949 (1) both loads have 1 base register (PFREE_CANDIDATEs).
1950 (2) load_insn and load1 have a def-use dependence upon
1951 the same insn 'insn1'.
1952 (3) either load2 is in bb_trg, or:
1953 - there's only one split-block, and
1954 - load1 is on the escape path, and
1955
1956 From all these we can conclude that the two loads access memory
1957 addresses that differ at most by a constant, and hence if moving
1958 load_insn would cause an exception, it would have been caused by
1959 load2 anyhow. */
1960
1961 static int
1962 is_pfree (rtx load_insn, int bb_src, int bb_trg)
1963 {
1964 sd_iterator_def back_sd_it;
1965 dep_t back_dep;
1966 candidate *candp = candidate_table + bb_src;
1967
1968 if (candp->split_bbs.nr_members != 1)
1969 /* Must have exactly one escape block. */
1970 return 0;
1971
1972 FOR_EACH_DEP (load_insn, SD_LIST_BACK, back_sd_it, back_dep)
1973 {
1974 rtx_insn *insn1 = DEP_PRO (back_dep);
1975
1976 if (DEP_TYPE (back_dep) == REG_DEP_TRUE)
1977 /* Found a DEF-USE dependence (insn1, load_insn). */
1978 {
1979 sd_iterator_def fore_sd_it;
1980 dep_t fore_dep;
1981
1982 FOR_EACH_DEP (insn1, SD_LIST_FORW, fore_sd_it, fore_dep)
1983 {
1984 rtx_insn *insn2 = DEP_CON (fore_dep);
1985
1986 if (DEP_TYPE (fore_dep) == REG_DEP_TRUE)
1987 {
1988 /* Found a DEF-USE dependence (insn1, insn2). */
1989 if (haifa_classify_insn (insn2) != PFREE_CANDIDATE)
1990 /* insn2 not guaranteed to be a 1 base reg load. */
1991 continue;
1992
1993 if (INSN_BB (insn2) == bb_trg)
1994 /* insn2 is the similar load, in the target block. */
1995 return 1;
1996
1997 if (*(candp->split_bbs.first_member) == BLOCK_FOR_INSN (insn2))
1998 /* insn2 is a similar load, in a split-block. */
1999 return 1;
2000 }
2001 }
2002 }
2003 }
2004
2005 /* Couldn't find a similar load. */
2006 return 0;
2007 } /* is_pfree */
2008
2009 /* Return 1 if load_insn is prisky (i.e. if load_insn is fed by
2010 a load moved speculatively, or if load_insn is protected by
2011 a compare on load_insn's address). */
2012
2013 static int
2014 is_prisky (rtx load_insn, int bb_src, int bb_trg)
2015 {
2016 if (FED_BY_SPEC_LOAD (load_insn))
2017 return 1;
2018
2019 if (sd_lists_empty_p (load_insn, SD_LIST_BACK))
2020 /* Dependence may 'hide' out of the region. */
2021 return 1;
2022
2023 if (is_conditionally_protected (load_insn, bb_src, bb_trg))
2024 return 1;
2025
2026 return 0;
2027 }
2028
2029 /* Insn is a candidate to be moved speculatively from bb_src to bb_trg.
2030 Return 1 if insn is exception-free (and the motion is valid)
2031 and 0 otherwise. */
2032
2033 static int
2034 is_exception_free (rtx insn, int bb_src, int bb_trg)
2035 {
2036 int insn_class = haifa_classify_insn (insn);
2037
2038 /* Handle non-load insns. */
2039 switch (insn_class)
2040 {
2041 case TRAP_FREE:
2042 return 1;
2043 case TRAP_RISKY:
2044 return 0;
2045 default:;
2046 }
2047
2048 /* Handle loads. */
2049 if (!flag_schedule_speculative_load)
2050 return 0;
2051 IS_LOAD_INSN (insn) = 1;
2052 switch (insn_class)
2053 {
2054 case IFREE:
2055 return (1);
2056 case IRISKY:
2057 return 0;
2058 case PFREE_CANDIDATE:
2059 if (is_pfree (insn, bb_src, bb_trg))
2060 return 1;
2061 /* Don't 'break' here: PFREE-candidate is also PRISKY-candidate. */
2062 case PRISKY_CANDIDATE:
2063 if (!flag_schedule_speculative_load_dangerous
2064 || is_prisky (insn, bb_src, bb_trg))
2065 return 0;
2066 break;
2067 default:;
2068 }
2069
2070 return flag_schedule_speculative_load_dangerous;
2071 }
2072 \f
2073 /* The number of insns from the current block scheduled so far. */
2074 static int sched_target_n_insns;
2075 /* The number of insns from the current block to be scheduled in total. */
2076 static int target_n_insns;
2077 /* The number of insns from the entire region scheduled so far. */
2078 static int sched_n_insns;
2079
2080 /* Implementations of the sched_info functions for region scheduling. */
2081 static void init_ready_list (void);
2082 static int can_schedule_ready_p (rtx_insn *);
2083 static void begin_schedule_ready (rtx_insn *);
2084 static ds_t new_ready (rtx_insn *, ds_t);
2085 static int schedule_more_p (void);
2086 static const char *rgn_print_insn (const rtx_insn *, int);
2087 static int rgn_rank (rtx_insn *, rtx_insn *);
2088 static void compute_jump_reg_dependencies (rtx, regset);
2089
2090 /* Functions for speculative scheduling. */
2091 static void rgn_add_remove_insn (rtx_insn *, int);
2092 static void rgn_add_block (basic_block, basic_block);
2093 static void rgn_fix_recovery_cfg (int, int, int);
2094 static basic_block advance_target_bb (basic_block, rtx_insn *);
2095
2096 /* Return nonzero if there are more insns that should be scheduled. */
2097
2098 static int
2099 schedule_more_p (void)
2100 {
2101 return sched_target_n_insns < target_n_insns;
2102 }
2103
2104 /* Add all insns that are initially ready to the ready list READY. Called
2105 once before scheduling a set of insns. */
2106
2107 static void
2108 init_ready_list (void)
2109 {
2110 rtx prev_head = current_sched_info->prev_head;
2111 rtx next_tail = current_sched_info->next_tail;
2112 int bb_src;
2113 rtx_insn *insn;
2114
2115 target_n_insns = 0;
2116 sched_target_n_insns = 0;
2117 sched_n_insns = 0;
2118
2119 /* Print debugging information. */
2120 if (sched_verbose >= 5)
2121 debug_rgn_dependencies (target_bb);
2122
2123 /* Prepare current target block info. */
2124 if (current_nr_blocks > 1)
2125 compute_trg_info (target_bb);
2126
2127 /* Initialize ready list with all 'ready' insns in target block.
2128 Count number of insns in the target block being scheduled. */
2129 for (insn = NEXT_INSN (prev_head); insn != next_tail; insn = NEXT_INSN (insn))
2130 {
2131 gcc_assert (TODO_SPEC (insn) == HARD_DEP || TODO_SPEC (insn) == DEP_POSTPONED);
2132 TODO_SPEC (insn) = HARD_DEP;
2133 try_ready (insn);
2134 target_n_insns++;
2135
2136 gcc_assert (!(TODO_SPEC (insn) & BEGIN_CONTROL));
2137 }
2138
2139 /* Add to ready list all 'ready' insns in valid source blocks.
2140 For speculative insns, check-live, exception-free, and
2141 issue-delay. */
2142 for (bb_src = target_bb + 1; bb_src < current_nr_blocks; bb_src++)
2143 if (IS_VALID (bb_src))
2144 {
2145 rtx_insn *src_head;
2146 rtx_insn *src_next_tail;
2147 rtx_insn *tail, *head;
2148
2149 get_ebb_head_tail (EBB_FIRST_BB (bb_src), EBB_LAST_BB (bb_src),
2150 &head, &tail);
2151 src_next_tail = NEXT_INSN (tail);
2152 src_head = head;
2153
2154 for (insn = src_head; insn != src_next_tail; insn = NEXT_INSN (insn))
2155 if (INSN_P (insn))
2156 {
2157 gcc_assert (TODO_SPEC (insn) == HARD_DEP || TODO_SPEC (insn) == DEP_POSTPONED);
2158 TODO_SPEC (insn) = HARD_DEP;
2159 try_ready (insn);
2160 }
2161 }
2162 }
2163
2164 /* Called after taking INSN from the ready list. Returns nonzero if this
2165 insn can be scheduled, nonzero if we should silently discard it. */
2166
2167 static int
2168 can_schedule_ready_p (rtx_insn *insn)
2169 {
2170 /* An interblock motion? */
2171 if (INSN_BB (insn) != target_bb
2172 && IS_SPECULATIVE_INSN (insn)
2173 && !check_live (insn, INSN_BB (insn)))
2174 return 0;
2175 else
2176 return 1;
2177 }
2178
2179 /* Updates counter and other information. Split from can_schedule_ready_p ()
2180 because when we schedule insn speculatively then insn passed to
2181 can_schedule_ready_p () differs from the one passed to
2182 begin_schedule_ready (). */
2183 static void
2184 begin_schedule_ready (rtx_insn *insn)
2185 {
2186 /* An interblock motion? */
2187 if (INSN_BB (insn) != target_bb)
2188 {
2189 if (IS_SPECULATIVE_INSN (insn))
2190 {
2191 gcc_assert (check_live (insn, INSN_BB (insn)));
2192
2193 update_live (insn, INSN_BB (insn));
2194
2195 /* For speculative load, mark insns fed by it. */
2196 if (IS_LOAD_INSN (insn) || FED_BY_SPEC_LOAD (insn))
2197 set_spec_fed (insn);
2198
2199 nr_spec++;
2200 }
2201 nr_inter++;
2202 }
2203 else
2204 {
2205 /* In block motion. */
2206 sched_target_n_insns++;
2207 }
2208 sched_n_insns++;
2209 }
2210
2211 /* Called after INSN has all its hard dependencies resolved and the speculation
2212 of type TS is enough to overcome them all.
2213 Return nonzero if it should be moved to the ready list or the queue, or zero
2214 if we should silently discard it. */
2215 static ds_t
2216 new_ready (rtx_insn *next, ds_t ts)
2217 {
2218 if (INSN_BB (next) != target_bb)
2219 {
2220 int not_ex_free = 0;
2221
2222 /* For speculative insns, before inserting to ready/queue,
2223 check live, exception-free, and issue-delay. */
2224 if (!IS_VALID (INSN_BB (next))
2225 || CANT_MOVE (next)
2226 || (IS_SPECULATIVE_INSN (next)
2227 && ((recog_memoized (next) >= 0
2228 && min_insn_conflict_delay (curr_state, next, next)
2229 > PARAM_VALUE (PARAM_MAX_SCHED_INSN_CONFLICT_DELAY))
2230 || IS_SPECULATION_CHECK_P (next)
2231 || !check_live (next, INSN_BB (next))
2232 || (not_ex_free = !is_exception_free (next, INSN_BB (next),
2233 target_bb)))))
2234 {
2235 if (not_ex_free
2236 /* We are here because is_exception_free () == false.
2237 But we possibly can handle that with control speculation. */
2238 && sched_deps_info->generate_spec_deps
2239 && spec_info->mask & BEGIN_CONTROL)
2240 {
2241 ds_t new_ds;
2242
2243 /* Add control speculation to NEXT's dependency type. */
2244 new_ds = set_dep_weak (ts, BEGIN_CONTROL, MAX_DEP_WEAK);
2245
2246 /* Check if NEXT can be speculated with new dependency type. */
2247 if (sched_insn_is_legitimate_for_speculation_p (next, new_ds))
2248 /* Here we got new control-speculative instruction. */
2249 ts = new_ds;
2250 else
2251 /* NEXT isn't ready yet. */
2252 ts = DEP_POSTPONED;
2253 }
2254 else
2255 /* NEXT isn't ready yet. */
2256 ts = DEP_POSTPONED;
2257 }
2258 }
2259
2260 return ts;
2261 }
2262
2263 /* Return a string that contains the insn uid and optionally anything else
2264 necessary to identify this insn in an output. It's valid to use a
2265 static buffer for this. The ALIGNED parameter should cause the string
2266 to be formatted so that multiple output lines will line up nicely. */
2267
2268 static const char *
2269 rgn_print_insn (const rtx_insn *insn, int aligned)
2270 {
2271 static char tmp[80];
2272
2273 if (aligned)
2274 sprintf (tmp, "b%3d: i%4d", INSN_BB (insn), INSN_UID (insn));
2275 else
2276 {
2277 if (current_nr_blocks > 1 && INSN_BB (insn) != target_bb)
2278 sprintf (tmp, "%d/b%d", INSN_UID (insn), INSN_BB (insn));
2279 else
2280 sprintf (tmp, "%d", INSN_UID (insn));
2281 }
2282 return tmp;
2283 }
2284
2285 /* Compare priority of two insns. Return a positive number if the second
2286 insn is to be preferred for scheduling, and a negative one if the first
2287 is to be preferred. Zero if they are equally good. */
2288
2289 static int
2290 rgn_rank (rtx_insn *insn1, rtx_insn *insn2)
2291 {
2292 /* Some comparison make sense in interblock scheduling only. */
2293 if (INSN_BB (insn1) != INSN_BB (insn2))
2294 {
2295 int spec_val, prob_val;
2296
2297 /* Prefer an inblock motion on an interblock motion. */
2298 if ((INSN_BB (insn2) == target_bb) && (INSN_BB (insn1) != target_bb))
2299 return 1;
2300 if ((INSN_BB (insn1) == target_bb) && (INSN_BB (insn2) != target_bb))
2301 return -1;
2302
2303 /* Prefer a useful motion on a speculative one. */
2304 spec_val = IS_SPECULATIVE_INSN (insn1) - IS_SPECULATIVE_INSN (insn2);
2305 if (spec_val)
2306 return spec_val;
2307
2308 /* Prefer a more probable (speculative) insn. */
2309 prob_val = INSN_PROBABILITY (insn2) - INSN_PROBABILITY (insn1);
2310 if (prob_val)
2311 return prob_val;
2312 }
2313 return 0;
2314 }
2315
2316 /* NEXT is an instruction that depends on INSN (a backward dependence);
2317 return nonzero if we should include this dependence in priority
2318 calculations. */
2319
2320 int
2321 contributes_to_priority (rtx_insn *next, rtx_insn *insn)
2322 {
2323 /* NEXT and INSN reside in one ebb. */
2324 return BLOCK_TO_BB (BLOCK_NUM (next)) == BLOCK_TO_BB (BLOCK_NUM (insn));
2325 }
2326
2327 /* INSN is a JUMP_INSN. Store the set of registers that must be
2328 considered as used by this jump in USED. */
2329
2330 static void
2331 compute_jump_reg_dependencies (rtx insn ATTRIBUTE_UNUSED,
2332 regset used ATTRIBUTE_UNUSED)
2333 {
2334 /* Nothing to do here, since we postprocess jumps in
2335 add_branch_dependences. */
2336 }
2337
2338 /* This variable holds common_sched_info hooks and data relevant to
2339 the interblock scheduler. */
2340 static struct common_sched_info_def rgn_common_sched_info;
2341
2342
2343 /* This holds data for the dependence analysis relevant to
2344 the interblock scheduler. */
2345 static struct sched_deps_info_def rgn_sched_deps_info;
2346
2347 /* This holds constant data used for initializing the above structure
2348 for the Haifa scheduler. */
2349 static const struct sched_deps_info_def rgn_const_sched_deps_info =
2350 {
2351 compute_jump_reg_dependencies,
2352 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2353 0, 0, 0
2354 };
2355
2356 /* Same as above, but for the selective scheduler. */
2357 static const struct sched_deps_info_def rgn_const_sel_sched_deps_info =
2358 {
2359 compute_jump_reg_dependencies,
2360 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
2361 0, 0, 0
2362 };
2363
2364 /* Return true if scheduling INSN will trigger finish of scheduling
2365 current block. */
2366 static bool
2367 rgn_insn_finishes_block_p (rtx_insn *insn)
2368 {
2369 if (INSN_BB (insn) == target_bb
2370 && sched_target_n_insns + 1 == target_n_insns)
2371 /* INSN is the last not-scheduled instruction in the current block. */
2372 return true;
2373
2374 return false;
2375 }
2376
2377 /* Used in schedule_insns to initialize current_sched_info for scheduling
2378 regions (or single basic blocks). */
2379
2380 static const struct haifa_sched_info rgn_const_sched_info =
2381 {
2382 init_ready_list,
2383 can_schedule_ready_p,
2384 schedule_more_p,
2385 new_ready,
2386 rgn_rank,
2387 rgn_print_insn,
2388 contributes_to_priority,
2389 rgn_insn_finishes_block_p,
2390
2391 NULL, NULL,
2392 NULL, NULL,
2393 0, 0,
2394
2395 rgn_add_remove_insn,
2396 begin_schedule_ready,
2397 NULL,
2398 advance_target_bb,
2399 NULL, NULL,
2400 SCHED_RGN
2401 };
2402
2403 /* This variable holds the data and hooks needed to the Haifa scheduler backend
2404 for the interblock scheduler frontend. */
2405 static struct haifa_sched_info rgn_sched_info;
2406
2407 /* Returns maximum priority that an insn was assigned to. */
2408
2409 int
2410 get_rgn_sched_max_insns_priority (void)
2411 {
2412 return rgn_sched_info.sched_max_insns_priority;
2413 }
2414
2415 /* Determine if PAT sets a TARGET_CLASS_LIKELY_SPILLED_P register. */
2416
2417 static bool
2418 sets_likely_spilled (rtx pat)
2419 {
2420 bool ret = false;
2421 note_stores (pat, sets_likely_spilled_1, &ret);
2422 return ret;
2423 }
2424
2425 static void
2426 sets_likely_spilled_1 (rtx x, const_rtx pat, void *data)
2427 {
2428 bool *ret = (bool *) data;
2429
2430 if (GET_CODE (pat) == SET
2431 && REG_P (x)
2432 && HARD_REGISTER_P (x)
2433 && targetm.class_likely_spilled_p (REGNO_REG_CLASS (REGNO (x))))
2434 *ret = true;
2435 }
2436
2437 /* A bitmap to note insns that participate in any dependency. Used in
2438 add_branch_dependences. */
2439 static sbitmap insn_referenced;
2440
2441 /* Add dependences so that branches are scheduled to run last in their
2442 block. */
2443 static void
2444 add_branch_dependences (rtx_insn *head, rtx_insn *tail)
2445 {
2446 rtx_insn *insn, *last;
2447
2448 /* For all branches, calls, uses, clobbers, cc0 setters, and instructions
2449 that can throw exceptions, force them to remain in order at the end of
2450 the block by adding dependencies and giving the last a high priority.
2451 There may be notes present, and prev_head may also be a note.
2452
2453 Branches must obviously remain at the end. Calls should remain at the
2454 end since moving them results in worse register allocation. Uses remain
2455 at the end to ensure proper register allocation.
2456
2457 cc0 setters remain at the end because they can't be moved away from
2458 their cc0 user.
2459
2460 Predecessors of SCHED_GROUP_P instructions at the end remain at the end.
2461
2462 COND_EXEC insns cannot be moved past a branch (see e.g. PR17808).
2463
2464 Insns setting TARGET_CLASS_LIKELY_SPILLED_P registers (usually return
2465 values) are not moved before reload because we can wind up with register
2466 allocation failures. */
2467
2468 while (tail != head && DEBUG_INSN_P (tail))
2469 tail = PREV_INSN (tail);
2470
2471 insn = tail;
2472 last = 0;
2473 while (CALL_P (insn)
2474 || JUMP_P (insn) || JUMP_TABLE_DATA_P (insn)
2475 || (NONJUMP_INSN_P (insn)
2476 && (GET_CODE (PATTERN (insn)) == USE
2477 || GET_CODE (PATTERN (insn)) == CLOBBER
2478 || can_throw_internal (insn)
2479 #ifdef HAVE_cc0
2480 || sets_cc0_p (PATTERN (insn))
2481 #endif
2482 || (!reload_completed
2483 && sets_likely_spilled (PATTERN (insn)))))
2484 || NOTE_P (insn)
2485 || (last != 0 && SCHED_GROUP_P (last)))
2486 {
2487 if (!NOTE_P (insn))
2488 {
2489 if (last != 0
2490 && sd_find_dep_between (insn, last, false) == NULL)
2491 {
2492 if (! sched_insns_conditions_mutex_p (last, insn))
2493 add_dependence (last, insn, REG_DEP_ANTI);
2494 bitmap_set_bit (insn_referenced, INSN_LUID (insn));
2495 }
2496
2497 CANT_MOVE (insn) = 1;
2498
2499 last = insn;
2500 }
2501
2502 /* Don't overrun the bounds of the basic block. */
2503 if (insn == head)
2504 break;
2505
2506 do
2507 insn = PREV_INSN (insn);
2508 while (insn != head && DEBUG_INSN_P (insn));
2509 }
2510
2511 /* Make sure these insns are scheduled last in their block. */
2512 insn = last;
2513 if (insn != 0)
2514 while (insn != head)
2515 {
2516 insn = prev_nonnote_insn (insn);
2517
2518 if (bitmap_bit_p (insn_referenced, INSN_LUID (insn))
2519 || DEBUG_INSN_P (insn))
2520 continue;
2521
2522 if (! sched_insns_conditions_mutex_p (last, insn))
2523 add_dependence (last, insn, REG_DEP_ANTI);
2524 }
2525
2526 if (!targetm.have_conditional_execution ())
2527 return;
2528
2529 /* Finally, if the block ends in a jump, and we are doing intra-block
2530 scheduling, make sure that the branch depends on any COND_EXEC insns
2531 inside the block to avoid moving the COND_EXECs past the branch insn.
2532
2533 We only have to do this after reload, because (1) before reload there
2534 are no COND_EXEC insns, and (2) the region scheduler is an intra-block
2535 scheduler after reload.
2536
2537 FIXME: We could in some cases move COND_EXEC insns past the branch if
2538 this scheduler would be a little smarter. Consider this code:
2539
2540 T = [addr]
2541 C ? addr += 4
2542 !C ? X += 12
2543 C ? T += 1
2544 C ? jump foo
2545
2546 On a target with a one cycle stall on a memory access the optimal
2547 sequence would be:
2548
2549 T = [addr]
2550 C ? addr += 4
2551 C ? T += 1
2552 C ? jump foo
2553 !C ? X += 12
2554
2555 We don't want to put the 'X += 12' before the branch because it just
2556 wastes a cycle of execution time when the branch is taken.
2557
2558 Note that in the example "!C" will always be true. That is another
2559 possible improvement for handling COND_EXECs in this scheduler: it
2560 could remove always-true predicates. */
2561
2562 if (!reload_completed || ! (JUMP_P (tail) || JUMP_TABLE_DATA_P (tail)))
2563 return;
2564
2565 insn = tail;
2566 while (insn != head)
2567 {
2568 insn = PREV_INSN (insn);
2569
2570 /* Note that we want to add this dependency even when
2571 sched_insns_conditions_mutex_p returns true. The whole point
2572 is that we _want_ this dependency, even if these insns really
2573 are independent. */
2574 if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == COND_EXEC)
2575 add_dependence (tail, insn, REG_DEP_ANTI);
2576 }
2577 }
2578
2579 /* Data structures for the computation of data dependences in a regions. We
2580 keep one `deps' structure for every basic block. Before analyzing the
2581 data dependences for a bb, its variables are initialized as a function of
2582 the variables of its predecessors. When the analysis for a bb completes,
2583 we save the contents to the corresponding bb_deps[bb] variable. */
2584
2585 static struct deps_desc *bb_deps;
2586
2587 static void
2588 concat_insn_mem_list (rtx_insn_list *copy_insns,
2589 rtx_expr_list *copy_mems,
2590 rtx_insn_list **old_insns_p,
2591 rtx_expr_list **old_mems_p)
2592 {
2593 rtx_insn_list *new_insns = *old_insns_p;
2594 rtx_expr_list *new_mems = *old_mems_p;
2595
2596 while (copy_insns)
2597 {
2598 new_insns = alloc_INSN_LIST (copy_insns->insn (), new_insns);
2599 new_mems = alloc_EXPR_LIST (VOIDmode, copy_mems->element (), new_mems);
2600 copy_insns = copy_insns->next ();
2601 copy_mems = copy_mems->next ();
2602 }
2603
2604 *old_insns_p = new_insns;
2605 *old_mems_p = new_mems;
2606 }
2607
2608 /* Join PRED_DEPS to the SUCC_DEPS. */
2609 void
2610 deps_join (struct deps_desc *succ_deps, struct deps_desc *pred_deps)
2611 {
2612 unsigned reg;
2613 reg_set_iterator rsi;
2614
2615 /* The reg_last lists are inherited by successor. */
2616 EXECUTE_IF_SET_IN_REG_SET (&pred_deps->reg_last_in_use, 0, reg, rsi)
2617 {
2618 struct deps_reg *pred_rl = &pred_deps->reg_last[reg];
2619 struct deps_reg *succ_rl = &succ_deps->reg_last[reg];
2620
2621 succ_rl->uses = concat_INSN_LIST (pred_rl->uses, succ_rl->uses);
2622 succ_rl->sets = concat_INSN_LIST (pred_rl->sets, succ_rl->sets);
2623 succ_rl->implicit_sets
2624 = concat_INSN_LIST (pred_rl->implicit_sets, succ_rl->implicit_sets);
2625 succ_rl->clobbers = concat_INSN_LIST (pred_rl->clobbers,
2626 succ_rl->clobbers);
2627 succ_rl->uses_length += pred_rl->uses_length;
2628 succ_rl->clobbers_length += pred_rl->clobbers_length;
2629 }
2630 IOR_REG_SET (&succ_deps->reg_last_in_use, &pred_deps->reg_last_in_use);
2631
2632 /* Mem read/write lists are inherited by successor. */
2633 concat_insn_mem_list (pred_deps->pending_read_insns,
2634 pred_deps->pending_read_mems,
2635 &succ_deps->pending_read_insns,
2636 &succ_deps->pending_read_mems);
2637 concat_insn_mem_list (pred_deps->pending_write_insns,
2638 pred_deps->pending_write_mems,
2639 &succ_deps->pending_write_insns,
2640 &succ_deps->pending_write_mems);
2641
2642 succ_deps->pending_jump_insns
2643 = concat_INSN_LIST (pred_deps->pending_jump_insns,
2644 succ_deps->pending_jump_insns);
2645 succ_deps->last_pending_memory_flush
2646 = concat_INSN_LIST (pred_deps->last_pending_memory_flush,
2647 succ_deps->last_pending_memory_flush);
2648
2649 succ_deps->pending_read_list_length += pred_deps->pending_read_list_length;
2650 succ_deps->pending_write_list_length += pred_deps->pending_write_list_length;
2651 succ_deps->pending_flush_length += pred_deps->pending_flush_length;
2652
2653 /* last_function_call is inherited by successor. */
2654 succ_deps->last_function_call
2655 = concat_INSN_LIST (pred_deps->last_function_call,
2656 succ_deps->last_function_call);
2657
2658 /* last_function_call_may_noreturn is inherited by successor. */
2659 succ_deps->last_function_call_may_noreturn
2660 = concat_INSN_LIST (pred_deps->last_function_call_may_noreturn,
2661 succ_deps->last_function_call_may_noreturn);
2662
2663 /* sched_before_next_call is inherited by successor. */
2664 succ_deps->sched_before_next_call
2665 = concat_INSN_LIST (pred_deps->sched_before_next_call,
2666 succ_deps->sched_before_next_call);
2667 }
2668
2669 /* After computing the dependencies for block BB, propagate the dependencies
2670 found in TMP_DEPS to the successors of the block. */
2671 static void
2672 propagate_deps (int bb, struct deps_desc *pred_deps)
2673 {
2674 basic_block block = BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (bb));
2675 edge_iterator ei;
2676 edge e;
2677
2678 /* bb's structures are inherited by its successors. */
2679 FOR_EACH_EDGE (e, ei, block->succs)
2680 {
2681 /* Only bbs "below" bb, in the same region, are interesting. */
2682 if (e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)
2683 || CONTAINING_RGN (block->index) != CONTAINING_RGN (e->dest->index)
2684 || BLOCK_TO_BB (e->dest->index) <= bb)
2685 continue;
2686
2687 deps_join (bb_deps + BLOCK_TO_BB (e->dest->index), pred_deps);
2688 }
2689
2690 /* These lists should point to the right place, for correct
2691 freeing later. */
2692 bb_deps[bb].pending_read_insns = pred_deps->pending_read_insns;
2693 bb_deps[bb].pending_read_mems = pred_deps->pending_read_mems;
2694 bb_deps[bb].pending_write_insns = pred_deps->pending_write_insns;
2695 bb_deps[bb].pending_write_mems = pred_deps->pending_write_mems;
2696 bb_deps[bb].pending_jump_insns = pred_deps->pending_jump_insns;
2697
2698 /* Can't allow these to be freed twice. */
2699 pred_deps->pending_read_insns = 0;
2700 pred_deps->pending_read_mems = 0;
2701 pred_deps->pending_write_insns = 0;
2702 pred_deps->pending_write_mems = 0;
2703 pred_deps->pending_jump_insns = 0;
2704 }
2705
2706 /* Compute dependences inside bb. In a multiple blocks region:
2707 (1) a bb is analyzed after its predecessors, and (2) the lists in
2708 effect at the end of bb (after analyzing for bb) are inherited by
2709 bb's successors.
2710
2711 Specifically for reg-reg data dependences, the block insns are
2712 scanned by sched_analyze () top-to-bottom. Three lists are
2713 maintained by sched_analyze (): reg_last[].sets for register DEFs,
2714 reg_last[].implicit_sets for implicit hard register DEFs, and
2715 reg_last[].uses for register USEs.
2716
2717 When analysis is completed for bb, we update for its successors:
2718 ; - DEFS[succ] = Union (DEFS [succ], DEFS [bb])
2719 ; - IMPLICIT_DEFS[succ] = Union (IMPLICIT_DEFS [succ], IMPLICIT_DEFS [bb])
2720 ; - USES[succ] = Union (USES [succ], DEFS [bb])
2721
2722 The mechanism for computing mem-mem data dependence is very
2723 similar, and the result is interblock dependences in the region. */
2724
2725 static void
2726 compute_block_dependences (int bb)
2727 {
2728 rtx_insn *head, *tail;
2729 struct deps_desc tmp_deps;
2730
2731 tmp_deps = bb_deps[bb];
2732
2733 /* Do the analysis for this block. */
2734 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2735 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2736
2737 sched_analyze (&tmp_deps, head, tail);
2738
2739 /* Selective scheduling handles control dependencies by itself. */
2740 if (!sel_sched_p ())
2741 add_branch_dependences (head, tail);
2742
2743 if (current_nr_blocks > 1)
2744 propagate_deps (bb, &tmp_deps);
2745
2746 /* Free up the INSN_LISTs. */
2747 free_deps (&tmp_deps);
2748
2749 if (targetm.sched.dependencies_evaluation_hook)
2750 targetm.sched.dependencies_evaluation_hook (head, tail);
2751 }
2752
2753 /* Free dependencies of instructions inside BB. */
2754 static void
2755 free_block_dependencies (int bb)
2756 {
2757 rtx_insn *head;
2758 rtx_insn *tail;
2759
2760 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2761
2762 if (no_real_insns_p (head, tail))
2763 return;
2764
2765 sched_free_deps (head, tail, true);
2766 }
2767
2768 /* Remove all INSN_LISTs and EXPR_LISTs from the pending lists and add
2769 them to the unused_*_list variables, so that they can be reused. */
2770
2771 static void
2772 free_pending_lists (void)
2773 {
2774 int bb;
2775
2776 for (bb = 0; bb < current_nr_blocks; bb++)
2777 {
2778 free_INSN_LIST_list (&bb_deps[bb].pending_read_insns);
2779 free_INSN_LIST_list (&bb_deps[bb].pending_write_insns);
2780 free_EXPR_LIST_list (&bb_deps[bb].pending_read_mems);
2781 free_EXPR_LIST_list (&bb_deps[bb].pending_write_mems);
2782 free_INSN_LIST_list (&bb_deps[bb].pending_jump_insns);
2783 }
2784 }
2785 \f
2786 /* Print dependences for debugging starting from FROM_BB.
2787 Callable from debugger. */
2788 /* Print dependences for debugging starting from FROM_BB.
2789 Callable from debugger. */
2790 DEBUG_FUNCTION void
2791 debug_rgn_dependencies (int from_bb)
2792 {
2793 int bb;
2794
2795 fprintf (sched_dump,
2796 ";; --------------- forward dependences: ------------ \n");
2797
2798 for (bb = from_bb; bb < current_nr_blocks; bb++)
2799 {
2800 rtx_insn *head, *tail;
2801
2802 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2803 fprintf (sched_dump, "\n;; --- Region Dependences --- b %d bb %d \n",
2804 BB_TO_BLOCK (bb), bb);
2805
2806 debug_dependencies (head, tail);
2807 }
2808 }
2809
2810 /* Print dependencies information for instructions between HEAD and TAIL.
2811 ??? This function would probably fit best in haifa-sched.c. */
2812 void debug_dependencies (rtx_insn *head, rtx_insn *tail)
2813 {
2814 rtx_insn *insn;
2815 rtx_insn *next_tail = NEXT_INSN (tail);
2816
2817 fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
2818 "insn", "code", "bb", "dep", "prio", "cost",
2819 "reservation");
2820 fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n",
2821 "----", "----", "--", "---", "----", "----",
2822 "-----------");
2823
2824 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
2825 {
2826 if (! INSN_P (insn))
2827 {
2828 int n;
2829 fprintf (sched_dump, ";; %6d ", INSN_UID (insn));
2830 if (NOTE_P (insn))
2831 {
2832 n = NOTE_KIND (insn);
2833 fprintf (sched_dump, "%s\n", GET_NOTE_INSN_NAME (n));
2834 }
2835 else
2836 fprintf (sched_dump, " {%s}\n", GET_RTX_NAME (GET_CODE (insn)));
2837 continue;
2838 }
2839
2840 fprintf (sched_dump,
2841 ";; %s%5d%6d%6d%6d%6d%6d ",
2842 (SCHED_GROUP_P (insn) ? "+" : " "),
2843 INSN_UID (insn),
2844 INSN_CODE (insn),
2845 BLOCK_NUM (insn),
2846 sched_emulate_haifa_p ? -1 : sd_lists_size (insn, SD_LIST_BACK),
2847 (sel_sched_p () ? (sched_emulate_haifa_p ? -1
2848 : INSN_PRIORITY (insn))
2849 : INSN_PRIORITY (insn)),
2850 (sel_sched_p () ? (sched_emulate_haifa_p ? -1
2851 : insn_cost (insn))
2852 : insn_cost (insn)));
2853
2854 if (recog_memoized (insn) < 0)
2855 fprintf (sched_dump, "nothing");
2856 else
2857 print_reservation (sched_dump, insn);
2858
2859 fprintf (sched_dump, "\t: ");
2860 {
2861 sd_iterator_def sd_it;
2862 dep_t dep;
2863
2864 FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep)
2865 fprintf (sched_dump, "%d%s%s ", INSN_UID (DEP_CON (dep)),
2866 DEP_NONREG (dep) ? "n" : "",
2867 DEP_MULTIPLE (dep) ? "m" : "");
2868 }
2869 fprintf (sched_dump, "\n");
2870 }
2871
2872 fprintf (sched_dump, "\n");
2873 }
2874 \f
2875 /* Returns true if all the basic blocks of the current region have
2876 NOTE_DISABLE_SCHED_OF_BLOCK which means not to schedule that region. */
2877 bool
2878 sched_is_disabled_for_current_region_p (void)
2879 {
2880 int bb;
2881
2882 for (bb = 0; bb < current_nr_blocks; bb++)
2883 if (!(BASIC_BLOCK_FOR_FN (cfun,
2884 BB_TO_BLOCK (bb))->flags & BB_DISABLE_SCHEDULE))
2885 return false;
2886
2887 return true;
2888 }
2889
2890 /* Free all region dependencies saved in INSN_BACK_DEPS and
2891 INSN_RESOLVED_BACK_DEPS. The Haifa scheduler does this on the fly
2892 when scheduling, so this function is supposed to be called from
2893 the selective scheduling only. */
2894 void
2895 free_rgn_deps (void)
2896 {
2897 int bb;
2898
2899 for (bb = 0; bb < current_nr_blocks; bb++)
2900 {
2901 rtx_insn *head, *tail;
2902
2903 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2904 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2905
2906 sched_free_deps (head, tail, false);
2907 }
2908 }
2909
2910 static int rgn_n_insns;
2911
2912 /* Compute insn priority for a current region. */
2913 void
2914 compute_priorities (void)
2915 {
2916 int bb;
2917
2918 current_sched_info->sched_max_insns_priority = 0;
2919 for (bb = 0; bb < current_nr_blocks; bb++)
2920 {
2921 rtx_insn *head, *tail;
2922
2923 gcc_assert (EBB_FIRST_BB (bb) == EBB_LAST_BB (bb));
2924 get_ebb_head_tail (EBB_FIRST_BB (bb), EBB_LAST_BB (bb), &head, &tail);
2925
2926 if (no_real_insns_p (head, tail))
2927 continue;
2928
2929 rgn_n_insns += set_priorities (head, tail);
2930 }
2931 current_sched_info->sched_max_insns_priority++;
2932 }
2933
2934 /* (Re-)initialize the arrays of DFA states at the end of each basic block.
2935
2936 SAVED_LAST_BASIC_BLOCK is the previous length of the arrays. It must be
2937 zero for the first call to this function, to allocate the arrays for the
2938 first time.
2939
2940 This function is called once during initialization of the scheduler, and
2941 called again to resize the arrays if new basic blocks have been created,
2942 for example for speculation recovery code. */
2943
2944 static void
2945 realloc_bb_state_array (int saved_last_basic_block)
2946 {
2947 char *old_bb_state_array = bb_state_array;
2948 size_t lbb = (size_t) last_basic_block_for_fn (cfun);
2949 size_t slbb = (size_t) saved_last_basic_block;
2950
2951 /* Nothing to do if nothing changed since the last time this was called. */
2952 if (saved_last_basic_block == last_basic_block_for_fn (cfun))
2953 return;
2954
2955 /* The selective scheduler doesn't use the state arrays. */
2956 if (sel_sched_p ())
2957 {
2958 gcc_assert (bb_state_array == NULL && bb_state == NULL);
2959 return;
2960 }
2961
2962 gcc_checking_assert (saved_last_basic_block == 0
2963 || (bb_state_array != NULL && bb_state != NULL));
2964
2965 bb_state_array = XRESIZEVEC (char, bb_state_array, lbb * dfa_state_size);
2966 bb_state = XRESIZEVEC (state_t, bb_state, lbb);
2967
2968 /* If BB_STATE_ARRAY has moved, fixup all the state pointers array.
2969 Otherwise only fixup the newly allocated ones. For the state
2970 array itself, only initialize the new entries. */
2971 bool bb_state_array_moved = (bb_state_array != old_bb_state_array);
2972 for (size_t i = bb_state_array_moved ? 0 : slbb; i < lbb; i++)
2973 bb_state[i] = (state_t) (bb_state_array + i * dfa_state_size);
2974 for (size_t i = slbb; i < lbb; i++)
2975 state_reset (bb_state[i]);
2976 }
2977
2978 /* Free the arrays of DFA states at the end of each basic block. */
2979
2980 static void
2981 free_bb_state_array (void)
2982 {
2983 free (bb_state_array);
2984 free (bb_state);
2985 bb_state_array = NULL;
2986 bb_state = NULL;
2987 }
2988
2989 /* Schedule a region. A region is either an inner loop, a loop-free
2990 subroutine, or a single basic block. Each bb in the region is
2991 scheduled after its flow predecessors. */
2992
2993 static void
2994 schedule_region (int rgn)
2995 {
2996 int bb;
2997 int sched_rgn_n_insns = 0;
2998
2999 rgn_n_insns = 0;
3000
3001 /* Do not support register pressure sensitive scheduling for the new regions
3002 as we don't update the liveness info for them. */
3003 if (sched_pressure != SCHED_PRESSURE_NONE
3004 && rgn >= nr_regions_initial)
3005 {
3006 free_global_sched_pressure_data ();
3007 sched_pressure = SCHED_PRESSURE_NONE;
3008 }
3009
3010 rgn_setup_region (rgn);
3011
3012 /* Don't schedule region that is marked by
3013 NOTE_DISABLE_SCHED_OF_BLOCK. */
3014 if (sched_is_disabled_for_current_region_p ())
3015 return;
3016
3017 sched_rgn_compute_dependencies (rgn);
3018
3019 sched_rgn_local_init (rgn);
3020
3021 /* Set priorities. */
3022 compute_priorities ();
3023
3024 sched_extend_ready_list (rgn_n_insns);
3025
3026 if (sched_pressure == SCHED_PRESSURE_WEIGHTED)
3027 {
3028 sched_init_region_reg_pressure_info ();
3029 for (bb = 0; bb < current_nr_blocks; bb++)
3030 {
3031 basic_block first_bb, last_bb;
3032 rtx_insn *head, *tail;
3033
3034 first_bb = EBB_FIRST_BB (bb);
3035 last_bb = EBB_LAST_BB (bb);
3036
3037 get_ebb_head_tail (first_bb, last_bb, &head, &tail);
3038
3039 if (no_real_insns_p (head, tail))
3040 {
3041 gcc_assert (first_bb == last_bb);
3042 continue;
3043 }
3044 sched_setup_bb_reg_pressure_info (first_bb, PREV_INSN (head));
3045 }
3046 }
3047
3048 /* Now we can schedule all blocks. */
3049 for (bb = 0; bb < current_nr_blocks; bb++)
3050 {
3051 basic_block first_bb, last_bb, curr_bb;
3052 rtx_insn *head, *tail;
3053
3054 first_bb = EBB_FIRST_BB (bb);
3055 last_bb = EBB_LAST_BB (bb);
3056
3057 get_ebb_head_tail (first_bb, last_bb, &head, &tail);
3058
3059 if (no_real_insns_p (head, tail))
3060 {
3061 gcc_assert (first_bb == last_bb);
3062 continue;
3063 }
3064
3065 current_sched_info->prev_head = PREV_INSN (head);
3066 current_sched_info->next_tail = NEXT_INSN (tail);
3067
3068 remove_notes (head, tail);
3069
3070 unlink_bb_notes (first_bb, last_bb);
3071
3072 target_bb = bb;
3073
3074 gcc_assert (flag_schedule_interblock || current_nr_blocks == 1);
3075 current_sched_info->queue_must_finish_empty = current_nr_blocks == 1;
3076
3077 curr_bb = first_bb;
3078 if (dbg_cnt (sched_block))
3079 {
3080 edge f;
3081 int saved_last_basic_block = last_basic_block_for_fn (cfun);
3082
3083 schedule_block (&curr_bb, bb_state[first_bb->index]);
3084 gcc_assert (EBB_FIRST_BB (bb) == first_bb);
3085 sched_rgn_n_insns += sched_n_insns;
3086 realloc_bb_state_array (saved_last_basic_block);
3087 f = find_fallthru_edge (last_bb->succs);
3088 if (f && f->probability * 100 / REG_BR_PROB_BASE >=
3089 PARAM_VALUE (PARAM_SCHED_STATE_EDGE_PROB_CUTOFF))
3090 {
3091 memcpy (bb_state[f->dest->index], curr_state,
3092 dfa_state_size);
3093 if (sched_verbose >= 5)
3094 fprintf (sched_dump, "saving state for edge %d->%d\n",
3095 f->src->index, f->dest->index);
3096 }
3097 }
3098 else
3099 {
3100 sched_rgn_n_insns += rgn_n_insns;
3101 }
3102
3103 /* Clean up. */
3104 if (current_nr_blocks > 1)
3105 free_trg_info ();
3106 }
3107
3108 /* Sanity check: verify that all region insns were scheduled. */
3109 gcc_assert (sched_rgn_n_insns == rgn_n_insns);
3110
3111 sched_finish_ready_list ();
3112
3113 /* Done with this region. */
3114 sched_rgn_local_finish ();
3115
3116 /* Free dependencies. */
3117 for (bb = 0; bb < current_nr_blocks; ++bb)
3118 free_block_dependencies (bb);
3119
3120 gcc_assert (haifa_recovery_bb_ever_added_p
3121 || deps_pools_are_empty_p ());
3122 }
3123
3124 /* Initialize data structures for region scheduling. */
3125
3126 void
3127 sched_rgn_init (bool single_blocks_p)
3128 {
3129 min_spec_prob = ((PARAM_VALUE (PARAM_MIN_SPEC_PROB) * REG_BR_PROB_BASE)
3130 / 100);
3131
3132 nr_inter = 0;
3133 nr_spec = 0;
3134
3135 extend_regions ();
3136
3137 CONTAINING_RGN (ENTRY_BLOCK) = -1;
3138 CONTAINING_RGN (EXIT_BLOCK) = -1;
3139
3140 realloc_bb_state_array (0);
3141
3142 /* Compute regions for scheduling. */
3143 if (single_blocks_p
3144 || n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS + 1
3145 || !flag_schedule_interblock
3146 || is_cfg_nonregular ())
3147 {
3148 find_single_block_region (sel_sched_p ());
3149 }
3150 else
3151 {
3152 /* Compute the dominators and post dominators. */
3153 if (!sel_sched_p ())
3154 calculate_dominance_info (CDI_DOMINATORS);
3155
3156 /* Find regions. */
3157 find_rgns ();
3158
3159 if (sched_verbose >= 3)
3160 debug_regions ();
3161
3162 /* For now. This will move as more and more of haifa is converted
3163 to using the cfg code. */
3164 if (!sel_sched_p ())
3165 free_dominance_info (CDI_DOMINATORS);
3166 }
3167
3168 gcc_assert (0 < nr_regions && nr_regions <= n_basic_blocks_for_fn (cfun));
3169
3170 RGN_BLOCKS (nr_regions) = (RGN_BLOCKS (nr_regions - 1) +
3171 RGN_NR_BLOCKS (nr_regions - 1));
3172 nr_regions_initial = nr_regions;
3173 }
3174
3175 /* Free data structures for region scheduling. */
3176 void
3177 sched_rgn_finish (void)
3178 {
3179 free_bb_state_array ();
3180
3181 /* Reposition the prologue and epilogue notes in case we moved the
3182 prologue/epilogue insns. */
3183 if (reload_completed)
3184 reposition_prologue_and_epilogue_notes ();
3185
3186 if (sched_verbose)
3187 {
3188 if (reload_completed == 0
3189 && flag_schedule_interblock)
3190 {
3191 fprintf (sched_dump,
3192 "\n;; Procedure interblock/speculative motions == %d/%d \n",
3193 nr_inter, nr_spec);
3194 }
3195 else
3196 gcc_assert (nr_inter <= 0);
3197 fprintf (sched_dump, "\n\n");
3198 }
3199
3200 nr_regions = 0;
3201
3202 free (rgn_table);
3203 rgn_table = NULL;
3204
3205 free (rgn_bb_table);
3206 rgn_bb_table = NULL;
3207
3208 free (block_to_bb);
3209 block_to_bb = NULL;
3210
3211 free (containing_rgn);
3212 containing_rgn = NULL;
3213
3214 free (ebb_head);
3215 ebb_head = NULL;
3216 }
3217
3218 /* Setup global variables like CURRENT_BLOCKS and CURRENT_NR_BLOCK to
3219 point to the region RGN. */
3220 void
3221 rgn_setup_region (int rgn)
3222 {
3223 int bb;
3224
3225 /* Set variables for the current region. */
3226 current_nr_blocks = RGN_NR_BLOCKS (rgn);
3227 current_blocks = RGN_BLOCKS (rgn);
3228
3229 /* EBB_HEAD is a region-scope structure. But we realloc it for
3230 each region to save time/memory/something else.
3231 See comments in add_block1, for what reasons we allocate +1 element. */
3232 ebb_head = XRESIZEVEC (int, ebb_head, current_nr_blocks + 1);
3233 for (bb = 0; bb <= current_nr_blocks; bb++)
3234 ebb_head[bb] = current_blocks + bb;
3235 }
3236
3237 /* Compute instruction dependencies in region RGN. */
3238 void
3239 sched_rgn_compute_dependencies (int rgn)
3240 {
3241 if (!RGN_DONT_CALC_DEPS (rgn))
3242 {
3243 int bb;
3244
3245 if (sel_sched_p ())
3246 sched_emulate_haifa_p = 1;
3247
3248 init_deps_global ();
3249
3250 /* Initializations for region data dependence analysis. */
3251 bb_deps = XNEWVEC (struct deps_desc, current_nr_blocks);
3252 for (bb = 0; bb < current_nr_blocks; bb++)
3253 init_deps (bb_deps + bb, false);
3254
3255 /* Initialize bitmap used in add_branch_dependences. */
3256 insn_referenced = sbitmap_alloc (sched_max_luid);
3257 bitmap_clear (insn_referenced);
3258
3259 /* Compute backward dependencies. */
3260 for (bb = 0; bb < current_nr_blocks; bb++)
3261 compute_block_dependences (bb);
3262
3263 sbitmap_free (insn_referenced);
3264 free_pending_lists ();
3265 finish_deps_global ();
3266 free (bb_deps);
3267
3268 /* We don't want to recalculate this twice. */
3269 RGN_DONT_CALC_DEPS (rgn) = 1;
3270
3271 if (sel_sched_p ())
3272 sched_emulate_haifa_p = 0;
3273 }
3274 else
3275 /* (This is a recovery block. It is always a single block region.)
3276 OR (We use selective scheduling.) */
3277 gcc_assert (current_nr_blocks == 1 || sel_sched_p ());
3278 }
3279
3280 /* Init region data structures. Returns true if this region should
3281 not be scheduled. */
3282 void
3283 sched_rgn_local_init (int rgn)
3284 {
3285 int bb;
3286
3287 /* Compute interblock info: probabilities, split-edges, dominators, etc. */
3288 if (current_nr_blocks > 1)
3289 {
3290 basic_block block;
3291 edge e;
3292 edge_iterator ei;
3293
3294 prob = XNEWVEC (int, current_nr_blocks);
3295
3296 dom = sbitmap_vector_alloc (current_nr_blocks, current_nr_blocks);
3297 bitmap_vector_clear (dom, current_nr_blocks);
3298
3299 /* Use ->aux to implement EDGE_TO_BIT mapping. */
3300 rgn_nr_edges = 0;
3301 FOR_EACH_BB_FN (block, cfun)
3302 {
3303 if (CONTAINING_RGN (block->index) != rgn)
3304 continue;
3305 FOR_EACH_EDGE (e, ei, block->succs)
3306 SET_EDGE_TO_BIT (e, rgn_nr_edges++);
3307 }
3308
3309 rgn_edges = XNEWVEC (edge, rgn_nr_edges);
3310 rgn_nr_edges = 0;
3311 FOR_EACH_BB_FN (block, cfun)
3312 {
3313 if (CONTAINING_RGN (block->index) != rgn)
3314 continue;
3315 FOR_EACH_EDGE (e, ei, block->succs)
3316 rgn_edges[rgn_nr_edges++] = e;
3317 }
3318
3319 /* Split edges. */
3320 pot_split = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges);
3321 bitmap_vector_clear (pot_split, current_nr_blocks);
3322 ancestor_edges = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges);
3323 bitmap_vector_clear (ancestor_edges, current_nr_blocks);
3324
3325 /* Compute probabilities, dominators, split_edges. */
3326 for (bb = 0; bb < current_nr_blocks; bb++)
3327 compute_dom_prob_ps (bb);
3328
3329 /* Cleanup ->aux used for EDGE_TO_BIT mapping. */
3330 /* We don't need them anymore. But we want to avoid duplication of
3331 aux fields in the newly created edges. */
3332 FOR_EACH_BB_FN (block, cfun)
3333 {
3334 if (CONTAINING_RGN (block->index) != rgn)
3335 continue;
3336 FOR_EACH_EDGE (e, ei, block->succs)
3337 e->aux = NULL;
3338 }
3339 }
3340 }
3341
3342 /* Free data computed for the finished region. */
3343 void
3344 sched_rgn_local_free (void)
3345 {
3346 free (prob);
3347 sbitmap_vector_free (dom);
3348 sbitmap_vector_free (pot_split);
3349 sbitmap_vector_free (ancestor_edges);
3350 free (rgn_edges);
3351 }
3352
3353 /* Free data computed for the finished region. */
3354 void
3355 sched_rgn_local_finish (void)
3356 {
3357 if (current_nr_blocks > 1 && !sel_sched_p ())
3358 {
3359 sched_rgn_local_free ();
3360 }
3361 }
3362
3363 /* Setup scheduler infos. */
3364 void
3365 rgn_setup_common_sched_info (void)
3366 {
3367 memcpy (&rgn_common_sched_info, &haifa_common_sched_info,
3368 sizeof (rgn_common_sched_info));
3369
3370 rgn_common_sched_info.fix_recovery_cfg = rgn_fix_recovery_cfg;
3371 rgn_common_sched_info.add_block = rgn_add_block;
3372 rgn_common_sched_info.estimate_number_of_insns
3373 = rgn_estimate_number_of_insns;
3374 rgn_common_sched_info.sched_pass_id = SCHED_RGN_PASS;
3375
3376 common_sched_info = &rgn_common_sched_info;
3377 }
3378
3379 /* Setup all *_sched_info structures (for the Haifa frontend
3380 and for the dependence analysis) in the interblock scheduler. */
3381 void
3382 rgn_setup_sched_infos (void)
3383 {
3384 if (!sel_sched_p ())
3385 memcpy (&rgn_sched_deps_info, &rgn_const_sched_deps_info,
3386 sizeof (rgn_sched_deps_info));
3387 else
3388 memcpy (&rgn_sched_deps_info, &rgn_const_sel_sched_deps_info,
3389 sizeof (rgn_sched_deps_info));
3390
3391 sched_deps_info = &rgn_sched_deps_info;
3392
3393 memcpy (&rgn_sched_info, &rgn_const_sched_info, sizeof (rgn_sched_info));
3394 current_sched_info = &rgn_sched_info;
3395 }
3396
3397 /* The one entry point in this file. */
3398 void
3399 schedule_insns (void)
3400 {
3401 int rgn;
3402
3403 /* Taking care of this degenerate case makes the rest of
3404 this code simpler. */
3405 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3406 return;
3407
3408 rgn_setup_common_sched_info ();
3409 rgn_setup_sched_infos ();
3410
3411 haifa_sched_init ();
3412 sched_rgn_init (reload_completed);
3413
3414 bitmap_initialize (&not_in_df, 0);
3415 bitmap_clear (&not_in_df);
3416
3417 /* Schedule every region in the subroutine. */
3418 for (rgn = 0; rgn < nr_regions; rgn++)
3419 if (dbg_cnt (sched_region))
3420 schedule_region (rgn);
3421
3422 /* Clean up. */
3423 sched_rgn_finish ();
3424 bitmap_clear (&not_in_df);
3425
3426 haifa_sched_finish ();
3427 }
3428
3429 /* INSN has been added to/removed from current region. */
3430 static void
3431 rgn_add_remove_insn (rtx_insn *insn, int remove_p)
3432 {
3433 if (!remove_p)
3434 rgn_n_insns++;
3435 else
3436 rgn_n_insns--;
3437
3438 if (INSN_BB (insn) == target_bb)
3439 {
3440 if (!remove_p)
3441 target_n_insns++;
3442 else
3443 target_n_insns--;
3444 }
3445 }
3446
3447 /* Extend internal data structures. */
3448 void
3449 extend_regions (void)
3450 {
3451 rgn_table = XRESIZEVEC (region, rgn_table, n_basic_blocks_for_fn (cfun));
3452 rgn_bb_table = XRESIZEVEC (int, rgn_bb_table,
3453 n_basic_blocks_for_fn (cfun));
3454 block_to_bb = XRESIZEVEC (int, block_to_bb,
3455 last_basic_block_for_fn (cfun));
3456 containing_rgn = XRESIZEVEC (int, containing_rgn,
3457 last_basic_block_for_fn (cfun));
3458 }
3459
3460 void
3461 rgn_make_new_region_out_of_new_block (basic_block bb)
3462 {
3463 int i;
3464
3465 i = RGN_BLOCKS (nr_regions);
3466 /* I - first free position in rgn_bb_table. */
3467
3468 rgn_bb_table[i] = bb->index;
3469 RGN_NR_BLOCKS (nr_regions) = 1;
3470 RGN_HAS_REAL_EBB (nr_regions) = 0;
3471 RGN_DONT_CALC_DEPS (nr_regions) = 0;
3472 CONTAINING_RGN (bb->index) = nr_regions;
3473 BLOCK_TO_BB (bb->index) = 0;
3474
3475 nr_regions++;
3476
3477 RGN_BLOCKS (nr_regions) = i + 1;
3478 }
3479
3480 /* BB was added to ebb after AFTER. */
3481 static void
3482 rgn_add_block (basic_block bb, basic_block after)
3483 {
3484 extend_regions ();
3485 bitmap_set_bit (&not_in_df, bb->index);
3486
3487 if (after == 0 || after == EXIT_BLOCK_PTR_FOR_FN (cfun))
3488 {
3489 rgn_make_new_region_out_of_new_block (bb);
3490 RGN_DONT_CALC_DEPS (nr_regions - 1) = (after
3491 == EXIT_BLOCK_PTR_FOR_FN (cfun));
3492 }
3493 else
3494 {
3495 int i, pos;
3496
3497 /* We need to fix rgn_table, block_to_bb, containing_rgn
3498 and ebb_head. */
3499
3500 BLOCK_TO_BB (bb->index) = BLOCK_TO_BB (after->index);
3501
3502 /* We extend ebb_head to one more position to
3503 easily find the last position of the last ebb in
3504 the current region. Thus, ebb_head[BLOCK_TO_BB (after) + 1]
3505 is _always_ valid for access. */
3506
3507 i = BLOCK_TO_BB (after->index) + 1;
3508 pos = ebb_head[i] - 1;
3509 /* Now POS is the index of the last block in the region. */
3510
3511 /* Find index of basic block AFTER. */
3512 for (; rgn_bb_table[pos] != after->index; pos--)
3513 ;
3514
3515 pos++;
3516 gcc_assert (pos > ebb_head[i - 1]);
3517
3518 /* i - ebb right after "AFTER". */
3519 /* ebb_head[i] - VALID. */
3520
3521 /* Source position: ebb_head[i]
3522 Destination position: ebb_head[i] + 1
3523 Last position:
3524 RGN_BLOCKS (nr_regions) - 1
3525 Number of elements to copy: (last_position) - (source_position) + 1
3526 */
3527
3528 memmove (rgn_bb_table + pos + 1,
3529 rgn_bb_table + pos,
3530 ((RGN_BLOCKS (nr_regions) - 1) - (pos) + 1)
3531 * sizeof (*rgn_bb_table));
3532
3533 rgn_bb_table[pos] = bb->index;
3534
3535 for (; i <= current_nr_blocks; i++)
3536 ebb_head [i]++;
3537
3538 i = CONTAINING_RGN (after->index);
3539 CONTAINING_RGN (bb->index) = i;
3540
3541 RGN_HAS_REAL_EBB (i) = 1;
3542
3543 for (++i; i <= nr_regions; i++)
3544 RGN_BLOCKS (i)++;
3545 }
3546 }
3547
3548 /* Fix internal data after interblock movement of jump instruction.
3549 For parameter meaning please refer to
3550 sched-int.h: struct sched_info: fix_recovery_cfg. */
3551 static void
3552 rgn_fix_recovery_cfg (int bbi, int check_bbi, int check_bb_nexti)
3553 {
3554 int old_pos, new_pos, i;
3555
3556 BLOCK_TO_BB (check_bb_nexti) = BLOCK_TO_BB (bbi);
3557
3558 for (old_pos = ebb_head[BLOCK_TO_BB (check_bbi) + 1] - 1;
3559 rgn_bb_table[old_pos] != check_bb_nexti;
3560 old_pos--)
3561 ;
3562 gcc_assert (old_pos > ebb_head[BLOCK_TO_BB (check_bbi)]);
3563
3564 for (new_pos = ebb_head[BLOCK_TO_BB (bbi) + 1] - 1;
3565 rgn_bb_table[new_pos] != bbi;
3566 new_pos--)
3567 ;
3568 new_pos++;
3569 gcc_assert (new_pos > ebb_head[BLOCK_TO_BB (bbi)]);
3570
3571 gcc_assert (new_pos < old_pos);
3572
3573 memmove (rgn_bb_table + new_pos + 1,
3574 rgn_bb_table + new_pos,
3575 (old_pos - new_pos) * sizeof (*rgn_bb_table));
3576
3577 rgn_bb_table[new_pos] = check_bb_nexti;
3578
3579 for (i = BLOCK_TO_BB (bbi) + 1; i <= BLOCK_TO_BB (check_bbi); i++)
3580 ebb_head[i]++;
3581 }
3582
3583 /* Return next block in ebb chain. For parameter meaning please refer to
3584 sched-int.h: struct sched_info: advance_target_bb. */
3585 static basic_block
3586 advance_target_bb (basic_block bb, rtx_insn *insn)
3587 {
3588 if (insn)
3589 return 0;
3590
3591 gcc_assert (BLOCK_TO_BB (bb->index) == target_bb
3592 && BLOCK_TO_BB (bb->next_bb->index) == target_bb);
3593 return bb->next_bb;
3594 }
3595
3596 #endif
3597 \f
3598 /* Run instruction scheduler. */
3599 static unsigned int
3600 rest_of_handle_live_range_shrinkage (void)
3601 {
3602 #ifdef INSN_SCHEDULING
3603 int saved;
3604
3605 initialize_live_range_shrinkage ();
3606 saved = flag_schedule_interblock;
3607 flag_schedule_interblock = false;
3608 schedule_insns ();
3609 flag_schedule_interblock = saved;
3610 finish_live_range_shrinkage ();
3611 #endif
3612 return 0;
3613 }
3614
3615 /* Run instruction scheduler. */
3616 static unsigned int
3617 rest_of_handle_sched (void)
3618 {
3619 #ifdef INSN_SCHEDULING
3620 if (flag_selective_scheduling
3621 && ! maybe_skip_selective_scheduling ())
3622 run_selective_scheduling ();
3623 else
3624 schedule_insns ();
3625 #endif
3626 return 0;
3627 }
3628
3629 /* Run second scheduling pass after reload. */
3630 static unsigned int
3631 rest_of_handle_sched2 (void)
3632 {
3633 #ifdef INSN_SCHEDULING
3634 if (flag_selective_scheduling2
3635 && ! maybe_skip_selective_scheduling ())
3636 run_selective_scheduling ();
3637 else
3638 {
3639 /* Do control and data sched analysis again,
3640 and write some more of the results to dump file. */
3641 if (flag_sched2_use_superblocks)
3642 schedule_ebbs ();
3643 else
3644 schedule_insns ();
3645 }
3646 #endif
3647 return 0;
3648 }
3649
3650 namespace {
3651
3652 const pass_data pass_data_live_range_shrinkage =
3653 {
3654 RTL_PASS, /* type */
3655 "lr_shrinkage", /* name */
3656 OPTGROUP_NONE, /* optinfo_flags */
3657 TV_LIVE_RANGE_SHRINKAGE, /* tv_id */
3658 0, /* properties_required */
3659 0, /* properties_provided */
3660 0, /* properties_destroyed */
3661 0, /* todo_flags_start */
3662 TODO_df_finish, /* todo_flags_finish */
3663 };
3664
3665 class pass_live_range_shrinkage : public rtl_opt_pass
3666 {
3667 public:
3668 pass_live_range_shrinkage(gcc::context *ctxt)
3669 : rtl_opt_pass(pass_data_live_range_shrinkage, ctxt)
3670 {}
3671
3672 /* opt_pass methods: */
3673 virtual bool gate (function *)
3674 {
3675 #ifdef INSN_SCHEDULING
3676 return flag_live_range_shrinkage;
3677 #else
3678 return 0;
3679 #endif
3680 }
3681
3682 virtual unsigned int execute (function *)
3683 {
3684 return rest_of_handle_live_range_shrinkage ();
3685 }
3686
3687 }; // class pass_live_range_shrinkage
3688
3689 } // anon namespace
3690
3691 rtl_opt_pass *
3692 make_pass_live_range_shrinkage (gcc::context *ctxt)
3693 {
3694 return new pass_live_range_shrinkage (ctxt);
3695 }
3696
3697 namespace {
3698
3699 const pass_data pass_data_sched =
3700 {
3701 RTL_PASS, /* type */
3702 "sched1", /* name */
3703 OPTGROUP_NONE, /* optinfo_flags */
3704 TV_SCHED, /* tv_id */
3705 0, /* properties_required */
3706 0, /* properties_provided */
3707 0, /* properties_destroyed */
3708 0, /* todo_flags_start */
3709 TODO_df_finish, /* todo_flags_finish */
3710 };
3711
3712 class pass_sched : public rtl_opt_pass
3713 {
3714 public:
3715 pass_sched (gcc::context *ctxt)
3716 : rtl_opt_pass (pass_data_sched, ctxt)
3717 {}
3718
3719 /* opt_pass methods: */
3720 virtual bool gate (function *);
3721 virtual unsigned int execute (function *) { return rest_of_handle_sched (); }
3722
3723 }; // class pass_sched
3724
3725 bool
3726 pass_sched::gate (function *)
3727 {
3728 #ifdef INSN_SCHEDULING
3729 return optimize > 0 && flag_schedule_insns && dbg_cnt (sched_func);
3730 #else
3731 return 0;
3732 #endif
3733 }
3734
3735 } // anon namespace
3736
3737 rtl_opt_pass *
3738 make_pass_sched (gcc::context *ctxt)
3739 {
3740 return new pass_sched (ctxt);
3741 }
3742
3743 namespace {
3744
3745 const pass_data pass_data_sched2 =
3746 {
3747 RTL_PASS, /* type */
3748 "sched2", /* name */
3749 OPTGROUP_NONE, /* optinfo_flags */
3750 TV_SCHED2, /* tv_id */
3751 0, /* properties_required */
3752 0, /* properties_provided */
3753 0, /* properties_destroyed */
3754 0, /* todo_flags_start */
3755 TODO_df_finish, /* todo_flags_finish */
3756 };
3757
3758 class pass_sched2 : public rtl_opt_pass
3759 {
3760 public:
3761 pass_sched2 (gcc::context *ctxt)
3762 : rtl_opt_pass (pass_data_sched2, ctxt)
3763 {}
3764
3765 /* opt_pass methods: */
3766 virtual bool gate (function *);
3767 virtual unsigned int execute (function *)
3768 {
3769 return rest_of_handle_sched2 ();
3770 }
3771
3772 }; // class pass_sched2
3773
3774 bool
3775 pass_sched2::gate (function *)
3776 {
3777 #ifdef INSN_SCHEDULING
3778 return optimize > 0 && flag_schedule_insns_after_reload
3779 && !targetm.delay_sched2 && dbg_cnt (sched2_func);
3780 #else
3781 return 0;
3782 #endif
3783 }
3784
3785 } // anon namespace
3786
3787 rtl_opt_pass *
3788 make_pass_sched2 (gcc::context *ctxt)
3789 {
3790 return new pass_sched2 (ctxt);
3791 }