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1 /* Store motion via Lazy Code Motion on the reverse CFG.
2 Copyright (C) 1997-2015 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "backend.h"
24 #include "rtl.h"
25 #include "tree.h"
26 #include "predict.h"
27 #include "df.h"
28 #include "tm_p.h"
29 #include "expmed.h"
30 #include "insn-config.h"
31 #include "regs.h"
32 #include "emit-rtl.h"
33 #include "recog.h"
34 #include "diagnostic-core.h"
35 #include "toplev.h"
36
37 #include "alias.h"
38 #include "flags.h"
39 #include "cfgrtl.h"
40 #include "cfganal.h"
41 #include "lcm.h"
42 #include "cfgcleanup.h"
43 #include "dojump.h"
44 #include "explow.h"
45 #include "calls.h"
46 #include "varasm.h"
47 #include "stmt.h"
48 #include "expr.h"
49 #include "except.h"
50 #include "intl.h"
51 #include "tree-pass.h"
52 #include "dbgcnt.h"
53 #include "rtl-iter.h"
54
55 /* This pass implements downward store motion.
56 As of May 1, 2009, the pass is not enabled by default on any target,
57 but bootstrap completes on ia64 and x86_64 with the pass enabled. */
58
59 /* TODO:
60 - remove_reachable_equiv_notes is an incomprehensible pile of goo and
61 a compile time hog that needs a rewrite (maybe cache st_exprs to
62 invalidate REG_EQUAL/REG_EQUIV notes for?).
63 - pattern_regs in st_expr should be a regset (on its own obstack).
64 - antic_stores and avail_stores should be VECs instead of lists.
65 - store_motion_mems should be a vec instead of a list.
66 - there should be an alloc pool for struct st_expr objects.
67 - investigate whether it is helpful to make the address of an st_expr
68 a cselib VALUE.
69 - when GIMPLE alias information is exported, the effectiveness of this
70 pass should be re-evaluated.
71 */
72
73 /* This is a list of store expressions (MEMs). The structure is used
74 as an expression table to track stores which look interesting, and
75 might be moveable towards the exit block. */
76
77 struct st_expr
78 {
79 /* Pattern of this mem. */
80 rtx pattern;
81 /* List of registers mentioned by the mem. */
82 rtx pattern_regs;
83 /* INSN list of stores that are locally anticipatable. */
84 rtx_insn_list *antic_stores;
85 /* INSN list of stores that are locally available. */
86 rtx_insn_list *avail_stores;
87 /* Next in the list. */
88 struct st_expr * next;
89 /* Store ID in the dataflow bitmaps. */
90 int index;
91 /* Hash value for the hash table. */
92 unsigned int hash_index;
93 /* Register holding the stored expression when a store is moved.
94 This field is also used as a cache in find_moveable_store, see
95 LAST_AVAIL_CHECK_FAILURE below. */
96 rtx reaching_reg;
97 };
98
99 /* Head of the list of load/store memory refs. */
100 static struct st_expr * store_motion_mems = NULL;
101
102 /* These bitmaps will hold the local dataflow properties per basic block. */
103 static sbitmap *st_kill, *st_avloc, *st_antloc, *st_transp;
104
105 /* Nonzero for expressions which should be inserted on a specific edge. */
106 static sbitmap *st_insert_map;
107
108 /* Nonzero for expressions which should be deleted in a specific block. */
109 static sbitmap *st_delete_map;
110
111 /* Global holding the number of store expressions we are dealing with. */
112 static int num_stores;
113
114 /* Contains the edge_list returned by pre_edge_lcm. */
115 static struct edge_list *edge_list;
116
117 /* Hashtable helpers. */
118
119 struct st_expr_hasher : nofree_ptr_hash <st_expr>
120 {
121 static inline hashval_t hash (const st_expr *);
122 static inline bool equal (const st_expr *, const st_expr *);
123 };
124
125 inline hashval_t
126 st_expr_hasher::hash (const st_expr *x)
127 {
128 int do_not_record_p = 0;
129 return hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false);
130 }
131
132 inline bool
133 st_expr_hasher::equal (const st_expr *ptr1, const st_expr *ptr2)
134 {
135 return exp_equiv_p (ptr1->pattern, ptr2->pattern, 0, true);
136 }
137
138 /* Hashtable for the load/store memory refs. */
139 static hash_table<st_expr_hasher> *store_motion_mems_table;
140
141 /* This will search the st_expr list for a matching expression. If it
142 doesn't find one, we create one and initialize it. */
143
144 static struct st_expr *
145 st_expr_entry (rtx x)
146 {
147 int do_not_record_p = 0;
148 struct st_expr * ptr;
149 unsigned int hash;
150 st_expr **slot;
151 struct st_expr e;
152
153 hash = hash_rtx (x, GET_MODE (x), &do_not_record_p,
154 NULL, /*have_reg_qty=*/false);
155
156 e.pattern = x;
157 slot = store_motion_mems_table->find_slot_with_hash (&e, hash, INSERT);
158 if (*slot)
159 return *slot;
160
161 ptr = XNEW (struct st_expr);
162
163 ptr->next = store_motion_mems;
164 ptr->pattern = x;
165 ptr->pattern_regs = NULL_RTX;
166 ptr->antic_stores = NULL;
167 ptr->avail_stores = NULL;
168 ptr->reaching_reg = NULL_RTX;
169 ptr->index = 0;
170 ptr->hash_index = hash;
171 store_motion_mems = ptr;
172 *slot = ptr;
173
174 return ptr;
175 }
176
177 /* Free up an individual st_expr entry. */
178
179 static void
180 free_st_expr_entry (struct st_expr * ptr)
181 {
182 free_INSN_LIST_list (& ptr->antic_stores);
183 free_INSN_LIST_list (& ptr->avail_stores);
184
185 free (ptr);
186 }
187
188 /* Free up all memory associated with the st_expr list. */
189
190 static void
191 free_store_motion_mems (void)
192 {
193 delete store_motion_mems_table;
194 store_motion_mems_table = NULL;
195
196 while (store_motion_mems)
197 {
198 struct st_expr * tmp = store_motion_mems;
199 store_motion_mems = store_motion_mems->next;
200 free_st_expr_entry (tmp);
201 }
202 store_motion_mems = NULL;
203 }
204
205 /* Assign each element of the list of mems a monotonically increasing value. */
206
207 static int
208 enumerate_store_motion_mems (void)
209 {
210 struct st_expr * ptr;
211 int n = 0;
212
213 for (ptr = store_motion_mems; ptr != NULL; ptr = ptr->next)
214 ptr->index = n++;
215
216 return n;
217 }
218
219 /* Return first item in the list. */
220
221 static inline struct st_expr *
222 first_st_expr (void)
223 {
224 return store_motion_mems;
225 }
226
227 /* Return the next item in the list after the specified one. */
228
229 static inline struct st_expr *
230 next_st_expr (struct st_expr * ptr)
231 {
232 return ptr->next;
233 }
234
235 /* Dump debugging info about the store_motion_mems list. */
236
237 static void
238 print_store_motion_mems (FILE * file)
239 {
240 struct st_expr * ptr;
241
242 fprintf (dump_file, "STORE_MOTION list of MEM exprs considered:\n");
243
244 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
245 {
246 fprintf (file, " Pattern (%3d): ", ptr->index);
247
248 print_rtl (file, ptr->pattern);
249
250 fprintf (file, "\n ANTIC stores : ");
251
252 if (ptr->antic_stores)
253 print_rtl (file, ptr->antic_stores);
254 else
255 fprintf (file, "(nil)");
256
257 fprintf (file, "\n AVAIL stores : ");
258
259 if (ptr->avail_stores)
260 print_rtl (file, ptr->avail_stores);
261 else
262 fprintf (file, "(nil)");
263
264 fprintf (file, "\n\n");
265 }
266
267 fprintf (file, "\n");
268 }
269 \f
270 /* Return zero if some of the registers in list X are killed
271 due to set of registers in bitmap REGS_SET. */
272
273 static bool
274 store_ops_ok (const_rtx x, int *regs_set)
275 {
276 const_rtx reg;
277
278 for (; x; x = XEXP (x, 1))
279 {
280 reg = XEXP (x, 0);
281 if (regs_set[REGNO (reg)])
282 return false;
283 }
284
285 return true;
286 }
287
288 /* Returns a list of registers mentioned in X.
289 FIXME: A regset would be prettier and less expensive. */
290
291 static rtx_expr_list *
292 extract_mentioned_regs (rtx x)
293 {
294 rtx_expr_list *mentioned_regs = NULL;
295 subrtx_var_iterator::array_type array;
296 FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
297 {
298 rtx x = *iter;
299 if (REG_P (x))
300 mentioned_regs = alloc_EXPR_LIST (0, x, mentioned_regs);
301 }
302 return mentioned_regs;
303 }
304
305 /* Check to see if the load X is aliased with STORE_PATTERN.
306 AFTER is true if we are checking the case when STORE_PATTERN occurs
307 after the X. */
308
309 static bool
310 load_kills_store (const_rtx x, const_rtx store_pattern, int after)
311 {
312 if (after)
313 return anti_dependence (x, store_pattern);
314 else
315 return true_dependence (store_pattern, GET_MODE (store_pattern), x);
316 }
317
318 /* Go through the entire rtx X, looking for any loads which might alias
319 STORE_PATTERN. Return true if found.
320 AFTER is true if we are checking the case when STORE_PATTERN occurs
321 after the insn X. */
322
323 static bool
324 find_loads (const_rtx x, const_rtx store_pattern, int after)
325 {
326 const char * fmt;
327 int i, j;
328 int ret = false;
329
330 if (!x)
331 return false;
332
333 if (GET_CODE (x) == SET)
334 x = SET_SRC (x);
335
336 if (MEM_P (x))
337 {
338 if (load_kills_store (x, store_pattern, after))
339 return true;
340 }
341
342 /* Recursively process the insn. */
343 fmt = GET_RTX_FORMAT (GET_CODE (x));
344
345 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
346 {
347 if (fmt[i] == 'e')
348 ret |= find_loads (XEXP (x, i), store_pattern, after);
349 else if (fmt[i] == 'E')
350 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
351 ret |= find_loads (XVECEXP (x, i, j), store_pattern, after);
352 }
353 return ret;
354 }
355
356 /* Go through pattern PAT looking for any loads which might kill the
357 store in X. Return true if found.
358 AFTER is true if we are checking the case when loads kill X occurs
359 after the insn for PAT. */
360
361 static inline bool
362 store_killed_in_pat (const_rtx x, const_rtx pat, int after)
363 {
364 if (GET_CODE (pat) == SET)
365 {
366 rtx dest = SET_DEST (pat);
367
368 if (GET_CODE (dest) == ZERO_EXTRACT)
369 dest = XEXP (dest, 0);
370
371 /* Check for memory stores to aliased objects. */
372 if (MEM_P (dest)
373 && !exp_equiv_p (dest, x, 0, true))
374 {
375 if (after)
376 {
377 if (output_dependence (dest, x))
378 return true;
379 }
380 else
381 {
382 if (output_dependence (x, dest))
383 return true;
384 }
385 }
386 }
387
388 if (find_loads (pat, x, after))
389 return true;
390
391 return false;
392 }
393
394 /* Check if INSN kills the store pattern X (is aliased with it).
395 AFTER is true if we are checking the case when store X occurs
396 after the insn. Return true if it does. */
397
398 static bool
399 store_killed_in_insn (const_rtx x, const_rtx x_regs, const rtx_insn *insn, int after)
400 {
401 const_rtx reg, note, pat;
402
403 if (! NONDEBUG_INSN_P (insn))
404 return false;
405
406 if (CALL_P (insn))
407 {
408 /* A normal or pure call might read from pattern,
409 but a const call will not. */
410 if (!RTL_CONST_CALL_P (insn))
411 return true;
412
413 /* But even a const call reads its parameters. Check whether the
414 base of some of registers used in mem is stack pointer. */
415 for (reg = x_regs; reg; reg = XEXP (reg, 1))
416 if (may_be_sp_based_p (XEXP (reg, 0)))
417 return true;
418
419 return false;
420 }
421
422 pat = PATTERN (insn);
423 if (GET_CODE (pat) == SET)
424 {
425 if (store_killed_in_pat (x, pat, after))
426 return true;
427 }
428 else if (GET_CODE (pat) == PARALLEL)
429 {
430 int i;
431
432 for (i = 0; i < XVECLEN (pat, 0); i++)
433 if (store_killed_in_pat (x, XVECEXP (pat, 0, i), after))
434 return true;
435 }
436 else if (find_loads (PATTERN (insn), x, after))
437 return true;
438
439 /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory
440 location aliased with X, then this insn kills X. */
441 note = find_reg_equal_equiv_note (insn);
442 if (! note)
443 return false;
444 note = XEXP (note, 0);
445
446 /* However, if the note represents a must alias rather than a may
447 alias relationship, then it does not kill X. */
448 if (exp_equiv_p (note, x, 0, true))
449 return false;
450
451 /* See if there are any aliased loads in the note. */
452 return find_loads (note, x, after);
453 }
454
455 /* Returns true if the expression X is loaded or clobbered on or after INSN
456 within basic block BB. REGS_SET_AFTER is bitmap of registers set in
457 or after the insn. X_REGS is list of registers mentioned in X. If the store
458 is killed, return the last insn in that it occurs in FAIL_INSN. */
459
460 static bool
461 store_killed_after (const_rtx x, const_rtx x_regs, const rtx_insn *insn,
462 const_basic_block bb,
463 int *regs_set_after, rtx *fail_insn)
464 {
465 rtx_insn *last = BB_END (bb), *act;
466
467 if (!store_ops_ok (x_regs, regs_set_after))
468 {
469 /* We do not know where it will happen. */
470 if (fail_insn)
471 *fail_insn = NULL_RTX;
472 return true;
473 }
474
475 /* Scan from the end, so that fail_insn is determined correctly. */
476 for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act))
477 if (store_killed_in_insn (x, x_regs, act, false))
478 {
479 if (fail_insn)
480 *fail_insn = act;
481 return true;
482 }
483
484 return false;
485 }
486
487 /* Returns true if the expression X is loaded or clobbered on or before INSN
488 within basic block BB. X_REGS is list of registers mentioned in X.
489 REGS_SET_BEFORE is bitmap of registers set before or in this insn. */
490 static bool
491 store_killed_before (const_rtx x, const_rtx x_regs, const rtx_insn *insn,
492 const_basic_block bb, int *regs_set_before)
493 {
494 rtx_insn *first = BB_HEAD (bb);
495
496 if (!store_ops_ok (x_regs, regs_set_before))
497 return true;
498
499 for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn))
500 if (store_killed_in_insn (x, x_regs, insn, true))
501 return true;
502
503 return false;
504 }
505
506 /* The last insn in the basic block that compute_store_table is processing,
507 where store_killed_after is true for X.
508 Since we go through the basic block from BB_END to BB_HEAD, this is
509 also the available store at the end of the basic block. Therefore
510 this is in effect a cache, to avoid calling store_killed_after for
511 equivalent aliasing store expressions.
512 This value is only meaningful during the computation of the store
513 table. We hi-jack the REACHING_REG field of struct st_expr to save
514 a bit of memory. */
515 #define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg)
516
517 /* Determine whether INSN is MEM store pattern that we will consider moving.
518 REGS_SET_BEFORE is bitmap of registers set before (and including) the
519 current insn, REGS_SET_AFTER is bitmap of registers set after (and
520 including) the insn in this basic block. We must be passing through BB from
521 head to end, as we are using this fact to speed things up.
522
523 The results are stored this way:
524
525 -- the first anticipatable expression is added into ANTIC_STORES
526 -- if the processed expression is not anticipatable, NULL_RTX is added
527 there instead, so that we can use it as indicator that no further
528 expression of this type may be anticipatable
529 -- if the expression is available, it is added as head of AVAIL_STORES;
530 consequently, all of them but this head are dead and may be deleted.
531 -- if the expression is not available, the insn due to that it fails to be
532 available is stored in REACHING_REG (via LAST_AVAIL_CHECK_FAILURE).
533
534 The things are complicated a bit by fact that there already may be stores
535 to the same MEM from other blocks; also caller must take care of the
536 necessary cleanup of the temporary markers after end of the basic block.
537 */
538
539 static void
540 find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
541 {
542 struct st_expr * ptr;
543 rtx dest, set;
544 int check_anticipatable, check_available;
545 basic_block bb = BLOCK_FOR_INSN (insn);
546
547 set = single_set (insn);
548 if (!set)
549 return;
550
551 dest = SET_DEST (set);
552
553 if (! MEM_P (dest) || MEM_VOLATILE_P (dest)
554 || GET_MODE (dest) == BLKmode)
555 return;
556
557 if (side_effects_p (dest))
558 return;
559
560 /* If we are handling exceptions, we must be careful with memory references
561 that may trap. If we are not, the behavior is undefined, so we may just
562 continue. */
563 if (cfun->can_throw_non_call_exceptions && may_trap_p (dest))
564 return;
565
566 /* Even if the destination cannot trap, the source may. In this case we'd
567 need to handle updating the REG_EH_REGION note. */
568 if (find_reg_note (insn, REG_EH_REGION, NULL_RTX))
569 return;
570
571 /* Make sure that the SET_SRC of this store insns can be assigned to
572 a register, or we will fail later on in replace_store_insn, which
573 assumes that we can do this. But sometimes the target machine has
574 oddities like MEM read-modify-write instruction. See for example
575 PR24257. */
576 if (!can_assign_to_reg_without_clobbers_p (SET_SRC (set)))
577 return;
578
579 ptr = st_expr_entry (dest);
580 if (!ptr->pattern_regs)
581 ptr->pattern_regs = extract_mentioned_regs (dest);
582
583 /* Do not check for anticipatability if we either found one anticipatable
584 store already, or tested for one and found out that it was killed. */
585 check_anticipatable = 0;
586 if (!ptr->antic_stores)
587 check_anticipatable = 1;
588 else
589 {
590 rtx_insn *tmp = ptr->antic_stores->insn ();
591 if (tmp != NULL_RTX
592 && BLOCK_FOR_INSN (tmp) != bb)
593 check_anticipatable = 1;
594 }
595 if (check_anticipatable)
596 {
597 rtx_insn *tmp;
598 if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
599 tmp = NULL;
600 else
601 tmp = insn;
602 ptr->antic_stores = alloc_INSN_LIST (tmp, ptr->antic_stores);
603 }
604
605 /* It is not necessary to check whether store is available if we did
606 it successfully before; if we failed before, do not bother to check
607 until we reach the insn that caused us to fail. */
608 check_available = 0;
609 if (!ptr->avail_stores)
610 check_available = 1;
611 else
612 {
613 rtx_insn *tmp = ptr->avail_stores->insn ();
614 if (BLOCK_FOR_INSN (tmp) != bb)
615 check_available = 1;
616 }
617 if (check_available)
618 {
619 /* Check that we have already reached the insn at that the check
620 failed last time. */
621 if (LAST_AVAIL_CHECK_FAILURE (ptr))
622 {
623 rtx_insn *tmp;
624 for (tmp = BB_END (bb);
625 tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
626 tmp = PREV_INSN (tmp))
627 continue;
628 if (tmp == insn)
629 check_available = 0;
630 }
631 else
632 check_available = store_killed_after (dest, ptr->pattern_regs, insn,
633 bb, regs_set_after,
634 &LAST_AVAIL_CHECK_FAILURE (ptr));
635 }
636 if (!check_available)
637 ptr->avail_stores = alloc_INSN_LIST (insn, ptr->avail_stores);
638 }
639
640 /* Find available and anticipatable stores. */
641
642 static int
643 compute_store_table (void)
644 {
645 int ret;
646 basic_block bb;
647 rtx_insn *insn;
648 rtx_insn *tmp;
649 df_ref def;
650 int *last_set_in, *already_set;
651 struct st_expr * ptr, **prev_next_ptr_ptr;
652 unsigned int max_gcse_regno = max_reg_num ();
653
654 store_motion_mems = NULL;
655 store_motion_mems_table = new hash_table<st_expr_hasher> (13);
656 last_set_in = XCNEWVEC (int, max_gcse_regno);
657 already_set = XNEWVEC (int, max_gcse_regno);
658
659 /* Find all the stores we care about. */
660 FOR_EACH_BB_FN (bb, cfun)
661 {
662 /* First compute the registers set in this block. */
663 FOR_BB_INSNS (bb, insn)
664 {
665
666 if (! NONDEBUG_INSN_P (insn))
667 continue;
668
669 FOR_EACH_INSN_DEF (def, insn)
670 last_set_in[DF_REF_REGNO (def)] = INSN_UID (insn);
671 }
672
673 /* Now find the stores. */
674 memset (already_set, 0, sizeof (int) * max_gcse_regno);
675 FOR_BB_INSNS (bb, insn)
676 {
677 if (! NONDEBUG_INSN_P (insn))
678 continue;
679
680 FOR_EACH_INSN_DEF (def, insn)
681 already_set[DF_REF_REGNO (def)] = INSN_UID (insn);
682
683 /* Now that we've marked regs, look for stores. */
684 find_moveable_store (insn, already_set, last_set_in);
685
686 /* Unmark regs that are no longer set. */
687 FOR_EACH_INSN_DEF (def, insn)
688 if (last_set_in[DF_REF_REGNO (def)] == INSN_UID (insn))
689 last_set_in[DF_REF_REGNO (def)] = 0;
690 }
691
692 if (flag_checking)
693 {
694 /* last_set_in should now be all-zero. */
695 for (unsigned regno = 0; regno < max_gcse_regno; regno++)
696 gcc_assert (!last_set_in[regno]);
697 }
698
699 /* Clear temporary marks. */
700 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
701 {
702 LAST_AVAIL_CHECK_FAILURE (ptr) = NULL_RTX;
703 if (ptr->antic_stores
704 && (tmp = ptr->antic_stores->insn ()) == NULL_RTX)
705 ptr->antic_stores = ptr->antic_stores->next ();
706 }
707 }
708
709 /* Remove the stores that are not available anywhere, as there will
710 be no opportunity to optimize them. */
711 for (ptr = store_motion_mems, prev_next_ptr_ptr = &store_motion_mems;
712 ptr != NULL;
713 ptr = *prev_next_ptr_ptr)
714 {
715 if (! ptr->avail_stores)
716 {
717 *prev_next_ptr_ptr = ptr->next;
718 store_motion_mems_table->remove_elt_with_hash (ptr, ptr->hash_index);
719 free_st_expr_entry (ptr);
720 }
721 else
722 prev_next_ptr_ptr = &ptr->next;
723 }
724
725 ret = enumerate_store_motion_mems ();
726
727 if (dump_file)
728 print_store_motion_mems (dump_file);
729
730 free (last_set_in);
731 free (already_set);
732 return ret;
733 }
734
735 /* In all code following after this, REACHING_REG has its original
736 meaning again. Avoid confusion, and undef the accessor macro for
737 the temporary marks usage in compute_store_table. */
738 #undef LAST_AVAIL_CHECK_FAILURE
739
740 /* Insert an instruction at the beginning of a basic block, and update
741 the BB_HEAD if needed. */
742
743 static void
744 insert_insn_start_basic_block (rtx_insn *insn, basic_block bb)
745 {
746 /* Insert at start of successor block. */
747 rtx_insn *prev = PREV_INSN (BB_HEAD (bb));
748 rtx_insn *before = BB_HEAD (bb);
749 while (before != 0)
750 {
751 if (! LABEL_P (before)
752 && !NOTE_INSN_BASIC_BLOCK_P (before))
753 break;
754 prev = before;
755 if (prev == BB_END (bb))
756 break;
757 before = NEXT_INSN (before);
758 }
759
760 insn = emit_insn_after_noloc (insn, prev, bb);
761
762 if (dump_file)
763 {
764 fprintf (dump_file, "STORE_MOTION insert store at start of BB %d:\n",
765 bb->index);
766 print_inline_rtx (dump_file, insn, 6);
767 fprintf (dump_file, "\n");
768 }
769 }
770
771 /* This routine will insert a store on an edge. EXPR is the st_expr entry for
772 the memory reference, and E is the edge to insert it on. Returns nonzero
773 if an edge insertion was performed. */
774
775 static int
776 insert_store (struct st_expr * expr, edge e)
777 {
778 rtx reg;
779 rtx_insn *insn;
780 basic_block bb;
781 edge tmp;
782 edge_iterator ei;
783
784 /* We did all the deleted before this insert, so if we didn't delete a
785 store, then we haven't set the reaching reg yet either. */
786 if (expr->reaching_reg == NULL_RTX)
787 return 0;
788
789 if (e->flags & EDGE_FAKE)
790 return 0;
791
792 reg = expr->reaching_reg;
793 insn = gen_move_insn (copy_rtx (expr->pattern), reg);
794
795 /* If we are inserting this expression on ALL predecessor edges of a BB,
796 insert it at the start of the BB, and reset the insert bits on the other
797 edges so we don't try to insert it on the other edges. */
798 bb = e->dest;
799 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
800 if (!(tmp->flags & EDGE_FAKE))
801 {
802 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
803
804 gcc_assert (index != EDGE_INDEX_NO_EDGE);
805 if (! bitmap_bit_p (st_insert_map[index], expr->index))
806 break;
807 }
808
809 /* If tmp is NULL, we found an insertion on every edge, blank the
810 insertion vector for these edges, and insert at the start of the BB. */
811 if (!tmp && bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
812 {
813 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
814 {
815 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
816 bitmap_clear_bit (st_insert_map[index], expr->index);
817 }
818 insert_insn_start_basic_block (insn, bb);
819 return 0;
820 }
821
822 /* We can't put stores in the front of blocks pointed to by abnormal
823 edges since that may put a store where one didn't used to be. */
824 gcc_assert (!(e->flags & EDGE_ABNORMAL));
825
826 insert_insn_on_edge (insn, e);
827
828 if (dump_file)
829 {
830 fprintf (dump_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
831 e->src->index, e->dest->index);
832 print_inline_rtx (dump_file, insn, 6);
833 fprintf (dump_file, "\n");
834 }
835
836 return 1;
837 }
838
839 /* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the
840 memory location in SMEXPR set in basic block BB.
841
842 This could be rather expensive. */
843
844 static void
845 remove_reachable_equiv_notes (basic_block bb, struct st_expr *smexpr)
846 {
847 edge_iterator *stack, ei;
848 int sp;
849 edge act;
850 sbitmap visited = sbitmap_alloc (last_basic_block_for_fn (cfun));
851 rtx last, note;
852 rtx_insn *insn;
853 rtx mem = smexpr->pattern;
854
855 stack = XNEWVEC (edge_iterator, n_basic_blocks_for_fn (cfun));
856 sp = 0;
857 ei = ei_start (bb->succs);
858
859 bitmap_clear (visited);
860
861 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
862 while (1)
863 {
864 if (!act)
865 {
866 if (!sp)
867 {
868 free (stack);
869 sbitmap_free (visited);
870 return;
871 }
872 act = ei_edge (stack[--sp]);
873 }
874 bb = act->dest;
875
876 if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun)
877 || bitmap_bit_p (visited, bb->index))
878 {
879 if (!ei_end_p (ei))
880 ei_next (&ei);
881 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
882 continue;
883 }
884 bitmap_set_bit (visited, bb->index);
885
886 if (bitmap_bit_p (st_antloc[bb->index], smexpr->index))
887 {
888 for (last = smexpr->antic_stores;
889 BLOCK_FOR_INSN (XEXP (last, 0)) != bb;
890 last = XEXP (last, 1))
891 continue;
892 last = XEXP (last, 0);
893 }
894 else
895 last = NEXT_INSN (BB_END (bb));
896
897 for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn))
898 if (NONDEBUG_INSN_P (insn))
899 {
900 note = find_reg_equal_equiv_note (insn);
901 if (!note || !exp_equiv_p (XEXP (note, 0), mem, 0, true))
902 continue;
903
904 if (dump_file)
905 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
906 INSN_UID (insn));
907 remove_note (insn, note);
908 }
909
910 if (!ei_end_p (ei))
911 ei_next (&ei);
912 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
913
914 if (EDGE_COUNT (bb->succs) > 0)
915 {
916 if (act)
917 stack[sp++] = ei;
918 ei = ei_start (bb->succs);
919 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
920 }
921 }
922 }
923
924 /* This routine will replace a store with a SET to a specified register. */
925
926 static void
927 replace_store_insn (rtx reg, rtx_insn *del, basic_block bb,
928 struct st_expr *smexpr)
929 {
930 rtx_insn *insn;
931 rtx mem, note, set, ptr;
932
933 mem = smexpr->pattern;
934 insn = gen_move_insn (reg, SET_SRC (single_set (del)));
935
936 for (ptr = smexpr->antic_stores; ptr; ptr = XEXP (ptr, 1))
937 if (XEXP (ptr, 0) == del)
938 {
939 XEXP (ptr, 0) = insn;
940 break;
941 }
942
943 /* Move the notes from the deleted insn to its replacement. */
944 REG_NOTES (insn) = REG_NOTES (del);
945
946 /* Emit the insn AFTER all the notes are transferred.
947 This is cheaper since we avoid df rescanning for the note change. */
948 insn = emit_insn_after (insn, del);
949
950 if (dump_file)
951 {
952 fprintf (dump_file,
953 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
954 print_inline_rtx (dump_file, del, 6);
955 fprintf (dump_file, "\nSTORE_MOTION replaced with insn:\n ");
956 print_inline_rtx (dump_file, insn, 6);
957 fprintf (dump_file, "\n");
958 }
959
960 delete_insn (del);
961
962 /* Now we must handle REG_EQUAL notes whose contents is equal to the mem;
963 they are no longer accurate provided that they are reached by this
964 definition, so drop them. */
965 for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn))
966 if (NONDEBUG_INSN_P (insn))
967 {
968 set = single_set (insn);
969 if (!set)
970 continue;
971 if (exp_equiv_p (SET_DEST (set), mem, 0, true))
972 return;
973 note = find_reg_equal_equiv_note (insn);
974 if (!note || !exp_equiv_p (XEXP (note, 0), mem, 0, true))
975 continue;
976
977 if (dump_file)
978 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
979 INSN_UID (insn));
980 remove_note (insn, note);
981 }
982 remove_reachable_equiv_notes (bb, smexpr);
983 }
984
985
986 /* Delete a store, but copy the value that would have been stored into
987 the reaching_reg for later storing. */
988
989 static void
990 delete_store (struct st_expr * expr, basic_block bb)
991 {
992 rtx reg;
993
994 if (expr->reaching_reg == NULL_RTX)
995 expr->reaching_reg = gen_reg_rtx_and_attrs (expr->pattern);
996
997 reg = expr->reaching_reg;
998
999 for (rtx_insn_list *i = expr->avail_stores; i; i = i->next ())
1000 {
1001 rtx_insn *del = i->insn ();
1002 if (BLOCK_FOR_INSN (del) == bb)
1003 {
1004 /* We know there is only one since we deleted redundant
1005 ones during the available computation. */
1006 replace_store_insn (reg, del, bb, expr);
1007 break;
1008 }
1009 }
1010 }
1011
1012 /* Fill in available, anticipatable, transparent and kill vectors in
1013 STORE_DATA, based on lists of available and anticipatable stores. */
1014 static void
1015 build_store_vectors (void)
1016 {
1017 basic_block bb;
1018 int *regs_set_in_block;
1019 rtx_insn *insn;
1020 rtx_insn_list *st;
1021 struct st_expr * ptr;
1022 unsigned int max_gcse_regno = max_reg_num ();
1023
1024 /* Build the gen_vector. This is any store in the table which is not killed
1025 by aliasing later in its block. */
1026 st_avloc = sbitmap_vector_alloc (last_basic_block_for_fn (cfun),
1027 num_stores);
1028 bitmap_vector_clear (st_avloc, last_basic_block_for_fn (cfun));
1029
1030 st_antloc = sbitmap_vector_alloc (last_basic_block_for_fn (cfun),
1031 num_stores);
1032 bitmap_vector_clear (st_antloc, last_basic_block_for_fn (cfun));
1033
1034 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1035 {
1036 for (st = ptr->avail_stores; st != NULL; st = st->next ())
1037 {
1038 insn = st->insn ();
1039 bb = BLOCK_FOR_INSN (insn);
1040
1041 /* If we've already seen an available expression in this block,
1042 we can delete this one (It occurs earlier in the block). We'll
1043 copy the SRC expression to an unused register in case there
1044 are any side effects. */
1045 if (bitmap_bit_p (st_avloc[bb->index], ptr->index))
1046 {
1047 rtx r = gen_reg_rtx_and_attrs (ptr->pattern);
1048 if (dump_file)
1049 fprintf (dump_file, "Removing redundant store:\n");
1050 replace_store_insn (r, st->insn (), bb, ptr);
1051 continue;
1052 }
1053 bitmap_set_bit (st_avloc[bb->index], ptr->index);
1054 }
1055
1056 for (st = ptr->antic_stores; st != NULL; st = st->next ())
1057 {
1058 insn = st->insn ();
1059 bb = BLOCK_FOR_INSN (insn);
1060 bitmap_set_bit (st_antloc[bb->index], ptr->index);
1061 }
1062 }
1063
1064 st_kill = sbitmap_vector_alloc (last_basic_block_for_fn (cfun), num_stores);
1065 bitmap_vector_clear (st_kill, last_basic_block_for_fn (cfun));
1066
1067 st_transp = sbitmap_vector_alloc (last_basic_block_for_fn (cfun), num_stores);
1068 bitmap_vector_clear (st_transp, last_basic_block_for_fn (cfun));
1069 regs_set_in_block = XNEWVEC (int, max_gcse_regno);
1070
1071 FOR_EACH_BB_FN (bb, cfun)
1072 {
1073 memset (regs_set_in_block, 0, sizeof (int) * max_gcse_regno);
1074
1075 FOR_BB_INSNS (bb, insn)
1076 if (NONDEBUG_INSN_P (insn))
1077 {
1078 df_ref def;
1079 FOR_EACH_INSN_DEF (def, insn)
1080 {
1081 unsigned int ref_regno = DF_REF_REGNO (def);
1082 if (ref_regno < max_gcse_regno)
1083 regs_set_in_block[DF_REF_REGNO (def)] = 1;
1084 }
1085 }
1086
1087 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1088 {
1089 if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb),
1090 bb, regs_set_in_block, NULL))
1091 {
1092 /* It should not be necessary to consider the expression
1093 killed if it is both anticipatable and available. */
1094 if (!bitmap_bit_p (st_antloc[bb->index], ptr->index)
1095 || !bitmap_bit_p (st_avloc[bb->index], ptr->index))
1096 bitmap_set_bit (st_kill[bb->index], ptr->index);
1097 }
1098 else
1099 bitmap_set_bit (st_transp[bb->index], ptr->index);
1100 }
1101 }
1102
1103 free (regs_set_in_block);
1104
1105 if (dump_file)
1106 {
1107 dump_bitmap_vector (dump_file, "st_antloc", "", st_antloc,
1108 last_basic_block_for_fn (cfun));
1109 dump_bitmap_vector (dump_file, "st_kill", "", st_kill,
1110 last_basic_block_for_fn (cfun));
1111 dump_bitmap_vector (dump_file, "st_transp", "", st_transp,
1112 last_basic_block_for_fn (cfun));
1113 dump_bitmap_vector (dump_file, "st_avloc", "", st_avloc,
1114 last_basic_block_for_fn (cfun));
1115 }
1116 }
1117
1118 /* Free memory used by store motion. */
1119
1120 static void
1121 free_store_memory (void)
1122 {
1123 free_store_motion_mems ();
1124
1125 if (st_avloc)
1126 sbitmap_vector_free (st_avloc);
1127 if (st_kill)
1128 sbitmap_vector_free (st_kill);
1129 if (st_transp)
1130 sbitmap_vector_free (st_transp);
1131 if (st_antloc)
1132 sbitmap_vector_free (st_antloc);
1133 if (st_insert_map)
1134 sbitmap_vector_free (st_insert_map);
1135 if (st_delete_map)
1136 sbitmap_vector_free (st_delete_map);
1137
1138 st_avloc = st_kill = st_transp = st_antloc = NULL;
1139 st_insert_map = st_delete_map = NULL;
1140 }
1141
1142 /* Perform store motion. Much like gcse, except we move expressions the
1143 other way by looking at the flowgraph in reverse.
1144 Return non-zero if transformations are performed by the pass. */
1145
1146 static int
1147 one_store_motion_pass (void)
1148 {
1149 basic_block bb;
1150 int x;
1151 struct st_expr * ptr;
1152 int did_edge_inserts = 0;
1153 int n_stores_deleted = 0;
1154 int n_stores_created = 0;
1155
1156 init_alias_analysis ();
1157
1158 /* Find all the available and anticipatable stores. */
1159 num_stores = compute_store_table ();
1160 if (num_stores == 0)
1161 {
1162 delete store_motion_mems_table;
1163 store_motion_mems_table = NULL;
1164 end_alias_analysis ();
1165 return 0;
1166 }
1167
1168 /* Now compute kill & transp vectors. */
1169 build_store_vectors ();
1170 add_noreturn_fake_exit_edges ();
1171 connect_infinite_loops_to_exit ();
1172
1173 edge_list = pre_edge_rev_lcm (num_stores, st_transp, st_avloc,
1174 st_antloc, st_kill, &st_insert_map,
1175 &st_delete_map);
1176
1177 /* Now we want to insert the new stores which are going to be needed. */
1178 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1179 {
1180 /* If any of the edges we have above are abnormal, we can't move this
1181 store. */
1182 for (x = NUM_EDGES (edge_list) - 1; x >= 0; x--)
1183 if (bitmap_bit_p (st_insert_map[x], ptr->index)
1184 && (INDEX_EDGE (edge_list, x)->flags & EDGE_ABNORMAL))
1185 break;
1186
1187 if (x >= 0)
1188 {
1189 if (dump_file != NULL)
1190 fprintf (dump_file,
1191 "Can't replace store %d: abnormal edge from %d to %d\n",
1192 ptr->index, INDEX_EDGE (edge_list, x)->src->index,
1193 INDEX_EDGE (edge_list, x)->dest->index);
1194 continue;
1195 }
1196
1197 /* Now we want to insert the new stores which are going to be needed. */
1198
1199 FOR_EACH_BB_FN (bb, cfun)
1200 if (bitmap_bit_p (st_delete_map[bb->index], ptr->index))
1201 {
1202 delete_store (ptr, bb);
1203 n_stores_deleted++;
1204 }
1205
1206 for (x = 0; x < NUM_EDGES (edge_list); x++)
1207 if (bitmap_bit_p (st_insert_map[x], ptr->index))
1208 {
1209 did_edge_inserts |= insert_store (ptr, INDEX_EDGE (edge_list, x));
1210 n_stores_created++;
1211 }
1212 }
1213
1214 if (did_edge_inserts)
1215 commit_edge_insertions ();
1216
1217 free_store_memory ();
1218 free_edge_list (edge_list);
1219 remove_fake_exit_edges ();
1220 end_alias_analysis ();
1221
1222 if (dump_file)
1223 {
1224 fprintf (dump_file, "STORE_MOTION of %s, %d basic blocks, ",
1225 current_function_name (), n_basic_blocks_for_fn (cfun));
1226 fprintf (dump_file, "%d insns deleted, %d insns created\n",
1227 n_stores_deleted, n_stores_created);
1228 }
1229
1230 return (n_stores_deleted > 0 || n_stores_created > 0);
1231 }
1232
1233 \f
1234 static unsigned int
1235 execute_rtl_store_motion (void)
1236 {
1237 delete_unreachable_blocks ();
1238 df_analyze ();
1239 flag_rerun_cse_after_global_opts |= one_store_motion_pass ();
1240 return 0;
1241 }
1242
1243 namespace {
1244
1245 const pass_data pass_data_rtl_store_motion =
1246 {
1247 RTL_PASS, /* type */
1248 "store_motion", /* name */
1249 OPTGROUP_NONE, /* optinfo_flags */
1250 TV_LSM, /* tv_id */
1251 PROP_cfglayout, /* properties_required */
1252 0, /* properties_provided */
1253 0, /* properties_destroyed */
1254 0, /* todo_flags_start */
1255 TODO_df_finish, /* todo_flags_finish */
1256 };
1257
1258 class pass_rtl_store_motion : public rtl_opt_pass
1259 {
1260 public:
1261 pass_rtl_store_motion (gcc::context *ctxt)
1262 : rtl_opt_pass (pass_data_rtl_store_motion, ctxt)
1263 {}
1264
1265 /* opt_pass methods: */
1266 virtual bool gate (function *);
1267 virtual unsigned int execute (function *)
1268 {
1269 return execute_rtl_store_motion ();
1270 }
1271
1272 }; // class pass_rtl_store_motion
1273
1274 bool
1275 pass_rtl_store_motion::gate (function *fun)
1276 {
1277 return optimize > 0 && flag_gcse_sm
1278 && !fun->calls_setjmp
1279 && optimize_function_for_speed_p (fun)
1280 && dbg_cnt (store_motion);
1281 }
1282
1283 } // anon namespace
1284
1285 rtl_opt_pass *
1286 make_pass_rtl_store_motion (gcc::context *ctxt)
1287 {
1288 return new pass_rtl_store_motion (ctxt);
1289 }