gcc/testsuite/gcc.target/aarch64/acle/ls64_asm.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-march=armv8-a+ls64 -O2" } */
   3
   4 #ifndef __ARM_FEATURE_LS64
   5 #error "__ARM_FEATURE_LS64 is not defined but should be!"
   6 #endif
   7
   8 /* Inline assembly for LS64 instructions.  */
   9
  10 #include <arm_acle.h>
  11
  12 void
  13 ls64_load (data512_t *output, const void *addr)
  14 {
  15     __asm__ volatile ("ld64b %0, [%1]"
  16                       : "=r" (*output)
  17                       : "r" (addr)
  18                       : "memory");
  19 }
  20
  21 /* { dg-final { scan-assembler-times {ld64b } 1 } } */
  22
  23 void
  24 ls64_store (const data512_t *input, void *addr)
  25 {
  26     __asm__ volatile ("st64b %1, [%0]"
  27                       : /* No outputs.  */
  28                       : "r" (addr), "r" (*input)
  29                       : "memory");
  30 }
  31
  32 /* { dg-final { scan-assembler-times {st64b } 1 } } */
  33
  34 uint64_t
  35 ls64_store_v (const data512_t *input, void *addr)
  36 {
  37     uint64_t status;
  38     __asm__ volatile ("st64bv %0, %2, [%1]"
  39                       : "=r" (status)
  40                       : "r" (addr), "r" (*input)
  41                       : "memory");
  42     return status;
  43 }
  44
  45 /* { dg-final { scan-assembler-times {st64bv } 1 } } */
  46
  47 uint64_t
  48 ls64_store_v0 (const data512_t *input, void *addr)
  49 {
  50     uint64_t status;
  51     __asm__ volatile ("st64bv0 %0, %2, [%1]"
  52                       : "=r" (status)
  53                       : "r" (addr), "r" (*input)
  54                       : "memory");
  55     return status;
  56 }
  57
  58 /* { dg-final { scan-assembler-times {st64bv0 } 1 } } */