gcc/testsuite/gcc.target/aarch64/sve/pcs/args_1.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-O -g" } */
   3 /* { dg-final { check-function-bodies "**" "" { target lp64 } } } */
   4
   5 #include <arm_sve.h>
   6
   7 /*
   8 ** callee_pred:
   9 **      addvl   sp, sp, #-1
  10 **      str     p[0-9]+, \[sp\]
  11 **      str     p[0-9]+, \[sp, #1, mul vl\]
  12 **      ldr     (p[0-9]+), \[x0\]
  13 **      ldr     (p[0-9]+), \[x1\]
  14 **      brkpa   (p[0-7])\.b, p0/z, p1\.b, p2\.b
  15 **      brkpb   (p[0-7])\.b, \3/z, p3\.b, \1\.b
  16 **      brka    p0\.b, \4/z, \2\.b
  17 **      ldr     p[0-9]+, \[sp\]
  18 **      ldr     p[0-9]+, \[sp, #1, mul vl\]
  19 **      addvl   sp, sp, #1
  20 **      ret
  21 */
  22 __SVBool_t __attribute__((noipa))
  23 callee_pred (__SVBool_t p0, __SVBool_t p1, __SVBool_t p2, __SVBool_t p3,
  24              __SVBool_t mem0, __SVBool_t mem1)
  25 {
  26   p0 = svbrkpa_z (p0, p1, p2);
  27   p0 = svbrkpb_z (p0, p3, mem0);
  28   return svbrka_z (p0, mem1);
  29 }
  30
  31 /*
  32 ** caller_pred:
  33 **      ...
  34 **      ptrue   (p[0-9]+)\.b, vl5
  35 **      str     \1, \[x0\]
  36 **      ...
  37 **      ptrue   (p[0-9]+)\.h, vl6
  38 **      str     \2, \[x1\]
  39 **      ptrue   p3\.d, vl4
  40 **      ptrue   p2\.s, vl3
  41 **      ptrue   p1\.h, vl2
  42 **      ptrue   p0\.b, vl1
  43 **      bl      callee_pred
  44 **      ...
  45 */
  46 __SVBool_t __attribute__((noipa))
  47 caller_pred (void)
  48 {
  49   return callee_pred (svptrue_pat_b8 (SV_VL1),
  50                       svptrue_pat_b16 (SV_VL2),
  51                       svptrue_pat_b32 (SV_VL3),
  52                       svptrue_pat_b64 (SV_VL4),
  53                       svptrue_pat_b8 (SV_VL5),
  54                       svptrue_pat_b16 (SV_VL6));
  55 }