gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cvtnt_f32.c

   1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
   2
   3 #include "test_sve_acle.h"
   4
   5 /*
   6 ** cvtnt_f32_f64_m_tied1:
   7 **      fcvtnt  z0\.s, p0/m, z4\.d
   8 **      ret
   9 */
  10 TEST_DUAL_Z (cvtnt_f32_f64_m_tied1, svfloat32_t, svfloat64_t,
  11              z0 = svcvtnt_f32_f64_m (z0, p0, z4),
  12              z0 = svcvtnt_f32_m (z0, p0, z4))
  13
  14 /* Bad RA choice: no preferred output sequence.  */
  15 TEST_DUAL_Z_REV (cvtnt_f32_f64_m_tied2, svfloat32_t, svfloat64_t,
  16                  z0_res = svcvtnt_f32_f64_m (z4, p0, z0),
  17                  z0_res = svcvtnt_f32_m (z4, p0, z0))
  18
  19 /*
  20 ** cvtnt_f32_f64_m_untied:
  21 ** (
  22 **      mov     z0\.d, z1\.d
  23 **      fcvtnt  z0\.s, p0/m, z4\.d
  24 ** |
  25 **      fcvtnt  z1\.s, p0/m, z4\.d
  26 **      mov     z0\.d, z1\.d
  27 ** )
  28 **      ret
  29 */
  30 TEST_DUAL_Z (cvtnt_f32_f64_m_untied, svfloat32_t, svfloat64_t,
  31              z0 = svcvtnt_f32_f64_m (z1, p0, z4),
  32              z0 = svcvtnt_f32_m (z1, p0, z4))
  33
  34 /*
  35 ** cvtnt_f32_f64_x_tied1:
  36 **      fcvtnt  z0\.s, p0/m, z4\.d
  37 **      ret
  38 */
  39 TEST_DUAL_Z (cvtnt_f32_f64_x_tied1, svfloat32_t, svfloat64_t,
  40              z0 = svcvtnt_f32_f64_x (z0, p0, z4),
  41              z0 = svcvtnt_f32_x (z0, p0, z4))
  42
  43 /* Bad RA choice: no preferred output sequence.  */
  44 TEST_DUAL_Z_REV (cvtnt_f32_f64_x_tied2, svfloat32_t, svfloat64_t,
  45                  z0_res = svcvtnt_f32_f64_x (z4, p0, z0),
  46                  z0_res = svcvtnt_f32_x (z4, p0, z0))
  47
  48 /*
  49 ** cvtnt_f32_f64_x_untied:
  50 ** (
  51 **      mov     z0\.d, z1\.d
  52 **      fcvtnt  z0\.s, p0/m, z4\.d
  53 ** |
  54 **      fcvtnt  z1\.s, p0/m, z4\.d
  55 **      mov     z0\.d, z1\.d
  56 ** )
  57 **      ret
  58 */
  59 TEST_DUAL_Z (cvtnt_f32_f64_x_untied, svfloat32_t, svfloat64_t,
  60              z0 = svcvtnt_f32_f64_x (z1, p0, z4),
  61              z0 = svcvtnt_f32_x (z1, p0, z4))
  62
  63 /*
  64 ** ptrue_cvtnt_f32_f64_x_tied1:
  65 **      ...
  66 **      ptrue   p[0-9]+\.b[^\n]*
  67 **      ...
  68 **      ret
  69 */
  70 TEST_DUAL_Z (ptrue_cvtnt_f32_f64_x_tied1, svfloat32_t, svfloat64_t,
  71              z0 = svcvtnt_f32_f64_x (z0, svptrue_b64 (), z4),
  72              z0 = svcvtnt_f32_x (z0, svptrue_b64 (), z4))
  73
  74 /* Bad RA choice: no preferred output sequence.  */
  75 TEST_DUAL_Z_REV (ptrue_cvtnt_f32_f64_x_tied2, svfloat32_t, svfloat64_t,
  76                  z0_res = svcvtnt_f32_f64_x (z4, svptrue_b64 (), z0),
  77                  z0_res = svcvtnt_f32_x (z4, svptrue_b64 (), z0))
  78
  79 /*
  80 ** ptrue_cvtnt_f32_f64_x_untied:
  81 **      ...
  82 **      ptrue   p[0-9]+\.b[^\n]*
  83 **      ...
  84 **      ret
  85 */
  86 TEST_DUAL_Z (ptrue_cvtnt_f32_f64_x_untied, svfloat32_t, svfloat64_t,
  87              z0 = svcvtnt_f32_f64_x (z1, svptrue_b64 (), z4),
  88              z0 = svcvtnt_f32_x (z1, svptrue_b64 (), z4))