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[AArch64] Add support for the SVE2 ACLE
[thirdparty/gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve2 / acle / asm / maxp_s16.c
1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
2
3 #include "test_sve_acle.h"
4
5 /*
6 ** maxp_s16_m_tied1:
7 ** smaxp z0\.h, p0/m, z0\.h, z1\.h
8 ** ret
9 */
10 TEST_UNIFORM_Z (maxp_s16_m_tied1, svint16_t,
11 z0 = svmaxp_s16_m (p0, z0, z1),
12 z0 = svmaxp_m (p0, z0, z1))
13
14 /*
15 ** maxp_s16_m_tied2:
16 ** mov (z[0-9]+)\.d, z0\.d
17 ** movprfx z0, z1
18 ** smaxp z0\.h, p0/m, z0\.h, \1\.h
19 ** ret
20 */
21 TEST_UNIFORM_Z (maxp_s16_m_tied2, svint16_t,
22 z0 = svmaxp_s16_m (p0, z1, z0),
23 z0 = svmaxp_m (p0, z1, z0))
24
25 /*
26 ** maxp_s16_m_untied:
27 ** movprfx z0, z1
28 ** smaxp z0\.h, p0/m, z0\.h, z2\.h
29 ** ret
30 */
31 TEST_UNIFORM_Z (maxp_s16_m_untied, svint16_t,
32 z0 = svmaxp_s16_m (p0, z1, z2),
33 z0 = svmaxp_m (p0, z1, z2))
34
35 /*
36 ** maxp_s16_x_tied1:
37 ** smaxp z0\.h, p0/m, z0\.h, z1\.h
38 ** ret
39 */
40 TEST_UNIFORM_Z (maxp_s16_x_tied1, svint16_t,
41 z0 = svmaxp_s16_x (p0, z0, z1),
42 z0 = svmaxp_x (p0, z0, z1))
43
44 /*
45 ** maxp_s16_x_tied2:
46 ** mov (z[0-9]+)\.d, z0\.d
47 ** movprfx z0, z1
48 ** smaxp z0\.h, p0/m, z0\.h, \1\.h
49 ** ret
50 */
51 TEST_UNIFORM_Z (maxp_s16_x_tied2, svint16_t,
52 z0 = svmaxp_s16_x (p0, z1, z0),
53 z0 = svmaxp_x (p0, z1, z0))
54
55 /*
56 ** maxp_s16_x_untied:
57 ** movprfx z0, z1
58 ** smaxp z0\.h, p0/m, z0\.h, z2\.h
59 ** ret
60 */
61 TEST_UNIFORM_Z (maxp_s16_x_untied, svint16_t,
62 z0 = svmaxp_s16_x (p0, z1, z2),
63 z0 = svmaxp_x (p0, z1, z2))