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[AArch64] Add support for the SVE2 ACLE
[thirdparty/gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve2 / acle / asm / mla_lane_u16.c
1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
2
3 #include "test_sve_acle.h"
4
5 /*
6 ** mla_lane_0_u16_tied1:
7 ** mla z0\.h, z1\.h, z2\.h\[0\]
8 ** ret
9 */
10 TEST_UNIFORM_Z (mla_lane_0_u16_tied1, svuint16_t,
11 z0 = svmla_lane_u16 (z0, z1, z2, 0),
12 z0 = svmla_lane (z0, z1, z2, 0))
13
14 /*
15 ** mla_lane_0_u16_tied2:
16 ** mov (z[0-9]+)\.d, z0\.d
17 ** movprfx z0, z1
18 ** mla z0\.h, \1\.h, z2\.h\[0\]
19 ** ret
20 */
21 TEST_UNIFORM_Z (mla_lane_0_u16_tied2, svuint16_t,
22 z0 = svmla_lane_u16 (z1, z0, z2, 0),
23 z0 = svmla_lane (z1, z0, z2, 0))
24
25 /*
26 ** mla_lane_0_u16_tied3:
27 ** mov (z[0-9]+)\.d, z0\.d
28 ** movprfx z0, z1
29 ** mla z0\.h, z2\.h, \1\.h\[0\]
30 ** ret
31 */
32 TEST_UNIFORM_Z (mla_lane_0_u16_tied3, svuint16_t,
33 z0 = svmla_lane_u16 (z1, z2, z0, 0),
34 z0 = svmla_lane (z1, z2, z0, 0))
35
36 /*
37 ** mla_lane_0_u16_untied:
38 ** movprfx z0, z1
39 ** mla z0\.h, z2\.h, z3\.h\[0\]
40 ** ret
41 */
42 TEST_UNIFORM_Z (mla_lane_0_u16_untied, svuint16_t,
43 z0 = svmla_lane_u16 (z1, z2, z3, 0),
44 z0 = svmla_lane (z1, z2, z3, 0))
45
46 /*
47 ** mla_lane_1_u16:
48 ** mla z0\.h, z1\.h, z2\.h\[1\]
49 ** ret
50 */
51 TEST_UNIFORM_Z (mla_lane_1_u16, svuint16_t,
52 z0 = svmla_lane_u16 (z0, z1, z2, 1),
53 z0 = svmla_lane (z0, z1, z2, 1))
54
55 /*
56 ** mla_lane_2_u16:
57 ** mla z0\.h, z1\.h, z2\.h\[2\]
58 ** ret
59 */
60 TEST_UNIFORM_Z (mla_lane_2_u16, svuint16_t,
61 z0 = svmla_lane_u16 (z0, z1, z2, 2),
62 z0 = svmla_lane (z0, z1, z2, 2))
63
64 /*
65 ** mla_lane_3_u16:
66 ** mla z0\.h, z1\.h, z2\.h\[3\]
67 ** ret
68 */
69 TEST_UNIFORM_Z (mla_lane_3_u16, svuint16_t,
70 z0 = svmla_lane_u16 (z0, z1, z2, 3),
71 z0 = svmla_lane (z0, z1, z2, 3))
72
73 /*
74 ** mla_lane_4_u16:
75 ** mla z0\.h, z1\.h, z2\.h\[4\]
76 ** ret
77 */
78 TEST_UNIFORM_Z (mla_lane_4_u16, svuint16_t,
79 z0 = svmla_lane_u16 (z0, z1, z2, 4),
80 z0 = svmla_lane (z0, z1, z2, 4))
81
82 /*
83 ** mla_lane_5_u16:
84 ** mla z0\.h, z1\.h, z2\.h\[5\]
85 ** ret
86 */
87 TEST_UNIFORM_Z (mla_lane_5_u16, svuint16_t,
88 z0 = svmla_lane_u16 (z0, z1, z2, 5),
89 z0 = svmla_lane (z0, z1, z2, 5))
90
91 /*
92 ** mla_lane_6_u16:
93 ** mla z0\.h, z1\.h, z2\.h\[6\]
94 ** ret
95 */
96 TEST_UNIFORM_Z (mla_lane_6_u16, svuint16_t,
97 z0 = svmla_lane_u16 (z0, z1, z2, 6),
98 z0 = svmla_lane (z0, z1, z2, 6))
99
100 /*
101 ** mla_lane_7_u16:
102 ** mla z0\.h, z1\.h, z2\.h\[7\]
103 ** ret
104 */
105 TEST_UNIFORM_Z (mla_lane_7_u16, svuint16_t,
106 z0 = svmla_lane_u16 (z0, z1, z2, 7),
107 z0 = svmla_lane (z0, z1, z2, 7))
108
109 /*
110 ** mla_lane_z8_u16:
111 ** str d8, \[sp, -16\]!
112 ** mov (z[0-7])\.d, z8\.d
113 ** mla z0\.h, z1\.h, \1\.h\[1\]
114 ** ldr d8, \[sp\], 16
115 ** ret
116 */
117 TEST_DUAL_LANE_REG (mla_lane_z8_u16, svuint16_t, svuint16_t, z8,
118 z0 = svmla_lane_u16 (z0, z1, z8, 1),
119 z0 = svmla_lane (z0, z1, z8, 1))
120
121 /*
122 ** mla_lane_z16_u16:
123 ** mov (z[0-7])\.d, z16\.d
124 ** mla z0\.h, z1\.h, \1\.h\[1\]
125 ** ret
126 */
127 TEST_DUAL_LANE_REG (mla_lane_z16_u16, svuint16_t, svuint16_t, z16,
128 z0 = svmla_lane_u16 (z0, z1, z16, 1),
129 z0 = svmla_lane (z0, z1, z16, 1))