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[AArch64] Add support for the SVE2 ACLE
[thirdparty/gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve2 / acle / asm / qdmullt_lane_s64.c
1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
2
3 #include "test_sve_acle.h"
4
5 /*
6 ** qdmullt_lane_0_s64_tied1:
7 ** sqdmullt z0\.d, z0\.s, z1\.s\[0\]
8 ** ret
9 */
10 TEST_TYPE_CHANGE_Z (qdmullt_lane_0_s64_tied1, svint64_t, svint32_t,
11 z0_res = svqdmullt_lane_s64 (z0, z1, 0),
12 z0_res = svqdmullt_lane (z0, z1, 0))
13
14 /*
15 ** qdmullt_lane_0_s64_tied2:
16 ** sqdmullt z0\.d, z1\.s, z0\.s\[0\]
17 ** ret
18 */
19 TEST_TYPE_CHANGE_Z (qdmullt_lane_0_s64_tied2, svint64_t, svint32_t,
20 z0_res = svqdmullt_lane_s64 (z1, z0, 0),
21 z0_res = svqdmullt_lane (z1, z0, 0))
22
23 /*
24 ** qdmullt_lane_0_s64_untied:
25 ** sqdmullt z0\.d, z1\.s, z2\.s\[0\]
26 ** ret
27 */
28 TEST_TYPE_CHANGE_Z (qdmullt_lane_0_s64_untied, svint64_t, svint32_t,
29 z0_res = svqdmullt_lane_s64 (z1, z2, 0),
30 z0_res = svqdmullt_lane (z1, z2, 0))
31
32 /*
33 ** qdmullt_lane_1_s64:
34 ** sqdmullt z0\.d, z1\.s, z2\.s\[1\]
35 ** ret
36 */
37 TEST_TYPE_CHANGE_Z (qdmullt_lane_1_s64, svint64_t, svint32_t,
38 z0_res = svqdmullt_lane_s64 (z1, z2, 1),
39 z0_res = svqdmullt_lane (z1, z2, 1))
40
41 /*
42 ** qdmullt_lane_2_s64:
43 ** sqdmullt z0\.d, z1\.s, z2\.s\[2\]
44 ** ret
45 */
46 TEST_TYPE_CHANGE_Z (qdmullt_lane_2_s64, svint64_t, svint32_t,
47 z0_res = svqdmullt_lane_s64 (z1, z2, 2),
48 z0_res = svqdmullt_lane (z1, z2, 2))
49
50 /*
51 ** qdmullt_lane_3_s64:
52 ** sqdmullt z0\.d, z1\.s, z2\.s\[3\]
53 ** ret
54 */
55 TEST_TYPE_CHANGE_Z (qdmullt_lane_3_s64, svint64_t, svint32_t,
56 z0_res = svqdmullt_lane_s64 (z1, z2, 3),
57 z0_res = svqdmullt_lane (z1, z2, 3))
58
59 /*
60 ** qdmullt_lane_z15_s64:
61 ** str d15, \[sp, -16\]!
62 ** sqdmullt z0\.d, z1\.s, z15\.s\[1\]
63 ** ldr d15, \[sp\], 16
64 ** ret
65 */
66 TEST_DUAL_LANE_REG (qdmullt_lane_z15_s64, svint64_t, svint32_t, z15,
67 z0 = svqdmullt_lane_s64 (z1, z15, 1),
68 z0 = svqdmullt_lane (z1, z15, 1))
69
70 /*
71 ** qdmullt_lane_z16_s64:
72 ** mov (z[0-9]|z1[0-5])\.d, z16\.d
73 ** sqdmullt z0\.d, z1\.s, \1\.s\[1\]
74 ** ret
75 */
76 TEST_DUAL_LANE_REG (qdmullt_lane_z16_s64, svint64_t, svint32_t, z16,
77 z0 = svqdmullt_lane_s64 (z1, z16, 1),
78 z0 = svqdmullt_lane (z1, z16, 1))