gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qrdmlah_lane_s64.c

   1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
   2
   3 #include "test_sve_acle.h"
   4
   5 /*
   6 ** qrdmlah_lane_0_s64_tied1:
   7 **      sqrdmlah        z0\.d, z1\.d, z2\.d\[0\]
   8 **      ret
   9 */
  10 TEST_UNIFORM_Z (qrdmlah_lane_0_s64_tied1, svint64_t,
  11                 z0 = svqrdmlah_lane_s64 (z0, z1, z2, 0),
  12                 z0 = svqrdmlah_lane (z0, z1, z2, 0))
  13
  14 /*
  15 ** qrdmlah_lane_0_s64_tied2:
  16 **      mov     (z[0-9]+\.d), z0\.d
  17 **      movprfx z0, z1
  18 **      sqrdmlah        z0\.d, \1, z2\.d\[0\]
  19 **      ret
  20 */
  21 TEST_UNIFORM_Z (qrdmlah_lane_0_s64_tied2, svint64_t,
  22                 z0 = svqrdmlah_lane_s64 (z1, z0, z2, 0),
  23                 z0 = svqrdmlah_lane (z1, z0, z2, 0))
  24
  25 /*
  26 ** qrdmlah_lane_0_s64_tied3:
  27 **      mov     (z[0-9]+\.d), z0\.d
  28 **      movprfx z0, z1
  29 **      sqrdmlah        z0\.d, z2\.d, \1\[0\]
  30 **      ret
  31 */
  32 TEST_UNIFORM_Z (qrdmlah_lane_0_s64_tied3, svint64_t,
  33                 z0 = svqrdmlah_lane_s64 (z1, z2, z0, 0),
  34                 z0 = svqrdmlah_lane (z1, z2, z0, 0))
  35
  36 /*
  37 ** qrdmlah_lane_0_s64_untied:
  38 **      movprfx z0, z1
  39 **      sqrdmlah        z0\.d, z2\.d, z3\.d\[0\]
  40 **      ret
  41 */
  42 TEST_UNIFORM_Z (qrdmlah_lane_0_s64_untied, svint64_t,
  43                 z0 = svqrdmlah_lane_s64 (z1, z2, z3, 0),
  44                 z0 = svqrdmlah_lane (z1, z2, z3, 0))
  45
  46 /*
  47 ** qrdmlah_lane_1_s64:
  48 **      sqrdmlah        z0\.d, z1\.d, z2\.d\[1\]
  49 **      ret
  50 */
  51 TEST_UNIFORM_Z (qrdmlah_lane_1_s64, svint64_t,
  52                 z0 = svqrdmlah_lane_s64 (z0, z1, z2, 1),
  53                 z0 = svqrdmlah_lane (z0, z1, z2, 1))
  54
  55 /*
  56 ** qrdmlah_lane_z15_s64:
  57 **      str     d15, \[sp, -16\]!
  58 **      sqrdmlah        z0\.d, z1\.d, z15\.d\[1\]
  59 **      ldr     d15, \[sp\], 16
  60 **      ret
  61 */
  62 TEST_DUAL_LANE_REG (qrdmlah_lane_z15_s64, svint64_t, svint64_t, z15,
  63                     z0 = svqrdmlah_lane_s64 (z0, z1, z15, 1),
  64                     z0 = svqrdmlah_lane (z0, z1, z15, 1))
  65
  66 /*
  67 ** qrdmlah_lane_z16_s64:
  68 **      mov     (z[0-7])\.d, z16\.d
  69 **      sqrdmlah        z0\.d, z1\.d, \1\.d\[1\]
  70 **      ret
  71 */
  72 TEST_DUAL_LANE_REG (qrdmlah_lane_z16_s64, svint64_t, svint64_t, z16,
  73                     z0 = svqrdmlah_lane_s64 (z0, z1, z16, 1),
  74                     z0 = svqrdmlah_lane (z0, z1, z16, 1))