gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/sli_u16.c

   1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
   2
   3 #include "test_sve_acle.h"
   4
   5 /*
   6 ** sli_0_u16_tied1:
   7 **      sli     z0\.h, z1\.h, #0
   8 **      ret
   9 */
  10 TEST_UNIFORM_Z (sli_0_u16_tied1, svuint16_t,
  11                 z0 = svsli_n_u16 (z0, z1, 0),
  12                 z0 = svsli (z0, z1, 0))
  13
  14 /* Bad RA choice: no preferred output sequence.  */
  15 TEST_UNIFORM_Z (sli_0_u16_tied2, svuint16_t,
  16                 z0 = svsli_n_u16 (z1, z0, 0),
  17                 z0 = svsli (z1, z0, 0))
  18
  19 /*
  20 ** sli_0_u16_untied:
  21 **      mov     z0\.d, z1\.d
  22 **      sli     z0\.h, z2\.h, #0
  23 **      ret
  24 */
  25 TEST_UNIFORM_Z (sli_0_u16_untied, svuint16_t,
  26                 z0 = svsli_n_u16 (z1, z2, 0),
  27                 z0 = svsli (z1, z2, 0))
  28
  29 /*
  30 ** sli_1_u16_tied1:
  31 **      sli     z0\.h, z1\.h, #1
  32 **      ret
  33 */
  34 TEST_UNIFORM_Z (sli_1_u16_tied1, svuint16_t,
  35                 z0 = svsli_n_u16 (z0, z1, 1),
  36                 z0 = svsli (z0, z1, 1))
  37
  38 /* Bad RA choice: no preferred output sequence.  */
  39 TEST_UNIFORM_Z (sli_1_u16_tied2, svuint16_t,
  40                 z0 = svsli_n_u16 (z1, z0, 1),
  41                 z0 = svsli (z1, z0, 1))
  42
  43 /*
  44 ** sli_1_u16_untied:
  45 **      mov     z0\.d, z1\.d
  46 **      sli     z0\.h, z2\.h, #1
  47 **      ret
  48 */
  49 TEST_UNIFORM_Z (sli_1_u16_untied, svuint16_t,
  50                 z0 = svsli_n_u16 (z1, z2, 1),
  51                 z0 = svsli (z1, z2, 1))
  52
  53 /*
  54 ** sli_15_u16_tied1:
  55 **      sli     z0\.h, z1\.h, #15
  56 **      ret
  57 */
  58 TEST_UNIFORM_Z (sli_15_u16_tied1, svuint16_t,
  59                 z0 = svsli_n_u16 (z0, z1, 15),
  60                 z0 = svsli (z0, z1, 15))
  61
  62 /* Bad RA choice: no preferred output sequence.  */
  63 TEST_UNIFORM_Z (sli_15_u16_tied2, svuint16_t,
  64                 z0 = svsli_n_u16 (z1, z0, 15),
  65                 z0 = svsli (z1, z0, 15))
  66
  67 /*
  68 ** sli_15_u16_untied:
  69 **      mov     z0\.d, z1\.d
  70 **      sli     z0\.h, z2\.h, #15
  71 **      ret
  72 */
  73 TEST_UNIFORM_Z (sli_15_u16_untied, svuint16_t,
  74                 z0 = svsli_n_u16 (z1, z2, 15),
  75                 z0 = svsli (z1, z2, 15))