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[AArch64] Add support for the SVE2 ACLE
[thirdparty/gcc.git] / gcc / testsuite / gcc.target / aarch64 / sve2 / acle / asm / stnt1h_scatter_u64.c
1 /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */
2
3 #include "test_sve_acle.h"
4
5 /*
6 ** stnt1h_scatter_u64:
7 ** stnt1h z0\.d, p0, \[z1\.d\]
8 ** ret
9 */
10 TEST_STORE_SCATTER_ZS (stnt1h_scatter_u64, svuint64_t, svuint64_t,
11 svstnt1h_scatter_u64base_u64 (p0, z1, z0),
12 svstnt1h_scatter (p0, z1, z0))
13
14 /*
15 ** stnt1h_scatter_x0_u64_offset:
16 ** stnt1h z0\.d, p0, \[z1\.d, x0\]
17 ** ret
18 */
19 TEST_STORE_SCATTER_ZS (stnt1h_scatter_x0_u64_offset, svuint64_t, svuint64_t,
20 svstnt1h_scatter_u64base_offset_u64 (p0, z1, x0, z0),
21 svstnt1h_scatter_offset (p0, z1, x0, z0))
22
23 /*
24 ** stnt1h_scatter_m2_u64_offset:
25 ** mov (x[0-9]+), #?-2
26 ** stnt1h z0\.d, p0, \[z1\.d, \1\]
27 ** ret
28 */
29 TEST_STORE_SCATTER_ZS (stnt1h_scatter_m2_u64_offset, svuint64_t, svuint64_t,
30 svstnt1h_scatter_u64base_offset_u64 (p0, z1, -2, z0),
31 svstnt1h_scatter_offset (p0, z1, -2, z0))
32
33 /*
34 ** stnt1h_scatter_0_u64_offset:
35 ** stnt1h z0\.d, p0, \[z1\.d\]
36 ** ret
37 */
38 TEST_STORE_SCATTER_ZS (stnt1h_scatter_0_u64_offset, svuint64_t, svuint64_t,
39 svstnt1h_scatter_u64base_offset_u64 (p0, z1, 0, z0),
40 svstnt1h_scatter_offset (p0, z1, 0, z0))
41
42 /*
43 ** stnt1h_scatter_5_u64_offset:
44 ** mov (x[0-9]+), #?5
45 ** stnt1h z0\.d, p0, \[z1\.d, \1\]
46 ** ret
47 */
48 TEST_STORE_SCATTER_ZS (stnt1h_scatter_5_u64_offset, svuint64_t, svuint64_t,
49 svstnt1h_scatter_u64base_offset_u64 (p0, z1, 5, z0),
50 svstnt1h_scatter_offset (p0, z1, 5, z0))
51
52 /*
53 ** stnt1h_scatter_6_u64_offset:
54 ** mov (x[0-9]+), #?6
55 ** stnt1h z0\.d, p0, \[z1\.d, \1\]
56 ** ret
57 */
58 TEST_STORE_SCATTER_ZS (stnt1h_scatter_6_u64_offset, svuint64_t, svuint64_t,
59 svstnt1h_scatter_u64base_offset_u64 (p0, z1, 6, z0),
60 svstnt1h_scatter_offset (p0, z1, 6, z0))
61
62 /*
63 ** stnt1h_scatter_62_u64_offset:
64 ** mov (x[0-9]+), #?62
65 ** stnt1h z0\.d, p0, \[z1\.d, \1\]
66 ** ret
67 */
68 TEST_STORE_SCATTER_ZS (stnt1h_scatter_62_u64_offset, svuint64_t, svuint64_t,
69 svstnt1h_scatter_u64base_offset_u64 (p0, z1, 62, z0),
70 svstnt1h_scatter_offset (p0, z1, 62, z0))
71
72 /*
73 ** stnt1h_scatter_64_u64_offset:
74 ** mov (x[0-9]+), #?64
75 ** stnt1h z0\.d, p0, \[z1\.d, \1\]
76 ** ret
77 */
78 TEST_STORE_SCATTER_ZS (stnt1h_scatter_64_u64_offset, svuint64_t, svuint64_t,
79 svstnt1h_scatter_u64base_offset_u64 (p0, z1, 64, z0),
80 svstnt1h_scatter_offset (p0, z1, 64, z0))
81
82 /*
83 ** stnt1h_scatter_x0_u64_index:
84 ** lsl (x[0-9]+), x0, #?1
85 ** stnt1h z0\.d, p0, \[z1\.d, \1\]
86 ** ret
87 */
88 TEST_STORE_SCATTER_ZS (stnt1h_scatter_x0_u64_index, svuint64_t, svuint64_t,
89 svstnt1h_scatter_u64base_index_u64 (p0, z1, x0, z0),
90 svstnt1h_scatter_index (p0, z1, x0, z0))
91
92 /*
93 ** stnt1h_scatter_m1_u64_index:
94 ** mov (x[0-9]+), #?-2
95 ** stnt1h z0\.d, p0, \[z1\.d, \1\]
96 ** ret
97 */
98 TEST_STORE_SCATTER_ZS (stnt1h_scatter_m1_u64_index, svuint64_t, svuint64_t,
99 svstnt1h_scatter_u64base_index_u64 (p0, z1, -1, z0),
100 svstnt1h_scatter_index (p0, z1, -1, z0))
101
102 /*
103 ** stnt1h_scatter_0_u64_index:
104 ** stnt1h z0\.d, p0, \[z1\.d\]
105 ** ret
106 */
107 TEST_STORE_SCATTER_ZS (stnt1h_scatter_0_u64_index, svuint64_t, svuint64_t,
108 svstnt1h_scatter_u64base_index_u64 (p0, z1, 0, z0),
109 svstnt1h_scatter_index (p0, z1, 0, z0))
110
111 /*
112 ** stnt1h_scatter_5_u64_index:
113 ** mov (x[0-9]+), #?10
114 ** stnt1h z0\.d, p0, \[z1\.d, \1\]
115 ** ret
116 */
117 TEST_STORE_SCATTER_ZS (stnt1h_scatter_5_u64_index, svuint64_t, svuint64_t,
118 svstnt1h_scatter_u64base_index_u64 (p0, z1, 5, z0),
119 svstnt1h_scatter_index (p0, z1, 5, z0))
120
121 /*
122 ** stnt1h_scatter_31_u64_index:
123 ** mov (x[0-9]+), #?62
124 ** stnt1h z0\.d, p0, \[z1\.d, \1\]
125 ** ret
126 */
127 TEST_STORE_SCATTER_ZS (stnt1h_scatter_31_u64_index, svuint64_t, svuint64_t,
128 svstnt1h_scatter_u64base_index_u64 (p0, z1, 31, z0),
129 svstnt1h_scatter_index (p0, z1, 31, z0))
130
131 /*
132 ** stnt1h_scatter_32_u64_index:
133 ** mov (x[0-9]+), #?64
134 ** stnt1h z0\.d, p0, \[z1\.d, \1\]
135 ** ret
136 */
137 TEST_STORE_SCATTER_ZS (stnt1h_scatter_32_u64_index, svuint64_t, svuint64_t,
138 svstnt1h_scatter_u64base_index_u64 (p0, z1, 32, z0),
139 svstnt1h_scatter_index (p0, z1, 32, z0))
140
141 /*
142 ** stnt1h_scatter_x0_u64_s64offset:
143 ** stnt1h z0\.d, p0, \[z1\.d, x0\]
144 ** ret
145 */
146 TEST_STORE_SCATTER_SZ (stnt1h_scatter_x0_u64_s64offset, svuint64_t, uint16_t, svint64_t,
147 svstnt1h_scatter_s64offset_u64 (p0, x0, z1, z0),
148 svstnt1h_scatter_offset (p0, x0, z1, z0))
149
150 /*
151 ** stnt1h_scatter_u64_s64offset:
152 ** stnt1h z0\.d, p0, \[z1\.d, x0\]
153 ** ret
154 */
155 TEST_STORE_SCATTER_SZ (stnt1h_scatter_u64_s64offset, svuint64_t, uint16_t, svint64_t,
156 svstnt1h_scatter_s64offset_u64 (p0, x0, z1, z0),
157 svstnt1h_scatter_offset (p0, x0, z1, z0))
158
159 /*
160 ** stnt1h_scatter_x0_u64_u64offset:
161 ** stnt1h z0\.d, p0, \[z1\.d, x0\]
162 ** ret
163 */
164 TEST_STORE_SCATTER_SZ (stnt1h_scatter_x0_u64_u64offset, svuint64_t, uint16_t, svuint64_t,
165 svstnt1h_scatter_u64offset_u64 (p0, x0, z1, z0),
166 svstnt1h_scatter_offset (p0, x0, z1, z0))
167
168 /*
169 ** stnt1h_scatter_u64_u64offset:
170 ** stnt1h z0\.d, p0, \[z1\.d, x0\]
171 ** ret
172 */
173 TEST_STORE_SCATTER_SZ (stnt1h_scatter_u64_u64offset, svuint64_t, uint16_t, svuint64_t,
174 svstnt1h_scatter_u64offset_u64 (p0, x0, z1, z0),
175 svstnt1h_scatter_offset (p0, x0, z1, z0))
176
177 /*
178 ** stnt1h_scatter_x0_u64_s64index:
179 ** lsl (z[0-9]+\.d), z1\.d, #1
180 ** stnt1h z0\.d, p0, \[\1, x0\]
181 ** ret
182 */
183 TEST_STORE_SCATTER_SZ (stnt1h_scatter_x0_u64_s64index, svuint64_t, uint16_t, svint64_t,
184 svstnt1h_scatter_s64index_u64 (p0, x0, z1, z0),
185 svstnt1h_scatter_index (p0, x0, z1, z0))
186
187 /*
188 ** stnt1h_scatter_u64_s64index:
189 ** lsl (z[0-9]+\.d), z1\.d, #1
190 ** stnt1h z0\.d, p0, \[\1, x0\]
191 ** ret
192 */
193 TEST_STORE_SCATTER_SZ (stnt1h_scatter_u64_s64index, svuint64_t, uint16_t, svint64_t,
194 svstnt1h_scatter_s64index_u64 (p0, x0, z1, z0),
195 svstnt1h_scatter_index (p0, x0, z1, z0))
196
197 /*
198 ** stnt1h_scatter_x0_u64_u64index:
199 ** lsl (z[0-9]+\.d), z1\.d, #1
200 ** stnt1h z0\.d, p0, \[\1, x0\]
201 ** ret
202 */
203 TEST_STORE_SCATTER_SZ (stnt1h_scatter_x0_u64_u64index, svuint64_t, uint16_t, svuint64_t,
204 svstnt1h_scatter_u64index_u64 (p0, x0, z1, z0),
205 svstnt1h_scatter_index (p0, x0, z1, z0))
206
207 /*
208 ** stnt1h_scatter_u64_u64index:
209 ** lsl (z[0-9]+\.d), z1\.d, #1
210 ** stnt1h z0\.d, p0, \[\1, x0\]
211 ** ret
212 */
213 TEST_STORE_SCATTER_SZ (stnt1h_scatter_u64_u64index, svuint64_t, uint16_t, svuint64_t,
214 svstnt1h_scatter_u64index_u64 (p0, x0, z1, z0),
215 svstnt1h_scatter_index (p0, x0, z1, z0))