gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c

   1 /* Verify that overloaded built-ins for vec_insert() with int
   2    inputs produce the right codegen.  Power9 variant.  */
   3
   4 /* { dg-do compile { target { powerpc*-*-linux* } } } */
   5 /* { dg-require-effective-target powerpc_p9vector_ok } */
   6 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
   7 /* { dg-options "-O2 -mcpu=power9" } */
   8
   9 #include <altivec.h>
  10
  11 vector bool int
  12 testbi_var(unsigned int x, vector bool int v, signed int i)
  13 {
  14    return vec_insert(x, v, i);
  15 }
  16 vector signed int
  17 testsi_var(signed int x, vector signed int v, signed int i)
  18 {
  19    return vec_insert(x, v, i);
  20 }
  21 vector unsigned int
  22 testui1_var(signed int x, vector unsigned int v, signed int i)
  23 {
  24    return vec_insert(x, v, i);
  25 }
  26 vector unsigned int
  27 testui2_var(unsigned int x, vector unsigned int v, signed int i)
  28 {
  29    return vec_insert(x, v, i);
  30 }
  31 vector bool int
  32 testbi_cst(unsigned int x, vector bool int v)
  33 {
  34    return vec_insert(x, v, 12);
  35 }
  36 vector signed int
  37 testsi_cst(signed int x, vector signed int v)
  38 {
  39    return vec_insert(x, v, 12);
  40 }
  41 vector unsigned int
  42 testui1_cst(signed int x, vector unsigned int v)
  43 {
  44    return vec_insert(x, v, 12);
  45 }
  46 vector unsigned int
  47 testui2_cst(unsigned int x, vector unsigned int v)
  48 {
  49    return vec_insert(x, v, 12);
  50 }
  51
  52
  53 /* load immediate, add, store, stb, load variable test.  */
  54 /* { dg-final { scan-assembler-times {\mstxv\M|\mstvx\M} 4 } } */
  55 /* { dg-final { scan-assembler-times {\mstwx\M} 4 { target lp64 } } } */
  56 /* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 4 { target lp64 } } } */
  57
  58 /* an insert and a move per constant test. */
  59 /* { dg-final { scan-assembler-times {\mmtvsrwz\M} 4 { target lp64 } } } */
  60 /* { dg-final { scan-assembler-times {\mxxinsertw\M} 4 { target lp64 } } } */
  61
  62
  63 /* { dg-final { scan-assembler-times {\maddi\M} 12 { target ilp32 } } } */
  64 /* { dg-final { scan-assembler-times {\mstw\M} 8 { target ilp32 } } } */
  65 /* { dg-final { scan-assembler-times {\mlxv\M} 8 { target ilp32 } } } */
  66 /* { dg-final { scan-assembler-times {\mlvewx\M} 4 { target ilp32 } } } */
  67 /* { dg-final { scan-assembler-times {\mvperm\M} 4 { target ilp32 } } } */