]> git.ipfire.org Git - thirdparty/gcc.git/blob - gcc/testsuite/gcc.target/riscv/rvv/base/mov-7.c
RISC-V: Support load/store in mov<mode> pattern for RVV modes.
[thirdparty/gcc.git] / gcc / testsuite / gcc.target / riscv / rvv / base / mov-7.c
1 /* { dg-do compile } */
2 /* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
3
4 #include <riscv_vector.h>
5
6 /* This testcase is testing whether RISC-V define REGMODE_NATURAL_SIZE. */
7 void foo (int8_t *in, int8_t *out)
8 {
9 vint8mf2_t v = *(vint8mf2_t*)in;
10 vint32mf2_t v2 = *(vint32mf2_t*)in;
11 *(vint8mf2_t*)out = v;
12 *(vint32mf2_t*)(out + 16) = v2;
13 }