1 # Copyright (C) 1999-2022 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
35 # "! Fortran" for Fortran code,
37 # "// ObjC++" for ObjC++
39 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
40 # allow for ObjC/ObjC++ specific flags.
42 proc check_compile {basename type contents args} {
44 verbose "check_compile tool: $tool for $basename"
46 # Save additional_sources to avoid compiling testsuite's sources
47 # against check_compile's source.
48 global additional_sources
49 if [info exists additional_sources] {
50 set tmp_additional_sources "$additional_sources"
51 set additional_sources ""
54 if { [llength $args] > 0 } {
55 set options [list "additional_flags=[lindex $args 0]"]
59 switch -glob -- $contents {
60 "*! Fortran*" { set src ${basename}[pid].f90 }
61 "*// C++*" { set src ${basename}[pid].cc }
62 "*// D*" { set src ${basename}[pid].d }
63 "*// ObjC++*" { set src ${basename}[pid].mm }
64 "*/* ObjC*" { set src ${basename}[pid].m }
65 "*// Go*" { set src ${basename}[pid].go }
68 "objc" { set src ${basename}[pid].m }
69 "obj-c++" { set src ${basename}[pid].mm }
70 default { set src ${basename}[pid].c }
75 set compile_type $type
77 assembly { set output ${basename}[pid].s }
78 object { set output ${basename}[pid].o }
79 executable { set output ${basename}[pid].exe }
81 set output ${basename}[pid].s
82 lappend options "additional_flags=-fdump-$type"
83 set compile_type assembly
90 set save_compiler_flags $compiler_flags
91 set lines [${tool}_target_compile $src $output $compile_type "$options"]
92 set compiler_flags $save_compiler_flags
95 set scan_output $output
96 # Don't try folding this into the switch above; calling "glob" before the
97 # file is created won't work.
98 if [regexp "rtl-(.*)" $type dummy rtl_type] {
99 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
103 # Restore additional_sources.
104 if [info exists additional_sources] {
105 set additional_sources "$tmp_additional_sources"
108 return [list $lines $scan_output]
111 proc current_target_name { } {
113 if [info exists target_info(target,name)] {
114 set answer $target_info(target,name)
121 # Implement an effective-target check for property PROP by invoking
122 # the Tcl command ARGS and seeing if it returns true.
124 proc check_cached_effective_target { prop args } {
127 set target [current_target_name]
128 if {![info exists et_cache($prop,$target)]} {
129 verbose "check_cached_effective_target $prop: checking $target" 2
130 if {[string is true -strict $args] || [string is false -strict $args]} {
131 error {check_cached_effective_target condition already evaluated; did you pass [...] instead of the expected {...}?}
133 set code [catch {uplevel eval $args} result]
134 if {$code != 0 && $code != 2} {
135 return -code $code $result
137 set et_cache($prop,$target) $result
140 set value $et_cache($prop,$target)
141 verbose "check_cached_effective_target $prop: returning $value for $target" 2
145 # Implements a version of check_cached_effective_target that also takes et_index
146 # into account when creating the key for the cache.
147 proc check_cached_effective_target_indexed { prop args } {
149 set key "$et_index $prop"
150 verbose "check_cached_effective_target_index $prop: returning $key" 2
152 return [check_cached_effective_target $key [list uplevel eval $args]]
155 # Clear effective-target cache. This is useful after testing
156 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
158 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
159 # do a clear_effective_target_cache at the end as the target cache can
160 # make decisions based upon the flags, and those decisions need to be
161 # redone when the flags change. An example of this is the
162 # asan_init/asan_finish pair.
164 proc clear_effective_target_cache { } {
169 # Like check_compile, but delete the output file and return true if the
170 # compiler printed no messages.
171 proc check_no_compiler_messages_nocache {args} {
172 set result [eval check_compile $args]
173 set lines [lindex $result 0]
174 set output [lindex $result 1]
175 remote_file build delete $output
176 return [string match "" $lines]
179 # Like check_no_compiler_messages_nocache, but cache the result.
180 # PROP is the property we're checking, and doubles as a prefix for
181 # temporary filenames.
182 proc check_no_compiler_messages {prop args} {
183 return [check_cached_effective_target $prop {
184 eval [list check_no_compiler_messages_nocache $prop] $args
188 # Like check_compile, but return true if the compiler printed no
189 # messages and if the contents of the output file satisfy PATTERN.
190 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
191 # don't match regular expression REGEXP, otherwise they satisfy it
192 # if they do match regular expression PATTERN. (PATTERN can start
193 # with something like "[!]" if the regular expression needs to match
194 # "!" as the first character.)
196 # Delete the output file before returning. The other arguments are
197 # as for check_compile.
198 proc check_no_messages_and_pattern_nocache {basename pattern args} {
201 set result [eval [list check_compile $basename] $args]
202 set lines [lindex $result 0]
203 set output [lindex $result 1]
206 if { [string match "" $lines] } {
207 set chan [open "$output"]
208 set invert [regexp {^!(.*)} $pattern dummy pattern]
209 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
213 remote_file build delete $output
217 # Like check_no_messages_and_pattern_nocache, but cache the result.
218 # PROP is the property we're checking, and doubles as a prefix for
219 # temporary filenames.
220 proc check_no_messages_and_pattern {prop pattern args} {
221 return [check_cached_effective_target $prop {
222 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
226 # Try to compile and run an executable from code CONTENTS. Return true
227 # if the compiler reports no messages and if execution "passes" in the
228 # usual DejaGNU sense. The arguments are as for check_compile, with
229 # TYPE implicitly being "executable".
230 proc check_runtime_nocache {basename contents args} {
233 set result [eval [list check_compile $basename executable $contents] $args]
234 set lines [lindex $result 0]
235 set output [lindex $result 1]
238 if { [string match "" $lines] } {
239 # No error messages, everything is OK.
240 set result [remote_load target "./$output" "" ""]
241 set status [lindex $result 0]
242 verbose "check_runtime_nocache $basename: status is <$status>" 2
243 if { $status == "pass" } {
247 remote_file build delete $output
251 # Like check_runtime_nocache, but cache the result. PROP is the
252 # property we're checking, and doubles as a prefix for temporary
254 proc check_runtime {prop args} {
257 return [check_cached_effective_target $prop {
258 eval [list check_runtime_nocache $prop] $args
262 # Return 1 if GCC was configured with $pattern.
263 proc check_configured_with { pattern } {
266 set options [list "additional_flags=-v"]
267 set gcc_output [${tool}_target_compile "" "" "none" $options]
268 if { [ regexp "Configured with: \[^\n\]*$pattern" $gcc_output ] } {
269 verbose "Matched: $pattern" 2
273 verbose "Failed to match: $pattern" 2
277 ###############################
278 # proc check_weak_available { }
279 ###############################
281 # weak symbols are only supported in some configs/object formats
282 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
284 proc check_weak_available { } {
287 # All mips targets should support it
289 if { [ string first "mips" $target_cpu ] >= 0 } {
293 # All AIX targets should support it
295 if { [istarget *-*-aix*] } {
299 # All solaris2 targets should support it
301 if { [istarget *-*-solaris2*] } {
305 # Windows targets Cygwin and MingW32 support it
307 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
311 # HP-UX 10.X doesn't support it
313 if { [istarget hppa*-*-hpux10*] } {
317 # nvptx (nearly) supports it
319 if { [istarget nvptx-*-*] } {
323 # pdp11 doesn't support it
325 if { [istarget pdp11*-*-*] } {
329 # VxWorks hardly supports it (vx7 RTPs only)
331 if { [istarget *-*-vxworks*] } {
335 # ELF and ECOFF support it. a.out does with gas/gld but may also with
336 # other linkers, so we should try it
338 set objformat [gcc_target_object_format]
346 unknown { return -1 }
351 # return 1 if weak undefined symbols are supported.
353 proc check_effective_target_weak_undefined { } {
354 if { [istarget hppa*-*-hpux*] } {
357 return [check_runtime weak_undefined {
358 extern void foo () __attribute__((weak));
359 int main (void) { if (foo) return 1; return 0; }
363 ###############################
364 # proc check_weak_override_available { }
365 ###############################
367 # Like check_weak_available, but return 0 if weak symbol definitions
368 # cannot be overridden.
370 proc check_weak_override_available { } {
371 if { [istarget *-*-mingw*] } {
374 return [check_weak_available]
377 # The "noinit" attribute is only supported by some targets.
378 # This proc returns 1 if it's supported, 0 if it's not.
380 proc check_effective_target_noinit { } {
381 if { [istarget arm*-*-eabi]
382 || [istarget msp430-*-*] } {
389 # The "persistent" attribute is only supported by some targets.
390 # This proc returns 1 if it's supported, 0 if it's not.
392 proc check_effective_target_persistent { } {
393 if { [istarget arm*-*-eabi]
394 || [istarget msp430-*-*] } {
401 ###############################
402 # proc check_visibility_available { what_kind }
403 ###############################
405 # The visibility attribute is only support in some object formats
406 # This proc returns 1 if it is supported, 0 if not.
407 # The argument is the kind of visibility, default/protected/hidden/internal.
409 proc check_visibility_available { what_kind } {
410 if [string match "" $what_kind] { set what_kind "hidden" }
412 return [check_no_compiler_messages visibility_available_$what_kind object "
413 void f() __attribute__((visibility(\"$what_kind\")));
418 ###############################
419 # proc check_alias_available { }
420 ###############################
422 # Determine if the target toolchain supports the alias attribute.
424 # Returns 2 if the target supports aliases. Returns 1 if the target
425 # only supports weak aliased. Returns 0 if the target does not
426 # support aliases at all. Returns -1 if support for aliases could not
429 proc check_alias_available { } {
432 return [check_cached_effective_target alias_available {
435 verbose "check_alias_available compiling testfile $src" 2
436 set f [open $src "w"]
437 # Compile a small test program. The definition of "g" is
438 # necessary to keep the Solaris assembler from complaining
440 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
441 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
443 set lines [${tool}_target_compile $src $obj object ""]
445 remote_file build delete $obj
447 if [string match "" $lines] then {
448 # No error messages, everything is OK.
451 if [regexp "alias definitions not supported" $lines] {
452 verbose "check_alias_available target does not support aliases" 2
454 set objformat [gcc_target_object_format]
456 if { $objformat == "elf" } {
457 verbose "check_alias_available but target uses ELF format, so it ought to" 2
463 if [regexp "only weak aliases are supported" $lines] {
464 verbose "check_alias_available target supports only weak aliases" 2
474 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
476 proc check_effective_target_alias { } {
477 if { [check_alias_available] < 2 } {
484 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
486 proc check_ifunc_available { } {
487 return [check_no_compiler_messages ifunc_available object {
492 typedef void F (void);
493 F* g (void) { return &f_; }
494 void f () __attribute__ ((ifunc ("g")));
501 # Returns true if --gc-sections is supported on the target.
503 proc check_gc_sections_available { } {
506 return [check_cached_effective_target gc_sections_available {
507 # Some targets don't support gc-sections despite whatever's
508 # advertised by ld's options.
509 if { [istarget alpha*-*-*]
510 || [istarget ia64-*-*] } {
514 # elf2flt uses -q (--emit-relocs), which is incompatible with
516 if { [board_info target exists ldflags]
517 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
521 # VxWorks kernel modules are relocatable objects linked with -r,
522 # while RTP executables are linked with -q (--emit-relocs).
523 # Both of these options are incompatible with --gc-sections.
524 if { [istarget *-*-vxworks*] } {
528 # Check if the ld used by gcc supports --gc-sections.
529 set options [list "additional_flags=-print-prog-name=ld"]
530 set gcc_ld [lindex [${tool}_target_compile "" "" "none" $options] 0]
531 set ld_output [remote_exec host "$gcc_ld" "--help"]
532 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
540 # Returns 1 if "dot" is supported on the host.
542 proc check_dot_available { } {
543 verbose "check_dot_available" 2
545 set status [remote_exec host "dot" "-V"]
546 verbose " status: $status" 2
547 if { [lindex $status 0] != 0 } {
553 # Return 1 if according to target_info struct and explicit target list
554 # target is supposed to support trampolines.
556 proc check_effective_target_trampolines { } {
557 if [target_info exists gcc,no_trampolines] {
560 if { [istarget avr-*-*]
561 || [istarget msp430-*-*]
562 || [istarget nvptx-*-*]
563 || [istarget hppa2.0w-hp-hpux11.23]
564 || [istarget hppa64-hp-hpux11.23]
565 || [istarget pru-*-*]
566 || [istarget bpf-*-*] } {
572 # Return 1 if target has limited stack size.
574 proc check_effective_target_stack_size { } {
575 if [target_info exists gcc,stack_size] {
581 # Return the value attribute of an effective target, otherwise return 0.
583 proc dg-effective-target-value { effective_target } {
584 if { "$effective_target" == "stack_size" } {
585 if [check_effective_target_stack_size] {
586 return [target_info gcc,stack_size]
593 # Return 1 if signal.h is supported.
595 proc check_effective_target_signal { } {
596 if [target_info exists gcc,signal_suppress] {
602 # Return 1 if according to target_info struct and explicit target list
603 # target disables -fdelete-null-pointer-checks. Targets should return 0
604 # if they simply default to -fno-delete-null-pointer-checks but obey
605 # -fdelete-null-pointer-checks when passed explicitly (and tests that
606 # depend on this option should do that).
608 proc check_effective_target_keeps_null_pointer_checks { } {
609 if [target_info exists keeps_null_pointer_checks] {
612 if { [istarget msp430-*-*] || [istarget cr16-*-*] } {
618 # Return the autofdo profile wrapper
620 # Linux by default allows 516KB of perf event buffers
621 # in /proc/sys/kernel/perf_event_mlock_kb
622 # Each individual perf tries to grab it
623 # This causes problems with parallel test suite runs. Instead
624 # limit us to 8 pages (32K), which should be good enough
625 # for the small test programs. With the default settings
626 # this allows parallelism of 16 and higher of parallel gcc-auto-profile
627 proc profopt-perf-wrapper { } {
629 return "$srcdir/../config/i386/gcc-auto-profile -m8 "
632 # Return true if profiling is supported on the target.
634 proc check_profiling_available { test_what } {
635 verbose "Profiling argument is <$test_what>" 1
637 # These conditions depend on the argument so examine them before
638 # looking at the cache variable.
640 # Tree profiling requires TLS runtime support.
641 if { $test_what == "-fprofile-generate" } {
642 if { ![check_effective_target_tls_runtime] } {
647 if { $test_what == "-fauto-profile" } {
648 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
649 verbose "autofdo only supported on linux"
652 # not cross compiling?
654 verbose "autofdo not supported for non native builds"
657 set event [profopt-perf-wrapper]
659 verbose "autofdo not supported"
663 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "-m8 true -v >/dev/null"]
664 if { [lindex $status 0] != 0 } {
665 verbose "autofdo not supported because perf does not work"
669 # no good way to check this in advance -- check later instead.
670 #set status [remote_exec host "create_gcov" "2>/dev/null"]
671 #if { [lindex $status 0] != 255 } {
672 # verbose "autofdo not supported due to missing create_gcov"
677 # Support for -p on solaris2 relies on mcrt1.o which comes with the
678 # vendor compiler. We cannot reliably predict the directory where the
679 # vendor compiler (and thus mcrt1.o) is installed so we can't
680 # necessarily find mcrt1.o even if we have it.
681 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
685 # We don't yet support profiling for MIPS16.
686 if { [istarget mips*-*-*]
687 && ![check_effective_target_nomips16]
688 && ($test_what == "-p" || $test_what == "-pg") } {
692 # MinGW does not support -p.
693 if { [istarget *-*-mingw*] && $test_what == "-p" } {
697 # cygwin does not support -p.
698 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
702 # uClibc does not have gcrt1.o.
703 if { [check_effective_target_uclibc]
704 && ($test_what == "-p" || $test_what == "-pg") } {
708 # Now examine the cache variable.
709 set profiling_working \
710 [check_cached_effective_target profiling_available {
711 # Some targets don't have any implementation of __bb_init_func or are
712 # missing other needed machinery.
713 if {[istarget aarch64*-*-elf]
714 || [istarget am3*-*-linux*]
715 || [istarget amdgcn-*-*]
716 || [istarget arm*-*-eabi*]
717 || [istarget arm*-*-elf]
718 || [istarget arm*-*-symbianelf*]
719 || [istarget avr-*-*]
720 || [istarget bfin-*-*]
721 || [istarget cris-*-*]
722 || [istarget csky-*-elf*]
723 || [istarget fido-*-elf]
724 || [istarget h8300-*-*]
725 || [istarget lm32-*-*]
726 || [istarget m32c-*-elf]
727 || [istarget m68k-*-elf]
728 || [istarget m68k-*-uclinux*]
729 || [istarget mips*-*-elf*]
730 || [istarget mmix-*-*]
731 || [istarget mn10300-*-elf*]
732 || [istarget moxie-*-elf*]
733 || [istarget msp430-*-*]
734 || [istarget nds32*-*-elf]
735 || [istarget nios2-*-elf]
736 || [istarget nvptx-*-*]
737 || [istarget powerpc-*-eabi*]
738 || [istarget powerpc-*-elf]
739 || [istarget pru-*-*]
741 || [istarget tic6x-*-elf]
742 || [istarget visium-*-*]
743 || [istarget xstormy16-*]
744 || [istarget xtensa*-*-elf]
745 || [istarget *-*-rtems*]
746 || [istarget *-*-vxworks*] } {
753 # -pg link test result can't be cached since it may change between
755 if { $profiling_working == 1
756 && ![check_no_compiler_messages_nocache profiling executable {
757 int main() { return 0; } } "-pg"] } {
758 set profiling_working 0
761 return $profiling_working
764 # Check to see if a target is "freestanding". This is as per the definition
765 # in Section 4 of C99 standard. Effectively, it is a target which supports no
766 # extra headers or libraries other than what is considered essential.
767 proc check_effective_target_freestanding { } {
768 if { [istarget nvptx-*-*] } {
774 # Check to see that file I/O functions are available.
775 proc check_effective_target_fileio { } {
776 return [check_no_compiler_messages fileio_available executable {
779 char *n = tmpnam (NULL);
780 FILE *f = fopen (n, "w");
787 # Return 1 if target has packed layout of structure members by
788 # default, 0 otherwise. Note that this is slightly different than
789 # whether the target has "natural alignment": both attributes may be
792 proc check_effective_target_default_packed { } {
793 return [check_no_compiler_messages default_packed assembly {
794 struct x { char a; long b; } c;
795 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
799 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
800 # documentation, where the test also comes from.
802 proc check_effective_target_pcc_bitfield_type_matters { } {
803 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
804 # bitfields, but let's stick to the example code from the docs.
805 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
806 struct foo1 { char x; char :0; char y; };
807 struct foo2 { char x; int :0; char y; };
808 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
812 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
814 proc add_options_for_tls { flags } {
815 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
816 # libthread, so always pass -pthread for native TLS. Same for AIX.
817 # Need to duplicate native TLS check from
818 # check_effective_target_tls_native to avoid recursion.
819 if { ([istarget powerpc-ibm-aix*]) &&
820 [check_no_messages_and_pattern tls_native "!emutls" assembly {
822 int f (void) { return i; }
823 void g (int j) { i = j; }
825 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
830 # Return 1 if indirect jumps are supported, 0 otherwise.
832 proc check_effective_target_indirect_jumps {} {
833 if { [istarget nvptx-*-*] || [istarget bpf-*-*] } {
839 # Return 1 if nonlocal goto is supported, 0 otherwise.
841 proc check_effective_target_nonlocal_goto {} {
842 if { [istarget nvptx-*-*] || [istarget bpf-*-*] } {
848 # Return 1 if global constructors are supported, 0 otherwise.
850 proc check_effective_target_global_constructor {} {
851 if { [istarget nvptx-*-*]
852 || [istarget amdgcn-*-*]
853 || [istarget bpf-*-*] } {
859 # Return 1 if taking label values is supported, 0 otherwise.
861 proc check_effective_target_label_values {} {
862 if { [istarget nvptx-*-*] || [target_info exists gcc,no_label_values] } {
869 # Return 1 if builtin_return_address and builtin_frame_address are
870 # supported, 0 otherwise.
872 proc check_effective_target_return_address {} {
873 if { [istarget nvptx-*-*] } {
876 # No notion of return address in eBPF.
877 if { [istarget bpf-*-*] } {
880 # It could be supported on amdgcn, but isn't yet.
881 if { [istarget amdgcn*-*-*] } {
887 # Return 1 if the assembler does not verify function types against
888 # calls, 0 otherwise. Such verification will typically show up problems
889 # with K&R C function declarations.
891 proc check_effective_target_untyped_assembly {} {
892 if { [istarget nvptx-*-*] } {
898 # Return 1 if alloca is supported, 0 otherwise.
900 proc check_effective_target_alloca {} {
901 if { [istarget nvptx-*-*] } {
902 return [check_no_compiler_messages alloca assembly {
904 void g (int n) { f (__builtin_alloca (n)); }
910 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
912 proc check_effective_target_tls {} {
913 return [check_no_compiler_messages tls assembly {
915 int f (void) { return i; }
916 void g (int j) { i = j; }
920 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
922 proc check_effective_target_tls_native {} {
923 # VxWorks uses emulated TLS machinery, but with non-standard helper
924 # functions, so we fail to automatically detect it.
925 if { [istarget *-*-vxworks*] } {
929 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
931 int f (void) { return i; }
932 void g (int j) { i = j; }
936 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
938 proc check_effective_target_tls_emulated {} {
939 # VxWorks uses emulated TLS machinery, but with non-standard helper
940 # functions, so we fail to automatically detect it.
941 if { [istarget *-*-vxworks*] } {
945 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
947 int f (void) { return i; }
948 void g (int j) { i = j; }
952 # Return 1 if TLS executables can run correctly, 0 otherwise.
954 proc check_effective_target_tls_runtime {} {
955 return [check_runtime tls_runtime {
956 __thread int thr __attribute__((tls_model("global-dynamic"))) = 0;
957 int main (void) { return thr; }
958 } [add_options_for_tls ""]]
961 # Return 1 if atomic compare-and-swap is supported on 'int'
963 proc check_effective_target_cas_char {} {
964 return [check_no_compiler_messages cas_char assembly {
965 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
971 proc check_effective_target_cas_int {} {
972 return [check_no_compiler_messages cas_int assembly {
973 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
975 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
983 # Return 1 if -ffunction-sections is supported, 0 otherwise.
985 proc check_effective_target_function_sections {} {
986 # Darwin has its own scheme and silently accepts -ffunction-sections.
987 if { [istarget *-*-darwin*] } {
991 return [check_no_compiler_messages functionsections assembly {
993 } "-ffunction-sections"]
996 # Return 1 if instruction scheduling is available, 0 otherwise.
998 proc check_effective_target_scheduling {} {
999 return [check_no_compiler_messages scheduling object {
1001 } "-fschedule-insns"]
1004 # Return 1 if trapping arithmetic is available, 0 otherwise.
1006 proc check_effective_target_trapping {} {
1007 return [check_no_compiler_messages trapping object {
1008 int add (int a, int b) { return a + b; }
1012 # Return 1 if compilation with -fgraphite is error-free for trivial
1013 # code, 0 otherwise.
1015 proc check_effective_target_fgraphite {} {
1016 return [check_no_compiler_messages fgraphite object {
1021 # Return 1 if compiled with --enable-offload-targets=
1022 # This affects host compilation as ENABLE_OFFLOAD then evaluates to true.
1023 proc check_effective_target_offloading_enabled {} {
1024 return [check_configured_with "--enable-offload-targets"]
1027 # Return 1 if compilation with -fopenacc is error-free for trivial
1028 # code, 0 otherwise.
1030 proc check_effective_target_fopenacc {} {
1031 # nvptx/amdgcn can be built with the device-side bits of openacc, but it
1032 # does not make sense to test it as an openacc host.
1033 if [istarget nvptx-*-*] { return 0 }
1034 if [istarget amdgcn-*-*] { return 0 }
1036 return [check_no_compiler_messages fopenacc object {
1041 # Return 1 if compilation with -fopenmp is error-free for trivial
1042 # code, 0 otherwise.
1044 proc check_effective_target_fopenmp {} {
1045 # nvptx/amdgcn can be built with the device-side bits of libgomp, but it
1046 # does not make sense to test it as an openmp host.
1047 if [istarget nvptx-*-*] { return 0 }
1048 if [istarget amdgcn-*-*] { return 0 }
1050 return [check_no_compiler_messages fopenmp object {
1055 # Return 1 if compilation with -fgnu-tm is error-free for trivial
1056 # code, 0 otherwise.
1058 proc check_effective_target_fgnu_tm {} {
1059 return [check_no_compiler_messages fgnu_tm object {
1064 # Return 1 if the target supports mmap, 0 otherwise.
1066 proc check_effective_target_mmap {} {
1067 return [check_function_available "mmap"]
1070 # Return 1 if the target supports sysconf, 0 otherwise.
1072 proc check_effective_target_sysconf {} {
1073 return [check_function_available "sysconf"]
1076 # Return 1 if the target supports dlopen, 0 otherwise.
1077 proc check_effective_target_dlopen {} {
1078 return [check_no_compiler_messages dlopen executable {
1080 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
1081 } [add_options_for_dlopen ""]]
1084 proc add_options_for_dlopen { flags } {
1085 return "$flags -ldl"
1088 # Return 1 if the target supports clone, 0 otherwise.
1089 proc check_effective_target_clone {} {
1090 return [check_function_available "clone"]
1093 # Return 1 if the target supports setrlimit, 0 otherwise.
1094 proc check_effective_target_setrlimit {} {
1095 # Darwin has non-posix compliant RLIMIT_AS
1096 if { [istarget *-*-darwin*] } {
1099 return [check_function_available "setrlimit"]
1102 # Return 1 if the target supports gettimeofday, 0 otherwise.
1103 proc check_effective_target_gettimeofday {} {
1104 return [check_function_available "gettimeofday"]
1107 # Return 1 if the target supports swapcontext, 0 otherwise.
1108 proc check_effective_target_swapcontext {} {
1109 return [check_no_compiler_messages swapcontext executable {
1110 #include <ucontext.h>
1113 ucontext_t orig_context,child_context;
1114 if (swapcontext(&child_context, &orig_context) < 0) { }
1119 # Return 1 if the target supports POSIX threads, 0 otherwise.
1120 proc check_effective_target_pthread {} {
1121 return [check_no_compiler_messages pthread object {
1122 #include <pthread.h>
1127 # Return 1 if compilation with -gstabs is error-free for trivial
1128 # code, 0 otherwise.
1130 proc check_effective_target_stabs {} {
1131 return [check_no_compiler_messages stabs object {
1136 # Return 1 if compilation with -mpe-aligned-commons is error-free
1137 # for trivial code, 0 otherwise.
1139 proc check_effective_target_pe_aligned_commons {} {
1140 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1141 return [check_no_compiler_messages pe_aligned_commons object {
1143 } "-mpe-aligned-commons"]
1148 # Return 1 if the target supports -static
1149 proc check_effective_target_static {} {
1150 if { [istarget arm*-*-uclinuxfdpiceabi] } {
1153 return [check_no_compiler_messages static executable {
1154 int main (void) { return 0; }
1158 # Return 1 if the target supports -fstack-protector
1159 proc check_effective_target_fstack_protector {} {
1160 return [check_runtime fstack_protector {
1162 int main (int argc, char *argv[]) {
1164 return !strcpy (buf, strrchr (argv[0], '/'));
1166 } "-fstack-protector"]
1169 # Return 1 if the target supports -fstack-check or -fstack-check=$stack_kind
1170 proc check_stack_check_available { stack_kind } {
1171 if [string match "" $stack_kind] then {
1172 set stack_opt "-fstack-check"
1173 } else { set stack_opt "-fstack-check=$stack_kind" }
1175 return [check_no_compiler_messages stack_check_$stack_kind executable {
1176 int main (void) { return 0; }
1180 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1181 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1182 # warn when -fprofile-use is also supplied we test that combination too.
1184 proc check_effective_target_freorder {} {
1185 if { [check_no_compiler_messages freorder object {
1187 } "-freorder-blocks-and-partition"]
1188 && [check_no_compiler_messages fprofile_use_freorder object {
1190 } "-fprofile-use -freorder-blocks-and-partition -Wno-missing-profile"] } {
1196 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1197 # emitted, 0 otherwise. Whether a shared library can actually be built is
1198 # out of scope for this test.
1200 proc check_effective_target_fpic { } {
1201 # Note that M68K has a multilib that supports -fpic but not
1202 # -fPIC, so we need to check both. We test with a program that
1203 # requires GOT references.
1204 foreach arg {fpic fPIC} {
1205 if [check_no_compiler_messages $arg object {
1206 extern int foo (void); extern int bar;
1207 int baz (void) { return foo () + bar; }
1215 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1216 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1217 # assumes compiler will give warning if -fpic not supported. Here we check
1218 # whether binutils supports those new -fpic relocation modifiers, and assume
1219 # -fpic is supported if there is binutils support. GCC configuration will
1220 # enable -fpic for AArch64 in this case.
1222 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1223 # memory model -fpic relocation types.
1225 proc check_effective_target_aarch64_small_fpic { } {
1226 if { [istarget aarch64*-*-*] } {
1227 return [check_no_compiler_messages aarch64_small_fpic object {
1228 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1235 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1236 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1237 # in binutils since 2015-03-04 as PR gas/17843.
1239 # This test directive make sure binutils support all features needed by TLS LE
1240 # under -mtls-size=32 on AArch64.
1242 proc check_effective_target_aarch64_tlsle32 { } {
1243 if { [istarget aarch64*-*-*] } {
1244 return [check_no_compiler_messages aarch64_tlsle32 object {
1245 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1252 # Return 1 if -shared is supported, as in no warnings or errors
1253 # emitted, 0 otherwise.
1255 proc check_effective_target_shared { } {
1256 # Note that M68K has a multilib that supports -fpic but not
1257 # -fPIC, so we need to check both. We test with a program that
1258 # requires GOT references.
1259 return [check_no_compiler_messages shared executable {
1260 extern int foo (void); extern int bar;
1261 int baz (void) { return foo () + bar; }
1265 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1267 proc check_effective_target_pie { } {
1268 if { [istarget *-*-darwin\[912\]*]
1269 || [istarget *-*-dragonfly*]
1270 || [istarget *-*-freebsd*]
1271 || [istarget *-*-linux*]
1272 || [istarget arm*-*-uclinuxfdpiceabi]
1273 || [istarget *-*-gnu*]
1274 || [istarget *-*-amdhsa]} {
1277 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1278 # Full PIE support was added in Solaris 11.3, but gcc errors out
1279 # if missing, so check for that.
1280 return [check_no_compiler_messages pie executable {
1281 int main (void) { return 0; }
1287 # Return true if the target supports -mpaired-single (as used on MIPS).
1289 proc check_effective_target_mpaired_single { } {
1290 return [check_no_compiler_messages mpaired_single object {
1292 } "-mpaired-single"]
1295 # Return true if the target has access to FPU instructions.
1297 proc check_effective_target_hard_float { } {
1298 if { [istarget mips*-*-*] } {
1299 return [check_no_compiler_messages hard_float assembly {
1300 #if (defined __mips_soft_float || defined __mips16)
1301 #error __mips_soft_float || __mips16
1306 # This proc is actually checking the availabilty of FPU
1307 # support for doubles, so on the RX we must fail if the
1308 # 64-bit double multilib has been selected.
1309 if { [istarget rx-*-*] } {
1311 # return [check_no_compiler_messages hard_float assembly {
1312 #if defined __RX_64_BIT_DOUBLES__
1313 #error __RX_64_BIT_DOUBLES__
1318 # The generic test doesn't work for C-SKY because some cores have
1319 # hard float for single precision only.
1320 if { [istarget csky*-*-*] } {
1321 return [check_no_compiler_messages hard_float assembly {
1322 #if defined __csky_soft_float__
1323 #error __csky_soft_float__
1328 # The generic test equates hard_float with "no call for adding doubles".
1329 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1330 double a (double b, double c) { return b + c; }
1334 # Return true if the target is a 64-bit MIPS target.
1336 proc check_effective_target_mips64 { } {
1337 return [check_no_compiler_messages mips64 assembly {
1344 # Return true if the target is a MIPS target that does not produce
1347 proc check_effective_target_nomips16 { } {
1348 return [check_no_compiler_messages nomips16 object {
1352 /* A cheap way of testing for -mflip-mips16. */
1353 void foo (void) { asm ("addiu $20,$20,1"); }
1354 void bar (void) { asm ("addiu $20,$20,1"); }
1359 # Add the options needed for MIPS16 function attributes. At the moment,
1360 # we don't support MIPS16 PIC.
1362 proc add_options_for_mips16_attribute { flags } {
1363 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1366 # Return true if we can force a mode that allows MIPS16 code generation.
1367 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1370 proc check_effective_target_mips16_attribute { } {
1371 return [check_no_compiler_messages mips16_attribute assembly {
1375 #if defined __mips_hard_float \
1376 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1377 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1378 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1380 } [add_options_for_mips16_attribute ""]]
1383 # Return 1 if the target supports long double larger than double when
1384 # using the new ABI, 0 otherwise.
1386 proc check_effective_target_mips_newabi_large_long_double { } {
1387 return [check_no_compiler_messages mips_newabi_large_long_double object {
1388 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1392 # Return true if the target is a MIPS target that has access
1393 # to the LL and SC instructions.
1395 proc check_effective_target_mips_llsc { } {
1396 if { ![istarget mips*-*-*] } {
1399 # Assume that these instructions are always implemented for
1400 # non-elf* targets, via emulation if necessary.
1401 if { ![istarget *-*-elf*] } {
1404 # Otherwise assume LL/SC support for everything but MIPS I.
1405 return [check_no_compiler_messages mips_llsc assembly {
1412 # Return true if the target is a MIPS target that uses in-place relocations.
1414 proc check_effective_target_mips_rel { } {
1415 if { ![istarget mips*-*-*] } {
1418 return [check_no_compiler_messages mips_rel object {
1419 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1420 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1421 #error _ABIN32 && (_ABIN32 || _ABI64)
1426 # Return true if the target is a MIPS target that uses the EABI.
1428 proc check_effective_target_mips_eabi { } {
1429 if { ![istarget mips*-*-*] } {
1432 return [check_no_compiler_messages mips_eabi object {
1439 # Return 1 if the current multilib does not generate PIC by default.
1441 proc check_effective_target_nonpic { } {
1442 return [check_no_compiler_messages nonpic assembly {
1449 # Return 1 if the current multilib generates PIE by default.
1451 proc check_effective_target_pie_enabled { } {
1452 return [check_no_compiler_messages pie_enabled assembly {
1459 # Return 1 if the target generates -fstack-protector by default.
1461 proc check_effective_target_fstack_protector_enabled {} {
1462 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1463 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1464 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1470 # Return 1 if the target does not use a status wrapper.
1472 proc check_effective_target_unwrapped { } {
1473 if { [target_info needs_status_wrapper] != "" \
1474 && [target_info needs_status_wrapper] != "0" } {
1480 # Return true if iconv is supported on the target. In particular IBM1047.
1482 proc check_iconv_available { test_what } {
1485 # If the tool configuration file has not set libiconv, try "-liconv"
1486 if { ![info exists libiconv] } {
1487 set libiconv "-liconv"
1489 set test_what [lindex $test_what 1]
1490 return [check_runtime_nocache $test_what [subst {
1496 cd = iconv_open ("$test_what", "UTF-8");
1497 if (cd == (iconv_t) -1)
1504 # Return true if the atomic library is supported on the target.
1505 proc check_effective_target_libatomic_available { } {
1506 return [check_no_compiler_messages libatomic_available executable {
1507 int main (void) { return 0; }
1511 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1513 proc check_ascii_locale_available { } {
1517 # Return true if named sections are supported on this target.
1519 proc check_named_sections_available { } {
1520 return [check_no_compiler_messages named_sections assembly {
1521 int __attribute__ ((section("whatever"))) foo;
1525 # Return true if the "naked" function attribute is supported on this target.
1527 proc check_effective_target_naked_functions { } {
1528 return [check_no_compiler_messages naked_functions assembly {
1529 void f() __attribute__((naked));
1533 # Return 1 if the target supports Fortran real kinds larger than real(8),
1536 # When the target name changes, replace the cached result.
1538 proc check_effective_target_fortran_large_real { } {
1539 return [check_no_compiler_messages fortran_large_real executable {
1541 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1548 # Return 1 if the target supports Fortran real kind real(16),
1549 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1550 # this checks for Real(16) only; the other returned real(10) if
1551 # both real(10) and real(16) are available.
1553 # When the target name changes, replace the cached result.
1555 proc check_effective_target_fortran_real_16 { } {
1556 return [check_no_compiler_messages fortran_real_16 executable {
1564 # Return 1 if the target supports Fortran real kind 10,
1565 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1566 # this checks for real(10) only.
1568 # When the target name changes, replace the cached result.
1570 proc check_effective_target_fortran_real_10 { } {
1571 return [check_no_compiler_messages fortran_real_10 executable {
1579 # Return 1 if the target supports Fortran real kind C_FLOAT128,
1580 # 0 otherwise. This differs from check_effective_target_fortran_real_16
1581 # because _Float128 has the additional requirement that it be the
1582 # 128-bit IEEE encoding; even if _Float128 is available in C, it may not
1583 # have a corresponding Fortran kind on targets (PowerPC) that use some
1584 # other encoding for long double/TFmode/real(16).
1585 proc check_effective_target_fortran_real_c_float128 { } {
1586 return [check_no_compiler_messages fortran_real_c_float128 executable {
1589 real(kind=c_float128) :: x
1595 # Return 1 if the target supports Fortran's IEEE modules,
1598 # When the target name changes, replace the cached result.
1600 proc check_effective_target_fortran_ieee { flags } {
1601 return [check_no_compiler_messages fortran_ieee executable {
1603 use, intrinsic :: ieee_features
1609 # Return 1 if the target supports SQRT for the largest floating-point
1610 # type. (Some targets lack the libm support for this FP type.)
1611 # On most targets, this check effectively checks either whether sqrtl is
1612 # available or on __float128 systems whether libquadmath is installed,
1613 # which provides sqrtq.
1615 # When the target name changes, replace the cached result.
1617 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1618 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1620 use iso_fortran_env, only: real_kinds
1621 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1622 real(kind=maxFP), volatile :: x
1630 # Return 1 if the target supports Fortran integer kinds larger than
1631 # integer(8), 0 otherwise.
1633 # When the target name changes, replace the cached result.
1635 proc check_effective_target_fortran_large_int { } {
1636 return [check_no_compiler_messages fortran_large_int executable {
1638 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1639 integer(kind=k) :: i
1644 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1646 # When the target name changes, replace the cached result.
1648 proc check_effective_target_fortran_integer_16 { } {
1649 return [check_no_compiler_messages fortran_integer_16 executable {
1656 # Return 1 if we can statically link libgfortran, 0 otherwise.
1658 # When the target name changes, replace the cached result.
1660 proc check_effective_target_static_libgfortran { } {
1661 return [check_no_compiler_messages static_libgfortran executable {
1668 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1670 proc check_effective_target_rdynamic { } {
1671 return [check_no_compiler_messages rdynamic executable {
1672 int main() { return 0; }
1676 proc check_linker_plugin_available { } {
1677 return [check_no_compiler_messages_nocache linker_plugin executable {
1678 int main() { return 0; }
1679 } "-flto -fuse-linker-plugin"]
1682 # Return 1 if the target OS supports running SSE executables, 0
1683 # otherwise. Cache the result.
1685 proc check_sse_os_support_available { } {
1686 return [check_cached_effective_target sse_os_support_available {
1687 # If this is not the right target then we can skip the test.
1688 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1696 # Return 1 if the target OS supports running AVX executables, 0
1697 # otherwise. Cache the result.
1699 proc check_avx_os_support_available { } {
1700 return [check_cached_effective_target avx_os_support_available {
1701 # If this is not the right target then we can skip the test.
1702 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1705 # Check that OS has AVX and SSE saving enabled.
1706 check_runtime_nocache avx_os_support_available {
1709 unsigned int eax, edx;
1711 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1712 return (eax & 0x06) != 0x06;
1719 # Return 1 if the target OS supports running AVX executables, 0
1720 # otherwise. Cache the result.
1722 proc check_avx512_os_support_available { } {
1723 return [check_cached_effective_target avx512_os_support_available {
1724 # If this is not the right target then we can skip the test.
1725 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1728 # Check that OS has AVX512, AVX and SSE saving enabled.
1729 check_runtime_nocache avx512_os_support_available {
1732 unsigned int eax, edx;
1734 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1735 return (eax & 0xe6) != 0xe6;
1742 # Return 1 if the target supports executing SSE instructions, 0
1743 # otherwise. Cache the result.
1745 proc check_sse_hw_available { } {
1746 return [check_cached_effective_target sse_hw_available {
1747 # If this is not the right target then we can skip the test.
1748 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1751 check_runtime_nocache sse_hw_available {
1755 unsigned int eax, ebx, ecx, edx;
1756 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1759 return !(edx & bit_SSE);
1766 # Return 1 if the target supports executing SSE2 instructions, 0
1767 # otherwise. Cache the result.
1769 proc check_sse2_hw_available { } {
1770 return [check_cached_effective_target sse2_hw_available {
1771 # If this is not the right target then we can skip the test.
1772 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1775 check_runtime_nocache sse2_hw_available {
1779 unsigned int eax, ebx, ecx, edx;
1780 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1783 return !(edx & bit_SSE2);
1790 # Return 1 if the target supports executing SSE4 instructions, 0
1791 # otherwise. Cache the result.
1793 proc check_sse4_hw_available { } {
1794 return [check_cached_effective_target sse4_hw_available {
1795 # If this is not the right target then we can skip the test.
1796 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1799 check_runtime_nocache sse4_hw_available {
1803 unsigned int eax, ebx, ecx, edx;
1804 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1807 return !(ecx & bit_SSE4_2);
1814 # Return 1 if the target supports executing AVX instructions, 0
1815 # otherwise. Cache the result.
1817 proc check_avx_hw_available { } {
1818 return [check_cached_effective_target avx_hw_available {
1819 # If this is not the right target then we can skip the test.
1820 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1823 check_runtime_nocache avx_hw_available {
1827 unsigned int eax, ebx, ecx, edx;
1828 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1831 return ((ecx & (bit_AVX | bit_OSXSAVE))
1832 != (bit_AVX | bit_OSXSAVE));
1839 # Return 1 if the target supports executing AVX2 instructions, 0
1840 # otherwise. Cache the result.
1842 proc check_avx2_hw_available { } {
1843 return [check_cached_effective_target avx2_hw_available {
1844 # If this is not the right target then we can skip the test.
1845 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1848 check_runtime_nocache avx2_hw_available {
1853 unsigned int eax, ebx, ecx, edx;
1855 if (__get_cpuid_max (0, NULL) < 7)
1858 __cpuid (1, eax, ebx, ecx, edx);
1860 if (!(ecx & bit_OSXSAVE))
1863 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1865 return !(ebx & bit_AVX2);
1872 # Return 1 if the target supports executing AVX512 foundation instructions, 0
1873 # otherwise. Cache the result.
1875 proc check_avx512f_hw_available { } {
1876 return [check_cached_effective_target avx512f_hw_available {
1877 # If this is not the right target then we can skip the test.
1878 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1881 check_runtime_nocache avx512f_hw_available {
1886 unsigned int eax, ebx, ecx, edx;
1888 if (__get_cpuid_max (0, NULL) < 7)
1891 __cpuid (1, eax, ebx, ecx, edx);
1893 if (!(ecx & bit_OSXSAVE))
1896 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1898 return !(ebx & bit_AVX512F);
1905 # Return 1 if the target supports running SSE executables, 0 otherwise.
1907 proc check_effective_target_sse_runtime { } {
1908 if { [check_effective_target_sse]
1909 && [check_sse_hw_available]
1910 && [check_sse_os_support_available] } {
1916 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1918 proc check_effective_target_sse2_runtime { } {
1919 if { [check_effective_target_sse2]
1920 && [check_sse2_hw_available]
1921 && [check_sse_os_support_available] } {
1927 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1929 proc check_effective_target_sse4_runtime { } {
1930 if { [check_effective_target_sse4]
1931 && [check_sse4_hw_available]
1932 && [check_sse_os_support_available] } {
1938 # Return 1 if the target supports running AVX executables, 0 otherwise.
1940 proc check_effective_target_avx_runtime { } {
1941 if { [check_effective_target_avx]
1942 && [check_avx_hw_available]
1943 && [check_avx_os_support_available] } {
1949 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1951 proc check_effective_target_avx2_runtime { } {
1952 if { [check_effective_target_avx2]
1953 && [check_avx2_hw_available]
1954 && [check_avx_os_support_available] } {
1960 # Return 1 if the target supports running AVX512f executables, 0 otherwise.
1962 proc check_effective_target_avx512f_runtime { } {
1963 if { [check_effective_target_avx512f]
1964 && [check_avx512f_hw_available]
1965 && [check_avx512_os_support_available] } {
1971 # Return 1 if bmi2 instructions can be compiled.
1972 proc check_effective_target_bmi2 { } {
1973 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1976 return [check_no_compiler_messages bmi2 object {
1978 _bzhi_u32 (unsigned int __X, unsigned int __Y)
1980 return __builtin_ia32_bzhi_si (__X, __Y);
1985 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1986 # 0 otherwise. Cache the result.
1988 proc check_mpaired_single_hw_available { } {
1989 return [check_cached_effective_target mpaired_single_hw_available {
1990 # If this is not the right target then we can skip the test.
1991 if { !([istarget mips*-*-*]) } {
1994 check_runtime_nocache mpaired_single_hw_available {
1997 asm volatile ("pll.ps $f2,$f4,$f6");
2005 # Return 1 if the target supports executing Loongson vector instructions,
2006 # 0 otherwise. Cache the result.
2008 proc check_mips_loongson_mmi_hw_available { } {
2009 return [check_cached_effective_target mips_loongson_mmi_hw_available {
2010 # If this is not the right target then we can skip the test.
2011 if { !([istarget mips*-*-*]) } {
2014 check_runtime_nocache mips_loongson_mmi_hw_available {
2015 #include <loongson-mmiintrin.h>
2018 asm volatile ("paddw $f2,$f4,$f6");
2026 # Return 1 if the target supports executing MIPS MSA instructions, 0
2027 # otherwise. Cache the result.
2029 proc check_mips_msa_hw_available { } {
2030 return [check_cached_effective_target mips_msa_hw_available {
2031 # If this is not the right target then we can skip the test.
2032 if { !([istarget mips*-*-*]) } {
2035 check_runtime_nocache mips_msa_hw_available {
2036 #if !defined(__mips_msa)
2037 #error "MSA NOT AVAIL"
2039 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
2040 #error "MSA NOT AVAIL FOR ISA REV < 2"
2042 #if !defined(__mips_hard_float)
2043 #error "MSA HARD_FLOAT REQUIRED"
2045 #if __mips_fpr != 64
2046 #error "MSA 64-bit FPR REQUIRED"
2052 v8i16 v = __builtin_msa_ldi_h (0);
2062 # Return 1 if the target supports running MIPS Paired-Single
2063 # executables, 0 otherwise.
2065 proc check_effective_target_mpaired_single_runtime { } {
2066 if { [check_effective_target_mpaired_single]
2067 && [check_mpaired_single_hw_available] } {
2073 # Return 1 if the target supports running Loongson executables, 0 otherwise.
2075 proc check_effective_target_mips_loongson_mmi_runtime { } {
2076 if { [check_effective_target_mips_loongson_mmi]
2077 && [check_mips_loongson_mmi_hw_available] } {
2083 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
2085 proc check_effective_target_mips_msa_runtime { } {
2086 if { [check_effective_target_mips_msa]
2087 && [check_mips_msa_hw_available] } {
2093 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
2094 # move instructions for moves from GPR to FPR.
2096 proc check_effective_target_powerpc64_no_dm { } {
2097 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
2098 # checks if we do not use direct moves, but use the old-fashioned
2099 # slower move-via-the-stack.
2100 return [check_no_messages_and_pattern powerpc64_no_dm \
2101 {\mmulld\M.*\mlfd} assembly {
2102 double f(long long x) { return x*x; }
2106 # Return 1 if the target supports the __builtin_cpu_supports built-in,
2107 # including having a new enough library to support the test. Cache the result.
2108 # Require at least a power7 to run on.
2110 proc check_ppc_cpu_supports_hw_available { } {
2111 return [check_cached_effective_target ppc_cpu_supports_hw_available {
2112 # Some simulators are known to not support VSX/power8 instructions.
2113 # For now, disable on Darwin
2114 if { [istarget powerpc-*-eabi]
2115 || [istarget powerpc*-*-eabispe]
2116 || [istarget *-*-darwin*]} {
2120 check_runtime_nocache ppc_cpu_supports_hw_available {
2124 asm volatile ("xxlor vs0,vs0,vs0");
2126 asm volatile ("xxlor 0,0,0");
2128 if (!__builtin_cpu_supports ("vsx"))
2137 # Return 1 if the target supports executing 750CL paired-single instructions, 0
2138 # otherwise. Cache the result.
2140 proc check_750cl_hw_available { } {
2141 return [check_cached_effective_target 750cl_hw_available {
2142 # If this is not the right target then we can skip the test.
2143 if { ![istarget powerpc-*paired*] } {
2146 check_runtime_nocache 750cl_hw_available {
2150 asm volatile ("ps_mul v0,v0,v0");
2152 asm volatile ("ps_mul 0,0,0");
2161 # Return 1 if the target supports executing power8 vector instructions, 0
2162 # otherwise. Cache the result.
2164 proc check_p8vector_hw_available { } {
2165 return [check_cached_effective_target p8vector_hw_available {
2166 # Some simulators are known to not support VSX/power8 instructions.
2167 # For now, disable on Darwin
2168 if { [istarget powerpc-*-eabi]
2169 || [istarget powerpc*-*-eabispe]
2170 || [istarget *-*-darwin*]} {
2173 set options "-mpower8-vector"
2174 check_runtime_nocache p8vector_hw_available {
2178 asm volatile ("xxlorc vs0,vs0,vs0");
2180 asm volatile ("xxlorc 0,0,0");
2189 # Return 1 if the target supports executing power9 vector instructions, 0
2190 # otherwise. Cache the result.
2192 proc check_p9vector_hw_available { } {
2193 return [check_cached_effective_target p9vector_hw_available {
2194 # Some simulators are known to not support VSX/power8/power9
2195 # instructions. For now, disable on Darwin.
2196 if { [istarget powerpc-*-eabi]
2197 || [istarget powerpc*-*-eabispe]
2198 || [istarget *-*-darwin*]} {
2201 set options "-mpower9-vector"
2202 check_runtime_nocache p9vector_hw_available {
2206 vector double v = (vector double) { 0.0, 0.0 };
2207 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2215 # Return 1 if the PowerPC target generates PC-relative instructions
2216 # automatically for targets that support PC-relative instructions.
2217 proc check_effective_target_powerpc_pcrel { } {
2218 return [check_no_messages_and_pattern powerpc_pcrel \
2219 {\mpla\M} assembly {
2220 static unsigned short s;
2221 unsigned short *p_foo (void) { return &s; }
2222 } {-O2 -mcpu=power10}]
2225 # Return 1 if the PowerPC target generates prefixed instructions automatically
2226 # for targets that support prefixed instructions.
2227 proc check_effective_target_powerpc_prefixed_addr { } {
2228 return [check_no_messages_and_pattern powerpc_prefixed_addr \
2229 {\mplwz\M} assembly {
2230 unsigned int foo (unsigned int *p) { return p[0x12345]; }
2231 } {-O2 -mcpu=power10}]
2234 # Return 1 if the target supports executing power9 modulo instructions, 0
2235 # otherwise. Cache the result.
2237 proc check_p9modulo_hw_available { } {
2238 return [check_cached_effective_target p9modulo_hw_available {
2239 # Some simulators are known to not support VSX/power8/power9
2240 # instructions. For now, disable on Darwin.
2241 if { [istarget powerpc-*-eabi]
2242 || [istarget powerpc*-*-eabispe]
2243 || [istarget *-*-darwin*]} {
2246 set options "-mmodulo"
2247 check_runtime_nocache p9modulo_hw_available {
2250 int i = 5, j = 3, r = -1;
2251 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2260 # Return 1 if the target supports executing power10 instructions, 0 otherwise.
2261 # Cache the result. It is assumed that if a simulator does not support the
2262 # power10 instructions, that it will generate an error and this test will fail.
2264 proc check_power10_hw_available { } {
2265 return [check_cached_effective_target power10_hw_available {
2266 check_runtime_nocache power10_hw_available {
2269 /* Set e first and use +r to check if pli actually works. */
2271 asm ("pli %0,%1" : "+r" (e) : "n" (0x12345));
2280 # Return 1 if the target supports executing MMA instructions, 0 otherwise.
2281 # Cache the result. It is assumed that if a simulator does not support the
2282 # MMA instructions, that it will generate an error and this test will fail.
2284 proc check_ppc_mma_hw_available { } {
2285 return [check_cached_effective_target ppc_mma_hw_available {
2286 check_runtime_nocache ppc_mma_hw_available {
2287 #include <altivec.h>
2288 typedef double v4sf_t __attribute__ ((vector_size (16)));
2295 __builtin_mma_xxsetaccz (&acc0);
2296 __builtin_mma_disassemble_acc (result, &acc0);
2297 if (result[0][0] != 0.0)
2305 # Return 1 if the target supports executing __float128 on PowerPC via software
2306 # emulation, 0 otherwise. Cache the result.
2308 proc check_ppc_float128_sw_available { } {
2309 return [check_cached_effective_target ppc_float128_sw_available {
2310 # Some simulators are known to not support VSX/power8/power9
2311 # instructions. For now, disable on Darwin.
2312 if { [istarget powerpc-*-eabi]
2313 || [istarget powerpc*-*-eabispe]
2314 || [istarget *-*-darwin*]} {
2317 set options "-mfloat128 -mvsx"
2318 check_runtime_nocache ppc_float128_sw_available {
2319 volatile __float128 x = 1.0q;
2320 volatile __float128 y = 2.0q;
2323 __float128 z = x + y;
2331 # Return 1 if the target supports executing __float128 on PowerPC via power9
2332 # hardware instructions, 0 otherwise. Cache the result.
2334 proc check_ppc_float128_hw_available { } {
2335 return [check_cached_effective_target ppc_float128_hw_available {
2336 # Some simulators are known to not support VSX/power8/power9
2337 # instructions. For now, disable on Darwin.
2338 if { [istarget powerpc-*-eabi]
2339 || [istarget powerpc*-*-eabispe]
2340 || [istarget *-*-darwin*]} {
2343 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2344 check_runtime_nocache ppc_float128_hw_available {
2345 volatile __float128 x = 1.0q;
2346 volatile __float128 y = 2.0q;
2349 __float128 z = x + y;
2350 __float128 w = -1.0q;
2352 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2353 return ((z != 3.0q) || (z != w));
2360 # See if the __ieee128 keyword is understood.
2361 proc check_effective_target_ppc_ieee128_ok { } {
2362 return [check_cached_effective_target ppc_ieee128_ok {
2364 if { [istarget *-*-aix*] } {
2367 set options "-mfloat128"
2368 check_runtime_nocache ppc_ieee128_ok {
2379 # Check if GCC and GLIBC supports explicitly specifying that the long double
2380 # format uses the IBM 128-bit extended double format. Under little endian
2381 # PowerPC Linux, you need GLIBC 2.32 or later to be able to use a different
2382 # long double format for running a program than the system default.
2384 proc check_effective_target_long_double_ibm128 { } {
2385 return [check_runtime_nocache long_double_ibm128 {
2388 /* use volatile to prevent optimization. */
2389 volatile __ibm128 a = (__ibm128) 3.0;
2390 volatile long double one = 1.0L;
2391 volatile long double two = 2.0L;
2392 volatile long double b;
2398 if (sizeof (long double) != 16)
2401 /* eliminate removing volatile cast warning. */
2404 if (memcmp (&a2, &b2, 16) != 0)
2406 sprintf (buffer, "%lg", b);
2407 return strcmp (buffer, "3") != 0;
2409 } [add_options_for_long_double_ibm128 ""]]
2412 # Return the appropriate options to specify that long double uses the IBM
2413 # 128-bit format on PowerPC.
2415 proc add_options_for_long_double_ibm128 { flags } {
2416 if { [istarget powerpc*-*-*] } {
2417 return "$flags -mlong-double-128 -Wno-psabi -mabi=ibmlongdouble"
2422 # Check if GCC and GLIBC supports explicitly specifying that the long double
2423 # format uses the IEEE 128-bit format. Under little endian PowerPC Linux, you
2424 # need GLIBC 2.32 or later to be able to use a different long double format for
2425 # running a program than the system default.
2427 proc check_effective_target_long_double_ieee128 { } {
2428 return [check_runtime_nocache long_double_ieee128 {
2431 /* use volatile to prevent optimization. */
2432 volatile _Float128 a = 3.0f128;
2433 volatile long double one = 1.0L;
2434 volatile long double two = 2.0L;
2435 volatile long double b;
2441 if (sizeof (long double) != 16)
2444 /* eliminate removing volatile cast warning. */
2447 if (memcmp (&a2, &b2, 16) != 0)
2449 sprintf (buffer, "%lg", b);
2450 return strcmp (buffer, "3") != 0;
2452 } [add_options_for_long_double_ieee128 ""]]
2455 # Return the appropriate options to specify that long double uses the IBM
2456 # 128-bit format on PowerPC.
2457 proc add_options_for_long_double_ieee128 { flags } {
2458 if { [istarget powerpc*-*-*] } {
2459 return "$flags -mlong-double-128 -Wno-psabi -mabi=ieeelongdouble"
2464 # Check if GCC and GLIBC supports explicitly specifying that the long double
2465 # format uses the IEEE 64-bit. Under little endian PowerPC Linux, you need
2466 # GLIBC 2.32 or later to be able to use a different long double format for
2467 # running a program than the system default.
2469 proc check_effective_target_long_double_64bit { } {
2470 return [check_runtime_nocache long_double_64bit {
2473 /* use volatile to prevent optimization. */
2474 volatile double a = 3.0;
2475 volatile long double one = 1.0L;
2476 volatile long double two = 2.0L;
2477 volatile long double b;
2483 if (sizeof (long double) != 8)
2486 /* eliminate removing volatile cast warning. */
2489 if (memcmp (&a2, &b2, 16) != 0)
2491 sprintf (buffer, "%lg", b);
2492 return strcmp (buffer, "3") != 0;
2494 } [add_options_for_ppc_long_double_override_64bit ""]]
2497 # Return the appropriate options to specify that long double uses the IEEE
2498 # 64-bit format on PowerPC.
2500 proc add_options_for_long_double_64bit { flags } {
2501 if { [istarget powerpc*-*-*] } {
2502 return "$flags -mlong-double-64"
2507 # Return 1 if the target supports executing VSX instructions, 0
2508 # otherwise. Cache the result.
2510 proc check_vsx_hw_available { } {
2511 return [check_cached_effective_target vsx_hw_available {
2512 # Some simulators are known to not support VSX instructions.
2513 # For now, disable on Darwin
2514 if { [istarget powerpc-*-eabi]
2515 || [istarget powerpc*-*-eabispe]
2516 || [istarget *-*-darwin*]} {
2520 check_runtime_nocache vsx_hw_available {
2524 asm volatile ("xxlor vs0,vs0,vs0");
2526 asm volatile ("xxlor 0,0,0");
2535 # Return 1 if the target supports executing AltiVec instructions, 0
2536 # otherwise. Cache the result.
2538 proc check_vmx_hw_available { } {
2539 return [check_cached_effective_target vmx_hw_available {
2540 # Some simulators are known to not support VMX instructions.
2541 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2544 # Most targets don't require special flags for this test case, but
2545 # Darwin does. Just to be sure, make sure VSX is not enabled for
2546 # the altivec tests.
2547 if { [istarget *-*-darwin*]
2548 || [istarget *-*-aix*] } {
2549 set options "-maltivec -mno-vsx"
2551 set options "-mno-vsx"
2553 check_runtime_nocache vmx_hw_available {
2557 asm volatile ("vor v0,v0,v0");
2559 asm volatile ("vor 0,0,0");
2568 proc check_ppc_recip_hw_available { } {
2569 return [check_cached_effective_target ppc_recip_hw_available {
2570 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2571 # For now, disable on Darwin
2572 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2575 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2576 check_runtime_nocache ppc_recip_hw_available {
2577 volatile double d_recip, d_rsqrt, d_four = 4.0;
2578 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2581 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2582 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2583 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2584 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2592 # Return 1 if the target supports executing AltiVec and Cell PPU
2593 # instructions, 0 otherwise. Cache the result.
2595 proc check_effective_target_cell_hw { } {
2596 return [check_cached_effective_target cell_hw_available {
2597 # Some simulators are known to not support VMX and PPU instructions.
2598 if { [istarget powerpc-*-eabi*] } {
2601 # Most targets don't require special flags for this test
2602 # case, but Darwin and AIX do.
2603 if { [istarget *-*-darwin*]
2604 || [istarget *-*-aix*] } {
2605 set options "-maltivec -mcpu=cell"
2607 set options "-mcpu=cell"
2609 check_runtime_nocache cell_hw_available {
2613 asm volatile ("vor v0,v0,v0");
2614 asm volatile ("lvlx v0,r0,r0");
2616 asm volatile ("vor 0,0,0");
2617 asm volatile ("lvlx 0,0,0");
2626 # Return 1 if the target supports executing 64-bit instructions, 0
2627 # otherwise. Cache the result.
2629 proc check_effective_target_powerpc64 { } {
2630 global powerpc64_available_saved
2633 if [info exists powerpc64_available_saved] {
2634 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2636 set powerpc64_available_saved 0
2638 # Some simulators are known to not support powerpc64 instructions.
2639 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2640 verbose "check_effective_target_powerpc64 returning 0" 2
2641 return $powerpc64_available_saved
2644 # Set up, compile, and execute a test program containing a 64-bit
2645 # instruction. Include the current process ID in the file
2646 # names to prevent conflicts with invocations for multiple
2651 set f [open $src "w"]
2652 puts $f "int main() {"
2653 puts $f "#ifdef __MACH__"
2654 puts $f " asm volatile (\"extsw r0,r0\");"
2656 puts $f " asm volatile (\"extsw 0,0\");"
2658 puts $f " return 0; }"
2661 set opts "additional_flags=-mcpu=G5"
2663 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2664 set lines [${tool}_target_compile $src $exe executable "$opts"]
2667 if [string match "" $lines] then {
2668 # No error message, compilation succeeded.
2669 set result [${tool}_load "./$exe" "" ""]
2670 set status [lindex $result 0]
2671 remote_file build delete $exe
2672 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2674 if { $status == "pass" } then {
2675 set powerpc64_available_saved 1
2678 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2682 return $powerpc64_available_saved
2685 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2686 # complex float arguments. This affects gfortran tests that call cabsf
2687 # in libm built by an earlier compiler. Return 0 if libm uses the same
2688 # argument passing as the compiler under test, 1 otherwise.
2690 proc check_effective_target_broken_cplxf_arg { } {
2691 # Skip the work for targets known not to be affected.
2692 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2696 return [check_cached_effective_target broken_cplxf_arg {
2697 check_runtime_nocache broken_cplxf_arg {
2698 #include <complex.h>
2699 extern void abort (void);
2700 float fabsf (float);
2701 float cabsf (_Complex float);
2708 if (fabsf (f - 5.0) > 0.0001)
2709 /* Yes, it's broken. */
2711 /* All fine, not broken. */
2718 # Return 1 is this is a TI C6X target supporting C67X instructions
2719 proc check_effective_target_ti_c67x { } {
2720 return [check_no_compiler_messages ti_c67x assembly {
2721 #if !defined(_TMS320C6700)
2722 #error !_TMS320C6700
2727 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2728 proc check_effective_target_ti_c64xp { } {
2729 return [check_no_compiler_messages ti_c64xp assembly {
2730 #if !defined(_TMS320C6400_PLUS)
2731 #error !_TMS320C6400_PLUS
2736 # Check if a -march=... option is given, as part of (earlier) options.
2737 proc check_effective_target_march_option { } {
2738 return [check-flags [list "" { *-*-* } { "-march=*" } { "" } ]]
2741 proc check_alpha_max_hw_available { } {
2742 return [check_runtime alpha_max_hw_available {
2743 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2747 # Returns true iff the FUNCTION is available on the target system.
2748 # (This is essentially a Tcl implementation of Autoconf's
2751 proc check_function_available { function } {
2752 return [check_no_compiler_messages ${function}_available \
2758 int main () { $function (); }
2762 # Returns true iff "fork" is available on the target system.
2764 proc check_fork_available {} {
2765 if { [istarget *-*-vxworks*] } {
2766 # VxWorks doesn't have fork but our way to test can't
2767 # tell as we're doing partial links for kernel modules.
2770 return [check_function_available "fork"]
2773 # Returns true iff "mkfifo" is available on the target system.
2775 proc check_mkfifo_available {} {
2776 if { [istarget *-*-cygwin*] } {
2777 # Cygwin has mkfifo, but support is incomplete.
2781 return [check_function_available "mkfifo"]
2784 # Returns true iff "__cxa_atexit" is used on the target system.
2786 proc check_cxa_atexit_available { } {
2787 return [check_cached_effective_target cxa_atexit_available {
2788 if { [istarget hppa*-*-hpux10*] } {
2789 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2791 } elseif { [istarget *-*-vxworks] } {
2792 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2795 check_runtime_nocache cxa_atexit_available {
2798 static unsigned int count;
2815 Y() { f(); count = 2; }
2824 int main() { return 0; }
2830 proc check_effective_target_objc2 { } {
2831 return [check_no_compiler_messages objc2 object {
2840 proc check_effective_target_next_runtime { } {
2841 return [check_no_compiler_messages objc2 object {
2842 #ifdef __NEXT_RUNTIME__
2845 #error !__NEXT_RUNTIME__
2850 # Return 1 if we're generating code for big-endian memory order.
2852 proc check_effective_target_be { } {
2853 return [check_no_compiler_messages be object {
2854 int dummy[__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ? 1 : -1];
2858 # Return 1 if we're generating code for little-endian memory order.
2860 proc check_effective_target_le { } {
2861 return [check_no_compiler_messages le object {
2862 int dummy[__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ ? 1 : -1];
2866 # Return 1 if we're generating 32-bit code using default options, 0
2869 proc check_effective_target_ilp32 { } {
2870 return [check_no_compiler_messages ilp32 object {
2871 int dummy[sizeof (int) == 4
2872 && sizeof (void *) == 4
2873 && sizeof (long) == 4 ? 1 : -1];
2877 # Return 1 if we're generating ia32 code using default options, 0
2880 proc check_effective_target_ia32 { } {
2881 return [check_no_compiler_messages ia32 object {
2882 int dummy[sizeof (int) == 4
2883 && sizeof (void *) == 4
2884 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2888 # Return 1 if we're generating x32 code using default options, 0
2891 proc check_effective_target_x32 { } {
2892 return [check_no_compiler_messages x32 object {
2893 int dummy[sizeof (int) == 4
2894 && sizeof (void *) == 4
2895 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2899 # Return 1 if we're generating 32-bit integers using default
2900 # options, 0 otherwise.
2902 proc check_effective_target_int32 { } {
2903 return [check_no_compiler_messages int32 object {
2904 int dummy[sizeof (int) == 4 ? 1 : -1];
2908 # Return 1 if we're generating 32-bit or larger integers using default
2909 # options, 0 otherwise.
2911 proc check_effective_target_int32plus { } {
2912 return [check_no_compiler_messages int32plus object {
2913 int dummy[sizeof (int) >= 4 ? 1 : -1];
2917 # Return 1 if we're generating 64-bit long long using default options,
2920 proc check_effective_target_longlong64 { } {
2921 return [check_no_compiler_messages longlong64 object {
2922 int dummy[sizeof (long long) == 8 ? 1 : -1];
2926 # Return 1 if we're generating 32-bit or larger pointers using default
2927 # options, 0 otherwise.
2929 proc check_effective_target_ptr32plus { } {
2930 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2931 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2932 # cannot really hold a 32-bit address, so we always return false here.
2933 if { [istarget msp430-*-*] } {
2937 return [check_no_compiler_messages ptr32plus object {
2938 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2942 # Return 1 if we support 16-bit or larger array and structure sizes
2943 # using default options, 0 otherwise.
2944 # This implies at least a 20-bit address space, as no targets have an address
2945 # space between 16 and 20 bits.
2947 proc check_effective_target_size20plus { } {
2948 return [check_no_compiler_messages size20plus object {
2953 # Return 1 if target supports function pointers, 0 otherwise.
2955 proc check_effective_target_function_pointers { } {
2956 if { [istarget pru-*-*] } {
2957 return [check_no_compiler_messages func_ptr_avail assembly {
2958 #ifdef __PRU_EABI_GNU__
2966 # Return 1 if target supports arbitrarily large return values, 0 otherwise.
2968 proc check_effective_target_large_return_values { } {
2969 if { [istarget pru-*-*] } {
2970 return [check_no_compiler_messages large_return_values assembly {
2971 #ifdef __PRU_EABI_GNU__
2978 # Return 1 if we support 20-bit or larger array and structure sizes
2979 # using default options, 0 otherwise.
2980 # This implies at least a 24-bit address space, as no targets have an address
2981 # space between 20 and 24 bits.
2983 proc check_effective_target_size24plus { } {
2984 return [check_no_compiler_messages size24plus object {
2985 char dummy[524289L];
2989 # Return 1 if we support 24-bit or larger array and structure sizes
2990 # using default options, 0 otherwise.
2991 # This implies at least a 32-bit address space, as no targets have an address
2992 # space between 24 and 32 bits.
2994 proc check_effective_target_size32plus { } {
2995 return [check_no_compiler_messages size32plus object {
2996 char dummy[16777217L];
3000 # Returns 1 if we're generating 16-bit or smaller integers with the
3001 # default options, 0 otherwise.
3003 proc check_effective_target_int16 { } {
3004 return [check_no_compiler_messages int16 object {
3005 int dummy[sizeof (int) < 4 ? 1 : -1];
3009 # Return 1 if we're generating 64-bit code using default options, 0
3012 proc check_effective_target_lp64 { } {
3013 return [check_no_compiler_messages lp64 object {
3014 int dummy[sizeof (int) == 4
3015 && sizeof (void *) == 8
3016 && sizeof (long) == 8 ? 1 : -1];
3020 # Return 1 if we're generating 64-bit code using default llp64 options,
3023 proc check_effective_target_llp64 { } {
3024 return [check_no_compiler_messages llp64 object {
3025 int dummy[sizeof (int) == 4
3026 && sizeof (void *) == 8
3027 && sizeof (long long) == 8
3028 && sizeof (long) == 4 ? 1 : -1];
3032 # Return 1 if long and int have different sizes,
3035 proc check_effective_target_long_neq_int { } {
3036 return [check_no_compiler_messages long_ne_int object {
3037 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
3041 # Return 1 if int size is equal to float size,
3044 proc check_effective_target_int_eq_float { } {
3045 return [check_no_compiler_messages int_eq_float object {
3046 int dummy[sizeof (int) >= sizeof (float) ? 1 : -1];
3050 # Return 1 if short size is equal to int size,
3053 proc check_effective_target_short_eq_int { } {
3054 return [check_no_compiler_messages short_eq_int object {
3055 int dummy[sizeof (short) == sizeof (int) ? 1 : -1];
3059 # Return 1 if pointer size is equal to short size,
3062 proc check_effective_target_ptr_eq_short { } {
3063 return [check_no_compiler_messages ptr_eq_short object {
3064 int dummy[sizeof (void *) == sizeof (short) ? 1 : -1];
3068 # Return 1 if pointer size is equal to long size,
3071 proc check_effective_target_ptr_eq_long { } {
3072 # sizeof (void *) == 4 for msp430-elf -mlarge which is equal to
3073 # sizeof (long). Avoid false positive.
3074 if { [istarget msp430-*-*] } {
3077 return [check_no_compiler_messages ptr_eq_long object {
3078 int dummy[sizeof (void *) == sizeof (long) ? 1 : -1];
3082 # Return 1 if the target supports long double larger than double,
3085 proc check_effective_target_large_long_double { } {
3086 return [check_no_compiler_messages large_long_double object {
3087 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
3091 # Return 1 if the target supports double larger than float,
3094 proc check_effective_target_large_double { } {
3095 return [check_no_compiler_messages large_double object {
3096 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
3100 # Return 1 if the target supports long double of 128 bits,
3103 proc check_effective_target_longdouble128 { } {
3104 return [check_no_compiler_messages longdouble128 object {
3105 int dummy[sizeof(long double) == 16 ? 1 : -1];
3109 # Return 1 if the target supports long double of 64 bits,
3112 proc check_effective_target_longdouble64 { } {
3113 return [check_no_compiler_messages longdouble64 object {
3114 int dummy[sizeof(long double) == 8 ? 1 : -1];
3118 # Return 1 if the target supports double of 64 bits,
3121 proc check_effective_target_double64 { } {
3122 return [check_no_compiler_messages double64 object {
3123 int dummy[sizeof(double) == 8 ? 1 : -1];
3127 # Return 1 if the target supports double of at least 64 bits,
3130 proc check_effective_target_double64plus { } {
3131 return [check_no_compiler_messages double64plus object {
3132 int dummy[sizeof(double) >= 8 ? 1 : -1];
3136 # Return 1 if the target supports 'w' suffix on floating constant
3139 proc check_effective_target_has_w_floating_suffix { } {
3141 if [check_effective_target_c++] {
3142 append opts "-std=gnu++03"
3144 return [check_no_compiler_messages w_fp_suffix object {
3149 # Return 1 if the target supports 'q' suffix on floating constant
3152 proc check_effective_target_has_q_floating_suffix { } {
3154 if [check_effective_target_c++] {
3155 append opts "-std=gnu++03"
3157 return [check_no_compiler_messages q_fp_suffix object {
3162 # Return 1 if the target supports the _FloatN / _FloatNx type
3163 # indicated in the function name, 0 otherwise.
3165 proc check_effective_target_float16 {} {
3166 return [check_no_compiler_messages_nocache float16 object {
3167 _Float16 foo (_Float16 x) { return x; }
3168 } [add_options_for_float16 ""]]
3171 proc check_effective_target_float32 {} {
3172 return [check_no_compiler_messages_nocache float32 object {
3174 } [add_options_for_float32 ""]]
3177 proc check_effective_target_float64 {} {
3178 return [check_no_compiler_messages_nocache float64 object {
3180 } [add_options_for_float64 ""]]
3183 proc check_effective_target_float128 {} {
3184 return [check_no_compiler_messages_nocache float128 object {
3186 } [add_options_for_float128 ""]]
3189 proc check_effective_target_float32x {} {
3190 return [check_no_compiler_messages_nocache float32x object {
3192 } [add_options_for_float32x ""]]
3195 proc check_effective_target_float64x {} {
3196 return [check_no_compiler_messages_nocache float64x object {
3198 } [add_options_for_float64x ""]]
3201 proc check_effective_target_float128x {} {
3202 return [check_no_compiler_messages_nocache float128x object {
3204 } [add_options_for_float128x ""]]
3207 # Likewise, but runtime support for any special options used as well
3208 # as compile-time support is required.
3210 proc check_effective_target_float16_runtime {} {
3211 return [check_effective_target_float16]
3214 proc check_effective_target_float32_runtime {} {
3215 return [check_effective_target_float32]
3218 proc check_effective_target_float64_runtime {} {
3219 return [check_effective_target_float64]
3222 proc check_effective_target_float128_runtime {} {
3223 if { ![check_effective_target_float128] } {
3226 if { [istarget powerpc*-*-*] } {
3227 return [check_effective_target_base_quadfloat_support]
3232 proc check_effective_target_float32x_runtime {} {
3233 return [check_effective_target_float32x]
3236 proc check_effective_target_float64x_runtime {} {
3237 if { ![check_effective_target_float64x] } {
3240 if { [istarget powerpc*-*-*] } {
3241 return [check_effective_target_base_quadfloat_support]
3246 proc check_effective_target_float128x_runtime {} {
3247 return [check_effective_target_float128x]
3250 # Return 1 if the target hardware supports any options added for
3251 # _FloatN and _FloatNx types, 0 otherwise.
3253 proc check_effective_target_floatn_nx_runtime {} {
3254 if { [istarget powerpc*-*-aix*] } {
3257 if { [istarget powerpc*-*-*] } {
3258 return [check_effective_target_base_quadfloat_support]
3263 # Add options needed to use the _FloatN / _FloatNx type indicated in
3264 # the function name.
3266 proc add_options_for_float16 { flags } {
3267 if { [istarget arm*-*-*] } {
3268 return "$flags -mfp16-format=ieee"
3273 proc add_options_for_float32 { flags } {
3277 proc add_options_for_float64 { flags } {
3281 proc add_options_for_float128 { flags } {
3282 return [add_options_for___float128 "$flags"]
3285 proc add_options_for_float32x { flags } {
3289 proc add_options_for_float64x { flags } {
3290 return [add_options_for___float128 "$flags"]
3293 proc add_options_for_float128x { flags } {
3297 # Return 1 if the target supports __float128,
3300 proc check_effective_target___float128 { } {
3301 if { [istarget powerpc*-*-*] } {
3302 return [check_ppc_float128_sw_available]
3304 if { [istarget ia64-*-*]
3305 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
3311 proc add_options_for___float128 { flags } {
3312 if { [istarget powerpc*-*-*] } {
3313 return "$flags -mfloat128 -mvsx"
3318 # Return 1 if the target supports any special run-time requirements
3319 # for __float128 or _Float128,
3322 proc check_effective_target_base_quadfloat_support { } {
3323 if { [istarget powerpc*-*-*] } {
3324 return [check_vsx_hw_available]
3329 # Return 1 if the target supports all four forms of fused multiply-add
3330 # (fma, fms, fnma, and fnms) for both float and double.
3332 proc check_effective_target_scalar_all_fma { } {
3333 return [istarget aarch64*-*-*]
3336 # Return 1 if the target supports compiling fixed-point,
3339 proc check_effective_target_fixed_point { } {
3340 return [check_no_compiler_messages fixed_point object {
3341 _Sat _Fract x; _Sat _Accum y;
3345 # Return 1 if the target supports compiling decimal floating point,
3348 proc check_effective_target_dfp_nocache { } {
3349 verbose "check_effective_target_dfp_nocache: compiling source" 2
3350 set ret [check_no_compiler_messages_nocache dfp object {
3351 float x __attribute__((mode(DD)));
3353 verbose "check_effective_target_dfp_nocache: returning $ret" 2
3357 proc check_effective_target_dfprt_nocache { } {
3358 return [check_runtime_nocache dfprt {
3359 typedef float d64 __attribute__((mode(DD)));
3360 d64 x = 1.2df, y = 2.3dd, z;
3361 int main () { z = x + y; return 0; }
3365 # Return 1 if the target supports compiling Decimal Floating Point,
3368 # This won't change for different subtargets so cache the result.
3370 proc check_effective_target_dfp { } {
3371 return [check_cached_effective_target dfp {
3372 check_effective_target_dfp_nocache
3376 # Return 1 if the target supports linking and executing Decimal Floating
3377 # Point, 0 otherwise.
3379 # This won't change for different subtargets so cache the result.
3381 proc check_effective_target_dfprt { } {
3382 return [check_cached_effective_target dfprt {
3383 check_effective_target_dfprt_nocache
3387 # Return 1 iff target has unsigned plain 'char' by default.
3389 proc check_effective_target_unsigned_char {} {
3390 return [check_no_compiler_messages unsigned_char assembly {
3395 proc check_effective_target_powerpc_popcntb_ok { } {
3396 return [check_cached_effective_target powerpc_popcntb_ok {
3398 # Disable on Darwin.
3399 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3402 check_runtime_nocache powerpc_popcntb_ok {
3404 volatile int a = 0x12345678;
3407 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
3415 # Return 1 if the target supports executing DFP hardware instructions,
3416 # 0 otherwise. Cache the result.
3418 proc check_dfp_hw_available { } {
3419 return [check_cached_effective_target dfp_hw_available {
3420 # For now, disable on Darwin
3421 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3424 check_runtime_nocache dfp_hw_available {
3425 volatile _Decimal64 r;
3426 volatile _Decimal64 a = 4.0DD;
3427 volatile _Decimal64 b = 2.0DD;
3430 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3431 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3432 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3433 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3436 } "-mcpu=power6 -mhard-float"
3441 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3443 proc check_effective_target_ucn_nocache { } {
3444 # -std=c99 is only valid for C
3445 if [check_effective_target_c] {
3446 set ucnopts "-std=c99"
3450 verbose "check_effective_target_ucn_nocache: compiling source" 2
3451 set ret [check_no_compiler_messages_nocache ucn object {
3454 verbose "check_effective_target_ucn_nocache: returning $ret" 2
3458 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3460 # This won't change for different subtargets, so cache the result.
3462 proc check_effective_target_ucn { } {
3463 return [check_cached_effective_target ucn {
3464 check_effective_target_ucn_nocache
3468 # Return 1 if the target needs a command line argument to enable a SIMD
3471 proc check_effective_target_vect_cmdline_needed { } {
3472 global et_vect_cmdline_needed_target_name
3474 if { ![info exists et_vect_cmdline_needed_target_name] } {
3475 set et_vect_cmdline_needed_target_name ""
3478 # If the target has changed since we set the cached value, clear it.
3479 set current_target [current_target_name]
3480 if { $current_target != $et_vect_cmdline_needed_target_name } {
3481 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3482 set et_vect_cmdline_needed_target_name $current_target
3483 if { [info exists et_vect_cmdline_needed_saved] } {
3484 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3485 unset et_vect_cmdline_needed_saved
3489 return [check_cached_effective_target vect_cmdline_needed {
3490 if { [istarget alpha*-*-*]
3491 || [istarget ia64-*-*]
3492 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3493 && ![is-effective-target ia32])
3494 || ([istarget powerpc*-*-*]
3495 && ([check_effective_target_powerpc_spe]
3496 || [check_effective_target_powerpc_altivec]))
3497 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3498 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3499 || [istarget aarch64*-*-*]
3500 || [istarget amdgcn*-*-*]} {
3507 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3509 # This won't change for different subtargets so cache the result.
3511 proc check_effective_target_vect_int { } {
3512 return [check_cached_effective_target_indexed vect_int {
3514 [istarget i?86-*-*] || [istarget x86_64-*-*]
3515 || ([istarget powerpc*-*-*]
3516 && ![istarget powerpc-*-linux*paired*])
3517 || [istarget amdgcn-*-*]
3518 || [istarget sparc*-*-*]
3519 || [istarget alpha*-*-*]
3520 || [istarget ia64-*-*]
3521 || [istarget aarch64*-*-*]
3522 || [is-effective-target arm_neon]
3523 || ([istarget mips*-*-*]
3524 && ([et-is-effective-target mips_loongson_mmi]
3525 || [et-is-effective-target mips_msa]))
3526 || ([istarget s390*-*-*]
3527 && [check_effective_target_s390_vx])
3531 # Return 1 if the target supports hardware vectorization of complex additions of
3532 # byte, 0 otherwise.
3534 # This won't change for different subtargets so cache the result.
3536 proc check_effective_target_vect_complex_add_byte { } {
3537 return [check_cached_effective_target_indexed vect_complex_add_byte {
3539 ([check_effective_target_aarch64_sve2]
3540 && [check_effective_target_aarch64_little_endian])
3541 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3542 && [check_effective_target_arm_little_endian])
3546 # Return 1 if the target supports hardware vectorization of complex additions of
3547 # short, 0 otherwise.
3549 # This won't change for different subtargets so cache the result.
3551 proc check_effective_target_vect_complex_add_short { } {
3552 return [check_cached_effective_target_indexed vect_complex_add_short {
3554 ([check_effective_target_aarch64_sve2]
3555 && [check_effective_target_aarch64_little_endian])
3556 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3557 && [check_effective_target_arm_little_endian])
3561 # Return 1 if the target supports hardware vectorization of complex additions of
3564 # This won't change for different subtargets so cache the result.
3566 proc check_effective_target_vect_complex_add_int { } {
3567 return [check_cached_effective_target_indexed vect_complex_add_int {
3569 ([check_effective_target_aarch64_sve2]
3570 && [check_effective_target_aarch64_little_endian])
3571 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3572 && [check_effective_target_arm_little_endian])
3576 # Return 1 if the target supports hardware vectorization of complex additions of
3577 # long, 0 otherwise.
3579 # This won't change for different subtargets so cache the result.
3581 proc check_effective_target_vect_complex_add_long { } {
3582 return [check_cached_effective_target_indexed vect_complex_add_long {
3584 ([check_effective_target_aarch64_sve2]
3585 && [check_effective_target_aarch64_little_endian])
3586 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3587 && [check_effective_target_arm_little_endian])
3591 # Return 1 if the target supports hardware vectorization of complex additions of
3592 # half, 0 otherwise.
3594 # This won't change for different subtargets so cache the result.
3596 proc check_effective_target_vect_complex_add_half { } {
3597 return [check_cached_effective_target_indexed vect_complex_add_half {
3599 ([check_effective_target_arm_v8_3a_fp16_complex_neon_ok]
3600 && ([check_effective_target_aarch64_little_endian]
3601 || [check_effective_target_arm_little_endian]))
3602 || ([check_effective_target_aarch64_sve2]
3603 && [check_effective_target_aarch64_little_endian])
3604 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3605 && [check_effective_target_arm_little_endian])
3609 # Return 1 if the target supports hardware vectorization of complex additions of
3610 # float, 0 otherwise.
3612 # This won't change for different subtargets so cache the result.
3614 proc check_effective_target_vect_complex_add_float { } {
3615 return [check_cached_effective_target_indexed vect_complex_add_float {
3617 ([check_effective_target_arm_v8_3a_complex_neon_ok]
3618 && ([check_effective_target_aarch64_little_endian]
3619 || [check_effective_target_arm_little_endian]))
3620 || ([check_effective_target_aarch64_sve2]
3621 && [check_effective_target_aarch64_little_endian])
3622 || ([check_effective_target_arm_v8_1m_mve_fp_ok]
3623 && [check_effective_target_arm_little_endian])
3627 # Return 1 if the target supports hardware vectorization of complex additions of
3628 # double, 0 otherwise.
3630 # This won't change for different subtargets so cache the result.
3632 proc check_effective_target_vect_complex_add_double { } {
3633 return [check_cached_effective_target_indexed vect_complex_add_double {
3635 (([check_effective_target_arm_v8_3a_complex_neon_ok]
3636 && [check_effective_target_aarch64_little_endian])
3637 || ([check_effective_target_aarch64_sve2]
3638 && [check_effective_target_aarch64_little_endian]))
3642 # Return 1 if the target supports signed int->float conversion
3645 proc check_effective_target_vect_intfloat_cvt { } {
3646 return [check_cached_effective_target_indexed vect_intfloat_cvt {
3647 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3648 || ([istarget powerpc*-*-*]
3649 && ![istarget powerpc-*-linux*paired*])
3650 || [is-effective-target arm_neon]
3651 || ([istarget mips*-*-*]
3652 && [et-is-effective-target mips_msa])
3653 || [istarget amdgcn-*-*]
3654 || ([istarget s390*-*-*]
3655 && [check_effective_target_s390_vxe2]) }}]
3658 # Return 1 if the target supports signed double->int conversion
3661 proc check_effective_target_vect_doubleint_cvt { } {
3662 return [check_cached_effective_target_indexed vect_doubleint_cvt {
3663 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3664 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3665 #ifdef __tune_atom__
3666 # error No double vectorizer support.
3669 || [istarget aarch64*-*-*]
3670 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3671 || ([istarget mips*-*-*]
3672 && [et-is-effective-target mips_msa])
3673 || ([istarget s390*-*-*]
3674 && [check_effective_target_s390_vx]) }}]
3677 # Return 1 if the target supports signed int->double conversion
3680 proc check_effective_target_vect_intdouble_cvt { } {
3681 return [check_cached_effective_target_indexed vect_intdouble_cvt {
3682 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3683 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3684 #ifdef __tune_atom__
3685 # error No double vectorizer support.
3688 || [istarget aarch64*-*-*]
3689 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3690 || ([istarget mips*-*-*]
3691 && [et-is-effective-target mips_msa])
3692 || ([istarget s390*-*-*]
3693 && [check_effective_target_s390_vx]) }}]
3696 #Return 1 if we're supporting __int128 for target, 0 otherwise.
3698 proc check_effective_target_int128 { } {
3699 return [check_no_compiler_messages int128 object {
3701 #ifndef __SIZEOF_INT128__
3710 # Return 1 if the target supports unsigned int->float conversion
3713 proc check_effective_target_vect_uintfloat_cvt { } {
3714 return [check_cached_effective_target_indexed vect_uintfloat_cvt {
3715 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3716 || ([istarget powerpc*-*-*]
3717 && ![istarget powerpc-*-linux*paired*])
3718 || [istarget aarch64*-*-*]
3719 || [is-effective-target arm_neon]
3720 || ([istarget mips*-*-*]
3721 && [et-is-effective-target mips_msa])
3722 || [istarget amdgcn-*-*]
3723 || ([istarget s390*-*-*]
3724 && [check_effective_target_s390_vxe2]) }}]
3728 # Return 1 if the target supports signed float->int conversion
3731 proc check_effective_target_vect_floatint_cvt { } {
3732 return [check_cached_effective_target_indexed vect_floatint_cvt {
3733 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3734 || ([istarget powerpc*-*-*]
3735 && ![istarget powerpc-*-linux*paired*])
3736 || [is-effective-target arm_neon]
3737 || ([istarget mips*-*-*]
3738 && [et-is-effective-target mips_msa])
3739 || [istarget amdgcn-*-*]
3740 || ([istarget s390*-*-*]
3741 && [check_effective_target_s390_vxe2]) }}]
3744 # Return 1 if the target supports unsigned float->int conversion
3747 proc check_effective_target_vect_floatuint_cvt { } {
3748 return [check_cached_effective_target_indexed vect_floatuint_cvt {
3749 expr { ([istarget powerpc*-*-*]
3750 && ![istarget powerpc-*-linux*paired*])
3751 || [is-effective-target arm_neon]
3752 || ([istarget mips*-*-*]
3753 && [et-is-effective-target mips_msa])
3754 || [istarget amdgcn-*-*]
3755 || ([istarget s390*-*-*]
3756 && [check_effective_target_s390_vxe2]) }}]
3759 # Return 1 if peeling for alignment might be profitable on the target
3762 proc check_effective_target_vect_peeling_profitable { } {
3763 return [check_cached_effective_target_indexed vect_peeling_profitable {
3764 expr { ([istarget s390*-*-*]
3765 && [check_effective_target_s390_vx])
3766 || [check_effective_target_vect_element_align_preferred] }}]
3769 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3771 # This won't change for different subtargets so cache the result.
3773 proc check_effective_target_vect_simd_clones { } {
3774 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3775 # avx2 and avx512f clone. Only the right clone for the
3776 # specified arch will be chosen, but still we need to at least
3777 # be able to assemble avx512f.
3778 return [check_cached_effective_target_indexed vect_simd_clones {
3779 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3780 && [check_effective_target_avx512f])
3781 || [istarget amdgcn-*-*] }}]
3784 # Return 1 if this is a AArch64 target supporting big endian
3785 proc check_effective_target_aarch64_big_endian { } {
3786 return [check_no_compiler_messages aarch64_big_endian assembly {
3787 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3788 #error !__aarch64__ || !__AARCH64EB__
3793 # Return 1 if this is a AArch64 target supporting little endian
3794 proc check_effective_target_aarch64_little_endian { } {
3795 if { ![istarget aarch64*-*-*] } {
3799 return [check_no_compiler_messages aarch64_little_endian assembly {
3800 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3806 # Return 1 if this is an AArch64 target supporting SVE.
3807 proc check_effective_target_aarch64_sve { } {
3808 if { ![istarget aarch64*-*-*] } {
3811 return [check_no_compiler_messages aarch64_sve assembly {
3812 #if !defined (__ARM_FEATURE_SVE)
3818 # Return 1 if this is an AArch64 target supporting SVE2.
3819 proc check_effective_target_aarch64_sve2 { } {
3820 if { ![istarget aarch64*-*-*] } {
3823 return [check_no_compiler_messages aarch64_sve2 assembly {
3824 #if !defined (__ARM_FEATURE_SVE2)
3830 # Return 1 if this is an AArch64 target only supporting SVE (not SVE2).
3831 proc check_effective_target_aarch64_sve1_only { } {
3832 return [expr { [check_effective_target_aarch64_sve]
3833 && ![check_effective_target_aarch64_sve2] }]
3836 # Return the size in bits of an SVE vector, or 0 if the size is variable.
3837 proc aarch64_sve_bits { } {
3838 return [check_cached_effective_target aarch64_sve_bits {
3841 set src dummy[pid].c
3842 set f [open $src "w"]
3843 puts $f "int bits = __ARM_FEATURE_SVE_BITS;"
3845 set output [${tool}_target_compile $src "" preprocess ""]
3848 regsub {.*bits = ([^;]*);.*} $output {\1} bits
3853 # Return 1 if this is a compiler supporting ARC atomic operations
3854 proc check_effective_target_arc_atomic { } {
3855 return [check_no_compiler_messages arc_atomic assembly {
3856 #if !defined(__ARC_ATOMIC__)
3862 # Return 1 if this is an arm target using 32-bit instructions
3863 proc check_effective_target_arm32 { } {
3864 if { ![istarget arm*-*-*] } {
3868 return [check_no_compiler_messages arm32 assembly {
3869 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3870 #error !__arm || __thumb__ && !__thumb2__
3875 # Return 1 if this is an arm target not using Thumb
3876 proc check_effective_target_arm_nothumb { } {
3877 if { ![istarget arm*-*-*] } {
3881 return [check_no_compiler_messages arm_nothumb assembly {
3882 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3883 #error !__arm__ || __thumb || __thumb2__
3888 # Return 1 if this is a little-endian ARM target
3889 proc check_effective_target_arm_little_endian { } {
3890 if { ![istarget arm*-*-*] } {
3894 return [check_no_compiler_messages arm_little_endian assembly {
3895 #if !defined(__arm__) || !defined(__ARMEL__)
3896 #error !__arm__ || !__ARMEL__
3901 # Return 1 if this is an ARM target that only supports aligned vector accesses
3902 proc check_effective_target_arm_vect_no_misalign { } {
3903 if { ![istarget arm*-*-*] } {
3907 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3908 #if !defined(__arm__) \
3909 || (defined(__ARM_FEATURE_UNALIGNED) \
3910 && defined(__ARMEL__))
3911 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3917 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
3918 # multilibs may be incompatible with this option.
3920 proc check_effective_target_arm_soft_ok { } {
3921 return [check_no_compiler_messages arm_soft_ok object {
3924 int main (void) { return 0; }
3925 } "-mfloat-abi=soft"]
3928 # Return 1 if this is an ARM target supporting -mfpu=vfp with an
3931 proc check_effective_target_arm_vfp_ok_nocache { } {
3932 global et_arm_vfp_flags
3933 set et_arm_vfp_flags ""
3934 if { [check_effective_target_arm32] } {
3935 foreach flags {"-mfpu=vfp" "-mfpu=vfp -mfloat-abi=softfp" "-mfpu=vfp -mfloat-abi=hard"} {
3936 if { [check_no_compiler_messages_nocache arm_vfp_ok object {
3938 #error __ARM_FP not defined
3941 set et_arm_vfp_flags $flags
3950 proc check_effective_target_arm_vfp_ok { } {
3951 return [check_cached_effective_target arm_vfp_ok \
3952 check_effective_target_arm_vfp_ok_nocache]
3955 # Add the options needed to compile code with -mfpu=vfp. We need either
3956 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3957 # specified by the multilib, use it.
3959 proc add_options_for_arm_vfp { flags } {
3960 if { ! [check_effective_target_arm_vfp_ok] } {
3963 global et_arm_vfp_flags
3964 return "$flags $et_arm_vfp_flags"
3967 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3968 # -mfloat-abi=softfp.
3970 proc check_effective_target_arm_vfp3_ok { } {
3971 if { [check_effective_target_arm32] } {
3972 return [check_no_compiler_messages arm_vfp3_ok object {
3974 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3980 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3981 # -mfloat-abi=softfp.
3982 proc check_effective_target_arm_v8_vfp_ok {} {
3983 if { [check_effective_target_arm32] } {
3984 return [check_no_compiler_messages arm_v8_vfp_ok object {
3987 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3990 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3996 # Return 1 if this is an ARM target supporting -mfpu=vfp
3997 # -mfloat-abi=hard. Some multilibs may be incompatible with these
4000 proc check_effective_target_arm_hard_vfp_ok { } {
4001 if { [check_effective_target_arm32]
4002 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
4003 return [check_no_compiler_messages arm_hard_vfp_ok executable {
4004 int main() { return 0;}
4005 } "-mfpu=vfp -mfloat-abi=hard"]
4011 # Return 1 if this is an ARM target defining __ARM_FP. We may need
4012 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4013 # incompatible with these options. Also set et_arm_fp_flags to the
4014 # best options to add.
4016 proc check_effective_target_arm_fp_ok_nocache { } {
4017 global et_arm_fp_flags
4018 set et_arm_fp_flags ""
4019 if { [check_effective_target_arm32] } {
4020 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
4021 if { [check_no_compiler_messages_nocache arm_fp_ok object {
4023 #error __ARM_FP not defined
4026 set et_arm_fp_flags $flags
4035 proc check_effective_target_arm_fp_ok { } {
4036 return [check_cached_effective_target arm_fp_ok \
4037 check_effective_target_arm_fp_ok_nocache]
4040 # Add the options needed to define __ARM_FP. We need either
4041 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
4042 # specified by the multilib, use it.
4044 proc add_options_for_arm_fp { flags } {
4045 if { ! [check_effective_target_arm_fp_ok] } {
4048 global et_arm_fp_flags
4049 return "$flags $et_arm_fp_flags"
4052 # Return 1 if this is an ARM target defining __ARM_FP with
4053 # double-precision support. We may need -mfloat-abi=softfp or
4054 # equivalent options. Some multilibs may be incompatible with these
4055 # options. Also set et_arm_fp_dp_flags to the best options to add.
4057 proc check_effective_target_arm_fp_dp_ok_nocache { } {
4058 global et_arm_fp_dp_flags
4059 set et_arm_fp_dp_flags ""
4060 if { [check_effective_target_arm32] } {
4061 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
4062 if { [check_no_compiler_messages_nocache arm_fp_dp_ok object {
4064 #error __ARM_FP not defined
4066 #if ((__ARM_FP & 8) == 0)
4067 #error __ARM_FP indicates that double-precision is not supported
4070 set et_arm_fp_dp_flags $flags
4079 proc check_effective_target_arm_fp_dp_ok { } {
4080 return [check_cached_effective_target arm_fp_dp_ok \
4081 check_effective_target_arm_fp_dp_ok_nocache]
4084 # Add the options needed to define __ARM_FP with double-precision
4085 # support. We need either -mfloat-abi=softfp or -mfloat-abi=hard, but
4086 # if one is already specified by the multilib, use it.
4088 proc add_options_for_arm_fp_dp { flags } {
4089 if { ! [check_effective_target_arm_fp_dp_ok] } {
4092 global et_arm_fp_dp_flags
4093 return "$flags $et_arm_fp_dp_flags"
4096 # Return 1 if this is an ARM target that supports DSP multiply with
4097 # current multilib flags.
4099 proc check_effective_target_arm_dsp { } {
4100 return [check_no_compiler_messages arm_dsp assembly {
4101 #ifndef __ARM_FEATURE_DSP
4104 #include <arm_acle.h>
4109 # Return 1 if this is an ARM target that supports unaligned word/halfword
4110 # load/store instructions.
4112 proc check_effective_target_arm_unaligned { } {
4113 return [check_no_compiler_messages arm_unaligned assembly {
4114 #ifndef __ARM_FEATURE_UNALIGNED
4115 #error no unaligned support
4121 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
4122 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4123 # incompatible with these options. Also set et_arm_crypto_flags to the
4124 # best options to add.
4126 proc check_effective_target_arm_crypto_ok_nocache { } {
4127 global et_arm_crypto_flags
4128 set et_arm_crypto_flags ""
4129 if { [check_effective_target_arm_v8_neon_ok] } {
4130 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
4131 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
4132 #include "arm_neon.h"
4134 foo (uint8x16_t a, uint8x16_t b)
4136 return vaeseq_u8 (a, b);
4139 set et_arm_crypto_flags $flags
4148 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
4150 proc check_effective_target_arm_crypto_ok { } {
4151 return [check_cached_effective_target arm_crypto_ok \
4152 check_effective_target_arm_crypto_ok_nocache]
4155 # Add options for crypto extensions.
4156 proc add_options_for_arm_crypto { flags } {
4157 if { ! [check_effective_target_arm_crypto_ok] } {
4160 global et_arm_crypto_flags
4161 return "$flags $et_arm_crypto_flags"
4164 # Add the options needed for NEON. We need either -mfloat-abi=softfp
4165 # or -mfloat-abi=hard, but if one is already specified by the
4166 # multilib, use it. Similarly, if a -mfpu option already enables
4167 # NEON, do not add -mfpu=neon.
4169 proc add_options_for_arm_neon { flags } {
4170 if { ! [check_effective_target_arm_neon_ok] } {
4173 global et_arm_neon_flags
4174 return "$flags $et_arm_neon_flags"
4177 proc add_options_for_arm_v8_vfp { flags } {
4178 if { ! [check_effective_target_arm_v8_vfp_ok] } {
4181 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
4184 proc add_options_for_arm_v8_neon { flags } {
4185 if { ! [check_effective_target_arm_v8_neon_ok] } {
4188 global et_arm_v8_neon_flags
4189 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
4192 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
4193 # options for AArch64 and for ARM.
4195 proc add_options_for_arm_v8_1a_neon { flags } {
4196 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
4199 global et_arm_v8_1a_neon_flags
4200 return "$flags $et_arm_v8_1a_neon_flags"
4203 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
4204 # Also adds the ARMv8 FP options for ARM and for AArch64.
4206 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
4207 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4210 global et_arm_v8_2a_fp16_scalar_flags
4211 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
4214 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
4215 # the ARMv8 NEON options for ARM and for AArch64.
4217 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
4218 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4221 global et_arm_v8_2a_fp16_neon_flags
4222 return "$flags $et_arm_v8_2a_fp16_neon_flags"
4225 proc add_options_for_arm_crc { flags } {
4226 if { ! [check_effective_target_arm_crc_ok] } {
4229 global et_arm_crc_flags
4230 return "$flags $et_arm_crc_flags"
4233 # Add the options needed for NEON. We need either -mfloat-abi=softfp
4234 # or -mfloat-abi=hard, but if one is already specified by the
4235 # multilib, use it. Similarly, if a -mfpu option already enables
4236 # NEON, do not add -mfpu=neon.
4238 proc add_options_for_arm_neonv2 { flags } {
4239 if { ! [check_effective_target_arm_neonv2_ok] } {
4242 global et_arm_neonv2_flags
4243 return "$flags $et_arm_neonv2_flags"
4246 # Add the options needed for vfp3.
4247 proc add_options_for_arm_vfp3 { flags } {
4248 if { ! [check_effective_target_arm_vfp3_ok] } {
4251 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
4254 # Return 1 if this is an ARM target supporting -mfpu=neon
4255 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4256 # incompatible with these options. Also set et_arm_neon_flags to the
4257 # best options to add.
4259 proc check_effective_target_arm_neon_ok_nocache { } {
4260 global et_arm_neon_flags
4261 set et_arm_neon_flags ""
4262 if { [check_effective_target_arm32] } {
4263 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
4264 if { [check_no_compiler_messages_nocache arm_neon_ok object {
4265 #include <arm_neon.h>
4267 #ifndef __ARM_NEON__
4270 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
4271 configured for -mcpu=arm926ej-s, for example. */
4272 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
4273 #error Architecture does not support NEON.
4276 set et_arm_neon_flags $flags
4285 proc check_effective_target_arm_neon_ok { } {
4286 return [check_cached_effective_target arm_neon_ok \
4287 check_effective_target_arm_neon_ok_nocache]
4291 # Return 1 if this is an ARM target supporting the SIMD32 intrinsics
4292 # from arm_acle.h. Some multilibs may be incompatible with these options.
4293 # Also set et_arm_simd32_flags to the best options to add.
4294 # arm_acle.h includes stdint.h which can cause trouble with incompatible
4295 # -mfloat-abi= options.
4297 proc check_effective_target_arm_simd32_ok_nocache { } {
4298 global et_arm_simd32_flags
4299 set et_arm_simd32_flags ""
4300 foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp" "-march=armv6 -mfloat-abi=hard"} {
4301 if { [check_no_compiler_messages_nocache arm_simd32_ok object {
4302 #include <arm_acle.h>
4304 #ifndef __ARM_FEATURE_SIMD32
4308 set et_arm_simd32_flags $flags
4316 proc check_effective_target_arm_simd32_ok { } {
4317 return [check_cached_effective_target arm_simd32_ok \
4318 check_effective_target_arm_simd32_ok_nocache]
4321 proc add_options_for_arm_simd32 { flags } {
4322 if { ! [check_effective_target_arm_simd32_ok] } {
4325 global et_arm_simd32_flags
4326 return "$flags $et_arm_simd32_flags"
4329 # Return 1 if this is an ARM target supporting the __ssat and __usat
4330 # saturation intrinsics from arm_acle.h. Some multilibs may be
4331 # incompatible with these options. Also set et_arm_sat_flags to the
4332 # best options to add. arm_acle.h includes stdint.h which can cause
4333 # trouble with incompatible -mfloat-abi= options.
4335 proc check_effective_target_arm_sat_ok_nocache { } {
4336 global et_arm_sat_flags
4337 set et_arm_sat_flags ""
4338 foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp" "-march=armv6 -mfloat-abi=hard -mfpu=vfp"} {
4339 if { [check_no_compiler_messages_nocache et_arm_sat_flags object {
4340 #include <arm_acle.h>
4342 #ifndef __ARM_FEATURE_SAT
4346 set et_arm_sat_flags $flags
4354 proc check_effective_target_arm_sat_ok { } {
4355 return [check_cached_effective_target et_arm_sat_flags \
4356 check_effective_target_arm_sat_ok_nocache]
4359 proc add_options_for_arm_sat { flags } {
4360 if { ! [check_effective_target_arm_sat_ok] } {
4363 global et_arm_sat_flags
4364 return "$flags $et_arm_sat_flags"
4367 # Return 1 if this is an ARM target supporting the DSP intrinsics from
4368 # arm_acle.h. Some multilibs may be incompatible with these options.
4369 # Also set et_arm_dsp_flags to the best options to add.
4370 # arm_acle.h includes stdint.h which can cause trouble with incompatible
4371 # -mfloat-abi= options.
4372 # check_effective_target_arm_dsp also exists, which checks the current
4373 # multilib, without trying other options.
4375 proc check_effective_target_arm_dsp_ok_nocache { } {
4376 global et_arm_dsp_flags
4377 set et_arm_dsp_flags ""
4378 foreach flags {"" "-march=armv5te" "-march=armv5te -mfloat-abi=softfp" "-march=armv5te -mfloat-abi=hard"} {
4379 if { [check_no_compiler_messages_nocache et_arm_dsp_ok object {
4380 #include <arm_acle.h>
4382 #ifndef __ARM_FEATURE_DSP
4386 set et_arm_dsp_flags $flags
4394 proc check_effective_target_arm_dsp_ok { } {
4395 return [check_cached_effective_target et_arm_dsp_flags \
4396 check_effective_target_arm_dsp_ok_nocache]
4399 proc add_options_for_arm_dsp { flags } {
4400 if { ! [check_effective_target_arm_dsp_ok] } {
4403 global et_arm_dsp_flags
4404 return "$flags $et_arm_dsp_flags"
4407 # Return 1 if this is an ARM target supporting -mfpu=neon without any
4408 # -mfloat-abi= option. Useful in tests where add_options is not
4409 # supported (such as lto tests).
4411 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
4412 if { [check_effective_target_arm32] } {
4413 foreach flags {"-mfpu=neon"} {
4414 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
4415 #include <arm_neon.h>
4417 #ifndef __ARM_NEON__
4420 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
4421 configured for -mcpu=arm926ej-s, for example. */
4422 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
4423 #error Architecture does not support NEON.
4434 proc check_effective_target_arm_neon_ok_no_float_abi { } {
4435 return [check_cached_effective_target arm_neon_ok_no_float_abi \
4436 check_effective_target_arm_neon_ok_no_float_abi_nocache]
4439 proc check_effective_target_arm_crc_ok_nocache { } {
4440 global et_arm_crc_flags
4441 set et_arm_crc_flags "-march=armv8-a+crc"
4442 return [check_no_compiler_messages_nocache arm_crc_ok object {
4443 #if !defined (__ARM_FEATURE_CRC32)
4446 #include <arm_acle.h>
4447 } "$et_arm_crc_flags"]
4450 proc check_effective_target_arm_crc_ok { } {
4451 return [check_cached_effective_target arm_crc_ok \
4452 check_effective_target_arm_crc_ok_nocache]
4455 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4456 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4457 # incompatible with these options. Also set et_arm_neon_fp16_flags to
4458 # the best options to add.
4460 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
4461 global et_arm_neon_fp16_flags
4462 global et_arm_neon_flags
4463 set et_arm_neon_fp16_flags ""
4464 if { [check_effective_target_arm32]
4465 && [check_effective_target_arm_neon_ok] } {
4466 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4467 "-mfpu=neon-fp16 -mfloat-abi=softfp"
4468 "-mfp16-format=ieee"
4469 "-mfloat-abi=softfp -mfp16-format=ieee"
4470 "-mfpu=neon-fp16 -mfp16-format=ieee"
4471 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4472 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
4473 #include "arm_neon.h"
4475 foo (float32x4_t arg)
4477 return vcvt_f16_f32 (arg);
4479 } "$et_arm_neon_flags $flags"] } {
4480 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
4489 proc check_effective_target_arm_neon_fp16_ok { } {
4490 return [check_cached_effective_target arm_neon_fp16_ok \
4491 check_effective_target_arm_neon_fp16_ok_nocache]
4494 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4495 # and -mfloat-abi=softfp together. Some multilibs may be
4496 # incompatible with these options. Also set et_arm_neon_softfp_fp16_flags to
4497 # the best options to add.
4499 proc check_effective_target_arm_neon_softfp_fp16_ok_nocache { } {
4500 global et_arm_neon_softfp_fp16_flags
4501 global et_arm_neon_flags
4502 set et_arm_neon_softfp_fp16_flags ""
4503 if { [check_effective_target_arm32]
4504 && [check_effective_target_arm_neon_ok] } {
4505 foreach flags {"-mfpu=neon-fp16 -mfloat-abi=softfp"
4506 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4507 if { [check_no_compiler_messages_nocache arm_neon_softfp_fp16_ok object {
4508 #include "arm_neon.h"
4510 foo (float32x4_t arg)
4512 return vcvt_f16_f32 (arg);
4514 } "$et_arm_neon_flags $flags"] } {
4515 set et_arm_neon_softfp_fp16_flags [concat $et_arm_neon_flags $flags]
4524 proc check_effective_target_arm_neon_softfp_fp16_ok { } {
4525 return [check_cached_effective_target arm_neon_softfp_fp16_ok \
4526 check_effective_target_arm_neon_softfp_fp16_ok_nocache]
4531 proc check_effective_target_arm_neon_fp16_hw { } {
4532 if {! [check_effective_target_arm_neon_fp16_ok] } {
4535 global et_arm_neon_fp16_flags
4536 check_runtime arm_neon_fp16_hw {
4538 main (int argc, char **argv)
4540 asm ("vcvt.f32.f16 q1, d0");
4543 } $et_arm_neon_fp16_flags
4546 proc add_options_for_arm_neon_fp16 { flags } {
4547 if { ! [check_effective_target_arm_neon_fp16_ok] } {
4550 global et_arm_neon_fp16_flags
4551 return "$flags $et_arm_neon_fp16_flags"
4554 proc add_options_for_arm_neon_softfp_fp16 { flags } {
4555 if { ! [check_effective_target_arm_neon_softfp_fp16_ok] } {
4558 global et_arm_neon_softfp_fp16_flags
4559 return "$flags $et_arm_neon_softfp_fp16_flags"
4562 proc add_options_for_aarch64_sve { flags } {
4563 if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sve] } {
4566 return "$flags -march=armv8.2-a+sve"
4569 # Return 1 if this is an ARM target supporting the FP16 alternative
4570 # format. Some multilibs may be incompatible with the options needed. Also
4571 # set et_arm_neon_fp16_flags to the best options to add.
4573 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
4574 if { [istarget *-*-vxworks7*] } {
4575 # Not supported by the target system.
4578 global et_arm_neon_fp16_flags
4579 set et_arm_neon_fp16_flags ""
4580 if { [check_effective_target_arm32] } {
4581 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4582 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4583 if { [check_no_compiler_messages_nocache \
4584 arm_fp16_alternative_ok object {
4585 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4586 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
4588 } "$flags -mfp16-format=alternative"] } {
4589 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
4598 proc check_effective_target_arm_fp16_alternative_ok { } {
4599 return [check_cached_effective_target arm_fp16_alternative_ok \
4600 check_effective_target_arm_fp16_alternative_ok_nocache]
4603 # Return 1 if this is an ARM target supports specifying the FP16 none
4604 # format. Some multilibs may be incompatible with the options needed.
4606 proc check_effective_target_arm_fp16_none_ok_nocache { } {
4607 if { [check_effective_target_arm32] } {
4608 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4609 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4610 if { [check_no_compiler_messages_nocache \
4611 arm_fp16_none_ok object {
4612 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4613 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
4615 #if defined (__ARM_FP16_FORMAT_IEEE)
4616 #error __ARM_FP16_FORMAT_IEEE defined
4618 } "$flags -mfp16-format=none"] } {
4627 proc check_effective_target_arm_fp16_none_ok { } {
4628 return [check_cached_effective_target arm_fp16_none_ok \
4629 check_effective_target_arm_fp16_none_ok_nocache]
4632 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
4633 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4634 # incompatible with these options. Also set et_arm_v8_neon_flags to the
4635 # best options to add.
4637 proc check_effective_target_arm_v8_neon_ok_nocache { } {
4638 global et_arm_v8_neon_flags
4639 set et_arm_v8_neon_flags ""
4640 if { [check_effective_target_arm32] } {
4641 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4642 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
4644 #error not armv8 or later
4646 #include "arm_neon.h"
4650 __asm__ volatile ("vrintn.f32 q0, q0");
4652 } "$flags -march=armv8-a"] } {
4653 set et_arm_v8_neon_flags $flags
4662 proc check_effective_target_arm_v8_neon_ok { } {
4663 return [check_cached_effective_target arm_v8_neon_ok \
4664 check_effective_target_arm_v8_neon_ok_nocache]
4667 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
4668 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4669 # incompatible with these options. Also set et_arm_neonv2_flags to the
4670 # best options to add.
4672 proc check_effective_target_arm_neonv2_ok_nocache { } {
4673 global et_arm_neonv2_flags
4674 global et_arm_neon_flags
4675 set et_arm_neonv2_flags ""
4676 if { [check_effective_target_arm32]
4677 && [check_effective_target_arm_neon_ok] } {
4678 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
4679 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
4680 #include "arm_neon.h"
4682 foo (float32x2_t a, float32x2_t b, float32x2_t c)
4684 return vfma_f32 (a, b, c);
4686 } "$et_arm_neon_flags $flags"] } {
4687 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
4696 proc check_effective_target_arm_neonv2_ok { } {
4697 return [check_cached_effective_target arm_neonv2_ok \
4698 check_effective_target_arm_neonv2_ok_nocache]
4701 # Add the options needed for VFP FP16 support. We need either
4702 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
4703 # the multilib, use it.
4705 proc add_options_for_arm_fp16 { flags } {
4706 if { ! [check_effective_target_arm_fp16_ok] } {
4709 global et_arm_fp16_flags
4710 return "$flags $et_arm_fp16_flags"
4713 # Add the options needed to enable support for IEEE format
4714 # half-precision support. This is valid for ARM targets.
4716 proc add_options_for_arm_fp16_ieee { flags } {
4717 if { ! [check_effective_target_arm_fp16_ok] } {
4720 global et_arm_fp16_flags
4721 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
4724 # Add the options needed to enable support for ARM Alternative format
4725 # half-precision support. This is valid for ARM targets.
4727 proc add_options_for_arm_fp16_alternative { flags } {
4728 if { ! [check_effective_target_arm_fp16_ok] } {
4731 global et_arm_fp16_flags
4732 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
4735 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
4736 # Skip multilibs that are incompatible with these options and set
4737 # et_arm_fp16_flags to the best options to add. This test is valid for
4740 proc check_effective_target_arm_fp16_ok_nocache { } {
4741 global et_arm_fp16_flags
4742 set et_arm_fp16_flags ""
4743 if { ! [check_effective_target_arm32] } {
4747 [list "" { *-*-* } { "-mfpu=*" } \
4748 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
4749 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
4750 # Multilib flags would override -mfpu.
4753 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
4754 # Must generate floating-point instructions.
4757 if [check_effective_target_arm_hf_eabi] {
4758 # Use existing float-abi and force an fpu which supports fp16
4759 set et_arm_fp16_flags "-mfpu=vfpv4"
4762 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4763 # The existing -mfpu value is OK; use it, but add softfp.
4764 set et_arm_fp16_flags "-mfloat-abi=softfp"
4767 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4768 # macro to check for this support.
4769 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4770 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4773 set et_arm_fp16_flags "$flags"
4780 proc check_effective_target_arm_fp16_ok { } {
4781 return [check_cached_effective_target arm_fp16_ok \
4782 check_effective_target_arm_fp16_ok_nocache]
4785 # Return 1 if the target supports executing VFP FP16 instructions, 0
4786 # otherwise. This test is valid for ARM only.
4788 proc check_effective_target_arm_fp16_hw { } {
4789 if {! [check_effective_target_arm_fp16_ok] } {
4792 global et_arm_fp16_flags
4793 check_runtime arm_fp16_hw {
4795 main (int argc, char **argv)
4799 asm ("vcvtb.f32.f16 %0, %1"
4800 : "=w" (r) : "w" (a)
4801 : /* No clobbers. */);
4802 return (r == 1.0) ? 0 : 1;
4804 } "$et_arm_fp16_flags -mfp16-format=ieee"
4807 # Creates a series of routines that return 1 if the given architecture
4808 # can be selected and a routine to give the flags to select that architecture
4809 # Note: Extra flags may be added to disable options from newer compilers
4810 # (Thumb in particular - but others may be added in the future).
4811 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4812 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4813 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4814 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4815 # /* { dg-add-options arm_arch_v5t } */
4816 # /* { dg-require-effective-target arm_arch_v5t_multilib } */
4817 foreach { armfunc armflag armdefs } {
4818 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4819 v4t "-march=armv4t -mfloat-abi=softfp" __ARM_ARCH_4T__
4820 v4t_arm "-march=armv4t -marm" __ARM_ARCH_4T__
4821 v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" __ARM_ARCH_4T__
4822 v5t "-march=armv5t -mfloat-abi=softfp" __ARM_ARCH_5T__
4823 v5t_arm "-march=armv5t -marm" __ARM_ARCH_5T__
4824 v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" __ARM_ARCH_5T__
4825 v5te "-march=armv5te -mfloat-abi=softfp" __ARM_ARCH_5TE__
4826 v5te_arm "-march=armv5te -marm" __ARM_ARCH_5TE__
4827 v5te_thumb "-march=armv5te -mthumb -mfloat-abi=softfp" __ARM_ARCH_5TE__
4828 v6 "-march=armv6 -mfloat-abi=softfp" __ARM_ARCH_6__
4829 v6_arm "-march=armv6 -marm" __ARM_ARCH_6__
4830 v6_thumb "-march=armv6 -mthumb -mfloat-abi=softfp" __ARM_ARCH_6__
4831 v6k "-march=armv6k -mfloat-abi=softfp" __ARM_ARCH_6K__
4832 v6k_arm "-march=armv6k -marm" __ARM_ARCH_6K__
4833 v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
4834 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4835 v6z "-march=armv6z -mfloat-abi=softfp" __ARM_ARCH_6Z__
4836 v6z_arm "-march=armv6z -marm" __ARM_ARCH_6Z__
4837 v6z_thumb "-march=armv6z -mthumb -mfloat-abi=softfp" __ARM_ARCH_6Z__
4838 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4839 v7a "-march=armv7-a" __ARM_ARCH_7A__
4840 v7r "-march=armv7-r" __ARM_ARCH_7R__
4841 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4842 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4843 v7ve "-march=armv7ve -marm"
4844 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4845 v8a "-march=armv8-a" __ARM_ARCH_8A__
4846 v8a_hard "-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=hard" __ARM_ARCH_8A__
4847 v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
4848 v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
4849 v8r "-march=armv8-r" __ARM_ARCH_8R__
4850 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4851 __ARM_ARCH_8M_BASE__
4852 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4853 v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4854 v9a "-march=armv9-a" __ARM_ARCH_9A__ } {
4855 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4856 proc check_effective_target_arm_arch_FUNC_ok { } {
4857 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4869 proc add_options_for_arm_arch_FUNC { flags } {
4870 return "$flags FLAG"
4873 proc check_effective_target_arm_arch_FUNC_multilib { } {
4874 return [check_runtime arm_arch_FUNC_multilib {
4880 } [add_options_for_arm_arch_FUNC ""]]
4885 # Return 1 if GCC was configured with --with-mode=
4886 proc check_effective_target_default_mode { } {
4888 return [check_configured_with "with-mode="]
4891 # Return 1 if this is an ARM target where -marm causes ARM to be
4894 proc check_effective_target_arm_arm_ok { } {
4895 return [check_no_compiler_messages arm_arm_ok assembly {
4896 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4897 #error !__arm__ || __thumb__ || __thumb2__
4903 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4906 proc check_effective_target_arm_thumb1_ok { } {
4907 return [check_no_compiler_messages arm_thumb1_ok assembly {
4908 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4909 #error !__arm__ || !__thumb__ || __thumb2__
4911 int foo (int i) { return i; }
4915 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4918 proc check_effective_target_arm_thumb2_ok { } {
4919 return [check_no_compiler_messages arm_thumb2_ok assembly {
4920 #if !defined(__thumb2__)
4923 int foo (int i) { return i; }
4927 # Return 1 if this is an ARM target where Thumb-1 is used without options
4928 # added by the test.
4930 proc check_effective_target_arm_thumb1 { } {
4931 return [check_no_compiler_messages arm_thumb1 assembly {
4932 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4933 #error !__arm__ || !__thumb__ || __thumb2__
4939 # Return 1 if this is an ARM target where Thumb-2 is used without options
4940 # added by the test.
4942 proc check_effective_target_arm_thumb2 { } {
4943 return [check_no_compiler_messages arm_thumb2 assembly {
4944 #if !defined(__thumb2__)
4951 # Return 1 if this is an ARM target where conditional execution is available.
4953 proc check_effective_target_arm_cond_exec { } {
4954 return [check_no_compiler_messages arm_cond_exec assembly {
4955 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4962 # Return 1 if this is an ARM cortex-M profile cpu
4964 proc check_effective_target_arm_cortex_m { } {
4965 if { ![istarget arm*-*-*] } {
4968 return [check_no_compiler_messages arm_cortex_m assembly {
4969 #if defined(__ARM_ARCH_ISA_ARM)
4970 #error __ARM_ARCH_ISA_ARM is defined
4976 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4977 # used and MOVT/MOVW instructions to be available.
4979 proc check_effective_target_arm_thumb1_movt_ok {} {
4980 if [check_effective_target_arm_thumb1_ok] {
4981 return [check_no_compiler_messages arm_movt object {
4985 asm ("movt r0, #42");
4993 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4994 # used and CBZ and CBNZ instructions are available.
4996 proc check_effective_target_arm_thumb1_cbz_ok {} {
4997 if [check_effective_target_arm_thumb1_ok] {
4998 return [check_no_compiler_messages arm_movt object {
5002 asm ("cbz r0, 2f\n2:");
5010 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
5013 proc check_effective_target_arm_cmse_ok {} {
5014 return [check_no_compiler_messages arm_cmse object {
5023 # Return 1 if the target supports executing CMSE instructions, 0
5024 # otherwise. Cache the result.
5026 proc check_effective_target_arm_cmse_hw { } {
5027 return [check_runtime arm_cmse_hw_available {
5031 asm ("ldr\t%0, =0xe000ed44\n" \
5033 "sg" : "=l" (id_pfr1));
5034 /* Exit with code 0 iff security extension is available. */
5035 return !(id_pfr1 & 0xf0);
5039 # Return 1 if the target supports executing MVE instructions, 0
5042 proc check_effective_target_arm_mve_hw {} {
5043 return [check_runtime arm_mve_hw_available {
5049 asm ("sqrshrl %Q1, %R1, #64, %2"
5051 : "0" (a), "r" (b));
5057 # Return 1 if this is an ARM target where ARMv8-M Security Extensions with
5058 # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.
5060 proc check_effective_target_arm_cmse_clear_ok {} {
5061 return [check_no_compiler_messages arm_cmse_clear object {
5065 asm ("clrm {r1, r2}");
5070 # Return 1 if this compilation turns on string_ops_prefer_neon on.
5072 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
5073 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
5074 int foo (void) { return 0; }
5075 } "-O2 -mprint-tune-info" ]
5078 # Return 1 if the target supports executing NEON instructions, 0
5079 # otherwise. Cache the result.
5081 proc check_effective_target_arm_neon_hw { } {
5082 return [check_runtime arm_neon_hw_available {
5086 long long a = 0, b = 1;
5087 asm ("vorr %P0, %P1, %P2"
5089 : "0" (a), "w" (b));
5092 } [add_options_for_arm_neon ""]]
5095 # Return true if this is an AArch64 target that can run SVE code.
5097 proc check_effective_target_aarch64_sve_hw { } {
5098 if { ![istarget aarch64*-*-*] } {
5101 return [check_runtime aarch64_sve_hw_available {
5105 asm volatile ("ptrue p0.b");
5108 } [add_options_for_aarch64_sve ""]]
5111 # Return true if this is an AArch64 target that can run SVE2 code.
5113 proc check_effective_target_aarch64_sve2_hw { } {
5114 if { ![istarget aarch64*-*-*] } {
5117 return [check_runtime aarch64_sve2_hw_available {
5121 asm volatile ("addp z0.b, p0/m, z0.b, z1.b");
5127 # Return true if this is an AArch64 target that can run SVE code and
5128 # if its SVE vectors have exactly BITS bits.
5130 proc aarch64_sve_hw_bits { bits } {
5131 if { ![check_effective_target_aarch64_sve_hw] } {
5134 return [check_runtime aarch64_sve${bits}_hw [subst {
5139 asm volatile ("cntd %0" : "=r" (res));
5140 if (res * 64 != $bits)
5144 }] [add_options_for_aarch64_sve ""]]
5147 # Return true if this is an AArch64 target that can run SVE code and
5148 # if its SVE vectors have exactly 256 bits.
5150 foreach N { 128 256 512 1024 2048 } {
5151 eval [string map [list N $N] {
5152 proc check_effective_target_aarch64_sveN_hw { } {
5153 return [aarch64_sve_hw_bits N]
5158 proc check_effective_target_arm_neonv2_hw { } {
5159 return [check_runtime arm_neon_hwv2_available {
5160 #include "arm_neon.h"
5164 float32x2_t a, b, c;
5165 asm ("vfma.f32 %P0, %P1, %P2"
5167 : "w" (b), "w" (c));
5170 } [add_options_for_arm_neonv2 ""]]
5173 # ID_AA64PFR1_EL1.BT using bits[3:0] == 1 implies BTI implimented.
5174 proc check_effective_target_aarch64_bti_hw { } {
5175 if { ![istarget aarch64*-*-*] } {
5178 return [check_runtime aarch64_bti_hw_available {
5183 asm volatile ("mrs %0, id_aa64pfr1_el1" : "=r" (a));
5184 return !((a & 0xf) == 1);
5189 # Return 1 if the target supports executing the armv8.3-a FJCVTZS
5191 proc check_effective_target_aarch64_fjcvtzs_hw { } {
5192 if { ![istarget aarch64*-*-*] } {
5195 return [check_runtime aarch64_fjcvtzs_hw_available {
5201 asm volatile ("fjcvtzs %w0, %d1"
5204 : /* No clobbers. */);
5207 } "-march=armv8.3-a" ]
5210 # Return 1 if GCC was configured with --enable-standard-branch-protection
5211 proc check_effective_target_default_branch_protection { } {
5212 return [check_configured_with "enable-standard-branch-protection"]
5215 # Return 1 if this is an ARM target supporting -mfloat-abi=softfp.
5217 proc check_effective_target_arm_softfp_ok { } {
5218 return [check_no_compiler_messages arm_softfp_ok object {
5221 int main (void) { return 0; }
5222 } "-mfloat-abi=softfp"]
5225 # Return 1 if this is an ARM target supporting -mfloat-abi=hard.
5227 proc check_effective_target_arm_hard_ok { } {
5228 return [check_no_compiler_messages arm_hard_ok object {
5231 int main (void) { return 0; }
5232 } "-mfloat-abi=hard"]
5235 # Return 1 if the target supports ARMv8.1-M MVE with floating point
5236 # instructions, 0 otherwise. The test is valid for ARM.
5237 # Record the command line options needed.
5239 proc check_effective_target_arm_v8_1m_mve_fp_ok_nocache { } {
5240 global et_arm_v8_1m_mve_fp_flags
5241 set et_arm_v8_1m_mve_fp_flags ""
5243 if { ![istarget arm*-*-*] } {
5247 # Iterate through sets of options to find the compiler flags that
5248 # need to be added to the -march option.
5249 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto -march=armv8.1-m.main+mve.fp" "-mfloat-abi=hard -mfpu=auto -march=armv8.1-m.main+mve.fp"} {
5250 if { [check_no_compiler_messages_nocache \
5251 arm_v8_1m_mve_fp_ok object {
5252 #include <arm_mve.h>
5253 #if !(__ARM_FEATURE_MVE & 2)
5254 #error "__ARM_FEATURE_MVE for floating point not defined"
5256 #if __ARM_BIG_ENDIAN
5257 #error "MVE intrinsics are not supported in Big-Endian mode."
5259 } "$flags -mthumb"] } {
5260 set et_arm_v8_1m_mve_fp_flags "$flags -mthumb --save-temps"
5268 proc check_effective_target_arm_v8_1m_mve_fp_ok { } {
5269 return [check_cached_effective_target arm_v8_1m_mve_fp_ok \
5270 check_effective_target_arm_v8_1m_mve_fp_ok_nocache]
5273 proc add_options_for_arm_v8_1m_mve_fp { flags } {
5274 if { ! [check_effective_target_arm_v8_1m_mve_fp_ok] } {
5277 global et_arm_v8_1m_mve_fp_flags
5278 return "$flags $et_arm_v8_1m_mve_fp_flags"
5281 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
5282 # otherwise. The test is valid for AArch64 and ARM. Record the command
5283 # line options needed.
5285 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
5286 global et_arm_v8_1a_neon_flags
5287 set et_arm_v8_1a_neon_flags ""
5289 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5293 # Iterate through sets of options to find the compiler flags that
5294 # need to be added to the -march option. Start with the empty set
5295 # since AArch64 only needs the -march setting.
5296 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
5297 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
5298 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
5299 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
5300 #if !defined (__ARM_FEATURE_QRDMX)
5301 #error "__ARM_FEATURE_QRDMX not defined"
5303 } "$flags $arches"] } {
5304 set et_arm_v8_1a_neon_flags "$flags $arches"
5313 proc check_effective_target_arm_v8_1a_neon_ok { } {
5314 return [check_cached_effective_target arm_v8_1a_neon_ok \
5315 check_effective_target_arm_v8_1a_neon_ok_nocache]
5318 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
5319 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5320 # Record the command line options needed.
5322 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
5323 global et_arm_v8_2a_fp16_scalar_flags
5324 set et_arm_v8_2a_fp16_scalar_flags ""
5326 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5330 # Iterate through sets of options to find the compiler flags that
5331 # need to be added to the -march option.
5332 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
5333 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
5334 if { [check_no_compiler_messages_nocache \
5335 arm_v8_2a_fp16_scalar_ok object {
5336 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
5337 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
5339 } "$flags -march=armv8.2-a+fp16"] } {
5340 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
5348 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
5349 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
5350 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
5353 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
5354 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5355 # Record the command line options needed.
5357 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
5358 global et_arm_v8_2a_fp16_neon_flags
5359 set et_arm_v8_2a_fp16_neon_flags ""
5361 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5365 # Iterate through sets of options to find the compiler flags that
5366 # need to be added to the -march option.
5367 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
5368 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
5369 if { [check_no_compiler_messages_nocache \
5370 arm_v8_2a_fp16_neon_ok object {
5371 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
5372 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
5374 } "$flags -march=armv8.2-a+fp16"] } {
5375 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
5383 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
5384 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
5385 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
5388 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
5389 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5390 # Record the command line options needed.
5392 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
5393 global et_arm_v8_2a_dotprod_neon_flags
5394 set et_arm_v8_2a_dotprod_neon_flags ""
5396 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5400 # Iterate through sets of options to find the compiler flags that
5401 # need to be added to the -march option.
5402 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
5403 if { [check_no_compiler_messages_nocache \
5404 arm_v8_2a_dotprod_neon_ok object {
5406 #if !defined (__ARM_FEATURE_DOTPROD)
5407 #error "__ARM_FEATURE_DOTPROD not defined"
5409 } "$flags -march=armv8.2-a+dotprod"] } {
5410 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
5418 # Return 1 if the target supports ARMv8.1-M MVE
5419 # instructions, 0 otherwise. The test is valid for ARM.
5420 # Record the command line options needed.
5422 proc check_effective_target_arm_v8_1m_mve_ok_nocache { } {
5423 global et_arm_v8_1m_mve_flags
5424 set et_arm_v8_1m_mve_flags ""
5426 if { ![istarget arm*-*-*] } {
5430 # Iterate through sets of options to find the compiler flags that
5431 # need to be added to the -march option.
5432 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto -march=armv8.1-m.main+mve" "-mfloat-abi=hard -mfpu=auto -march=armv8.1-m.main+mve"} {
5433 if { [check_no_compiler_messages_nocache \
5434 arm_v8_1m_mve_ok object {
5435 #if !defined (__ARM_FEATURE_MVE)
5436 #error "__ARM_FEATURE_MVE not defined"
5438 #if __ARM_BIG_ENDIAN
5439 #error "MVE intrinsics are not supported in Big-Endian mode."
5441 #include <arm_mve.h>
5442 } "$flags -mthumb"] } {
5443 set et_arm_v8_1m_mve_flags "$flags -mthumb --save-temps"
5451 proc check_effective_target_arm_v8_1m_mve_ok { } {
5452 return [check_cached_effective_target arm_v8_1m_mve_ok \
5453 check_effective_target_arm_v8_1m_mve_ok_nocache]
5456 proc add_options_for_arm_v8_1m_mve { flags } {
5457 if { ! [check_effective_target_arm_v8_1m_mve_ok] } {
5460 global et_arm_v8_1m_mve_flags
5461 return "$flags $et_arm_v8_1m_mve_flags"
5464 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
5465 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
5466 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
5469 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
5470 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
5473 global et_arm_v8_2a_dotprod_neon_flags
5474 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
5477 # Return 1 if the target supports ARMv8.2+i8mm Adv.SIMD Dot Product
5478 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5479 # Record the command line options needed.
5481 proc check_effective_target_arm_v8_2a_i8mm_ok_nocache { } {
5482 global et_arm_v8_2a_i8mm_flags
5483 set et_arm_v8_2a_i8mm_flags ""
5485 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5489 # Iterate through sets of options to find the compiler flags that
5490 # need to be added to the -march option.
5491 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8" } {
5492 if { [check_no_compiler_messages_nocache \
5493 arm_v8_2a_i8mm_ok object {
5494 #include <arm_neon.h>
5495 #if !defined (__ARM_FEATURE_MATMUL_INT8)
5496 #error "__ARM_FEATURE_MATMUL_INT8 not defined"
5498 } "$flags -march=armv8.2-a+i8mm"] } {
5499 set et_arm_v8_2a_i8mm_flags "$flags -march=armv8.2-a+i8mm"
5507 proc check_effective_target_arm_v8_2a_i8mm_ok { } {
5508 return [check_cached_effective_target arm_v8_2a_i8mm_ok \
5509 check_effective_target_arm_v8_2a_i8mm_ok_nocache]
5512 proc add_options_for_arm_v8_2a_i8mm { flags } {
5513 if { ! [check_effective_target_arm_v8_2a_i8mm_ok] } {
5516 global et_arm_v8_2a_i8mm_flags
5517 return "$flags $et_arm_v8_2a_i8mm_flags"
5520 # Return 1 if the target supports FP16 VFMAL and VFMSL
5521 # instructions, 0 otherwise.
5522 # Record the command line options needed.
5524 proc check_effective_target_arm_fp16fml_neon_ok_nocache { } {
5525 global et_arm_fp16fml_neon_flags
5526 set et_arm_fp16fml_neon_flags ""
5528 if { ![istarget arm*-*-*] } {
5532 # Iterate through sets of options to find the compiler flags that
5533 # need to be added to the -march option.
5534 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
5535 if { [check_no_compiler_messages_nocache \
5536 arm_fp16fml_neon_ok assembly {
5537 #include <arm_neon.h>
5539 foo (float32x2_t r, float16x4_t a, float16x4_t b)
5541 return vfmlal_high_f16 (r, a, b);
5543 } "$flags -march=armv8.2-a+fp16fml"] } {
5544 set et_arm_fp16fml_neon_flags "$flags -march=armv8.2-a+fp16fml"
5552 proc check_effective_target_arm_fp16fml_neon_ok { } {
5553 return [check_cached_effective_target arm_fp16fml_neon_ok \
5554 check_effective_target_arm_fp16fml_neon_ok_nocache]
5557 proc add_options_for_arm_fp16fml_neon { flags } {
5558 if { ! [check_effective_target_arm_fp16fml_neon_ok] } {
5561 global et_arm_fp16fml_neon_flags
5562 return "$flags $et_arm_fp16fml_neon_flags"
5565 # Return 1 if the target supports BFloat16 SIMD instructions, 0 otherwise.
5566 # The test is valid for ARM and for AArch64.
5568 proc check_effective_target_arm_v8_2a_bf16_neon_ok_nocache { } {
5569 global et_arm_v8_2a_bf16_neon_flags
5570 set et_arm_v8_2a_bf16_neon_flags ""
5572 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5576 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8" } {
5577 if { [check_no_compiler_messages_nocache arm_v8_2a_bf16_neon_ok object {
5578 #include <arm_neon.h>
5579 #if !defined (__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)
5580 #error "__ARM_FEATURE_BF16_VECTOR_ARITHMETIC not defined"
5582 } "$flags -march=armv8.2-a+bf16"] } {
5583 set et_arm_v8_2a_bf16_neon_flags "$flags -march=armv8.2-a+bf16"
5591 proc check_effective_target_arm_v8_2a_bf16_neon_ok { } {
5592 return [check_cached_effective_target arm_v8_2a_bf16_neon_ok \
5593 check_effective_target_arm_v8_2a_bf16_neon_ok_nocache]
5596 proc add_options_for_arm_v8_2a_bf16_neon { flags } {
5597 if { ! [check_effective_target_arm_v8_2a_bf16_neon_ok] } {
5600 global et_arm_v8_2a_bf16_neon_flags
5601 return "$flags $et_arm_v8_2a_bf16_neon_flags"
5604 # A series of routines are created to 1) check if a given architecture is
5605 # effective (check_effective_target_*_ok) and then 2) give the corresponding
5606 # flags that enable the architecture (add_options_for_*).
5607 # The series includes:
5608 # arm_v8m_main_cde: Armv8-m CDE (Custom Datapath Extension).
5609 # arm_v8m_main_cde_fp: Armv8-m CDE with FP registers.
5610 # arm_v8_1m_main_cde_mve: Armv8.1-m CDE with MVE.
5612 # /* { dg-require-effective-target arm_v8m_main_cde_ok } */
5613 # /* { dg-add-options arm_v8m_main_cde } */
5614 # The tests are valid for Arm.
5616 foreach { armfunc armflag armdef arminc } {
5618 "-march=armv8-m.main+cdecp0+cdecp6 -mthumb"
5619 "defined (__ARM_FEATURE_CDE)"
5622 "-march=armv8-m.main+fp+cdecp0+cdecp6 -mthumb -mfpu=auto"
5623 "defined (__ARM_FEATURE_CDE) && defined (__ARM_FP)"
5625 arm_v8_1m_main_cde_mve
5626 "-march=armv8.1-m.main+mve+cdecp0+cdecp6 -mthumb -mfpu=auto"
5627 "defined (__ARM_FEATURE_CDE) && defined (__ARM_FEATURE_MVE)"
5628 "#include <arm_mve.h>"
5629 arm_v8_1m_main_cde_mve_fp
5630 "-march=armv8.1-m.main+mve.fp+cdecp0+cdecp6 -mthumb -mfpu=auto"
5631 "defined (__ARM_FEATURE_CDE) || __ARM_FEATURE_MVE == 3"
5632 "#include <arm_mve.h>"
5634 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef INC $arminc ] {
5635 proc check_effective_target_FUNC_ok_nocache { } {
5636 global et_FUNC_flags
5637 set et_FUNC_flags ""
5639 if { ![istarget arm*-*-*] } {
5643 if { [check_no_compiler_messages_nocache FUNC_ok assembly {
5647 #include <arm_cde.h>
5650 set et_FUNC_flags "FLAG"
5657 proc check_effective_target_FUNC_ok { } {
5658 return [check_cached_effective_target FUNC_ok \
5659 check_effective_target_FUNC_ok_nocache]
5662 proc add_options_for_FUNC { flags } {
5663 if { ! [check_effective_target_FUNC_ok] } {
5666 global et_FUNC_flags
5667 return "$flags $et_FUNC_flags"
5670 proc check_effective_target_FUNC_multilib { } {
5671 if { ! [check_effective_target_FUNC_ok] } {
5674 return [check_runtime FUNC_multilib {
5678 #include <arm_cde.h>
5685 } [add_options_for_FUNC ""]]
5690 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
5693 proc check_effective_target_arm_v8_neon_hw { } {
5694 return [check_runtime arm_v8_neon_hw_available {
5695 #include "arm_neon.h"
5699 float32x2_t a = { 1.0f, 2.0f };
5700 #ifdef __ARM_ARCH_ISA_A64
5701 asm ("frinta %0.2s, %1.2s"
5705 asm ("vrinta.f32 %P0, %P1"
5709 return a[0] == 2.0f;
5711 } [add_options_for_arm_v8_neon ""]]
5714 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
5715 # otherwise. The test is valid for AArch64 and ARM.
5717 proc check_effective_target_arm_v8_1a_neon_hw { } {
5718 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
5721 return [check_runtime arm_v8_1a_neon_hw_available {
5725 #ifdef __ARM_ARCH_ISA_A64
5726 __Int32x2_t a = {0, 1};
5727 __Int32x2_t b = {0, 2};
5730 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
5733 : /* No clobbers. */);
5737 __simd64_int32_t a = {0, 1};
5738 __simd64_int32_t b = {0, 2};
5739 __simd64_int32_t result;
5741 asm ("vqrdmlah.s32 %P0, %P1, %P2"
5744 : /* No clobbers. */);
5749 } [add_options_for_arm_v8_1a_neon ""]]
5752 # Return 1 if the target supports executing floating point instructions from
5753 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
5756 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
5757 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
5760 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
5767 #ifdef __ARM_ARCH_ISA_A64
5769 asm ("fabs %h0, %h1"
5772 : /* No clobbers. */);
5776 asm ("vabs.f16 %0, %1"
5779 : /* No clobbers. */);
5783 return (result == 1.0) ? 0 : 1;
5785 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
5788 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
5789 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
5792 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
5793 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
5796 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
5800 #ifdef __ARM_ARCH_ISA_A64
5802 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
5803 __Float16x4_t result;
5805 asm ("fabs %0.4h, %1.4h"
5808 : /* No clobbers. */);
5812 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
5813 __simd64_float16_t result;
5815 asm ("vabs.f16 %P0, %P1"
5818 : /* No clobbers. */);
5822 return (result[0] == 1.0) ? 0 : 1;
5824 } [add_options_for_arm_v8_2a_fp16_neon ""]]
5827 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
5828 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
5831 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
5832 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
5835 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
5836 #include "arm_neon.h"
5841 uint32x2_t results = {0,0};
5842 uint8x8_t a = {1,1,1,1,2,2,2,2};
5843 uint8x8_t b = {2,2,2,2,3,3,3,3};
5845 #ifdef __ARM_ARCH_ISA_A64
5846 asm ("udot %0.2s, %1.8b, %2.8b"
5849 : /* No clobbers. */);
5852 asm ("vudot.u8 %P0, %P1, %P2"
5855 : /* No clobbers. */);
5858 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
5860 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
5863 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
5864 # with the i8mm extension, 0 otherwise. The test is valid for ARM and for
5867 proc check_effective_target_arm_v8_2a_i8mm_neon_hw { } {
5868 if { ![check_effective_target_arm_v8_2a_i8mm_ok] } {
5871 return [check_runtime arm_v8_2a_i8mm_neon_hw_available {
5872 #include "arm_neon.h"
5877 uint32x2_t results = {0,0};
5878 uint8x8_t a = {1,1,1,1,2,2,2,2};
5879 int8x8_t b = {2,2,2,2,3,3,3,3};
5881 #ifdef __ARM_ARCH_ISA_A64
5882 asm ("usdot %0.2s, %1.8b, %2.8b"
5885 : /* No clobbers. */);
5888 asm ("vusdot.u8 %P0, %P1, %P2"
5891 : /* No clobbers. */);
5894 return (vget_lane_u32 (results, 0) == 8
5895 && vget_lane_u32 (results, 1) == 24) ? 1 : 0;
5897 } [add_options_for_arm_v8_2a_i8mm ""]]
5900 # Return 1 if this is a ARM target with NEON enabled.
5902 proc check_effective_target_arm_neon { } {
5903 if { [check_effective_target_arm32] } {
5904 return [check_no_compiler_messages arm_neon object {
5905 #ifndef __ARM_NEON__
5916 proc check_effective_target_arm_neonv2 { } {
5917 if { [check_effective_target_arm32] } {
5918 return [check_no_compiler_messages arm_neon object {
5919 #ifndef __ARM_NEON__
5922 #ifndef __ARM_FEATURE_FMA
5934 # Return 1 if this is an ARM target with load acquire and store release
5935 # instructions for 8-, 16- and 32-bit types.
5937 proc check_effective_target_arm_acq_rel { } {
5938 return [check_no_compiler_messages arm_acq_rel object {
5940 load_acquire_store_release (void)
5942 asm ("lda r0, [r1]\n\t"
5948 : : : "r0", "memory");
5953 # Add the options needed for MIPS Paired-Single.
5955 proc add_options_for_mpaired_single { flags } {
5956 if { ! [check_effective_target_mpaired_single] } {
5959 return "$flags -mpaired-single"
5962 # Add the options needed for MIPS SIMD Architecture.
5964 proc add_options_for_mips_msa { flags } {
5965 if { ! [check_effective_target_mips_msa] } {
5968 return "$flags -mmsa"
5971 # Add the options needed for MIPS Loongson MMI Architecture.
5973 proc add_options_for_mips_loongson_mmi { flags } {
5974 if { ! [check_effective_target_mips_loongson_mmi] } {
5977 return "$flags -mloongson-mmi"
5981 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
5982 # the Loongson vector modes.
5984 proc check_effective_target_mips_loongson_mmi { } {
5985 return [check_no_compiler_messages loongson assembly {
5986 #if !defined(__mips_loongson_mmi)
5987 #error !__mips_loongson_mmi
5989 #if !defined(__mips_loongson_vector_rev)
5990 #error !__mips_loongson_vector_rev
5995 # Return 1 if this is a MIPS target that supports the legacy NAN.
5997 proc check_effective_target_mips_nanlegacy { } {
5998 return [check_no_compiler_messages nanlegacy assembly {
6000 int main () { return 0; }
6004 # Return 1 if an MSA program can be compiled to object
6006 proc check_effective_target_mips_msa { } {
6007 if ![check_effective_target_nomips16] {
6010 return [check_no_compiler_messages msa object {
6011 #if !defined(__mips_msa)
6012 #error "MSA NOT AVAIL"
6014 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
6015 #error "MSA NOT AVAIL FOR ISA REV < 2"
6017 #if !defined(__mips_hard_float)
6018 #error "MSA HARD_FLOAT REQUIRED"
6020 #if __mips_fpr != 64
6021 #error "MSA 64-bit FPR REQUIRED"
6027 v8i16 v = __builtin_msa_ldi_h (1);
6035 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
6038 proc check_effective_target_arm_eabi { } {
6039 return [check_no_compiler_messages arm_eabi object {
6040 #ifndef __ARM_EABI__
6048 # Return 1 if this is an ARM target that adheres to the hard-float variant of
6049 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
6051 proc check_effective_target_arm_hf_eabi { } {
6052 return [check_no_compiler_messages arm_hf_eabi object {
6053 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
6054 #error not hard-float EABI
6061 # Return 1 if this is an ARM target uses emulated floating point
6064 proc check_effective_target_arm_softfloat { } {
6065 return [check_no_compiler_messages arm_softfloat object {
6066 #if !defined(__SOFTFP__)
6067 #error not soft-float EABI
6074 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
6075 # Some multilibs may be incompatible with this option.
6077 proc check_effective_target_arm_iwmmxt_ok { } {
6078 if { [check_effective_target_arm32] } {
6079 return [check_no_compiler_messages arm_iwmmxt_ok object {
6087 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
6088 # for an ARM target.
6089 proc check_effective_target_arm_prefer_ldrd_strd { } {
6090 if { ![check_effective_target_arm32] } {
6094 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
6095 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
6099 # Return true if LDRD/STRD instructions are available on this target.
6100 proc check_effective_target_arm_ldrd_strd_ok { } {
6101 if { ![check_effective_target_arm32] } {
6105 return [check_no_compiler_messages arm_ldrd_strd_ok object {
6108 __UINT64_TYPE__ a = 1, b = 10;
6109 __UINT64_TYPE__ *c = &b;
6110 // `a` will be in a valid register since it's a DImode quantity.
6119 # Return 1 if this is a PowerPC target supporting -meabi.
6121 proc check_effective_target_powerpc_eabi_ok { } {
6122 if { [istarget powerpc*-*-*] } {
6123 return [check_no_compiler_messages powerpc_eabi_ok object {
6131 # Return 1 if this is a PowerPC target with floating-point registers.
6133 proc check_effective_target_powerpc_fprs { } {
6134 if { [istarget powerpc*-*-*]
6135 || [istarget rs6000-*-*] } {
6136 return [check_no_compiler_messages powerpc_fprs object {
6148 # Return 1 if this is a PowerPC target with hardware double-precision
6151 proc check_effective_target_powerpc_hard_double { } {
6152 if { [istarget powerpc*-*-*]
6153 || [istarget rs6000-*-*] } {
6154 return [check_no_compiler_messages powerpc_hard_double object {
6166 # Return 1 if this is a PowerPC target with hardware floating point sqrt.
6168 proc check_effective_target_powerpc_sqrt { } {
6169 # We need to be PowerPC, and we need to have hardware fp enabled.
6170 if {![check_effective_target_powerpc_fprs]} {
6174 return [check_no_compiler_messages powerpc_sqrt object {
6176 #error _ARCH_PPCSQ is not defined
6181 # Return 1 if this is a PowerPC target supporting -maltivec.
6183 proc check_effective_target_powerpc_altivec_ok { } {
6184 if { ([istarget powerpc*-*-*]
6185 && ![istarget powerpc-*-linux*paired*])
6186 || [istarget rs6000-*-*] } {
6187 # AltiVec is not supported on AIX before 5.3.
6188 if { [istarget powerpc*-*-aix4*]
6189 || [istarget powerpc*-*-aix5.1*]
6190 || [istarget powerpc*-*-aix5.2*] } {
6193 return [check_no_compiler_messages powerpc_altivec_ok object {
6201 # Return 1 if this is a PowerPC target supporting -mpower8-vector
6203 proc check_effective_target_powerpc_p8vector_ok { } {
6204 if { ([istarget powerpc*-*-*]
6205 && ![istarget powerpc-*-linux*paired*])
6206 || [istarget rs6000-*-*] } {
6207 # AltiVec is not supported on AIX before 5.3.
6208 if { [istarget powerpc*-*-aix4*]
6209 || [istarget powerpc*-*-aix5.1*]
6210 || [istarget powerpc*-*-aix5.2*] } {
6213 # Darwin doesn't run on power8, so far.
6214 if { [istarget *-*-darwin*] } {
6217 return [check_no_compiler_messages powerpc_p8vector_ok object {
6219 asm volatile ("xxlorc 0,0,0");
6222 } "-mpower8-vector"]
6228 # Return 1 if this is a PowerPC target supporting -mpower9-vector
6230 proc check_effective_target_powerpc_p9vector_ok { } {
6231 if { ([istarget powerpc*-*-*]
6232 && ![istarget powerpc-*-linux*paired*])
6233 || [istarget rs6000-*-*] } {
6234 # AltiVec is not supported on AIX before 5.3.
6235 if { [istarget powerpc*-*-aix4*]
6236 || [istarget powerpc*-*-aix5.1*]
6237 || [istarget powerpc*-*-aix5.2*] } {
6240 # Darwin doesn't run on power9, so far.
6241 if { [istarget *-*-darwin*] } {
6244 return [check_no_compiler_messages powerpc_p9vector_ok object {
6247 vector double v = (vector double) { 0.0, 0.0 };
6248 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
6251 } "-mpower9-vector"]
6257 # Return 1 if this is a PowerPC target supporting -mmodulo
6259 proc check_effective_target_powerpc_p9modulo_ok { } {
6260 if { ([istarget powerpc*-*-*]
6261 && ![istarget powerpc-*-linux*paired*])
6262 || [istarget rs6000-*-*] } {
6263 # AltiVec is not supported on AIX before 5.3.
6264 if { [istarget powerpc*-*-aix4*]
6265 || [istarget powerpc*-*-aix5.1*]
6266 || [istarget powerpc*-*-aix5.2*] } {
6269 return [check_no_compiler_messages powerpc_p9modulo_ok object {
6271 int i = 5, j = 3, r = -1;
6272 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
6281 # return 1 if our compiler returns the ARCH_PWR defines with the options
6282 # as provided by the test.
6283 proc check_effective_target_has_arch_pwr5 { } {
6284 return [check_no_compiler_messages arch_pwr5 assembly {
6286 #error does not have power5 support.
6288 /* "has power5 support" */
6293 proc check_effective_target_has_arch_pwr6 { } {
6294 return [check_no_compiler_messages arch_pwr6 assembly {
6296 #error does not have power6 support.
6298 /* "has power6 support" */
6303 proc check_effective_target_has_arch_pwr7 { } {
6304 return [check_no_compiler_messages arch_pwr7 assembly {
6306 #error does not have power7 support.
6308 /* "has power7 support" */
6313 proc check_effective_target_has_arch_pwr8 { } {
6314 return [check_no_compiler_messages arch_pwr8 assembly {
6316 #error does not have power8 support.
6318 /* "has power8 support" */
6323 proc check_effective_target_has_arch_pwr9 { } {
6324 return [check_no_compiler_messages arch_pwr9 assembly {
6326 #error does not have power9 support.
6328 /* "has power9 support" */
6333 proc check_effective_target_has_arch_pwr10 { } {
6334 return [check_no_compiler_messages arch_pwr10 assembly {
6336 #error does not have power10 support.
6338 /* "has power10 support" */
6343 # Return 1 if this is a PowerPC target supporting -mcpu=power10.
6344 # Limit this to 64-bit linux systems for now until other targets support
6347 proc check_effective_target_power10_ok { } {
6348 if { ([istarget powerpc64*-*-linux*]) } {
6349 return [check_no_compiler_messages power10_ok object {
6352 asm ("pli %0,%1" : "=r" (e) : "n" (0x12345));
6361 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
6362 # software emulation on power7/power8 systems or hardware support on power9.
6364 proc check_effective_target_powerpc_float128_sw_ok { } {
6365 if { ([istarget powerpc*-*-*]
6366 && ![istarget powerpc-*-linux*paired*])
6367 || [istarget rs6000-*-*] } {
6368 # AltiVec is not supported on AIX before 5.3.
6369 if { [istarget powerpc*-*-aix4*]
6370 || [istarget powerpc*-*-aix5.1*]
6371 || [istarget powerpc*-*-aix5.2*] } {
6374 # Darwin doesn't have VSX, so no soft support for float128.
6375 if { [istarget *-*-darwin*] } {
6378 return [check_no_compiler_messages powerpc_float128_sw_ok object {
6379 volatile __float128 x = 1.0q;
6380 volatile __float128 y = 2.0q;
6382 __float128 z = x + y;
6385 } "-mfloat128 -mvsx"]
6391 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
6392 # support on power9.
6394 proc check_effective_target_powerpc_float128_hw_ok { } {
6395 if { ([istarget powerpc*-*-*]
6396 && ![istarget powerpc-*-linux*paired*])
6397 || [istarget rs6000-*-*] } {
6398 # AltiVec is not supported on AIX before 5.3.
6399 if { [istarget powerpc*-*-aix4*]
6400 || [istarget powerpc*-*-aix5.1*]
6401 || [istarget powerpc*-*-aix5.2*] } {
6404 # Darwin doesn't run on any machine with float128 h/w so far.
6405 if { [istarget *-*-darwin*] } {
6408 return [check_no_compiler_messages powerpc_float128_hw_ok object {
6409 volatile __float128 x = 1.0q;
6410 volatile __float128 y = 2.0q;
6413 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
6416 } "-mfloat128-hardware"]
6422 # Return 1 if current options define float128, 0 otherwise.
6424 proc check_effective_target_ppc_float128 { } {
6425 return [check_no_compiler_messages_nocache ppc_float128 object {
6426 #ifndef __FLOAT128__
6432 # Return 1 if current options generate float128 insns, 0 otherwise.
6434 proc check_effective_target_ppc_float128_insns { } {
6435 return [check_no_compiler_messages_nocache ppc_float128 object {
6436 #ifndef __FLOAT128_HARDWARE__
6442 # Return 1 if current options generate VSX instructions, 0 otherwise.
6444 proc check_effective_target_powerpc_vsx { } {
6445 return [check_no_compiler_messages_nocache powerpc_vsx object {
6452 # Return 1 if this is a PowerPC target supporting -mvsx
6454 proc check_effective_target_powerpc_vsx_ok { } {
6455 if { ([istarget powerpc*-*-*]
6456 && ![istarget powerpc-*-linux*paired*])
6457 || [istarget rs6000-*-*] } {
6458 # VSX is not supported on AIX before 7.1.
6459 if { [istarget powerpc*-*-aix4*]
6460 || [istarget powerpc*-*-aix5*]
6461 || [istarget powerpc*-*-aix6*] } {
6464 # Darwin doesn't have VSX, even if it's used with an assembler
6465 #Â which recognises the insns.
6466 if { [istarget *-*-darwin*] } {
6469 return [check_no_compiler_messages powerpc_vsx_ok object {
6471 asm volatile ("xxlor 0,0,0");
6480 # Return 1 if this is a PowerPC target supporting -mhtm
6482 proc check_effective_target_powerpc_htm_ok { } {
6483 if { ([istarget powerpc*-*-*]
6484 && ![istarget powerpc-*-linux*paired*])
6485 || [istarget rs6000-*-*] } {
6486 # HTM is not supported on AIX yet.
6487 if { [istarget powerpc*-*-aix*] } {
6490 return [check_no_compiler_messages powerpc_htm_ok object {
6492 asm volatile ("tbegin. 0");
6501 # Return 1 if the target supports executing HTM hardware instructions,
6502 # 0 otherwise. Cache the result.
6504 proc check_htm_hw_available { } {
6505 return [check_cached_effective_target htm_hw_available {
6506 # For now, disable on Darwin
6507 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
6510 check_runtime_nocache htm_hw_available {
6520 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
6522 proc check_effective_target_powerpc_ppu_ok { } {
6523 if [check_effective_target_powerpc_altivec_ok] {
6524 return [check_no_compiler_messages cell_asm_available object {
6527 asm volatile ("lvlx v0,v0,v0");
6529 asm volatile ("lvlx 0,0,0");
6539 # Return 1 if this is a PowerPC target that supports SPU.
6541 proc check_effective_target_powerpc_spu { } {
6542 if { [istarget powerpc*-*-linux*] } {
6543 return [check_effective_target_powerpc_altivec_ok]
6549 # Return 1 if this is a PowerPC SPE target. The check includes options
6550 # specified by dg-options for this test, so don't cache the result.
6552 proc check_effective_target_powerpc_spe_nocache { } {
6553 if { [istarget powerpc*-*-*] } {
6554 return [check_no_compiler_messages_nocache powerpc_spe object {
6560 } [current_compiler_flags]]
6566 # Return 1 if this is a PowerPC target with SPE enabled.
6568 proc check_effective_target_powerpc_spe { } {
6569 if { [istarget powerpc*-*-*] } {
6570 return [check_no_compiler_messages powerpc_spe object {
6582 # Return 1 if this is a PowerPC target with Altivec enabled.
6584 proc check_effective_target_powerpc_altivec { } {
6585 if { [istarget powerpc*-*-*] } {
6586 return [check_no_compiler_messages powerpc_altivec object {
6598 # Return 1 if this is a PowerPC 405 target. The check includes options
6599 # specified by dg-options for this test, so don't cache the result.
6601 proc check_effective_target_powerpc_405_nocache { } {
6602 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
6603 return [check_no_compiler_messages_nocache powerpc_405 object {
6609 } [current_compiler_flags]]
6615 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
6617 proc check_effective_target_powerpc_elfv2 { } {
6618 if { [istarget powerpc*-*-*] } {
6619 return [check_no_compiler_messages powerpc_elfv2 object {
6621 #error not ELF v2 ABI
6631 # Return 1 if this is a PowerPC target supporting -mrop-protect
6633 proc check_effective_target_rop_ok { } {
6634 return [check_effective_target_power10_ok] && [check_effective_target_powerpc_elfv2]
6637 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
6638 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
6639 # test environment appears to run executables on such a simulator.
6641 proc check_effective_target_ultrasparc_hw { } {
6642 return [check_runtime ultrasparc_hw {
6643 int main() { return 0; }
6644 } "-mcpu=ultrasparc"]
6647 # Return 1 if the test environment supports executing UltraSPARC VIS2
6648 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
6650 proc check_effective_target_ultrasparc_vis2_hw { } {
6651 return [check_runtime ultrasparc_vis2_hw {
6652 int main() { __asm__(".word 0x81b00320"); return 0; }
6653 } "-mcpu=ultrasparc3"]
6656 # Return 1 if the test environment supports executing UltraSPARC VIS3
6657 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
6659 proc check_effective_target_ultrasparc_vis3_hw { } {
6660 return [check_runtime ultrasparc_vis3_hw {
6661 int main() { __asm__(".word 0x81b00220"); return 0; }
6665 # Return 1 if this is a SPARC-V9 target.
6667 proc check_effective_target_sparc_v9 { } {
6668 if { [istarget sparc*-*-*] } {
6669 return [check_no_compiler_messages sparc_v9 object {
6671 asm volatile ("return %i7+8");
6680 # Return 1 if this is a SPARC target with VIS enabled.
6682 proc check_effective_target_sparc_vis { } {
6683 if { [istarget sparc*-*-*] } {
6684 return [check_no_compiler_messages sparc_vis object {
6696 # Return 1 if the target supports hardware vector shift operation.
6698 proc check_effective_target_vect_shift { } {
6699 return [check_cached_effective_target_indexed vect_shift {
6700 expr {([istarget powerpc*-*-*]
6701 && ![istarget powerpc-*-linux*paired*])
6702 || [istarget ia64-*-*]
6703 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6704 || [istarget aarch64*-*-*]
6705 || [is-effective-target arm_neon]
6706 || ([istarget mips*-*-*]
6707 && ([et-is-effective-target mips_msa]
6708 || [et-is-effective-target mips_loongson_mmi]))
6709 || ([istarget s390*-*-*]
6710 && [check_effective_target_s390_vx])
6711 || [istarget amdgcn-*-*] }}]
6714 # Return 1 if the target supports hardware vector shift by register operation.
6716 proc check_effective_target_vect_var_shift { } {
6717 return [check_cached_effective_target_indexed vect_var_shift {
6718 expr {(([istarget i?86-*-*] || [istarget x86_64-*-*])
6719 && [check_avx2_available])
6723 proc check_effective_target_whole_vector_shift { } {
6724 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6725 || [istarget ia64-*-*]
6726 || [istarget aarch64*-*-*]
6727 || [istarget powerpc64*-*-*]
6728 || ([is-effective-target arm_neon]
6729 && [check_effective_target_arm_little_endian])
6730 || ([istarget mips*-*-*]
6731 && [et-is-effective-target mips_loongson_mmi])
6732 || ([istarget s390*-*-*]
6733 && [check_effective_target_s390_vx])
6734 || [istarget amdgcn-*-*] } {
6740 verbose "check_effective_target_vect_long: returning $answer" 2
6744 # Return 1 if the target supports vector bswap operations.
6746 proc check_effective_target_vect_bswap { } {
6747 return [check_cached_effective_target_indexed vect_bswap {
6748 expr { [istarget aarch64*-*-*]
6749 || [is-effective-target arm_neon]
6750 || [istarget amdgcn-*-*] }}]
6753 # Return 1 if the target supports comparison of bool vectors for at
6754 # least one vector length.
6756 proc check_effective_target_vect_bool_cmp { } {
6757 return [check_cached_effective_target_indexed vect_bool_cmp {
6758 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6759 || [istarget aarch64*-*-*]
6760 || [is-effective-target arm_neon] }}]
6763 # Return 1 if the target supports addition of char vectors for at least
6764 # one vector length.
6766 proc check_effective_target_vect_char_add { } {
6767 return [check_cached_effective_target_indexed vect_char_add {
6769 [istarget i?86-*-*] || [istarget x86_64-*-*]
6770 || ([istarget powerpc*-*-*]
6771 && ![istarget powerpc-*-linux*paired*])
6772 || [istarget amdgcn-*-*]
6773 || [istarget ia64-*-*]
6774 || [istarget aarch64*-*-*]
6775 || [is-effective-target arm_neon]
6776 || ([istarget mips*-*-*]
6777 && ([et-is-effective-target mips_loongson_mmi]
6778 || [et-is-effective-target mips_msa]))
6779 || ([istarget s390*-*-*]
6780 && [check_effective_target_s390_vx])
6784 # Return 1 if the target supports hardware vector shift operation for char.
6786 proc check_effective_target_vect_shift_char { } {
6787 return [check_cached_effective_target_indexed vect_shift_char {
6788 expr { ([istarget powerpc*-*-*]
6789 && ![istarget powerpc-*-linux*paired*])
6790 || [is-effective-target arm_neon]
6791 || ([istarget mips*-*-*]
6792 && [et-is-effective-target mips_msa])
6793 || ([istarget s390*-*-*]
6794 && [check_effective_target_s390_vx])
6795 || [istarget amdgcn-*-*] }}]
6798 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
6800 # This can change for different subtargets so do not cache the result.
6802 proc check_effective_target_vect_long { } {
6803 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6804 || (([istarget powerpc*-*-*]
6805 && ![istarget powerpc-*-linux*paired*])
6806 && [check_effective_target_ilp32])
6807 || [is-effective-target arm_neon]
6808 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6809 || [istarget aarch64*-*-*]
6810 || ([istarget mips*-*-*]
6811 && [et-is-effective-target mips_msa])
6812 || ([istarget s390*-*-*]
6813 && [check_effective_target_s390_vx])
6814 || [istarget amdgcn-*-*] } {
6820 verbose "check_effective_target_vect_long: returning $answer" 2
6824 # Return 1 if the target supports hardware vectors of float when
6825 # -funsafe-math-optimizations is enabled, 0 otherwise.
6827 # This won't change for different subtargets so cache the result.
6829 proc check_effective_target_vect_float { } {
6830 return [check_cached_effective_target_indexed vect_float {
6831 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6832 || [istarget powerpc*-*-*]
6833 || [istarget mips-sde-elf]
6834 || [istarget mipsisa64*-*-*]
6835 || [istarget ia64-*-*]
6836 || [istarget aarch64*-*-*]
6837 || ([istarget mips*-*-*]
6838 && [et-is-effective-target mips_msa])
6839 || [is-effective-target arm_neon]
6840 || ([istarget s390*-*-*]
6841 && [check_effective_target_s390_vxe])
6842 || [istarget amdgcn-*-*] }}]
6845 # Return 1 if the target supports hardware vectors of float without
6846 # -funsafe-math-optimizations being enabled, 0 otherwise.
6848 proc check_effective_target_vect_float_strict { } {
6849 return [expr { [check_effective_target_vect_float]
6850 && ![istarget arm*-*-*] }]
6853 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
6855 # This won't change for different subtargets so cache the result.
6857 proc check_effective_target_vect_double { } {
6858 return [check_cached_effective_target_indexed vect_double {
6859 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6860 && [check_no_compiler_messages vect_double assembly {
6861 #ifdef __tune_atom__
6862 # error No double vectorizer support.
6865 || [istarget aarch64*-*-*]
6866 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
6867 || ([istarget mips*-*-*]
6868 && [et-is-effective-target mips_msa])
6869 || ([istarget s390*-*-*]
6870 && [check_effective_target_s390_vx])
6871 || [istarget amdgcn-*-*]} }]
6874 # Return 1 if the target supports conditional addition, subtraction,
6875 # multiplication, division, minimum and maximum on vectors of double,
6876 # via the cond_ optabs. Return 0 otherwise.
6878 proc check_effective_target_vect_double_cond_arith { } {
6879 return [check_effective_target_aarch64_sve]
6882 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
6884 # This won't change for different subtargets so cache the result.
6886 proc check_effective_target_vect_long_long { } {
6887 return [check_cached_effective_target_indexed vect_long_long {
6888 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6889 || ([istarget mips*-*-*]
6890 && [et-is-effective-target mips_msa])
6891 || ([istarget s390*-*-*]
6892 && [check_effective_target_s390_vx]) }}]
6896 # Return 1 if the target plus current options does not support a vector
6897 # max instruction on "int", 0 otherwise.
6899 # This won't change for different subtargets so cache the result.
6901 proc check_effective_target_vect_no_int_min_max { } {
6902 return [check_cached_effective_target_indexed vect_no_int_min_max {
6903 expr { [istarget sparc*-*-*]
6904 || [istarget alpha*-*-*]
6905 || ([istarget mips*-*-*]
6906 && [et-is-effective-target mips_loongson_mmi]) }}]
6909 # Return 1 if the target plus current options does not support a vector
6910 # add instruction on "int", 0 otherwise.
6912 # This won't change for different subtargets so cache the result.
6914 proc check_effective_target_vect_no_int_add { } {
6915 # Alpha only supports vector add on V8QI and V4HI.
6916 return [check_cached_effective_target_indexed vect_no_int_add {
6917 expr { [istarget alpha*-*-*] }}]
6920 # Return 1 if the target plus current options does not support vector
6921 # bitwise instructions, 0 otherwise.
6923 # This won't change for different subtargets so cache the result.
6925 proc check_effective_target_vect_no_bitwise { } {
6926 return [check_cached_effective_target_indexed vect_no_bitwise { return 0 }]
6929 # Return 1 if the target plus current options supports vector permutation,
6932 # This won't change for different subtargets so cache the result.
6934 proc check_effective_target_vect_perm { } {
6935 return [check_cached_effective_target_indexed vect_perm {
6936 expr { [is-effective-target arm_neon]
6937 || [istarget aarch64*-*-*]
6938 || [istarget powerpc*-*-*]
6939 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6940 || ([istarget mips*-*-*]
6941 && ([et-is-effective-target mpaired_single]
6942 || [et-is-effective-target mips_msa]))
6943 || ([istarget s390*-*-*]
6944 && [check_effective_target_s390_vx])
6945 || [istarget amdgcn-*-*] }}]
6948 # Return 1 if, for some VF:
6950 # - the target's default vector size is VF * ELEMENT_BITS bits
6952 # - it is possible to implement the equivalent of:
6954 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
6955 # for (int i = 0; i < COUNT; ++i)
6956 # for (int j = 0; j < COUNT * VF; ++j)
6957 # s1[i][j] = s2[j - j % COUNT + i]
6959 # using only a single 2-vector permute for each vector in s1.
6961 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
6963 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
6964 # ------+-------------+-------------+------------
6965 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
6966 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
6967 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
6969 # Each s1 permute requires only two of a, b and c.
6971 # The distance between the start of vector n in s1[0] and the start
6972 # of vector n in s2 is:
6974 # A = (n * VF) % COUNT
6976 # The corresponding value for the end of vector n is:
6978 # B = (n * VF + VF - 1) % COUNT
6980 # Subtracting i from each value gives the corresponding difference
6981 # for s1[i]. The condition being tested by this function is false
6982 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
6983 # element for s1[i] comes from vector n - 1 of s2 and the last element
6984 # comes from vector n + 1 of s2. The condition is therefore true iff
6985 # A <= B for all n. This is turn means the condition is true iff:
6987 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
6989 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
6990 # and will be that value for at least one n in [0, COUNT), so we want:
6992 # (VF - 1) % COUNT < gcd (VF, COUNT)
6994 proc vect_perm_supported { count element_bits } {
6995 set vector_bits [lindex [available_vector_sizes] 0]
6996 # The number of vectors has to be a power of 2 when permuting
6997 # variable-length vectors.
6998 if { $vector_bits <= 0 && ($count & -$count) != $count } {
7001 set vf [expr { $vector_bits / $element_bits }]
7003 # Compute gcd (VF, COUNT).
7006 while { $temp1 > 0 } {
7007 set temp2 [expr { $gcd % $temp1 }]
7011 return [expr { ($vf - 1) % $count < $gcd }]
7014 # Return 1 if the target supports SLP permutation of 3 vectors when each
7015 # element has 32 bits.
7017 proc check_effective_target_vect_perm3_int { } {
7018 return [expr { [check_effective_target_vect_perm]
7019 && [vect_perm_supported 3 32] }]
7022 # Return 1 if the target plus current options supports vector permutation
7023 # on byte-sized elements, 0 otherwise.
7025 # This won't change for different subtargets so cache the result.
7027 proc check_effective_target_vect_perm_byte { } {
7028 return [check_cached_effective_target_indexed vect_perm_byte {
7029 expr { ([is-effective-target arm_neon]
7030 && [is-effective-target arm_little_endian])
7031 || ([istarget aarch64*-*-*]
7032 && [is-effective-target aarch64_little_endian])
7033 || [istarget powerpc*-*-*]
7034 || ([istarget mips-*.*]
7035 && [et-is-effective-target mips_msa])
7036 || ([istarget s390*-*-*]
7037 && [check_effective_target_s390_vx])
7038 || [istarget amdgcn-*-*] }}]
7041 # Return 1 if the target supports SLP permutation of 3 vectors when each
7042 # element has 8 bits.
7044 proc check_effective_target_vect_perm3_byte { } {
7045 return [expr { [check_effective_target_vect_perm_byte]
7046 && [vect_perm_supported 3 8] }]
7049 # Return 1 if the target plus current options supports vector permutation
7050 # on short-sized elements, 0 otherwise.
7052 # This won't change for different subtargets so cache the result.
7054 proc check_effective_target_vect_perm_short { } {
7055 return [check_cached_effective_target_indexed vect_perm_short {
7056 expr { ([is-effective-target arm_neon]
7057 && [is-effective-target arm_little_endian])
7058 || ([istarget aarch64*-*-*]
7059 && [is-effective-target aarch64_little_endian])
7060 || [istarget powerpc*-*-*]
7061 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
7062 && [check_ssse3_available])
7063 || ([istarget mips*-*-*]
7064 && [et-is-effective-target mips_msa])
7065 || ([istarget s390*-*-*]
7066 && [check_effective_target_s390_vx])
7067 || [istarget amdgcn-*-*] }}]
7070 # Return 1 if the target supports SLP permutation of 3 vectors when each
7071 # element has 16 bits.
7073 proc check_effective_target_vect_perm3_short { } {
7074 return [expr { [check_effective_target_vect_perm_short]
7075 && [vect_perm_supported 3 16] }]
7078 # Return 1 if the target plus current options supports folding of
7079 # copysign into XORSIGN.
7081 # This won't change for different subtargets so cache the result.
7083 proc check_effective_target_xorsign { } {
7084 return [check_cached_effective_target_indexed xorsign {
7085 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7086 || [istarget aarch64*-*-*] || [istarget arm*-*-*] }}]
7089 # Return 1 if the target plus current options supports a vector
7090 # widening summation of *short* args into *int* result, 0 otherwise.
7092 # This won't change for different subtargets so cache the result.
7094 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
7095 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si_pattern {
7096 expr { [istarget powerpc*-*-*]
7097 || ([istarget aarch64*-*-*]
7098 && ![check_effective_target_aarch64_sve])
7099 || [is-effective-target arm_neon]
7100 || [istarget ia64-*-*] }}]
7103 # Return 1 if the target plus current options supports a vector
7104 # widening summation of *short* args into *int* result, 0 otherwise.
7105 # A target can also support this widening summation if it can support
7106 # promotion (unpacking) from shorts to ints.
7108 # This won't change for different subtargets so cache the result.
7110 proc check_effective_target_vect_widen_sum_hi_to_si { } {
7111 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si {
7112 expr { [check_effective_target_vect_unpack]
7113 || [istarget powerpc*-*-*]
7114 || [istarget ia64-*-*] }}]
7117 # Return 1 if the target plus current options supports a vector
7118 # widening summation of *char* args into *short* result, 0 otherwise.
7119 # A target can also support this widening summation if it can support
7120 # promotion (unpacking) from chars to shorts.
7122 # This won't change for different subtargets so cache the result.
7124 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
7125 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_hi {
7126 expr { [check_effective_target_vect_unpack]
7127 || [is-effective-target arm_neon]
7128 || [istarget ia64-*-*] }}]
7131 # Return 1 if the target plus current options supports a vector
7132 # widening summation of *char* args into *int* result, 0 otherwise.
7134 # This won't change for different subtargets so cache the result.
7136 proc check_effective_target_vect_widen_sum_qi_to_si { } {
7137 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_si {
7138 expr { [istarget powerpc*-*-*] }}]
7141 # Return 1 if the target plus current options supports a vector
7142 # widening multiplication of *char* args into *short* result, 0 otherwise.
7143 # A target can also support this widening multplication if it can support
7144 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
7145 # multiplication of shorts).
7147 # This won't change for different subtargets so cache the result.
7150 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
7151 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi {
7152 expr { ([check_effective_target_vect_unpack]
7153 && [check_effective_target_vect_short_mult])
7154 || ([istarget powerpc*-*-*]
7155 || ([istarget aarch64*-*-*]
7156 && ![check_effective_target_aarch64_sve])
7157 || [is-effective-target arm_neon]
7158 || ([istarget s390*-*-*]
7159 && [check_effective_target_s390_vx]))
7160 || [istarget amdgcn-*-*] }}]
7163 # Return 1 if the target plus current options supports a vector
7164 # widening multiplication of *short* args into *int* result, 0 otherwise.
7165 # A target can also support this widening multplication if it can support
7166 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
7167 # multiplication of ints).
7169 # This won't change for different subtargets so cache the result.
7172 proc check_effective_target_vect_widen_mult_hi_to_si { } {
7173 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si {
7174 expr { ([check_effective_target_vect_unpack]
7175 && [check_effective_target_vect_int_mult])
7176 || ([istarget powerpc*-*-*]
7177 || [istarget ia64-*-*]
7178 || ([istarget aarch64*-*-*]
7179 && ![check_effective_target_aarch64_sve])
7180 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7181 || [is-effective-target arm_neon]
7182 || ([istarget s390*-*-*]
7183 && [check_effective_target_s390_vx]))
7184 || [istarget amdgcn-*-*] }}]
7187 # Return 1 if the target plus current options supports a vector
7188 # widening multiplication of *char* args into *short* result, 0 otherwise.
7190 # This won't change for different subtargets so cache the result.
7192 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
7193 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi_pattern {
7194 expr { [istarget powerpc*-*-*]
7195 || ([is-effective-target arm_neon]
7196 && [check_effective_target_arm_little_endian])
7197 || ([istarget s390*-*-*]
7198 && [check_effective_target_s390_vx])
7199 || [istarget amdgcn-*-*] }}]
7202 # Return 1 if the target plus current options supports a vector
7203 # widening multiplication of *short* args into *int* result, 0 otherwise.
7205 # This won't change for different subtargets so cache the result.
7207 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
7208 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si_pattern {
7209 expr { [istarget powerpc*-*-*]
7210 || [istarget ia64-*-*]
7211 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7212 || ([is-effective-target arm_neon]
7213 && [check_effective_target_arm_little_endian])
7214 || ([istarget s390*-*-*]
7215 && [check_effective_target_s390_vx])
7216 || [istarget amdgcn-*-*] }}]
7219 # Return 1 if the target plus current options supports a vector
7220 # widening multiplication of *int* args into *long* result, 0 otherwise.
7222 # This won't change for different subtargets so cache the result.
7224 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
7225 return [check_cached_effective_target_indexed vect_widen_mult_si_to_di_pattern {
7226 expr { [istarget ia64-*-*]
7227 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7228 || ([istarget s390*-*-*]
7229 && [check_effective_target_s390_vx]) }}]
7232 # Return 1 if the target plus current options supports a vector
7233 # widening shift, 0 otherwise.
7235 # This won't change for different subtargets so cache the result.
7237 proc check_effective_target_vect_widen_shift { } {
7238 return [check_cached_effective_target_indexed vect_widen_shift {
7239 expr { [is-effective-target arm_neon] }}]
7242 # Return 1 if the target plus current options supports a vector
7243 # dot-product of signed chars, 0 otherwise.
7245 # This won't change for different subtargets so cache the result.
7247 proc check_effective_target_vect_sdot_qi { } {
7248 return [check_cached_effective_target_indexed vect_sdot_qi {
7249 expr { [istarget ia64-*-*]
7250 || [istarget aarch64*-*-*]
7251 || [istarget arm*-*-*]
7252 || ([istarget mips*-*-*]
7253 && [et-is-effective-target mips_msa]) }}]
7256 # Return 1 if the target plus current options supports a vector
7257 # dot-product of unsigned chars, 0 otherwise.
7259 # This won't change for different subtargets so cache the result.
7261 proc check_effective_target_vect_udot_qi { } {
7262 return [check_cached_effective_target_indexed vect_udot_qi {
7263 expr { [istarget powerpc*-*-*]
7264 || [istarget aarch64*-*-*]
7265 || [istarget arm*-*-*]
7266 || [istarget ia64-*-*]
7267 || ([istarget mips*-*-*]
7268 && [et-is-effective-target mips_msa]) }}]
7271 # Return 1 if the target plus current options supports a vector
7272 # dot-product where one operand of the multiply is signed char
7273 # and the other unsigned chars, 0 otherwise.
7275 # This won't change for different subtargets so cache the result.
7277 proc check_effective_target_vect_usdot_qi { } {
7278 return [check_cached_effective_target_indexed vect_usdot_qi {
7279 expr { [istarget aarch64*-*-*]
7280 || [istarget arm*-*-*] }}]
7284 # Return 1 if the target plus current options supports a vector
7285 # dot-product of signed shorts, 0 otherwise.
7287 # This won't change for different subtargets so cache the result.
7289 proc check_effective_target_vect_sdot_hi { } {
7290 return [check_cached_effective_target_indexed vect_sdot_hi {
7291 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7292 || [istarget ia64-*-*]
7293 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7294 || ([istarget mips*-*-*]
7295 && [et-is-effective-target mips_msa]) }}]
7298 # Return 1 if the target plus current options supports a vector
7299 # dot-product of unsigned shorts, 0 otherwise.
7301 # This won't change for different subtargets so cache the result.
7303 proc check_effective_target_vect_udot_hi { } {
7304 return [check_cached_effective_target_indexed vect_udot_hi {
7305 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7306 || ([istarget mips*-*-*]
7307 && [et-is-effective-target mips_msa]) }}]
7310 # Return 1 if the target plus current options supports a vector
7311 # sad operation of unsigned chars, 0 otherwise.
7313 # This won't change for different subtargets so cache the result.
7315 proc check_effective_target_vect_usad_char { } {
7316 return [check_cached_effective_target_indexed vect_usad_char {
7317 expr { [istarget i?86-*-*]
7318 || [istarget x86_64-*-*]
7319 || ([istarget aarch64*-*-*]
7320 && ![check_effective_target_aarch64_sve])
7321 || ([istarget powerpc*-*-*]
7322 && [check_p9vector_hw_available])}}]
7325 # Return 1 if the target plus current options supports both signed
7326 # and unsigned average operations on vectors of bytes.
7328 proc check_effective_target_vect_avg_qi {} {
7329 return [expr { [istarget aarch64*-*-*]
7330 && ![check_effective_target_aarch64_sve1_only] }]
7333 # Return 1 if the target plus current options supports both signed
7334 # and unsigned multiply-high-with-round-and-scale operations
7335 # on vectors of half-words.
7337 proc check_effective_target_vect_mulhrs_hi {} {
7338 return [expr { [istarget aarch64*-*-*]
7339 && [check_effective_target_aarch64_sve2] }]
7342 # Return 1 if the target plus current options supports signed division
7343 # by power-of-2 operations on vectors of 4-byte integers.
7345 proc check_effective_target_vect_sdiv_pow2_si {} {
7346 return [expr { [istarget aarch64*-*-*]
7347 && [check_effective_target_aarch64_sve] }]
7350 # Return 1 if the target plus current options supports a vector
7351 # demotion (packing) of shorts (to chars) and ints (to shorts)
7352 # using modulo arithmetic, 0 otherwise.
7354 # This won't change for different subtargets so cache the result.
7356 proc check_effective_target_vect_pack_trunc { } {
7357 return [check_cached_effective_target_indexed vect_pack_trunc {
7358 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7359 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7360 || [istarget aarch64*-*-*]
7361 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
7362 && [check_effective_target_arm_little_endian])
7363 || ([istarget mips*-*-*]
7364 && [et-is-effective-target mips_msa])
7365 || ([istarget s390*-*-*]
7366 && [check_effective_target_s390_vx])
7367 || [istarget amdgcn*-*-*] }}]
7370 # Return 1 if the target plus current options supports a vector
7371 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
7373 # This won't change for different subtargets so cache the result.
7375 proc check_effective_target_vect_unpack { } {
7376 return [check_cached_effective_target_indexed vect_unpack {
7377 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
7378 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7379 || [istarget ia64-*-*]
7380 || [istarget aarch64*-*-*]
7381 || ([istarget mips*-*-*]
7382 && [et-is-effective-target mips_msa])
7383 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
7384 && [check_effective_target_arm_little_endian])
7385 || ([istarget s390*-*-*]
7386 && [check_effective_target_s390_vx])
7387 || [istarget amdgcn*-*-*] }}]
7390 # Return 1 if the target plus current options does not guarantee
7391 # that its STACK_BOUNDARY is >= the reguired vector alignment.
7393 # This won't change for different subtargets so cache the result.
7395 proc check_effective_target_unaligned_stack { } {
7396 return [check_cached_effective_target_indexed unaligned_stack { expr 0 }]
7399 # Return 1 if the target plus current options does not support a vector
7400 # alignment mechanism, 0 otherwise.
7402 # This won't change for different subtargets so cache the result.
7404 proc check_effective_target_vect_no_align { } {
7405 return [check_cached_effective_target_indexed vect_no_align {
7406 expr { [istarget mipsisa64*-*-*]
7407 || [istarget mips-sde-elf]
7408 || [istarget sparc*-*-*]
7409 || [istarget ia64-*-*]
7410 || [check_effective_target_arm_vect_no_misalign]
7411 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
7412 || ([istarget mips*-*-*]
7413 && [et-is-effective-target mips_loongson_mmi]) }}]
7416 # Return 1 if the target supports a vector misalign access, 0 otherwise.
7418 # This won't change for different subtargets so cache the result.
7420 proc check_effective_target_vect_hw_misalign { } {
7421 return [check_cached_effective_target_indexed vect_hw_misalign {
7422 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
7423 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
7424 || [istarget aarch64*-*-*]
7425 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
7426 || ([istarget s390*-*-*]
7427 && [check_effective_target_s390_vx]) } {
7430 if { [istarget arm*-*-*]
7431 && ![check_effective_target_arm_vect_no_misalign] } {
7439 # Return 1 if arrays are aligned to the vector alignment
7440 # boundary, 0 otherwise.
7442 proc check_effective_target_vect_aligned_arrays { } {
7443 set et_vect_aligned_arrays 0
7444 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
7445 && !([is-effective-target ia32]
7446 || ([check_avx_available] && ![check_prefer_avx128]))) } {
7447 set et_vect_aligned_arrays 1
7450 verbose "check_effective_target_vect_aligned_arrays:\
7451 returning $et_vect_aligned_arrays" 2
7452 return $et_vect_aligned_arrays
7455 # Return 1 if types of size 32 bit or less are naturally aligned
7456 # (aligned to their type-size), 0 otherwise.
7458 # This won't change for different subtargets so cache the result.
7460 proc check_effective_target_natural_alignment_32 { } {
7461 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
7462 # FIXME: m68k has -malign-int
7463 return [check_cached_effective_target_indexed natural_alignment_32 {
7464 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
7465 || [istarget avr-*-*]
7466 || [istarget m68k-*-linux*]
7467 || [istarget pru-*-*]
7468 || [istarget stormy16-*-*]
7469 || [istarget rl78-*-*]
7470 || [istarget pdp11-*-*]
7471 || [istarget msp430-*-*]
7472 || [istarget m32c-*-*]
7473 || [istarget cris-*-*] } {
7481 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
7482 # type-size), 0 otherwise.
7484 # This won't change for different subtargets so cache the result.
7486 proc check_effective_target_natural_alignment_64 { } {
7487 return [check_cached_effective_target_indexed natural_alignment_64 {
7488 expr { [is-effective-target natural_alignment_32]
7489 && [is-effective-target lp64] && ![istarget *-*-darwin*] }
7493 # Return 1 if all vector types are naturally aligned (aligned to their
7494 # type-size), 0 otherwise.
7496 proc check_effective_target_vect_natural_alignment { } {
7497 set et_vect_natural_alignment 1
7498 if { [check_effective_target_arm_eabi]
7499 || [istarget nvptx-*-*]
7500 || [istarget s390*-*-*]
7501 || [istarget amdgcn-*-*] } {
7502 set et_vect_natural_alignment 0
7504 verbose "check_effective_target_vect_natural_alignment:\
7505 returning $et_vect_natural_alignment" 2
7506 return $et_vect_natural_alignment
7509 # Return true if the target supports the check_raw_ptrs and check_war_ptrs
7510 # optabs on vectors.
7512 proc check_effective_target_vect_check_ptrs { } {
7513 return [check_effective_target_aarch64_sve2]
7516 # Return true if fully-masked loops are supported.
7518 proc check_effective_target_vect_fully_masked { } {
7519 return [expr { [check_effective_target_aarch64_sve]
7520 || [istarget amdgcn*-*-*] }]
7523 # Return true if the target supports the @code{len_load} and
7524 # @code{len_store} optabs.
7526 proc check_effective_target_vect_len_load_store { } {
7527 return [check_effective_target_has_arch_pwr9]
7530 # Return the value of parameter vect-partial-vector-usage specified for
7531 # target by checking the output of "-Q --help=params". Return zero if
7532 # the desirable pattern isn't found.
7534 proc check_vect_partial_vector_usage { } {
7537 return [check_cached_effective_target vect_partial_vector_usage {
7538 set result [check_compile vect_partial_vector_usage assembly {
7540 } "-Q --help=params" ]
7542 # Get compiler emitted messages and delete generated file.
7543 set lines [lindex $result 0]
7544 set output [lindex $result 1]
7545 remote_file build delete $output
7547 set pattern {=vect-partial-vector-usage=<0,2>\s+([0-2])}
7548 # Capture the usage value to val, set it to zero if not found.
7549 if { ![regexp $pattern $lines whole val] } then {
7557 # Return true if the target supports loop vectorization with partial vectors
7558 # and @code{vect-partial-vector-usage} is set to 1.
7560 proc check_effective_target_vect_partial_vectors_usage_1 { } {
7561 return [expr { ([check_effective_target_vect_fully_masked]
7562 || [check_effective_target_vect_len_load_store])
7563 && [check_vect_partial_vector_usage] == 1 }]
7566 # Return true if the target supports loop vectorization with partial vectors
7567 # and @code{vect-partial-vector-usage} is set to 2.
7569 proc check_effective_target_vect_partial_vectors_usage_2 { } {
7570 return [expr { ([check_effective_target_vect_fully_masked]
7571 || [check_effective_target_vect_len_load_store])
7572 && [check_vect_partial_vector_usage] == 2 }]
7575 # Return true if the target supports loop vectorization with partial vectors
7576 # and @code{vect-partial-vector-usage} is nonzero.
7578 proc check_effective_target_vect_partial_vectors { } {
7579 return [expr { ([check_effective_target_vect_fully_masked]
7580 || [check_effective_target_vect_len_load_store])
7581 && [check_vect_partial_vector_usage] != 0 }]
7584 # Return 1 if the target doesn't prefer any alignment beyond element
7585 # alignment during vectorization.
7587 proc check_effective_target_vect_element_align_preferred { } {
7588 return [expr { [check_effective_target_aarch64_sve]
7589 && [check_effective_target_vect_variable_length] }]
7592 # Return true if vectorization of v2qi/v4qi/v8qi/v16qi/v2hi store is enabed.
7593 # Return zero if the desirable pattern isn't found.
7594 # It's used by Warray-bounds/Wstringop-overflow testcases which are
7595 # regressed by O2 vectorization, refer to PR102697/PR102462/PR102706
7596 proc check_vect_slp_store_usage { pattern macro } {
7599 set result [check_compile slp_aligned_store_usage assembly {
7600 extern void sink (void* );
7601 #define Ac8 (AC8){ 0, 1, 2, 3, 4, 5, 6, 7 }
7602 #define Ac16 (AC16){ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }
7604 typedef struct AC16 { char a[16]; } AC16;
7605 extern char a16[16];
7612 typedef struct AC8 { char a[8]; } AC8;
7626 extern void sink (void*);
7630 struct A1 a = { 0, { } };
7647 #define Ac4 (AC4){ 0, 1, 2, 3 }
7648 typedef struct AC4 { char a[4]; } AC4;
7696 *(short*) (b + 2) = 1;
7705 foo4_2 (struct Ax *p)
7711 struct A { int i; };
7712 struct B { int j; struct A a[4]; };
7719 char cbuf2[2 * sizeof (struct C)] = { };
7723 struct C *p = (struct C*)&cbuf2;
7730 struct A { int i; };
7731 struct B { int j; struct A a[2]; };
7738 char cbuf2[2 * sizeof (struct C)] = { };
7742 struct C *p = (struct C*)&cbuf2;
7748 } "-O2 -fopt-info-all -D$macro" ]
7750 # Get compiler emitted messages and delete generated file.
7751 set lines [lindex $result 0]
7752 set output [lindex $result 1]
7753 remote_file build delete $output
7755 # Check pattern exits in lines, set it to zero if not found.
7756 if { [regexp $pattern $lines] } then {
7763 # Return the true if target support vectorization of 2-byte char stores
7764 # with 2-byte aligned address at plain O2.
7765 # NB: This target should be removed after real issues are fixed for
7766 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
7767 # this target since tests in check_vect_slp_store_usage
7768 # is the exact match of relative testcases
7769 proc check_effective_target_vect_slp_v2qi_store_align { } {
7770 set pattern {add new stmt: MEM <vector\(2\) char>}
7771 set macro "TEST_V2QI"
7772 return [check_cached_effective_target vect_slp_v2qi_store_align {
7773 expr [check_vect_slp_store_usage $pattern $macro] }]
7776 # Return the true if target support vectorization of 2-byte char stores
7777 # with unaligned address at plain O2.
7778 proc check_effective_target_vect_slp_v2qi_store_unalign { } {
7779 set pattern {add new stmt: MEM <vector\(2\) char>}
7780 set macro "TEST_V2QI_2"
7781 return [check_cached_effective_target vect_slp_v2qi_store_unalign {
7782 expr [check_vect_slp_store_usage $pattern $macro ] }]
7785 # Return the true if target support vectorization of 4-byte char stores
7786 # with 4-byte aligned address at plain O2.
7787 # NB: This target should be removed after real issues are fixed for
7788 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
7789 # this target since tests in check_vect_slp_store_usage
7790 # is the exact match of relative testcases
7791 proc check_effective_target_vect_slp_v4qi_store_align { } {
7792 set pattern {add new stmt: MEM <vector\(4\) char>}
7793 set macro "TEST_V4QI"
7794 return [check_cached_effective_target vect_slp_v4qi_store_align {
7795 expr [check_vect_slp_store_usage $pattern $macro ] }]
7798 # Return the true if target support vectorization of 4-byte char stores
7799 # with unaligned address at plain O2.
7800 proc check_effective_target_vect_slp_v4qi_store_unalign { } {
7801 set pattern {add new stmt: MEM <vector\(4\) char>}
7802 set macro "TEST_V4QI_2"
7803 return [check_cached_effective_target vect_slp_v4qi_store_unalign {
7804 expr [check_vect_slp_store_usage $pattern $macro ] }]
7807 # Return the true if target support block move for
7808 # 8-byte aligned 4-byte size struct initialization.
7809 proc check_effective_target_struct_4char_block_move { } {
7810 set pattern {not vectorized: more than one data ref in stmt:}
7811 set macro "TEST_V4QI_3"
7812 return [check_cached_effective_target struct_4char_block_move {
7813 expr [check_vect_slp_store_usage $pattern $macro ] }]
7816 # Return the true if target support vectorization of 4-byte char stores
7817 # with unaligned address or store them with a constant pool at plain O2.
7818 proc check_effective_target_vect_slp_v4qi_store_unalign_1 { } {
7819 set pattern {add new stmt: MEM <vector\(4\) char>}
7820 set macro "TEST_V4QI_3"
7821 return [check_cached_effective_target vect_slp_v4qi_store_unalign_1 {
7822 expr { [check_vect_slp_store_usage $pattern $macro ]
7823 || [check_effective_target_struct_4char_block_move] } }]
7826 # Return the true if target support block move for
7827 # 8-byte aligned 8-byte size struct initialization.
7828 proc check_effective_target_struct_8char_block_move { } {
7829 set pattern {not vectorized: more than one data ref in stmt:}
7830 set macro "TEST_V8QI"
7831 return [check_cached_effective_target struct_8char_block_move {
7832 expr [check_vect_slp_store_usage $pattern $macro ] }]
7835 # Return the true if target support vectorization of 8-byte char stores
7836 # with unaligned address or store them with a constant pool at plain O2.
7837 # NB: This target should be removed after real issues are fixed for
7838 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
7839 # this target since tests in check_vect_slp_store_usage
7840 # is the exact match of relative testcases
7841 proc check_effective_target_vect_slp_v8qi_store_unalign_1 { } {
7842 set pattern {add new stmt: MEM <vector\(8\) char>}
7843 set macro "TEST_V8QI"
7844 return [check_cached_effective_target vect_slp_v8qi_store_unalign_1 {
7845 expr { [check_vect_slp_store_usage $pattern $macro ]
7846 || [check_effective_target_struct_8char_block_move] } }]
7849 # Return the true if target support block move for
7850 # 8-byte aligned 16-byte size struct initialization.
7851 proc check_effective_target_struct_16char_block_move { } {
7852 set pattern {not vectorized: more than one data ref in stmt:}
7853 set macro "TEST_V16QI"
7854 return [check_cached_effective_target struct_16char_block_move {
7855 expr [check_vect_slp_store_usage $pattern $macro ] }]
7858 # Return the true if target support vectorization of 16-byte char stores
7859 # with unaligned address or store them with a constant pool at plain O2.
7860 # NB: This target should be removed after real issues are fixed for
7861 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
7862 # this target since tests in check_vect_slp_store_usage
7863 # is the exact match of relative testcases
7864 proc check_effective_target_vect_slp_v16qi_store_unalign_1 { } {
7865 set pattern {add new stmt: MEM <vector\(16\) char>}
7866 set macro "TEST_V16QI"
7867 return [check_cached_effective_target vect_slp_v16qi_store_unalign_1 {
7868 expr { [check_vect_slp_store_usage $pattern $macro ]
7869 || [check_effective_target_struct_16char_block_move] } }]
7872 # Return the true if target support vectorization of 4-byte short stores
7873 # with unaligned address at plain O2.
7874 # NB: This target should be removed after real issues are fixed for
7875 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
7876 # this target since tests in check_vect_slp_store_usage
7877 # is the exact match of relative testcases
7878 proc check_effective_target_vect_slp_v2hi_store_unalign { } {
7879 set pattern {add new stmt: MEM <vector\(2\) short int>}
7880 set macro "TEST_V2HI"
7881 return [check_cached_effective_target vect_slp_v2hi_store_unalign {
7882 expr [check_vect_slp_store_usage $pattern $macro ] }]
7885 # Return the true if target support vectorization of 4-byte short stores
7886 # with 4-byte aligned address at plain O2.
7887 proc check_effective_target_vect_slp_v2hi_store_align { } {
7888 set pattern {add new stmt: MEM <vector\(2\) short int>}
7889 set macro "TEST_V2HI_2"
7890 return [check_cached_effective_target vect_slp_v2hi_store_align {
7891 expr [check_vect_slp_store_usage $pattern $macro ] }]
7894 # Return the true if target support vectorization of 8-byte short stores
7895 # with unaligned address at plain O2.
7896 # NB: This target should be removed after real issues are fixed for
7897 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
7898 # this target since tests in check_vect_slp_store_usage
7899 # is the exact match of relative testcases
7900 proc check_effective_target_vect_slp_v4hi_store_unalign { } {
7901 set pattern {add new stmt: MEM <vector\(4\) short int>}
7902 set macro "TEST_V4HI"
7903 return [check_cached_effective_target vect_slp_v4hi_store_unalign {
7904 expr [check_vect_slp_store_usage $pattern $macro ] }]
7907 # Return the true if target support vectorization of 8-byte int stores
7908 # with 8-byte aligned address at plain O2.
7909 # NB: This target should be removed after real issues are fixed for
7910 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
7911 # this target since tests in check_vect_slp_store_usage
7912 # is the exact match of relative testcases
7913 proc check_effective_target_vect_slp_v2si_store_align { } {
7914 set pattern {add new stmt: MEM <vector\(2\) int>}
7915 set macro "TEST_V2SI"
7916 return [check_cached_effective_target vect_slp_v2si_store_align {
7917 expr [check_vect_slp_store_usage $pattern $macro ] }]
7920 # Return the true if target support vectorization of 16-byte int stores
7921 # with unaligned address at plain O2.
7922 # NB: This target should be removed after real issues are fixed for
7923 # -Wstringop-overflow with O2 vect. Be careful if you want to reuse
7924 # this target since tests in check_vect_slp_store_usage
7925 # is the exact match of relative testcases
7926 proc check_effective_target_vect_slp_v4si_store_unalign { } {
7927 set pattern {add new stmt: MEM <vector\(4\) int>}
7928 set macro "TEST_V4SI"
7929 return [check_cached_effective_target vect_slp_v4si_store_unalign {
7930 expr [check_vect_slp_store_usage $pattern $macro ] }]
7933 # Return 1 if we can align stack data to the preferred vector alignment.
7935 proc check_effective_target_vect_align_stack_vars { } {
7936 if { [check_effective_target_aarch64_sve] } {
7937 return [check_effective_target_vect_variable_length]
7942 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
7944 proc check_effective_target_vector_alignment_reachable { } {
7945 set et_vector_alignment_reachable 0
7946 if { [check_effective_target_vect_aligned_arrays]
7947 || [check_effective_target_natural_alignment_32] } {
7948 set et_vector_alignment_reachable 1
7950 verbose "check_effective_target_vector_alignment_reachable:\
7951 returning $et_vector_alignment_reachable" 2
7952 return $et_vector_alignment_reachable
7955 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
7957 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
7958 set et_vector_alignment_reachable_for_64bit 0
7959 if { [check_effective_target_vect_aligned_arrays]
7960 || [check_effective_target_natural_alignment_64] } {
7961 set et_vector_alignment_reachable_for_64bit 1
7963 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
7964 returning $et_vector_alignment_reachable_for_64bit" 2
7965 return $et_vector_alignment_reachable_for_64bit
7968 # Return 1 if the target only requires element alignment for vector accesses
7970 proc check_effective_target_vect_element_align { } {
7971 return [check_cached_effective_target_indexed vect_element_align {
7972 expr { ([istarget arm*-*-*]
7973 && ![check_effective_target_arm_vect_no_misalign])
7974 || [check_effective_target_vect_hw_misalign]
7975 || [istarget amdgcn-*-*] }}]
7978 # Return 1 if we expect to see unaligned accesses in at least some
7981 proc check_effective_target_vect_unaligned_possible { } {
7982 return [expr { ![check_effective_target_vect_element_align_preferred]
7983 && (![check_effective_target_vect_no_align]
7984 || [check_effective_target_vect_hw_misalign]) }]
7987 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
7989 proc check_effective_target_vect_load_lanes { } {
7990 # We don't support load_lanes correctly on big-endian arm.
7991 return [check_cached_effective_target vect_load_lanes {
7992 expr { ([check_effective_target_arm_little_endian]
7993 && [check_effective_target_arm_neon_ok])
7994 || [istarget aarch64*-*-*] }}]
7997 # Return 1 if the target supports vector masked loads.
7999 proc check_effective_target_vect_masked_load { } {
8000 return [expr { [check_avx_available]
8001 || [check_effective_target_aarch64_sve]
8002 || [istarget amdgcn*-*-*] } ]
8005 # Return 1 if the target supports vector masked stores.
8007 proc check_effective_target_vect_masked_store { } {
8008 return [expr { [check_effective_target_aarch64_sve]
8009 || [istarget amdgcn*-*-*] }]
8012 # Return 1 if the target supports vector gather loads via internal functions.
8014 proc check_effective_target_vect_gather_load_ifn { } {
8015 return [expr { [check_effective_target_aarch64_sve] }]
8018 # Return 1 if the target supports vector scatter stores.
8020 proc check_effective_target_vect_scatter_store { } {
8021 return [expr { [check_effective_target_aarch64_sve]
8022 || [istarget amdgcn*-*-*] }]
8025 # Return 1 if the target supports vector conditional operations, 0 otherwise.
8027 proc check_effective_target_vect_condition { } {
8028 return [check_cached_effective_target_indexed vect_condition {
8029 expr { [istarget aarch64*-*-*]
8030 || [istarget powerpc*-*-*]
8031 || [istarget ia64-*-*]
8032 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8033 || ([istarget mips*-*-*]
8034 && [et-is-effective-target mips_msa])
8035 || ([istarget arm*-*-*]
8036 && [check_effective_target_arm_neon_ok])
8037 || ([istarget s390*-*-*]
8038 && [check_effective_target_s390_vx])
8039 || [istarget amdgcn-*-*] }}]
8042 # Return 1 if the target supports vector conditional operations where
8043 # the comparison has different type from the lhs, 0 otherwise.
8045 proc check_effective_target_vect_cond_mixed { } {
8046 return [check_cached_effective_target_indexed vect_cond_mixed {
8047 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
8048 || [istarget aarch64*-*-*]
8049 || [istarget powerpc*-*-*]
8050 || ([istarget arm*-*-*]
8051 && [check_effective_target_arm_neon_ok])
8052 || ([istarget mips*-*-*]
8053 && [et-is-effective-target mips_msa])
8054 || ([istarget s390*-*-*]
8055 && [check_effective_target_s390_vx])
8056 || [istarget amdgcn-*-*] }}]
8059 # Return 1 if the target supports vector char multiplication, 0 otherwise.
8061 proc check_effective_target_vect_char_mult { } {
8062 return [check_cached_effective_target_indexed vect_char_mult {
8063 expr { [istarget aarch64*-*-*]
8064 || [istarget ia64-*-*]
8065 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8066 || [check_effective_target_arm32]
8067 || [check_effective_target_powerpc_altivec]
8068 || ([istarget mips*-*-*]
8069 && [et-is-effective-target mips_msa])
8070 || ([istarget s390*-*-*]
8071 && [check_effective_target_s390_vx])
8072 || [istarget amdgcn-*-*] }}]
8075 # Return 1 if the target supports vector short multiplication, 0 otherwise.
8077 proc check_effective_target_vect_short_mult { } {
8078 return [check_cached_effective_target_indexed vect_short_mult {
8079 expr { [istarget ia64-*-*]
8080 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8081 || [istarget powerpc*-*-*]
8082 || [istarget aarch64*-*-*]
8083 || [check_effective_target_arm32]
8084 || ([istarget mips*-*-*]
8085 && ([et-is-effective-target mips_msa]
8086 || [et-is-effective-target mips_loongson_mmi]))
8087 || ([istarget s390*-*-*]
8088 && [check_effective_target_s390_vx])
8089 || [istarget amdgcn-*-*] }}]
8092 # Return 1 if the target supports vector int multiplication, 0 otherwise.
8094 proc check_effective_target_vect_int_mult { } {
8095 return [check_cached_effective_target_indexed vect_int_mult {
8096 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
8097 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8098 || [istarget ia64-*-*]
8099 || [istarget aarch64*-*-*]
8100 || ([istarget mips*-*-*]
8101 && [et-is-effective-target mips_msa])
8102 || [check_effective_target_arm32]
8103 || ([istarget s390*-*-*]
8104 && [check_effective_target_s390_vx])
8105 || [istarget amdgcn-*-*] }}]
8108 # Return 1 if the target supports 64 bit hardware vector
8109 # multiplication of long operands with a long result, 0 otherwise.
8111 # This can change for different subtargets so do not cache the result.
8113 proc check_effective_target_vect_long_mult { } {
8114 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
8115 || (([istarget powerpc*-*-*]
8116 && ![istarget powerpc-*-linux*paired*])
8117 && [check_effective_target_ilp32])
8118 || [is-effective-target arm_neon]
8119 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
8120 || [istarget aarch64*-*-*]
8121 || ([istarget mips*-*-*]
8122 && [et-is-effective-target mips_msa]) } {
8128 verbose "check_effective_target_vect_long_mult: returning $answer" 2
8132 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
8134 proc check_effective_target_vect_extract_even_odd { } {
8135 return [check_cached_effective_target_indexed extract_even_odd {
8136 expr { [istarget aarch64*-*-*]
8137 || [istarget powerpc*-*-*]
8138 || [is-effective-target arm_neon]
8139 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8140 || [istarget ia64-*-*]
8141 || ([istarget mips*-*-*]
8142 && ([et-is-effective-target mips_msa]
8143 || [et-is-effective-target mpaired_single]))
8144 || ([istarget s390*-*-*]
8145 && [check_effective_target_s390_vx]) }}]
8148 # Return 1 if the target supports vector interleaving, 0 otherwise.
8150 proc check_effective_target_vect_interleave { } {
8151 return [check_cached_effective_target_indexed vect_interleave {
8152 expr { [istarget aarch64*-*-*]
8153 || [istarget powerpc*-*-*]
8154 || [is-effective-target arm_neon]
8155 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8156 || [istarget ia64-*-*]
8157 || ([istarget mips*-*-*]
8158 && ([et-is-effective-target mpaired_single]
8159 || [et-is-effective-target mips_msa]))
8160 || ([istarget s390*-*-*]
8161 && [check_effective_target_s390_vx]) }}]
8164 foreach N {2 3 4 8} {
8165 eval [string map [list N $N] {
8166 # Return 1 if the target supports 2-vector interleaving
8167 proc check_effective_target_vect_stridedN { } {
8168 return [check_cached_effective_target_indexed vect_stridedN {
8170 && [check_effective_target_vect_interleave]
8171 && [check_effective_target_vect_extract_even_odd] } {
8174 if { ([istarget arm*-*-*]
8175 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
8178 if [check_effective_target_vect_fully_masked] {
8187 # Return the list of vector sizes (in bits) that each target supports.
8188 # A vector length of "0" indicates variable-length vectors.
8190 proc available_vector_sizes { } {
8192 if { [istarget aarch64*-*-*] } {
8193 if { [check_effective_target_aarch64_sve] } {
8194 lappend result [aarch64_sve_bits]
8196 lappend result 128 64
8197 } elseif { [istarget arm*-*-*]
8198 && [check_effective_target_arm_neon_ok] } {
8199 lappend result 128 64
8200 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8201 if { [check_avx_available] && ![check_prefer_avx128] } {
8205 if { ![is-effective-target ia32] } {
8209 } elseif { [istarget sparc*-*-*] } {
8211 } elseif { [istarget amdgcn*-*-*] } {
8214 # The traditional default asumption.
8220 # Return 1 if the target supports multiple vector sizes
8222 proc check_effective_target_vect_multiple_sizes { } {
8223 return [expr { [llength [available_vector_sizes]] > 1 }]
8226 # Return true if variable-length vectors are supported.
8228 proc check_effective_target_vect_variable_length { } {
8229 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
8232 # Return 1 if the target supports vectors of 64 bits.
8234 proc check_effective_target_vect64 { } {
8235 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
8238 # Return 1 if the target supports vectors of 32 bits.
8240 proc check_effective_target_vect32 { } {
8241 return [expr { [lsearch -exact [available_vector_sizes] 32] >= 0 }]
8244 # Return 1 if the target supports vector copysignf calls.
8246 proc check_effective_target_vect_call_copysignf { } {
8247 return [check_cached_effective_target_indexed vect_call_copysignf {
8248 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
8249 || [istarget powerpc*-*-*]
8250 || [istarget aarch64*-*-*] }}]
8253 # Return 1 if the target supports hardware square root instructions.
8255 proc check_effective_target_sqrt_insn { } {
8256 return [check_cached_effective_target sqrt_insn {
8257 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
8258 || [check_effective_target_powerpc_sqrt]
8259 || [istarget aarch64*-*-*]
8260 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
8261 || ([istarget s390*-*-*]
8262 && [check_effective_target_s390_vx])
8263 || [istarget amdgcn-*-*] }}]
8266 # Return any additional options to enable square root intructions.
8268 proc add_options_for_sqrt_insn { flags } {
8269 if { [istarget amdgcn*-*-*] } {
8270 return "$flags -ffast-math"
8272 if { [istarget arm*-*-*] } {
8273 return [add_options_for_arm_vfp "$flags"]
8278 # Return 1 if the target supports vector sqrtf calls.
8280 proc check_effective_target_vect_call_sqrtf { } {
8281 return [check_cached_effective_target_indexed vect_call_sqrtf {
8282 expr { [istarget aarch64*-*-*]
8283 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8284 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
8285 || ([istarget s390*-*-*]
8286 && [check_effective_target_s390_vx]) }}]
8289 # Return 1 if the target supports vector lrint calls.
8291 proc check_effective_target_vect_call_lrint { } {
8292 set et_vect_call_lrint 0
8293 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
8294 && [check_effective_target_ilp32])
8295 || [istarget amdgcn-*-*] } {
8296 set et_vect_call_lrint 1
8299 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
8300 return $et_vect_call_lrint
8303 # Return 1 if the target supports vector btrunc calls.
8305 proc check_effective_target_vect_call_btrunc { } {
8306 return [check_cached_effective_target_indexed vect_call_btrunc {
8307 expr { [istarget aarch64*-*-*]
8308 || [istarget amdgcn-*-*] }}]
8311 # Return 1 if the target supports vector btruncf calls.
8313 proc check_effective_target_vect_call_btruncf { } {
8314 return [check_cached_effective_target_indexed vect_call_btruncf {
8315 expr { [istarget aarch64*-*-*]
8316 || [istarget amdgcn-*-*] }}]
8319 # Return 1 if the target supports vector ceil calls.
8321 proc check_effective_target_vect_call_ceil { } {
8322 return [check_cached_effective_target_indexed vect_call_ceil {
8323 expr { [istarget aarch64*-*-*]
8324 || [istarget amdgcn-*-*] }}]
8327 # Return 1 if the target supports vector ceilf calls.
8329 proc check_effective_target_vect_call_ceilf { } {
8330 return [check_cached_effective_target_indexed vect_call_ceilf {
8331 expr { [istarget aarch64*-*-*] }}]
8334 # Return 1 if the target supports vector floor calls.
8336 proc check_effective_target_vect_call_floor { } {
8337 return [check_cached_effective_target_indexed vect_call_floor {
8338 expr { [istarget aarch64*-*-*] }}]
8341 # Return 1 if the target supports vector floorf calls.
8343 proc check_effective_target_vect_call_floorf { } {
8344 return [check_cached_effective_target_indexed vect_call_floorf {
8345 expr { [istarget aarch64*-*-*]
8346 || [istarget amdgcn-*-*] }}]
8349 # Return 1 if the target supports vector lceil calls.
8351 proc check_effective_target_vect_call_lceil { } {
8352 return [check_cached_effective_target_indexed vect_call_lceil {
8353 expr { [istarget aarch64*-*-*] }}]
8356 # Return 1 if the target supports vector lfloor calls.
8358 proc check_effective_target_vect_call_lfloor { } {
8359 return [check_cached_effective_target_indexed vect_call_lfloor {
8360 expr { [istarget aarch64*-*-*] }}]
8363 # Return 1 if the target supports vector nearbyint calls.
8365 proc check_effective_target_vect_call_nearbyint { } {
8366 return [check_cached_effective_target_indexed vect_call_nearbyint {
8367 expr { [istarget aarch64*-*-*] }}]
8370 # Return 1 if the target supports vector nearbyintf calls.
8372 proc check_effective_target_vect_call_nearbyintf { } {
8373 return [check_cached_effective_target_indexed vect_call_nearbyintf {
8374 expr { [istarget aarch64*-*-*] }}]
8377 # Return 1 if the target supports vector round calls.
8379 proc check_effective_target_vect_call_round { } {
8380 return [check_cached_effective_target_indexed vect_call_round {
8381 expr { [istarget aarch64*-*-*] }}]
8384 # Return 1 if the target supports vector roundf calls.
8386 proc check_effective_target_vect_call_roundf { } {
8387 return [check_cached_effective_target_indexed vect_call_roundf {
8388 expr { [istarget aarch64*-*-*] }}]
8391 # Return 1 if the target supports AND, OR and XOR reduction.
8393 proc check_effective_target_vect_logical_reduc { } {
8394 return [check_effective_target_aarch64_sve]
8397 # Return 1 if the target supports the fold_extract_last optab.
8399 proc check_effective_target_vect_fold_extract_last { } {
8400 return [expr { [check_effective_target_aarch64_sve]
8401 || [istarget amdgcn*-*-*] }]
8404 # Return 1 if the target supports section-anchors
8406 proc check_effective_target_section_anchors { } {
8407 return [check_cached_effective_target section_anchors {
8408 expr { [istarget powerpc*-*-*]
8409 || [istarget arm*-*-*]
8410 || [istarget aarch64*-*-*] }}]
8413 # Return 1 if the target supports atomic operations on "int_128" values.
8415 proc check_effective_target_sync_int_128 { } {
8419 # Return 1 if the target supports atomic operations on "int_128" values
8420 # and can execute them.
8421 # This requires support for both compare-and-swap and true atomic loads.
8423 proc check_effective_target_sync_int_128_runtime { } {
8427 # Return 1 if the target supports atomic operations on "long long".
8429 # Note: 32bit x86 targets require -march=pentium in dg-options.
8430 # Note: 32bit s390 targets require -mzarch in dg-options.
8432 proc check_effective_target_sync_long_long { } {
8433 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
8434 || [istarget aarch64*-*-*]
8435 || [istarget arm*-*-*]
8436 || [istarget alpha*-*-*]
8437 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
8438 || [istarget s390*-*-*] } {
8445 # Return 1 if the target supports popcount on long.
8447 proc check_effective_target_popcountl { } {
8448 return [check_no_messages_and_pattern popcountl "!\\(call" rtl-expand {
8451 return __builtin_popcountl (b);
8456 # Return 1 if the target supports popcount on long long.
8458 proc check_effective_target_popcountll { } {
8459 return [check_no_messages_and_pattern popcountll "!\\(call" rtl-expand {
8460 int foo (long long b)
8462 return __builtin_popcountll (b);
8468 # Return 1 if the target supports popcount on int.
8470 proc check_effective_target_popcount { } {
8471 return [check_no_messages_and_pattern popcount "!\\(call" rtl-expand {
8474 return __builtin_popcount (b);
8479 # Return 1 if the target supports atomic operations on "long long"
8480 # and can execute them.
8482 # Note: 32bit x86 targets require -march=pentium in dg-options.
8484 proc check_effective_target_sync_long_long_runtime { } {
8485 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
8486 && [check_cached_effective_target sync_long_long_available {
8487 check_runtime_nocache sync_long_long_available {
8491 unsigned int eax, ebx, ecx, edx;
8492 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
8493 return !(edx & bit_CMPXCHG8B);
8498 || [istarget aarch64*-*-*]
8499 || [istarget arm*-*-uclinuxfdpiceabi]
8500 || ([istarget arm*-*-linux-*]
8501 && [check_runtime sync_longlong_runtime {
8507 if (sizeof (long long) != 8)
8510 /* Just check for native;
8511 checking for kernel fallback is tricky. */
8512 asm volatile ("ldrexd r0,r1, [%0]"
8513 : : "r" (&l1) : "r0", "r1");
8517 || [istarget alpha*-*-*]
8518 || ([istarget sparc*-*-*]
8519 && [check_effective_target_lp64]
8520 && [check_effective_target_ultrasparc_hw])
8521 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
8528 # Return 1 if the target supports byte swap instructions.
8530 proc check_effective_target_bswap { } {
8531 return [check_cached_effective_target bswap {
8532 expr { [istarget aarch64*-*-*]
8533 || [istarget alpha*-*-*]
8534 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8535 || [istarget m68k-*-*]
8536 || [istarget powerpc*-*-*]
8537 || [istarget rs6000-*-*]
8538 || [istarget s390*-*-*]
8539 || ([istarget arm*-*-*]
8540 && [check_no_compiler_messages_nocache arm_v6_or_later object {
8542 #error not armv6 or later
8548 # Return 1 if the target supports atomic operations on "int" and "long".
8550 proc check_effective_target_sync_int_long { } {
8551 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
8552 # load-reserved/store-conditional instructions.
8553 return [check_cached_effective_target sync_int_long {
8554 expr { [istarget ia64-*-*]
8555 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8556 || [istarget aarch64*-*-*]
8557 || [istarget alpha*-*-*]
8558 || [istarget arm*-*-linux-*]
8559 || [istarget arm*-*-uclinuxfdpiceabi]
8560 || ([istarget arm*-*-*]
8561 && [check_effective_target_arm_acq_rel])
8562 || [istarget bfin*-*linux*]
8563 || [istarget hppa*-*linux*]
8564 || [istarget s390*-*-*]
8565 || [istarget powerpc*-*-*]
8566 || [istarget cris-*-*]
8567 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
8568 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
8569 || [check_effective_target_mips_llsc]
8570 || [istarget nvptx*-*-*]
8574 # Return 1 if the target supports atomic operations on "int" and "long" on
8577 proc check_effective_target_sync_int_long_stack { } {
8578 return [check_cached_effective_target sync_int_long_stack {
8579 expr { ![istarget nvptx*-*-*]
8580 && [check_effective_target_sync_int_long]
8584 # Return 1 if the target supports atomic operations on "char" and "short".
8586 proc check_effective_target_sync_char_short { } {
8587 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
8588 # load-reserved/store-conditional instructions.
8589 return [check_cached_effective_target sync_char_short {
8590 expr { [istarget aarch64*-*-*]
8591 || [istarget ia64-*-*]
8592 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8593 || [istarget alpha*-*-*]
8594 || [istarget arm*-*-linux-*]
8595 || [istarget arm*-*-uclinuxfdpiceabi]
8596 || ([istarget arm*-*-*]
8597 && [check_effective_target_arm_acq_rel])
8598 || [istarget hppa*-*linux*]
8599 || [istarget s390*-*-*]
8600 || [istarget powerpc*-*-*]
8601 || [istarget cris-*-*]
8602 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
8603 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
8604 || [check_effective_target_mips_llsc] }}]
8607 # Return 1 if the target uses a ColdFire FPU.
8609 proc check_effective_target_coldfire_fpu { } {
8610 return [check_no_compiler_messages coldfire_fpu assembly {
8617 # Return true if this is a uClibc target.
8619 proc check_effective_target_uclibc {} {
8620 return [check_no_compiler_messages uclibc object {
8621 #include <features.h>
8622 #if !defined (__UCLIBC__)
8628 # Return true if this is a uclibc target and if the uclibc feature
8629 # described by __$feature__ is not present.
8631 proc check_missing_uclibc_feature {feature} {
8632 return [check_no_compiler_messages $feature object "
8633 #include <features.h>
8634 #if !defined (__UCLIBC) || defined (__${feature}__)
8640 # Return true if this is a Newlib target.
8642 proc check_effective_target_newlib {} {
8643 return [check_no_compiler_messages newlib object {
8648 # Return true if GCC was configured with --enable-newlib-nano-formatted-io
8649 proc check_effective_target_newlib_nano_io { } {
8650 return [check_configured_with "--enable-newlib-nano-formatted-io"]
8653 # Some newlib versions don't provide a frexpl and instead depend
8654 # on frexp to implement long double conversions in their printf-like
8655 # functions. This leads to broken results. Detect such versions here.
8657 proc check_effective_target_newlib_broken_long_double_io {} {
8658 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
8664 # Return true if this is NOT a Bionic target.
8666 proc check_effective_target_non_bionic {} {
8667 return [check_no_compiler_messages non_bionic object {
8669 #if defined (__BIONIC__)
8675 # Return true if this target has error.h header.
8677 proc check_effective_target_error_h {} {
8678 return [check_no_compiler_messages error_h object {
8683 # Return true if this target has tgmath.h header.
8685 proc check_effective_target_tgmath_h {} {
8686 return [check_no_compiler_messages tgmath_h object {
8691 # Return true if target's libc supports complex functions.
8693 proc check_effective_target_libc_has_complex_functions {} {
8694 return [check_no_compiler_messages libc_has_complex_functions object {
8695 #include <complex.h>
8700 # (a) an error of a few ULP is expected in string to floating-point
8701 # conversion functions; and
8702 # (b) overflow is not always detected correctly by those functions.
8704 proc check_effective_target_lax_strtofp {} {
8705 # By default, assume that all uClibc targets suffer from this.
8706 return [check_effective_target_uclibc]
8709 # Return 1 if this is a target for which wcsftime is a dummy
8710 # function that always returns 0.
8712 proc check_effective_target_dummy_wcsftime {} {
8713 # By default, assume that all uClibc targets suffer from this.
8714 return [check_effective_target_uclibc]
8717 # Return 1 if constructors with initialization priority arguments are
8718 # supposed on this target.
8720 proc check_effective_target_init_priority {} {
8721 return [check_no_compiler_messages init_priority assembly "
8722 void f() __attribute__((constructor (1000)));
8727 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
8728 # This can be used with any check_* proc that takes no argument and
8729 # returns only 1 or 0. It could be used with check_* procs that take
8730 # arguments with keywords that pass particular arguments.
8732 proc is-effective-target { arg } {
8735 if { ![info exists et_index] } {
8736 # Initialize the effective target index that is used in some
8737 # check_effective_target_* procs.
8740 if { [info procs check_effective_target_${arg}] != [list] } {
8741 set selected [check_effective_target_${arg}]
8744 "vmx_hw" { set selected [check_vmx_hw_available] }
8745 "vsx_hw" { set selected [check_vsx_hw_available] }
8746 "p8vector_hw" { set selected [check_p8vector_hw_available] }
8747 "p9vector_hw" { set selected [check_p9vector_hw_available] }
8748 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
8749 "power10_hw" { set selected [check_power10_hw_available] }
8750 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
8751 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
8752 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
8753 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
8754 "ppc_mma_hw" { set selected [check_ppc_mma_hw_available] }
8755 "dfp_hw" { set selected [check_dfp_hw_available] }
8756 "htm_hw" { set selected [check_htm_hw_available] }
8757 "named_sections" { set selected [check_named_sections_available] }
8758 "gc_sections" { set selected [check_gc_sections_available] }
8759 "cxa_atexit" { set selected [check_cxa_atexit_available] }
8760 default { error "unknown effective target keyword `$arg'" }
8764 verbose "is-effective-target: $arg $selected" 2
8768 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
8770 proc is-effective-target-keyword { arg } {
8771 if { [info procs check_effective_target_${arg}] != [list] } {
8774 # These have different names for their check_* procs.
8776 "vmx_hw" { return 1 }
8777 "vsx_hw" { return 1 }
8778 "p8vector_hw" { return 1 }
8779 "p9vector_hw" { return 1 }
8780 "p9modulo_hw" { return 1 }
8781 "power10_hw" { return 1 }
8782 "ppc_float128_sw" { return 1 }
8783 "ppc_float128_hw" { return 1 }
8784 "ppc_recip_hw" { return 1 }
8785 "ppc_mma_hw" { return 1 }
8786 "dfp_hw" { return 1 }
8787 "htm_hw" { return 1 }
8788 "named_sections" { return 1 }
8789 "gc_sections" { return 1 }
8790 "cxa_atexit" { return 1 }
8791 default { return 0 }
8796 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
8797 # indicate what target is currently being processed. This is for
8798 # the vectorizer tests, e.g. vect_int, to keep track what target supports
8801 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
8802 global dg-do-what-default
8803 global EFFECTIVE_TARGETS
8806 if { [llength $EFFECTIVE_TARGETS] > 0 } {
8807 foreach target $EFFECTIVE_TARGETS {
8808 set target_flags $flags
8809 set dg-do-what-default compile
8810 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
8811 if { [info procs add_options_for_${target}] != [list] } {
8812 set target_flags [add_options_for_${target} "$flags"]
8814 if { [info procs check_effective_target_${target}_runtime]
8815 != [list] && [check_effective_target_${target}_runtime] } {
8816 set dg-do-what-default run
8818 $runtest $testcases $target_flags ${default-extra-flags}
8822 $runtest $testcases $flags ${default-extra-flags}
8826 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
8827 # et_index, 0 otherwise.
8829 proc et-is-effective-target { target } {
8830 global EFFECTIVE_TARGETS
8833 if { [llength $EFFECTIVE_TARGETS] > $et_index
8834 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
8840 # Return 1 if target default to short enums
8842 proc check_effective_target_short_enums { } {
8843 return [check_no_compiler_messages short_enums assembly {
8845 int s[sizeof (enum foo) == 1 ? 1 : -1];
8849 # Return 1 if target supports merging string constants at link time.
8851 proc check_effective_target_string_merging { } {
8852 return [check_no_messages_and_pattern string_merging \
8853 "rodata\\.str" assembly {
8854 const char *var = "String";
8858 # Return 1 if target has the basic signed and unsigned types in
8859 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
8860 # working <stdint.h> for all targets.
8862 proc check_effective_target_stdint_types { } {
8863 return [check_no_compiler_messages stdint_types assembly {
8865 int8_t a; int16_t b; int32_t c; int64_t d;
8866 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
8870 # Like check_effective_target_stdint_types, but test what happens when
8871 # -mbig-endian is passed. This test only makes sense on targets that
8872 # support -mbig-endian; it will fail elsewhere.
8874 proc check_effective_target_stdint_types_mbig_endian { } {
8875 return [check_no_compiler_messages stdint_types_mbig_endian assembly {
8877 int8_t a; int16_t b; int32_t c; int64_t d;
8878 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
8882 # Return 1 if target has the basic signed and unsigned types in
8883 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
8884 # these types agree with those in the header, as some systems have
8885 # only <inttypes.h>.
8887 proc check_effective_target_inttypes_types { } {
8888 return [check_no_compiler_messages inttypes_types assembly {
8889 #include <inttypes.h>
8890 int8_t a; int16_t b; int32_t c; int64_t d;
8891 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
8895 # Return 1 if programs are intended to be run on a simulator
8896 # (i.e. slowly) rather than hardware (i.e. fast).
8898 proc check_effective_target_simulator { } {
8900 # All "src/sim" simulators set this one.
8901 if [board_info target exists is_simulator] {
8902 return [board_info target is_simulator]
8905 # The "sid" simulators don't set that one, but at least they set
8907 if [board_info target exists slow_simulator] {
8908 return [board_info target slow_simulator]
8914 # Return 1 if programs are intended to be run on hardware rather than
8917 proc check_effective_target_hw { } {
8919 # All "src/sim" simulators set this one.
8920 if [board_info target exists is_simulator] {
8921 if [board_info target is_simulator] {
8928 # The "sid" simulators don't set that one, but at least they set
8930 if [board_info target exists slow_simulator] {
8931 if [board_info target slow_simulator] {
8941 # Return 1 if the target is a VxWorks kernel.
8943 proc check_effective_target_vxworks_kernel { } {
8944 return [check_no_compiler_messages vxworks_kernel assembly {
8945 #if !defined __vxworks || defined __RTP__
8951 # Return 1 if the target is a VxWorks RTP.
8953 proc check_effective_target_vxworks_rtp { } {
8954 return [check_no_compiler_messages vxworks_rtp assembly {
8955 #if !defined __vxworks || !defined __RTP__
8961 # Return 1 if the target is expected to provide wide character support.
8963 proc check_effective_target_wchar { } {
8964 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
8967 return [check_no_compiler_messages wchar assembly {
8972 # Return 1 if the target has <pthread.h>.
8974 proc check_effective_target_pthread_h { } {
8975 return [check_no_compiler_messages pthread_h assembly {
8976 #include <pthread.h>
8980 # Return 1 if the target can truncate a file from a file-descriptor,
8981 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
8982 # chsize. We test for a trivially functional truncation; no stubs.
8983 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
8984 # different function to be used.
8986 proc check_effective_target_fd_truncate { } {
8988 #define _FILE_OFFSET_BITS 64
8995 FILE *f = fopen ("tst.tmp", "wb");
8997 const char t[] = "test writing more than ten characters";
9001 write (fd, t, sizeof (t) - 1);
9003 if (ftruncate (fd, 10) != 0)
9012 f = fopen ("tst.tmp", "rb");
9013 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
9021 if { [check_runtime ftruncate $prog] } {
9025 regsub "ftruncate" $prog "chsize" prog
9026 return [check_runtime chsize $prog]
9029 # Add to FLAGS all the target-specific flags needed to enable
9030 # full IEEE compliance mode.
9032 proc add_options_for_ieee { flags } {
9033 if { [istarget alpha*-*-*]
9034 || [istarget sh*-*-*] } {
9035 return "$flags -mieee"
9037 if { [istarget rx-*-*] } {
9038 return "$flags -mnofpu"
9043 if {![info exists flags_to_postpone]} {
9044 set flags_to_postpone ""
9047 # Add to FLAGS the flags needed to enable functions to bind locally
9048 # when using pic/PIC passes in the testsuite.
9049 proc add_options_for_bind_pic_locally { flags } {
9050 global flags_to_postpone
9052 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
9053 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
9054 # order to make sure that the multilib_flags doesn't override this.
9056 if {[check_no_compiler_messages using_pic2 assembly {
9061 set flags_to_postpone "-fPIE"
9064 if {[check_no_compiler_messages using_pic1 assembly {
9069 set flags_to_postpone "-fpie"
9075 # Add to FLAGS the flags needed to enable 64-bit vectors.
9077 proc add_options_for_double_vectors { flags } {
9078 if [is-effective-target arm_neon_ok] {
9079 return "$flags -mvectorize-with-neon-double"
9085 # Add to FLAGS the flags needed to define the STACK_SIZE macro.
9087 proc add_options_for_stack_size { flags } {
9088 if [is-effective-target stack_size] {
9089 set stack_size [dg-effective-target-value stack_size]
9090 return "$flags -DSTACK_SIZE=$stack_size"
9096 # Return 1 if the target provides a full C99 runtime.
9098 proc check_effective_target_c99_runtime { } {
9099 return [check_cached_effective_target c99_runtime {
9102 set file [open "$srcdir/gcc.dg/builtins-config.h"]
9103 set contents [read $file]
9106 #ifndef HAVE_C99_RUNTIME
9107 #error !HAVE_C99_RUNTIME
9110 check_no_compiler_messages_nocache c99_runtime assembly $contents
9114 # Return 1 if the target provides the D runtime.
9116 proc check_effective_target_d_runtime { } {
9117 return [check_no_compiler_messages d_runtime executable {
9121 extern(C) int main() {
9127 # Return 1 if the target provides the D standard library.
9129 proc check_effective_target_d_runtime_has_std_library { } {
9130 return [check_no_compiler_messages d_runtime_has_std_library executable {
9134 extern(C) int main() {
9136 real function(real) pcos = &cos;
9142 # Return 1 if target wchar_t is at least 4 bytes.
9144 proc check_effective_target_4byte_wchar_t { } {
9145 return [check_no_compiler_messages 4byte_wchar_t object {
9146 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
9150 # Return 1 if the target supports automatic stack alignment.
9152 proc check_effective_target_automatic_stack_alignment { } {
9153 # Ordinarily x86 supports automatic stack alignment ...
9154 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
9155 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
9156 # ... except Win64 SEH doesn't. Succeed for Win32 though.
9157 return [check_effective_target_ilp32];
9164 # Return true if we are compiling for AVX target.
9166 proc check_avx_available { } {
9167 if { [check_no_compiler_messages avx_available assembly {
9177 # Return true if we are compiling for AVX2 target.
9179 proc check_avx2_available { } {
9180 if { [check_no_compiler_messages avx2_available assembly {
9190 # Return true if we are compiling for SSSE3 target.
9192 proc check_ssse3_available { } {
9193 if { [check_no_compiler_messages sse3a_available assembly {
9203 # Return true if 32- and 16-bytes vectors are available.
9205 proc check_effective_target_vect_sizes_32B_16B { } {
9206 return [expr { [available_vector_sizes] == [list 256 128] }]
9209 # Return true if 16- and 8-bytes vectors are available.
9211 proc check_effective_target_vect_sizes_16B_8B { } {
9212 if { [check_avx_available]
9213 || [is-effective-target arm_neon]
9214 || [istarget aarch64*-*-*] } {
9222 # Return true if 128-bits vectors are preferred even if 256-bits vectors
9225 proc check_prefer_avx128 { } {
9226 if ![check_avx_available] {
9229 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
9230 float a[1024],b[1024],c[1024];
9231 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
9232 } "-O2 -ftree-vectorize"]
9236 # Return 1 if avx512fp16 instructions can be compiled.
9238 proc check_effective_target_avx512fp16 { } {
9239 return [check_no_compiler_messages avx512fp16 object {
9242 asm volatile ("vmovw %edi, %xmm0");
9244 } "-O2 -mavx512fp16" ]
9247 # Return 1 if avx512f instructions can be compiled.
9249 proc check_effective_target_avx512f { } {
9250 return [check_no_compiler_messages avx512f object {
9251 typedef double __m512d __attribute__ ((__vector_size__ (64)));
9252 typedef double __m128d __attribute__ ((__vector_size__ (16)));
9254 __m512d _mm512_add (__m512d a)
9256 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
9259 __m128d _mm128_add (__m128d a)
9261 return __builtin_ia32_addsd_round (a, a, 8);
9264 __m128d _mm128_getmant (__m128d a)
9266 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
9271 # Return 1 if avx instructions can be compiled.
9273 proc check_effective_target_avx { } {
9274 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9277 return [check_no_compiler_messages avx object {
9278 void _mm256_zeroall (void)
9280 __builtin_ia32_vzeroall ();
9285 # Return 1 if avx2 instructions can be compiled.
9286 proc check_effective_target_avx2 { } {
9287 return [check_no_compiler_messages avx2 object {
9288 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
9290 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
9292 return __builtin_ia32_andnotsi256 (__X, __Y);
9297 # Return 1 if avxvnni instructions can be compiled.
9298 proc check_effective_target_avxvnni { } {
9299 return [check_no_compiler_messages avxvnni object {
9300 typedef int __v8si __attribute__ ((__vector_size__ (32)));
9302 _mm256_dpbusd_epi32 (__v8si __A, __v8si __B, __v8si __C)
9304 return __builtin_ia32_vpdpbusd_v8si (__A, __B, __C);
9309 # Return 1 if sse instructions can be compiled.
9310 proc check_effective_target_sse { } {
9311 return [check_no_compiler_messages sse object {
9314 __builtin_ia32_stmxcsr ();
9320 # Return 1 if sse2 instructions can be compiled.
9321 proc check_effective_target_sse2 { } {
9322 return [check_no_compiler_messages sse2 object {
9323 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9325 __m128i _mm_srli_si128 (__m128i __A, int __N)
9327 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
9332 # Return 1 if sse4.1 instructions can be compiled.
9333 proc check_effective_target_sse4 { } {
9334 return [check_no_compiler_messages sse4.1 object {
9335 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9336 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9338 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
9340 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
9346 # Return 1 if F16C instructions can be compiled.
9348 proc check_effective_target_f16c { } {
9349 return [check_no_compiler_messages f16c object {
9350 #include "immintrin.h"
9352 foo (unsigned short val)
9354 return _cvtsh_ss (val);
9359 proc check_effective_target_ms_hook_prologue { } {
9360 if { [check_no_compiler_messages ms_hook_prologue object {
9361 void __attribute__ ((__ms_hook_prologue__)) foo ();
9369 # Return 1 if 3dnow instructions can be compiled.
9370 proc check_effective_target_3dnow { } {
9371 return [check_no_compiler_messages 3dnow object {
9372 typedef int __m64 __attribute__ ((__vector_size__ (8)));
9373 typedef float __v2sf __attribute__ ((__vector_size__ (8)));
9375 __m64 _m_pfadd (__m64 __A, __m64 __B)
9377 return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
9382 # Return 1 if sse3 instructions can be compiled.
9383 proc check_effective_target_sse3 { } {
9384 return [check_no_compiler_messages sse3 object {
9385 typedef double __m128d __attribute__ ((__vector_size__ (16)));
9386 typedef double __v2df __attribute__ ((__vector_size__ (16)));
9388 __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
9390 return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
9395 # Return 1 if ssse3 instructions can be compiled.
9396 proc check_effective_target_ssse3 { } {
9397 return [check_no_compiler_messages ssse3 object {
9398 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9399 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9401 __m128i _mm_abs_epi32 (__m128i __X)
9403 return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
9408 # Return 1 if aes instructions can be compiled.
9409 proc check_effective_target_aes { } {
9410 return [check_no_compiler_messages aes object {
9411 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9412 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9414 __m128i _mm_aesimc_si128 (__m128i __X)
9416 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
9421 # Return 1 if vaes instructions can be compiled.
9422 proc check_effective_target_vaes { } {
9423 return [check_no_compiler_messages vaes object {
9424 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9425 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9427 __m128i _mm_aesimc_si128 (__m128i __X)
9429 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
9431 } "-O2 -maes -mavx" ]
9434 # Return 1 if pclmul instructions can be compiled.
9435 proc check_effective_target_pclmul { } {
9436 return [check_no_compiler_messages pclmul object {
9437 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9438 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9440 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
9442 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
9449 # Return 1 if vpclmul instructions can be compiled.
9450 proc check_effective_target_vpclmul { } {
9451 return [check_no_compiler_messages vpclmul object {
9452 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9453 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9455 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
9457 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
9461 } "-O2 -mpclmul -mavx" ]
9464 # Return 1 if sse4a instructions can be compiled.
9465 proc check_effective_target_sse4a { } {
9466 return [check_no_compiler_messages sse4a object {
9467 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9468 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
9470 __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
9472 return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
9477 # Return 1 if fma4 instructions can be compiled.
9478 proc check_effective_target_fma4 { } {
9479 return [check_no_compiler_messages fma4 object {
9480 typedef float __m128 __attribute__ ((__vector_size__ (16)));
9481 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
9482 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
9484 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
9491 # Return 1 if fma instructions can be compiled.
9492 proc check_effective_target_fma { } {
9493 return [check_no_compiler_messages fma object {
9494 typedef float __m128 __attribute__ ((__vector_size__ (16)));
9495 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
9496 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
9498 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
9505 # Return 1 if xop instructions can be compiled.
9506 proc check_effective_target_xop { } {
9507 return [check_no_compiler_messages xop object {
9508 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9509 typedef short __v8hi __attribute__ ((__vector_size__ (16)));
9510 __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
9512 return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
9519 # Return 1 if lzcnt instruction can be compiled.
9520 proc check_effective_target_lzcnt { } {
9521 return [check_no_compiler_messages lzcnt object {
9522 unsigned short _lzcnt (unsigned short __X)
9524 return __builtin_clzs (__X);
9529 # Return 1 if bmi instructions can be compiled.
9530 proc check_effective_target_bmi { } {
9531 return [check_no_compiler_messages bmi object {
9532 unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)
9534 return __builtin_ia32_bextr_u32 (__X, __Y);
9539 # Return 1 if ADX instructions can be compiled.
9540 proc check_effective_target_adx { } {
9541 return [check_no_compiler_messages adx object {
9543 _adxcarry_u32 (unsigned char __CF, unsigned int __X,
9544 unsigned int __Y, unsigned int *__P)
9546 return __builtin_ia32_addcarryx_u32 (__CF, __X, __Y, __P);
9551 # Return 1 if rtm instructions can be compiled.
9552 proc check_effective_target_rtm { } {
9553 return [check_no_compiler_messages rtm object {
9557 return __builtin_ia32_xend ();
9562 # Return 1 if avx512vl instructions can be compiled.
9563 proc check_effective_target_avx512vl { } {
9564 return [check_no_compiler_messages avx512vl object {
9565 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
9567 mm256_and_epi64 (__v4di __X, __v4di __Y)
9570 return __builtin_ia32_pandq256_mask (__X, __Y, __W, -1);
9575 # Return 1 if avx512cd instructions can be compiled.
9576 proc check_effective_target_avx512cd { } {
9577 return [check_no_compiler_messages avx512cd_trans object {
9578 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
9580 _mm512_conflict_epi64 (__v8di __W, __v8di __A)
9582 return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A,
9586 } "-Wno-psabi -mavx512cd" ]
9589 # Return 1 if avx512er instructions can be compiled.
9590 proc check_effective_target_avx512er { } {
9591 return [check_no_compiler_messages avx512er_trans object {
9592 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
9594 mm512_exp2a23_ps (__v16sf __X)
9596 return __builtin_ia32_exp2ps_mask (__X, __X, -1, 4);
9598 } "-Wno-psabi -mavx512er" ]
9601 # Return 1 if sha instructions can be compiled.
9602 proc check_effective_target_sha { } {
9603 return [check_no_compiler_messages sha object {
9604 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
9605 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9607 __m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y)
9609 return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X,
9615 # Return 1 if avx512dq instructions can be compiled.
9616 proc check_effective_target_avx512dq { } {
9617 return [check_no_compiler_messages avx512dq object {
9618 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
9620 _mm512_mask_mullo_epi64 (__v8di __W, __v8di __A, __v8di __B)
9622 return (__v8di) __builtin_ia32_pmullq512_mask ((__v8di) __A,
9630 # Return 1 if avx512bw instructions can be compiled.
9631 proc check_effective_target_avx512bw { } {
9632 return [check_no_compiler_messages avx512bw object {
9633 typedef short __v32hi __attribute__ ((__vector_size__ (64)));
9635 _mm512_mask_mulhrs_epi16 (__v32hi __W, __v32hi __A, __v32hi __B)
9637 return (__v32hi) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A,
9645 # Return 1 if -Wa,-march=+noavx512bw is supported.
9646 proc check_effective_target_assembler_march_noavx512bw {} {
9647 if { [istarget i?86*-*-*] || [istarget x86_64*-*-*] } {
9648 return [check_no_compiler_messages assembler_march_noavx512bw object {
9650 } "-mno-avx512bw -Wa,-march=+noavx512bw"]
9655 # Return 1 if avx512vp2intersect instructions can be compiled.
9656 proc check_effective_target_avx512vp2intersect { } {
9657 return [check_no_compiler_messages avx512vp2intersect object {
9658 typedef int __v16si __attribute__ ((__vector_size__ (64)));
9659 typedef short __mmask16;
9661 _mm512_2intersect_epi32 (__v16si __A, __v16si __B, __mmask16 *__U,
9664 __builtin_ia32_2intersectd512 (__U, __M, (__v16si) __A, (__v16si) __B);
9666 } "-mavx512vp2intersect" ]
9669 # Return 1 if avx512ifma instructions can be compiled.
9670 proc check_effective_target_avx512ifma { } {
9671 return [check_no_compiler_messages avx512ifma object {
9672 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
9674 _mm512_madd52lo_epu64 (__v8di __X, __v8di __Y, __v8di __Z)
9676 return (__v8di) __builtin_ia32_vpmadd52luq512_mask ((__v8di) __X,
9684 # Return 1 if avx512vbmi instructions can be compiled.
9685 proc check_effective_target_avx512vbmi { } {
9686 return [check_no_compiler_messages avx512vbmi object {
9687 typedef char __v64qi __attribute__ ((__vector_size__ (64)));
9689 _mm512_multishift_epi64_epi8 (__v64qi __X, __v64qi __Y)
9691 return (__v64qi) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
9699 # Return 1 if avx512_4fmaps instructions can be compiled.
9700 proc check_effective_target_avx5124fmaps { } {
9701 return [check_no_compiler_messages avx5124fmaps object {
9702 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
9703 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
9706 _mm512_mask_4fmadd_ps (__v16sf __DEST, __v16sf __A, __v16sf __B, __v16sf __C,
9707 __v16sf __D, __v16sf __E, __v4sf *__F)
9709 return (__v16sf) __builtin_ia32_4fmaddps_mask ((__v16sf) __A,
9714 (const __v4sf *) __F,
9718 } "-mavx5124fmaps" ]
9721 # Return 1 if avx512_4vnniw instructions can be compiled.
9722 proc check_effective_target_avx5124vnniw { } {
9723 return [check_no_compiler_messages avx5124vnniw object {
9724 typedef int __v16si __attribute__ ((__vector_size__ (64)));
9725 typedef int __v4si __attribute__ ((__vector_size__ (16)));
9728 _mm512_4dpwssd_epi32 (__v16si __A, __v16si __B, __v16si __C,
9729 __v16si __D, __v16si __E, __v4si *__F)
9731 return (__v16si) __builtin_ia32_vp4dpwssd ((__v16si) __B,
9736 (const __v4si *) __F);
9738 } "-mavx5124vnniw" ]
9741 # Return 1 if avx512_vpopcntdq instructions can be compiled.
9742 proc check_effective_target_avx512vpopcntdq { } {
9743 return [check_no_compiler_messages avx512vpopcntdq object {
9744 typedef int __v16si __attribute__ ((__vector_size__ (64)));
9747 _mm512_popcnt_epi32 (__v16si __A)
9749 return (__v16si) __builtin_ia32_vpopcountd_v16si ((__v16si) __A);
9751 } "-mavx512vpopcntdq" ]
9754 # Return 1 if 128 or 256-bit avx512_vpopcntdq instructions can be compiled.
9755 proc check_effective_target_avx512vpopcntdqvl { } {
9756 return [check_no_compiler_messages avx512vpopcntdqvl object {
9757 typedef int __v8si __attribute__ ((__vector_size__ (32)));
9760 _mm256_popcnt_epi32 (__v8si __A)
9762 return (__v8si) __builtin_ia32_vpopcountd_v8si ((__v8si) __A);
9764 } "-mavx512vpopcntdq -mavx512vl" ]
9767 # Return 1 if gfni instructions can be compiled.
9768 proc check_effective_target_gfni { } {
9769 return [check_no_compiler_messages gfni object {
9770 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
9773 _mm_gf2p8affineinv_epi64_epi8 (__v16qi __A, __v16qi __B, const int __C)
9775 return (__v16qi) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
9782 # Return 1 if avx512vbmi2 instructions can be compiled.
9783 proc check_effective_target_avx512vbmi2 { } {
9784 return [check_no_compiler_messages avx512vbmi2 object {
9785 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
9786 typedef unsigned long long __mmask16;
9789 _mm_mask_compress_epi8 (__v16qi __A, __mmask16 __B, __v16qi __C)
9791 return (__v16qi) __builtin_ia32_compressqi128_mask((__v16qi)__C,
9795 } "-mavx512vbmi2 -mavx512vl" ]
9798 # Return 1 if avx512vbmi2 instructions can be compiled.
9799 proc check_effective_target_avx512vnni { } {
9800 return [check_no_compiler_messages avx512vnni object {
9801 typedef int __v16si __attribute__ ((__vector_size__ (64)));
9804 _mm_mask_compress_epi8 (__v16si __A, __v16si __B, __v16si __C)
9806 return (__v16si) __builtin_ia32_vpdpbusd_v16si ((__v16si)__A,
9810 } "-mavx512vnni -mavx512f" ]
9813 # Return 1 if vaes instructions can be compiled.
9814 proc check_effective_target_avx512vaes { } {
9815 return [check_no_compiler_messages avx512vaes object {
9817 typedef int __v16si __attribute__ ((__vector_size__ (64)));
9820 _mm256_aesdec_epi128 (__v32qi __A, __v32qi __B)
9822 return (__v32qi)__builtin_ia32_vaesdec_v32qi ((__v32qi) __A, (__v32qi) __B);
9827 # Return 1 if amx-tile instructions can be compiled.
9828 proc check_effective_target_amx_tile { } {
9829 return [check_no_compiler_messages amx_tile object {
9833 __asm__ volatile ("tilerelease" ::);
9838 # Return 1 if amx-int8 instructions can be compiled.
9839 proc check_effective_target_amx_int8 { } {
9840 return [check_no_compiler_messages amx_int8 object {
9844 __asm__ volatile ("tdpbssd\t%%tmm1, %%tmm2, %%tmm3" ::);
9849 # Return 1 if amx-bf16 instructions can be compiled.
9850 proc check_effective_target_amx_bf16 { } {
9851 return [check_no_compiler_messages amx_bf16 object {
9855 __asm__ volatile ("tdpbf16ps\t%%tmm1, %%tmm2, %%tmm3" ::);
9860 # Return 1 if vpclmulqdq instructions can be compiled.
9861 proc check_effective_target_vpclmulqdq { } {
9862 return [check_no_compiler_messages vpclmulqdq object {
9863 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
9866 _mm256_clmulepi64_epi128 (__v4di __A, __v4di __B)
9868 return (__v4di) __builtin_ia32_vpclmulqdq_v4di (__A, __B, 0);
9870 } "-mvpclmulqdq -mavx512vl" ]
9873 # Return 1 if avx512_bitalg instructions can be compiled.
9874 proc check_effective_target_avx512bitalg { } {
9875 return [check_no_compiler_messages avx512bitalg object {
9876 typedef short int __v32hi __attribute__ ((__vector_size__ (64)));
9879 _mm512_popcnt_epi16 (__v32hi __A)
9881 return (__v32hi) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
9883 } "-mavx512bitalg" ]
9886 # Return 1 if C wchar_t type is compatible with char16_t.
9888 proc check_effective_target_wchar_t_char16_t_compatible { } {
9889 return [check_no_compiler_messages wchar_t_char16_t object {
9891 __CHAR16_TYPE__ *p16 = &wc;
9892 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
9896 # Return 1 if C wchar_t type is compatible with char32_t.
9898 proc check_effective_target_wchar_t_char32_t_compatible { } {
9899 return [check_no_compiler_messages wchar_t_char32_t object {
9901 __CHAR32_TYPE__ *p32 = &wc;
9902 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
9906 # Return 1 if pow10 function exists.
9908 proc check_effective_target_pow10 { } {
9909 return [check_runtime pow10 {
9919 # Return 1 if frexpl function exists.
9921 proc check_effective_target_frexpl { } {
9922 return [check_runtime frexpl {
9927 x = frexpl (5.0, &y);
9934 # Return 1 if issignaling function exists.
9935 proc check_effective_target_issignaling {} {
9936 return [check_runtime issignaling {
9941 return issignaling (0.0);
9946 # Return 1 if current options generate DFP instructions, 0 otherwise.
9947 proc check_effective_target_hard_dfp {} {
9948 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
9949 typedef float d64 __attribute__((mode(DD)));
9951 void foo (void) { z = x + y; }
9955 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
9956 # for strchr etc. functions.
9958 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
9959 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
9962 #if !defined(__cplusplus) \
9963 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
9964 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
9965 ISO C++ correct string.h and wchar.h protos not supported.
9972 # Return 1 if GNU as is used.
9974 proc check_effective_target_gas { } {
9975 global use_gas_saved
9978 if {![info exists use_gas_saved]} {
9979 # Check if the as used by gcc is GNU as.
9980 set options [list "additional_flags=-print-prog-name=as"]
9981 set gcc_as [lindex [${tool}_target_compile "" "" "none" $options] 0]
9982 # Provide /dev/null as input, otherwise gas times out reading from
9984 set status [remote_exec host "$gcc_as" "-v /dev/null"]
9985 set as_output [lindex $status 1]
9986 if { [ string first "GNU" $as_output ] >= 0 } {
9987 # Some Darwin versions have an assembler which is based on an old
9988 # version of GAS (and reports GNU assembler in its -v output) but
9989 #Â but doesn't support many of the modern GAS features.
9990 if { [ string first "cctools" $as_output ] >= 0 } {
9999 return $use_gas_saved
10002 # Return 1 if GNU ld is used.
10004 proc check_effective_target_gld { } {
10005 global use_gld_saved
10008 if {![info exists use_gld_saved]} {
10009 # Check if the ld used by gcc is GNU ld.
10010 set options [list "additional_flags=-print-prog-name=ld"]
10011 set gcc_ld [lindex [${tool}_target_compile "" "" "none" $options] 0]
10012 set status [remote_exec host "$gcc_ld" "--version"]
10013 set ld_output [lindex $status 1]
10014 if { [ string first "GNU" $ld_output ] >= 0 } {
10015 set use_gld_saved 1
10017 set use_gld_saved 0
10020 return $use_gld_saved
10023 # Return 1 if the compiler has been configure with link-time optimization
10026 proc check_effective_target_lto { } {
10027 if { [istarget *-*-vxworks*] } {
10028 # No LTO on VxWorks, with kernel modules
10029 # built with partial links
10032 if { [istarget nvptx-*-*]
10033 || [istarget amdgcn-*-*] } {
10036 return [check_no_compiler_messages lto object {
10037 void foo (void) { }
10041 # Return 1 if the compiler and linker support incremental link-time
10044 proc check_effective_target_lto_incremental { } {
10045 if ![check_effective_target_lto] {
10048 return [check_no_compiler_messages lto_incremental executable {
10049 int main () { return 0; }
10050 } "-flto -r -nostdlib"]
10053 # Return 1 if the compiler has been configured with analyzer support.
10055 proc check_effective_target_analyzer { } {
10056 return [check_no_compiler_messages analyzer object {
10057 void foo (void) { }
10061 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
10063 proc check_effective_target_maybe_x32 { } {
10064 return [check_no_compiler_messages maybe_x32 object {
10066 } "-mx32 -maddress-mode=short"]
10069 # Return 1 if this target supports the -fsplit-stack option, 0
10072 proc check_effective_target_split_stack {} {
10073 return [check_no_compiler_messages split_stack object {
10074 void foo (void) { }
10078 # Return 1 if this target supports the -masm=intel option, 0
10081 proc check_effective_target_masm_intel {} {
10082 return [check_no_compiler_messages masm_intel object {
10083 extern void abort (void);
10087 # Return 1 if the language for the compiler under test is C.
10089 proc check_effective_target_c { } {
10091 if [string match $tool "gcc"] {
10097 # Return 1 if the language for the compiler under test is C++.
10099 proc check_effective_target_c++ { } {
10101 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
10107 set cxx_default "c++17"
10108 # Check whether the current active language standard supports the features
10109 # of C++11/C++14 by checking for the presence of one of the -std flags.
10110 # This assumes that the default for the compiler is $cxx_default, and that
10111 # there will never be multiple -std= arguments on the command line.
10112 proc check_effective_target_c++11_only { } {
10114 if ![check_effective_target_c++] {
10117 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
10120 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
10125 proc check_effective_target_c++11 { } {
10126 if [check_effective_target_c++11_only] {
10129 return [check_effective_target_c++14]
10131 proc check_effective_target_c++11_down { } {
10132 if ![check_effective_target_c++] {
10135 return [expr ![check_effective_target_c++14] ]
10138 proc check_effective_target_c++14_only { } {
10140 if ![check_effective_target_c++] {
10143 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
10146 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
10152 proc check_effective_target_c++14 { } {
10153 if [check_effective_target_c++14_only] {
10156 return [check_effective_target_c++17]
10158 proc check_effective_target_c++14_down { } {
10159 if ![check_effective_target_c++] {
10162 return [expr ![check_effective_target_c++17] ]
10165 proc check_effective_target_c++98_only { } {
10167 if ![check_effective_target_c++] {
10170 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
10173 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
10179 proc check_effective_target_c++17_only { } {
10181 if ![check_effective_target_c++] {
10184 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
10187 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
10193 proc check_effective_target_c++17 { } {
10194 if [check_effective_target_c++17_only] {
10197 return [check_effective_target_c++2a]
10199 proc check_effective_target_c++17_down { } {
10200 if ![check_effective_target_c++] {
10203 return [expr ![check_effective_target_c++2a] ]
10206 proc check_effective_target_c++2a_only { } {
10208 if ![check_effective_target_c++] {
10211 if [check-flags { { } { } { -std=c++2a -std=gnu++2a -std=c++20 -std=gnu++20 } }] {
10214 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
10219 proc check_effective_target_c++2a { } {
10220 if [check_effective_target_c++2a_only] {
10223 return [check_effective_target_c++23]
10226 proc check_effective_target_c++20_only { } {
10227 return [check_effective_target_c++2a_only]
10230 proc check_effective_target_c++20 { } {
10231 return [check_effective_target_c++2a]
10233 proc check_effective_target_c++20_down { } {
10234 if ![check_effective_target_c++] {
10237 return [expr ![check_effective_target_c++23] ]
10240 proc check_effective_target_c++23_only { } {
10242 if ![check_effective_target_c++] {
10245 if [check-flags { { } { } { -std=c++23 -std=gnu++23 -std=c++2b -std=gnu++2b } }] {
10248 if { $cxx_default == "c++23" && [check-flags { { } { } { } { -std=* } }] } {
10253 proc check_effective_target_c++23 { } {
10254 return [check_effective_target_c++23_only]
10257 # Check for C++ Concepts support, i.e. -fconcepts flag.
10258 proc check_effective_target_concepts { } {
10259 if [check_effective_target_c++2a] {
10262 return [check-flags { "" { } { -fconcepts } }]
10265 proc check_effective_target_implicit_constexpr { } {
10266 return [check-flags { "" { } { -fimplicit-constexpr } }]
10269 # Return 1 if expensive testcases should be run.
10271 proc check_effective_target_run_expensive_tests { } {
10272 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
10278 # Returns 1 if "mempcpy" is available on the target system.
10280 proc check_effective_target_mempcpy {} {
10281 if { [istarget *-*-vxworks*] } {
10282 # VxWorks doesn't have mempcpy but our way to test fails
10283 # to detect as we're doing partial links for kernel modules.
10286 return [check_function_available "mempcpy"]
10289 # Returns 1 if "stpcpy" is available on the target system.
10291 proc check_effective_target_stpcpy {} {
10292 return [check_function_available "stpcpy"]
10295 # Returns 1 if "sigsetjmp" is available on the target system.
10296 # Also check if "__sigsetjmp" is defined since that's what glibc
10299 proc check_effective_target_sigsetjmp {} {
10300 if { [check_function_available "sigsetjmp"]
10301 || [check_function_available "__sigsetjmp"] } {
10307 # Check whether the vectorizer tests are supported by the target and
10308 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
10309 # If a port wants to execute the tests more than once it should append
10310 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
10311 # will be added by a call to add_options_for_<target>.
10312 # Set dg-do-what-default to either compile or run, depending on target
10313 # capabilities. Do not set this if the supported target is appended to
10314 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
10315 # automatically. Return the number of effective targets if vectorizer tests
10316 # are supported, 0 otherwise.
10318 proc check_vect_support_and_set_flags { } {
10319 global DEFAULT_VECTCFLAGS
10320 global dg-do-what-default
10321 global EFFECTIVE_TARGETS
10323 if [istarget powerpc-*paired*] {
10324 lappend DEFAULT_VECTCFLAGS "-mpaired"
10325 if [check_750cl_hw_available] {
10326 set dg-do-what-default run
10328 set dg-do-what-default compile
10330 } elseif [istarget powerpc*-*-*] {
10331 # Skip targets not supporting -maltivec.
10332 if ![is-effective-target powerpc_altivec_ok] {
10336 lappend DEFAULT_VECTCFLAGS "-maltivec"
10337 if [check_p9vector_hw_available] {
10338 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
10339 } elseif [check_p8vector_hw_available] {
10340 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
10341 } elseif [check_vsx_hw_available] {
10342 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
10345 if [check_vmx_hw_available] {
10346 set dg-do-what-default run
10348 if [is-effective-target ilp32] {
10349 # Specify a cpu that supports VMX for compile-only tests.
10350 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
10352 set dg-do-what-default compile
10354 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
10355 lappend DEFAULT_VECTCFLAGS "-msse2"
10356 if { [check_effective_target_sse2_runtime] } {
10357 set dg-do-what-default run
10359 set dg-do-what-default compile
10361 } elseif { [istarget mips*-*-*]
10362 && [check_effective_target_nomips16] } {
10363 if { [check_effective_target_mpaired_single] } {
10364 lappend EFFECTIVE_TARGETS mpaired_single
10366 if { [check_effective_target_mips_loongson_mmi] } {
10367 lappend EFFECTIVE_TARGETS mips_loongson_mmi
10369 if { [check_effective_target_mips_msa] } {
10370 lappend EFFECTIVE_TARGETS mips_msa
10372 return [llength $EFFECTIVE_TARGETS]
10373 } elseif [istarget sparc*-*-*] {
10374 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
10375 if [check_effective_target_ultrasparc_hw] {
10376 set dg-do-what-default run
10378 set dg-do-what-default compile
10380 } elseif [istarget alpha*-*-*] {
10381 # Alpha's vectorization capabilities are extremely limited.
10382 # It's more effort than its worth disabling all of the tests
10383 # that it cannot pass. But if you actually want to see what
10384 # does work, command out the return.
10387 lappend DEFAULT_VECTCFLAGS "-mmax"
10388 if [check_alpha_max_hw_available] {
10389 set dg-do-what-default run
10391 set dg-do-what-default compile
10393 } elseif [istarget ia64-*-*] {
10394 set dg-do-what-default run
10395 } elseif [is-effective-target arm_neon_ok] {
10396 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
10397 # NEON does not support denormals, so is not used for vectorization by
10398 # default to avoid loss of precision. We must pass -ffast-math to test
10399 # vectorization of float operations.
10400 lappend DEFAULT_VECTCFLAGS "-ffast-math"
10401 if [is-effective-target arm_neon_hw] {
10402 set dg-do-what-default run
10404 set dg-do-what-default compile
10406 } elseif [istarget "aarch64*-*-*"] {
10407 set dg-do-what-default run
10408 } elseif [istarget s390*-*-*] {
10409 # The S/390 backend set a default of 2 for that value.
10410 # Override it to have the same situation as with other
10412 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
10413 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
10414 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
10415 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
10416 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
10417 if [check_effective_target_s390_vxe2] {
10418 lappend DEFAULT_VECTCFLAGS "-march=z15" "-mzarch"
10419 set dg-do-what-default run
10420 } elseif [check_effective_target_s390_vxe] {
10421 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
10422 set dg-do-what-default run
10423 } elseif [check_effective_target_s390_vx] {
10424 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
10425 set dg-do-what-default run
10427 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
10428 set dg-do-what-default compile
10430 } elseif [istarget amdgcn-*-*] {
10431 set dg-do-what-default run
10439 # Return 1 if the target does *not* require strict alignment.
10441 proc check_effective_target_non_strict_align {} {
10443 # On ARM, the default is to use STRICT_ALIGNMENT, but there
10444 # are interfaces defined for misaligned access and thus
10445 # depending on the architecture levels unaligned access is
10447 if [istarget "arm*-*-*"] {
10448 return [check_effective_target_arm_unaligned]
10451 return [check_no_compiler_messages non_strict_align assembly {
10453 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
10455 void foo(void) { z = (c *) y; }
10459 # Return 1 if the target has <ucontext.h>.
10461 proc check_effective_target_ucontext_h { } {
10462 return [check_no_compiler_messages ucontext_h assembly {
10463 #include <ucontext.h>
10467 proc check_effective_target_aarch64_tiny { } {
10468 if { [istarget aarch64*-*-*] } {
10469 return [check_no_compiler_messages aarch64_tiny object {
10470 #ifdef __AARCH64_CMODEL_TINY__
10473 #error target not AArch64 tiny code model
10481 # Create functions to check that the AArch64 assembler supports the
10482 # various architecture extensions via the .arch_extension pseudo-op.
10484 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"
10485 "i8mm" "f32mm" "f64mm" "bf16" "sb" "sve2" } {
10486 eval [string map [list FUNC $aarch64_ext] {
10487 proc check_effective_target_aarch64_asm_FUNC_ok { } {
10488 if { [istarget aarch64*-*-*] } {
10489 return [check_no_compiler_messages aarch64_FUNC_assembler object {
10490 __asm__ (".arch_extension FUNC");
10491 } "-march=armv8-a+FUNC"]
10499 proc check_effective_target_aarch64_small { } {
10500 if { [istarget aarch64*-*-*] } {
10501 return [check_no_compiler_messages aarch64_small object {
10502 #ifdef __AARCH64_CMODEL_SMALL__
10505 #error target not AArch64 small code model
10513 proc check_effective_target_aarch64_large { } {
10514 if { [istarget aarch64*-*-*] } {
10515 return [check_no_compiler_messages aarch64_large object {
10516 #ifdef __AARCH64_CMODEL_LARGE__
10519 #error target not AArch64 large code model
10527 # Return 1 if the assembler accepts the aarch64 .variant_pcs directive.
10529 proc check_effective_target_aarch64_variant_pcs { } {
10530 if { [istarget aarch64*-*-*] } {
10531 return [check_no_compiler_messages aarch64_variant_pcs object {
10532 __asm__ (".variant_pcs foo");
10539 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
10540 # register set, instruction set, addressing capabilities and ABI.
10542 proc check_effective_target_avr_tiny { } {
10543 if { [istarget avr*-*-*] } {
10544 return [check_no_compiler_messages avr_tiny object {
10545 #ifdef __AVR_TINY__
10548 #error target not a reduced AVR Tiny core
10556 # Return 1 if <fenv.h> is available.
10558 proc check_effective_target_fenv {} {
10559 return [check_no_compiler_messages fenv object {
10561 } [add_options_for_ieee "-std=gnu99"]]
10564 # Return 1 if <fenv.h> is available with all the standard IEEE
10565 # exceptions and floating-point exceptions are raised by arithmetic
10566 # operations. (If the target requires special options for "inexact"
10567 # exceptions, those need to be specified in the testcases.)
10569 proc check_effective_target_fenv_exceptions {} {
10570 return [check_runtime fenv_exceptions {
10572 #include <stdlib.h>
10573 #ifndef FE_DIVBYZERO
10574 # error Missing FE_DIVBYZERO
10577 # error Missing FE_INEXACT
10580 # error Missing FE_INVALID
10582 #ifndef FE_OVERFLOW
10583 # error Missing FE_OVERFLOW
10585 #ifndef FE_UNDERFLOW
10586 # error Missing FE_UNDERFLOW
10588 volatile float a = 0.0f, r;
10593 if (fetestexcept (FE_INVALID))
10598 } [add_options_for_ieee "-std=gnu99"]]
10601 # Return 1 if <fenv.h> is available with all the standard IEEE
10602 # exceptions and floating-point exceptions are raised by arithmetic
10603 # operations for decimal floating point. (If the target requires
10604 # special options for "inexact" exceptions, those need to be specified
10605 # in the testcases.)
10607 proc check_effective_target_fenv_exceptions_dfp {} {
10608 return [check_runtime fenv_exceptions_dfp {
10610 #include <stdlib.h>
10611 #ifndef FE_DIVBYZERO
10612 # error Missing FE_DIVBYZERO
10615 # error Missing FE_INEXACT
10618 # error Missing FE_INVALID
10620 #ifndef FE_OVERFLOW
10621 # error Missing FE_OVERFLOW
10623 #ifndef FE_UNDERFLOW
10624 # error Missing FE_UNDERFLOW
10626 volatile _Decimal64 a = 0.0DD, r;
10631 if (fetestexcept (FE_INVALID))
10636 } [add_options_for_ieee "-std=gnu99"]]
10639 # Return 1 if -fexceptions is supported.
10641 proc check_effective_target_exceptions {} {
10642 if { [istarget amdgcn*-*-*] } {
10648 # Used to check if the testing configuration supports exceptions.
10649 # Returns 0 if exceptions are unsupported or disabled (e.g. by passing
10650 # -fno-exceptions). Returns 1 if exceptions are enabled.
10651 proc check_effective_target_exceptions_enabled {} {
10652 return [check_cached_effective_target exceptions_enabled {
10653 if { [check_effective_target_exceptions] } {
10654 return [check_no_compiler_messages exceptions_enabled assembly {
10662 # If exceptions aren't supported, then they're not enabled.
10668 proc check_effective_target_tiny {} {
10669 return [check_cached_effective_target tiny {
10670 if { [istarget aarch64*-*-*]
10671 && [check_effective_target_aarch64_tiny] } {
10674 if { [istarget avr-*-*]
10675 && [check_effective_target_avr_tiny] } {
10678 # PRU Program Counter is 16-bits, and trampolines are not supported.
10679 # Hence directly declare as a tiny target.
10680 if [istarget pru-*-*] {
10687 # Return 1 if the target supports -mbranch-cost=N option.
10689 proc check_effective_target_branch_cost {} {
10690 if { [ istarget arm*-*-*]
10691 || [istarget avr*-*-*]
10692 || [istarget csky*-*-*]
10693 || [istarget epiphany*-*-*]
10694 || [istarget frv*-*-*]
10695 || [istarget i?86-*-*] || [istarget x86_64-*-*]
10696 || [istarget mips*-*-*]
10697 || [istarget s390*-*-*]
10698 || [istarget riscv*-*-*]
10699 || [istarget sh*-*-*] } {
10705 # Record that dg-final test TEST requires convential compilation.
10707 proc force_conventional_output_for { test } {
10708 if { [info proc $test] == "" } {
10709 perror "$test does not exist"
10712 proc ${test}_required_options {} {
10713 global gcc_force_conventional_output
10714 upvar 1 extra_tool_flags extra_tool_flags
10715 if {[regexp -- "^scan-assembler" [info level 0]]
10716 && ![string match "*-fident*" $extra_tool_flags]} {
10717 # Do not let .ident confuse assembler scan tests
10718 return [list $gcc_force_conventional_output "-fno-ident"]
10720 return $gcc_force_conventional_output
10724 # Record that dg-final test scan-ltrans-tree-dump* requires -flto-partition=one
10725 # in order to force a single partition, allowing scan-ltrans-tree-dump* to scan
10726 # a dump file *.exe.ltrans0.*.
10728 proc scan-ltrans-tree-dump_required_options {} {
10729 return "-flto-partition=one"
10731 proc scan-ltrans-tree-dump-times_required_options {} {
10732 return "-flto-partition=one"
10734 proc scan-ltrans-tree-dump-not_required_options {} {
10735 return "-flto-partition=one"
10737 proc scan-ltrans-tree-dump-dem_required_options {} {
10738 return "-flto-partition=one"
10740 proc scan-ltrans-tree-dump-dem-not_required_options {} {
10741 return "-flto-partition=one"
10744 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
10745 # otherwise. Cache the result.
10747 proc check_effective_target_pie_copyreloc { } {
10749 global GCC_UNDER_TEST
10751 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
10755 # Need auto-host.h to check linker support.
10756 if { ![file exists ../../auto-host.h ] } {
10760 return [check_cached_effective_target pie_copyreloc {
10761 # Set up and compile to see if linker supports PIE with copy
10762 # reloc. Include the current process ID in the file names to
10763 # prevent conflicts with invocations for multiple testsuites.
10768 set f [open $src "w"]
10769 puts $f "#include \"../../auto-host.h\""
10770 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
10771 puts $f "# error Linker does not support PIE with copy reloc."
10775 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
10776 set lines [${tool}_target_compile $src $obj object ""]
10781 if [string match "" $lines] then {
10782 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
10785 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
10791 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
10792 # otherwise. Cache the result.
10794 proc check_effective_target_got32x_reloc { } {
10796 global GCC_UNDER_TEST
10798 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
10802 # Need auto-host.h to check linker support.
10803 if { ![file exists ../../auto-host.h ] } {
10807 return [check_cached_effective_target got32x_reloc {
10808 # Include the current process ID in the file names to prevent
10809 # conflicts with invocations for multiple testsuites.
10811 set src got32x[pid].c
10812 set obj got32x[pid].o
10814 set f [open $src "w"]
10815 puts $f "#include \"../../auto-host.h\""
10816 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
10817 puts $f "# error Assembler does not support R_386_GOT32X."
10821 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
10822 set lines [${tool}_target_compile $src $obj object ""]
10827 if [string match "" $lines] then {
10828 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
10831 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
10836 return $got32x_reloc_available_saved
10839 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
10840 # 0 otherwise. Cache the result.
10842 proc check_effective_target_tls_get_addr_via_got { } {
10844 global GCC_UNDER_TEST
10846 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
10850 # Need auto-host.h to check linker support.
10851 if { ![file exists ../../auto-host.h ] } {
10855 return [check_cached_effective_target tls_get_addr_via_got {
10856 # Include the current process ID in the file names to prevent
10857 # conflicts with invocations for multiple testsuites.
10859 set src tls_get_addr_via_got[pid].c
10860 set obj tls_get_addr_via_got[pid].o
10862 set f [open $src "w"]
10863 puts $f "#include \"../../auto-host.h\""
10864 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
10865 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
10869 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
10870 set lines [${tool}_target_compile $src $obj object ""]
10875 if [string match "" $lines] then {
10876 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
10879 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
10885 # Return 1 if the target uses comdat groups.
10887 proc check_effective_target_comdat_group {} {
10888 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat|\.group\[^\n\r]*,#comdat" assembly {
10890 inline int foo () { return 1; }
10891 int (*fn) () = foo;
10895 # Return 1 if target supports __builtin_eh_return
10896 proc check_effective_target_builtin_eh_return { } {
10897 return [check_no_compiler_messages builtin_eh_return object {
10898 void test (long l, void *p)
10900 __builtin_eh_return (l, p);
10905 # Return 1 if the target supports max reduction for vectors.
10907 proc check_effective_target_vect_max_reduc { } {
10908 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
10914 # Return 1 if the compiler has been configured with nvptx offloading.
10916 proc check_effective_target_offload_nvptx { } {
10917 return [check_no_compiler_messages offload_nvptx assembly {
10918 int main () {return 0;}
10919 } "-foffload=nvptx-none" ]
10922 # Return 1 if the compiler has been configured with gcn offloading.
10924 proc check_effective_target_offload_gcn { } {
10925 return [check_no_compiler_messages offload_gcn assembly {
10926 int main () {return 0;}
10927 } "-foffload=amdgcn-amdhsa" ]
10930 # Return 1 if the target support -fprofile-update=atomic
10931 proc check_effective_target_profile_update_atomic {} {
10932 return [check_no_compiler_messages profile_update_atomic assembly {
10933 int main (void) { return 0; }
10934 } "-fprofile-update=atomic -fprofile-generate"]
10937 # Return 1 if vector (va - vector add) instructions are understood by
10938 # the assembler and can be executed. This also covers checking for
10939 # the VX kernel feature. A kernel without that feature does not
10940 # enable the vector facility and the following check will die with a
10942 proc check_effective_target_s390_vx { } {
10943 if ![istarget s390*-*-*] then {
10947 return [check_runtime s390_check_vx {
10950 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
10953 } "-march=z13 -mzarch" ]
10956 # Same as above but for the z14 vector enhancement facility. Test
10957 # is performed with the vector nand instruction.
10958 proc check_effective_target_s390_vxe { } {
10959 if ![istarget s390*-*-*] then {
10963 return [check_runtime s390_check_vxe {
10966 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
10969 } "-march=z14 -mzarch" ]
10972 # Same as above but for the arch13 vector enhancement facility. Test
10973 # is performed with the vector shift left double by bit instruction.
10974 proc check_effective_target_s390_vxe2 { } {
10975 if ![istarget s390*-*-*] then {
10979 return [check_runtime s390_check_vxe2 {
10982 asm ("vsld %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
10985 } "-march=arch13 -mzarch" ]
10988 # Same as above but for the arch14 NNPA facility.
10989 proc check_effective_target_s390_nnpa { } {
10990 if ![istarget s390*-*-*] then {
10994 return [check_runtime s390_check_nnpa {
10997 asm ("vzero %%v24\n\t"
10998 "vcrnf %%v24,%%v24,%%v24,0,2" : : : "v24");
11001 } "-march=arch14 -mzarch" ]
11004 #For versions of ARM architectures that have hardware div insn,
11005 #disable the divmod transform
11007 proc check_effective_target_arm_divmod_simode { } {
11008 return [check_no_compiler_messages arm_divmod assembly {
11009 #ifdef __ARM_ARCH_EXT_IDIV__
11010 #error has div insn
11016 # Return 1 if target supports divmod hardware insn or divmod libcall.
11018 proc check_effective_target_divmod { } {
11019 #TODO: Add checks for all targets that have either hardware divmod insn
11020 # or define libfunc for divmod.
11021 if { [istarget arm*-*-*]
11022 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
11028 # Return 1 if target supports divmod for SImode. The reason for
11029 # separating this from check_effective_target_divmod is that
11030 # some versions of ARM architecture define div instruction
11031 # only for simode, and for these archs, we do not want to enable
11032 # divmod transform for simode.
11034 proc check_effective_target_divmod_simode { } {
11035 if { [istarget arm*-*-*] } {
11036 return [check_effective_target_arm_divmod_simode]
11039 return [check_effective_target_divmod]
11042 # Return 1 if store merging optimization is applicable for target.
11043 # Store merging is not profitable for targets like the avr which
11044 # can load/store only one byte at a time. Use int size as a proxy
11045 # for the number of bytes the target can write, and skip for targets
11046 # with a smallish (< 32) size.
11048 proc check_effective_target_store_merge { } {
11049 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
11056 # Return 1 if we're able to assemble rdrand
11058 proc check_effective_target_rdrand { } {
11059 return [check_no_compiler_messages_nocache rdrand object {
11064 __builtin_ia32_rdrand32_step(&val);
11070 # Return 1 if the target supports coprocessor instructions: cdp, ldc, ldcl,
11071 # stc, stcl, mcr and mrc.
11072 proc check_effective_target_arm_coproc1_ok_nocache { } {
11073 if { ![istarget arm*-*-*] } {
11076 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
11077 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
11080 #include <arm_acle.h>
11084 proc check_effective_target_arm_coproc1_ok { } {
11085 return [check_cached_effective_target arm_coproc1_ok \
11086 check_effective_target_arm_coproc1_ok_nocache]
11089 # Return 1 if the target supports all coprocessor instructions checked by
11090 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
11091 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
11092 proc check_effective_target_arm_coproc2_ok_nocache { } {
11093 if { ![check_effective_target_arm_coproc1_ok] } {
11096 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
11097 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 5
11100 #include <arm_acle.h>
11104 proc check_effective_target_arm_coproc2_ok { } {
11105 return [check_cached_effective_target arm_coproc2_ok \
11106 check_effective_target_arm_coproc2_ok_nocache]
11109 # Return 1 if the target supports all coprocessor instructions checked by
11110 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
11112 proc check_effective_target_arm_coproc3_ok_nocache { } {
11113 if { ![check_effective_target_arm_coproc2_ok] } {
11116 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
11117 #if (__thumb__ && !__thumb2__) \
11118 || (__ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__))
11121 #include <arm_acle.h>
11125 proc check_effective_target_arm_coproc3_ok { } {
11126 return [check_cached_effective_target arm_coproc3_ok \
11127 check_effective_target_arm_coproc3_ok_nocache]
11130 # Return 1 if the target supports all coprocessor instructions checked by
11131 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
11133 proc check_effective_target_arm_coproc4_ok_nocache { } {
11134 if { ![check_effective_target_arm_coproc3_ok] } {
11137 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
11138 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 6
11141 #include <arm_acle.h>
11145 proc check_effective_target_arm_coproc4_ok { } {
11146 return [check_cached_effective_target arm_coproc4_ok \
11147 check_effective_target_arm_coproc4_ok_nocache]
11150 # Return 1 if the target supports the auto_inc_dec optimization pass.
11151 proc check_effective_target_autoincdec { } {
11152 if { ![check_no_compiler_messages auto_incdec assembly { void f () { }
11153 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
11157 set dumpfile [glob -nocomplain "auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
11158 if { [file exists $dumpfile ] } {
11159 file delete $dumpfile
11165 # Return 1 if the target has support for stack probing designed
11166 # to avoid stack-clash style attacks.
11168 # This is used to restrict the stack-clash mitigation tests to
11169 # just those targets that have been explicitly supported.
11171 # In addition to the prologue work on those targets, each target's
11172 # properties should be described in the functions below so that
11173 # tests do not become a mess of unreadable target conditions.
11175 proc check_effective_target_supports_stack_clash_protection { } {
11177 if { [istarget x86_64-*-*] || [istarget i?86-*-*]
11178 || [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
11179 || [istarget aarch64*-**] || [istarget s390*-*-*] } {
11185 # Return 1 if the target creates a frame pointer for non-leaf functions
11186 # Note we ignore cases where we apply tail call optimization here.
11187 proc check_effective_target_frame_pointer_for_non_leaf { } {
11188 # Solaris/x86 defaults to -fno-omit-frame-pointer.
11189 if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {
11196 # Return 1 if the target's calling sequence or its ABI
11197 # create implicit stack probes at or prior to function entry.
11198 proc check_effective_target_caller_implicit_probes { } {
11200 # On x86/x86_64 the call instruction itself pushes the return
11201 # address onto the stack. That is an implicit probe of *sp.
11202 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
11206 # On PPC, the ABI mandates that the address of the outer
11207 # frame be stored at *sp. Thus each allocation of stack
11208 # space is itself an implicit probe of *sp.
11209 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
11213 # s390's ABI has a register save area allocated by the
11214 # caller for use by the callee. The mere existence does
11215 # not constitute a probe by the caller, but when the slots
11216 # used by the callee those stores are implicit probes.
11217 if { [istarget s390*-*-*] } {
11221 # Not strictly true on aarch64, but we have agreed that we will
11222 # consider any function that pushes SP more than 3kbytes into
11223 # the guard page as broken. This essentially means that we can
11224 # consider the aarch64 as having a caller implicit probe at
11226 if { [istarget aarch64*-*-*] } {
11233 # Targets that potentially realign the stack pointer often cause residual
11234 # stack allocations and make it difficult to elimination loops or residual
11235 # allocations for dynamic stack allocations
11236 proc check_effective_target_callee_realigns_stack { } {
11237 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
11243 # Return 1 if CET instructions can be compiled.
11244 proc check_effective_target_cet { } {
11245 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
11248 return [check_no_compiler_messages cet object {
11253 } "-O2 -fcf-protection" ]
11256 # Return 1 if target supports floating point "infinite"
11257 proc check_effective_target_inf { } {
11258 return [check_no_compiler_messages supports_inf assembly {
11259 const double pinf = __builtin_inf ();
11263 # Return 1 if target supports floating point "infinite" for float.
11264 proc check_effective_target_inff { } {
11265 return [check_no_compiler_messages supports_inff assembly {
11266 const float pinf = __builtin_inff ();
11270 # Return 1 if the target supports ARMv8.3 Adv.SIMD Complex instructions
11271 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
11272 # Record the command line options needed.
11274 proc check_effective_target_arm_v8_3a_complex_neon_ok_nocache { } {
11275 global et_arm_v8_3a_complex_neon_flags
11276 set et_arm_v8_3a_complex_neon_flags ""
11278 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
11282 # Iterate through sets of options to find the compiler flags that
11283 # need to be added to the -march option.
11284 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
11285 if { [check_no_compiler_messages_nocache \
11286 arm_v8_3a_complex_neon_ok assembly {
11287 #if !defined (__ARM_FEATURE_COMPLEX)
11288 #error "__ARM_FEATURE_COMPLEX not defined"
11290 } "$flags -march=armv8.3-a"] } {
11291 set et_arm_v8_3a_complex_neon_flags "$flags -march=armv8.3-a"
11299 proc check_effective_target_arm_v8_3a_complex_neon_ok { } {
11300 return [check_cached_effective_target arm_v8_3a_complex_neon_ok \
11301 check_effective_target_arm_v8_3a_complex_neon_ok_nocache]
11304 proc add_options_for_arm_v8_3a_complex_neon { flags } {
11305 if { ! [check_effective_target_arm_v8_3a_complex_neon_ok] } {
11308 global et_arm_v8_3a_complex_neon_flags
11309 return "$flags $et_arm_v8_3a_complex_neon_flags"
11312 # Return 1 if the target supports ARMv8.3 Adv.SIMD + FP16 Complex instructions
11313 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
11314 # Record the command line options needed.
11316 proc check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache { } {
11317 global et_arm_v8_3a_fp16_complex_neon_flags
11318 set et_arm_v8_3a_fp16_complex_neon_flags ""
11320 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
11324 # Iterate through sets of options to find the compiler flags that
11325 # need to be added to the -march option.
11326 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
11327 if { [check_no_compiler_messages_nocache \
11328 arm_v8_3a_fp16_complex_neon_ok assembly {
11329 #if !defined (__ARM_FEATURE_COMPLEX)
11330 #error "__ARM_FEATURE_COMPLEX not defined"
11332 } "$flags -march=armv8.3-a+fp16"] } {
11333 set et_arm_v8_3a_fp16_complex_neon_flags \
11334 "$flags -march=armv8.3-a+fp16"
11342 proc check_effective_target_arm_v8_3a_fp16_complex_neon_ok { } {
11343 return [check_cached_effective_target arm_v8_3a_fp16_complex_neon_ok \
11344 check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache]
11347 proc add_options_for_arm_v8_3a_fp16_complex_neon { flags } {
11348 if { ! [check_effective_target_arm_v8_3a_fp16_complex_neon_ok] } {
11351 global et_arm_v8_3a_fp16_complex_neon_flags
11352 return "$flags $et_arm_v8_3a_fp16_complex_neon_flags"
11356 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.3
11357 # with the complex instruction extension, 0 otherwise. The test is valid for
11358 # ARM and for AArch64.
11360 proc check_effective_target_arm_v8_3a_complex_neon_hw { } {
11361 if { ![check_effective_target_arm_v8_3a_complex_neon_ok] } {
11364 return [check_runtime arm_v8_3a_complex_neon_hw_available {
11365 #include "arm_neon.h"
11370 float32x2_t results = {-4.0,5.0};
11371 float32x2_t a = {1.0,3.0};
11372 float32x2_t b = {2.0,5.0};
11374 #ifdef __ARM_ARCH_ISA_A64
11375 asm ("fcadd %0.2s, %1.2s, %2.2s, #90"
11378 : /* No clobbers. */);
11381 asm ("vcadd.f32 %P0, %P1, %P2, #90"
11384 : /* No clobbers. */);
11387 return (results[0] == 8 && results[1] == 24) ? 0 : 1;
11389 } [add_options_for_arm_v8_3a_complex_neon ""]]
11392 # Return 1 if the assembler supports assembling the Armv8.3 pointer authentication B key directive
11393 proc check_effective_target_arm_v8_3a_bkey_directive { } {
11394 return [check_no_compiler_messages cet object {
11396 asm (".cfi_b_key_frame");
11402 # Return 1 if the target supports executing the Armv8.1-M Mainline Low
11403 # Overhead Loop, 0 otherwise. The test is valid for ARM.
11405 proc check_effective_target_arm_v8_1_lob_ok { } {
11406 if { ![check_effective_target_arm_cortex_m] } {
11409 return [check_runtime arm_v8_1_lob_hw_available {
11413 asm ("movw r3, #10\n\t" /* movs? */
11414 "dls lr, r3" : : : "r3", "lr");
11417 asm goto ("le lr, %l0" : : : "lr" : loop);
11420 } "-march=armv8.1-m.main -mthumb" ]
11424 # Return 1 if this is an ARM target where Thumb-2 is used without
11425 # options added by the test and the target does not support executing
11426 # the Armv8.1-M Mainline Low Overhead Loop, 0 otherwise. The test is
11429 proc check_effective_target_arm_thumb2_no_arm_v8_1_lob { } {
11430 if { [check_effective_target_arm_thumb2]
11431 && ![check_effective_target_arm_v8_1_lob_ok] } {
11437 # Return 1 if this is an ARM target where -mthumb causes Thumb-2 to be
11438 # used and the target does not support executing the Armv8.1-M
11439 # Mainline Low Overhead Loop, 0 otherwise. The test is valid for ARM.
11441 proc check_effective_target_arm_thumb2_ok_no_arm_v8_1_lob { } {
11442 if { [check_effective_target_arm_thumb2_ok]
11443 && ![check_effective_target_arm_v8_1_lob_ok] } {
11449 # Returns 1 if the target is using glibc, 0 otherwise.
11451 proc check_effective_target_glibc { } {
11452 return [check_no_compiler_messages glibc_object assembly {
11453 #include <stdlib.h>
11454 #if !defined(__GLIBC__)
11460 # Return 1 if the target plus current options supports a vector
11461 # complex addition with rotate of half and single float modes, 0 otherwise.
11463 # This won't change for different subtargets so cache the result.
11465 foreach N {hf sf} {
11466 eval [string map [list N $N] {
11467 proc check_effective_target_vect_complex_rot_N { } {
11468 return [check_cached_effective_target_indexed vect_complex_rot_N {
11469 expr { [istarget aarch64*-*-*]
11470 || [istarget arm*-*-*] }}]
11475 # Return 1 if the target plus current options supports a vector
11476 # complex addition with rotate of double float modes, 0 otherwise.
11478 # This won't change for different subtargets so cache the result.
11481 eval [string map [list N $N] {
11482 proc check_effective_target_vect_complex_rot_N { } {
11483 return [check_cached_effective_target_indexed vect_complex_rot_N {
11484 expr { [istarget aarch64*-*-*] }}]
11489 # Return 1 if this target uses an LLVM assembler and/or linker
11490 proc check_effective_target_llvm_binutils { } {
11491 return [check_cached_effective_target llvm_binutils {
11492 expr { [istarget amdgcn*-*-*]
11493 || [check_effective_target_offload_gcn] }}]
11496 # Return 1 if the compiler supports '-mfentry'.
11498 proc check_effective_target_mfentry { } {
11499 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
11502 return [check_no_compiler_messages mfentry object {
11503 void foo (void) { }
11507 # Return 1 if this target supports indirect calls
11508 proc check_effective_target_indirect_calls { } {
11509 if { [istarget bpf-*-*] } {
11515 # Return 1 if we can use the -lgccjit option, 0 otherwise.
11517 proc check_effective_target_lgccjit { } {
11518 if { [info procs jit_target_compile] == "" } then {
11519 global GCC_UNDER_TEST
11520 if ![info exists GCC_UNDER_TEST] {
11521 set GCC_UNDER_TEST "[find_gcc]"
11523 proc jit_target_compile { source dest type options } [info body gcc_target_compile]
11525 return [check_no_compiler_messages lgccjit executable {
11526 int main() { return 0; }
11530 # Return 1 if the MSP430 small memory model is in use.
11531 proc check_effective_target_msp430_small {} {
11532 return [check_no_compiler_messages msp430_small assembly {
11533 #if (!defined __MSP430__ || defined __MSP430X_LARGE__)
11534 #error !msp430 || __MSP430X_LARGE__
11539 # Return 1 if the MSP430 large memory model is in use.
11540 proc check_effective_target_msp430_large {} {
11541 return [check_no_compiler_messages msp430_large assembly {
11542 #ifndef __MSP430X_LARGE__
11543 #error __MSP430X_LARGE__
11548 # Return 1 if GCC was configured with --with-tune=cortex-a76
11549 proc check_effective_target_tune_cortex_a76 { } {
11550 return [check_configured_with "with-tune=cortex-a76"]
11553 # Return 1 if the target has an efficient means to encode large initializers
11556 proc check_effective_target_large_initializer { } {
11557 if { [istarget nvptx*-*-*] } {
11564 # Return 1 if the target allows function prototype mismatches
11567 proc check_effective_target_non_strict_prototype { } {
11568 if { [istarget nvptx*-*-*] } {
11575 # Returns 1 if the target toolchain supports extended
11576 # syntax of .symver directive, 0 otherwise.
11578 proc check_symver_available { } {
11579 return [check_no_compiler_messages symver_available object {
11580 int foo(void) { return 0; }
11582 asm volatile (".symver foo,foo@VER_1, local");
11588 # Return 1 if emitted assembly contains .ident directive.
11590 proc check_effective_target_ident_directive {} {
11591 return [check_no_messages_and_pattern ident_directive \
11592 "(?n)^\[\t\]+\\.ident" assembly {
11597 # Return 1 if we're able to assemble movdiri and movdir64b
11599 proc check_effective_target_movdir { } {
11600 return [check_no_compiler_messages movdir object {
11602 foo (unsigned int *d, unsigned int s)
11604 __builtin_ia32_directstoreu_u32 (d, s);
11607 bar (void *d, const void *s)
11609 __builtin_ia32_movdir64b (d, s);
11611 } "-mmovdiri -mmovdir64b" ]
11614 # Return 1 if the target does not support address sanitizer, 0 otherwise
11616 proc check_effective_target_no_fsanitize_address {} {
11617 if ![check_no_compiler_messages fsanitize_address executable {
11618 int main (void) { return 0; }
11619 } "-fsanitize=address" ] {
11626 # Return 1 if this target supports 'R' flag in .section directive, 0
11627 # otherwise. Cache the result.
11629 proc check_effective_target_R_flag_in_section { } {
11631 global GCC_UNDER_TEST
11633 # Need auto-host.h to check linker support.
11634 if { ![file exists ../../auto-host.h ] } {
11638 return [check_cached_effective_target R_flag_in_section {
11643 set f [open $src "w"]
11644 puts $f "#include \"../../auto-host.h\""
11645 puts $f "#if HAVE_GAS_SHF_GNU_RETAIN == 0 || HAVE_INITFINI_ARRAY_SUPPORT == 0"
11646 puts $f "# error Assembler does not support 'R' flag in .section directive."
11650 verbose "check_effective_target_R_flag_in_section compiling testfile $src" 2
11651 set lines [${tool}_target_compile $src $obj assembly ""]
11656 if [string match "" $lines] then {
11657 verbose "check_effective_target_R_flag_in_section testfile compilation passed" 2
11660 verbose "check_effective_target_R_flag_in_section testfile compilation failed" 2
11666 # Return 1 if this target supports 'o' flag in .section directive, 0
11667 # otherwise. Cache the result.
11669 proc check_effective_target_o_flag_in_section { } {
11671 global GCC_UNDER_TEST
11673 # Need auto-host.h to check linker support.
11674 if { ![file exists ../../auto-host.h ] } {
11678 return [check_cached_effective_target o_flag_in_section {
11683 set f [open $src "w"]
11684 puts $f "#include \"../../auto-host.h\""
11685 puts $f "#if HAVE_GAS_SECTION_LINK_ORDER == 0"
11686 puts $f "# error Assembler does not support 'o' flag in .section directive."
11690 verbose "check_effective_target_o_flag_in_section compiling testfile $src" 2
11691 set lines [${tool}_target_compile $src $obj object ""]
11696 if [string match "" $lines] then {
11697 verbose "check_effective_target_o_flag_in_section testfile compilation passed" 2
11700 verbose "check_effective_target_o_flag_in_section testfile compilation failed" 2
11706 # return 1 if LRA is supported.
11708 proc check_effective_target_lra { } {
11709 if { [istarget hppa*-*-*] } {
11715 # Test whether optimizations are enabled ('__OPTIMIZE__') per the
11716 # 'current_compiler_flags' (thus don't cache).
11718 proc check_effective_target___OPTIMIZE__ {} {
11719 return [check_no_compiler_messages_nocache __OPTIMIZE__ assembly {
11720 #ifndef __OPTIMIZE__
11723 } [current_compiler_flags]]