1 # Copyright (C) 1999-2020 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
35 # "! Fortran" for Fortran code,
37 # "// ObjC++" for ObjC++
39 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
40 # allow for ObjC/ObjC++ specific flags.
42 proc check_compile {basename type contents args} {
44 verbose "check_compile tool: $tool for $basename"
46 # Save additional_sources to avoid compiling testsuite's sources
47 # against check_compile's source.
48 global additional_sources
49 if [info exists additional_sources] {
50 set tmp_additional_sources "$additional_sources"
51 set additional_sources ""
54 if { [llength $args] > 0 } {
55 set options [list "additional_flags=[lindex $args 0]"]
59 switch -glob -- $contents {
60 "*! Fortran*" { set src ${basename}[pid].f90 }
61 "*// C++*" { set src ${basename}[pid].cc }
62 "*// D*" { set src ${basename}[pid].d }
63 "*// ObjC++*" { set src ${basename}[pid].mm }
64 "*/* ObjC*" { set src ${basename}[pid].m }
65 "*// Go*" { set src ${basename}[pid].go }
68 "objc" { set src ${basename}[pid].m }
69 "obj-c++" { set src ${basename}[pid].mm }
70 default { set src ${basename}[pid].c }
75 set compile_type $type
77 assembly { set output ${basename}[pid].s }
78 object { set output ${basename}[pid].o }
79 executable { set output ${basename}[pid].exe }
81 set output ${basename}[pid].s
82 lappend options "additional_flags=-fdump-$type"
83 set compile_type assembly
89 set lines [${tool}_target_compile $src $output $compile_type "$options"]
92 set scan_output $output
93 # Don't try folding this into the switch above; calling "glob" before the
94 # file is created won't work.
95 if [regexp "rtl-(.*)" $type dummy rtl_type] {
96 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
100 # Restore additional_sources.
101 if [info exists additional_sources] {
102 set additional_sources "$tmp_additional_sources"
105 return [list $lines $scan_output]
108 proc current_target_name { } {
110 if [info exists target_info(target,name)] {
111 set answer $target_info(target,name)
118 # Implement an effective-target check for property PROP by invoking
119 # the Tcl command ARGS and seeing if it returns true.
121 proc check_cached_effective_target { prop args } {
124 set target [current_target_name]
125 if {![info exists et_cache($prop,$target)]} {
126 verbose "check_cached_effective_target $prop: checking $target" 2
127 if {[string is true -strict $args] || [string is false -strict $args]} {
128 error {check_cached_effective_target condition already evaluated; did you pass [...] instead of the expected {...}?}
130 set code [catch {uplevel eval $args} result]
131 if {$code != 0 && $code != 2} {
132 return -code $code $result
134 set et_cache($prop,$target) $result
137 set value $et_cache($prop,$target)
138 verbose "check_cached_effective_target $prop: returning $value for $target" 2
142 # Implements a version of check_cached_effective_target that also takes et_index
143 # into account when creating the key for the cache.
144 proc check_cached_effective_target_indexed { prop args } {
146 set key "$et_index $prop"
147 verbose "check_cached_effective_target_index $prop: returning $key" 2
149 return [check_cached_effective_target $key [list uplevel eval $args]]
152 # Clear effective-target cache. This is useful after testing
153 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
155 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
156 # do a clear_effective_target_cache at the end as the target cache can
157 # make decisions based upon the flags, and those decisions need to be
158 # redone when the flags change. An example of this is the
159 # asan_init/asan_finish pair.
161 proc clear_effective_target_cache { } {
166 # Like check_compile, but delete the output file and return true if the
167 # compiler printed no messages.
168 proc check_no_compiler_messages_nocache {args} {
169 set result [eval check_compile $args]
170 set lines [lindex $result 0]
171 set output [lindex $result 1]
172 remote_file build delete $output
173 return [string match "" $lines]
176 # Like check_no_compiler_messages_nocache, but cache the result.
177 # PROP is the property we're checking, and doubles as a prefix for
178 # temporary filenames.
179 proc check_no_compiler_messages {prop args} {
180 return [check_cached_effective_target $prop {
181 eval [list check_no_compiler_messages_nocache $prop] $args
185 # Like check_compile, but return true if the compiler printed no
186 # messages and if the contents of the output file satisfy PATTERN.
187 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
188 # don't match regular expression REGEXP, otherwise they satisfy it
189 # if they do match regular expression PATTERN. (PATTERN can start
190 # with something like "[!]" if the regular expression needs to match
191 # "!" as the first character.)
193 # Delete the output file before returning. The other arguments are
194 # as for check_compile.
195 proc check_no_messages_and_pattern_nocache {basename pattern args} {
198 set result [eval [list check_compile $basename] $args]
199 set lines [lindex $result 0]
200 set output [lindex $result 1]
203 if { [string match "" $lines] } {
204 set chan [open "$output"]
205 set invert [regexp {^!(.*)} $pattern dummy pattern]
206 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
210 remote_file build delete $output
214 # Like check_no_messages_and_pattern_nocache, but cache the result.
215 # PROP is the property we're checking, and doubles as a prefix for
216 # temporary filenames.
217 proc check_no_messages_and_pattern {prop pattern args} {
218 return [check_cached_effective_target $prop {
219 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
223 # Try to compile and run an executable from code CONTENTS. Return true
224 # if the compiler reports no messages and if execution "passes" in the
225 # usual DejaGNU sense. The arguments are as for check_compile, with
226 # TYPE implicitly being "executable".
227 proc check_runtime_nocache {basename contents args} {
230 set result [eval [list check_compile $basename executable $contents] $args]
231 set lines [lindex $result 0]
232 set output [lindex $result 1]
235 if { [string match "" $lines] } {
236 # No error messages, everything is OK.
237 set result [remote_load target "./$output" "" ""]
238 set status [lindex $result 0]
239 verbose "check_runtime_nocache $basename: status is <$status>" 2
240 if { $status == "pass" } {
244 remote_file build delete $output
248 # Like check_runtime_nocache, but cache the result. PROP is the
249 # property we're checking, and doubles as a prefix for temporary
251 proc check_runtime {prop args} {
254 return [check_cached_effective_target $prop {
255 eval [list check_runtime_nocache $prop] $args
259 # Return 1 if GCC was configured with $pattern.
260 proc check_configured_with { pattern } {
263 set options [list "additional_flags=-v"]
264 set gcc_output [${tool}_target_compile "" "" "none" $options]
265 if { [ regexp "Configured with: \[^\n\]*$pattern" $gcc_output ] } {
266 verbose "Matched: $pattern" 2
270 verbose "Failed to match: $pattern" 2
274 ###############################
275 # proc check_weak_available { }
276 ###############################
278 # weak symbols are only supported in some configs/object formats
279 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
281 proc check_weak_available { } {
284 # All mips targets should support it
286 if { [ string first "mips" $target_cpu ] >= 0 } {
290 # All AIX targets should support it
292 if { [istarget *-*-aix*] } {
296 # All solaris2 targets should support it
298 if { [istarget *-*-solaris2*] } {
302 # Windows targets Cygwin and MingW32 support it
304 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
308 # HP-UX 10.X doesn't support it
310 if { [istarget hppa*-*-hpux10*] } {
314 # nvptx (nearly) supports it
316 if { [istarget nvptx-*-*] } {
320 # pdp11 doesn't support it
322 if { [istarget pdp11*-*-*] } {
326 # ELF and ECOFF support it. a.out does with gas/gld but may also with
327 # other linkers, so we should try it
329 set objformat [gcc_target_object_format]
337 unknown { return -1 }
342 # return 1 if weak undefined symbols are supported.
344 proc check_effective_target_weak_undefined { } {
345 if { [istarget hppa*-*-hpux*] } {
348 return [check_runtime weak_undefined {
349 extern void foo () __attribute__((weak));
350 int main (void) { if (foo) return 1; return 0; }
354 ###############################
355 # proc check_weak_override_available { }
356 ###############################
358 # Like check_weak_available, but return 0 if weak symbol definitions
359 # cannot be overridden.
361 proc check_weak_override_available { } {
362 if { [istarget *-*-mingw*] } {
365 return [check_weak_available]
368 # The noinit attribute is only supported by some targets.
369 # This proc returns 1 if it's supported, 0 if it's not.
371 proc check_effective_target_noinit { } {
372 if { [istarget arm*-*-eabi]
373 || [istarget msp430-*-*] } {
380 ###############################
381 # proc check_visibility_available { what_kind }
382 ###############################
384 # The visibility attribute is only support in some object formats
385 # This proc returns 1 if it is supported, 0 if not.
386 # The argument is the kind of visibility, default/protected/hidden/internal.
388 proc check_visibility_available { what_kind } {
389 if [string match "" $what_kind] { set what_kind "hidden" }
391 return [check_no_compiler_messages visibility_available_$what_kind object "
392 void f() __attribute__((visibility(\"$what_kind\")));
397 ###############################
398 # proc check_alias_available { }
399 ###############################
401 # Determine if the target toolchain supports the alias attribute.
403 # Returns 2 if the target supports aliases. Returns 1 if the target
404 # only supports weak aliased. Returns 0 if the target does not
405 # support aliases at all. Returns -1 if support for aliases could not
408 proc check_alias_available { } {
411 return [check_cached_effective_target alias_available {
414 verbose "check_alias_available compiling testfile $src" 2
415 set f [open $src "w"]
416 # Compile a small test program. The definition of "g" is
417 # necessary to keep the Solaris assembler from complaining
419 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
420 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
422 set lines [${tool}_target_compile $src $obj object ""]
424 remote_file build delete $obj
426 if [string match "" $lines] then {
427 # No error messages, everything is OK.
430 if [regexp "alias definitions not supported" $lines] {
431 verbose "check_alias_available target does not support aliases" 2
433 set objformat [gcc_target_object_format]
435 if { $objformat == "elf" } {
436 verbose "check_alias_available but target uses ELF format, so it ought to" 2
442 if [regexp "only weak aliases are supported" $lines] {
443 verbose "check_alias_available target supports only weak aliases" 2
453 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
455 proc check_effective_target_alias { } {
456 if { [check_alias_available] < 2 } {
463 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
465 proc check_ifunc_available { } {
466 return [check_no_compiler_messages ifunc_available object {
471 typedef void F (void);
472 F* g (void) { return &f_; }
473 void f () __attribute__ ((ifunc ("g")));
480 # Returns true if --gc-sections is supported on the target.
482 proc check_gc_sections_available { } {
485 return [check_cached_effective_target gc_sections_available {
486 # Some targets don't support gc-sections despite whatever's
487 # advertised by ld's options.
488 if { [istarget alpha*-*-*]
489 || [istarget ia64-*-*] } {
493 # elf2flt uses -q (--emit-relocs), which is incompatible with
495 if { [board_info target exists ldflags]
496 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
500 # VxWorks kernel modules are relocatable objects linked with -r,
501 # while RTP executables are linked with -q (--emit-relocs).
502 # Both of these options are incompatible with --gc-sections.
503 if { [istarget *-*-vxworks*] } {
507 # Check if the ld used by gcc supports --gc-sections.
508 set options [list "additional_flags=-print-prog-name=ld"]
509 set gcc_ld [lindex [${tool}_target_compile "" "" "none" $options] 0]
510 set ld_output [remote_exec host "$gcc_ld" "--help"]
511 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
519 # Returns 1 if "dot" is supported on the host.
521 proc check_dot_available { } {
522 verbose "check_dot_available" 2
524 set status [remote_exec host "dot" "-V"]
525 verbose " status: $status" 2
526 if { [lindex $status 0] != 0 } {
532 # Return 1 if according to target_info struct and explicit target list
533 # target is supposed to support trampolines.
535 proc check_effective_target_trampolines { } {
536 if [target_info exists gcc,no_trampolines] {
539 if { [istarget avr-*-*]
540 || [istarget msp430-*-*]
541 || [istarget nvptx-*-*]
542 || [istarget hppa2.0w-hp-hpux11.23]
543 || [istarget hppa64-hp-hpux11.23]
544 || [istarget pru-*-*]
545 || [istarget bpf-*-*] } {
551 # Return 1 if target has limited stack size.
553 proc check_effective_target_stack_size { } {
554 if [target_info exists gcc,stack_size] {
560 # Return the value attribute of an effective target, otherwise return 0.
562 proc dg-effective-target-value { effective_target } {
563 if { "$effective_target" == "stack_size" } {
564 if [check_effective_target_stack_size] {
565 return [target_info gcc,stack_size]
572 # Return 1 if signal.h is supported.
574 proc check_effective_target_signal { } {
575 if [target_info exists gcc,signal_suppress] {
581 # Return 1 if according to target_info struct and explicit target list
582 # target disables -fdelete-null-pointer-checks. Targets should return 0
583 # if they simply default to -fno-delete-null-pointer-checks but obey
584 # -fdelete-null-pointer-checks when passed explicitly (and tests that
585 # depend on this option should do that).
587 proc check_effective_target_keeps_null_pointer_checks { } {
588 if [target_info exists keeps_null_pointer_checks] {
591 if { [istarget msp430-*-*] || [istarget cr16-*-*] } {
597 # Return the autofdo profile wrapper
599 # Linux by default allows 516KB of perf event buffers
600 # in /proc/sys/kernel/perf_event_mlock_kb
601 # Each individual perf tries to grab it
602 # This causes problems with parallel test suite runs. Instead
603 # limit us to 8 pages (32K), which should be good enough
604 # for the small test programs. With the default settings
605 # this allows parallelism of 16 and higher of parallel gcc-auto-profile
606 proc profopt-perf-wrapper { } {
608 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
611 # Return true if profiling is supported on the target.
613 proc check_profiling_available { test_what } {
614 verbose "Profiling argument is <$test_what>" 1
616 # These conditions depend on the argument so examine them before
617 # looking at the cache variable.
619 # Tree profiling requires TLS runtime support.
620 if { $test_what == "-fprofile-generate" } {
621 if { ![check_effective_target_tls_runtime] } {
626 if { $test_what == "-fauto-profile" } {
627 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
628 verbose "autofdo only supported on linux"
631 # not cross compiling?
633 verbose "autofdo not supported for non native builds"
636 set event [profopt-perf-wrapper]
638 verbose "autofdo not supported"
642 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
643 if { [lindex $status 0] != 0 } {
644 verbose "autofdo not supported because perf does not work"
648 # no good way to check this in advance -- check later instead.
649 #set status [remote_exec host "create_gcov" "2>/dev/null"]
650 #if { [lindex $status 0] != 255 } {
651 # verbose "autofdo not supported due to missing create_gcov"
656 # Support for -p on solaris2 relies on mcrt1.o which comes with the
657 # vendor compiler. We cannot reliably predict the directory where the
658 # vendor compiler (and thus mcrt1.o) is installed so we can't
659 # necessarily find mcrt1.o even if we have it.
660 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
664 # We don't yet support profiling for MIPS16.
665 if { [istarget mips*-*-*]
666 && ![check_effective_target_nomips16]
667 && ($test_what == "-p" || $test_what == "-pg") } {
671 # MinGW does not support -p.
672 if { [istarget *-*-mingw*] && $test_what == "-p" } {
676 # cygwin does not support -p.
677 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
681 # uClibc does not have gcrt1.o.
682 if { [check_effective_target_uclibc]
683 && ($test_what == "-p" || $test_what == "-pg") } {
687 # Now examine the cache variable.
688 set profiling_working \
689 [check_cached_effective_target profiling_available {
690 # Some targets don't have any implementation of __bb_init_func or are
691 # missing other needed machinery.
692 if {[istarget aarch64*-*-elf]
693 || [istarget am3*-*-linux*]
694 || [istarget amdgcn-*-*]
695 || [istarget arm*-*-eabi*]
696 || [istarget arm*-*-elf]
697 || [istarget arm*-*-symbianelf*]
698 || [istarget avr-*-*]
699 || [istarget bfin-*-*]
700 || [istarget cris-*-*]
701 || [istarget crisv32-*-*]
702 || [istarget csky-*-elf]
703 || [istarget fido-*-elf]
704 || [istarget h8300-*-*]
705 || [istarget lm32-*-*]
706 || [istarget m32c-*-elf]
707 || [istarget m68k-*-elf]
708 || [istarget m68k-*-uclinux*]
709 || [istarget mips*-*-elf*]
710 || [istarget mmix-*-*]
711 || [istarget mn10300-*-elf*]
712 || [istarget moxie-*-elf*]
713 || [istarget msp430-*-*]
714 || [istarget nds32*-*-elf]
715 || [istarget nios2-*-elf]
716 || [istarget nvptx-*-*]
717 || [istarget powerpc-*-eabi*]
718 || [istarget powerpc-*-elf]
719 || [istarget pru-*-*]
721 || [istarget tic6x-*-elf]
722 || [istarget visium-*-*]
723 || [istarget xstormy16-*]
724 || [istarget xtensa*-*-elf]
725 || [istarget *-*-rtems*]
726 || [istarget *-*-vxworks*] } {
733 # -pg link test result can't be cached since it may change between
735 if { $profiling_working == 1
736 && ![check_no_compiler_messages_nocache profiling executable {
737 int main() { return 0; } } "-pg"] } {
738 set profiling_working 0
741 return $profiling_working
744 # Check to see if a target is "freestanding". This is as per the definition
745 # in Section 4 of C99 standard. Effectively, it is a target which supports no
746 # extra headers or libraries other than what is considered essential.
747 proc check_effective_target_freestanding { } {
748 if { [istarget nvptx-*-*] } {
754 # Return 1 if target has packed layout of structure members by
755 # default, 0 otherwise. Note that this is slightly different than
756 # whether the target has "natural alignment": both attributes may be
759 proc check_effective_target_default_packed { } {
760 return [check_no_compiler_messages default_packed assembly {
761 struct x { char a; long b; } c;
762 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
766 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
767 # documentation, where the test also comes from.
769 proc check_effective_target_pcc_bitfield_type_matters { } {
770 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
771 # bitfields, but let's stick to the example code from the docs.
772 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
773 struct foo1 { char x; char :0; char y; };
774 struct foo2 { char x; int :0; char y; };
775 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
779 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
781 proc add_options_for_tls { flags } {
782 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
783 # libthread, so always pass -pthread for native TLS. Same for AIX.
784 # Need to duplicate native TLS check from
785 # check_effective_target_tls_native to avoid recursion.
786 if { ([istarget powerpc-ibm-aix*]) &&
787 [check_no_messages_and_pattern tls_native "!emutls" assembly {
789 int f (void) { return i; }
790 void g (int j) { i = j; }
792 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
797 # Return 1 if indirect jumps are supported, 0 otherwise.
799 proc check_effective_target_indirect_jumps {} {
800 if { [istarget nvptx-*-*] || [istarget bpf-*-*] } {
806 # Return 1 if nonlocal goto is supported, 0 otherwise.
808 proc check_effective_target_nonlocal_goto {} {
809 if { [istarget nvptx-*-*] || [istarget bpf-*-*] } {
815 # Return 1 if global constructors are supported, 0 otherwise.
817 proc check_effective_target_global_constructor {} {
818 if { [istarget nvptx-*-*]
819 || [istarget amdgcn-*-*]
820 || [istarget bpf-*-*] } {
826 # Return 1 if taking label values is supported, 0 otherwise.
828 proc check_effective_target_label_values {} {
829 if { [istarget nvptx-*-*] || [target_info exists gcc,no_label_values] } {
836 # Return 1 if builtin_return_address and builtin_frame_address are
837 # supported, 0 otherwise.
839 proc check_effective_target_return_address {} {
840 if { [istarget nvptx-*-*] } {
843 # No notion of return address in eBPF.
844 if { [istarget bpf-*-*] } {
847 # It could be supported on amdgcn, but isn't yet.
848 if { [istarget amdgcn*-*-*] } {
854 # Return 1 if the assembler does not verify function types against
855 # calls, 0 otherwise. Such verification will typically show up problems
856 # with K&R C function declarations.
858 proc check_effective_target_untyped_assembly {} {
859 if { [istarget nvptx-*-*] } {
865 # Return 1 if alloca is supported, 0 otherwise.
867 proc check_effective_target_alloca {} {
868 if { [istarget nvptx-*-*] } {
869 return [check_no_compiler_messages alloca assembly {
871 void g (int n) { f (__builtin_alloca (n)); }
877 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
879 proc check_effective_target_tls {} {
880 return [check_no_compiler_messages tls assembly {
882 int f (void) { return i; }
883 void g (int j) { i = j; }
887 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
889 proc check_effective_target_tls_native {} {
890 # VxWorks uses emulated TLS machinery, but with non-standard helper
891 # functions, so we fail to automatically detect it.
892 if { [istarget *-*-vxworks*] } {
896 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
898 int f (void) { return i; }
899 void g (int j) { i = j; }
903 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
905 proc check_effective_target_tls_emulated {} {
906 # VxWorks uses emulated TLS machinery, but with non-standard helper
907 # functions, so we fail to automatically detect it.
908 if { [istarget *-*-vxworks*] } {
912 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
914 int f (void) { return i; }
915 void g (int j) { i = j; }
919 # Return 1 if TLS executables can run correctly, 0 otherwise.
921 proc check_effective_target_tls_runtime {} {
922 return [check_runtime tls_runtime {
923 __thread int thr __attribute__((tls_model("global-dynamic"))) = 0;
924 int main (void) { return thr; }
925 } [add_options_for_tls ""]]
928 # Return 1 if atomic compare-and-swap is supported on 'int'
930 proc check_effective_target_cas_char {} {
931 return [check_no_compiler_messages cas_char assembly {
932 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
938 proc check_effective_target_cas_int {} {
939 return [check_no_compiler_messages cas_int assembly {
940 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
942 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
950 # Return 1 if -ffunction-sections is supported, 0 otherwise.
952 proc check_effective_target_function_sections {} {
953 # Darwin has its own scheme and silently accepts -ffunction-sections.
954 if { [istarget *-*-darwin*] } {
958 return [check_no_compiler_messages functionsections assembly {
960 } "-ffunction-sections"]
963 # Return 1 if instruction scheduling is available, 0 otherwise.
965 proc check_effective_target_scheduling {} {
966 return [check_no_compiler_messages scheduling object {
968 } "-fschedule-insns"]
971 # Return 1 if trapping arithmetic is available, 0 otherwise.
973 proc check_effective_target_trapping {} {
974 return [check_no_compiler_messages trapping object {
975 int add (int a, int b) { return a + b; }
979 # Return 1 if compilation with -fgraphite is error-free for trivial
982 proc check_effective_target_fgraphite {} {
983 return [check_no_compiler_messages fgraphite object {
988 # Return 1 if compilation with -fopenacc is error-free for trivial
991 proc check_effective_target_fopenacc {} {
992 # nvptx/amdgcn can be built with the device-side bits of openacc, but it
993 # does not make sense to test it as an openacc host.
994 if [istarget nvptx-*-*] { return 0 }
995 if [istarget amdgcn-*-*] { return 0 }
997 return [check_no_compiler_messages fopenacc object {
1002 # Return 1 if compilation with -fopenmp is error-free for trivial
1003 # code, 0 otherwise.
1005 proc check_effective_target_fopenmp {} {
1006 # nvptx/amdgcn can be built with the device-side bits of libgomp, but it
1007 # does not make sense to test it as an openmp host.
1008 if [istarget nvptx-*-*] { return 0 }
1009 if [istarget amdgcn-*-*] { return 0 }
1011 return [check_no_compiler_messages fopenmp object {
1016 # Return 1 if compilation with -fgnu-tm is error-free for trivial
1017 # code, 0 otherwise.
1019 proc check_effective_target_fgnu_tm {} {
1020 return [check_no_compiler_messages fgnu_tm object {
1025 # Return 1 if the target supports mmap, 0 otherwise.
1027 proc check_effective_target_mmap {} {
1028 return [check_function_available "mmap"]
1031 # Return 1 if the target supports dlopen, 0 otherwise.
1032 proc check_effective_target_dlopen {} {
1033 return [check_no_compiler_messages dlopen executable {
1035 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
1036 } [add_options_for_dlopen ""]]
1039 proc add_options_for_dlopen { flags } {
1040 return "$flags -ldl"
1043 # Return 1 if the target supports clone, 0 otherwise.
1044 proc check_effective_target_clone {} {
1045 return [check_function_available "clone"]
1048 # Return 1 if the target supports setrlimit, 0 otherwise.
1049 proc check_effective_target_setrlimit {} {
1050 # Darwin has non-posix compliant RLIMIT_AS
1051 if { [istarget *-*-darwin*] } {
1054 return [check_function_available "setrlimit"]
1057 # Return 1 if the target supports gettimeofday, 0 otherwise.
1058 proc check_effective_target_gettimeofday {} {
1059 return [check_function_available "gettimeofday"]
1062 # Return 1 if the target supports swapcontext, 0 otherwise.
1063 proc check_effective_target_swapcontext {} {
1064 return [check_no_compiler_messages swapcontext executable {
1065 #include <ucontext.h>
1068 ucontext_t orig_context,child_context;
1069 if (swapcontext(&child_context, &orig_context) < 0) { }
1074 # Return 1 if the target supports POSIX threads, 0 otherwise.
1075 proc check_effective_target_pthread {} {
1076 return [check_no_compiler_messages pthread object {
1077 #include <pthread.h>
1082 # Return 1 if compilation with -gstabs is error-free for trivial
1083 # code, 0 otherwise.
1085 proc check_effective_target_stabs {} {
1086 return [check_no_compiler_messages stabs object {
1091 # Return 1 if compilation with -mpe-aligned-commons is error-free
1092 # for trivial code, 0 otherwise.
1094 proc check_effective_target_pe_aligned_commons {} {
1095 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1096 return [check_no_compiler_messages pe_aligned_commons object {
1098 } "-mpe-aligned-commons"]
1103 # Return 1 if the target supports -static
1104 proc check_effective_target_static {} {
1105 if { [istarget arm*-*-uclinuxfdpiceabi] } {
1108 return [check_no_compiler_messages static executable {
1109 int main (void) { return 0; }
1113 # Return 1 if the target supports -fstack-protector
1114 proc check_effective_target_fstack_protector {} {
1115 return [check_runtime fstack_protector {
1117 int main (int argc, char *argv[]) {
1119 return !strcpy (buf, strrchr (argv[0], '/'));
1121 } "-fstack-protector"]
1124 # Return 1 if the target supports -fstack-check or -fstack-check=$stack_kind
1125 proc check_stack_check_available { stack_kind } {
1126 if [string match "" $stack_kind] then {
1127 set stack_opt "-fstack-check"
1128 } else { set stack_opt "-fstack-check=$stack_kind" }
1130 return [check_no_compiler_messages stack_check_$stack_kind executable {
1131 int main (void) { return 0; }
1135 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1136 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1137 # warn when -fprofile-use is also supplied we test that combination too.
1139 proc check_effective_target_freorder {} {
1140 if { [check_no_compiler_messages freorder object {
1142 } "-freorder-blocks-and-partition"]
1143 && [check_no_compiler_messages fprofile_use_freorder object {
1145 } "-fprofile-use -freorder-blocks-and-partition -Wno-missing-profile"] } {
1151 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1152 # emitted, 0 otherwise. Whether a shared library can actually be built is
1153 # out of scope for this test.
1155 proc check_effective_target_fpic { } {
1156 # Note that M68K has a multilib that supports -fpic but not
1157 # -fPIC, so we need to check both. We test with a program that
1158 # requires GOT references.
1159 foreach arg {fpic fPIC} {
1160 if [check_no_compiler_messages $arg object {
1161 extern int foo (void); extern int bar;
1162 int baz (void) { return foo () + bar; }
1170 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1171 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1172 # assumes compiler will give warning if -fpic not supported. Here we check
1173 # whether binutils supports those new -fpic relocation modifiers, and assume
1174 # -fpic is supported if there is binutils support. GCC configuration will
1175 # enable -fpic for AArch64 in this case.
1177 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1178 # memory model -fpic relocation types.
1180 proc check_effective_target_aarch64_small_fpic { } {
1181 if { [istarget aarch64*-*-*] } {
1182 return [check_no_compiler_messages aarch64_small_fpic object {
1183 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1190 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1191 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1192 # in binutils since 2015-03-04 as PR gas/17843.
1194 # This test directive make sure binutils support all features needed by TLS LE
1195 # under -mtls-size=32 on AArch64.
1197 proc check_effective_target_aarch64_tlsle32 { } {
1198 if { [istarget aarch64*-*-*] } {
1199 return [check_no_compiler_messages aarch64_tlsle32 object {
1200 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1207 # Return 1 if -shared is supported, as in no warnings or errors
1208 # emitted, 0 otherwise.
1210 proc check_effective_target_shared { } {
1211 # Note that M68K has a multilib that supports -fpic but not
1212 # -fPIC, so we need to check both. We test with a program that
1213 # requires GOT references.
1214 return [check_no_compiler_messages shared executable {
1215 extern int foo (void); extern int bar;
1216 int baz (void) { return foo () + bar; }
1220 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1222 proc check_effective_target_pie { } {
1223 if { [istarget *-*-darwin\[912\]*]
1224 || [istarget *-*-dragonfly*]
1225 || [istarget *-*-freebsd*]
1226 || [istarget *-*-linux*]
1227 || [istarget arm*-*-uclinuxfdpiceabi]
1228 || [istarget *-*-gnu*]
1229 || [istarget *-*-amdhsa]} {
1232 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1233 # Full PIE support was added in Solaris 11.3, but gcc errors out
1234 # if missing, so check for that.
1235 return [check_no_compiler_messages pie executable {
1236 int main (void) { return 0; }
1242 # Return true if the target supports -mpaired-single (as used on MIPS).
1244 proc check_effective_target_mpaired_single { } {
1245 return [check_no_compiler_messages mpaired_single object {
1247 } "-mpaired-single"]
1250 # Return true if the target has access to FPU instructions.
1252 proc check_effective_target_hard_float { } {
1253 if { [istarget mips*-*-*] } {
1254 return [check_no_compiler_messages hard_float assembly {
1255 #if (defined __mips_soft_float || defined __mips16)
1256 #error __mips_soft_float || __mips16
1261 # This proc is actually checking the availabilty of FPU
1262 # support for doubles, so on the RX we must fail if the
1263 # 64-bit double multilib has been selected.
1264 if { [istarget rx-*-*] } {
1266 # return [check_no_compiler_messages hard_float assembly {
1267 #if defined __RX_64_BIT_DOUBLES__
1268 #error __RX_64_BIT_DOUBLES__
1273 # The generic test doesn't work for C-SKY because some cores have
1274 # hard float for single precision only.
1275 if { [istarget csky*-*-*] } {
1276 return [check_no_compiler_messages hard_float assembly {
1277 #if defined __csky_soft_float__
1278 #error __csky_soft_float__
1283 # The generic test equates hard_float with "no call for adding doubles".
1284 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1285 double a (double b, double c) { return b + c; }
1289 # Return true if the target is a 64-bit MIPS target.
1291 proc check_effective_target_mips64 { } {
1292 return [check_no_compiler_messages mips64 assembly {
1299 # Return true if the target is a MIPS target that does not produce
1302 proc check_effective_target_nomips16 { } {
1303 return [check_no_compiler_messages nomips16 object {
1307 /* A cheap way of testing for -mflip-mips16. */
1308 void foo (void) { asm ("addiu $20,$20,1"); }
1309 void bar (void) { asm ("addiu $20,$20,1"); }
1314 # Add the options needed for MIPS16 function attributes. At the moment,
1315 # we don't support MIPS16 PIC.
1317 proc add_options_for_mips16_attribute { flags } {
1318 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1321 # Return true if we can force a mode that allows MIPS16 code generation.
1322 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1325 proc check_effective_target_mips16_attribute { } {
1326 return [check_no_compiler_messages mips16_attribute assembly {
1330 #if defined __mips_hard_float \
1331 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1332 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1333 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1335 } [add_options_for_mips16_attribute ""]]
1338 # Return 1 if the target supports long double larger than double when
1339 # using the new ABI, 0 otherwise.
1341 proc check_effective_target_mips_newabi_large_long_double { } {
1342 return [check_no_compiler_messages mips_newabi_large_long_double object {
1343 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1347 # Return true if the target is a MIPS target that has access
1348 # to the LL and SC instructions.
1350 proc check_effective_target_mips_llsc { } {
1351 if { ![istarget mips*-*-*] } {
1354 # Assume that these instructions are always implemented for
1355 # non-elf* targets, via emulation if necessary.
1356 if { ![istarget *-*-elf*] } {
1359 # Otherwise assume LL/SC support for everything but MIPS I.
1360 return [check_no_compiler_messages mips_llsc assembly {
1367 # Return true if the target is a MIPS target that uses in-place relocations.
1369 proc check_effective_target_mips_rel { } {
1370 if { ![istarget mips*-*-*] } {
1373 return [check_no_compiler_messages mips_rel object {
1374 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1375 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1376 #error _ABIN32 && (_ABIN32 || _ABI64)
1381 # Return true if the target is a MIPS target that uses the EABI.
1383 proc check_effective_target_mips_eabi { } {
1384 if { ![istarget mips*-*-*] } {
1387 return [check_no_compiler_messages mips_eabi object {
1394 # Return 1 if the current multilib does not generate PIC by default.
1396 proc check_effective_target_nonpic { } {
1397 return [check_no_compiler_messages nonpic assembly {
1404 # Return 1 if the current multilib generates PIE by default.
1406 proc check_effective_target_pie_enabled { } {
1407 return [check_no_compiler_messages pie_enabled assembly {
1414 # Return 1 if the target generates -fstack-protector by default.
1416 proc check_effective_target_fstack_protector_enabled {} {
1417 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1418 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1419 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1425 # Return 1 if the target does not use a status wrapper.
1427 proc check_effective_target_unwrapped { } {
1428 if { [target_info needs_status_wrapper] != "" \
1429 && [target_info needs_status_wrapper] != "0" } {
1435 # Return true if iconv is supported on the target. In particular IBM1047.
1437 proc check_iconv_available { test_what } {
1440 # If the tool configuration file has not set libiconv, try "-liconv"
1441 if { ![info exists libiconv] } {
1442 set libiconv "-liconv"
1444 set test_what [lindex $test_what 1]
1445 return [check_runtime_nocache $test_what [subst {
1451 cd = iconv_open ("$test_what", "UTF-8");
1452 if (cd == (iconv_t) -1)
1459 # Return true if the atomic library is supported on the target.
1460 proc check_effective_target_libatomic_available { } {
1461 return [check_no_compiler_messages libatomic_available executable {
1462 int main (void) { return 0; }
1466 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1468 proc check_ascii_locale_available { } {
1472 # Return true if named sections are supported on this target.
1474 proc check_named_sections_available { } {
1475 return [check_no_compiler_messages named_sections assembly {
1476 int __attribute__ ((section("whatever"))) foo;
1480 # Return true if the "naked" function attribute is supported on this target.
1482 proc check_effective_target_naked_functions { } {
1483 return [check_no_compiler_messages naked_functions assembly {
1484 void f() __attribute__((naked));
1488 # Return 1 if the target supports Fortran real kinds larger than real(8),
1491 # When the target name changes, replace the cached result.
1493 proc check_effective_target_fortran_large_real { } {
1494 return [check_no_compiler_messages fortran_large_real executable {
1496 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1503 # Return 1 if the target supports Fortran real kind real(16),
1504 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1505 # this checks for Real(16) only; the other returned real(10) if
1506 # both real(10) and real(16) are available.
1508 # When the target name changes, replace the cached result.
1510 proc check_effective_target_fortran_real_16 { } {
1511 return [check_no_compiler_messages fortran_real_16 executable {
1519 # Return 1 if the target supports Fortran real kind 10,
1520 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1521 # this checks for real(10) only.
1523 # When the target name changes, replace the cached result.
1525 proc check_effective_target_fortran_real_10 { } {
1526 return [check_no_compiler_messages fortran_real_10 executable {
1534 # Return 1 if the target supports Fortran's IEEE modules,
1537 # When the target name changes, replace the cached result.
1539 proc check_effective_target_fortran_ieee { flags } {
1540 return [check_no_compiler_messages fortran_ieee executable {
1542 use, intrinsic :: ieee_features
1548 # Return 1 if the target supports SQRT for the largest floating-point
1549 # type. (Some targets lack the libm support for this FP type.)
1550 # On most targets, this check effectively checks either whether sqrtl is
1551 # available or on __float128 systems whether libquadmath is installed,
1552 # which provides sqrtq.
1554 # When the target name changes, replace the cached result.
1556 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1557 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1559 use iso_fortran_env, only: real_kinds
1560 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1561 real(kind=maxFP), volatile :: x
1569 # Return 1 if the target supports Fortran integer kinds larger than
1570 # integer(8), 0 otherwise.
1572 # When the target name changes, replace the cached result.
1574 proc check_effective_target_fortran_large_int { } {
1575 return [check_no_compiler_messages fortran_large_int executable {
1577 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1578 integer(kind=k) :: i
1583 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1585 # When the target name changes, replace the cached result.
1587 proc check_effective_target_fortran_integer_16 { } {
1588 return [check_no_compiler_messages fortran_integer_16 executable {
1595 # Return 1 if we can statically link libgfortran, 0 otherwise.
1597 # When the target name changes, replace the cached result.
1599 proc check_effective_target_static_libgfortran { } {
1600 return [check_no_compiler_messages static_libgfortran executable {
1607 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1609 proc check_effective_target_rdynamic { } {
1610 return [check_no_compiler_messages rdynamic executable {
1611 int main() { return 0; }
1615 proc check_linker_plugin_available { } {
1616 return [check_no_compiler_messages_nocache linker_plugin executable {
1617 int main() { return 0; }
1618 } "-flto -fuse-linker-plugin"]
1621 # Return 1 if the target OS supports running SSE executables, 0
1622 # otherwise. Cache the result.
1624 proc check_sse_os_support_available { } {
1625 return [check_cached_effective_target sse_os_support_available {
1626 # If this is not the right target then we can skip the test.
1627 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1635 # Return 1 if the target OS supports running AVX executables, 0
1636 # otherwise. Cache the result.
1638 proc check_avx_os_support_available { } {
1639 return [check_cached_effective_target avx_os_support_available {
1640 # If this is not the right target then we can skip the test.
1641 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1644 # Check that OS has AVX and SSE saving enabled.
1645 check_runtime_nocache avx_os_support_available {
1648 unsigned int eax, edx;
1650 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1651 return (eax & 0x06) != 0x06;
1658 # Return 1 if the target OS supports running AVX executables, 0
1659 # otherwise. Cache the result.
1661 proc check_avx512_os_support_available { } {
1662 return [check_cached_effective_target avx512_os_support_available {
1663 # If this is not the right target then we can skip the test.
1664 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1667 # Check that OS has AVX512, AVX and SSE saving enabled.
1668 check_runtime_nocache avx512_os_support_available {
1671 unsigned int eax, edx;
1673 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1674 return (eax & 0xe6) != 0xe6;
1681 # Return 1 if the target supports executing SSE instructions, 0
1682 # otherwise. Cache the result.
1684 proc check_sse_hw_available { } {
1685 return [check_cached_effective_target sse_hw_available {
1686 # If this is not the right target then we can skip the test.
1687 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1690 check_runtime_nocache sse_hw_available {
1694 unsigned int eax, ebx, ecx, edx;
1695 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1698 return !(edx & bit_SSE);
1705 # Return 1 if the target supports executing SSE2 instructions, 0
1706 # otherwise. Cache the result.
1708 proc check_sse2_hw_available { } {
1709 return [check_cached_effective_target sse2_hw_available {
1710 # If this is not the right target then we can skip the test.
1711 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1714 check_runtime_nocache sse2_hw_available {
1718 unsigned int eax, ebx, ecx, edx;
1719 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1722 return !(edx & bit_SSE2);
1729 # Return 1 if the target supports executing SSE4 instructions, 0
1730 # otherwise. Cache the result.
1732 proc check_sse4_hw_available { } {
1733 return [check_cached_effective_target sse4_hw_available {
1734 # If this is not the right target then we can skip the test.
1735 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1738 check_runtime_nocache sse4_hw_available {
1742 unsigned int eax, ebx, ecx, edx;
1743 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1746 return !(ecx & bit_SSE4_2);
1753 # Return 1 if the target supports executing AVX instructions, 0
1754 # otherwise. Cache the result.
1756 proc check_avx_hw_available { } {
1757 return [check_cached_effective_target avx_hw_available {
1758 # If this is not the right target then we can skip the test.
1759 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1762 check_runtime_nocache avx_hw_available {
1766 unsigned int eax, ebx, ecx, edx;
1767 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1770 return ((ecx & (bit_AVX | bit_OSXSAVE))
1771 != (bit_AVX | bit_OSXSAVE));
1778 # Return 1 if the target supports executing AVX2 instructions, 0
1779 # otherwise. Cache the result.
1781 proc check_avx2_hw_available { } {
1782 return [check_cached_effective_target avx2_hw_available {
1783 # If this is not the right target then we can skip the test.
1784 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1787 check_runtime_nocache avx2_hw_available {
1792 unsigned int eax, ebx, ecx, edx;
1794 if (__get_cpuid_max (0, NULL) < 7)
1797 __cpuid (1, eax, ebx, ecx, edx);
1799 if (!(ecx & bit_OSXSAVE))
1802 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1804 return !(ebx & bit_AVX2);
1811 # Return 1 if the target supports executing AVX512 foundation instructions, 0
1812 # otherwise. Cache the result.
1814 proc check_avx512f_hw_available { } {
1815 return [check_cached_effective_target avx512f_hw_available {
1816 # If this is not the right target then we can skip the test.
1817 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1820 check_runtime_nocache avx512f_hw_available {
1825 unsigned int eax, ebx, ecx, edx;
1827 if (__get_cpuid_max (0, NULL) < 7)
1830 __cpuid (1, eax, ebx, ecx, edx);
1832 if (!(ecx & bit_OSXSAVE))
1835 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1837 return !(ebx & bit_AVX512F);
1844 # Return 1 if the target supports running SSE executables, 0 otherwise.
1846 proc check_effective_target_sse_runtime { } {
1847 if { [check_effective_target_sse]
1848 && [check_sse_hw_available]
1849 && [check_sse_os_support_available] } {
1855 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1857 proc check_effective_target_sse2_runtime { } {
1858 if { [check_effective_target_sse2]
1859 && [check_sse2_hw_available]
1860 && [check_sse_os_support_available] } {
1866 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1868 proc check_effective_target_sse4_runtime { } {
1869 if { [check_effective_target_sse4]
1870 && [check_sse4_hw_available]
1871 && [check_sse_os_support_available] } {
1877 # Return 1 if the target supports running AVX executables, 0 otherwise.
1879 proc check_effective_target_avx_runtime { } {
1880 if { [check_effective_target_avx]
1881 && [check_avx_hw_available]
1882 && [check_avx_os_support_available] } {
1888 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1890 proc check_effective_target_avx2_runtime { } {
1891 if { [check_effective_target_avx2]
1892 && [check_avx2_hw_available]
1893 && [check_avx_os_support_available] } {
1899 # Return 1 if the target supports running AVX512f executables, 0 otherwise.
1901 proc check_effective_target_avx512f_runtime { } {
1902 if { [check_effective_target_avx512f]
1903 && [check_avx512f_hw_available]
1904 && [check_avx512_os_support_available] } {
1910 # Return 1 if bmi2 instructions can be compiled.
1911 proc check_effective_target_bmi2 { } {
1912 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1915 return [check_no_compiler_messages bmi2 object {
1917 _bzhi_u32 (unsigned int __X, unsigned int __Y)
1919 return __builtin_ia32_bzhi_si (__X, __Y);
1924 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1925 # 0 otherwise. Cache the result.
1927 proc check_mpaired_single_hw_available { } {
1928 return [check_cached_effective_target mpaired_single_hw_available {
1929 # If this is not the right target then we can skip the test.
1930 if { !([istarget mips*-*-*]) } {
1933 check_runtime_nocache mpaired_single_hw_available {
1936 asm volatile ("pll.ps $f2,$f4,$f6");
1944 # Return 1 if the target supports executing Loongson vector instructions,
1945 # 0 otherwise. Cache the result.
1947 proc check_mips_loongson_mmi_hw_available { } {
1948 return [check_cached_effective_target mips_loongson_mmi_hw_available {
1949 # If this is not the right target then we can skip the test.
1950 if { !([istarget mips*-*-*]) } {
1953 check_runtime_nocache mips_loongson_mmi_hw_available {
1954 #include <loongson-mmiintrin.h>
1957 asm volatile ("paddw $f2,$f4,$f6");
1965 # Return 1 if the target supports executing MIPS MSA instructions, 0
1966 # otherwise. Cache the result.
1968 proc check_mips_msa_hw_available { } {
1969 return [check_cached_effective_target mips_msa_hw_available {
1970 # If this is not the right target then we can skip the test.
1971 if { !([istarget mips*-*-*]) } {
1974 check_runtime_nocache mips_msa_hw_available {
1975 #if !defined(__mips_msa)
1976 #error "MSA NOT AVAIL"
1978 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1979 #error "MSA NOT AVAIL FOR ISA REV < 2"
1981 #if !defined(__mips_hard_float)
1982 #error "MSA HARD_FLOAT REQUIRED"
1984 #if __mips_fpr != 64
1985 #error "MSA 64-bit FPR REQUIRED"
1991 v8i16 v = __builtin_msa_ldi_h (0);
2001 # Return 1 if the target supports running MIPS Paired-Single
2002 # executables, 0 otherwise.
2004 proc check_effective_target_mpaired_single_runtime { } {
2005 if { [check_effective_target_mpaired_single]
2006 && [check_mpaired_single_hw_available] } {
2012 # Return 1 if the target supports running Loongson executables, 0 otherwise.
2014 proc check_effective_target_mips_loongson_mmi_runtime { } {
2015 if { [check_effective_target_mips_loongson_mmi]
2016 && [check_mips_loongson_mmi_hw_available] } {
2022 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
2024 proc check_effective_target_mips_msa_runtime { } {
2025 if { [check_effective_target_mips_msa]
2026 && [check_mips_msa_hw_available] } {
2032 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
2033 # move instructions for moves from GPR to FPR.
2035 proc check_effective_target_powerpc64_no_dm { } {
2036 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
2037 # checks if we do not use direct moves, but use the old-fashioned
2038 # slower move-via-the-stack.
2039 return [check_no_messages_and_pattern powerpc64_no_dm \
2040 {\mmulld\M.*\mlfd} assembly {
2041 double f(long long x) { return x*x; }
2045 # Return 1 if the target supports the __builtin_cpu_supports built-in,
2046 # including having a new enough library to support the test. Cache the result.
2047 # Require at least a power7 to run on.
2049 proc check_ppc_cpu_supports_hw_available { } {
2050 return [check_cached_effective_target ppc_cpu_supports_hw_available {
2051 # Some simulators are known to not support VSX/power8 instructions.
2052 # For now, disable on Darwin
2053 if { [istarget powerpc-*-eabi]
2054 || [istarget powerpc*-*-eabispe]
2055 || [istarget *-*-darwin*]} {
2059 check_runtime_nocache ppc_cpu_supports_hw_available {
2063 asm volatile ("xxlor vs0,vs0,vs0");
2065 asm volatile ("xxlor 0,0,0");
2067 if (!__builtin_cpu_supports ("vsx"))
2076 # Return 1 if the target supports executing 750CL paired-single instructions, 0
2077 # otherwise. Cache the result.
2079 proc check_750cl_hw_available { } {
2080 return [check_cached_effective_target 750cl_hw_available {
2081 # If this is not the right target then we can skip the test.
2082 if { ![istarget powerpc-*paired*] } {
2085 check_runtime_nocache 750cl_hw_available {
2089 asm volatile ("ps_mul v0,v0,v0");
2091 asm volatile ("ps_mul 0,0,0");
2100 # Return 1 if the target supports executing power8 vector instructions, 0
2101 # otherwise. Cache the result.
2103 proc check_p8vector_hw_available { } {
2104 return [check_cached_effective_target p8vector_hw_available {
2105 # Some simulators are known to not support VSX/power8 instructions.
2106 # For now, disable on Darwin
2107 if { [istarget powerpc-*-eabi]
2108 || [istarget powerpc*-*-eabispe]
2109 || [istarget *-*-darwin*]} {
2112 set options "-mpower8-vector"
2113 check_runtime_nocache p8vector_hw_available {
2117 asm volatile ("xxlorc vs0,vs0,vs0");
2119 asm volatile ("xxlorc 0,0,0");
2128 # Return 1 if the target supports executing power9 vector instructions, 0
2129 # otherwise. Cache the result.
2131 proc check_p9vector_hw_available { } {
2132 return [check_cached_effective_target p9vector_hw_available {
2133 # Some simulators are known to not support VSX/power8/power9
2134 # instructions. For now, disable on Darwin.
2135 if { [istarget powerpc-*-eabi]
2136 || [istarget powerpc*-*-eabispe]
2137 || [istarget *-*-darwin*]} {
2140 set options "-mpower9-vector"
2141 check_runtime_nocache p9vector_hw_available {
2145 vector double v = (vector double) { 0.0, 0.0 };
2146 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2154 # Return 1 if the target supports executing power9 modulo instructions, 0
2155 # otherwise. Cache the result.
2157 proc check_p9modulo_hw_available { } {
2158 return [check_cached_effective_target p9modulo_hw_available {
2159 # Some simulators are known to not support VSX/power8/power9
2160 # instructions. For now, disable on Darwin.
2161 if { [istarget powerpc-*-eabi]
2162 || [istarget powerpc*-*-eabispe]
2163 || [istarget *-*-darwin*]} {
2166 set options "-mmodulo"
2167 check_runtime_nocache p9modulo_hw_available {
2170 int i = 5, j = 3, r = -1;
2171 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2180 # Return 1 if the target supports executing FUTURE instructions, 0 otherwise.
2181 # Cache the result. It is assumed that if a simulator does not support the
2182 # FUTURE instructions, that it will generate an error and this test will fail.
2184 proc check_powerpc_future_hw_available { } {
2185 return [check_cached_effective_target powerpc_future_hw_available {
2186 check_runtime_nocache powerpc_future_hw_available {
2189 /* Set e first and use +r to check if pli actually works. */
2191 asm ("pli %0,%1" : "+r" (e) : "n" (0x12345));
2192 return (e == 0x12345);
2198 # Return 1 if the target supports executing __float128 on PowerPC via software
2199 # emulation, 0 otherwise. Cache the result.
2201 proc check_ppc_float128_sw_available { } {
2202 return [check_cached_effective_target ppc_float128_sw_available {
2203 # Some simulators are known to not support VSX/power8/power9
2204 # instructions. For now, disable on Darwin.
2205 if { [istarget powerpc-*-eabi]
2206 || [istarget powerpc*-*-eabispe]
2207 || [istarget *-*-darwin*]} {
2210 set options "-mfloat128 -mvsx"
2211 check_runtime_nocache ppc_float128_sw_available {
2212 volatile __float128 x = 1.0q;
2213 volatile __float128 y = 2.0q;
2216 __float128 z = x + y;
2224 # Return 1 if the target supports executing __float128 on PowerPC via power9
2225 # hardware instructions, 0 otherwise. Cache the result.
2227 proc check_ppc_float128_hw_available { } {
2228 return [check_cached_effective_target ppc_float128_hw_available {
2229 # Some simulators are known to not support VSX/power8/power9
2230 # instructions. For now, disable on Darwin.
2231 if { [istarget powerpc-*-eabi]
2232 || [istarget powerpc*-*-eabispe]
2233 || [istarget *-*-darwin*]} {
2236 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2237 check_runtime_nocache ppc_float128_hw_available {
2238 volatile __float128 x = 1.0q;
2239 volatile __float128 y = 2.0q;
2242 __float128 z = x + y;
2243 __float128 w = -1.0q;
2245 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2246 return ((z != 3.0q) || (z != w));
2253 # See if the __ieee128 keyword is understood.
2254 proc check_effective_target_ppc_ieee128_ok { } {
2255 return [check_cached_effective_target ppc_ieee128_ok {
2257 if { [istarget *-*-aix*] } {
2260 set options "-mfloat128"
2261 check_runtime_nocache ppc_ieee128_ok {
2272 # Return 1 if the target supports executing VSX instructions, 0
2273 # otherwise. Cache the result.
2275 proc check_vsx_hw_available { } {
2276 return [check_cached_effective_target vsx_hw_available {
2277 # Some simulators are known to not support VSX instructions.
2278 # For now, disable on Darwin
2279 if { [istarget powerpc-*-eabi]
2280 || [istarget powerpc*-*-eabispe]
2281 || [istarget *-*-darwin*]} {
2285 check_runtime_nocache vsx_hw_available {
2289 asm volatile ("xxlor vs0,vs0,vs0");
2291 asm volatile ("xxlor 0,0,0");
2300 # Return 1 if the target supports executing AltiVec instructions, 0
2301 # otherwise. Cache the result.
2303 proc check_vmx_hw_available { } {
2304 return [check_cached_effective_target vmx_hw_available {
2305 # Some simulators are known to not support VMX instructions.
2306 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2309 # Most targets don't require special flags for this test case, but
2310 # Darwin does. Just to be sure, make sure VSX is not enabled for
2311 # the altivec tests.
2312 if { [istarget *-*-darwin*]
2313 || [istarget *-*-aix*] } {
2314 set options "-maltivec -mno-vsx"
2316 set options "-mno-vsx"
2318 check_runtime_nocache vmx_hw_available {
2322 asm volatile ("vor v0,v0,v0");
2324 asm volatile ("vor 0,0,0");
2333 proc check_ppc_recip_hw_available { } {
2334 return [check_cached_effective_target ppc_recip_hw_available {
2335 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2336 # For now, disable on Darwin
2337 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2340 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2341 check_runtime_nocache ppc_recip_hw_available {
2342 volatile double d_recip, d_rsqrt, d_four = 4.0;
2343 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2346 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2347 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2348 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2349 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2357 # Return 1 if the target supports executing AltiVec and Cell PPU
2358 # instructions, 0 otherwise. Cache the result.
2360 proc check_effective_target_cell_hw { } {
2361 return [check_cached_effective_target cell_hw_available {
2362 # Some simulators are known to not support VMX and PPU instructions.
2363 if { [istarget powerpc-*-eabi*] } {
2366 # Most targets don't require special flags for this test
2367 # case, but Darwin and AIX do.
2368 if { [istarget *-*-darwin*]
2369 || [istarget *-*-aix*] } {
2370 set options "-maltivec -mcpu=cell"
2372 set options "-mcpu=cell"
2374 check_runtime_nocache cell_hw_available {
2378 asm volatile ("vor v0,v0,v0");
2379 asm volatile ("lvlx v0,r0,r0");
2381 asm volatile ("vor 0,0,0");
2382 asm volatile ("lvlx 0,0,0");
2391 # Return 1 if the target supports executing 64-bit instructions, 0
2392 # otherwise. Cache the result.
2394 proc check_effective_target_powerpc64 { } {
2395 global powerpc64_available_saved
2398 if [info exists powerpc64_available_saved] {
2399 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2401 set powerpc64_available_saved 0
2403 # Some simulators are known to not support powerpc64 instructions.
2404 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2405 verbose "check_effective_target_powerpc64 returning 0" 2
2406 return $powerpc64_available_saved
2409 # Set up, compile, and execute a test program containing a 64-bit
2410 # instruction. Include the current process ID in the file
2411 # names to prevent conflicts with invocations for multiple
2416 set f [open $src "w"]
2417 puts $f "int main() {"
2418 puts $f "#ifdef __MACH__"
2419 puts $f " asm volatile (\"extsw r0,r0\");"
2421 puts $f " asm volatile (\"extsw 0,0\");"
2423 puts $f " return 0; }"
2426 set opts "additional_flags=-mcpu=G5"
2428 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2429 set lines [${tool}_target_compile $src $exe executable "$opts"]
2432 if [string match "" $lines] then {
2433 # No error message, compilation succeeded.
2434 set result [${tool}_load "./$exe" "" ""]
2435 set status [lindex $result 0]
2436 remote_file build delete $exe
2437 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2439 if { $status == "pass" } then {
2440 set powerpc64_available_saved 1
2443 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2447 return $powerpc64_available_saved
2450 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2451 # complex float arguments. This affects gfortran tests that call cabsf
2452 # in libm built by an earlier compiler. Return 0 if libm uses the same
2453 # argument passing as the compiler under test, 1 otherwise.
2455 proc check_effective_target_broken_cplxf_arg { } {
2456 # Skip the work for targets known not to be affected.
2457 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2461 return [check_cached_effective_target broken_cplxf_arg {
2462 check_runtime_nocache broken_cplxf_arg {
2463 #include <complex.h>
2464 extern void abort (void);
2465 float fabsf (float);
2466 float cabsf (_Complex float);
2473 if (fabsf (f - 5.0) > 0.0001)
2474 /* Yes, it's broken. */
2476 /* All fine, not broken. */
2483 # Return 1 is this is a TI C6X target supporting C67X instructions
2484 proc check_effective_target_ti_c67x { } {
2485 return [check_no_compiler_messages ti_c67x assembly {
2486 #if !defined(_TMS320C6700)
2487 #error !_TMS320C6700
2492 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2493 proc check_effective_target_ti_c64xp { } {
2494 return [check_no_compiler_messages ti_c64xp assembly {
2495 #if !defined(_TMS320C6400_PLUS)
2496 #error !_TMS320C6400_PLUS
2501 # Check if a -march=... option is given, as part of (earlier) options.
2502 proc check_effective_target_march_option { } {
2503 return [check-flags [list "" { *-*-* } { "-march=*" } { "" } ]]
2506 proc check_alpha_max_hw_available { } {
2507 return [check_runtime alpha_max_hw_available {
2508 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2512 # Returns true iff the FUNCTION is available on the target system.
2513 # (This is essentially a Tcl implementation of Autoconf's
2516 proc check_function_available { function } {
2517 return [check_no_compiler_messages ${function}_available \
2523 int main () { $function (); }
2527 # Returns true iff "fork" is available on the target system.
2529 proc check_fork_available {} {
2530 return [check_function_available "fork"]
2533 # Returns true iff "mkfifo" is available on the target system.
2535 proc check_mkfifo_available {} {
2536 if { [istarget *-*-cygwin*] } {
2537 # Cygwin has mkfifo, but support is incomplete.
2541 return [check_function_available "mkfifo"]
2544 # Returns true iff "__cxa_atexit" is used on the target system.
2546 proc check_cxa_atexit_available { } {
2547 return [check_cached_effective_target cxa_atexit_available {
2548 if { [istarget hppa*-*-hpux10*] } {
2549 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2551 } elseif { [istarget *-*-vxworks] } {
2552 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2555 check_runtime_nocache cxa_atexit_available {
2558 static unsigned int count;
2575 Y() { f(); count = 2; }
2584 int main() { return 0; }
2590 proc check_effective_target_objc2 { } {
2591 return [check_no_compiler_messages objc2 object {
2600 proc check_effective_target_next_runtime { } {
2601 return [check_no_compiler_messages objc2 object {
2602 #ifdef __NEXT_RUNTIME__
2605 #error !__NEXT_RUNTIME__
2610 # Return 1 if we're generating code for big-endian memory order.
2612 proc check_effective_target_be { } {
2613 return [check_no_compiler_messages be object {
2614 int dummy[__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ? 1 : -1];
2618 # Return 1 if we're generating code for little-endian memory order.
2620 proc check_effective_target_le { } {
2621 return [check_no_compiler_messages le object {
2622 int dummy[__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ ? 1 : -1];
2626 # Return 1 if we're generating code for only power8 platforms.
2628 proc check_effective_target_p8 { } {
2629 return [check_no_compiler_messages_nocache p8 assembly {
2630 #if !(!defined(_ARCH_PWR9) && defined(_ARCH_PWR8))
2636 # Return 1 if we're generating code for power9 and future platforms.
2638 proc check_effective_target_p9+ { } {
2639 return [check_no_compiler_messages_nocache p9+ assembly {
2640 #if !(defined(_ARCH_PWR9))
2646 # Return 1 if we're generating 32-bit code using default options, 0
2649 proc check_effective_target_ilp32 { } {
2650 return [check_no_compiler_messages ilp32 object {
2651 int dummy[sizeof (int) == 4
2652 && sizeof (void *) == 4
2653 && sizeof (long) == 4 ? 1 : -1];
2657 # Return 1 if we're generating ia32 code using default options, 0
2660 proc check_effective_target_ia32 { } {
2661 return [check_no_compiler_messages ia32 object {
2662 int dummy[sizeof (int) == 4
2663 && sizeof (void *) == 4
2664 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2668 # Return 1 if we're generating x32 code using default options, 0
2671 proc check_effective_target_x32 { } {
2672 return [check_no_compiler_messages x32 object {
2673 int dummy[sizeof (int) == 4
2674 && sizeof (void *) == 4
2675 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2679 # Return 1 if we're generating 32-bit integers using default
2680 # options, 0 otherwise.
2682 proc check_effective_target_int32 { } {
2683 return [check_no_compiler_messages int32 object {
2684 int dummy[sizeof (int) == 4 ? 1 : -1];
2688 # Return 1 if we're generating 32-bit or larger integers using default
2689 # options, 0 otherwise.
2691 proc check_effective_target_int32plus { } {
2692 return [check_no_compiler_messages int32plus object {
2693 int dummy[sizeof (int) >= 4 ? 1 : -1];
2697 # Return 1 if we're generating 64-bit long long using default options,
2700 proc check_effective_target_longlong64 { } {
2701 return [check_no_compiler_messages longlong64 object {
2702 int dummy[sizeof (long long) == 8 ? 1 : -1];
2706 # Return 1 if we're generating 32-bit or larger pointers using default
2707 # options, 0 otherwise.
2709 proc check_effective_target_ptr32plus { } {
2710 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2711 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2712 # cannot really hold a 32-bit address, so we always return false here.
2713 if { [istarget msp430-*-*] } {
2717 return [check_no_compiler_messages ptr32plus object {
2718 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2722 # Return 1 if we support 16-bit or larger array and structure sizes
2723 # using default options, 0 otherwise.
2724 # This implies at least a 20-bit address space, as no targets have an address
2725 # space between 16 and 20 bits.
2727 proc check_effective_target_size20plus { } {
2728 return [check_no_compiler_messages size20plus object {
2733 # Return 1 if target supports function pointers, 0 otherwise.
2735 proc check_effective_target_function_pointers { } {
2736 if { [istarget pru-*-*] } {
2737 return [check_no_compiler_messages func_ptr_avail assembly {
2738 #ifdef __PRU_EABI_GNU__
2746 # Return 1 if target supports arbitrarily large return values, 0 otherwise.
2748 proc check_effective_target_large_return_values { } {
2749 if { [istarget pru-*-*] } {
2750 return [check_no_compiler_messages large_return_values assembly {
2751 #ifdef __PRU_EABI_GNU__
2759 # Return 1 if we support 24-bit or larger array and structure sizes
2760 # using default options, 0 otherwise.
2761 # This implies at least a 32-bit address space, as no targets have an address
2762 # space between 24 and 32 bits.
2764 proc check_effective_target_size32plus { } {
2765 return [check_no_compiler_messages size32plus object {
2766 char dummy[16777217L];
2770 # Returns 1 if we're generating 16-bit or smaller integers with the
2771 # default options, 0 otherwise.
2773 proc check_effective_target_int16 { } {
2774 return [check_no_compiler_messages int16 object {
2775 int dummy[sizeof (int) < 4 ? 1 : -1];
2779 # Return 1 if we're generating 64-bit code using default options, 0
2782 proc check_effective_target_lp64 { } {
2783 return [check_no_compiler_messages lp64 object {
2784 int dummy[sizeof (int) == 4
2785 && sizeof (void *) == 8
2786 && sizeof (long) == 8 ? 1 : -1];
2790 # Return 1 if we're generating 64-bit code using default llp64 options,
2793 proc check_effective_target_llp64 { } {
2794 return [check_no_compiler_messages llp64 object {
2795 int dummy[sizeof (int) == 4
2796 && sizeof (void *) == 8
2797 && sizeof (long long) == 8
2798 && sizeof (long) == 4 ? 1 : -1];
2802 # Return 1 if long and int have different sizes,
2805 proc check_effective_target_long_neq_int { } {
2806 return [check_no_compiler_messages long_ne_int object {
2807 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2811 # Return 1 if int size is equal to float size,
2814 proc check_effective_target_int_eq_float { } {
2815 return [check_no_compiler_messages int_eq_float object {
2816 int dummy[sizeof (int) >= sizeof (float) ? 1 : -1];
2820 # Return 1 if pointer size is equal to long size,
2823 proc check_effective_target_ptr_eq_long { } {
2824 # sizeof (void *) == 4 for msp430-elf -mlarge which is equal to
2825 # sizeof (long). Avoid false positive.
2826 if { [istarget msp430-*-*] } {
2829 return [check_no_compiler_messages ptr_eq_long object {
2830 int dummy[sizeof (void *) == sizeof (long) ? 1 : -1];
2834 # Return 1 if the target supports long double larger than double,
2837 proc check_effective_target_large_long_double { } {
2838 return [check_no_compiler_messages large_long_double object {
2839 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2843 # Return 1 if the target supports double larger than float,
2846 proc check_effective_target_large_double { } {
2847 return [check_no_compiler_messages large_double object {
2848 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2852 # Return 1 if the target supports long double of 128 bits,
2855 proc check_effective_target_longdouble128 { } {
2856 return [check_no_compiler_messages longdouble128 object {
2857 int dummy[sizeof(long double) == 16 ? 1 : -1];
2861 # Return 1 if the target supports long double of 64 bits,
2864 proc check_effective_target_longdouble64 { } {
2865 return [check_no_compiler_messages longdouble64 object {
2866 int dummy[sizeof(long double) == 8 ? 1 : -1];
2870 # Return 1 if the target supports double of 64 bits,
2873 proc check_effective_target_double64 { } {
2874 return [check_no_compiler_messages double64 object {
2875 int dummy[sizeof(double) == 8 ? 1 : -1];
2879 # Return 1 if the target supports double of at least 64 bits,
2882 proc check_effective_target_double64plus { } {
2883 return [check_no_compiler_messages double64plus object {
2884 int dummy[sizeof(double) >= 8 ? 1 : -1];
2888 # Return 1 if the target supports 'w' suffix on floating constant
2891 proc check_effective_target_has_w_floating_suffix { } {
2893 if [check_effective_target_c++] {
2894 append opts "-std=gnu++03"
2896 return [check_no_compiler_messages w_fp_suffix object {
2901 # Return 1 if the target supports 'q' suffix on floating constant
2904 proc check_effective_target_has_q_floating_suffix { } {
2906 if [check_effective_target_c++] {
2907 append opts "-std=gnu++03"
2909 return [check_no_compiler_messages q_fp_suffix object {
2914 # Return 1 if the target supports the _FloatN / _FloatNx type
2915 # indicated in the function name, 0 otherwise.
2917 proc check_effective_target_float16 {} {
2918 return [check_no_compiler_messages_nocache float16 object {
2920 } [add_options_for_float16 ""]]
2923 proc check_effective_target_float32 {} {
2924 return [check_no_compiler_messages_nocache float32 object {
2926 } [add_options_for_float32 ""]]
2929 proc check_effective_target_float64 {} {
2930 return [check_no_compiler_messages_nocache float64 object {
2932 } [add_options_for_float64 ""]]
2935 proc check_effective_target_float128 {} {
2936 return [check_no_compiler_messages_nocache float128 object {
2938 } [add_options_for_float128 ""]]
2941 proc check_effective_target_float32x {} {
2942 return [check_no_compiler_messages_nocache float32x object {
2944 } [add_options_for_float32x ""]]
2947 proc check_effective_target_float64x {} {
2948 return [check_no_compiler_messages_nocache float64x object {
2950 } [add_options_for_float64x ""]]
2953 proc check_effective_target_float128x {} {
2954 return [check_no_compiler_messages_nocache float128x object {
2956 } [add_options_for_float128x ""]]
2959 # Likewise, but runtime support for any special options used as well
2960 # as compile-time support is required.
2962 proc check_effective_target_float16_runtime {} {
2963 return [check_effective_target_float16]
2966 proc check_effective_target_float32_runtime {} {
2967 return [check_effective_target_float32]
2970 proc check_effective_target_float64_runtime {} {
2971 return [check_effective_target_float64]
2974 proc check_effective_target_float128_runtime {} {
2975 if { ![check_effective_target_float128] } {
2978 if { [istarget powerpc*-*-*] } {
2979 return [check_effective_target_base_quadfloat_support]
2984 proc check_effective_target_float32x_runtime {} {
2985 return [check_effective_target_float32x]
2988 proc check_effective_target_float64x_runtime {} {
2989 if { ![check_effective_target_float64x] } {
2992 if { [istarget powerpc*-*-*] } {
2993 return [check_effective_target_base_quadfloat_support]
2998 proc check_effective_target_float128x_runtime {} {
2999 return [check_effective_target_float128x]
3002 # Return 1 if the target hardware supports any options added for
3003 # _FloatN and _FloatNx types, 0 otherwise.
3005 proc check_effective_target_floatn_nx_runtime {} {
3006 if { [istarget powerpc*-*-aix*] } {
3009 if { [istarget powerpc*-*-*] } {
3010 return [check_effective_target_base_quadfloat_support]
3015 # Add options needed to use the _FloatN / _FloatNx type indicated in
3016 # the function name.
3018 proc add_options_for_float16 { flags } {
3019 if { [istarget arm*-*-*] } {
3020 return "$flags -mfp16-format=ieee"
3025 proc add_options_for_float32 { flags } {
3029 proc add_options_for_float64 { flags } {
3033 proc add_options_for_float128 { flags } {
3034 return [add_options_for___float128 "$flags"]
3037 proc add_options_for_float32x { flags } {
3041 proc add_options_for_float64x { flags } {
3042 return [add_options_for___float128 "$flags"]
3045 proc add_options_for_float128x { flags } {
3049 # Return 1 if the target supports __float128,
3052 proc check_effective_target___float128 { } {
3053 if { [istarget powerpc*-*-*] } {
3054 return [check_ppc_float128_sw_available]
3056 if { [istarget ia64-*-*]
3057 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
3063 proc add_options_for___float128 { flags } {
3064 if { [istarget powerpc*-*-*] } {
3065 return "$flags -mfloat128 -mvsx"
3070 # Return 1 if the target supports any special run-time requirements
3071 # for __float128 or _Float128,
3074 proc check_effective_target_base_quadfloat_support { } {
3075 if { [istarget powerpc*-*-*] } {
3076 return [check_vsx_hw_available]
3081 # Return 1 if the target supports all four forms of fused multiply-add
3082 # (fma, fms, fnma, and fnms) for both float and double.
3084 proc check_effective_target_scalar_all_fma { } {
3085 return [istarget aarch64*-*-*]
3088 # Return 1 if the target supports compiling fixed-point,
3091 proc check_effective_target_fixed_point { } {
3092 return [check_no_compiler_messages fixed_point object {
3093 _Sat _Fract x; _Sat _Accum y;
3097 # Return 1 if the target supports compiling decimal floating point,
3100 proc check_effective_target_dfp_nocache { } {
3101 verbose "check_effective_target_dfp_nocache: compiling source" 2
3102 set ret [check_no_compiler_messages_nocache dfp object {
3103 float x __attribute__((mode(DD)));
3105 verbose "check_effective_target_dfp_nocache: returning $ret" 2
3109 proc check_effective_target_dfprt_nocache { } {
3110 return [check_runtime_nocache dfprt {
3111 typedef float d64 __attribute__((mode(DD)));
3112 d64 x = 1.2df, y = 2.3dd, z;
3113 int main () { z = x + y; return 0; }
3117 # Return 1 if the target supports compiling Decimal Floating Point,
3120 # This won't change for different subtargets so cache the result.
3122 proc check_effective_target_dfp { } {
3123 return [check_cached_effective_target dfp {
3124 check_effective_target_dfp_nocache
3128 # Return 1 if the target supports linking and executing Decimal Floating
3129 # Point, 0 otherwise.
3131 # This won't change for different subtargets so cache the result.
3133 proc check_effective_target_dfprt { } {
3134 return [check_cached_effective_target dfprt {
3135 check_effective_target_dfprt_nocache
3139 # Return 1 iff target has unsigned plain 'char' by default.
3141 proc check_effective_target_unsigned_char {} {
3142 return [check_no_compiler_messages unsigned_char assembly {
3147 proc check_effective_target_powerpc_popcntb_ok { } {
3148 return [check_cached_effective_target powerpc_popcntb_ok {
3150 # Disable on Darwin.
3151 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3154 check_runtime_nocache powerpc_popcntb_ok {
3156 volatile int a = 0x12345678;
3159 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
3167 # Return 1 if the target supports executing DFP hardware instructions,
3168 # 0 otherwise. Cache the result.
3170 proc check_dfp_hw_available { } {
3171 return [check_cached_effective_target dfp_hw_available {
3172 # For now, disable on Darwin
3173 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3176 check_runtime_nocache dfp_hw_available {
3177 volatile _Decimal64 r;
3178 volatile _Decimal64 a = 4.0DD;
3179 volatile _Decimal64 b = 2.0DD;
3182 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3183 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3184 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3185 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3188 } "-mcpu=power6 -mhard-float"
3193 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3195 proc check_effective_target_ucn_nocache { } {
3196 # -std=c99 is only valid for C
3197 if [check_effective_target_c] {
3198 set ucnopts "-std=c99"
3202 verbose "check_effective_target_ucn_nocache: compiling source" 2
3203 set ret [check_no_compiler_messages_nocache ucn object {
3206 verbose "check_effective_target_ucn_nocache: returning $ret" 2
3210 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3212 # This won't change for different subtargets, so cache the result.
3214 proc check_effective_target_ucn { } {
3215 return [check_cached_effective_target ucn {
3216 check_effective_target_ucn_nocache
3220 # Return 1 if the target needs a command line argument to enable a SIMD
3223 proc check_effective_target_vect_cmdline_needed { } {
3224 global et_vect_cmdline_needed_target_name
3226 if { ![info exists et_vect_cmdline_needed_target_name] } {
3227 set et_vect_cmdline_needed_target_name ""
3230 # If the target has changed since we set the cached value, clear it.
3231 set current_target [current_target_name]
3232 if { $current_target != $et_vect_cmdline_needed_target_name } {
3233 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3234 set et_vect_cmdline_needed_target_name $current_target
3235 if { [info exists et_vect_cmdline_needed_saved] } {
3236 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3237 unset et_vect_cmdline_needed_saved
3241 return [check_cached_effective_target vect_cmdline_needed {
3242 if { [istarget alpha*-*-*]
3243 || [istarget ia64-*-*]
3244 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3245 && ![is-effective-target ia32])
3246 || ([istarget powerpc*-*-*]
3247 && ([check_effective_target_powerpc_spe]
3248 || [check_effective_target_powerpc_altivec]))
3249 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3250 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3251 || [istarget aarch64*-*-*] } {
3258 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3260 # This won't change for different subtargets so cache the result.
3262 proc check_effective_target_vect_int { } {
3263 return [check_cached_effective_target_indexed vect_int {
3265 [istarget i?86-*-*] || [istarget x86_64-*-*]
3266 || ([istarget powerpc*-*-*]
3267 && ![istarget powerpc-*-linux*paired*])
3268 || [istarget amdgcn-*-*]
3269 || [istarget sparc*-*-*]
3270 || [istarget alpha*-*-*]
3271 || [istarget ia64-*-*]
3272 || [istarget aarch64*-*-*]
3273 || [is-effective-target arm_neon]
3274 || ([istarget mips*-*-*]
3275 && ([et-is-effective-target mips_loongson_mmi]
3276 || [et-is-effective-target mips_msa]))
3277 || ([istarget s390*-*-*]
3278 && [check_effective_target_s390_vx])
3282 # Return 1 if the target supports signed int->float conversion
3285 proc check_effective_target_vect_intfloat_cvt { } {
3286 return [check_cached_effective_target_indexed vect_intfloat_cvt {
3287 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3288 || ([istarget powerpc*-*-*]
3289 && ![istarget powerpc-*-linux*paired*])
3290 || [is-effective-target arm_neon]
3291 || ([istarget mips*-*-*]
3292 && [et-is-effective-target mips_msa])
3293 || [istarget amdgcn-*-*] }}]
3296 # Return 1 if the target supports signed double->int conversion
3299 proc check_effective_target_vect_doubleint_cvt { } {
3300 return [check_cached_effective_target_indexed vect_doubleint_cvt {
3301 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3302 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3303 #ifdef __tune_atom__
3304 # error No double vectorizer support.
3307 || [istarget aarch64*-*-*]
3308 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3309 || ([istarget mips*-*-*]
3310 && [et-is-effective-target mips_msa]) }}]
3313 # Return 1 if the target supports signed int->double conversion
3316 proc check_effective_target_vect_intdouble_cvt { } {
3317 return [check_cached_effective_target_indexed vect_intdouble_cvt {
3318 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3319 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3320 #ifdef __tune_atom__
3321 # error No double vectorizer support.
3324 || [istarget aarch64*-*-*]
3325 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3326 || ([istarget mips*-*-*]
3327 && [et-is-effective-target mips_msa]) }}]
3330 #Return 1 if we're supporting __int128 for target, 0 otherwise.
3332 proc check_effective_target_int128 { } {
3333 return [check_no_compiler_messages int128 object {
3335 #ifndef __SIZEOF_INT128__
3344 # Return 1 if the target supports unsigned int->float conversion
3347 proc check_effective_target_vect_uintfloat_cvt { } {
3348 return [check_cached_effective_target_indexed vect_uintfloat_cvt {
3349 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3350 || ([istarget powerpc*-*-*]
3351 && ![istarget powerpc-*-linux*paired*])
3352 || [istarget aarch64*-*-*]
3353 || [is-effective-target arm_neon]
3354 || ([istarget mips*-*-*]
3355 && [et-is-effective-target mips_msa])
3356 || [istarget amdgcn-*-*] }}]
3360 # Return 1 if the target supports signed float->int conversion
3363 proc check_effective_target_vect_floatint_cvt { } {
3364 return [check_cached_effective_target_indexed vect_floatint_cvt {
3365 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3366 || ([istarget powerpc*-*-*]
3367 && ![istarget powerpc-*-linux*paired*])
3368 || [is-effective-target arm_neon]
3369 || ([istarget mips*-*-*]
3370 && [et-is-effective-target mips_msa])
3371 || [istarget amdgcn-*-*] }}]
3374 # Return 1 if the target supports unsigned float->int conversion
3377 proc check_effective_target_vect_floatuint_cvt { } {
3378 return [check_cached_effective_target_indexed vect_floatuint_cvt {
3379 expr { ([istarget powerpc*-*-*]
3380 && ![istarget powerpc-*-linux*paired*])
3381 || [is-effective-target arm_neon]
3382 || ([istarget mips*-*-*]
3383 && [et-is-effective-target mips_msa])
3384 || [istarget amdgcn-*-*] }}]
3387 # Return 1 if peeling for alignment might be profitable on the target
3390 proc check_effective_target_vect_peeling_profitable { } {
3391 return [check_cached_effective_target_indexed vect_peeling_profitable {
3392 expr { ([istarget s390*-*-*]
3393 && [check_effective_target_s390_vx])
3394 || [check_effective_target_vect_element_align_preferred] }}]
3397 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3399 # This won't change for different subtargets so cache the result.
3401 proc check_effective_target_vect_simd_clones { } {
3402 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3403 # avx2 and avx512f clone. Only the right clone for the
3404 # specified arch will be chosen, but still we need to at least
3405 # be able to assemble avx512f.
3406 return [check_cached_effective_target_indexed vect_simd_clones {
3407 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3408 && [check_effective_target_avx512f])
3409 || [istarget amdgcn-*-*] }}]
3412 # Return 1 if this is a AArch64 target supporting big endian
3413 proc check_effective_target_aarch64_big_endian { } {
3414 return [check_no_compiler_messages aarch64_big_endian assembly {
3415 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3416 #error !__aarch64__ || !__AARCH64EB__
3421 # Return 1 if this is a AArch64 target supporting little endian
3422 proc check_effective_target_aarch64_little_endian { } {
3423 if { ![istarget aarch64*-*-*] } {
3427 return [check_no_compiler_messages aarch64_little_endian assembly {
3428 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3434 # Return 1 if this is an AArch64 target supporting SVE.
3435 proc check_effective_target_aarch64_sve { } {
3436 if { ![istarget aarch64*-*-*] } {
3439 return [check_no_compiler_messages aarch64_sve assembly {
3440 #if !defined (__ARM_FEATURE_SVE)
3446 # Return 1 if this is an AArch64 target supporting SVE2.
3447 proc check_effective_target_aarch64_sve2 { } {
3448 if { ![istarget aarch64*-*-*] } {
3451 return [check_no_compiler_messages aarch64_sve2 assembly {
3452 #if !defined (__ARM_FEATURE_SVE2)
3458 # Return 1 if this is an AArch64 target only supporting SVE (not SVE2).
3459 proc check_effective_target_aarch64_sve1_only { } {
3460 return [expr { [check_effective_target_aarch64_sve]
3461 && ![check_effective_target_aarch64_sve2] }]
3464 # Return the size in bits of an SVE vector, or 0 if the size is variable.
3465 proc aarch64_sve_bits { } {
3466 return [check_cached_effective_target aarch64_sve_bits {
3469 set src dummy[pid].c
3470 set f [open $src "w"]
3471 puts $f "int bits = __ARM_FEATURE_SVE_BITS;"
3473 set output [${tool}_target_compile $src "" preprocess ""]
3476 regsub {.*bits = ([^;]*);.*} $output {\1} bits
3481 # Return 1 if this is a compiler supporting ARC atomic operations
3482 proc check_effective_target_arc_atomic { } {
3483 return [check_no_compiler_messages arc_atomic assembly {
3484 #if !defined(__ARC_ATOMIC__)
3490 # Return 1 if this is an arm target using 32-bit instructions
3491 proc check_effective_target_arm32 { } {
3492 if { ![istarget arm*-*-*] } {
3496 return [check_no_compiler_messages arm32 assembly {
3497 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3498 #error !__arm || __thumb__ && !__thumb2__
3503 # Return 1 if this is an arm target not using Thumb
3504 proc check_effective_target_arm_nothumb { } {
3505 if { ![istarget arm*-*-*] } {
3509 return [check_no_compiler_messages arm_nothumb assembly {
3510 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3511 #error !__arm__ || __thumb || __thumb2__
3516 # Return 1 if this is a little-endian ARM target
3517 proc check_effective_target_arm_little_endian { } {
3518 if { ![istarget arm*-*-*] } {
3522 return [check_no_compiler_messages arm_little_endian assembly {
3523 #if !defined(__arm__) || !defined(__ARMEL__)
3524 #error !__arm__ || !__ARMEL__
3529 # Return 1 if this is an ARM target that only supports aligned vector accesses
3530 proc check_effective_target_arm_vect_no_misalign { } {
3531 if { ![istarget arm*-*-*] } {
3535 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3536 #if !defined(__arm__) \
3537 || (defined(__ARM_FEATURE_UNALIGNED) \
3538 && defined(__ARMEL__))
3539 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3545 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
3546 # multilibs may be incompatible with this option.
3548 proc check_effective_target_arm_soft_ok { } {
3549 if { [check_effective_target_arm32] } {
3550 return [check_no_compiler_messages arm_soft_ok executable {
3551 int main() { return 0;}
3552 } "-mfloat-abi=soft"]
3558 # Return 1 if this is an ARM target supporting -mfpu=vfp with an
3561 proc check_effective_target_arm_vfp_ok_nocache { } {
3562 global et_arm_vfp_flags
3563 set et_arm_vfp_flags ""
3564 if { [check_effective_target_arm32] } {
3565 foreach flags {"-mfpu=vfp" "-mfpu=vfp -mfloat-abi=softfp" "-mfpu=vfp -mfloat-abi=hard"} {
3566 if { [check_no_compiler_messages_nocache arm_vfp_ok object {
3568 #error __ARM_FP not defined
3571 set et_arm_vfp_flags $flags
3580 proc check_effective_target_arm_vfp_ok { } {
3581 return [check_cached_effective_target arm_vfp_ok \
3582 check_effective_target_arm_vfp_ok_nocache]
3585 # Add the options needed to compile code with -mfpu=vfp. We need either
3586 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3587 # specified by the multilib, use it.
3589 proc add_options_for_arm_vfp { flags } {
3590 if { ! [check_effective_target_arm_vfp_ok] } {
3593 global et_arm_vfp_flags
3594 return "$flags $et_arm_vfp_flags"
3597 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3598 # -mfloat-abi=softfp.
3600 proc check_effective_target_arm_vfp3_ok { } {
3601 if { [check_effective_target_arm32] } {
3602 return [check_no_compiler_messages arm_vfp3_ok object {
3604 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3610 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3611 # -mfloat-abi=softfp.
3612 proc check_effective_target_arm_v8_vfp_ok {} {
3613 if { [check_effective_target_arm32] } {
3614 return [check_no_compiler_messages arm_v8_vfp_ok object {
3617 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3620 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3626 # Return 1 if this is an ARM target supporting -mfpu=vfp
3627 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3630 proc check_effective_target_arm_hard_vfp_ok { } {
3631 if { [check_effective_target_arm32]
3632 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3633 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3634 int main() { return 0;}
3635 } "-mfpu=vfp -mfloat-abi=hard"]
3641 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3642 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3643 # incompatible with these options. Also set et_arm_fp_flags to the
3644 # best options to add.
3646 proc check_effective_target_arm_fp_ok_nocache { } {
3647 global et_arm_fp_flags
3648 set et_arm_fp_flags ""
3649 if { [check_effective_target_arm32] } {
3650 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3651 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3653 #error __ARM_FP not defined
3656 set et_arm_fp_flags $flags
3665 proc check_effective_target_arm_fp_ok { } {
3666 return [check_cached_effective_target arm_fp_ok \
3667 check_effective_target_arm_fp_ok_nocache]
3670 # Add the options needed to define __ARM_FP. We need either
3671 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3672 # specified by the multilib, use it.
3674 proc add_options_for_arm_fp { flags } {
3675 if { ! [check_effective_target_arm_fp_ok] } {
3678 global et_arm_fp_flags
3679 return "$flags $et_arm_fp_flags"
3682 # Return 1 if this is an ARM target that supports DSP multiply with
3683 # current multilib flags.
3685 proc check_effective_target_arm_dsp { } {
3686 return [check_no_compiler_messages arm_dsp assembly {
3687 #ifndef __ARM_FEATURE_DSP
3694 # Return 1 if this is an ARM target that supports unaligned word/halfword
3695 # load/store instructions.
3697 proc check_effective_target_arm_unaligned { } {
3698 return [check_no_compiler_messages arm_unaligned assembly {
3699 #ifndef __ARM_FEATURE_UNALIGNED
3700 #error no unaligned support
3706 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3707 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3708 # incompatible with these options. Also set et_arm_crypto_flags to the
3709 # best options to add.
3711 proc check_effective_target_arm_crypto_ok_nocache { } {
3712 global et_arm_crypto_flags
3713 set et_arm_crypto_flags ""
3714 if { [check_effective_target_arm_v8_neon_ok] } {
3715 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3716 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3717 #include "arm_neon.h"
3719 foo (uint8x16_t a, uint8x16_t b)
3721 return vaeseq_u8 (a, b);
3724 set et_arm_crypto_flags $flags
3733 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3735 proc check_effective_target_arm_crypto_ok { } {
3736 return [check_cached_effective_target arm_crypto_ok \
3737 check_effective_target_arm_crypto_ok_nocache]
3740 # Add options for crypto extensions.
3741 proc add_options_for_arm_crypto { flags } {
3742 if { ! [check_effective_target_arm_crypto_ok] } {
3745 global et_arm_crypto_flags
3746 return "$flags $et_arm_crypto_flags"
3749 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3750 # or -mfloat-abi=hard, but if one is already specified by the
3751 # multilib, use it. Similarly, if a -mfpu option already enables
3752 # NEON, do not add -mfpu=neon.
3754 proc add_options_for_arm_neon { flags } {
3755 if { ! [check_effective_target_arm_neon_ok] } {
3758 global et_arm_neon_flags
3759 return "$flags $et_arm_neon_flags"
3762 proc add_options_for_arm_v8_vfp { flags } {
3763 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3766 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3769 proc add_options_for_arm_v8_neon { flags } {
3770 if { ! [check_effective_target_arm_v8_neon_ok] } {
3773 global et_arm_v8_neon_flags
3774 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3777 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3778 # options for AArch64 and for ARM.
3780 proc add_options_for_arm_v8_1a_neon { flags } {
3781 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3784 global et_arm_v8_1a_neon_flags
3785 return "$flags $et_arm_v8_1a_neon_flags"
3788 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3789 # Also adds the ARMv8 FP options for ARM and for AArch64.
3791 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3792 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3795 global et_arm_v8_2a_fp16_scalar_flags
3796 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3799 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3800 # the ARMv8 NEON options for ARM and for AArch64.
3802 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3803 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3806 global et_arm_v8_2a_fp16_neon_flags
3807 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3810 proc add_options_for_arm_crc { flags } {
3811 if { ! [check_effective_target_arm_crc_ok] } {
3814 global et_arm_crc_flags
3815 return "$flags $et_arm_crc_flags"
3818 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3819 # or -mfloat-abi=hard, but if one is already specified by the
3820 # multilib, use it. Similarly, if a -mfpu option already enables
3821 # NEON, do not add -mfpu=neon.
3823 proc add_options_for_arm_neonv2 { flags } {
3824 if { ! [check_effective_target_arm_neonv2_ok] } {
3827 global et_arm_neonv2_flags
3828 return "$flags $et_arm_neonv2_flags"
3831 # Add the options needed for vfp3.
3832 proc add_options_for_arm_vfp3 { flags } {
3833 if { ! [check_effective_target_arm_vfp3_ok] } {
3836 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3839 # Return 1 if this is an ARM target supporting -mfpu=neon
3840 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3841 # incompatible with these options. Also set et_arm_neon_flags to the
3842 # best options to add.
3844 proc check_effective_target_arm_neon_ok_nocache { } {
3845 global et_arm_neon_flags
3846 set et_arm_neon_flags ""
3847 if { [check_effective_target_arm32] } {
3848 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3849 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3850 #include <arm_neon.h>
3852 #ifndef __ARM_NEON__
3855 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3856 configured for -mcpu=arm926ej-s, for example. */
3857 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3858 #error Architecture does not support NEON.
3861 set et_arm_neon_flags $flags
3870 proc check_effective_target_arm_neon_ok { } {
3871 return [check_cached_effective_target arm_neon_ok \
3872 check_effective_target_arm_neon_ok_nocache]
3876 # Return 1 if this is an ARM target supporting the SIMD32 intrinsics
3877 # from arm_acle.h. Some multilibs may be incompatible with these options.
3878 # Also set et_arm_simd32_flags to the best options to add.
3879 # arm_acle.h includes stdint.h which can cause trouble with incompatible
3880 # -mfloat-abi= options.
3882 proc check_effective_target_arm_simd32_ok_nocache { } {
3883 global et_arm_simd32_flags
3884 set et_arm_simd32_flags ""
3885 foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp" "-march=armv6 -mfloat-abi=hard"} {
3886 if { [check_no_compiler_messages_nocache arm_simd32_ok object {
3887 #include <arm_acle.h>
3889 #ifndef __ARM_FEATURE_SIMD32
3893 set et_arm_simd32_flags $flags
3901 proc check_effective_target_arm_simd32_ok { } {
3902 return [check_cached_effective_target arm_simd32_ok \
3903 check_effective_target_arm_simd32_ok_nocache]
3906 proc add_options_for_arm_simd32 { flags } {
3907 if { ! [check_effective_target_arm_simd32_ok] } {
3910 global et_arm_simd32_flags
3911 return "$flags $et_arm_simd32_flags"
3914 # Return 1 if this is an ARM target supporting the saturation intrinsics
3915 # from arm_acle.h. Some multilibs may be incompatible with these options.
3916 # Also set et_arm_qbit_flags to the best options to add.
3917 # arm_acle.h includes stdint.h which can cause trouble with incompatible
3918 # -mfloat-abi= options.
3920 proc check_effective_target_arm_qbit_ok_nocache { } {
3921 global et_arm_qbit_flags
3922 set et_arm_qbit_flags ""
3923 foreach flags {"" "-march=armv5te" "-march=armv5te -mfloat-abi=softfp" "-march=armv5te -mfloat-abi=hard"} {
3924 if { [check_no_compiler_messages_nocache et_arm_qbit_flags object {
3925 #include <arm_acle.h>
3927 #ifndef __ARM_FEATURE_QBIT
3931 set et_arm_qbit_flags $flags
3939 proc check_effective_target_arm_qbit_ok { } {
3940 return [check_cached_effective_target et_arm_qbit_flags \
3941 check_effective_target_arm_qbit_ok_nocache]
3944 proc add_options_for_arm_qbit { flags } {
3945 if { ! [check_effective_target_arm_qbit_ok] } {
3948 global et_arm_qbit_flags
3949 return "$flags $et_arm_qbit_flags"
3952 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3953 # -mfloat-abi= option. Useful in tests where add_options is not
3954 # supported (such as lto tests).
3956 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3957 if { [check_effective_target_arm32] } {
3958 foreach flags {"-mfpu=neon"} {
3959 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3960 #include <arm_neon.h>
3962 #ifndef __ARM_NEON__
3965 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3966 configured for -mcpu=arm926ej-s, for example. */
3967 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3968 #error Architecture does not support NEON.
3979 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3980 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3981 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3984 proc check_effective_target_arm_crc_ok_nocache { } {
3985 global et_arm_crc_flags
3986 set et_arm_crc_flags "-march=armv8-a+crc"
3987 return [check_no_compiler_messages_nocache arm_crc_ok object {
3988 #if !defined (__ARM_FEATURE_CRC32)
3991 } "$et_arm_crc_flags"]
3994 proc check_effective_target_arm_crc_ok { } {
3995 return [check_cached_effective_target arm_crc_ok \
3996 check_effective_target_arm_crc_ok_nocache]
3999 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4000 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4001 # incompatible with these options. Also set et_arm_neon_fp16_flags to
4002 # the best options to add.
4004 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
4005 global et_arm_neon_fp16_flags
4006 global et_arm_neon_flags
4007 set et_arm_neon_fp16_flags ""
4008 if { [check_effective_target_arm32]
4009 && [check_effective_target_arm_neon_ok] } {
4010 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4011 "-mfpu=neon-fp16 -mfloat-abi=softfp"
4012 "-mfp16-format=ieee"
4013 "-mfloat-abi=softfp -mfp16-format=ieee"
4014 "-mfpu=neon-fp16 -mfp16-format=ieee"
4015 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4016 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
4017 #include "arm_neon.h"
4019 foo (float32x4_t arg)
4021 return vcvt_f16_f32 (arg);
4023 } "$et_arm_neon_flags $flags"] } {
4024 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
4033 proc check_effective_target_arm_neon_fp16_ok { } {
4034 return [check_cached_effective_target arm_neon_fp16_ok \
4035 check_effective_target_arm_neon_fp16_ok_nocache]
4038 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4039 # and -mfloat-abi=softfp together. Some multilibs may be
4040 # incompatible with these options. Also set et_arm_neon_softfp_fp16_flags to
4041 # the best options to add.
4043 proc check_effective_target_arm_neon_softfp_fp16_ok_nocache { } {
4044 global et_arm_neon_softfp_fp16_flags
4045 global et_arm_neon_flags
4046 set et_arm_neon_softfp_fp16_flags ""
4047 if { [check_effective_target_arm32]
4048 && [check_effective_target_arm_neon_ok] } {
4049 foreach flags {"-mfpu=neon-fp16 -mfloat-abi=softfp"
4050 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4051 if { [check_no_compiler_messages_nocache arm_neon_softfp_fp16_ok object {
4052 #include "arm_neon.h"
4054 foo (float32x4_t arg)
4056 return vcvt_f16_f32 (arg);
4058 } "$et_arm_neon_flags $flags"] } {
4059 set et_arm_neon_softfp_fp16_flags [concat $et_arm_neon_flags $flags]
4068 proc check_effective_target_arm_neon_softfp_fp16_ok { } {
4069 return [check_cached_effective_target arm_neon_softfp_fp16_ok \
4070 check_effective_target_arm_neon_softfp_fp16_ok_nocache]
4075 proc check_effective_target_arm_neon_fp16_hw { } {
4076 if {! [check_effective_target_arm_neon_fp16_ok] } {
4079 global et_arm_neon_fp16_flags
4080 check_runtime arm_neon_fp16_hw {
4082 main (int argc, char **argv)
4084 asm ("vcvt.f32.f16 q1, d0");
4087 } $et_arm_neon_fp16_flags
4090 proc add_options_for_arm_neon_fp16 { flags } {
4091 if { ! [check_effective_target_arm_neon_fp16_ok] } {
4094 global et_arm_neon_fp16_flags
4095 return "$flags $et_arm_neon_fp16_flags"
4098 proc add_options_for_arm_neon_softfp_fp16 { flags } {
4099 if { ! [check_effective_target_arm_neon_softfp_fp16_ok] } {
4102 global et_arm_neon_softfp_fp16_flags
4103 return "$flags $et_arm_neon_softfp_fp16_flags"
4106 proc add_options_for_aarch64_sve { flags } {
4107 if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sve] } {
4110 return "$flags -march=armv8.2-a+sve"
4113 # Return 1 if this is an ARM target supporting the FP16 alternative
4114 # format. Some multilibs may be incompatible with the options needed. Also
4115 # set et_arm_neon_fp16_flags to the best options to add.
4117 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
4118 global et_arm_neon_fp16_flags
4119 set et_arm_neon_fp16_flags ""
4120 if { [check_effective_target_arm32] } {
4121 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4122 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4123 if { [check_no_compiler_messages_nocache \
4124 arm_fp16_alternative_ok object {
4125 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4126 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
4128 } "$flags -mfp16-format=alternative"] } {
4129 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
4138 proc check_effective_target_arm_fp16_alternative_ok { } {
4139 return [check_cached_effective_target arm_fp16_alternative_ok \
4140 check_effective_target_arm_fp16_alternative_ok_nocache]
4143 # Return 1 if this is an ARM target supports specifying the FP16 none
4144 # format. Some multilibs may be incompatible with the options needed.
4146 proc check_effective_target_arm_fp16_none_ok_nocache { } {
4147 if { [check_effective_target_arm32] } {
4148 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4149 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4150 if { [check_no_compiler_messages_nocache \
4151 arm_fp16_none_ok object {
4152 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4153 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
4155 #if defined (__ARM_FP16_FORMAT_IEEE)
4156 #error __ARM_FP16_FORMAT_IEEE defined
4158 } "$flags -mfp16-format=none"] } {
4167 proc check_effective_target_arm_fp16_none_ok { } {
4168 return [check_cached_effective_target arm_fp16_none_ok \
4169 check_effective_target_arm_fp16_none_ok_nocache]
4172 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
4173 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4174 # incompatible with these options. Also set et_arm_v8_neon_flags to the
4175 # best options to add.
4177 proc check_effective_target_arm_v8_neon_ok_nocache { } {
4178 global et_arm_v8_neon_flags
4179 set et_arm_v8_neon_flags ""
4180 if { [check_effective_target_arm32] } {
4181 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4182 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
4184 #error not armv8 or later
4186 #include "arm_neon.h"
4190 __asm__ volatile ("vrintn.f32 q0, q0");
4192 } "$flags -march=armv8-a"] } {
4193 set et_arm_v8_neon_flags $flags
4202 proc check_effective_target_arm_v8_neon_ok { } {
4203 return [check_cached_effective_target arm_v8_neon_ok \
4204 check_effective_target_arm_v8_neon_ok_nocache]
4207 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
4208 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4209 # incompatible with these options. Also set et_arm_neonv2_flags to the
4210 # best options to add.
4212 proc check_effective_target_arm_neonv2_ok_nocache { } {
4213 global et_arm_neonv2_flags
4214 global et_arm_neon_flags
4215 set et_arm_neonv2_flags ""
4216 if { [check_effective_target_arm32]
4217 && [check_effective_target_arm_neon_ok] } {
4218 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
4219 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
4220 #include "arm_neon.h"
4222 foo (float32x2_t a, float32x2_t b, float32x2_t c)
4224 return vfma_f32 (a, b, c);
4226 } "$et_arm_neon_flags $flags"] } {
4227 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
4236 proc check_effective_target_arm_neonv2_ok { } {
4237 return [check_cached_effective_target arm_neonv2_ok \
4238 check_effective_target_arm_neonv2_ok_nocache]
4241 # Add the options needed for VFP FP16 support. We need either
4242 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
4243 # the multilib, use it.
4245 proc add_options_for_arm_fp16 { flags } {
4246 if { ! [check_effective_target_arm_fp16_ok] } {
4249 global et_arm_fp16_flags
4250 return "$flags $et_arm_fp16_flags"
4253 # Add the options needed to enable support for IEEE format
4254 # half-precision support. This is valid for ARM targets.
4256 proc add_options_for_arm_fp16_ieee { flags } {
4257 if { ! [check_effective_target_arm_fp16_ok] } {
4260 global et_arm_fp16_flags
4261 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
4264 # Add the options needed to enable support for ARM Alternative format
4265 # half-precision support. This is valid for ARM targets.
4267 proc add_options_for_arm_fp16_alternative { flags } {
4268 if { ! [check_effective_target_arm_fp16_ok] } {
4271 global et_arm_fp16_flags
4272 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
4275 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
4276 # Skip multilibs that are incompatible with these options and set
4277 # et_arm_fp16_flags to the best options to add. This test is valid for
4280 proc check_effective_target_arm_fp16_ok_nocache { } {
4281 global et_arm_fp16_flags
4282 set et_arm_fp16_flags ""
4283 if { ! [check_effective_target_arm32] } {
4287 [list "" { *-*-* } { "-mfpu=*" } \
4288 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
4289 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
4290 # Multilib flags would override -mfpu.
4293 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
4294 # Must generate floating-point instructions.
4297 if [check_effective_target_arm_hf_eabi] {
4298 # Use existing float-abi and force an fpu which supports fp16
4299 set et_arm_fp16_flags "-mfpu=vfpv4"
4302 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4303 # The existing -mfpu value is OK; use it, but add softfp.
4304 set et_arm_fp16_flags "-mfloat-abi=softfp"
4307 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4308 # macro to check for this support.
4309 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4310 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4313 set et_arm_fp16_flags "$flags"
4320 proc check_effective_target_arm_fp16_ok { } {
4321 return [check_cached_effective_target arm_fp16_ok \
4322 check_effective_target_arm_fp16_ok_nocache]
4325 # Return 1 if the target supports executing VFP FP16 instructions, 0
4326 # otherwise. This test is valid for ARM only.
4328 proc check_effective_target_arm_fp16_hw { } {
4329 if {! [check_effective_target_arm_fp16_ok] } {
4332 global et_arm_fp16_flags
4333 check_runtime arm_fp16_hw {
4335 main (int argc, char **argv)
4339 asm ("vcvtb.f32.f16 %0, %1"
4340 : "=w" (r) : "w" (a)
4341 : /* No clobbers. */);
4342 return (r == 1.0) ? 0 : 1;
4344 } "$et_arm_fp16_flags -mfp16-format=ieee"
4347 # Creates a series of routines that return 1 if the given architecture
4348 # can be selected and a routine to give the flags to select that architecture
4349 # Note: Extra flags may be added to disable options from newer compilers
4350 # (Thumb in particular - but others may be added in the future).
4351 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4352 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4353 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4354 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4355 # /* { dg-add-options arm_arch_v5t } */
4356 # /* { dg-require-effective-target arm_arch_v5t_multilib } */
4357 foreach { armfunc armflag armdefs } {
4358 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4359 v4t "-march=armv4t -mfloat-abi=softfp" __ARM_ARCH_4T__
4360 v4t_arm "-march=armv4t -marm" __ARM_ARCH_4T__
4361 v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" __ARM_ARCH_4T__
4362 v5t "-march=armv5t -mfloat-abi=softfp" __ARM_ARCH_5T__
4363 v5t_arm "-march=armv5t -marm" __ARM_ARCH_5T__
4364 v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" __ARM_ARCH_5T__
4365 v5te "-march=armv5te -mfloat-abi=softfp" __ARM_ARCH_5TE__
4366 v5te_arm "-march=armv5te -marm" __ARM_ARCH_5TE__
4367 v5te_thumb "-march=armv5te -mthumb -mfloat-abi=softfp" __ARM_ARCH_5TE__
4368 v6 "-march=armv6 -mfloat-abi=softfp" __ARM_ARCH_6__
4369 v6_arm "-march=armv6 -marm" __ARM_ARCH_6__
4370 v6_thumb "-march=armv6 -mthumb -mfloat-abi=softfp" __ARM_ARCH_6__
4371 v6k "-march=armv6k -mfloat-abi=softfp" __ARM_ARCH_6K__
4372 v6k_arm "-march=armv6k -marm" __ARM_ARCH_6K__
4373 v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
4374 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4375 v6z "-march=armv6z -mfloat-abi=softfp" __ARM_ARCH_6Z__
4376 v6z_arm "-march=armv6z -marm" __ARM_ARCH_6Z__
4377 v6z_thumb "-march=armv6z -mthumb -mfloat-abi=softfp" __ARM_ARCH_6Z__
4378 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4379 v7a "-march=armv7-a" __ARM_ARCH_7A__
4380 v7r "-march=armv7-r" __ARM_ARCH_7R__
4381 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4382 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4383 v7ve "-march=armv7ve -marm"
4384 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4385 v8a "-march=armv8-a" __ARM_ARCH_8A__
4386 v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
4387 v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
4388 v8r "-march=armv8-r" __ARM_ARCH_8R__
4389 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4390 __ARM_ARCH_8M_BASE__
4391 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4392 v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
4393 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4394 proc check_effective_target_arm_arch_FUNC_ok { } {
4395 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4407 proc add_options_for_arm_arch_FUNC { flags } {
4408 return "$flags FLAG"
4411 proc check_effective_target_arm_arch_FUNC_multilib { } {
4412 return [check_runtime arm_arch_FUNC_multilib {
4418 } [add_options_for_arm_arch_FUNC ""]]
4423 # Return 1 if GCC was configured with --with-mode=
4424 proc check_effective_target_default_mode { } {
4426 return [check_configured_with "with-mode="]
4429 # Return 1 if this is an ARM target where -marm causes ARM to be
4432 proc check_effective_target_arm_arm_ok { } {
4433 return [check_no_compiler_messages arm_arm_ok assembly {
4434 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4435 #error !__arm__ || __thumb__ || __thumb2__
4441 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4444 proc check_effective_target_arm_thumb1_ok { } {
4445 return [check_no_compiler_messages arm_thumb1_ok assembly {
4446 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4447 #error !__arm__ || !__thumb__ || __thumb2__
4449 int foo (int i) { return i; }
4453 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4456 proc check_effective_target_arm_thumb2_ok { } {
4457 return [check_no_compiler_messages arm_thumb2_ok assembly {
4458 #if !defined(__thumb2__)
4461 int foo (int i) { return i; }
4465 # Return 1 if this is an ARM target where Thumb-1 is used without options
4466 # added by the test.
4468 proc check_effective_target_arm_thumb1 { } {
4469 return [check_no_compiler_messages arm_thumb1 assembly {
4470 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4471 #error !__arm__ || !__thumb__ || __thumb2__
4477 # Return 1 if this is an ARM target where Thumb-2 is used without options
4478 # added by the test.
4480 proc check_effective_target_arm_thumb2 { } {
4481 return [check_no_compiler_messages arm_thumb2 assembly {
4482 #if !defined(__thumb2__)
4489 # Return 1 if this is an ARM target where conditional execution is available.
4491 proc check_effective_target_arm_cond_exec { } {
4492 return [check_no_compiler_messages arm_cond_exec assembly {
4493 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4500 # Return 1 if this is an ARM cortex-M profile cpu
4502 proc check_effective_target_arm_cortex_m { } {
4503 if { ![istarget arm*-*-*] } {
4506 return [check_no_compiler_messages arm_cortex_m assembly {
4507 #if defined(__ARM_ARCH_ISA_ARM)
4508 #error __ARM_ARCH_ISA_ARM is defined
4514 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4515 # used and MOVT/MOVW instructions to be available.
4517 proc check_effective_target_arm_thumb1_movt_ok {} {
4518 if [check_effective_target_arm_thumb1_ok] {
4519 return [check_no_compiler_messages arm_movt object {
4523 asm ("movt r0, #42");
4531 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4532 # used and CBZ and CBNZ instructions are available.
4534 proc check_effective_target_arm_thumb1_cbz_ok {} {
4535 if [check_effective_target_arm_thumb1_ok] {
4536 return [check_no_compiler_messages arm_movt object {
4540 asm ("cbz r0, 2f\n2:");
4548 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4551 proc check_effective_target_arm_cmse_ok {} {
4552 return [check_no_compiler_messages arm_cmse object {
4561 # Return 1 if this is an ARM target where ARMv8-M Security Extensions with
4562 # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.
4564 proc check_effective_target_arm_cmse_clear_ok {} {
4565 return [check_no_compiler_messages arm_cmse_clear object {
4569 asm ("clrm {r1, r2}");
4574 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4576 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4577 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4578 int foo (void) { return 0; }
4579 } "-O2 -mprint-tune-info" ]
4582 # Return 1 if the target supports executing NEON instructions, 0
4583 # otherwise. Cache the result.
4585 proc check_effective_target_arm_neon_hw { } {
4586 return [check_runtime arm_neon_hw_available {
4590 long long a = 0, b = 1;
4591 asm ("vorr %P0, %P1, %P2"
4593 : "0" (a), "w" (b));
4596 } [add_options_for_arm_neon ""]]
4599 # Return true if this is an AArch64 target that can run SVE code.
4601 proc check_effective_target_aarch64_sve_hw { } {
4602 if { ![istarget aarch64*-*-*] } {
4605 return [check_runtime aarch64_sve_hw_available {
4609 asm volatile ("ptrue p0.b");
4612 } [add_options_for_aarch64_sve ""]]
4615 # Return true if this is an AArch64 target that can run SVE2 code.
4617 proc check_effective_target_aarch64_sve2_hw { } {
4618 if { ![istarget aarch64*-*-*] } {
4621 return [check_runtime aarch64_sve2_hw_available {
4625 asm volatile ("addp z0.b, p0/m, z0.b, z1.b");
4631 # Return true if this is an AArch64 target that can run SVE code and
4632 # if its SVE vectors have exactly BITS bits.
4634 proc aarch64_sve_hw_bits { bits } {
4635 if { ![check_effective_target_aarch64_sve_hw] } {
4638 return [check_runtime aarch64_sve${bits}_hw [subst {
4643 asm volatile ("cntd %0" : "=r" (res));
4644 if (res * 64 != $bits)
4648 }] [add_options_for_aarch64_sve ""]]
4651 # Return true if this is an AArch64 target that can run SVE code and
4652 # if its SVE vectors have exactly 256 bits.
4654 proc check_effective_target_aarch64_sve256_hw { } {
4655 return [aarch64_sve_hw_bits 256]
4658 proc check_effective_target_arm_neonv2_hw { } {
4659 return [check_runtime arm_neon_hwv2_available {
4660 #include "arm_neon.h"
4664 float32x2_t a, b, c;
4665 asm ("vfma.f32 %P0, %P1, %P2"
4667 : "w" (b), "w" (c));
4670 } [add_options_for_arm_neonv2 ""]]
4673 # ID_AA64PFR1_EL1.BT using bits[3:0] == 1 implies BTI implimented.
4674 proc check_effective_target_aarch64_bti_hw { } {
4675 if { ![istarget aarch64*-*-*] } {
4678 return [check_runtime aarch64_bti_hw_available {
4683 asm volatile ("mrs %0, id_aa64pfr1_el1" : "=r" (a));
4684 return !((a & 0xf) == 1);
4689 # Return 1 if GCC was configured with --enable-standard-branch-protection
4690 proc check_effective_target_default_branch_protection { } {
4691 return [check_configured_with "enable-standard-branch-protection"]
4694 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4695 # otherwise. The test is valid for AArch64 and ARM. Record the command
4696 # line options needed.
4698 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4699 global et_arm_v8_1a_neon_flags
4700 set et_arm_v8_1a_neon_flags ""
4702 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4706 # Iterate through sets of options to find the compiler flags that
4707 # need to be added to the -march option. Start with the empty set
4708 # since AArch64 only needs the -march setting.
4709 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4710 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4711 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4712 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4713 #if !defined (__ARM_FEATURE_QRDMX)
4714 #error "__ARM_FEATURE_QRDMX not defined"
4716 } "$flags $arches"] } {
4717 set et_arm_v8_1a_neon_flags "$flags $arches"
4726 proc check_effective_target_arm_v8_1a_neon_ok { } {
4727 return [check_cached_effective_target arm_v8_1a_neon_ok \
4728 check_effective_target_arm_v8_1a_neon_ok_nocache]
4731 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4732 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4733 # Record the command line options needed.
4735 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4736 global et_arm_v8_2a_fp16_scalar_flags
4737 set et_arm_v8_2a_fp16_scalar_flags ""
4739 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4743 # Iterate through sets of options to find the compiler flags that
4744 # need to be added to the -march option.
4745 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4746 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4747 if { [check_no_compiler_messages_nocache \
4748 arm_v8_2a_fp16_scalar_ok object {
4749 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4750 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4752 } "$flags -march=armv8.2-a+fp16"] } {
4753 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4761 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4762 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4763 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4766 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4767 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4768 # Record the command line options needed.
4770 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4771 global et_arm_v8_2a_fp16_neon_flags
4772 set et_arm_v8_2a_fp16_neon_flags ""
4774 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4778 # Iterate through sets of options to find the compiler flags that
4779 # need to be added to the -march option.
4780 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4781 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4782 if { [check_no_compiler_messages_nocache \
4783 arm_v8_2a_fp16_neon_ok object {
4784 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4785 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4787 } "$flags -march=armv8.2-a+fp16"] } {
4788 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4796 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4797 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4798 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4801 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
4802 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4803 # Record the command line options needed.
4805 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
4806 global et_arm_v8_2a_dotprod_neon_flags
4807 set et_arm_v8_2a_dotprod_neon_flags ""
4809 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4813 # Iterate through sets of options to find the compiler flags that
4814 # need to be added to the -march option.
4815 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4816 if { [check_no_compiler_messages_nocache \
4817 arm_v8_2a_dotprod_neon_ok object {
4819 #if !defined (__ARM_FEATURE_DOTPROD)
4820 #error "__ARM_FEATURE_DOTPROD not defined"
4822 } "$flags -march=armv8.2-a+dotprod"] } {
4823 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
4831 # Return 1 if the target supports ARMv8.1-M MVE
4832 # instructions, 0 otherwise. The test is valid for ARM.
4833 # Record the command line options needed.
4835 proc check_effective_target_arm_v8_1m_mve_ok_nocache { } {
4836 global et_arm_v8_1m_mve_flags
4837 set et_arm_v8_1m_mve_flags ""
4839 if { ![istarget arm*-*-*] } {
4843 # Iterate through sets of options to find the compiler flags that
4844 # need to be added to the -march option.
4845 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
4846 if { [check_no_compiler_messages_nocache \
4847 arm_v8_1m_mve_ok object {
4848 #if !defined (__ARM_FEATURE_MVE)
4849 #error "__ARM_FEATURE_MVE not defined"
4851 } "$flags -mthumb"] } {
4852 set et_arm_v8_1m_mve_flags "$flags -mthumb"
4860 proc check_effective_target_arm_v8_1m_mve_ok { } {
4861 return [check_cached_effective_target arm_v8_1m_mve_ok \
4862 check_effective_target_arm_v8_1m_mve_ok_nocache]
4865 proc add_options_for_arm_v8_1m_mve { flags } {
4866 if { ! [check_effective_target_arm_v8_1m_mve_ok] } {
4869 global et_arm_v8_1m_mve_flags
4870 return "$flags $et_arm_v8_1m_mve_flags"
4873 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
4874 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
4875 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
4878 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
4879 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4882 global et_arm_v8_2a_dotprod_neon_flags
4883 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
4886 # Return 1 if the target supports ARMv8.2+i8mm Adv.SIMD Dot Product
4887 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4888 # Record the command line options needed.
4890 proc check_effective_target_arm_v8_2a_i8mm_ok_nocache { } {
4891 global et_arm_v8_2a_i8mm_flags
4892 set et_arm_v8_2a_i8mm_flags ""
4894 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4898 # Iterate through sets of options to find the compiler flags that
4899 # need to be added to the -march option.
4900 foreach flags {"" "-mfloat-abi=hard -mfpu=neon-fp-armv8" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" } {
4901 if { [check_no_compiler_messages_nocache \
4902 arm_v8_2a_i8mm_ok object {
4903 #include <arm_neon.h>
4904 #if !defined (__ARM_FEATURE_MATMUL_INT8)
4905 #error "__ARM_FEATURE_MATMUL_INT8 not defined"
4907 } "$flags -march=armv8.2-a+i8mm"] } {
4908 set et_arm_v8_2a_i8mm_flags "$flags -march=armv8.2-a+i8mm"
4916 proc check_effective_target_arm_v8_2a_i8mm_ok { } {
4917 return [check_cached_effective_target arm_v8_2a_i8mm_ok \
4918 check_effective_target_arm_v8_2a_i8mm_ok_nocache]
4921 proc add_options_for_arm_v8_2a_i8mm { flags } {
4922 if { ! [check_effective_target_arm_v8_2a_i8mm_ok] } {
4925 global et_arm_v8_2a_i8mm_flags
4926 return "$flags $et_arm_v8_2a_i8mm_flags"
4929 # Return 1 if the target supports FP16 VFMAL and VFMSL
4930 # instructions, 0 otherwise.
4931 # Record the command line options needed.
4933 proc check_effective_target_arm_fp16fml_neon_ok_nocache { } {
4934 global et_arm_fp16fml_neon_flags
4935 set et_arm_fp16fml_neon_flags ""
4937 if { ![istarget arm*-*-*] } {
4941 # Iterate through sets of options to find the compiler flags that
4942 # need to be added to the -march option.
4943 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4944 if { [check_no_compiler_messages_nocache \
4945 arm_fp16fml_neon_ok assembly {
4946 #include <arm_neon.h>
4948 foo (float32x2_t r, float16x4_t a, float16x4_t b)
4950 return vfmlal_high_f16 (r, a, b);
4952 } "$flags -march=armv8.2-a+fp16fml"] } {
4953 set et_arm_fp16fml_neon_flags "$flags -march=armv8.2-a+fp16fml"
4961 proc check_effective_target_arm_fp16fml_neon_ok { } {
4962 return [check_cached_effective_target arm_fp16fml_neon_ok \
4963 check_effective_target_arm_fp16fml_neon_ok_nocache]
4966 proc add_options_for_arm_fp16fml_neon { flags } {
4967 if { ! [check_effective_target_arm_fp16fml_neon_ok] } {
4970 global et_arm_fp16fml_neon_flags
4971 return "$flags $et_arm_fp16fml_neon_flags"
4974 # Return 1 if the target supports BFloat16 SIMD instructions, 0 otherwise.
4975 # The test is valid for ARM and for AArch64.
4977 proc check_effective_target_arm_v8_2a_bf16_neon_ok_nocache { } {
4978 global et_arm_v8_2a_bf16_neon_flags
4979 set et_arm_v8_2a_bf16_neon_flags ""
4981 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4985 foreach flags {"" "-mfloat-abi=hard -mfpu=neon-fp-armv8" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" } {
4986 if { [check_no_compiler_messages_nocache arm_v8_2a_bf16_neon_ok object {
4987 #include <arm_neon.h>
4988 #if !defined (__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)
4989 #error "__ARM_FEATURE_BF16_VECTOR_ARITHMETIC not defined"
4991 } "$flags -march=armv8.2-a+bf16"] } {
4992 set et_arm_v8_2a_bf16_neon_flags "$flags -march=armv8.2-a+bf16"
5000 proc check_effective_target_arm_v8_2a_bf16_neon_ok { } {
5001 return [check_cached_effective_target arm_v8_2a_bf16_neon_ok \
5002 check_effective_target_arm_v8_2a_bf16_neon_ok_nocache]
5005 proc add_options_for_arm_v8_2a_bf16_neon { flags } {
5006 if { ! [check_effective_target_arm_v8_2a_bf16_neon_ok] } {
5009 global et_arm_v8_2a_bf16_neon_flags
5010 return "$flags $et_arm_v8_2a_bf16_neon_flags"
5013 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
5016 proc check_effective_target_arm_v8_neon_hw { } {
5017 return [check_runtime arm_v8_neon_hw_available {
5018 #include "arm_neon.h"
5022 float32x2_t a = { 1.0f, 2.0f };
5023 #ifdef __ARM_ARCH_ISA_A64
5024 asm ("frinta %0.2s, %1.2s"
5028 asm ("vrinta.f32 %P0, %P1"
5032 return a[0] == 2.0f;
5034 } [add_options_for_arm_v8_neon ""]]
5037 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
5038 # otherwise. The test is valid for AArch64 and ARM.
5040 proc check_effective_target_arm_v8_1a_neon_hw { } {
5041 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
5044 return [check_runtime arm_v8_1a_neon_hw_available {
5048 #ifdef __ARM_ARCH_ISA_A64
5049 __Int32x2_t a = {0, 1};
5050 __Int32x2_t b = {0, 2};
5053 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
5056 : /* No clobbers. */);
5060 __simd64_int32_t a = {0, 1};
5061 __simd64_int32_t b = {0, 2};
5062 __simd64_int32_t result;
5064 asm ("vqrdmlah.s32 %P0, %P1, %P2"
5067 : /* No clobbers. */);
5072 } [add_options_for_arm_v8_1a_neon ""]]
5075 # Return 1 if the target supports executing floating point instructions from
5076 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
5079 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
5080 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
5083 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
5090 #ifdef __ARM_ARCH_ISA_A64
5092 asm ("fabs %h0, %h1"
5095 : /* No clobbers. */);
5099 asm ("vabs.f16 %0, %1"
5102 : /* No clobbers. */);
5106 return (result == 1.0) ? 0 : 1;
5108 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
5111 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
5112 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
5115 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
5116 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
5119 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
5123 #ifdef __ARM_ARCH_ISA_A64
5125 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
5126 __Float16x4_t result;
5128 asm ("fabs %0.4h, %1.4h"
5131 : /* No clobbers. */);
5135 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
5136 __simd64_float16_t result;
5138 asm ("vabs.f16 %P0, %P1"
5141 : /* No clobbers. */);
5145 return (result[0] == 1.0) ? 0 : 1;
5147 } [add_options_for_arm_v8_2a_fp16_neon ""]]
5150 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
5151 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
5154 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
5155 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
5158 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
5159 #include "arm_neon.h"
5164 uint32x2_t results = {0,0};
5165 uint8x8_t a = {1,1,1,1,2,2,2,2};
5166 uint8x8_t b = {2,2,2,2,3,3,3,3};
5168 #ifdef __ARM_ARCH_ISA_A64
5169 asm ("udot %0.2s, %1.8b, %2.8b"
5172 : /* No clobbers. */);
5175 asm ("vudot.u8 %P0, %P1, %P2"
5178 : /* No clobbers. */);
5181 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
5183 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
5186 # Return 1 if this is a ARM target with NEON enabled.
5188 proc check_effective_target_arm_neon { } {
5189 if { [check_effective_target_arm32] } {
5190 return [check_no_compiler_messages arm_neon object {
5191 #ifndef __ARM_NEON__
5202 proc check_effective_target_arm_neonv2 { } {
5203 if { [check_effective_target_arm32] } {
5204 return [check_no_compiler_messages arm_neon object {
5205 #ifndef __ARM_NEON__
5208 #ifndef __ARM_FEATURE_FMA
5220 # Return 1 if this is an ARM target with load acquire and store release
5221 # instructions for 8-, 16- and 32-bit types.
5223 proc check_effective_target_arm_acq_rel { } {
5224 return [check_no_compiler_messages arm_acq_rel object {
5226 load_acquire_store_release (void)
5228 asm ("lda r0, [r1]\n\t"
5234 : : : "r0", "memory");
5239 # Add the options needed for MIPS Paired-Single.
5241 proc add_options_for_mpaired_single { flags } {
5242 if { ! [check_effective_target_mpaired_single] } {
5245 return "$flags -mpaired-single"
5248 # Add the options needed for MIPS SIMD Architecture.
5250 proc add_options_for_mips_msa { flags } {
5251 if { ! [check_effective_target_mips_msa] } {
5254 return "$flags -mmsa"
5257 # Add the options needed for MIPS Loongson MMI Architecture.
5259 proc add_options_for_mips_loongson_mmi { flags } {
5260 if { ! [check_effective_target_mips_loongson_mmi] } {
5263 return "$flags -mloongson-mmi"
5267 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
5268 # the Loongson vector modes.
5270 proc check_effective_target_mips_loongson_mmi { } {
5271 return [check_no_compiler_messages loongson assembly {
5272 #if !defined(__mips_loongson_mmi)
5273 #error !__mips_loongson_mmi
5275 #if !defined(__mips_loongson_vector_rev)
5276 #error !__mips_loongson_vector_rev
5281 # Return 1 if this is a MIPS target that supports the legacy NAN.
5283 proc check_effective_target_mips_nanlegacy { } {
5284 return [check_no_compiler_messages nanlegacy assembly {
5286 int main () { return 0; }
5290 # Return 1 if an MSA program can be compiled to object
5292 proc check_effective_target_mips_msa { } {
5293 if ![check_effective_target_nomips16] {
5296 return [check_no_compiler_messages msa object {
5297 #if !defined(__mips_msa)
5298 #error "MSA NOT AVAIL"
5300 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
5301 #error "MSA NOT AVAIL FOR ISA REV < 2"
5303 #if !defined(__mips_hard_float)
5304 #error "MSA HARD_FLOAT REQUIRED"
5306 #if __mips_fpr != 64
5307 #error "MSA 64-bit FPR REQUIRED"
5313 v8i16 v = __builtin_msa_ldi_h (1);
5321 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
5324 proc check_effective_target_arm_eabi { } {
5325 return [check_no_compiler_messages arm_eabi object {
5326 #ifndef __ARM_EABI__
5334 # Return 1 if this is an ARM target that adheres to the hard-float variant of
5335 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
5337 proc check_effective_target_arm_hf_eabi { } {
5338 return [check_no_compiler_messages arm_hf_eabi object {
5339 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
5340 #error not hard-float EABI
5347 # Return 1 if this is an ARM target that uses the soft float ABI
5348 # with no floating-point instructions at all (e.g. -mfloat-abi=soft).
5350 proc check_effective_target_arm_softfloat { } {
5351 return [check_no_compiler_messages arm_softfloat object {
5352 #if !defined(__SOFTFP__)
5353 #error not soft-float EABI
5360 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
5361 # Some multilibs may be incompatible with this option.
5363 proc check_effective_target_arm_iwmmxt_ok { } {
5364 if { [check_effective_target_arm32] } {
5365 return [check_no_compiler_messages arm_iwmmxt_ok object {
5373 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
5374 # for an ARM target.
5375 proc check_effective_target_arm_prefer_ldrd_strd { } {
5376 if { ![check_effective_target_arm32] } {
5380 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
5381 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
5385 # Return true if LDRD/STRD instructions are available on this target.
5386 proc check_effective_target_arm_ldrd_strd_ok { } {
5387 if { ![check_effective_target_arm32] } {
5391 return [check_no_compiler_messages arm_ldrd_strd_ok object {
5394 __UINT64_TYPE__ a = 1, b = 10;
5395 __UINT64_TYPE__ *c = &b;
5396 // `a` will be in a valid register since it's a DImode quantity.
5405 # Return 1 if this is a PowerPC target supporting -meabi.
5407 proc check_effective_target_powerpc_eabi_ok { } {
5408 if { [istarget powerpc*-*-*] } {
5409 return [check_no_compiler_messages powerpc_eabi_ok object {
5417 # Return 1 if this is a PowerPC target with floating-point registers.
5419 proc check_effective_target_powerpc_fprs { } {
5420 if { [istarget powerpc*-*-*]
5421 || [istarget rs6000-*-*] } {
5422 return [check_no_compiler_messages powerpc_fprs object {
5434 # Return 1 if this is a PowerPC target with hardware double-precision
5437 proc check_effective_target_powerpc_hard_double { } {
5438 if { [istarget powerpc*-*-*]
5439 || [istarget rs6000-*-*] } {
5440 return [check_no_compiler_messages powerpc_hard_double object {
5452 # Return 1 if this is a PowerPC target supporting -maltivec.
5454 proc check_effective_target_powerpc_altivec_ok { } {
5455 if { ([istarget powerpc*-*-*]
5456 && ![istarget powerpc-*-linux*paired*])
5457 || [istarget rs6000-*-*] } {
5458 # AltiVec is not supported on AIX before 5.3.
5459 if { [istarget powerpc*-*-aix4*]
5460 || [istarget powerpc*-*-aix5.1*]
5461 || [istarget powerpc*-*-aix5.2*] } {
5464 return [check_no_compiler_messages powerpc_altivec_ok object {
5472 # Return 1 if this is a PowerPC target supporting -mpower8-vector
5474 proc check_effective_target_powerpc_p8vector_ok { } {
5475 if { ([istarget powerpc*-*-*]
5476 && ![istarget powerpc-*-linux*paired*])
5477 || [istarget rs6000-*-*] } {
5478 # AltiVec is not supported on AIX before 5.3.
5479 if { [istarget powerpc*-*-aix4*]
5480 || [istarget powerpc*-*-aix5.1*]
5481 || [istarget powerpc*-*-aix5.2*] } {
5484 # Darwin doesn't run on power8, so far.
5485 if { [istarget *-*-darwin*] } {
5488 return [check_no_compiler_messages powerpc_p8vector_ok object {
5490 asm volatile ("xxlorc 0,0,0");
5493 } "-mpower8-vector"]
5499 # Return 1 if this is a PowerPC target supporting -mpower9-vector
5501 proc check_effective_target_powerpc_p9vector_ok { } {
5502 if { ([istarget powerpc*-*-*]
5503 && ![istarget powerpc-*-linux*paired*])
5504 || [istarget rs6000-*-*] } {
5505 # AltiVec is not supported on AIX before 5.3.
5506 if { [istarget powerpc*-*-aix4*]
5507 || [istarget powerpc*-*-aix5.1*]
5508 || [istarget powerpc*-*-aix5.2*] } {
5511 # Darwin doesn't run on power9, so far.
5512 if { [istarget *-*-darwin*] } {
5515 return [check_no_compiler_messages powerpc_p9vector_ok object {
5518 vector double v = (vector double) { 0.0, 0.0 };
5519 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
5522 } "-mpower9-vector"]
5528 # Return 1 if this is a PowerPC target supporting -mmodulo
5530 proc check_effective_target_powerpc_p9modulo_ok { } {
5531 if { ([istarget powerpc*-*-*]
5532 && ![istarget powerpc-*-linux*paired*])
5533 || [istarget rs6000-*-*] } {
5534 # AltiVec is not supported on AIX before 5.3.
5535 if { [istarget powerpc*-*-aix4*]
5536 || [istarget powerpc*-*-aix5.1*]
5537 || [istarget powerpc*-*-aix5.2*] } {
5540 return [check_no_compiler_messages powerpc_p9modulo_ok object {
5542 int i = 5, j = 3, r = -1;
5543 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
5552 # return 1 if our compiler returns the ARCH_PWR defines with the options
5553 # as provided by the test.
5554 proc check_effective_target_has_arch_pwr5 { } {
5555 return [check_no_compiler_messages arch_pwr5 assembly {
5557 #error does not have power5 support.
5559 /* "has power5 support" */
5564 proc check_effective_target_has_arch_pwr6 { } {
5565 return [check_no_compiler_messages arch_pwr6 assembly {
5567 #error does not have power6 support.
5569 /* "has power6 support" */
5574 proc check_effective_target_has_arch_pwr7 { } {
5575 return [check_no_compiler_messages arch_pwr7 assembly {
5577 #error does not have power7 support.
5579 /* "has power7 support" */
5584 proc check_effective_target_has_arch_pwr8 { } {
5585 return [check_no_compiler_messages arch_pwr8 assembly {
5587 #error does not have power8 support.
5589 /* "has power8 support" */
5594 proc check_effective_target_has_arch_pwr9 { } {
5595 return [check_no_compiler_messages arch_pwr9 assembly {
5597 #error does not have power9 support.
5599 /* "has power9 support" */
5604 # Return 1 if this is a PowerPC target supporting -mfuture.
5605 # Limit this to 64-bit linux systems for now until other
5606 # targets support FUTURE.
5608 proc check_effective_target_powerpc_future_ok { } {
5609 if { ([istarget powerpc64*-*-linux*]) } {
5610 return [check_no_compiler_messages powerpc_future_ok object {
5613 asm ("pli %0,%1" : "=r" (e) : "n" (0x12345));
5622 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
5623 # software emulation on power7/power8 systems or hardware support on power9.
5625 proc check_effective_target_powerpc_float128_sw_ok { } {
5626 if { ([istarget powerpc*-*-*]
5627 && ![istarget powerpc-*-linux*paired*])
5628 || [istarget rs6000-*-*] } {
5629 # AltiVec is not supported on AIX before 5.3.
5630 if { [istarget powerpc*-*-aix4*]
5631 || [istarget powerpc*-*-aix5.1*]
5632 || [istarget powerpc*-*-aix5.2*] } {
5635 # Darwin doesn't have VSX, so no soft support for float128.
5636 if { [istarget *-*-darwin*] } {
5639 return [check_no_compiler_messages powerpc_float128_sw_ok object {
5640 volatile __float128 x = 1.0q;
5641 volatile __float128 y = 2.0q;
5643 __float128 z = x + y;
5646 } "-mfloat128 -mvsx"]
5652 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
5653 # support on power9.
5655 proc check_effective_target_powerpc_float128_hw_ok { } {
5656 if { ([istarget powerpc*-*-*]
5657 && ![istarget powerpc-*-linux*paired*])
5658 || [istarget rs6000-*-*] } {
5659 # AltiVec is not supported on AIX before 5.3.
5660 if { [istarget powerpc*-*-aix4*]
5661 || [istarget powerpc*-*-aix5.1*]
5662 || [istarget powerpc*-*-aix5.2*] } {
5665 # Darwin doesn't run on any machine with float128 h/w so far.
5666 if { [istarget *-*-darwin*] } {
5669 return [check_no_compiler_messages powerpc_float128_hw_ok object {
5670 volatile __float128 x = 1.0q;
5671 volatile __float128 y = 2.0q;
5674 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
5677 } "-mfloat128-hardware"]
5683 # Return 1 if current options define float128, 0 otherwise.
5685 proc check_effective_target_ppc_float128 { } {
5686 return [check_no_compiler_messages_nocache ppc_float128 object {
5687 #ifndef __FLOAT128__
5693 # Return 1 if current options generate float128 insns, 0 otherwise.
5695 proc check_effective_target_ppc_float128_insns { } {
5696 return [check_no_compiler_messages_nocache ppc_float128 object {
5697 #ifndef __FLOAT128_HARDWARE__
5703 # Return 1 if current options generate VSX instructions, 0 otherwise.
5705 proc check_effective_target_powerpc_vsx { } {
5706 return [check_no_compiler_messages_nocache powerpc_vsx object {
5713 # Return 1 if this is a PowerPC target supporting -mvsx
5715 proc check_effective_target_powerpc_vsx_ok { } {
5716 if { ([istarget powerpc*-*-*]
5717 && ![istarget powerpc-*-linux*paired*])
5718 || [istarget rs6000-*-*] } {
5719 # VSX is not supported on AIX before 7.1.
5720 if { [istarget powerpc*-*-aix4*]
5721 || [istarget powerpc*-*-aix5*]
5722 || [istarget powerpc*-*-aix6*] } {
5725 # Darwin doesn't have VSX, even if it's used with an assembler
5726 #Â which recognises the insns.
5727 if { [istarget *-*-darwin*] } {
5730 return [check_no_compiler_messages powerpc_vsx_ok object {
5732 asm volatile ("xxlor 0,0,0");
5741 # Return 1 if this is a PowerPC target supporting -mhtm
5743 proc check_effective_target_powerpc_htm_ok { } {
5744 if { ([istarget powerpc*-*-*]
5745 && ![istarget powerpc-*-linux*paired*])
5746 || [istarget rs6000-*-*] } {
5747 # HTM is not supported on AIX yet.
5748 if { [istarget powerpc*-*-aix*] } {
5751 return [check_no_compiler_messages powerpc_htm_ok object {
5753 asm volatile ("tbegin. 0");
5762 # Return 1 if the target supports executing HTM hardware instructions,
5763 # 0 otherwise. Cache the result.
5765 proc check_htm_hw_available { } {
5766 return [check_cached_effective_target htm_hw_available {
5767 # For now, disable on Darwin
5768 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
5771 check_runtime_nocache htm_hw_available {
5781 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
5783 proc check_effective_target_powerpc_ppu_ok { } {
5784 if [check_effective_target_powerpc_altivec_ok] {
5785 return [check_no_compiler_messages cell_asm_available object {
5788 asm volatile ("lvlx v0,v0,v0");
5790 asm volatile ("lvlx 0,0,0");
5800 # Return 1 if this is a PowerPC target that supports SPU.
5802 proc check_effective_target_powerpc_spu { } {
5803 if { [istarget powerpc*-*-linux*] } {
5804 return [check_effective_target_powerpc_altivec_ok]
5810 # Return 1 if this is a PowerPC SPE target. The check includes options
5811 # specified by dg-options for this test, so don't cache the result.
5813 proc check_effective_target_powerpc_spe_nocache { } {
5814 if { [istarget powerpc*-*-*] } {
5815 return [check_no_compiler_messages_nocache powerpc_spe object {
5821 } [current_compiler_flags]]
5827 # Return 1 if this is a PowerPC target with SPE enabled.
5829 proc check_effective_target_powerpc_spe { } {
5830 if { [istarget powerpc*-*-*] } {
5831 return [check_no_compiler_messages powerpc_spe object {
5843 # Return 1 if this is a PowerPC target with Altivec enabled.
5845 proc check_effective_target_powerpc_altivec { } {
5846 if { [istarget powerpc*-*-*] } {
5847 return [check_no_compiler_messages powerpc_altivec object {
5859 # Return 1 if this is a PowerPC 405 target. The check includes options
5860 # specified by dg-options for this test, so don't cache the result.
5862 proc check_effective_target_powerpc_405_nocache { } {
5863 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
5864 return [check_no_compiler_messages_nocache powerpc_405 object {
5870 } [current_compiler_flags]]
5876 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
5878 proc check_effective_target_powerpc_elfv2 { } {
5879 if { [istarget powerpc*-*-*] } {
5880 return [check_no_compiler_messages powerpc_elfv2 object {
5882 #error not ELF v2 ABI
5892 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
5893 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
5894 # test environment appears to run executables on such a simulator.
5896 proc check_effective_target_ultrasparc_hw { } {
5897 return [check_runtime ultrasparc_hw {
5898 int main() { return 0; }
5899 } "-mcpu=ultrasparc"]
5902 # Return 1 if the test environment supports executing UltraSPARC VIS2
5903 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
5905 proc check_effective_target_ultrasparc_vis2_hw { } {
5906 return [check_runtime ultrasparc_vis2_hw {
5907 int main() { __asm__(".word 0x81b00320"); return 0; }
5908 } "-mcpu=ultrasparc3"]
5911 # Return 1 if the test environment supports executing UltraSPARC VIS3
5912 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
5914 proc check_effective_target_ultrasparc_vis3_hw { } {
5915 return [check_runtime ultrasparc_vis3_hw {
5916 int main() { __asm__(".word 0x81b00220"); return 0; }
5920 # Return 1 if this is a SPARC-V9 target.
5922 proc check_effective_target_sparc_v9 { } {
5923 if { [istarget sparc*-*-*] } {
5924 return [check_no_compiler_messages sparc_v9 object {
5926 asm volatile ("return %i7+8");
5935 # Return 1 if this is a SPARC target with VIS enabled.
5937 proc check_effective_target_sparc_vis { } {
5938 if { [istarget sparc*-*-*] } {
5939 return [check_no_compiler_messages sparc_vis object {
5951 # Return 1 if the target supports hardware vector shift operation.
5953 proc check_effective_target_vect_shift { } {
5954 return [check_cached_effective_target_indexed vect_shift {
5955 expr {([istarget powerpc*-*-*]
5956 && ![istarget powerpc-*-linux*paired*])
5957 || [istarget ia64-*-*]
5958 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5959 || [istarget aarch64*-*-*]
5960 || [is-effective-target arm_neon]
5961 || ([istarget mips*-*-*]
5962 && ([et-is-effective-target mips_msa]
5963 || [et-is-effective-target mips_loongson_mmi]))
5964 || ([istarget s390*-*-*]
5965 && [check_effective_target_s390_vx])
5966 || [istarget amdgcn-*-*] }}]
5969 # Return 1 if the target supports hardware vector shift by register operation.
5971 proc check_effective_target_vect_var_shift { } {
5972 return [check_cached_effective_target_indexed vect_var_shift {
5973 expr {(([istarget i?86-*-*] || [istarget x86_64-*-*])
5974 && [check_avx2_available])
5978 proc check_effective_target_whole_vector_shift { } {
5979 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5980 || [istarget ia64-*-*]
5981 || [istarget aarch64*-*-*]
5982 || [istarget powerpc64*-*-*]
5983 || ([is-effective-target arm_neon]
5984 && [check_effective_target_arm_little_endian])
5985 || ([istarget mips*-*-*]
5986 && [et-is-effective-target mips_loongson_mmi])
5987 || ([istarget s390*-*-*]
5988 && [check_effective_target_s390_vx])
5989 || [istarget amdgcn-*-*] } {
5995 verbose "check_effective_target_vect_long: returning $answer" 2
5999 # Return 1 if the target supports vector bswap operations.
6001 proc check_effective_target_vect_bswap { } {
6002 return [check_cached_effective_target_indexed vect_bswap {
6003 expr { [istarget aarch64*-*-*]
6004 || [is-effective-target arm_neon]
6005 || [istarget amdgcn-*-*] }}]
6008 # Return 1 if the target supports comparison of bool vectors for at
6009 # least one vector length.
6011 proc check_effective_target_vect_bool_cmp { } {
6012 return [check_cached_effective_target_indexed vect_bool_cmp {
6013 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6014 || [istarget aarch64*-*-*]
6015 || [is-effective-target arm_neon] }}]
6018 # Return 1 if the target supports addition of char vectors for at least
6019 # one vector length.
6021 proc check_effective_target_vect_char_add { } {
6022 return [check_cached_effective_target_indexed vect_char_add {
6024 [istarget i?86-*-*] || [istarget x86_64-*-*]
6025 || ([istarget powerpc*-*-*]
6026 && ![istarget powerpc-*-linux*paired*])
6027 || [istarget amdgcn-*-*]
6028 || [istarget ia64-*-*]
6029 || [istarget aarch64*-*-*]
6030 || [is-effective-target arm_neon]
6031 || ([istarget mips*-*-*]
6032 && ([et-is-effective-target mips_loongson_mmi]
6033 || [et-is-effective-target mips_msa]))
6034 || ([istarget s390*-*-*]
6035 && [check_effective_target_s390_vx])
6039 # Return 1 if the target supports hardware vector shift operation for char.
6041 proc check_effective_target_vect_shift_char { } {
6042 return [check_cached_effective_target_indexed vect_shift_char {
6043 expr { ([istarget powerpc*-*-*]
6044 && ![istarget powerpc-*-linux*paired*])
6045 || [is-effective-target arm_neon]
6046 || ([istarget mips*-*-*]
6047 && [et-is-effective-target mips_msa])
6048 || ([istarget s390*-*-*]
6049 && [check_effective_target_s390_vx])
6050 || [istarget amdgcn-*-*] }}]
6053 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
6055 # This can change for different subtargets so do not cache the result.
6057 proc check_effective_target_vect_long { } {
6058 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6059 || (([istarget powerpc*-*-*]
6060 && ![istarget powerpc-*-linux*paired*])
6061 && [check_effective_target_ilp32])
6062 || [is-effective-target arm_neon]
6063 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6064 || [istarget aarch64*-*-*]
6065 || ([istarget mips*-*-*]
6066 && [et-is-effective-target mips_msa])
6067 || ([istarget s390*-*-*]
6068 && [check_effective_target_s390_vx])
6069 || [istarget amdgcn-*-*] } {
6075 verbose "check_effective_target_vect_long: returning $answer" 2
6079 # Return 1 if the target supports hardware vectors of float when
6080 # -funsafe-math-optimizations is enabled, 0 otherwise.
6082 # This won't change for different subtargets so cache the result.
6084 proc check_effective_target_vect_float { } {
6085 return [check_cached_effective_target_indexed vect_float {
6086 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6087 || [istarget powerpc*-*-*]
6088 || [istarget mips-sde-elf]
6089 || [istarget mipsisa64*-*-*]
6090 || [istarget ia64-*-*]
6091 || [istarget aarch64*-*-*]
6092 || ([istarget mips*-*-*]
6093 && [et-is-effective-target mips_msa])
6094 || [is-effective-target arm_neon]
6095 || ([istarget s390*-*-*]
6096 && [check_effective_target_s390_vxe])
6097 || [istarget amdgcn-*-*] }}]
6100 # Return 1 if the target supports hardware vectors of float without
6101 # -funsafe-math-optimizations being enabled, 0 otherwise.
6103 proc check_effective_target_vect_float_strict { } {
6104 return [expr { [check_effective_target_vect_float]
6105 && ![istarget arm*-*-*] }]
6108 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
6110 # This won't change for different subtargets so cache the result.
6112 proc check_effective_target_vect_double { } {
6113 return [check_cached_effective_target_indexed vect_double {
6114 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6115 && [check_no_compiler_messages vect_double assembly {
6116 #ifdef __tune_atom__
6117 # error No double vectorizer support.
6120 || [istarget aarch64*-*-*]
6121 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
6122 || ([istarget mips*-*-*]
6123 && [et-is-effective-target mips_msa])
6124 || ([istarget s390*-*-*]
6125 && [check_effective_target_s390_vx])
6126 || [istarget amdgcn-*-*]} }]
6129 # Return 1 if the target supports conditional addition, subtraction,
6130 # multiplication, division, minimum and maximum on vectors of double,
6131 # via the cond_ optabs. Return 0 otherwise.
6133 proc check_effective_target_vect_double_cond_arith { } {
6134 return [check_effective_target_aarch64_sve]
6137 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
6139 # This won't change for different subtargets so cache the result.
6141 proc check_effective_target_vect_long_long { } {
6142 return [check_cached_effective_target_indexed vect_long_long {
6143 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6144 || ([istarget mips*-*-*]
6145 && [et-is-effective-target mips_msa])
6146 || ([istarget s390*-*-*]
6147 && [check_effective_target_s390_vx]) }}]
6151 # Return 1 if the target plus current options does not support a vector
6152 # max instruction on "int", 0 otherwise.
6154 # This won't change for different subtargets so cache the result.
6156 proc check_effective_target_vect_no_int_min_max { } {
6157 return [check_cached_effective_target_indexed vect_no_int_min_max {
6158 expr { [istarget sparc*-*-*]
6159 || [istarget alpha*-*-*]
6160 || ([istarget mips*-*-*]
6161 && [et-is-effective-target mips_loongson_mmi]) }}]
6164 # Return 1 if the target plus current options does not support a vector
6165 # add instruction on "int", 0 otherwise.
6167 # This won't change for different subtargets so cache the result.
6169 proc check_effective_target_vect_no_int_add { } {
6170 # Alpha only supports vector add on V8QI and V4HI.
6171 return [check_cached_effective_target_indexed vect_no_int_add {
6172 expr { [istarget alpha*-*-*] }}]
6175 # Return 1 if the target plus current options does not support vector
6176 # bitwise instructions, 0 otherwise.
6178 # This won't change for different subtargets so cache the result.
6180 proc check_effective_target_vect_no_bitwise { } {
6181 return [check_cached_effective_target_indexed vect_no_bitwise { return 0 }]
6184 # Return 1 if the target plus current options supports vector permutation,
6187 # This won't change for different subtargets so cache the result.
6189 proc check_effective_target_vect_perm { } {
6190 return [check_cached_effective_target_indexed vect_perm {
6191 expr { [is-effective-target arm_neon]
6192 || [istarget aarch64*-*-*]
6193 || [istarget powerpc*-*-*]
6194 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6195 || ([istarget mips*-*-*]
6196 && ([et-is-effective-target mpaired_single]
6197 || [et-is-effective-target mips_msa]))
6198 || ([istarget s390*-*-*]
6199 && [check_effective_target_s390_vx])
6200 || [istarget amdgcn-*-*] }}]
6203 # Return 1 if, for some VF:
6205 # - the target's default vector size is VF * ELEMENT_BITS bits
6207 # - it is possible to implement the equivalent of:
6209 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
6210 # for (int i = 0; i < COUNT; ++i)
6211 # for (int j = 0; j < COUNT * VF; ++j)
6212 # s1[i][j] = s2[j - j % COUNT + i]
6214 # using only a single 2-vector permute for each vector in s1.
6216 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
6218 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
6219 # ------+-------------+-------------+------------
6220 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
6221 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
6222 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
6224 # Each s1 permute requires only two of a, b and c.
6226 # The distance between the start of vector n in s1[0] and the start
6227 # of vector n in s2 is:
6229 # A = (n * VF) % COUNT
6231 # The corresponding value for the end of vector n is:
6233 # B = (n * VF + VF - 1) % COUNT
6235 # Subtracting i from each value gives the corresponding difference
6236 # for s1[i]. The condition being tested by this function is false
6237 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
6238 # element for s1[i] comes from vector n - 1 of s2 and the last element
6239 # comes from vector n + 1 of s2. The condition is therefore true iff
6240 # A <= B for all n. This is turn means the condition is true iff:
6242 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
6244 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
6245 # and will be that value for at least one n in [0, COUNT), so we want:
6247 # (VF - 1) % COUNT < gcd (VF, COUNT)
6249 proc vect_perm_supported { count element_bits } {
6250 set vector_bits [lindex [available_vector_sizes] 0]
6251 # The number of vectors has to be a power of 2 when permuting
6252 # variable-length vectors.
6253 if { $vector_bits <= 0 && ($count & -$count) != $count } {
6256 set vf [expr { $vector_bits / $element_bits }]
6258 # Compute gcd (VF, COUNT).
6261 while { $temp1 > 0 } {
6262 set temp2 [expr { $gcd % $temp1 }]
6266 return [expr { ($vf - 1) % $count < $gcd }]
6269 # Return 1 if the target supports SLP permutation of 3 vectors when each
6270 # element has 32 bits.
6272 proc check_effective_target_vect_perm3_int { } {
6273 return [expr { [check_effective_target_vect_perm]
6274 && [vect_perm_supported 3 32] }]
6277 # Return 1 if the target plus current options supports vector permutation
6278 # on byte-sized elements, 0 otherwise.
6280 # This won't change for different subtargets so cache the result.
6282 proc check_effective_target_vect_perm_byte { } {
6283 return [check_cached_effective_target_indexed vect_perm_byte {
6284 expr { ([is-effective-target arm_neon]
6285 && [is-effective-target arm_little_endian])
6286 || ([istarget aarch64*-*-*]
6287 && [is-effective-target aarch64_little_endian])
6288 || [istarget powerpc*-*-*]
6289 || ([istarget mips-*.*]
6290 && [et-is-effective-target mips_msa])
6291 || ([istarget s390*-*-*]
6292 && [check_effective_target_s390_vx])
6293 || [istarget amdgcn-*-*] }}]
6296 # Return 1 if the target supports SLP permutation of 3 vectors when each
6297 # element has 8 bits.
6299 proc check_effective_target_vect_perm3_byte { } {
6300 return [expr { [check_effective_target_vect_perm_byte]
6301 && [vect_perm_supported 3 8] }]
6304 # Return 1 if the target plus current options supports vector permutation
6305 # on short-sized elements, 0 otherwise.
6307 # This won't change for different subtargets so cache the result.
6309 proc check_effective_target_vect_perm_short { } {
6310 return [check_cached_effective_target_indexed vect_perm_short {
6311 expr { ([is-effective-target arm_neon]
6312 && [is-effective-target arm_little_endian])
6313 || ([istarget aarch64*-*-*]
6314 && [is-effective-target aarch64_little_endian])
6315 || [istarget powerpc*-*-*]
6316 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
6317 && [check_ssse3_available])
6318 || ([istarget mips*-*-*]
6319 && [et-is-effective-target mips_msa])
6320 || ([istarget s390*-*-*]
6321 && [check_effective_target_s390_vx])
6322 || [istarget amdgcn-*-*] }}]
6325 # Return 1 if the target supports SLP permutation of 3 vectors when each
6326 # element has 16 bits.
6328 proc check_effective_target_vect_perm3_short { } {
6329 return [expr { [check_effective_target_vect_perm_short]
6330 && [vect_perm_supported 3 16] }]
6333 # Return 1 if the target plus current options supports folding of
6334 # copysign into XORSIGN.
6336 # This won't change for different subtargets so cache the result.
6338 proc check_effective_target_xorsign { } {
6339 return [check_cached_effective_target_indexed xorsign {
6340 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6341 || [istarget aarch64*-*-*] || [istarget arm*-*-*] }}]
6344 # Return 1 if the target plus current options supports a vector
6345 # widening summation of *short* args into *int* result, 0 otherwise.
6347 # This won't change for different subtargets so cache the result.
6349 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
6350 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si_pattern {
6351 expr { [istarget powerpc*-*-*]
6352 || ([istarget aarch64*-*-*]
6353 && ![check_effective_target_aarch64_sve])
6354 || [is-effective-target arm_neon]
6355 || [istarget ia64-*-*] }}]
6358 # Return 1 if the target plus current options supports a vector
6359 # widening summation of *short* args into *int* result, 0 otherwise.
6360 # A target can also support this widening summation if it can support
6361 # promotion (unpacking) from shorts to ints.
6363 # This won't change for different subtargets so cache the result.
6365 proc check_effective_target_vect_widen_sum_hi_to_si { } {
6366 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si {
6367 expr { [check_effective_target_vect_unpack]
6368 || [istarget powerpc*-*-*]
6369 || [istarget ia64-*-*] }}]
6372 # Return 1 if the target plus current options supports a vector
6373 # widening summation of *char* args into *short* result, 0 otherwise.
6374 # A target can also support this widening summation if it can support
6375 # promotion (unpacking) from chars to shorts.
6377 # This won't change for different subtargets so cache the result.
6379 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
6380 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_hi {
6381 expr { [check_effective_target_vect_unpack]
6382 || [is-effective-target arm_neon]
6383 || [istarget ia64-*-*] }}]
6386 # Return 1 if the target plus current options supports a vector
6387 # widening summation of *char* args into *int* result, 0 otherwise.
6389 # This won't change for different subtargets so cache the result.
6391 proc check_effective_target_vect_widen_sum_qi_to_si { } {
6392 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_si {
6393 expr { [istarget powerpc*-*-*] }}]
6396 # Return 1 if the target plus current options supports a vector
6397 # widening multiplication of *char* args into *short* result, 0 otherwise.
6398 # A target can also support this widening multplication if it can support
6399 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
6400 # multiplication of shorts).
6402 # This won't change for different subtargets so cache the result.
6405 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
6406 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi {
6407 expr { ([check_effective_target_vect_unpack]
6408 && [check_effective_target_vect_short_mult])
6409 || ([istarget powerpc*-*-*]
6410 || ([istarget aarch64*-*-*]
6411 && ![check_effective_target_aarch64_sve])
6412 || [is-effective-target arm_neon]
6413 || ([istarget s390*-*-*]
6414 && [check_effective_target_s390_vx]))
6415 || [istarget amdgcn-*-*] }}]
6418 # Return 1 if the target plus current options supports a vector
6419 # widening multiplication of *short* args into *int* result, 0 otherwise.
6420 # A target can also support this widening multplication if it can support
6421 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
6422 # multiplication of ints).
6424 # This won't change for different subtargets so cache the result.
6427 proc check_effective_target_vect_widen_mult_hi_to_si { } {
6428 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si {
6429 expr { ([check_effective_target_vect_unpack]
6430 && [check_effective_target_vect_int_mult])
6431 || ([istarget powerpc*-*-*]
6432 || [istarget ia64-*-*]
6433 || ([istarget aarch64*-*-*]
6434 && ![check_effective_target_aarch64_sve])
6435 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6436 || [is-effective-target arm_neon]
6437 || ([istarget s390*-*-*]
6438 && [check_effective_target_s390_vx]))
6439 || [istarget amdgcn-*-*] }}]
6442 # Return 1 if the target plus current options supports a vector
6443 # widening multiplication of *char* args into *short* result, 0 otherwise.
6445 # This won't change for different subtargets so cache the result.
6447 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
6448 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi_pattern {
6449 expr { [istarget powerpc*-*-*]
6450 || ([is-effective-target arm_neon]
6451 && [check_effective_target_arm_little_endian])
6452 || ([istarget s390*-*-*]
6453 && [check_effective_target_s390_vx])
6454 || [istarget amdgcn-*-*] }}]
6457 # Return 1 if the target plus current options supports a vector
6458 # widening multiplication of *short* args into *int* result, 0 otherwise.
6460 # This won't change for different subtargets so cache the result.
6462 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
6463 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si_pattern {
6464 expr { [istarget powerpc*-*-*]
6465 || [istarget ia64-*-*]
6466 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6467 || ([is-effective-target arm_neon]
6468 && [check_effective_target_arm_little_endian])
6469 || ([istarget s390*-*-*]
6470 && [check_effective_target_s390_vx])
6471 || [istarget amdgcn-*-*] }}]
6474 # Return 1 if the target plus current options supports a vector
6475 # widening multiplication of *int* args into *long* result, 0 otherwise.
6477 # This won't change for different subtargets so cache the result.
6479 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
6480 return [check_cached_effective_target_indexed vect_widen_mult_si_to_di_pattern {
6481 expr { [istarget ia64-*-*]
6482 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6483 || ([istarget s390*-*-*]
6484 && [check_effective_target_s390_vx]) }}]
6487 # Return 1 if the target plus current options supports a vector
6488 # widening shift, 0 otherwise.
6490 # This won't change for different subtargets so cache the result.
6492 proc check_effective_target_vect_widen_shift { } {
6493 return [check_cached_effective_target_indexed vect_widen_shift {
6494 expr { [is-effective-target arm_neon] }}]
6497 # Return 1 if the target plus current options supports a vector
6498 # dot-product of signed chars, 0 otherwise.
6500 # This won't change for different subtargets so cache the result.
6502 proc check_effective_target_vect_sdot_qi { } {
6503 return [check_cached_effective_target_indexed vect_sdot_qi {
6504 expr { [istarget ia64-*-*]
6505 || [istarget aarch64*-*-*]
6506 || [istarget arm*-*-*]
6507 || ([istarget mips*-*-*]
6508 && [et-is-effective-target mips_msa]) }}]
6511 # Return 1 if the target plus current options supports a vector
6512 # dot-product of unsigned chars, 0 otherwise.
6514 # This won't change for different subtargets so cache the result.
6516 proc check_effective_target_vect_udot_qi { } {
6517 return [check_cached_effective_target_indexed vect_udot_qi {
6518 expr { [istarget powerpc*-*-*]
6519 || [istarget aarch64*-*-*]
6520 || [istarget arm*-*-*]
6521 || [istarget ia64-*-*]
6522 || ([istarget mips*-*-*]
6523 && [et-is-effective-target mips_msa]) }}]
6526 # Return 1 if the target plus current options supports a vector
6527 # dot-product of signed shorts, 0 otherwise.
6529 # This won't change for different subtargets so cache the result.
6531 proc check_effective_target_vect_sdot_hi { } {
6532 return [check_cached_effective_target_indexed vect_sdot_hi {
6533 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6534 || [istarget ia64-*-*]
6535 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6536 || ([istarget mips*-*-*]
6537 && [et-is-effective-target mips_msa]) }}]
6540 # Return 1 if the target plus current options supports a vector
6541 # dot-product of unsigned shorts, 0 otherwise.
6543 # This won't change for different subtargets so cache the result.
6545 proc check_effective_target_vect_udot_hi { } {
6546 return [check_cached_effective_target_indexed vect_udot_hi {
6547 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6548 || ([istarget mips*-*-*]
6549 && [et-is-effective-target mips_msa]) }}]
6552 # Return 1 if the target plus current options supports a vector
6553 # sad operation of unsigned chars, 0 otherwise.
6555 # This won't change for different subtargets so cache the result.
6557 proc check_effective_target_vect_usad_char { } {
6558 return [check_cached_effective_target_indexed vect_usad_char {
6559 expr { [istarget i?86-*-*]
6560 || [istarget x86_64-*-*]
6561 || ([istarget aarch64*-*-*]
6562 && ![check_effective_target_aarch64_sve])
6563 || ([istarget powerpc*-*-*]
6564 && [check_p9vector_hw_available])}}]
6567 # Return 1 if the target plus current options supports both signed
6568 # and unsigned average operations on vectors of bytes.
6570 proc check_effective_target_vect_avg_qi {} {
6571 return [expr { [istarget aarch64*-*-*]
6572 && ![check_effective_target_aarch64_sve1_only] }]
6575 # Return 1 if the target plus current options supports both signed
6576 # and unsigned multiply-high-with-round-and-scale operations
6577 # on vectors of half-words.
6579 proc check_effective_target_vect_mulhrs_hi {} {
6580 return [expr { [istarget aarch64*-*-*]
6581 && [check_effective_target_aarch64_sve2] }]
6584 # Return 1 if the target plus current options supports signed division
6585 # by power-of-2 operations on vectors of 4-byte integers.
6587 proc check_effective_target_vect_sdiv_pow2_si {} {
6588 return [expr { [istarget aarch64*-*-*]
6589 && [check_effective_target_aarch64_sve] }]
6592 # Return 1 if the target plus current options supports a vector
6593 # demotion (packing) of shorts (to chars) and ints (to shorts)
6594 # using modulo arithmetic, 0 otherwise.
6596 # This won't change for different subtargets so cache the result.
6598 proc check_effective_target_vect_pack_trunc { } {
6599 return [check_cached_effective_target_indexed vect_pack_trunc {
6600 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6601 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6602 || [istarget aarch64*-*-*]
6603 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6604 && [check_effective_target_arm_little_endian])
6605 || ([istarget mips*-*-*]
6606 && [et-is-effective-target mips_msa])
6607 || ([istarget s390*-*-*]
6608 && [check_effective_target_s390_vx]) }}]
6611 # Return 1 if the target plus current options supports a vector
6612 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
6614 # This won't change for different subtargets so cache the result.
6616 proc check_effective_target_vect_unpack { } {
6617 return [check_cached_effective_target_indexed vect_unpack {
6618 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
6619 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6620 || [istarget ia64-*-*]
6621 || [istarget aarch64*-*-*]
6622 || ([istarget mips*-*-*]
6623 && [et-is-effective-target mips_msa])
6624 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6625 && [check_effective_target_arm_little_endian])
6626 || ([istarget s390*-*-*]
6627 && [check_effective_target_s390_vx]) }}]
6630 # Return 1 if the target plus current options does not guarantee
6631 # that its STACK_BOUNDARY is >= the reguired vector alignment.
6633 # This won't change for different subtargets so cache the result.
6635 proc check_effective_target_unaligned_stack { } {
6636 return [check_cached_effective_target_indexed unaligned_stack { expr 0 }]
6639 # Return 1 if the target plus current options does not support a vector
6640 # alignment mechanism, 0 otherwise.
6642 # This won't change for different subtargets so cache the result.
6644 proc check_effective_target_vect_no_align { } {
6645 return [check_cached_effective_target_indexed vect_no_align {
6646 expr { [istarget mipsisa64*-*-*]
6647 || [istarget mips-sde-elf]
6648 || [istarget sparc*-*-*]
6649 || [istarget ia64-*-*]
6650 || [check_effective_target_arm_vect_no_misalign]
6651 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6652 || ([istarget mips*-*-*]
6653 && [et-is-effective-target mips_loongson_mmi]) }}]
6656 # Return 1 if the target supports a vector misalign access, 0 otherwise.
6658 # This won't change for different subtargets so cache the result.
6660 proc check_effective_target_vect_hw_misalign { } {
6661 return [check_cached_effective_target_indexed vect_hw_misalign {
6662 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6663 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6664 || [istarget aarch64*-*-*]
6665 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
6666 || ([istarget s390*-*-*]
6667 && [check_effective_target_s390_vx]) } {
6670 if { [istarget arm*-*-*]
6671 && ![check_effective_target_arm_vect_no_misalign] } {
6679 # Return 1 if arrays are aligned to the vector alignment
6680 # boundary, 0 otherwise.
6682 proc check_effective_target_vect_aligned_arrays { } {
6683 set et_vect_aligned_arrays 0
6684 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6685 && !([is-effective-target ia32]
6686 || ([check_avx_available] && ![check_prefer_avx128]))) } {
6687 set et_vect_aligned_arrays 1
6690 verbose "check_effective_target_vect_aligned_arrays:\
6691 returning $et_vect_aligned_arrays" 2
6692 return $et_vect_aligned_arrays
6695 # Return 1 if types of size 32 bit or less are naturally aligned
6696 # (aligned to their type-size), 0 otherwise.
6698 # This won't change for different subtargets so cache the result.
6700 proc check_effective_target_natural_alignment_32 { } {
6701 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
6702 # FIXME: m68k has -malign-int
6703 return [check_cached_effective_target_indexed natural_alignment_32 {
6704 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
6705 || [istarget avr-*-*]
6706 || [istarget m68k-*-linux*]
6707 || [istarget pru-*-*]
6708 || [istarget stormy16-*-*]
6709 || [istarget rl78-*-*]
6710 || [istarget pdp11-*-*]
6711 || [istarget msp430-*-*]
6712 || [istarget m32c-*-*]
6713 || [istarget cris-*-*] } {
6721 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
6722 # type-size), 0 otherwise.
6724 # This won't change for different subtargets so cache the result.
6726 proc check_effective_target_natural_alignment_64 { } {
6727 return [check_cached_effective_target_indexed natural_alignment_64 {
6728 expr { [is-effective-target natural_alignment_32]
6729 && [is-effective-target lp64] && ![istarget *-*-darwin*] }
6733 # Return 1 if all vector types are naturally aligned (aligned to their
6734 # type-size), 0 otherwise.
6736 proc check_effective_target_vect_natural_alignment { } {
6737 set et_vect_natural_alignment 1
6738 if { [check_effective_target_arm_eabi]
6739 || [istarget nvptx-*-*]
6740 || [istarget s390*-*-*]
6741 || [istarget amdgcn-*-*] } {
6742 set et_vect_natural_alignment 0
6744 verbose "check_effective_target_vect_natural_alignment:\
6745 returning $et_vect_natural_alignment" 2
6746 return $et_vect_natural_alignment
6749 # Return true if the target supports the check_raw_ptrs and check_war_ptrs
6750 # optabs on vectors.
6752 proc check_effective_target_vect_check_ptrs { } {
6753 return [check_effective_target_aarch64_sve2]
6756 # Return true if fully-masked loops are supported.
6758 proc check_effective_target_vect_fully_masked { } {
6759 return [expr { [check_effective_target_aarch64_sve]
6760 || [istarget amdgcn*-*-*] }]
6763 # Return 1 if the target doesn't prefer any alignment beyond element
6764 # alignment during vectorization.
6766 proc check_effective_target_vect_element_align_preferred { } {
6767 return [expr { [check_effective_target_aarch64_sve]
6768 && [check_effective_target_vect_variable_length] }]
6771 # Return 1 if we can align stack data to the preferred vector alignment.
6773 proc check_effective_target_vect_align_stack_vars { } {
6774 if { [check_effective_target_aarch64_sve] } {
6775 return [check_effective_target_vect_variable_length]
6780 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
6782 proc check_effective_target_vector_alignment_reachable { } {
6783 set et_vector_alignment_reachable 0
6784 if { [check_effective_target_vect_aligned_arrays]
6785 || [check_effective_target_natural_alignment_32] } {
6786 set et_vector_alignment_reachable 1
6788 verbose "check_effective_target_vector_alignment_reachable:\
6789 returning $et_vector_alignment_reachable" 2
6790 return $et_vector_alignment_reachable
6793 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
6795 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
6796 set et_vector_alignment_reachable_for_64bit 0
6797 if { [check_effective_target_vect_aligned_arrays]
6798 || [check_effective_target_natural_alignment_64] } {
6799 set et_vector_alignment_reachable_for_64bit 1
6801 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
6802 returning $et_vector_alignment_reachable_for_64bit" 2
6803 return $et_vector_alignment_reachable_for_64bit
6806 # Return 1 if the target only requires element alignment for vector accesses
6808 proc check_effective_target_vect_element_align { } {
6809 return [check_cached_effective_target_indexed vect_element_align {
6810 expr { ([istarget arm*-*-*]
6811 && ![check_effective_target_arm_vect_no_misalign])
6812 || [check_effective_target_vect_hw_misalign]
6813 || [istarget amdgcn-*-*] }}]
6816 # Return 1 if we expect to see unaligned accesses in at least some
6819 proc check_effective_target_vect_unaligned_possible { } {
6820 return [expr { ![check_effective_target_vect_element_align_preferred]
6821 && (![check_effective_target_vect_no_align]
6822 || [check_effective_target_vect_hw_misalign]) }]
6825 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
6827 proc check_effective_target_vect_load_lanes { } {
6828 # We don't support load_lanes correctly on big-endian arm.
6829 return [check_cached_effective_target vect_load_lanes {
6830 expr { ([check_effective_target_arm_little_endian]
6831 && [check_effective_target_arm_neon_ok])
6832 || [istarget aarch64*-*-*] }}]
6835 # Return 1 if the target supports vector masked stores.
6837 proc check_effective_target_vect_masked_store { } {
6838 return [expr { [check_effective_target_aarch64_sve]
6839 || [istarget amdgcn*-*-*] }]
6842 # Return 1 if the target supports vector scatter stores.
6844 proc check_effective_target_vect_scatter_store { } {
6845 return [expr { [check_effective_target_aarch64_sve]
6846 || [istarget amdgcn*-*-*] }]
6849 # Return 1 if the target supports vector conditional operations, 0 otherwise.
6851 proc check_effective_target_vect_condition { } {
6852 return [check_cached_effective_target_indexed vect_condition {
6853 expr { [istarget aarch64*-*-*]
6854 || [istarget powerpc*-*-*]
6855 || [istarget ia64-*-*]
6856 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6857 || ([istarget mips*-*-*]
6858 && [et-is-effective-target mips_msa])
6859 || ([istarget arm*-*-*]
6860 && [check_effective_target_arm_neon_ok])
6861 || ([istarget s390*-*-*]
6862 && [check_effective_target_s390_vx])
6863 || [istarget amdgcn-*-*] }}]
6866 # Return 1 if the target supports vector conditional operations where
6867 # the comparison has different type from the lhs, 0 otherwise.
6869 proc check_effective_target_vect_cond_mixed { } {
6870 return [check_cached_effective_target_indexed vect_cond_mixed {
6871 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6872 || [istarget aarch64*-*-*]
6873 || [istarget powerpc*-*-*]
6874 || ([istarget mips*-*-*]
6875 && [et-is-effective-target mips_msa])
6876 || ([istarget s390*-*-*]
6877 && [check_effective_target_s390_vx])
6878 || [istarget amdgcn-*-*] }}]
6881 # Return 1 if the target supports vector char multiplication, 0 otherwise.
6883 proc check_effective_target_vect_char_mult { } {
6884 return [check_cached_effective_target_indexed vect_char_mult {
6885 expr { [istarget aarch64*-*-*]
6886 || [istarget ia64-*-*]
6887 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6888 || [check_effective_target_arm32]
6889 || [check_effective_target_powerpc_altivec]
6890 || ([istarget mips*-*-*]
6891 && [et-is-effective-target mips_msa])
6892 || ([istarget s390*-*-*]
6893 && [check_effective_target_s390_vx])
6894 || [istarget amdgcn-*-*] }}]
6897 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6899 proc check_effective_target_vect_short_mult { } {
6900 return [check_cached_effective_target_indexed vect_short_mult {
6901 expr { [istarget ia64-*-*]
6902 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6903 || [istarget powerpc*-*-*]
6904 || [istarget aarch64*-*-*]
6905 || [check_effective_target_arm32]
6906 || ([istarget mips*-*-*]
6907 && ([et-is-effective-target mips_msa]
6908 || [et-is-effective-target mips_loongson_mmi]))
6909 || ([istarget s390*-*-*]
6910 && [check_effective_target_s390_vx])
6911 || [istarget amdgcn-*-*] }}]
6914 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6916 proc check_effective_target_vect_int_mult { } {
6917 return [check_cached_effective_target_indexed vect_int_mult {
6918 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6919 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6920 || [istarget ia64-*-*]
6921 || [istarget aarch64*-*-*]
6922 || ([istarget mips*-*-*]
6923 && [et-is-effective-target mips_msa])
6924 || [check_effective_target_arm32]
6925 || ([istarget s390*-*-*]
6926 && [check_effective_target_s390_vx])
6927 || [istarget amdgcn-*-*] }}]
6930 # Return 1 if the target supports 64 bit hardware vector
6931 # multiplication of long operands with a long result, 0 otherwise.
6933 # This can change for different subtargets so do not cache the result.
6935 proc check_effective_target_vect_long_mult { } {
6936 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6937 || (([istarget powerpc*-*-*]
6938 && ![istarget powerpc-*-linux*paired*])
6939 && [check_effective_target_ilp32])
6940 || [is-effective-target arm_neon]
6941 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6942 || [istarget aarch64*-*-*]
6943 || ([istarget mips*-*-*]
6944 && [et-is-effective-target mips_msa]) } {
6950 verbose "check_effective_target_vect_long_mult: returning $answer" 2
6954 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6956 proc check_effective_target_vect_extract_even_odd { } {
6957 return [check_cached_effective_target_indexed extract_even_odd {
6958 expr { [istarget aarch64*-*-*]
6959 || [istarget powerpc*-*-*]
6960 || [is-effective-target arm_neon]
6961 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6962 || [istarget ia64-*-*]
6963 || ([istarget mips*-*-*]
6964 && ([et-is-effective-target mips_msa]
6965 || [et-is-effective-target mpaired_single]))
6966 || ([istarget s390*-*-*]
6967 && [check_effective_target_s390_vx]) }}]
6970 # Return 1 if the target supports vector interleaving, 0 otherwise.
6972 proc check_effective_target_vect_interleave { } {
6973 return [check_cached_effective_target_indexed vect_interleave {
6974 expr { [istarget aarch64*-*-*]
6975 || [istarget powerpc*-*-*]
6976 || [is-effective-target arm_neon]
6977 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6978 || [istarget ia64-*-*]
6979 || ([istarget mips*-*-*]
6980 && ([et-is-effective-target mpaired_single]
6981 || [et-is-effective-target mips_msa]))
6982 || ([istarget s390*-*-*]
6983 && [check_effective_target_s390_vx]) }}]
6986 foreach N {2 3 4 8} {
6987 eval [string map [list N $N] {
6988 # Return 1 if the target supports 2-vector interleaving
6989 proc check_effective_target_vect_stridedN { } {
6990 return [check_cached_effective_target_indexed vect_stridedN {
6992 && [check_effective_target_vect_interleave]
6993 && [check_effective_target_vect_extract_even_odd] } {
6996 if { ([istarget arm*-*-*]
6997 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
7000 if [check_effective_target_vect_fully_masked] {
7009 # Return the list of vector sizes (in bits) that each target supports.
7010 # A vector length of "0" indicates variable-length vectors.
7012 proc available_vector_sizes { } {
7014 if { [istarget aarch64*-*-*] } {
7015 if { [check_effective_target_aarch64_sve] } {
7016 lappend result [aarch64_sve_bits]
7018 lappend result 128 64
7019 } elseif { [istarget arm*-*-*]
7020 && [check_effective_target_arm_neon_ok] } {
7021 lappend result 128 64
7022 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
7023 if { [check_avx_available] && ![check_prefer_avx128] } {
7027 if { ![is-effective-target ia32] } {
7030 } elseif { [istarget sparc*-*-*] } {
7033 # The traditional default asumption.
7039 # Return 1 if the target supports multiple vector sizes
7041 proc check_effective_target_vect_multiple_sizes { } {
7042 return [expr { [llength [available_vector_sizes]] > 1 }]
7045 # Return true if variable-length vectors are supported.
7047 proc check_effective_target_vect_variable_length { } {
7048 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
7051 # Return 1 if the target supports vectors of 64 bits.
7053 proc check_effective_target_vect64 { } {
7054 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
7057 # Return 1 if the target supports vector copysignf calls.
7059 proc check_effective_target_vect_call_copysignf { } {
7060 return [check_cached_effective_target_indexed vect_call_copysignf {
7061 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7062 || [istarget powerpc*-*-*]
7063 || [istarget aarch64*-*-*] }}]
7066 # Return 1 if the target supports hardware square root instructions.
7068 proc check_effective_target_sqrt_insn { } {
7069 return [check_cached_effective_target sqrt_insn {
7070 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7071 || [istarget powerpc*-*-*]
7072 || [istarget aarch64*-*-*]
7073 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
7074 || ([istarget s390*-*-*]
7075 && [check_effective_target_s390_vx])
7076 || [istarget amdgcn-*-*] }}]
7079 # Return any additional options to enable square root intructions.
7081 proc add_options_for_sqrt_insn { flags } {
7082 if { [istarget amdgcn*-*-*] } {
7083 return "$flags -ffast-math"
7085 if { [istarget arm*-*-*] } {
7086 return [add_options_for_arm_vfp "$flags"]
7091 # Return 1 if the target supports vector sqrtf calls.
7093 proc check_effective_target_vect_call_sqrtf { } {
7094 return [check_cached_effective_target_indexed vect_call_sqrtf {
7095 expr { [istarget aarch64*-*-*]
7096 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7097 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
7098 || ([istarget s390*-*-*]
7099 && [check_effective_target_s390_vx]) }}]
7102 # Return 1 if the target supports vector lrint calls.
7104 proc check_effective_target_vect_call_lrint { } {
7105 set et_vect_call_lrint 0
7106 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
7107 && [check_effective_target_ilp32])
7108 || [istarget amdgcn-*-*] } {
7109 set et_vect_call_lrint 1
7112 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
7113 return $et_vect_call_lrint
7116 # Return 1 if the target supports vector btrunc calls.
7118 proc check_effective_target_vect_call_btrunc { } {
7119 return [check_cached_effective_target_indexed vect_call_btrunc {
7120 expr { [istarget aarch64*-*-*]
7121 || [istarget amdgcn-*-*] }}]
7124 # Return 1 if the target supports vector btruncf calls.
7126 proc check_effective_target_vect_call_btruncf { } {
7127 return [check_cached_effective_target_indexed vect_call_btruncf {
7128 expr { [istarget aarch64*-*-*]
7129 || [istarget amdgcn-*-*] }}]
7132 # Return 1 if the target supports vector ceil calls.
7134 proc check_effective_target_vect_call_ceil { } {
7135 return [check_cached_effective_target_indexed vect_call_ceil {
7136 expr { [istarget aarch64*-*-*]
7137 || [istarget amdgcn-*-*] }}]
7140 # Return 1 if the target supports vector ceilf calls.
7142 proc check_effective_target_vect_call_ceilf { } {
7143 return [check_cached_effective_target_indexed vect_call_ceilf {
7144 expr { [istarget aarch64*-*-*] }}]
7147 # Return 1 if the target supports vector floor calls.
7149 proc check_effective_target_vect_call_floor { } {
7150 return [check_cached_effective_target_indexed vect_call_floor {
7151 expr { [istarget aarch64*-*-*] }}]
7154 # Return 1 if the target supports vector floorf calls.
7156 proc check_effective_target_vect_call_floorf { } {
7157 return [check_cached_effective_target_indexed vect_call_floorf {
7158 expr { [istarget aarch64*-*-*]
7159 || [istarget amdgcn-*-*] }}]
7162 # Return 1 if the target supports vector lceil calls.
7164 proc check_effective_target_vect_call_lceil { } {
7165 return [check_cached_effective_target_indexed vect_call_lceil {
7166 expr { [istarget aarch64*-*-*] }}]
7169 # Return 1 if the target supports vector lfloor calls.
7171 proc check_effective_target_vect_call_lfloor { } {
7172 return [check_cached_effective_target_indexed vect_call_lfloor {
7173 expr { [istarget aarch64*-*-*] }}]
7176 # Return 1 if the target supports vector nearbyint calls.
7178 proc check_effective_target_vect_call_nearbyint { } {
7179 return [check_cached_effective_target_indexed vect_call_nearbyint {
7180 expr { [istarget aarch64*-*-*] }}]
7183 # Return 1 if the target supports vector nearbyintf calls.
7185 proc check_effective_target_vect_call_nearbyintf { } {
7186 return [check_cached_effective_target_indexed vect_call_nearbyintf {
7187 expr { [istarget aarch64*-*-*] }}]
7190 # Return 1 if the target supports vector round calls.
7192 proc check_effective_target_vect_call_round { } {
7193 return [check_cached_effective_target_indexed vect_call_round {
7194 expr { [istarget aarch64*-*-*] }}]
7197 # Return 1 if the target supports vector roundf calls.
7199 proc check_effective_target_vect_call_roundf { } {
7200 return [check_cached_effective_target_indexed vect_call_roundf {
7201 expr { [istarget aarch64*-*-*] }}]
7204 # Return 1 if the target supports AND, OR and XOR reduction.
7206 proc check_effective_target_vect_logical_reduc { } {
7207 return [check_effective_target_aarch64_sve]
7210 # Return 1 if the target supports the fold_extract_last optab.
7212 proc check_effective_target_vect_fold_extract_last { } {
7213 return [expr { [check_effective_target_aarch64_sve]
7214 || [istarget amdgcn*-*-*] }]
7217 # Return 1 if the target supports section-anchors
7219 proc check_effective_target_section_anchors { } {
7220 return [check_cached_effective_target section_anchors {
7221 expr { [istarget powerpc*-*-*]
7222 || [istarget arm*-*-*]
7223 || [istarget aarch64*-*-*] }}]
7226 # Return 1 if the target supports atomic operations on "int_128" values.
7228 proc check_effective_target_sync_int_128 { } {
7232 # Return 1 if the target supports atomic operations on "int_128" values
7233 # and can execute them.
7234 # This requires support for both compare-and-swap and true atomic loads.
7236 proc check_effective_target_sync_int_128_runtime { } {
7240 # Return 1 if the target supports atomic operations on "long long".
7242 # Note: 32bit x86 targets require -march=pentium in dg-options.
7243 # Note: 32bit s390 targets require -mzarch in dg-options.
7245 proc check_effective_target_sync_long_long { } {
7246 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
7247 || [istarget aarch64*-*-*]
7248 || [istarget arm*-*-*]
7249 || [istarget alpha*-*-*]
7250 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
7251 || [istarget s390*-*-*] } {
7258 # Return 1 if the target supports popcount on long.
7260 proc check_effective_target_popcountl { } {
7261 return [check_no_messages_and_pattern popcountl "!\\(call" rtl-expand {
7264 return __builtin_popcountl (b);
7269 # Return 1 if the target supports popcount on long long.
7271 proc check_effective_target_popcountll { } {
7272 return [check_no_messages_and_pattern popcountll "!\\(call" rtl-expand {
7273 int foo (long long b)
7275 return __builtin_popcountll (b);
7281 # Return 1 if the target supports popcount on int.
7283 proc check_effective_target_popcount { } {
7284 return [check_no_messages_and_pattern popcount "!\\(call" rtl-expand {
7287 return __builtin_popcount (b);
7292 # Return 1 if the target supports atomic operations on "long long"
7293 # and can execute them.
7295 # Note: 32bit x86 targets require -march=pentium in dg-options.
7297 proc check_effective_target_sync_long_long_runtime { } {
7298 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
7299 && [check_cached_effective_target sync_long_long_available {
7300 check_runtime_nocache sync_long_long_available {
7304 unsigned int eax, ebx, ecx, edx;
7305 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
7306 return !(edx & bit_CMPXCHG8B);
7311 || [istarget aarch64*-*-*]
7312 || [istarget arm*-*-uclinuxfdpiceabi]
7313 || ([istarget arm*-*-linux-*]
7314 && [check_runtime sync_longlong_runtime {
7320 if (sizeof (long long) != 8)
7323 /* Just check for native;
7324 checking for kernel fallback is tricky. */
7325 asm volatile ("ldrexd r0,r1, [%0]"
7326 : : "r" (&l1) : "r0", "r1");
7330 || [istarget alpha*-*-*]
7331 || ([istarget sparc*-*-*]
7332 && [check_effective_target_lp64]
7333 && [check_effective_target_ultrasparc_hw])
7334 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
7341 # Return 1 if the target supports byte swap instructions.
7343 proc check_effective_target_bswap { } {
7344 return [check_cached_effective_target bswap {
7345 expr { [istarget aarch64*-*-*]
7346 || [istarget alpha*-*-*]
7347 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7348 || [istarget m68k-*-*]
7349 || [istarget powerpc*-*-*]
7350 || [istarget rs6000-*-*]
7351 || [istarget s390*-*-*]
7352 || ([istarget arm*-*-*]
7353 && [check_no_compiler_messages_nocache arm_v6_or_later object {
7355 #error not armv6 or later
7361 # Return 1 if the target supports atomic operations on "int" and "long".
7363 proc check_effective_target_sync_int_long { } {
7364 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7365 # load-reserved/store-conditional instructions.
7366 return [check_cached_effective_target sync_int_long {
7367 expr { [istarget ia64-*-*]
7368 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7369 || [istarget aarch64*-*-*]
7370 || [istarget alpha*-*-*]
7371 || [istarget arm*-*-linux-*]
7372 || [istarget arm*-*-uclinuxfdpiceabi]
7373 || ([istarget arm*-*-*]
7374 && [check_effective_target_arm_acq_rel])
7375 || [istarget bfin*-*linux*]
7376 || [istarget hppa*-*linux*]
7377 || [istarget s390*-*-*]
7378 || [istarget powerpc*-*-*]
7379 || [istarget crisv32-*-*] || [istarget cris-*-*]
7380 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7381 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7382 || [check_effective_target_mips_llsc] }}]
7385 # Return 1 if the target supports atomic operations on "char" and "short".
7387 proc check_effective_target_sync_char_short { } {
7388 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7389 # load-reserved/store-conditional instructions.
7390 return [check_cached_effective_target sync_char_short {
7391 expr { [istarget aarch64*-*-*]
7392 || [istarget ia64-*-*]
7393 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7394 || [istarget alpha*-*-*]
7395 || [istarget arm*-*-linux-*]
7396 || [istarget arm*-*-uclinuxfdpiceabi]
7397 || ([istarget arm*-*-*]
7398 && [check_effective_target_arm_acq_rel])
7399 || [istarget hppa*-*linux*]
7400 || [istarget s390*-*-*]
7401 || [istarget powerpc*-*-*]
7402 || [istarget crisv32-*-*] || [istarget cris-*-*]
7403 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7404 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7405 || [check_effective_target_mips_llsc] }}]
7408 # Return 1 if the target uses a ColdFire FPU.
7410 proc check_effective_target_coldfire_fpu { } {
7411 return [check_no_compiler_messages coldfire_fpu assembly {
7418 # Return true if this is a uClibc target.
7420 proc check_effective_target_uclibc {} {
7421 return [check_no_compiler_messages uclibc object {
7422 #include <features.h>
7423 #if !defined (__UCLIBC__)
7429 # Return true if this is a uclibc target and if the uclibc feature
7430 # described by __$feature__ is not present.
7432 proc check_missing_uclibc_feature {feature} {
7433 return [check_no_compiler_messages $feature object "
7434 #include <features.h>
7435 #if !defined (__UCLIBC) || defined (__${feature}__)
7441 # Return true if this is a Newlib target.
7443 proc check_effective_target_newlib {} {
7444 return [check_no_compiler_messages newlib object {
7449 # Return true if GCC was configured with --enable-newlib-nano-formatted-io
7450 proc check_effective_target_newlib_nano_io { } {
7451 return [check_configured_with "--enable-newlib-nano-formatted-io"]
7454 # Some newlib versions don't provide a frexpl and instead depend
7455 # on frexp to implement long double conversions in their printf-like
7456 # functions. This leads to broken results. Detect such versions here.
7458 proc check_effective_target_newlib_broken_long_double_io {} {
7459 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
7465 # Return true if this is NOT a Bionic target.
7467 proc check_effective_target_non_bionic {} {
7468 return [check_no_compiler_messages non_bionic object {
7470 #if defined (__BIONIC__)
7476 # Return true if this target has error.h header.
7478 proc check_effective_target_error_h {} {
7479 return [check_no_compiler_messages error_h object {
7484 # Return true if this target has tgmath.h header.
7486 proc check_effective_target_tgmath_h {} {
7487 return [check_no_compiler_messages tgmath_h object {
7492 # Return true if target's libc supports complex functions.
7494 proc check_effective_target_libc_has_complex_functions {} {
7495 return [check_no_compiler_messages libc_has_complex_functions object {
7496 #include <complex.h>
7501 # (a) an error of a few ULP is expected in string to floating-point
7502 # conversion functions; and
7503 # (b) overflow is not always detected correctly by those functions.
7505 proc check_effective_target_lax_strtofp {} {
7506 # By default, assume that all uClibc targets suffer from this.
7507 return [check_effective_target_uclibc]
7510 # Return 1 if this is a target for which wcsftime is a dummy
7511 # function that always returns 0.
7513 proc check_effective_target_dummy_wcsftime {} {
7514 # By default, assume that all uClibc targets suffer from this.
7515 return [check_effective_target_uclibc]
7518 # Return 1 if constructors with initialization priority arguments are
7519 # supposed on this target.
7521 proc check_effective_target_init_priority {} {
7522 return [check_no_compiler_messages init_priority assembly "
7523 void f() __attribute__((constructor (1000)));
7528 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
7529 # This can be used with any check_* proc that takes no argument and
7530 # returns only 1 or 0. It could be used with check_* procs that take
7531 # arguments with keywords that pass particular arguments.
7533 proc is-effective-target { arg } {
7536 if { ![info exists et_index] } {
7537 # Initialize the effective target index that is used in some
7538 # check_effective_target_* procs.
7541 if { [info procs check_effective_target_${arg}] != [list] } {
7542 set selected [check_effective_target_${arg}]
7545 "vmx_hw" { set selected [check_vmx_hw_available] }
7546 "vsx_hw" { set selected [check_vsx_hw_available] }
7547 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7548 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7549 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7550 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7551 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7552 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7553 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7554 "dfp_hw" { set selected [check_dfp_hw_available] }
7555 "htm_hw" { set selected [check_htm_hw_available] }
7556 "named_sections" { set selected [check_named_sections_available] }
7557 "gc_sections" { set selected [check_gc_sections_available] }
7558 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7559 default { error "unknown effective target keyword `$arg'" }
7563 verbose "is-effective-target: $arg $selected" 2
7567 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
7569 proc is-effective-target-keyword { arg } {
7570 if { [info procs check_effective_target_${arg}] != [list] } {
7573 # These have different names for their check_* procs.
7575 "vmx_hw" { return 1 }
7576 "vsx_hw" { return 1 }
7577 "p8vector_hw" { return 1 }
7578 "p9vector_hw" { return 1 }
7579 "p9modulo_hw" { return 1 }
7580 "ppc_float128_sw" { return 1 }
7581 "ppc_float128_hw" { return 1 }
7582 "ppc_recip_hw" { return 1 }
7583 "dfp_hw" { return 1 }
7584 "htm_hw" { return 1 }
7585 "named_sections" { return 1 }
7586 "gc_sections" { return 1 }
7587 "cxa_atexit" { return 1 }
7588 default { return 0 }
7593 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
7594 # indicate what target is currently being processed. This is for
7595 # the vectorizer tests, e.g. vect_int, to keep track what target supports
7598 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
7599 global dg-do-what-default
7600 global EFFECTIVE_TARGETS
7603 if { [llength $EFFECTIVE_TARGETS] > 0 } {
7604 foreach target $EFFECTIVE_TARGETS {
7605 set target_flags $flags
7606 set dg-do-what-default compile
7607 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
7608 if { [info procs add_options_for_${target}] != [list] } {
7609 set target_flags [add_options_for_${target} "$flags"]
7611 if { [info procs check_effective_target_${target}_runtime]
7612 != [list] && [check_effective_target_${target}_runtime] } {
7613 set dg-do-what-default run
7615 $runtest $testcases $target_flags ${default-extra-flags}
7619 $runtest $testcases $flags ${default-extra-flags}
7623 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7624 # et_index, 0 otherwise.
7626 proc et-is-effective-target { target } {
7627 global EFFECTIVE_TARGETS
7630 if { [llength $EFFECTIVE_TARGETS] > $et_index
7631 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
7637 # Return 1 if target default to short enums
7639 proc check_effective_target_short_enums { } {
7640 return [check_no_compiler_messages short_enums assembly {
7642 int s[sizeof (enum foo) == 1 ? 1 : -1];
7646 # Return 1 if target supports merging string constants at link time.
7648 proc check_effective_target_string_merging { } {
7649 return [check_no_messages_and_pattern string_merging \
7650 "rodata\\.str" assembly {
7651 const char *var = "String";
7655 # Return 1 if target has the basic signed and unsigned types in
7656 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
7657 # working <stdint.h> for all targets.
7659 proc check_effective_target_stdint_types { } {
7660 return [check_no_compiler_messages stdint_types assembly {
7662 int8_t a; int16_t b; int32_t c; int64_t d;
7663 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7667 # Return 1 if target has the basic signed and unsigned types in
7668 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
7669 # these types agree with those in the header, as some systems have
7670 # only <inttypes.h>.
7672 proc check_effective_target_inttypes_types { } {
7673 return [check_no_compiler_messages inttypes_types assembly {
7674 #include <inttypes.h>
7675 int8_t a; int16_t b; int32_t c; int64_t d;
7676 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7680 # Return 1 if programs are intended to be run on a simulator
7681 # (i.e. slowly) rather than hardware (i.e. fast).
7683 proc check_effective_target_simulator { } {
7685 # All "src/sim" simulators set this one.
7686 if [board_info target exists is_simulator] {
7687 return [board_info target is_simulator]
7690 # The "sid" simulators don't set that one, but at least they set
7692 if [board_info target exists slow_simulator] {
7693 return [board_info target slow_simulator]
7699 # Return 1 if programs are intended to be run on hardware rather than
7702 proc check_effective_target_hw { } {
7704 # All "src/sim" simulators set this one.
7705 if [board_info target exists is_simulator] {
7706 if [board_info target is_simulator] {
7713 # The "sid" simulators don't set that one, but at least they set
7715 if [board_info target exists slow_simulator] {
7716 if [board_info target slow_simulator] {
7726 # Return 1 if the target is a VxWorks kernel.
7728 proc check_effective_target_vxworks_kernel { } {
7729 return [check_no_compiler_messages vxworks_kernel assembly {
7730 #if !defined __vxworks || defined __RTP__
7736 # Return 1 if the target is a VxWorks RTP.
7738 proc check_effective_target_vxworks_rtp { } {
7739 return [check_no_compiler_messages vxworks_rtp assembly {
7740 #if !defined __vxworks || !defined __RTP__
7746 # Return 1 if the target is expected to provide wide character support.
7748 proc check_effective_target_wchar { } {
7749 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
7752 return [check_no_compiler_messages wchar assembly {
7757 # Return 1 if the target has <pthread.h>.
7759 proc check_effective_target_pthread_h { } {
7760 return [check_no_compiler_messages pthread_h assembly {
7761 #include <pthread.h>
7765 # Return 1 if the target can truncate a file from a file-descriptor,
7766 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
7767 # chsize. We test for a trivially functional truncation; no stubs.
7768 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
7769 # different function to be used.
7771 proc check_effective_target_fd_truncate { } {
7773 #define _FILE_OFFSET_BITS 64
7780 FILE *f = fopen ("tst.tmp", "wb");
7782 const char t[] = "test writing more than ten characters";
7786 write (fd, t, sizeof (t) - 1);
7788 if (ftruncate (fd, 10) != 0)
7797 f = fopen ("tst.tmp", "rb");
7798 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7806 if { [check_runtime ftruncate $prog] } {
7810 regsub "ftruncate" $prog "chsize" prog
7811 return [check_runtime chsize $prog]
7814 # Add to FLAGS all the target-specific flags needed to enable
7815 # full IEEE compliance mode.
7817 proc add_options_for_ieee { flags } {
7818 if { [istarget alpha*-*-*]
7819 || [istarget sh*-*-*] } {
7820 return "$flags -mieee"
7822 if { [istarget rx-*-*] } {
7823 return "$flags -mnofpu"
7828 if {![info exists flags_to_postpone]} {
7829 set flags_to_postpone ""
7832 # Add to FLAGS the flags needed to enable functions to bind locally
7833 # when using pic/PIC passes in the testsuite.
7834 proc add_options_for_bind_pic_locally { flags } {
7835 global flags_to_postpone
7837 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
7838 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
7839 # order to make sure that the multilib_flags doesn't override this.
7841 if {[check_no_compiler_messages using_pic2 assembly {
7846 set flags_to_postpone "-fPIE"
7849 if {[check_no_compiler_messages using_pic1 assembly {
7854 set flags_to_postpone "-fpie"
7860 # Add to FLAGS the flags needed to enable 64-bit vectors.
7862 proc add_options_for_double_vectors { flags } {
7863 if [is-effective-target arm_neon_ok] {
7864 return "$flags -mvectorize-with-neon-double"
7870 # Add to FLAGS the flags needed to define the STACK_SIZE macro.
7872 proc add_options_for_stack_size { flags } {
7873 if [is-effective-target stack_size] {
7874 set stack_size [dg-effective-target-value stack_size]
7875 return "$flags -DSTACK_SIZE=$stack_size"
7881 # Return 1 if the target provides a full C99 runtime.
7883 proc check_effective_target_c99_runtime { } {
7884 return [check_cached_effective_target c99_runtime {
7887 set file [open "$srcdir/gcc.dg/builtins-config.h"]
7888 set contents [read $file]
7891 #ifndef HAVE_C99_RUNTIME
7892 #error !HAVE_C99_RUNTIME
7895 check_no_compiler_messages_nocache c99_runtime assembly $contents
7899 # Return 1 if the target provides the D runtime.
7901 proc check_effective_target_d_runtime { } {
7902 return [check_no_compiler_messages d_runtime executable {
7906 extern(C) int main() {
7912 # Return 1 if target wchar_t is at least 4 bytes.
7914 proc check_effective_target_4byte_wchar_t { } {
7915 return [check_no_compiler_messages 4byte_wchar_t object {
7916 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
7920 # Return 1 if the target supports automatic stack alignment.
7922 proc check_effective_target_automatic_stack_alignment { } {
7923 # Ordinarily x86 supports automatic stack alignment ...
7924 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
7925 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
7926 # ... except Win64 SEH doesn't. Succeed for Win32 though.
7927 return [check_effective_target_ilp32];
7934 # Return true if we are compiling for AVX target.
7936 proc check_avx_available { } {
7937 if { [check_no_compiler_messages avx_available assembly {
7947 # Return true if we are compiling for AVX2 target.
7949 proc check_avx2_available { } {
7950 if { [check_no_compiler_messages avx2_available assembly {
7960 # Return true if we are compiling for SSSE3 target.
7962 proc check_ssse3_available { } {
7963 if { [check_no_compiler_messages sse3a_available assembly {
7973 # Return true if 32- and 16-bytes vectors are available.
7975 proc check_effective_target_vect_sizes_32B_16B { } {
7976 return [expr { [available_vector_sizes] == [list 256 128] }]
7979 # Return true if 16- and 8-bytes vectors are available.
7981 proc check_effective_target_vect_sizes_16B_8B { } {
7982 if { [check_avx_available]
7983 || [is-effective-target arm_neon]
7984 || [istarget aarch64*-*-*] } {
7992 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7995 proc check_prefer_avx128 { } {
7996 if ![check_avx_available] {
7999 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
8000 float a[1024],b[1024],c[1024];
8001 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
8002 } "-O2 -ftree-vectorize"]
8006 # Return 1 if avx512f instructions can be compiled.
8008 proc check_effective_target_avx512f { } {
8009 return [check_no_compiler_messages avx512f object {
8010 typedef double __m512d __attribute__ ((__vector_size__ (64)));
8011 typedef double __m128d __attribute__ ((__vector_size__ (16)));
8013 __m512d _mm512_add (__m512d a)
8015 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
8018 __m128d _mm128_add (__m128d a)
8020 return __builtin_ia32_addsd_round (a, a, 8);
8023 __m128d _mm128_getmant (__m128d a)
8025 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
8030 # Return 1 if avx instructions can be compiled.
8032 proc check_effective_target_avx { } {
8033 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8036 return [check_no_compiler_messages avx object {
8037 void _mm256_zeroall (void)
8039 __builtin_ia32_vzeroall ();
8044 # Return 1 if avx2 instructions can be compiled.
8045 proc check_effective_target_avx2 { } {
8046 return [check_no_compiler_messages avx2 object {
8047 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8049 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
8051 return __builtin_ia32_andnotsi256 (__X, __Y);
8056 # Return 1 if sse instructions can be compiled.
8057 proc check_effective_target_sse { } {
8058 return [check_no_compiler_messages sse object {
8061 __builtin_ia32_stmxcsr ();
8067 # Return 1 if sse2 instructions can be compiled.
8068 proc check_effective_target_sse2 { } {
8069 return [check_no_compiler_messages sse2 object {
8070 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8072 __m128i _mm_srli_si128 (__m128i __A, int __N)
8074 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
8079 # Return 1 if sse4.1 instructions can be compiled.
8080 proc check_effective_target_sse4 { } {
8081 return [check_no_compiler_messages sse4.1 object {
8082 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8083 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8085 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
8087 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
8093 # Return 1 if F16C instructions can be compiled.
8095 proc check_effective_target_f16c { } {
8096 return [check_no_compiler_messages f16c object {
8097 #include "immintrin.h"
8099 foo (unsigned short val)
8101 return _cvtsh_ss (val);
8106 proc check_effective_target_ms_hook_prologue { } {
8107 if { [check_no_compiler_messages ms_hook_prologue object {
8108 void __attribute__ ((__ms_hook_prologue__)) foo ();
8116 # Return 1 if 3dnow instructions can be compiled.
8117 proc check_effective_target_3dnow { } {
8118 return [check_no_compiler_messages 3dnow object {
8119 typedef int __m64 __attribute__ ((__vector_size__ (8)));
8120 typedef float __v2sf __attribute__ ((__vector_size__ (8)));
8122 __m64 _m_pfadd (__m64 __A, __m64 __B)
8124 return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
8129 # Return 1 if sse3 instructions can be compiled.
8130 proc check_effective_target_sse3 { } {
8131 return [check_no_compiler_messages sse3 object {
8132 typedef double __m128d __attribute__ ((__vector_size__ (16)));
8133 typedef double __v2df __attribute__ ((__vector_size__ (16)));
8135 __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
8137 return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
8142 # Return 1 if ssse3 instructions can be compiled.
8143 proc check_effective_target_ssse3 { } {
8144 return [check_no_compiler_messages ssse3 object {
8145 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8146 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8148 __m128i _mm_abs_epi32 (__m128i __X)
8150 return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
8155 # Return 1 if aes instructions can be compiled.
8156 proc check_effective_target_aes { } {
8157 return [check_no_compiler_messages aes object {
8158 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8159 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8161 __m128i _mm_aesimc_si128 (__m128i __X)
8163 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
8168 # Return 1 if vaes instructions can be compiled.
8169 proc check_effective_target_vaes { } {
8170 return [check_no_compiler_messages vaes object {
8171 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8172 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8174 __m128i _mm_aesimc_si128 (__m128i __X)
8176 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
8178 } "-O2 -maes -mavx" ]
8181 # Return 1 if pclmul instructions can be compiled.
8182 proc check_effective_target_pclmul { } {
8183 return [check_no_compiler_messages pclmul object {
8184 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8185 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8187 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
8189 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
8196 # Return 1 if vpclmul instructions can be compiled.
8197 proc check_effective_target_vpclmul { } {
8198 return [check_no_compiler_messages vpclmul object {
8199 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8200 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8202 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
8204 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
8208 } "-O2 -mpclmul -mavx" ]
8211 # Return 1 if sse4a instructions can be compiled.
8212 proc check_effective_target_sse4a { } {
8213 return [check_no_compiler_messages sse4a object {
8214 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8215 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8217 __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
8219 return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
8224 # Return 1 if fma4 instructions can be compiled.
8225 proc check_effective_target_fma4 { } {
8226 return [check_no_compiler_messages fma4 object {
8227 typedef float __m128 __attribute__ ((__vector_size__ (16)));
8228 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
8229 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
8231 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
8238 # Return 1 if fma instructions can be compiled.
8239 proc check_effective_target_fma { } {
8240 return [check_no_compiler_messages fma object {
8241 typedef float __m128 __attribute__ ((__vector_size__ (16)));
8242 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
8243 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
8245 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
8252 # Return 1 if xop instructions can be compiled.
8253 proc check_effective_target_xop { } {
8254 return [check_no_compiler_messages xop object {
8255 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8256 typedef short __v8hi __attribute__ ((__vector_size__ (16)));
8257 __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
8259 return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
8266 # Return 1 if lzcnt instruction can be compiled.
8267 proc check_effective_target_lzcnt { } {
8268 return [check_no_compiler_messages lzcnt object {
8269 unsigned short _lzcnt (unsigned short __X)
8271 return __builtin_clzs (__X);
8276 # Return 1 if bmi instructions can be compiled.
8277 proc check_effective_target_bmi { } {
8278 return [check_no_compiler_messages bmi object {
8279 unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)
8281 return __builtin_ia32_bextr_u32 (__X, __Y);
8286 # Return 1 if ADX instructions can be compiled.
8287 proc check_effective_target_adx { } {
8288 return [check_no_compiler_messages adx object {
8290 _adxcarry_u32 (unsigned char __CF, unsigned int __X,
8291 unsigned int __Y, unsigned int *__P)
8293 return __builtin_ia32_addcarryx_u32 (__CF, __X, __Y, __P);
8298 # Return 1 if rtm instructions can be compiled.
8299 proc check_effective_target_rtm { } {
8300 return [check_no_compiler_messages rtm object {
8304 return __builtin_ia32_xend ();
8309 # Return 1 if avx512vl instructions can be compiled.
8310 proc check_effective_target_avx512vl { } {
8311 return [check_no_compiler_messages avx512vl object {
8312 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8314 mm256_and_epi64 (__v4di __X, __v4di __Y)
8317 return __builtin_ia32_pandq256_mask (__X, __Y, __W, -1);
8322 # Return 1 if avx512cd instructions can be compiled.
8323 proc check_effective_target_avx512cd { } {
8324 return [check_no_compiler_messages avx512cd_trans object {
8325 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
8327 _mm512_conflict_epi64 (__v8di __W, __v8di __A)
8329 return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A,
8333 } "-Wno-psabi -mavx512cd" ]
8336 # Return 1 if avx512er instructions can be compiled.
8337 proc check_effective_target_avx512er { } {
8338 return [check_no_compiler_messages avx512er_trans object {
8339 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
8341 mm512_exp2a23_ps (__v16sf __X)
8343 return __builtin_ia32_exp2ps_mask (__X, __X, -1, 4);
8345 } "-Wno-psabi -mavx512er" ]
8348 # Return 1 if sha instructions can be compiled.
8349 proc check_effective_target_sha { } {
8350 return [check_no_compiler_messages sha object {
8351 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8352 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8354 __m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y)
8356 return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X,
8362 # Return 1 if avx512dq instructions can be compiled.
8363 proc check_effective_target_avx512dq { } {
8364 return [check_no_compiler_messages avx512dq object {
8365 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
8367 _mm512_mask_mullo_epi64 (__v8di __W, __v8di __A, __v8di __B)
8369 return (__v8di) __builtin_ia32_pmullq512_mask ((__v8di) __A,
8377 # Return 1 if avx512bw instructions can be compiled.
8378 proc check_effective_target_avx512bw { } {
8379 return [check_no_compiler_messages avx512bw object {
8380 typedef short __v32hi __attribute__ ((__vector_size__ (64)));
8382 _mm512_mask_mulhrs_epi16 (__v32hi __W, __v32hi __A, __v32hi __B)
8384 return (__v32hi) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A,
8392 # Return 1 if avx512vp2intersect instructions can be compiled.
8393 proc check_effective_target_avx512vp2intersect { } {
8394 return [check_no_compiler_messages avx512vp2intersect object {
8395 typedef int __v16si __attribute__ ((__vector_size__ (64)));
8396 typedef short __mmask16;
8398 _mm512_2intersect_epi32 (__v16si __A, __v16si __B, __mmask16 *__U,
8401 __builtin_ia32_2intersectd512 (__U, __M, (__v16si) __A, (__v16si) __B);
8403 } "-mavx512vp2intersect" ]
8406 # Return 1 if avx512ifma instructions can be compiled.
8407 proc check_effective_target_avx512ifma { } {
8408 return [check_no_compiler_messages avx512ifma object {
8409 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
8411 _mm512_madd52lo_epu64 (__v8di __X, __v8di __Y, __v8di __Z)
8413 return (__v8di) __builtin_ia32_vpmadd52luq512_mask ((__v8di) __X,
8421 # Return 1 if avx512vbmi instructions can be compiled.
8422 proc check_effective_target_avx512vbmi { } {
8423 return [check_no_compiler_messages avx512vbmi object {
8424 typedef char __v64qi __attribute__ ((__vector_size__ (64)));
8426 _mm512_multishift_epi64_epi8 (__v64qi __X, __v64qi __Y)
8428 return (__v64qi) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
8436 # Return 1 if avx512_4fmaps instructions can be compiled.
8437 proc check_effective_target_avx5124fmaps { } {
8438 return [check_no_compiler_messages avx5124fmaps object {
8439 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
8440 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
8443 _mm512_mask_4fmadd_ps (__v16sf __DEST, __v16sf __A, __v16sf __B, __v16sf __C,
8444 __v16sf __D, __v16sf __E, __v4sf *__F)
8446 return (__v16sf) __builtin_ia32_4fmaddps_mask ((__v16sf) __A,
8451 (const __v4sf *) __F,
8455 } "-mavx5124fmaps" ]
8458 # Return 1 if avx512_4vnniw instructions can be compiled.
8459 proc check_effective_target_avx5124vnniw { } {
8460 return [check_no_compiler_messages avx5124vnniw object {
8461 typedef int __v16si __attribute__ ((__vector_size__ (64)));
8462 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8465 _mm512_4dpwssd_epi32 (__v16si __A, __v16si __B, __v16si __C,
8466 __v16si __D, __v16si __E, __v4si *__F)
8468 return (__v16si) __builtin_ia32_vp4dpwssd ((__v16si) __B,
8473 (const __v4si *) __F);
8475 } "-mavx5124vnniw" ]
8478 # Return 1 if avx512_vpopcntdq instructions can be compiled.
8479 proc check_effective_target_avx512vpopcntdq { } {
8480 return [check_no_compiler_messages avx512vpopcntdq object {
8481 typedef int __v16si __attribute__ ((__vector_size__ (64)));
8484 _mm512_popcnt_epi32 (__v16si __A)
8486 return (__v16si) __builtin_ia32_vpopcountd_v16si ((__v16si) __A);
8488 } "-mavx512vpopcntdq" ]
8491 # Return 1 if 128 or 256-bit avx512_vpopcntdq instructions can be compiled.
8492 proc check_effective_target_avx512vpopcntdqvl { } {
8493 return [check_no_compiler_messages avx512vpopcntdqvl object {
8494 typedef int __v8si __attribute__ ((__vector_size__ (32)));
8497 _mm256_popcnt_epi32 (__v8si __A)
8499 return (__v8si) __builtin_ia32_vpopcountd_v8si ((__v8si) __A);
8501 } "-mavx512vpopcntdq -mavx512vl" ]
8504 # Return 1 if gfni instructions can be compiled.
8505 proc check_effective_target_gfni { } {
8506 return [check_no_compiler_messages gfni object {
8507 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
8510 _mm_gf2p8affineinv_epi64_epi8 (__v16qi __A, __v16qi __B, const int __C)
8512 return (__v16qi) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
8519 # Return 1 if avx512vbmi2 instructions can be compiled.
8520 proc check_effective_target_avx512vbmi2 { } {
8521 return [check_no_compiler_messages avx512vbmi2 object {
8522 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
8523 typedef unsigned long long __mmask16;
8526 _mm_mask_compress_epi8 (__v16qi __A, __mmask16 __B, __v16qi __C)
8528 return (__v16qi) __builtin_ia32_compressqi128_mask((__v16qi)__C,
8532 } "-mavx512vbmi2 -mavx512vl" ]
8535 # Return 1 if avx512vbmi2 instructions can be compiled.
8536 proc check_effective_target_avx512vnni { } {
8537 return [check_no_compiler_messages avx512vnni object {
8538 typedef int __v16si __attribute__ ((__vector_size__ (64)));
8541 _mm_mask_compress_epi8 (__v16si __A, __v16si __B, __v16si __C)
8543 return (__v16si) __builtin_ia32_vpdpbusd_v16si ((__v16si)__A,
8547 } "-mavx512vnni -mavx512f" ]
8550 # Return 1 if vaes instructions can be compiled.
8551 proc check_effective_target_avx512vaes { } {
8552 return [check_no_compiler_messages avx512vaes object {
8554 typedef int __v16si __attribute__ ((__vector_size__ (64)));
8557 _mm256_aesdec_epi128 (__v32qi __A, __v32qi __B)
8559 return (__v32qi)__builtin_ia32_vaesdec_v32qi ((__v32qi) __A, (__v32qi) __B);
8564 # Return 1 if vpclmulqdq instructions can be compiled.
8565 proc check_effective_target_vpclmulqdq { } {
8566 return [check_no_compiler_messages vpclmulqdq object {
8567 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8570 _mm256_clmulepi64_epi128 (__v4di __A, __v4di __B)
8572 return (__v4di) __builtin_ia32_vpclmulqdq_v4di (__A, __B, 0);
8574 } "-mvpclmulqdq -mavx512vl" ]
8577 # Return 1 if avx512_bitalg instructions can be compiled.
8578 proc check_effective_target_avx512bitalg { } {
8579 return [check_no_compiler_messages avx512bitalg object {
8580 typedef short int __v32hi __attribute__ ((__vector_size__ (64)));
8583 _mm512_popcnt_epi16 (__v32hi __A)
8585 return (__v32hi) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
8587 } "-mavx512bitalg" ]
8590 # Return 1 if C wchar_t type is compatible with char16_t.
8592 proc check_effective_target_wchar_t_char16_t_compatible { } {
8593 return [check_no_compiler_messages wchar_t_char16_t object {
8595 __CHAR16_TYPE__ *p16 = &wc;
8596 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8600 # Return 1 if C wchar_t type is compatible with char32_t.
8602 proc check_effective_target_wchar_t_char32_t_compatible { } {
8603 return [check_no_compiler_messages wchar_t_char32_t object {
8605 __CHAR32_TYPE__ *p32 = &wc;
8606 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8610 # Return 1 if pow10 function exists.
8612 proc check_effective_target_pow10 { } {
8613 return [check_runtime pow10 {
8623 # Return 1 if frexpl function exists.
8625 proc check_effective_target_frexpl { } {
8626 return [check_runtime frexpl {
8631 x = frexpl (5.0, &y);
8638 # Return 1 if issignaling function exists.
8639 proc check_effective_target_issignaling {} {
8640 return [check_runtime issignaling {
8645 return issignaling (0.0);
8650 # Return 1 if current options generate DFP instructions, 0 otherwise.
8651 proc check_effective_target_hard_dfp {} {
8652 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
8653 typedef float d64 __attribute__((mode(DD)));
8655 void foo (void) { z = x + y; }
8659 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
8660 # for strchr etc. functions.
8662 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
8663 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
8666 #if !defined(__cplusplus) \
8667 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
8668 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
8669 ISO C++ correct string.h and wchar.h protos not supported.
8676 # Return 1 if GNU as is used.
8678 proc check_effective_target_gas { } {
8679 global use_gas_saved
8682 if {![info exists use_gas_saved]} {
8683 # Check if the as used by gcc is GNU as.
8684 set options [list "additional_flags=-print-prog-name=as"]
8685 set gcc_as [lindex [${tool}_target_compile "" "" "none" $options] 0]
8686 # Provide /dev/null as input, otherwise gas times out reading from
8688 set status [remote_exec host "$gcc_as" "-v /dev/null"]
8689 set as_output [lindex $status 1]
8690 if { [ string first "GNU" $as_output ] >= 0 } {
8696 return $use_gas_saved
8699 # Return 1 if GNU ld is used.
8701 proc check_effective_target_gld { } {
8702 global use_gld_saved
8705 if {![info exists use_gld_saved]} {
8706 # Check if the ld used by gcc is GNU ld.
8707 set options [list "additional_flags=-print-prog-name=ld"]
8708 set gcc_ld [lindex [${tool}_target_compile "" "" "none" $options] 0]
8709 set status [remote_exec host "$gcc_ld" "--version"]
8710 set ld_output [lindex $status 1]
8711 if { [ string first "GNU" $ld_output ] >= 0 } {
8717 return $use_gld_saved
8720 # Return 1 if the compiler has been configure with link-time optimization
8723 proc check_effective_target_lto { } {
8724 if { [istarget nvptx-*-*]
8725 || [istarget amdgcn-*-*] } {
8728 return [check_no_compiler_messages lto object {
8733 # Return 1 if the compiler and linker support incremental link-time
8736 proc check_effective_target_lto_incremental { } {
8737 if ![check_effective_target_lto] {
8740 return [check_no_compiler_messages lto_incremental executable {
8741 int main () { return 0; }
8742 } "-flto -r -nostdlib"]
8745 # Return 1 if the compiler has been configured with analyzer support.
8747 proc check_effective_target_analyzer { } {
8748 return [check_no_compiler_messages analyzer object {
8753 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
8755 proc check_effective_target_maybe_x32 { } {
8756 return [check_no_compiler_messages maybe_x32 object {
8758 } "-mx32 -maddress-mode=short"]
8761 # Return 1 if this target supports the -fsplit-stack option, 0
8764 proc check_effective_target_split_stack {} {
8765 return [check_no_compiler_messages split_stack object {
8770 # Return 1 if this target supports the -masm=intel option, 0
8773 proc check_effective_target_masm_intel {} {
8774 return [check_no_compiler_messages masm_intel object {
8775 extern void abort (void);
8779 # Return 1 if the language for the compiler under test is C.
8781 proc check_effective_target_c { } {
8783 if [string match $tool "gcc"] {
8789 # Return 1 if the language for the compiler under test is C++.
8791 proc check_effective_target_c++ { } {
8793 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
8799 set cxx_default "c++14"
8800 # Check whether the current active language standard supports the features
8801 # of C++11/C++14 by checking for the presence of one of the -std flags.
8802 # This assumes that the default for the compiler is $cxx_default, and that
8803 # there will never be multiple -std= arguments on the command line.
8804 proc check_effective_target_c++11_only { } {
8806 if ![check_effective_target_c++] {
8809 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
8812 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
8817 proc check_effective_target_c++11 { } {
8818 if [check_effective_target_c++11_only] {
8821 return [check_effective_target_c++14]
8823 proc check_effective_target_c++11_down { } {
8824 if ![check_effective_target_c++] {
8827 return [expr ![check_effective_target_c++14] ]
8830 proc check_effective_target_c++14_only { } {
8832 if ![check_effective_target_c++] {
8835 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
8838 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
8844 proc check_effective_target_c++14 { } {
8845 if [check_effective_target_c++14_only] {
8848 return [check_effective_target_c++17]
8850 proc check_effective_target_c++14_down { } {
8851 if ![check_effective_target_c++] {
8854 return [expr ![check_effective_target_c++17] ]
8857 proc check_effective_target_c++98_only { } {
8859 if ![check_effective_target_c++] {
8862 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
8865 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
8871 proc check_effective_target_c++17_only { } {
8873 if ![check_effective_target_c++] {
8876 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
8879 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
8885 proc check_effective_target_c++17 { } {
8886 if [check_effective_target_c++17_only] {
8889 return [check_effective_target_c++2a]
8891 proc check_effective_target_c++17_down { } {
8892 if ![check_effective_target_c++] {
8895 return [expr ![check_effective_target_c++2a] ]
8898 proc check_effective_target_c++2a_only { } {
8900 if ![check_effective_target_c++] {
8903 if [check-flags { { } { } { -std=c++2a -std=gnu++2a -std=c++20 -std=gnu++20 } }] {
8906 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
8911 proc check_effective_target_c++2a { } {
8912 return [check_effective_target_c++2a_only]
8915 # Check for C++ Concepts support, i.e. -fconcepts flag.
8916 proc check_effective_target_concepts { } {
8917 if [check_effective_target_c++2a] {
8920 return [check-flags { "" { } { -fconcepts } }]
8923 # Return 1 if expensive testcases should be run.
8925 proc check_effective_target_run_expensive_tests { } {
8926 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
8932 # Returns 1 if "mempcpy" is available on the target system.
8934 proc check_effective_target_mempcpy {} {
8935 return [check_function_available "mempcpy"]
8938 # Returns 1 if "stpcpy" is available on the target system.
8940 proc check_effective_target_stpcpy {} {
8941 return [check_function_available "stpcpy"]
8944 # Check whether the vectorizer tests are supported by the target and
8945 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
8946 # If a port wants to execute the tests more than once it should append
8947 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
8948 # will be added by a call to add_options_for_<target>.
8949 # Set dg-do-what-default to either compile or run, depending on target
8950 # capabilities. Do not set this if the supported target is appended to
8951 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
8952 # automatically. Return the number of effective targets if vectorizer tests
8953 # are supported, 0 otherwise.
8955 proc check_vect_support_and_set_flags { } {
8956 global DEFAULT_VECTCFLAGS
8957 global dg-do-what-default
8958 global EFFECTIVE_TARGETS
8960 if [istarget powerpc-*paired*] {
8961 lappend DEFAULT_VECTCFLAGS "-mpaired"
8962 if [check_750cl_hw_available] {
8963 set dg-do-what-default run
8965 set dg-do-what-default compile
8967 } elseif [istarget powerpc*-*-*] {
8968 # Skip targets not supporting -maltivec.
8969 if ![is-effective-target powerpc_altivec_ok] {
8973 lappend DEFAULT_VECTCFLAGS "-maltivec"
8974 if [check_p9vector_hw_available] {
8975 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
8976 } elseif [check_p8vector_hw_available] {
8977 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
8978 } elseif [check_vsx_hw_available] {
8979 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
8982 if [check_vmx_hw_available] {
8983 set dg-do-what-default run
8985 if [is-effective-target ilp32] {
8986 # Specify a cpu that supports VMX for compile-only tests.
8987 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
8989 set dg-do-what-default compile
8991 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8992 lappend DEFAULT_VECTCFLAGS "-msse2"
8993 if { [check_effective_target_sse2_runtime] } {
8994 set dg-do-what-default run
8996 set dg-do-what-default compile
8998 } elseif { [istarget mips*-*-*]
8999 && [check_effective_target_nomips16] } {
9000 if { [check_effective_target_mpaired_single] } {
9001 lappend EFFECTIVE_TARGETS mpaired_single
9003 if { [check_effective_target_mips_loongson_mmi] } {
9004 lappend EFFECTIVE_TARGETS mips_loongson_mmi
9006 if { [check_effective_target_mips_msa] } {
9007 lappend EFFECTIVE_TARGETS mips_msa
9009 return [llength $EFFECTIVE_TARGETS]
9010 } elseif [istarget sparc*-*-*] {
9011 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
9012 if [check_effective_target_ultrasparc_hw] {
9013 set dg-do-what-default run
9015 set dg-do-what-default compile
9017 } elseif [istarget alpha*-*-*] {
9018 # Alpha's vectorization capabilities are extremely limited.
9019 # It's more effort than its worth disabling all of the tests
9020 # that it cannot pass. But if you actually want to see what
9021 # does work, command out the return.
9024 lappend DEFAULT_VECTCFLAGS "-mmax"
9025 if [check_alpha_max_hw_available] {
9026 set dg-do-what-default run
9028 set dg-do-what-default compile
9030 } elseif [istarget ia64-*-*] {
9031 set dg-do-what-default run
9032 } elseif [is-effective-target arm_neon_ok] {
9033 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
9034 # NEON does not support denormals, so is not used for vectorization by
9035 # default to avoid loss of precision. We must pass -ffast-math to test
9036 # vectorization of float operations.
9037 lappend DEFAULT_VECTCFLAGS "-ffast-math"
9038 if [is-effective-target arm_neon_hw] {
9039 set dg-do-what-default run
9041 set dg-do-what-default compile
9043 } elseif [istarget "aarch64*-*-*"] {
9044 set dg-do-what-default run
9045 } elseif [istarget s390*-*-*] {
9046 # The S/390 backend set a default of 2 for that value.
9047 # Override it to have the same situation as with other
9049 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
9050 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
9051 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
9052 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
9053 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
9054 if [check_effective_target_s390_vxe] {
9055 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
9056 set dg-do-what-default run
9057 } elseif [check_effective_target_s390_vx] {
9058 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
9059 set dg-do-what-default run
9061 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
9062 set dg-do-what-default compile
9064 } elseif [istarget amdgcn-*-*] {
9065 set dg-do-what-default run
9073 # Return 1 if the target does *not* require strict alignment.
9075 proc check_effective_target_non_strict_align {} {
9077 # On ARM, the default is to use STRICT_ALIGNMENT, but there
9078 # are interfaces defined for misaligned access and thus
9079 # depending on the architecture levels unaligned access is
9081 if [istarget "arm*-*-*"] {
9082 return [check_effective_target_arm_unaligned]
9085 return [check_no_compiler_messages non_strict_align assembly {
9087 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
9089 void foo(void) { z = (c *) y; }
9093 # Return 1 if the target has <ucontext.h>.
9095 proc check_effective_target_ucontext_h { } {
9096 return [check_no_compiler_messages ucontext_h assembly {
9097 #include <ucontext.h>
9101 proc check_effective_target_aarch64_tiny { } {
9102 if { [istarget aarch64*-*-*] } {
9103 return [check_no_compiler_messages aarch64_tiny object {
9104 #ifdef __AARCH64_CMODEL_TINY__
9107 #error target not AArch64 tiny code model
9115 # Create functions to check that the AArch64 assembler supports the
9116 # various architecture extensions via the .arch_extension pseudo-op.
9118 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"
9119 "i8mm" "f32mm" "f64mm" "bf16" } {
9120 eval [string map [list FUNC $aarch64_ext] {
9121 proc check_effective_target_aarch64_asm_FUNC_ok { } {
9122 if { [istarget aarch64*-*-*] } {
9123 return [check_no_compiler_messages aarch64_FUNC_assembler object {
9124 __asm__ (".arch_extension FUNC");
9125 } "-march=armv8-a+FUNC"]
9133 proc check_effective_target_aarch64_small { } {
9134 if { [istarget aarch64*-*-*] } {
9135 return [check_no_compiler_messages aarch64_small object {
9136 #ifdef __AARCH64_CMODEL_SMALL__
9139 #error target not AArch64 small code model
9147 proc check_effective_target_aarch64_large { } {
9148 if { [istarget aarch64*-*-*] } {
9149 return [check_no_compiler_messages aarch64_large object {
9150 #ifdef __AARCH64_CMODEL_LARGE__
9153 #error target not AArch64 large code model
9161 # Return 1 if the assembler accepts the aarch64 .variant_pcs directive.
9163 proc check_effective_target_aarch64_variant_pcs { } {
9164 if { [istarget aarch64*-*-*] } {
9165 return [check_no_compiler_messages aarch64_variant_pcs object {
9166 __asm__ (".variant_pcs foo");
9173 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
9174 # register set, instruction set, addressing capabilities and ABI.
9176 proc check_effective_target_avr_tiny { } {
9177 if { [istarget avr*-*-*] } {
9178 return [check_no_compiler_messages avr_tiny object {
9182 #error target not a reduced AVR Tiny core
9190 # Return 1 if <fenv.h> is available.
9192 proc check_effective_target_fenv {} {
9193 return [check_no_compiler_messages fenv object {
9195 } [add_options_for_ieee "-std=gnu99"]]
9198 # Return 1 if <fenv.h> is available with all the standard IEEE
9199 # exceptions and floating-point exceptions are raised by arithmetic
9200 # operations. (If the target requires special options for "inexact"
9201 # exceptions, those need to be specified in the testcases.)
9203 proc check_effective_target_fenv_exceptions {} {
9204 return [check_runtime fenv_exceptions {
9207 #ifndef FE_DIVBYZERO
9208 # error Missing FE_DIVBYZERO
9211 # error Missing FE_INEXACT
9214 # error Missing FE_INVALID
9217 # error Missing FE_OVERFLOW
9219 #ifndef FE_UNDERFLOW
9220 # error Missing FE_UNDERFLOW
9222 volatile float a = 0.0f, r;
9227 if (fetestexcept (FE_INVALID))
9232 } [add_options_for_ieee "-std=gnu99"]]
9235 # Return 1 if -fexceptions is supported.
9237 proc check_effective_target_exceptions {} {
9238 if { [istarget amdgcn*-*-*] } {
9244 # Used to check if the testing configuration supports exceptions.
9245 # Returns 0 if exceptions are unsupported or disabled (e.g. by passing
9246 # -fno-exceptions). Returns 1 if exceptions are enabled.
9247 proc check_effective_target_exceptions_enabled {} {
9248 return [check_cached_effective_target exceptions_enabled {
9249 if { [check_effective_target_exceptions] } {
9250 return [check_no_compiler_messages exceptions_enabled assembly {
9257 # If exceptions aren't supported, then they're not enabled.
9263 proc check_effective_target_tiny {} {
9264 return [check_cached_effective_target tiny {
9265 if { [istarget aarch64*-*-*]
9266 && [check_effective_target_aarch64_tiny] } {
9269 if { [istarget avr-*-*]
9270 && [check_effective_target_avr_tiny] } {
9273 # PRU Program Counter is 16-bits, and trampolines are not supported.
9274 # Hence directly declare as a tiny target.
9275 if [istarget pru-*-*] {
9282 # Return 1 if the target supports -mbranch-cost=N option.
9284 proc check_effective_target_branch_cost {} {
9285 if { [ istarget arm*-*-*]
9286 || [istarget avr*-*-*]
9287 || [istarget csky*-*-*]
9288 || [istarget epiphany*-*-*]
9289 || [istarget frv*-*-*]
9290 || [istarget i?86-*-*] || [istarget x86_64-*-*]
9291 || [istarget mips*-*-*]
9292 || [istarget s390*-*-*]
9293 || [istarget riscv*-*-*]
9294 || [istarget sh*-*-*] } {
9300 # Record that dg-final test TEST requires convential compilation.
9302 proc force_conventional_output_for { test } {
9303 if { [info proc $test] == "" } {
9304 perror "$test does not exist"
9307 proc ${test}_required_options {} {
9308 global gcc_force_conventional_output
9309 upvar 1 extra_tool_flags extra_tool_flags
9310 if {[regexp -- "^scan-assembler" [info level 0]]
9311 && ![string match "*-fident*" $extra_tool_flags]} {
9312 # Do not let .ident confuse assembler scan tests
9313 return [list $gcc_force_conventional_output "-fno-ident"]
9315 return $gcc_force_conventional_output
9319 # Record that dg-final test scan-ltrans-tree-dump* requires -flto-partition=one
9320 # in order to force a single partition, allowing scan-ltrans-tree-dump* to scan
9321 # a dump file *.exe.ltrans0.*.
9323 proc scan-ltrans-tree-dump_required_options {} {
9324 return "-flto-partition=one"
9326 proc scan-ltrans-tree-dump-times_required_options {} {
9327 return "-flto-partition=one"
9329 proc scan-ltrans-tree-dump-not_required_options {} {
9330 return "-flto-partition=one"
9332 proc scan-ltrans-tree-dump-dem_required_options {} {
9333 return "-flto-partition=one"
9335 proc scan-ltrans-tree-dump-dem-not_required_options {} {
9336 return "-flto-partition=one"
9339 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
9340 # otherwise. Cache the result.
9342 proc check_effective_target_pie_copyreloc { } {
9344 global GCC_UNDER_TEST
9346 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9350 # Need auto-host.h to check linker support.
9351 if { ![file exists ../../auto-host.h ] } {
9355 return [check_cached_effective_target pie_copyreloc {
9356 # Set up and compile to see if linker supports PIE with copy
9357 # reloc. Include the current process ID in the file names to
9358 # prevent conflicts with invocations for multiple testsuites.
9363 set f [open $src "w"]
9364 puts $f "#include \"../../auto-host.h\""
9365 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
9366 puts $f "# error Linker does not support PIE with copy reloc."
9370 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
9371 set lines [${tool}_target_compile $src $obj object ""]
9376 if [string match "" $lines] then {
9377 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
9380 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
9386 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
9387 # otherwise. Cache the result.
9389 proc check_effective_target_got32x_reloc { } {
9391 global GCC_UNDER_TEST
9393 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9397 # Need auto-host.h to check linker support.
9398 if { ![file exists ../../auto-host.h ] } {
9402 return [check_cached_effective_target got32x_reloc {
9403 # Include the current process ID in the file names to prevent
9404 # conflicts with invocations for multiple testsuites.
9406 set src got32x[pid].c
9407 set obj got32x[pid].o
9409 set f [open $src "w"]
9410 puts $f "#include \"../../auto-host.h\""
9411 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
9412 puts $f "# error Assembler does not support R_386_GOT32X."
9416 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
9417 set lines [${tool}_target_compile $src $obj object ""]
9422 if [string match "" $lines] then {
9423 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
9426 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
9431 return $got32x_reloc_available_saved
9434 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
9435 # 0 otherwise. Cache the result.
9437 proc check_effective_target_tls_get_addr_via_got { } {
9439 global GCC_UNDER_TEST
9441 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9445 # Need auto-host.h to check linker support.
9446 if { ![file exists ../../auto-host.h ] } {
9450 return [check_cached_effective_target tls_get_addr_via_got {
9451 # Include the current process ID in the file names to prevent
9452 # conflicts with invocations for multiple testsuites.
9454 set src tls_get_addr_via_got[pid].c
9455 set obj tls_get_addr_via_got[pid].o
9457 set f [open $src "w"]
9458 puts $f "#include \"../../auto-host.h\""
9459 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
9460 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
9464 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
9465 set lines [${tool}_target_compile $src $obj object ""]
9470 if [string match "" $lines] then {
9471 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
9474 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
9480 # Return 1 if the target uses comdat groups.
9482 proc check_effective_target_comdat_group {} {
9483 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat|\.group\[^\n\r]*,#comdat" assembly {
9485 inline int foo () { return 1; }
9490 # Return 1 if target supports __builtin_eh_return
9491 proc check_effective_target_builtin_eh_return { } {
9492 return [check_no_compiler_messages builtin_eh_return object {
9493 void test (long l, void *p)
9495 __builtin_eh_return (l, p);
9500 # Return 1 if the target supports max reduction for vectors.
9502 proc check_effective_target_vect_max_reduc { } {
9503 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
9509 # Return 1 if the compiler has been configured with hsa offloading.
9511 proc check_effective_target_offload_hsa { } {
9512 return [check_no_compiler_messages offload_hsa assembly {
9513 int main () {return 0;}
9517 # Return 1 if the compiler has been configured with hsa offloading.
9519 proc check_effective_target_offload_gcn { } {
9520 return [check_no_compiler_messages offload_gcn assembly {
9521 int main () {return 0;}
9522 } "-foffload=amdgcn-unknown-amdhsa" ]
9525 # Return 1 if the target support -fprofile-update=atomic
9526 proc check_effective_target_profile_update_atomic {} {
9527 return [check_no_compiler_messages profile_update_atomic assembly {
9528 int main (void) { return 0; }
9529 } "-fprofile-update=atomic -fprofile-generate"]
9532 # Return 1 if vector (va - vector add) instructions are understood by
9533 # the assembler and can be executed. This also covers checking for
9534 # the VX kernel feature. A kernel without that feature does not
9535 # enable the vector facility and the following check will die with a
9537 proc check_effective_target_s390_vx { } {
9538 if ![istarget s390*-*-*] then {
9542 return [check_runtime s390_check_vx {
9545 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
9548 } "-march=z13 -mzarch" ]
9551 # Same as above but for the z14 vector enhancement facility. Test
9552 # is performed with the vector nand instruction.
9553 proc check_effective_target_s390_vxe { } {
9554 if ![istarget s390*-*-*] then {
9558 return [check_runtime s390_check_vxe {
9561 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
9564 } "-march=z14 -mzarch" ]
9567 # Same as above but for the arch13 vector enhancement facility. Test
9568 # is performed with the vector shift left double by bit instruction.
9569 proc check_effective_target_s390_vxe2 { } {
9570 if ![istarget s390*-*-*] then {
9574 return [check_runtime s390_check_vxe2 {
9577 asm ("vsld %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
9580 } "-march=arch13 -mzarch" ]
9583 #For versions of ARM architectures that have hardware div insn,
9584 #disable the divmod transform
9586 proc check_effective_target_arm_divmod_simode { } {
9587 return [check_no_compiler_messages arm_divmod assembly {
9588 #ifdef __ARM_ARCH_EXT_IDIV__
9595 # Return 1 if target supports divmod hardware insn or divmod libcall.
9597 proc check_effective_target_divmod { } {
9598 #TODO: Add checks for all targets that have either hardware divmod insn
9599 # or define libfunc for divmod.
9600 if { [istarget arm*-*-*]
9601 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
9607 # Return 1 if target supports divmod for SImode. The reason for
9608 # separating this from check_effective_target_divmod is that
9609 # some versions of ARM architecture define div instruction
9610 # only for simode, and for these archs, we do not want to enable
9611 # divmod transform for simode.
9613 proc check_effective_target_divmod_simode { } {
9614 if { [istarget arm*-*-*] } {
9615 return [check_effective_target_arm_divmod_simode]
9618 return [check_effective_target_divmod]
9621 # Return 1 if store merging optimization is applicable for target.
9622 # Store merging is not profitable for targets like the avr which
9623 # can load/store only one byte at a time. Use int size as a proxy
9624 # for the number of bytes the target can write, and skip for targets
9625 # with a smallish (< 32) size.
9627 proc check_effective_target_store_merge { } {
9628 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
9635 # Return 1 if we're able to assemble rdrand
9637 proc check_effective_target_rdrand { } {
9638 return [check_no_compiler_messages_nocache rdrand object {
9643 __builtin_ia32_rdrand32_step(&val);
9649 # Return 1 if the target supports coprocessor instructions: cdp, ldc, ldcl,
9650 # stc, stcl, mcr and mrc.
9651 proc check_effective_target_arm_coproc1_ok_nocache { } {
9652 if { ![istarget arm*-*-*] } {
9655 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
9656 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
9662 proc check_effective_target_arm_coproc1_ok { } {
9663 return [check_cached_effective_target arm_coproc1_ok \
9664 check_effective_target_arm_coproc1_ok_nocache]
9667 # Return 1 if the target supports all coprocessor instructions checked by
9668 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
9669 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
9670 proc check_effective_target_arm_coproc2_ok_nocache { } {
9671 if { ![check_effective_target_arm_coproc1_ok] } {
9674 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
9675 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 5
9681 proc check_effective_target_arm_coproc2_ok { } {
9682 return [check_cached_effective_target arm_coproc2_ok \
9683 check_effective_target_arm_coproc2_ok_nocache]
9686 # Return 1 if the target supports all coprocessor instructions checked by
9687 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
9689 proc check_effective_target_arm_coproc3_ok_nocache { } {
9690 if { ![check_effective_target_arm_coproc2_ok] } {
9693 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
9694 #if (__thumb__ && !__thumb2__) \
9695 || (__ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__))
9701 proc check_effective_target_arm_coproc3_ok { } {
9702 return [check_cached_effective_target arm_coproc3_ok \
9703 check_effective_target_arm_coproc3_ok_nocache]
9706 # Return 1 if the target supports all coprocessor instructions checked by
9707 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
9709 proc check_effective_target_arm_coproc4_ok_nocache { } {
9710 if { ![check_effective_target_arm_coproc3_ok] } {
9713 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
9714 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 6
9720 proc check_effective_target_arm_coproc4_ok { } {
9721 return [check_cached_effective_target arm_coproc4_ok \
9722 check_effective_target_arm_coproc4_ok_nocache]
9725 # Return 1 if the target supports the auto_inc_dec optimization pass.
9726 proc check_effective_target_autoincdec { } {
9727 if { ![check_no_compiler_messages auto_incdec assembly { void f () { }
9728 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
9732 set dumpfile [glob -nocomplain "auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
9733 if { [file exists $dumpfile ] } {
9734 file delete $dumpfile
9740 # Return 1 if the target has support for stack probing designed
9741 # to avoid stack-clash style attacks.
9743 # This is used to restrict the stack-clash mitigation tests to
9744 # just those targets that have been explicitly supported.
9746 # In addition to the prologue work on those targets, each target's
9747 # properties should be described in the functions below so that
9748 # tests do not become a mess of unreadable target conditions.
9750 proc check_effective_target_supports_stack_clash_protection { } {
9752 if { [istarget x86_64-*-*] || [istarget i?86-*-*]
9753 || [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
9754 || [istarget aarch64*-**] || [istarget s390*-*-*] } {
9760 # Return 1 if the target creates a frame pointer for non-leaf functions
9761 # Note we ignore cases where we apply tail call optimization here.
9762 proc check_effective_target_frame_pointer_for_non_leaf { } {
9763 # Solaris/x86 defaults to -fno-omit-frame-pointer.
9764 if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {
9771 # Return 1 if the target's calling sequence or its ABI
9772 # create implicit stack probes at or prior to function entry.
9773 proc check_effective_target_caller_implicit_probes { } {
9775 # On x86/x86_64 the call instruction itself pushes the return
9776 # address onto the stack. That is an implicit probe of *sp.
9777 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9781 # On PPC, the ABI mandates that the address of the outer
9782 # frame be stored at *sp. Thus each allocation of stack
9783 # space is itself an implicit probe of *sp.
9784 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
9788 # s390's ABI has a register save area allocated by the
9789 # caller for use by the callee. The mere existence does
9790 # not constitute a probe by the caller, but when the slots
9791 # used by the callee those stores are implicit probes.
9792 if { [istarget s390*-*-*] } {
9796 # Not strictly true on aarch64, but we have agreed that we will
9797 # consider any function that pushes SP more than 3kbytes into
9798 # the guard page as broken. This essentially means that we can
9799 # consider the aarch64 as having a caller implicit probe at
9801 if { [istarget aarch64*-*-*] } {
9808 # Targets that potentially realign the stack pointer often cause residual
9809 # stack allocations and make it difficult to elimination loops or residual
9810 # allocations for dynamic stack allocations
9811 proc check_effective_target_callee_realigns_stack { } {
9812 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9818 # Return 1 if CET instructions can be compiled.
9819 proc check_effective_target_cet { } {
9820 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9823 return [check_no_compiler_messages cet object {
9828 } "-O2 -fcf-protection" ]
9831 # Return 1 if target supports floating point "infinite"
9832 proc check_effective_target_inf { } {
9833 return [check_no_compiler_messages supports_inf assembly {
9834 const double pinf = __builtin_inf ();
9838 # Return 1 if the target supports ARMv8.3 Adv.SIMD Complex instructions
9839 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
9840 # Record the command line options needed.
9842 proc check_effective_target_arm_v8_3a_complex_neon_ok_nocache { } {
9843 global et_arm_v8_3a_complex_neon_flags
9844 set et_arm_v8_3a_complex_neon_flags ""
9846 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
9850 # Iterate through sets of options to find the compiler flags that
9851 # need to be added to the -march option.
9852 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
9853 if { [check_no_compiler_messages_nocache \
9854 arm_v8_3a_complex_neon_ok object {
9855 #if !defined (__ARM_FEATURE_COMPLEX)
9856 #error "__ARM_FEATURE_COMPLEX not defined"
9858 } "$flags -march=armv8.3-a"] } {
9859 set et_arm_v8_3a_complex_neon_flags "$flags -march=armv8.3-a"
9867 proc check_effective_target_arm_v8_3a_complex_neon_ok { } {
9868 return [check_cached_effective_target arm_v8_3a_complex_neon_ok \
9869 check_effective_target_arm_v8_3a_complex_neon_ok_nocache]
9872 proc add_options_for_arm_v8_3a_complex_neon { flags } {
9873 if { ! [check_effective_target_arm_v8_3a_complex_neon_ok] } {
9876 global et_arm_v8_3a_complex_neon_flags
9877 return "$flags $et_arm_v8_3a_complex_neon_flags"
9880 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.3
9881 # with the complex instruction extension, 0 otherwise. The test is valid for
9882 # ARM and for AArch64.
9884 proc check_effective_target_arm_v8_3a_complex_neon_hw { } {
9885 if { ![check_effective_target_arm_v8_3a_complex_neon_ok] } {
9888 return [check_runtime arm_v8_3a_complex_neon_hw_available {
9889 #include "arm_neon.h"
9894 float32x2_t results = {-4.0,5.0};
9895 float32x2_t a = {1.0,3.0};
9896 float32x2_t b = {2.0,5.0};
9898 #ifdef __ARM_ARCH_ISA_A64
9899 asm ("fcadd %0.2s, %1.2s, %2.2s, #90"
9902 : /* No clobbers. */);
9905 asm ("vcadd.f32 %P0, %P1, %P2, #90"
9908 : /* No clobbers. */);
9911 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
9913 } [add_options_for_arm_v8_3a_complex_neon ""]]
9916 # Return 1 if the assembler supports assembling the Armv8.3 pointer authentication B key directive
9917 proc check_effective_target_arm_v8_3a_bkey_directive { } {
9918 return [check_no_compiler_messages cet object {
9920 asm (".cfi_b_key_frame");
9926 # Returns 1 if the target is using glibc, 0 otherwise.
9928 proc check_effective_target_glibc { } {
9929 return [check_no_compiler_messages glibc_object assembly {
9931 #if !defined(__GLIBC__)
9937 # Return 1 if the target plus current options supports a vector
9938 # complex addition with rotate of half and single float modes, 0 otherwise.
9940 # This won't change for different subtargets so cache the result.
9943 eval [string map [list N $N] {
9944 proc check_effective_target_vect_complex_rot_N { } {
9945 return [check_cached_effective_target_indexed vect_complex_rot_N {
9946 expr { [istarget aarch64*-*-*]
9947 || [istarget arm*-*-*] }}]
9952 # Return 1 if the target plus current options supports a vector
9953 # complex addition with rotate of double float modes, 0 otherwise.
9955 # This won't change for different subtargets so cache the result.
9958 eval [string map [list N $N] {
9959 proc check_effective_target_vect_complex_rot_N { } {
9960 return [check_cached_effective_target_indexed vect_complex_rot_N {
9961 expr { [istarget aarch64*-*-*] }}]
9966 # Return 1 if this target uses an LLVM assembler and/or linker
9967 proc check_effective_target_llvm_binutils { } {
9968 return [check_cached_effective_target llvm_binutils {
9969 expr { [istarget amdgcn*-*-*]
9970 || [check_effective_target_offload_gcn] }}]
9973 # Return 1 if the compiler supports '-mfentry'.
9975 proc check_effective_target_mfentry { } {
9976 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9979 return [check_no_compiler_messages mfentry object {
9984 # Return 1 if this target supports indirect calls
9985 proc check_effective_target_indirect_calls { } {
9986 if { [istarget bpf-*-*] } {