1 # Copyright (C) 1999-2015 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 ###############################
256 # proc check_weak_available { }
257 ###############################
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
262 proc check_weak_available { } {
265 # All mips targets should support it
267 if { [ string first "mips" $target_cpu ] >= 0 } {
271 # All AIX targets should support it
273 if { [istarget *-*-aix*] } {
277 # All solaris2 targets should support it
279 if { [istarget *-*-solaris2*] } {
283 # Windows targets Cygwin and MingW32 support it
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
289 # HP-UX 10.X doesn't support it
291 if { [istarget hppa*-*-hpux10*] } {
295 # nvptx (nearly) supports it
297 if { [istarget nvptx-*-*] } {
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
304 set objformat [gcc_target_object_format]
312 unknown { return -1 }
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
328 return [check_weak_available]
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
348 ###############################
349 # proc check_alias_available { }
350 ###############################
352 # Determine if the target toolchain supports the alias attribute.
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
359 proc check_alias_available { } {
360 global alias_available_saved
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
376 set lines [${tool}_target_compile $src $obj object ""]
378 remote_file build delete $obj
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
387 set objformat [gcc_target_object_format]
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
393 set alias_available_saved 0
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
400 set alias_available_saved -1
405 verbose "check_alias_available returning $alias_available_saved" 2
408 return $alias_available_saved
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
429 void f() __attribute__((ifunc("g")));
433 # Returns true if --gc-sections is supported on the target.
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
466 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
467 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
468 set ld_output [remote_exec host "$gcc_ld" "--help"]
469 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
470 set gc_sections_available_saved 1
472 set gc_sections_available_saved 0
475 return $gc_sections_available_saved
478 # Return 1 if according to target_info struct and explicit target list
479 # target is supposed to support trampolines.
481 proc check_effective_target_trampolines { } {
482 if [target_info exists no_trampolines] {
485 if { [istarget avr-*-*]
486 || [istarget msp430-*-*]
487 || [istarget nvptx-*-*]
488 || [istarget hppa2.0w-hp-hpux11.23]
489 || [istarget hppa64-hp-hpux11.23] } {
495 # Return 1 if according to target_info struct and explicit target list
496 # target disables -fdelete-null-pointer-checks. Targets should return 0
497 # if they simply default to -fno-delete-null-pointer-checks but obey
498 # -fdelete-null-pointer-checks when passed explicitly (and tests that
499 # depend on this option should do that).
501 proc check_effective_target_keeps_null_pointer_checks { } {
502 if [target_info exists keeps_null_pointer_checks] {
505 if { [istarget avr-*-*] } {
511 # Return true if profiling is supported on the target.
513 proc check_profiling_available { test_what } {
514 global profiling_available_saved
516 verbose "Profiling argument is <$test_what>" 1
518 # These conditions depend on the argument so examine them before
519 # looking at the cache variable.
521 # Tree profiling requires TLS runtime support.
522 if { $test_what == "-fprofile-generate" } {
523 if { ![check_effective_target_tls_runtime] } {
528 # Support for -p on solaris2 relies on mcrt1.o which comes with the
529 # vendor compiler. We cannot reliably predict the directory where the
530 # vendor compiler (and thus mcrt1.o) is installed so we can't
531 # necessarily find mcrt1.o even if we have it.
532 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
536 # We don't yet support profiling for MIPS16.
537 if { [istarget mips*-*-*]
538 && ![check_effective_target_nomips16]
539 && ($test_what == "-p" || $test_what == "-pg") } {
543 # MinGW does not support -p.
544 if { [istarget *-*-mingw*] && $test_what == "-p" } {
548 # cygwin does not support -p.
549 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
553 # uClibc does not have gcrt1.o.
554 if { [check_effective_target_uclibc]
555 && ($test_what == "-p" || $test_what == "-pg") } {
559 # Now examine the cache variable.
560 if {![info exists profiling_available_saved]} {
561 # Some targets don't have any implementation of __bb_init_func or are
562 # missing other needed machinery.
563 if {[istarget aarch64*-*-elf]
564 || [istarget am3*-*-linux*]
565 || [istarget arm*-*-eabi*]
566 || [istarget arm*-*-elf]
567 || [istarget arm*-*-symbianelf*]
568 || [istarget avr-*-*]
569 || [istarget bfin-*-*]
570 || [istarget cris-*-*]
571 || [istarget crisv32-*-*]
572 || [istarget fido-*-elf]
573 || [istarget h8300-*-*]
574 || [istarget lm32-*-*]
575 || [istarget m32c-*-elf]
576 || [istarget m68k-*-elf]
577 || [istarget m68k-*-uclinux*]
578 || [istarget mep-*-elf]
579 || [istarget mips*-*-elf*]
580 || [istarget mmix-*-*]
581 || [istarget mn10300-*-elf*]
582 || [istarget moxie-*-elf*]
583 || [istarget msp430-*-*]
584 || [istarget nds32*-*-elf]
585 || [istarget nios2-*-elf]
586 || [istarget nvptx-*-*]
587 || [istarget powerpc-*-eabi*]
588 || [istarget powerpc-*-elf]
590 || [istarget tic6x-*-elf]
591 || [istarget visium-*-*]
592 || [istarget xstormy16-*]
593 || [istarget xtensa*-*-elf]
594 || [istarget *-*-rtems*]
595 || [istarget *-*-vxworks*] } {
596 set profiling_available_saved 0
598 set profiling_available_saved 1
602 # -pg link test result can't be cached since it may change between
604 set profiling_working $profiling_available_saved
605 if { $profiling_available_saved == 1
606 && ![check_no_compiler_messages_nocache profiling executable {
607 int main() { return 0; } } "-pg"] } {
608 set profiling_working 0
611 return $profiling_working
614 # Check to see if a target is "freestanding". This is as per the definition
615 # in Section 4 of C99 standard. Effectively, it is a target which supports no
616 # extra headers or libraries other than what is considered essential.
617 proc check_effective_target_freestanding { } {
618 if { [istarget nvptx-*-*] } {
624 # Return 1 if target has packed layout of structure members by
625 # default, 0 otherwise. Note that this is slightly different than
626 # whether the target has "natural alignment": both attributes may be
629 proc check_effective_target_default_packed { } {
630 return [check_no_compiler_messages default_packed assembly {
631 struct x { char a; long b; } c;
632 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
636 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
637 # documentation, where the test also comes from.
639 proc check_effective_target_pcc_bitfield_type_matters { } {
640 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
641 # bitfields, but let's stick to the example code from the docs.
642 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
643 struct foo1 { char x; char :0; char y; };
644 struct foo2 { char x; int :0; char y; };
645 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
649 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
651 proc add_options_for_tls { flags } {
652 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
653 # libthread, so always pass -pthread for native TLS. Same for AIX.
654 # Need to duplicate native TLS check from
655 # check_effective_target_tls_native to avoid recursion.
656 if { ([istarget powerpc-ibm-aix*]) &&
657 [check_no_messages_and_pattern tls_native "!emutls" assembly {
659 int f (void) { return i; }
660 void g (int j) { i = j; }
662 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
667 # Return 1 if indirect jumps are supported, 0 otherwise.
669 proc check_effective_target_indirect_jumps {} {
670 if { [istarget nvptx-*-*] } {
676 # Return 1 if nonlocal goto is supported, 0 otherwise.
678 proc check_effective_target_nonlocal_goto {} {
679 if { [istarget nvptx-*-*] } {
685 # Return 1 if global constructors are supported, 0 otherwise.
687 proc check_effective_target_global_constructor {} {
688 if { [istarget nvptx-*-*] } {
694 # Return 1 if taking label values is supported, 0 otherwise.
696 proc check_effective_target_label_values {} {
697 if { [istarget nvptx-*-*] } {
700 return [check_no_compiler_messages label_values assembly {
701 #ifdef NO_LABEL_VALUES
707 # Return 1 if builtin_return_address and builtin_frame_address are
708 # supported, 0 otherwise.
710 proc check_effective_target_return_address {} {
711 if { [istarget nvptx-*-*] } {
717 # Return 1 if the assembler does not verify function types against
718 # calls, 0 otherwise. Such verification will typically show up problems
719 # with K&R C function declarations.
721 proc check_effective_target_untyped_assembly {} {
722 if { [istarget nvptx-*-*] } {
728 # Return 1 if alloca is supported, 0 otherwise.
730 proc check_effective_target_alloca {} {
731 if { [istarget nvptx-*-*] } {
737 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
739 proc check_effective_target_tls {} {
740 return [check_no_compiler_messages tls assembly {
742 int f (void) { return i; }
743 void g (int j) { i = j; }
747 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
749 proc check_effective_target_tls_native {} {
750 # VxWorks uses emulated TLS machinery, but with non-standard helper
751 # functions, so we fail to automatically detect it.
752 if { [istarget *-*-vxworks*] } {
756 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
758 int f (void) { return i; }
759 void g (int j) { i = j; }
763 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
765 proc check_effective_target_tls_emulated {} {
766 # VxWorks uses emulated TLS machinery, but with non-standard helper
767 # functions, so we fail to automatically detect it.
768 if { [istarget *-*-vxworks*] } {
772 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
774 int f (void) { return i; }
775 void g (int j) { i = j; }
779 # Return 1 if TLS executables can run correctly, 0 otherwise.
781 proc check_effective_target_tls_runtime {} {
782 # The runtime does not have TLS support, but just
783 # running the test below is insufficient to show this.
784 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
787 return [check_runtime tls_runtime {
788 __thread int thr = 0;
789 int main (void) { return thr; }
790 } [add_options_for_tls ""]]
793 # Return 1 if atomic compare-and-swap is supported on 'int'
795 proc check_effective_target_cas_char {} {
796 return [check_no_compiler_messages cas_char assembly {
797 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
803 proc check_effective_target_cas_int {} {
804 return [check_no_compiler_messages cas_int assembly {
805 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
807 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
815 # Return 1 if -ffunction-sections is supported, 0 otherwise.
817 proc check_effective_target_function_sections {} {
818 # Darwin has its own scheme and silently accepts -ffunction-sections.
819 if { [istarget *-*-darwin*] } {
823 return [check_no_compiler_messages functionsections assembly {
825 } "-ffunction-sections"]
828 # Return 1 if instruction scheduling is available, 0 otherwise.
830 proc check_effective_target_scheduling {} {
831 return [check_no_compiler_messages scheduling object {
833 } "-fschedule-insns"]
836 # Return 1 if trapping arithmetic is available, 0 otherwise.
838 proc check_effective_target_trapping {} {
839 return [check_no_compiler_messages trapping object {
840 int add (int a, int b) { return a + b; }
844 # Return 1 if compilation with -fgraphite is error-free for trivial
847 proc check_effective_target_fgraphite {} {
848 return [check_no_compiler_messages fgraphite object {
853 # Return 1 if compilation with -fopenacc is error-free for trivial
856 proc check_effective_target_fopenacc {} {
857 # nvptx can be built with the device-side bits of openacc, but it
858 # does not make sense to test it as an openacc host.
859 if [istarget nvptx-*-*] { return 0 }
861 return [check_no_compiler_messages fopenacc object {
866 # Return 1 if compilation with -fopenmp is error-free for trivial
869 proc check_effective_target_fopenmp {} {
870 # nvptx can be built with the device-side bits of libgomp, but it
871 # does not make sense to test it as an openmp host.
872 if [istarget nvptx-*-*] { return 0 }
874 return [check_no_compiler_messages fopenmp object {
879 # Return 1 if compilation with -fgnu-tm is error-free for trivial
882 proc check_effective_target_fgnu_tm {} {
883 return [check_no_compiler_messages fgnu_tm object {
888 # Return 1 if the target supports mmap, 0 otherwise.
890 proc check_effective_target_mmap {} {
891 return [check_function_available "mmap"]
894 # Return 1 if the target supports dlopen, 0 otherwise.
895 proc check_effective_target_dlopen {} {
896 return [check_no_compiler_messages dlopen executable {
898 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
899 } [add_options_for_dlopen ""]]
902 proc add_options_for_dlopen { flags } {
906 # Return 1 if the target supports clone, 0 otherwise.
907 proc check_effective_target_clone {} {
908 return [check_function_available "clone"]
911 # Return 1 if the target supports setrlimit, 0 otherwise.
912 proc check_effective_target_setrlimit {} {
913 # Darwin has non-posix compliant RLIMIT_AS
914 if { [istarget *-*-darwin*] } {
917 return [check_function_available "setrlimit"]
920 # Return 1 if the target supports swapcontext, 0 otherwise.
921 proc check_effective_target_swapcontext {} {
922 return [check_no_compiler_messages swapcontext executable {
923 #include <ucontext.h>
926 ucontext_t orig_context,child_context;
927 if (swapcontext(&child_context, &orig_context) < 0) { }
932 # Return 1 if compilation with -pthread is error-free for trivial
935 proc check_effective_target_pthread {} {
936 return [check_no_compiler_messages pthread object {
941 # Return 1 if compilation with -mpe-aligned-commons is error-free
942 # for trivial code, 0 otherwise.
944 proc check_effective_target_pe_aligned_commons {} {
945 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
946 return [check_no_compiler_messages pe_aligned_commons object {
948 } "-mpe-aligned-commons"]
953 # Return 1 if the target supports -static
954 proc check_effective_target_static {} {
955 return [check_no_compiler_messages static executable {
956 int main (void) { return 0; }
960 # Return 1 if the target supports -fstack-protector
961 proc check_effective_target_fstack_protector {} {
962 return [check_runtime fstack_protector {
963 int main (void) { return 0; }
964 } "-fstack-protector"]
967 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
968 # for trivial code, 0 otherwise.
970 proc check_effective_target_freorder {} {
971 return [check_no_compiler_messages freorder object {
973 } "-freorder-blocks-and-partition"]
976 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
977 # emitted, 0 otherwise. Whether a shared library can actually be built is
978 # out of scope for this test.
980 proc check_effective_target_fpic { } {
981 # Note that M68K has a multilib that supports -fpic but not
982 # -fPIC, so we need to check both. We test with a program that
983 # requires GOT references.
984 foreach arg {fpic fPIC} {
985 if [check_no_compiler_messages $arg object {
986 extern int foo (void); extern int bar;
987 int baz (void) { return foo () + bar; }
995 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
996 # silently. So, we can't rely on above "check_effective_target_fpic" as it
997 # assumes compiler will give warning if -fpic not supported. Here we check
998 # whether binutils supports those new -fpic relocation modifiers, and assume
999 # -fpic is supported if there is binutils support. GCC configuration will
1000 # enable -fpic for AArch64 in this case.
1002 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1003 # memory model -fpic relocation types.
1005 proc check_effective_target_aarch64_small_fpic { } {
1006 if { [istarget aarch64*-*-*] } {
1007 return [check_no_compiler_messages aarch64_small_fpic object {
1008 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1015 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1016 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1017 # in binutils since 2015-03-04 as PR gas/17843.
1019 # This test directive make sure binutils support all features needed by TLS LE
1020 # under -mtls-size=32 on AArch64.
1022 proc check_effective_target_aarch64_tlsle32 { } {
1023 if { [istarget aarch64*-*-*] } {
1024 return [check_no_compiler_messages aarch64_tlsle32 object {
1025 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1032 # Return 1 if -shared is supported, as in no warnings or errors
1033 # emitted, 0 otherwise.
1035 proc check_effective_target_shared { } {
1036 # Note that M68K has a multilib that supports -fpic but not
1037 # -fPIC, so we need to check both. We test with a program that
1038 # requires GOT references.
1039 return [check_no_compiler_messages shared executable {
1040 extern int foo (void); extern int bar;
1041 int baz (void) { return foo () + bar; }
1045 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1047 proc check_effective_target_pie { } {
1048 if { [istarget *-*-darwin\[912\]*]
1049 || [istarget *-*-dragonfly*]
1050 || [istarget *-*-freebsd*]
1051 || [istarget *-*-linux*]
1052 || [istarget *-*-gnu*] } {
1055 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1056 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1057 # errors out if missing, so check for that.
1058 return [check_no_compiler_messages pie executable {
1059 int main (void) { return 0; }
1065 # Return true if the target supports -mpaired-single (as used on MIPS).
1067 proc check_effective_target_mpaired_single { } {
1068 return [check_no_compiler_messages mpaired_single object {
1070 } "-mpaired-single"]
1073 # Return true if the target has access to FPU instructions.
1075 proc check_effective_target_hard_float { } {
1076 if { [istarget mips*-*-*] } {
1077 return [check_no_compiler_messages hard_float assembly {
1078 #if (defined __mips_soft_float || defined __mips16)
1079 #error __mips_soft_float || __mips16
1084 # This proc is actually checking the availabilty of FPU
1085 # support for doubles, so on the RX we must fail if the
1086 # 64-bit double multilib has been selected.
1087 if { [istarget rx-*-*] } {
1089 # return [check_no_compiler_messages hard_float assembly {
1090 #if defined __RX_64_BIT_DOUBLES__
1091 #error __RX_64_BIT_DOUBLES__
1096 # The generic test equates hard_float with "no call for adding doubles".
1097 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1098 double a (double b, double c) { return b + c; }
1102 # Return true if the target is a 64-bit MIPS target.
1104 proc check_effective_target_mips64 { } {
1105 return [check_no_compiler_messages mips64 assembly {
1112 # Return true if the target is a MIPS target that does not produce
1115 proc check_effective_target_nomips16 { } {
1116 return [check_no_compiler_messages nomips16 object {
1120 /* A cheap way of testing for -mflip-mips16. */
1121 void foo (void) { asm ("addiu $20,$20,1"); }
1122 void bar (void) { asm ("addiu $20,$20,1"); }
1127 # Add the options needed for MIPS16 function attributes. At the moment,
1128 # we don't support MIPS16 PIC.
1130 proc add_options_for_mips16_attribute { flags } {
1131 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1134 # Return true if we can force a mode that allows MIPS16 code generation.
1135 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1138 proc check_effective_target_mips16_attribute { } {
1139 return [check_no_compiler_messages mips16_attribute assembly {
1143 #if defined __mips_hard_float \
1144 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1145 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1146 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1148 } [add_options_for_mips16_attribute ""]]
1151 # Return 1 if the target supports long double larger than double when
1152 # using the new ABI, 0 otherwise.
1154 proc check_effective_target_mips_newabi_large_long_double { } {
1155 return [check_no_compiler_messages mips_newabi_large_long_double object {
1156 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1160 # Return true if the target is a MIPS target that has access
1161 # to the LL and SC instructions.
1163 proc check_effective_target_mips_llsc { } {
1164 if { ![istarget mips*-*-*] } {
1167 # Assume that these instructions are always implemented for
1168 # non-elf* targets, via emulation if necessary.
1169 if { ![istarget *-*-elf*] } {
1172 # Otherwise assume LL/SC support for everything but MIPS I.
1173 return [check_no_compiler_messages mips_llsc assembly {
1180 # Return true if the target is a MIPS target that uses in-place relocations.
1182 proc check_effective_target_mips_rel { } {
1183 if { ![istarget mips*-*-*] } {
1186 return [check_no_compiler_messages mips_rel object {
1187 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1188 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1189 #error _ABIN32 && (_ABIN32 || _ABI64)
1194 # Return true if the target is a MIPS target that uses the EABI.
1196 proc check_effective_target_mips_eabi { } {
1197 if { ![istarget mips*-*-*] } {
1200 return [check_no_compiler_messages mips_eabi object {
1207 # Return 1 if the current multilib does not generate PIC by default.
1209 proc check_effective_target_nonpic { } {
1210 return [check_no_compiler_messages nonpic assembly {
1217 # Return 1 if the current multilib generates PIE by default.
1219 proc check_effective_target_pie_enabled { } {
1220 return [check_no_compiler_messages pie_enabled assembly {
1227 # Return 1 if the target generates -fstack-protector by default.
1229 proc check_effective_target_fstack_protector_enabled {} {
1230 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1231 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1232 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1238 # Return 1 if the target does not use a status wrapper.
1240 proc check_effective_target_unwrapped { } {
1241 if { [target_info needs_status_wrapper] != "" \
1242 && [target_info needs_status_wrapper] != "0" } {
1248 # Return true if iconv is supported on the target. In particular IBM1047.
1250 proc check_iconv_available { test_what } {
1253 # If the tool configuration file has not set libiconv, try "-liconv"
1254 if { ![info exists libiconv] } {
1255 set libiconv "-liconv"
1257 set test_what [lindex $test_what 1]
1258 return [check_runtime_nocache $test_what [subst {
1264 cd = iconv_open ("$test_what", "UTF-8");
1265 if (cd == (iconv_t) -1)
1272 # Return true if Cilk Library is supported on the target.
1273 proc check_libcilkrts_available { } {
1274 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1278 int __cilkrts_set_param (const char *, const char *);
1280 int x = __cilkrts_set_param ("nworkers", "0");
1283 } "-fcilkplus -lcilkrts" ]
1286 # Return true if the atomic library is supported on the target.
1287 proc check_effective_target_libatomic_available { } {
1288 return [check_no_compiler_messages libatomic_available executable {
1289 int main (void) { return 0; }
1293 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1295 proc check_ascii_locale_available { } {
1299 # Return true if named sections are supported on this target.
1301 proc check_named_sections_available { } {
1302 return [check_no_compiler_messages named_sections assembly {
1303 int __attribute__ ((section("whatever"))) foo;
1307 # Return true if the "naked" function attribute is supported on this target.
1309 proc check_effective_target_naked_functions { } {
1310 return [check_no_compiler_messages naked_functions assembly {
1311 void f() __attribute__((naked));
1315 # Return 1 if the target supports Fortran real kinds larger than real(8),
1318 # When the target name changes, replace the cached result.
1320 proc check_effective_target_fortran_large_real { } {
1321 return [check_no_compiler_messages fortran_large_real executable {
1323 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1330 # Return 1 if the target supports Fortran real kind real(16),
1331 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1332 # this checks for Real(16) only; the other returned real(10) if
1333 # both real(10) and real(16) are available.
1335 # When the target name changes, replace the cached result.
1337 proc check_effective_target_fortran_real_16 { } {
1338 return [check_no_compiler_messages fortran_real_16 executable {
1347 # Return 1 if the target supports Fortran's IEEE modules,
1350 # When the target name changes, replace the cached result.
1352 proc check_effective_target_fortran_ieee { flags } {
1353 return [check_no_compiler_messages fortran_ieee executable {
1355 use, intrinsic :: ieee_features
1361 # Return 1 if the target supports SQRT for the largest floating-point
1362 # type. (Some targets lack the libm support for this FP type.)
1363 # On most targets, this check effectively checks either whether sqrtl is
1364 # available or on __float128 systems whether libquadmath is installed,
1365 # which provides sqrtq.
1367 # When the target name changes, replace the cached result.
1369 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1370 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1372 use iso_fortran_env, only: real_kinds
1373 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1374 real(kind=maxFP), volatile :: x
1382 # Return 1 if the target supports Fortran integer kinds larger than
1383 # integer(8), 0 otherwise.
1385 # When the target name changes, replace the cached result.
1387 proc check_effective_target_fortran_large_int { } {
1388 return [check_no_compiler_messages fortran_large_int executable {
1390 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1391 integer(kind=k) :: i
1396 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1398 # When the target name changes, replace the cached result.
1400 proc check_effective_target_fortran_integer_16 { } {
1401 return [check_no_compiler_messages fortran_integer_16 executable {
1408 # Return 1 if we can statically link libgfortran, 0 otherwise.
1410 # When the target name changes, replace the cached result.
1412 proc check_effective_target_static_libgfortran { } {
1413 return [check_no_compiler_messages static_libgfortran executable {
1420 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1422 proc check_effective_target_cilkplus { } {
1423 # Skip cilk-plus tests on int16 and size16 targets for now.
1424 # The cilk-plus tests are not generic enough to cover these
1425 # cases and would throw hundreds of FAILs.
1426 if { [check_effective_target_int16]
1427 || ![check_effective_target_size32plus] } {
1431 # Skip AVR, its RAM is too small and too many tests would fail.
1432 if { [istarget avr-*-*] } {
1438 proc check_linker_plugin_available { } {
1439 return [check_no_compiler_messages_nocache linker_plugin executable {
1440 int main() { return 0; }
1441 } "-flto -fuse-linker-plugin"]
1444 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1445 # otherwise. Cache the result.
1447 proc check_750cl_hw_available { } {
1448 return [check_cached_effective_target 750cl_hw_available {
1449 # If this is not the right target then we can skip the test.
1450 if { ![istarget powerpc-*paired*] } {
1453 check_runtime_nocache 750cl_hw_available {
1457 asm volatile ("ps_mul v0,v0,v0");
1459 asm volatile ("ps_mul 0,0,0");
1468 # Return 1 if the target OS supports running SSE executables, 0
1469 # otherwise. Cache the result.
1471 proc check_sse_os_support_available { } {
1472 return [check_cached_effective_target sse_os_support_available {
1473 # If this is not the right target then we can skip the test.
1474 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1476 } elseif { [istarget i?86-*-solaris2*] } {
1477 # The Solaris 2 kernel doesn't save and restore SSE registers
1478 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1479 check_runtime_nocache sse_os_support_available {
1482 asm volatile ("movaps %xmm0,%xmm0");
1492 # Return 1 if the target OS supports running AVX executables, 0
1493 # otherwise. Cache the result.
1495 proc check_avx_os_support_available { } {
1496 return [check_cached_effective_target avx_os_support_available {
1497 # If this is not the right target then we can skip the test.
1498 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1501 # Check that OS has AVX and SSE saving enabled.
1502 check_runtime_nocache avx_os_support_available {
1505 unsigned int eax, edx;
1507 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1508 return (eax & 6) != 6;
1515 # Return 1 if the target supports executing SSE instructions, 0
1516 # otherwise. Cache the result.
1518 proc check_sse_hw_available { } {
1519 return [check_cached_effective_target sse_hw_available {
1520 # If this is not the right target then we can skip the test.
1521 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1524 check_runtime_nocache sse_hw_available {
1528 unsigned int eax, ebx, ecx, edx;
1529 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1530 return !(edx & bit_SSE);
1538 # Return 1 if the target supports executing SSE2 instructions, 0
1539 # otherwise. Cache the result.
1541 proc check_sse2_hw_available { } {
1542 return [check_cached_effective_target sse2_hw_available {
1543 # If this is not the right target then we can skip the test.
1544 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1547 check_runtime_nocache sse2_hw_available {
1551 unsigned int eax, ebx, ecx, edx;
1552 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1553 return !(edx & bit_SSE2);
1561 # Return 1 if the target supports executing AVX instructions, 0
1562 # otherwise. Cache the result.
1564 proc check_avx_hw_available { } {
1565 return [check_cached_effective_target avx_hw_available {
1566 # If this is not the right target then we can skip the test.
1567 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1570 check_runtime_nocache avx_hw_available {
1574 unsigned int eax, ebx, ecx, edx;
1575 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1576 return ((ecx & (bit_AVX | bit_OSXSAVE))
1577 != (bit_AVX | bit_OSXSAVE));
1585 # Return 1 if the target supports running SSE executables, 0 otherwise.
1587 proc check_effective_target_sse_runtime { } {
1588 if { [check_effective_target_sse]
1589 && [check_sse_hw_available]
1590 && [check_sse_os_support_available] } {
1596 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1598 proc check_effective_target_sse2_runtime { } {
1599 if { [check_effective_target_sse2]
1600 && [check_sse2_hw_available]
1601 && [check_sse_os_support_available] } {
1607 # Return 1 if the target supports running AVX executables, 0 otherwise.
1609 proc check_effective_target_avx_runtime { } {
1610 if { [check_effective_target_avx]
1611 && [check_avx_hw_available]
1612 && [check_avx_os_support_available] } {
1618 # Return 1 if the target supports executing power8 vector instructions, 0
1619 # otherwise. Cache the result.
1621 proc check_p8vector_hw_available { } {
1622 return [check_cached_effective_target p8vector_hw_available {
1623 # Some simulators are known to not support VSX/power8 instructions.
1624 # For now, disable on Darwin
1625 if { [istarget powerpc-*-eabi]
1626 || [istarget powerpc*-*-eabispe]
1627 || [istarget *-*-darwin*]} {
1630 set options "-mpower8-vector"
1631 check_runtime_nocache p8vector_hw_available {
1635 asm volatile ("xxlorc vs0,vs0,vs0");
1637 asm volatile ("xxlorc 0,0,0");
1646 # Return 1 if the target supports executing power9 vector instructions, 0
1647 # otherwise. Cache the result.
1649 proc check_p9vector_hw_available { } {
1650 return [check_cached_effective_target p9vector_hw_available {
1651 # Some simulators are known to not support VSX/power8/power9
1652 # instructions. For now, disable on Darwin.
1653 if { [istarget powerpc-*-eabi]
1654 || [istarget powerpc*-*-eabispe]
1655 || [istarget *-*-darwin*]} {
1658 set options "-mpower9-vector"
1659 check_runtime_nocache p9vector_hw_available {
1663 vector double v = (vector double) { 0.0, 0.0 };
1664 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1672 # Return 1 if the target supports executing power9 modulo instructions, 0
1673 # otherwise. Cache the result.
1675 proc check_p9modulo_hw_available { } {
1676 return [check_cached_effective_target p9modulo_hw_available {
1677 # Some simulators are known to not support VSX/power8/power9
1678 # instructions. For now, disable on Darwin.
1679 if { [istarget powerpc-*-eabi]
1680 || [istarget powerpc*-*-eabispe]
1681 || [istarget *-*-darwin*]} {
1684 set options "-mmodulo"
1685 check_runtime_nocache p9modulo_hw_available {
1688 int i = 5, j = 3, r = -1;
1689 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1697 # Return 1 if the target supports executing __float128 on PowerPC via software
1698 # emulation, 0 otherwise. Cache the result.
1700 proc check_ppc_float128_sw_available { } {
1701 return [check_cached_effective_target ppc_float128_sw_available {
1702 # Some simulators are known to not support VSX/power8/power9
1703 # instructions. For now, disable on Darwin.
1704 if { [istarget powerpc-*-eabi]
1705 || [istarget powerpc*-*-eabispe]
1706 || [istarget *-*-darwin*]} {
1709 set options "-mfloat128 -mvsx"
1710 check_runtime_nocache ppc_float128_sw_available {
1711 volatile __float128 x = 1.0q;
1712 volatile __float128 y = 2.0q;
1715 __float128 z = x + y;
1723 # Return 1 if the target supports executing __float128 on PowerPC via power9
1724 # hardware instructions, 0 otherwise. Cache the result.
1726 proc check_ppc_float128_hw_available { } {
1727 return [check_cached_effective_target ppc_float128_hw_available {
1728 # Some simulators are known to not support VSX/power8/power9
1729 # instructions. For now, disable on Darwin.
1730 if { [istarget powerpc-*-eabi]
1731 || [istarget powerpc*-*-eabispe]
1732 || [istarget *-*-darwin*]} {
1735 set options "-mfloat128-hardware"
1736 check_runtime_nocache ppc_float128_hw_available {
1737 volatile __float128 x = 1.0q;
1738 volatile __float128 y = 2.0q;
1741 __float128 z = x + y;
1742 __float128 w = -1.0q;
1744 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1745 return ((z == 3.0q) && (z == w);
1752 # Return 1 if the target supports executing VSX instructions, 0
1753 # otherwise. Cache the result.
1755 proc check_vsx_hw_available { } {
1756 return [check_cached_effective_target vsx_hw_available {
1757 # Some simulators are known to not support VSX instructions.
1758 # For now, disable on Darwin
1759 if { [istarget powerpc-*-eabi]
1760 || [istarget powerpc*-*-eabispe]
1761 || [istarget *-*-darwin*]} {
1765 check_runtime_nocache vsx_hw_available {
1769 asm volatile ("xxlor vs0,vs0,vs0");
1771 asm volatile ("xxlor 0,0,0");
1780 # Return 1 if the target supports executing AltiVec instructions, 0
1781 # otherwise. Cache the result.
1783 proc check_vmx_hw_available { } {
1784 return [check_cached_effective_target vmx_hw_available {
1785 # Some simulators are known to not support VMX instructions.
1786 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1789 # Most targets don't require special flags for this test case, but
1790 # Darwin does. Just to be sure, make sure VSX is not enabled for
1791 # the altivec tests.
1792 if { [istarget *-*-darwin*]
1793 || [istarget *-*-aix*] } {
1794 set options "-maltivec -mno-vsx"
1796 set options "-mno-vsx"
1798 check_runtime_nocache vmx_hw_available {
1802 asm volatile ("vor v0,v0,v0");
1804 asm volatile ("vor 0,0,0");
1813 proc check_ppc_recip_hw_available { } {
1814 return [check_cached_effective_target ppc_recip_hw_available {
1815 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1816 # For now, disable on Darwin
1817 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1820 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1821 check_runtime_nocache ppc_recip_hw_available {
1822 volatile double d_recip, d_rsqrt, d_four = 4.0;
1823 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1826 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1827 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1828 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1829 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1837 # Return 1 if the target supports executing AltiVec and Cell PPU
1838 # instructions, 0 otherwise. Cache the result.
1840 proc check_effective_target_cell_hw { } {
1841 return [check_cached_effective_target cell_hw_available {
1842 # Some simulators are known to not support VMX and PPU instructions.
1843 if { [istarget powerpc-*-eabi*] } {
1846 # Most targets don't require special flags for this test
1847 # case, but Darwin and AIX do.
1848 if { [istarget *-*-darwin*]
1849 || [istarget *-*-aix*] } {
1850 set options "-maltivec -mcpu=cell"
1852 set options "-mcpu=cell"
1854 check_runtime_nocache cell_hw_available {
1858 asm volatile ("vor v0,v0,v0");
1859 asm volatile ("lvlx v0,r0,r0");
1861 asm volatile ("vor 0,0,0");
1862 asm volatile ("lvlx 0,0,0");
1871 # Return 1 if the target supports executing 64-bit instructions, 0
1872 # otherwise. Cache the result.
1874 proc check_effective_target_powerpc64 { } {
1875 global powerpc64_available_saved
1878 if [info exists powerpc64_available_saved] {
1879 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1881 set powerpc64_available_saved 0
1883 # Some simulators are known to not support powerpc64 instructions.
1884 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1885 verbose "check_effective_target_powerpc64 returning 0" 2
1886 return $powerpc64_available_saved
1889 # Set up, compile, and execute a test program containing a 64-bit
1890 # instruction. Include the current process ID in the file
1891 # names to prevent conflicts with invocations for multiple
1896 set f [open $src "w"]
1897 puts $f "int main() {"
1898 puts $f "#ifdef __MACH__"
1899 puts $f " asm volatile (\"extsw r0,r0\");"
1901 puts $f " asm volatile (\"extsw 0,0\");"
1903 puts $f " return 0; }"
1906 set opts "additional_flags=-mcpu=G5"
1908 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1909 set lines [${tool}_target_compile $src $exe executable "$opts"]
1912 if [string match "" $lines] then {
1913 # No error message, compilation succeeded.
1914 set result [${tool}_load "./$exe" "" ""]
1915 set status [lindex $result 0]
1916 remote_file build delete $exe
1917 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1919 if { $status == "pass" } then {
1920 set powerpc64_available_saved 1
1923 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1927 return $powerpc64_available_saved
1930 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1931 # complex float arguments. This affects gfortran tests that call cabsf
1932 # in libm built by an earlier compiler. Return 1 if libm uses the same
1933 # argument passing as the compiler under test, 0 otherwise.
1935 # When the target name changes, replace the cached result.
1937 proc check_effective_target_broken_cplxf_arg { } {
1938 return [check_cached_effective_target broken_cplxf_arg {
1939 # Skip the work for targets known not to be affected.
1940 if { ![istarget powerpc64-*-linux*] } {
1942 } elseif { ![is-effective-target lp64] } {
1945 check_runtime_nocache broken_cplxf_arg {
1946 #include <complex.h>
1947 extern void abort (void);
1948 float fabsf (float);
1949 float cabsf (_Complex float);
1956 if (fabsf (f - 5.0) > 0.0001)
1965 # Return 1 is this is a TI C6X target supporting C67X instructions
1966 proc check_effective_target_ti_c67x { } {
1967 return [check_no_compiler_messages ti_c67x assembly {
1968 #if !defined(_TMS320C6700)
1969 #error !_TMS320C6700
1974 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1975 proc check_effective_target_ti_c64xp { } {
1976 return [check_no_compiler_messages ti_c64xp assembly {
1977 #if !defined(_TMS320C6400_PLUS)
1978 #error !_TMS320C6400_PLUS
1984 proc check_alpha_max_hw_available { } {
1985 return [check_runtime alpha_max_hw_available {
1986 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1990 # Returns true iff the FUNCTION is available on the target system.
1991 # (This is essentially a Tcl implementation of Autoconf's
1994 proc check_function_available { function } {
1995 return [check_no_compiler_messages ${function}_available \
2001 int main () { $function (); }
2005 # Returns true iff "fork" is available on the target system.
2007 proc check_fork_available {} {
2008 return [check_function_available "fork"]
2011 # Returns true iff "mkfifo" is available on the target system.
2013 proc check_mkfifo_available {} {
2014 if { [istarget *-*-cygwin*] } {
2015 # Cygwin has mkfifo, but support is incomplete.
2019 return [check_function_available "mkfifo"]
2022 # Returns true iff "__cxa_atexit" is used on the target system.
2024 proc check_cxa_atexit_available { } {
2025 return [check_cached_effective_target cxa_atexit_available {
2026 if { [istarget hppa*-*-hpux10*] } {
2027 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2029 } elseif { [istarget *-*-vxworks] } {
2030 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2033 check_runtime_nocache cxa_atexit_available {
2036 static unsigned int count;
2053 Y() { f(); count = 2; }
2062 int main() { return 0; }
2068 proc check_effective_target_objc2 { } {
2069 return [check_no_compiler_messages objc2 object {
2078 proc check_effective_target_next_runtime { } {
2079 return [check_no_compiler_messages objc2 object {
2080 #ifdef __NEXT_RUNTIME__
2083 #error !__NEXT_RUNTIME__
2088 # Return 1 if we're generating 32-bit code using default options, 0
2091 proc check_effective_target_ilp32 { } {
2092 return [check_no_compiler_messages ilp32 object {
2093 int dummy[sizeof (int) == 4
2094 && sizeof (void *) == 4
2095 && sizeof (long) == 4 ? 1 : -1];
2099 # Return 1 if we're generating ia32 code using default options, 0
2102 proc check_effective_target_ia32 { } {
2103 return [check_no_compiler_messages ia32 object {
2104 int dummy[sizeof (int) == 4
2105 && sizeof (void *) == 4
2106 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2110 # Return 1 if we're generating x32 code using default options, 0
2113 proc check_effective_target_x32 { } {
2114 return [check_no_compiler_messages x32 object {
2115 int dummy[sizeof (int) == 4
2116 && sizeof (void *) == 4
2117 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2121 # Return 1 if we're generating 32-bit integers using default
2122 # options, 0 otherwise.
2124 proc check_effective_target_int32 { } {
2125 return [check_no_compiler_messages int32 object {
2126 int dummy[sizeof (int) == 4 ? 1 : -1];
2130 # Return 1 if we're generating 32-bit or larger integers using default
2131 # options, 0 otherwise.
2133 proc check_effective_target_int32plus { } {
2134 return [check_no_compiler_messages int32plus object {
2135 int dummy[sizeof (int) >= 4 ? 1 : -1];
2139 # Return 1 if we're generating 32-bit or larger pointers using default
2140 # options, 0 otherwise.
2142 proc check_effective_target_ptr32plus { } {
2143 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2144 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2145 # cannot really hold a 32-bit address, so we always return false here.
2146 if { [istarget msp430-*-*] } {
2150 return [check_no_compiler_messages ptr32plus object {
2151 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2155 # Return 1 if we support 32-bit or larger array and structure sizes
2156 # using default options, 0 otherwise. Avoid false positive on
2157 # targets with 20 or 24 bit address spaces.
2159 proc check_effective_target_size32plus { } {
2160 return [check_no_compiler_messages size32plus object {
2161 char dummy[16777217L];
2165 # Returns 1 if we're generating 16-bit or smaller integers with the
2166 # default options, 0 otherwise.
2168 proc check_effective_target_int16 { } {
2169 return [check_no_compiler_messages int16 object {
2170 int dummy[sizeof (int) < 4 ? 1 : -1];
2174 # Return 1 if we're generating 64-bit code using default options, 0
2177 proc check_effective_target_lp64 { } {
2178 return [check_no_compiler_messages lp64 object {
2179 int dummy[sizeof (int) == 4
2180 && sizeof (void *) == 8
2181 && sizeof (long) == 8 ? 1 : -1];
2185 # Return 1 if we're generating 64-bit code using default llp64 options,
2188 proc check_effective_target_llp64 { } {
2189 return [check_no_compiler_messages llp64 object {
2190 int dummy[sizeof (int) == 4
2191 && sizeof (void *) == 8
2192 && sizeof (long long) == 8
2193 && sizeof (long) == 4 ? 1 : -1];
2197 # Return 1 if long and int have different sizes,
2200 proc check_effective_target_long_neq_int { } {
2201 return [check_no_compiler_messages long_ne_int object {
2202 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2206 # Return 1 if the target supports long double larger than double,
2209 proc check_effective_target_large_long_double { } {
2210 return [check_no_compiler_messages large_long_double object {
2211 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2215 # Return 1 if the target supports double larger than float,
2218 proc check_effective_target_large_double { } {
2219 return [check_no_compiler_messages large_double object {
2220 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2224 # Return 1 if the target supports long double of 128 bits,
2227 proc check_effective_target_longdouble128 { } {
2228 return [check_no_compiler_messages longdouble128 object {
2229 int dummy[sizeof(long double) == 16 ? 1 : -1];
2233 # Return 1 if the target supports double of 64 bits,
2236 proc check_effective_target_double64 { } {
2237 return [check_no_compiler_messages double64 object {
2238 int dummy[sizeof(double) == 8 ? 1 : -1];
2242 # Return 1 if the target supports double of at least 64 bits,
2245 proc check_effective_target_double64plus { } {
2246 return [check_no_compiler_messages double64plus object {
2247 int dummy[sizeof(double) >= 8 ? 1 : -1];
2251 # Return 1 if the target supports 'w' suffix on floating constant
2254 proc check_effective_target_has_w_floating_suffix { } {
2256 if [check_effective_target_c++] {
2257 append opts "-std=gnu++03"
2259 return [check_no_compiler_messages w_fp_suffix object {
2264 # Return 1 if the target supports 'q' suffix on floating constant
2267 proc check_effective_target_has_q_floating_suffix { } {
2269 if [check_effective_target_c++] {
2270 append opts "-std=gnu++03"
2272 return [check_no_compiler_messages q_fp_suffix object {
2276 # Return 1 if the target supports compiling fixed-point,
2279 proc check_effective_target_fixed_point { } {
2280 return [check_no_compiler_messages fixed_point object {
2281 _Sat _Fract x; _Sat _Accum y;
2285 # Return 1 if the target supports compiling decimal floating point,
2288 proc check_effective_target_dfp_nocache { } {
2289 verbose "check_effective_target_dfp_nocache: compiling source" 2
2290 set ret [check_no_compiler_messages_nocache dfp object {
2291 float x __attribute__((mode(DD)));
2293 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2297 proc check_effective_target_dfprt_nocache { } {
2298 return [check_runtime_nocache dfprt {
2299 typedef float d64 __attribute__((mode(DD)));
2300 d64 x = 1.2df, y = 2.3dd, z;
2301 int main () { z = x + y; return 0; }
2305 # Return 1 if the target supports compiling Decimal Floating Point,
2308 # This won't change for different subtargets so cache the result.
2310 proc check_effective_target_dfp { } {
2311 return [check_cached_effective_target dfp {
2312 check_effective_target_dfp_nocache
2316 # Return 1 if the target supports linking and executing Decimal Floating
2317 # Point, 0 otherwise.
2319 # This won't change for different subtargets so cache the result.
2321 proc check_effective_target_dfprt { } {
2322 return [check_cached_effective_target dfprt {
2323 check_effective_target_dfprt_nocache
2327 # Return 1 if the target supports executing DFP hardware instructions,
2328 # 0 otherwise. Cache the result.
2330 proc check_dfp_hw_available { } {
2331 return [check_cached_effective_target dfp_hw_available {
2332 # For now, disable on Darwin
2333 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2336 check_runtime_nocache dfp_hw_available {
2337 volatile _Decimal64 r;
2338 volatile _Decimal64 a = 4.0DD;
2339 volatile _Decimal64 b = 2.0DD;
2342 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2343 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2344 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2345 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2348 } "-mcpu=power6 -mhard-float"
2353 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2355 proc check_effective_target_ucn_nocache { } {
2356 # -std=c99 is only valid for C
2357 if [check_effective_target_c] {
2358 set ucnopts "-std=c99"
2362 verbose "check_effective_target_ucn_nocache: compiling source" 2
2363 set ret [check_no_compiler_messages_nocache ucn object {
2366 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2370 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2372 # This won't change for different subtargets, so cache the result.
2374 proc check_effective_target_ucn { } {
2375 return [check_cached_effective_target ucn {
2376 check_effective_target_ucn_nocache
2380 # Return 1 if the target needs a command line argument to enable a SIMD
2383 proc check_effective_target_vect_cmdline_needed { } {
2384 global et_vect_cmdline_needed_saved
2385 global et_vect_cmdline_needed_target_name
2387 if { ![info exists et_vect_cmdline_needed_target_name] } {
2388 set et_vect_cmdline_needed_target_name ""
2391 # If the target has changed since we set the cached value, clear it.
2392 set current_target [current_target_name]
2393 if { $current_target != $et_vect_cmdline_needed_target_name } {
2394 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2395 set et_vect_cmdline_needed_target_name $current_target
2396 if { [info exists et_vect_cmdline_needed_saved] } {
2397 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2398 unset et_vect_cmdline_needed_saved
2402 if [info exists et_vect_cmdline_needed_saved] {
2403 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2405 set et_vect_cmdline_needed_saved 1
2406 if { [istarget alpha*-*-*]
2407 || [istarget ia64-*-*]
2408 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2409 && ([check_effective_target_x32]
2410 || [check_effective_target_lp64]))
2411 || ([istarget powerpc*-*-*]
2412 && ([check_effective_target_powerpc_spe]
2413 || [check_effective_target_powerpc_altivec]))
2414 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2415 || [istarget spu-*-*]
2416 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2417 || [istarget aarch64*-*-*] } {
2418 set et_vect_cmdline_needed_saved 0
2422 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2423 return $et_vect_cmdline_needed_saved
2426 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2428 # This won't change for different subtargets so cache the result.
2430 proc check_effective_target_vect_int { } {
2431 global et_vect_int_saved
2433 if [info exists et_vect_int_saved] {
2434 verbose "check_effective_target_vect_int: using cached result" 2
2436 set et_vect_int_saved 0
2437 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2438 || ([istarget powerpc*-*-*]
2439 && ![istarget powerpc-*-linux*paired*])
2440 || [istarget spu-*-*]
2441 || [istarget sparc*-*-*]
2442 || [istarget alpha*-*-*]
2443 || [istarget ia64-*-*]
2444 || [istarget aarch64*-*-*]
2445 || [check_effective_target_arm32]
2446 || ([istarget mips*-*-*]
2447 && [check_effective_target_mips_loongson]) } {
2448 set et_vect_int_saved 1
2452 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2453 return $et_vect_int_saved
2456 # Return 1 if the target supports signed int->float conversion
2459 proc check_effective_target_vect_intfloat_cvt { } {
2460 global et_vect_intfloat_cvt_saved
2462 if [info exists et_vect_intfloat_cvt_saved] {
2463 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2465 set et_vect_intfloat_cvt_saved 0
2466 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2467 || ([istarget powerpc*-*-*]
2468 && ![istarget powerpc-*-linux*paired*])
2469 || ([istarget arm*-*-*]
2470 && [check_effective_target_arm_neon_ok])} {
2471 set et_vect_intfloat_cvt_saved 1
2475 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2476 return $et_vect_intfloat_cvt_saved
2479 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2481 proc check_effective_target_int128 { } {
2482 return [check_no_compiler_messages int128 object {
2484 #ifndef __SIZEOF_INT128__
2493 # Return 1 if the target supports unsigned int->float conversion
2496 proc check_effective_target_vect_uintfloat_cvt { } {
2497 global et_vect_uintfloat_cvt_saved
2499 if [info exists et_vect_uintfloat_cvt_saved] {
2500 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2502 set et_vect_uintfloat_cvt_saved 0
2503 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2504 || ([istarget powerpc*-*-*]
2505 && ![istarget powerpc-*-linux*paired*])
2506 || [istarget aarch64*-*-*]
2507 || ([istarget arm*-*-*]
2508 && [check_effective_target_arm_neon_ok])} {
2509 set et_vect_uintfloat_cvt_saved 1
2513 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2514 return $et_vect_uintfloat_cvt_saved
2518 # Return 1 if the target supports signed float->int conversion
2521 proc check_effective_target_vect_floatint_cvt { } {
2522 global et_vect_floatint_cvt_saved
2524 if [info exists et_vect_floatint_cvt_saved] {
2525 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2527 set et_vect_floatint_cvt_saved 0
2528 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2529 || ([istarget powerpc*-*-*]
2530 && ![istarget powerpc-*-linux*paired*])
2531 || ([istarget arm*-*-*]
2532 && [check_effective_target_arm_neon_ok])} {
2533 set et_vect_floatint_cvt_saved 1
2537 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2538 return $et_vect_floatint_cvt_saved
2541 # Return 1 if the target supports unsigned float->int conversion
2544 proc check_effective_target_vect_floatuint_cvt { } {
2545 global et_vect_floatuint_cvt_saved
2547 if [info exists et_vect_floatuint_cvt_saved] {
2548 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2550 set et_vect_floatuint_cvt_saved 0
2551 if { ([istarget powerpc*-*-*]
2552 && ![istarget powerpc-*-linux*paired*])
2553 || ([istarget arm*-*-*]
2554 && [check_effective_target_arm_neon_ok])} {
2555 set et_vect_floatuint_cvt_saved 1
2559 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2560 return $et_vect_floatuint_cvt_saved
2563 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2565 # This won't change for different subtargets so cache the result.
2567 proc check_effective_target_vect_simd_clones { } {
2568 global et_vect_simd_clones_saved
2570 if [info exists et_vect_simd_clones_saved] {
2571 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2573 set et_vect_simd_clones_saved 0
2574 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2575 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2576 # avx2 clone. Only the right clone for the specified arch will be
2577 # chosen, but still we need to at least be able to assemble
2579 if { [check_effective_target_avx2] } {
2580 set et_vect_simd_clones_saved 1
2585 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2586 return $et_vect_simd_clones_saved
2589 # Return 1 if this is a AArch64 target supporting big endian
2590 proc check_effective_target_aarch64_big_endian { } {
2591 return [check_no_compiler_messages aarch64_big_endian assembly {
2592 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2593 #error !__aarch64__ || !__AARCH64EB__
2598 # Return 1 if this is a AArch64 target supporting little endian
2599 proc check_effective_target_aarch64_little_endian { } {
2600 if { ![istarget aarch64*-*-*] } {
2604 return [check_no_compiler_messages aarch64_little_endian assembly {
2605 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2611 # Return 1 if this is an arm target using 32-bit instructions
2612 proc check_effective_target_arm32 { } {
2613 if { ![istarget arm*-*-*] } {
2617 return [check_no_compiler_messages arm32 assembly {
2618 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2619 #error !__arm || __thumb__ && !__thumb2__
2624 # Return 1 if this is an arm target not using Thumb
2625 proc check_effective_target_arm_nothumb { } {
2626 if { ![istarget arm*-*-*] } {
2630 return [check_no_compiler_messages arm_nothumb assembly {
2631 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2632 #error !__arm__ || __thumb || __thumb2__
2637 # Return 1 if this is a little-endian ARM target
2638 proc check_effective_target_arm_little_endian { } {
2639 if { ![istarget arm*-*-*] } {
2643 return [check_no_compiler_messages arm_little_endian assembly {
2644 #if !defined(__arm__) || !defined(__ARMEL__)
2645 #error !__arm__ || !__ARMEL__
2650 # Return 1 if this is an ARM target that only supports aligned vector accesses
2651 proc check_effective_target_arm_vect_no_misalign { } {
2652 if { ![istarget arm*-*-*] } {
2656 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2657 #if !defined(__arm__) \
2658 || (defined(__ARM_FEATURE_UNALIGNED) \
2659 && defined(__ARMEL__))
2660 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2666 # Return 1 if this is an ARM target supporting -mfpu=vfp
2667 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2670 proc check_effective_target_arm_vfp_ok { } {
2671 if { [check_effective_target_arm32] } {
2672 return [check_no_compiler_messages arm_vfp_ok object {
2674 } "-mfpu=vfp -mfloat-abi=softfp"]
2680 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2681 # -mfloat-abi=softfp.
2683 proc check_effective_target_arm_vfp3_ok { } {
2684 if { [check_effective_target_arm32] } {
2685 return [check_no_compiler_messages arm_vfp3_ok object {
2687 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2693 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2694 # -mfloat-abi=softfp.
2695 proc check_effective_target_arm_v8_vfp_ok {} {
2696 if { [check_effective_target_arm32] } {
2697 return [check_no_compiler_messages arm_v8_vfp_ok object {
2700 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2703 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2709 # Return 1 if this is an ARM target supporting -mfpu=vfp
2710 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2713 proc check_effective_target_arm_hard_vfp_ok { } {
2714 if { [check_effective_target_arm32]
2715 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2716 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2717 int main() { return 0;}
2718 } "-mfpu=vfp -mfloat-abi=hard"]
2724 # Return 1 if this is an ARM target that supports DSP multiply with
2725 # current multilib flags.
2727 proc check_effective_target_arm_dsp { } {
2728 return [check_no_compiler_messages arm_dsp assembly {
2729 #ifndef __ARM_FEATURE_DSP
2736 # Return 1 if this is an ARM target that supports unaligned word/halfword
2737 # load/store instructions.
2739 proc check_effective_target_arm_unaligned { } {
2740 return [check_no_compiler_messages arm_unaligned assembly {
2741 #ifndef __ARM_FEATURE_UNALIGNED
2742 #error no unaligned support
2748 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2749 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2750 # incompatible with these options. Also set et_arm_crypto_flags to the
2751 # best options to add.
2753 proc check_effective_target_arm_crypto_ok_nocache { } {
2754 global et_arm_crypto_flags
2755 set et_arm_crypto_flags ""
2756 if { [check_effective_target_arm32] } {
2757 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2758 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2759 #include "arm_neon.h"
2761 foo (uint8x16_t a, uint8x16_t b)
2763 return vaeseq_u8 (a, b);
2766 set et_arm_crypto_flags $flags
2775 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2777 proc check_effective_target_arm_crypto_ok { } {
2778 return [check_cached_effective_target arm_crypto_ok \
2779 check_effective_target_arm_crypto_ok_nocache]
2782 # Add options for crypto extensions.
2783 proc add_options_for_arm_crypto { flags } {
2784 if { ! [check_effective_target_arm_crypto_ok] } {
2787 global et_arm_crypto_flags
2788 return "$flags $et_arm_crypto_flags"
2791 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2792 # or -mfloat-abi=hard, but if one is already specified by the
2793 # multilib, use it. Similarly, if a -mfpu option already enables
2794 # NEON, do not add -mfpu=neon.
2796 proc add_options_for_arm_neon { flags } {
2797 if { ! [check_effective_target_arm_neon_ok] } {
2800 global et_arm_neon_flags
2801 return "$flags $et_arm_neon_flags"
2804 proc add_options_for_arm_v8_vfp { flags } {
2805 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2808 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2811 proc add_options_for_arm_v8_neon { flags } {
2812 if { ! [check_effective_target_arm_v8_neon_ok] } {
2815 global et_arm_v8_neon_flags
2816 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2819 proc add_options_for_arm_crc { flags } {
2820 if { ! [check_effective_target_arm_crc_ok] } {
2823 global et_arm_crc_flags
2824 return "$flags $et_arm_crc_flags"
2827 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2828 # or -mfloat-abi=hard, but if one is already specified by the
2829 # multilib, use it. Similarly, if a -mfpu option already enables
2830 # NEON, do not add -mfpu=neon.
2832 proc add_options_for_arm_neonv2 { flags } {
2833 if { ! [check_effective_target_arm_neonv2_ok] } {
2836 global et_arm_neonv2_flags
2837 return "$flags $et_arm_neonv2_flags"
2840 # Add the options needed for vfp3.
2841 proc add_options_for_arm_vfp3 { flags } {
2842 if { ! [check_effective_target_arm_vfp3_ok] } {
2845 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2848 # Return 1 if this is an ARM target supporting -mfpu=neon
2849 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2850 # incompatible with these options. Also set et_arm_neon_flags to the
2851 # best options to add.
2853 proc check_effective_target_arm_neon_ok_nocache { } {
2854 global et_arm_neon_flags
2855 set et_arm_neon_flags ""
2856 if { [check_effective_target_arm32] } {
2857 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2858 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2860 #ifndef __ARM_NEON__
2863 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
2864 configured for -mcpu=arm926ej-s, for example. */
2865 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
2866 #error Architecture does not support NEON.
2869 set et_arm_neon_flags $flags
2878 proc check_effective_target_arm_neon_ok { } {
2879 return [check_cached_effective_target arm_neon_ok \
2880 check_effective_target_arm_neon_ok_nocache]
2883 proc check_effective_target_arm_crc_ok_nocache { } {
2884 global et_arm_crc_flags
2885 set et_arm_crc_flags "-march=armv8-a+crc"
2886 return [check_no_compiler_messages_nocache arm_crc_ok object {
2887 #if !defined (__ARM_FEATURE_CRC32)
2890 } "$et_arm_crc_flags"]
2893 proc check_effective_target_arm_crc_ok { } {
2894 return [check_cached_effective_target arm_crc_ok \
2895 check_effective_target_arm_crc_ok_nocache]
2898 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2899 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2900 # incompatible with these options. Also set et_arm_neon_flags to the
2901 # best options to add.
2903 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2904 global et_arm_neon_fp16_flags
2905 set et_arm_neon_fp16_flags ""
2906 if { [check_effective_target_arm32] } {
2907 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2908 "-mfpu=neon-fp16 -mfloat-abi=softfp"
2909 "-mfp16-format=ieee"
2910 "-mfloat-abi=softfp -mfp16-format=ieee"
2911 "-mfpu=neon-fp16 -mfp16-format=ieee"
2912 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
2913 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2914 #include "arm_neon.h"
2916 foo (float32x4_t arg)
2918 return vcvt_f16_f32 (arg);
2921 set et_arm_neon_fp16_flags $flags
2930 proc check_effective_target_arm_neon_fp16_ok { } {
2931 return [check_cached_effective_target arm_neon_fp16_ok \
2932 check_effective_target_arm_neon_fp16_ok_nocache]
2935 proc check_effective_target_arm_neon_fp16_hw { } {
2936 if {! [check_effective_target_arm_neon_fp16_ok] } {
2939 global et_arm_neon_fp16_flags
2940 check_runtime_nocache arm_neon_fp16_hw {
2942 main (int argc, char **argv)
2944 asm ("vcvt.f32.f16 q1, d0");
2947 } $et_arm_neon_fp16_flags
2950 proc add_options_for_arm_neon_fp16 { flags } {
2951 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2954 global et_arm_neon_fp16_flags
2955 return "$flags $et_arm_neon_fp16_flags"
2958 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2959 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2960 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2961 # best options to add.
2963 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2964 global et_arm_v8_neon_flags
2965 set et_arm_v8_neon_flags ""
2966 if { [check_effective_target_arm32] } {
2967 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2968 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2970 #error not armv8 or later
2972 #include "arm_neon.h"
2976 __asm__ volatile ("vrintn.f32 q0, q0");
2978 } "$flags -march=armv8-a"] } {
2979 set et_arm_v8_neon_flags $flags
2988 proc check_effective_target_arm_v8_neon_ok { } {
2989 return [check_cached_effective_target arm_v8_neon_ok \
2990 check_effective_target_arm_v8_neon_ok_nocache]
2993 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2994 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2995 # incompatible with these options. Also set et_arm_neonv2_flags to the
2996 # best options to add.
2998 proc check_effective_target_arm_neonv2_ok_nocache { } {
2999 global et_arm_neonv2_flags
3000 set et_arm_neonv2_flags ""
3001 if { [check_effective_target_arm32] } {
3002 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3003 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3004 #include "arm_neon.h"
3006 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3008 return vfma_f32 (a, b, c);
3011 set et_arm_neonv2_flags $flags
3020 proc check_effective_target_arm_neonv2_ok { } {
3021 return [check_cached_effective_target arm_neonv2_ok \
3022 check_effective_target_arm_neonv2_ok_nocache]
3025 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3026 # or -mfloat-abi=hard, but if one is already specified by the
3029 proc add_options_for_arm_fp16 { flags } {
3030 if { ! [check_effective_target_arm_fp16_ok] } {
3033 global et_arm_fp16_flags
3034 return "$flags $et_arm_fp16_flags"
3037 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3038 # Skip multilibs that are incompatible with these options and set
3039 # et_arm_fp16_flags to the best options to add.
3041 proc check_effective_target_arm_fp16_ok_nocache { } {
3042 global et_arm_fp16_flags
3043 set et_arm_fp16_flags ""
3044 if { ! [check_effective_target_arm32] } {
3047 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
3048 # Multilib flags would override -mfpu.
3051 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3052 # Must generate floating-point instructions.
3055 if [check_effective_target_arm_hf_eabi] {
3056 # Use existing float-abi and force an fpu which supports fp16
3057 set et_arm_fp16_flags "-mfpu=vfpv4"
3060 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3061 # The existing -mfpu value is OK; use it, but add softfp.
3062 set et_arm_fp16_flags "-mfloat-abi=softfp"
3065 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3066 # macro to check for this support.
3067 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3068 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3071 set et_arm_fp16_flags "$flags"
3078 proc check_effective_target_arm_fp16_ok { } {
3079 return [check_cached_effective_target arm_fp16_ok \
3080 check_effective_target_arm_fp16_ok_nocache]
3083 # Creates a series of routines that return 1 if the given architecture
3084 # can be selected and a routine to give the flags to select that architecture
3085 # Note: Extra flags may be added to disable options from newer compilers
3086 # (Thumb in particular - but others may be added in the future)
3087 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3088 # /* { dg-add-options arm_arch_v5 } */
3089 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3090 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
3091 v4t "-march=armv4t" __ARM_ARCH_4T__
3092 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3093 v5t "-march=armv5t" __ARM_ARCH_5T__
3094 v5te "-march=armv5te" __ARM_ARCH_5TE__
3095 v6 "-march=armv6" __ARM_ARCH_6__
3096 v6k "-march=armv6k" __ARM_ARCH_6K__
3097 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3098 v6z "-march=armv6z" __ARM_ARCH_6Z__
3099 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
3100 v7a "-march=armv7-a" __ARM_ARCH_7A__
3101 v7ve "-march=armv7ve" __ARM_ARCH_7A__
3102 v7r "-march=armv7-r" __ARM_ARCH_7R__
3103 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3104 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3105 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
3106 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3107 proc check_effective_target_arm_arch_FUNC_ok { } {
3108 if { [ string match "*-marm*" "FLAG" ] &&
3109 ![check_effective_target_arm_arm_ok] } {
3112 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3119 proc add_options_for_arm_arch_FUNC { flags } {
3120 return "$flags FLAG"
3123 proc check_effective_target_arm_arch_FUNC_multilib { } {
3124 return [check_runtime arm_arch_FUNC_multilib {
3130 } [add_options_for_arm_arch_FUNC ""]]
3135 # Return 1 if this is an ARM target where -marm causes ARM to be
3138 proc check_effective_target_arm_arm_ok { } {
3139 return [check_no_compiler_messages arm_arm_ok assembly {
3140 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3141 #error !__arm__ || __thumb__ || __thumb2__
3147 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3150 proc check_effective_target_arm_thumb1_ok { } {
3151 return [check_no_compiler_messages arm_thumb1_ok assembly {
3152 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3153 #error !__arm__ || !__thumb__ || __thumb2__
3155 int foo (int i) { return i; }
3159 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3162 proc check_effective_target_arm_thumb2_ok { } {
3163 return [check_no_compiler_messages arm_thumb2_ok assembly {
3164 #if !defined(__thumb2__)
3167 int foo (int i) { return i; }
3171 # Return 1 if this is an ARM target where Thumb-1 is used without options
3172 # added by the test.
3174 proc check_effective_target_arm_thumb1 { } {
3175 return [check_no_compiler_messages arm_thumb1 assembly {
3176 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3177 #error !__arm__ || !__thumb__ || __thumb2__
3183 # Return 1 if this is an ARM target where Thumb-2 is used without options
3184 # added by the test.
3186 proc check_effective_target_arm_thumb2 { } {
3187 return [check_no_compiler_messages arm_thumb2 assembly {
3188 #if !defined(__thumb2__)
3195 # Return 1 if this is an ARM target where conditional execution is available.
3197 proc check_effective_target_arm_cond_exec { } {
3198 return [check_no_compiler_messages arm_cond_exec assembly {
3199 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3206 # Return 1 if this is an ARM cortex-M profile cpu
3208 proc check_effective_target_arm_cortex_m { } {
3209 if { ![istarget arm*-*-*] } {
3212 return [check_no_compiler_messages arm_cortex_m assembly {
3213 #if !defined(__ARM_ARCH_7M__) \
3214 && !defined (__ARM_ARCH_7EM__) \
3215 && !defined (__ARM_ARCH_6M__)
3216 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
3222 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3224 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3225 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3226 int foo (void) { return 0; }
3227 } "-O2 -mprint-tune-info" ]
3230 # Return 1 if the target supports executing NEON instructions, 0
3231 # otherwise. Cache the result.
3233 proc check_effective_target_arm_neon_hw { } {
3234 return [check_runtime arm_neon_hw_available {
3238 long long a = 0, b = 1;
3239 asm ("vorr %P0, %P1, %P2"
3241 : "0" (a), "w" (b));
3244 } [add_options_for_arm_neon ""]]
3247 proc check_effective_target_arm_neonv2_hw { } {
3248 return [check_runtime arm_neon_hwv2_available {
3249 #include "arm_neon.h"
3253 float32x2_t a, b, c;
3254 asm ("vfma.f32 %P0, %P1, %P2"
3256 : "w" (b), "w" (c));
3259 } [add_options_for_arm_neonv2 ""]]
3262 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3265 proc check_effective_target_arm_v8_neon_hw { } {
3266 return [check_runtime arm_v8_neon_hw_available {
3267 #include "arm_neon.h"
3272 asm ("vrinta.f32 %P0, %P1"
3277 } [add_options_for_arm_v8_neon ""]]
3280 # Return 1 if this is a ARM target with NEON enabled.
3282 proc check_effective_target_arm_neon { } {
3283 if { [check_effective_target_arm32] } {
3284 return [check_no_compiler_messages arm_neon object {
3285 #ifndef __ARM_NEON__
3296 proc check_effective_target_arm_neonv2 { } {
3297 if { [check_effective_target_arm32] } {
3298 return [check_no_compiler_messages arm_neon object {
3299 #ifndef __ARM_NEON__
3302 #ifndef __ARM_FEATURE_FMA
3314 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3315 # the Loongson vector modes.
3317 proc check_effective_target_mips_loongson { } {
3318 return [check_no_compiler_messages loongson assembly {
3319 #if !defined(__mips_loongson_vector_rev)
3320 #error !__mips_loongson_vector_rev
3325 # Return 1 if this is a MIPS target that supports the legacy NAN.
3327 proc check_effective_target_mips_nanlegacy { } {
3328 return [check_no_compiler_messages nanlegacy assembly {
3330 int main () { return 0; }
3334 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3337 proc check_effective_target_arm_eabi { } {
3338 return [check_no_compiler_messages arm_eabi object {
3339 #ifndef __ARM_EABI__
3347 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3348 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3350 proc check_effective_target_arm_hf_eabi { } {
3351 return [check_no_compiler_messages arm_hf_eabi object {
3352 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3353 #error not hard-float EABI
3360 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3361 # Some multilibs may be incompatible with this option.
3363 proc check_effective_target_arm_iwmmxt_ok { } {
3364 if { [check_effective_target_arm32] } {
3365 return [check_no_compiler_messages arm_iwmmxt_ok object {
3373 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3374 # for an ARM target.
3375 proc check_effective_target_arm_prefer_ldrd_strd { } {
3376 if { ![check_effective_target_arm32] } {
3380 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3381 void foo (int *p) { p[0] = 1; p[1] = 0;}
3385 # Return 1 if this is a PowerPC target supporting -meabi.
3387 proc check_effective_target_powerpc_eabi_ok { } {
3388 if { [istarget powerpc*-*-*] } {
3389 return [check_no_compiler_messages powerpc_eabi_ok object {
3397 # Return 1 if this is a PowerPC target with floating-point registers.
3399 proc check_effective_target_powerpc_fprs { } {
3400 if { [istarget powerpc*-*-*]
3401 || [istarget rs6000-*-*] } {
3402 return [check_no_compiler_messages powerpc_fprs object {
3414 # Return 1 if this is a PowerPC target with hardware double-precision
3417 proc check_effective_target_powerpc_hard_double { } {
3418 if { [istarget powerpc*-*-*]
3419 || [istarget rs6000-*-*] } {
3420 return [check_no_compiler_messages powerpc_hard_double object {
3432 # Return 1 if this is a PowerPC target supporting -maltivec.
3434 proc check_effective_target_powerpc_altivec_ok { } {
3435 if { ([istarget powerpc*-*-*]
3436 && ![istarget powerpc-*-linux*paired*])
3437 || [istarget rs6000-*-*] } {
3438 # AltiVec is not supported on AIX before 5.3.
3439 if { [istarget powerpc*-*-aix4*]
3440 || [istarget powerpc*-*-aix5.1*]
3441 || [istarget powerpc*-*-aix5.2*] } {
3444 return [check_no_compiler_messages powerpc_altivec_ok object {
3452 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3454 proc check_effective_target_powerpc_p8vector_ok { } {
3455 if { ([istarget powerpc*-*-*]
3456 && ![istarget powerpc-*-linux*paired*])
3457 || [istarget rs6000-*-*] } {
3458 # AltiVec is not supported on AIX before 5.3.
3459 if { [istarget powerpc*-*-aix4*]
3460 || [istarget powerpc*-*-aix5.1*]
3461 || [istarget powerpc*-*-aix5.2*] } {
3464 return [check_no_compiler_messages powerpc_p8vector_ok object {
3467 asm volatile ("xxlorc vs0,vs0,vs0");
3469 asm volatile ("xxlorc 0,0,0");
3473 } "-mpower8-vector"]
3479 # Return 1 if this is a PowerPC target supporting -mpower9-vector
3481 proc check_effective_target_powerpc_p9vector_ok { } {
3482 if { ([istarget powerpc*-*-*]
3483 && ![istarget powerpc-*-linux*paired*])
3484 || [istarget rs6000-*-*] } {
3485 # AltiVec is not supported on AIX before 5.3.
3486 if { [istarget powerpc*-*-aix4*]
3487 || [istarget powerpc*-*-aix5.1*]
3488 || [istarget powerpc*-*-aix5.2*] } {
3491 return [check_no_compiler_messages powerpc_p9vector_ok object {
3494 vector double v = (vector double) { 0.0, 0.0 };
3495 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
3498 } "-mpower9-vector"]
3504 # Return 1 if this is a PowerPC target supporting -mmodulo
3506 proc check_effective_target_powerpc_p9modulo_ok { } {
3507 if { ([istarget powerpc*-*-*]
3508 && ![istarget powerpc-*-linux*paired*])
3509 || [istarget rs6000-*-*] } {
3510 # AltiVec is not supported on AIX before 5.3.
3511 if { [istarget powerpc*-*-aix4*]
3512 || [istarget powerpc*-*-aix5.1*]
3513 || [istarget powerpc*-*-aix5.2*] } {
3516 return [check_no_compiler_messages powerpc_p9modulo_ok object {
3518 int i = 5, j = 3, r = -1;
3519 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
3528 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
3529 # software emulation on power7/power8 systems or hardware support on power9.
3531 proc check_effective_target_powerpc_float128_sw_ok { } {
3532 if { ([istarget powerpc*-*-*]
3533 && ![istarget powerpc-*-linux*paired*])
3534 || [istarget rs6000-*-*] } {
3535 # AltiVec is not supported on AIX before 5.3.
3536 if { [istarget powerpc*-*-aix4*]
3537 || [istarget powerpc*-*-aix5.1*]
3538 || [istarget powerpc*-*-aix5.2*] } {
3541 return [check_no_compiler_messages powerpc_float128_sw_ok object {
3542 volatile __float128 x = 1.0q;
3543 volatile __float128 y = 2.0q;
3545 __float128 z = x + y;
3548 } "-mfloat128 -mvsx"]
3554 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
3555 # support on power9.
3557 proc check_effective_target_powerpc_float128_hw_ok { } {
3558 if { ([istarget powerpc*-*-*]
3559 && ![istarget powerpc-*-linux*paired*])
3560 || [istarget rs6000-*-*] } {
3561 # AltiVec is not supported on AIX before 5.3.
3562 if { [istarget powerpc*-*-aix4*]
3563 || [istarget powerpc*-*-aix5.1*]
3564 || [istarget powerpc*-*-aix5.2*] } {
3567 return [check_no_compiler_messages powerpc_float128_hw_ok object {
3568 volatile __float128 x = 1.0q;
3569 volatile __float128 y = 2.0q;
3572 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
3575 } "-mfloat128-hardware"]
3581 # Return 1 if this is a PowerPC target supporting -mvsx
3583 proc check_effective_target_powerpc_vsx_ok { } {
3584 if { ([istarget powerpc*-*-*]
3585 && ![istarget powerpc-*-linux*paired*])
3586 || [istarget rs6000-*-*] } {
3587 # VSX is not supported on AIX before 7.1.
3588 if { [istarget powerpc*-*-aix4*]
3589 || [istarget powerpc*-*-aix5*]
3590 || [istarget powerpc*-*-aix6*] } {
3593 return [check_no_compiler_messages powerpc_vsx_ok object {
3596 asm volatile ("xxlor vs0,vs0,vs0");
3598 asm volatile ("xxlor 0,0,0");
3608 # Return 1 if this is a PowerPC target supporting -mhtm
3610 proc check_effective_target_powerpc_htm_ok { } {
3611 if { ([istarget powerpc*-*-*]
3612 && ![istarget powerpc-*-linux*paired*])
3613 || [istarget rs6000-*-*] } {
3614 # HTM is not supported on AIX yet.
3615 if { [istarget powerpc*-*-aix*] } {
3618 return [check_no_compiler_messages powerpc_htm_ok object {
3620 asm volatile ("tbegin. 0");
3629 # Return 1 if the target supports executing HTM hardware instructions,
3630 # 0 otherwise. Cache the result.
3632 proc check_htm_hw_available { } {
3633 return [check_cached_effective_target htm_hw_available {
3634 # For now, disable on Darwin
3635 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3638 check_runtime_nocache htm_hw_available {
3648 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3650 proc check_effective_target_powerpc_ppu_ok { } {
3651 if [check_effective_target_powerpc_altivec_ok] {
3652 return [check_no_compiler_messages cell_asm_available object {
3655 asm volatile ("lvlx v0,v0,v0");
3657 asm volatile ("lvlx 0,0,0");
3667 # Return 1 if this is a PowerPC target that supports SPU.
3669 proc check_effective_target_powerpc_spu { } {
3670 if { [istarget powerpc*-*-linux*] } {
3671 return [check_effective_target_powerpc_altivec_ok]
3677 # Return 1 if this is a PowerPC SPE target. The check includes options
3678 # specified by dg-options for this test, so don't cache the result.
3680 proc check_effective_target_powerpc_spe_nocache { } {
3681 if { [istarget powerpc*-*-*] } {
3682 return [check_no_compiler_messages_nocache powerpc_spe object {
3688 } [current_compiler_flags]]
3694 # Return 1 if this is a PowerPC target with SPE enabled.
3696 proc check_effective_target_powerpc_spe { } {
3697 if { [istarget powerpc*-*-*] } {
3698 return [check_no_compiler_messages powerpc_spe object {
3710 # Return 1 if this is a PowerPC target with Altivec enabled.
3712 proc check_effective_target_powerpc_altivec { } {
3713 if { [istarget powerpc*-*-*] } {
3714 return [check_no_compiler_messages powerpc_altivec object {
3726 # Return 1 if this is a PowerPC 405 target. The check includes options
3727 # specified by dg-options for this test, so don't cache the result.
3729 proc check_effective_target_powerpc_405_nocache { } {
3730 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3731 return [check_no_compiler_messages_nocache powerpc_405 object {
3737 } [current_compiler_flags]]
3743 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3745 proc check_effective_target_powerpc_elfv2 { } {
3746 if { [istarget powerpc*-*-*] } {
3747 return [check_no_compiler_messages powerpc_elfv2 object {
3749 #error not ELF v2 ABI
3759 # Return 1 if this is a SPU target with a toolchain that
3760 # supports automatic overlay generation.
3762 proc check_effective_target_spu_auto_overlay { } {
3763 if { [istarget spu*-*-elf*] } {
3764 return [check_no_compiler_messages spu_auto_overlay executable {
3766 } "-Wl,--auto-overlay" ]
3772 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3773 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3774 # test environment appears to run executables on such a simulator.
3776 proc check_effective_target_ultrasparc_hw { } {
3777 return [check_runtime ultrasparc_hw {
3778 int main() { return 0; }
3779 } "-mcpu=ultrasparc"]
3782 # Return 1 if the test environment supports executing UltraSPARC VIS2
3783 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3785 proc check_effective_target_ultrasparc_vis2_hw { } {
3786 return [check_runtime ultrasparc_vis2_hw {
3787 int main() { __asm__(".word 0x81b00320"); return 0; }
3788 } "-mcpu=ultrasparc3"]
3791 # Return 1 if the test environment supports executing UltraSPARC VIS3
3792 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3794 proc check_effective_target_ultrasparc_vis3_hw { } {
3795 return [check_runtime ultrasparc_vis3_hw {
3796 int main() { __asm__(".word 0x81b00220"); return 0; }
3800 # Return 1 if this is a SPARC-V9 target.
3802 proc check_effective_target_sparc_v9 { } {
3803 if { [istarget sparc*-*-*] } {
3804 return [check_no_compiler_messages sparc_v9 object {
3806 asm volatile ("return %i7+8");
3815 # Return 1 if this is a SPARC target with VIS enabled.
3817 proc check_effective_target_sparc_vis { } {
3818 if { [istarget sparc*-*-*] } {
3819 return [check_no_compiler_messages sparc_vis object {
3831 # Return 1 if the target supports hardware vector shift operation.
3833 proc check_effective_target_vect_shift { } {
3834 global et_vect_shift_saved
3836 if [info exists et_vect_shift_saved] {
3837 verbose "check_effective_target_vect_shift: using cached result" 2
3839 set et_vect_shift_saved 0
3840 if { ([istarget powerpc*-*-*]
3841 && ![istarget powerpc-*-linux*paired*])
3842 || [istarget ia64-*-*]
3843 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3844 || [istarget aarch64*-*-*]
3845 || [check_effective_target_arm32]
3846 || ([istarget mips*-*-*]
3847 && [check_effective_target_mips_loongson]) } {
3848 set et_vect_shift_saved 1
3852 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3853 return $et_vect_shift_saved
3856 proc check_effective_target_whole_vector_shift { } {
3857 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3858 || [istarget ia64-*-*]
3859 || [istarget aarch64*-*-*]
3860 || ([check_effective_target_arm32]
3861 && [check_effective_target_arm_little_endian])
3862 || ([istarget mips*-*-*]
3863 && [check_effective_target_mips_loongson]) } {
3869 verbose "check_effective_target_vect_long: returning $answer" 2
3873 # Return 1 if the target supports vector bswap operations.
3875 proc check_effective_target_vect_bswap { } {
3876 global et_vect_bswap_saved
3878 if [info exists et_vect_bswap_saved] {
3879 verbose "check_effective_target_vect_bswap: using cached result" 2
3881 set et_vect_bswap_saved 0
3882 if { [istarget aarch64*-*-*]
3883 || ([istarget arm*-*-*]
3884 && [check_effective_target_arm_neon])
3886 set et_vect_bswap_saved 1
3890 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3891 return $et_vect_bswap_saved
3894 # Return 1 if the target supports hardware vector shift operation for char.
3896 proc check_effective_target_vect_shift_char { } {
3897 global et_vect_shift_char_saved
3899 if [info exists et_vect_shift_char_saved] {
3900 verbose "check_effective_target_vect_shift_char: using cached result" 2
3902 set et_vect_shift_char_saved 0
3903 if { ([istarget powerpc*-*-*]
3904 && ![istarget powerpc-*-linux*paired*])
3905 || [check_effective_target_arm32] } {
3906 set et_vect_shift_char_saved 1
3910 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3911 return $et_vect_shift_char_saved
3914 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3916 # This can change for different subtargets so do not cache the result.
3918 proc check_effective_target_vect_long { } {
3919 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3920 || (([istarget powerpc*-*-*]
3921 && ![istarget powerpc-*-linux*paired*])
3922 && [check_effective_target_ilp32])
3923 || [check_effective_target_arm32]
3924 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3930 verbose "check_effective_target_vect_long: returning $answer" 2
3934 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3936 # This won't change for different subtargets so cache the result.
3938 proc check_effective_target_vect_float { } {
3939 global et_vect_float_saved
3941 if [info exists et_vect_float_saved] {
3942 verbose "check_effective_target_vect_float: using cached result" 2
3944 set et_vect_float_saved 0
3945 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3946 || [istarget powerpc*-*-*]
3947 || [istarget spu-*-*]
3948 || [istarget mips-sde-elf]
3949 || [istarget mipsisa64*-*-*]
3950 || [istarget ia64-*-*]
3951 || [istarget aarch64*-*-*]
3952 || [check_effective_target_arm32] } {
3953 set et_vect_float_saved 1
3957 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
3958 return $et_vect_float_saved
3961 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
3963 # This won't change for different subtargets so cache the result.
3965 proc check_effective_target_vect_double { } {
3966 global et_vect_double_saved
3968 if [info exists et_vect_double_saved] {
3969 verbose "check_effective_target_vect_double: using cached result" 2
3971 set et_vect_double_saved 0
3972 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3973 || [istarget aarch64*-*-*] } {
3974 if { [check_no_compiler_messages vect_double assembly {
3975 #ifdef __tune_atom__
3976 # error No double vectorizer support.
3979 set et_vect_double_saved 1
3981 set et_vect_double_saved 0
3983 } elseif { [istarget spu-*-*] } {
3984 set et_vect_double_saved 1
3985 } elseif { [istarget powerpc*-*-*] && [check_vsx_hw_available] } {
3986 set et_vect_double_saved 1
3990 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3991 return $et_vect_double_saved
3994 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3996 # This won't change for different subtargets so cache the result.
3998 proc check_effective_target_vect_long_long { } {
3999 global et_vect_long_long_saved
4001 if [info exists et_vect_long_long_saved] {
4002 verbose "check_effective_target_vect_long_long: using cached result" 2
4004 set et_vect_long_long_saved 0
4005 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4006 set et_vect_long_long_saved 1
4010 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
4011 return $et_vect_long_long_saved
4015 # Return 1 if the target plus current options does not support a vector
4016 # max instruction on "int", 0 otherwise.
4018 # This won't change for different subtargets so cache the result.
4020 proc check_effective_target_vect_no_int_min_max { } {
4021 global et_vect_no_int_min_max_saved
4023 if [info exists et_vect_no_int_min_max_saved] {
4024 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
4026 set et_vect_no_int_min_max_saved 0
4027 if { [istarget sparc*-*-*]
4028 || [istarget spu-*-*]
4029 || [istarget alpha*-*-*]
4030 || ([istarget mips*-*-*]
4031 && [check_effective_target_mips_loongson]) } {
4032 set et_vect_no_int_min_max_saved 1
4035 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
4036 return $et_vect_no_int_min_max_saved
4039 # Return 1 if the target plus current options does not support a vector
4040 # add instruction on "int", 0 otherwise.
4042 # This won't change for different subtargets so cache the result.
4044 proc check_effective_target_vect_no_int_add { } {
4045 global et_vect_no_int_add_saved
4047 if [info exists et_vect_no_int_add_saved] {
4048 verbose "check_effective_target_vect_no_int_add: using cached result" 2
4050 set et_vect_no_int_add_saved 0
4051 # Alpha only supports vector add on V8QI and V4HI.
4052 if { [istarget alpha*-*-*] } {
4053 set et_vect_no_int_add_saved 1
4056 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
4057 return $et_vect_no_int_add_saved
4060 # Return 1 if the target plus current options does not support vector
4061 # bitwise instructions, 0 otherwise.
4063 # This won't change for different subtargets so cache the result.
4065 proc check_effective_target_vect_no_bitwise { } {
4066 global et_vect_no_bitwise_saved
4068 if [info exists et_vect_no_bitwise_saved] {
4069 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
4071 set et_vect_no_bitwise_saved 0
4073 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
4074 return $et_vect_no_bitwise_saved
4077 # Return 1 if the target plus current options supports vector permutation,
4080 # This won't change for different subtargets so cache the result.
4082 proc check_effective_target_vect_perm { } {
4085 if [info exists et_vect_perm_saved] {
4086 verbose "check_effective_target_vect_perm: using cached result" 2
4088 set et_vect_perm_saved 0
4089 if { [is-effective-target arm_neon_ok]
4090 || [istarget aarch64*-*-*]
4091 || [istarget powerpc*-*-*]
4092 || [istarget spu-*-*]
4093 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4094 || ([istarget mips*-*-*]
4095 && [check_effective_target_mpaired_single]) } {
4096 set et_vect_perm_saved 1
4099 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
4100 return $et_vect_perm_saved
4103 # Return 1 if the target plus current options supports vector permutation
4104 # on byte-sized elements, 0 otherwise.
4106 # This won't change for different subtargets so cache the result.
4108 proc check_effective_target_vect_perm_byte { } {
4109 global et_vect_perm_byte
4111 if [info exists et_vect_perm_byte_saved] {
4112 verbose "check_effective_target_vect_perm_byte: using cached result" 2
4114 set et_vect_perm_byte_saved 0
4115 if { ([is-effective-target arm_neon_ok]
4116 && [is-effective-target arm_little_endian])
4117 || ([istarget aarch64*-*-*]
4118 && [is-effective-target aarch64_little_endian])
4119 || [istarget powerpc*-*-*]
4120 || [istarget spu-*-*] } {
4121 set et_vect_perm_byte_saved 1
4124 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
4125 return $et_vect_perm_byte_saved
4128 # Return 1 if the target plus current options supports vector permutation
4129 # on short-sized elements, 0 otherwise.
4131 # This won't change for different subtargets so cache the result.
4133 proc check_effective_target_vect_perm_short { } {
4134 global et_vect_perm_short
4136 if [info exists et_vect_perm_short_saved] {
4137 verbose "check_effective_target_vect_perm_short: using cached result" 2
4139 set et_vect_perm_short_saved 0
4140 if { ([is-effective-target arm_neon_ok]
4141 && [is-effective-target arm_little_endian])
4142 || ([istarget aarch64*-*-*]
4143 && [is-effective-target aarch64_little_endian])
4144 || [istarget powerpc*-*-*]
4145 || [istarget spu-*-*] } {
4146 set et_vect_perm_short_saved 1
4149 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
4150 return $et_vect_perm_short_saved
4153 # Return 1 if the target plus current options supports a vector
4154 # widening summation of *short* args into *int* result, 0 otherwise.
4156 # This won't change for different subtargets so cache the result.
4158 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
4159 global et_vect_widen_sum_hi_to_si_pattern
4161 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
4162 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
4164 set et_vect_widen_sum_hi_to_si_pattern_saved 0
4165 if { [istarget powerpc*-*-*]
4166 || [istarget aarch64*-*-*]
4167 || [istarget ia64-*-*] } {
4168 set et_vect_widen_sum_hi_to_si_pattern_saved 1
4171 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
4172 return $et_vect_widen_sum_hi_to_si_pattern_saved
4175 # Return 1 if the target plus current options supports a vector
4176 # widening summation of *short* args into *int* result, 0 otherwise.
4177 # A target can also support this widening summation if it can support
4178 # promotion (unpacking) from shorts to ints.
4180 # This won't change for different subtargets so cache the result.
4182 proc check_effective_target_vect_widen_sum_hi_to_si { } {
4183 global et_vect_widen_sum_hi_to_si
4185 if [info exists et_vect_widen_sum_hi_to_si_saved] {
4186 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
4188 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
4189 if { [istarget powerpc*-*-*]
4190 || [istarget ia64-*-*] } {
4191 set et_vect_widen_sum_hi_to_si_saved 1
4194 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
4195 return $et_vect_widen_sum_hi_to_si_saved
4198 # Return 1 if the target plus current options supports a vector
4199 # widening summation of *char* args into *short* result, 0 otherwise.
4200 # A target can also support this widening summation if it can support
4201 # promotion (unpacking) from chars to shorts.
4203 # This won't change for different subtargets so cache the result.
4205 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
4206 global et_vect_widen_sum_qi_to_hi
4208 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
4209 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
4211 set et_vect_widen_sum_qi_to_hi_saved 0
4212 if { [check_effective_target_vect_unpack]
4213 || [check_effective_target_arm_neon_ok]
4214 || [istarget ia64-*-*] } {
4215 set et_vect_widen_sum_qi_to_hi_saved 1
4218 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
4219 return $et_vect_widen_sum_qi_to_hi_saved
4222 # Return 1 if the target plus current options supports a vector
4223 # widening summation of *char* args into *int* result, 0 otherwise.
4225 # This won't change for different subtargets so cache the result.
4227 proc check_effective_target_vect_widen_sum_qi_to_si { } {
4228 global et_vect_widen_sum_qi_to_si
4230 if [info exists et_vect_widen_sum_qi_to_si_saved] {
4231 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
4233 set et_vect_widen_sum_qi_to_si_saved 0
4234 if { [istarget powerpc*-*-*] } {
4235 set et_vect_widen_sum_qi_to_si_saved 1
4238 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
4239 return $et_vect_widen_sum_qi_to_si_saved
4242 # Return 1 if the target plus current options supports a vector
4243 # widening multiplication of *char* args into *short* result, 0 otherwise.
4244 # A target can also support this widening multplication if it can support
4245 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
4246 # multiplication of shorts).
4248 # This won't change for different subtargets so cache the result.
4251 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
4252 global et_vect_widen_mult_qi_to_hi
4254 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
4255 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
4257 if { [check_effective_target_vect_unpack]
4258 && [check_effective_target_vect_short_mult] } {
4259 set et_vect_widen_mult_qi_to_hi_saved 1
4261 set et_vect_widen_mult_qi_to_hi_saved 0
4263 if { [istarget powerpc*-*-*]
4264 || [istarget aarch64*-*-*]
4265 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4266 set et_vect_widen_mult_qi_to_hi_saved 1
4269 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
4270 return $et_vect_widen_mult_qi_to_hi_saved
4273 # Return 1 if the target plus current options supports a vector
4274 # widening multiplication of *short* args into *int* result, 0 otherwise.
4275 # A target can also support this widening multplication if it can support
4276 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4277 # multiplication of ints).
4279 # This won't change for different subtargets so cache the result.
4282 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4283 global et_vect_widen_mult_hi_to_si
4285 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4286 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4288 if { [check_effective_target_vect_unpack]
4289 && [check_effective_target_vect_int_mult] } {
4290 set et_vect_widen_mult_hi_to_si_saved 1
4292 set et_vect_widen_mult_hi_to_si_saved 0
4294 if { [istarget powerpc*-*-*]
4295 || [istarget spu-*-*]
4296 || [istarget ia64-*-*]
4297 || [istarget aarch64*-*-*]
4298 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4299 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4300 set et_vect_widen_mult_hi_to_si_saved 1
4303 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4304 return $et_vect_widen_mult_hi_to_si_saved
4307 # Return 1 if the target plus current options supports a vector
4308 # widening multiplication of *char* args into *short* result, 0 otherwise.
4310 # This won't change for different subtargets so cache the result.
4312 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4313 global et_vect_widen_mult_qi_to_hi_pattern
4315 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4316 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4318 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4319 if { [istarget powerpc*-*-*]
4320 || ([istarget arm*-*-*]
4321 && [check_effective_target_arm_neon_ok]
4322 && [check_effective_target_arm_little_endian]) } {
4323 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4326 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4327 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4330 # Return 1 if the target plus current options supports a vector
4331 # widening multiplication of *short* args into *int* result, 0 otherwise.
4333 # This won't change for different subtargets so cache the result.
4335 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4336 global et_vect_widen_mult_hi_to_si_pattern
4338 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4339 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4341 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4342 if { [istarget powerpc*-*-*]
4343 || [istarget spu-*-*]
4344 || [istarget ia64-*-*]
4345 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4346 || ([istarget arm*-*-*]
4347 && [check_effective_target_arm_neon_ok]
4348 && [check_effective_target_arm_little_endian]) } {
4349 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4352 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4353 return $et_vect_widen_mult_hi_to_si_pattern_saved
4356 # Return 1 if the target plus current options supports a vector
4357 # widening multiplication of *int* args into *long* result, 0 otherwise.
4359 # This won't change for different subtargets so cache the result.
4361 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4362 global et_vect_widen_mult_si_to_di_pattern
4364 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4365 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4367 set et_vect_widen_mult_si_to_di_pattern_saved 0
4368 if {[istarget ia64-*-*]
4369 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4370 set et_vect_widen_mult_si_to_di_pattern_saved 1
4373 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4374 return $et_vect_widen_mult_si_to_di_pattern_saved
4377 # Return 1 if the target plus current options supports a vector
4378 # widening shift, 0 otherwise.
4380 # This won't change for different subtargets so cache the result.
4382 proc check_effective_target_vect_widen_shift { } {
4383 global et_vect_widen_shift_saved
4385 if [info exists et_vect_shift_saved] {
4386 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4388 set et_vect_widen_shift_saved 0
4389 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4390 set et_vect_widen_shift_saved 1
4393 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4394 return $et_vect_widen_shift_saved
4397 # Return 1 if the target plus current options supports a vector
4398 # dot-product of signed chars, 0 otherwise.
4400 # This won't change for different subtargets so cache the result.
4402 proc check_effective_target_vect_sdot_qi { } {
4403 global et_vect_sdot_qi
4405 if [info exists et_vect_sdot_qi_saved] {
4406 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4408 set et_vect_sdot_qi_saved 0
4409 if { [istarget ia64-*-*] } {
4410 set et_vect_udot_qi_saved 1
4413 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4414 return $et_vect_sdot_qi_saved
4417 # Return 1 if the target plus current options supports a vector
4418 # dot-product of unsigned chars, 0 otherwise.
4420 # This won't change for different subtargets so cache the result.
4422 proc check_effective_target_vect_udot_qi { } {
4423 global et_vect_udot_qi
4425 if [info exists et_vect_udot_qi_saved] {
4426 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4428 set et_vect_udot_qi_saved 0
4429 if { [istarget powerpc*-*-*]
4430 || [istarget ia64-*-*] } {
4431 set et_vect_udot_qi_saved 1
4434 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4435 return $et_vect_udot_qi_saved
4438 # Return 1 if the target plus current options supports a vector
4439 # dot-product of signed shorts, 0 otherwise.
4441 # This won't change for different subtargets so cache the result.
4443 proc check_effective_target_vect_sdot_hi { } {
4444 global et_vect_sdot_hi
4446 if [info exists et_vect_sdot_hi_saved] {
4447 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4449 set et_vect_sdot_hi_saved 0
4450 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4451 || [istarget ia64-*-*]
4452 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4453 set et_vect_sdot_hi_saved 1
4456 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4457 return $et_vect_sdot_hi_saved
4460 # Return 1 if the target plus current options supports a vector
4461 # dot-product of unsigned shorts, 0 otherwise.
4463 # This won't change for different subtargets so cache the result.
4465 proc check_effective_target_vect_udot_hi { } {
4466 global et_vect_udot_hi
4468 if [info exists et_vect_udot_hi_saved] {
4469 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4471 set et_vect_udot_hi_saved 0
4472 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4473 set et_vect_udot_hi_saved 1
4476 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4477 return $et_vect_udot_hi_saved
4480 # Return 1 if the target plus current options supports a vector
4481 # sad operation of unsigned chars, 0 otherwise.
4483 # This won't change for different subtargets so cache the result.
4485 proc check_effective_target_vect_usad_char { } {
4486 global et_vect_usad_char
4488 if [info exists et_vect_usad_char_saved] {
4489 verbose "check_effective_target_vect_usad_char: using cached result" 2
4491 set et_vect_usad_char_saved 0
4492 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4493 set et_vect_usad_char_saved 1
4496 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4497 return $et_vect_usad_char_saved
4500 # Return 1 if the target plus current options supports a vector
4501 # demotion (packing) of shorts (to chars) and ints (to shorts)
4502 # using modulo arithmetic, 0 otherwise.
4504 # This won't change for different subtargets so cache the result.
4506 proc check_effective_target_vect_pack_trunc { } {
4507 global et_vect_pack_trunc
4509 if [info exists et_vect_pack_trunc_saved] {
4510 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4512 set et_vect_pack_trunc_saved 0
4513 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4514 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4515 || [istarget aarch64*-*-*]
4516 || [istarget spu-*-*]
4517 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4518 && [check_effective_target_arm_little_endian]) } {
4519 set et_vect_pack_trunc_saved 1
4522 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4523 return $et_vect_pack_trunc_saved
4526 # Return 1 if the target plus current options supports a vector
4527 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4529 # This won't change for different subtargets so cache the result.
4531 proc check_effective_target_vect_unpack { } {
4532 global et_vect_unpack
4534 if [info exists et_vect_unpack_saved] {
4535 verbose "check_effective_target_vect_unpack: using cached result" 2
4537 set et_vect_unpack_saved 0
4538 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4539 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4540 || [istarget spu-*-*]
4541 || [istarget ia64-*-*]
4542 || [istarget aarch64*-*-*]
4543 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4544 && [check_effective_target_arm_little_endian]) } {
4545 set et_vect_unpack_saved 1
4548 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4549 return $et_vect_unpack_saved
4552 # Return 1 if the target plus current options does not guarantee
4553 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4555 # This won't change for different subtargets so cache the result.
4557 proc check_effective_target_unaligned_stack { } {
4558 global et_unaligned_stack_saved
4560 if [info exists et_unaligned_stack_saved] {
4561 verbose "check_effective_target_unaligned_stack: using cached result" 2
4563 set et_unaligned_stack_saved 0
4565 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4566 return $et_unaligned_stack_saved
4569 # Return 1 if the target plus current options does not support a vector
4570 # alignment mechanism, 0 otherwise.
4572 # This won't change for different subtargets so cache the result.
4574 proc check_effective_target_vect_no_align { } {
4575 global et_vect_no_align_saved
4577 if [info exists et_vect_no_align_saved] {
4578 verbose "check_effective_target_vect_no_align: using cached result" 2
4580 set et_vect_no_align_saved 0
4581 if { [istarget mipsisa64*-*-*]
4582 || [istarget mips-sde-elf]
4583 || [istarget sparc*-*-*]
4584 || [istarget ia64-*-*]
4585 || [check_effective_target_arm_vect_no_misalign]
4586 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4587 || ([istarget mips*-*-*]
4588 && [check_effective_target_mips_loongson]) } {
4589 set et_vect_no_align_saved 1
4592 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4593 return $et_vect_no_align_saved
4596 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4598 # This won't change for different subtargets so cache the result.
4600 proc check_effective_target_vect_hw_misalign { } {
4601 global et_vect_hw_misalign_saved
4603 if [info exists et_vect_hw_misalign_saved] {
4604 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4606 set et_vect_hw_misalign_saved 0
4607 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4608 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4609 || [istarget aarch64*-*-*] } {
4610 set et_vect_hw_misalign_saved 1
4613 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4614 return $et_vect_hw_misalign_saved
4618 # Return 1 if arrays are aligned to the vector alignment
4619 # boundary, 0 otherwise.
4621 # This won't change for different subtargets so cache the result.
4623 proc check_effective_target_vect_aligned_arrays { } {
4624 global et_vect_aligned_arrays
4626 if [info exists et_vect_aligned_arrays_saved] {
4627 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4629 set et_vect_aligned_arrays_saved 0
4630 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4631 if { ([is-effective-target lp64]
4632 && ( ![check_avx_available]
4633 || [check_prefer_avx128])) } {
4634 set et_vect_aligned_arrays_saved 1
4637 if [istarget spu-*-*] {
4638 set et_vect_aligned_arrays_saved 1
4641 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4642 return $et_vect_aligned_arrays_saved
4645 # Return 1 if types of size 32 bit or less are naturally aligned
4646 # (aligned to their type-size), 0 otherwise.
4648 # This won't change for different subtargets so cache the result.
4650 proc check_effective_target_natural_alignment_32 { } {
4651 global et_natural_alignment_32
4653 if [info exists et_natural_alignment_32_saved] {
4654 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4656 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4657 set et_natural_alignment_32_saved 1
4658 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4659 set et_natural_alignment_32_saved 0
4662 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4663 return $et_natural_alignment_32_saved
4666 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4667 # type-size), 0 otherwise.
4669 # This won't change for different subtargets so cache the result.
4671 proc check_effective_target_natural_alignment_64 { } {
4672 global et_natural_alignment_64
4674 if [info exists et_natural_alignment_64_saved] {
4675 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4677 set et_natural_alignment_64_saved 0
4678 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4679 || [istarget spu-*-*] } {
4680 set et_natural_alignment_64_saved 1
4683 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4684 return $et_natural_alignment_64_saved
4687 # Return 1 if all vector types are naturally aligned (aligned to their
4688 # type-size), 0 otherwise.
4690 # This won't change for different subtargets so cache the result.
4692 proc check_effective_target_vect_natural_alignment { } {
4693 global et_vect_natural_alignment
4695 if [info exists et_vect_natural_alignment_saved] {
4696 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4698 set et_vect_natural_alignment_saved 1
4699 if { [check_effective_target_arm_eabi]
4700 || [istarget nvptx-*-*]
4701 || [istarget s390*-*-*] } {
4702 set et_vect_natural_alignment_saved 0
4705 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4706 return $et_vect_natural_alignment_saved
4709 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4711 # This won't change for different subtargets so cache the result.
4713 proc check_effective_target_vector_alignment_reachable { } {
4714 global et_vector_alignment_reachable
4716 if [info exists et_vector_alignment_reachable_saved] {
4717 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4719 if { [check_effective_target_vect_aligned_arrays]
4720 || [check_effective_target_natural_alignment_32] } {
4721 set et_vector_alignment_reachable_saved 1
4723 set et_vector_alignment_reachable_saved 0
4726 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4727 return $et_vector_alignment_reachable_saved
4730 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4732 # This won't change for different subtargets so cache the result.
4734 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4735 global et_vector_alignment_reachable_for_64bit
4737 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4738 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4740 if { [check_effective_target_vect_aligned_arrays]
4741 || [check_effective_target_natural_alignment_64] } {
4742 set et_vector_alignment_reachable_for_64bit_saved 1
4744 set et_vector_alignment_reachable_for_64bit_saved 0
4747 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4748 return $et_vector_alignment_reachable_for_64bit_saved
4751 # Return 1 if the target only requires element alignment for vector accesses
4753 proc check_effective_target_vect_element_align { } {
4754 global et_vect_element_align
4756 if [info exists et_vect_element_align] {
4757 verbose "check_effective_target_vect_element_align: using cached result" 2
4759 set et_vect_element_align 0
4760 if { ([istarget arm*-*-*]
4761 && ![check_effective_target_arm_vect_no_misalign])
4762 || [check_effective_target_vect_hw_misalign] } {
4763 set et_vect_element_align 1
4767 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4768 return $et_vect_element_align
4771 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4773 proc check_effective_target_vect_condition { } {
4774 global et_vect_cond_saved
4776 if [info exists et_vect_cond_saved] {
4777 verbose "check_effective_target_vect_cond: using cached result" 2
4779 set et_vect_cond_saved 0
4780 if { [istarget aarch64*-*-*]
4781 || [istarget powerpc*-*-*]
4782 || [istarget ia64-*-*]
4783 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4784 || [istarget spu-*-*]
4785 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4786 set et_vect_cond_saved 1
4790 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4791 return $et_vect_cond_saved
4794 # Return 1 if the target supports vector conditional operations where
4795 # the comparison has different type from the lhs, 0 otherwise.
4797 proc check_effective_target_vect_cond_mixed { } {
4798 global et_vect_cond_mixed_saved
4800 if [info exists et_vect_cond_mixed_saved] {
4801 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4803 set et_vect_cond_mixed_saved 0
4804 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4805 || [istarget powerpc*-*-*] } {
4806 set et_vect_cond_mixed_saved 1
4810 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4811 return $et_vect_cond_mixed_saved
4814 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4816 proc check_effective_target_vect_char_mult { } {
4817 global et_vect_char_mult_saved
4819 if [info exists et_vect_char_mult_saved] {
4820 verbose "check_effective_target_vect_char_mult: using cached result" 2
4822 set et_vect_char_mult_saved 0
4823 if { [istarget aarch64*-*-*]
4824 || [istarget ia64-*-*]
4825 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4826 || [check_effective_target_arm32]
4827 || [check_effective_target_powerpc_altivec] } {
4828 set et_vect_char_mult_saved 1
4832 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4833 return $et_vect_char_mult_saved
4836 # Return 1 if the target supports vector short multiplication, 0 otherwise.
4838 proc check_effective_target_vect_short_mult { } {
4839 global et_vect_short_mult_saved
4841 if [info exists et_vect_short_mult_saved] {
4842 verbose "check_effective_target_vect_short_mult: using cached result" 2
4844 set et_vect_short_mult_saved 0
4845 if { [istarget ia64-*-*]
4846 || [istarget spu-*-*]
4847 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4848 || [istarget powerpc*-*-*]
4849 || [istarget aarch64*-*-*]
4850 || [check_effective_target_arm32]
4851 || ([istarget mips*-*-*]
4852 && [check_effective_target_mips_loongson]) } {
4853 set et_vect_short_mult_saved 1
4857 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4858 return $et_vect_short_mult_saved
4861 # Return 1 if the target supports vector int multiplication, 0 otherwise.
4863 proc check_effective_target_vect_int_mult { } {
4864 global et_vect_int_mult_saved
4866 if [info exists et_vect_int_mult_saved] {
4867 verbose "check_effective_target_vect_int_mult: using cached result" 2
4869 set et_vect_int_mult_saved 0
4870 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4871 || [istarget spu-*-*]
4872 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4873 || [istarget ia64-*-*]
4874 || [istarget aarch64*-*-*]
4875 || [check_effective_target_arm32] } {
4876 set et_vect_int_mult_saved 1
4880 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4881 return $et_vect_int_mult_saved
4884 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
4886 proc check_effective_target_vect_extract_even_odd { } {
4887 global et_vect_extract_even_odd_saved
4889 if [info exists et_vect_extract_even_odd_saved] {
4890 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
4892 set et_vect_extract_even_odd_saved 0
4893 if { [istarget aarch64*-*-*]
4894 || [istarget powerpc*-*-*]
4895 || [is-effective-target arm_neon_ok]
4896 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4897 || [istarget ia64-*-*]
4898 || [istarget spu-*-*]
4899 || ([istarget mips*-*-*]
4900 && [check_effective_target_mpaired_single]) } {
4901 set et_vect_extract_even_odd_saved 1
4905 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4906 return $et_vect_extract_even_odd_saved
4909 # Return 1 if the target supports vector interleaving, 0 otherwise.
4911 proc check_effective_target_vect_interleave { } {
4912 global et_vect_interleave_saved
4914 if [info exists et_vect_interleave_saved] {
4915 verbose "check_effective_target_vect_interleave: using cached result" 2
4917 set et_vect_interleave_saved 0
4918 if { [istarget aarch64*-*-*]
4919 || [istarget powerpc*-*-*]
4920 || [is-effective-target arm_neon_ok]
4921 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4922 || [istarget ia64-*-*]
4923 || [istarget spu-*-*]
4924 || ([istarget mips*-*-*]
4925 && [check_effective_target_mpaired_single]) } {
4926 set et_vect_interleave_saved 1
4930 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4931 return $et_vect_interleave_saved
4934 foreach N {2 3 4 8} {
4935 eval [string map [list N $N] {
4936 # Return 1 if the target supports 2-vector interleaving
4937 proc check_effective_target_vect_stridedN { } {
4938 global et_vect_stridedN_saved
4940 if [info exists et_vect_stridedN_saved] {
4941 verbose "check_effective_target_vect_stridedN: using cached result" 2
4943 set et_vect_stridedN_saved 0
4945 && [check_effective_target_vect_interleave]
4946 && [check_effective_target_vect_extract_even_odd] } {
4947 set et_vect_stridedN_saved 1
4949 if { ([istarget arm*-*-*]
4950 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
4951 set et_vect_stridedN_saved 1
4955 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4956 return $et_vect_stridedN_saved
4961 # Return 1 if the target supports multiple vector sizes
4963 proc check_effective_target_vect_multiple_sizes { } {
4964 global et_vect_multiple_sizes_saved
4966 set et_vect_multiple_sizes_saved 0
4967 if { ([istarget aarch64*-*-*]
4968 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
4969 set et_vect_multiple_sizes_saved 1
4971 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4972 if { ([check_avx_available] && ![check_prefer_avx128]) } {
4973 set et_vect_multiple_sizes_saved 1
4977 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4978 return $et_vect_multiple_sizes_saved
4981 # Return 1 if the target supports vectors of 64 bits.
4983 proc check_effective_target_vect64 { } {
4984 global et_vect64_saved
4986 if [info exists et_vect64_saved] {
4987 verbose "check_effective_target_vect64: using cached result" 2
4989 set et_vect64_saved 0
4990 if { ([istarget arm*-*-*]
4991 && [check_effective_target_arm_neon_ok]
4992 && [check_effective_target_arm_little_endian])
4993 || [istarget aarch64*-*-*]
4994 || [istarget sparc*-*-*] } {
4995 set et_vect64_saved 1
4999 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
5000 return $et_vect64_saved
5003 # Return 1 if the target supports vector copysignf calls.
5005 proc check_effective_target_vect_call_copysignf { } {
5006 global et_vect_call_copysignf_saved
5008 if [info exists et_vect_call_copysignf_saved] {
5009 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
5011 set et_vect_call_copysignf_saved 0
5012 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5013 || [istarget powerpc*-*-*] } {
5014 set et_vect_call_copysignf_saved 1
5018 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
5019 return $et_vect_call_copysignf_saved
5022 # Return 1 if the target supports hardware square root instructions.
5024 proc check_effective_target_sqrt_insn { } {
5025 global et_sqrt_insn_saved
5027 if [info exists et_sqrt_insn_saved] {
5028 verbose "check_effective_target_hw_sqrt: using cached result" 2
5030 set et_sqrt_insn_saved 0
5031 if { [istarget x86_64-*-*]
5032 || [istarget powerpc*-*-*]
5033 || [istarget aarch64*-*-*]
5034 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
5035 set et_sqrt_insn_saved 1
5039 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
5040 return $et_sqrt_insn_saved
5043 # Return 1 if the target supports vector sqrtf calls.
5045 proc check_effective_target_vect_call_sqrtf { } {
5046 global et_vect_call_sqrtf_saved
5048 if [info exists et_vect_call_sqrtf_saved] {
5049 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
5051 set et_vect_call_sqrtf_saved 0
5052 if { [istarget aarch64*-*-*]
5053 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5054 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
5055 set et_vect_call_sqrtf_saved 1
5059 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
5060 return $et_vect_call_sqrtf_saved
5063 # Return 1 if the target supports vector lrint calls.
5065 proc check_effective_target_vect_call_lrint { } {
5066 set et_vect_call_lrint 0
5067 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
5068 && [check_effective_target_ilp32] } {
5069 set et_vect_call_lrint 1
5072 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
5073 return $et_vect_call_lrint
5076 # Return 1 if the target supports vector btrunc calls.
5078 proc check_effective_target_vect_call_btrunc { } {
5079 global et_vect_call_btrunc_saved
5081 if [info exists et_vect_call_btrunc_saved] {
5082 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
5084 set et_vect_call_btrunc_saved 0
5085 if { [istarget aarch64*-*-*] } {
5086 set et_vect_call_btrunc_saved 1
5090 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
5091 return $et_vect_call_btrunc_saved
5094 # Return 1 if the target supports vector btruncf calls.
5096 proc check_effective_target_vect_call_btruncf { } {
5097 global et_vect_call_btruncf_saved
5099 if [info exists et_vect_call_btruncf_saved] {
5100 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
5102 set et_vect_call_btruncf_saved 0
5103 if { [istarget aarch64*-*-*] } {
5104 set et_vect_call_btruncf_saved 1
5108 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
5109 return $et_vect_call_btruncf_saved
5112 # Return 1 if the target supports vector ceil calls.
5114 proc check_effective_target_vect_call_ceil { } {
5115 global et_vect_call_ceil_saved
5117 if [info exists et_vect_call_ceil_saved] {
5118 verbose "check_effective_target_vect_call_ceil: using cached result" 2
5120 set et_vect_call_ceil_saved 0
5121 if { [istarget aarch64*-*-*] } {
5122 set et_vect_call_ceil_saved 1
5126 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
5127 return $et_vect_call_ceil_saved
5130 # Return 1 if the target supports vector ceilf calls.
5132 proc check_effective_target_vect_call_ceilf { } {
5133 global et_vect_call_ceilf_saved
5135 if [info exists et_vect_call_ceilf_saved] {
5136 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
5138 set et_vect_call_ceilf_saved 0
5139 if { [istarget aarch64*-*-*] } {
5140 set et_vect_call_ceilf_saved 1
5144 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
5145 return $et_vect_call_ceilf_saved
5148 # Return 1 if the target supports vector floor calls.
5150 proc check_effective_target_vect_call_floor { } {
5151 global et_vect_call_floor_saved
5153 if [info exists et_vect_call_floor_saved] {
5154 verbose "check_effective_target_vect_call_floor: using cached result" 2
5156 set et_vect_call_floor_saved 0
5157 if { [istarget aarch64*-*-*] } {
5158 set et_vect_call_floor_saved 1
5162 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
5163 return $et_vect_call_floor_saved
5166 # Return 1 if the target supports vector floorf calls.
5168 proc check_effective_target_vect_call_floorf { } {
5169 global et_vect_call_floorf_saved
5171 if [info exists et_vect_call_floorf_saved] {
5172 verbose "check_effective_target_vect_call_floorf: using cached result" 2
5174 set et_vect_call_floorf_saved 0
5175 if { [istarget aarch64*-*-*] } {
5176 set et_vect_call_floorf_saved 1
5180 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
5181 return $et_vect_call_floorf_saved
5184 # Return 1 if the target supports vector lceil calls.
5186 proc check_effective_target_vect_call_lceil { } {
5187 global et_vect_call_lceil_saved
5189 if [info exists et_vect_call_lceil_saved] {
5190 verbose "check_effective_target_vect_call_lceil: using cached result" 2
5192 set et_vect_call_lceil_saved 0
5193 if { [istarget aarch64*-*-*] } {
5194 set et_vect_call_lceil_saved 1
5198 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
5199 return $et_vect_call_lceil_saved
5202 # Return 1 if the target supports vector lfloor calls.
5204 proc check_effective_target_vect_call_lfloor { } {
5205 global et_vect_call_lfloor_saved
5207 if [info exists et_vect_call_lfloor_saved] {
5208 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
5210 set et_vect_call_lfloor_saved 0
5211 if { [istarget aarch64*-*-*] } {
5212 set et_vect_call_lfloor_saved 1
5216 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
5217 return $et_vect_call_lfloor_saved
5220 # Return 1 if the target supports vector nearbyint calls.
5222 proc check_effective_target_vect_call_nearbyint { } {
5223 global et_vect_call_nearbyint_saved
5225 if [info exists et_vect_call_nearbyint_saved] {
5226 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
5228 set et_vect_call_nearbyint_saved 0
5229 if { [istarget aarch64*-*-*] } {
5230 set et_vect_call_nearbyint_saved 1
5234 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
5235 return $et_vect_call_nearbyint_saved
5238 # Return 1 if the target supports vector nearbyintf calls.
5240 proc check_effective_target_vect_call_nearbyintf { } {
5241 global et_vect_call_nearbyintf_saved
5243 if [info exists et_vect_call_nearbyintf_saved] {
5244 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
5246 set et_vect_call_nearbyintf_saved 0
5247 if { [istarget aarch64*-*-*] } {
5248 set et_vect_call_nearbyintf_saved 1
5252 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
5253 return $et_vect_call_nearbyintf_saved
5256 # Return 1 if the target supports vector round calls.
5258 proc check_effective_target_vect_call_round { } {
5259 global et_vect_call_round_saved
5261 if [info exists et_vect_call_round_saved] {
5262 verbose "check_effective_target_vect_call_round: using cached result" 2
5264 set et_vect_call_round_saved 0
5265 if { [istarget aarch64*-*-*] } {
5266 set et_vect_call_round_saved 1
5270 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
5271 return $et_vect_call_round_saved
5274 # Return 1 if the target supports vector roundf calls.
5276 proc check_effective_target_vect_call_roundf { } {
5277 global et_vect_call_roundf_saved
5279 if [info exists et_vect_call_roundf_saved] {
5280 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5282 set et_vect_call_roundf_saved 0
5283 if { [istarget aarch64*-*-*] } {
5284 set et_vect_call_roundf_saved 1
5288 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5289 return $et_vect_call_roundf_saved
5292 # Return 1 if the target supports section-anchors
5294 proc check_effective_target_section_anchors { } {
5295 global et_section_anchors_saved
5297 if [info exists et_section_anchors_saved] {
5298 verbose "check_effective_target_section_anchors: using cached result" 2
5300 set et_section_anchors_saved 0
5301 if { [istarget powerpc*-*-*]
5302 || [istarget arm*-*-*] } {
5303 set et_section_anchors_saved 1
5307 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5308 return $et_section_anchors_saved
5311 # Return 1 if the target supports atomic operations on "int_128" values.
5313 proc check_effective_target_sync_int_128 { } {
5314 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5315 && ![is-effective-target ia32] } {
5317 } elseif { [istarget spu-*-*] } {
5324 # Return 1 if the target supports atomic operations on "int_128" values
5325 # and can execute them.
5327 proc check_effective_target_sync_int_128_runtime { } {
5328 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5329 && ![is-effective-target ia32] } {
5330 return [check_cached_effective_target sync_int_128_available {
5331 check_runtime_nocache sync_int_128_available {
5335 unsigned int eax, ebx, ecx, edx;
5336 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5337 return !(ecx & bit_CMPXCHG16B);
5342 } elseif { [istarget spu-*-*] } {
5349 # Return 1 if the target supports atomic operations on "long long".
5351 # Note: 32bit x86 targets require -march=pentium in dg-options.
5353 proc check_effective_target_sync_long_long { } {
5354 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5355 || [istarget aarch64*-*-*]
5356 || [istarget arm*-*-*]
5357 || [istarget alpha*-*-*]
5358 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
5359 || [istarget spu-*-*] } {
5366 # Return 1 if the target supports atomic operations on "long long"
5367 # and can execute them.
5369 # Note: 32bit x86 targets require -march=pentium in dg-options.
5371 proc check_effective_target_sync_long_long_runtime { } {
5372 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5373 return [check_cached_effective_target sync_long_long_available {
5374 check_runtime_nocache sync_long_long_available {
5378 unsigned int eax, ebx, ecx, edx;
5379 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5380 return !(edx & bit_CMPXCHG8B);
5385 } elseif { [istarget aarch64*-*-*] } {
5387 } elseif { [istarget arm*-*-linux-*] } {
5388 return [check_runtime sync_longlong_runtime {
5394 if (sizeof (long long) != 8)
5397 /* Just check for native; checking for kernel fallback is tricky. */
5398 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5403 } elseif { [istarget alpha*-*-*] } {
5405 } elseif { ([istarget sparc*-*-*]
5406 && [check_effective_target_lp64]
5407 && [check_effective_target_ultrasparc_hw]) } {
5409 } elseif { [istarget spu-*-*] } {
5411 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5418 # Return 1 if the target supports byte swap instructions.
5420 proc check_effective_target_bswap { } {
5421 global et_bswap_saved
5423 if [info exists et_bswap_saved] {
5424 verbose "check_effective_target_bswap: using cached result" 2
5426 set et_bswap_saved 0
5427 if { [istarget aarch64*-*-*]
5428 || [istarget alpha*-*-*]
5429 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5430 || [istarget m68k-*-*]
5431 || [istarget powerpc*-*-*]
5432 || [istarget rs6000-*-*]
5433 || [istarget s390*-*-*] } {
5434 set et_bswap_saved 1
5436 if { [istarget arm*-*-*]
5437 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5439 #error not armv6 or later
5443 set et_bswap_saved 1
5448 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5449 return $et_bswap_saved
5452 # Return 1 if the target supports 16-bit byte swap instructions.
5454 proc check_effective_target_bswap16 { } {
5455 global et_bswap16_saved
5457 if [info exists et_bswap16_saved] {
5458 verbose "check_effective_target_bswap16: using cached result" 2
5460 set et_bswap16_saved 0
5461 if { [is-effective-target bswap]
5462 && ![istarget alpha*-*-*]
5463 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5464 set et_bswap16_saved 1
5468 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5469 return $et_bswap16_saved
5472 # Return 1 if the target supports 32-bit byte swap instructions.
5474 proc check_effective_target_bswap32 { } {
5475 global et_bswap32_saved
5477 if [info exists et_bswap32_saved] {
5478 verbose "check_effective_target_bswap32: using cached result" 2
5480 set et_bswap32_saved 0
5481 if { [is-effective-target bswap] } {
5482 set et_bswap32_saved 1
5486 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5487 return $et_bswap32_saved
5490 # Return 1 if the target supports 64-bit byte swap instructions.
5492 proc check_effective_target_bswap64 { } {
5493 global et_bswap64_saved
5495 # expand_unop can expand 64-bit byte swap on 32-bit targets
5496 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5502 # Return 1 if the target supports atomic operations on "int" and "long".
5504 proc check_effective_target_sync_int_long { } {
5505 global et_sync_int_long_saved
5507 if [info exists et_sync_int_long_saved] {
5508 verbose "check_effective_target_sync_int_long: using cached result" 2
5510 set et_sync_int_long_saved 0
5511 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5512 # load-reserved/store-conditional instructions.
5513 if { [istarget ia64-*-*]
5514 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5515 || [istarget aarch64*-*-*]
5516 || [istarget alpha*-*-*]
5517 || [istarget arm*-*-linux-*]
5518 || [istarget bfin*-*linux*]
5519 || [istarget hppa*-*linux*]
5520 || [istarget s390*-*-*]
5521 || [istarget powerpc*-*-*]
5522 || [istarget crisv32-*-*] || [istarget cris-*-*]
5523 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5524 || [istarget spu-*-*]
5525 || [check_effective_target_mips_llsc] } {
5526 set et_sync_int_long_saved 1
5530 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5531 return $et_sync_int_long_saved
5534 # Return 1 if the target supports atomic operations on "char" and "short".
5536 proc check_effective_target_sync_char_short { } {
5537 global et_sync_char_short_saved
5539 if [info exists et_sync_char_short_saved] {
5540 verbose "check_effective_target_sync_char_short: using cached result" 2
5542 set et_sync_char_short_saved 0
5543 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5544 # load-reserved/store-conditional instructions.
5545 if { [istarget aarch64*-*-*]
5546 || [istarget ia64-*-*]
5547 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5548 || [istarget alpha*-*-*]
5549 || [istarget arm*-*-linux-*]
5550 || [istarget hppa*-*linux*]
5551 || [istarget s390*-*-*]
5552 || [istarget powerpc*-*-*]
5553 || [istarget crisv32-*-*] || [istarget cris-*-*]
5554 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5555 || [istarget spu-*-*]
5556 || [check_effective_target_mips_llsc] } {
5557 set et_sync_char_short_saved 1
5561 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5562 return $et_sync_char_short_saved
5565 # Return 1 if the target uses a ColdFire FPU.
5567 proc check_effective_target_coldfire_fpu { } {
5568 return [check_no_compiler_messages coldfire_fpu assembly {
5575 # Return true if this is a uClibc target.
5577 proc check_effective_target_uclibc {} {
5578 return [check_no_compiler_messages uclibc object {
5579 #include <features.h>
5580 #if !defined (__UCLIBC__)
5586 # Return true if this is a uclibc target and if the uclibc feature
5587 # described by __$feature__ is not present.
5589 proc check_missing_uclibc_feature {feature} {
5590 return [check_no_compiler_messages $feature object "
5591 #include <features.h>
5592 #if !defined (__UCLIBC) || defined (__${feature}__)
5598 # Return true if this is a Newlib target.
5600 proc check_effective_target_newlib {} {
5601 return [check_no_compiler_messages newlib object {
5606 # Return true if this is NOT a Bionic target.
5608 proc check_effective_target_non_bionic {} {
5609 return [check_no_compiler_messages non_bionic object {
5611 #if defined (__BIONIC__)
5617 # Return true if this target has error.h header.
5619 proc check_effective_target_error_h {} {
5620 return [check_no_compiler_messages error_h object {
5625 # Return true if this target has tgmath.h header.
5627 proc check_effective_target_tgmath_h {} {
5628 return [check_no_compiler_messages tgmath_h object {
5633 # Return true if target's libc supports complex functions.
5635 proc check_effective_target_libc_has_complex_functions {} {
5636 return [check_no_compiler_messages libc_has_complex_functions object {
5637 #include <complex.h>
5642 # (a) an error of a few ULP is expected in string to floating-point
5643 # conversion functions; and
5644 # (b) overflow is not always detected correctly by those functions.
5646 proc check_effective_target_lax_strtofp {} {
5647 # By default, assume that all uClibc targets suffer from this.
5648 return [check_effective_target_uclibc]
5651 # Return 1 if this is a target for which wcsftime is a dummy
5652 # function that always returns 0.
5654 proc check_effective_target_dummy_wcsftime {} {
5655 # By default, assume that all uClibc targets suffer from this.
5656 return [check_effective_target_uclibc]
5659 # Return 1 if constructors with initialization priority arguments are
5660 # supposed on this target.
5662 proc check_effective_target_init_priority {} {
5663 return [check_no_compiler_messages init_priority assembly "
5664 void f() __attribute__((constructor (1000)));
5669 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5670 # This can be used with any check_* proc that takes no argument and
5671 # returns only 1 or 0. It could be used with check_* procs that take
5672 # arguments with keywords that pass particular arguments.
5674 proc is-effective-target { arg } {
5676 if { [info procs check_effective_target_${arg}] != [list] } {
5677 set selected [check_effective_target_${arg}]
5680 "vmx_hw" { set selected [check_vmx_hw_available] }
5681 "vsx_hw" { set selected [check_vsx_hw_available] }
5682 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5683 "p9vector_hw" { set selected [check_p9vector_hw_available] }
5684 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
5685 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
5686 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
5687 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5688 "dfp_hw" { set selected [check_dfp_hw_available] }
5689 "htm_hw" { set selected [check_htm_hw_available] }
5690 "named_sections" { set selected [check_named_sections_available] }
5691 "gc_sections" { set selected [check_gc_sections_available] }
5692 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5693 default { error "unknown effective target keyword `$arg'" }
5696 verbose "is-effective-target: $arg $selected" 2
5700 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
5702 proc is-effective-target-keyword { arg } {
5703 if { [info procs check_effective_target_${arg}] != [list] } {
5706 # These have different names for their check_* procs.
5708 "vmx_hw" { return 1 }
5709 "vsx_hw" { return 1 }
5710 "p8vector_hw" { return 1 }
5711 "p9vector_hw" { return 1 }
5712 "p9modulo_hw" { return 1 }
5713 "ppc_float128_sw" { return 1 }
5714 "ppc_float128_hw" { return 1 }
5715 "ppc_recip_hw" { return 1 }
5716 "dfp_hw" { return 1 }
5717 "htm_hw" { return 1 }
5718 "named_sections" { return 1 }
5719 "gc_sections" { return 1 }
5720 "cxa_atexit" { return 1 }
5721 default { return 0 }
5726 # Return 1 if target default to short enums
5728 proc check_effective_target_short_enums { } {
5729 return [check_no_compiler_messages short_enums assembly {
5731 int s[sizeof (enum foo) == 1 ? 1 : -1];
5735 # Return 1 if target supports merging string constants at link time.
5737 proc check_effective_target_string_merging { } {
5738 return [check_no_messages_and_pattern string_merging \
5739 "rodata\\.str" assembly {
5740 const char *var = "String";
5744 # Return 1 if target has the basic signed and unsigned types in
5745 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
5746 # working <stdint.h> for all targets.
5748 proc check_effective_target_stdint_types { } {
5749 return [check_no_compiler_messages stdint_types assembly {
5751 int8_t a; int16_t b; int32_t c; int64_t d;
5752 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5756 # Return 1 if target has the basic signed and unsigned types in
5757 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5758 # these types agree with those in the header, as some systems have
5759 # only <inttypes.h>.
5761 proc check_effective_target_inttypes_types { } {
5762 return [check_no_compiler_messages inttypes_types assembly {
5763 #include <inttypes.h>
5764 int8_t a; int16_t b; int32_t c; int64_t d;
5765 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5769 # Return 1 if programs are intended to be run on a simulator
5770 # (i.e. slowly) rather than hardware (i.e. fast).
5772 proc check_effective_target_simulator { } {
5774 # All "src/sim" simulators set this one.
5775 if [board_info target exists is_simulator] {
5776 return [board_info target is_simulator]
5779 # The "sid" simulators don't set that one, but at least they set
5781 if [board_info target exists slow_simulator] {
5782 return [board_info target slow_simulator]
5788 # Return 1 if programs are intended to be run on hardware rather than
5791 proc check_effective_target_hw { } {
5793 # All "src/sim" simulators set this one.
5794 if [board_info target exists is_simulator] {
5795 if [board_info target is_simulator] {
5802 # The "sid" simulators don't set that one, but at least they set
5804 if [board_info target exists slow_simulator] {
5805 if [board_info target slow_simulator] {
5815 # Return 1 if the target is a VxWorks kernel.
5817 proc check_effective_target_vxworks_kernel { } {
5818 return [check_no_compiler_messages vxworks_kernel assembly {
5819 #if !defined __vxworks || defined __RTP__
5825 # Return 1 if the target is a VxWorks RTP.
5827 proc check_effective_target_vxworks_rtp { } {
5828 return [check_no_compiler_messages vxworks_rtp assembly {
5829 #if !defined __vxworks || !defined __RTP__
5835 # Return 1 if the target is expected to provide wide character support.
5837 proc check_effective_target_wchar { } {
5838 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
5841 return [check_no_compiler_messages wchar assembly {
5846 # Return 1 if the target has <pthread.h>.
5848 proc check_effective_target_pthread_h { } {
5849 return [check_no_compiler_messages pthread_h assembly {
5850 #include <pthread.h>
5854 # Return 1 if the target can truncate a file from a file-descriptor,
5855 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
5856 # chsize. We test for a trivially functional truncation; no stubs.
5857 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
5858 # different function to be used.
5860 proc check_effective_target_fd_truncate { } {
5862 #define _FILE_OFFSET_BITS 64
5869 FILE *f = fopen ("tst.tmp", "wb");
5871 const char t[] = "test writing more than ten characters";
5875 write (fd, t, sizeof (t) - 1);
5877 if (ftruncate (fd, 10) != 0)
5886 f = fopen ("tst.tmp", "rb");
5887 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5895 if { [check_runtime ftruncate $prog] } {
5899 regsub "ftruncate" $prog "chsize" prog
5900 return [check_runtime chsize $prog]
5903 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5905 proc add_options_for_c99_runtime { flags } {
5906 if { [istarget *-*-solaris2*] } {
5907 return "$flags -std=c99"
5909 if { [istarget powerpc-*-darwin*] } {
5910 return "$flags -mmacosx-version-min=10.3"
5915 # Add to FLAGS all the target-specific flags needed to enable
5916 # full IEEE compliance mode.
5918 proc add_options_for_ieee { flags } {
5919 if { [istarget alpha*-*-*]
5920 || [istarget sh*-*-*] } {
5921 return "$flags -mieee"
5923 if { [istarget rx-*-*] } {
5924 return "$flags -mnofpu"
5929 if {![info exists flags_to_postpone]} {
5930 set flags_to_postpone ""
5933 # Add to FLAGS the flags needed to enable functions to bind locally
5934 # when using pic/PIC passes in the testsuite.
5935 proc add_options_for_bind_pic_locally { flags } {
5936 global flags_to_postpone
5938 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
5939 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
5940 # order to make sure that the multilib_flags doesn't override this.
5942 if {[check_no_compiler_messages using_pic2 assembly {
5947 set flags_to_postpone "-fPIE"
5950 if {[check_no_compiler_messages using_pic1 assembly {
5955 set flags_to_postpone "-fpie"
5961 # Add to FLAGS the flags needed to enable 64-bit vectors.
5963 proc add_options_for_double_vectors { flags } {
5964 if [is-effective-target arm_neon_ok] {
5965 return "$flags -mvectorize-with-neon-double"
5971 # Return 1 if the target provides a full C99 runtime.
5973 proc check_effective_target_c99_runtime { } {
5974 return [check_cached_effective_target c99_runtime {
5977 set file [open "$srcdir/gcc.dg/builtins-config.h"]
5978 set contents [read $file]
5981 #ifndef HAVE_C99_RUNTIME
5982 #error !HAVE_C99_RUNTIME
5985 check_no_compiler_messages_nocache c99_runtime assembly \
5986 $contents [add_options_for_c99_runtime ""]
5990 # Return 1 if target wchar_t is at least 4 bytes.
5992 proc check_effective_target_4byte_wchar_t { } {
5993 return [check_no_compiler_messages 4byte_wchar_t object {
5994 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
5998 # Return 1 if the target supports automatic stack alignment.
6000 proc check_effective_target_automatic_stack_alignment { } {
6001 # Ordinarily x86 supports automatic stack alignment ...
6002 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
6003 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
6004 # ... except Win64 SEH doesn't. Succeed for Win32 though.
6005 return [check_effective_target_ilp32];
6012 # Return true if we are compiling for AVX target.
6014 proc check_avx_available { } {
6015 if { [check_no_compiler_messages avx_available assembly {
6025 # Return true if 32- and 16-bytes vectors are available.
6027 proc check_effective_target_vect_sizes_32B_16B { } {
6028 if { [check_avx_available] && ![check_prefer_avx128] } {
6035 # Return true if 128-bits vectors are preferred even if 256-bits vectors
6038 proc check_prefer_avx128 { } {
6039 if ![check_avx_available] {
6042 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
6043 float a[1024],b[1024],c[1024];
6044 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
6045 } "-O2 -ftree-vectorize"]
6049 # Return 1 if avx512f instructions can be compiled.
6051 proc check_effective_target_avx512f { } {
6052 return [check_no_compiler_messages avx512f object {
6053 typedef double __m512d __attribute__ ((__vector_size__ (64)));
6055 __m512d _mm512_add (__m512d a)
6057 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
6062 # Return 1 if avx instructions can be compiled.
6064 proc check_effective_target_avx { } {
6065 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6068 return [check_no_compiler_messages avx object {
6069 void _mm256_zeroall (void)
6071 __builtin_ia32_vzeroall ();
6076 # Return 1 if avx2 instructions can be compiled.
6077 proc check_effective_target_avx2 { } {
6078 return [check_no_compiler_messages avx2 object {
6079 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
6081 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
6083 return __builtin_ia32_andnotsi256 (__X, __Y);
6088 # Return 1 if sse instructions can be compiled.
6089 proc check_effective_target_sse { } {
6090 return [check_no_compiler_messages sse object {
6093 __builtin_ia32_stmxcsr ();
6099 # Return 1 if sse2 instructions can be compiled.
6100 proc check_effective_target_sse2 { } {
6101 return [check_no_compiler_messages sse2 object {
6102 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
6104 __m128i _mm_srli_si128 (__m128i __A, int __N)
6106 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
6111 # Return 1 if F16C instructions can be compiled.
6113 proc check_effective_target_f16c { } {
6114 return [check_no_compiler_messages f16c object {
6115 #include "immintrin.h"
6117 foo (unsigned short val)
6119 return _cvtsh_ss (val);
6124 # Return 1 if C wchar_t type is compatible with char16_t.
6126 proc check_effective_target_wchar_t_char16_t_compatible { } {
6127 return [check_no_compiler_messages wchar_t_char16_t object {
6129 __CHAR16_TYPE__ *p16 = &wc;
6130 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6134 # Return 1 if C wchar_t type is compatible with char32_t.
6136 proc check_effective_target_wchar_t_char32_t_compatible { } {
6137 return [check_no_compiler_messages wchar_t_char32_t object {
6139 __CHAR32_TYPE__ *p32 = &wc;
6140 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6144 # Return 1 if pow10 function exists.
6146 proc check_effective_target_pow10 { } {
6147 return [check_runtime pow10 {
6157 # Return 1 if current options generate DFP instructions, 0 otherwise.
6159 proc check_effective_target_hard_dfp {} {
6160 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
6161 typedef float d64 __attribute__((mode(DD)));
6163 void foo (void) { z = x + y; }
6167 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
6168 # for strchr etc. functions.
6170 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
6171 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
6174 #if !defined(__cplusplus) \
6175 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
6176 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
6177 ISO C++ correct string.h and wchar.h protos not supported.
6184 # Return 1 if GNU as is used.
6186 proc check_effective_target_gas { } {
6187 global use_gas_saved
6190 if {![info exists use_gas_saved]} {
6191 # Check if the as used by gcc is GNU as.
6192 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
6193 # Provide /dev/null as input, otherwise gas times out reading from
6195 set status [remote_exec host "$gcc_as" "-v /dev/null"]
6196 set as_output [lindex $status 1]
6197 if { [ string first "GNU" $as_output ] >= 0 } {
6203 return $use_gas_saved
6206 # Return 1 if GNU ld is used.
6208 proc check_effective_target_gld { } {
6209 global use_gld_saved
6212 if {![info exists use_gld_saved]} {
6213 # Check if the ld used by gcc is GNU ld.
6214 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
6215 set status [remote_exec host "$gcc_ld" "--version"]
6216 set ld_output [lindex $status 1]
6217 if { [ string first "GNU" $ld_output ] >= 0 } {
6223 return $use_gld_saved
6226 # Return 1 if the compiler has been configure with link-time optimization
6229 proc check_effective_target_lto { } {
6230 if { [istarget nvptx-*-*] } {
6233 return [check_no_compiler_messages lto object {
6238 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
6240 proc check_effective_target_maybe_x32 { } {
6241 return [check_no_compiler_messages maybe_x32 object {
6243 } "-mx32 -maddress-mode=short"]
6246 # Return 1 if this target supports the -fsplit-stack option, 0
6249 proc check_effective_target_split_stack {} {
6250 return [check_no_compiler_messages split_stack object {
6255 # Return 1 if this target supports the -masm=intel option, 0
6258 proc check_effective_target_masm_intel {} {
6259 return [check_no_compiler_messages masm_intel object {
6260 extern void abort (void);
6264 # Return 1 if the language for the compiler under test is C.
6266 proc check_effective_target_c { } {
6268 if [string match $tool "gcc"] {
6274 # Return 1 if the language for the compiler under test is C++.
6276 proc check_effective_target_c++ { } {
6278 if [string match $tool "g++"] {
6284 set cxx_default "c++14"
6285 # Check whether the current active language standard supports the features
6286 # of C++11/C++14 by checking for the presence of one of the -std flags.
6287 # This assumes that the default for the compiler is $cxx_default, and that
6288 # there will never be multiple -std= arguments on the command line.
6289 proc check_effective_target_c++11_only { } {
6291 if ![check_effective_target_c++] {
6294 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6297 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6302 proc check_effective_target_c++11 { } {
6303 if [check_effective_target_c++11_only] {
6306 return [check_effective_target_c++14]
6308 proc check_effective_target_c++11_down { } {
6309 if ![check_effective_target_c++] {
6312 return [expr ![check_effective_target_c++14] ]
6315 proc check_effective_target_c++14_only { } {
6317 if ![check_effective_target_c++] {
6320 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6323 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6329 proc check_effective_target_c++14 { } {
6330 if [check_effective_target_c++14_only] {
6333 return [check_effective_target_c++1z]
6335 proc check_effective_target_c++14_down { } {
6336 if ![check_effective_target_c++] {
6339 return [expr ![check_effective_target_c++1z] ]
6342 proc check_effective_target_c++98_only { } {
6344 if ![check_effective_target_c++] {
6347 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6350 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6356 proc check_effective_target_c++1z_only { } {
6358 if ![check_effective_target_c++] {
6361 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6364 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6369 proc check_effective_target_c++1z { } {
6370 return [check_effective_target_c++1z_only]
6373 # Return 1 if expensive testcases should be run.
6375 proc check_effective_target_run_expensive_tests { } {
6376 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6382 # Returns 1 if "mempcpy" is available on the target system.
6384 proc check_effective_target_mempcpy {} {
6385 return [check_function_available "mempcpy"]
6388 # Returns 1 if "stpcpy" is available on the target system.
6390 proc check_effective_target_stpcpy {} {
6391 return [check_function_available "stpcpy"]
6394 # Check whether the vectorizer tests are supported by the target and
6395 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6396 # Set dg-do-what-default to either compile or run, depending on target
6397 # capabilities. Return 1 if vectorizer tests are supported by
6398 # target, 0 otherwise.
6400 proc check_vect_support_and_set_flags { } {
6401 global DEFAULT_VECTCFLAGS
6402 global dg-do-what-default
6404 if [istarget powerpc-*paired*] {
6405 lappend DEFAULT_VECTCFLAGS "-mpaired"
6406 if [check_750cl_hw_available] {
6407 set dg-do-what-default run
6409 set dg-do-what-default compile
6411 } elseif [istarget powerpc*-*-*] {
6412 # Skip targets not supporting -maltivec.
6413 if ![is-effective-target powerpc_altivec_ok] {
6417 lappend DEFAULT_VECTCFLAGS "-maltivec"
6418 if [check_p9vector_hw_available] {
6419 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
6420 } elseif [check_p8vector_hw_available] {
6421 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6422 } elseif [check_vsx_hw_available] {
6423 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6426 if [check_vmx_hw_available] {
6427 set dg-do-what-default run
6429 if [is-effective-target ilp32] {
6430 # Specify a cpu that supports VMX for compile-only tests.
6431 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6433 set dg-do-what-default compile
6435 } elseif { [istarget spu-*-*] } {
6436 set dg-do-what-default run
6437 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6438 lappend DEFAULT_VECTCFLAGS "-msse2"
6439 if { [check_effective_target_sse2_runtime] } {
6440 set dg-do-what-default run
6442 set dg-do-what-default compile
6444 } elseif { [istarget mips*-*-*]
6445 && ([check_effective_target_mpaired_single]
6446 || [check_effective_target_mips_loongson])
6447 && [check_effective_target_nomips16] } {
6448 if { [check_effective_target_mpaired_single] } {
6449 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6451 set dg-do-what-default run
6452 } elseif [istarget sparc*-*-*] {
6453 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6454 if [check_effective_target_ultrasparc_hw] {
6455 set dg-do-what-default run
6457 set dg-do-what-default compile
6459 } elseif [istarget alpha*-*-*] {
6460 # Alpha's vectorization capabilities are extremely limited.
6461 # It's more effort than its worth disabling all of the tests
6462 # that it cannot pass. But if you actually want to see what
6463 # does work, command out the return.
6466 lappend DEFAULT_VECTCFLAGS "-mmax"
6467 if [check_alpha_max_hw_available] {
6468 set dg-do-what-default run
6470 set dg-do-what-default compile
6472 } elseif [istarget ia64-*-*] {
6473 set dg-do-what-default run
6474 } elseif [is-effective-target arm_neon_ok] {
6475 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6476 # NEON does not support denormals, so is not used for vectorization by
6477 # default to avoid loss of precision. We must pass -ffast-math to test
6478 # vectorization of float operations.
6479 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6480 if [is-effective-target arm_neon_hw] {
6481 set dg-do-what-default run
6483 set dg-do-what-default compile
6485 } elseif [istarget "aarch64*-*-*"] {
6486 set dg-do-what-default run
6494 # Return 1 if the target does *not* require strict alignment.
6496 proc check_effective_target_non_strict_align {} {
6498 # On ARM, the default is to use STRICT_ALIGNMENT, but there
6499 # are interfaces defined for misaligned access and thus
6500 # depending on the architecture levels unaligned access is
6502 if [istarget "arm*-*-*"] {
6503 return [check_effective_target_arm_unaligned]
6506 return [check_no_compiler_messages non_strict_align assembly {
6508 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6510 void foo(void) { z = (c *) y; }
6514 # Return 1 if the target has <ucontext.h>.
6516 proc check_effective_target_ucontext_h { } {
6517 return [check_no_compiler_messages ucontext_h assembly {
6518 #include <ucontext.h>
6522 proc check_effective_target_aarch64_tiny { } {
6523 if { [istarget aarch64*-*-*] } {
6524 return [check_no_compiler_messages aarch64_tiny object {
6525 #ifdef __AARCH64_CMODEL_TINY__
6528 #error target not AArch64 tiny code model
6536 proc check_effective_target_aarch64_small { } {
6537 if { [istarget aarch64*-*-*] } {
6538 return [check_no_compiler_messages aarch64_small object {
6539 #ifdef __AARCH64_CMODEL_SMALL__
6542 #error target not AArch64 small code model
6550 proc check_effective_target_aarch64_large { } {
6551 if { [istarget aarch64*-*-*] } {
6552 return [check_no_compiler_messages aarch64_large object {
6553 #ifdef __AARCH64_CMODEL_LARGE__
6556 #error target not AArch64 large code model
6564 # Return 1 if <fenv.h> is available with all the standard IEEE
6565 # exceptions and floating-point exceptions are raised by arithmetic
6566 # operations. (If the target requires special options for "inexact"
6567 # exceptions, those need to be specified in the testcases.)
6569 proc check_effective_target_fenv_exceptions {} {
6570 return [check_runtime fenv_exceptions {
6573 #ifndef FE_DIVBYZERO
6574 # error Missing FE_DIVBYZERO
6577 # error Missing FE_INEXACT
6580 # error Missing FE_INVALID
6583 # error Missing FE_OVERFLOW
6585 #ifndef FE_UNDERFLOW
6586 # error Missing FE_UNDERFLOW
6588 volatile float a = 0.0f, r;
6593 if (fetestexcept (FE_INVALID))
6598 } [add_options_for_ieee "-std=gnu99"]]
6601 proc check_effective_target_tiny {} {
6602 global et_target_tiny_saved
6604 if [info exists et_target_tine_saved] {
6605 verbose "check_effective_target_tiny: using cached result" 2
6607 set et_target_tiny_saved 0
6608 if { [istarget aarch64*-*-*]
6609 && [check_effective_target_aarch64_tiny] } {
6610 set et_target_tiny_saved 1
6614 return $et_target_tiny_saved
6617 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6619 proc check_effective_target_logical_op_short_circuit {} {
6620 if { [istarget mips*-*-*]
6621 || [istarget arc*-*-*]
6622 || [istarget avr*-*-*]
6623 || [istarget crisv32-*-*] || [istarget cris-*-*]
6624 || [istarget mmix-*-*]
6625 || [istarget s390*-*-*]
6626 || [istarget powerpc*-*-*]
6627 || [istarget nios2*-*-*]
6628 || [istarget visium-*-*]
6629 || [check_effective_target_arm_cortex_m] } {
6635 # Record that dg-final test TEST requires convential compilation.
6637 proc force_conventional_output_for { test } {
6638 if { [info proc $test] == "" } {
6639 perror "$test does not exist"
6642 proc ${test}_required_options {} {
6643 global gcc_force_conventional_output
6644 return $gcc_force_conventional_output
6648 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
6649 # otherwise. Cache the result.
6651 proc check_effective_target_pie_copyreloc { } {
6652 global pie_copyreloc_available_saved
6654 global GCC_UNDER_TEST
6656 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6660 # Need auto-host.h to check linker support.
6661 if { ![file exists ../../auto-host.h ] } {
6665 if [info exists pie_copyreloc_available_saved] {
6666 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6668 # Set up and compile to see if linker supports PIE with copy
6669 # reloc. Include the current process ID in the file names to
6670 # prevent conflicts with invocations for multiple testsuites.
6675 set f [open $src "w"]
6676 puts $f "#include \"../../auto-host.h\""
6677 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
6678 puts $f "# error Linker does not support PIE with copy reloc."
6682 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
6683 set lines [${tool}_target_compile $src $obj object ""]
6688 if [string match "" $lines] then {
6689 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
6690 set pie_copyreloc_available_saved 1
6692 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
6693 set pie_copyreloc_available_saved 0
6697 return $pie_copyreloc_available_saved
6700 # Return 1 if the target uses comdat groups.
6702 proc check_effective_target_comdat_group {} {
6703 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
6705 inline int foo () { return 1; }
6710 # Return 1 if target supports __builtin_eh_return
6711 proc check_effective_target_builtin_eh_return { } {
6712 return [check_no_compiler_messages builtin_eh_return object {
6713 void test (long l, void *p)
6715 __builtin_eh_return (l, p);
6720 # Return 1 if the target supports max reduction for vectors.
6722 proc check_effective_target_vect_max_reduc { } {
6723 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
6729 # Return 1 if there is an nvptx offload compiler.
6731 proc check_effective_target_offload_nvptx { } {
6732 return [check_no_compiler_messages offload_nvptx object {
6733 int main () {return 0;}
6734 } "-foffload=nvptx-none" ]