1 # Copyright (C) 1999-2017 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 ###############################
256 # proc check_weak_available { }
257 ###############################
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
262 proc check_weak_available { } {
265 # All mips targets should support it
267 if { [ string first "mips" $target_cpu ] >= 0 } {
271 # All AIX targets should support it
273 if { [istarget *-*-aix*] } {
277 # All solaris2 targets should support it
279 if { [istarget *-*-solaris2*] } {
283 # Windows targets Cygwin and MingW32 support it
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
289 # HP-UX 10.X doesn't support it
291 if { [istarget hppa*-*-hpux10*] } {
295 # nvptx (nearly) supports it
297 if { [istarget nvptx-*-*] } {
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
304 set objformat [gcc_target_object_format]
312 unknown { return -1 }
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
328 return [check_weak_available]
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
348 ###############################
349 # proc check_alias_available { }
350 ###############################
352 # Determine if the target toolchain supports the alias attribute.
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
359 proc check_alias_available { } {
360 global alias_available_saved
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
376 set lines [${tool}_target_compile $src $obj object ""]
378 remote_file build delete $obj
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
387 set objformat [gcc_target_object_format]
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
393 set alias_available_saved 0
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
400 set alias_available_saved -1
405 verbose "check_alias_available returning $alias_available_saved" 2
408 return $alias_available_saved
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
429 void f() __attribute__((ifunc("g")));
433 # Returns true if --gc-sections is supported on the target.
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
466 set ld_output [remote_exec host "$gcc_ld" "--help"]
467 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
468 set gc_sections_available_saved 1
470 set gc_sections_available_saved 0
473 return $gc_sections_available_saved
476 # Return 1 if according to target_info struct and explicit target list
477 # target is supposed to support trampolines.
479 proc check_effective_target_trampolines { } {
480 if [target_info exists no_trampolines] {
483 if { [istarget avr-*-*]
484 || [istarget msp430-*-*]
485 || [istarget nvptx-*-*]
486 || [istarget hppa2.0w-hp-hpux11.23]
487 || [istarget hppa64-hp-hpux11.23] } {
493 # Return 1 if according to target_info struct and explicit target list
494 # target disables -fdelete-null-pointer-checks. Targets should return 0
495 # if they simply default to -fno-delete-null-pointer-checks but obey
496 # -fdelete-null-pointer-checks when passed explicitly (and tests that
497 # depend on this option should do that).
499 proc check_effective_target_keeps_null_pointer_checks { } {
500 if [target_info exists keeps_null_pointer_checks] {
503 if { [istarget avr-*-*] } {
509 # Return the autofdo profile wrapper
511 proc profopt-perf-wrapper { } {
513 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data "
516 # Return true if profiling is supported on the target.
518 proc check_profiling_available { test_what } {
519 global profiling_available_saved
521 verbose "Profiling argument is <$test_what>" 1
523 # These conditions depend on the argument so examine them before
524 # looking at the cache variable.
526 # Tree profiling requires TLS runtime support.
527 if { $test_what == "-fprofile-generate" } {
528 if { ![check_effective_target_tls_runtime] } {
533 if { $test_what == "-fauto-profile" } {
534 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
535 verbose "autofdo only supported on linux"
538 # not cross compiling?
540 verbose "autofdo not supported for non native builds"
543 set event [profopt-perf-wrapper]
545 verbose "autofdo not supported"
549 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
550 if { [lindex $status 0] != 0 } {
551 verbose "autofdo not supported because perf does not work"
555 # no good way to check this in advance -- check later instead.
556 #set status [remote_exec host "create_gcov" "2>/dev/null"]
557 #if { [lindex $status 0] != 255 } {
558 # verbose "autofdo not supported due to missing create_gcov"
563 # Support for -p on solaris2 relies on mcrt1.o which comes with the
564 # vendor compiler. We cannot reliably predict the directory where the
565 # vendor compiler (and thus mcrt1.o) is installed so we can't
566 # necessarily find mcrt1.o even if we have it.
567 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
571 # We don't yet support profiling for MIPS16.
572 if { [istarget mips*-*-*]
573 && ![check_effective_target_nomips16]
574 && ($test_what == "-p" || $test_what == "-pg") } {
578 # MinGW does not support -p.
579 if { [istarget *-*-mingw*] && $test_what == "-p" } {
583 # cygwin does not support -p.
584 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
588 # uClibc does not have gcrt1.o.
589 if { [check_effective_target_uclibc]
590 && ($test_what == "-p" || $test_what == "-pg") } {
594 # Now examine the cache variable.
595 if {![info exists profiling_available_saved]} {
596 # Some targets don't have any implementation of __bb_init_func or are
597 # missing other needed machinery.
598 if {[istarget aarch64*-*-elf]
599 || [istarget am3*-*-linux*]
600 || [istarget arm*-*-eabi*]
601 || [istarget arm*-*-elf]
602 || [istarget arm*-*-symbianelf*]
603 || [istarget avr-*-*]
604 || [istarget bfin-*-*]
605 || [istarget cris-*-*]
606 || [istarget crisv32-*-*]
607 || [istarget fido-*-elf]
608 || [istarget h8300-*-*]
609 || [istarget lm32-*-*]
610 || [istarget m32c-*-elf]
611 || [istarget m68k-*-elf]
612 || [istarget m68k-*-uclinux*]
613 || [istarget mips*-*-elf*]
614 || [istarget mmix-*-*]
615 || [istarget mn10300-*-elf*]
616 || [istarget moxie-*-elf*]
617 || [istarget msp430-*-*]
618 || [istarget nds32*-*-elf]
619 || [istarget nios2-*-elf]
620 || [istarget nvptx-*-*]
621 || [istarget powerpc-*-eabi*]
622 || [istarget powerpc-*-elf]
624 || [istarget tic6x-*-elf]
625 || [istarget visium-*-*]
626 || [istarget xstormy16-*]
627 || [istarget xtensa*-*-elf]
628 || [istarget *-*-rtems*]
629 || [istarget *-*-vxworks*] } {
630 set profiling_available_saved 0
632 set profiling_available_saved 1
636 # -pg link test result can't be cached since it may change between
638 set profiling_working $profiling_available_saved
639 if { $profiling_available_saved == 1
640 && ![check_no_compiler_messages_nocache profiling executable {
641 int main() { return 0; } } "-pg"] } {
642 set profiling_working 0
645 return $profiling_working
648 # Check to see if a target is "freestanding". This is as per the definition
649 # in Section 4 of C99 standard. Effectively, it is a target which supports no
650 # extra headers or libraries other than what is considered essential.
651 proc check_effective_target_freestanding { } {
652 if { [istarget nvptx-*-*] } {
658 # Return 1 if target has packed layout of structure members by
659 # default, 0 otherwise. Note that this is slightly different than
660 # whether the target has "natural alignment": both attributes may be
663 proc check_effective_target_default_packed { } {
664 return [check_no_compiler_messages default_packed assembly {
665 struct x { char a; long b; } c;
666 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
670 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
671 # documentation, where the test also comes from.
673 proc check_effective_target_pcc_bitfield_type_matters { } {
674 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
675 # bitfields, but let's stick to the example code from the docs.
676 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
677 struct foo1 { char x; char :0; char y; };
678 struct foo2 { char x; int :0; char y; };
679 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
683 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
685 proc add_options_for_tls { flags } {
686 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
687 # libthread, so always pass -pthread for native TLS. Same for AIX.
688 # Need to duplicate native TLS check from
689 # check_effective_target_tls_native to avoid recursion.
690 if { ([istarget powerpc-ibm-aix*]) &&
691 [check_no_messages_and_pattern tls_native "!emutls" assembly {
693 int f (void) { return i; }
694 void g (int j) { i = j; }
696 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
701 # Return 1 if indirect jumps are supported, 0 otherwise.
703 proc check_effective_target_indirect_jumps {} {
704 if { [istarget nvptx-*-*] } {
710 # Return 1 if nonlocal goto is supported, 0 otherwise.
712 proc check_effective_target_nonlocal_goto {} {
713 if { [istarget nvptx-*-*] } {
719 # Return 1 if global constructors are supported, 0 otherwise.
721 proc check_effective_target_global_constructor {} {
722 if { [istarget nvptx-*-*] } {
728 # Return 1 if taking label values is supported, 0 otherwise.
730 proc check_effective_target_label_values {} {
731 if { [istarget nvptx-*-*] } {
734 return [check_no_compiler_messages label_values assembly {
735 #ifdef NO_LABEL_VALUES
741 # Return 1 if builtin_return_address and builtin_frame_address are
742 # supported, 0 otherwise.
744 proc check_effective_target_return_address {} {
745 if { [istarget nvptx-*-*] } {
751 # Return 1 if the assembler does not verify function types against
752 # calls, 0 otherwise. Such verification will typically show up problems
753 # with K&R C function declarations.
755 proc check_effective_target_untyped_assembly {} {
756 if { [istarget nvptx-*-*] } {
762 # Return 1 if alloca is supported, 0 otherwise.
764 proc check_effective_target_alloca {} {
765 if { [istarget nvptx-*-*] } {
766 return [check_no_compiler_messages alloca assembly {
768 void g (int n) { f (__builtin_alloca (n)); }
774 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
776 proc check_effective_target_tls {} {
777 return [check_no_compiler_messages tls assembly {
779 int f (void) { return i; }
780 void g (int j) { i = j; }
784 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
786 proc check_effective_target_tls_native {} {
787 # VxWorks uses emulated TLS machinery, but with non-standard helper
788 # functions, so we fail to automatically detect it.
789 if { [istarget *-*-vxworks*] } {
793 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
795 int f (void) { return i; }
796 void g (int j) { i = j; }
800 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
802 proc check_effective_target_tls_emulated {} {
803 # VxWorks uses emulated TLS machinery, but with non-standard helper
804 # functions, so we fail to automatically detect it.
805 if { [istarget *-*-vxworks*] } {
809 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
811 int f (void) { return i; }
812 void g (int j) { i = j; }
816 # Return 1 if TLS executables can run correctly, 0 otherwise.
818 proc check_effective_target_tls_runtime {} {
819 # The runtime does not have TLS support, but just
820 # running the test below is insufficient to show this.
821 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
824 return [check_runtime tls_runtime {
825 __thread int thr = 0;
826 int main (void) { return thr; }
827 } [add_options_for_tls ""]]
830 # Return 1 if atomic compare-and-swap is supported on 'int'
832 proc check_effective_target_cas_char {} {
833 return [check_no_compiler_messages cas_char assembly {
834 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
840 proc check_effective_target_cas_int {} {
841 return [check_no_compiler_messages cas_int assembly {
842 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
844 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
852 # Return 1 if -ffunction-sections is supported, 0 otherwise.
854 proc check_effective_target_function_sections {} {
855 # Darwin has its own scheme and silently accepts -ffunction-sections.
856 if { [istarget *-*-darwin*] } {
860 return [check_no_compiler_messages functionsections assembly {
862 } "-ffunction-sections"]
865 # Return 1 if instruction scheduling is available, 0 otherwise.
867 proc check_effective_target_scheduling {} {
868 return [check_no_compiler_messages scheduling object {
870 } "-fschedule-insns"]
873 # Return 1 if trapping arithmetic is available, 0 otherwise.
875 proc check_effective_target_trapping {} {
876 return [check_no_compiler_messages trapping object {
877 int add (int a, int b) { return a + b; }
881 # Return 1 if compilation with -fgraphite is error-free for trivial
884 proc check_effective_target_fgraphite {} {
885 return [check_no_compiler_messages fgraphite object {
890 # Return 1 if compilation with -fopenacc is error-free for trivial
893 proc check_effective_target_fopenacc {} {
894 # nvptx can be built with the device-side bits of openacc, but it
895 # does not make sense to test it as an openacc host.
896 if [istarget nvptx-*-*] { return 0 }
898 return [check_no_compiler_messages fopenacc object {
903 # Return 1 if compilation with -fopenmp is error-free for trivial
906 proc check_effective_target_fopenmp {} {
907 # nvptx can be built with the device-side bits of libgomp, but it
908 # does not make sense to test it as an openmp host.
909 if [istarget nvptx-*-*] { return 0 }
911 return [check_no_compiler_messages fopenmp object {
916 # Return 1 if compilation with -fgnu-tm is error-free for trivial
919 proc check_effective_target_fgnu_tm {} {
920 return [check_no_compiler_messages fgnu_tm object {
925 # Return 1 if the target supports mmap, 0 otherwise.
927 proc check_effective_target_mmap {} {
928 return [check_function_available "mmap"]
931 # Return 1 if the target supports dlopen, 0 otherwise.
932 proc check_effective_target_dlopen {} {
933 return [check_no_compiler_messages dlopen executable {
935 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
936 } [add_options_for_dlopen ""]]
939 proc add_options_for_dlopen { flags } {
943 # Return 1 if the target supports clone, 0 otherwise.
944 proc check_effective_target_clone {} {
945 return [check_function_available "clone"]
948 # Return 1 if the target supports setrlimit, 0 otherwise.
949 proc check_effective_target_setrlimit {} {
950 # Darwin has non-posix compliant RLIMIT_AS
951 if { [istarget *-*-darwin*] } {
954 return [check_function_available "setrlimit"]
957 # Return 1 if the target supports swapcontext, 0 otherwise.
958 proc check_effective_target_swapcontext {} {
959 return [check_no_compiler_messages swapcontext executable {
960 #include <ucontext.h>
963 ucontext_t orig_context,child_context;
964 if (swapcontext(&child_context, &orig_context) < 0) { }
969 # Return 1 if compilation with -pthread is error-free for trivial
972 proc check_effective_target_pthread {} {
973 return [check_no_compiler_messages pthread object {
978 # Return 1 if compilation with -gstabs is error-free for trivial
981 proc check_effective_target_stabs {} {
982 return [check_no_compiler_messages stabs object {
987 # Return 1 if compilation with -mpe-aligned-commons is error-free
988 # for trivial code, 0 otherwise.
990 proc check_effective_target_pe_aligned_commons {} {
991 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
992 return [check_no_compiler_messages pe_aligned_commons object {
994 } "-mpe-aligned-commons"]
999 # Return 1 if the target supports -static
1000 proc check_effective_target_static {} {
1001 return [check_no_compiler_messages static executable {
1002 int main (void) { return 0; }
1006 # Return 1 if the target supports -fstack-protector
1007 proc check_effective_target_fstack_protector {} {
1008 return [check_runtime fstack_protector {
1009 int main (void) { return 0; }
1010 } "-fstack-protector"]
1013 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1014 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1015 # warn when -fprofile-use is also supplied we test that combination too.
1017 proc check_effective_target_freorder {} {
1018 if { [check_no_compiler_messages freorder object {
1020 } "-freorder-blocks-and-partition"]
1021 && [check_no_compiler_messages fprofile_use_freorder object {
1023 } "-fprofile-use -freorder-blocks-and-partition"] } {
1029 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1030 # emitted, 0 otherwise. Whether a shared library can actually be built is
1031 # out of scope for this test.
1033 proc check_effective_target_fpic { } {
1034 # Note that M68K has a multilib that supports -fpic but not
1035 # -fPIC, so we need to check both. We test with a program that
1036 # requires GOT references.
1037 foreach arg {fpic fPIC} {
1038 if [check_no_compiler_messages $arg object {
1039 extern int foo (void); extern int bar;
1040 int baz (void) { return foo () + bar; }
1048 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1049 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1050 # assumes compiler will give warning if -fpic not supported. Here we check
1051 # whether binutils supports those new -fpic relocation modifiers, and assume
1052 # -fpic is supported if there is binutils support. GCC configuration will
1053 # enable -fpic for AArch64 in this case.
1055 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1056 # memory model -fpic relocation types.
1058 proc check_effective_target_aarch64_small_fpic { } {
1059 if { [istarget aarch64*-*-*] } {
1060 return [check_no_compiler_messages aarch64_small_fpic object {
1061 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1068 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1069 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1070 # in binutils since 2015-03-04 as PR gas/17843.
1072 # This test directive make sure binutils support all features needed by TLS LE
1073 # under -mtls-size=32 on AArch64.
1075 proc check_effective_target_aarch64_tlsle32 { } {
1076 if { [istarget aarch64*-*-*] } {
1077 return [check_no_compiler_messages aarch64_tlsle32 object {
1078 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1085 # Return 1 if -shared is supported, as in no warnings or errors
1086 # emitted, 0 otherwise.
1088 proc check_effective_target_shared { } {
1089 # Note that M68K has a multilib that supports -fpic but not
1090 # -fPIC, so we need to check both. We test with a program that
1091 # requires GOT references.
1092 return [check_no_compiler_messages shared executable {
1093 extern int foo (void); extern int bar;
1094 int baz (void) { return foo () + bar; }
1098 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1100 proc check_effective_target_pie { } {
1101 if { [istarget *-*-darwin\[912\]*]
1102 || [istarget *-*-dragonfly*]
1103 || [istarget *-*-freebsd*]
1104 || [istarget *-*-linux*]
1105 || [istarget *-*-gnu*] } {
1108 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1109 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1110 # errors out if missing, so check for that.
1111 return [check_no_compiler_messages pie executable {
1112 int main (void) { return 0; }
1118 # Return true if the target supports -mpaired-single (as used on MIPS).
1120 proc check_effective_target_mpaired_single { } {
1121 return [check_no_compiler_messages mpaired_single object {
1123 } "-mpaired-single"]
1126 # Return true if the target has access to FPU instructions.
1128 proc check_effective_target_hard_float { } {
1129 if { [istarget mips*-*-*] } {
1130 return [check_no_compiler_messages hard_float assembly {
1131 #if (defined __mips_soft_float || defined __mips16)
1132 #error __mips_soft_float || __mips16
1137 # This proc is actually checking the availabilty of FPU
1138 # support for doubles, so on the RX we must fail if the
1139 # 64-bit double multilib has been selected.
1140 if { [istarget rx-*-*] } {
1142 # return [check_no_compiler_messages hard_float assembly {
1143 #if defined __RX_64_BIT_DOUBLES__
1144 #error __RX_64_BIT_DOUBLES__
1149 # The generic test equates hard_float with "no call for adding doubles".
1150 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1151 double a (double b, double c) { return b + c; }
1155 # Return true if the target is a 64-bit MIPS target.
1157 proc check_effective_target_mips64 { } {
1158 return [check_no_compiler_messages mips64 assembly {
1165 # Return true if the target is a MIPS target that does not produce
1168 proc check_effective_target_nomips16 { } {
1169 return [check_no_compiler_messages nomips16 object {
1173 /* A cheap way of testing for -mflip-mips16. */
1174 void foo (void) { asm ("addiu $20,$20,1"); }
1175 void bar (void) { asm ("addiu $20,$20,1"); }
1180 # Add the options needed for MIPS16 function attributes. At the moment,
1181 # we don't support MIPS16 PIC.
1183 proc add_options_for_mips16_attribute { flags } {
1184 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1187 # Return true if we can force a mode that allows MIPS16 code generation.
1188 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1191 proc check_effective_target_mips16_attribute { } {
1192 return [check_no_compiler_messages mips16_attribute assembly {
1196 #if defined __mips_hard_float \
1197 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1198 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1199 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1201 } [add_options_for_mips16_attribute ""]]
1204 # Return 1 if the target supports long double larger than double when
1205 # using the new ABI, 0 otherwise.
1207 proc check_effective_target_mips_newabi_large_long_double { } {
1208 return [check_no_compiler_messages mips_newabi_large_long_double object {
1209 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1213 # Return true if the target is a MIPS target that has access
1214 # to the LL and SC instructions.
1216 proc check_effective_target_mips_llsc { } {
1217 if { ![istarget mips*-*-*] } {
1220 # Assume that these instructions are always implemented for
1221 # non-elf* targets, via emulation if necessary.
1222 if { ![istarget *-*-elf*] } {
1225 # Otherwise assume LL/SC support for everything but MIPS I.
1226 return [check_no_compiler_messages mips_llsc assembly {
1233 # Return true if the target is a MIPS target that uses in-place relocations.
1235 proc check_effective_target_mips_rel { } {
1236 if { ![istarget mips*-*-*] } {
1239 return [check_no_compiler_messages mips_rel object {
1240 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1241 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1242 #error _ABIN32 && (_ABIN32 || _ABI64)
1247 # Return true if the target is a MIPS target that uses the EABI.
1249 proc check_effective_target_mips_eabi { } {
1250 if { ![istarget mips*-*-*] } {
1253 return [check_no_compiler_messages mips_eabi object {
1260 # Return 1 if the current multilib does not generate PIC by default.
1262 proc check_effective_target_nonpic { } {
1263 return [check_no_compiler_messages nonpic assembly {
1270 # Return 1 if the current multilib generates PIE by default.
1272 proc check_effective_target_pie_enabled { } {
1273 return [check_no_compiler_messages pie_enabled assembly {
1280 # Return 1 if the target generates -fstack-protector by default.
1282 proc check_effective_target_fstack_protector_enabled {} {
1283 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1284 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1285 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1291 # Return 1 if the target does not use a status wrapper.
1293 proc check_effective_target_unwrapped { } {
1294 if { [target_info needs_status_wrapper] != "" \
1295 && [target_info needs_status_wrapper] != "0" } {
1301 # Return true if iconv is supported on the target. In particular IBM1047.
1303 proc check_iconv_available { test_what } {
1306 # If the tool configuration file has not set libiconv, try "-liconv"
1307 if { ![info exists libiconv] } {
1308 set libiconv "-liconv"
1310 set test_what [lindex $test_what 1]
1311 return [check_runtime_nocache $test_what [subst {
1317 cd = iconv_open ("$test_what", "UTF-8");
1318 if (cd == (iconv_t) -1)
1325 # Return true if Cilk Library is supported on the target.
1326 proc check_effective_target_cilkplus_runtime { } {
1327 return [ check_no_compiler_messages_nocache cilkplus_runtime executable {
1331 int __cilkrts_set_param (const char *, const char *);
1333 int x = __cilkrts_set_param ("nworkers", "0");
1336 } "-fcilkplus -lcilkrts" ]
1339 # Return true if the atomic library is supported on the target.
1340 proc check_effective_target_libatomic_available { } {
1341 return [check_no_compiler_messages libatomic_available executable {
1342 int main (void) { return 0; }
1346 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1348 proc check_ascii_locale_available { } {
1352 # Return true if named sections are supported on this target.
1354 proc check_named_sections_available { } {
1355 return [check_no_compiler_messages named_sections assembly {
1356 int __attribute__ ((section("whatever"))) foo;
1360 # Return true if the "naked" function attribute is supported on this target.
1362 proc check_effective_target_naked_functions { } {
1363 return [check_no_compiler_messages naked_functions assembly {
1364 void f() __attribute__((naked));
1368 # Return 1 if the target supports Fortran real kinds larger than real(8),
1371 # When the target name changes, replace the cached result.
1373 proc check_effective_target_fortran_large_real { } {
1374 return [check_no_compiler_messages fortran_large_real executable {
1376 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1383 # Return 1 if the target supports Fortran real kind real(16),
1384 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1385 # this checks for Real(16) only; the other returned real(10) if
1386 # both real(10) and real(16) are available.
1388 # When the target name changes, replace the cached result.
1390 proc check_effective_target_fortran_real_16 { } {
1391 return [check_no_compiler_messages fortran_real_16 executable {
1400 # Return 1 if the target supports Fortran's IEEE modules,
1403 # When the target name changes, replace the cached result.
1405 proc check_effective_target_fortran_ieee { flags } {
1406 return [check_no_compiler_messages fortran_ieee executable {
1408 use, intrinsic :: ieee_features
1414 # Return 1 if the target supports SQRT for the largest floating-point
1415 # type. (Some targets lack the libm support for this FP type.)
1416 # On most targets, this check effectively checks either whether sqrtl is
1417 # available or on __float128 systems whether libquadmath is installed,
1418 # which provides sqrtq.
1420 # When the target name changes, replace the cached result.
1422 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1423 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1425 use iso_fortran_env, only: real_kinds
1426 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1427 real(kind=maxFP), volatile :: x
1435 # Return 1 if the target supports Fortran integer kinds larger than
1436 # integer(8), 0 otherwise.
1438 # When the target name changes, replace the cached result.
1440 proc check_effective_target_fortran_large_int { } {
1441 return [check_no_compiler_messages fortran_large_int executable {
1443 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1444 integer(kind=k) :: i
1449 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1451 # When the target name changes, replace the cached result.
1453 proc check_effective_target_fortran_integer_16 { } {
1454 return [check_no_compiler_messages fortran_integer_16 executable {
1461 # Return 1 if we can statically link libgfortran, 0 otherwise.
1463 # When the target name changes, replace the cached result.
1465 proc check_effective_target_static_libgfortran { } {
1466 return [check_no_compiler_messages static_libgfortran executable {
1473 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1475 proc check_effective_target_cilkplus { } {
1476 # Skip cilk-plus tests on int16 and size16 targets for now.
1477 # The cilk-plus tests are not generic enough to cover these
1478 # cases and would throw hundreds of FAILs.
1479 if { [check_effective_target_int16]
1480 || ![check_effective_target_size32plus] } {
1484 # Skip AVR, its RAM is too small and too many tests would fail.
1485 if { [istarget avr-*-*] } {
1489 if { ! [check_effective_target_pthread] } {
1496 proc check_linker_plugin_available { } {
1497 return [check_no_compiler_messages_nocache linker_plugin executable {
1498 int main() { return 0; }
1499 } "-flto -fuse-linker-plugin"]
1502 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1503 # otherwise. Cache the result.
1505 proc check_750cl_hw_available { } {
1506 return [check_cached_effective_target 750cl_hw_available {
1507 # If this is not the right target then we can skip the test.
1508 if { ![istarget powerpc-*paired*] } {
1511 check_runtime_nocache 750cl_hw_available {
1515 asm volatile ("ps_mul v0,v0,v0");
1517 asm volatile ("ps_mul 0,0,0");
1526 # Return 1 if the target OS supports running SSE executables, 0
1527 # otherwise. Cache the result.
1529 proc check_sse_os_support_available { } {
1530 return [check_cached_effective_target sse_os_support_available {
1531 # If this is not the right target then we can skip the test.
1532 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1534 } elseif { [istarget i?86-*-solaris2*] } {
1535 # The Solaris 2 kernel doesn't save and restore SSE registers
1536 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1537 check_runtime_nocache sse_os_support_available {
1540 asm volatile ("movaps %xmm0,%xmm0");
1550 # Return 1 if the target OS supports running AVX executables, 0
1551 # otherwise. Cache the result.
1553 proc check_avx_os_support_available { } {
1554 return [check_cached_effective_target avx_os_support_available {
1555 # If this is not the right target then we can skip the test.
1556 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1559 # Check that OS has AVX and SSE saving enabled.
1560 check_runtime_nocache avx_os_support_available {
1563 unsigned int eax, edx;
1565 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1566 return (eax & 6) != 6;
1573 # Return 1 if the target supports executing SSE instructions, 0
1574 # otherwise. Cache the result.
1576 proc check_sse_hw_available { } {
1577 return [check_cached_effective_target sse_hw_available {
1578 # If this is not the right target then we can skip the test.
1579 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1582 check_runtime_nocache sse_hw_available {
1586 unsigned int eax, ebx, ecx, edx;
1587 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1588 return !(edx & bit_SSE);
1596 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1597 # 0 otherwise. Cache the result.
1599 proc check_mpaired_single_hw_available { } {
1600 return [check_cached_effective_target mpaired_single_hw_available {
1601 # If this is not the right target then we can skip the test.
1602 if { !([istarget mips*-*-*]) } {
1605 check_runtime_nocache mpaired_single_hw_available {
1608 asm volatile ("pll.ps $f2,$f4,$f6");
1616 # Return 1 if the target supports executing Loongson vector instructions,
1617 # 0 otherwise. Cache the result.
1619 proc check_mips_loongson_hw_available { } {
1620 return [check_cached_effective_target mips_loongson_hw_available {
1621 # If this is not the right target then we can skip the test.
1622 if { !([istarget mips*-*-*]) } {
1625 check_runtime_nocache mips_loongson_hw_available {
1626 #include <loongson.h>
1629 asm volatile ("paddw $f2,$f4,$f6");
1637 # Return 1 if the target supports executing MIPS MSA instructions, 0
1638 # otherwise. Cache the result.
1640 proc check_mips_msa_hw_available { } {
1641 return [check_cached_effective_target mips_msa_hw_available {
1642 # If this is not the right target then we can skip the test.
1643 if { !([istarget mips*-*-*]) } {
1646 check_runtime_nocache mips_msa_hw_available {
1647 #if !defined(__mips_msa)
1648 #error "MSA NOT AVAIL"
1650 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1651 #error "MSA NOT AVAIL FOR ISA REV < 2"
1653 #if !defined(__mips_hard_float)
1654 #error "MSA HARD_FLOAT REQUIRED"
1656 #if __mips_fpr != 64
1657 #error "MSA 64-bit FPR REQUIRED"
1663 v8i16 v = __builtin_msa_ldi_h (0);
1673 # Return 1 if the target supports executing SSE2 instructions, 0
1674 # otherwise. Cache the result.
1676 proc check_sse2_hw_available { } {
1677 return [check_cached_effective_target sse2_hw_available {
1678 # If this is not the right target then we can skip the test.
1679 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1682 check_runtime_nocache sse2_hw_available {
1686 unsigned int eax, ebx, ecx, edx;
1687 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1688 return !(edx & bit_SSE2);
1696 # Return 1 if the target supports executing SSE4 instructions, 0
1697 # otherwise. Cache the result.
1699 proc check_sse4_hw_available { } {
1700 return [check_cached_effective_target sse4_hw_available {
1701 # If this is not the right target then we can skip the test.
1702 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1705 check_runtime_nocache sse4_hw_available {
1709 unsigned int eax, ebx, ecx, edx;
1710 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1711 return !(ecx & bit_SSE4_2);
1719 # Return 1 if the target supports executing AVX instructions, 0
1720 # otherwise. Cache the result.
1722 proc check_avx_hw_available { } {
1723 return [check_cached_effective_target avx_hw_available {
1724 # If this is not the right target then we can skip the test.
1725 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1728 check_runtime_nocache avx_hw_available {
1732 unsigned int eax, ebx, ecx, edx;
1733 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1734 return ((ecx & (bit_AVX | bit_OSXSAVE))
1735 != (bit_AVX | bit_OSXSAVE));
1743 # Return 1 if the target supports executing AVX2 instructions, 0
1744 # otherwise. Cache the result.
1746 proc check_avx2_hw_available { } {
1747 return [check_cached_effective_target avx2_hw_available {
1748 # If this is not the right target then we can skip the test.
1749 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1752 check_runtime_nocache avx2_hw_available {
1756 unsigned int eax, ebx, ecx, edx;
1757 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)
1758 || ((ecx & bit_OSXSAVE) != bit_OSXSAVE))
1761 if (__get_cpuid_max (0, NULL) < 7)
1764 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1766 return (ebx & bit_AVX2) != bit_AVX2;
1773 # Return 1 if the target supports running SSE executables, 0 otherwise.
1775 proc check_effective_target_sse_runtime { } {
1776 if { [check_effective_target_sse]
1777 && [check_sse_hw_available]
1778 && [check_sse_os_support_available] } {
1784 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1786 proc check_effective_target_sse2_runtime { } {
1787 if { [check_effective_target_sse2]
1788 && [check_sse2_hw_available]
1789 && [check_sse_os_support_available] } {
1795 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1797 proc check_effective_target_sse4_runtime { } {
1798 if { [check_effective_target_sse4]
1799 && [check_sse4_hw_available]
1800 && [check_sse_os_support_available] } {
1806 # Return 1 if the target supports running MIPS Paired-Single
1807 # executables, 0 otherwise.
1809 proc check_effective_target_mpaired_single_runtime { } {
1810 if { [check_effective_target_mpaired_single]
1811 && [check_mpaired_single_hw_available] } {
1817 # Return 1 if the target supports running Loongson executables, 0 otherwise.
1819 proc check_effective_target_mips_loongson_runtime { } {
1820 if { [check_effective_target_mips_loongson]
1821 && [check_mips_loongson_hw_available] } {
1827 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
1829 proc check_effective_target_mips_msa_runtime { } {
1830 if { [check_effective_target_mips_msa]
1831 && [check_mips_msa_hw_available] } {
1837 # Return 1 if the target supports running AVX executables, 0 otherwise.
1839 proc check_effective_target_avx_runtime { } {
1840 if { [check_effective_target_avx]
1841 && [check_avx_hw_available]
1842 && [check_avx_os_support_available] } {
1848 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1850 proc check_effective_target_avx2_runtime { } {
1851 if { [check_effective_target_avx2]
1852 && [check_avx2_hw_available]
1853 && [check_avx_os_support_available] } {
1859 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
1860 # move instructions for moves from GPR to FPR.
1862 proc check_effective_target_powerpc64_no_dm { } {
1863 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
1864 # checks if we do not use direct moves, but use the old-fashioned
1865 # slower move-via-the-stack.
1866 return [check_no_messages_and_pattern powerpc64_no_dm \
1867 {\mmulld\M.*\mlfd} assembly {
1868 double f(long long x) { return x*x; }
1872 # Return 1 if the target supports executing power8 vector instructions, 0
1873 # otherwise. Cache the result.
1875 proc check_p8vector_hw_available { } {
1876 return [check_cached_effective_target p8vector_hw_available {
1877 # Some simulators are known to not support VSX/power8 instructions.
1878 # For now, disable on Darwin
1879 if { [istarget powerpc-*-eabi]
1880 || [istarget powerpc*-*-eabispe]
1881 || [istarget *-*-darwin*]} {
1884 set options "-mpower8-vector"
1885 check_runtime_nocache p8vector_hw_available {
1889 asm volatile ("xxlorc vs0,vs0,vs0");
1891 asm volatile ("xxlorc 0,0,0");
1900 # Return 1 if the target supports executing power9 vector instructions, 0
1901 # otherwise. Cache the result.
1903 proc check_p9vector_hw_available { } {
1904 return [check_cached_effective_target p9vector_hw_available {
1905 # Some simulators are known to not support VSX/power8/power9
1906 # instructions. For now, disable on Darwin.
1907 if { [istarget powerpc-*-eabi]
1908 || [istarget powerpc*-*-eabispe]
1909 || [istarget *-*-darwin*]} {
1912 set options "-mpower9-vector"
1913 check_runtime_nocache p9vector_hw_available {
1917 vector double v = (vector double) { 0.0, 0.0 };
1918 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1926 # Return 1 if the target supports executing power9 modulo instructions, 0
1927 # otherwise. Cache the result.
1929 proc check_p9modulo_hw_available { } {
1930 return [check_cached_effective_target p9modulo_hw_available {
1931 # Some simulators are known to not support VSX/power8/power9
1932 # instructions. For now, disable on Darwin.
1933 if { [istarget powerpc-*-eabi]
1934 || [istarget powerpc*-*-eabispe]
1935 || [istarget *-*-darwin*]} {
1938 set options "-mmodulo"
1939 check_runtime_nocache p9modulo_hw_available {
1942 int i = 5, j = 3, r = -1;
1943 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1951 # Return 1 if the target supports executing __float128 on PowerPC via software
1952 # emulation, 0 otherwise. Cache the result.
1954 proc check_ppc_float128_sw_available { } {
1955 return [check_cached_effective_target ppc_float128_sw_available {
1956 # Some simulators are known to not support VSX/power8/power9
1957 # instructions. For now, disable on Darwin.
1958 if { [istarget powerpc-*-eabi]
1959 || [istarget powerpc*-*-eabispe]
1960 || [istarget *-*-darwin*]} {
1963 set options "-mfloat128 -mvsx"
1964 check_runtime_nocache ppc_float128_sw_available {
1965 volatile __float128 x = 1.0q;
1966 volatile __float128 y = 2.0q;
1969 __float128 z = x + y;
1977 # Return 1 if the target supports executing __float128 on PowerPC via power9
1978 # hardware instructions, 0 otherwise. Cache the result.
1980 proc check_ppc_float128_hw_available { } {
1981 return [check_cached_effective_target ppc_float128_hw_available {
1982 # Some simulators are known to not support VSX/power8/power9
1983 # instructions. For now, disable on Darwin.
1984 if { [istarget powerpc-*-eabi]
1985 || [istarget powerpc*-*-eabispe]
1986 || [istarget *-*-darwin*]} {
1989 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
1990 check_runtime_nocache ppc_float128_hw_available {
1991 volatile __float128 x = 1.0q;
1992 volatile __float128 y = 2.0q;
1995 __float128 z = x + y;
1996 __float128 w = -1.0q;
1998 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1999 return ((z != 3.0q) || (z != w);
2006 # Return 1 if the target supports executing VSX instructions, 0
2007 # otherwise. Cache the result.
2009 proc check_vsx_hw_available { } {
2010 return [check_cached_effective_target vsx_hw_available {
2011 # Some simulators are known to not support VSX instructions.
2012 # For now, disable on Darwin
2013 if { [istarget powerpc-*-eabi]
2014 || [istarget powerpc*-*-eabispe]
2015 || [istarget *-*-darwin*]} {
2019 check_runtime_nocache vsx_hw_available {
2023 asm volatile ("xxlor vs0,vs0,vs0");
2025 asm volatile ("xxlor 0,0,0");
2034 # Return 1 if the target supports executing AltiVec instructions, 0
2035 # otherwise. Cache the result.
2037 proc check_vmx_hw_available { } {
2038 return [check_cached_effective_target vmx_hw_available {
2039 # Some simulators are known to not support VMX instructions.
2040 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2043 # Most targets don't require special flags for this test case, but
2044 # Darwin does. Just to be sure, make sure VSX is not enabled for
2045 # the altivec tests.
2046 if { [istarget *-*-darwin*]
2047 || [istarget *-*-aix*] } {
2048 set options "-maltivec -mno-vsx"
2050 set options "-mno-vsx"
2052 check_runtime_nocache vmx_hw_available {
2056 asm volatile ("vor v0,v0,v0");
2058 asm volatile ("vor 0,0,0");
2067 proc check_ppc_recip_hw_available { } {
2068 return [check_cached_effective_target ppc_recip_hw_available {
2069 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2070 # For now, disable on Darwin
2071 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2074 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2075 check_runtime_nocache ppc_recip_hw_available {
2076 volatile double d_recip, d_rsqrt, d_four = 4.0;
2077 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2080 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2081 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2082 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2083 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2091 # Return 1 if the target supports executing AltiVec and Cell PPU
2092 # instructions, 0 otherwise. Cache the result.
2094 proc check_effective_target_cell_hw { } {
2095 return [check_cached_effective_target cell_hw_available {
2096 # Some simulators are known to not support VMX and PPU instructions.
2097 if { [istarget powerpc-*-eabi*] } {
2100 # Most targets don't require special flags for this test
2101 # case, but Darwin and AIX do.
2102 if { [istarget *-*-darwin*]
2103 || [istarget *-*-aix*] } {
2104 set options "-maltivec -mcpu=cell"
2106 set options "-mcpu=cell"
2108 check_runtime_nocache cell_hw_available {
2112 asm volatile ("vor v0,v0,v0");
2113 asm volatile ("lvlx v0,r0,r0");
2115 asm volatile ("vor 0,0,0");
2116 asm volatile ("lvlx 0,0,0");
2125 # Return 1 if the target supports executing 64-bit instructions, 0
2126 # otherwise. Cache the result.
2128 proc check_effective_target_powerpc64 { } {
2129 global powerpc64_available_saved
2132 if [info exists powerpc64_available_saved] {
2133 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2135 set powerpc64_available_saved 0
2137 # Some simulators are known to not support powerpc64 instructions.
2138 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2139 verbose "check_effective_target_powerpc64 returning 0" 2
2140 return $powerpc64_available_saved
2143 # Set up, compile, and execute a test program containing a 64-bit
2144 # instruction. Include the current process ID in the file
2145 # names to prevent conflicts with invocations for multiple
2150 set f [open $src "w"]
2151 puts $f "int main() {"
2152 puts $f "#ifdef __MACH__"
2153 puts $f " asm volatile (\"extsw r0,r0\");"
2155 puts $f " asm volatile (\"extsw 0,0\");"
2157 puts $f " return 0; }"
2160 set opts "additional_flags=-mcpu=G5"
2162 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2163 set lines [${tool}_target_compile $src $exe executable "$opts"]
2166 if [string match "" $lines] then {
2167 # No error message, compilation succeeded.
2168 set result [${tool}_load "./$exe" "" ""]
2169 set status [lindex $result 0]
2170 remote_file build delete $exe
2171 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2173 if { $status == "pass" } then {
2174 set powerpc64_available_saved 1
2177 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2181 return $powerpc64_available_saved
2184 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2185 # complex float arguments. This affects gfortran tests that call cabsf
2186 # in libm built by an earlier compiler. Return 1 if libm uses the same
2187 # argument passing as the compiler under test, 0 otherwise.
2189 # When the target name changes, replace the cached result.
2191 proc check_effective_target_broken_cplxf_arg { } {
2192 return [check_cached_effective_target broken_cplxf_arg {
2193 # Skip the work for targets known not to be affected.
2194 if { ![istarget powerpc64-*-linux*] } {
2196 } elseif { ![is-effective-target lp64] } {
2199 check_runtime_nocache broken_cplxf_arg {
2200 #include <complex.h>
2201 extern void abort (void);
2202 float fabsf (float);
2203 float cabsf (_Complex float);
2210 if (fabsf (f - 5.0) > 0.0001)
2219 # Return 1 is this is a TI C6X target supporting C67X instructions
2220 proc check_effective_target_ti_c67x { } {
2221 return [check_no_compiler_messages ti_c67x assembly {
2222 #if !defined(_TMS320C6700)
2223 #error !_TMS320C6700
2228 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2229 proc check_effective_target_ti_c64xp { } {
2230 return [check_no_compiler_messages ti_c64xp assembly {
2231 #if !defined(_TMS320C6400_PLUS)
2232 #error !_TMS320C6400_PLUS
2238 proc check_alpha_max_hw_available { } {
2239 return [check_runtime alpha_max_hw_available {
2240 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2244 # Returns true iff the FUNCTION is available on the target system.
2245 # (This is essentially a Tcl implementation of Autoconf's
2248 proc check_function_available { function } {
2249 return [check_no_compiler_messages ${function}_available \
2255 int main () { $function (); }
2259 # Returns true iff "fork" is available on the target system.
2261 proc check_fork_available {} {
2262 return [check_function_available "fork"]
2265 # Returns true iff "mkfifo" is available on the target system.
2267 proc check_mkfifo_available {} {
2268 if { [istarget *-*-cygwin*] } {
2269 # Cygwin has mkfifo, but support is incomplete.
2273 return [check_function_available "mkfifo"]
2276 # Returns true iff "__cxa_atexit" is used on the target system.
2278 proc check_cxa_atexit_available { } {
2279 return [check_cached_effective_target cxa_atexit_available {
2280 if { [istarget hppa*-*-hpux10*] } {
2281 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2283 } elseif { [istarget *-*-vxworks] } {
2284 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2287 check_runtime_nocache cxa_atexit_available {
2290 static unsigned int count;
2307 Y() { f(); count = 2; }
2316 int main() { return 0; }
2322 proc check_effective_target_objc2 { } {
2323 return [check_no_compiler_messages objc2 object {
2332 proc check_effective_target_next_runtime { } {
2333 return [check_no_compiler_messages objc2 object {
2334 #ifdef __NEXT_RUNTIME__
2337 #error !__NEXT_RUNTIME__
2342 # Return 1 if we're generating 32-bit code using default options, 0
2345 proc check_effective_target_ilp32 { } {
2346 return [check_no_compiler_messages ilp32 object {
2347 int dummy[sizeof (int) == 4
2348 && sizeof (void *) == 4
2349 && sizeof (long) == 4 ? 1 : -1];
2353 # Return 1 if we're generating ia32 code using default options, 0
2356 proc check_effective_target_ia32 { } {
2357 return [check_no_compiler_messages ia32 object {
2358 int dummy[sizeof (int) == 4
2359 && sizeof (void *) == 4
2360 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2364 # Return 1 if we're generating x32 code using default options, 0
2367 proc check_effective_target_x32 { } {
2368 return [check_no_compiler_messages x32 object {
2369 int dummy[sizeof (int) == 4
2370 && sizeof (void *) == 4
2371 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2375 # Return 1 if we're generating 32-bit integers using default
2376 # options, 0 otherwise.
2378 proc check_effective_target_int32 { } {
2379 return [check_no_compiler_messages int32 object {
2380 int dummy[sizeof (int) == 4 ? 1 : -1];
2384 # Return 1 if we're generating 32-bit or larger integers using default
2385 # options, 0 otherwise.
2387 proc check_effective_target_int32plus { } {
2388 return [check_no_compiler_messages int32plus object {
2389 int dummy[sizeof (int) >= 4 ? 1 : -1];
2393 # Return 1 if we're generating 32-bit or larger pointers using default
2394 # options, 0 otherwise.
2396 proc check_effective_target_ptr32plus { } {
2397 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2398 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2399 # cannot really hold a 32-bit address, so we always return false here.
2400 if { [istarget msp430-*-*] } {
2404 return [check_no_compiler_messages ptr32plus object {
2405 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2409 # Return 1 if we support 32-bit or larger array and structure sizes
2410 # using default options, 0 otherwise. Avoid false positive on
2411 # targets with 20 or 24 bit address spaces.
2413 proc check_effective_target_size32plus { } {
2414 return [check_no_compiler_messages size32plus object {
2415 char dummy[16777217L];
2419 # Returns 1 if we're generating 16-bit or smaller integers with the
2420 # default options, 0 otherwise.
2422 proc check_effective_target_int16 { } {
2423 return [check_no_compiler_messages int16 object {
2424 int dummy[sizeof (int) < 4 ? 1 : -1];
2428 # Return 1 if we're generating 64-bit code using default options, 0
2431 proc check_effective_target_lp64 { } {
2432 return [check_no_compiler_messages lp64 object {
2433 int dummy[sizeof (int) == 4
2434 && sizeof (void *) == 8
2435 && sizeof (long) == 8 ? 1 : -1];
2439 # Return 1 if we're generating 64-bit code using default llp64 options,
2442 proc check_effective_target_llp64 { } {
2443 return [check_no_compiler_messages llp64 object {
2444 int dummy[sizeof (int) == 4
2445 && sizeof (void *) == 8
2446 && sizeof (long long) == 8
2447 && sizeof (long) == 4 ? 1 : -1];
2451 # Return 1 if long and int have different sizes,
2454 proc check_effective_target_long_neq_int { } {
2455 return [check_no_compiler_messages long_ne_int object {
2456 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2460 # Return 1 if the target supports long double larger than double,
2463 proc check_effective_target_large_long_double { } {
2464 return [check_no_compiler_messages large_long_double object {
2465 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2469 # Return 1 if the target supports double larger than float,
2472 proc check_effective_target_large_double { } {
2473 return [check_no_compiler_messages large_double object {
2474 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2478 # Return 1 if the target supports long double of 128 bits,
2481 proc check_effective_target_longdouble128 { } {
2482 return [check_no_compiler_messages longdouble128 object {
2483 int dummy[sizeof(long double) == 16 ? 1 : -1];
2487 # Return 1 if the target supports double of 64 bits,
2490 proc check_effective_target_double64 { } {
2491 return [check_no_compiler_messages double64 object {
2492 int dummy[sizeof(double) == 8 ? 1 : -1];
2496 # Return 1 if the target supports double of at least 64 bits,
2499 proc check_effective_target_double64plus { } {
2500 return [check_no_compiler_messages double64plus object {
2501 int dummy[sizeof(double) >= 8 ? 1 : -1];
2505 # Return 1 if the target supports 'w' suffix on floating constant
2508 proc check_effective_target_has_w_floating_suffix { } {
2510 if [check_effective_target_c++] {
2511 append opts "-std=gnu++03"
2513 return [check_no_compiler_messages w_fp_suffix object {
2518 # Return 1 if the target supports 'q' suffix on floating constant
2521 proc check_effective_target_has_q_floating_suffix { } {
2523 if [check_effective_target_c++] {
2524 append opts "-std=gnu++03"
2526 return [check_no_compiler_messages q_fp_suffix object {
2531 # Return 1 if the target supports the _FloatN / _FloatNx type
2532 # indicated in the function name, 0 otherwise.
2534 proc check_effective_target_float16 {} {
2535 return [check_no_compiler_messages_nocache float16 object {
2537 } [add_options_for_float16 ""]]
2540 proc check_effective_target_float32 {} {
2541 return [check_no_compiler_messages_nocache float32 object {
2543 } [add_options_for_float32 ""]]
2546 proc check_effective_target_float64 {} {
2547 return [check_no_compiler_messages_nocache float64 object {
2549 } [add_options_for_float64 ""]]
2552 proc check_effective_target_float128 {} {
2553 return [check_no_compiler_messages_nocache float128 object {
2555 } [add_options_for_float128 ""]]
2558 proc check_effective_target_float32x {} {
2559 return [check_no_compiler_messages_nocache float32x object {
2561 } [add_options_for_float32x ""]]
2564 proc check_effective_target_float64x {} {
2565 return [check_no_compiler_messages_nocache float64x object {
2567 } [add_options_for_float64x ""]]
2570 proc check_effective_target_float128x {} {
2571 return [check_no_compiler_messages_nocache float128x object {
2573 } [add_options_for_float128x ""]]
2576 # Likewise, but runtime support for any special options used as well
2577 # as compile-time support is required.
2579 proc check_effective_target_float16_runtime {} {
2580 return [check_effective_target_float16]
2583 proc check_effective_target_float32_runtime {} {
2584 return [check_effective_target_float32]
2587 proc check_effective_target_float64_runtime {} {
2588 return [check_effective_target_float64]
2591 proc check_effective_target_float128_runtime {} {
2592 if { ![check_effective_target_float128] } {
2595 if { [istarget powerpc*-*-*] } {
2596 return [check_effective_target_base_quadfloat_support]
2601 proc check_effective_target_float32x_runtime {} {
2602 return [check_effective_target_float32x]
2605 proc check_effective_target_float64x_runtime {} {
2606 if { ![check_effective_target_float64x] } {
2609 if { [istarget powerpc*-*-*] } {
2610 return [check_effective_target_base_quadfloat_support]
2615 proc check_effective_target_float128x_runtime {} {
2616 return [check_effective_target_float128x]
2619 # Return 1 if the target hardware supports any options added for
2620 # _FloatN and _FloatNx types, 0 otherwise.
2622 proc check_effective_target_floatn_nx_runtime {} {
2623 if { [istarget powerpc*-*-aix*] } {
2626 if { [istarget powerpc*-*-*] } {
2627 return [check_effective_target_base_quadfloat_support]
2632 # Add options needed to use the _FloatN / _FloatNx type indicated in
2633 # the function name.
2635 proc add_options_for_float16 { flags } {
2636 if { [istarget arm*-*-*] } {
2637 return "$flags -mfp16-format=ieee"
2642 proc add_options_for_float32 { flags } {
2646 proc add_options_for_float64 { flags } {
2650 proc add_options_for_float128 { flags } {
2651 return [add_options_for___float128 "$flags"]
2654 proc add_options_for_float32x { flags } {
2658 proc add_options_for_float64x { flags } {
2659 return [add_options_for___float128 "$flags"]
2662 proc add_options_for_float128x { flags } {
2666 # Return 1 if the target supports __float128,
2669 proc check_effective_target___float128 { } {
2670 if { [istarget powerpc*-*-*] } {
2671 return [check_ppc_float128_sw_available]
2673 if { [istarget ia64-*-*]
2674 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2680 proc add_options_for___float128 { flags } {
2681 if { [istarget powerpc*-*-*] } {
2682 return "$flags -mfloat128 -mvsx"
2687 # Return 1 if the target supports any special run-time requirements
2688 # for __float128 or _Float128,
2691 proc check_effective_target_base_quadfloat_support { } {
2692 if { [istarget powerpc*-*-*] } {
2693 return [check_vsx_hw_available]
2698 # Return 1 if the target supports compiling fixed-point,
2701 proc check_effective_target_fixed_point { } {
2702 return [check_no_compiler_messages fixed_point object {
2703 _Sat _Fract x; _Sat _Accum y;
2707 # Return 1 if the target supports compiling decimal floating point,
2710 proc check_effective_target_dfp_nocache { } {
2711 verbose "check_effective_target_dfp_nocache: compiling source" 2
2712 set ret [check_no_compiler_messages_nocache dfp object {
2713 float x __attribute__((mode(DD)));
2715 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2719 proc check_effective_target_dfprt_nocache { } {
2720 return [check_runtime_nocache dfprt {
2721 typedef float d64 __attribute__((mode(DD)));
2722 d64 x = 1.2df, y = 2.3dd, z;
2723 int main () { z = x + y; return 0; }
2727 # Return 1 if the target supports compiling Decimal Floating Point,
2730 # This won't change for different subtargets so cache the result.
2732 proc check_effective_target_dfp { } {
2733 return [check_cached_effective_target dfp {
2734 check_effective_target_dfp_nocache
2738 # Return 1 if the target supports linking and executing Decimal Floating
2739 # Point, 0 otherwise.
2741 # This won't change for different subtargets so cache the result.
2743 proc check_effective_target_dfprt { } {
2744 return [check_cached_effective_target dfprt {
2745 check_effective_target_dfprt_nocache
2749 proc check_effective_target_powerpc_popcntb_ok { } {
2750 return [check_cached_effective_target powerpc_popcntb_ok {
2752 # Disable on Darwin.
2753 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2756 check_runtime_nocache powerpc_popcntb_ok {
2758 volatile int a = 0x12345678;
2761 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2769 # Return 1 if the target supports executing DFP hardware instructions,
2770 # 0 otherwise. Cache the result.
2772 proc check_dfp_hw_available { } {
2773 return [check_cached_effective_target dfp_hw_available {
2774 # For now, disable on Darwin
2775 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2778 check_runtime_nocache dfp_hw_available {
2779 volatile _Decimal64 r;
2780 volatile _Decimal64 a = 4.0DD;
2781 volatile _Decimal64 b = 2.0DD;
2784 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2785 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2786 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2787 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2790 } "-mcpu=power6 -mhard-float"
2795 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2797 proc check_effective_target_ucn_nocache { } {
2798 # -std=c99 is only valid for C
2799 if [check_effective_target_c] {
2800 set ucnopts "-std=c99"
2804 verbose "check_effective_target_ucn_nocache: compiling source" 2
2805 set ret [check_no_compiler_messages_nocache ucn object {
2808 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2812 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2814 # This won't change for different subtargets, so cache the result.
2816 proc check_effective_target_ucn { } {
2817 return [check_cached_effective_target ucn {
2818 check_effective_target_ucn_nocache
2822 # Return 1 if the target needs a command line argument to enable a SIMD
2825 proc check_effective_target_vect_cmdline_needed { } {
2826 global et_vect_cmdline_needed_saved
2827 global et_vect_cmdline_needed_target_name
2829 if { ![info exists et_vect_cmdline_needed_target_name] } {
2830 set et_vect_cmdline_needed_target_name ""
2833 # If the target has changed since we set the cached value, clear it.
2834 set current_target [current_target_name]
2835 if { $current_target != $et_vect_cmdline_needed_target_name } {
2836 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2837 set et_vect_cmdline_needed_target_name $current_target
2838 if { [info exists et_vect_cmdline_needed_saved] } {
2839 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2840 unset et_vect_cmdline_needed_saved
2844 if [info exists et_vect_cmdline_needed_saved] {
2845 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2847 set et_vect_cmdline_needed_saved 1
2848 if { [istarget alpha*-*-*]
2849 || [istarget ia64-*-*]
2850 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
2851 && ![is-effective-target ia32])
2852 || ([istarget powerpc*-*-*]
2853 && ([check_effective_target_powerpc_spe]
2854 || [check_effective_target_powerpc_altivec]))
2855 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2856 || [istarget spu-*-*]
2857 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2858 || [istarget aarch64*-*-*] } {
2859 set et_vect_cmdline_needed_saved 0
2863 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2864 return $et_vect_cmdline_needed_saved
2867 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2869 # This won't change for different subtargets so cache the result.
2871 proc check_effective_target_vect_int { } {
2872 global et_vect_int_saved
2875 if [info exists et_vect_int_saved($et_index)] {
2876 verbose "check_effective_target_vect_int: using cached result" 2
2878 set et_vect_int_saved($et_index) 0
2879 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2880 || ([istarget powerpc*-*-*]
2881 && ![istarget powerpc-*-linux*paired*])
2882 || [istarget spu-*-*]
2883 || [istarget sparc*-*-*]
2884 || [istarget alpha*-*-*]
2885 || [istarget ia64-*-*]
2886 || [istarget aarch64*-*-*]
2887 || [check_effective_target_arm32]
2888 || ([istarget mips*-*-*]
2889 && ([et-is-effective-target mips_loongson]
2890 || [et-is-effective-target mips_msa])) } {
2891 set et_vect_int_saved($et_index) 1
2895 verbose "check_effective_target_vect_int:\
2896 returning $et_vect_int_saved($et_index)" 2
2897 return $et_vect_int_saved($et_index)
2900 # Return 1 if the target supports signed int->float conversion
2903 proc check_effective_target_vect_intfloat_cvt { } {
2904 global et_vect_intfloat_cvt_saved
2907 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
2908 verbose "check_effective_target_vect_intfloat_cvt:\
2909 using cached result" 2
2911 set et_vect_intfloat_cvt_saved($et_index) 0
2912 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2913 || ([istarget powerpc*-*-*]
2914 && ![istarget powerpc-*-linux*paired*])
2915 || ([istarget arm*-*-*]
2916 && [check_effective_target_arm_neon_ok])
2917 || ([istarget mips*-*-*]
2918 && [et-is-effective-target mips_msa]) } {
2919 set et_vect_intfloat_cvt_saved($et_index) 1
2923 verbose "check_effective_target_vect_intfloat_cvt:\
2924 returning $et_vect_intfloat_cvt_saved($et_index)" 2
2925 return $et_vect_intfloat_cvt_saved($et_index)
2928 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2930 proc check_effective_target_int128 { } {
2931 return [check_no_compiler_messages int128 object {
2933 #ifndef __SIZEOF_INT128__
2942 # Return 1 if the target supports unsigned int->float conversion
2945 proc check_effective_target_vect_uintfloat_cvt { } {
2946 global et_vect_uintfloat_cvt_saved
2949 if [info exists et_vect_uintfloat_cvt_saved($et_index)] {
2950 verbose "check_effective_target_vect_uintfloat_cvt:\
2951 using cached result" 2
2953 set et_vect_uintfloat_cvt_saved($et_index) 0
2954 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2955 || ([istarget powerpc*-*-*]
2956 && ![istarget powerpc-*-linux*paired*])
2957 || [istarget aarch64*-*-*]
2958 || ([istarget arm*-*-*]
2959 && [check_effective_target_arm_neon_ok])
2960 || ([istarget mips*-*-*]
2961 && [et-is-effective-target mips_msa]) } {
2962 set et_vect_uintfloat_cvt_saved($et_index) 1
2966 verbose "check_effective_target_vect_uintfloat_cvt:\
2967 returning $et_vect_uintfloat_cvt_saved($et_index)" 2
2968 return $et_vect_uintfloat_cvt_saved($et_index)
2972 # Return 1 if the target supports signed float->int conversion
2975 proc check_effective_target_vect_floatint_cvt { } {
2976 global et_vect_floatint_cvt_saved
2979 if [info exists et_vect_floatint_cvt_saved($et_index)] {
2980 verbose "check_effective_target_vect_floatint_cvt:\
2981 using cached result" 2
2983 set et_vect_floatint_cvt_saved($et_index) 0
2984 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2985 || ([istarget powerpc*-*-*]
2986 && ![istarget powerpc-*-linux*paired*])
2987 || ([istarget arm*-*-*]
2988 && [check_effective_target_arm_neon_ok])
2989 || ([istarget mips*-*-*]
2990 && [et-is-effective-target mips_msa]) } {
2991 set et_vect_floatint_cvt_saved($et_index) 1
2995 verbose "check_effective_target_vect_floatint_cvt:\
2996 returning $et_vect_floatint_cvt_saved($et_index)" 2
2997 return $et_vect_floatint_cvt_saved($et_index)
3000 # Return 1 if the target supports unsigned float->int conversion
3003 proc check_effective_target_vect_floatuint_cvt { } {
3004 global et_vect_floatuint_cvt_saved
3007 if [info exists et_vect_floatuint_cvt_saved($et_index)] {
3008 verbose "check_effective_target_vect_floatuint_cvt:\
3009 using cached result" 2
3011 set et_vect_floatuint_cvt_saved($et_index) 0
3012 if { ([istarget powerpc*-*-*]
3013 && ![istarget powerpc-*-linux*paired*])
3014 || ([istarget arm*-*-*]
3015 && [check_effective_target_arm_neon_ok])
3016 || ([istarget mips*-*-*]
3017 && [et-is-effective-target mips_msa]) } {
3018 set et_vect_floatuint_cvt_saved($et_index) 1
3022 verbose "check_effective_target_vect_floatuint_cvt:\
3023 returning $et_vect_floatuint_cvt_saved($et_index)" 2
3024 return $et_vect_floatuint_cvt_saved($et_index)
3027 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3029 # This won't change for different subtargets so cache the result.
3031 proc check_effective_target_vect_simd_clones { } {
3032 global et_vect_simd_clones_saved
3035 if [info exists et_vect_simd_clones_saved($et_index)] {
3036 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3038 set et_vect_simd_clones_saved($et_index) 0
3039 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3040 # avx2 and avx512f clone. Only the right clone for the
3041 # specified arch will be chosen, but still we need to at least
3042 # be able to assemble avx512f.
3043 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3044 && [check_effective_target_avx512f]) } {
3045 set et_vect_simd_clones_saved($et_index) 1
3049 verbose "check_effective_target_vect_simd_clones:\
3050 returning $et_vect_simd_clones_saved($et_index)" 2
3051 return $et_vect_simd_clones_saved($et_index)
3054 # Return 1 if this is a AArch64 target supporting big endian
3055 proc check_effective_target_aarch64_big_endian { } {
3056 return [check_no_compiler_messages aarch64_big_endian assembly {
3057 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3058 #error !__aarch64__ || !__AARCH64EB__
3063 # Return 1 if this is a AArch64 target supporting little endian
3064 proc check_effective_target_aarch64_little_endian { } {
3065 if { ![istarget aarch64*-*-*] } {
3069 return [check_no_compiler_messages aarch64_little_endian assembly {
3070 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3076 # Return 1 if this is a compiler supporting ARC atomic operations
3077 proc check_effective_target_arc_atomic { } {
3078 return [check_no_compiler_messages arc_atomic assembly {
3079 #if !defined(__ARC_ATOMIC__)
3085 # Return 1 if this is an arm target using 32-bit instructions
3086 proc check_effective_target_arm32 { } {
3087 if { ![istarget arm*-*-*] } {
3091 return [check_no_compiler_messages arm32 assembly {
3092 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3093 #error !__arm || __thumb__ && !__thumb2__
3098 # Return 1 if this is an arm target not using Thumb
3099 proc check_effective_target_arm_nothumb { } {
3100 if { ![istarget arm*-*-*] } {
3104 return [check_no_compiler_messages arm_nothumb assembly {
3105 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3106 #error !__arm__ || __thumb || __thumb2__
3111 # Return 1 if this is a little-endian ARM target
3112 proc check_effective_target_arm_little_endian { } {
3113 if { ![istarget arm*-*-*] } {
3117 return [check_no_compiler_messages arm_little_endian assembly {
3118 #if !defined(__arm__) || !defined(__ARMEL__)
3119 #error !__arm__ || !__ARMEL__
3124 # Return 1 if this is an ARM target that only supports aligned vector accesses
3125 proc check_effective_target_arm_vect_no_misalign { } {
3126 if { ![istarget arm*-*-*] } {
3130 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3131 #if !defined(__arm__) \
3132 || (defined(__ARM_FEATURE_UNALIGNED) \
3133 && defined(__ARMEL__))
3134 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3140 # Return 1 if this is an ARM target supporting -mfpu=vfp
3141 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3144 proc check_effective_target_arm_vfp_ok { } {
3145 if { [check_effective_target_arm32] } {
3146 return [check_no_compiler_messages arm_vfp_ok object {
3148 } "-mfpu=vfp -mfloat-abi=softfp"]
3154 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3155 # -mfloat-abi=softfp.
3157 proc check_effective_target_arm_vfp3_ok { } {
3158 if { [check_effective_target_arm32] } {
3159 return [check_no_compiler_messages arm_vfp3_ok object {
3161 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3167 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3168 # -mfloat-abi=softfp.
3169 proc check_effective_target_arm_v8_vfp_ok {} {
3170 if { [check_effective_target_arm32] } {
3171 return [check_no_compiler_messages arm_v8_vfp_ok object {
3174 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3177 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3183 # Return 1 if this is an ARM target supporting -mfpu=vfp
3184 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3187 proc check_effective_target_arm_hard_vfp_ok { } {
3188 if { [check_effective_target_arm32]
3189 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3190 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3191 int main() { return 0;}
3192 } "-mfpu=vfp -mfloat-abi=hard"]
3198 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3199 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3200 # incompatible with these options. Also set et_arm_fp_flags to the
3201 # best options to add.
3203 proc check_effective_target_arm_fp_ok_nocache { } {
3204 global et_arm_fp_flags
3205 set et_arm_fp_flags ""
3206 if { [check_effective_target_arm32] } {
3207 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3208 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3210 #error __ARM_FP not defined
3213 set et_arm_fp_flags $flags
3222 proc check_effective_target_arm_fp_ok { } {
3223 return [check_cached_effective_target arm_fp_ok \
3224 check_effective_target_arm_fp_ok_nocache]
3227 # Add the options needed to define __ARM_FP. We need either
3228 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3229 # specified by the multilib, use it.
3231 proc add_options_for_arm_fp { flags } {
3232 if { ! [check_effective_target_arm_fp_ok] } {
3235 global et_arm_fp_flags
3236 return "$flags $et_arm_fp_flags"
3239 # Return 1 if this is an ARM target that supports DSP multiply with
3240 # current multilib flags.
3242 proc check_effective_target_arm_dsp { } {
3243 return [check_no_compiler_messages arm_dsp assembly {
3244 #ifndef __ARM_FEATURE_DSP
3251 # Return 1 if this is an ARM target that supports unaligned word/halfword
3252 # load/store instructions.
3254 proc check_effective_target_arm_unaligned { } {
3255 return [check_no_compiler_messages arm_unaligned assembly {
3256 #ifndef __ARM_FEATURE_UNALIGNED
3257 #error no unaligned support
3263 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3264 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3265 # incompatible with these options. Also set et_arm_crypto_flags to the
3266 # best options to add.
3268 proc check_effective_target_arm_crypto_ok_nocache { } {
3269 global et_arm_crypto_flags
3270 set et_arm_crypto_flags ""
3271 if { [check_effective_target_arm_v8_neon_ok] } {
3272 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3273 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3274 #include "arm_neon.h"
3276 foo (uint8x16_t a, uint8x16_t b)
3278 return vaeseq_u8 (a, b);
3281 set et_arm_crypto_flags $flags
3290 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3292 proc check_effective_target_arm_crypto_ok { } {
3293 return [check_cached_effective_target arm_crypto_ok \
3294 check_effective_target_arm_crypto_ok_nocache]
3297 # Add options for crypto extensions.
3298 proc add_options_for_arm_crypto { flags } {
3299 if { ! [check_effective_target_arm_crypto_ok] } {
3302 global et_arm_crypto_flags
3303 return "$flags $et_arm_crypto_flags"
3306 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3307 # or -mfloat-abi=hard, but if one is already specified by the
3308 # multilib, use it. Similarly, if a -mfpu option already enables
3309 # NEON, do not add -mfpu=neon.
3311 proc add_options_for_arm_neon { flags } {
3312 if { ! [check_effective_target_arm_neon_ok] } {
3315 global et_arm_neon_flags
3316 return "$flags $et_arm_neon_flags"
3319 proc add_options_for_arm_v8_vfp { flags } {
3320 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3323 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3326 proc add_options_for_arm_v8_neon { flags } {
3327 if { ! [check_effective_target_arm_v8_neon_ok] } {
3330 global et_arm_v8_neon_flags
3331 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3334 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3335 # options for AArch64 and for ARM.
3337 proc add_options_for_arm_v8_1a_neon { flags } {
3338 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3341 global et_arm_v8_1a_neon_flags
3342 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
3345 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3346 # Also adds the ARMv8 FP options for ARM and for AArch64.
3348 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3349 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3352 global et_arm_v8_2a_fp16_scalar_flags
3353 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3356 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3357 # the ARMv8 NEON options for ARM and for AArch64.
3359 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3360 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3363 global et_arm_v8_2a_fp16_neon_flags
3364 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3367 proc add_options_for_arm_crc { flags } {
3368 if { ! [check_effective_target_arm_crc_ok] } {
3371 global et_arm_crc_flags
3372 return "$flags $et_arm_crc_flags"
3375 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3376 # or -mfloat-abi=hard, but if one is already specified by the
3377 # multilib, use it. Similarly, if a -mfpu option already enables
3378 # NEON, do not add -mfpu=neon.
3380 proc add_options_for_arm_neonv2 { flags } {
3381 if { ! [check_effective_target_arm_neonv2_ok] } {
3384 global et_arm_neonv2_flags
3385 return "$flags $et_arm_neonv2_flags"
3388 # Add the options needed for vfp3.
3389 proc add_options_for_arm_vfp3 { flags } {
3390 if { ! [check_effective_target_arm_vfp3_ok] } {
3393 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3396 # Return 1 if this is an ARM target supporting -mfpu=neon
3397 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3398 # incompatible with these options. Also set et_arm_neon_flags to the
3399 # best options to add.
3401 proc check_effective_target_arm_neon_ok_nocache { } {
3402 global et_arm_neon_flags
3403 set et_arm_neon_flags ""
3404 if { [check_effective_target_arm32] } {
3405 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
3406 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3408 #ifndef __ARM_NEON__
3411 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3412 configured for -mcpu=arm926ej-s, for example. */
3413 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3414 #error Architecture does not support NEON.
3417 set et_arm_neon_flags $flags
3426 proc check_effective_target_arm_neon_ok { } {
3427 return [check_cached_effective_target arm_neon_ok \
3428 check_effective_target_arm_neon_ok_nocache]
3431 proc check_effective_target_arm_crc_ok_nocache { } {
3432 global et_arm_crc_flags
3433 set et_arm_crc_flags "-march=armv8-a+crc"
3434 return [check_no_compiler_messages_nocache arm_crc_ok object {
3435 #if !defined (__ARM_FEATURE_CRC32)
3438 } "$et_arm_crc_flags"]
3441 proc check_effective_target_arm_crc_ok { } {
3442 return [check_cached_effective_target arm_crc_ok \
3443 check_effective_target_arm_crc_ok_nocache]
3446 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3447 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3448 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3449 # the best options to add.
3451 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3452 global et_arm_neon_fp16_flags
3453 global et_arm_neon_flags
3454 set et_arm_neon_fp16_flags ""
3455 if { [check_effective_target_arm32]
3456 && [check_effective_target_arm_neon_ok] } {
3457 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3458 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3459 "-mfp16-format=ieee"
3460 "-mfloat-abi=softfp -mfp16-format=ieee"
3461 "-mfpu=neon-fp16 -mfp16-format=ieee"
3462 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3463 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3464 #include "arm_neon.h"
3466 foo (float32x4_t arg)
3468 return vcvt_f16_f32 (arg);
3470 } "$et_arm_neon_flags $flags"] } {
3471 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3480 proc check_effective_target_arm_neon_fp16_ok { } {
3481 return [check_cached_effective_target arm_neon_fp16_ok \
3482 check_effective_target_arm_neon_fp16_ok_nocache]
3485 proc check_effective_target_arm_neon_fp16_hw { } {
3486 if {! [check_effective_target_arm_neon_fp16_ok] } {
3489 global et_arm_neon_fp16_flags
3490 check_runtime_nocache arm_neon_fp16_hw {
3492 main (int argc, char **argv)
3494 asm ("vcvt.f32.f16 q1, d0");
3497 } $et_arm_neon_fp16_flags
3500 proc add_options_for_arm_neon_fp16 { flags } {
3501 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3504 global et_arm_neon_fp16_flags
3505 return "$flags $et_arm_neon_fp16_flags"
3508 # Return 1 if this is an ARM target supporting the FP16 alternative
3509 # format. Some multilibs may be incompatible with the options needed. Also
3510 # set et_arm_neon_fp16_flags to the best options to add.
3512 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3513 global et_arm_neon_fp16_flags
3514 set et_arm_neon_fp16_flags ""
3515 if { [check_effective_target_arm32] } {
3516 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3517 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3518 if { [check_no_compiler_messages_nocache \
3519 arm_fp16_alternative_ok object {
3520 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3521 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3523 } "$flags -mfp16-format=alternative"] } {
3524 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3533 proc check_effective_target_arm_fp16_alternative_ok { } {
3534 return [check_cached_effective_target arm_fp16_alternative_ok \
3535 check_effective_target_arm_fp16_alternative_ok_nocache]
3538 # Return 1 if this is an ARM target supports specifying the FP16 none
3539 # format. Some multilibs may be incompatible with the options needed.
3541 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3542 if { [check_effective_target_arm32] } {
3543 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3544 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3545 if { [check_no_compiler_messages_nocache \
3546 arm_fp16_none_ok object {
3547 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3548 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3550 #if defined (__ARM_FP16_FORMAT_IEEE)
3551 #error __ARM_FP16_FORMAT_IEEE defined
3553 } "$flags -mfp16-format=none"] } {
3562 proc check_effective_target_arm_fp16_none_ok { } {
3563 return [check_cached_effective_target arm_fp16_none_ok \
3564 check_effective_target_arm_fp16_none_ok_nocache]
3567 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3568 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3569 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3570 # best options to add.
3572 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3573 global et_arm_v8_neon_flags
3574 set et_arm_v8_neon_flags ""
3575 if { [check_effective_target_arm32] } {
3576 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3577 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3579 #error not armv8 or later
3581 #include "arm_neon.h"
3585 __asm__ volatile ("vrintn.f32 q0, q0");
3587 } "$flags -march=armv8-a"] } {
3588 set et_arm_v8_neon_flags $flags
3597 proc check_effective_target_arm_v8_neon_ok { } {
3598 return [check_cached_effective_target arm_v8_neon_ok \
3599 check_effective_target_arm_v8_neon_ok_nocache]
3602 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3603 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3604 # incompatible with these options. Also set et_arm_neonv2_flags to the
3605 # best options to add.
3607 proc check_effective_target_arm_neonv2_ok_nocache { } {
3608 global et_arm_neonv2_flags
3609 global et_arm_neon_flags
3610 set et_arm_neonv2_flags ""
3611 if { [check_effective_target_arm32]
3612 && [check_effective_target_arm_neon_ok] } {
3613 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3614 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3615 #include "arm_neon.h"
3617 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3619 return vfma_f32 (a, b, c);
3621 } "$et_arm_neon_flags $flags"] } {
3622 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3631 proc check_effective_target_arm_neonv2_ok { } {
3632 return [check_cached_effective_target arm_neonv2_ok \
3633 check_effective_target_arm_neonv2_ok_nocache]
3636 # Add the options needed for VFP FP16 support. We need either
3637 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3638 # the multilib, use it.
3640 proc add_options_for_arm_fp16 { flags } {
3641 if { ! [check_effective_target_arm_fp16_ok] } {
3644 global et_arm_fp16_flags
3645 return "$flags $et_arm_fp16_flags"
3648 # Add the options needed to enable support for IEEE format
3649 # half-precision support. This is valid for ARM targets.
3651 proc add_options_for_arm_fp16_ieee { flags } {
3652 if { ! [check_effective_target_arm_fp16_ok] } {
3655 global et_arm_fp16_flags
3656 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3659 # Add the options needed to enable support for ARM Alternative format
3660 # half-precision support. This is valid for ARM targets.
3662 proc add_options_for_arm_fp16_alternative { flags } {
3663 if { ! [check_effective_target_arm_fp16_ok] } {
3666 global et_arm_fp16_flags
3667 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3670 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3671 # Skip multilibs that are incompatible with these options and set
3672 # et_arm_fp16_flags to the best options to add. This test is valid for
3675 proc check_effective_target_arm_fp16_ok_nocache { } {
3676 global et_arm_fp16_flags
3677 set et_arm_fp16_flags ""
3678 if { ! [check_effective_target_arm32] } {
3682 [list "" { *-*-* } { "-mfpu=*" } \
3683 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3684 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3685 # Multilib flags would override -mfpu.
3688 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3689 # Must generate floating-point instructions.
3692 if [check_effective_target_arm_hf_eabi] {
3693 # Use existing float-abi and force an fpu which supports fp16
3694 set et_arm_fp16_flags "-mfpu=vfpv4"
3697 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3698 # The existing -mfpu value is OK; use it, but add softfp.
3699 set et_arm_fp16_flags "-mfloat-abi=softfp"
3702 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3703 # macro to check for this support.
3704 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3705 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3708 set et_arm_fp16_flags "$flags"
3715 proc check_effective_target_arm_fp16_ok { } {
3716 return [check_cached_effective_target arm_fp16_ok \
3717 check_effective_target_arm_fp16_ok_nocache]
3720 # Return 1 if the target supports executing VFP FP16 instructions, 0
3721 # otherwise. This test is valid for ARM only.
3723 proc check_effective_target_arm_fp16_hw { } {
3724 if {! [check_effective_target_arm_fp16_ok] } {
3727 global et_arm_fp16_flags
3728 check_runtime_nocache arm_fp16_hw {
3730 main (int argc, char **argv)
3734 asm ("vcvtb.f32.f16 %0, %1"
3735 : "=w" (r) : "w" (a)
3736 : /* No clobbers. */);
3737 return (r == 1.0) ? 0 : 1;
3739 } "$et_arm_fp16_flags -mfp16-format=ieee"
3742 # Creates a series of routines that return 1 if the given architecture
3743 # can be selected and a routine to give the flags to select that architecture
3744 # Note: Extra flags may be added to disable options from newer compilers
3745 # (Thumb in particular - but others may be added in the future).
3746 # -march=armv7ve is special and is handled explicitly after this loop because
3747 # it needs more than one predefine check to identify.
3748 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3749 # /* { dg-add-options arm_arch_v5 } */
3750 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3751 foreach { armfunc armflag armdef } {
3752 v4 "-march=armv4 -marm" __ARM_ARCH_4__
3753 v4t "-march=armv4t" __ARM_ARCH_4T__
3754 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3755 v5t "-march=armv5t" __ARM_ARCH_5T__
3756 v5te "-march=armv5te" __ARM_ARCH_5TE__
3757 v6 "-march=armv6" __ARM_ARCH_6__
3758 v6k "-march=armv6k" __ARM_ARCH_6K__
3759 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3760 v6z "-march=armv6z" __ARM_ARCH_6Z__
3761 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
3762 v7a "-march=armv7-a" __ARM_ARCH_7A__
3763 v7r "-march=armv7-r" __ARM_ARCH_7R__
3764 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3765 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3766 v8a "-march=armv8-a" __ARM_ARCH_8A__
3767 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
3768 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
3769 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft" __ARM_ARCH_8M_BASE__
3770 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
3771 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3772 proc check_effective_target_arm_arch_FUNC_ok { } {
3773 if { [ string match "*-marm*" "FLAG" ] &&
3774 ![check_effective_target_arm_arm_ok] } {
3777 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3784 proc add_options_for_arm_arch_FUNC { flags } {
3785 return "$flags FLAG"
3788 proc check_effective_target_arm_arch_FUNC_multilib { } {
3789 return [check_runtime arm_arch_FUNC_multilib {
3795 } [add_options_for_arm_arch_FUNC ""]]
3800 # Same functions as above but for -march=armv7ve. To uniquely identify
3801 # -march=armv7ve we need to check for __ARM_ARCH_7A__ as well as
3802 # __ARM_FEATURE_IDIV otherwise it aliases with armv7-a.
3804 proc check_effective_target_arm_arch_v7ve_ok { } {
3805 if { [ string match "*-marm*" "-march=armv7ve" ] &&
3806 ![check_effective_target_arm_arm_ok] } {
3809 return [check_no_compiler_messages arm_arch_v7ve_ok assembly {
3810 #if !defined (__ARM_ARCH_7A__) || !defined (__ARM_FEATURE_IDIV)
3813 } "-march=armv7ve" ]
3816 proc add_options_for_arm_arch_v7ve { flags } {
3817 return "$flags -march=armv7ve"
3820 # Return 1 if this is an ARM target where -marm causes ARM to be
3823 proc check_effective_target_arm_arm_ok { } {
3824 return [check_no_compiler_messages arm_arm_ok assembly {
3825 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3826 #error !__arm__ || __thumb__ || __thumb2__
3832 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3835 proc check_effective_target_arm_thumb1_ok { } {
3836 return [check_no_compiler_messages arm_thumb1_ok assembly {
3837 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3838 #error !__arm__ || !__thumb__ || __thumb2__
3840 int foo (int i) { return i; }
3844 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3847 proc check_effective_target_arm_thumb2_ok { } {
3848 return [check_no_compiler_messages arm_thumb2_ok assembly {
3849 #if !defined(__thumb2__)
3852 int foo (int i) { return i; }
3856 # Return 1 if this is an ARM target where Thumb-1 is used without options
3857 # added by the test.
3859 proc check_effective_target_arm_thumb1 { } {
3860 return [check_no_compiler_messages arm_thumb1 assembly {
3861 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3862 #error !__arm__ || !__thumb__ || __thumb2__
3868 # Return 1 if this is an ARM target where Thumb-2 is used without options
3869 # added by the test.
3871 proc check_effective_target_arm_thumb2 { } {
3872 return [check_no_compiler_messages arm_thumb2 assembly {
3873 #if !defined(__thumb2__)
3880 # Return 1 if this is an ARM target where conditional execution is available.
3882 proc check_effective_target_arm_cond_exec { } {
3883 return [check_no_compiler_messages arm_cond_exec assembly {
3884 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3891 # Return 1 if this is an ARM cortex-M profile cpu
3893 proc check_effective_target_arm_cortex_m { } {
3894 if { ![istarget arm*-*-*] } {
3897 return [check_no_compiler_messages arm_cortex_m assembly {
3898 #if defined(__ARM_ARCH_ISA_ARM)
3899 #error __ARM_ARCH_ISA_ARM is defined
3905 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
3906 # used and MOVT/MOVW instructions to be available.
3908 proc check_effective_target_arm_thumb1_movt_ok {} {
3909 if [check_effective_target_arm_thumb1_ok] {
3910 return [check_no_compiler_messages arm_movt object {
3914 asm ("movt r0, #42");
3922 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
3923 # used and CBZ and CBNZ instructions are available.
3925 proc check_effective_target_arm_thumb1_cbz_ok {} {
3926 if [check_effective_target_arm_thumb1_ok] {
3927 return [check_no_compiler_messages arm_movt object {
3931 asm ("cbz r0, 2f\n2:");
3939 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
3942 proc check_effective_target_arm_cmse_ok {} {
3943 return [check_no_compiler_messages arm_cmse object {
3952 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3954 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3955 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3956 int foo (void) { return 0; }
3957 } "-O2 -mprint-tune-info" ]
3960 # Return 1 if the target supports executing NEON instructions, 0
3961 # otherwise. Cache the result.
3963 proc check_effective_target_arm_neon_hw { } {
3964 return [check_runtime arm_neon_hw_available {
3968 long long a = 0, b = 1;
3969 asm ("vorr %P0, %P1, %P2"
3971 : "0" (a), "w" (b));
3974 } [add_options_for_arm_neon ""]]
3977 proc check_effective_target_arm_neonv2_hw { } {
3978 return [check_runtime arm_neon_hwv2_available {
3979 #include "arm_neon.h"
3983 float32x2_t a, b, c;
3984 asm ("vfma.f32 %P0, %P1, %P2"
3986 : "w" (b), "w" (c));
3989 } [add_options_for_arm_neonv2 ""]]
3992 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
3993 # otherwise. The test is valid for AArch64 and ARM. Record the command
3994 # line options needed.
3996 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
3997 global et_arm_v8_1a_neon_flags
3998 set et_arm_v8_1a_neon_flags ""
4000 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4004 # Iterate through sets of options to find the compiler flags that
4005 # need to be added to the -march option. Start with the empty set
4006 # since AArch64 only needs the -march setting.
4007 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4008 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4009 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4010 #if !defined (__ARM_FEATURE_QRDMX)
4011 #error "__ARM_FEATURE_QRDMX not defined"
4013 } "$flags -march=armv8.1-a"] } {
4014 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
4022 proc check_effective_target_arm_v8_1a_neon_ok { } {
4023 return [check_cached_effective_target arm_v8_1a_neon_ok \
4024 check_effective_target_arm_v8_1a_neon_ok_nocache]
4027 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4028 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4029 # Record the command line options needed.
4031 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4032 global et_arm_v8_2a_fp16_scalar_flags
4033 set et_arm_v8_2a_fp16_scalar_flags ""
4035 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4039 # Iterate through sets of options to find the compiler flags that
4040 # need to be added to the -march option.
4041 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4042 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4043 if { [check_no_compiler_messages_nocache \
4044 arm_v8_2a_fp16_scalar_ok object {
4045 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4046 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4048 } "$flags -march=armv8.2-a+fp16"] } {
4049 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4057 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4058 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4059 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4062 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4063 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4064 # Record the command line options needed.
4066 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4067 global et_arm_v8_2a_fp16_neon_flags
4068 set et_arm_v8_2a_fp16_neon_flags ""
4070 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4074 # Iterate through sets of options to find the compiler flags that
4075 # need to be added to the -march option.
4076 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4077 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4078 if { [check_no_compiler_messages_nocache \
4079 arm_v8_2a_fp16_neon_ok object {
4080 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4081 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4083 } "$flags -march=armv8.2-a+fp16"] } {
4084 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4092 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4093 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4094 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4097 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4100 proc check_effective_target_arm_v8_neon_hw { } {
4101 return [check_runtime arm_v8_neon_hw_available {
4102 #include "arm_neon.h"
4106 float32x2_t a = { 1.0f, 2.0f };
4107 #ifdef __ARM_ARCH_ISA_A64
4108 asm ("frinta %0.2s, %1.2s"
4112 asm ("vrinta.f32 %P0, %P1"
4116 return a[0] == 2.0f;
4118 } [add_options_for_arm_v8_neon ""]]
4121 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4122 # otherwise. The test is valid for AArch64 and ARM.
4124 proc check_effective_target_arm_v8_1a_neon_hw { } {
4125 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4128 return [check_runtime arm_v8_1a_neon_hw_available {
4132 #ifdef __ARM_ARCH_ISA_A64
4133 __Int32x2_t a = {0, 1};
4134 __Int32x2_t b = {0, 2};
4137 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4140 : /* No clobbers. */);
4144 __simd64_int32_t a = {0, 1};
4145 __simd64_int32_t b = {0, 2};
4146 __simd64_int32_t result;
4148 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4151 : /* No clobbers. */);
4156 } [add_options_for_arm_v8_1a_neon ""]]
4159 # Return 1 if the target supports executing floating point instructions from
4160 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4163 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4164 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4167 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4174 #ifdef __ARM_ARCH_ISA_A64
4176 asm ("fabs %h0, %h1"
4179 : /* No clobbers. */);
4183 asm ("vabs.f16 %0, %1"
4186 : /* No clobbers. */);
4190 return (result == 1.0) ? 0 : 1;
4192 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4195 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4196 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4199 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4200 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4203 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4207 #ifdef __ARM_ARCH_ISA_A64
4209 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4210 __Float16x4_t result;
4212 asm ("fabs %0.4h, %1.4h"
4215 : /* No clobbers. */);
4219 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4220 __simd64_float16_t result;
4222 asm ("vabs.f16 %P0, %P1"
4225 : /* No clobbers. */);
4229 return (result[0] == 1.0) ? 0 : 1;
4231 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4234 # Return 1 if this is a ARM target with NEON enabled.
4236 proc check_effective_target_arm_neon { } {
4237 if { [check_effective_target_arm32] } {
4238 return [check_no_compiler_messages arm_neon object {
4239 #ifndef __ARM_NEON__
4250 proc check_effective_target_arm_neonv2 { } {
4251 if { [check_effective_target_arm32] } {
4252 return [check_no_compiler_messages arm_neon object {
4253 #ifndef __ARM_NEON__
4256 #ifndef __ARM_FEATURE_FMA
4268 # Return 1 if this is an ARM target with load acquire and store release
4269 # instructions for 8-, 16- and 32-bit types.
4271 proc check_effective_target_arm_acq_rel { } {
4272 return [check_no_compiler_messages arm_acq_rel object {
4274 load_acquire_store_release (void)
4276 asm ("lda r0, [r1]\n\t"
4282 : : : "r0", "memory");
4287 # Add the options needed for MIPS Paired-Single.
4289 proc add_options_for_mpaired_single { flags } {
4290 if { ! [check_effective_target_mpaired_single] } {
4293 return "$flags -mpaired-single"
4296 # Add the options needed for MIPS SIMD Architecture.
4298 proc add_options_for_mips_msa { flags } {
4299 if { ! [check_effective_target_mips_msa] } {
4302 return "$flags -mmsa"
4305 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4306 # the Loongson vector modes.
4308 proc check_effective_target_mips_loongson { } {
4309 return [check_no_compiler_messages loongson assembly {
4310 #if !defined(__mips_loongson_vector_rev)
4311 #error !__mips_loongson_vector_rev
4316 # Return 1 if this is a MIPS target that supports the legacy NAN.
4318 proc check_effective_target_mips_nanlegacy { } {
4319 return [check_no_compiler_messages nanlegacy assembly {
4321 int main () { return 0; }
4325 # Return 1 if an MSA program can be compiled to object
4327 proc check_effective_target_mips_msa { } {
4328 if ![check_effective_target_nomips16] {
4331 return [check_no_compiler_messages msa object {
4332 #if !defined(__mips_msa)
4333 #error "MSA NOT AVAIL"
4335 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4336 #error "MSA NOT AVAIL FOR ISA REV < 2"
4338 #if !defined(__mips_hard_float)
4339 #error "MSA HARD_FLOAT REQUIRED"
4341 #if __mips_fpr != 64
4342 #error "MSA 64-bit FPR REQUIRED"
4348 v8i16 v = __builtin_msa_ldi_h (1);
4356 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4359 proc check_effective_target_arm_eabi { } {
4360 return [check_no_compiler_messages arm_eabi object {
4361 #ifndef __ARM_EABI__
4369 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4370 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4372 proc check_effective_target_arm_hf_eabi { } {
4373 return [check_no_compiler_messages arm_hf_eabi object {
4374 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4375 #error not hard-float EABI
4382 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4383 # Some multilibs may be incompatible with this option.
4385 proc check_effective_target_arm_iwmmxt_ok { } {
4386 if { [check_effective_target_arm32] } {
4387 return [check_no_compiler_messages arm_iwmmxt_ok object {
4395 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4396 # for an ARM target.
4397 proc check_effective_target_arm_prefer_ldrd_strd { } {
4398 if { ![check_effective_target_arm32] } {
4402 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4403 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4407 # Return 1 if this is a PowerPC target supporting -meabi.
4409 proc check_effective_target_powerpc_eabi_ok { } {
4410 if { [istarget powerpc*-*-*] } {
4411 return [check_no_compiler_messages powerpc_eabi_ok object {
4419 # Return 1 if this is a PowerPC target with floating-point registers.
4421 proc check_effective_target_powerpc_fprs { } {
4422 if { [istarget powerpc*-*-*]
4423 || [istarget rs6000-*-*] } {
4424 return [check_no_compiler_messages powerpc_fprs object {
4436 # Return 1 if this is a PowerPC target with hardware double-precision
4439 proc check_effective_target_powerpc_hard_double { } {
4440 if { [istarget powerpc*-*-*]
4441 || [istarget rs6000-*-*] } {
4442 return [check_no_compiler_messages powerpc_hard_double object {
4454 # Return 1 if this is a PowerPC target supporting -maltivec.
4456 proc check_effective_target_powerpc_altivec_ok { } {
4457 if { ([istarget powerpc*-*-*]
4458 && ![istarget powerpc-*-linux*paired*])
4459 || [istarget rs6000-*-*] } {
4460 # AltiVec is not supported on AIX before 5.3.
4461 if { [istarget powerpc*-*-aix4*]
4462 || [istarget powerpc*-*-aix5.1*]
4463 || [istarget powerpc*-*-aix5.2*] } {
4466 return [check_no_compiler_messages powerpc_altivec_ok object {
4474 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4476 proc check_effective_target_powerpc_p8vector_ok { } {
4477 if { ([istarget powerpc*-*-*]
4478 && ![istarget powerpc-*-linux*paired*])
4479 || [istarget rs6000-*-*] } {
4480 # AltiVec is not supported on AIX before 5.3.
4481 if { [istarget powerpc*-*-aix4*]
4482 || [istarget powerpc*-*-aix5.1*]
4483 || [istarget powerpc*-*-aix5.2*] } {
4486 return [check_no_compiler_messages powerpc_p8vector_ok object {
4489 asm volatile ("xxlorc vs0,vs0,vs0");
4491 asm volatile ("xxlorc 0,0,0");
4495 } "-mpower8-vector"]
4501 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4503 proc check_effective_target_powerpc_p9vector_ok { } {
4504 if { ([istarget powerpc*-*-*]
4505 && ![istarget powerpc-*-linux*paired*])
4506 || [istarget rs6000-*-*] } {
4507 # AltiVec is not supported on AIX before 5.3.
4508 if { [istarget powerpc*-*-aix4*]
4509 || [istarget powerpc*-*-aix5.1*]
4510 || [istarget powerpc*-*-aix5.2*] } {
4513 return [check_no_compiler_messages powerpc_p9vector_ok object {
4516 vector double v = (vector double) { 0.0, 0.0 };
4517 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4520 } "-mpower9-vector"]
4526 # Return 1 if this is a PowerPC target supporting -mmodulo
4528 proc check_effective_target_powerpc_p9modulo_ok { } {
4529 if { ([istarget powerpc*-*-*]
4530 && ![istarget powerpc-*-linux*paired*])
4531 || [istarget rs6000-*-*] } {
4532 # AltiVec is not supported on AIX before 5.3.
4533 if { [istarget powerpc*-*-aix4*]
4534 || [istarget powerpc*-*-aix5.1*]
4535 || [istarget powerpc*-*-aix5.2*] } {
4538 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4540 int i = 5, j = 3, r = -1;
4541 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4550 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4551 # software emulation on power7/power8 systems or hardware support on power9.
4553 proc check_effective_target_powerpc_float128_sw_ok { } {
4554 if { ([istarget powerpc*-*-*]
4555 && ![istarget powerpc-*-linux*paired*])
4556 || [istarget rs6000-*-*] } {
4557 # AltiVec is not supported on AIX before 5.3.
4558 if { [istarget powerpc*-*-aix4*]
4559 || [istarget powerpc*-*-aix5.1*]
4560 || [istarget powerpc*-*-aix5.2*] } {
4563 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4564 volatile __float128 x = 1.0q;
4565 volatile __float128 y = 2.0q;
4567 __float128 z = x + y;
4570 } "-mfloat128 -mvsx"]
4576 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4577 # support on power9.
4579 proc check_effective_target_powerpc_float128_hw_ok { } {
4580 if { ([istarget powerpc*-*-*]
4581 && ![istarget powerpc-*-linux*paired*])
4582 || [istarget rs6000-*-*] } {
4583 # AltiVec is not supported on AIX before 5.3.
4584 if { [istarget powerpc*-*-aix4*]
4585 || [istarget powerpc*-*-aix5.1*]
4586 || [istarget powerpc*-*-aix5.2*] } {
4589 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4590 volatile __float128 x = 1.0q;
4591 volatile __float128 y = 2.0q;
4594 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4597 } "-mfloat128-hardware"]
4603 # Return 1 if this is a PowerPC target supporting -mvsx
4605 proc check_effective_target_powerpc_vsx_ok { } {
4606 if { ([istarget powerpc*-*-*]
4607 && ![istarget powerpc-*-linux*paired*])
4608 || [istarget rs6000-*-*] } {
4609 # VSX is not supported on AIX before 7.1.
4610 if { [istarget powerpc*-*-aix4*]
4611 || [istarget powerpc*-*-aix5*]
4612 || [istarget powerpc*-*-aix6*] } {
4615 return [check_no_compiler_messages powerpc_vsx_ok object {
4618 asm volatile ("xxlor vs0,vs0,vs0");
4620 asm volatile ("xxlor 0,0,0");
4630 # Return 1 if this is a PowerPC target supporting -mhtm
4632 proc check_effective_target_powerpc_htm_ok { } {
4633 if { ([istarget powerpc*-*-*]
4634 && ![istarget powerpc-*-linux*paired*])
4635 || [istarget rs6000-*-*] } {
4636 # HTM is not supported on AIX yet.
4637 if { [istarget powerpc*-*-aix*] } {
4640 return [check_no_compiler_messages powerpc_htm_ok object {
4642 asm volatile ("tbegin. 0");
4651 # Return 1 if the target supports executing HTM hardware instructions,
4652 # 0 otherwise. Cache the result.
4654 proc check_htm_hw_available { } {
4655 return [check_cached_effective_target htm_hw_available {
4656 # For now, disable on Darwin
4657 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
4660 check_runtime_nocache htm_hw_available {
4670 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
4672 proc check_effective_target_powerpc_ppu_ok { } {
4673 if [check_effective_target_powerpc_altivec_ok] {
4674 return [check_no_compiler_messages cell_asm_available object {
4677 asm volatile ("lvlx v0,v0,v0");
4679 asm volatile ("lvlx 0,0,0");
4689 # Return 1 if this is a PowerPC target that supports SPU.
4691 proc check_effective_target_powerpc_spu { } {
4692 if { [istarget powerpc*-*-linux*] } {
4693 return [check_effective_target_powerpc_altivec_ok]
4699 # Return 1 if this is a PowerPC SPE target. The check includes options
4700 # specified by dg-options for this test, so don't cache the result.
4702 proc check_effective_target_powerpc_spe_nocache { } {
4703 if { [istarget powerpc*-*-*] } {
4704 return [check_no_compiler_messages_nocache powerpc_spe object {
4710 } [current_compiler_flags]]
4716 # Return 1 if this is a PowerPC target with SPE enabled.
4718 proc check_effective_target_powerpc_spe { } {
4719 if { [istarget powerpc*-*-*] } {
4720 return [check_no_compiler_messages powerpc_spe object {
4732 # Return 1 if this is a PowerPC target with Altivec enabled.
4734 proc check_effective_target_powerpc_altivec { } {
4735 if { [istarget powerpc*-*-*] } {
4736 return [check_no_compiler_messages powerpc_altivec object {
4748 # Return 1 if this is a PowerPC 405 target. The check includes options
4749 # specified by dg-options for this test, so don't cache the result.
4751 proc check_effective_target_powerpc_405_nocache { } {
4752 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
4753 return [check_no_compiler_messages_nocache powerpc_405 object {
4759 } [current_compiler_flags]]
4765 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
4767 proc check_effective_target_powerpc_elfv2 { } {
4768 if { [istarget powerpc*-*-*] } {
4769 return [check_no_compiler_messages powerpc_elfv2 object {
4771 #error not ELF v2 ABI
4781 # Return 1 if this is a SPU target with a toolchain that
4782 # supports automatic overlay generation.
4784 proc check_effective_target_spu_auto_overlay { } {
4785 if { [istarget spu*-*-elf*] } {
4786 return [check_no_compiler_messages spu_auto_overlay executable {
4788 } "-Wl,--auto-overlay" ]
4794 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
4795 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
4796 # test environment appears to run executables on such a simulator.
4798 proc check_effective_target_ultrasparc_hw { } {
4799 return [check_runtime ultrasparc_hw {
4800 int main() { return 0; }
4801 } "-mcpu=ultrasparc"]
4804 # Return 1 if the test environment supports executing UltraSPARC VIS2
4805 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
4807 proc check_effective_target_ultrasparc_vis2_hw { } {
4808 return [check_runtime ultrasparc_vis2_hw {
4809 int main() { __asm__(".word 0x81b00320"); return 0; }
4810 } "-mcpu=ultrasparc3"]
4813 # Return 1 if the test environment supports executing UltraSPARC VIS3
4814 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
4816 proc check_effective_target_ultrasparc_vis3_hw { } {
4817 return [check_runtime ultrasparc_vis3_hw {
4818 int main() { __asm__(".word 0x81b00220"); return 0; }
4822 # Return 1 if this is a SPARC-V9 target.
4824 proc check_effective_target_sparc_v9 { } {
4825 if { [istarget sparc*-*-*] } {
4826 return [check_no_compiler_messages sparc_v9 object {
4828 asm volatile ("return %i7+8");
4837 # Return 1 if this is a SPARC target with VIS enabled.
4839 proc check_effective_target_sparc_vis { } {
4840 if { [istarget sparc*-*-*] } {
4841 return [check_no_compiler_messages sparc_vis object {
4853 # Return 1 if the target supports hardware vector shift operation.
4855 proc check_effective_target_vect_shift { } {
4856 global et_vect_shift_saved
4859 if [info exists et_vect_shift_saved($et_index)] {
4860 verbose "check_effective_target_vect_shift: using cached result" 2
4862 set et_vect_shift_saved($et_index) 0
4863 if { ([istarget powerpc*-*-*]
4864 && ![istarget powerpc-*-linux*paired*])
4865 || [istarget ia64-*-*]
4866 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4867 || [istarget aarch64*-*-*]
4868 || [check_effective_target_arm32]
4869 || ([istarget mips*-*-*]
4870 && ([et-is-effective-target mips_msa]
4871 || [et-is-effective-target mips_loongson])) } {
4872 set et_vect_shift_saved($et_index) 1
4876 verbose "check_effective_target_vect_shift:\
4877 returning $et_vect_shift_saved($et_index)" 2
4878 return $et_vect_shift_saved($et_index)
4881 proc check_effective_target_whole_vector_shift { } {
4882 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4883 || [istarget ia64-*-*]
4884 || [istarget aarch64*-*-*]
4885 || [istarget powerpc64*-*-*]
4886 || ([check_effective_target_arm32]
4887 && [check_effective_target_arm_little_endian])
4888 || ([istarget mips*-*-*]
4889 && [et-is-effective-target mips_loongson]) } {
4895 verbose "check_effective_target_vect_long: returning $answer" 2
4899 # Return 1 if the target supports vector bswap operations.
4901 proc check_effective_target_vect_bswap { } {
4902 global et_vect_bswap_saved
4905 if [info exists et_vect_bswap_saved($et_index)] {
4906 verbose "check_effective_target_vect_bswap: using cached result" 2
4908 set et_vect_bswap_saved($et_index) 0
4909 if { [istarget aarch64*-*-*]
4910 || ([istarget arm*-*-*]
4911 && [check_effective_target_arm_neon])
4913 set et_vect_bswap_saved($et_index) 1
4917 verbose "check_effective_target_vect_bswap:\
4918 returning $et_vect_bswap_saved($et_index)" 2
4919 return $et_vect_bswap_saved($et_index)
4922 # Return 1 if the target supports hardware vector shift operation for char.
4924 proc check_effective_target_vect_shift_char { } {
4925 global et_vect_shift_char_saved
4928 if [info exists et_vect_shift_char_saved($et_index)] {
4929 verbose "check_effective_target_vect_shift_char: using cached result" 2
4931 set et_vect_shift_char_saved($et_index) 0
4932 if { ([istarget powerpc*-*-*]
4933 && ![istarget powerpc-*-linux*paired*])
4934 || [check_effective_target_arm32]
4935 || ([istarget mips*-*-*]
4936 && [et-is-effective-target mips_msa]) } {
4937 set et_vect_shift_char_saved($et_index) 1
4941 verbose "check_effective_target_vect_shift_char:\
4942 returning $et_vect_shift_char_saved($et_index)" 2
4943 return $et_vect_shift_char_saved($et_index)
4946 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4948 # This can change for different subtargets so do not cache the result.
4950 proc check_effective_target_vect_long { } {
4951 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4952 || (([istarget powerpc*-*-*]
4953 && ![istarget powerpc-*-linux*paired*])
4954 && [check_effective_target_ilp32])
4955 || [check_effective_target_arm32]
4956 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
4957 || [istarget aarch64*-*-*]
4958 || ([istarget mips*-*-*]
4959 && [et-is-effective-target mips_msa]) } {
4965 verbose "check_effective_target_vect_long: returning $answer" 2
4969 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
4971 # This won't change for different subtargets so cache the result.
4973 proc check_effective_target_vect_float { } {
4974 global et_vect_float_saved
4977 if [info exists et_vect_float_saved($et_index)] {
4978 verbose "check_effective_target_vect_float: using cached result" 2
4980 set et_vect_float_saved($et_index) 0
4981 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4982 || [istarget powerpc*-*-*]
4983 || [istarget spu-*-*]
4984 || [istarget mips-sde-elf]
4985 || [istarget mipsisa64*-*-*]
4986 || [istarget ia64-*-*]
4987 || [istarget aarch64*-*-*]
4988 || ([istarget mips*-*-*]
4989 && [et-is-effective-target mips_msa])
4990 || [check_effective_target_arm32] } {
4991 set et_vect_float_saved($et_index) 1
4995 verbose "check_effective_target_vect_float:\
4996 returning $et_vect_float_saved($et_index)" 2
4997 return $et_vect_float_saved($et_index)
5000 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
5002 # This won't change for different subtargets so cache the result.
5004 proc check_effective_target_vect_double { } {
5005 global et_vect_double_saved
5008 if [info exists et_vect_double_saved($et_index)] {
5009 verbose "check_effective_target_vect_double: using cached result" 2
5011 set et_vect_double_saved($et_index) 0
5012 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5013 && [check_no_compiler_messages vect_double assembly {
5014 #ifdef __tune_atom__
5015 # error No double vectorizer support.
5018 || [istarget aarch64*-*-*]
5019 || [istarget spu-*-*]
5020 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5021 || ([istarget mips*-*-*]
5022 && [et-is-effective-target mips_msa]) } {
5023 set et_vect_double_saved($et_index) 1
5027 verbose "check_effective_target_vect_double:\
5028 returning $et_vect_double_saved($et_index)" 2
5029 return $et_vect_double_saved($et_index)
5032 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5034 # This won't change for different subtargets so cache the result.
5036 proc check_effective_target_vect_long_long { } {
5037 global et_vect_long_long_saved
5040 if [info exists et_vect_long_long_saved($et_index)] {
5041 verbose "check_effective_target_vect_long_long: using cached result" 2
5043 set et_vect_long_long_saved($et_index) 0
5044 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5045 || ([istarget mips*-*-*]
5046 && [et-is-effective-target mips_msa]) } {
5047 set et_vect_long_long_saved($et_index) 1
5051 verbose "check_effective_target_vect_long_long:\
5052 returning $et_vect_long_long_saved($et_index)" 2
5053 return $et_vect_long_long_saved($et_index)
5057 # Return 1 if the target plus current options does not support a vector
5058 # max instruction on "int", 0 otherwise.
5060 # This won't change for different subtargets so cache the result.
5062 proc check_effective_target_vect_no_int_min_max { } {
5063 global et_vect_no_int_min_max_saved
5066 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5067 verbose "check_effective_target_vect_no_int_min_max:\
5068 using cached result" 2
5070 set et_vect_no_int_min_max_saved($et_index) 0
5071 if { [istarget sparc*-*-*]
5072 || [istarget spu-*-*]
5073 || [istarget alpha*-*-*]
5074 || ([istarget mips*-*-*]
5075 && [et-is-effective-target mips_loongson]) } {
5076 set et_vect_no_int_min_max_saved($et_index) 1
5079 verbose "check_effective_target_vect_no_int_min_max:\
5080 returning $et_vect_no_int_min_max_saved($et_index)" 2
5081 return $et_vect_no_int_min_max_saved($et_index)
5084 # Return 1 if the target plus current options does not support a vector
5085 # add instruction on "int", 0 otherwise.
5087 # This won't change for different subtargets so cache the result.
5089 proc check_effective_target_vect_no_int_add { } {
5090 global et_vect_no_int_add_saved
5093 if [info exists et_vect_no_int_add_saved($et_index)] {
5094 verbose "check_effective_target_vect_no_int_add: using cached result" 2
5096 set et_vect_no_int_add_saved($et_index) 0
5097 # Alpha only supports vector add on V8QI and V4HI.
5098 if { [istarget alpha*-*-*] } {
5099 set et_vect_no_int_add_saved($et_index) 1
5102 verbose "check_effective_target_vect_no_int_add:\
5103 returning $et_vect_no_int_add_saved($et_index)" 2
5104 return $et_vect_no_int_add_saved($et_index)
5107 # Return 1 if the target plus current options does not support vector
5108 # bitwise instructions, 0 otherwise.
5110 # This won't change for different subtargets so cache the result.
5112 proc check_effective_target_vect_no_bitwise { } {
5113 global et_vect_no_bitwise_saved
5116 if [info exists et_vect_no_bitwise_saved($et_index)] {
5117 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5119 set et_vect_no_bitwise_saved($et_index) 0
5121 verbose "check_effective_target_vect_no_bitwise:\
5122 returning $et_vect_no_bitwise_saved($et_index)" 2
5123 return $et_vect_no_bitwise_saved($et_index)
5126 # Return 1 if the target plus current options supports vector permutation,
5129 # This won't change for different subtargets so cache the result.
5131 proc check_effective_target_vect_perm { } {
5132 global et_vect_perm_saved
5135 if [info exists et_vect_perm_saved($et_index)] {
5136 verbose "check_effective_target_vect_perm: using cached result" 2
5138 set et_vect_perm_saved($et_index) 0
5139 if { [is-effective-target arm_neon_ok]
5140 || [istarget aarch64*-*-*]
5141 || [istarget powerpc*-*-*]
5142 || [istarget spu-*-*]
5143 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5144 || ([istarget mips*-*-*]
5145 && ([et-is-effective-target mpaired_single]
5146 || [et-is-effective-target mips_msa])) } {
5147 set et_vect_perm_saved($et_index) 1
5150 verbose "check_effective_target_vect_perm:\
5151 returning $et_vect_perm_saved($et_index)" 2
5152 return $et_vect_perm_saved($et_index)
5155 # Return 1 if the target plus current options supports vector permutation
5156 # on byte-sized elements, 0 otherwise.
5158 # This won't change for different subtargets so cache the result.
5160 proc check_effective_target_vect_perm_byte { } {
5161 global et_vect_perm_byte_saved
5164 if [info exists et_vect_perm_byte_saved($et_index)] {
5165 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5167 set et_vect_perm_byte_saved($et_index) 0
5168 if { ([is-effective-target arm_neon_ok]
5169 && [is-effective-target arm_little_endian])
5170 || ([istarget aarch64*-*-*]
5171 && [is-effective-target aarch64_little_endian])
5172 || [istarget powerpc*-*-*]
5173 || [istarget spu-*-*]
5174 || ([istarget mips-*.*]
5175 && [et-is-effective-target mips_msa]) } {
5176 set et_vect_perm_byte_saved($et_index) 1
5179 verbose "check_effective_target_vect_perm_byte:\
5180 returning $et_vect_perm_byte_saved($et_index)" 2
5181 return $et_vect_perm_byte_saved($et_index)
5184 # Return 1 if the target plus current options supports vector permutation
5185 # on short-sized elements, 0 otherwise.
5187 # This won't change for different subtargets so cache the result.
5189 proc check_effective_target_vect_perm_short { } {
5190 global et_vect_perm_short_saved
5193 if [info exists et_vect_perm_short_saved($et_index)] {
5194 verbose "check_effective_target_vect_perm_short: using cached result" 2
5196 set et_vect_perm_short_saved($et_index) 0
5197 if { ([is-effective-target arm_neon_ok]
5198 && [is-effective-target arm_little_endian])
5199 || ([istarget aarch64*-*-*]
5200 && [is-effective-target aarch64_little_endian])
5201 || [istarget powerpc*-*-*]
5202 || [istarget spu-*-*]
5203 || ([istarget mips*-*-*]
5204 && [et-is-effective-target mips_msa]) } {
5205 set et_vect_perm_short_saved($et_index) 1
5208 verbose "check_effective_target_vect_perm_short:\
5209 returning $et_vect_perm_short_saved($et_index)" 2
5210 return $et_vect_perm_short_saved($et_index)
5213 # Return 1 if the target plus current options supports a vector
5214 # widening summation of *short* args into *int* result, 0 otherwise.
5216 # This won't change for different subtargets so cache the result.
5218 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5219 global et_vect_widen_sum_hi_to_si_pattern_saved
5222 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5223 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5224 using cached result" 2
5226 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5227 if { [istarget powerpc*-*-*]
5228 || [istarget aarch64*-*-*]
5229 || ([istarget arm*-*-*] &&
5230 [check_effective_target_arm_neon_ok])
5231 || [istarget ia64-*-*] } {
5232 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5235 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5236 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5237 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5240 # Return 1 if the target plus current options supports a vector
5241 # widening summation of *short* args into *int* result, 0 otherwise.
5242 # A target can also support this widening summation if it can support
5243 # promotion (unpacking) from shorts to ints.
5245 # This won't change for different subtargets so cache the result.
5247 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5248 global et_vect_widen_sum_hi_to_si_saved
5251 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5252 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5253 using cached result" 2
5255 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5256 [check_effective_target_vect_unpack]
5257 if { [istarget powerpc*-*-*]
5258 || [istarget ia64-*-*] } {
5259 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
5262 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5263 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
5264 return $et_vect_widen_sum_hi_to_si_saved($et_index)
5267 # Return 1 if the target plus current options supports a vector
5268 # widening summation of *char* args into *short* result, 0 otherwise.
5269 # A target can also support this widening summation if it can support
5270 # promotion (unpacking) from chars to shorts.
5272 # This won't change for different subtargets so cache the result.
5274 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5275 global et_vect_widen_sum_qi_to_hi_saved
5278 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5279 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5280 using cached result" 2
5282 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5283 if { [check_effective_target_vect_unpack]
5284 || [check_effective_target_arm_neon_ok]
5285 || [istarget ia64-*-*] } {
5286 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5289 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5290 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5291 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5294 # Return 1 if the target plus current options supports a vector
5295 # widening summation of *char* args into *int* result, 0 otherwise.
5297 # This won't change for different subtargets so cache the result.
5299 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5300 global et_vect_widen_sum_qi_to_si_saved
5303 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
5304 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5305 using cached result" 2
5307 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
5308 if { [istarget powerpc*-*-*] } {
5309 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
5312 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5313 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
5314 return $et_vect_widen_sum_qi_to_si_saved($et_index)
5317 # Return 1 if the target plus current options supports a vector
5318 # widening multiplication of *char* args into *short* result, 0 otherwise.
5319 # A target can also support this widening multplication if it can support
5320 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5321 # multiplication of shorts).
5323 # This won't change for different subtargets so cache the result.
5326 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5327 global et_vect_widen_mult_qi_to_hi_saved
5330 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
5331 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5332 using cached result" 2
5334 if { [check_effective_target_vect_unpack]
5335 && [check_effective_target_vect_short_mult] } {
5336 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5338 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
5340 if { [istarget powerpc*-*-*]
5341 || [istarget aarch64*-*-*]
5342 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5343 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5346 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5347 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
5348 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
5351 # Return 1 if the target plus current options supports a vector
5352 # widening multiplication of *short* args into *int* result, 0 otherwise.
5353 # A target can also support this widening multplication if it can support
5354 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
5355 # multiplication of ints).
5357 # This won't change for different subtargets so cache the result.
5360 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5361 global et_vect_widen_mult_hi_to_si_saved
5364 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
5365 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5366 using cached result" 2
5368 if { [check_effective_target_vect_unpack]
5369 && [check_effective_target_vect_int_mult] } {
5370 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5372 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
5374 if { [istarget powerpc*-*-*]
5375 || [istarget spu-*-*]
5376 || [istarget ia64-*-*]
5377 || [istarget aarch64*-*-*]
5378 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5379 || ([istarget arm*-*-*]
5380 && [check_effective_target_arm_neon_ok]) } {
5381 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5384 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5385 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
5386 return $et_vect_widen_mult_hi_to_si_saved($et_index)
5389 # Return 1 if the target plus current options supports a vector
5390 # widening multiplication of *char* args into *short* result, 0 otherwise.
5392 # This won't change for different subtargets so cache the result.
5394 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
5395 global et_vect_widen_mult_qi_to_hi_pattern_saved
5398 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
5399 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5400 using cached result" 2
5402 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
5403 if { [istarget powerpc*-*-*]
5404 || ([istarget arm*-*-*]
5405 && [check_effective_target_arm_neon_ok]
5406 && [check_effective_target_arm_little_endian]) } {
5407 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
5410 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5411 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
5412 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
5415 # Return 1 if the target plus current options supports a vector
5416 # widening multiplication of *short* args into *int* result, 0 otherwise.
5418 # This won't change for different subtargets so cache the result.
5420 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
5421 global et_vect_widen_mult_hi_to_si_pattern_saved
5424 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
5425 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5426 using cached result" 2
5428 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
5429 if { [istarget powerpc*-*-*]
5430 || [istarget spu-*-*]
5431 || [istarget ia64-*-*]
5432 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5433 || ([istarget arm*-*-*]
5434 && [check_effective_target_arm_neon_ok]
5435 && [check_effective_target_arm_little_endian]) } {
5436 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
5439 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5440 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
5441 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
5444 # Return 1 if the target plus current options supports a vector
5445 # widening multiplication of *int* args into *long* result, 0 otherwise.
5447 # This won't change for different subtargets so cache the result.
5449 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
5450 global et_vect_widen_mult_si_to_di_pattern_saved
5453 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
5454 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5455 using cached result" 2
5457 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
5458 if {[istarget ia64-*-*]
5459 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5460 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
5463 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5464 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
5465 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
5468 # Return 1 if the target plus current options supports a vector
5469 # widening shift, 0 otherwise.
5471 # This won't change for different subtargets so cache the result.
5473 proc check_effective_target_vect_widen_shift { } {
5474 global et_vect_widen_shift_saved
5477 if [info exists et_vect_shift_saved($et_index)] {
5478 verbose "check_effective_target_vect_widen_shift: using cached result" 2
5480 set et_vect_widen_shift_saved($et_index) 0
5481 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5482 set et_vect_widen_shift_saved($et_index) 1
5485 verbose "check_effective_target_vect_widen_shift:\
5486 returning $et_vect_widen_shift_saved($et_index)" 2
5487 return $et_vect_widen_shift_saved($et_index)
5490 # Return 1 if the target plus current options supports a vector
5491 # dot-product of signed chars, 0 otherwise.
5493 # This won't change for different subtargets so cache the result.
5495 proc check_effective_target_vect_sdot_qi { } {
5496 global et_vect_sdot_qi_saved
5499 if [info exists et_vect_sdot_qi_saved($et_index)] {
5500 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
5502 set et_vect_sdot_qi_saved($et_index) 0
5503 if { [istarget ia64-*-*]
5504 || ([istarget mips*-*-*]
5505 && [et-is-effective-target mips_msa]) } {
5506 set et_vect_udot_qi_saved 1
5509 verbose "check_effective_target_vect_sdot_qi:\
5510 returning $et_vect_sdot_qi_saved($et_index)" 2
5511 return $et_vect_sdot_qi_saved($et_index)
5514 # Return 1 if the target plus current options supports a vector
5515 # dot-product of unsigned chars, 0 otherwise.
5517 # This won't change for different subtargets so cache the result.
5519 proc check_effective_target_vect_udot_qi { } {
5520 global et_vect_udot_qi_saved
5523 if [info exists et_vect_udot_qi_saved($et_index)] {
5524 verbose "check_effective_target_vect_udot_qi: using cached result" 2
5526 set et_vect_udot_qi_saved($et_index) 0
5527 if { [istarget powerpc*-*-*]
5528 || [istarget ia64-*-*]
5529 || ([istarget mips*-*-*]
5530 && [et-is-effective-target mips_msa]) } {
5531 set et_vect_udot_qi_saved($et_index) 1
5534 verbose "check_effective_target_vect_udot_qi:\
5535 returning $et_vect_udot_qi_saved($et_index)" 2
5536 return $et_vect_udot_qi_saved($et_index)
5539 # Return 1 if the target plus current options supports a vector
5540 # dot-product of signed shorts, 0 otherwise.
5542 # This won't change for different subtargets so cache the result.
5544 proc check_effective_target_vect_sdot_hi { } {
5545 global et_vect_sdot_hi_saved
5548 if [info exists et_vect_sdot_hi_saved($et_index)] {
5549 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
5551 set et_vect_sdot_hi_saved($et_index) 0
5552 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5553 || [istarget ia64-*-*]
5554 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5555 || ([istarget mips*-*-*]
5556 && [et-is-effective-target mips_msa]) } {
5557 set et_vect_sdot_hi_saved($et_index) 1
5560 verbose "check_effective_target_vect_sdot_hi:\
5561 returning $et_vect_sdot_hi_saved($et_index)" 2
5562 return $et_vect_sdot_hi_saved($et_index)
5565 # Return 1 if the target plus current options supports a vector
5566 # dot-product of unsigned shorts, 0 otherwise.
5568 # This won't change for different subtargets so cache the result.
5570 proc check_effective_target_vect_udot_hi { } {
5571 global et_vect_udot_hi_saved
5574 if [info exists et_vect_udot_hi_saved($et_index)] {
5575 verbose "check_effective_target_vect_udot_hi: using cached result" 2
5577 set et_vect_udot_hi_saved($et_index) 0
5578 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5579 || ([istarget mips*-*-*]
5580 && [et-is-effective-target mips_msa]) } {
5581 set et_vect_udot_hi_saved($et_index) 1
5584 verbose "check_effective_target_vect_udot_hi:\
5585 returning $et_vect_udot_hi_saved($et_index)" 2
5586 return $et_vect_udot_hi_saved($et_index)
5589 # Return 1 if the target plus current options supports a vector
5590 # sad operation of unsigned chars, 0 otherwise.
5592 # This won't change for different subtargets so cache the result.
5594 proc check_effective_target_vect_usad_char { } {
5595 global et_vect_usad_char_saved
5598 if [info exists et_vect_usad_char_saved($et_index)] {
5599 verbose "check_effective_target_vect_usad_char: using cached result" 2
5601 set et_vect_usad_char_saved($et_index) 0
5602 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5603 set et_vect_usad_char_saved($et_index) 1
5606 verbose "check_effective_target_vect_usad_char:\
5607 returning $et_vect_usad_char_saved($et_index)" 2
5608 return $et_vect_usad_char_saved($et_index)
5611 # Return 1 if the target plus current options supports a vector
5612 # demotion (packing) of shorts (to chars) and ints (to shorts)
5613 # using modulo arithmetic, 0 otherwise.
5615 # This won't change for different subtargets so cache the result.
5617 proc check_effective_target_vect_pack_trunc { } {
5618 global et_vect_pack_trunc_saved
5621 if [info exists et_vect_pack_trunc_saved($et_index)] {
5622 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
5624 set et_vect_pack_trunc_saved($et_index) 0
5625 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5626 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5627 || [istarget aarch64*-*-*]
5628 || [istarget spu-*-*]
5629 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5630 && [check_effective_target_arm_little_endian])
5631 || ([istarget mips*-*-*]
5632 && [et-is-effective-target mips_msa]) } {
5633 set et_vect_pack_trunc_saved($et_index) 1
5636 verbose "check_effective_target_vect_pack_trunc:\
5637 returning $et_vect_pack_trunc_saved($et_index)" 2
5638 return $et_vect_pack_trunc_saved($et_index)
5641 # Return 1 if the target plus current options supports a vector
5642 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
5644 # This won't change for different subtargets so cache the result.
5646 proc check_effective_target_vect_unpack { } {
5647 global et_vect_unpack_saved
5650 if [info exists et_vect_unpack_saved($et_index)] {
5651 verbose "check_effective_target_vect_unpack: using cached result" 2
5653 set et_vect_unpack_saved($et_index) 0
5654 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
5655 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5656 || [istarget spu-*-*]
5657 || [istarget ia64-*-*]
5658 || [istarget aarch64*-*-*]
5659 || ([istarget mips*-*-*]
5660 && [et-is-effective-target mips_msa])
5661 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5662 && [check_effective_target_arm_little_endian]) } {
5663 set et_vect_unpack_saved($et_index) 1
5666 verbose "check_effective_target_vect_unpack:\
5667 returning $et_vect_unpack_saved($et_index)" 2
5668 return $et_vect_unpack_saved($et_index)
5671 # Return 1 if the target plus current options does not guarantee
5672 # that its STACK_BOUNDARY is >= the reguired vector alignment.
5674 # This won't change for different subtargets so cache the result.
5676 proc check_effective_target_unaligned_stack { } {
5677 global et_unaligned_stack_saved
5679 if [info exists et_unaligned_stack_saved] {
5680 verbose "check_effective_target_unaligned_stack: using cached result" 2
5682 set et_unaligned_stack_saved 0
5684 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
5685 return $et_unaligned_stack_saved
5688 # Return 1 if the target plus current options does not support a vector
5689 # alignment mechanism, 0 otherwise.
5691 # This won't change for different subtargets so cache the result.
5693 proc check_effective_target_vect_no_align { } {
5694 global et_vect_no_align_saved
5697 if [info exists et_vect_no_align_saved($et_index)] {
5698 verbose "check_effective_target_vect_no_align: using cached result" 2
5700 set et_vect_no_align_saved($et_index) 0
5701 if { [istarget mipsisa64*-*-*]
5702 || [istarget mips-sde-elf]
5703 || [istarget sparc*-*-*]
5704 || [istarget ia64-*-*]
5705 || [check_effective_target_arm_vect_no_misalign]
5706 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5707 || ([istarget mips*-*-*]
5708 && [et-is-effective-target mips_loongson]) } {
5709 set et_vect_no_align_saved($et_index) 1
5712 verbose "check_effective_target_vect_no_align:\
5713 returning $et_vect_no_align_saved($et_index)" 2
5714 return $et_vect_no_align_saved($et_index)
5717 # Return 1 if the target supports a vector misalign access, 0 otherwise.
5719 # This won't change for different subtargets so cache the result.
5721 proc check_effective_target_vect_hw_misalign { } {
5722 global et_vect_hw_misalign_saved
5725 if [info exists et_vect_hw_misalign_saved($et_index)] {
5726 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
5728 set et_vect_hw_misalign_saved($et_index) 0
5729 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5730 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5731 || [istarget aarch64*-*-*]
5732 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } {
5733 set et_vect_hw_misalign_saved($et_index) 1
5736 verbose "check_effective_target_vect_hw_misalign:\
5737 returning $et_vect_hw_misalign_saved($et_index)" 2
5738 return $et_vect_hw_misalign_saved($et_index)
5742 # Return 1 if arrays are aligned to the vector alignment
5743 # boundary, 0 otherwise.
5745 proc check_effective_target_vect_aligned_arrays { } {
5746 set et_vect_aligned_arrays 0
5747 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5748 && !([is-effective-target ia32]
5749 || ([check_avx_available] && ![check_prefer_avx128])))
5750 || [istarget spu-*-*] } {
5751 set et_vect_aligned_arrays 1
5754 verbose "check_effective_target_vect_aligned_arrays:\
5755 returning $et_vect_aligned_arrays" 2
5756 return $et_vect_aligned_arrays
5759 # Return 1 if types of size 32 bit or less are naturally aligned
5760 # (aligned to their type-size), 0 otherwise.
5762 # This won't change for different subtargets so cache the result.
5764 proc check_effective_target_natural_alignment_32 { } {
5765 global et_natural_alignment_32
5767 if [info exists et_natural_alignment_32_saved] {
5768 verbose "check_effective_target_natural_alignment_32: using cached result" 2
5770 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
5771 set et_natural_alignment_32_saved 1
5772 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
5773 || [istarget avr-*-*] } {
5774 set et_natural_alignment_32_saved 0
5777 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
5778 return $et_natural_alignment_32_saved
5781 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
5782 # type-size), 0 otherwise.
5784 # This won't change for different subtargets so cache the result.
5786 proc check_effective_target_natural_alignment_64 { } {
5787 global et_natural_alignment_64
5789 if [info exists et_natural_alignment_64_saved] {
5790 verbose "check_effective_target_natural_alignment_64: using cached result" 2
5792 set et_natural_alignment_64_saved 0
5793 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
5794 || [istarget spu-*-*] } {
5795 set et_natural_alignment_64_saved 1
5798 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
5799 return $et_natural_alignment_64_saved
5802 # Return 1 if all vector types are naturally aligned (aligned to their
5803 # type-size), 0 otherwise.
5805 proc check_effective_target_vect_natural_alignment { } {
5806 set et_vect_natural_alignment 1
5807 if { [check_effective_target_arm_eabi]
5808 || [istarget nvptx-*-*]
5809 || [istarget s390*-*-*] } {
5810 set et_vect_natural_alignment 0
5812 verbose "check_effective_target_vect_natural_alignment:\
5813 returning $et_vect_natural_alignment" 2
5814 return $et_vect_natural_alignment
5817 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
5819 proc check_effective_target_vector_alignment_reachable { } {
5820 set et_vector_alignment_reachable 0
5821 if { [check_effective_target_vect_aligned_arrays]
5822 || [check_effective_target_natural_alignment_32] } {
5823 set et_vector_alignment_reachable 1
5825 verbose "check_effective_target_vector_alignment_reachable:\
5826 returning $et_vector_alignment_reachable" 2
5827 return $et_vector_alignment_reachable
5830 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
5832 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
5833 set et_vector_alignment_reachable_for_64bit 0
5834 if { [check_effective_target_vect_aligned_arrays]
5835 || [check_effective_target_natural_alignment_64] } {
5836 set et_vector_alignment_reachable_for_64bit 1
5838 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
5839 returning $et_vector_alignment_reachable_for_64bit" 2
5840 return $et_vector_alignment_reachable_for_64bit
5843 # Return 1 if the target only requires element alignment for vector accesses
5845 proc check_effective_target_vect_element_align { } {
5846 global et_vect_element_align
5849 if [info exists et_vect_element_align($et_index)] {
5850 verbose "check_effective_target_vect_element_align:\
5851 using cached result" 2
5853 set et_vect_element_align($et_index) 0
5854 if { ([istarget arm*-*-*]
5855 && ![check_effective_target_arm_vect_no_misalign])
5856 || [check_effective_target_vect_hw_misalign] } {
5857 set et_vect_element_align($et_index) 1
5861 verbose "check_effective_target_vect_element_align:\
5862 returning $et_vect_element_align($et_index)" 2
5863 return $et_vect_element_align($et_index)
5866 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
5868 proc check_effective_target_vect_load_lanes { } {
5869 global et_vect_load_lanes
5871 if [info exists et_vect_load_lanes] {
5872 verbose "check_effective_target_vect_load_lanes: using cached result" 2
5874 set et_vect_load_lanes 0
5875 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
5876 || [istarget aarch64*-*-*] } {
5877 set et_vect_load_lanes 1
5881 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
5882 return $et_vect_load_lanes
5885 # Return 1 if the target supports vector conditional operations, 0 otherwise.
5887 proc check_effective_target_vect_condition { } {
5888 global et_vect_cond_saved
5891 if [info exists et_vect_cond_saved($et_index)] {
5892 verbose "check_effective_target_vect_cond: using cached result" 2
5894 set et_vect_cond_saved($et_index) 0
5895 if { [istarget aarch64*-*-*]
5896 || [istarget powerpc*-*-*]
5897 || [istarget ia64-*-*]
5898 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5899 || [istarget spu-*-*]
5900 || ([istarget mips*-*-*]
5901 && [et-is-effective-target mips_msa])
5902 || ([istarget arm*-*-*]
5903 && [check_effective_target_arm_neon_ok]) } {
5904 set et_vect_cond_saved($et_index) 1
5908 verbose "check_effective_target_vect_cond:\
5909 returning $et_vect_cond_saved($et_index)" 2
5910 return $et_vect_cond_saved($et_index)
5913 # Return 1 if the target supports vector conditional operations where
5914 # the comparison has different type from the lhs, 0 otherwise.
5916 proc check_effective_target_vect_cond_mixed { } {
5917 global et_vect_cond_mixed_saved
5920 if [info exists et_vect_cond_mixed_saved($et_index)] {
5921 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
5923 set et_vect_cond_mixed_saved($et_index) 0
5924 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5925 || [istarget aarch64*-*-*]
5926 || [istarget powerpc*-*-*]
5927 || ([istarget mips*-*-*]
5928 && [et-is-effective-target mips_msa]) } {
5929 set et_vect_cond_mixed_saved($et_index) 1
5933 verbose "check_effective_target_vect_cond_mixed:\
5934 returning $et_vect_cond_mixed_saved($et_index)" 2
5935 return $et_vect_cond_mixed_saved($et_index)
5938 # Return 1 if the target supports vector char multiplication, 0 otherwise.
5940 proc check_effective_target_vect_char_mult { } {
5941 global et_vect_char_mult_saved
5944 if [info exists et_vect_char_mult_saved($et_index)] {
5945 verbose "check_effective_target_vect_char_mult: using cached result" 2
5947 set et_vect_char_mult_saved($et_index) 0
5948 if { [istarget aarch64*-*-*]
5949 || [istarget ia64-*-*]
5950 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5951 || [check_effective_target_arm32]
5952 || [check_effective_target_powerpc_altivec]
5953 || ([istarget mips*-*-*]
5954 && [et-is-effective-target mips_msa]) } {
5955 set et_vect_char_mult_saved($et_index) 1
5959 verbose "check_effective_target_vect_char_mult:\
5960 returning $et_vect_char_mult_saved($et_index)" 2
5961 return $et_vect_char_mult_saved($et_index)
5964 # Return 1 if the target supports vector short multiplication, 0 otherwise.
5966 proc check_effective_target_vect_short_mult { } {
5967 global et_vect_short_mult_saved
5970 if [info exists et_vect_short_mult_saved($et_index)] {
5971 verbose "check_effective_target_vect_short_mult: using cached result" 2
5973 set et_vect_short_mult_saved($et_index) 0
5974 if { [istarget ia64-*-*]
5975 || [istarget spu-*-*]
5976 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5977 || [istarget powerpc*-*-*]
5978 || [istarget aarch64*-*-*]
5979 || [check_effective_target_arm32]
5980 || ([istarget mips*-*-*]
5981 && ([et-is-effective-target mips_msa]
5982 || [et-is-effective-target mips_loongson])) } {
5983 set et_vect_short_mult_saved($et_index) 1
5987 verbose "check_effective_target_vect_short_mult:\
5988 returning $et_vect_short_mult_saved($et_index)" 2
5989 return $et_vect_short_mult_saved($et_index)
5992 # Return 1 if the target supports vector int multiplication, 0 otherwise.
5994 proc check_effective_target_vect_int_mult { } {
5995 global et_vect_int_mult_saved
5998 if [info exists et_vect_int_mult_saved($et_index)] {
5999 verbose "check_effective_target_vect_int_mult: using cached result" 2
6001 set et_vect_int_mult_saved($et_index) 0
6002 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6003 || [istarget spu-*-*]
6004 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6005 || [istarget ia64-*-*]
6006 || [istarget aarch64*-*-*]
6007 || ([istarget mips*-*-*]
6008 && [et-is-effective-target mips_msa])
6009 || [check_effective_target_arm32] } {
6010 set et_vect_int_mult_saved($et_index) 1
6014 verbose "check_effective_target_vect_int_mult:\
6015 returning $et_vect_int_mult_saved($et_index)" 2
6016 return $et_vect_int_mult_saved($et_index)
6019 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6021 proc check_effective_target_vect_extract_even_odd { } {
6022 global et_vect_extract_even_odd_saved
6025 if [info exists et_vect_extract_even_odd_saved($et_index)] {
6026 verbose "check_effective_target_vect_extract_even_odd:\
6027 using cached result" 2
6029 set et_vect_extract_even_odd_saved($et_index) 0
6030 if { [istarget aarch64*-*-*]
6031 || [istarget powerpc*-*-*]
6032 || [is-effective-target arm_neon_ok]
6033 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6034 || [istarget ia64-*-*]
6035 || [istarget spu-*-*]
6036 || ([istarget mips*-*-*]
6037 && ([et-is-effective-target mips_msa]
6038 || [et-is-effective-target mpaired_single])) } {
6039 set et_vect_extract_even_odd_saved($et_index) 1
6043 verbose "check_effective_target_vect_extract_even_odd:\
6044 returning $et_vect_extract_even_odd_saved($et_index)" 2
6045 return $et_vect_extract_even_odd_saved($et_index)
6048 # Return 1 if the target supports vector interleaving, 0 otherwise.
6050 proc check_effective_target_vect_interleave { } {
6051 global et_vect_interleave_saved
6054 if [info exists et_vect_interleave_saved($et_index)] {
6055 verbose "check_effective_target_vect_interleave: using cached result" 2
6057 set et_vect_interleave_saved($et_index) 0
6058 if { [istarget aarch64*-*-*]
6059 || [istarget powerpc*-*-*]
6060 || [is-effective-target arm_neon_ok]
6061 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6062 || [istarget ia64-*-*]
6063 || [istarget spu-*-*]
6064 || ([istarget mips*-*-*]
6065 && ([et-is-effective-target mpaired_single]
6066 || [et-is-effective-target mips_msa])) } {
6067 set et_vect_interleave_saved($et_index) 1
6071 verbose "check_effective_target_vect_interleave:\
6072 returning $et_vect_interleave_saved($et_index)" 2
6073 return $et_vect_interleave_saved($et_index)
6076 foreach N {2 3 4 8} {
6077 eval [string map [list N $N] {
6078 # Return 1 if the target supports 2-vector interleaving
6079 proc check_effective_target_vect_stridedN { } {
6080 global et_vect_stridedN_saved
6083 if [info exists et_vect_stridedN_saved($et_index)] {
6084 verbose "check_effective_target_vect_stridedN:\
6085 using cached result" 2
6087 set et_vect_stridedN_saved($et_index) 0
6089 && [check_effective_target_vect_interleave]
6090 && [check_effective_target_vect_extract_even_odd] } {
6091 set et_vect_stridedN_saved($et_index) 1
6093 if { ([istarget arm*-*-*]
6094 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6095 set et_vect_stridedN_saved($et_index) 1
6099 verbose "check_effective_target_vect_stridedN:\
6100 returning $et_vect_stridedN_saved($et_index)" 2
6101 return $et_vect_stridedN_saved($et_index)
6106 # Return 1 if the target supports multiple vector sizes
6108 proc check_effective_target_vect_multiple_sizes { } {
6109 global et_vect_multiple_sizes_saved
6112 set et_vect_multiple_sizes_saved($et_index) 0
6113 if { [istarget aarch64*-*-*]
6114 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
6115 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
6116 && ([check_avx_available] && ![check_prefer_avx128])) } {
6117 set et_vect_multiple_sizes_saved($et_index) 1
6120 verbose "check_effective_target_vect_multiple_sizes:\
6121 returning $et_vect_multiple_sizes_saved($et_index)" 2
6122 return $et_vect_multiple_sizes_saved($et_index)
6125 # Return 1 if the target supports vectors of 64 bits.
6127 proc check_effective_target_vect64 { } {
6128 global et_vect64_saved
6131 if [info exists et_vect64_saved($et_index)] {
6132 verbose "check_effective_target_vect64: using cached result" 2
6134 set et_vect64_saved($et_index) 0
6135 if { ([istarget arm*-*-*]
6136 && [check_effective_target_arm_neon_ok]
6137 && [check_effective_target_arm_little_endian])
6138 || [istarget aarch64*-*-*]
6139 || [istarget sparc*-*-*] } {
6140 set et_vect64_saved($et_index) 1
6144 verbose "check_effective_target_vect64:\
6145 returning $et_vect64_saved($et_index)" 2
6146 return $et_vect64_saved($et_index)
6149 # Return 1 if the target supports vector copysignf calls.
6151 proc check_effective_target_vect_call_copysignf { } {
6152 global et_vect_call_copysignf_saved
6155 if [info exists et_vect_call_copysignf_saved($et_index)] {
6156 verbose "check_effective_target_vect_call_copysignf:\
6157 using cached result" 2
6159 set et_vect_call_copysignf_saved($et_index) 0
6160 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6161 || [istarget powerpc*-*-*] } {
6162 set et_vect_call_copysignf_saved($et_index) 1
6166 verbose "check_effective_target_vect_call_copysignf:\
6167 returning $et_vect_call_copysignf_saved($et_index)" 2
6168 return $et_vect_call_copysignf_saved($et_index)
6171 # Return 1 if the target supports hardware square root instructions.
6173 proc check_effective_target_sqrt_insn { } {
6174 global et_sqrt_insn_saved
6176 if [info exists et_sqrt_insn_saved] {
6177 verbose "check_effective_target_hw_sqrt: using cached result" 2
6179 set et_sqrt_insn_saved 0
6180 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6181 || [istarget powerpc*-*-*]
6182 || [istarget aarch64*-*-*]
6183 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
6184 set et_sqrt_insn_saved 1
6188 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6189 return $et_sqrt_insn_saved
6192 # Return 1 if the target supports vector sqrtf calls.
6194 proc check_effective_target_vect_call_sqrtf { } {
6195 global et_vect_call_sqrtf_saved
6198 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6199 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6201 set et_vect_call_sqrtf_saved($et_index) 0
6202 if { [istarget aarch64*-*-*]
6203 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6204 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
6205 set et_vect_call_sqrtf_saved($et_index) 1
6209 verbose "check_effective_target_vect_call_sqrtf:\
6210 returning $et_vect_call_sqrtf_saved($et_index)" 2
6211 return $et_vect_call_sqrtf_saved($et_index)
6214 # Return 1 if the target supports vector lrint calls.
6216 proc check_effective_target_vect_call_lrint { } {
6217 set et_vect_call_lrint 0
6218 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6219 && [check_effective_target_ilp32]) } {
6220 set et_vect_call_lrint 1
6223 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6224 return $et_vect_call_lrint
6227 # Return 1 if the target supports vector btrunc calls.
6229 proc check_effective_target_vect_call_btrunc { } {
6230 global et_vect_call_btrunc_saved
6233 if [info exists et_vect_call_btrunc_saved($et_index)] {
6234 verbose "check_effective_target_vect_call_btrunc:\
6235 using cached result" 2
6237 set et_vect_call_btrunc_saved($et_index) 0
6238 if { [istarget aarch64*-*-*] } {
6239 set et_vect_call_btrunc_saved($et_index) 1
6243 verbose "check_effective_target_vect_call_btrunc:\
6244 returning $et_vect_call_btrunc_saved($et_index)" 2
6245 return $et_vect_call_btrunc_saved($et_index)
6248 # Return 1 if the target supports vector btruncf calls.
6250 proc check_effective_target_vect_call_btruncf { } {
6251 global et_vect_call_btruncf_saved
6254 if [info exists et_vect_call_btruncf_saved($et_index)] {
6255 verbose "check_effective_target_vect_call_btruncf:\
6256 using cached result" 2
6258 set et_vect_call_btruncf_saved($et_index) 0
6259 if { [istarget aarch64*-*-*] } {
6260 set et_vect_call_btruncf_saved($et_index) 1
6264 verbose "check_effective_target_vect_call_btruncf:\
6265 returning $et_vect_call_btruncf_saved($et_index)" 2
6266 return $et_vect_call_btruncf_saved($et_index)
6269 # Return 1 if the target supports vector ceil calls.
6271 proc check_effective_target_vect_call_ceil { } {
6272 global et_vect_call_ceil_saved
6275 if [info exists et_vect_call_ceil_saved($et_index)] {
6276 verbose "check_effective_target_vect_call_ceil: using cached result" 2
6278 set et_vect_call_ceil_saved($et_index) 0
6279 if { [istarget aarch64*-*-*] } {
6280 set et_vect_call_ceil_saved($et_index) 1
6284 verbose "check_effective_target_vect_call_ceil:\
6285 returning $et_vect_call_ceil_saved($et_index)" 2
6286 return $et_vect_call_ceil_saved($et_index)
6289 # Return 1 if the target supports vector ceilf calls.
6291 proc check_effective_target_vect_call_ceilf { } {
6292 global et_vect_call_ceilf_saved
6295 if [info exists et_vect_call_ceilf_saved($et_index)] {
6296 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
6298 set et_vect_call_ceilf_saved($et_index) 0
6299 if { [istarget aarch64*-*-*] } {
6300 set et_vect_call_ceilf_saved($et_index) 1
6304 verbose "check_effective_target_vect_call_ceilf:\
6305 returning $et_vect_call_ceilf_saved($et_index)" 2
6306 return $et_vect_call_ceilf_saved($et_index)
6309 # Return 1 if the target supports vector floor calls.
6311 proc check_effective_target_vect_call_floor { } {
6312 global et_vect_call_floor_saved
6315 if [info exists et_vect_call_floor_saved($et_index)] {
6316 verbose "check_effective_target_vect_call_floor: using cached result" 2
6318 set et_vect_call_floor_saved($et_index) 0
6319 if { [istarget aarch64*-*-*] } {
6320 set et_vect_call_floor_saved($et_index) 1
6324 verbose "check_effective_target_vect_call_floor:\
6325 returning $et_vect_call_floor_saved($et_index)" 2
6326 return $et_vect_call_floor_saved($et_index)
6329 # Return 1 if the target supports vector floorf calls.
6331 proc check_effective_target_vect_call_floorf { } {
6332 global et_vect_call_floorf_saved
6335 if [info exists et_vect_call_floorf_saved($et_index)] {
6336 verbose "check_effective_target_vect_call_floorf: using cached result" 2
6338 set et_vect_call_floorf_saved($et_index) 0
6339 if { [istarget aarch64*-*-*] } {
6340 set et_vect_call_floorf_saved($et_index) 1
6344 verbose "check_effective_target_vect_call_floorf:\
6345 returning $et_vect_call_floorf_saved($et_index)" 2
6346 return $et_vect_call_floorf_saved($et_index)
6349 # Return 1 if the target supports vector lceil calls.
6351 proc check_effective_target_vect_call_lceil { } {
6352 global et_vect_call_lceil_saved
6355 if [info exists et_vect_call_lceil_saved($et_index)] {
6356 verbose "check_effective_target_vect_call_lceil: using cached result" 2
6358 set et_vect_call_lceil_saved($et_index) 0
6359 if { [istarget aarch64*-*-*] } {
6360 set et_vect_call_lceil_saved($et_index) 1
6364 verbose "check_effective_target_vect_call_lceil:\
6365 returning $et_vect_call_lceil_saved($et_index)" 2
6366 return $et_vect_call_lceil_saved($et_index)
6369 # Return 1 if the target supports vector lfloor calls.
6371 proc check_effective_target_vect_call_lfloor { } {
6372 global et_vect_call_lfloor_saved
6375 if [info exists et_vect_call_lfloor_saved($et_index)] {
6376 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
6378 set et_vect_call_lfloor_saved($et_index) 0
6379 if { [istarget aarch64*-*-*] } {
6380 set et_vect_call_lfloor_saved($et_index) 1
6384 verbose "check_effective_target_vect_call_lfloor:\
6385 returning $et_vect_call_lfloor_saved($et_index)" 2
6386 return $et_vect_call_lfloor_saved($et_index)
6389 # Return 1 if the target supports vector nearbyint calls.
6391 proc check_effective_target_vect_call_nearbyint { } {
6392 global et_vect_call_nearbyint_saved
6395 if [info exists et_vect_call_nearbyint_saved($et_index)] {
6396 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
6398 set et_vect_call_nearbyint_saved($et_index) 0
6399 if { [istarget aarch64*-*-*] } {
6400 set et_vect_call_nearbyint_saved($et_index) 1
6404 verbose "check_effective_target_vect_call_nearbyint:\
6405 returning $et_vect_call_nearbyint_saved($et_index)" 2
6406 return $et_vect_call_nearbyint_saved($et_index)
6409 # Return 1 if the target supports vector nearbyintf calls.
6411 proc check_effective_target_vect_call_nearbyintf { } {
6412 global et_vect_call_nearbyintf_saved
6415 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
6416 verbose "check_effective_target_vect_call_nearbyintf:\
6417 using cached result" 2
6419 set et_vect_call_nearbyintf_saved($et_index) 0
6420 if { [istarget aarch64*-*-*] } {
6421 set et_vect_call_nearbyintf_saved($et_index) 1
6425 verbose "check_effective_target_vect_call_nearbyintf:\
6426 returning $et_vect_call_nearbyintf_saved($et_index)" 2
6427 return $et_vect_call_nearbyintf_saved($et_index)
6430 # Return 1 if the target supports vector round calls.
6432 proc check_effective_target_vect_call_round { } {
6433 global et_vect_call_round_saved
6436 if [info exists et_vect_call_round_saved($et_index)] {
6437 verbose "check_effective_target_vect_call_round: using cached result" 2
6439 set et_vect_call_round_saved($et_index) 0
6440 if { [istarget aarch64*-*-*] } {
6441 set et_vect_call_round_saved($et_index) 1
6445 verbose "check_effective_target_vect_call_round:\
6446 returning $et_vect_call_round_saved($et_index)" 2
6447 return $et_vect_call_round_saved($et_index)
6450 # Return 1 if the target supports vector roundf calls.
6452 proc check_effective_target_vect_call_roundf { } {
6453 global et_vect_call_roundf_saved
6456 if [info exists et_vect_call_roundf_saved($et_index)] {
6457 verbose "check_effective_target_vect_call_roundf: using cached result" 2
6459 set et_vect_call_roundf_saved($et_index) 0
6460 if { [istarget aarch64*-*-*] } {
6461 set et_vect_call_roundf_saved($et_index) 1
6465 verbose "check_effective_target_vect_call_roundf:\
6466 returning $et_vect_call_roundf_saved($et_index)" 2
6467 return $et_vect_call_roundf_saved($et_index)
6470 # Return 1 if the target supports section-anchors
6472 proc check_effective_target_section_anchors { } {
6473 global et_section_anchors_saved
6475 if [info exists et_section_anchors_saved] {
6476 verbose "check_effective_target_section_anchors: using cached result" 2
6478 set et_section_anchors_saved 0
6479 if { [istarget powerpc*-*-*]
6480 || [istarget arm*-*-*]
6481 || [istarget aarch64*-*-*] } {
6482 set et_section_anchors_saved 1
6486 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
6487 return $et_section_anchors_saved
6490 # Return 1 if the target supports atomic operations on "int_128" values.
6492 proc check_effective_target_sync_int_128 { } {
6493 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6494 && ![is-effective-target ia32])
6495 || [istarget spu-*-*] } {
6502 # Return 1 if the target supports atomic operations on "int_128" values
6503 # and can execute them.
6505 proc check_effective_target_sync_int_128_runtime { } {
6506 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6507 && ![is-effective-target ia32]
6508 && [check_cached_effective_target sync_int_128_available {
6509 check_runtime_nocache sync_int_128_available {
6513 unsigned int eax, ebx, ecx, edx;
6514 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6515 return !(ecx & bit_CMPXCHG16B);
6520 || [istarget spu-*-*] } {
6527 # Return 1 if the target supports atomic operations on "long long".
6529 # Note: 32bit x86 targets require -march=pentium in dg-options.
6530 # Note: 32bit s390 targets require -mzarch in dg-options.
6532 proc check_effective_target_sync_long_long { } {
6533 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
6534 || [istarget aarch64*-*-*]
6535 || [istarget arm*-*-*]
6536 || [istarget alpha*-*-*]
6537 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
6538 || [istarget s390*-*-*]
6539 || [istarget spu-*-*] } {
6546 # Return 1 if the target supports atomic operations on "long long"
6547 # and can execute them.
6549 # Note: 32bit x86 targets require -march=pentium in dg-options.
6551 proc check_effective_target_sync_long_long_runtime { } {
6552 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
6553 && [check_cached_effective_target sync_long_long_available {
6554 check_runtime_nocache sync_long_long_available {
6558 unsigned int eax, ebx, ecx, edx;
6559 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6560 return !(edx & bit_CMPXCHG8B);
6565 || [istarget aarch64*-*-*]
6566 || ([istarget arm*-*-linux-*]
6567 && [check_runtime sync_longlong_runtime {
6573 if (sizeof (long long) != 8)
6576 /* Just check for native;
6577 checking for kernel fallback is tricky. */
6578 asm volatile ("ldrexd r0,r1, [%0]"
6579 : : "r" (&l1) : "r0", "r1");
6583 || [istarget alpha*-*-*]
6584 || ([istarget sparc*-*-*]
6585 && [check_effective_target_lp64]
6586 && [check_effective_target_ultrasparc_hw])
6587 || [istarget spu-*-*]
6588 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
6595 # Return 1 if the target supports byte swap instructions.
6597 proc check_effective_target_bswap { } {
6598 global et_bswap_saved
6600 if [info exists et_bswap_saved] {
6601 verbose "check_effective_target_bswap: using cached result" 2
6603 set et_bswap_saved 0
6604 if { [istarget aarch64*-*-*]
6605 || [istarget alpha*-*-*]
6606 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6607 || [istarget m68k-*-*]
6608 || [istarget powerpc*-*-*]
6609 || [istarget rs6000-*-*]
6610 || [istarget s390*-*-*]
6611 || ([istarget arm*-*-*]
6612 && [check_no_compiler_messages_nocache arm_v6_or_later object {
6614 #error not armv6 or later
6618 set et_bswap_saved 1
6622 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
6623 return $et_bswap_saved
6626 # Return 1 if the target supports 16-bit byte swap instructions.
6628 proc check_effective_target_bswap16 { } {
6629 global et_bswap16_saved
6631 if [info exists et_bswap16_saved] {
6632 verbose "check_effective_target_bswap16: using cached result" 2
6634 set et_bswap16_saved 0
6635 if { [is-effective-target bswap]
6636 && ![istarget alpha*-*-*]
6637 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
6638 set et_bswap16_saved 1
6642 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
6643 return $et_bswap16_saved
6646 # Return 1 if the target supports 32-bit byte swap instructions.
6648 proc check_effective_target_bswap32 { } {
6649 global et_bswap32_saved
6651 if [info exists et_bswap32_saved] {
6652 verbose "check_effective_target_bswap32: using cached result" 2
6654 set et_bswap32_saved 0
6655 if { [is-effective-target bswap] } {
6656 set et_bswap32_saved 1
6660 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
6661 return $et_bswap32_saved
6664 # Return 1 if the target supports 64-bit byte swap instructions.
6666 # Note: 32bit s390 targets require -mzarch in dg-options.
6668 proc check_effective_target_bswap64 { } {
6669 global et_bswap64_saved
6671 # expand_unop can expand 64-bit byte swap on 32-bit targets
6672 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
6678 # Return 1 if the target supports atomic operations on "int" and "long".
6680 proc check_effective_target_sync_int_long { } {
6681 global et_sync_int_long_saved
6683 if [info exists et_sync_int_long_saved] {
6684 verbose "check_effective_target_sync_int_long: using cached result" 2
6686 set et_sync_int_long_saved 0
6687 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6688 # load-reserved/store-conditional instructions.
6689 if { [istarget ia64-*-*]
6690 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6691 || [istarget aarch64*-*-*]
6692 || [istarget alpha*-*-*]
6693 || [istarget arm*-*-linux-*]
6694 || ([istarget arm*-*-*]
6695 && [check_effective_target_arm_acq_rel])
6696 || [istarget bfin*-*linux*]
6697 || [istarget hppa*-*linux*]
6698 || [istarget s390*-*-*]
6699 || [istarget powerpc*-*-*]
6700 || [istarget crisv32-*-*] || [istarget cris-*-*]
6701 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6702 || [istarget spu-*-*]
6703 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6704 || [check_effective_target_mips_llsc] } {
6705 set et_sync_int_long_saved 1
6709 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
6710 return $et_sync_int_long_saved
6713 # Return 1 if the target supports atomic operations on "char" and "short".
6715 proc check_effective_target_sync_char_short { } {
6716 global et_sync_char_short_saved
6718 if [info exists et_sync_char_short_saved] {
6719 verbose "check_effective_target_sync_char_short: using cached result" 2
6721 set et_sync_char_short_saved 0
6722 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6723 # load-reserved/store-conditional instructions.
6724 if { [istarget aarch64*-*-*]
6725 || [istarget ia64-*-*]
6726 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6727 || [istarget alpha*-*-*]
6728 || [istarget arm*-*-linux-*]
6729 || ([istarget arm*-*-*]
6730 && [check_effective_target_arm_acq_rel])
6731 || [istarget hppa*-*linux*]
6732 || [istarget s390*-*-*]
6733 || [istarget powerpc*-*-*]
6734 || [istarget crisv32-*-*] || [istarget cris-*-*]
6735 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6736 || [istarget spu-*-*]
6737 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6738 || [check_effective_target_mips_llsc] } {
6739 set et_sync_char_short_saved 1
6743 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
6744 return $et_sync_char_short_saved
6747 # Return 1 if the target uses a ColdFire FPU.
6749 proc check_effective_target_coldfire_fpu { } {
6750 return [check_no_compiler_messages coldfire_fpu assembly {
6757 # Return true if this is a uClibc target.
6759 proc check_effective_target_uclibc {} {
6760 return [check_no_compiler_messages uclibc object {
6761 #include <features.h>
6762 #if !defined (__UCLIBC__)
6768 # Return true if this is a uclibc target and if the uclibc feature
6769 # described by __$feature__ is not present.
6771 proc check_missing_uclibc_feature {feature} {
6772 return [check_no_compiler_messages $feature object "
6773 #include <features.h>
6774 #if !defined (__UCLIBC) || defined (__${feature}__)
6780 # Return true if this is a Newlib target.
6782 proc check_effective_target_newlib {} {
6783 return [check_no_compiler_messages newlib object {
6788 # Some newlib versions don't provide a frexpl and instead depend
6789 # on frexp to implement long double conversions in their printf-like
6790 # functions. This leads to broken results. Detect such versions here.
6792 proc check_effective_target_newlib_broken_long_double_io {} {
6793 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
6799 # Return true if this is NOT a Bionic target.
6801 proc check_effective_target_non_bionic {} {
6802 return [check_no_compiler_messages non_bionic object {
6804 #if defined (__BIONIC__)
6810 # Return true if this target has error.h header.
6812 proc check_effective_target_error_h {} {
6813 return [check_no_compiler_messages error_h object {
6818 # Return true if this target has tgmath.h header.
6820 proc check_effective_target_tgmath_h {} {
6821 return [check_no_compiler_messages tgmath_h object {
6826 # Return true if target's libc supports complex functions.
6828 proc check_effective_target_libc_has_complex_functions {} {
6829 return [check_no_compiler_messages libc_has_complex_functions object {
6830 #include <complex.h>
6835 # (a) an error of a few ULP is expected in string to floating-point
6836 # conversion functions; and
6837 # (b) overflow is not always detected correctly by those functions.
6839 proc check_effective_target_lax_strtofp {} {
6840 # By default, assume that all uClibc targets suffer from this.
6841 return [check_effective_target_uclibc]
6844 # Return 1 if this is a target for which wcsftime is a dummy
6845 # function that always returns 0.
6847 proc check_effective_target_dummy_wcsftime {} {
6848 # By default, assume that all uClibc targets suffer from this.
6849 return [check_effective_target_uclibc]
6852 # Return 1 if constructors with initialization priority arguments are
6853 # supposed on this target.
6855 proc check_effective_target_init_priority {} {
6856 return [check_no_compiler_messages init_priority assembly "
6857 void f() __attribute__((constructor (1000)));
6862 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
6863 # This can be used with any check_* proc that takes no argument and
6864 # returns only 1 or 0. It could be used with check_* procs that take
6865 # arguments with keywords that pass particular arguments.
6867 proc is-effective-target { arg } {
6870 if { ![info exists et_index] } {
6871 # Initialize the effective target index that is used in some
6872 # check_effective_target_* procs.
6875 if { [info procs check_effective_target_${arg}] != [list] } {
6876 set selected [check_effective_target_${arg}]
6879 "vmx_hw" { set selected [check_vmx_hw_available] }
6880 "vsx_hw" { set selected [check_vsx_hw_available] }
6881 "p8vector_hw" { set selected [check_p8vector_hw_available] }
6882 "p9vector_hw" { set selected [check_p9vector_hw_available] }
6883 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
6884 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
6885 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
6886 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
6887 "dfp_hw" { set selected [check_dfp_hw_available] }
6888 "htm_hw" { set selected [check_htm_hw_available] }
6889 "named_sections" { set selected [check_named_sections_available] }
6890 "gc_sections" { set selected [check_gc_sections_available] }
6891 "cxa_atexit" { set selected [check_cxa_atexit_available] }
6892 default { error "unknown effective target keyword `$arg'" }
6895 verbose "is-effective-target: $arg $selected" 2
6899 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
6901 proc is-effective-target-keyword { arg } {
6902 if { [info procs check_effective_target_${arg}] != [list] } {
6905 # These have different names for their check_* procs.
6907 "vmx_hw" { return 1 }
6908 "vsx_hw" { return 1 }
6909 "p8vector_hw" { return 1 }
6910 "p9vector_hw" { return 1 }
6911 "p9modulo_hw" { return 1 }
6912 "ppc_float128_sw" { return 1 }
6913 "ppc_float128_hw" { return 1 }
6914 "ppc_recip_hw" { return 1 }
6915 "dfp_hw" { return 1 }
6916 "htm_hw" { return 1 }
6917 "named_sections" { return 1 }
6918 "gc_sections" { return 1 }
6919 "cxa_atexit" { return 1 }
6920 default { return 0 }
6925 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
6926 # indicate what target is currently being processed. This is for
6927 # the vectorizer tests, e.g. vect_int, to keep track what target supports
6930 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
6931 global dg-do-what-default
6932 global EFFECTIVE_TARGETS
6935 if { [llength $EFFECTIVE_TARGETS] > 0 } {
6936 foreach target $EFFECTIVE_TARGETS {
6937 set target_flags $flags
6938 set dg-do-what-default compile
6939 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
6940 if { [info procs add_options_for_${target}] != [list] } {
6941 set target_flags [add_options_for_${target} "$flags"]
6943 if { [info procs check_effective_target_${target}_runtime]
6944 != [list] && [check_effective_target_${target}_runtime] } {
6945 set dg-do-what-default run
6947 $runtest $testcases $target_flags ${default-extra-flags}
6951 $runtest $testcases $flags ${default-extra-flags}
6955 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
6956 # et_index, 0 otherwise.
6958 proc et-is-effective-target { target } {
6959 global EFFECTIVE_TARGETS
6962 if { [llength $EFFECTIVE_TARGETS] > $et_index
6963 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
6969 # Return 1 if target default to short enums
6971 proc check_effective_target_short_enums { } {
6972 return [check_no_compiler_messages short_enums assembly {
6974 int s[sizeof (enum foo) == 1 ? 1 : -1];
6978 # Return 1 if target supports merging string constants at link time.
6980 proc check_effective_target_string_merging { } {
6981 return [check_no_messages_and_pattern string_merging \
6982 "rodata\\.str" assembly {
6983 const char *var = "String";
6987 # Return 1 if target has the basic signed and unsigned types in
6988 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
6989 # working <stdint.h> for all targets.
6991 proc check_effective_target_stdint_types { } {
6992 return [check_no_compiler_messages stdint_types assembly {
6994 int8_t a; int16_t b; int32_t c; int64_t d;
6995 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6999 # Return 1 if target has the basic signed and unsigned types in
7000 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
7001 # these types agree with those in the header, as some systems have
7002 # only <inttypes.h>.
7004 proc check_effective_target_inttypes_types { } {
7005 return [check_no_compiler_messages inttypes_types assembly {
7006 #include <inttypes.h>
7007 int8_t a; int16_t b; int32_t c; int64_t d;
7008 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7012 # Return 1 if programs are intended to be run on a simulator
7013 # (i.e. slowly) rather than hardware (i.e. fast).
7015 proc check_effective_target_simulator { } {
7017 # All "src/sim" simulators set this one.
7018 if [board_info target exists is_simulator] {
7019 return [board_info target is_simulator]
7022 # The "sid" simulators don't set that one, but at least they set
7024 if [board_info target exists slow_simulator] {
7025 return [board_info target slow_simulator]
7031 # Return 1 if programs are intended to be run on hardware rather than
7034 proc check_effective_target_hw { } {
7036 # All "src/sim" simulators set this one.
7037 if [board_info target exists is_simulator] {
7038 if [board_info target is_simulator] {
7045 # The "sid" simulators don't set that one, but at least they set
7047 if [board_info target exists slow_simulator] {
7048 if [board_info target slow_simulator] {
7058 # Return 1 if the target is a VxWorks kernel.
7060 proc check_effective_target_vxworks_kernel { } {
7061 return [check_no_compiler_messages vxworks_kernel assembly {
7062 #if !defined __vxworks || defined __RTP__
7068 # Return 1 if the target is a VxWorks RTP.
7070 proc check_effective_target_vxworks_rtp { } {
7071 return [check_no_compiler_messages vxworks_rtp assembly {
7072 #if !defined __vxworks || !defined __RTP__
7078 # Return 1 if the target is expected to provide wide character support.
7080 proc check_effective_target_wchar { } {
7081 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
7084 return [check_no_compiler_messages wchar assembly {
7089 # Return 1 if the target has <pthread.h>.
7091 proc check_effective_target_pthread_h { } {
7092 return [check_no_compiler_messages pthread_h assembly {
7093 #include <pthread.h>
7097 # Return 1 if the target can truncate a file from a file-descriptor,
7098 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
7099 # chsize. We test for a trivially functional truncation; no stubs.
7100 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
7101 # different function to be used.
7103 proc check_effective_target_fd_truncate { } {
7105 #define _FILE_OFFSET_BITS 64
7112 FILE *f = fopen ("tst.tmp", "wb");
7114 const char t[] = "test writing more than ten characters";
7118 write (fd, t, sizeof (t) - 1);
7120 if (ftruncate (fd, 10) != 0)
7129 f = fopen ("tst.tmp", "rb");
7130 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7138 if { [check_runtime ftruncate $prog] } {
7142 regsub "ftruncate" $prog "chsize" prog
7143 return [check_runtime chsize $prog]
7146 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7148 proc add_options_for_c99_runtime { flags } {
7149 if { [istarget *-*-solaris2*] } {
7150 return "$flags -std=c99"
7152 if { [istarget powerpc-*-darwin*] } {
7153 return "$flags -mmacosx-version-min=10.3"
7158 # Add to FLAGS all the target-specific flags needed to enable
7159 # full IEEE compliance mode.
7161 proc add_options_for_ieee { flags } {
7162 if { [istarget alpha*-*-*]
7163 || [istarget sh*-*-*] } {
7164 return "$flags -mieee"
7166 if { [istarget rx-*-*] } {
7167 return "$flags -mnofpu"
7172 if {![info exists flags_to_postpone]} {
7173 set flags_to_postpone ""
7176 # Add to FLAGS the flags needed to enable functions to bind locally
7177 # when using pic/PIC passes in the testsuite.
7178 proc add_options_for_bind_pic_locally { flags } {
7179 global flags_to_postpone
7181 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
7182 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
7183 # order to make sure that the multilib_flags doesn't override this.
7185 if {[check_no_compiler_messages using_pic2 assembly {
7190 set flags_to_postpone "-fPIE"
7193 if {[check_no_compiler_messages using_pic1 assembly {
7198 set flags_to_postpone "-fpie"
7204 # Add to FLAGS the flags needed to enable 64-bit vectors.
7206 proc add_options_for_double_vectors { flags } {
7207 if [is-effective-target arm_neon_ok] {
7208 return "$flags -mvectorize-with-neon-double"
7214 # Return 1 if the target provides a full C99 runtime.
7216 proc check_effective_target_c99_runtime { } {
7217 return [check_cached_effective_target c99_runtime {
7220 set file [open "$srcdir/gcc.dg/builtins-config.h"]
7221 set contents [read $file]
7224 #ifndef HAVE_C99_RUNTIME
7225 #error !HAVE_C99_RUNTIME
7228 check_no_compiler_messages_nocache c99_runtime assembly \
7229 $contents [add_options_for_c99_runtime ""]
7233 # Return 1 if target wchar_t is at least 4 bytes.
7235 proc check_effective_target_4byte_wchar_t { } {
7236 return [check_no_compiler_messages 4byte_wchar_t object {
7237 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
7241 # Return 1 if the target supports automatic stack alignment.
7243 proc check_effective_target_automatic_stack_alignment { } {
7244 # Ordinarily x86 supports automatic stack alignment ...
7245 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
7246 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
7247 # ... except Win64 SEH doesn't. Succeed for Win32 though.
7248 return [check_effective_target_ilp32];
7255 # Return true if we are compiling for AVX target.
7257 proc check_avx_available { } {
7258 if { [check_no_compiler_messages avx_available assembly {
7268 # Return true if 32- and 16-bytes vectors are available.
7270 proc check_effective_target_vect_sizes_32B_16B { } {
7271 if { [check_avx_available] && ![check_prefer_avx128] } {
7278 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7281 proc check_prefer_avx128 { } {
7282 if ![check_avx_available] {
7285 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7286 float a[1024],b[1024],c[1024];
7287 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7288 } "-O2 -ftree-vectorize"]
7292 # Return 1 if avx512f instructions can be compiled.
7294 proc check_effective_target_avx512f { } {
7295 return [check_no_compiler_messages avx512f object {
7296 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7298 __m512d _mm512_add (__m512d a)
7300 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7305 # Return 1 if avx instructions can be compiled.
7307 proc check_effective_target_avx { } {
7308 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7311 return [check_no_compiler_messages avx object {
7312 void _mm256_zeroall (void)
7314 __builtin_ia32_vzeroall ();
7319 # Return 1 if avx2 instructions can be compiled.
7320 proc check_effective_target_avx2 { } {
7321 return [check_no_compiler_messages avx2 object {
7322 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7324 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7326 return __builtin_ia32_andnotsi256 (__X, __Y);
7331 # Return 1 if sse instructions can be compiled.
7332 proc check_effective_target_sse { } {
7333 return [check_no_compiler_messages sse object {
7336 __builtin_ia32_stmxcsr ();
7342 # Return 1 if sse2 instructions can be compiled.
7343 proc check_effective_target_sse2 { } {
7344 return [check_no_compiler_messages sse2 object {
7345 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7347 __m128i _mm_srli_si128 (__m128i __A, int __N)
7349 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7354 # Return 1 if sse4.1 instructions can be compiled.
7355 proc check_effective_target_sse4 { } {
7356 return [check_no_compiler_messages sse4.1 object {
7357 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7358 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7360 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7362 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7368 # Return 1 if F16C instructions can be compiled.
7370 proc check_effective_target_f16c { } {
7371 return [check_no_compiler_messages f16c object {
7372 #include "immintrin.h"
7374 foo (unsigned short val)
7376 return _cvtsh_ss (val);
7381 # Return 1 if C wchar_t type is compatible with char16_t.
7383 proc check_effective_target_wchar_t_char16_t_compatible { } {
7384 return [check_no_compiler_messages wchar_t_char16_t object {
7386 __CHAR16_TYPE__ *p16 = &wc;
7387 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7391 # Return 1 if C wchar_t type is compatible with char32_t.
7393 proc check_effective_target_wchar_t_char32_t_compatible { } {
7394 return [check_no_compiler_messages wchar_t_char32_t object {
7396 __CHAR32_TYPE__ *p32 = &wc;
7397 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7401 # Return 1 if pow10 function exists.
7403 proc check_effective_target_pow10 { } {
7404 return [check_runtime pow10 {
7414 # Return 1 if frexpl function exists.
7416 proc check_effective_target_frexpl { } {
7417 return [check_runtime frexpl {
7422 x = frexpl (5.0, &y);
7429 # Return 1 if issignaling function exists.
7430 proc check_effective_target_issignaling {} {
7431 return [check_runtime issignaling {
7436 return issignaling (0.0);
7441 # Return 1 if current options generate DFP instructions, 0 otherwise.
7442 proc check_effective_target_hard_dfp {} {
7443 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
7444 typedef float d64 __attribute__((mode(DD)));
7446 void foo (void) { z = x + y; }
7450 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
7451 # for strchr etc. functions.
7453 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
7454 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
7457 #if !defined(__cplusplus) \
7458 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
7459 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
7460 ISO C++ correct string.h and wchar.h protos not supported.
7467 # Return 1 if GNU as is used.
7469 proc check_effective_target_gas { } {
7470 global use_gas_saved
7473 if {![info exists use_gas_saved]} {
7474 # Check if the as used by gcc is GNU as.
7475 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
7476 # Provide /dev/null as input, otherwise gas times out reading from
7478 set status [remote_exec host "$gcc_as" "-v /dev/null"]
7479 set as_output [lindex $status 1]
7480 if { [ string first "GNU" $as_output ] >= 0 } {
7486 return $use_gas_saved
7489 # Return 1 if GNU ld is used.
7491 proc check_effective_target_gld { } {
7492 global use_gld_saved
7495 if {![info exists use_gld_saved]} {
7496 # Check if the ld used by gcc is GNU ld.
7497 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
7498 set status [remote_exec host "$gcc_ld" "--version"]
7499 set ld_output [lindex $status 1]
7500 if { [ string first "GNU" $ld_output ] >= 0 } {
7506 return $use_gld_saved
7509 # Return 1 if the compiler has been configure with link-time optimization
7512 proc check_effective_target_lto { } {
7513 if { [istarget nvptx-*-*] } {
7516 return [check_no_compiler_messages lto object {
7521 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
7523 proc check_effective_target_maybe_x32 { } {
7524 return [check_no_compiler_messages maybe_x32 object {
7526 } "-mx32 -maddress-mode=short"]
7529 # Return 1 if this target supports the -fsplit-stack option, 0
7532 proc check_effective_target_split_stack {} {
7533 return [check_no_compiler_messages split_stack object {
7538 # Return 1 if this target supports the -masm=intel option, 0
7541 proc check_effective_target_masm_intel {} {
7542 return [check_no_compiler_messages masm_intel object {
7543 extern void abort (void);
7547 # Return 1 if the language for the compiler under test is C.
7549 proc check_effective_target_c { } {
7551 if [string match $tool "gcc"] {
7557 # Return 1 if the language for the compiler under test is C++.
7559 proc check_effective_target_c++ { } {
7561 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
7567 set cxx_default "c++14"
7568 # Check whether the current active language standard supports the features
7569 # of C++11/C++14 by checking for the presence of one of the -std flags.
7570 # This assumes that the default for the compiler is $cxx_default, and that
7571 # there will never be multiple -std= arguments on the command line.
7572 proc check_effective_target_c++11_only { } {
7574 if ![check_effective_target_c++] {
7577 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
7580 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
7585 proc check_effective_target_c++11 { } {
7586 if [check_effective_target_c++11_only] {
7589 return [check_effective_target_c++14]
7591 proc check_effective_target_c++11_down { } {
7592 if ![check_effective_target_c++] {
7595 return [expr ![check_effective_target_c++14] ]
7598 proc check_effective_target_c++14_only { } {
7600 if ![check_effective_target_c++] {
7603 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
7606 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
7612 proc check_effective_target_c++14 { } {
7613 if [check_effective_target_c++14_only] {
7616 return [check_effective_target_c++1z]
7618 proc check_effective_target_c++14_down { } {
7619 if ![check_effective_target_c++] {
7622 return [expr ![check_effective_target_c++1z] ]
7625 proc check_effective_target_c++98_only { } {
7627 if ![check_effective_target_c++] {
7630 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
7633 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
7639 proc check_effective_target_c++1z_only { } {
7641 if ![check_effective_target_c++] {
7644 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
7647 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
7652 proc check_effective_target_c++1z { } {
7653 return [check_effective_target_c++1z_only]
7656 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
7657 proc check_effective_target_concepts { } {
7658 return [check-flags { "" { } { -fconcepts } }]
7661 # Return 1 if expensive testcases should be run.
7663 proc check_effective_target_run_expensive_tests { } {
7664 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
7670 # Returns 1 if "mempcpy" is available on the target system.
7672 proc check_effective_target_mempcpy {} {
7673 return [check_function_available "mempcpy"]
7676 # Returns 1 if "stpcpy" is available on the target system.
7678 proc check_effective_target_stpcpy {} {
7679 return [check_function_available "stpcpy"]
7682 # Check whether the vectorizer tests are supported by the target and
7683 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
7684 # If a port wants to execute the tests more than once it should append
7685 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
7686 # will be added by a call to add_options_for_<target>.
7687 # Set dg-do-what-default to either compile or run, depending on target
7688 # capabilities. Do not set this if the supported target is appended to
7689 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
7690 # automatically. Return the number of effective targets if vectorizer tests
7691 # are supported, 0 otherwise.
7693 proc check_vect_support_and_set_flags { } {
7694 global DEFAULT_VECTCFLAGS
7695 global dg-do-what-default
7696 global EFFECTIVE_TARGETS
7698 if [istarget powerpc-*paired*] {
7699 lappend DEFAULT_VECTCFLAGS "-mpaired"
7700 if [check_750cl_hw_available] {
7701 set dg-do-what-default run
7703 set dg-do-what-default compile
7705 } elseif [istarget powerpc*-*-*] {
7706 # Skip targets not supporting -maltivec.
7707 if ![is-effective-target powerpc_altivec_ok] {
7711 lappend DEFAULT_VECTCFLAGS "-maltivec"
7712 if [check_p9vector_hw_available] {
7713 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
7714 } elseif [check_p8vector_hw_available] {
7715 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
7716 } elseif [check_vsx_hw_available] {
7717 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
7720 if [check_vmx_hw_available] {
7721 set dg-do-what-default run
7723 if [is-effective-target ilp32] {
7724 # Specify a cpu that supports VMX for compile-only tests.
7725 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
7727 set dg-do-what-default compile
7729 } elseif { [istarget spu-*-*] } {
7730 set dg-do-what-default run
7731 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
7732 lappend DEFAULT_VECTCFLAGS "-msse2"
7733 if { [check_effective_target_sse2_runtime] } {
7734 set dg-do-what-default run
7736 set dg-do-what-default compile
7738 } elseif { [istarget mips*-*-*]
7739 && [check_effective_target_nomips16] } {
7740 if { [check_effective_target_mpaired_single] } {
7741 lappend EFFECTIVE_TARGETS mpaired_single
7743 if { [check_effective_target_mips_loongson] } {
7744 lappend EFFECTIVE_TARGETS mips_loongson
7746 if { [check_effective_target_mips_msa] } {
7747 lappend EFFECTIVE_TARGETS mips_msa
7749 return [llength $EFFECTIVE_TARGETS]
7750 } elseif [istarget sparc*-*-*] {
7751 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
7752 if [check_effective_target_ultrasparc_hw] {
7753 set dg-do-what-default run
7755 set dg-do-what-default compile
7757 } elseif [istarget alpha*-*-*] {
7758 # Alpha's vectorization capabilities are extremely limited.
7759 # It's more effort than its worth disabling all of the tests
7760 # that it cannot pass. But if you actually want to see what
7761 # does work, command out the return.
7764 lappend DEFAULT_VECTCFLAGS "-mmax"
7765 if [check_alpha_max_hw_available] {
7766 set dg-do-what-default run
7768 set dg-do-what-default compile
7770 } elseif [istarget ia64-*-*] {
7771 set dg-do-what-default run
7772 } elseif [is-effective-target arm_neon_ok] {
7773 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
7774 # NEON does not support denormals, so is not used for vectorization by
7775 # default to avoid loss of precision. We must pass -ffast-math to test
7776 # vectorization of float operations.
7777 lappend DEFAULT_VECTCFLAGS "-ffast-math"
7778 if [is-effective-target arm_neon_hw] {
7779 set dg-do-what-default run
7781 set dg-do-what-default compile
7783 } elseif [istarget "aarch64*-*-*"] {
7784 set dg-do-what-default run
7792 # Return 1 if the target does *not* require strict alignment.
7794 proc check_effective_target_non_strict_align {} {
7796 # On ARM, the default is to use STRICT_ALIGNMENT, but there
7797 # are interfaces defined for misaligned access and thus
7798 # depending on the architecture levels unaligned access is
7800 if [istarget "arm*-*-*"] {
7801 return [check_effective_target_arm_unaligned]
7804 return [check_no_compiler_messages non_strict_align assembly {
7806 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
7808 void foo(void) { z = (c *) y; }
7812 # Return 1 if the target has <ucontext.h>.
7814 proc check_effective_target_ucontext_h { } {
7815 return [check_no_compiler_messages ucontext_h assembly {
7816 #include <ucontext.h>
7820 proc check_effective_target_aarch64_tiny { } {
7821 if { [istarget aarch64*-*-*] } {
7822 return [check_no_compiler_messages aarch64_tiny object {
7823 #ifdef __AARCH64_CMODEL_TINY__
7826 #error target not AArch64 tiny code model
7834 # Create functions to check that the AArch64 assembler supports the
7835 # various architecture extensions via the .arch_extension pseudo-op.
7837 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
7838 eval [string map [list FUNC $aarch64_ext] {
7839 proc check_effective_target_aarch64_asm_FUNC_ok { } {
7840 if { [istarget aarch64*-*-*] } {
7841 return [check_no_compiler_messages aarch64_FUNC_assembler object {
7842 __asm__ (".arch_extension FUNC");
7843 } "-march=armv8-a+FUNC"]
7851 proc check_effective_target_aarch64_small { } {
7852 if { [istarget aarch64*-*-*] } {
7853 return [check_no_compiler_messages aarch64_small object {
7854 #ifdef __AARCH64_CMODEL_SMALL__
7857 #error target not AArch64 small code model
7865 proc check_effective_target_aarch64_large { } {
7866 if { [istarget aarch64*-*-*] } {
7867 return [check_no_compiler_messages aarch64_large object {
7868 #ifdef __AARCH64_CMODEL_LARGE__
7871 #error target not AArch64 large code model
7880 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
7881 # register set, instruction set, addressing capabilities and ABI.
7883 proc check_effective_target_avr_tiny { } {
7884 if { [istarget avr*-*-*] } {
7885 return [check_no_compiler_messages avr_tiny object {
7889 #error target not a reduced AVR Tiny core
7897 # Return 1 if <fenv.h> is available with all the standard IEEE
7898 # exceptions and floating-point exceptions are raised by arithmetic
7899 # operations. (If the target requires special options for "inexact"
7900 # exceptions, those need to be specified in the testcases.)
7902 proc check_effective_target_fenv_exceptions {} {
7903 return [check_runtime fenv_exceptions {
7906 #ifndef FE_DIVBYZERO
7907 # error Missing FE_DIVBYZERO
7910 # error Missing FE_INEXACT
7913 # error Missing FE_INVALID
7916 # error Missing FE_OVERFLOW
7918 #ifndef FE_UNDERFLOW
7919 # error Missing FE_UNDERFLOW
7921 volatile float a = 0.0f, r;
7926 if (fetestexcept (FE_INVALID))
7931 } [add_options_for_ieee "-std=gnu99"]]
7934 proc check_effective_target_tiny {} {
7935 global et_target_tiny_saved
7937 if [info exists et_target_tiny_saved] {
7938 verbose "check_effective_target_tiny: using cached result" 2
7940 set et_target_tiny_saved 0
7941 if { [istarget aarch64*-*-*]
7942 && [check_effective_target_aarch64_tiny] } {
7943 set et_target_tiny_saved 1
7945 if { [istarget avr-*-*]
7946 && [check_effective_target_avr_tiny] } {
7947 set et_target_tiny_saved 1
7951 return $et_target_tiny_saved
7954 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
7956 proc check_effective_target_logical_op_short_circuit {} {
7957 if { [istarget mips*-*-*]
7958 || [istarget arc*-*-*]
7959 || [istarget avr*-*-*]
7960 || [istarget crisv32-*-*] || [istarget cris-*-*]
7961 || [istarget mmix-*-*]
7962 || [istarget s390*-*-*]
7963 || [istarget powerpc*-*-*]
7964 || [istarget nios2*-*-*]
7965 || [istarget visium-*-*]
7966 || [check_effective_target_arm_cortex_m] } {
7972 # Record that dg-final test TEST requires convential compilation.
7974 proc force_conventional_output_for { test } {
7975 if { [info proc $test] == "" } {
7976 perror "$test does not exist"
7979 proc ${test}_required_options {} {
7980 global gcc_force_conventional_output
7981 return $gcc_force_conventional_output
7985 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
7986 # otherwise. Cache the result.
7988 proc check_effective_target_pie_copyreloc { } {
7989 global pie_copyreloc_available_saved
7991 global GCC_UNDER_TEST
7993 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7997 # Need auto-host.h to check linker support.
7998 if { ![file exists ../../auto-host.h ] } {
8002 if [info exists pie_copyreloc_available_saved] {
8003 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8005 # Set up and compile to see if linker supports PIE with copy
8006 # reloc. Include the current process ID in the file names to
8007 # prevent conflicts with invocations for multiple testsuites.
8012 set f [open $src "w"]
8013 puts $f "#include \"../../auto-host.h\""
8014 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8015 puts $f "# error Linker does not support PIE with copy reloc."
8019 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8020 set lines [${tool}_target_compile $src $obj object ""]
8025 if [string match "" $lines] then {
8026 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8027 set pie_copyreloc_available_saved 1
8029 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8030 set pie_copyreloc_available_saved 0
8034 return $pie_copyreloc_available_saved
8037 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8038 # otherwise. Cache the result.
8040 proc check_effective_target_got32x_reloc { } {
8041 global got32x_reloc_available_saved
8043 global GCC_UNDER_TEST
8045 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8049 # Need auto-host.h to check linker support.
8050 if { ![file exists ../../auto-host.h ] } {
8054 if [info exists got32x_reloc_available_saved] {
8055 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8057 # Include the current process ID in the file names to prevent
8058 # conflicts with invocations for multiple testsuites.
8060 set src got32x[pid].c
8061 set obj got32x[pid].o
8063 set f [open $src "w"]
8064 puts $f "#include \"../../auto-host.h\""
8065 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8066 puts $f "# error Assembler does not support R_386_GOT32X."
8070 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8071 set lines [${tool}_target_compile $src $obj object ""]
8076 if [string match "" $lines] then {
8077 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8078 set got32x_reloc_available_saved 1
8080 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8081 set got32x_reloc_available_saved 0
8085 return $got32x_reloc_available_saved
8088 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8089 # 0 otherwise. Cache the result.
8091 proc check_effective_target_tls_get_addr_via_got { } {
8092 global tls_get_addr_via_got_available_saved
8094 global GCC_UNDER_TEST
8096 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8100 # Need auto-host.h to check linker support.
8101 if { ![file exists ../../auto-host.h ] } {
8105 if [info exists tls_get_addr_via_got_available_saved] {
8106 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8108 # Include the current process ID in the file names to prevent
8109 # conflicts with invocations for multiple testsuites.
8111 set src tls_get_addr_via_got[pid].c
8112 set obj tls_get_addr_via_got[pid].o
8114 set f [open $src "w"]
8115 puts $f "#include \"../../auto-host.h\""
8116 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8117 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8121 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8122 set lines [${tool}_target_compile $src $obj object ""]
8127 if [string match "" $lines] then {
8128 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8129 set tls_get_addr_via_got_available_saved 1
8131 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8132 set tls_get_addr_via_got_available_saved 0
8136 return $tls_get_addr_via_got_available_saved
8139 # Return 1 if the target uses comdat groups.
8141 proc check_effective_target_comdat_group {} {
8142 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8144 inline int foo () { return 1; }
8149 # Return 1 if target supports __builtin_eh_return
8150 proc check_effective_target_builtin_eh_return { } {
8151 return [check_no_compiler_messages builtin_eh_return object {
8152 void test (long l, void *p)
8154 __builtin_eh_return (l, p);
8159 # Return 1 if the target supports max reduction for vectors.
8161 proc check_effective_target_vect_max_reduc { } {
8162 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
8168 # Return 1 if there is an nvptx offload compiler.
8170 proc check_effective_target_offload_nvptx { } {
8171 return [check_no_compiler_messages offload_nvptx object {
8172 int main () {return 0;}
8173 } "-foffload=nvptx-none" ]
8176 # Return 1 if the compiler has been configured with hsa offloading.
8178 proc check_effective_target_offload_hsa { } {
8179 return [check_no_compiler_messages offload_hsa assembly {
8180 int main () {return 0;}
8184 # Return 1 if the target support -fprofile-update=atomic
8185 proc check_effective_target_profile_update_atomic {} {
8186 return [check_no_compiler_messages profile_update_atomic assembly {
8187 int main (void) { return 0; }
8188 } "-fprofile-update=atomic -fprofile-generate"]
8191 #For versions of ARM architectures that have hardware div insn,
8192 #disable the divmod transform
8194 proc check_effective_target_arm_divmod_simode { } {
8195 return [check_no_compiler_messages arm_divmod assembly {
8196 #ifdef __ARM_ARCH_EXT_IDIV__
8203 # Return 1 if target supports divmod hardware insn or divmod libcall.
8205 proc check_effective_target_divmod { } {
8206 #TODO: Add checks for all targets that have either hardware divmod insn
8207 # or define libfunc for divmod.
8208 if { [istarget arm*-*-*]
8209 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8215 # Return 1 if target supports divmod for SImode. The reason for
8216 # separating this from check_effective_target_divmod is that
8217 # some versions of ARM architecture define div instruction
8218 # only for simode, and for these archs, we do not want to enable
8219 # divmod transform for simode.
8221 proc check_effective_target_divmod_simode { } {
8222 if { [istarget arm*-*-*] } {
8223 return [check_effective_target_arm_divmod_simode]
8226 return [check_effective_target_divmod]
8229 # Return 1 if store merging optimization is applicable for target.
8230 # Store merging is not profitable for targets like the avr which
8231 # can load/store only one byte at a time. Use int size as a proxy
8232 # for the number of bytes the target can write, and skip for targets
8233 # with a smallish (< 32) size.
8235 proc check_effective_target_store_merge { } {
8236 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
8243 # Return 1 if the target supports coprocessor instructions: cdp, ldc, stc, mcr and
8245 proc check_effective_target_arm_coproc1_ok_nocache { } {
8246 if { ![istarget arm*-*-*] } {
8249 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
8250 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
8256 proc check_effective_target_arm_coproc1_ok { } {
8257 return [check_cached_effective_target arm_coproc1_ok \
8258 check_effective_target_arm_coproc1_ok_nocache]
8261 # Return 1 if the target supports all coprocessor instructions checked by
8262 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
8263 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
8264 proc check_effective_target_arm_coproc2_ok_nocache { } {
8265 if { ![check_effective_target_arm_coproc1_ok] } {
8268 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
8275 proc check_effective_target_arm_coproc2_ok { } {
8276 return [check_cached_effective_target arm_coproc2_ok \
8277 check_effective_target_arm_coproc2_ok_nocache]
8280 # Return 1 if the target supports all coprocessor instructions checked by
8281 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
8283 proc check_effective_target_arm_coproc3_ok_nocache { } {
8284 if { ![check_effective_target_arm_coproc2_ok] } {
8287 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
8288 #if __ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__)
8294 proc check_effective_target_arm_coproc3_ok { } {
8295 return [check_cached_effective_target arm_coproc3_ok \
8296 check_effective_target_arm_coproc3_ok_nocache]
8299 # Return 1 if the target supports all coprocessor instructions checked by
8300 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
8302 proc check_effective_target_arm_coproc4_ok_nocache { } {
8303 if { ![check_effective_target_arm_coproc3_ok] } {
8306 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
8313 proc check_effective_target_arm_coproc4_ok { } {
8314 return [check_cached_effective_target arm_coproc4_ok \
8315 check_effective_target_arm_coproc4_ok_nocache]