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Apppend $prop to et_prop_list only if needed
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1 # Copyright (C) 1999-2015 Free Software Foundation, Inc.
2
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
7 #
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
12 #
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
16
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
19
20 # This file defines procs for determining features supported by the target.
21
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
26 #
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
30 #
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
33 # "// C++" for c++,
34 # "! Fortran" for Fortran code,
35 # "/* ObjC", for ObjC
36 # "// ObjC++" for ObjC++
37 # and "// Go" for Go
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
41 global tool
42 verbose "check_compile tool: $tool for $basename"
43
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
50 }
51
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
54 } else {
55 set options ""
56 }
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
63 default {
64 switch -- $tool {
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
68 }
69 }
70 }
71
72 set compile_type $type
73 switch -glob $type {
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
77 "rtl-*" {
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
81 }
82 }
83 set f [open $src "w"]
84 puts $f $contents
85 close $f
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
87 file delete $src
88
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
94 file delete $output
95 }
96
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
100 }
101
102 return [list $lines $scan_output]
103 }
104
105 proc current_target_name { } {
106 global target_info
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
109 } else {
110 set answer ""
111 }
112 return $answer
113 }
114
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
117
118 proc check_cached_effective_target { prop args } {
119 global et_cache
120 global et_prop_list
121
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
131 }
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
133 }
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
136 return $value
137 }
138
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
141 # ALWAYS_CXXFLAGS.
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
147
148 proc clear_effective_target_cache { } {
149 global et_cache
150 global et_prop_list
151
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
157 }
158 unset et_prop_list
159 }
160 }
161
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
170 }
171
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
178 }]
179 }
180
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
188 #
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
192 global tool
193
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
197
198 set ok 0
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
203 close $chan
204 }
205
206 remote_file build delete $output
207 return $ok
208 }
209
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
216 }]
217 }
218
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
224 global tool
225
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
229
230 set ok 0
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
237 set ok 1
238 }
239 }
240 remote_file build delete $output
241 return $ok
242 }
243
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
246 # filenames.
247 proc check_runtime {prop args} {
248 global tool
249
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
252 }]
253 }
254
255 ###############################
256 # proc check_weak_available { }
257 ###############################
258
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
261
262 proc check_weak_available { } {
263 global target_cpu
264
265 # All mips targets should support it
266
267 if { [ string first "mips" $target_cpu ] >= 0 } {
268 return 1
269 }
270
271 # All AIX targets should support it
272
273 if { [istarget *-*-aix*] } {
274 return 1
275 }
276
277 # All solaris2 targets should support it
278
279 if { [istarget *-*-solaris2*] } {
280 return 1
281 }
282
283 # Windows targets Cygwin and MingW32 support it
284
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
286 return 1
287 }
288
289 # HP-UX 10.X doesn't support it
290
291 if { [istarget hppa*-*-hpux10*] } {
292 return 0
293 }
294
295 # ELF and ECOFF support it. a.out does with gas/gld but may also with
296 # other linkers, so we should try it
297
298 set objformat [gcc_target_object_format]
299
300 switch $objformat {
301 elf { return 1 }
302 ecoff { return 1 }
303 a.out { return 1 }
304 mach-o { return 1 }
305 som { return 1 }
306 unknown { return -1 }
307 default { return 0 }
308 }
309 }
310
311 ###############################
312 # proc check_weak_override_available { }
313 ###############################
314
315 # Like check_weak_available, but return 0 if weak symbol definitions
316 # cannot be overridden.
317
318 proc check_weak_override_available { } {
319 if { [istarget *-*-mingw*] } {
320 return 0
321 }
322 return [check_weak_available]
323 }
324
325 ###############################
326 # proc check_visibility_available { what_kind }
327 ###############################
328
329 # The visibility attribute is only support in some object formats
330 # This proc returns 1 if it is supported, 0 if not.
331 # The argument is the kind of visibility, default/protected/hidden/internal.
332
333 proc check_visibility_available { what_kind } {
334 if [string match "" $what_kind] { set what_kind "hidden" }
335
336 return [check_no_compiler_messages visibility_available_$what_kind object "
337 void f() __attribute__((visibility(\"$what_kind\")));
338 void f() {}
339 "]
340 }
341
342 ###############################
343 # proc check_alias_available { }
344 ###############################
345
346 # Determine if the target toolchain supports the alias attribute.
347
348 # Returns 2 if the target supports aliases. Returns 1 if the target
349 # only supports weak aliased. Returns 0 if the target does not
350 # support aliases at all. Returns -1 if support for aliases could not
351 # be determined.
352
353 proc check_alias_available { } {
354 global alias_available_saved
355 global tool
356
357 if [info exists alias_available_saved] {
358 verbose "check_alias_available returning saved $alias_available_saved" 2
359 } else {
360 set src alias[pid].c
361 set obj alias[pid].o
362 verbose "check_alias_available compiling testfile $src" 2
363 set f [open $src "w"]
364 # Compile a small test program. The definition of "g" is
365 # necessary to keep the Solaris assembler from complaining
366 # about the program.
367 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
368 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
369 close $f
370 set lines [${tool}_target_compile $src $obj object ""]
371 file delete $src
372 remote_file build delete $obj
373
374 if [string match "" $lines] then {
375 # No error messages, everything is OK.
376 set alias_available_saved 2
377 } else {
378 if [regexp "alias definitions not supported" $lines] {
379 verbose "check_alias_available target does not support aliases" 2
380
381 set objformat [gcc_target_object_format]
382
383 if { $objformat == "elf" } {
384 verbose "check_alias_available but target uses ELF format, so it ought to" 2
385 set alias_available_saved -1
386 } else {
387 set alias_available_saved 0
388 }
389 } else {
390 if [regexp "only weak aliases are supported" $lines] {
391 verbose "check_alias_available target supports only weak aliases" 2
392 set alias_available_saved 1
393 } else {
394 set alias_available_saved -1
395 }
396 }
397 }
398
399 verbose "check_alias_available returning $alias_available_saved" 2
400 }
401
402 return $alias_available_saved
403 }
404
405 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
406
407 proc check_effective_target_alias { } {
408 if { [check_alias_available] < 2 } {
409 return 0
410 } else {
411 return 1
412 }
413 }
414
415 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
416
417 proc check_ifunc_available { } {
418 return [check_no_compiler_messages ifunc_available object {
419 #ifdef __cplusplus
420 extern "C"
421 #endif
422 void g() {}
423 void f() __attribute__((ifunc("g")));
424 }]
425 }
426
427 # Returns true if --gc-sections is supported on the target.
428
429 proc check_gc_sections_available { } {
430 global gc_sections_available_saved
431 global tool
432
433 if {![info exists gc_sections_available_saved]} {
434 # Some targets don't support gc-sections despite whatever's
435 # advertised by ld's options.
436 if { [istarget alpha*-*-*]
437 || [istarget ia64-*-*] } {
438 set gc_sections_available_saved 0
439 return 0
440 }
441
442 # elf2flt uses -q (--emit-relocs), which is incompatible with
443 # --gc-sections.
444 if { [board_info target exists ldflags]
445 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
446 set gc_sections_available_saved 0
447 return 0
448 }
449
450 # VxWorks kernel modules are relocatable objects linked with -r,
451 # while RTP executables are linked with -q (--emit-relocs).
452 # Both of these options are incompatible with --gc-sections.
453 if { [istarget *-*-vxworks*] } {
454 set gc_sections_available_saved 0
455 return 0
456 }
457
458 # Check if the ld used by gcc supports --gc-sections.
459 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
460 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
461 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
462 set ld_output [remote_exec host "$gcc_ld" "--help"]
463 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
464 set gc_sections_available_saved 1
465 } else {
466 set gc_sections_available_saved 0
467 }
468 }
469 return $gc_sections_available_saved
470 }
471
472 # Return 1 if according to target_info struct and explicit target list
473 # target is supposed to support trampolines.
474
475 proc check_effective_target_trampolines { } {
476 if [target_info exists no_trampolines] {
477 return 0
478 }
479 if { [istarget avr-*-*]
480 || [istarget msp430-*-*]
481 || [istarget nvptx-*-*]
482 || [istarget hppa2.0w-hp-hpux11.23]
483 || [istarget hppa64-hp-hpux11.23] } {
484 return 0;
485 }
486 return 1
487 }
488
489 # Return 1 if according to target_info struct and explicit target list
490 # target disables -fdelete-null-pointer-checks. Targets should return 0
491 # if they simply default to -fno-delete-null-pointer-checks but obey
492 # -fdelete-null-pointer-checks when passed explicitly (and tests that
493 # depend on this option should do that).
494
495 proc check_effective_target_keeps_null_pointer_checks { } {
496 if [target_info exists keeps_null_pointer_checks] {
497 return 1
498 }
499 if { [istarget avr-*-*] } {
500 return 1;
501 }
502 return 0
503 }
504
505 # Return true if profiling is supported on the target.
506
507 proc check_profiling_available { test_what } {
508 global profiling_available_saved
509
510 verbose "Profiling argument is <$test_what>" 1
511
512 # These conditions depend on the argument so examine them before
513 # looking at the cache variable.
514
515 # Tree profiling requires TLS runtime support.
516 if { $test_what == "-fprofile-generate" } {
517 if { ![check_effective_target_tls_runtime] } {
518 return 0
519 }
520 }
521
522 # Support for -p on solaris2 relies on mcrt1.o which comes with the
523 # vendor compiler. We cannot reliably predict the directory where the
524 # vendor compiler (and thus mcrt1.o) is installed so we can't
525 # necessarily find mcrt1.o even if we have it.
526 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
527 return 0
528 }
529
530 # We don't yet support profiling for MIPS16.
531 if { [istarget mips*-*-*]
532 && ![check_effective_target_nomips16]
533 && ($test_what == "-p" || $test_what == "-pg") } {
534 return 0
535 }
536
537 # MinGW does not support -p.
538 if { [istarget *-*-mingw*] && $test_what == "-p" } {
539 return 0
540 }
541
542 # cygwin does not support -p.
543 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
544 return 0
545 }
546
547 # uClibc does not have gcrt1.o.
548 if { [check_effective_target_uclibc]
549 && ($test_what == "-p" || $test_what == "-pg") } {
550 return 0
551 }
552
553 # Now examine the cache variable.
554 if {![info exists profiling_available_saved]} {
555 # Some targets don't have any implementation of __bb_init_func or are
556 # missing other needed machinery.
557 if {[istarget aarch64*-*-elf]
558 || [istarget am3*-*-linux*]
559 || [istarget arm*-*-eabi*]
560 || [istarget arm*-*-elf]
561 || [istarget arm*-*-symbianelf*]
562 || [istarget avr-*-*]
563 || [istarget bfin-*-*]
564 || [istarget cris-*-*]
565 || [istarget crisv32-*-*]
566 || [istarget fido-*-elf]
567 || [istarget h8300-*-*]
568 || [istarget lm32-*-*]
569 || [istarget m32c-*-elf]
570 || [istarget m68k-*-elf]
571 || [istarget m68k-*-uclinux*]
572 || [istarget mep-*-elf]
573 || [istarget mips*-*-elf*]
574 || [istarget mmix-*-*]
575 || [istarget mn10300-*-elf*]
576 || [istarget moxie-*-elf*]
577 || [istarget msp430-*-*]
578 || [istarget nds32*-*-elf]
579 || [istarget nios2-*-elf]
580 || [istarget nvptx-*-*]
581 || [istarget powerpc-*-eabi*]
582 || [istarget powerpc-*-elf]
583 || [istarget rx-*-*]
584 || [istarget tic6x-*-elf]
585 || [istarget visium-*-*]
586 || [istarget xstormy16-*]
587 || [istarget xtensa*-*-elf]
588 || [istarget *-*-rtems*]
589 || [istarget *-*-vxworks*] } {
590 set profiling_available_saved 0
591 } else {
592 set profiling_available_saved 1
593 }
594 }
595
596 # -pg link test result can't be cached since it may change between
597 # runs.
598 set profiling_working $profiling_available_saved
599 if { $profiling_available_saved == 1
600 && ![check_no_compiler_messages_nocache profiling executable {
601 int main() { return 0; } } "-pg"] } {
602 set profiling_working 0
603 }
604
605 return $profiling_working
606 }
607
608 # Check to see if a target is "freestanding". This is as per the definition
609 # in Section 4 of C99 standard. Effectively, it is a target which supports no
610 # extra headers or libraries other than what is considered essential.
611 proc check_effective_target_freestanding { } {
612 if { [istarget nvptx-*-*] } {
613 return 1
614 }
615 return 0
616 }
617
618 # Return 1 if target has packed layout of structure members by
619 # default, 0 otherwise. Note that this is slightly different than
620 # whether the target has "natural alignment": both attributes may be
621 # false.
622
623 proc check_effective_target_default_packed { } {
624 return [check_no_compiler_messages default_packed assembly {
625 struct x { char a; long b; } c;
626 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
627 }]
628 }
629
630 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
631 # documentation, where the test also comes from.
632
633 proc check_effective_target_pcc_bitfield_type_matters { } {
634 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
635 # bitfields, but let's stick to the example code from the docs.
636 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
637 struct foo1 { char x; char :0; char y; };
638 struct foo2 { char x; int :0; char y; };
639 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
640 }]
641 }
642
643 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
644
645 proc add_options_for_tls { flags } {
646 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
647 # libthread, so always pass -pthread for native TLS. Same for AIX.
648 # Need to duplicate native TLS check from
649 # check_effective_target_tls_native to avoid recursion.
650 if { ([istarget powerpc-ibm-aix*]) &&
651 [check_no_messages_and_pattern tls_native "!emutls" assembly {
652 __thread int i;
653 int f (void) { return i; }
654 void g (int j) { i = j; }
655 }] } {
656 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
657 }
658 return $flags
659 }
660
661 # Return 1 if indirect jumps are supported, 0 otherwise.
662
663 proc check_effective_target_indirect_jumps {} {
664 if { [istarget nvptx-*-*] } {
665 return 0
666 }
667 return 1
668 }
669
670 # Return 1 if nonlocal goto is supported, 0 otherwise.
671
672 proc check_effective_target_nonlocal_goto {} {
673 if { [istarget nvptx-*-*] } {
674 return 0
675 }
676 return 1
677 }
678
679 # Return 1 if global constructors are supported, 0 otherwise.
680
681 proc check_effective_target_global_constructor {} {
682 if { [istarget nvptx-*-*] } {
683 return 0
684 }
685 return 1
686 }
687
688 # Return 1 if taking label values is supported, 0 otherwise.
689
690 proc check_effective_target_label_values {} {
691 if { [istarget nvptx-*-*] } {
692 return 0
693 }
694 return [check_no_compiler_messages label_values assembly {
695 #ifdef NO_LABEL_VALUES
696 #error NO
697 #endif
698 }]
699 }
700
701 # Return 1 if builtin_return_address and builtin_frame_address are
702 # supported, 0 otherwise.
703
704 proc check_effective_target_return_address {} {
705 if { [istarget nvptx-*-*] } {
706 return 0
707 }
708 return 1
709 }
710
711 # Return 1 if the assembler does not verify function types against
712 # calls, 0 otherwise. Such verification will typically show up problems
713 # with K&R C function declarations.
714
715 proc check_effective_target_untyped_assembly {} {
716 if { [istarget nvptx-*-*] } {
717 return 0
718 }
719 return 1
720 }
721
722 # Return 1 if alloca is supported, 0 otherwise.
723
724 proc check_effective_target_alloca {} {
725 if { [istarget nvptx-*-*] } {
726 return 0
727 }
728 return 1
729 }
730
731 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
732
733 proc check_effective_target_tls {} {
734 return [check_no_compiler_messages tls assembly {
735 __thread int i;
736 int f (void) { return i; }
737 void g (int j) { i = j; }
738 }]
739 }
740
741 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
742
743 proc check_effective_target_tls_native {} {
744 # VxWorks uses emulated TLS machinery, but with non-standard helper
745 # functions, so we fail to automatically detect it.
746 if { [istarget *-*-vxworks*] } {
747 return 0
748 }
749
750 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
751 __thread int i;
752 int f (void) { return i; }
753 void g (int j) { i = j; }
754 }]
755 }
756
757 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
758
759 proc check_effective_target_tls_emulated {} {
760 # VxWorks uses emulated TLS machinery, but with non-standard helper
761 # functions, so we fail to automatically detect it.
762 if { [istarget *-*-vxworks*] } {
763 return 1
764 }
765
766 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
767 __thread int i;
768 int f (void) { return i; }
769 void g (int j) { i = j; }
770 }]
771 }
772
773 # Return 1 if TLS executables can run correctly, 0 otherwise.
774
775 proc check_effective_target_tls_runtime {} {
776 # The runtime does not have TLS support, but just
777 # running the test below is insufficient to show this.
778 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
779 return 0
780 }
781 return [check_runtime tls_runtime {
782 __thread int thr = 0;
783 int main (void) { return thr; }
784 } [add_options_for_tls ""]]
785 }
786
787 # Return 1 if atomic compare-and-swap is supported on 'int'
788
789 proc check_effective_target_cas_char {} {
790 return [check_no_compiler_messages cas_char assembly {
791 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
792 #error unsupported
793 #endif
794 } ""]
795 }
796
797 proc check_effective_target_cas_int {} {
798 return [check_no_compiler_messages cas_int assembly {
799 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
800 /* ok */
801 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
802 /* ok */
803 #else
804 #error unsupported
805 #endif
806 } ""]
807 }
808
809 # Return 1 if -ffunction-sections is supported, 0 otherwise.
810
811 proc check_effective_target_function_sections {} {
812 # Darwin has its own scheme and silently accepts -ffunction-sections.
813 if { [istarget *-*-darwin*] } {
814 return 0
815 }
816
817 return [check_no_compiler_messages functionsections assembly {
818 void foo (void) { }
819 } "-ffunction-sections"]
820 }
821
822 # Return 1 if instruction scheduling is available, 0 otherwise.
823
824 proc check_effective_target_scheduling {} {
825 return [check_no_compiler_messages scheduling object {
826 void foo (void) { }
827 } "-fschedule-insns"]
828 }
829
830 # Return 1 if trapping arithmetic is available, 0 otherwise.
831
832 proc check_effective_target_trapping {} {
833 return [check_no_compiler_messages trapping object {
834 int add (int a, int b) { return a + b; }
835 } "-ftrapv"]
836 }
837
838 # Return 1 if compilation with -fgraphite is error-free for trivial
839 # code, 0 otherwise.
840
841 proc check_effective_target_fgraphite {} {
842 return [check_no_compiler_messages fgraphite object {
843 void foo (void) { }
844 } "-O1 -fgraphite"]
845 }
846
847 # Return 1 if compilation with -fopenacc is error-free for trivial
848 # code, 0 otherwise.
849
850 proc check_effective_target_fopenacc {} {
851 # nvptx can be built with the device-side bits of openacc, but it
852 # does not make sense to test it as an openacc host.
853 if [istarget nvptx-*-*] { return 0 }
854
855 return [check_no_compiler_messages fopenacc object {
856 void foo (void) { }
857 } "-fopenacc"]
858 }
859
860 # Return 1 if compilation with -fopenmp is error-free for trivial
861 # code, 0 otherwise.
862
863 proc check_effective_target_fopenmp {} {
864 # nvptx can be built with the device-side bits of libgomp, but it
865 # does not make sense to test it as an openmp host.
866 if [istarget nvptx-*-*] { return 0 }
867
868 return [check_no_compiler_messages fopenmp object {
869 void foo (void) { }
870 } "-fopenmp"]
871 }
872
873 # Return 1 if compilation with -fgnu-tm is error-free for trivial
874 # code, 0 otherwise.
875
876 proc check_effective_target_fgnu_tm {} {
877 return [check_no_compiler_messages fgnu_tm object {
878 void foo (void) { }
879 } "-fgnu-tm"]
880 }
881
882 # Return 1 if the target supports mmap, 0 otherwise.
883
884 proc check_effective_target_mmap {} {
885 return [check_function_available "mmap"]
886 }
887
888 # Return 1 if the target supports dlopen, 0 otherwise.
889 proc check_effective_target_dlopen {} {
890 return [check_no_compiler_messages dlopen executable {
891 #include <dlfcn.h>
892 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
893 } [add_options_for_dlopen ""]]
894 }
895
896 proc add_options_for_dlopen { flags } {
897 return "$flags -ldl"
898 }
899
900 # Return 1 if the target supports clone, 0 otherwise.
901 proc check_effective_target_clone {} {
902 return [check_function_available "clone"]
903 }
904
905 # Return 1 if the target supports setrlimit, 0 otherwise.
906 proc check_effective_target_setrlimit {} {
907 # Darwin has non-posix compliant RLIMIT_AS
908 if { [istarget *-*-darwin*] } {
909 return 0
910 }
911 return [check_function_available "setrlimit"]
912 }
913
914 # Return 1 if the target supports swapcontext, 0 otherwise.
915 proc check_effective_target_swapcontext {} {
916 return [check_no_compiler_messages swapcontext executable {
917 #include <ucontext.h>
918 int main (void)
919 {
920 ucontext_t orig_context,child_context;
921 if (swapcontext(&child_context, &orig_context) < 0) { }
922 }
923 }]
924 }
925
926 # Return 1 if compilation with -pthread is error-free for trivial
927 # code, 0 otherwise.
928
929 proc check_effective_target_pthread {} {
930 return [check_no_compiler_messages pthread object {
931 void foo (void) { }
932 } "-pthread"]
933 }
934
935 # Return 1 if compilation with -mpe-aligned-commons is error-free
936 # for trivial code, 0 otherwise.
937
938 proc check_effective_target_pe_aligned_commons {} {
939 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
940 return [check_no_compiler_messages pe_aligned_commons object {
941 int foo;
942 } "-mpe-aligned-commons"]
943 }
944 return 0
945 }
946
947 # Return 1 if the target supports -static
948 proc check_effective_target_static {} {
949 return [check_no_compiler_messages static executable {
950 int main (void) { return 0; }
951 } "-static"]
952 }
953
954 # Return 1 if the target supports -fstack-protector
955 proc check_effective_target_fstack_protector {} {
956 return [check_runtime fstack_protector {
957 int main (void) { return 0; }
958 } "-fstack-protector"]
959 }
960
961 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
962 # for trivial code, 0 otherwise.
963
964 proc check_effective_target_freorder {} {
965 return [check_no_compiler_messages freorder object {
966 void foo (void) { }
967 } "-freorder-blocks-and-partition"]
968 }
969
970 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
971 # emitted, 0 otherwise. Whether a shared library can actually be built is
972 # out of scope for this test.
973
974 proc check_effective_target_fpic { } {
975 # Note that M68K has a multilib that supports -fpic but not
976 # -fPIC, so we need to check both. We test with a program that
977 # requires GOT references.
978 foreach arg {fpic fPIC} {
979 if [check_no_compiler_messages $arg object {
980 extern int foo (void); extern int bar;
981 int baz (void) { return foo () + bar; }
982 } "-$arg"] {
983 return 1
984 }
985 }
986 return 0
987 }
988
989 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
990 # silently. So, we can't rely on above "check_effective_target_fpic" as it
991 # assumes compiler will give warning if -fpic not supported. Here we check
992 # whether binutils supports those new -fpic relocation modifiers, and assume
993 # -fpic is supported if there is binutils support. GCC configuration will
994 # enable -fpic for AArch64 in this case.
995 #
996 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
997 # memory model -fpic relocation types.
998
999 proc check_effective_target_aarch64_small_fpic { } {
1000 if { [istarget aarch64*-*-*] } {
1001 return [check_no_compiler_messages aarch64_small_fpic object {
1002 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1003 }]
1004 } else {
1005 return 0
1006 }
1007 }
1008
1009 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1010 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1011 # in binutils since 2015-03-04 as PR gas/17843.
1012 #
1013 # This test directive make sure binutils support all features needed by TLS LE
1014 # under -mtls-size=32 on AArch64.
1015
1016 proc check_effective_target_aarch64_tlsle32 { } {
1017 if { [istarget aarch64*-*-*] } {
1018 return [check_no_compiler_messages aarch64_tlsle32 object {
1019 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1020 }]
1021 } else {
1022 return 0
1023 }
1024 }
1025
1026 # Return 1 if -shared is supported, as in no warnings or errors
1027 # emitted, 0 otherwise.
1028
1029 proc check_effective_target_shared { } {
1030 # Note that M68K has a multilib that supports -fpic but not
1031 # -fPIC, so we need to check both. We test with a program that
1032 # requires GOT references.
1033 return [check_no_compiler_messages shared executable {
1034 extern int foo (void); extern int bar;
1035 int baz (void) { return foo () + bar; }
1036 } "-shared -fpic"]
1037 }
1038
1039 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1040
1041 proc check_effective_target_pie { } {
1042 if { [istarget *-*-darwin\[912\]*]
1043 || [istarget *-*-dragonfly*]
1044 || [istarget *-*-freebsd*]
1045 || [istarget *-*-linux*]
1046 || [istarget *-*-gnu*] } {
1047 return 1;
1048 }
1049 return 0
1050 }
1051
1052 # Return true if the target supports -mpaired-single (as used on MIPS).
1053
1054 proc check_effective_target_mpaired_single { } {
1055 return [check_no_compiler_messages mpaired_single object {
1056 void foo (void) { }
1057 } "-mpaired-single"]
1058 }
1059
1060 # Return true if the target has access to FPU instructions.
1061
1062 proc check_effective_target_hard_float { } {
1063 if { [istarget mips*-*-*] } {
1064 return [check_no_compiler_messages hard_float assembly {
1065 #if (defined __mips_soft_float || defined __mips16)
1066 #error __mips_soft_float || __mips16
1067 #endif
1068 }]
1069 }
1070
1071 # This proc is actually checking the availabilty of FPU
1072 # support for doubles, so on the RX we must fail if the
1073 # 64-bit double multilib has been selected.
1074 if { [istarget rx-*-*] } {
1075 return 0
1076 # return [check_no_compiler_messages hard_float assembly {
1077 #if defined __RX_64_BIT_DOUBLES__
1078 #error __RX_64_BIT_DOUBLES__
1079 #endif
1080 # }]
1081 }
1082
1083 # The generic test equates hard_float with "no call for adding doubles".
1084 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1085 double a (double b, double c) { return b + c; }
1086 }]
1087 }
1088
1089 # Return true if the target is a 64-bit MIPS target.
1090
1091 proc check_effective_target_mips64 { } {
1092 return [check_no_compiler_messages mips64 assembly {
1093 #ifndef __mips64
1094 #error !__mips64
1095 #endif
1096 }]
1097 }
1098
1099 # Return true if the target is a MIPS target that does not produce
1100 # MIPS16 code.
1101
1102 proc check_effective_target_nomips16 { } {
1103 return [check_no_compiler_messages nomips16 object {
1104 #ifndef __mips
1105 #error !__mips
1106 #else
1107 /* A cheap way of testing for -mflip-mips16. */
1108 void foo (void) { asm ("addiu $20,$20,1"); }
1109 void bar (void) { asm ("addiu $20,$20,1"); }
1110 #endif
1111 }]
1112 }
1113
1114 # Add the options needed for MIPS16 function attributes. At the moment,
1115 # we don't support MIPS16 PIC.
1116
1117 proc add_options_for_mips16_attribute { flags } {
1118 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1119 }
1120
1121 # Return true if we can force a mode that allows MIPS16 code generation.
1122 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1123 # for o32 and o64.
1124
1125 proc check_effective_target_mips16_attribute { } {
1126 return [check_no_compiler_messages mips16_attribute assembly {
1127 #ifdef PIC
1128 #error PIC
1129 #endif
1130 #if defined __mips_hard_float \
1131 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1132 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1133 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1134 #endif
1135 } [add_options_for_mips16_attribute ""]]
1136 }
1137
1138 # Return 1 if the target supports long double larger than double when
1139 # using the new ABI, 0 otherwise.
1140
1141 proc check_effective_target_mips_newabi_large_long_double { } {
1142 return [check_no_compiler_messages mips_newabi_large_long_double object {
1143 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1144 } "-mabi=64"]
1145 }
1146
1147 # Return true if the target is a MIPS target that has access
1148 # to the LL and SC instructions.
1149
1150 proc check_effective_target_mips_llsc { } {
1151 if { ![istarget mips*-*-*] } {
1152 return 0
1153 }
1154 # Assume that these instructions are always implemented for
1155 # non-elf* targets, via emulation if necessary.
1156 if { ![istarget *-*-elf*] } {
1157 return 1
1158 }
1159 # Otherwise assume LL/SC support for everything but MIPS I.
1160 return [check_no_compiler_messages mips_llsc assembly {
1161 #if __mips == 1
1162 #error __mips == 1
1163 #endif
1164 }]
1165 }
1166
1167 # Return true if the target is a MIPS target that uses in-place relocations.
1168
1169 proc check_effective_target_mips_rel { } {
1170 if { ![istarget mips*-*-*] } {
1171 return 0
1172 }
1173 return [check_no_compiler_messages mips_rel object {
1174 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1175 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1176 #error _ABIN32 && (_ABIN32 || _ABI64)
1177 #endif
1178 }]
1179 }
1180
1181 # Return true if the target is a MIPS target that uses the EABI.
1182
1183 proc check_effective_target_mips_eabi { } {
1184 if { ![istarget mips*-*-*] } {
1185 return 0
1186 }
1187 return [check_no_compiler_messages mips_eabi object {
1188 #ifndef __mips_eabi
1189 #error !__mips_eabi
1190 #endif
1191 }]
1192 }
1193
1194 # Return 1 if the current multilib does not generate PIC by default.
1195
1196 proc check_effective_target_nonpic { } {
1197 return [check_no_compiler_messages nonpic assembly {
1198 #if __PIC__
1199 #error __PIC__
1200 #endif
1201 }]
1202 }
1203
1204 # Return 1 if the current multilib generates PIE by default.
1205
1206 proc check_effective_target_pie_enabled { } {
1207 return [check_no_compiler_messages pie_enabled assembly {
1208 #ifndef __PIE__
1209 #error unsupported
1210 #endif
1211 }]
1212 }
1213
1214 # Return 1 if the target generates -fstack-protector by default.
1215
1216 proc check_effective_target_fstack_protector_enabled {} {
1217 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1218 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1219 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1220 #error unsupported
1221 #endif
1222 }]
1223 }
1224
1225 # Return 1 if the target does not use a status wrapper.
1226
1227 proc check_effective_target_unwrapped { } {
1228 if { [target_info needs_status_wrapper] != "" \
1229 && [target_info needs_status_wrapper] != "0" } {
1230 return 0
1231 }
1232 return 1
1233 }
1234
1235 # Return true if iconv is supported on the target. In particular IBM1047.
1236
1237 proc check_iconv_available { test_what } {
1238 global libiconv
1239
1240 # If the tool configuration file has not set libiconv, try "-liconv"
1241 if { ![info exists libiconv] } {
1242 set libiconv "-liconv"
1243 }
1244 set test_what [lindex $test_what 1]
1245 return [check_runtime_nocache $test_what [subst {
1246 #include <iconv.h>
1247 int main (void)
1248 {
1249 iconv_t cd;
1250
1251 cd = iconv_open ("$test_what", "UTF-8");
1252 if (cd == (iconv_t) -1)
1253 return 1;
1254 return 0;
1255 }
1256 }] $libiconv]
1257 }
1258
1259 # Return true if Cilk Library is supported on the target.
1260 proc check_libcilkrts_available { } {
1261 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1262 #ifdef __cplusplus
1263 extern "C"
1264 #endif
1265 int __cilkrts_set_param (const char *, const char *);
1266 int main (void) {
1267 int x = __cilkrts_set_param ("nworkers", "0");
1268 return x;
1269 }
1270 } "-fcilkplus -lcilkrts" ]
1271 }
1272
1273 # Return true if the atomic library is supported on the target.
1274 proc check_effective_target_libatomic_available { } {
1275 return [check_no_compiler_messages libatomic_available executable {
1276 int main (void) { return 0; }
1277 } "-latomic"]
1278 }
1279
1280 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1281
1282 proc check_ascii_locale_available { } {
1283 return 1
1284 }
1285
1286 # Return true if named sections are supported on this target.
1287
1288 proc check_named_sections_available { } {
1289 return [check_no_compiler_messages named_sections assembly {
1290 int __attribute__ ((section("whatever"))) foo;
1291 }]
1292 }
1293
1294 # Return true if the "naked" function attribute is supported on this target.
1295
1296 proc check_effective_target_naked_functions { } {
1297 return [check_no_compiler_messages naked_functions assembly {
1298 void f() __attribute__((naked));
1299 }]
1300 }
1301
1302 # Return 1 if the target supports Fortran real kinds larger than real(8),
1303 # 0 otherwise.
1304 #
1305 # When the target name changes, replace the cached result.
1306
1307 proc check_effective_target_fortran_large_real { } {
1308 return [check_no_compiler_messages fortran_large_real executable {
1309 ! Fortran
1310 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1311 real(kind=k) :: x
1312 x = cos (x)
1313 end
1314 }]
1315 }
1316
1317 # Return 1 if the target supports Fortran real kind real(16),
1318 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1319 # this checks for Real(16) only; the other returned real(10) if
1320 # both real(10) and real(16) are available.
1321 #
1322 # When the target name changes, replace the cached result.
1323
1324 proc check_effective_target_fortran_real_16 { } {
1325 return [check_no_compiler_messages fortran_real_16 executable {
1326 ! Fortran
1327 real(kind=16) :: x
1328 x = cos (x)
1329 end
1330 }]
1331 }
1332
1333
1334 # Return 1 if the target supports Fortran's IEEE modules,
1335 # 0 otherwise.
1336 #
1337 # When the target name changes, replace the cached result.
1338
1339 proc check_effective_target_fortran_ieee { flags } {
1340 return [check_no_compiler_messages fortran_ieee executable {
1341 ! Fortran
1342 use, intrinsic :: ieee_features
1343 end
1344 } $flags ]
1345 }
1346
1347
1348 # Return 1 if the target supports SQRT for the largest floating-point
1349 # type. (Some targets lack the libm support for this FP type.)
1350 # On most targets, this check effectively checks either whether sqrtl is
1351 # available or on __float128 systems whether libquadmath is installed,
1352 # which provides sqrtq.
1353 #
1354 # When the target name changes, replace the cached result.
1355
1356 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1357 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1358 ! Fortran
1359 use iso_fortran_env, only: real_kinds
1360 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1361 real(kind=maxFP), volatile :: x
1362 x = 2.0_maxFP
1363 x = sqrt (x)
1364 end
1365 }]
1366 }
1367
1368
1369 # Return 1 if the target supports Fortran integer kinds larger than
1370 # integer(8), 0 otherwise.
1371 #
1372 # When the target name changes, replace the cached result.
1373
1374 proc check_effective_target_fortran_large_int { } {
1375 return [check_no_compiler_messages fortran_large_int executable {
1376 ! Fortran
1377 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1378 integer(kind=k) :: i
1379 end
1380 }]
1381 }
1382
1383 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1384 #
1385 # When the target name changes, replace the cached result.
1386
1387 proc check_effective_target_fortran_integer_16 { } {
1388 return [check_no_compiler_messages fortran_integer_16 executable {
1389 ! Fortran
1390 integer(16) :: i
1391 end
1392 }]
1393 }
1394
1395 # Return 1 if we can statically link libgfortran, 0 otherwise.
1396 #
1397 # When the target name changes, replace the cached result.
1398
1399 proc check_effective_target_static_libgfortran { } {
1400 return [check_no_compiler_messages static_libgfortran executable {
1401 ! Fortran
1402 print *, 'test'
1403 end
1404 } "-static"]
1405 }
1406
1407 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1408
1409 proc check_effective_target_cilkplus { } {
1410 # Skip cilk-plus tests on int16 and size16 targets for now.
1411 # The cilk-plus tests are not generic enough to cover these
1412 # cases and would throw hundreds of FAILs.
1413 if { [check_effective_target_int16]
1414 || ![check_effective_target_size32plus] } {
1415 return 0;
1416 }
1417
1418 # Skip AVR, its RAM is too small and too many tests would fail.
1419 if { [istarget avr-*-*] } {
1420 return 0;
1421 }
1422 return 1
1423 }
1424
1425 proc check_linker_plugin_available { } {
1426 return [check_no_compiler_messages_nocache linker_plugin executable {
1427 int main() { return 0; }
1428 } "-flto -fuse-linker-plugin"]
1429 }
1430
1431 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1432 # otherwise. Cache the result.
1433
1434 proc check_750cl_hw_available { } {
1435 return [check_cached_effective_target 750cl_hw_available {
1436 # If this is not the right target then we can skip the test.
1437 if { ![istarget powerpc-*paired*] } {
1438 expr 0
1439 } else {
1440 check_runtime_nocache 750cl_hw_available {
1441 int main()
1442 {
1443 #ifdef __MACH__
1444 asm volatile ("ps_mul v0,v0,v0");
1445 #else
1446 asm volatile ("ps_mul 0,0,0");
1447 #endif
1448 return 0;
1449 }
1450 } "-mpaired"
1451 }
1452 }]
1453 }
1454
1455 # Return 1 if the target OS supports running SSE executables, 0
1456 # otherwise. Cache the result.
1457
1458 proc check_sse_os_support_available { } {
1459 return [check_cached_effective_target sse_os_support_available {
1460 # If this is not the right target then we can skip the test.
1461 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1462 expr 0
1463 } elseif { [istarget i?86-*-solaris2*] } {
1464 # The Solaris 2 kernel doesn't save and restore SSE registers
1465 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1466 check_runtime_nocache sse_os_support_available {
1467 int main ()
1468 {
1469 asm volatile ("movaps %xmm0,%xmm0");
1470 return 0;
1471 }
1472 } "-msse"
1473 } else {
1474 expr 1
1475 }
1476 }]
1477 }
1478
1479 # Return 1 if the target OS supports running AVX executables, 0
1480 # otherwise. Cache the result.
1481
1482 proc check_avx_os_support_available { } {
1483 return [check_cached_effective_target avx_os_support_available {
1484 # If this is not the right target then we can skip the test.
1485 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1486 expr 0
1487 } else {
1488 # Check that OS has AVX and SSE saving enabled.
1489 check_runtime_nocache avx_os_support_available {
1490 int main ()
1491 {
1492 unsigned int eax, edx;
1493
1494 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1495 return (eax & 6) != 6;
1496 }
1497 } ""
1498 }
1499 }]
1500 }
1501
1502 # Return 1 if the target supports executing SSE instructions, 0
1503 # otherwise. Cache the result.
1504
1505 proc check_sse_hw_available { } {
1506 return [check_cached_effective_target sse_hw_available {
1507 # If this is not the right target then we can skip the test.
1508 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1509 expr 0
1510 } else {
1511 check_runtime_nocache sse_hw_available {
1512 #include "cpuid.h"
1513 int main ()
1514 {
1515 unsigned int eax, ebx, ecx, edx;
1516 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1517 return !(edx & bit_SSE);
1518 return 1;
1519 }
1520 } ""
1521 }
1522 }]
1523 }
1524
1525 # Return 1 if the target supports executing SSE2 instructions, 0
1526 # otherwise. Cache the result.
1527
1528 proc check_sse2_hw_available { } {
1529 return [check_cached_effective_target sse2_hw_available {
1530 # If this is not the right target then we can skip the test.
1531 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1532 expr 0
1533 } else {
1534 check_runtime_nocache sse2_hw_available {
1535 #include "cpuid.h"
1536 int main ()
1537 {
1538 unsigned int eax, ebx, ecx, edx;
1539 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1540 return !(edx & bit_SSE2);
1541 return 1;
1542 }
1543 } ""
1544 }
1545 }]
1546 }
1547
1548 # Return 1 if the target supports executing AVX instructions, 0
1549 # otherwise. Cache the result.
1550
1551 proc check_avx_hw_available { } {
1552 return [check_cached_effective_target avx_hw_available {
1553 # If this is not the right target then we can skip the test.
1554 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1555 expr 0
1556 } else {
1557 check_runtime_nocache avx_hw_available {
1558 #include "cpuid.h"
1559 int main ()
1560 {
1561 unsigned int eax, ebx, ecx, edx;
1562 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1563 return ((ecx & (bit_AVX | bit_OSXSAVE))
1564 != (bit_AVX | bit_OSXSAVE));
1565 return 1;
1566 }
1567 } ""
1568 }
1569 }]
1570 }
1571
1572 # Return 1 if the target supports running SSE executables, 0 otherwise.
1573
1574 proc check_effective_target_sse_runtime { } {
1575 if { [check_effective_target_sse]
1576 && [check_sse_hw_available]
1577 && [check_sse_os_support_available] } {
1578 return 1
1579 }
1580 return 0
1581 }
1582
1583 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1584
1585 proc check_effective_target_sse2_runtime { } {
1586 if { [check_effective_target_sse2]
1587 && [check_sse2_hw_available]
1588 && [check_sse_os_support_available] } {
1589 return 1
1590 }
1591 return 0
1592 }
1593
1594 # Return 1 if the target supports running AVX executables, 0 otherwise.
1595
1596 proc check_effective_target_avx_runtime { } {
1597 if { [check_effective_target_avx]
1598 && [check_avx_hw_available]
1599 && [check_avx_os_support_available] } {
1600 return 1
1601 }
1602 return 0
1603 }
1604
1605 # Return 1 if the target supports executing power8 vector instructions, 0
1606 # otherwise. Cache the result.
1607
1608 proc check_p8vector_hw_available { } {
1609 return [check_cached_effective_target p8vector_hw_available {
1610 # Some simulators are known to not support VSX/power8 instructions.
1611 # For now, disable on Darwin
1612 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1613 expr 0
1614 } else {
1615 set options "-mpower8-vector"
1616 check_runtime_nocache p8vector_hw_available {
1617 int main()
1618 {
1619 #ifdef __MACH__
1620 asm volatile ("xxlorc vs0,vs0,vs0");
1621 #else
1622 asm volatile ("xxlorc 0,0,0");
1623 #endif
1624 return 0;
1625 }
1626 } $options
1627 }
1628 }]
1629 }
1630
1631 # Return 1 if the target supports executing VSX instructions, 0
1632 # otherwise. Cache the result.
1633
1634 proc check_vsx_hw_available { } {
1635 return [check_cached_effective_target vsx_hw_available {
1636 # Some simulators are known to not support VSX instructions.
1637 # For now, disable on Darwin
1638 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1639 expr 0
1640 } else {
1641 set options "-mvsx"
1642 check_runtime_nocache vsx_hw_available {
1643 int main()
1644 {
1645 #ifdef __MACH__
1646 asm volatile ("xxlor vs0,vs0,vs0");
1647 #else
1648 asm volatile ("xxlor 0,0,0");
1649 #endif
1650 return 0;
1651 }
1652 } $options
1653 }
1654 }]
1655 }
1656
1657 # Return 1 if the target supports executing AltiVec instructions, 0
1658 # otherwise. Cache the result.
1659
1660 proc check_vmx_hw_available { } {
1661 return [check_cached_effective_target vmx_hw_available {
1662 # Some simulators are known to not support VMX instructions.
1663 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1664 expr 0
1665 } else {
1666 # Most targets don't require special flags for this test case, but
1667 # Darwin does. Just to be sure, make sure VSX is not enabled for
1668 # the altivec tests.
1669 if { [istarget *-*-darwin*]
1670 || [istarget *-*-aix*] } {
1671 set options "-maltivec -mno-vsx"
1672 } else {
1673 set options "-mno-vsx"
1674 }
1675 check_runtime_nocache vmx_hw_available {
1676 int main()
1677 {
1678 #ifdef __MACH__
1679 asm volatile ("vor v0,v0,v0");
1680 #else
1681 asm volatile ("vor 0,0,0");
1682 #endif
1683 return 0;
1684 }
1685 } $options
1686 }
1687 }]
1688 }
1689
1690 proc check_ppc_recip_hw_available { } {
1691 return [check_cached_effective_target ppc_recip_hw_available {
1692 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1693 # For now, disable on Darwin
1694 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1695 expr 0
1696 } else {
1697 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1698 check_runtime_nocache ppc_recip_hw_available {
1699 volatile double d_recip, d_rsqrt, d_four = 4.0;
1700 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1701 int main()
1702 {
1703 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1704 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1705 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1706 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1707 return 0;
1708 }
1709 } $options
1710 }
1711 }]
1712 }
1713
1714 # Return 1 if the target supports executing AltiVec and Cell PPU
1715 # instructions, 0 otherwise. Cache the result.
1716
1717 proc check_effective_target_cell_hw { } {
1718 return [check_cached_effective_target cell_hw_available {
1719 # Some simulators are known to not support VMX and PPU instructions.
1720 if { [istarget powerpc-*-eabi*] } {
1721 expr 0
1722 } else {
1723 # Most targets don't require special flags for this test
1724 # case, but Darwin and AIX do.
1725 if { [istarget *-*-darwin*]
1726 || [istarget *-*-aix*] } {
1727 set options "-maltivec -mcpu=cell"
1728 } else {
1729 set options "-mcpu=cell"
1730 }
1731 check_runtime_nocache cell_hw_available {
1732 int main()
1733 {
1734 #ifdef __MACH__
1735 asm volatile ("vor v0,v0,v0");
1736 asm volatile ("lvlx v0,r0,r0");
1737 #else
1738 asm volatile ("vor 0,0,0");
1739 asm volatile ("lvlx 0,0,0");
1740 #endif
1741 return 0;
1742 }
1743 } $options
1744 }
1745 }]
1746 }
1747
1748 # Return 1 if the target supports executing 64-bit instructions, 0
1749 # otherwise. Cache the result.
1750
1751 proc check_effective_target_powerpc64 { } {
1752 global powerpc64_available_saved
1753 global tool
1754
1755 if [info exists powerpc64_available_saved] {
1756 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1757 } else {
1758 set powerpc64_available_saved 0
1759
1760 # Some simulators are known to not support powerpc64 instructions.
1761 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1762 verbose "check_effective_target_powerpc64 returning 0" 2
1763 return $powerpc64_available_saved
1764 }
1765
1766 # Set up, compile, and execute a test program containing a 64-bit
1767 # instruction. Include the current process ID in the file
1768 # names to prevent conflicts with invocations for multiple
1769 # testsuites.
1770 set src ppc[pid].c
1771 set exe ppc[pid].x
1772
1773 set f [open $src "w"]
1774 puts $f "int main() {"
1775 puts $f "#ifdef __MACH__"
1776 puts $f " asm volatile (\"extsw r0,r0\");"
1777 puts $f "#else"
1778 puts $f " asm volatile (\"extsw 0,0\");"
1779 puts $f "#endif"
1780 puts $f " return 0; }"
1781 close $f
1782
1783 set opts "additional_flags=-mcpu=G5"
1784
1785 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1786 set lines [${tool}_target_compile $src $exe executable "$opts"]
1787 file delete $src
1788
1789 if [string match "" $lines] then {
1790 # No error message, compilation succeeded.
1791 set result [${tool}_load "./$exe" "" ""]
1792 set status [lindex $result 0]
1793 remote_file build delete $exe
1794 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1795
1796 if { $status == "pass" } then {
1797 set powerpc64_available_saved 1
1798 }
1799 } else {
1800 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1801 }
1802 }
1803
1804 return $powerpc64_available_saved
1805 }
1806
1807 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1808 # complex float arguments. This affects gfortran tests that call cabsf
1809 # in libm built by an earlier compiler. Return 1 if libm uses the same
1810 # argument passing as the compiler under test, 0 otherwise.
1811 #
1812 # When the target name changes, replace the cached result.
1813
1814 proc check_effective_target_broken_cplxf_arg { } {
1815 return [check_cached_effective_target broken_cplxf_arg {
1816 # Skip the work for targets known not to be affected.
1817 if { ![istarget powerpc64-*-linux*] } {
1818 expr 0
1819 } elseif { ![is-effective-target lp64] } {
1820 expr 0
1821 } else {
1822 check_runtime_nocache broken_cplxf_arg {
1823 #include <complex.h>
1824 extern void abort (void);
1825 float fabsf (float);
1826 float cabsf (_Complex float);
1827 int main ()
1828 {
1829 _Complex float cf;
1830 float f;
1831 cf = 3 + 4.0fi;
1832 f = cabsf (cf);
1833 if (fabsf (f - 5.0) > 0.0001)
1834 abort ();
1835 return 0;
1836 }
1837 } "-lm"
1838 }
1839 }]
1840 }
1841
1842 # Return 1 is this is a TI C6X target supporting C67X instructions
1843 proc check_effective_target_ti_c67x { } {
1844 return [check_no_compiler_messages ti_c67x assembly {
1845 #if !defined(_TMS320C6700)
1846 #error !_TMS320C6700
1847 #endif
1848 }]
1849 }
1850
1851 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1852 proc check_effective_target_ti_c64xp { } {
1853 return [check_no_compiler_messages ti_c64xp assembly {
1854 #if !defined(_TMS320C6400_PLUS)
1855 #error !_TMS320C6400_PLUS
1856 #endif
1857 }]
1858 }
1859
1860
1861 proc check_alpha_max_hw_available { } {
1862 return [check_runtime alpha_max_hw_available {
1863 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1864 }]
1865 }
1866
1867 # Returns true iff the FUNCTION is available on the target system.
1868 # (This is essentially a Tcl implementation of Autoconf's
1869 # AC_CHECK_FUNC.)
1870
1871 proc check_function_available { function } {
1872 return [check_no_compiler_messages ${function}_available \
1873 executable [subst {
1874 #ifdef __cplusplus
1875 extern "C"
1876 #endif
1877 char $function ();
1878 int main () { $function (); }
1879 }] "-fno-builtin" ]
1880 }
1881
1882 # Returns true iff "fork" is available on the target system.
1883
1884 proc check_fork_available {} {
1885 return [check_function_available "fork"]
1886 }
1887
1888 # Returns true iff "mkfifo" is available on the target system.
1889
1890 proc check_mkfifo_available {} {
1891 if { [istarget *-*-cygwin*] } {
1892 # Cygwin has mkfifo, but support is incomplete.
1893 return 0
1894 }
1895
1896 return [check_function_available "mkfifo"]
1897 }
1898
1899 # Returns true iff "__cxa_atexit" is used on the target system.
1900
1901 proc check_cxa_atexit_available { } {
1902 return [check_cached_effective_target cxa_atexit_available {
1903 if { [istarget hppa*-*-hpux10*] } {
1904 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
1905 expr 0
1906 } elseif { [istarget *-*-vxworks] } {
1907 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1908 expr 0
1909 } else {
1910 check_runtime_nocache cxa_atexit_available {
1911 // C++
1912 #include <stdlib.h>
1913 static unsigned int count;
1914 struct X
1915 {
1916 X() { count = 1; }
1917 ~X()
1918 {
1919 if (count != 3)
1920 exit(1);
1921 count = 4;
1922 }
1923 };
1924 void f()
1925 {
1926 static X x;
1927 }
1928 struct Y
1929 {
1930 Y() { f(); count = 2; }
1931 ~Y()
1932 {
1933 if (count != 2)
1934 exit(1);
1935 count = 3;
1936 }
1937 };
1938 Y y;
1939 int main() { return 0; }
1940 }
1941 }
1942 }]
1943 }
1944
1945 proc check_effective_target_objc2 { } {
1946 return [check_no_compiler_messages objc2 object {
1947 #ifdef __OBJC2__
1948 int dummy[1];
1949 #else
1950 #error !__OBJC2__
1951 #endif
1952 }]
1953 }
1954
1955 proc check_effective_target_next_runtime { } {
1956 return [check_no_compiler_messages objc2 object {
1957 #ifdef __NEXT_RUNTIME__
1958 int dummy[1];
1959 #else
1960 #error !__NEXT_RUNTIME__
1961 #endif
1962 }]
1963 }
1964
1965 # Return 1 if we're generating 32-bit code using default options, 0
1966 # otherwise.
1967
1968 proc check_effective_target_ilp32 { } {
1969 return [check_no_compiler_messages ilp32 object {
1970 int dummy[sizeof (int) == 4
1971 && sizeof (void *) == 4
1972 && sizeof (long) == 4 ? 1 : -1];
1973 }]
1974 }
1975
1976 # Return 1 if we're generating ia32 code using default options, 0
1977 # otherwise.
1978
1979 proc check_effective_target_ia32 { } {
1980 return [check_no_compiler_messages ia32 object {
1981 int dummy[sizeof (int) == 4
1982 && sizeof (void *) == 4
1983 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
1984 }]
1985 }
1986
1987 # Return 1 if we're generating x32 code using default options, 0
1988 # otherwise.
1989
1990 proc check_effective_target_x32 { } {
1991 return [check_no_compiler_messages x32 object {
1992 int dummy[sizeof (int) == 4
1993 && sizeof (void *) == 4
1994 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1995 }]
1996 }
1997
1998 # Return 1 if we're generating 32-bit integers using default
1999 # options, 0 otherwise.
2000
2001 proc check_effective_target_int32 { } {
2002 return [check_no_compiler_messages int32 object {
2003 int dummy[sizeof (int) == 4 ? 1 : -1];
2004 }]
2005 }
2006
2007 # Return 1 if we're generating 32-bit or larger integers using default
2008 # options, 0 otherwise.
2009
2010 proc check_effective_target_int32plus { } {
2011 return [check_no_compiler_messages int32plus object {
2012 int dummy[sizeof (int) >= 4 ? 1 : -1];
2013 }]
2014 }
2015
2016 # Return 1 if we're generating 32-bit or larger pointers using default
2017 # options, 0 otherwise.
2018
2019 proc check_effective_target_ptr32plus { } {
2020 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2021 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2022 # cannot really hold a 32-bit address, so we always return false here.
2023 if { [istarget msp430-*-*] } {
2024 return 0
2025 }
2026
2027 return [check_no_compiler_messages ptr32plus object {
2028 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2029 }]
2030 }
2031
2032 # Return 1 if we support 32-bit or larger array and structure sizes
2033 # using default options, 0 otherwise. Avoid false positive on
2034 # targets with 20 or 24 bit address spaces.
2035
2036 proc check_effective_target_size32plus { } {
2037 return [check_no_compiler_messages size32plus object {
2038 char dummy[16777217L];
2039 }]
2040 }
2041
2042 # Returns 1 if we're generating 16-bit or smaller integers with the
2043 # default options, 0 otherwise.
2044
2045 proc check_effective_target_int16 { } {
2046 return [check_no_compiler_messages int16 object {
2047 int dummy[sizeof (int) < 4 ? 1 : -1];
2048 }]
2049 }
2050
2051 # Return 1 if we're generating 64-bit code using default options, 0
2052 # otherwise.
2053
2054 proc check_effective_target_lp64 { } {
2055 return [check_no_compiler_messages lp64 object {
2056 int dummy[sizeof (int) == 4
2057 && sizeof (void *) == 8
2058 && sizeof (long) == 8 ? 1 : -1];
2059 }]
2060 }
2061
2062 # Return 1 if we're generating 64-bit code using default llp64 options,
2063 # 0 otherwise.
2064
2065 proc check_effective_target_llp64 { } {
2066 return [check_no_compiler_messages llp64 object {
2067 int dummy[sizeof (int) == 4
2068 && sizeof (void *) == 8
2069 && sizeof (long long) == 8
2070 && sizeof (long) == 4 ? 1 : -1];
2071 }]
2072 }
2073
2074 # Return 1 if long and int have different sizes,
2075 # 0 otherwise.
2076
2077 proc check_effective_target_long_neq_int { } {
2078 return [check_no_compiler_messages long_ne_int object {
2079 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2080 }]
2081 }
2082
2083 # Return 1 if the target supports long double larger than double,
2084 # 0 otherwise.
2085
2086 proc check_effective_target_large_long_double { } {
2087 return [check_no_compiler_messages large_long_double object {
2088 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2089 }]
2090 }
2091
2092 # Return 1 if the target supports double larger than float,
2093 # 0 otherwise.
2094
2095 proc check_effective_target_large_double { } {
2096 return [check_no_compiler_messages large_double object {
2097 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2098 }]
2099 }
2100
2101 # Return 1 if the target supports long double of 128 bits,
2102 # 0 otherwise.
2103
2104 proc check_effective_target_longdouble128 { } {
2105 return [check_no_compiler_messages longdouble128 object {
2106 int dummy[sizeof(long double) == 16 ? 1 : -1];
2107 }]
2108 }
2109
2110 # Return 1 if the target supports double of 64 bits,
2111 # 0 otherwise.
2112
2113 proc check_effective_target_double64 { } {
2114 return [check_no_compiler_messages double64 object {
2115 int dummy[sizeof(double) == 8 ? 1 : -1];
2116 }]
2117 }
2118
2119 # Return 1 if the target supports double of at least 64 bits,
2120 # 0 otherwise.
2121
2122 proc check_effective_target_double64plus { } {
2123 return [check_no_compiler_messages double64plus object {
2124 int dummy[sizeof(double) >= 8 ? 1 : -1];
2125 }]
2126 }
2127
2128 # Return 1 if the target supports 'w' suffix on floating constant
2129 # 0 otherwise.
2130
2131 proc check_effective_target_has_w_floating_suffix { } {
2132 set opts ""
2133 if [check_effective_target_c++] {
2134 append opts "-std=gnu++03"
2135 }
2136 return [check_no_compiler_messages w_fp_suffix object {
2137 float dummy = 1.0w;
2138 } "$opts"]
2139 }
2140
2141 # Return 1 if the target supports 'q' suffix on floating constant
2142 # 0 otherwise.
2143
2144 proc check_effective_target_has_q_floating_suffix { } {
2145 set opts ""
2146 if [check_effective_target_c++] {
2147 append opts "-std=gnu++03"
2148 }
2149 return [check_no_compiler_messages q_fp_suffix object {
2150 float dummy = 1.0q;
2151 } "$opts"]
2152 }
2153 # Return 1 if the target supports compiling fixed-point,
2154 # 0 otherwise.
2155
2156 proc check_effective_target_fixed_point { } {
2157 return [check_no_compiler_messages fixed_point object {
2158 _Sat _Fract x; _Sat _Accum y;
2159 }]
2160 }
2161
2162 # Return 1 if the target supports compiling decimal floating point,
2163 # 0 otherwise.
2164
2165 proc check_effective_target_dfp_nocache { } {
2166 verbose "check_effective_target_dfp_nocache: compiling source" 2
2167 set ret [check_no_compiler_messages_nocache dfp object {
2168 float x __attribute__((mode(DD)));
2169 }]
2170 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2171 return $ret
2172 }
2173
2174 proc check_effective_target_dfprt_nocache { } {
2175 return [check_runtime_nocache dfprt {
2176 typedef float d64 __attribute__((mode(DD)));
2177 d64 x = 1.2df, y = 2.3dd, z;
2178 int main () { z = x + y; return 0; }
2179 }]
2180 }
2181
2182 # Return 1 if the target supports compiling Decimal Floating Point,
2183 # 0 otherwise.
2184 #
2185 # This won't change for different subtargets so cache the result.
2186
2187 proc check_effective_target_dfp { } {
2188 return [check_cached_effective_target dfp {
2189 check_effective_target_dfp_nocache
2190 }]
2191 }
2192
2193 # Return 1 if the target supports linking and executing Decimal Floating
2194 # Point, 0 otherwise.
2195 #
2196 # This won't change for different subtargets so cache the result.
2197
2198 proc check_effective_target_dfprt { } {
2199 return [check_cached_effective_target dfprt {
2200 check_effective_target_dfprt_nocache
2201 }]
2202 }
2203
2204 # Return 1 if the target supports executing DFP hardware instructions,
2205 # 0 otherwise. Cache the result.
2206
2207 proc check_dfp_hw_available { } {
2208 return [check_cached_effective_target dfp_hw_available {
2209 # For now, disable on Darwin
2210 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2211 expr 0
2212 } else {
2213 check_runtime_nocache dfp_hw_available {
2214 volatile _Decimal64 r;
2215 volatile _Decimal64 a = 4.0DD;
2216 volatile _Decimal64 b = 2.0DD;
2217 int main()
2218 {
2219 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2220 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2221 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2222 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2223 return 0;
2224 }
2225 } "-mcpu=power6 -mhard-float"
2226 }
2227 }]
2228 }
2229
2230 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2231
2232 proc check_effective_target_ucn_nocache { } {
2233 # -std=c99 is only valid for C
2234 if [check_effective_target_c] {
2235 set ucnopts "-std=c99"
2236 } else {
2237 set ucnopts ""
2238 }
2239 verbose "check_effective_target_ucn_nocache: compiling source" 2
2240 set ret [check_no_compiler_messages_nocache ucn object {
2241 int \u00C0;
2242 } $ucnopts]
2243 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2244 return $ret
2245 }
2246
2247 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2248 #
2249 # This won't change for different subtargets, so cache the result.
2250
2251 proc check_effective_target_ucn { } {
2252 return [check_cached_effective_target ucn {
2253 check_effective_target_ucn_nocache
2254 }]
2255 }
2256
2257 # Return 1 if the target needs a command line argument to enable a SIMD
2258 # instruction set.
2259
2260 proc check_effective_target_vect_cmdline_needed { } {
2261 global et_vect_cmdline_needed_saved
2262 global et_vect_cmdline_needed_target_name
2263
2264 if { ![info exists et_vect_cmdline_needed_target_name] } {
2265 set et_vect_cmdline_needed_target_name ""
2266 }
2267
2268 # If the target has changed since we set the cached value, clear it.
2269 set current_target [current_target_name]
2270 if { $current_target != $et_vect_cmdline_needed_target_name } {
2271 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2272 set et_vect_cmdline_needed_target_name $current_target
2273 if { [info exists et_vect_cmdline_needed_saved] } {
2274 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2275 unset et_vect_cmdline_needed_saved
2276 }
2277 }
2278
2279 if [info exists et_vect_cmdline_needed_saved] {
2280 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2281 } else {
2282 set et_vect_cmdline_needed_saved 1
2283 if { [istarget alpha*-*-*]
2284 || [istarget ia64-*-*]
2285 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2286 && ([check_effective_target_x32]
2287 || [check_effective_target_lp64]))
2288 || ([istarget powerpc*-*-*]
2289 && ([check_effective_target_powerpc_spe]
2290 || [check_effective_target_powerpc_altivec]))
2291 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2292 || [istarget spu-*-*]
2293 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2294 || [istarget aarch64*-*-*] } {
2295 set et_vect_cmdline_needed_saved 0
2296 }
2297 }
2298
2299 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2300 return $et_vect_cmdline_needed_saved
2301 }
2302
2303 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2304 #
2305 # This won't change for different subtargets so cache the result.
2306
2307 proc check_effective_target_vect_int { } {
2308 global et_vect_int_saved
2309
2310 if [info exists et_vect_int_saved] {
2311 verbose "check_effective_target_vect_int: using cached result" 2
2312 } else {
2313 set et_vect_int_saved 0
2314 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2315 || ([istarget powerpc*-*-*]
2316 && ![istarget powerpc-*-linux*paired*])
2317 || [istarget spu-*-*]
2318 || [istarget sparc*-*-*]
2319 || [istarget alpha*-*-*]
2320 || [istarget ia64-*-*]
2321 || [istarget aarch64*-*-*]
2322 || [check_effective_target_arm32]
2323 || ([istarget mips*-*-*]
2324 && [check_effective_target_mips_loongson]) } {
2325 set et_vect_int_saved 1
2326 }
2327 }
2328
2329 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2330 return $et_vect_int_saved
2331 }
2332
2333 # Return 1 if the target supports signed int->float conversion
2334 #
2335
2336 proc check_effective_target_vect_intfloat_cvt { } {
2337 global et_vect_intfloat_cvt_saved
2338
2339 if [info exists et_vect_intfloat_cvt_saved] {
2340 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2341 } else {
2342 set et_vect_intfloat_cvt_saved 0
2343 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2344 || ([istarget powerpc*-*-*]
2345 && ![istarget powerpc-*-linux*paired*])
2346 || ([istarget arm*-*-*]
2347 && [check_effective_target_arm_neon_ok])} {
2348 set et_vect_intfloat_cvt_saved 1
2349 }
2350 }
2351
2352 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2353 return $et_vect_intfloat_cvt_saved
2354 }
2355
2356 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2357
2358 proc check_effective_target_int128 { } {
2359 return [check_no_compiler_messages int128 object {
2360 int dummy[
2361 #ifndef __SIZEOF_INT128__
2362 -1
2363 #else
2364 1
2365 #endif
2366 ];
2367 }]
2368 }
2369
2370 # Return 1 if the target supports unsigned int->float conversion
2371 #
2372
2373 proc check_effective_target_vect_uintfloat_cvt { } {
2374 global et_vect_uintfloat_cvt_saved
2375
2376 if [info exists et_vect_uintfloat_cvt_saved] {
2377 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2378 } else {
2379 set et_vect_uintfloat_cvt_saved 0
2380 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2381 || ([istarget powerpc*-*-*]
2382 && ![istarget powerpc-*-linux*paired*])
2383 || [istarget aarch64*-*-*]
2384 || ([istarget arm*-*-*]
2385 && [check_effective_target_arm_neon_ok])} {
2386 set et_vect_uintfloat_cvt_saved 1
2387 }
2388 }
2389
2390 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2391 return $et_vect_uintfloat_cvt_saved
2392 }
2393
2394
2395 # Return 1 if the target supports signed float->int conversion
2396 #
2397
2398 proc check_effective_target_vect_floatint_cvt { } {
2399 global et_vect_floatint_cvt_saved
2400
2401 if [info exists et_vect_floatint_cvt_saved] {
2402 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2403 } else {
2404 set et_vect_floatint_cvt_saved 0
2405 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2406 || ([istarget powerpc*-*-*]
2407 && ![istarget powerpc-*-linux*paired*])
2408 || ([istarget arm*-*-*]
2409 && [check_effective_target_arm_neon_ok])} {
2410 set et_vect_floatint_cvt_saved 1
2411 }
2412 }
2413
2414 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2415 return $et_vect_floatint_cvt_saved
2416 }
2417
2418 # Return 1 if the target supports unsigned float->int conversion
2419 #
2420
2421 proc check_effective_target_vect_floatuint_cvt { } {
2422 global et_vect_floatuint_cvt_saved
2423
2424 if [info exists et_vect_floatuint_cvt_saved] {
2425 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2426 } else {
2427 set et_vect_floatuint_cvt_saved 0
2428 if { ([istarget powerpc*-*-*]
2429 && ![istarget powerpc-*-linux*paired*])
2430 || ([istarget arm*-*-*]
2431 && [check_effective_target_arm_neon_ok])} {
2432 set et_vect_floatuint_cvt_saved 1
2433 }
2434 }
2435
2436 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2437 return $et_vect_floatuint_cvt_saved
2438 }
2439
2440 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2441 #
2442 # This won't change for different subtargets so cache the result.
2443
2444 proc check_effective_target_vect_simd_clones { } {
2445 global et_vect_simd_clones_saved
2446
2447 if [info exists et_vect_simd_clones_saved] {
2448 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2449 } else {
2450 set et_vect_simd_clones_saved 0
2451 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2452 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2453 # avx2 clone. Only the right clone for the specified arch will be
2454 # chosen, but still we need to at least be able to assemble
2455 # avx2.
2456 if { [check_effective_target_avx2] } {
2457 set et_vect_simd_clones_saved 1
2458 }
2459 }
2460 }
2461
2462 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2463 return $et_vect_simd_clones_saved
2464 }
2465
2466 # Return 1 if this is a AArch64 target supporting big endian
2467 proc check_effective_target_aarch64_big_endian { } {
2468 return [check_no_compiler_messages aarch64_big_endian assembly {
2469 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2470 #error !__aarch64__ || !__AARCH64EB__
2471 #endif
2472 }]
2473 }
2474
2475 # Return 1 if this is a AArch64 target supporting little endian
2476 proc check_effective_target_aarch64_little_endian { } {
2477 if { ![istarget aarch64*-*-*] } {
2478 return 0
2479 }
2480
2481 return [check_no_compiler_messages aarch64_little_endian assembly {
2482 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2483 #error FOO
2484 #endif
2485 }]
2486 }
2487
2488 # Return 1 if this is an arm target using 32-bit instructions
2489 proc check_effective_target_arm32 { } {
2490 if { ![istarget arm*-*-*] } {
2491 return 0
2492 }
2493
2494 return [check_no_compiler_messages arm32 assembly {
2495 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2496 #error !__arm || __thumb__ && !__thumb2__
2497 #endif
2498 }]
2499 }
2500
2501 # Return 1 if this is an arm target not using Thumb
2502 proc check_effective_target_arm_nothumb { } {
2503 if { ![istarget arm*-*-*] } {
2504 return 0
2505 }
2506
2507 return [check_no_compiler_messages arm_nothumb assembly {
2508 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2509 #error !__arm__ || __thumb || __thumb2__
2510 #endif
2511 }]
2512 }
2513
2514 # Return 1 if this is a little-endian ARM target
2515 proc check_effective_target_arm_little_endian { } {
2516 if { ![istarget arm*-*-*] } {
2517 return 0
2518 }
2519
2520 return [check_no_compiler_messages arm_little_endian assembly {
2521 #if !defined(__arm__) || !defined(__ARMEL__)
2522 #error !__arm__ || !__ARMEL__
2523 #endif
2524 }]
2525 }
2526
2527 # Return 1 if this is an ARM target that only supports aligned vector accesses
2528 proc check_effective_target_arm_vect_no_misalign { } {
2529 if { ![istarget arm*-*-*] } {
2530 return 0
2531 }
2532
2533 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2534 #if !defined(__arm__) \
2535 || (defined(__ARM_FEATURE_UNALIGNED) \
2536 && defined(__ARMEL__))
2537 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2538 #endif
2539 }]
2540 }
2541
2542
2543 # Return 1 if this is an ARM target supporting -mfpu=vfp
2544 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2545 # options.
2546
2547 proc check_effective_target_arm_vfp_ok { } {
2548 if { [check_effective_target_arm32] } {
2549 return [check_no_compiler_messages arm_vfp_ok object {
2550 int dummy;
2551 } "-mfpu=vfp -mfloat-abi=softfp"]
2552 } else {
2553 return 0
2554 }
2555 }
2556
2557 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2558 # -mfloat-abi=softfp.
2559
2560 proc check_effective_target_arm_vfp3_ok { } {
2561 if { [check_effective_target_arm32] } {
2562 return [check_no_compiler_messages arm_vfp3_ok object {
2563 int dummy;
2564 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2565 } else {
2566 return 0
2567 }
2568 }
2569
2570 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2571 # -mfloat-abi=softfp.
2572 proc check_effective_target_arm_v8_vfp_ok {} {
2573 if { [check_effective_target_arm32] } {
2574 return [check_no_compiler_messages arm_v8_vfp_ok object {
2575 int foo (void)
2576 {
2577 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2578 return 0;
2579 }
2580 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2581 } else {
2582 return 0
2583 }
2584 }
2585
2586 # Return 1 if this is an ARM target supporting -mfpu=vfp
2587 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2588 # options.
2589
2590 proc check_effective_target_arm_hard_vfp_ok { } {
2591 if { [check_effective_target_arm32]
2592 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2593 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2594 int main() { return 0;}
2595 } "-mfpu=vfp -mfloat-abi=hard"]
2596 } else {
2597 return 0
2598 }
2599 }
2600
2601 # Return 1 if this is an ARM target that supports DSP multiply with
2602 # current multilib flags.
2603
2604 proc check_effective_target_arm_dsp { } {
2605 return [check_no_compiler_messages arm_dsp assembly {
2606 #ifndef __ARM_FEATURE_DSP
2607 #error not DSP
2608 #endif
2609 int i;
2610 }]
2611 }
2612
2613 # Return 1 if this is an ARM target that supports unaligned word/halfword
2614 # load/store instructions.
2615
2616 proc check_effective_target_arm_unaligned { } {
2617 return [check_no_compiler_messages arm_unaligned assembly {
2618 #ifndef __ARM_FEATURE_UNALIGNED
2619 #error no unaligned support
2620 #endif
2621 int i;
2622 }]
2623 }
2624
2625 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2626 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2627 # incompatible with these options. Also set et_arm_crypto_flags to the
2628 # best options to add.
2629
2630 proc check_effective_target_arm_crypto_ok_nocache { } {
2631 global et_arm_crypto_flags
2632 set et_arm_crypto_flags ""
2633 if { [check_effective_target_arm32] } {
2634 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2635 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2636 #include "arm_neon.h"
2637 uint8x16_t
2638 foo (uint8x16_t a, uint8x16_t b)
2639 {
2640 return vaeseq_u8 (a, b);
2641 }
2642 } "$flags"] } {
2643 set et_arm_crypto_flags $flags
2644 return 1
2645 }
2646 }
2647 }
2648
2649 return 0
2650 }
2651
2652 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2653
2654 proc check_effective_target_arm_crypto_ok { } {
2655 return [check_cached_effective_target arm_crypto_ok \
2656 check_effective_target_arm_crypto_ok_nocache]
2657 }
2658
2659 # Add options for crypto extensions.
2660 proc add_options_for_arm_crypto { flags } {
2661 if { ! [check_effective_target_arm_crypto_ok] } {
2662 return "$flags"
2663 }
2664 global et_arm_crypto_flags
2665 return "$flags $et_arm_crypto_flags"
2666 }
2667
2668 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2669 # or -mfloat-abi=hard, but if one is already specified by the
2670 # multilib, use it. Similarly, if a -mfpu option already enables
2671 # NEON, do not add -mfpu=neon.
2672
2673 proc add_options_for_arm_neon { flags } {
2674 if { ! [check_effective_target_arm_neon_ok] } {
2675 return "$flags"
2676 }
2677 global et_arm_neon_flags
2678 return "$flags $et_arm_neon_flags"
2679 }
2680
2681 proc add_options_for_arm_v8_vfp { flags } {
2682 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2683 return "$flags"
2684 }
2685 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2686 }
2687
2688 proc add_options_for_arm_v8_neon { flags } {
2689 if { ! [check_effective_target_arm_v8_neon_ok] } {
2690 return "$flags"
2691 }
2692 global et_arm_v8_neon_flags
2693 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2694 }
2695
2696 proc add_options_for_arm_crc { flags } {
2697 if { ! [check_effective_target_arm_crc_ok] } {
2698 return "$flags"
2699 }
2700 global et_arm_crc_flags
2701 return "$flags $et_arm_crc_flags"
2702 }
2703
2704 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2705 # or -mfloat-abi=hard, but if one is already specified by the
2706 # multilib, use it. Similarly, if a -mfpu option already enables
2707 # NEON, do not add -mfpu=neon.
2708
2709 proc add_options_for_arm_neonv2 { flags } {
2710 if { ! [check_effective_target_arm_neonv2_ok] } {
2711 return "$flags"
2712 }
2713 global et_arm_neonv2_flags
2714 return "$flags $et_arm_neonv2_flags"
2715 }
2716
2717 # Add the options needed for vfp3.
2718 proc add_options_for_arm_vfp3 { flags } {
2719 if { ! [check_effective_target_arm_vfp3_ok] } {
2720 return "$flags"
2721 }
2722 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2723 }
2724
2725 # Return 1 if this is an ARM target supporting -mfpu=neon
2726 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2727 # incompatible with these options. Also set et_arm_neon_flags to the
2728 # best options to add.
2729
2730 proc check_effective_target_arm_neon_ok_nocache { } {
2731 global et_arm_neon_flags
2732 set et_arm_neon_flags ""
2733 if { [check_effective_target_arm32] } {
2734 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2735 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2736 #include "arm_neon.h"
2737 int dummy;
2738 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
2739 configured for -mcpu=arm926ej-s, for example. */
2740 #if __ARM_ARCH < 7
2741 #error Architecture too old for NEON.
2742 #endif
2743 } "$flags"] } {
2744 set et_arm_neon_flags $flags
2745 return 1
2746 }
2747 }
2748 }
2749
2750 return 0
2751 }
2752
2753 proc check_effective_target_arm_neon_ok { } {
2754 return [check_cached_effective_target arm_neon_ok \
2755 check_effective_target_arm_neon_ok_nocache]
2756 }
2757
2758 proc check_effective_target_arm_crc_ok_nocache { } {
2759 global et_arm_crc_flags
2760 set et_arm_crc_flags "-march=armv8-a+crc"
2761 return [check_no_compiler_messages_nocache arm_crc_ok object {
2762 #if !defined (__ARM_FEATURE_CRC32)
2763 #error FOO
2764 #endif
2765 } "$et_arm_crc_flags"]
2766 }
2767
2768 proc check_effective_target_arm_crc_ok { } {
2769 return [check_cached_effective_target arm_crc_ok \
2770 check_effective_target_arm_crc_ok_nocache]
2771 }
2772
2773 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2774 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2775 # incompatible with these options. Also set et_arm_neon_flags to the
2776 # best options to add.
2777
2778 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2779 global et_arm_neon_fp16_flags
2780 set et_arm_neon_fp16_flags ""
2781 if { [check_effective_target_arm32] } {
2782 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2783 "-mfpu=neon-fp16 -mfloat-abi=softfp"
2784 "-mfp16-format=ieee"
2785 "-mfloat-abi=softfp -mfp16-format=ieee"
2786 "-mfpu=neon-fp16 -mfp16-format=ieee"
2787 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
2788 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2789 #include "arm_neon.h"
2790 float16x4_t
2791 foo (float32x4_t arg)
2792 {
2793 return vcvt_f16_f32 (arg);
2794 }
2795 } "$flags"] } {
2796 set et_arm_neon_fp16_flags $flags
2797 return 1
2798 }
2799 }
2800 }
2801
2802 return 0
2803 }
2804
2805 proc check_effective_target_arm_neon_fp16_ok { } {
2806 return [check_cached_effective_target arm_neon_fp16_ok \
2807 check_effective_target_arm_neon_fp16_ok_nocache]
2808 }
2809
2810 proc add_options_for_arm_neon_fp16 { flags } {
2811 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2812 return "$flags"
2813 }
2814 global et_arm_neon_fp16_flags
2815 return "$flags $et_arm_neon_fp16_flags"
2816 }
2817
2818 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2819 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2820 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2821 # best options to add.
2822
2823 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2824 global et_arm_v8_neon_flags
2825 set et_arm_v8_neon_flags ""
2826 if { [check_effective_target_arm32] } {
2827 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2828 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2829 #if __ARM_ARCH < 8
2830 #error not armv8 or later
2831 #endif
2832 #include "arm_neon.h"
2833 void
2834 foo ()
2835 {
2836 __asm__ volatile ("vrintn.f32 q0, q0");
2837 }
2838 } "$flags -march=armv8-a"] } {
2839 set et_arm_v8_neon_flags $flags
2840 return 1
2841 }
2842 }
2843 }
2844
2845 return 0
2846 }
2847
2848 proc check_effective_target_arm_v8_neon_ok { } {
2849 return [check_cached_effective_target arm_v8_neon_ok \
2850 check_effective_target_arm_v8_neon_ok_nocache]
2851 }
2852
2853 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2854 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2855 # incompatible with these options. Also set et_arm_neonv2_flags to the
2856 # best options to add.
2857
2858 proc check_effective_target_arm_neonv2_ok_nocache { } {
2859 global et_arm_neonv2_flags
2860 set et_arm_neonv2_flags ""
2861 if { [check_effective_target_arm32] } {
2862 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2863 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
2864 #include "arm_neon.h"
2865 float32x2_t
2866 foo (float32x2_t a, float32x2_t b, float32x2_t c)
2867 {
2868 return vfma_f32 (a, b, c);
2869 }
2870 } "$flags"] } {
2871 set et_arm_neonv2_flags $flags
2872 return 1
2873 }
2874 }
2875 }
2876
2877 return 0
2878 }
2879
2880 proc check_effective_target_arm_neonv2_ok { } {
2881 return [check_cached_effective_target arm_neonv2_ok \
2882 check_effective_target_arm_neonv2_ok_nocache]
2883 }
2884
2885 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2886 # or -mfloat-abi=hard, but if one is already specified by the
2887 # multilib, use it.
2888
2889 proc add_options_for_arm_fp16 { flags } {
2890 if { ! [check_effective_target_arm_fp16_ok] } {
2891 return "$flags"
2892 }
2893 global et_arm_fp16_flags
2894 return "$flags $et_arm_fp16_flags"
2895 }
2896
2897 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
2898 # Skip multilibs that are incompatible with these options and set
2899 # et_arm_fp16_flags to the best options to add.
2900
2901 proc check_effective_target_arm_fp16_ok_nocache { } {
2902 global et_arm_fp16_flags
2903 set et_arm_fp16_flags ""
2904 if { ! [check_effective_target_arm32] } {
2905 return 0;
2906 }
2907 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2908 # Multilib flags would override -mfpu.
2909 return 0
2910 }
2911 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2912 # Must generate floating-point instructions.
2913 return 0
2914 }
2915 if [check_effective_target_arm_hf_eabi] {
2916 # Use existing float-abi and force an fpu which supports fp16
2917 set et_arm_fp16_flags "-mfpu=vfpv4"
2918 return 1;
2919 }
2920 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2921 # The existing -mfpu value is OK; use it, but add softfp.
2922 set et_arm_fp16_flags "-mfloat-abi=softfp"
2923 return 1;
2924 }
2925 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2926 # macro to check for this support.
2927 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2928 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2929 int dummy;
2930 } "$flags"] } {
2931 set et_arm_fp16_flags "$flags"
2932 return 1
2933 }
2934
2935 return 0
2936 }
2937
2938 proc check_effective_target_arm_fp16_ok { } {
2939 return [check_cached_effective_target arm_fp16_ok \
2940 check_effective_target_arm_fp16_ok_nocache]
2941 }
2942
2943 # Creates a series of routines that return 1 if the given architecture
2944 # can be selected and a routine to give the flags to select that architecture
2945 # Note: Extra flags may be added to disable options from newer compilers
2946 # (Thumb in particular - but others may be added in the future)
2947 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2948 # /* { dg-add-options arm_arch_v5 } */
2949 # /* { dg-require-effective-target arm_arch_v5_multilib } */
2950 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
2951 v4t "-march=armv4t" __ARM_ARCH_4T__
2952 v5 "-march=armv5 -marm" __ARM_ARCH_5__
2953 v5t "-march=armv5t" __ARM_ARCH_5T__
2954 v5te "-march=armv5te" __ARM_ARCH_5TE__
2955 v6 "-march=armv6" __ARM_ARCH_6__
2956 v6k "-march=armv6k" __ARM_ARCH_6K__
2957 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
2958 v6z "-march=armv6z" __ARM_ARCH_6Z__
2959 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
2960 v7a "-march=armv7-a" __ARM_ARCH_7A__
2961 v7ve "-march=armv7ve" __ARM_ARCH_7A__
2962 v7r "-march=armv7-r" __ARM_ARCH_7R__
2963 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
2964 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2965 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
2966 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2967 proc check_effective_target_arm_arch_FUNC_ok { } {
2968 if { [ string match "*-marm*" "FLAG" ] &&
2969 ![check_effective_target_arm_arm_ok] } {
2970 return 0
2971 }
2972 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2973 #if !defined (DEF)
2974 #error !DEF
2975 #endif
2976 } "FLAG" ]
2977 }
2978
2979 proc add_options_for_arm_arch_FUNC { flags } {
2980 return "$flags FLAG"
2981 }
2982
2983 proc check_effective_target_arm_arch_FUNC_multilib { } {
2984 return [check_runtime arm_arch_FUNC_multilib {
2985 int
2986 main (void)
2987 {
2988 return 0;
2989 }
2990 } [add_options_for_arm_arch_FUNC ""]]
2991 }
2992 }]
2993 }
2994
2995 # Return 1 if this is an ARM target where -marm causes ARM to be
2996 # used (not Thumb)
2997
2998 proc check_effective_target_arm_arm_ok { } {
2999 return [check_no_compiler_messages arm_arm_ok assembly {
3000 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3001 #error !__arm__ || __thumb__ || __thumb2__
3002 #endif
3003 } "-marm"]
3004 }
3005
3006
3007 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3008 # used.
3009
3010 proc check_effective_target_arm_thumb1_ok { } {
3011 return [check_no_compiler_messages arm_thumb1_ok assembly {
3012 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3013 #error !__arm__ || !__thumb__ || __thumb2__
3014 #endif
3015 int foo (int i) { return i; }
3016 } "-mthumb"]
3017 }
3018
3019 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3020 # used.
3021
3022 proc check_effective_target_arm_thumb2_ok { } {
3023 return [check_no_compiler_messages arm_thumb2_ok assembly {
3024 #if !defined(__thumb2__)
3025 #error !__thumb2__
3026 #endif
3027 int foo (int i) { return i; }
3028 } "-mthumb"]
3029 }
3030
3031 # Return 1 if this is an ARM target where Thumb-1 is used without options
3032 # added by the test.
3033
3034 proc check_effective_target_arm_thumb1 { } {
3035 return [check_no_compiler_messages arm_thumb1 assembly {
3036 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3037 #error !__arm__ || !__thumb__ || __thumb2__
3038 #endif
3039 int i;
3040 } ""]
3041 }
3042
3043 # Return 1 if this is an ARM target where Thumb-2 is used without options
3044 # added by the test.
3045
3046 proc check_effective_target_arm_thumb2 { } {
3047 return [check_no_compiler_messages arm_thumb2 assembly {
3048 #if !defined(__thumb2__)
3049 #error !__thumb2__
3050 #endif
3051 int i;
3052 } ""]
3053 }
3054
3055 # Return 1 if this is an ARM target where conditional execution is available.
3056
3057 proc check_effective_target_arm_cond_exec { } {
3058 return [check_no_compiler_messages arm_cond_exec assembly {
3059 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3060 #error FOO
3061 #endif
3062 int i;
3063 } ""]
3064 }
3065
3066 # Return 1 if this is an ARM cortex-M profile cpu
3067
3068 proc check_effective_target_arm_cortex_m { } {
3069 if { ![istarget arm*-*-*] } {
3070 return 0
3071 }
3072 return [check_no_compiler_messages arm_cortex_m assembly {
3073 #if !defined(__ARM_ARCH_7M__) \
3074 && !defined (__ARM_ARCH_7EM__) \
3075 && !defined (__ARM_ARCH_6M__)
3076 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
3077 #endif
3078 int i;
3079 } "-mthumb"]
3080 }
3081
3082 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3083
3084 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3085 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3086 int foo (void) { return 0; }
3087 } "-O2 -mprint-tune-info" ]
3088 }
3089
3090 # Return 1 if the target supports executing NEON instructions, 0
3091 # otherwise. Cache the result.
3092
3093 proc check_effective_target_arm_neon_hw { } {
3094 return [check_runtime arm_neon_hw_available {
3095 int
3096 main (void)
3097 {
3098 long long a = 0, b = 1;
3099 asm ("vorr %P0, %P1, %P2"
3100 : "=w" (a)
3101 : "0" (a), "w" (b));
3102 return (a != 1);
3103 }
3104 } [add_options_for_arm_neon ""]]
3105 }
3106
3107 proc check_effective_target_arm_neonv2_hw { } {
3108 return [check_runtime arm_neon_hwv2_available {
3109 #include "arm_neon.h"
3110 int
3111 main (void)
3112 {
3113 float32x2_t a, b, c;
3114 asm ("vfma.f32 %P0, %P1, %P2"
3115 : "=w" (a)
3116 : "w" (b), "w" (c));
3117 return 0;
3118 }
3119 } [add_options_for_arm_neonv2 ""]]
3120 }
3121
3122 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3123 # otherwise.
3124
3125 proc check_effective_target_arm_v8_neon_hw { } {
3126 return [check_runtime arm_v8_neon_hw_available {
3127 #include "arm_neon.h"
3128 int
3129 main (void)
3130 {
3131 float32x2_t a;
3132 asm ("vrinta.f32 %P0, %P1"
3133 : "=w" (a)
3134 : "0" (a));
3135 return 0;
3136 }
3137 } [add_options_for_arm_v8_neon ""]]
3138 }
3139
3140 # Return 1 if this is a ARM target with NEON enabled.
3141
3142 proc check_effective_target_arm_neon { } {
3143 if { [check_effective_target_arm32] } {
3144 return [check_no_compiler_messages arm_neon object {
3145 #ifndef __ARM_NEON__
3146 #error not NEON
3147 #else
3148 int dummy;
3149 #endif
3150 }]
3151 } else {
3152 return 0
3153 }
3154 }
3155
3156 proc check_effective_target_arm_neonv2 { } {
3157 if { [check_effective_target_arm32] } {
3158 return [check_no_compiler_messages arm_neon object {
3159 #ifndef __ARM_NEON__
3160 #error not NEON
3161 #else
3162 #ifndef __ARM_FEATURE_FMA
3163 #error not NEONv2
3164 #else
3165 int dummy;
3166 #endif
3167 #endif
3168 }]
3169 } else {
3170 return 0
3171 }
3172 }
3173
3174 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3175 # the Loongson vector modes.
3176
3177 proc check_effective_target_mips_loongson { } {
3178 return [check_no_compiler_messages loongson assembly {
3179 #if !defined(__mips_loongson_vector_rev)
3180 #error !__mips_loongson_vector_rev
3181 #endif
3182 }]
3183 }
3184
3185 # Return 1 if this is a MIPS target that supports the legacy NAN.
3186
3187 proc check_effective_target_mips_nanlegacy { } {
3188 return [check_no_compiler_messages nanlegacy assembly {
3189 #include <stdlib.h>
3190 int main () { return 0; }
3191 } "-mnan=legacy"]
3192 }
3193
3194 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3195 # Architecture.
3196
3197 proc check_effective_target_arm_eabi { } {
3198 return [check_no_compiler_messages arm_eabi object {
3199 #ifndef __ARM_EABI__
3200 #error not EABI
3201 #else
3202 int dummy;
3203 #endif
3204 }]
3205 }
3206
3207 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3208 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3209
3210 proc check_effective_target_arm_hf_eabi { } {
3211 return [check_no_compiler_messages arm_hf_eabi object {
3212 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3213 #error not hard-float EABI
3214 #else
3215 int dummy;
3216 #endif
3217 }]
3218 }
3219
3220 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3221 # Some multilibs may be incompatible with this option.
3222
3223 proc check_effective_target_arm_iwmmxt_ok { } {
3224 if { [check_effective_target_arm32] } {
3225 return [check_no_compiler_messages arm_iwmmxt_ok object {
3226 int dummy;
3227 } "-mcpu=iwmmxt"]
3228 } else {
3229 return 0
3230 }
3231 }
3232
3233 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3234 # for an ARM target.
3235 proc check_effective_target_arm_prefer_ldrd_strd { } {
3236 if { ![check_effective_target_arm32] } {
3237 return 0;
3238 }
3239
3240 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3241 void foo (int *p) { p[0] = 1; p[1] = 0;}
3242 } "-O2 -mthumb" ]
3243 }
3244
3245 # Return 1 if this is a PowerPC target supporting -meabi.
3246
3247 proc check_effective_target_powerpc_eabi_ok { } {
3248 if { [istarget powerpc*-*-*] } {
3249 return [check_no_compiler_messages powerpc_eabi_ok object {
3250 int dummy;
3251 } "-meabi"]
3252 } else {
3253 return 0
3254 }
3255 }
3256
3257 # Return 1 if this is a PowerPC target with floating-point registers.
3258
3259 proc check_effective_target_powerpc_fprs { } {
3260 if { [istarget powerpc*-*-*]
3261 || [istarget rs6000-*-*] } {
3262 return [check_no_compiler_messages powerpc_fprs object {
3263 #ifdef __NO_FPRS__
3264 #error no FPRs
3265 #else
3266 int dummy;
3267 #endif
3268 }]
3269 } else {
3270 return 0
3271 }
3272 }
3273
3274 # Return 1 if this is a PowerPC target with hardware double-precision
3275 # floating point.
3276
3277 proc check_effective_target_powerpc_hard_double { } {
3278 if { [istarget powerpc*-*-*]
3279 || [istarget rs6000-*-*] } {
3280 return [check_no_compiler_messages powerpc_hard_double object {
3281 #ifdef _SOFT_DOUBLE
3282 #error soft double
3283 #else
3284 int dummy;
3285 #endif
3286 }]
3287 } else {
3288 return 0
3289 }
3290 }
3291
3292 # Return 1 if this is a PowerPC target supporting -maltivec.
3293
3294 proc check_effective_target_powerpc_altivec_ok { } {
3295 if { ([istarget powerpc*-*-*]
3296 && ![istarget powerpc-*-linux*paired*])
3297 || [istarget rs6000-*-*] } {
3298 # AltiVec is not supported on AIX before 5.3.
3299 if { [istarget powerpc*-*-aix4*]
3300 || [istarget powerpc*-*-aix5.1*]
3301 || [istarget powerpc*-*-aix5.2*] } {
3302 return 0
3303 }
3304 return [check_no_compiler_messages powerpc_altivec_ok object {
3305 int dummy;
3306 } "-maltivec"]
3307 } else {
3308 return 0
3309 }
3310 }
3311
3312 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3313
3314 proc check_effective_target_powerpc_p8vector_ok { } {
3315 if { ([istarget powerpc*-*-*]
3316 && ![istarget powerpc-*-linux*paired*])
3317 || [istarget rs6000-*-*] } {
3318 # AltiVec is not supported on AIX before 5.3.
3319 if { [istarget powerpc*-*-aix4*]
3320 || [istarget powerpc*-*-aix5.1*]
3321 || [istarget powerpc*-*-aix5.2*] } {
3322 return 0
3323 }
3324 return [check_no_compiler_messages powerpc_p8vector_ok object {
3325 int main (void) {
3326 #ifdef __MACH__
3327 asm volatile ("xxlorc vs0,vs0,vs0");
3328 #else
3329 asm volatile ("xxlorc 0,0,0");
3330 #endif
3331 return 0;
3332 }
3333 } "-mpower8-vector"]
3334 } else {
3335 return 0
3336 }
3337 }
3338
3339 # Return 1 if this is a PowerPC target supporting -mvsx
3340
3341 proc check_effective_target_powerpc_vsx_ok { } {
3342 if { ([istarget powerpc*-*-*]
3343 && ![istarget powerpc-*-linux*paired*])
3344 || [istarget rs6000-*-*] } {
3345 # VSX is not supported on AIX before 7.1.
3346 if { [istarget powerpc*-*-aix4*]
3347 || [istarget powerpc*-*-aix5*]
3348 || [istarget powerpc*-*-aix6*] } {
3349 return 0
3350 }
3351 return [check_no_compiler_messages powerpc_vsx_ok object {
3352 int main (void) {
3353 #ifdef __MACH__
3354 asm volatile ("xxlor vs0,vs0,vs0");
3355 #else
3356 asm volatile ("xxlor 0,0,0");
3357 #endif
3358 return 0;
3359 }
3360 } "-mvsx"]
3361 } else {
3362 return 0
3363 }
3364 }
3365
3366 # Return 1 if this is a PowerPC target supporting -mhtm
3367
3368 proc check_effective_target_powerpc_htm_ok { } {
3369 if { ([istarget powerpc*-*-*]
3370 && ![istarget powerpc-*-linux*paired*])
3371 || [istarget rs6000-*-*] } {
3372 # HTM is not supported on AIX yet.
3373 if { [istarget powerpc*-*-aix*] } {
3374 return 0
3375 }
3376 return [check_no_compiler_messages powerpc_htm_ok object {
3377 int main (void) {
3378 asm volatile ("tbegin. 0");
3379 return 0;
3380 }
3381 } "-mhtm"]
3382 } else {
3383 return 0
3384 }
3385 }
3386
3387 # Return 1 if the target supports executing HTM hardware instructions,
3388 # 0 otherwise. Cache the result.
3389
3390 proc check_htm_hw_available { } {
3391 return [check_cached_effective_target htm_hw_available {
3392 # For now, disable on Darwin
3393 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3394 expr 0
3395 } else {
3396 check_runtime_nocache htm_hw_available {
3397 int main()
3398 {
3399 __builtin_ttest ();
3400 return 0;
3401 }
3402 } "-mhtm"
3403 }
3404 }]
3405 }
3406 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3407
3408 proc check_effective_target_powerpc_ppu_ok { } {
3409 if [check_effective_target_powerpc_altivec_ok] {
3410 return [check_no_compiler_messages cell_asm_available object {
3411 int main (void) {
3412 #ifdef __MACH__
3413 asm volatile ("lvlx v0,v0,v0");
3414 #else
3415 asm volatile ("lvlx 0,0,0");
3416 #endif
3417 return 0;
3418 }
3419 }]
3420 } else {
3421 return 0
3422 }
3423 }
3424
3425 # Return 1 if this is a PowerPC target that supports SPU.
3426
3427 proc check_effective_target_powerpc_spu { } {
3428 if { [istarget powerpc*-*-linux*] } {
3429 return [check_effective_target_powerpc_altivec_ok]
3430 } else {
3431 return 0
3432 }
3433 }
3434
3435 # Return 1 if this is a PowerPC SPE target. The check includes options
3436 # specified by dg-options for this test, so don't cache the result.
3437
3438 proc check_effective_target_powerpc_spe_nocache { } {
3439 if { [istarget powerpc*-*-*] } {
3440 return [check_no_compiler_messages_nocache powerpc_spe object {
3441 #ifndef __SPE__
3442 #error not SPE
3443 #else
3444 int dummy;
3445 #endif
3446 } [current_compiler_flags]]
3447 } else {
3448 return 0
3449 }
3450 }
3451
3452 # Return 1 if this is a PowerPC target with SPE enabled.
3453
3454 proc check_effective_target_powerpc_spe { } {
3455 if { [istarget powerpc*-*-*] } {
3456 return [check_no_compiler_messages powerpc_spe object {
3457 #ifndef __SPE__
3458 #error not SPE
3459 #else
3460 int dummy;
3461 #endif
3462 }]
3463 } else {
3464 return 0
3465 }
3466 }
3467
3468 # Return 1 if this is a PowerPC target with Altivec enabled.
3469
3470 proc check_effective_target_powerpc_altivec { } {
3471 if { [istarget powerpc*-*-*] } {
3472 return [check_no_compiler_messages powerpc_altivec object {
3473 #ifndef __ALTIVEC__
3474 #error not Altivec
3475 #else
3476 int dummy;
3477 #endif
3478 }]
3479 } else {
3480 return 0
3481 }
3482 }
3483
3484 # Return 1 if this is a PowerPC 405 target. The check includes options
3485 # specified by dg-options for this test, so don't cache the result.
3486
3487 proc check_effective_target_powerpc_405_nocache { } {
3488 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3489 return [check_no_compiler_messages_nocache powerpc_405 object {
3490 #ifdef __PPC405__
3491 int dummy;
3492 #else
3493 #error not a PPC405
3494 #endif
3495 } [current_compiler_flags]]
3496 } else {
3497 return 0
3498 }
3499 }
3500
3501 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3502
3503 proc check_effective_target_powerpc_elfv2 { } {
3504 if { [istarget powerpc*-*-*] } {
3505 return [check_no_compiler_messages powerpc_elfv2 object {
3506 #if _CALL_ELF != 2
3507 #error not ELF v2 ABI
3508 #else
3509 int dummy;
3510 #endif
3511 }]
3512 } else {
3513 return 0
3514 }
3515 }
3516
3517 # Return 1 if this is a SPU target with a toolchain that
3518 # supports automatic overlay generation.
3519
3520 proc check_effective_target_spu_auto_overlay { } {
3521 if { [istarget spu*-*-elf*] } {
3522 return [check_no_compiler_messages spu_auto_overlay executable {
3523 int main (void) { }
3524 } "-Wl,--auto-overlay" ]
3525 } else {
3526 return 0
3527 }
3528 }
3529
3530 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3531 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3532 # test environment appears to run executables on such a simulator.
3533
3534 proc check_effective_target_ultrasparc_hw { } {
3535 return [check_runtime ultrasparc_hw {
3536 int main() { return 0; }
3537 } "-mcpu=ultrasparc"]
3538 }
3539
3540 # Return 1 if the test environment supports executing UltraSPARC VIS2
3541 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3542
3543 proc check_effective_target_ultrasparc_vis2_hw { } {
3544 return [check_runtime ultrasparc_vis2_hw {
3545 int main() { __asm__(".word 0x81b00320"); return 0; }
3546 } "-mcpu=ultrasparc3"]
3547 }
3548
3549 # Return 1 if the test environment supports executing UltraSPARC VIS3
3550 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3551
3552 proc check_effective_target_ultrasparc_vis3_hw { } {
3553 return [check_runtime ultrasparc_vis3_hw {
3554 int main() { __asm__(".word 0x81b00220"); return 0; }
3555 } "-mcpu=niagara3"]
3556 }
3557
3558 # Return 1 if this is a SPARC-V9 target.
3559
3560 proc check_effective_target_sparc_v9 { } {
3561 if { [istarget sparc*-*-*] } {
3562 return [check_no_compiler_messages sparc_v9 object {
3563 int main (void) {
3564 asm volatile ("return %i7+8");
3565 return 0;
3566 }
3567 }]
3568 } else {
3569 return 0
3570 }
3571 }
3572
3573 # Return 1 if this is a SPARC target with VIS enabled.
3574
3575 proc check_effective_target_sparc_vis { } {
3576 if { [istarget sparc*-*-*] } {
3577 return [check_no_compiler_messages sparc_vis object {
3578 #ifndef __VIS__
3579 #error not VIS
3580 #else
3581 int dummy;
3582 #endif
3583 }]
3584 } else {
3585 return 0
3586 }
3587 }
3588
3589 # Return 1 if the target supports hardware vector shift operation.
3590
3591 proc check_effective_target_vect_shift { } {
3592 global et_vect_shift_saved
3593
3594 if [info exists et_vect_shift_saved] {
3595 verbose "check_effective_target_vect_shift: using cached result" 2
3596 } else {
3597 set et_vect_shift_saved 0
3598 if { ([istarget powerpc*-*-*]
3599 && ![istarget powerpc-*-linux*paired*])
3600 || [istarget ia64-*-*]
3601 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3602 || [istarget aarch64*-*-*]
3603 || [check_effective_target_arm32]
3604 || ([istarget mips*-*-*]
3605 && [check_effective_target_mips_loongson]) } {
3606 set et_vect_shift_saved 1
3607 }
3608 }
3609
3610 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3611 return $et_vect_shift_saved
3612 }
3613
3614 proc check_effective_target_whole_vector_shift { } {
3615 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3616 || [istarget ia64-*-*]
3617 || [istarget aarch64*-*-*]
3618 || ([check_effective_target_arm32]
3619 && [check_effective_target_arm_little_endian])
3620 || ([istarget mips*-*-*]
3621 && [check_effective_target_mips_loongson]) } {
3622 set answer 1
3623 } else {
3624 set answer 0
3625 }
3626
3627 verbose "check_effective_target_vect_long: returning $answer" 2
3628 return $answer
3629 }
3630
3631 # Return 1 if the target supports vector bswap operations.
3632
3633 proc check_effective_target_vect_bswap { } {
3634 global et_vect_bswap_saved
3635
3636 if [info exists et_vect_bswap_saved] {
3637 verbose "check_effective_target_vect_bswap: using cached result" 2
3638 } else {
3639 set et_vect_bswap_saved 0
3640 if { [istarget aarch64*-*-*]
3641 || ([istarget arm*-*-*]
3642 && [check_effective_target_arm_neon])
3643 } {
3644 set et_vect_bswap_saved 1
3645 }
3646 }
3647
3648 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3649 return $et_vect_bswap_saved
3650 }
3651
3652 # Return 1 if the target supports hardware vector shift operation for char.
3653
3654 proc check_effective_target_vect_shift_char { } {
3655 global et_vect_shift_char_saved
3656
3657 if [info exists et_vect_shift_char_saved] {
3658 verbose "check_effective_target_vect_shift_char: using cached result" 2
3659 } else {
3660 set et_vect_shift_char_saved 0
3661 if { ([istarget powerpc*-*-*]
3662 && ![istarget powerpc-*-linux*paired*])
3663 || [check_effective_target_arm32] } {
3664 set et_vect_shift_char_saved 1
3665 }
3666 }
3667
3668 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3669 return $et_vect_shift_char_saved
3670 }
3671
3672 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3673 #
3674 # This can change for different subtargets so do not cache the result.
3675
3676 proc check_effective_target_vect_long { } {
3677 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3678 || (([istarget powerpc*-*-*]
3679 && ![istarget powerpc-*-linux*paired*])
3680 && [check_effective_target_ilp32])
3681 || [check_effective_target_arm32]
3682 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3683 set answer 1
3684 } else {
3685 set answer 0
3686 }
3687
3688 verbose "check_effective_target_vect_long: returning $answer" 2
3689 return $answer
3690 }
3691
3692 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3693 #
3694 # This won't change for different subtargets so cache the result.
3695
3696 proc check_effective_target_vect_float { } {
3697 global et_vect_float_saved
3698
3699 if [info exists et_vect_float_saved] {
3700 verbose "check_effective_target_vect_float: using cached result" 2
3701 } else {
3702 set et_vect_float_saved 0
3703 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3704 || [istarget powerpc*-*-*]
3705 || [istarget spu-*-*]
3706 || [istarget mips-sde-elf]
3707 || [istarget mipsisa64*-*-*]
3708 || [istarget ia64-*-*]
3709 || [istarget aarch64*-*-*]
3710 || [check_effective_target_arm32] } {
3711 set et_vect_float_saved 1
3712 }
3713 }
3714
3715 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
3716 return $et_vect_float_saved
3717 }
3718
3719 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
3720 #
3721 # This won't change for different subtargets so cache the result.
3722
3723 proc check_effective_target_vect_double { } {
3724 global et_vect_double_saved
3725
3726 if [info exists et_vect_double_saved] {
3727 verbose "check_effective_target_vect_double: using cached result" 2
3728 } else {
3729 set et_vect_double_saved 0
3730 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3731 || [istarget aarch64*-*-*] } {
3732 if { [check_no_compiler_messages vect_double assembly {
3733 #ifdef __tune_atom__
3734 # error No double vectorizer support.
3735 #endif
3736 }] } {
3737 set et_vect_double_saved 1
3738 } else {
3739 set et_vect_double_saved 0
3740 }
3741 } elseif { [istarget spu-*-*] } {
3742 set et_vect_double_saved 1
3743 } elseif { [istarget powerpc*-*-*] && [check_vsx_hw_available] } {
3744 set et_vect_double_saved 1
3745 }
3746 }
3747
3748 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3749 return $et_vect_double_saved
3750 }
3751
3752 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3753 #
3754 # This won't change for different subtargets so cache the result.
3755
3756 proc check_effective_target_vect_long_long { } {
3757 global et_vect_long_long_saved
3758
3759 if [info exists et_vect_long_long_saved] {
3760 verbose "check_effective_target_vect_long_long: using cached result" 2
3761 } else {
3762 set et_vect_long_long_saved 0
3763 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
3764 set et_vect_long_long_saved 1
3765 }
3766 }
3767
3768 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3769 return $et_vect_long_long_saved
3770 }
3771
3772
3773 # Return 1 if the target plus current options does not support a vector
3774 # max instruction on "int", 0 otherwise.
3775 #
3776 # This won't change for different subtargets so cache the result.
3777
3778 proc check_effective_target_vect_no_int_min_max { } {
3779 global et_vect_no_int_min_max_saved
3780
3781 if [info exists et_vect_no_int_min_max_saved] {
3782 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
3783 } else {
3784 set et_vect_no_int_min_max_saved 0
3785 if { [istarget sparc*-*-*]
3786 || [istarget spu-*-*]
3787 || [istarget alpha*-*-*]
3788 || ([istarget mips*-*-*]
3789 && [check_effective_target_mips_loongson]) } {
3790 set et_vect_no_int_min_max_saved 1
3791 }
3792 }
3793 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
3794 return $et_vect_no_int_min_max_saved
3795 }
3796
3797 # Return 1 if the target plus current options does not support a vector
3798 # add instruction on "int", 0 otherwise.
3799 #
3800 # This won't change for different subtargets so cache the result.
3801
3802 proc check_effective_target_vect_no_int_add { } {
3803 global et_vect_no_int_add_saved
3804
3805 if [info exists et_vect_no_int_add_saved] {
3806 verbose "check_effective_target_vect_no_int_add: using cached result" 2
3807 } else {
3808 set et_vect_no_int_add_saved 0
3809 # Alpha only supports vector add on V8QI and V4HI.
3810 if { [istarget alpha*-*-*] } {
3811 set et_vect_no_int_add_saved 1
3812 }
3813 }
3814 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3815 return $et_vect_no_int_add_saved
3816 }
3817
3818 # Return 1 if the target plus current options does not support vector
3819 # bitwise instructions, 0 otherwise.
3820 #
3821 # This won't change for different subtargets so cache the result.
3822
3823 proc check_effective_target_vect_no_bitwise { } {
3824 global et_vect_no_bitwise_saved
3825
3826 if [info exists et_vect_no_bitwise_saved] {
3827 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
3828 } else {
3829 set et_vect_no_bitwise_saved 0
3830 }
3831 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3832 return $et_vect_no_bitwise_saved
3833 }
3834
3835 # Return 1 if the target plus current options supports vector permutation,
3836 # 0 otherwise.
3837 #
3838 # This won't change for different subtargets so cache the result.
3839
3840 proc check_effective_target_vect_perm { } {
3841 global et_vect_perm
3842
3843 if [info exists et_vect_perm_saved] {
3844 verbose "check_effective_target_vect_perm: using cached result" 2
3845 } else {
3846 set et_vect_perm_saved 0
3847 if { [is-effective-target arm_neon_ok]
3848 || [istarget aarch64*-*-*]
3849 || [istarget powerpc*-*-*]
3850 || [istarget spu-*-*]
3851 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3852 || ([istarget mips*-*-*]
3853 && [check_effective_target_mpaired_single]) } {
3854 set et_vect_perm_saved 1
3855 }
3856 }
3857 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3858 return $et_vect_perm_saved
3859 }
3860
3861 # Return 1 if the target plus current options supports vector permutation
3862 # on byte-sized elements, 0 otherwise.
3863 #
3864 # This won't change for different subtargets so cache the result.
3865
3866 proc check_effective_target_vect_perm_byte { } {
3867 global et_vect_perm_byte
3868
3869 if [info exists et_vect_perm_byte_saved] {
3870 verbose "check_effective_target_vect_perm_byte: using cached result" 2
3871 } else {
3872 set et_vect_perm_byte_saved 0
3873 if { ([is-effective-target arm_neon_ok]
3874 && [is-effective-target arm_little_endian])
3875 || ([istarget aarch64*-*-*]
3876 && [is-effective-target aarch64_little_endian])
3877 || [istarget powerpc*-*-*]
3878 || [istarget spu-*-*] } {
3879 set et_vect_perm_byte_saved 1
3880 }
3881 }
3882 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3883 return $et_vect_perm_byte_saved
3884 }
3885
3886 # Return 1 if the target plus current options supports vector permutation
3887 # on short-sized elements, 0 otherwise.
3888 #
3889 # This won't change for different subtargets so cache the result.
3890
3891 proc check_effective_target_vect_perm_short { } {
3892 global et_vect_perm_short
3893
3894 if [info exists et_vect_perm_short_saved] {
3895 verbose "check_effective_target_vect_perm_short: using cached result" 2
3896 } else {
3897 set et_vect_perm_short_saved 0
3898 if { ([is-effective-target arm_neon_ok]
3899 && [is-effective-target arm_little_endian])
3900 || ([istarget aarch64*-*-*]
3901 && [is-effective-target aarch64_little_endian])
3902 || [istarget powerpc*-*-*]
3903 || [istarget spu-*-*] } {
3904 set et_vect_perm_short_saved 1
3905 }
3906 }
3907 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3908 return $et_vect_perm_short_saved
3909 }
3910
3911 # Return 1 if the target plus current options supports a vector
3912 # widening summation of *short* args into *int* result, 0 otherwise.
3913 #
3914 # This won't change for different subtargets so cache the result.
3915
3916 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
3917 global et_vect_widen_sum_hi_to_si_pattern
3918
3919 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
3920 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3921 } else {
3922 set et_vect_widen_sum_hi_to_si_pattern_saved 0
3923 if { [istarget powerpc*-*-*]
3924 || [istarget ia64-*-*] } {
3925 set et_vect_widen_sum_hi_to_si_pattern_saved 1
3926 }
3927 }
3928 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3929 return $et_vect_widen_sum_hi_to_si_pattern_saved
3930 }
3931
3932 # Return 1 if the target plus current options supports a vector
3933 # widening summation of *short* args into *int* result, 0 otherwise.
3934 # A target can also support this widening summation if it can support
3935 # promotion (unpacking) from shorts to ints.
3936 #
3937 # This won't change for different subtargets so cache the result.
3938
3939 proc check_effective_target_vect_widen_sum_hi_to_si { } {
3940 global et_vect_widen_sum_hi_to_si
3941
3942 if [info exists et_vect_widen_sum_hi_to_si_saved] {
3943 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3944 } else {
3945 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
3946 if { [istarget powerpc*-*-*]
3947 || [istarget ia64-*-*] } {
3948 set et_vect_widen_sum_hi_to_si_saved 1
3949 }
3950 }
3951 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3952 return $et_vect_widen_sum_hi_to_si_saved
3953 }
3954
3955 # Return 1 if the target plus current options supports a vector
3956 # widening summation of *char* args into *short* result, 0 otherwise.
3957 # A target can also support this widening summation if it can support
3958 # promotion (unpacking) from chars to shorts.
3959 #
3960 # This won't change for different subtargets so cache the result.
3961
3962 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
3963 global et_vect_widen_sum_qi_to_hi
3964
3965 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
3966 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3967 } else {
3968 set et_vect_widen_sum_qi_to_hi_saved 0
3969 if { [check_effective_target_vect_unpack]
3970 || [check_effective_target_arm_neon_ok]
3971 || [istarget ia64-*-*] } {
3972 set et_vect_widen_sum_qi_to_hi_saved 1
3973 }
3974 }
3975 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3976 return $et_vect_widen_sum_qi_to_hi_saved
3977 }
3978
3979 # Return 1 if the target plus current options supports a vector
3980 # widening summation of *char* args into *int* result, 0 otherwise.
3981 #
3982 # This won't change for different subtargets so cache the result.
3983
3984 proc check_effective_target_vect_widen_sum_qi_to_si { } {
3985 global et_vect_widen_sum_qi_to_si
3986
3987 if [info exists et_vect_widen_sum_qi_to_si_saved] {
3988 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3989 } else {
3990 set et_vect_widen_sum_qi_to_si_saved 0
3991 if { [istarget powerpc*-*-*] } {
3992 set et_vect_widen_sum_qi_to_si_saved 1
3993 }
3994 }
3995 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3996 return $et_vect_widen_sum_qi_to_si_saved
3997 }
3998
3999 # Return 1 if the target plus current options supports a vector
4000 # widening multiplication of *char* args into *short* result, 0 otherwise.
4001 # A target can also support this widening multplication if it can support
4002 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
4003 # multiplication of shorts).
4004 #
4005 # This won't change for different subtargets so cache the result.
4006
4007
4008 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
4009 global et_vect_widen_mult_qi_to_hi
4010
4011 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
4012 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
4013 } else {
4014 if { [check_effective_target_vect_unpack]
4015 && [check_effective_target_vect_short_mult] } {
4016 set et_vect_widen_mult_qi_to_hi_saved 1
4017 } else {
4018 set et_vect_widen_mult_qi_to_hi_saved 0
4019 }
4020 if { [istarget powerpc*-*-*]
4021 || [istarget aarch64*-*-*]
4022 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4023 set et_vect_widen_mult_qi_to_hi_saved 1
4024 }
4025 }
4026 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
4027 return $et_vect_widen_mult_qi_to_hi_saved
4028 }
4029
4030 # Return 1 if the target plus current options supports a vector
4031 # widening multiplication of *short* args into *int* result, 0 otherwise.
4032 # A target can also support this widening multplication if it can support
4033 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4034 # multiplication of ints).
4035 #
4036 # This won't change for different subtargets so cache the result.
4037
4038
4039 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4040 global et_vect_widen_mult_hi_to_si
4041
4042 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4043 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4044 } else {
4045 if { [check_effective_target_vect_unpack]
4046 && [check_effective_target_vect_int_mult] } {
4047 set et_vect_widen_mult_hi_to_si_saved 1
4048 } else {
4049 set et_vect_widen_mult_hi_to_si_saved 0
4050 }
4051 if { [istarget powerpc*-*-*]
4052 || [istarget spu-*-*]
4053 || [istarget ia64-*-*]
4054 || [istarget aarch64*-*-*]
4055 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4056 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4057 set et_vect_widen_mult_hi_to_si_saved 1
4058 }
4059 }
4060 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4061 return $et_vect_widen_mult_hi_to_si_saved
4062 }
4063
4064 # Return 1 if the target plus current options supports a vector
4065 # widening multiplication of *char* args into *short* result, 0 otherwise.
4066 #
4067 # This won't change for different subtargets so cache the result.
4068
4069 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4070 global et_vect_widen_mult_qi_to_hi_pattern
4071
4072 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4073 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4074 } else {
4075 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4076 if { [istarget powerpc*-*-*]
4077 || ([istarget arm*-*-*]
4078 && [check_effective_target_arm_neon_ok]
4079 && [check_effective_target_arm_little_endian]) } {
4080 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4081 }
4082 }
4083 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4084 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4085 }
4086
4087 # Return 1 if the target plus current options supports a vector
4088 # widening multiplication of *short* args into *int* result, 0 otherwise.
4089 #
4090 # This won't change for different subtargets so cache the result.
4091
4092 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4093 global et_vect_widen_mult_hi_to_si_pattern
4094
4095 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4096 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4097 } else {
4098 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4099 if { [istarget powerpc*-*-*]
4100 || [istarget spu-*-*]
4101 || [istarget ia64-*-*]
4102 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4103 || ([istarget arm*-*-*]
4104 && [check_effective_target_arm_neon_ok]
4105 && [check_effective_target_arm_little_endian]) } {
4106 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4107 }
4108 }
4109 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4110 return $et_vect_widen_mult_hi_to_si_pattern_saved
4111 }
4112
4113 # Return 1 if the target plus current options supports a vector
4114 # widening multiplication of *int* args into *long* result, 0 otherwise.
4115 #
4116 # This won't change for different subtargets so cache the result.
4117
4118 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4119 global et_vect_widen_mult_si_to_di_pattern
4120
4121 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4122 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4123 } else {
4124 set et_vect_widen_mult_si_to_di_pattern_saved 0
4125 if {[istarget ia64-*-*]
4126 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4127 set et_vect_widen_mult_si_to_di_pattern_saved 1
4128 }
4129 }
4130 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4131 return $et_vect_widen_mult_si_to_di_pattern_saved
4132 }
4133
4134 # Return 1 if the target plus current options supports a vector
4135 # widening shift, 0 otherwise.
4136 #
4137 # This won't change for different subtargets so cache the result.
4138
4139 proc check_effective_target_vect_widen_shift { } {
4140 global et_vect_widen_shift_saved
4141
4142 if [info exists et_vect_shift_saved] {
4143 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4144 } else {
4145 set et_vect_widen_shift_saved 0
4146 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4147 set et_vect_widen_shift_saved 1
4148 }
4149 }
4150 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4151 return $et_vect_widen_shift_saved
4152 }
4153
4154 # Return 1 if the target plus current options supports a vector
4155 # dot-product of signed chars, 0 otherwise.
4156 #
4157 # This won't change for different subtargets so cache the result.
4158
4159 proc check_effective_target_vect_sdot_qi { } {
4160 global et_vect_sdot_qi
4161
4162 if [info exists et_vect_sdot_qi_saved] {
4163 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4164 } else {
4165 set et_vect_sdot_qi_saved 0
4166 if { [istarget ia64-*-*] } {
4167 set et_vect_udot_qi_saved 1
4168 }
4169 }
4170 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4171 return $et_vect_sdot_qi_saved
4172 }
4173
4174 # Return 1 if the target plus current options supports a vector
4175 # dot-product of unsigned chars, 0 otherwise.
4176 #
4177 # This won't change for different subtargets so cache the result.
4178
4179 proc check_effective_target_vect_udot_qi { } {
4180 global et_vect_udot_qi
4181
4182 if [info exists et_vect_udot_qi_saved] {
4183 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4184 } else {
4185 set et_vect_udot_qi_saved 0
4186 if { [istarget powerpc*-*-*]
4187 || [istarget ia64-*-*] } {
4188 set et_vect_udot_qi_saved 1
4189 }
4190 }
4191 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4192 return $et_vect_udot_qi_saved
4193 }
4194
4195 # Return 1 if the target plus current options supports a vector
4196 # dot-product of signed shorts, 0 otherwise.
4197 #
4198 # This won't change for different subtargets so cache the result.
4199
4200 proc check_effective_target_vect_sdot_hi { } {
4201 global et_vect_sdot_hi
4202
4203 if [info exists et_vect_sdot_hi_saved] {
4204 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4205 } else {
4206 set et_vect_sdot_hi_saved 0
4207 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4208 || [istarget ia64-*-*]
4209 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4210 set et_vect_sdot_hi_saved 1
4211 }
4212 }
4213 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4214 return $et_vect_sdot_hi_saved
4215 }
4216
4217 # Return 1 if the target plus current options supports a vector
4218 # dot-product of unsigned shorts, 0 otherwise.
4219 #
4220 # This won't change for different subtargets so cache the result.
4221
4222 proc check_effective_target_vect_udot_hi { } {
4223 global et_vect_udot_hi
4224
4225 if [info exists et_vect_udot_hi_saved] {
4226 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4227 } else {
4228 set et_vect_udot_hi_saved 0
4229 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4230 set et_vect_udot_hi_saved 1
4231 }
4232 }
4233 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4234 return $et_vect_udot_hi_saved
4235 }
4236
4237 # Return 1 if the target plus current options supports a vector
4238 # sad operation of unsigned chars, 0 otherwise.
4239 #
4240 # This won't change for different subtargets so cache the result.
4241
4242 proc check_effective_target_vect_usad_char { } {
4243 global et_vect_usad_char
4244
4245 if [info exists et_vect_usad_char_saved] {
4246 verbose "check_effective_target_vect_usad_char: using cached result" 2
4247 } else {
4248 set et_vect_usad_char_saved 0
4249 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4250 set et_vect_usad_char_saved 1
4251 }
4252 }
4253 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4254 return $et_vect_usad_char_saved
4255 }
4256
4257 # Return 1 if the target plus current options supports a vector
4258 # demotion (packing) of shorts (to chars) and ints (to shorts)
4259 # using modulo arithmetic, 0 otherwise.
4260 #
4261 # This won't change for different subtargets so cache the result.
4262
4263 proc check_effective_target_vect_pack_trunc { } {
4264 global et_vect_pack_trunc
4265
4266 if [info exists et_vect_pack_trunc_saved] {
4267 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4268 } else {
4269 set et_vect_pack_trunc_saved 0
4270 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4271 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4272 || [istarget aarch64*-*-*]
4273 || [istarget spu-*-*]
4274 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4275 && [check_effective_target_arm_little_endian]) } {
4276 set et_vect_pack_trunc_saved 1
4277 }
4278 }
4279 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4280 return $et_vect_pack_trunc_saved
4281 }
4282
4283 # Return 1 if the target plus current options supports a vector
4284 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4285 #
4286 # This won't change for different subtargets so cache the result.
4287
4288 proc check_effective_target_vect_unpack { } {
4289 global et_vect_unpack
4290
4291 if [info exists et_vect_unpack_saved] {
4292 verbose "check_effective_target_vect_unpack: using cached result" 2
4293 } else {
4294 set et_vect_unpack_saved 0
4295 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4296 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4297 || [istarget spu-*-*]
4298 || [istarget ia64-*-*]
4299 || [istarget aarch64*-*-*]
4300 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4301 && [check_effective_target_arm_little_endian]) } {
4302 set et_vect_unpack_saved 1
4303 }
4304 }
4305 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4306 return $et_vect_unpack_saved
4307 }
4308
4309 # Return 1 if the target plus current options does not guarantee
4310 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4311 #
4312 # This won't change for different subtargets so cache the result.
4313
4314 proc check_effective_target_unaligned_stack { } {
4315 global et_unaligned_stack_saved
4316
4317 if [info exists et_unaligned_stack_saved] {
4318 verbose "check_effective_target_unaligned_stack: using cached result" 2
4319 } else {
4320 set et_unaligned_stack_saved 0
4321 }
4322 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4323 return $et_unaligned_stack_saved
4324 }
4325
4326 # Return 1 if the target plus current options does not support a vector
4327 # alignment mechanism, 0 otherwise.
4328 #
4329 # This won't change for different subtargets so cache the result.
4330
4331 proc check_effective_target_vect_no_align { } {
4332 global et_vect_no_align_saved
4333
4334 if [info exists et_vect_no_align_saved] {
4335 verbose "check_effective_target_vect_no_align: using cached result" 2
4336 } else {
4337 set et_vect_no_align_saved 0
4338 if { [istarget mipsisa64*-*-*]
4339 || [istarget mips-sde-elf]
4340 || [istarget sparc*-*-*]
4341 || [istarget ia64-*-*]
4342 || [check_effective_target_arm_vect_no_misalign]
4343 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4344 || ([istarget mips*-*-*]
4345 && [check_effective_target_mips_loongson]) } {
4346 set et_vect_no_align_saved 1
4347 }
4348 }
4349 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4350 return $et_vect_no_align_saved
4351 }
4352
4353 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4354 #
4355 # This won't change for different subtargets so cache the result.
4356
4357 proc check_effective_target_vect_hw_misalign { } {
4358 global et_vect_hw_misalign_saved
4359
4360 if [info exists et_vect_hw_misalign_saved] {
4361 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4362 } else {
4363 set et_vect_hw_misalign_saved 0
4364 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4365 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4366 || [istarget aarch64*-*-*] } {
4367 set et_vect_hw_misalign_saved 1
4368 }
4369 }
4370 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4371 return $et_vect_hw_misalign_saved
4372 }
4373
4374
4375 # Return 1 if arrays are aligned to the vector alignment
4376 # boundary, 0 otherwise.
4377 #
4378 # This won't change for different subtargets so cache the result.
4379
4380 proc check_effective_target_vect_aligned_arrays { } {
4381 global et_vect_aligned_arrays
4382
4383 if [info exists et_vect_aligned_arrays_saved] {
4384 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4385 } else {
4386 set et_vect_aligned_arrays_saved 0
4387 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4388 if { ([is-effective-target lp64]
4389 && ( ![check_avx_available]
4390 || [check_prefer_avx128])) } {
4391 set et_vect_aligned_arrays_saved 1
4392 }
4393 }
4394 if [istarget spu-*-*] {
4395 set et_vect_aligned_arrays_saved 1
4396 }
4397 }
4398 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4399 return $et_vect_aligned_arrays_saved
4400 }
4401
4402 # Return 1 if types of size 32 bit or less are naturally aligned
4403 # (aligned to their type-size), 0 otherwise.
4404 #
4405 # This won't change for different subtargets so cache the result.
4406
4407 proc check_effective_target_natural_alignment_32 { } {
4408 global et_natural_alignment_32
4409
4410 if [info exists et_natural_alignment_32_saved] {
4411 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4412 } else {
4413 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4414 set et_natural_alignment_32_saved 1
4415 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4416 set et_natural_alignment_32_saved 0
4417 }
4418 }
4419 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4420 return $et_natural_alignment_32_saved
4421 }
4422
4423 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4424 # type-size), 0 otherwise.
4425 #
4426 # This won't change for different subtargets so cache the result.
4427
4428 proc check_effective_target_natural_alignment_64 { } {
4429 global et_natural_alignment_64
4430
4431 if [info exists et_natural_alignment_64_saved] {
4432 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4433 } else {
4434 set et_natural_alignment_64_saved 0
4435 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4436 || [istarget spu-*-*] } {
4437 set et_natural_alignment_64_saved 1
4438 }
4439 }
4440 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4441 return $et_natural_alignment_64_saved
4442 }
4443
4444 # Return 1 if all vector types are naturally aligned (aligned to their
4445 # type-size), 0 otherwise.
4446 #
4447 # This won't change for different subtargets so cache the result.
4448
4449 proc check_effective_target_vect_natural_alignment { } {
4450 global et_vect_natural_alignment
4451
4452 if [info exists et_vect_natural_alignment_saved] {
4453 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4454 } else {
4455 set et_vect_natural_alignment_saved 1
4456 if { [check_effective_target_arm_eabi]
4457 || [istarget nvptx-*-*]
4458 || [istarget s390*-*-*] } {
4459 set et_vect_natural_alignment_saved 0
4460 }
4461 }
4462 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4463 return $et_vect_natural_alignment_saved
4464 }
4465
4466 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4467 #
4468 # This won't change for different subtargets so cache the result.
4469
4470 proc check_effective_target_vector_alignment_reachable { } {
4471 global et_vector_alignment_reachable
4472
4473 if [info exists et_vector_alignment_reachable_saved] {
4474 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4475 } else {
4476 if { [check_effective_target_vect_aligned_arrays]
4477 || [check_effective_target_natural_alignment_32] } {
4478 set et_vector_alignment_reachable_saved 1
4479 } else {
4480 set et_vector_alignment_reachable_saved 0
4481 }
4482 }
4483 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4484 return $et_vector_alignment_reachable_saved
4485 }
4486
4487 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4488 #
4489 # This won't change for different subtargets so cache the result.
4490
4491 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4492 global et_vector_alignment_reachable_for_64bit
4493
4494 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4495 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4496 } else {
4497 if { [check_effective_target_vect_aligned_arrays]
4498 || [check_effective_target_natural_alignment_64] } {
4499 set et_vector_alignment_reachable_for_64bit_saved 1
4500 } else {
4501 set et_vector_alignment_reachable_for_64bit_saved 0
4502 }
4503 }
4504 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4505 return $et_vector_alignment_reachable_for_64bit_saved
4506 }
4507
4508 # Return 1 if the target only requires element alignment for vector accesses
4509
4510 proc check_effective_target_vect_element_align { } {
4511 global et_vect_element_align
4512
4513 if [info exists et_vect_element_align] {
4514 verbose "check_effective_target_vect_element_align: using cached result" 2
4515 } else {
4516 set et_vect_element_align 0
4517 if { ([istarget arm*-*-*]
4518 && ![check_effective_target_arm_vect_no_misalign])
4519 || [check_effective_target_vect_hw_misalign] } {
4520 set et_vect_element_align 1
4521 }
4522 }
4523
4524 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4525 return $et_vect_element_align
4526 }
4527
4528 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4529
4530 proc check_effective_target_vect_condition { } {
4531 global et_vect_cond_saved
4532
4533 if [info exists et_vect_cond_saved] {
4534 verbose "check_effective_target_vect_cond: using cached result" 2
4535 } else {
4536 set et_vect_cond_saved 0
4537 if { [istarget aarch64*-*-*]
4538 || [istarget powerpc*-*-*]
4539 || [istarget ia64-*-*]
4540 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4541 || [istarget spu-*-*]
4542 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4543 set et_vect_cond_saved 1
4544 }
4545 }
4546
4547 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4548 return $et_vect_cond_saved
4549 }
4550
4551 # Return 1 if the target supports vector conditional operations where
4552 # the comparison has different type from the lhs, 0 otherwise.
4553
4554 proc check_effective_target_vect_cond_mixed { } {
4555 global et_vect_cond_mixed_saved
4556
4557 if [info exists et_vect_cond_mixed_saved] {
4558 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4559 } else {
4560 set et_vect_cond_mixed_saved 0
4561 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4562 || [istarget powerpc*-*-*] } {
4563 set et_vect_cond_mixed_saved 1
4564 }
4565 }
4566
4567 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4568 return $et_vect_cond_mixed_saved
4569 }
4570
4571 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4572
4573 proc check_effective_target_vect_char_mult { } {
4574 global et_vect_char_mult_saved
4575
4576 if [info exists et_vect_char_mult_saved] {
4577 verbose "check_effective_target_vect_char_mult: using cached result" 2
4578 } else {
4579 set et_vect_char_mult_saved 0
4580 if { [istarget aarch64*-*-*]
4581 || [istarget ia64-*-*]
4582 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4583 || [check_effective_target_arm32]
4584 || [check_effective_target_powerpc_altivec] } {
4585 set et_vect_char_mult_saved 1
4586 }
4587 }
4588
4589 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4590 return $et_vect_char_mult_saved
4591 }
4592
4593 # Return 1 if the target supports vector short multiplication, 0 otherwise.
4594
4595 proc check_effective_target_vect_short_mult { } {
4596 global et_vect_short_mult_saved
4597
4598 if [info exists et_vect_short_mult_saved] {
4599 verbose "check_effective_target_vect_short_mult: using cached result" 2
4600 } else {
4601 set et_vect_short_mult_saved 0
4602 if { [istarget ia64-*-*]
4603 || [istarget spu-*-*]
4604 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4605 || [istarget powerpc*-*-*]
4606 || [istarget aarch64*-*-*]
4607 || [check_effective_target_arm32]
4608 || ([istarget mips*-*-*]
4609 && [check_effective_target_mips_loongson]) } {
4610 set et_vect_short_mult_saved 1
4611 }
4612 }
4613
4614 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4615 return $et_vect_short_mult_saved
4616 }
4617
4618 # Return 1 if the target supports vector int multiplication, 0 otherwise.
4619
4620 proc check_effective_target_vect_int_mult { } {
4621 global et_vect_int_mult_saved
4622
4623 if [info exists et_vect_int_mult_saved] {
4624 verbose "check_effective_target_vect_int_mult: using cached result" 2
4625 } else {
4626 set et_vect_int_mult_saved 0
4627 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4628 || [istarget spu-*-*]
4629 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4630 || [istarget ia64-*-*]
4631 || [istarget aarch64*-*-*]
4632 || [check_effective_target_arm32] } {
4633 set et_vect_int_mult_saved 1
4634 }
4635 }
4636
4637 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4638 return $et_vect_int_mult_saved
4639 }
4640
4641 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
4642
4643 proc check_effective_target_vect_extract_even_odd { } {
4644 global et_vect_extract_even_odd_saved
4645
4646 if [info exists et_vect_extract_even_odd_saved] {
4647 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
4648 } else {
4649 set et_vect_extract_even_odd_saved 0
4650 if { [istarget aarch64*-*-*]
4651 || [istarget powerpc*-*-*]
4652 || [is-effective-target arm_neon_ok]
4653 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4654 || [istarget ia64-*-*]
4655 || [istarget spu-*-*]
4656 || ([istarget mips*-*-*]
4657 && [check_effective_target_mpaired_single]) } {
4658 set et_vect_extract_even_odd_saved 1
4659 }
4660 }
4661
4662 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4663 return $et_vect_extract_even_odd_saved
4664 }
4665
4666 # Return 1 if the target supports vector interleaving, 0 otherwise.
4667
4668 proc check_effective_target_vect_interleave { } {
4669 global et_vect_interleave_saved
4670
4671 if [info exists et_vect_interleave_saved] {
4672 verbose "check_effective_target_vect_interleave: using cached result" 2
4673 } else {
4674 set et_vect_interleave_saved 0
4675 if { [istarget aarch64*-*-*]
4676 || [istarget powerpc*-*-*]
4677 || [is-effective-target arm_neon_ok]
4678 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4679 || [istarget ia64-*-*]
4680 || [istarget spu-*-*]
4681 || ([istarget mips*-*-*]
4682 && [check_effective_target_mpaired_single]) } {
4683 set et_vect_interleave_saved 1
4684 }
4685 }
4686
4687 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4688 return $et_vect_interleave_saved
4689 }
4690
4691 foreach N {2 3 4 8} {
4692 eval [string map [list N $N] {
4693 # Return 1 if the target supports 2-vector interleaving
4694 proc check_effective_target_vect_stridedN { } {
4695 global et_vect_stridedN_saved
4696
4697 if [info exists et_vect_stridedN_saved] {
4698 verbose "check_effective_target_vect_stridedN: using cached result" 2
4699 } else {
4700 set et_vect_stridedN_saved 0
4701 if { (N & -N) == N
4702 && [check_effective_target_vect_interleave]
4703 && [check_effective_target_vect_extract_even_odd] } {
4704 set et_vect_stridedN_saved 1
4705 }
4706 if { ([istarget arm*-*-*]
4707 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
4708 set et_vect_stridedN_saved 1
4709 }
4710 }
4711
4712 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4713 return $et_vect_stridedN_saved
4714 }
4715 }]
4716 }
4717
4718 # Return 1 if the target supports multiple vector sizes
4719
4720 proc check_effective_target_vect_multiple_sizes { } {
4721 global et_vect_multiple_sizes_saved
4722
4723 set et_vect_multiple_sizes_saved 0
4724 if { ([istarget aarch64*-*-*]
4725 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
4726 set et_vect_multiple_sizes_saved 1
4727 }
4728 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4729 if { ([check_avx_available] && ![check_prefer_avx128]) } {
4730 set et_vect_multiple_sizes_saved 1
4731 }
4732 }
4733
4734 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4735 return $et_vect_multiple_sizes_saved
4736 }
4737
4738 # Return 1 if the target supports vectors of 64 bits.
4739
4740 proc check_effective_target_vect64 { } {
4741 global et_vect64_saved
4742
4743 if [info exists et_vect64_saved] {
4744 verbose "check_effective_target_vect64: using cached result" 2
4745 } else {
4746 set et_vect64_saved 0
4747 if { ([istarget arm*-*-*]
4748 && [check_effective_target_arm_neon_ok]
4749 && [check_effective_target_arm_little_endian])
4750 || [istarget sparc*-*-*] } {
4751 set et_vect64_saved 1
4752 }
4753 }
4754
4755 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
4756 return $et_vect64_saved
4757 }
4758
4759 # Return 1 if the target supports vector copysignf calls.
4760
4761 proc check_effective_target_vect_call_copysignf { } {
4762 global et_vect_call_copysignf_saved
4763
4764 if [info exists et_vect_call_copysignf_saved] {
4765 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
4766 } else {
4767 set et_vect_call_copysignf_saved 0
4768 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4769 || [istarget powerpc*-*-*] } {
4770 set et_vect_call_copysignf_saved 1
4771 }
4772 }
4773
4774 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4775 return $et_vect_call_copysignf_saved
4776 }
4777
4778 # Return 1 if the target supports hardware square root instructions.
4779
4780 proc check_effective_target_sqrt_insn { } {
4781 global et_sqrt_insn_saved
4782
4783 if [info exists et_sqrt_insn_saved] {
4784 verbose "check_effective_target_hw_sqrt: using cached result" 2
4785 } else {
4786 set et_sqrt_insn_saved 0
4787 if { [istarget x86_64-*-*]
4788 || [istarget powerpc*-*-*]
4789 || [istarget aarch64*-*-*]
4790 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
4791 set et_sqrt_insn_saved 1
4792 }
4793 }
4794
4795 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
4796 return $et_sqrt_insn_saved
4797 }
4798
4799 # Return 1 if the target supports vector sqrtf calls.
4800
4801 proc check_effective_target_vect_call_sqrtf { } {
4802 global et_vect_call_sqrtf_saved
4803
4804 if [info exists et_vect_call_sqrtf_saved] {
4805 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
4806 } else {
4807 set et_vect_call_sqrtf_saved 0
4808 if { [istarget aarch64*-*-*]
4809 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4810 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
4811 set et_vect_call_sqrtf_saved 1
4812 }
4813 }
4814
4815 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4816 return $et_vect_call_sqrtf_saved
4817 }
4818
4819 # Return 1 if the target supports vector lrint calls.
4820
4821 proc check_effective_target_vect_call_lrint { } {
4822 set et_vect_call_lrint 0
4823 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
4824 && [check_effective_target_ilp32] } {
4825 set et_vect_call_lrint 1
4826 }
4827
4828 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4829 return $et_vect_call_lrint
4830 }
4831
4832 # Return 1 if the target supports vector btrunc calls.
4833
4834 proc check_effective_target_vect_call_btrunc { } {
4835 global et_vect_call_btrunc_saved
4836
4837 if [info exists et_vect_call_btrunc_saved] {
4838 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
4839 } else {
4840 set et_vect_call_btrunc_saved 0
4841 if { [istarget aarch64*-*-*] } {
4842 set et_vect_call_btrunc_saved 1
4843 }
4844 }
4845
4846 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4847 return $et_vect_call_btrunc_saved
4848 }
4849
4850 # Return 1 if the target supports vector btruncf calls.
4851
4852 proc check_effective_target_vect_call_btruncf { } {
4853 global et_vect_call_btruncf_saved
4854
4855 if [info exists et_vect_call_btruncf_saved] {
4856 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
4857 } else {
4858 set et_vect_call_btruncf_saved 0
4859 if { [istarget aarch64*-*-*] } {
4860 set et_vect_call_btruncf_saved 1
4861 }
4862 }
4863
4864 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4865 return $et_vect_call_btruncf_saved
4866 }
4867
4868 # Return 1 if the target supports vector ceil calls.
4869
4870 proc check_effective_target_vect_call_ceil { } {
4871 global et_vect_call_ceil_saved
4872
4873 if [info exists et_vect_call_ceil_saved] {
4874 verbose "check_effective_target_vect_call_ceil: using cached result" 2
4875 } else {
4876 set et_vect_call_ceil_saved 0
4877 if { [istarget aarch64*-*-*] } {
4878 set et_vect_call_ceil_saved 1
4879 }
4880 }
4881
4882 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4883 return $et_vect_call_ceil_saved
4884 }
4885
4886 # Return 1 if the target supports vector ceilf calls.
4887
4888 proc check_effective_target_vect_call_ceilf { } {
4889 global et_vect_call_ceilf_saved
4890
4891 if [info exists et_vect_call_ceilf_saved] {
4892 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
4893 } else {
4894 set et_vect_call_ceilf_saved 0
4895 if { [istarget aarch64*-*-*] } {
4896 set et_vect_call_ceilf_saved 1
4897 }
4898 }
4899
4900 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4901 return $et_vect_call_ceilf_saved
4902 }
4903
4904 # Return 1 if the target supports vector floor calls.
4905
4906 proc check_effective_target_vect_call_floor { } {
4907 global et_vect_call_floor_saved
4908
4909 if [info exists et_vect_call_floor_saved] {
4910 verbose "check_effective_target_vect_call_floor: using cached result" 2
4911 } else {
4912 set et_vect_call_floor_saved 0
4913 if { [istarget aarch64*-*-*] } {
4914 set et_vect_call_floor_saved 1
4915 }
4916 }
4917
4918 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4919 return $et_vect_call_floor_saved
4920 }
4921
4922 # Return 1 if the target supports vector floorf calls.
4923
4924 proc check_effective_target_vect_call_floorf { } {
4925 global et_vect_call_floorf_saved
4926
4927 if [info exists et_vect_call_floorf_saved] {
4928 verbose "check_effective_target_vect_call_floorf: using cached result" 2
4929 } else {
4930 set et_vect_call_floorf_saved 0
4931 if { [istarget aarch64*-*-*] } {
4932 set et_vect_call_floorf_saved 1
4933 }
4934 }
4935
4936 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4937 return $et_vect_call_floorf_saved
4938 }
4939
4940 # Return 1 if the target supports vector lceil calls.
4941
4942 proc check_effective_target_vect_call_lceil { } {
4943 global et_vect_call_lceil_saved
4944
4945 if [info exists et_vect_call_lceil_saved] {
4946 verbose "check_effective_target_vect_call_lceil: using cached result" 2
4947 } else {
4948 set et_vect_call_lceil_saved 0
4949 if { [istarget aarch64*-*-*] } {
4950 set et_vect_call_lceil_saved 1
4951 }
4952 }
4953
4954 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4955 return $et_vect_call_lceil_saved
4956 }
4957
4958 # Return 1 if the target supports vector lfloor calls.
4959
4960 proc check_effective_target_vect_call_lfloor { } {
4961 global et_vect_call_lfloor_saved
4962
4963 if [info exists et_vect_call_lfloor_saved] {
4964 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
4965 } else {
4966 set et_vect_call_lfloor_saved 0
4967 if { [istarget aarch64*-*-*] } {
4968 set et_vect_call_lfloor_saved 1
4969 }
4970 }
4971
4972 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4973 return $et_vect_call_lfloor_saved
4974 }
4975
4976 # Return 1 if the target supports vector nearbyint calls.
4977
4978 proc check_effective_target_vect_call_nearbyint { } {
4979 global et_vect_call_nearbyint_saved
4980
4981 if [info exists et_vect_call_nearbyint_saved] {
4982 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
4983 } else {
4984 set et_vect_call_nearbyint_saved 0
4985 if { [istarget aarch64*-*-*] } {
4986 set et_vect_call_nearbyint_saved 1
4987 }
4988 }
4989
4990 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4991 return $et_vect_call_nearbyint_saved
4992 }
4993
4994 # Return 1 if the target supports vector nearbyintf calls.
4995
4996 proc check_effective_target_vect_call_nearbyintf { } {
4997 global et_vect_call_nearbyintf_saved
4998
4999 if [info exists et_vect_call_nearbyintf_saved] {
5000 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
5001 } else {
5002 set et_vect_call_nearbyintf_saved 0
5003 if { [istarget aarch64*-*-*] } {
5004 set et_vect_call_nearbyintf_saved 1
5005 }
5006 }
5007
5008 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
5009 return $et_vect_call_nearbyintf_saved
5010 }
5011
5012 # Return 1 if the target supports vector round calls.
5013
5014 proc check_effective_target_vect_call_round { } {
5015 global et_vect_call_round_saved
5016
5017 if [info exists et_vect_call_round_saved] {
5018 verbose "check_effective_target_vect_call_round: using cached result" 2
5019 } else {
5020 set et_vect_call_round_saved 0
5021 if { [istarget aarch64*-*-*] } {
5022 set et_vect_call_round_saved 1
5023 }
5024 }
5025
5026 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
5027 return $et_vect_call_round_saved
5028 }
5029
5030 # Return 1 if the target supports vector roundf calls.
5031
5032 proc check_effective_target_vect_call_roundf { } {
5033 global et_vect_call_roundf_saved
5034
5035 if [info exists et_vect_call_roundf_saved] {
5036 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5037 } else {
5038 set et_vect_call_roundf_saved 0
5039 if { [istarget aarch64*-*-*] } {
5040 set et_vect_call_roundf_saved 1
5041 }
5042 }
5043
5044 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5045 return $et_vect_call_roundf_saved
5046 }
5047
5048 # Return 1 if the target supports section-anchors
5049
5050 proc check_effective_target_section_anchors { } {
5051 global et_section_anchors_saved
5052
5053 if [info exists et_section_anchors_saved] {
5054 verbose "check_effective_target_section_anchors: using cached result" 2
5055 } else {
5056 set et_section_anchors_saved 0
5057 if { [istarget powerpc*-*-*]
5058 || [istarget arm*-*-*] } {
5059 set et_section_anchors_saved 1
5060 }
5061 }
5062
5063 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5064 return $et_section_anchors_saved
5065 }
5066
5067 # Return 1 if the target supports atomic operations on "int_128" values.
5068
5069 proc check_effective_target_sync_int_128 { } {
5070 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5071 && ![is-effective-target ia32] } {
5072 return 1
5073 } else {
5074 return 0
5075 }
5076 }
5077
5078 # Return 1 if the target supports atomic operations on "int_128" values
5079 # and can execute them.
5080
5081 proc check_effective_target_sync_int_128_runtime { } {
5082 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5083 && ![is-effective-target ia32] } {
5084 return [check_cached_effective_target sync_int_128_available {
5085 check_runtime_nocache sync_int_128_available {
5086 #include "cpuid.h"
5087 int main ()
5088 {
5089 unsigned int eax, ebx, ecx, edx;
5090 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5091 return !(ecx & bit_CMPXCHG16B);
5092 return 1;
5093 }
5094 } ""
5095 }]
5096 } else {
5097 return 0
5098 }
5099 }
5100
5101 # Return 1 if the target supports atomic operations on "long long".
5102 #
5103 # Note: 32bit x86 targets require -march=pentium in dg-options.
5104
5105 proc check_effective_target_sync_long_long { } {
5106 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5107 || [istarget aarch64*-*-*]
5108 || [istarget arm*-*-*]
5109 || [istarget alpha*-*-*]
5110 || ([istarget sparc*-*-*] && [check_effective_target_lp64]) } {
5111 return 1
5112 } else {
5113 return 0
5114 }
5115 }
5116
5117 # Return 1 if the target supports atomic operations on "long long"
5118 # and can execute them.
5119 #
5120 # Note: 32bit x86 targets require -march=pentium in dg-options.
5121
5122 proc check_effective_target_sync_long_long_runtime { } {
5123 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5124 return [check_cached_effective_target sync_long_long_available {
5125 check_runtime_nocache sync_long_long_available {
5126 #include "cpuid.h"
5127 int main ()
5128 {
5129 unsigned int eax, ebx, ecx, edx;
5130 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5131 return !(edx & bit_CMPXCHG8B);
5132 return 1;
5133 }
5134 } ""
5135 }]
5136 } elseif { [istarget aarch64*-*-*] } {
5137 return 1
5138 } elseif { [istarget arm*-*-linux-*] } {
5139 return [check_runtime sync_longlong_runtime {
5140 #include <stdlib.h>
5141 int main ()
5142 {
5143 long long l1;
5144
5145 if (sizeof (long long) != 8)
5146 exit (1);
5147
5148 /* Just check for native; checking for kernel fallback is tricky. */
5149 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5150
5151 exit (0);
5152 }
5153 } "" ]
5154 } elseif { [istarget alpha*-*-*] } {
5155 return 1
5156 } elseif { ([istarget sparc*-*-*]
5157 && [check_effective_target_lp64]
5158 && [check_effective_target_ultrasparc_hw]) } {
5159 return 1
5160 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5161 return 1
5162 } else {
5163 return 0
5164 }
5165 }
5166
5167 # Return 1 if the target supports byte swap instructions.
5168
5169 proc check_effective_target_bswap { } {
5170 global et_bswap_saved
5171
5172 if [info exists et_bswap_saved] {
5173 verbose "check_effective_target_bswap: using cached result" 2
5174 } else {
5175 set et_bswap_saved 0
5176 if { [istarget aarch64*-*-*]
5177 || [istarget alpha*-*-*]
5178 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5179 || [istarget m68k-*-*]
5180 || [istarget powerpc*-*-*]
5181 || [istarget rs6000-*-*]
5182 || [istarget s390*-*-*] } {
5183 set et_bswap_saved 1
5184 } else {
5185 if { [istarget arm*-*-*]
5186 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5187 #if __ARM_ARCH < 6
5188 #error not armv6 or later
5189 #endif
5190 int i;
5191 } ""] } {
5192 set et_bswap_saved 1
5193 }
5194 }
5195 }
5196
5197 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5198 return $et_bswap_saved
5199 }
5200
5201 # Return 1 if the target supports 16-bit byte swap instructions.
5202
5203 proc check_effective_target_bswap16 { } {
5204 global et_bswap16_saved
5205
5206 if [info exists et_bswap16_saved] {
5207 verbose "check_effective_target_bswap16: using cached result" 2
5208 } else {
5209 set et_bswap16_saved 0
5210 if { [is-effective-target bswap]
5211 && ![istarget alpha*-*-*]
5212 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5213 set et_bswap16_saved 1
5214 }
5215 }
5216
5217 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5218 return $et_bswap16_saved
5219 }
5220
5221 # Return 1 if the target supports 32-bit byte swap instructions.
5222
5223 proc check_effective_target_bswap32 { } {
5224 global et_bswap32_saved
5225
5226 if [info exists et_bswap32_saved] {
5227 verbose "check_effective_target_bswap32: using cached result" 2
5228 } else {
5229 set et_bswap32_saved 0
5230 if { [is-effective-target bswap] } {
5231 set et_bswap32_saved 1
5232 }
5233 }
5234
5235 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5236 return $et_bswap32_saved
5237 }
5238
5239 # Return 1 if the target supports 64-bit byte swap instructions.
5240
5241 proc check_effective_target_bswap64 { } {
5242 global et_bswap64_saved
5243
5244 # expand_unop can expand 64-bit byte swap on 32-bit targets
5245 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5246 return 1
5247 }
5248 return 0
5249 }
5250
5251 # Return 1 if the target supports atomic operations on "int" and "long".
5252
5253 proc check_effective_target_sync_int_long { } {
5254 global et_sync_int_long_saved
5255
5256 if [info exists et_sync_int_long_saved] {
5257 verbose "check_effective_target_sync_int_long: using cached result" 2
5258 } else {
5259 set et_sync_int_long_saved 0
5260 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5261 # load-reserved/store-conditional instructions.
5262 if { [istarget ia64-*-*]
5263 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5264 || [istarget aarch64*-*-*]
5265 || [istarget alpha*-*-*]
5266 || [istarget arm*-*-linux-*]
5267 || [istarget bfin*-*linux*]
5268 || [istarget hppa*-*linux*]
5269 || [istarget s390*-*-*]
5270 || [istarget powerpc*-*-*]
5271 || [istarget crisv32-*-*] || [istarget cris-*-*]
5272 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5273 || [check_effective_target_mips_llsc] } {
5274 set et_sync_int_long_saved 1
5275 }
5276 }
5277
5278 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5279 return $et_sync_int_long_saved
5280 }
5281
5282 # Return 1 if the target supports atomic operations on "char" and "short".
5283
5284 proc check_effective_target_sync_char_short { } {
5285 global et_sync_char_short_saved
5286
5287 if [info exists et_sync_char_short_saved] {
5288 verbose "check_effective_target_sync_char_short: using cached result" 2
5289 } else {
5290 set et_sync_char_short_saved 0
5291 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5292 # load-reserved/store-conditional instructions.
5293 if { [istarget aarch64*-*-*]
5294 || [istarget ia64-*-*]
5295 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5296 || [istarget alpha*-*-*]
5297 || [istarget arm*-*-linux-*]
5298 || [istarget hppa*-*linux*]
5299 || [istarget s390*-*-*]
5300 || [istarget powerpc*-*-*]
5301 || [istarget crisv32-*-*] || [istarget cris-*-*]
5302 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5303 || [check_effective_target_mips_llsc] } {
5304 set et_sync_char_short_saved 1
5305 }
5306 }
5307
5308 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5309 return $et_sync_char_short_saved
5310 }
5311
5312 # Return 1 if the target uses a ColdFire FPU.
5313
5314 proc check_effective_target_coldfire_fpu { } {
5315 return [check_no_compiler_messages coldfire_fpu assembly {
5316 #ifndef __mcffpu__
5317 #error !__mcffpu__
5318 #endif
5319 }]
5320 }
5321
5322 # Return true if this is a uClibc target.
5323
5324 proc check_effective_target_uclibc {} {
5325 return [check_no_compiler_messages uclibc object {
5326 #include <features.h>
5327 #if !defined (__UCLIBC__)
5328 #error !__UCLIBC__
5329 #endif
5330 }]
5331 }
5332
5333 # Return true if this is a uclibc target and if the uclibc feature
5334 # described by __$feature__ is not present.
5335
5336 proc check_missing_uclibc_feature {feature} {
5337 return [check_no_compiler_messages $feature object "
5338 #include <features.h>
5339 #if !defined (__UCLIBC) || defined (__${feature}__)
5340 #error FOO
5341 #endif
5342 "]
5343 }
5344
5345 # Return true if this is a Newlib target.
5346
5347 proc check_effective_target_newlib {} {
5348 return [check_no_compiler_messages newlib object {
5349 #include <newlib.h>
5350 }]
5351 }
5352
5353 # Return true if this is NOT a Bionic target.
5354
5355 proc check_effective_target_non_bionic {} {
5356 return [check_no_compiler_messages non_bionic object {
5357 #include <ctype.h>
5358 #if defined (__BIONIC__)
5359 #error FOO
5360 #endif
5361 }]
5362 }
5363
5364 # Return true if this target has error.h header.
5365
5366 proc check_effective_target_error_h {} {
5367 return [check_no_compiler_messages error_h object {
5368 #include <error.h>
5369 }]
5370 }
5371
5372 # Return true if this target has tgmath.h header.
5373
5374 proc check_effective_target_tgmath_h {} {
5375 return [check_no_compiler_messages tgmath_h object {
5376 #include <tgmath.h>
5377 }]
5378 }
5379
5380 # Return true if target's libc supports complex functions.
5381
5382 proc check_effective_target_libc_has_complex_functions {} {
5383 return [check_no_compiler_messages libc_has_complex_functions object {
5384 #include <complex.h>
5385 }]
5386 }
5387
5388 # Return 1 if
5389 # (a) an error of a few ULP is expected in string to floating-point
5390 # conversion functions; and
5391 # (b) overflow is not always detected correctly by those functions.
5392
5393 proc check_effective_target_lax_strtofp {} {
5394 # By default, assume that all uClibc targets suffer from this.
5395 return [check_effective_target_uclibc]
5396 }
5397
5398 # Return 1 if this is a target for which wcsftime is a dummy
5399 # function that always returns 0.
5400
5401 proc check_effective_target_dummy_wcsftime {} {
5402 # By default, assume that all uClibc targets suffer from this.
5403 return [check_effective_target_uclibc]
5404 }
5405
5406 # Return 1 if constructors with initialization priority arguments are
5407 # supposed on this target.
5408
5409 proc check_effective_target_init_priority {} {
5410 return [check_no_compiler_messages init_priority assembly "
5411 void f() __attribute__((constructor (1000)));
5412 void f() \{\}
5413 "]
5414 }
5415
5416 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5417 # This can be used with any check_* proc that takes no argument and
5418 # returns only 1 or 0. It could be used with check_* procs that take
5419 # arguments with keywords that pass particular arguments.
5420
5421 proc is-effective-target { arg } {
5422 set selected 0
5423 if { [info procs check_effective_target_${arg}] != [list] } {
5424 set selected [check_effective_target_${arg}]
5425 } else {
5426 switch $arg {
5427 "vmx_hw" { set selected [check_vmx_hw_available] }
5428 "vsx_hw" { set selected [check_vsx_hw_available] }
5429 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5430 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5431 "dfp_hw" { set selected [check_dfp_hw_available] }
5432 "htm_hw" { set selected [check_htm_hw_available] }
5433 "named_sections" { set selected [check_named_sections_available] }
5434 "gc_sections" { set selected [check_gc_sections_available] }
5435 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5436 default { error "unknown effective target keyword `$arg'" }
5437 }
5438 }
5439 verbose "is-effective-target: $arg $selected" 2
5440 return $selected
5441 }
5442
5443 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
5444
5445 proc is-effective-target-keyword { arg } {
5446 if { [info procs check_effective_target_${arg}] != [list] } {
5447 return 1
5448 } else {
5449 # These have different names for their check_* procs.
5450 switch $arg {
5451 "vmx_hw" { return 1 }
5452 "vsx_hw" { return 1 }
5453 "p8vector_hw" { return 1 }
5454 "ppc_recip_hw" { return 1 }
5455 "dfp_hw" { return 1 }
5456 "htm_hw" { return 1 }
5457 "named_sections" { return 1 }
5458 "gc_sections" { return 1 }
5459 "cxa_atexit" { return 1 }
5460 default { return 0 }
5461 }
5462 }
5463 }
5464
5465 # Return 1 if target default to short enums
5466
5467 proc check_effective_target_short_enums { } {
5468 return [check_no_compiler_messages short_enums assembly {
5469 enum foo { bar };
5470 int s[sizeof (enum foo) == 1 ? 1 : -1];
5471 }]
5472 }
5473
5474 # Return 1 if target supports merging string constants at link time.
5475
5476 proc check_effective_target_string_merging { } {
5477 return [check_no_messages_and_pattern string_merging \
5478 "rodata\\.str" assembly {
5479 const char *var = "String";
5480 } {-O2}]
5481 }
5482
5483 # Return 1 if target has the basic signed and unsigned types in
5484 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
5485 # working <stdint.h> for all targets.
5486
5487 proc check_effective_target_stdint_types { } {
5488 return [check_no_compiler_messages stdint_types assembly {
5489 #include <stdint.h>
5490 int8_t a; int16_t b; int32_t c; int64_t d;
5491 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5492 }]
5493 }
5494
5495 # Return 1 if target has the basic signed and unsigned types in
5496 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5497 # these types agree with those in the header, as some systems have
5498 # only <inttypes.h>.
5499
5500 proc check_effective_target_inttypes_types { } {
5501 return [check_no_compiler_messages inttypes_types assembly {
5502 #include <inttypes.h>
5503 int8_t a; int16_t b; int32_t c; int64_t d;
5504 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5505 }]
5506 }
5507
5508 # Return 1 if programs are intended to be run on a simulator
5509 # (i.e. slowly) rather than hardware (i.e. fast).
5510
5511 proc check_effective_target_simulator { } {
5512
5513 # All "src/sim" simulators set this one.
5514 if [board_info target exists is_simulator] {
5515 return [board_info target is_simulator]
5516 }
5517
5518 # The "sid" simulators don't set that one, but at least they set
5519 # this one.
5520 if [board_info target exists slow_simulator] {
5521 return [board_info target slow_simulator]
5522 }
5523
5524 return 0
5525 }
5526
5527 # Return 1 if programs are intended to be run on hardware rather than
5528 # on a simulator
5529
5530 proc check_effective_target_hw { } {
5531
5532 # All "src/sim" simulators set this one.
5533 if [board_info target exists is_simulator] {
5534 if [board_info target is_simulator] {
5535 return 0
5536 } else {
5537 return 1
5538 }
5539 }
5540
5541 # The "sid" simulators don't set that one, but at least they set
5542 # this one.
5543 if [board_info target exists slow_simulator] {
5544 if [board_info target slow_simulator] {
5545 return 0
5546 } else {
5547 return 1
5548 }
5549 }
5550
5551 return 1
5552 }
5553
5554 # Return 1 if the target is a VxWorks kernel.
5555
5556 proc check_effective_target_vxworks_kernel { } {
5557 return [check_no_compiler_messages vxworks_kernel assembly {
5558 #if !defined __vxworks || defined __RTP__
5559 #error NO
5560 #endif
5561 }]
5562 }
5563
5564 # Return 1 if the target is a VxWorks RTP.
5565
5566 proc check_effective_target_vxworks_rtp { } {
5567 return [check_no_compiler_messages vxworks_rtp assembly {
5568 #if !defined __vxworks || !defined __RTP__
5569 #error NO
5570 #endif
5571 }]
5572 }
5573
5574 # Return 1 if the target is expected to provide wide character support.
5575
5576 proc check_effective_target_wchar { } {
5577 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
5578 return 0
5579 }
5580 return [check_no_compiler_messages wchar assembly {
5581 #include <wchar.h>
5582 }]
5583 }
5584
5585 # Return 1 if the target has <pthread.h>.
5586
5587 proc check_effective_target_pthread_h { } {
5588 return [check_no_compiler_messages pthread_h assembly {
5589 #include <pthread.h>
5590 }]
5591 }
5592
5593 # Return 1 if the target can truncate a file from a file-descriptor,
5594 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
5595 # chsize. We test for a trivially functional truncation; no stubs.
5596 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
5597 # different function to be used.
5598
5599 proc check_effective_target_fd_truncate { } {
5600 set prog {
5601 #define _FILE_OFFSET_BITS 64
5602 #include <unistd.h>
5603 #include <stdio.h>
5604 #include <stdlib.h>
5605 #include <string.h>
5606 int main ()
5607 {
5608 FILE *f = fopen ("tst.tmp", "wb");
5609 int fd;
5610 const char t[] = "test writing more than ten characters";
5611 char s[11];
5612 int status = 0;
5613 fd = fileno (f);
5614 write (fd, t, sizeof (t) - 1);
5615 lseek (fd, 0, 0);
5616 if (ftruncate (fd, 10) != 0)
5617 status = 1;
5618 close (fd);
5619 fclose (f);
5620 if (status)
5621 {
5622 unlink ("tst.tmp");
5623 exit (status);
5624 }
5625 f = fopen ("tst.tmp", "rb");
5626 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5627 status = 1;
5628 fclose (f);
5629 unlink ("tst.tmp");
5630 exit (status);
5631 }
5632 }
5633
5634 if { [check_runtime ftruncate $prog] } {
5635 return 1;
5636 }
5637
5638 regsub "ftruncate" $prog "chsize" prog
5639 return [check_runtime chsize $prog]
5640 }
5641
5642 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5643
5644 proc add_options_for_c99_runtime { flags } {
5645 if { [istarget *-*-solaris2*] } {
5646 return "$flags -std=c99"
5647 }
5648 if { [istarget powerpc-*-darwin*] } {
5649 return "$flags -mmacosx-version-min=10.3"
5650 }
5651 return $flags
5652 }
5653
5654 # Add to FLAGS all the target-specific flags needed to enable
5655 # full IEEE compliance mode.
5656
5657 proc add_options_for_ieee { flags } {
5658 if { [istarget alpha*-*-*]
5659 || [istarget sh*-*-*] } {
5660 return "$flags -mieee"
5661 }
5662 if { [istarget rx-*-*] } {
5663 return "$flags -mnofpu"
5664 }
5665 return $flags
5666 }
5667
5668 if {![info exists flags_to_postpone]} {
5669 set flags_to_postpone ""
5670 }
5671
5672 # Add to FLAGS the flags needed to enable functions to bind locally
5673 # when using pic/PIC passes in the testsuite.
5674 proc add_options_for_bind_pic_locally { flags } {
5675 global flags_to_postpone
5676
5677 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
5678 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
5679 # order to make sure that the multilib_flags doesn't override this.
5680
5681 if {[check_no_compiler_messages using_pic2 assembly {
5682 #if __PIC__ != 2
5683 #error __PIC__ != 2
5684 #endif
5685 }]} {
5686 set flags_to_postpone "-fPIE"
5687 return $flags
5688 }
5689 if {[check_no_compiler_messages using_pic1 assembly {
5690 #if __PIC__ != 1
5691 #error __PIC__ != 1
5692 #endif
5693 }]} {
5694 set flags_to_postpone "-fpie"
5695 return $flags
5696 }
5697 return $flags
5698 }
5699
5700 # Add to FLAGS the flags needed to enable 64-bit vectors.
5701
5702 proc add_options_for_double_vectors { flags } {
5703 if [is-effective-target arm_neon_ok] {
5704 return "$flags -mvectorize-with-neon-double"
5705 }
5706
5707 return $flags
5708 }
5709
5710 # Return 1 if the target provides a full C99 runtime.
5711
5712 proc check_effective_target_c99_runtime { } {
5713 return [check_cached_effective_target c99_runtime {
5714 global srcdir
5715
5716 set file [open "$srcdir/gcc.dg/builtins-config.h"]
5717 set contents [read $file]
5718 close $file
5719 append contents {
5720 #ifndef HAVE_C99_RUNTIME
5721 #error !HAVE_C99_RUNTIME
5722 #endif
5723 }
5724 check_no_compiler_messages_nocache c99_runtime assembly \
5725 $contents [add_options_for_c99_runtime ""]
5726 }]
5727 }
5728
5729 # Return 1 if target wchar_t is at least 4 bytes.
5730
5731 proc check_effective_target_4byte_wchar_t { } {
5732 return [check_no_compiler_messages 4byte_wchar_t object {
5733 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
5734 }]
5735 }
5736
5737 # Return 1 if the target supports automatic stack alignment.
5738
5739 proc check_effective_target_automatic_stack_alignment { } {
5740 # Ordinarily x86 supports automatic stack alignment ...
5741 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
5742 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
5743 # ... except Win64 SEH doesn't. Succeed for Win32 though.
5744 return [check_effective_target_ilp32];
5745 }
5746 return 1;
5747 }
5748 return 0;
5749 }
5750
5751 # Return true if we are compiling for AVX target.
5752
5753 proc check_avx_available { } {
5754 if { [check_no_compiler_messages avx_available assembly {
5755 #ifndef __AVX__
5756 #error unsupported
5757 #endif
5758 } ""] } {
5759 return 1;
5760 }
5761 return 0;
5762 }
5763
5764 # Return true if 32- and 16-bytes vectors are available.
5765
5766 proc check_effective_target_vect_sizes_32B_16B { } {
5767 if { [check_avx_available] && ![check_prefer_avx128] } {
5768 return 1;
5769 } else {
5770 return 0;
5771 }
5772 }
5773
5774 # Return true if 128-bits vectors are preferred even if 256-bits vectors
5775 # are available.
5776
5777 proc check_prefer_avx128 { } {
5778 if ![check_avx_available] {
5779 return 0;
5780 }
5781 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
5782 float a[1024],b[1024],c[1024];
5783 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
5784 } "-O2 -ftree-vectorize"]
5785 }
5786
5787
5788 # Return 1 if avx512f instructions can be compiled.
5789
5790 proc check_effective_target_avx512f { } {
5791 return [check_no_compiler_messages avx512f object {
5792 typedef double __m512d __attribute__ ((__vector_size__ (64)));
5793
5794 __m512d _mm512_add (__m512d a)
5795 {
5796 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
5797 }
5798 } "-O2 -mavx512f" ]
5799 }
5800
5801 # Return 1 if avx instructions can be compiled.
5802
5803 proc check_effective_target_avx { } {
5804 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5805 return 0
5806 }
5807 return [check_no_compiler_messages avx object {
5808 void _mm256_zeroall (void)
5809 {
5810 __builtin_ia32_vzeroall ();
5811 }
5812 } "-O2 -mavx" ]
5813 }
5814
5815 # Return 1 if avx2 instructions can be compiled.
5816 proc check_effective_target_avx2 { } {
5817 return [check_no_compiler_messages avx2 object {
5818 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
5819 __v4di
5820 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
5821 {
5822 return __builtin_ia32_andnotsi256 (__X, __Y);
5823 }
5824 } "-O0 -mavx2" ]
5825 }
5826
5827 # Return 1 if sse instructions can be compiled.
5828 proc check_effective_target_sse { } {
5829 return [check_no_compiler_messages sse object {
5830 int main ()
5831 {
5832 __builtin_ia32_stmxcsr ();
5833 return 0;
5834 }
5835 } "-O2 -msse" ]
5836 }
5837
5838 # Return 1 if sse2 instructions can be compiled.
5839 proc check_effective_target_sse2 { } {
5840 return [check_no_compiler_messages sse2 object {
5841 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
5842
5843 __m128i _mm_srli_si128 (__m128i __A, int __N)
5844 {
5845 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
5846 }
5847 } "-O2 -msse2" ]
5848 }
5849
5850 # Return 1 if F16C instructions can be compiled.
5851
5852 proc check_effective_target_f16c { } {
5853 return [check_no_compiler_messages f16c object {
5854 #include "immintrin.h"
5855 float
5856 foo (unsigned short val)
5857 {
5858 return _cvtsh_ss (val);
5859 }
5860 } "-O2 -mf16c" ]
5861 }
5862
5863 # Return 1 if C wchar_t type is compatible with char16_t.
5864
5865 proc check_effective_target_wchar_t_char16_t_compatible { } {
5866 return [check_no_compiler_messages wchar_t_char16_t object {
5867 __WCHAR_TYPE__ wc;
5868 __CHAR16_TYPE__ *p16 = &wc;
5869 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5870 }]
5871 }
5872
5873 # Return 1 if C wchar_t type is compatible with char32_t.
5874
5875 proc check_effective_target_wchar_t_char32_t_compatible { } {
5876 return [check_no_compiler_messages wchar_t_char32_t object {
5877 __WCHAR_TYPE__ wc;
5878 __CHAR32_TYPE__ *p32 = &wc;
5879 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5880 }]
5881 }
5882
5883 # Return 1 if pow10 function exists.
5884
5885 proc check_effective_target_pow10 { } {
5886 return [check_runtime pow10 {
5887 #include <math.h>
5888 int main () {
5889 double x;
5890 x = pow10 (1);
5891 return 0;
5892 }
5893 } "-lm" ]
5894 }
5895
5896 # Return 1 if current options generate DFP instructions, 0 otherwise.
5897
5898 proc check_effective_target_hard_dfp {} {
5899 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
5900 typedef float d64 __attribute__((mode(DD)));
5901 d64 x, y, z;
5902 void foo (void) { z = x + y; }
5903 }]
5904 }
5905
5906 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
5907 # for strchr etc. functions.
5908
5909 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
5910 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
5911 #include <string.h>
5912 #include <wchar.h>
5913 #if !defined(__cplusplus) \
5914 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
5915 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
5916 ISO C++ correct string.h and wchar.h protos not supported.
5917 #else
5918 int i;
5919 #endif
5920 }]
5921 }
5922
5923 # Return 1 if GNU as is used.
5924
5925 proc check_effective_target_gas { } {
5926 global use_gas_saved
5927 global tool
5928
5929 if {![info exists use_gas_saved]} {
5930 # Check if the as used by gcc is GNU as.
5931 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
5932 # Provide /dev/null as input, otherwise gas times out reading from
5933 # stdin.
5934 set status [remote_exec host "$gcc_as" "-v /dev/null"]
5935 set as_output [lindex $status 1]
5936 if { [ string first "GNU" $as_output ] >= 0 } {
5937 set use_gas_saved 1
5938 } else {
5939 set use_gas_saved 0
5940 }
5941 }
5942 return $use_gas_saved
5943 }
5944
5945 # Return 1 if GNU ld is used.
5946
5947 proc check_effective_target_gld { } {
5948 global use_gld_saved
5949 global tool
5950
5951 if {![info exists use_gld_saved]} {
5952 # Check if the ld used by gcc is GNU ld.
5953 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
5954 set status [remote_exec host "$gcc_ld" "--version"]
5955 set ld_output [lindex $status 1]
5956 if { [ string first "GNU" $ld_output ] >= 0 } {
5957 set use_gld_saved 1
5958 } else {
5959 set use_gld_saved 0
5960 }
5961 }
5962 return $use_gld_saved
5963 }
5964
5965 # Return 1 if the compiler has been configure with link-time optimization
5966 # (LTO) support.
5967
5968 proc check_effective_target_lto { } {
5969 if { [istarget nvptx-*-*] } {
5970 return 0;
5971 }
5972 return [check_no_compiler_messages lto object {
5973 void foo (void) { }
5974 } "-flto"]
5975 }
5976
5977 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
5978
5979 proc check_effective_target_maybe_x32 { } {
5980 return [check_no_compiler_messages maybe_x32 object {
5981 void foo (void) {}
5982 } "-mx32 -maddress-mode=short"]
5983 }
5984
5985 # Return 1 if this target supports the -fsplit-stack option, 0
5986 # otherwise.
5987
5988 proc check_effective_target_split_stack {} {
5989 return [check_no_compiler_messages split_stack object {
5990 void foo (void) { }
5991 } "-fsplit-stack"]
5992 }
5993
5994 # Return 1 if this target supports the -masm=intel option, 0
5995 # otherwise
5996
5997 proc check_effective_target_masm_intel {} {
5998 return [check_no_compiler_messages masm_intel object {
5999 extern void abort (void);
6000 } "-masm=intel"]
6001 }
6002
6003 # Return 1 if the language for the compiler under test is C.
6004
6005 proc check_effective_target_c { } {
6006 global tool
6007 if [string match $tool "gcc"] {
6008 return 1
6009 }
6010 return 0
6011 }
6012
6013 # Return 1 if the language for the compiler under test is C++.
6014
6015 proc check_effective_target_c++ { } {
6016 global tool
6017 if [string match $tool "g++"] {
6018 return 1
6019 }
6020 return 0
6021 }
6022
6023 set cxx_default "c++14"
6024 # Check whether the current active language standard supports the features
6025 # of C++11/C++14 by checking for the presence of one of the -std flags.
6026 # This assumes that the default for the compiler is $cxx_default, and that
6027 # there will never be multiple -std= arguments on the command line.
6028 proc check_effective_target_c++11_only { } {
6029 global cxx_default
6030 if ![check_effective_target_c++] {
6031 return 0
6032 }
6033 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6034 return 1
6035 }
6036 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6037 return 1
6038 }
6039 return 0
6040 }
6041 proc check_effective_target_c++11 { } {
6042 if [check_effective_target_c++11_only] {
6043 return 1
6044 }
6045 return [check_effective_target_c++14]
6046 }
6047 proc check_effective_target_c++11_down { } {
6048 if ![check_effective_target_c++] {
6049 return 0
6050 }
6051 return [expr ![check_effective_target_c++14] ]
6052 }
6053
6054 proc check_effective_target_c++14_only { } {
6055 global cxx_default
6056 if ![check_effective_target_c++] {
6057 return 0
6058 }
6059 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6060 return 1
6061 }
6062 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6063 return 1
6064 }
6065 return 0
6066 }
6067
6068 proc check_effective_target_c++14 { } {
6069 if [check_effective_target_c++14_only] {
6070 return 1
6071 }
6072 return [check_effective_target_c++1z]
6073 }
6074 proc check_effective_target_c++14_down { } {
6075 if ![check_effective_target_c++] {
6076 return 0
6077 }
6078 return [expr ![check_effective_target_c++1z] ]
6079 }
6080
6081 proc check_effective_target_c++98_only { } {
6082 global cxx_default
6083 if ![check_effective_target_c++] {
6084 return 0
6085 }
6086 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6087 return 1
6088 }
6089 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6090 return 1
6091 }
6092 return 0
6093 }
6094
6095 proc check_effective_target_c++1z_only { } {
6096 global cxx_default
6097 if ![check_effective_target_c++] {
6098 return 0
6099 }
6100 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6101 return 1
6102 }
6103 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6104 return 1
6105 }
6106 return 0
6107 }
6108 proc check_effective_target_c++1z { } {
6109 return [check_effective_target_c++1z_only]
6110 }
6111
6112 # Return 1 if expensive testcases should be run.
6113
6114 proc check_effective_target_run_expensive_tests { } {
6115 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6116 return 1
6117 }
6118 return 0
6119 }
6120
6121 # Returns 1 if "mempcpy" is available on the target system.
6122
6123 proc check_effective_target_mempcpy {} {
6124 return [check_function_available "mempcpy"]
6125 }
6126
6127 # Returns 1 if "stpcpy" is available on the target system.
6128
6129 proc check_effective_target_stpcpy {} {
6130 return [check_function_available "stpcpy"]
6131 }
6132
6133 # Check whether the vectorizer tests are supported by the target and
6134 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6135 # Set dg-do-what-default to either compile or run, depending on target
6136 # capabilities. Return 1 if vectorizer tests are supported by
6137 # target, 0 otherwise.
6138
6139 proc check_vect_support_and_set_flags { } {
6140 global DEFAULT_VECTCFLAGS
6141 global dg-do-what-default
6142
6143 if [istarget powerpc-*paired*] {
6144 lappend DEFAULT_VECTCFLAGS "-mpaired"
6145 if [check_750cl_hw_available] {
6146 set dg-do-what-default run
6147 } else {
6148 set dg-do-what-default compile
6149 }
6150 } elseif [istarget powerpc*-*-*] {
6151 # Skip targets not supporting -maltivec.
6152 if ![is-effective-target powerpc_altivec_ok] {
6153 return 0
6154 }
6155
6156 lappend DEFAULT_VECTCFLAGS "-maltivec"
6157 if [check_p8vector_hw_available] {
6158 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6159 } elseif [check_vsx_hw_available] {
6160 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6161 }
6162
6163 if [check_vmx_hw_available] {
6164 set dg-do-what-default run
6165 } else {
6166 if [is-effective-target ilp32] {
6167 # Specify a cpu that supports VMX for compile-only tests.
6168 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6169 }
6170 set dg-do-what-default compile
6171 }
6172 } elseif { [istarget spu-*-*] } {
6173 set dg-do-what-default run
6174 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6175 lappend DEFAULT_VECTCFLAGS "-msse2"
6176 if { [check_effective_target_sse2_runtime] } {
6177 set dg-do-what-default run
6178 } else {
6179 set dg-do-what-default compile
6180 }
6181 } elseif { [istarget mips*-*-*]
6182 && ([check_effective_target_mpaired_single]
6183 || [check_effective_target_mips_loongson])
6184 && [check_effective_target_nomips16] } {
6185 if { [check_effective_target_mpaired_single] } {
6186 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6187 }
6188 set dg-do-what-default run
6189 } elseif [istarget sparc*-*-*] {
6190 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6191 if [check_effective_target_ultrasparc_hw] {
6192 set dg-do-what-default run
6193 } else {
6194 set dg-do-what-default compile
6195 }
6196 } elseif [istarget alpha*-*-*] {
6197 # Alpha's vectorization capabilities are extremely limited.
6198 # It's more effort than its worth disabling all of the tests
6199 # that it cannot pass. But if you actually want to see what
6200 # does work, command out the return.
6201 return 0
6202
6203 lappend DEFAULT_VECTCFLAGS "-mmax"
6204 if [check_alpha_max_hw_available] {
6205 set dg-do-what-default run
6206 } else {
6207 set dg-do-what-default compile
6208 }
6209 } elseif [istarget ia64-*-*] {
6210 set dg-do-what-default run
6211 } elseif [is-effective-target arm_neon_ok] {
6212 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6213 # NEON does not support denormals, so is not used for vectorization by
6214 # default to avoid loss of precision. We must pass -ffast-math to test
6215 # vectorization of float operations.
6216 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6217 if [is-effective-target arm_neon_hw] {
6218 set dg-do-what-default run
6219 } else {
6220 set dg-do-what-default compile
6221 }
6222 } elseif [istarget "aarch64*-*-*"] {
6223 set dg-do-what-default run
6224 } else {
6225 return 0
6226 }
6227
6228 return 1
6229 }
6230
6231 # Return 1 if the target does *not* require strict alignment.
6232
6233 proc check_effective_target_non_strict_align {} {
6234 return [check_no_compiler_messages non_strict_align assembly {
6235 char *y;
6236 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6237 c *z;
6238 void foo(void) { z = (c *) y; }
6239 } "-Wcast-align"]
6240 }
6241
6242 # Return 1 if the target has <ucontext.h>.
6243
6244 proc check_effective_target_ucontext_h { } {
6245 return [check_no_compiler_messages ucontext_h assembly {
6246 #include <ucontext.h>
6247 }]
6248 }
6249
6250 proc check_effective_target_aarch64_tiny { } {
6251 if { [istarget aarch64*-*-*] } {
6252 return [check_no_compiler_messages aarch64_tiny object {
6253 #ifdef __AARCH64_CMODEL_TINY__
6254 int dummy;
6255 #else
6256 #error target not AArch64 tiny code model
6257 #endif
6258 }]
6259 } else {
6260 return 0
6261 }
6262 }
6263
6264 proc check_effective_target_aarch64_small { } {
6265 if { [istarget aarch64*-*-*] } {
6266 return [check_no_compiler_messages aarch64_small object {
6267 #ifdef __AARCH64_CMODEL_SMALL__
6268 int dummy;
6269 #else
6270 #error target not AArch64 small code model
6271 #endif
6272 }]
6273 } else {
6274 return 0
6275 }
6276 }
6277
6278 proc check_effective_target_aarch64_large { } {
6279 if { [istarget aarch64*-*-*] } {
6280 return [check_no_compiler_messages aarch64_large object {
6281 #ifdef __AARCH64_CMODEL_LARGE__
6282 int dummy;
6283 #else
6284 #error target not AArch64 large code model
6285 #endif
6286 }]
6287 } else {
6288 return 0
6289 }
6290 }
6291
6292 # Return 1 if <fenv.h> is available with all the standard IEEE
6293 # exceptions and floating-point exceptions are raised by arithmetic
6294 # operations. (If the target requires special options for "inexact"
6295 # exceptions, those need to be specified in the testcases.)
6296
6297 proc check_effective_target_fenv_exceptions {} {
6298 return [check_runtime fenv_exceptions {
6299 #include <fenv.h>
6300 #include <stdlib.h>
6301 #ifndef FE_DIVBYZERO
6302 # error Missing FE_DIVBYZERO
6303 #endif
6304 #ifndef FE_INEXACT
6305 # error Missing FE_INEXACT
6306 #endif
6307 #ifndef FE_INVALID
6308 # error Missing FE_INVALID
6309 #endif
6310 #ifndef FE_OVERFLOW
6311 # error Missing FE_OVERFLOW
6312 #endif
6313 #ifndef FE_UNDERFLOW
6314 # error Missing FE_UNDERFLOW
6315 #endif
6316 volatile float a = 0.0f, r;
6317 int
6318 main (void)
6319 {
6320 r = a / a;
6321 if (fetestexcept (FE_INVALID))
6322 exit (0);
6323 else
6324 abort ();
6325 }
6326 } [add_options_for_ieee "-std=gnu99"]]
6327 }
6328
6329 proc check_effective_target_tiny {} {
6330 global et_target_tiny_saved
6331
6332 if [info exists et_target_tine_saved] {
6333 verbose "check_effective_target_tiny: using cached result" 2
6334 } else {
6335 set et_target_tiny_saved 0
6336 if { [istarget aarch64*-*-*]
6337 && [check_effective_target_aarch64_tiny] } {
6338 set et_target_tiny_saved 1
6339 }
6340 }
6341
6342 return $et_target_tiny_saved
6343 }
6344
6345 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6346
6347 proc check_effective_target_logical_op_short_circuit {} {
6348 if { [istarget mips*-*-*]
6349 || [istarget arc*-*-*]
6350 || [istarget avr*-*-*]
6351 || [istarget crisv32-*-*] || [istarget cris-*-*]
6352 || [istarget mmix-*-*]
6353 || [istarget s390*-*-*]
6354 || [istarget powerpc*-*-*]
6355 || [istarget nios2*-*-*]
6356 || [istarget visium-*-*]
6357 || [check_effective_target_arm_cortex_m] } {
6358 return 1
6359 }
6360 return 0
6361 }
6362
6363 # Record that dg-final test TEST requires convential compilation.
6364
6365 proc force_conventional_output_for { test } {
6366 if { [info proc $test] == "" } {
6367 perror "$test does not exist"
6368 exit 1
6369 }
6370 proc ${test}_required_options {} {
6371 global gcc_force_conventional_output
6372 return $gcc_force_conventional_output
6373 }
6374 }
6375
6376 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
6377 # otherwise. Cache the result.
6378
6379 proc check_effective_target_pie_copyreloc { } {
6380 global pie_copyreloc_available_saved
6381 global tool
6382 global GCC_UNDER_TEST
6383
6384 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6385 return 0
6386 }
6387
6388 # Need auto-host.h to check linker support.
6389 if { ![file exists ../../auto-host.h ] } {
6390 return 0
6391 }
6392
6393 if [info exists pie_copyreloc_available_saved] {
6394 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6395 } else {
6396 # Set up and compile to see if linker supports PIE with copy
6397 # reloc. Include the current process ID in the file names to
6398 # prevent conflicts with invocations for multiple testsuites.
6399
6400 set src pie[pid].c
6401 set obj pie[pid].o
6402
6403 set f [open $src "w"]
6404 puts $f "#include \"../../auto-host.h\""
6405 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
6406 puts $f "# error Linker does not support PIE with copy reloc."
6407 puts $f "#endif"
6408 close $f
6409
6410 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
6411 set lines [${tool}_target_compile $src $obj object ""]
6412
6413 file delete $src
6414 file delete $obj
6415
6416 if [string match "" $lines] then {
6417 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
6418 set pie_copyreloc_available_saved 1
6419 } else {
6420 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
6421 set pie_copyreloc_available_saved 0
6422 }
6423 }
6424
6425 return $pie_copyreloc_available_saved
6426 }
6427
6428 # Return 1 if the target uses comdat groups.
6429
6430 proc check_effective_target_comdat_group {} {
6431 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
6432 // C++
6433 inline int foo () { return 1; }
6434 int (*fn) () = foo;
6435 }]
6436 }