1 # Copyright (C) 1999-2016 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 ###############################
256 # proc check_weak_available { }
257 ###############################
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
262 proc check_weak_available { } {
265 # All mips targets should support it
267 if { [ string first "mips" $target_cpu ] >= 0 } {
271 # All AIX targets should support it
273 if { [istarget *-*-aix*] } {
277 # All solaris2 targets should support it
279 if { [istarget *-*-solaris2*] } {
283 # Windows targets Cygwin and MingW32 support it
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
289 # HP-UX 10.X doesn't support it
291 if { [istarget hppa*-*-hpux10*] } {
295 # nvptx (nearly) supports it
297 if { [istarget nvptx-*-*] } {
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
304 set objformat [gcc_target_object_format]
312 unknown { return -1 }
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
328 return [check_weak_available]
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
348 ###############################
349 # proc check_alias_available { }
350 ###############################
352 # Determine if the target toolchain supports the alias attribute.
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
359 proc check_alias_available { } {
360 global alias_available_saved
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
376 set lines [${tool}_target_compile $src $obj object ""]
378 remote_file build delete $obj
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
387 set objformat [gcc_target_object_format]
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
393 set alias_available_saved 0
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
400 set alias_available_saved -1
405 verbose "check_alias_available returning $alias_available_saved" 2
408 return $alias_available_saved
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
429 void f() __attribute__((ifunc("g")));
433 # Returns true if --gc-sections is supported on the target.
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
466 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
467 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
468 set ld_output [remote_exec host "$gcc_ld" "--help"]
469 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
470 set gc_sections_available_saved 1
472 set gc_sections_available_saved 0
475 return $gc_sections_available_saved
478 # Return 1 if according to target_info struct and explicit target list
479 # target is supposed to support trampolines.
481 proc check_effective_target_trampolines { } {
482 if [target_info exists no_trampolines] {
485 if { [istarget avr-*-*]
486 || [istarget msp430-*-*]
487 || [istarget nvptx-*-*]
488 || [istarget hppa2.0w-hp-hpux11.23]
489 || [istarget hppa64-hp-hpux11.23] } {
495 # Return 1 if according to target_info struct and explicit target list
496 # target disables -fdelete-null-pointer-checks. Targets should return 0
497 # if they simply default to -fno-delete-null-pointer-checks but obey
498 # -fdelete-null-pointer-checks when passed explicitly (and tests that
499 # depend on this option should do that).
501 proc check_effective_target_keeps_null_pointer_checks { } {
502 if [target_info exists keeps_null_pointer_checks] {
505 if { [istarget avr-*-*] } {
511 # Return true if profiling is supported on the target.
513 proc check_profiling_available { test_what } {
514 global profiling_available_saved
516 verbose "Profiling argument is <$test_what>" 1
518 # These conditions depend on the argument so examine them before
519 # looking at the cache variable.
521 # Tree profiling requires TLS runtime support.
522 if { $test_what == "-fprofile-generate" } {
523 if { ![check_effective_target_tls_runtime] } {
528 # Support for -p on solaris2 relies on mcrt1.o which comes with the
529 # vendor compiler. We cannot reliably predict the directory where the
530 # vendor compiler (and thus mcrt1.o) is installed so we can't
531 # necessarily find mcrt1.o even if we have it.
532 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
536 # We don't yet support profiling for MIPS16.
537 if { [istarget mips*-*-*]
538 && ![check_effective_target_nomips16]
539 && ($test_what == "-p" || $test_what == "-pg") } {
543 # MinGW does not support -p.
544 if { [istarget *-*-mingw*] && $test_what == "-p" } {
548 # cygwin does not support -p.
549 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
553 # uClibc does not have gcrt1.o.
554 if { [check_effective_target_uclibc]
555 && ($test_what == "-p" || $test_what == "-pg") } {
559 # Now examine the cache variable.
560 if {![info exists profiling_available_saved]} {
561 # Some targets don't have any implementation of __bb_init_func or are
562 # missing other needed machinery.
563 if {[istarget aarch64*-*-elf]
564 || [istarget am3*-*-linux*]
565 || [istarget arm*-*-eabi*]
566 || [istarget arm*-*-elf]
567 || [istarget arm*-*-symbianelf*]
568 || [istarget avr-*-*]
569 || [istarget bfin-*-*]
570 || [istarget cris-*-*]
571 || [istarget crisv32-*-*]
572 || [istarget fido-*-elf]
573 || [istarget h8300-*-*]
574 || [istarget lm32-*-*]
575 || [istarget m32c-*-elf]
576 || [istarget m68k-*-elf]
577 || [istarget m68k-*-uclinux*]
578 || [istarget mep-*-elf]
579 || [istarget mips*-*-elf*]
580 || [istarget mmix-*-*]
581 || [istarget mn10300-*-elf*]
582 || [istarget moxie-*-elf*]
583 || [istarget msp430-*-*]
584 || [istarget nds32*-*-elf]
585 || [istarget nios2-*-elf]
586 || [istarget nvptx-*-*]
587 || [istarget powerpc-*-eabi*]
588 || [istarget powerpc-*-elf]
590 || [istarget tic6x-*-elf]
591 || [istarget visium-*-*]
592 || [istarget xstormy16-*]
593 || [istarget xtensa*-*-elf]
594 || [istarget *-*-rtems*]
595 || [istarget *-*-vxworks*] } {
596 set profiling_available_saved 0
598 set profiling_available_saved 1
602 # -pg link test result can't be cached since it may change between
604 set profiling_working $profiling_available_saved
605 if { $profiling_available_saved == 1
606 && ![check_no_compiler_messages_nocache profiling executable {
607 int main() { return 0; } } "-pg"] } {
608 set profiling_working 0
611 return $profiling_working
614 # Check to see if a target is "freestanding". This is as per the definition
615 # in Section 4 of C99 standard. Effectively, it is a target which supports no
616 # extra headers or libraries other than what is considered essential.
617 proc check_effective_target_freestanding { } {
618 if { [istarget nvptx-*-*] } {
624 # Return 1 if target has packed layout of structure members by
625 # default, 0 otherwise. Note that this is slightly different than
626 # whether the target has "natural alignment": both attributes may be
629 proc check_effective_target_default_packed { } {
630 return [check_no_compiler_messages default_packed assembly {
631 struct x { char a; long b; } c;
632 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
636 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
637 # documentation, where the test also comes from.
639 proc check_effective_target_pcc_bitfield_type_matters { } {
640 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
641 # bitfields, but let's stick to the example code from the docs.
642 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
643 struct foo1 { char x; char :0; char y; };
644 struct foo2 { char x; int :0; char y; };
645 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
649 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
651 proc add_options_for_tls { flags } {
652 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
653 # libthread, so always pass -pthread for native TLS. Same for AIX.
654 # Need to duplicate native TLS check from
655 # check_effective_target_tls_native to avoid recursion.
656 if { ([istarget powerpc-ibm-aix*]) &&
657 [check_no_messages_and_pattern tls_native "!emutls" assembly {
659 int f (void) { return i; }
660 void g (int j) { i = j; }
662 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
667 # Return 1 if indirect jumps are supported, 0 otherwise.
669 proc check_effective_target_indirect_jumps {} {
670 if { [istarget nvptx-*-*] } {
676 # Return 1 if nonlocal goto is supported, 0 otherwise.
678 proc check_effective_target_nonlocal_goto {} {
679 if { [istarget nvptx-*-*] } {
685 # Return 1 if global constructors are supported, 0 otherwise.
687 proc check_effective_target_global_constructor {} {
688 if { [istarget nvptx-*-*] } {
694 # Return 1 if taking label values is supported, 0 otherwise.
696 proc check_effective_target_label_values {} {
697 if { [istarget nvptx-*-*] } {
700 return [check_no_compiler_messages label_values assembly {
701 #ifdef NO_LABEL_VALUES
707 # Return 1 if builtin_return_address and builtin_frame_address are
708 # supported, 0 otherwise.
710 proc check_effective_target_return_address {} {
711 if { [istarget nvptx-*-*] } {
717 # Return 1 if the assembler does not verify function types against
718 # calls, 0 otherwise. Such verification will typically show up problems
719 # with K&R C function declarations.
721 proc check_effective_target_untyped_assembly {} {
722 if { [istarget nvptx-*-*] } {
728 # Return 1 if alloca is supported, 0 otherwise.
730 proc check_effective_target_alloca {} {
731 if { [istarget nvptx-*-*] } {
737 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
739 proc check_effective_target_tls {} {
740 return [check_no_compiler_messages tls assembly {
742 int f (void) { return i; }
743 void g (int j) { i = j; }
747 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
749 proc check_effective_target_tls_native {} {
750 # VxWorks uses emulated TLS machinery, but with non-standard helper
751 # functions, so we fail to automatically detect it.
752 if { [istarget *-*-vxworks*] } {
756 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
758 int f (void) { return i; }
759 void g (int j) { i = j; }
763 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
765 proc check_effective_target_tls_emulated {} {
766 # VxWorks uses emulated TLS machinery, but with non-standard helper
767 # functions, so we fail to automatically detect it.
768 if { [istarget *-*-vxworks*] } {
772 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
774 int f (void) { return i; }
775 void g (int j) { i = j; }
779 # Return 1 if TLS executables can run correctly, 0 otherwise.
781 proc check_effective_target_tls_runtime {} {
782 # The runtime does not have TLS support, but just
783 # running the test below is insufficient to show this.
784 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
787 return [check_runtime tls_runtime {
788 __thread int thr = 0;
789 int main (void) { return thr; }
790 } [add_options_for_tls ""]]
793 # Return 1 if atomic compare-and-swap is supported on 'int'
795 proc check_effective_target_cas_char {} {
796 return [check_no_compiler_messages cas_char assembly {
797 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
803 proc check_effective_target_cas_int {} {
804 return [check_no_compiler_messages cas_int assembly {
805 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
807 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
815 # Return 1 if -ffunction-sections is supported, 0 otherwise.
817 proc check_effective_target_function_sections {} {
818 # Darwin has its own scheme and silently accepts -ffunction-sections.
819 if { [istarget *-*-darwin*] } {
823 return [check_no_compiler_messages functionsections assembly {
825 } "-ffunction-sections"]
828 # Return 1 if instruction scheduling is available, 0 otherwise.
830 proc check_effective_target_scheduling {} {
831 return [check_no_compiler_messages scheduling object {
833 } "-fschedule-insns"]
836 # Return 1 if trapping arithmetic is available, 0 otherwise.
838 proc check_effective_target_trapping {} {
839 return [check_no_compiler_messages trapping object {
840 int add (int a, int b) { return a + b; }
844 # Return 1 if compilation with -fgraphite is error-free for trivial
847 proc check_effective_target_fgraphite {} {
848 return [check_no_compiler_messages fgraphite object {
853 # Return 1 if compilation with -fopenacc is error-free for trivial
856 proc check_effective_target_fopenacc {} {
857 # nvptx can be built with the device-side bits of openacc, but it
858 # does not make sense to test it as an openacc host.
859 if [istarget nvptx-*-*] { return 0 }
861 return [check_no_compiler_messages fopenacc object {
866 # Return 1 if compilation with -fopenmp is error-free for trivial
869 proc check_effective_target_fopenmp {} {
870 # nvptx can be built with the device-side bits of libgomp, but it
871 # does not make sense to test it as an openmp host.
872 if [istarget nvptx-*-*] { return 0 }
874 return [check_no_compiler_messages fopenmp object {
879 # Return 1 if compilation with -fgnu-tm is error-free for trivial
882 proc check_effective_target_fgnu_tm {} {
883 return [check_no_compiler_messages fgnu_tm object {
888 # Return 1 if the target supports mmap, 0 otherwise.
890 proc check_effective_target_mmap {} {
891 return [check_function_available "mmap"]
894 # Return 1 if the target supports dlopen, 0 otherwise.
895 proc check_effective_target_dlopen {} {
896 return [check_no_compiler_messages dlopen executable {
898 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
899 } [add_options_for_dlopen ""]]
902 proc add_options_for_dlopen { flags } {
906 # Return 1 if the target supports clone, 0 otherwise.
907 proc check_effective_target_clone {} {
908 return [check_function_available "clone"]
911 # Return 1 if the target supports setrlimit, 0 otherwise.
912 proc check_effective_target_setrlimit {} {
913 # Darwin has non-posix compliant RLIMIT_AS
914 if { [istarget *-*-darwin*] } {
917 return [check_function_available "setrlimit"]
920 # Return 1 if the target supports swapcontext, 0 otherwise.
921 proc check_effective_target_swapcontext {} {
922 return [check_no_compiler_messages swapcontext executable {
923 #include <ucontext.h>
926 ucontext_t orig_context,child_context;
927 if (swapcontext(&child_context, &orig_context) < 0) { }
932 # Return 1 if compilation with -pthread is error-free for trivial
935 proc check_effective_target_pthread {} {
936 return [check_no_compiler_messages pthread object {
941 # Return 1 if compilation with -gstabs is error-free for trivial
944 proc check_effective_target_stabs {} {
945 return [check_no_compiler_messages stabs object {
950 # Return 1 if compilation with -mpe-aligned-commons is error-free
951 # for trivial code, 0 otherwise.
953 proc check_effective_target_pe_aligned_commons {} {
954 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
955 return [check_no_compiler_messages pe_aligned_commons object {
957 } "-mpe-aligned-commons"]
962 # Return 1 if the target supports -static
963 proc check_effective_target_static {} {
964 return [check_no_compiler_messages static executable {
965 int main (void) { return 0; }
969 # Return 1 if the target supports -fstack-protector
970 proc check_effective_target_fstack_protector {} {
971 return [check_runtime fstack_protector {
972 int main (void) { return 0; }
973 } "-fstack-protector"]
976 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
977 # for trivial code, 0 otherwise.
979 proc check_effective_target_freorder {} {
980 return [check_no_compiler_messages freorder object {
982 } "-freorder-blocks-and-partition"]
985 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
986 # emitted, 0 otherwise. Whether a shared library can actually be built is
987 # out of scope for this test.
989 proc check_effective_target_fpic { } {
990 # Note that M68K has a multilib that supports -fpic but not
991 # -fPIC, so we need to check both. We test with a program that
992 # requires GOT references.
993 foreach arg {fpic fPIC} {
994 if [check_no_compiler_messages $arg object {
995 extern int foo (void); extern int bar;
996 int baz (void) { return foo () + bar; }
1004 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1005 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1006 # assumes compiler will give warning if -fpic not supported. Here we check
1007 # whether binutils supports those new -fpic relocation modifiers, and assume
1008 # -fpic is supported if there is binutils support. GCC configuration will
1009 # enable -fpic for AArch64 in this case.
1011 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1012 # memory model -fpic relocation types.
1014 proc check_effective_target_aarch64_small_fpic { } {
1015 if { [istarget aarch64*-*-*] } {
1016 return [check_no_compiler_messages aarch64_small_fpic object {
1017 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1024 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1025 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1026 # in binutils since 2015-03-04 as PR gas/17843.
1028 # This test directive make sure binutils support all features needed by TLS LE
1029 # under -mtls-size=32 on AArch64.
1031 proc check_effective_target_aarch64_tlsle32 { } {
1032 if { [istarget aarch64*-*-*] } {
1033 return [check_no_compiler_messages aarch64_tlsle32 object {
1034 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1041 # Return 1 if -shared is supported, as in no warnings or errors
1042 # emitted, 0 otherwise.
1044 proc check_effective_target_shared { } {
1045 # Note that M68K has a multilib that supports -fpic but not
1046 # -fPIC, so we need to check both. We test with a program that
1047 # requires GOT references.
1048 return [check_no_compiler_messages shared executable {
1049 extern int foo (void); extern int bar;
1050 int baz (void) { return foo () + bar; }
1054 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1056 proc check_effective_target_pie { } {
1057 if { [istarget *-*-darwin\[912\]*]
1058 || [istarget *-*-dragonfly*]
1059 || [istarget *-*-freebsd*]
1060 || [istarget *-*-linux*]
1061 || [istarget *-*-gnu*] } {
1064 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1065 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1066 # errors out if missing, so check for that.
1067 return [check_no_compiler_messages pie executable {
1068 int main (void) { return 0; }
1074 # Return true if the target supports -mpaired-single (as used on MIPS).
1076 proc check_effective_target_mpaired_single { } {
1077 return [check_no_compiler_messages mpaired_single object {
1079 } "-mpaired-single"]
1082 # Return true if the target has access to FPU instructions.
1084 proc check_effective_target_hard_float { } {
1085 if { [istarget mips*-*-*] } {
1086 return [check_no_compiler_messages hard_float assembly {
1087 #if (defined __mips_soft_float || defined __mips16)
1088 #error __mips_soft_float || __mips16
1093 # This proc is actually checking the availabilty of FPU
1094 # support for doubles, so on the RX we must fail if the
1095 # 64-bit double multilib has been selected.
1096 if { [istarget rx-*-*] } {
1098 # return [check_no_compiler_messages hard_float assembly {
1099 #if defined __RX_64_BIT_DOUBLES__
1100 #error __RX_64_BIT_DOUBLES__
1105 # The generic test equates hard_float with "no call for adding doubles".
1106 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1107 double a (double b, double c) { return b + c; }
1111 # Return true if the target is a 64-bit MIPS target.
1113 proc check_effective_target_mips64 { } {
1114 return [check_no_compiler_messages mips64 assembly {
1121 # Return true if the target is a MIPS target that does not produce
1124 proc check_effective_target_nomips16 { } {
1125 return [check_no_compiler_messages nomips16 object {
1129 /* A cheap way of testing for -mflip-mips16. */
1130 void foo (void) { asm ("addiu $20,$20,1"); }
1131 void bar (void) { asm ("addiu $20,$20,1"); }
1136 # Add the options needed for MIPS16 function attributes. At the moment,
1137 # we don't support MIPS16 PIC.
1139 proc add_options_for_mips16_attribute { flags } {
1140 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1143 # Return true if we can force a mode that allows MIPS16 code generation.
1144 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1147 proc check_effective_target_mips16_attribute { } {
1148 return [check_no_compiler_messages mips16_attribute assembly {
1152 #if defined __mips_hard_float \
1153 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1154 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1155 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1157 } [add_options_for_mips16_attribute ""]]
1160 # Return 1 if the target supports long double larger than double when
1161 # using the new ABI, 0 otherwise.
1163 proc check_effective_target_mips_newabi_large_long_double { } {
1164 return [check_no_compiler_messages mips_newabi_large_long_double object {
1165 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1169 # Return true if the target is a MIPS target that has access
1170 # to the LL and SC instructions.
1172 proc check_effective_target_mips_llsc { } {
1173 if { ![istarget mips*-*-*] } {
1176 # Assume that these instructions are always implemented for
1177 # non-elf* targets, via emulation if necessary.
1178 if { ![istarget *-*-elf*] } {
1181 # Otherwise assume LL/SC support for everything but MIPS I.
1182 return [check_no_compiler_messages mips_llsc assembly {
1189 # Return true if the target is a MIPS target that uses in-place relocations.
1191 proc check_effective_target_mips_rel { } {
1192 if { ![istarget mips*-*-*] } {
1195 return [check_no_compiler_messages mips_rel object {
1196 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1197 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1198 #error _ABIN32 && (_ABIN32 || _ABI64)
1203 # Return true if the target is a MIPS target that uses the EABI.
1205 proc check_effective_target_mips_eabi { } {
1206 if { ![istarget mips*-*-*] } {
1209 return [check_no_compiler_messages mips_eabi object {
1216 # Return 1 if the current multilib does not generate PIC by default.
1218 proc check_effective_target_nonpic { } {
1219 return [check_no_compiler_messages nonpic assembly {
1226 # Return 1 if the current multilib generates PIE by default.
1228 proc check_effective_target_pie_enabled { } {
1229 return [check_no_compiler_messages pie_enabled assembly {
1236 # Return 1 if the target generates -fstack-protector by default.
1238 proc check_effective_target_fstack_protector_enabled {} {
1239 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1240 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1241 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1247 # Return 1 if the target does not use a status wrapper.
1249 proc check_effective_target_unwrapped { } {
1250 if { [target_info needs_status_wrapper] != "" \
1251 && [target_info needs_status_wrapper] != "0" } {
1257 # Return true if iconv is supported on the target. In particular IBM1047.
1259 proc check_iconv_available { test_what } {
1262 # If the tool configuration file has not set libiconv, try "-liconv"
1263 if { ![info exists libiconv] } {
1264 set libiconv "-liconv"
1266 set test_what [lindex $test_what 1]
1267 return [check_runtime_nocache $test_what [subst {
1273 cd = iconv_open ("$test_what", "UTF-8");
1274 if (cd == (iconv_t) -1)
1281 # Return true if Cilk Library is supported on the target.
1282 proc check_libcilkrts_available { } {
1283 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1287 int __cilkrts_set_param (const char *, const char *);
1289 int x = __cilkrts_set_param ("nworkers", "0");
1292 } "-fcilkplus -lcilkrts" ]
1295 # Return true if the atomic library is supported on the target.
1296 proc check_effective_target_libatomic_available { } {
1297 return [check_no_compiler_messages libatomic_available executable {
1298 int main (void) { return 0; }
1302 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1304 proc check_ascii_locale_available { } {
1308 # Return true if named sections are supported on this target.
1310 proc check_named_sections_available { } {
1311 return [check_no_compiler_messages named_sections assembly {
1312 int __attribute__ ((section("whatever"))) foo;
1316 # Return true if the "naked" function attribute is supported on this target.
1318 proc check_effective_target_naked_functions { } {
1319 return [check_no_compiler_messages naked_functions assembly {
1320 void f() __attribute__((naked));
1324 # Return 1 if the target supports Fortran real kinds larger than real(8),
1327 # When the target name changes, replace the cached result.
1329 proc check_effective_target_fortran_large_real { } {
1330 return [check_no_compiler_messages fortran_large_real executable {
1332 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1339 # Return 1 if the target supports Fortran real kind real(16),
1340 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1341 # this checks for Real(16) only; the other returned real(10) if
1342 # both real(10) and real(16) are available.
1344 # When the target name changes, replace the cached result.
1346 proc check_effective_target_fortran_real_16 { } {
1347 return [check_no_compiler_messages fortran_real_16 executable {
1356 # Return 1 if the target supports Fortran's IEEE modules,
1359 # When the target name changes, replace the cached result.
1361 proc check_effective_target_fortran_ieee { flags } {
1362 return [check_no_compiler_messages fortran_ieee executable {
1364 use, intrinsic :: ieee_features
1370 # Return 1 if the target supports SQRT for the largest floating-point
1371 # type. (Some targets lack the libm support for this FP type.)
1372 # On most targets, this check effectively checks either whether sqrtl is
1373 # available or on __float128 systems whether libquadmath is installed,
1374 # which provides sqrtq.
1376 # When the target name changes, replace the cached result.
1378 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1379 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1381 use iso_fortran_env, only: real_kinds
1382 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1383 real(kind=maxFP), volatile :: x
1391 # Return 1 if the target supports Fortran integer kinds larger than
1392 # integer(8), 0 otherwise.
1394 # When the target name changes, replace the cached result.
1396 proc check_effective_target_fortran_large_int { } {
1397 return [check_no_compiler_messages fortran_large_int executable {
1399 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1400 integer(kind=k) :: i
1405 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1407 # When the target name changes, replace the cached result.
1409 proc check_effective_target_fortran_integer_16 { } {
1410 return [check_no_compiler_messages fortran_integer_16 executable {
1417 # Return 1 if we can statically link libgfortran, 0 otherwise.
1419 # When the target name changes, replace the cached result.
1421 proc check_effective_target_static_libgfortran { } {
1422 return [check_no_compiler_messages static_libgfortran executable {
1429 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1431 proc check_effective_target_cilkplus { } {
1432 # Skip cilk-plus tests on int16 and size16 targets for now.
1433 # The cilk-plus tests are not generic enough to cover these
1434 # cases and would throw hundreds of FAILs.
1435 if { [check_effective_target_int16]
1436 || ![check_effective_target_size32plus] } {
1440 # Skip AVR, its RAM is too small and too many tests would fail.
1441 if { [istarget avr-*-*] } {
1445 if { ! [check_effective_target_pthread] } {
1452 proc check_linker_plugin_available { } {
1453 return [check_no_compiler_messages_nocache linker_plugin executable {
1454 int main() { return 0; }
1455 } "-flto -fuse-linker-plugin"]
1458 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1459 # otherwise. Cache the result.
1461 proc check_750cl_hw_available { } {
1462 return [check_cached_effective_target 750cl_hw_available {
1463 # If this is not the right target then we can skip the test.
1464 if { ![istarget powerpc-*paired*] } {
1467 check_runtime_nocache 750cl_hw_available {
1471 asm volatile ("ps_mul v0,v0,v0");
1473 asm volatile ("ps_mul 0,0,0");
1482 # Return 1 if the target OS supports running SSE executables, 0
1483 # otherwise. Cache the result.
1485 proc check_sse_os_support_available { } {
1486 return [check_cached_effective_target sse_os_support_available {
1487 # If this is not the right target then we can skip the test.
1488 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1490 } elseif { [istarget i?86-*-solaris2*] } {
1491 # The Solaris 2 kernel doesn't save and restore SSE registers
1492 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1493 check_runtime_nocache sse_os_support_available {
1496 asm volatile ("movaps %xmm0,%xmm0");
1506 # Return 1 if the target OS supports running AVX executables, 0
1507 # otherwise. Cache the result.
1509 proc check_avx_os_support_available { } {
1510 return [check_cached_effective_target avx_os_support_available {
1511 # If this is not the right target then we can skip the test.
1512 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1515 # Check that OS has AVX and SSE saving enabled.
1516 check_runtime_nocache avx_os_support_available {
1519 unsigned int eax, edx;
1521 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1522 return (eax & 6) != 6;
1529 # Return 1 if the target supports executing SSE instructions, 0
1530 # otherwise. Cache the result.
1532 proc check_sse_hw_available { } {
1533 return [check_cached_effective_target sse_hw_available {
1534 # If this is not the right target then we can skip the test.
1535 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1538 check_runtime_nocache sse_hw_available {
1542 unsigned int eax, ebx, ecx, edx;
1543 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1544 return !(edx & bit_SSE);
1552 # Return 1 if the target supports executing SSE2 instructions, 0
1553 # otherwise. Cache the result.
1555 proc check_sse2_hw_available { } {
1556 return [check_cached_effective_target sse2_hw_available {
1557 # If this is not the right target then we can skip the test.
1558 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1561 check_runtime_nocache sse2_hw_available {
1565 unsigned int eax, ebx, ecx, edx;
1566 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1567 return !(edx & bit_SSE2);
1575 # Return 1 if the target supports executing AVX instructions, 0
1576 # otherwise. Cache the result.
1578 proc check_avx_hw_available { } {
1579 return [check_cached_effective_target avx_hw_available {
1580 # If this is not the right target then we can skip the test.
1581 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1584 check_runtime_nocache avx_hw_available {
1588 unsigned int eax, ebx, ecx, edx;
1589 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1590 return ((ecx & (bit_AVX | bit_OSXSAVE))
1591 != (bit_AVX | bit_OSXSAVE));
1599 # Return 1 if the target supports running SSE executables, 0 otherwise.
1601 proc check_effective_target_sse_runtime { } {
1602 if { [check_effective_target_sse]
1603 && [check_sse_hw_available]
1604 && [check_sse_os_support_available] } {
1610 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1612 proc check_effective_target_sse2_runtime { } {
1613 if { [check_effective_target_sse2]
1614 && [check_sse2_hw_available]
1615 && [check_sse_os_support_available] } {
1621 # Return 1 if the target supports running AVX executables, 0 otherwise.
1623 proc check_effective_target_avx_runtime { } {
1624 if { [check_effective_target_avx]
1625 && [check_avx_hw_available]
1626 && [check_avx_os_support_available] } {
1632 # Return 1 if the target supports executing power8 vector instructions, 0
1633 # otherwise. Cache the result.
1635 proc check_p8vector_hw_available { } {
1636 return [check_cached_effective_target p8vector_hw_available {
1637 # Some simulators are known to not support VSX/power8 instructions.
1638 # For now, disable on Darwin
1639 if { [istarget powerpc-*-eabi]
1640 || [istarget powerpc*-*-eabispe]
1641 || [istarget *-*-darwin*]} {
1644 set options "-mpower8-vector"
1645 check_runtime_nocache p8vector_hw_available {
1649 asm volatile ("xxlorc vs0,vs0,vs0");
1651 asm volatile ("xxlorc 0,0,0");
1660 # Return 1 if the target supports executing power9 vector instructions, 0
1661 # otherwise. Cache the result.
1663 proc check_p9vector_hw_available { } {
1664 return [check_cached_effective_target p9vector_hw_available {
1665 # Some simulators are known to not support VSX/power8/power9
1666 # instructions. For now, disable on Darwin.
1667 if { [istarget powerpc-*-eabi]
1668 || [istarget powerpc*-*-eabispe]
1669 || [istarget *-*-darwin*]} {
1672 set options "-mpower9-vector"
1673 check_runtime_nocache p9vector_hw_available {
1677 vector double v = (vector double) { 0.0, 0.0 };
1678 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1686 # Return 1 if the target supports executing power9 modulo instructions, 0
1687 # otherwise. Cache the result.
1689 proc check_p9modulo_hw_available { } {
1690 return [check_cached_effective_target p9modulo_hw_available {
1691 # Some simulators are known to not support VSX/power8/power9
1692 # instructions. For now, disable on Darwin.
1693 if { [istarget powerpc-*-eabi]
1694 || [istarget powerpc*-*-eabispe]
1695 || [istarget *-*-darwin*]} {
1698 set options "-mmodulo"
1699 check_runtime_nocache p9modulo_hw_available {
1702 int i = 5, j = 3, r = -1;
1703 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1711 # Return 1 if the target supports executing __float128 on PowerPC via software
1712 # emulation, 0 otherwise. Cache the result.
1714 proc check_ppc_float128_sw_available { } {
1715 return [check_cached_effective_target ppc_float128_sw_available {
1716 # Some simulators are known to not support VSX/power8/power9
1717 # instructions. For now, disable on Darwin.
1718 if { [istarget powerpc-*-eabi]
1719 || [istarget powerpc*-*-eabispe]
1720 || [istarget *-*-darwin*]} {
1723 set options "-mfloat128 -mvsx"
1724 check_runtime_nocache ppc_float128_sw_available {
1725 volatile __float128 x = 1.0q;
1726 volatile __float128 y = 2.0q;
1729 __float128 z = x + y;
1737 # Return 1 if the target supports executing __float128 on PowerPC via power9
1738 # hardware instructions, 0 otherwise. Cache the result.
1740 proc check_ppc_float128_hw_available { } {
1741 return [check_cached_effective_target ppc_float128_hw_available {
1742 # Some simulators are known to not support VSX/power8/power9
1743 # instructions. For now, disable on Darwin.
1744 if { [istarget powerpc-*-eabi]
1745 || [istarget powerpc*-*-eabispe]
1746 || [istarget *-*-darwin*]} {
1749 set options "-mfloat128-hardware"
1750 check_runtime_nocache ppc_float128_hw_available {
1751 volatile __float128 x = 1.0q;
1752 volatile __float128 y = 2.0q;
1755 __float128 z = x + y;
1756 __float128 w = -1.0q;
1758 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1759 return ((z == 3.0q) && (z == w);
1766 # Return 1 if the target supports executing VSX instructions, 0
1767 # otherwise. Cache the result.
1769 proc check_vsx_hw_available { } {
1770 return [check_cached_effective_target vsx_hw_available {
1771 # Some simulators are known to not support VSX instructions.
1772 # For now, disable on Darwin
1773 if { [istarget powerpc-*-eabi]
1774 || [istarget powerpc*-*-eabispe]
1775 || [istarget *-*-darwin*]} {
1779 check_runtime_nocache vsx_hw_available {
1783 asm volatile ("xxlor vs0,vs0,vs0");
1785 asm volatile ("xxlor 0,0,0");
1794 # Return 1 if the target supports executing AltiVec instructions, 0
1795 # otherwise. Cache the result.
1797 proc check_vmx_hw_available { } {
1798 return [check_cached_effective_target vmx_hw_available {
1799 # Some simulators are known to not support VMX instructions.
1800 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1803 # Most targets don't require special flags for this test case, but
1804 # Darwin does. Just to be sure, make sure VSX is not enabled for
1805 # the altivec tests.
1806 if { [istarget *-*-darwin*]
1807 || [istarget *-*-aix*] } {
1808 set options "-maltivec -mno-vsx"
1810 set options "-mno-vsx"
1812 check_runtime_nocache vmx_hw_available {
1816 asm volatile ("vor v0,v0,v0");
1818 asm volatile ("vor 0,0,0");
1827 proc check_ppc_recip_hw_available { } {
1828 return [check_cached_effective_target ppc_recip_hw_available {
1829 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1830 # For now, disable on Darwin
1831 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1834 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1835 check_runtime_nocache ppc_recip_hw_available {
1836 volatile double d_recip, d_rsqrt, d_four = 4.0;
1837 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1840 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1841 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1842 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1843 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1851 # Return 1 if the target supports executing AltiVec and Cell PPU
1852 # instructions, 0 otherwise. Cache the result.
1854 proc check_effective_target_cell_hw { } {
1855 return [check_cached_effective_target cell_hw_available {
1856 # Some simulators are known to not support VMX and PPU instructions.
1857 if { [istarget powerpc-*-eabi*] } {
1860 # Most targets don't require special flags for this test
1861 # case, but Darwin and AIX do.
1862 if { [istarget *-*-darwin*]
1863 || [istarget *-*-aix*] } {
1864 set options "-maltivec -mcpu=cell"
1866 set options "-mcpu=cell"
1868 check_runtime_nocache cell_hw_available {
1872 asm volatile ("vor v0,v0,v0");
1873 asm volatile ("lvlx v0,r0,r0");
1875 asm volatile ("vor 0,0,0");
1876 asm volatile ("lvlx 0,0,0");
1885 # Return 1 if the target supports executing 64-bit instructions, 0
1886 # otherwise. Cache the result.
1888 proc check_effective_target_powerpc64 { } {
1889 global powerpc64_available_saved
1892 if [info exists powerpc64_available_saved] {
1893 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1895 set powerpc64_available_saved 0
1897 # Some simulators are known to not support powerpc64 instructions.
1898 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1899 verbose "check_effective_target_powerpc64 returning 0" 2
1900 return $powerpc64_available_saved
1903 # Set up, compile, and execute a test program containing a 64-bit
1904 # instruction. Include the current process ID in the file
1905 # names to prevent conflicts with invocations for multiple
1910 set f [open $src "w"]
1911 puts $f "int main() {"
1912 puts $f "#ifdef __MACH__"
1913 puts $f " asm volatile (\"extsw r0,r0\");"
1915 puts $f " asm volatile (\"extsw 0,0\");"
1917 puts $f " return 0; }"
1920 set opts "additional_flags=-mcpu=G5"
1922 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1923 set lines [${tool}_target_compile $src $exe executable "$opts"]
1926 if [string match "" $lines] then {
1927 # No error message, compilation succeeded.
1928 set result [${tool}_load "./$exe" "" ""]
1929 set status [lindex $result 0]
1930 remote_file build delete $exe
1931 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1933 if { $status == "pass" } then {
1934 set powerpc64_available_saved 1
1937 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1941 return $powerpc64_available_saved
1944 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1945 # complex float arguments. This affects gfortran tests that call cabsf
1946 # in libm built by an earlier compiler. Return 1 if libm uses the same
1947 # argument passing as the compiler under test, 0 otherwise.
1949 # When the target name changes, replace the cached result.
1951 proc check_effective_target_broken_cplxf_arg { } {
1952 return [check_cached_effective_target broken_cplxf_arg {
1953 # Skip the work for targets known not to be affected.
1954 if { ![istarget powerpc64-*-linux*] } {
1956 } elseif { ![is-effective-target lp64] } {
1959 check_runtime_nocache broken_cplxf_arg {
1960 #include <complex.h>
1961 extern void abort (void);
1962 float fabsf (float);
1963 float cabsf (_Complex float);
1970 if (fabsf (f - 5.0) > 0.0001)
1979 # Return 1 is this is a TI C6X target supporting C67X instructions
1980 proc check_effective_target_ti_c67x { } {
1981 return [check_no_compiler_messages ti_c67x assembly {
1982 #if !defined(_TMS320C6700)
1983 #error !_TMS320C6700
1988 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1989 proc check_effective_target_ti_c64xp { } {
1990 return [check_no_compiler_messages ti_c64xp assembly {
1991 #if !defined(_TMS320C6400_PLUS)
1992 #error !_TMS320C6400_PLUS
1998 proc check_alpha_max_hw_available { } {
1999 return [check_runtime alpha_max_hw_available {
2000 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2004 # Returns true iff the FUNCTION is available on the target system.
2005 # (This is essentially a Tcl implementation of Autoconf's
2008 proc check_function_available { function } {
2009 return [check_no_compiler_messages ${function}_available \
2015 int main () { $function (); }
2019 # Returns true iff "fork" is available on the target system.
2021 proc check_fork_available {} {
2022 return [check_function_available "fork"]
2025 # Returns true iff "mkfifo" is available on the target system.
2027 proc check_mkfifo_available {} {
2028 if { [istarget *-*-cygwin*] } {
2029 # Cygwin has mkfifo, but support is incomplete.
2033 return [check_function_available "mkfifo"]
2036 # Returns true iff "__cxa_atexit" is used on the target system.
2038 proc check_cxa_atexit_available { } {
2039 return [check_cached_effective_target cxa_atexit_available {
2040 if { [istarget hppa*-*-hpux10*] } {
2041 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2043 } elseif { [istarget *-*-vxworks] } {
2044 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2047 check_runtime_nocache cxa_atexit_available {
2050 static unsigned int count;
2067 Y() { f(); count = 2; }
2076 int main() { return 0; }
2082 proc check_effective_target_objc2 { } {
2083 return [check_no_compiler_messages objc2 object {
2092 proc check_effective_target_next_runtime { } {
2093 return [check_no_compiler_messages objc2 object {
2094 #ifdef __NEXT_RUNTIME__
2097 #error !__NEXT_RUNTIME__
2102 # Return 1 if we're generating 32-bit code using default options, 0
2105 proc check_effective_target_ilp32 { } {
2106 return [check_no_compiler_messages ilp32 object {
2107 int dummy[sizeof (int) == 4
2108 && sizeof (void *) == 4
2109 && sizeof (long) == 4 ? 1 : -1];
2113 # Return 1 if we're generating ia32 code using default options, 0
2116 proc check_effective_target_ia32 { } {
2117 return [check_no_compiler_messages ia32 object {
2118 int dummy[sizeof (int) == 4
2119 && sizeof (void *) == 4
2120 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2124 # Return 1 if we're generating x32 code using default options, 0
2127 proc check_effective_target_x32 { } {
2128 return [check_no_compiler_messages x32 object {
2129 int dummy[sizeof (int) == 4
2130 && sizeof (void *) == 4
2131 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2135 # Return 1 if we're generating 32-bit integers using default
2136 # options, 0 otherwise.
2138 proc check_effective_target_int32 { } {
2139 return [check_no_compiler_messages int32 object {
2140 int dummy[sizeof (int) == 4 ? 1 : -1];
2144 # Return 1 if we're generating 32-bit or larger integers using default
2145 # options, 0 otherwise.
2147 proc check_effective_target_int32plus { } {
2148 return [check_no_compiler_messages int32plus object {
2149 int dummy[sizeof (int) >= 4 ? 1 : -1];
2153 # Return 1 if we're generating 32-bit or larger pointers using default
2154 # options, 0 otherwise.
2156 proc check_effective_target_ptr32plus { } {
2157 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2158 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2159 # cannot really hold a 32-bit address, so we always return false here.
2160 if { [istarget msp430-*-*] } {
2164 return [check_no_compiler_messages ptr32plus object {
2165 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2169 # Return 1 if we support 32-bit or larger array and structure sizes
2170 # using default options, 0 otherwise. Avoid false positive on
2171 # targets with 20 or 24 bit address spaces.
2173 proc check_effective_target_size32plus { } {
2174 return [check_no_compiler_messages size32plus object {
2175 char dummy[16777217L];
2179 # Returns 1 if we're generating 16-bit or smaller integers with the
2180 # default options, 0 otherwise.
2182 proc check_effective_target_int16 { } {
2183 return [check_no_compiler_messages int16 object {
2184 int dummy[sizeof (int) < 4 ? 1 : -1];
2188 # Return 1 if we're generating 64-bit code using default options, 0
2191 proc check_effective_target_lp64 { } {
2192 return [check_no_compiler_messages lp64 object {
2193 int dummy[sizeof (int) == 4
2194 && sizeof (void *) == 8
2195 && sizeof (long) == 8 ? 1 : -1];
2199 # Return 1 if we're generating 64-bit code using default llp64 options,
2202 proc check_effective_target_llp64 { } {
2203 return [check_no_compiler_messages llp64 object {
2204 int dummy[sizeof (int) == 4
2205 && sizeof (void *) == 8
2206 && sizeof (long long) == 8
2207 && sizeof (long) == 4 ? 1 : -1];
2211 # Return 1 if long and int have different sizes,
2214 proc check_effective_target_long_neq_int { } {
2215 return [check_no_compiler_messages long_ne_int object {
2216 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2220 # Return 1 if the target supports long double larger than double,
2223 proc check_effective_target_large_long_double { } {
2224 return [check_no_compiler_messages large_long_double object {
2225 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2229 # Return 1 if the target supports double larger than float,
2232 proc check_effective_target_large_double { } {
2233 return [check_no_compiler_messages large_double object {
2234 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2238 # Return 1 if the target supports long double of 128 bits,
2241 proc check_effective_target_longdouble128 { } {
2242 return [check_no_compiler_messages longdouble128 object {
2243 int dummy[sizeof(long double) == 16 ? 1 : -1];
2247 # Return 1 if the target supports double of 64 bits,
2250 proc check_effective_target_double64 { } {
2251 return [check_no_compiler_messages double64 object {
2252 int dummy[sizeof(double) == 8 ? 1 : -1];
2256 # Return 1 if the target supports double of at least 64 bits,
2259 proc check_effective_target_double64plus { } {
2260 return [check_no_compiler_messages double64plus object {
2261 int dummy[sizeof(double) >= 8 ? 1 : -1];
2265 # Return 1 if the target supports 'w' suffix on floating constant
2268 proc check_effective_target_has_w_floating_suffix { } {
2270 if [check_effective_target_c++] {
2271 append opts "-std=gnu++03"
2273 return [check_no_compiler_messages w_fp_suffix object {
2278 # Return 1 if the target supports 'q' suffix on floating constant
2281 proc check_effective_target_has_q_floating_suffix { } {
2283 if [check_effective_target_c++] {
2284 append opts "-std=gnu++03"
2286 return [check_no_compiler_messages q_fp_suffix object {
2290 # Return 1 if the target supports compiling fixed-point,
2293 proc check_effective_target_fixed_point { } {
2294 return [check_no_compiler_messages fixed_point object {
2295 _Sat _Fract x; _Sat _Accum y;
2299 # Return 1 if the target supports compiling decimal floating point,
2302 proc check_effective_target_dfp_nocache { } {
2303 verbose "check_effective_target_dfp_nocache: compiling source" 2
2304 set ret [check_no_compiler_messages_nocache dfp object {
2305 float x __attribute__((mode(DD)));
2307 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2311 proc check_effective_target_dfprt_nocache { } {
2312 return [check_runtime_nocache dfprt {
2313 typedef float d64 __attribute__((mode(DD)));
2314 d64 x = 1.2df, y = 2.3dd, z;
2315 int main () { z = x + y; return 0; }
2319 # Return 1 if the target supports compiling Decimal Floating Point,
2322 # This won't change for different subtargets so cache the result.
2324 proc check_effective_target_dfp { } {
2325 return [check_cached_effective_target dfp {
2326 check_effective_target_dfp_nocache
2330 # Return 1 if the target supports linking and executing Decimal Floating
2331 # Point, 0 otherwise.
2333 # This won't change for different subtargets so cache the result.
2335 proc check_effective_target_dfprt { } {
2336 return [check_cached_effective_target dfprt {
2337 check_effective_target_dfprt_nocache
2341 # Return 1 if the target supports executing DFP hardware instructions,
2342 # 0 otherwise. Cache the result.
2344 proc check_dfp_hw_available { } {
2345 return [check_cached_effective_target dfp_hw_available {
2346 # For now, disable on Darwin
2347 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2350 check_runtime_nocache dfp_hw_available {
2351 volatile _Decimal64 r;
2352 volatile _Decimal64 a = 4.0DD;
2353 volatile _Decimal64 b = 2.0DD;
2356 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2357 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2358 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2359 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2362 } "-mcpu=power6 -mhard-float"
2367 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2369 proc check_effective_target_ucn_nocache { } {
2370 # -std=c99 is only valid for C
2371 if [check_effective_target_c] {
2372 set ucnopts "-std=c99"
2376 verbose "check_effective_target_ucn_nocache: compiling source" 2
2377 set ret [check_no_compiler_messages_nocache ucn object {
2380 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2384 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2386 # This won't change for different subtargets, so cache the result.
2388 proc check_effective_target_ucn { } {
2389 return [check_cached_effective_target ucn {
2390 check_effective_target_ucn_nocache
2394 # Return 1 if the target needs a command line argument to enable a SIMD
2397 proc check_effective_target_vect_cmdline_needed { } {
2398 global et_vect_cmdline_needed_saved
2399 global et_vect_cmdline_needed_target_name
2401 if { ![info exists et_vect_cmdline_needed_target_name] } {
2402 set et_vect_cmdline_needed_target_name ""
2405 # If the target has changed since we set the cached value, clear it.
2406 set current_target [current_target_name]
2407 if { $current_target != $et_vect_cmdline_needed_target_name } {
2408 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2409 set et_vect_cmdline_needed_target_name $current_target
2410 if { [info exists et_vect_cmdline_needed_saved] } {
2411 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2412 unset et_vect_cmdline_needed_saved
2416 if [info exists et_vect_cmdline_needed_saved] {
2417 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2419 set et_vect_cmdline_needed_saved 1
2420 if { [istarget alpha*-*-*]
2421 || [istarget ia64-*-*]
2422 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2423 && ([check_effective_target_x32]
2424 || [check_effective_target_lp64]))
2425 || ([istarget powerpc*-*-*]
2426 && ([check_effective_target_powerpc_spe]
2427 || [check_effective_target_powerpc_altivec]))
2428 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2429 || [istarget spu-*-*]
2430 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2431 || [istarget aarch64*-*-*] } {
2432 set et_vect_cmdline_needed_saved 0
2436 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2437 return $et_vect_cmdline_needed_saved
2440 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2442 # This won't change for different subtargets so cache the result.
2444 proc check_effective_target_vect_int { } {
2445 global et_vect_int_saved
2447 if [info exists et_vect_int_saved] {
2448 verbose "check_effective_target_vect_int: using cached result" 2
2450 set et_vect_int_saved 0
2451 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2452 || ([istarget powerpc*-*-*]
2453 && ![istarget powerpc-*-linux*paired*])
2454 || [istarget spu-*-*]
2455 || [istarget sparc*-*-*]
2456 || [istarget alpha*-*-*]
2457 || [istarget ia64-*-*]
2458 || [istarget aarch64*-*-*]
2459 || [check_effective_target_arm32]
2460 || ([istarget mips*-*-*]
2461 && [check_effective_target_mips_loongson]) } {
2462 set et_vect_int_saved 1
2466 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2467 return $et_vect_int_saved
2470 # Return 1 if the target supports signed int->float conversion
2473 proc check_effective_target_vect_intfloat_cvt { } {
2474 global et_vect_intfloat_cvt_saved
2476 if [info exists et_vect_intfloat_cvt_saved] {
2477 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2479 set et_vect_intfloat_cvt_saved 0
2480 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2481 || ([istarget powerpc*-*-*]
2482 && ![istarget powerpc-*-linux*paired*])
2483 || ([istarget arm*-*-*]
2484 && [check_effective_target_arm_neon_ok])} {
2485 set et_vect_intfloat_cvt_saved 1
2489 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2490 return $et_vect_intfloat_cvt_saved
2493 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2495 proc check_effective_target_int128 { } {
2496 return [check_no_compiler_messages int128 object {
2498 #ifndef __SIZEOF_INT128__
2507 # Return 1 if the target supports unsigned int->float conversion
2510 proc check_effective_target_vect_uintfloat_cvt { } {
2511 global et_vect_uintfloat_cvt_saved
2513 if [info exists et_vect_uintfloat_cvt_saved] {
2514 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2516 set et_vect_uintfloat_cvt_saved 0
2517 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2518 || ([istarget powerpc*-*-*]
2519 && ![istarget powerpc-*-linux*paired*])
2520 || [istarget aarch64*-*-*]
2521 || ([istarget arm*-*-*]
2522 && [check_effective_target_arm_neon_ok])} {
2523 set et_vect_uintfloat_cvt_saved 1
2527 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2528 return $et_vect_uintfloat_cvt_saved
2532 # Return 1 if the target supports signed float->int conversion
2535 proc check_effective_target_vect_floatint_cvt { } {
2536 global et_vect_floatint_cvt_saved
2538 if [info exists et_vect_floatint_cvt_saved] {
2539 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2541 set et_vect_floatint_cvt_saved 0
2542 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2543 || ([istarget powerpc*-*-*]
2544 && ![istarget powerpc-*-linux*paired*])
2545 || ([istarget arm*-*-*]
2546 && [check_effective_target_arm_neon_ok])} {
2547 set et_vect_floatint_cvt_saved 1
2551 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2552 return $et_vect_floatint_cvt_saved
2555 # Return 1 if the target supports unsigned float->int conversion
2558 proc check_effective_target_vect_floatuint_cvt { } {
2559 global et_vect_floatuint_cvt_saved
2561 if [info exists et_vect_floatuint_cvt_saved] {
2562 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2564 set et_vect_floatuint_cvt_saved 0
2565 if { ([istarget powerpc*-*-*]
2566 && ![istarget powerpc-*-linux*paired*])
2567 || ([istarget arm*-*-*]
2568 && [check_effective_target_arm_neon_ok])} {
2569 set et_vect_floatuint_cvt_saved 1
2573 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2574 return $et_vect_floatuint_cvt_saved
2577 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2579 # This won't change for different subtargets so cache the result.
2581 proc check_effective_target_vect_simd_clones { } {
2582 global et_vect_simd_clones_saved
2584 if [info exists et_vect_simd_clones_saved] {
2585 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2587 set et_vect_simd_clones_saved 0
2588 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2589 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2590 # avx2 clone. Only the right clone for the specified arch will be
2591 # chosen, but still we need to at least be able to assemble
2593 if { [check_effective_target_avx2] } {
2594 set et_vect_simd_clones_saved 1
2599 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2600 return $et_vect_simd_clones_saved
2603 # Return 1 if this is a AArch64 target supporting big endian
2604 proc check_effective_target_aarch64_big_endian { } {
2605 return [check_no_compiler_messages aarch64_big_endian assembly {
2606 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2607 #error !__aarch64__ || !__AARCH64EB__
2612 # Return 1 if this is a AArch64 target supporting little endian
2613 proc check_effective_target_aarch64_little_endian { } {
2614 if { ![istarget aarch64*-*-*] } {
2618 return [check_no_compiler_messages aarch64_little_endian assembly {
2619 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2625 # Return 1 if this is a compiler supporting ARC atomic operations
2626 proc check_effective_target_arc_atomic { } {
2627 return [check_no_compiler_messages arc_atomic assembly {
2628 #if !defined(__ARC_ATOMIC__)
2634 # Return 1 if this is an arm target using 32-bit instructions
2635 proc check_effective_target_arm32 { } {
2636 if { ![istarget arm*-*-*] } {
2640 return [check_no_compiler_messages arm32 assembly {
2641 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2642 #error !__arm || __thumb__ && !__thumb2__
2647 # Return 1 if this is an arm target not using Thumb
2648 proc check_effective_target_arm_nothumb { } {
2649 if { ![istarget arm*-*-*] } {
2653 return [check_no_compiler_messages arm_nothumb assembly {
2654 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2655 #error !__arm__ || __thumb || __thumb2__
2660 # Return 1 if this is a little-endian ARM target
2661 proc check_effective_target_arm_little_endian { } {
2662 if { ![istarget arm*-*-*] } {
2666 return [check_no_compiler_messages arm_little_endian assembly {
2667 #if !defined(__arm__) || !defined(__ARMEL__)
2668 #error !__arm__ || !__ARMEL__
2673 # Return 1 if this is an ARM target that only supports aligned vector accesses
2674 proc check_effective_target_arm_vect_no_misalign { } {
2675 if { ![istarget arm*-*-*] } {
2679 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2680 #if !defined(__arm__) \
2681 || (defined(__ARM_FEATURE_UNALIGNED) \
2682 && defined(__ARMEL__))
2683 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2689 # Return 1 if this is an ARM target supporting -mfpu=vfp
2690 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2693 proc check_effective_target_arm_vfp_ok { } {
2694 if { [check_effective_target_arm32] } {
2695 return [check_no_compiler_messages arm_vfp_ok object {
2697 } "-mfpu=vfp -mfloat-abi=softfp"]
2703 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2704 # -mfloat-abi=softfp.
2706 proc check_effective_target_arm_vfp3_ok { } {
2707 if { [check_effective_target_arm32] } {
2708 return [check_no_compiler_messages arm_vfp3_ok object {
2710 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2716 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2717 # -mfloat-abi=softfp.
2718 proc check_effective_target_arm_v8_vfp_ok {} {
2719 if { [check_effective_target_arm32] } {
2720 return [check_no_compiler_messages arm_v8_vfp_ok object {
2723 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2726 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2732 # Return 1 if this is an ARM target supporting -mfpu=vfp
2733 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2736 proc check_effective_target_arm_hard_vfp_ok { } {
2737 if { [check_effective_target_arm32]
2738 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2739 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2740 int main() { return 0;}
2741 } "-mfpu=vfp -mfloat-abi=hard"]
2747 # Return 1 if this is an ARM target that supports DSP multiply with
2748 # current multilib flags.
2750 proc check_effective_target_arm_dsp { } {
2751 return [check_no_compiler_messages arm_dsp assembly {
2752 #ifndef __ARM_FEATURE_DSP
2759 # Return 1 if this is an ARM target that supports unaligned word/halfword
2760 # load/store instructions.
2762 proc check_effective_target_arm_unaligned { } {
2763 return [check_no_compiler_messages arm_unaligned assembly {
2764 #ifndef __ARM_FEATURE_UNALIGNED
2765 #error no unaligned support
2771 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2772 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2773 # incompatible with these options. Also set et_arm_crypto_flags to the
2774 # best options to add.
2776 proc check_effective_target_arm_crypto_ok_nocache { } {
2777 global et_arm_crypto_flags
2778 set et_arm_crypto_flags ""
2779 if { [check_effective_target_arm32] } {
2780 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2781 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2782 #include "arm_neon.h"
2784 foo (uint8x16_t a, uint8x16_t b)
2786 return vaeseq_u8 (a, b);
2789 set et_arm_crypto_flags $flags
2798 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2800 proc check_effective_target_arm_crypto_ok { } {
2801 return [check_cached_effective_target arm_crypto_ok \
2802 check_effective_target_arm_crypto_ok_nocache]
2805 # Add options for crypto extensions.
2806 proc add_options_for_arm_crypto { flags } {
2807 if { ! [check_effective_target_arm_crypto_ok] } {
2810 global et_arm_crypto_flags
2811 return "$flags $et_arm_crypto_flags"
2814 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2815 # or -mfloat-abi=hard, but if one is already specified by the
2816 # multilib, use it. Similarly, if a -mfpu option already enables
2817 # NEON, do not add -mfpu=neon.
2819 proc add_options_for_arm_neon { flags } {
2820 if { ! [check_effective_target_arm_neon_ok] } {
2823 global et_arm_neon_flags
2824 return "$flags $et_arm_neon_flags"
2827 proc add_options_for_arm_v8_vfp { flags } {
2828 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2831 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2834 proc add_options_for_arm_v8_neon { flags } {
2835 if { ! [check_effective_target_arm_v8_neon_ok] } {
2838 global et_arm_v8_neon_flags
2839 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2842 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
2843 # options for AArch64 and for ARM.
2845 proc add_options_for_arm_v8_1a_neon { flags } {
2846 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
2849 global et_arm_v8_1a_neon_flags
2850 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
2853 proc add_options_for_arm_crc { flags } {
2854 if { ! [check_effective_target_arm_crc_ok] } {
2857 global et_arm_crc_flags
2858 return "$flags $et_arm_crc_flags"
2861 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2862 # or -mfloat-abi=hard, but if one is already specified by the
2863 # multilib, use it. Similarly, if a -mfpu option already enables
2864 # NEON, do not add -mfpu=neon.
2866 proc add_options_for_arm_neonv2 { flags } {
2867 if { ! [check_effective_target_arm_neonv2_ok] } {
2870 global et_arm_neonv2_flags
2871 return "$flags $et_arm_neonv2_flags"
2874 # Add the options needed for vfp3.
2875 proc add_options_for_arm_vfp3 { flags } {
2876 if { ! [check_effective_target_arm_vfp3_ok] } {
2879 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2882 # Return 1 if this is an ARM target supporting -mfpu=neon
2883 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2884 # incompatible with these options. Also set et_arm_neon_flags to the
2885 # best options to add.
2887 proc check_effective_target_arm_neon_ok_nocache { } {
2888 global et_arm_neon_flags
2889 set et_arm_neon_flags ""
2890 if { [check_effective_target_arm32] } {
2891 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2892 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2894 #ifndef __ARM_NEON__
2897 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
2898 configured for -mcpu=arm926ej-s, for example. */
2899 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
2900 #error Architecture does not support NEON.
2903 set et_arm_neon_flags $flags
2912 proc check_effective_target_arm_neon_ok { } {
2913 return [check_cached_effective_target arm_neon_ok \
2914 check_effective_target_arm_neon_ok_nocache]
2917 proc check_effective_target_arm_crc_ok_nocache { } {
2918 global et_arm_crc_flags
2919 set et_arm_crc_flags "-march=armv8-a+crc"
2920 return [check_no_compiler_messages_nocache arm_crc_ok object {
2921 #if !defined (__ARM_FEATURE_CRC32)
2924 } "$et_arm_crc_flags"]
2927 proc check_effective_target_arm_crc_ok { } {
2928 return [check_cached_effective_target arm_crc_ok \
2929 check_effective_target_arm_crc_ok_nocache]
2932 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2933 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2934 # incompatible with these options. Also set et_arm_neon_flags to the
2935 # best options to add.
2937 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2938 global et_arm_neon_fp16_flags
2939 set et_arm_neon_fp16_flags ""
2940 if { [check_effective_target_arm32] } {
2941 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2942 "-mfpu=neon-fp16 -mfloat-abi=softfp"
2943 "-mfp16-format=ieee"
2944 "-mfloat-abi=softfp -mfp16-format=ieee"
2945 "-mfpu=neon-fp16 -mfp16-format=ieee"
2946 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
2947 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2948 #include "arm_neon.h"
2950 foo (float32x4_t arg)
2952 return vcvt_f16_f32 (arg);
2955 set et_arm_neon_fp16_flags $flags
2964 proc check_effective_target_arm_neon_fp16_ok { } {
2965 return [check_cached_effective_target arm_neon_fp16_ok \
2966 check_effective_target_arm_neon_fp16_ok_nocache]
2969 proc check_effective_target_arm_neon_fp16_hw { } {
2970 if {! [check_effective_target_arm_neon_fp16_ok] } {
2973 global et_arm_neon_fp16_flags
2974 check_runtime_nocache arm_neon_fp16_hw {
2976 main (int argc, char **argv)
2978 asm ("vcvt.f32.f16 q1, d0");
2981 } $et_arm_neon_fp16_flags
2984 proc add_options_for_arm_neon_fp16 { flags } {
2985 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2988 global et_arm_neon_fp16_flags
2989 return "$flags $et_arm_neon_fp16_flags"
2992 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2993 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2994 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2995 # best options to add.
2997 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2998 global et_arm_v8_neon_flags
2999 set et_arm_v8_neon_flags ""
3000 if { [check_effective_target_arm32] } {
3001 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3002 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3004 #error not armv8 or later
3006 #include "arm_neon.h"
3010 __asm__ volatile ("vrintn.f32 q0, q0");
3012 } "$flags -march=armv8-a"] } {
3013 set et_arm_v8_neon_flags $flags
3022 proc check_effective_target_arm_v8_neon_ok { } {
3023 return [check_cached_effective_target arm_v8_neon_ok \
3024 check_effective_target_arm_v8_neon_ok_nocache]
3027 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3028 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3029 # incompatible with these options. Also set et_arm_neonv2_flags to the
3030 # best options to add.
3032 proc check_effective_target_arm_neonv2_ok_nocache { } {
3033 global et_arm_neonv2_flags
3034 set et_arm_neonv2_flags ""
3035 if { [check_effective_target_arm32] } {
3036 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3037 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3038 #include "arm_neon.h"
3040 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3042 return vfma_f32 (a, b, c);
3045 set et_arm_neonv2_flags $flags
3054 proc check_effective_target_arm_neonv2_ok { } {
3055 return [check_cached_effective_target arm_neonv2_ok \
3056 check_effective_target_arm_neonv2_ok_nocache]
3059 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3060 # or -mfloat-abi=hard, but if one is already specified by the
3063 proc add_options_for_arm_fp16 { flags } {
3064 if { ! [check_effective_target_arm_fp16_ok] } {
3067 global et_arm_fp16_flags
3068 return "$flags $et_arm_fp16_flags"
3071 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3072 # Skip multilibs that are incompatible with these options and set
3073 # et_arm_fp16_flags to the best options to add.
3075 proc check_effective_target_arm_fp16_ok_nocache { } {
3076 global et_arm_fp16_flags
3077 set et_arm_fp16_flags ""
3078 if { ! [check_effective_target_arm32] } {
3081 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
3082 # Multilib flags would override -mfpu.
3085 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3086 # Must generate floating-point instructions.
3089 if [check_effective_target_arm_hf_eabi] {
3090 # Use existing float-abi and force an fpu which supports fp16
3091 set et_arm_fp16_flags "-mfpu=vfpv4"
3094 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3095 # The existing -mfpu value is OK; use it, but add softfp.
3096 set et_arm_fp16_flags "-mfloat-abi=softfp"
3099 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3100 # macro to check for this support.
3101 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3102 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3105 set et_arm_fp16_flags "$flags"
3112 proc check_effective_target_arm_fp16_ok { } {
3113 return [check_cached_effective_target arm_fp16_ok \
3114 check_effective_target_arm_fp16_ok_nocache]
3117 # Creates a series of routines that return 1 if the given architecture
3118 # can be selected and a routine to give the flags to select that architecture
3119 # Note: Extra flags may be added to disable options from newer compilers
3120 # (Thumb in particular - but others may be added in the future)
3121 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3122 # /* { dg-add-options arm_arch_v5 } */
3123 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3124 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
3125 v4t "-march=armv4t" __ARM_ARCH_4T__
3126 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3127 v5t "-march=armv5t" __ARM_ARCH_5T__
3128 v5te "-march=armv5te" __ARM_ARCH_5TE__
3129 v6 "-march=armv6" __ARM_ARCH_6__
3130 v6k "-march=armv6k" __ARM_ARCH_6K__
3131 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3132 v6z "-march=armv6z" __ARM_ARCH_6Z__
3133 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
3134 v7a "-march=armv7-a" __ARM_ARCH_7A__
3135 v7ve "-march=armv7ve" __ARM_ARCH_7A__
3136 v7r "-march=armv7-r" __ARM_ARCH_7R__
3137 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3138 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3139 v8a "-march=armv8-a" __ARM_ARCH_8A__
3140 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
3141 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3142 proc check_effective_target_arm_arch_FUNC_ok { } {
3143 if { [ string match "*-marm*" "FLAG" ] &&
3144 ![check_effective_target_arm_arm_ok] } {
3147 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3154 proc add_options_for_arm_arch_FUNC { flags } {
3155 return "$flags FLAG"
3158 proc check_effective_target_arm_arch_FUNC_multilib { } {
3159 return [check_runtime arm_arch_FUNC_multilib {
3165 } [add_options_for_arm_arch_FUNC ""]]
3170 # Return 1 if this is an ARM target where -marm causes ARM to be
3173 proc check_effective_target_arm_arm_ok { } {
3174 return [check_no_compiler_messages arm_arm_ok assembly {
3175 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3176 #error !__arm__ || __thumb__ || __thumb2__
3182 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3185 proc check_effective_target_arm_thumb1_ok { } {
3186 return [check_no_compiler_messages arm_thumb1_ok assembly {
3187 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3188 #error !__arm__ || !__thumb__ || __thumb2__
3190 int foo (int i) { return i; }
3194 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3197 proc check_effective_target_arm_thumb2_ok { } {
3198 return [check_no_compiler_messages arm_thumb2_ok assembly {
3199 #if !defined(__thumb2__)
3202 int foo (int i) { return i; }
3206 # Return 1 if this is an ARM target where Thumb-1 is used without options
3207 # added by the test.
3209 proc check_effective_target_arm_thumb1 { } {
3210 return [check_no_compiler_messages arm_thumb1 assembly {
3211 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3212 #error !__arm__ || !__thumb__ || __thumb2__
3218 # Return 1 if this is an ARM target where Thumb-2 is used without options
3219 # added by the test.
3221 proc check_effective_target_arm_thumb2 { } {
3222 return [check_no_compiler_messages arm_thumb2 assembly {
3223 #if !defined(__thumb2__)
3230 # Return 1 if this is an ARM target where conditional execution is available.
3232 proc check_effective_target_arm_cond_exec { } {
3233 return [check_no_compiler_messages arm_cond_exec assembly {
3234 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3241 # Return 1 if this is an ARM cortex-M profile cpu
3243 proc check_effective_target_arm_cortex_m { } {
3244 if { ![istarget arm*-*-*] } {
3247 return [check_no_compiler_messages arm_cortex_m assembly {
3248 #if !defined(__ARM_ARCH_7M__) \
3249 && !defined (__ARM_ARCH_7EM__) \
3250 && !defined (__ARM_ARCH_6M__)
3251 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
3257 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3259 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3260 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3261 int foo (void) { return 0; }
3262 } "-O2 -mprint-tune-info" ]
3265 # Return 1 if the target supports executing NEON instructions, 0
3266 # otherwise. Cache the result.
3268 proc check_effective_target_arm_neon_hw { } {
3269 return [check_runtime arm_neon_hw_available {
3273 long long a = 0, b = 1;
3274 asm ("vorr %P0, %P1, %P2"
3276 : "0" (a), "w" (b));
3279 } [add_options_for_arm_neon ""]]
3282 proc check_effective_target_arm_neonv2_hw { } {
3283 return [check_runtime arm_neon_hwv2_available {
3284 #include "arm_neon.h"
3288 float32x2_t a, b, c;
3289 asm ("vfma.f32 %P0, %P1, %P2"
3291 : "w" (b), "w" (c));
3294 } [add_options_for_arm_neonv2 ""]]
3297 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
3298 # otherwise. The test is valid for AArch64 and ARM. Record the command
3299 # line options needed.
3301 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
3302 global et_arm_v8_1a_neon_flags
3303 set et_arm_v8_1a_neon_flags ""
3305 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
3309 # Iterate through sets of options to find the compiler flags that
3310 # need to be added to the -march option. Start with the empty set
3311 # since AArch64 only needs the -march setting.
3312 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
3313 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3314 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
3315 #if !defined (__ARM_FEATURE_QRDMX)
3316 #error "__ARM_FEATURE_QRDMX not defined"
3318 } "$flags -march=armv8.1-a"] } {
3319 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
3327 proc check_effective_target_arm_v8_1a_neon_ok { } {
3328 return [check_cached_effective_target arm_v8_1a_neon_ok \
3329 check_effective_target_arm_v8_1a_neon_ok_nocache]
3332 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3335 proc check_effective_target_arm_v8_neon_hw { } {
3336 return [check_runtime arm_v8_neon_hw_available {
3337 #include "arm_neon.h"
3342 asm ("vrinta.f32 %P0, %P1"
3347 } [add_options_for_arm_v8_neon ""]]
3350 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
3351 # otherwise. The test is valid for AArch64 and ARM.
3353 proc check_effective_target_arm_v8_1a_neon_hw { } {
3354 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
3357 return [check_runtime arm_v8_1a_neon_hw_available {
3361 #ifdef __ARM_ARCH_ISA_A64
3362 __Int32x2_t a = {0, 1};
3363 __Int32x2_t b = {0, 2};
3366 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
3369 : /* No clobbers. */);
3373 __simd64_int32_t a = {0, 1};
3374 __simd64_int32_t b = {0, 2};
3375 __simd64_int32_t result;
3377 asm ("vqrdmlah.s32 %P0, %P1, %P2"
3380 : /* No clobbers. */);
3385 } [add_options_for_arm_v8_1a_neon ""]]
3388 # Return 1 if this is a ARM target with NEON enabled.
3390 proc check_effective_target_arm_neon { } {
3391 if { [check_effective_target_arm32] } {
3392 return [check_no_compiler_messages arm_neon object {
3393 #ifndef __ARM_NEON__
3404 proc check_effective_target_arm_neonv2 { } {
3405 if { [check_effective_target_arm32] } {
3406 return [check_no_compiler_messages arm_neon object {
3407 #ifndef __ARM_NEON__
3410 #ifndef __ARM_FEATURE_FMA
3422 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3423 # the Loongson vector modes.
3425 proc check_effective_target_mips_loongson { } {
3426 return [check_no_compiler_messages loongson assembly {
3427 #if !defined(__mips_loongson_vector_rev)
3428 #error !__mips_loongson_vector_rev
3433 # Return 1 if this is a MIPS target that supports the legacy NAN.
3435 proc check_effective_target_mips_nanlegacy { } {
3436 return [check_no_compiler_messages nanlegacy assembly {
3438 int main () { return 0; }
3442 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3445 proc check_effective_target_arm_eabi { } {
3446 return [check_no_compiler_messages arm_eabi object {
3447 #ifndef __ARM_EABI__
3455 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3456 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3458 proc check_effective_target_arm_hf_eabi { } {
3459 return [check_no_compiler_messages arm_hf_eabi object {
3460 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3461 #error not hard-float EABI
3468 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3469 # Some multilibs may be incompatible with this option.
3471 proc check_effective_target_arm_iwmmxt_ok { } {
3472 if { [check_effective_target_arm32] } {
3473 return [check_no_compiler_messages arm_iwmmxt_ok object {
3481 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3482 # for an ARM target.
3483 proc check_effective_target_arm_prefer_ldrd_strd { } {
3484 if { ![check_effective_target_arm32] } {
3488 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3489 void foo (int *p) { p[0] = 1; p[1] = 0;}
3493 # Return 1 if this is a PowerPC target supporting -meabi.
3495 proc check_effective_target_powerpc_eabi_ok { } {
3496 if { [istarget powerpc*-*-*] } {
3497 return [check_no_compiler_messages powerpc_eabi_ok object {
3505 # Return 1 if this is a PowerPC target with floating-point registers.
3507 proc check_effective_target_powerpc_fprs { } {
3508 if { [istarget powerpc*-*-*]
3509 || [istarget rs6000-*-*] } {
3510 return [check_no_compiler_messages powerpc_fprs object {
3522 # Return 1 if this is a PowerPC target with hardware double-precision
3525 proc check_effective_target_powerpc_hard_double { } {
3526 if { [istarget powerpc*-*-*]
3527 || [istarget rs6000-*-*] } {
3528 return [check_no_compiler_messages powerpc_hard_double object {
3540 # Return 1 if this is a PowerPC target supporting -maltivec.
3542 proc check_effective_target_powerpc_altivec_ok { } {
3543 if { ([istarget powerpc*-*-*]
3544 && ![istarget powerpc-*-linux*paired*])
3545 || [istarget rs6000-*-*] } {
3546 # AltiVec is not supported on AIX before 5.3.
3547 if { [istarget powerpc*-*-aix4*]
3548 || [istarget powerpc*-*-aix5.1*]
3549 || [istarget powerpc*-*-aix5.2*] } {
3552 return [check_no_compiler_messages powerpc_altivec_ok object {
3560 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3562 proc check_effective_target_powerpc_p8vector_ok { } {
3563 if { ([istarget powerpc*-*-*]
3564 && ![istarget powerpc-*-linux*paired*])
3565 || [istarget rs6000-*-*] } {
3566 # AltiVec is not supported on AIX before 5.3.
3567 if { [istarget powerpc*-*-aix4*]
3568 || [istarget powerpc*-*-aix5.1*]
3569 || [istarget powerpc*-*-aix5.2*] } {
3572 return [check_no_compiler_messages powerpc_p8vector_ok object {
3575 asm volatile ("xxlorc vs0,vs0,vs0");
3577 asm volatile ("xxlorc 0,0,0");
3581 } "-mpower8-vector"]
3587 # Return 1 if this is a PowerPC target supporting -mpower9-vector
3589 proc check_effective_target_powerpc_p9vector_ok { } {
3590 if { ([istarget powerpc*-*-*]
3591 && ![istarget powerpc-*-linux*paired*])
3592 || [istarget rs6000-*-*] } {
3593 # AltiVec is not supported on AIX before 5.3.
3594 if { [istarget powerpc*-*-aix4*]
3595 || [istarget powerpc*-*-aix5.1*]
3596 || [istarget powerpc*-*-aix5.2*] } {
3599 return [check_no_compiler_messages powerpc_p9vector_ok object {
3602 vector double v = (vector double) { 0.0, 0.0 };
3603 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
3606 } "-mpower9-vector"]
3612 # Return 1 if this is a PowerPC target supporting -mmodulo
3614 proc check_effective_target_powerpc_p9modulo_ok { } {
3615 if { ([istarget powerpc*-*-*]
3616 && ![istarget powerpc-*-linux*paired*])
3617 || [istarget rs6000-*-*] } {
3618 # AltiVec is not supported on AIX before 5.3.
3619 if { [istarget powerpc*-*-aix4*]
3620 || [istarget powerpc*-*-aix5.1*]
3621 || [istarget powerpc*-*-aix5.2*] } {
3624 return [check_no_compiler_messages powerpc_p9modulo_ok object {
3626 int i = 5, j = 3, r = -1;
3627 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
3636 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
3637 # software emulation on power7/power8 systems or hardware support on power9.
3639 proc check_effective_target_powerpc_float128_sw_ok { } {
3640 if { ([istarget powerpc*-*-*]
3641 && ![istarget powerpc-*-linux*paired*])
3642 || [istarget rs6000-*-*] } {
3643 # AltiVec is not supported on AIX before 5.3.
3644 if { [istarget powerpc*-*-aix4*]
3645 || [istarget powerpc*-*-aix5.1*]
3646 || [istarget powerpc*-*-aix5.2*] } {
3649 return [check_no_compiler_messages powerpc_float128_sw_ok object {
3650 volatile __float128 x = 1.0q;
3651 volatile __float128 y = 2.0q;
3653 __float128 z = x + y;
3656 } "-mfloat128 -mvsx"]
3662 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
3663 # support on power9.
3665 proc check_effective_target_powerpc_float128_hw_ok { } {
3666 if { ([istarget powerpc*-*-*]
3667 && ![istarget powerpc-*-linux*paired*])
3668 || [istarget rs6000-*-*] } {
3669 # AltiVec is not supported on AIX before 5.3.
3670 if { [istarget powerpc*-*-aix4*]
3671 || [istarget powerpc*-*-aix5.1*]
3672 || [istarget powerpc*-*-aix5.2*] } {
3675 return [check_no_compiler_messages powerpc_float128_hw_ok object {
3676 volatile __float128 x = 1.0q;
3677 volatile __float128 y = 2.0q;
3680 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
3683 } "-mfloat128-hardware"]
3689 # Return 1 if this is a PowerPC target supporting -mvsx
3691 proc check_effective_target_powerpc_vsx_ok { } {
3692 if { ([istarget powerpc*-*-*]
3693 && ![istarget powerpc-*-linux*paired*])
3694 || [istarget rs6000-*-*] } {
3695 # VSX is not supported on AIX before 7.1.
3696 if { [istarget powerpc*-*-aix4*]
3697 || [istarget powerpc*-*-aix5*]
3698 || [istarget powerpc*-*-aix6*] } {
3701 return [check_no_compiler_messages powerpc_vsx_ok object {
3704 asm volatile ("xxlor vs0,vs0,vs0");
3706 asm volatile ("xxlor 0,0,0");
3716 # Return 1 if this is a PowerPC target supporting -mhtm
3718 proc check_effective_target_powerpc_htm_ok { } {
3719 if { ([istarget powerpc*-*-*]
3720 && ![istarget powerpc-*-linux*paired*])
3721 || [istarget rs6000-*-*] } {
3722 # HTM is not supported on AIX yet.
3723 if { [istarget powerpc*-*-aix*] } {
3726 return [check_no_compiler_messages powerpc_htm_ok object {
3728 asm volatile ("tbegin. 0");
3737 # Return 1 if the target supports executing HTM hardware instructions,
3738 # 0 otherwise. Cache the result.
3740 proc check_htm_hw_available { } {
3741 return [check_cached_effective_target htm_hw_available {
3742 # For now, disable on Darwin
3743 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3746 check_runtime_nocache htm_hw_available {
3756 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3758 proc check_effective_target_powerpc_ppu_ok { } {
3759 if [check_effective_target_powerpc_altivec_ok] {
3760 return [check_no_compiler_messages cell_asm_available object {
3763 asm volatile ("lvlx v0,v0,v0");
3765 asm volatile ("lvlx 0,0,0");
3775 # Return 1 if this is a PowerPC target that supports SPU.
3777 proc check_effective_target_powerpc_spu { } {
3778 if { [istarget powerpc*-*-linux*] } {
3779 return [check_effective_target_powerpc_altivec_ok]
3785 # Return 1 if this is a PowerPC SPE target. The check includes options
3786 # specified by dg-options for this test, so don't cache the result.
3788 proc check_effective_target_powerpc_spe_nocache { } {
3789 if { [istarget powerpc*-*-*] } {
3790 return [check_no_compiler_messages_nocache powerpc_spe object {
3796 } [current_compiler_flags]]
3802 # Return 1 if this is a PowerPC target with SPE enabled.
3804 proc check_effective_target_powerpc_spe { } {
3805 if { [istarget powerpc*-*-*] } {
3806 return [check_no_compiler_messages powerpc_spe object {
3818 # Return 1 if this is a PowerPC target with Altivec enabled.
3820 proc check_effective_target_powerpc_altivec { } {
3821 if { [istarget powerpc*-*-*] } {
3822 return [check_no_compiler_messages powerpc_altivec object {
3834 # Return 1 if this is a PowerPC 405 target. The check includes options
3835 # specified by dg-options for this test, so don't cache the result.
3837 proc check_effective_target_powerpc_405_nocache { } {
3838 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3839 return [check_no_compiler_messages_nocache powerpc_405 object {
3845 } [current_compiler_flags]]
3851 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3853 proc check_effective_target_powerpc_elfv2 { } {
3854 if { [istarget powerpc*-*-*] } {
3855 return [check_no_compiler_messages powerpc_elfv2 object {
3857 #error not ELF v2 ABI
3867 # Return 1 if this is a SPU target with a toolchain that
3868 # supports automatic overlay generation.
3870 proc check_effective_target_spu_auto_overlay { } {
3871 if { [istarget spu*-*-elf*] } {
3872 return [check_no_compiler_messages spu_auto_overlay executable {
3874 } "-Wl,--auto-overlay" ]
3880 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3881 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3882 # test environment appears to run executables on such a simulator.
3884 proc check_effective_target_ultrasparc_hw { } {
3885 return [check_runtime ultrasparc_hw {
3886 int main() { return 0; }
3887 } "-mcpu=ultrasparc"]
3890 # Return 1 if the test environment supports executing UltraSPARC VIS2
3891 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3893 proc check_effective_target_ultrasparc_vis2_hw { } {
3894 return [check_runtime ultrasparc_vis2_hw {
3895 int main() { __asm__(".word 0x81b00320"); return 0; }
3896 } "-mcpu=ultrasparc3"]
3899 # Return 1 if the test environment supports executing UltraSPARC VIS3
3900 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3902 proc check_effective_target_ultrasparc_vis3_hw { } {
3903 return [check_runtime ultrasparc_vis3_hw {
3904 int main() { __asm__(".word 0x81b00220"); return 0; }
3908 # Return 1 if this is a SPARC-V9 target.
3910 proc check_effective_target_sparc_v9 { } {
3911 if { [istarget sparc*-*-*] } {
3912 return [check_no_compiler_messages sparc_v9 object {
3914 asm volatile ("return %i7+8");
3923 # Return 1 if this is a SPARC target with VIS enabled.
3925 proc check_effective_target_sparc_vis { } {
3926 if { [istarget sparc*-*-*] } {
3927 return [check_no_compiler_messages sparc_vis object {
3939 # Return 1 if the target supports hardware vector shift operation.
3941 proc check_effective_target_vect_shift { } {
3942 global et_vect_shift_saved
3944 if [info exists et_vect_shift_saved] {
3945 verbose "check_effective_target_vect_shift: using cached result" 2
3947 set et_vect_shift_saved 0
3948 if { ([istarget powerpc*-*-*]
3949 && ![istarget powerpc-*-linux*paired*])
3950 || [istarget ia64-*-*]
3951 || [istarget i?86-*-*] || [istarget x86_64-*-*]
3952 || [istarget aarch64*-*-*]
3953 || [check_effective_target_arm32]
3954 || ([istarget mips*-*-*]
3955 && [check_effective_target_mips_loongson]) } {
3956 set et_vect_shift_saved 1
3960 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3961 return $et_vect_shift_saved
3964 proc check_effective_target_whole_vector_shift { } {
3965 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3966 || [istarget ia64-*-*]
3967 || [istarget aarch64*-*-*]
3968 || ([check_effective_target_arm32]
3969 && [check_effective_target_arm_little_endian])
3970 || ([istarget mips*-*-*]
3971 && [check_effective_target_mips_loongson]) } {
3977 verbose "check_effective_target_vect_long: returning $answer" 2
3981 # Return 1 if the target supports vector bswap operations.
3983 proc check_effective_target_vect_bswap { } {
3984 global et_vect_bswap_saved
3986 if [info exists et_vect_bswap_saved] {
3987 verbose "check_effective_target_vect_bswap: using cached result" 2
3989 set et_vect_bswap_saved 0
3990 if { [istarget aarch64*-*-*]
3991 || ([istarget arm*-*-*]
3992 && [check_effective_target_arm_neon])
3994 set et_vect_bswap_saved 1
3998 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3999 return $et_vect_bswap_saved
4002 # Return 1 if the target supports hardware vector shift operation for char.
4004 proc check_effective_target_vect_shift_char { } {
4005 global et_vect_shift_char_saved
4007 if [info exists et_vect_shift_char_saved] {
4008 verbose "check_effective_target_vect_shift_char: using cached result" 2
4010 set et_vect_shift_char_saved 0
4011 if { ([istarget powerpc*-*-*]
4012 && ![istarget powerpc-*-linux*paired*])
4013 || [check_effective_target_arm32] } {
4014 set et_vect_shift_char_saved 1
4018 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
4019 return $et_vect_shift_char_saved
4022 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4024 # This can change for different subtargets so do not cache the result.
4026 proc check_effective_target_vect_long { } {
4027 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4028 || (([istarget powerpc*-*-*]
4029 && ![istarget powerpc-*-linux*paired*])
4030 && [check_effective_target_ilp32])
4031 || [check_effective_target_arm32]
4032 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
4038 verbose "check_effective_target_vect_long: returning $answer" 2
4042 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
4044 # This won't change for different subtargets so cache the result.
4046 proc check_effective_target_vect_float { } {
4047 global et_vect_float_saved
4049 if [info exists et_vect_float_saved] {
4050 verbose "check_effective_target_vect_float: using cached result" 2
4052 set et_vect_float_saved 0
4053 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4054 || [istarget powerpc*-*-*]
4055 || [istarget spu-*-*]
4056 || [istarget mips-sde-elf]
4057 || [istarget mipsisa64*-*-*]
4058 || [istarget ia64-*-*]
4059 || [istarget aarch64*-*-*]
4060 || [check_effective_target_arm32] } {
4061 set et_vect_float_saved 1
4065 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
4066 return $et_vect_float_saved
4069 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
4071 # This won't change for different subtargets so cache the result.
4073 proc check_effective_target_vect_double { } {
4074 global et_vect_double_saved
4076 if [info exists et_vect_double_saved] {
4077 verbose "check_effective_target_vect_double: using cached result" 2
4079 set et_vect_double_saved 0
4080 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4081 || [istarget aarch64*-*-*] } {
4082 if { [check_no_compiler_messages vect_double assembly {
4083 #ifdef __tune_atom__
4084 # error No double vectorizer support.
4087 set et_vect_double_saved 1
4089 set et_vect_double_saved 0
4091 } elseif { [istarget spu-*-*] } {
4092 set et_vect_double_saved 1
4093 } elseif { [istarget powerpc*-*-*] && [check_vsx_hw_available] } {
4094 set et_vect_double_saved 1
4098 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
4099 return $et_vect_double_saved
4102 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
4104 # This won't change for different subtargets so cache the result.
4106 proc check_effective_target_vect_long_long { } {
4107 global et_vect_long_long_saved
4109 if [info exists et_vect_long_long_saved] {
4110 verbose "check_effective_target_vect_long_long: using cached result" 2
4112 set et_vect_long_long_saved 0
4113 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4114 set et_vect_long_long_saved 1
4118 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
4119 return $et_vect_long_long_saved
4123 # Return 1 if the target plus current options does not support a vector
4124 # max instruction on "int", 0 otherwise.
4126 # This won't change for different subtargets so cache the result.
4128 proc check_effective_target_vect_no_int_min_max { } {
4129 global et_vect_no_int_min_max_saved
4131 if [info exists et_vect_no_int_min_max_saved] {
4132 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
4134 set et_vect_no_int_min_max_saved 0
4135 if { [istarget sparc*-*-*]
4136 || [istarget spu-*-*]
4137 || [istarget alpha*-*-*]
4138 || ([istarget mips*-*-*]
4139 && [check_effective_target_mips_loongson]) } {
4140 set et_vect_no_int_min_max_saved 1
4143 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
4144 return $et_vect_no_int_min_max_saved
4147 # Return 1 if the target plus current options does not support a vector
4148 # add instruction on "int", 0 otherwise.
4150 # This won't change for different subtargets so cache the result.
4152 proc check_effective_target_vect_no_int_add { } {
4153 global et_vect_no_int_add_saved
4155 if [info exists et_vect_no_int_add_saved] {
4156 verbose "check_effective_target_vect_no_int_add: using cached result" 2
4158 set et_vect_no_int_add_saved 0
4159 # Alpha only supports vector add on V8QI and V4HI.
4160 if { [istarget alpha*-*-*] } {
4161 set et_vect_no_int_add_saved 1
4164 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
4165 return $et_vect_no_int_add_saved
4168 # Return 1 if the target plus current options does not support vector
4169 # bitwise instructions, 0 otherwise.
4171 # This won't change for different subtargets so cache the result.
4173 proc check_effective_target_vect_no_bitwise { } {
4174 global et_vect_no_bitwise_saved
4176 if [info exists et_vect_no_bitwise_saved] {
4177 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
4179 set et_vect_no_bitwise_saved 0
4181 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
4182 return $et_vect_no_bitwise_saved
4185 # Return 1 if the target plus current options supports vector permutation,
4188 # This won't change for different subtargets so cache the result.
4190 proc check_effective_target_vect_perm { } {
4193 if [info exists et_vect_perm_saved] {
4194 verbose "check_effective_target_vect_perm: using cached result" 2
4196 set et_vect_perm_saved 0
4197 if { [is-effective-target arm_neon_ok]
4198 || [istarget aarch64*-*-*]
4199 || [istarget powerpc*-*-*]
4200 || [istarget spu-*-*]
4201 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4202 || ([istarget mips*-*-*]
4203 && [check_effective_target_mpaired_single]) } {
4204 set et_vect_perm_saved 1
4207 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
4208 return $et_vect_perm_saved
4211 # Return 1 if the target plus current options supports vector permutation
4212 # on byte-sized elements, 0 otherwise.
4214 # This won't change for different subtargets so cache the result.
4216 proc check_effective_target_vect_perm_byte { } {
4217 global et_vect_perm_byte
4219 if [info exists et_vect_perm_byte_saved] {
4220 verbose "check_effective_target_vect_perm_byte: using cached result" 2
4222 set et_vect_perm_byte_saved 0
4223 if { ([is-effective-target arm_neon_ok]
4224 && [is-effective-target arm_little_endian])
4225 || ([istarget aarch64*-*-*]
4226 && [is-effective-target aarch64_little_endian])
4227 || [istarget powerpc*-*-*]
4228 || [istarget spu-*-*] } {
4229 set et_vect_perm_byte_saved 1
4232 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
4233 return $et_vect_perm_byte_saved
4236 # Return 1 if the target plus current options supports vector permutation
4237 # on short-sized elements, 0 otherwise.
4239 # This won't change for different subtargets so cache the result.
4241 proc check_effective_target_vect_perm_short { } {
4242 global et_vect_perm_short
4244 if [info exists et_vect_perm_short_saved] {
4245 verbose "check_effective_target_vect_perm_short: using cached result" 2
4247 set et_vect_perm_short_saved 0
4248 if { ([is-effective-target arm_neon_ok]
4249 && [is-effective-target arm_little_endian])
4250 || ([istarget aarch64*-*-*]
4251 && [is-effective-target aarch64_little_endian])
4252 || [istarget powerpc*-*-*]
4253 || [istarget spu-*-*] } {
4254 set et_vect_perm_short_saved 1
4257 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
4258 return $et_vect_perm_short_saved
4261 # Return 1 if the target plus current options supports a vector
4262 # widening summation of *short* args into *int* result, 0 otherwise.
4264 # This won't change for different subtargets so cache the result.
4266 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
4267 global et_vect_widen_sum_hi_to_si_pattern
4269 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
4270 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
4272 set et_vect_widen_sum_hi_to_si_pattern_saved 0
4273 if { [istarget powerpc*-*-*]
4274 || [istarget aarch64*-*-*]
4275 || [istarget ia64-*-*] } {
4276 set et_vect_widen_sum_hi_to_si_pattern_saved 1
4279 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
4280 return $et_vect_widen_sum_hi_to_si_pattern_saved
4283 # Return 1 if the target plus current options supports a vector
4284 # widening summation of *short* args into *int* result, 0 otherwise.
4285 # A target can also support this widening summation if it can support
4286 # promotion (unpacking) from shorts to ints.
4288 # This won't change for different subtargets so cache the result.
4290 proc check_effective_target_vect_widen_sum_hi_to_si { } {
4291 global et_vect_widen_sum_hi_to_si
4293 if [info exists et_vect_widen_sum_hi_to_si_saved] {
4294 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
4296 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
4297 if { [istarget powerpc*-*-*]
4298 || [istarget ia64-*-*] } {
4299 set et_vect_widen_sum_hi_to_si_saved 1
4302 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
4303 return $et_vect_widen_sum_hi_to_si_saved
4306 # Return 1 if the target plus current options supports a vector
4307 # widening summation of *char* args into *short* result, 0 otherwise.
4308 # A target can also support this widening summation if it can support
4309 # promotion (unpacking) from chars to shorts.
4311 # This won't change for different subtargets so cache the result.
4313 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
4314 global et_vect_widen_sum_qi_to_hi
4316 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
4317 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
4319 set et_vect_widen_sum_qi_to_hi_saved 0
4320 if { [check_effective_target_vect_unpack]
4321 || [check_effective_target_arm_neon_ok]
4322 || [istarget ia64-*-*] } {
4323 set et_vect_widen_sum_qi_to_hi_saved 1
4326 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
4327 return $et_vect_widen_sum_qi_to_hi_saved
4330 # Return 1 if the target plus current options supports a vector
4331 # widening summation of *char* args into *int* result, 0 otherwise.
4333 # This won't change for different subtargets so cache the result.
4335 proc check_effective_target_vect_widen_sum_qi_to_si { } {
4336 global et_vect_widen_sum_qi_to_si
4338 if [info exists et_vect_widen_sum_qi_to_si_saved] {
4339 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
4341 set et_vect_widen_sum_qi_to_si_saved 0
4342 if { [istarget powerpc*-*-*] } {
4343 set et_vect_widen_sum_qi_to_si_saved 1
4346 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
4347 return $et_vect_widen_sum_qi_to_si_saved
4350 # Return 1 if the target plus current options supports a vector
4351 # widening multiplication of *char* args into *short* result, 0 otherwise.
4352 # A target can also support this widening multplication if it can support
4353 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
4354 # multiplication of shorts).
4356 # This won't change for different subtargets so cache the result.
4359 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
4360 global et_vect_widen_mult_qi_to_hi
4362 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
4363 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
4365 if { [check_effective_target_vect_unpack]
4366 && [check_effective_target_vect_short_mult] } {
4367 set et_vect_widen_mult_qi_to_hi_saved 1
4369 set et_vect_widen_mult_qi_to_hi_saved 0
4371 if { [istarget powerpc*-*-*]
4372 || [istarget aarch64*-*-*]
4373 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4374 set et_vect_widen_mult_qi_to_hi_saved 1
4377 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
4378 return $et_vect_widen_mult_qi_to_hi_saved
4381 # Return 1 if the target plus current options supports a vector
4382 # widening multiplication of *short* args into *int* result, 0 otherwise.
4383 # A target can also support this widening multplication if it can support
4384 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4385 # multiplication of ints).
4387 # This won't change for different subtargets so cache the result.
4390 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4391 global et_vect_widen_mult_hi_to_si
4393 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4394 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4396 if { [check_effective_target_vect_unpack]
4397 && [check_effective_target_vect_int_mult] } {
4398 set et_vect_widen_mult_hi_to_si_saved 1
4400 set et_vect_widen_mult_hi_to_si_saved 0
4402 if { [istarget powerpc*-*-*]
4403 || [istarget spu-*-*]
4404 || [istarget ia64-*-*]
4405 || [istarget aarch64*-*-*]
4406 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4407 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4408 set et_vect_widen_mult_hi_to_si_saved 1
4411 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4412 return $et_vect_widen_mult_hi_to_si_saved
4415 # Return 1 if the target plus current options supports a vector
4416 # widening multiplication of *char* args into *short* result, 0 otherwise.
4418 # This won't change for different subtargets so cache the result.
4420 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4421 global et_vect_widen_mult_qi_to_hi_pattern
4423 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4424 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4426 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4427 if { [istarget powerpc*-*-*]
4428 || ([istarget arm*-*-*]
4429 && [check_effective_target_arm_neon_ok]
4430 && [check_effective_target_arm_little_endian]) } {
4431 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4434 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4435 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4438 # Return 1 if the target plus current options supports a vector
4439 # widening multiplication of *short* args into *int* result, 0 otherwise.
4441 # This won't change for different subtargets so cache the result.
4443 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4444 global et_vect_widen_mult_hi_to_si_pattern
4446 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4447 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4449 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4450 if { [istarget powerpc*-*-*]
4451 || [istarget spu-*-*]
4452 || [istarget ia64-*-*]
4453 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4454 || ([istarget arm*-*-*]
4455 && [check_effective_target_arm_neon_ok]
4456 && [check_effective_target_arm_little_endian]) } {
4457 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4460 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4461 return $et_vect_widen_mult_hi_to_si_pattern_saved
4464 # Return 1 if the target plus current options supports a vector
4465 # widening multiplication of *int* args into *long* result, 0 otherwise.
4467 # This won't change for different subtargets so cache the result.
4469 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4470 global et_vect_widen_mult_si_to_di_pattern
4472 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4473 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4475 set et_vect_widen_mult_si_to_di_pattern_saved 0
4476 if {[istarget ia64-*-*]
4477 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4478 set et_vect_widen_mult_si_to_di_pattern_saved 1
4481 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4482 return $et_vect_widen_mult_si_to_di_pattern_saved
4485 # Return 1 if the target plus current options supports a vector
4486 # widening shift, 0 otherwise.
4488 # This won't change for different subtargets so cache the result.
4490 proc check_effective_target_vect_widen_shift { } {
4491 global et_vect_widen_shift_saved
4493 if [info exists et_vect_shift_saved] {
4494 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4496 set et_vect_widen_shift_saved 0
4497 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4498 set et_vect_widen_shift_saved 1
4501 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4502 return $et_vect_widen_shift_saved
4505 # Return 1 if the target plus current options supports a vector
4506 # dot-product of signed chars, 0 otherwise.
4508 # This won't change for different subtargets so cache the result.
4510 proc check_effective_target_vect_sdot_qi { } {
4511 global et_vect_sdot_qi
4513 if [info exists et_vect_sdot_qi_saved] {
4514 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4516 set et_vect_sdot_qi_saved 0
4517 if { [istarget ia64-*-*] } {
4518 set et_vect_udot_qi_saved 1
4521 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4522 return $et_vect_sdot_qi_saved
4525 # Return 1 if the target plus current options supports a vector
4526 # dot-product of unsigned chars, 0 otherwise.
4528 # This won't change for different subtargets so cache the result.
4530 proc check_effective_target_vect_udot_qi { } {
4531 global et_vect_udot_qi
4533 if [info exists et_vect_udot_qi_saved] {
4534 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4536 set et_vect_udot_qi_saved 0
4537 if { [istarget powerpc*-*-*]
4538 || [istarget ia64-*-*] } {
4539 set et_vect_udot_qi_saved 1
4542 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4543 return $et_vect_udot_qi_saved
4546 # Return 1 if the target plus current options supports a vector
4547 # dot-product of signed shorts, 0 otherwise.
4549 # This won't change for different subtargets so cache the result.
4551 proc check_effective_target_vect_sdot_hi { } {
4552 global et_vect_sdot_hi
4554 if [info exists et_vect_sdot_hi_saved] {
4555 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4557 set et_vect_sdot_hi_saved 0
4558 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4559 || [istarget ia64-*-*]
4560 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4561 set et_vect_sdot_hi_saved 1
4564 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4565 return $et_vect_sdot_hi_saved
4568 # Return 1 if the target plus current options supports a vector
4569 # dot-product of unsigned shorts, 0 otherwise.
4571 # This won't change for different subtargets so cache the result.
4573 proc check_effective_target_vect_udot_hi { } {
4574 global et_vect_udot_hi
4576 if [info exists et_vect_udot_hi_saved] {
4577 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4579 set et_vect_udot_hi_saved 0
4580 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4581 set et_vect_udot_hi_saved 1
4584 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4585 return $et_vect_udot_hi_saved
4588 # Return 1 if the target plus current options supports a vector
4589 # sad operation of unsigned chars, 0 otherwise.
4591 # This won't change for different subtargets so cache the result.
4593 proc check_effective_target_vect_usad_char { } {
4594 global et_vect_usad_char
4596 if [info exists et_vect_usad_char_saved] {
4597 verbose "check_effective_target_vect_usad_char: using cached result" 2
4599 set et_vect_usad_char_saved 0
4600 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4601 set et_vect_usad_char_saved 1
4604 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4605 return $et_vect_usad_char_saved
4608 # Return 1 if the target plus current options supports a vector
4609 # demotion (packing) of shorts (to chars) and ints (to shorts)
4610 # using modulo arithmetic, 0 otherwise.
4612 # This won't change for different subtargets so cache the result.
4614 proc check_effective_target_vect_pack_trunc { } {
4615 global et_vect_pack_trunc
4617 if [info exists et_vect_pack_trunc_saved] {
4618 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4620 set et_vect_pack_trunc_saved 0
4621 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4622 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4623 || [istarget aarch64*-*-*]
4624 || [istarget spu-*-*]
4625 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4626 && [check_effective_target_arm_little_endian]) } {
4627 set et_vect_pack_trunc_saved 1
4630 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4631 return $et_vect_pack_trunc_saved
4634 # Return 1 if the target plus current options supports a vector
4635 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4637 # This won't change for different subtargets so cache the result.
4639 proc check_effective_target_vect_unpack { } {
4640 global et_vect_unpack
4642 if [info exists et_vect_unpack_saved] {
4643 verbose "check_effective_target_vect_unpack: using cached result" 2
4645 set et_vect_unpack_saved 0
4646 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4647 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4648 || [istarget spu-*-*]
4649 || [istarget ia64-*-*]
4650 || [istarget aarch64*-*-*]
4651 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4652 && [check_effective_target_arm_little_endian]) } {
4653 set et_vect_unpack_saved 1
4656 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4657 return $et_vect_unpack_saved
4660 # Return 1 if the target plus current options does not guarantee
4661 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4663 # This won't change for different subtargets so cache the result.
4665 proc check_effective_target_unaligned_stack { } {
4666 global et_unaligned_stack_saved
4668 if [info exists et_unaligned_stack_saved] {
4669 verbose "check_effective_target_unaligned_stack: using cached result" 2
4671 set et_unaligned_stack_saved 0
4673 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4674 return $et_unaligned_stack_saved
4677 # Return 1 if the target plus current options does not support a vector
4678 # alignment mechanism, 0 otherwise.
4680 # This won't change for different subtargets so cache the result.
4682 proc check_effective_target_vect_no_align { } {
4683 global et_vect_no_align_saved
4685 if [info exists et_vect_no_align_saved] {
4686 verbose "check_effective_target_vect_no_align: using cached result" 2
4688 set et_vect_no_align_saved 0
4689 if { [istarget mipsisa64*-*-*]
4690 || [istarget mips-sde-elf]
4691 || [istarget sparc*-*-*]
4692 || [istarget ia64-*-*]
4693 || [check_effective_target_arm_vect_no_misalign]
4694 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4695 || ([istarget mips*-*-*]
4696 && [check_effective_target_mips_loongson]) } {
4697 set et_vect_no_align_saved 1
4700 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4701 return $et_vect_no_align_saved
4704 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4706 # This won't change for different subtargets so cache the result.
4708 proc check_effective_target_vect_hw_misalign { } {
4709 global et_vect_hw_misalign_saved
4711 if [info exists et_vect_hw_misalign_saved] {
4712 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4714 set et_vect_hw_misalign_saved 0
4715 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4716 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4717 || [istarget aarch64*-*-*] } {
4718 set et_vect_hw_misalign_saved 1
4721 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4722 return $et_vect_hw_misalign_saved
4726 # Return 1 if arrays are aligned to the vector alignment
4727 # boundary, 0 otherwise.
4729 # This won't change for different subtargets so cache the result.
4731 proc check_effective_target_vect_aligned_arrays { } {
4732 global et_vect_aligned_arrays
4734 if [info exists et_vect_aligned_arrays_saved] {
4735 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4737 set et_vect_aligned_arrays_saved 0
4738 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4739 if { ([is-effective-target lp64]
4740 && ( ![check_avx_available]
4741 || [check_prefer_avx128])) } {
4742 set et_vect_aligned_arrays_saved 1
4745 if [istarget spu-*-*] {
4746 set et_vect_aligned_arrays_saved 1
4749 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4750 return $et_vect_aligned_arrays_saved
4753 # Return 1 if types of size 32 bit or less are naturally aligned
4754 # (aligned to their type-size), 0 otherwise.
4756 # This won't change for different subtargets so cache the result.
4758 proc check_effective_target_natural_alignment_32 { } {
4759 global et_natural_alignment_32
4761 if [info exists et_natural_alignment_32_saved] {
4762 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4764 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4765 set et_natural_alignment_32_saved 1
4766 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4767 set et_natural_alignment_32_saved 0
4770 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4771 return $et_natural_alignment_32_saved
4774 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4775 # type-size), 0 otherwise.
4777 # This won't change for different subtargets so cache the result.
4779 proc check_effective_target_natural_alignment_64 { } {
4780 global et_natural_alignment_64
4782 if [info exists et_natural_alignment_64_saved] {
4783 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4785 set et_natural_alignment_64_saved 0
4786 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4787 || [istarget spu-*-*] } {
4788 set et_natural_alignment_64_saved 1
4791 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4792 return $et_natural_alignment_64_saved
4795 # Return 1 if all vector types are naturally aligned (aligned to their
4796 # type-size), 0 otherwise.
4798 # This won't change for different subtargets so cache the result.
4800 proc check_effective_target_vect_natural_alignment { } {
4801 global et_vect_natural_alignment
4803 if [info exists et_vect_natural_alignment_saved] {
4804 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4806 set et_vect_natural_alignment_saved 1
4807 if { [check_effective_target_arm_eabi]
4808 || [istarget nvptx-*-*]
4809 || [istarget s390*-*-*] } {
4810 set et_vect_natural_alignment_saved 0
4813 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4814 return $et_vect_natural_alignment_saved
4817 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4819 # This won't change for different subtargets so cache the result.
4821 proc check_effective_target_vector_alignment_reachable { } {
4822 global et_vector_alignment_reachable
4824 if [info exists et_vector_alignment_reachable_saved] {
4825 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4827 if { [check_effective_target_vect_aligned_arrays]
4828 || [check_effective_target_natural_alignment_32] } {
4829 set et_vector_alignment_reachable_saved 1
4831 set et_vector_alignment_reachable_saved 0
4834 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4835 return $et_vector_alignment_reachable_saved
4838 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4840 # This won't change for different subtargets so cache the result.
4842 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4843 global et_vector_alignment_reachable_for_64bit
4845 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4846 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4848 if { [check_effective_target_vect_aligned_arrays]
4849 || [check_effective_target_natural_alignment_64] } {
4850 set et_vector_alignment_reachable_for_64bit_saved 1
4852 set et_vector_alignment_reachable_for_64bit_saved 0
4855 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4856 return $et_vector_alignment_reachable_for_64bit_saved
4859 # Return 1 if the target only requires element alignment for vector accesses
4861 proc check_effective_target_vect_element_align { } {
4862 global et_vect_element_align
4864 if [info exists et_vect_element_align] {
4865 verbose "check_effective_target_vect_element_align: using cached result" 2
4867 set et_vect_element_align 0
4868 if { ([istarget arm*-*-*]
4869 && ![check_effective_target_arm_vect_no_misalign])
4870 || [check_effective_target_vect_hw_misalign] } {
4871 set et_vect_element_align 1
4875 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4876 return $et_vect_element_align
4879 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
4881 proc check_effective_target_vect_load_lanes { } {
4882 global et_vect_load_lanes
4884 if [info exists et_vect_load_lanes] {
4885 verbose "check_effective_target_vect_load_lanes: using cached result" 2
4887 set et_vect_load_lanes 0
4888 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
4889 || [istarget aarch64*-*-*] } {
4890 set et_vect_load_lanes 1
4894 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
4895 return $et_vect_load_lanes
4898 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4900 proc check_effective_target_vect_condition { } {
4901 global et_vect_cond_saved
4903 if [info exists et_vect_cond_saved] {
4904 verbose "check_effective_target_vect_cond: using cached result" 2
4906 set et_vect_cond_saved 0
4907 if { [istarget aarch64*-*-*]
4908 || [istarget powerpc*-*-*]
4909 || [istarget ia64-*-*]
4910 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4911 || [istarget spu-*-*]
4912 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4913 set et_vect_cond_saved 1
4917 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4918 return $et_vect_cond_saved
4921 # Return 1 if the target supports vector conditional operations where
4922 # the comparison has different type from the lhs, 0 otherwise.
4924 proc check_effective_target_vect_cond_mixed { } {
4925 global et_vect_cond_mixed_saved
4927 if [info exists et_vect_cond_mixed_saved] {
4928 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4930 set et_vect_cond_mixed_saved 0
4931 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4932 || [istarget powerpc*-*-*] } {
4933 set et_vect_cond_mixed_saved 1
4937 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4938 return $et_vect_cond_mixed_saved
4941 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4943 proc check_effective_target_vect_char_mult { } {
4944 global et_vect_char_mult_saved
4946 if [info exists et_vect_char_mult_saved] {
4947 verbose "check_effective_target_vect_char_mult: using cached result" 2
4949 set et_vect_char_mult_saved 0
4950 if { [istarget aarch64*-*-*]
4951 || [istarget ia64-*-*]
4952 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4953 || [check_effective_target_arm32]
4954 || [check_effective_target_powerpc_altivec] } {
4955 set et_vect_char_mult_saved 1
4959 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4960 return $et_vect_char_mult_saved
4963 # Return 1 if the target supports vector short multiplication, 0 otherwise.
4965 proc check_effective_target_vect_short_mult { } {
4966 global et_vect_short_mult_saved
4968 if [info exists et_vect_short_mult_saved] {
4969 verbose "check_effective_target_vect_short_mult: using cached result" 2
4971 set et_vect_short_mult_saved 0
4972 if { [istarget ia64-*-*]
4973 || [istarget spu-*-*]
4974 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4975 || [istarget powerpc*-*-*]
4976 || [istarget aarch64*-*-*]
4977 || [check_effective_target_arm32]
4978 || ([istarget mips*-*-*]
4979 && [check_effective_target_mips_loongson]) } {
4980 set et_vect_short_mult_saved 1
4984 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4985 return $et_vect_short_mult_saved
4988 # Return 1 if the target supports vector int multiplication, 0 otherwise.
4990 proc check_effective_target_vect_int_mult { } {
4991 global et_vect_int_mult_saved
4993 if [info exists et_vect_int_mult_saved] {
4994 verbose "check_effective_target_vect_int_mult: using cached result" 2
4996 set et_vect_int_mult_saved 0
4997 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4998 || [istarget spu-*-*]
4999 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5000 || [istarget ia64-*-*]
5001 || [istarget aarch64*-*-*]
5002 || [check_effective_target_arm32] } {
5003 set et_vect_int_mult_saved 1
5007 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
5008 return $et_vect_int_mult_saved
5011 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
5013 proc check_effective_target_vect_extract_even_odd { } {
5014 global et_vect_extract_even_odd_saved
5016 if [info exists et_vect_extract_even_odd_saved] {
5017 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
5019 set et_vect_extract_even_odd_saved 0
5020 if { [istarget aarch64*-*-*]
5021 || [istarget powerpc*-*-*]
5022 || [is-effective-target arm_neon_ok]
5023 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5024 || [istarget ia64-*-*]
5025 || [istarget spu-*-*]
5026 || ([istarget mips*-*-*]
5027 && [check_effective_target_mpaired_single]) } {
5028 set et_vect_extract_even_odd_saved 1
5032 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
5033 return $et_vect_extract_even_odd_saved
5036 # Return 1 if the target supports vector interleaving, 0 otherwise.
5038 proc check_effective_target_vect_interleave { } {
5039 global et_vect_interleave_saved
5041 if [info exists et_vect_interleave_saved] {
5042 verbose "check_effective_target_vect_interleave: using cached result" 2
5044 set et_vect_interleave_saved 0
5045 if { [istarget aarch64*-*-*]
5046 || [istarget powerpc*-*-*]
5047 || [is-effective-target arm_neon_ok]
5048 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5049 || [istarget ia64-*-*]
5050 || [istarget spu-*-*]
5051 || ([istarget mips*-*-*]
5052 && [check_effective_target_mpaired_single]) } {
5053 set et_vect_interleave_saved 1
5057 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
5058 return $et_vect_interleave_saved
5061 foreach N {2 3 4 8} {
5062 eval [string map [list N $N] {
5063 # Return 1 if the target supports 2-vector interleaving
5064 proc check_effective_target_vect_stridedN { } {
5065 global et_vect_stridedN_saved
5067 if [info exists et_vect_stridedN_saved] {
5068 verbose "check_effective_target_vect_stridedN: using cached result" 2
5070 set et_vect_stridedN_saved 0
5072 && [check_effective_target_vect_interleave]
5073 && [check_effective_target_vect_extract_even_odd] } {
5074 set et_vect_stridedN_saved 1
5076 if { ([istarget arm*-*-*]
5077 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
5078 set et_vect_stridedN_saved 1
5082 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
5083 return $et_vect_stridedN_saved
5088 # Return 1 if the target supports multiple vector sizes
5090 proc check_effective_target_vect_multiple_sizes { } {
5091 global et_vect_multiple_sizes_saved
5093 set et_vect_multiple_sizes_saved 0
5094 if { ([istarget aarch64*-*-*]
5095 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
5096 set et_vect_multiple_sizes_saved 1
5098 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5099 if { ([check_avx_available] && ![check_prefer_avx128]) } {
5100 set et_vect_multiple_sizes_saved 1
5104 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
5105 return $et_vect_multiple_sizes_saved
5108 # Return 1 if the target supports vectors of 64 bits.
5110 proc check_effective_target_vect64 { } {
5111 global et_vect64_saved
5113 if [info exists et_vect64_saved] {
5114 verbose "check_effective_target_vect64: using cached result" 2
5116 set et_vect64_saved 0
5117 if { ([istarget arm*-*-*]
5118 && [check_effective_target_arm_neon_ok]
5119 && [check_effective_target_arm_little_endian])
5120 || [istarget aarch64*-*-*]
5121 || [istarget sparc*-*-*] } {
5122 set et_vect64_saved 1
5126 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
5127 return $et_vect64_saved
5130 # Return 1 if the target supports vector copysignf calls.
5132 proc check_effective_target_vect_call_copysignf { } {
5133 global et_vect_call_copysignf_saved
5135 if [info exists et_vect_call_copysignf_saved] {
5136 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
5138 set et_vect_call_copysignf_saved 0
5139 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5140 || [istarget powerpc*-*-*] } {
5141 set et_vect_call_copysignf_saved 1
5145 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
5146 return $et_vect_call_copysignf_saved
5149 # Return 1 if the target supports hardware square root instructions.
5151 proc check_effective_target_sqrt_insn { } {
5152 global et_sqrt_insn_saved
5154 if [info exists et_sqrt_insn_saved] {
5155 verbose "check_effective_target_hw_sqrt: using cached result" 2
5157 set et_sqrt_insn_saved 0
5158 if { [istarget x86_64-*-*]
5159 || [istarget powerpc*-*-*]
5160 || [istarget aarch64*-*-*]
5161 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
5162 set et_sqrt_insn_saved 1
5166 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
5167 return $et_sqrt_insn_saved
5170 # Return 1 if the target supports vector sqrtf calls.
5172 proc check_effective_target_vect_call_sqrtf { } {
5173 global et_vect_call_sqrtf_saved
5175 if [info exists et_vect_call_sqrtf_saved] {
5176 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
5178 set et_vect_call_sqrtf_saved 0
5179 if { [istarget aarch64*-*-*]
5180 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5181 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
5182 set et_vect_call_sqrtf_saved 1
5186 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
5187 return $et_vect_call_sqrtf_saved
5190 # Return 1 if the target supports vector lrint calls.
5192 proc check_effective_target_vect_call_lrint { } {
5193 set et_vect_call_lrint 0
5194 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
5195 && [check_effective_target_ilp32] } {
5196 set et_vect_call_lrint 1
5199 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
5200 return $et_vect_call_lrint
5203 # Return 1 if the target supports vector btrunc calls.
5205 proc check_effective_target_vect_call_btrunc { } {
5206 global et_vect_call_btrunc_saved
5208 if [info exists et_vect_call_btrunc_saved] {
5209 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
5211 set et_vect_call_btrunc_saved 0
5212 if { [istarget aarch64*-*-*] } {
5213 set et_vect_call_btrunc_saved 1
5217 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
5218 return $et_vect_call_btrunc_saved
5221 # Return 1 if the target supports vector btruncf calls.
5223 proc check_effective_target_vect_call_btruncf { } {
5224 global et_vect_call_btruncf_saved
5226 if [info exists et_vect_call_btruncf_saved] {
5227 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
5229 set et_vect_call_btruncf_saved 0
5230 if { [istarget aarch64*-*-*] } {
5231 set et_vect_call_btruncf_saved 1
5235 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
5236 return $et_vect_call_btruncf_saved
5239 # Return 1 if the target supports vector ceil calls.
5241 proc check_effective_target_vect_call_ceil { } {
5242 global et_vect_call_ceil_saved
5244 if [info exists et_vect_call_ceil_saved] {
5245 verbose "check_effective_target_vect_call_ceil: using cached result" 2
5247 set et_vect_call_ceil_saved 0
5248 if { [istarget aarch64*-*-*] } {
5249 set et_vect_call_ceil_saved 1
5253 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
5254 return $et_vect_call_ceil_saved
5257 # Return 1 if the target supports vector ceilf calls.
5259 proc check_effective_target_vect_call_ceilf { } {
5260 global et_vect_call_ceilf_saved
5262 if [info exists et_vect_call_ceilf_saved] {
5263 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
5265 set et_vect_call_ceilf_saved 0
5266 if { [istarget aarch64*-*-*] } {
5267 set et_vect_call_ceilf_saved 1
5271 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
5272 return $et_vect_call_ceilf_saved
5275 # Return 1 if the target supports vector floor calls.
5277 proc check_effective_target_vect_call_floor { } {
5278 global et_vect_call_floor_saved
5280 if [info exists et_vect_call_floor_saved] {
5281 verbose "check_effective_target_vect_call_floor: using cached result" 2
5283 set et_vect_call_floor_saved 0
5284 if { [istarget aarch64*-*-*] } {
5285 set et_vect_call_floor_saved 1
5289 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
5290 return $et_vect_call_floor_saved
5293 # Return 1 if the target supports vector floorf calls.
5295 proc check_effective_target_vect_call_floorf { } {
5296 global et_vect_call_floorf_saved
5298 if [info exists et_vect_call_floorf_saved] {
5299 verbose "check_effective_target_vect_call_floorf: using cached result" 2
5301 set et_vect_call_floorf_saved 0
5302 if { [istarget aarch64*-*-*] } {
5303 set et_vect_call_floorf_saved 1
5307 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
5308 return $et_vect_call_floorf_saved
5311 # Return 1 if the target supports vector lceil calls.
5313 proc check_effective_target_vect_call_lceil { } {
5314 global et_vect_call_lceil_saved
5316 if [info exists et_vect_call_lceil_saved] {
5317 verbose "check_effective_target_vect_call_lceil: using cached result" 2
5319 set et_vect_call_lceil_saved 0
5320 if { [istarget aarch64*-*-*] } {
5321 set et_vect_call_lceil_saved 1
5325 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
5326 return $et_vect_call_lceil_saved
5329 # Return 1 if the target supports vector lfloor calls.
5331 proc check_effective_target_vect_call_lfloor { } {
5332 global et_vect_call_lfloor_saved
5334 if [info exists et_vect_call_lfloor_saved] {
5335 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
5337 set et_vect_call_lfloor_saved 0
5338 if { [istarget aarch64*-*-*] } {
5339 set et_vect_call_lfloor_saved 1
5343 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
5344 return $et_vect_call_lfloor_saved
5347 # Return 1 if the target supports vector nearbyint calls.
5349 proc check_effective_target_vect_call_nearbyint { } {
5350 global et_vect_call_nearbyint_saved
5352 if [info exists et_vect_call_nearbyint_saved] {
5353 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
5355 set et_vect_call_nearbyint_saved 0
5356 if { [istarget aarch64*-*-*] } {
5357 set et_vect_call_nearbyint_saved 1
5361 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
5362 return $et_vect_call_nearbyint_saved
5365 # Return 1 if the target supports vector nearbyintf calls.
5367 proc check_effective_target_vect_call_nearbyintf { } {
5368 global et_vect_call_nearbyintf_saved
5370 if [info exists et_vect_call_nearbyintf_saved] {
5371 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
5373 set et_vect_call_nearbyintf_saved 0
5374 if { [istarget aarch64*-*-*] } {
5375 set et_vect_call_nearbyintf_saved 1
5379 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
5380 return $et_vect_call_nearbyintf_saved
5383 # Return 1 if the target supports vector round calls.
5385 proc check_effective_target_vect_call_round { } {
5386 global et_vect_call_round_saved
5388 if [info exists et_vect_call_round_saved] {
5389 verbose "check_effective_target_vect_call_round: using cached result" 2
5391 set et_vect_call_round_saved 0
5392 if { [istarget aarch64*-*-*] } {
5393 set et_vect_call_round_saved 1
5397 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
5398 return $et_vect_call_round_saved
5401 # Return 1 if the target supports vector roundf calls.
5403 proc check_effective_target_vect_call_roundf { } {
5404 global et_vect_call_roundf_saved
5406 if [info exists et_vect_call_roundf_saved] {
5407 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5409 set et_vect_call_roundf_saved 0
5410 if { [istarget aarch64*-*-*] } {
5411 set et_vect_call_roundf_saved 1
5415 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5416 return $et_vect_call_roundf_saved
5419 # Return 1 if the target supports section-anchors
5421 proc check_effective_target_section_anchors { } {
5422 global et_section_anchors_saved
5424 if [info exists et_section_anchors_saved] {
5425 verbose "check_effective_target_section_anchors: using cached result" 2
5427 set et_section_anchors_saved 0
5428 if { [istarget powerpc*-*-*]
5429 || [istarget arm*-*-*] } {
5430 set et_section_anchors_saved 1
5434 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5435 return $et_section_anchors_saved
5438 # Return 1 if the target supports atomic operations on "int_128" values.
5440 proc check_effective_target_sync_int_128 { } {
5441 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5442 && ![is-effective-target ia32] } {
5444 } elseif { [istarget spu-*-*] } {
5451 # Return 1 if the target supports atomic operations on "int_128" values
5452 # and can execute them.
5454 proc check_effective_target_sync_int_128_runtime { } {
5455 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5456 && ![is-effective-target ia32] } {
5457 return [check_cached_effective_target sync_int_128_available {
5458 check_runtime_nocache sync_int_128_available {
5462 unsigned int eax, ebx, ecx, edx;
5463 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5464 return !(ecx & bit_CMPXCHG16B);
5469 } elseif { [istarget spu-*-*] } {
5476 # Return 1 if the target supports atomic operations on "long long".
5478 # Note: 32bit x86 targets require -march=pentium in dg-options.
5479 # Note: 32bit s390 targets require -mzarch in dg-options.
5481 proc check_effective_target_sync_long_long { } {
5482 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5483 || [istarget aarch64*-*-*]
5484 || [istarget arm*-*-*]
5485 || [istarget alpha*-*-*]
5486 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
5487 || [istarget s390*-*-*]
5488 || [istarget spu-*-*] } {
5495 # Return 1 if the target supports atomic operations on "long long"
5496 # and can execute them.
5498 # Note: 32bit x86 targets require -march=pentium in dg-options.
5500 proc check_effective_target_sync_long_long_runtime { } {
5501 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5502 return [check_cached_effective_target sync_long_long_available {
5503 check_runtime_nocache sync_long_long_available {
5507 unsigned int eax, ebx, ecx, edx;
5508 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5509 return !(edx & bit_CMPXCHG8B);
5514 } elseif { [istarget aarch64*-*-*] } {
5516 } elseif { [istarget arm*-*-linux-*] } {
5517 return [check_runtime sync_longlong_runtime {
5523 if (sizeof (long long) != 8)
5526 /* Just check for native; checking for kernel fallback is tricky. */
5527 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5532 } elseif { [istarget alpha*-*-*] } {
5534 } elseif { ([istarget sparc*-*-*]
5535 && [check_effective_target_lp64]
5536 && [check_effective_target_ultrasparc_hw]) } {
5538 } elseif { [istarget spu-*-*] } {
5540 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5547 # Return 1 if the target supports byte swap instructions.
5549 proc check_effective_target_bswap { } {
5550 global et_bswap_saved
5552 if [info exists et_bswap_saved] {
5553 verbose "check_effective_target_bswap: using cached result" 2
5555 set et_bswap_saved 0
5556 if { [istarget aarch64*-*-*]
5557 || [istarget alpha*-*-*]
5558 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5559 || [istarget m68k-*-*]
5560 || [istarget powerpc*-*-*]
5561 || [istarget rs6000-*-*]
5562 || [istarget s390*-*-*] } {
5563 set et_bswap_saved 1
5565 if { [istarget arm*-*-*]
5566 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5568 #error not armv6 or later
5572 set et_bswap_saved 1
5577 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5578 return $et_bswap_saved
5581 # Return 1 if the target supports 16-bit byte swap instructions.
5583 proc check_effective_target_bswap16 { } {
5584 global et_bswap16_saved
5586 if [info exists et_bswap16_saved] {
5587 verbose "check_effective_target_bswap16: using cached result" 2
5589 set et_bswap16_saved 0
5590 if { [is-effective-target bswap]
5591 && ![istarget alpha*-*-*]
5592 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5593 set et_bswap16_saved 1
5597 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5598 return $et_bswap16_saved
5601 # Return 1 if the target supports 32-bit byte swap instructions.
5603 proc check_effective_target_bswap32 { } {
5604 global et_bswap32_saved
5606 if [info exists et_bswap32_saved] {
5607 verbose "check_effective_target_bswap32: using cached result" 2
5609 set et_bswap32_saved 0
5610 if { [is-effective-target bswap] } {
5611 set et_bswap32_saved 1
5615 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5616 return $et_bswap32_saved
5619 # Return 1 if the target supports 64-bit byte swap instructions.
5621 # Note: 32bit s390 targets require -mzarch in dg-options.
5623 proc check_effective_target_bswap64 { } {
5624 global et_bswap64_saved
5626 # expand_unop can expand 64-bit byte swap on 32-bit targets
5627 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5633 # Return 1 if the target supports atomic operations on "int" and "long".
5635 proc check_effective_target_sync_int_long { } {
5636 global et_sync_int_long_saved
5638 if [info exists et_sync_int_long_saved] {
5639 verbose "check_effective_target_sync_int_long: using cached result" 2
5641 set et_sync_int_long_saved 0
5642 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5643 # load-reserved/store-conditional instructions.
5644 if { [istarget ia64-*-*]
5645 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5646 || [istarget aarch64*-*-*]
5647 || [istarget alpha*-*-*]
5648 || [istarget arm*-*-linux-*]
5649 || [istarget bfin*-*linux*]
5650 || [istarget hppa*-*linux*]
5651 || [istarget s390*-*-*]
5652 || [istarget powerpc*-*-*]
5653 || [istarget crisv32-*-*] || [istarget cris-*-*]
5654 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5655 || [istarget spu-*-*]
5656 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5657 || [check_effective_target_mips_llsc] } {
5658 set et_sync_int_long_saved 1
5662 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5663 return $et_sync_int_long_saved
5666 # Return 1 if the target supports atomic operations on "char" and "short".
5668 proc check_effective_target_sync_char_short { } {
5669 global et_sync_char_short_saved
5671 if [info exists et_sync_char_short_saved] {
5672 verbose "check_effective_target_sync_char_short: using cached result" 2
5674 set et_sync_char_short_saved 0
5675 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5676 # load-reserved/store-conditional instructions.
5677 if { [istarget aarch64*-*-*]
5678 || [istarget ia64-*-*]
5679 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5680 || [istarget alpha*-*-*]
5681 || [istarget arm*-*-linux-*]
5682 || [istarget hppa*-*linux*]
5683 || [istarget s390*-*-*]
5684 || [istarget powerpc*-*-*]
5685 || [istarget crisv32-*-*] || [istarget cris-*-*]
5686 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5687 || [istarget spu-*-*]
5688 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5689 || [check_effective_target_mips_llsc] } {
5690 set et_sync_char_short_saved 1
5694 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5695 return $et_sync_char_short_saved
5698 # Return 1 if the target uses a ColdFire FPU.
5700 proc check_effective_target_coldfire_fpu { } {
5701 return [check_no_compiler_messages coldfire_fpu assembly {
5708 # Return true if this is a uClibc target.
5710 proc check_effective_target_uclibc {} {
5711 return [check_no_compiler_messages uclibc object {
5712 #include <features.h>
5713 #if !defined (__UCLIBC__)
5719 # Return true if this is a uclibc target and if the uclibc feature
5720 # described by __$feature__ is not present.
5722 proc check_missing_uclibc_feature {feature} {
5723 return [check_no_compiler_messages $feature object "
5724 #include <features.h>
5725 #if !defined (__UCLIBC) || defined (__${feature}__)
5731 # Return true if this is a Newlib target.
5733 proc check_effective_target_newlib {} {
5734 return [check_no_compiler_messages newlib object {
5739 # Return true if this is NOT a Bionic target.
5741 proc check_effective_target_non_bionic {} {
5742 return [check_no_compiler_messages non_bionic object {
5744 #if defined (__BIONIC__)
5750 # Return true if this target has error.h header.
5752 proc check_effective_target_error_h {} {
5753 return [check_no_compiler_messages error_h object {
5758 # Return true if this target has tgmath.h header.
5760 proc check_effective_target_tgmath_h {} {
5761 return [check_no_compiler_messages tgmath_h object {
5766 # Return true if target's libc supports complex functions.
5768 proc check_effective_target_libc_has_complex_functions {} {
5769 return [check_no_compiler_messages libc_has_complex_functions object {
5770 #include <complex.h>
5775 # (a) an error of a few ULP is expected in string to floating-point
5776 # conversion functions; and
5777 # (b) overflow is not always detected correctly by those functions.
5779 proc check_effective_target_lax_strtofp {} {
5780 # By default, assume that all uClibc targets suffer from this.
5781 return [check_effective_target_uclibc]
5784 # Return 1 if this is a target for which wcsftime is a dummy
5785 # function that always returns 0.
5787 proc check_effective_target_dummy_wcsftime {} {
5788 # By default, assume that all uClibc targets suffer from this.
5789 return [check_effective_target_uclibc]
5792 # Return 1 if constructors with initialization priority arguments are
5793 # supposed on this target.
5795 proc check_effective_target_init_priority {} {
5796 return [check_no_compiler_messages init_priority assembly "
5797 void f() __attribute__((constructor (1000)));
5802 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5803 # This can be used with any check_* proc that takes no argument and
5804 # returns only 1 or 0. It could be used with check_* procs that take
5805 # arguments with keywords that pass particular arguments.
5807 proc is-effective-target { arg } {
5809 if { [info procs check_effective_target_${arg}] != [list] } {
5810 set selected [check_effective_target_${arg}]
5813 "vmx_hw" { set selected [check_vmx_hw_available] }
5814 "vsx_hw" { set selected [check_vsx_hw_available] }
5815 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5816 "p9vector_hw" { set selected [check_p9vector_hw_available] }
5817 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
5818 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
5819 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
5820 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5821 "dfp_hw" { set selected [check_dfp_hw_available] }
5822 "htm_hw" { set selected [check_htm_hw_available] }
5823 "named_sections" { set selected [check_named_sections_available] }
5824 "gc_sections" { set selected [check_gc_sections_available] }
5825 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5826 default { error "unknown effective target keyword `$arg'" }
5829 verbose "is-effective-target: $arg $selected" 2
5833 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
5835 proc is-effective-target-keyword { arg } {
5836 if { [info procs check_effective_target_${arg}] != [list] } {
5839 # These have different names for their check_* procs.
5841 "vmx_hw" { return 1 }
5842 "vsx_hw" { return 1 }
5843 "p8vector_hw" { return 1 }
5844 "p9vector_hw" { return 1 }
5845 "p9modulo_hw" { return 1 }
5846 "ppc_float128_sw" { return 1 }
5847 "ppc_float128_hw" { return 1 }
5848 "ppc_recip_hw" { return 1 }
5849 "dfp_hw" { return 1 }
5850 "htm_hw" { return 1 }
5851 "named_sections" { return 1 }
5852 "gc_sections" { return 1 }
5853 "cxa_atexit" { return 1 }
5854 default { return 0 }
5859 # Return 1 if target default to short enums
5861 proc check_effective_target_short_enums { } {
5862 return [check_no_compiler_messages short_enums assembly {
5864 int s[sizeof (enum foo) == 1 ? 1 : -1];
5868 # Return 1 if target supports merging string constants at link time.
5870 proc check_effective_target_string_merging { } {
5871 return [check_no_messages_and_pattern string_merging \
5872 "rodata\\.str" assembly {
5873 const char *var = "String";
5877 # Return 1 if target has the basic signed and unsigned types in
5878 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
5879 # working <stdint.h> for all targets.
5881 proc check_effective_target_stdint_types { } {
5882 return [check_no_compiler_messages stdint_types assembly {
5884 int8_t a; int16_t b; int32_t c; int64_t d;
5885 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5889 # Return 1 if target has the basic signed and unsigned types in
5890 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5891 # these types agree with those in the header, as some systems have
5892 # only <inttypes.h>.
5894 proc check_effective_target_inttypes_types { } {
5895 return [check_no_compiler_messages inttypes_types assembly {
5896 #include <inttypes.h>
5897 int8_t a; int16_t b; int32_t c; int64_t d;
5898 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5902 # Return 1 if programs are intended to be run on a simulator
5903 # (i.e. slowly) rather than hardware (i.e. fast).
5905 proc check_effective_target_simulator { } {
5907 # All "src/sim" simulators set this one.
5908 if [board_info target exists is_simulator] {
5909 return [board_info target is_simulator]
5912 # The "sid" simulators don't set that one, but at least they set
5914 if [board_info target exists slow_simulator] {
5915 return [board_info target slow_simulator]
5921 # Return 1 if programs are intended to be run on hardware rather than
5924 proc check_effective_target_hw { } {
5926 # All "src/sim" simulators set this one.
5927 if [board_info target exists is_simulator] {
5928 if [board_info target is_simulator] {
5935 # The "sid" simulators don't set that one, but at least they set
5937 if [board_info target exists slow_simulator] {
5938 if [board_info target slow_simulator] {
5948 # Return 1 if the target is a VxWorks kernel.
5950 proc check_effective_target_vxworks_kernel { } {
5951 return [check_no_compiler_messages vxworks_kernel assembly {
5952 #if !defined __vxworks || defined __RTP__
5958 # Return 1 if the target is a VxWorks RTP.
5960 proc check_effective_target_vxworks_rtp { } {
5961 return [check_no_compiler_messages vxworks_rtp assembly {
5962 #if !defined __vxworks || !defined __RTP__
5968 # Return 1 if the target is expected to provide wide character support.
5970 proc check_effective_target_wchar { } {
5971 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
5974 return [check_no_compiler_messages wchar assembly {
5979 # Return 1 if the target has <pthread.h>.
5981 proc check_effective_target_pthread_h { } {
5982 return [check_no_compiler_messages pthread_h assembly {
5983 #include <pthread.h>
5987 # Return 1 if the target can truncate a file from a file-descriptor,
5988 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
5989 # chsize. We test for a trivially functional truncation; no stubs.
5990 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
5991 # different function to be used.
5993 proc check_effective_target_fd_truncate { } {
5995 #define _FILE_OFFSET_BITS 64
6002 FILE *f = fopen ("tst.tmp", "wb");
6004 const char t[] = "test writing more than ten characters";
6008 write (fd, t, sizeof (t) - 1);
6010 if (ftruncate (fd, 10) != 0)
6019 f = fopen ("tst.tmp", "rb");
6020 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
6028 if { [check_runtime ftruncate $prog] } {
6032 regsub "ftruncate" $prog "chsize" prog
6033 return [check_runtime chsize $prog]
6036 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
6038 proc add_options_for_c99_runtime { flags } {
6039 if { [istarget *-*-solaris2*] } {
6040 return "$flags -std=c99"
6042 if { [istarget powerpc-*-darwin*] } {
6043 return "$flags -mmacosx-version-min=10.3"
6048 # Add to FLAGS all the target-specific flags needed to enable
6049 # full IEEE compliance mode.
6051 proc add_options_for_ieee { flags } {
6052 if { [istarget alpha*-*-*]
6053 || [istarget sh*-*-*] } {
6054 return "$flags -mieee"
6056 if { [istarget rx-*-*] } {
6057 return "$flags -mnofpu"
6062 if {![info exists flags_to_postpone]} {
6063 set flags_to_postpone ""
6066 # Add to FLAGS the flags needed to enable functions to bind locally
6067 # when using pic/PIC passes in the testsuite.
6068 proc add_options_for_bind_pic_locally { flags } {
6069 global flags_to_postpone
6071 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
6072 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
6073 # order to make sure that the multilib_flags doesn't override this.
6075 if {[check_no_compiler_messages using_pic2 assembly {
6080 set flags_to_postpone "-fPIE"
6083 if {[check_no_compiler_messages using_pic1 assembly {
6088 set flags_to_postpone "-fpie"
6094 # Add to FLAGS the flags needed to enable 64-bit vectors.
6096 proc add_options_for_double_vectors { flags } {
6097 if [is-effective-target arm_neon_ok] {
6098 return "$flags -mvectorize-with-neon-double"
6104 # Return 1 if the target provides a full C99 runtime.
6106 proc check_effective_target_c99_runtime { } {
6107 return [check_cached_effective_target c99_runtime {
6110 set file [open "$srcdir/gcc.dg/builtins-config.h"]
6111 set contents [read $file]
6114 #ifndef HAVE_C99_RUNTIME
6115 #error !HAVE_C99_RUNTIME
6118 check_no_compiler_messages_nocache c99_runtime assembly \
6119 $contents [add_options_for_c99_runtime ""]
6123 # Return 1 if target wchar_t is at least 4 bytes.
6125 proc check_effective_target_4byte_wchar_t { } {
6126 return [check_no_compiler_messages 4byte_wchar_t object {
6127 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
6131 # Return 1 if the target supports automatic stack alignment.
6133 proc check_effective_target_automatic_stack_alignment { } {
6134 # Ordinarily x86 supports automatic stack alignment ...
6135 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
6136 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
6137 # ... except Win64 SEH doesn't. Succeed for Win32 though.
6138 return [check_effective_target_ilp32];
6145 # Return true if we are compiling for AVX target.
6147 proc check_avx_available { } {
6148 if { [check_no_compiler_messages avx_available assembly {
6158 # Return true if 32- and 16-bytes vectors are available.
6160 proc check_effective_target_vect_sizes_32B_16B { } {
6161 if { [check_avx_available] && ![check_prefer_avx128] } {
6168 # Return true if 128-bits vectors are preferred even if 256-bits vectors
6171 proc check_prefer_avx128 { } {
6172 if ![check_avx_available] {
6175 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
6176 float a[1024],b[1024],c[1024];
6177 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
6178 } "-O2 -ftree-vectorize"]
6182 # Return 1 if avx512f instructions can be compiled.
6184 proc check_effective_target_avx512f { } {
6185 return [check_no_compiler_messages avx512f object {
6186 typedef double __m512d __attribute__ ((__vector_size__ (64)));
6188 __m512d _mm512_add (__m512d a)
6190 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
6195 # Return 1 if avx instructions can be compiled.
6197 proc check_effective_target_avx { } {
6198 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6201 return [check_no_compiler_messages avx object {
6202 void _mm256_zeroall (void)
6204 __builtin_ia32_vzeroall ();
6209 # Return 1 if avx2 instructions can be compiled.
6210 proc check_effective_target_avx2 { } {
6211 return [check_no_compiler_messages avx2 object {
6212 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
6214 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
6216 return __builtin_ia32_andnotsi256 (__X, __Y);
6221 # Return 1 if sse instructions can be compiled.
6222 proc check_effective_target_sse { } {
6223 return [check_no_compiler_messages sse object {
6226 __builtin_ia32_stmxcsr ();
6232 # Return 1 if sse2 instructions can be compiled.
6233 proc check_effective_target_sse2 { } {
6234 return [check_no_compiler_messages sse2 object {
6235 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
6237 __m128i _mm_srli_si128 (__m128i __A, int __N)
6239 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
6244 # Return 1 if F16C instructions can be compiled.
6246 proc check_effective_target_f16c { } {
6247 return [check_no_compiler_messages f16c object {
6248 #include "immintrin.h"
6250 foo (unsigned short val)
6252 return _cvtsh_ss (val);
6257 # Return 1 if C wchar_t type is compatible with char16_t.
6259 proc check_effective_target_wchar_t_char16_t_compatible { } {
6260 return [check_no_compiler_messages wchar_t_char16_t object {
6262 __CHAR16_TYPE__ *p16 = &wc;
6263 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6267 # Return 1 if C wchar_t type is compatible with char32_t.
6269 proc check_effective_target_wchar_t_char32_t_compatible { } {
6270 return [check_no_compiler_messages wchar_t_char32_t object {
6272 __CHAR32_TYPE__ *p32 = &wc;
6273 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6277 # Return 1 if pow10 function exists.
6279 proc check_effective_target_pow10 { } {
6280 return [check_runtime pow10 {
6290 # Return 1 if current options generate DFP instructions, 0 otherwise.
6292 proc check_effective_target_hard_dfp {} {
6293 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
6294 typedef float d64 __attribute__((mode(DD)));
6296 void foo (void) { z = x + y; }
6300 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
6301 # for strchr etc. functions.
6303 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
6304 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
6307 #if !defined(__cplusplus) \
6308 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
6309 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
6310 ISO C++ correct string.h and wchar.h protos not supported.
6317 # Return 1 if GNU as is used.
6319 proc check_effective_target_gas { } {
6320 global use_gas_saved
6323 if {![info exists use_gas_saved]} {
6324 # Check if the as used by gcc is GNU as.
6325 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
6326 # Provide /dev/null as input, otherwise gas times out reading from
6328 set status [remote_exec host "$gcc_as" "-v /dev/null"]
6329 set as_output [lindex $status 1]
6330 if { [ string first "GNU" $as_output ] >= 0 } {
6336 return $use_gas_saved
6339 # Return 1 if GNU ld is used.
6341 proc check_effective_target_gld { } {
6342 global use_gld_saved
6345 if {![info exists use_gld_saved]} {
6346 # Check if the ld used by gcc is GNU ld.
6347 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
6348 set status [remote_exec host "$gcc_ld" "--version"]
6349 set ld_output [lindex $status 1]
6350 if { [ string first "GNU" $ld_output ] >= 0 } {
6356 return $use_gld_saved
6359 # Return 1 if the compiler has been configure with link-time optimization
6362 proc check_effective_target_lto { } {
6363 if { [istarget nvptx-*-*] } {
6366 return [check_no_compiler_messages lto object {
6371 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
6373 proc check_effective_target_maybe_x32 { } {
6374 return [check_no_compiler_messages maybe_x32 object {
6376 } "-mx32 -maddress-mode=short"]
6379 # Return 1 if this target supports the -fsplit-stack option, 0
6382 proc check_effective_target_split_stack {} {
6383 return [check_no_compiler_messages split_stack object {
6388 # Return 1 if this target supports the -masm=intel option, 0
6391 proc check_effective_target_masm_intel {} {
6392 return [check_no_compiler_messages masm_intel object {
6393 extern void abort (void);
6397 # Return 1 if the language for the compiler under test is C.
6399 proc check_effective_target_c { } {
6401 if [string match $tool "gcc"] {
6407 # Return 1 if the language for the compiler under test is C++.
6409 proc check_effective_target_c++ { } {
6411 if [string match $tool "g++"] {
6417 set cxx_default "c++14"
6418 # Check whether the current active language standard supports the features
6419 # of C++11/C++14 by checking for the presence of one of the -std flags.
6420 # This assumes that the default for the compiler is $cxx_default, and that
6421 # there will never be multiple -std= arguments on the command line.
6422 proc check_effective_target_c++11_only { } {
6424 if ![check_effective_target_c++] {
6427 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6430 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6435 proc check_effective_target_c++11 { } {
6436 if [check_effective_target_c++11_only] {
6439 return [check_effective_target_c++14]
6441 proc check_effective_target_c++11_down { } {
6442 if ![check_effective_target_c++] {
6445 return [expr ![check_effective_target_c++14] ]
6448 proc check_effective_target_c++14_only { } {
6450 if ![check_effective_target_c++] {
6453 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6456 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6462 proc check_effective_target_c++14 { } {
6463 if [check_effective_target_c++14_only] {
6466 return [check_effective_target_c++1z]
6468 proc check_effective_target_c++14_down { } {
6469 if ![check_effective_target_c++] {
6472 return [expr ![check_effective_target_c++1z] ]
6475 proc check_effective_target_c++98_only { } {
6477 if ![check_effective_target_c++] {
6480 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6483 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6489 proc check_effective_target_c++1z_only { } {
6491 if ![check_effective_target_c++] {
6494 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6497 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6502 proc check_effective_target_c++1z { } {
6503 return [check_effective_target_c++1z_only]
6506 # Return 1 if expensive testcases should be run.
6508 proc check_effective_target_run_expensive_tests { } {
6509 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6515 # Returns 1 if "mempcpy" is available on the target system.
6517 proc check_effective_target_mempcpy {} {
6518 return [check_function_available "mempcpy"]
6521 # Returns 1 if "stpcpy" is available on the target system.
6523 proc check_effective_target_stpcpy {} {
6524 return [check_function_available "stpcpy"]
6527 # Check whether the vectorizer tests are supported by the target and
6528 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6529 # Set dg-do-what-default to either compile or run, depending on target
6530 # capabilities. Return 1 if vectorizer tests are supported by
6531 # target, 0 otherwise.
6533 proc check_vect_support_and_set_flags { } {
6534 global DEFAULT_VECTCFLAGS
6535 global dg-do-what-default
6537 if [istarget powerpc-*paired*] {
6538 lappend DEFAULT_VECTCFLAGS "-mpaired"
6539 if [check_750cl_hw_available] {
6540 set dg-do-what-default run
6542 set dg-do-what-default compile
6544 } elseif [istarget powerpc*-*-*] {
6545 # Skip targets not supporting -maltivec.
6546 if ![is-effective-target powerpc_altivec_ok] {
6550 lappend DEFAULT_VECTCFLAGS "-maltivec"
6551 if [check_p9vector_hw_available] {
6552 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
6553 } elseif [check_p8vector_hw_available] {
6554 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6555 } elseif [check_vsx_hw_available] {
6556 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6559 if [check_vmx_hw_available] {
6560 set dg-do-what-default run
6562 if [is-effective-target ilp32] {
6563 # Specify a cpu that supports VMX for compile-only tests.
6564 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6566 set dg-do-what-default compile
6568 } elseif { [istarget spu-*-*] } {
6569 set dg-do-what-default run
6570 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6571 lappend DEFAULT_VECTCFLAGS "-msse2"
6572 if { [check_effective_target_sse2_runtime] } {
6573 set dg-do-what-default run
6575 set dg-do-what-default compile
6577 } elseif { [istarget mips*-*-*]
6578 && ([check_effective_target_mpaired_single]
6579 || [check_effective_target_mips_loongson])
6580 && [check_effective_target_nomips16] } {
6581 if { [check_effective_target_mpaired_single] } {
6582 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6584 set dg-do-what-default run
6585 } elseif [istarget sparc*-*-*] {
6586 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6587 if [check_effective_target_ultrasparc_hw] {
6588 set dg-do-what-default run
6590 set dg-do-what-default compile
6592 } elseif [istarget alpha*-*-*] {
6593 # Alpha's vectorization capabilities are extremely limited.
6594 # It's more effort than its worth disabling all of the tests
6595 # that it cannot pass. But if you actually want to see what
6596 # does work, command out the return.
6599 lappend DEFAULT_VECTCFLAGS "-mmax"
6600 if [check_alpha_max_hw_available] {
6601 set dg-do-what-default run
6603 set dg-do-what-default compile
6605 } elseif [istarget ia64-*-*] {
6606 set dg-do-what-default run
6607 } elseif [is-effective-target arm_neon_ok] {
6608 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6609 # NEON does not support denormals, so is not used for vectorization by
6610 # default to avoid loss of precision. We must pass -ffast-math to test
6611 # vectorization of float operations.
6612 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6613 if [is-effective-target arm_neon_hw] {
6614 set dg-do-what-default run
6616 set dg-do-what-default compile
6618 } elseif [istarget "aarch64*-*-*"] {
6619 set dg-do-what-default run
6627 # Return 1 if the target does *not* require strict alignment.
6629 proc check_effective_target_non_strict_align {} {
6631 # On ARM, the default is to use STRICT_ALIGNMENT, but there
6632 # are interfaces defined for misaligned access and thus
6633 # depending on the architecture levels unaligned access is
6635 if [istarget "arm*-*-*"] {
6636 return [check_effective_target_arm_unaligned]
6639 return [check_no_compiler_messages non_strict_align assembly {
6641 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6643 void foo(void) { z = (c *) y; }
6647 # Return 1 if the target has <ucontext.h>.
6649 proc check_effective_target_ucontext_h { } {
6650 return [check_no_compiler_messages ucontext_h assembly {
6651 #include <ucontext.h>
6655 proc check_effective_target_aarch64_tiny { } {
6656 if { [istarget aarch64*-*-*] } {
6657 return [check_no_compiler_messages aarch64_tiny object {
6658 #ifdef __AARCH64_CMODEL_TINY__
6661 #error target not AArch64 tiny code model
6669 proc check_effective_target_aarch64_small { } {
6670 if { [istarget aarch64*-*-*] } {
6671 return [check_no_compiler_messages aarch64_small object {
6672 #ifdef __AARCH64_CMODEL_SMALL__
6675 #error target not AArch64 small code model
6683 proc check_effective_target_aarch64_large { } {
6684 if { [istarget aarch64*-*-*] } {
6685 return [check_no_compiler_messages aarch64_large object {
6686 #ifdef __AARCH64_CMODEL_LARGE__
6689 #error target not AArch64 large code model
6697 # Return 1 if <fenv.h> is available with all the standard IEEE
6698 # exceptions and floating-point exceptions are raised by arithmetic
6699 # operations. (If the target requires special options for "inexact"
6700 # exceptions, those need to be specified in the testcases.)
6702 proc check_effective_target_fenv_exceptions {} {
6703 return [check_runtime fenv_exceptions {
6706 #ifndef FE_DIVBYZERO
6707 # error Missing FE_DIVBYZERO
6710 # error Missing FE_INEXACT
6713 # error Missing FE_INVALID
6716 # error Missing FE_OVERFLOW
6718 #ifndef FE_UNDERFLOW
6719 # error Missing FE_UNDERFLOW
6721 volatile float a = 0.0f, r;
6726 if (fetestexcept (FE_INVALID))
6731 } [add_options_for_ieee "-std=gnu99"]]
6734 proc check_effective_target_tiny {} {
6735 global et_target_tiny_saved
6737 if [info exists et_target_tine_saved] {
6738 verbose "check_effective_target_tiny: using cached result" 2
6740 set et_target_tiny_saved 0
6741 if { [istarget aarch64*-*-*]
6742 && [check_effective_target_aarch64_tiny] } {
6743 set et_target_tiny_saved 1
6747 return $et_target_tiny_saved
6750 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
6752 proc check_effective_target_logical_op_short_circuit {} {
6753 if { [istarget mips*-*-*]
6754 || [istarget arc*-*-*]
6755 || [istarget avr*-*-*]
6756 || [istarget crisv32-*-*] || [istarget cris-*-*]
6757 || [istarget mmix-*-*]
6758 || [istarget s390*-*-*]
6759 || [istarget powerpc*-*-*]
6760 || [istarget nios2*-*-*]
6761 || [istarget visium-*-*]
6762 || [check_effective_target_arm_cortex_m] } {
6768 # Record that dg-final test TEST requires convential compilation.
6770 proc force_conventional_output_for { test } {
6771 if { [info proc $test] == "" } {
6772 perror "$test does not exist"
6775 proc ${test}_required_options {} {
6776 global gcc_force_conventional_output
6777 return $gcc_force_conventional_output
6781 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
6782 # otherwise. Cache the result.
6784 proc check_effective_target_pie_copyreloc { } {
6785 global pie_copyreloc_available_saved
6787 global GCC_UNDER_TEST
6789 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6793 # Need auto-host.h to check linker support.
6794 if { ![file exists ../../auto-host.h ] } {
6798 if [info exists pie_copyreloc_available_saved] {
6799 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
6801 # Set up and compile to see if linker supports PIE with copy
6802 # reloc. Include the current process ID in the file names to
6803 # prevent conflicts with invocations for multiple testsuites.
6808 set f [open $src "w"]
6809 puts $f "#include \"../../auto-host.h\""
6810 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
6811 puts $f "# error Linker does not support PIE with copy reloc."
6815 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
6816 set lines [${tool}_target_compile $src $obj object ""]
6821 if [string match "" $lines] then {
6822 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
6823 set pie_copyreloc_available_saved 1
6825 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
6826 set pie_copyreloc_available_saved 0
6830 return $pie_copyreloc_available_saved
6833 # Return 1 if the target uses comdat groups.
6835 proc check_effective_target_comdat_group {} {
6836 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
6838 inline int foo () { return 1; }
6843 # Return 1 if target supports __builtin_eh_return
6844 proc check_effective_target_builtin_eh_return { } {
6845 return [check_no_compiler_messages builtin_eh_return object {
6846 void test (long l, void *p)
6848 __builtin_eh_return (l, p);
6853 # Return 1 if the target supports max reduction for vectors.
6855 proc check_effective_target_vect_max_reduc { } {
6856 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
6862 # Return 1 if there is an nvptx offload compiler.
6864 proc check_effective_target_offload_nvptx { } {
6865 return [check_no_compiler_messages offload_nvptx object {
6866 int main () {return 0;}
6867 } "-foffload=nvptx-none" ]